SelectionDAG.cpp revision 03a5707955788fc333c6767c054341b12075eff9
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This implements the SelectionDAG class.
11//
12//===----------------------------------------------------------------------===//
13#include "llvm/CodeGen/SelectionDAG.h"
14#include "llvm/Constants.h"
15#include "llvm/Analysis/ValueTracking.h"
16#include "llvm/GlobalAlias.h"
17#include "llvm/GlobalVariable.h"
18#include "llvm/Intrinsics.h"
19#include "llvm/DerivedTypes.h"
20#include "llvm/Assembly/Writer.h"
21#include "llvm/CallingConv.h"
22#include "llvm/CodeGen/MachineBasicBlock.h"
23#include "llvm/CodeGen/MachineConstantPool.h"
24#include "llvm/CodeGen/MachineFrameInfo.h"
25#include "llvm/CodeGen/MachineModuleInfo.h"
26#include "llvm/CodeGen/PseudoSourceValue.h"
27#include "llvm/Support/MathExtras.h"
28#include "llvm/Target/TargetRegisterInfo.h"
29#include "llvm/Target/TargetData.h"
30#include "llvm/Target/TargetLowering.h"
31#include "llvm/Target/TargetInstrInfo.h"
32#include "llvm/Target/TargetMachine.h"
33#include "llvm/ADT/SetVector.h"
34#include "llvm/ADT/SmallPtrSet.h"
35#include "llvm/ADT/SmallSet.h"
36#include "llvm/ADT/SmallVector.h"
37#include "llvm/ADT/StringExtras.h"
38#include <algorithm>
39#include <cmath>
40using namespace llvm;
41
42/// makeVTList - Return an instance of the SDVTList struct initialized with the
43/// specified members.
44static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
45  SDVTList Res = {VTs, NumVTs};
46  return Res;
47}
48
49static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
50  switch (VT.getSimpleVT()) {
51  default: assert(0 && "Unknown FP format");
52  case MVT::f32:     return &APFloat::IEEEsingle;
53  case MVT::f64:     return &APFloat::IEEEdouble;
54  case MVT::f80:     return &APFloat::x87DoubleExtended;
55  case MVT::f128:    return &APFloat::IEEEquad;
56  case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
57  }
58}
59
60SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
61
62//===----------------------------------------------------------------------===//
63//                              ConstantFPSDNode Class
64//===----------------------------------------------------------------------===//
65
66/// isExactlyValue - We don't rely on operator== working on double values, as
67/// it returns true for things that are clearly not equal, like -0.0 and 0.0.
68/// As such, this method can be used to do an exact bit-for-bit comparison of
69/// two floating point values.
70bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
71  return Value.bitwiseIsEqual(V);
72}
73
74bool ConstantFPSDNode::isValueValidForType(MVT VT,
75                                           const APFloat& Val) {
76  assert(VT.isFloatingPoint() && "Can only convert between FP types");
77
78  // PPC long double cannot be converted to any other type.
79  if (VT == MVT::ppcf128 ||
80      &Val.getSemantics() == &APFloat::PPCDoubleDouble)
81    return false;
82
83  // convert modifies in place, so make a copy.
84  APFloat Val2 = APFloat(Val);
85  return Val2.convert(*MVTToAPFloatSemantics(VT),
86                      APFloat::rmNearestTiesToEven) == APFloat::opOK;
87}
88
89//===----------------------------------------------------------------------===//
90//                              ISD Namespace
91//===----------------------------------------------------------------------===//
92
93/// isBuildVectorAllOnes - Return true if the specified node is a
94/// BUILD_VECTOR where all of the elements are ~0 or undef.
95bool ISD::isBuildVectorAllOnes(const SDNode *N) {
96  // Look through a bit convert.
97  if (N->getOpcode() == ISD::BIT_CONVERT)
98    N = N->getOperand(0).Val;
99
100  if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
101
102  unsigned i = 0, e = N->getNumOperands();
103
104  // Skip over all of the undef values.
105  while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
106    ++i;
107
108  // Do not accept an all-undef vector.
109  if (i == e) return false;
110
111  // Do not accept build_vectors that aren't all constants or which have non-~0
112  // elements.
113  SDOperand NotZero = N->getOperand(i);
114  if (isa<ConstantSDNode>(NotZero)) {
115    if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue())
116      return false;
117  } else if (isa<ConstantFPSDNode>(NotZero)) {
118    if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF().
119                convertToAPInt().isAllOnesValue())
120      return false;
121  } else
122    return false;
123
124  // Okay, we have at least one ~0 value, check to see if the rest match or are
125  // undefs.
126  for (++i; i != e; ++i)
127    if (N->getOperand(i) != NotZero &&
128        N->getOperand(i).getOpcode() != ISD::UNDEF)
129      return false;
130  return true;
131}
132
133
134/// isBuildVectorAllZeros - Return true if the specified node is a
135/// BUILD_VECTOR where all of the elements are 0 or undef.
136bool ISD::isBuildVectorAllZeros(const SDNode *N) {
137  // Look through a bit convert.
138  if (N->getOpcode() == ISD::BIT_CONVERT)
139    N = N->getOperand(0).Val;
140
141  if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
142
143  unsigned i = 0, e = N->getNumOperands();
144
145  // Skip over all of the undef values.
146  while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
147    ++i;
148
149  // Do not accept an all-undef vector.
150  if (i == e) return false;
151
152  // Do not accept build_vectors that aren't all constants or which have non-~0
153  // elements.
154  SDOperand Zero = N->getOperand(i);
155  if (isa<ConstantSDNode>(Zero)) {
156    if (!cast<ConstantSDNode>(Zero)->isNullValue())
157      return false;
158  } else if (isa<ConstantFPSDNode>(Zero)) {
159    if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
160      return false;
161  } else
162    return false;
163
164  // Okay, we have at least one ~0 value, check to see if the rest match or are
165  // undefs.
166  for (++i; i != e; ++i)
167    if (N->getOperand(i) != Zero &&
168        N->getOperand(i).getOpcode() != ISD::UNDEF)
169      return false;
170  return true;
171}
172
173/// isScalarToVector - Return true if the specified node is a
174/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
175/// element is not an undef.
176bool ISD::isScalarToVector(const SDNode *N) {
177  if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
178    return true;
179
180  if (N->getOpcode() != ISD::BUILD_VECTOR)
181    return false;
182  if (N->getOperand(0).getOpcode() == ISD::UNDEF)
183    return false;
184  unsigned NumElems = N->getNumOperands();
185  for (unsigned i = 1; i < NumElems; ++i) {
186    SDOperand V = N->getOperand(i);
187    if (V.getOpcode() != ISD::UNDEF)
188      return false;
189  }
190  return true;
191}
192
193
194/// isDebugLabel - Return true if the specified node represents a debug
195/// label (i.e. ISD::LABEL or TargetInstrInfo::LABEL node and third operand
196/// is 0).
197bool ISD::isDebugLabel(const SDNode *N) {
198  SDOperand Zero;
199  if (N->getOpcode() == ISD::LABEL)
200    Zero = N->getOperand(2);
201  else if (N->isTargetOpcode() &&
202           N->getTargetOpcode() == TargetInstrInfo::LABEL)
203    // Chain moved to last operand.
204    Zero = N->getOperand(1);
205  else
206    return false;
207  return isa<ConstantSDNode>(Zero) && cast<ConstantSDNode>(Zero)->isNullValue();
208}
209
210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
211/// when given the operation for (X op Y).
212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
213  // To perform this operation, we just need to swap the L and G bits of the
214  // operation.
215  unsigned OldL = (Operation >> 2) & 1;
216  unsigned OldG = (Operation >> 1) & 1;
217  return ISD::CondCode((Operation & ~6) |  // Keep the N, U, E bits
218                       (OldL << 1) |       // New G bit
219                       (OldG << 2));        // New L bit.
220}
221
222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where
223/// 'op' is a valid SetCC operation.
224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
225  unsigned Operation = Op;
226  if (isInteger)
227    Operation ^= 7;   // Flip L, G, E bits, but not U.
228  else
229    Operation ^= 15;  // Flip all of the condition bits.
230  if (Operation > ISD::SETTRUE2)
231    Operation &= ~8;     // Don't let N and U bits get set.
232  return ISD::CondCode(Operation);
233}
234
235
236/// isSignedOp - For an integer comparison, return 1 if the comparison is a
237/// signed operation and 2 if the result is an unsigned comparison.  Return zero
238/// if the operation does not depend on the sign of the input (setne and seteq).
239static int isSignedOp(ISD::CondCode Opcode) {
240  switch (Opcode) {
241  default: assert(0 && "Illegal integer setcc operation!");
242  case ISD::SETEQ:
243  case ISD::SETNE: return 0;
244  case ISD::SETLT:
245  case ISD::SETLE:
246  case ISD::SETGT:
247  case ISD::SETGE: return 1;
248  case ISD::SETULT:
249  case ISD::SETULE:
250  case ISD::SETUGT:
251  case ISD::SETUGE: return 2;
252  }
253}
254
255/// getSetCCOrOperation - Return the result of a logical OR between different
256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)).  This function
257/// returns SETCC_INVALID if it is not possible to represent the resultant
258/// comparison.
259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
260                                       bool isInteger) {
261  if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
262    // Cannot fold a signed integer setcc with an unsigned integer setcc.
263    return ISD::SETCC_INVALID;
264
265  unsigned Op = Op1 | Op2;  // Combine all of the condition bits.
266
267  // If the N and U bits get set then the resultant comparison DOES suddenly
268  // care about orderedness, and is true when ordered.
269  if (Op > ISD::SETTRUE2)
270    Op &= ~16;     // Clear the U bit if the N bit is set.
271
272  // Canonicalize illegal integer setcc's.
273  if (isInteger && Op == ISD::SETUNE)  // e.g. SETUGT | SETULT
274    Op = ISD::SETNE;
275
276  return ISD::CondCode(Op);
277}
278
279/// getSetCCAndOperation - Return the result of a logical AND between different
280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)).  This
281/// function returns zero if it is not possible to represent the resultant
282/// comparison.
283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
284                                        bool isInteger) {
285  if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
286    // Cannot fold a signed setcc with an unsigned setcc.
287    return ISD::SETCC_INVALID;
288
289  // Combine all of the condition bits.
290  ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
291
292  // Canonicalize illegal integer setcc's.
293  if (isInteger) {
294    switch (Result) {
295    default: break;
296    case ISD::SETUO : Result = ISD::SETFALSE; break;  // SETUGT & SETULT
297    case ISD::SETOEQ:                                 // SETEQ  & SETU[LG]E
298    case ISD::SETUEQ: Result = ISD::SETEQ   ; break;  // SETUGE & SETULE
299    case ISD::SETOLT: Result = ISD::SETULT  ; break;  // SETULT & SETNE
300    case ISD::SETOGT: Result = ISD::SETUGT  ; break;  // SETUGT & SETNE
301    }
302  }
303
304  return Result;
305}
306
307const TargetMachine &SelectionDAG::getTarget() const {
308  return TLI.getTargetMachine();
309}
310
311//===----------------------------------------------------------------------===//
312//                           SDNode Profile Support
313//===----------------------------------------------------------------------===//
314
315/// AddNodeIDOpcode - Add the node opcode to the NodeID data.
316///
317static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC)  {
318  ID.AddInteger(OpC);
319}
320
321/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
322/// solely with their pointer.
323static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
324  ID.AddPointer(VTList.VTs);
325}
326
327/// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
328///
329static void AddNodeIDOperands(FoldingSetNodeID &ID,
330                              SDOperandPtr Ops, unsigned NumOps) {
331  for (; NumOps; --NumOps, ++Ops) {
332    ID.AddPointer(Ops->Val);
333    ID.AddInteger(Ops->ResNo);
334  }
335}
336
337static void AddNodeIDNode(FoldingSetNodeID &ID,
338                          unsigned short OpC, SDVTList VTList,
339                          SDOperandPtr OpList, unsigned N) {
340  AddNodeIDOpcode(ID, OpC);
341  AddNodeIDValueTypes(ID, VTList);
342  AddNodeIDOperands(ID, OpList, N);
343}
344
345
346/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
347/// data.
348static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
349  AddNodeIDOpcode(ID, N->getOpcode());
350  // Add the return value info.
351  AddNodeIDValueTypes(ID, N->getVTList());
352  // Add the operand info.
353  AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
354
355  // Handle SDNode leafs with special info.
356  switch (N->getOpcode()) {
357  default: break;  // Normal nodes don't need extra info.
358  case ISD::ARG_FLAGS:
359    ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits());
360    break;
361  case ISD::TargetConstant:
362  case ISD::Constant:
363    ID.Add(cast<ConstantSDNode>(N)->getAPIntValue());
364    break;
365  case ISD::TargetConstantFP:
366  case ISD::ConstantFP: {
367    ID.Add(cast<ConstantFPSDNode>(N)->getValueAPF());
368    break;
369  }
370  case ISD::TargetGlobalAddress:
371  case ISD::GlobalAddress:
372  case ISD::TargetGlobalTLSAddress:
373  case ISD::GlobalTLSAddress: {
374    GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
375    ID.AddPointer(GA->getGlobal());
376    ID.AddInteger(GA->getOffset());
377    break;
378  }
379  case ISD::BasicBlock:
380    ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
381    break;
382  case ISD::Register:
383    ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
384    break;
385  case ISD::SRCVALUE:
386    ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
387    break;
388  case ISD::MEMOPERAND: {
389    const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO;
390    ID.AddPointer(MO.getValue());
391    ID.AddInteger(MO.getFlags());
392    ID.AddInteger(MO.getOffset());
393    ID.AddInteger(MO.getSize());
394    ID.AddInteger(MO.getAlignment());
395    break;
396  }
397  case ISD::FrameIndex:
398  case ISD::TargetFrameIndex:
399    ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
400    break;
401  case ISD::JumpTable:
402  case ISD::TargetJumpTable:
403    ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
404    break;
405  case ISD::ConstantPool:
406  case ISD::TargetConstantPool: {
407    ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
408    ID.AddInteger(CP->getAlignment());
409    ID.AddInteger(CP->getOffset());
410    if (CP->isMachineConstantPoolEntry())
411      CP->getMachineCPVal()->AddSelectionDAGCSEId(ID);
412    else
413      ID.AddPointer(CP->getConstVal());
414    break;
415  }
416  case ISD::LOAD: {
417    LoadSDNode *LD = cast<LoadSDNode>(N);
418    ID.AddInteger(LD->getAddressingMode());
419    ID.AddInteger(LD->getExtensionType());
420    ID.AddInteger(LD->getMemoryVT().getRawBits());
421    ID.AddInteger(LD->getAlignment());
422    ID.AddInteger(LD->isVolatile());
423    break;
424  }
425  case ISD::STORE: {
426    StoreSDNode *ST = cast<StoreSDNode>(N);
427    ID.AddInteger(ST->getAddressingMode());
428    ID.AddInteger(ST->isTruncatingStore());
429    ID.AddInteger(ST->getMemoryVT().getRawBits());
430    ID.AddInteger(ST->getAlignment());
431    ID.AddInteger(ST->isVolatile());
432    break;
433  }
434  case ISD::ATOMIC_CMP_SWAP:
435  case ISD::ATOMIC_LOAD_ADD:
436  case ISD::ATOMIC_SWAP:
437  case ISD::ATOMIC_LOAD_SUB:
438  case ISD::ATOMIC_LOAD_AND:
439  case ISD::ATOMIC_LOAD_OR:
440  case ISD::ATOMIC_LOAD_XOR:
441  case ISD::ATOMIC_LOAD_NAND:
442  case ISD::ATOMIC_LOAD_MIN:
443  case ISD::ATOMIC_LOAD_MAX:
444  case ISD::ATOMIC_LOAD_UMIN:
445  case ISD::ATOMIC_LOAD_UMAX: {
446    AtomicSDNode *AT = cast<AtomicSDNode>(N);
447    ID.AddInteger(AT->getAlignment());
448    ID.AddInteger(AT->isVolatile());
449    break;
450  }
451  } // end switch (N->getOpcode())
452}
453
454//===----------------------------------------------------------------------===//
455//                              SelectionDAG Class
456//===----------------------------------------------------------------------===//
457
458/// RemoveDeadNodes - This method deletes all unreachable nodes in the
459/// SelectionDAG.
460void SelectionDAG::RemoveDeadNodes() {
461  // Create a dummy node (which is not added to allnodes), that adds a reference
462  // to the root node, preventing it from being deleted.
463  HandleSDNode Dummy(getRoot());
464
465  SmallVector<SDNode*, 128> DeadNodes;
466
467  // Add all obviously-dead nodes to the DeadNodes worklist.
468  for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
469    if (I->use_empty())
470      DeadNodes.push_back(I);
471
472  // Process the worklist, deleting the nodes and adding their uses to the
473  // worklist.
474  while (!DeadNodes.empty()) {
475    SDNode *N = DeadNodes.back();
476    DeadNodes.pop_back();
477
478    // Take the node out of the appropriate CSE map.
479    RemoveNodeFromCSEMaps(N);
480
481    // Next, brutally remove the operand list.  This is safe to do, as there are
482    // no cycles in the graph.
483    for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
484      SDNode *Operand = I->getVal();
485      Operand->removeUser(std::distance(N->op_begin(), I), N);
486
487      // Now that we removed this operand, see if there are no uses of it left.
488      if (Operand->use_empty())
489        DeadNodes.push_back(Operand);
490    }
491    if (N->OperandsNeedDelete) {
492      delete[] N->OperandList;
493    }
494    N->OperandList = 0;
495    N->NumOperands = 0;
496
497    // Finally, remove N itself.
498    AllNodes.erase(N);
499  }
500
501  // If the root changed (e.g. it was a dead load, update the root).
502  setRoot(Dummy.getValue());
503}
504
505void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
506  SmallVector<SDNode*, 16> DeadNodes;
507  DeadNodes.push_back(N);
508
509  // Process the worklist, deleting the nodes and adding their uses to the
510  // worklist.
511  while (!DeadNodes.empty()) {
512    SDNode *N = DeadNodes.back();
513    DeadNodes.pop_back();
514
515    if (UpdateListener)
516      UpdateListener->NodeDeleted(N, 0);
517
518    // Take the node out of the appropriate CSE map.
519    RemoveNodeFromCSEMaps(N);
520
521    // Next, brutally remove the operand list.  This is safe to do, as there are
522    // no cycles in the graph.
523    for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
524      SDNode *Operand = I->getVal();
525      Operand->removeUser(std::distance(N->op_begin(), I), N);
526
527      // Now that we removed this operand, see if there are no uses of it left.
528      if (Operand->use_empty())
529        DeadNodes.push_back(Operand);
530    }
531    if (N->OperandsNeedDelete) {
532      delete[] N->OperandList;
533    }
534    N->OperandList = 0;
535    N->NumOperands = 0;
536
537    // Finally, remove N itself.
538    AllNodes.erase(N);
539  }
540}
541
542void SelectionDAG::DeleteNode(SDNode *N) {
543  assert(N->use_empty() && "Cannot delete a node that is not dead!");
544
545  // First take this out of the appropriate CSE map.
546  RemoveNodeFromCSEMaps(N);
547
548  // Finally, remove uses due to operands of this node, remove from the
549  // AllNodes list, and delete the node.
550  DeleteNodeNotInCSEMaps(N);
551}
552
553void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
554
555  // Remove it from the AllNodes list.
556  AllNodes.remove(N);
557
558  // Drop all of the operands and decrement used nodes use counts.
559  for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
560    I->getVal()->removeUser(std::distance(N->op_begin(), I), N);
561  if (N->OperandsNeedDelete) {
562    delete[] N->OperandList;
563  }
564  N->OperandList = 0;
565  N->NumOperands = 0;
566
567  delete N;
568}
569
570/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
571/// correspond to it.  This is useful when we're about to delete or repurpose
572/// the node.  We don't want future request for structurally identical nodes
573/// to return N anymore.
574void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
575  bool Erased = false;
576  switch (N->getOpcode()) {
577  case ISD::HANDLENODE: return;  // noop.
578  case ISD::STRING:
579    Erased = StringNodes.erase(cast<StringSDNode>(N)->getValue());
580    break;
581  case ISD::CONDCODE:
582    assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
583           "Cond code doesn't exist!");
584    Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
585    CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
586    break;
587  case ISD::ExternalSymbol:
588    Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
589    break;
590  case ISD::TargetExternalSymbol:
591    Erased =
592      TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
593    break;
594  case ISD::VALUETYPE: {
595    MVT VT = cast<VTSDNode>(N)->getVT();
596    if (VT.isExtended()) {
597      Erased = ExtendedValueTypeNodes.erase(VT);
598    } else {
599      Erased = ValueTypeNodes[VT.getSimpleVT()] != 0;
600      ValueTypeNodes[VT.getSimpleVT()] = 0;
601    }
602    break;
603  }
604  default:
605    // Remove it from the CSE Map.
606    Erased = CSEMap.RemoveNode(N);
607    break;
608  }
609#ifndef NDEBUG
610  // Verify that the node was actually in one of the CSE maps, unless it has a
611  // flag result (which cannot be CSE'd) or is one of the special cases that are
612  // not subject to CSE.
613  if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
614      !N->isTargetOpcode()) {
615    N->dump(this);
616    cerr << "\n";
617    assert(0 && "Node is not in map!");
618  }
619#endif
620}
621
622/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps.  It
623/// has been taken out and modified in some way.  If the specified node already
624/// exists in the CSE maps, do not modify the maps, but return the existing node
625/// instead.  If it doesn't exist, add it and return null.
626///
627SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) {
628  assert(N->getNumOperands() && "This is a leaf node!");
629  if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
630    return 0;    // Never add these nodes.
631
632  // Check that remaining values produced are not flags.
633  for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
634    if (N->getValueType(i) == MVT::Flag)
635      return 0;   // Never CSE anything that produces a flag.
636
637  SDNode *New = CSEMap.GetOrInsertNode(N);
638  if (New != N) return New;  // Node already existed.
639  return 0;
640}
641
642/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
643/// were replaced with those specified.  If this node is never memoized,
644/// return null, otherwise return a pointer to the slot it would take.  If a
645/// node already exists with these operands, the slot will be non-null.
646SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDOperand Op,
647                                           void *&InsertPos) {
648  if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
649    return 0;    // Never add these nodes.
650
651  // Check that remaining values produced are not flags.
652  for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
653    if (N->getValueType(i) == MVT::Flag)
654      return 0;   // Never CSE anything that produces a flag.
655
656  SDOperand Ops[] = { Op };
657  FoldingSetNodeID ID;
658  AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
659  return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
660}
661
662/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
663/// were replaced with those specified.  If this node is never memoized,
664/// return null, otherwise return a pointer to the slot it would take.  If a
665/// node already exists with these operands, the slot will be non-null.
666SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
667                                           SDOperand Op1, SDOperand Op2,
668                                           void *&InsertPos) {
669  if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
670    return 0;    // Never add these nodes.
671
672  // Check that remaining values produced are not flags.
673  for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
674    if (N->getValueType(i) == MVT::Flag)
675      return 0;   // Never CSE anything that produces a flag.
676
677  SDOperand Ops[] = { Op1, Op2 };
678  FoldingSetNodeID ID;
679  AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
680  return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
681}
682
683
684/// FindModifiedNodeSlot - Find a slot for the specified node if its operands
685/// were replaced with those specified.  If this node is never memoized,
686/// return null, otherwise return a pointer to the slot it would take.  If a
687/// node already exists with these operands, the slot will be non-null.
688SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
689                                           SDOperandPtr Ops,unsigned NumOps,
690                                           void *&InsertPos) {
691  if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag)
692    return 0;    // Never add these nodes.
693
694  // Check that remaining values produced are not flags.
695  for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
696    if (N->getValueType(i) == MVT::Flag)
697      return 0;   // Never CSE anything that produces a flag.
698
699  FoldingSetNodeID ID;
700  AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
701
702  if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
703    ID.AddInteger(LD->getAddressingMode());
704    ID.AddInteger(LD->getExtensionType());
705    ID.AddInteger(LD->getMemoryVT().getRawBits());
706    ID.AddInteger(LD->getAlignment());
707    ID.AddInteger(LD->isVolatile());
708  } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
709    ID.AddInteger(ST->getAddressingMode());
710    ID.AddInteger(ST->isTruncatingStore());
711    ID.AddInteger(ST->getMemoryVT().getRawBits());
712    ID.AddInteger(ST->getAlignment());
713    ID.AddInteger(ST->isVolatile());
714  }
715
716  return CSEMap.FindNodeOrInsertPos(ID, InsertPos);
717}
718
719
720SelectionDAG::~SelectionDAG() {
721  while (!AllNodes.empty()) {
722    SDNode *N = AllNodes.begin();
723    N->SetNextInBucket(0);
724    if (N->OperandsNeedDelete) {
725      delete [] N->OperandList;
726    }
727    N->OperandList = 0;
728    N->NumOperands = 0;
729    AllNodes.pop_front();
730  }
731}
732
733SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT VT) {
734  if (Op.getValueType() == VT) return Op;
735  APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
736                                   VT.getSizeInBits());
737  return getNode(ISD::AND, Op.getValueType(), Op,
738                 getConstant(Imm, Op.getValueType()));
739}
740
741SDOperand SelectionDAG::getString(const std::string &Val) {
742  StringSDNode *&N = StringNodes[Val];
743  if (!N) {
744    N = new StringSDNode(Val);
745    AllNodes.push_back(N);
746  }
747  return SDOperand(N, 0);
748}
749
750SDOperand SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
751  MVT EltVT =
752    VT.isVector() ? VT.getVectorElementType() : VT;
753
754  return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
755}
756
757SDOperand SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
758  assert(VT.isInteger() && "Cannot create FP integer constant!");
759
760  MVT EltVT =
761    VT.isVector() ? VT.getVectorElementType() : VT;
762
763  assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
764         "APInt size does not match type size!");
765
766  unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
767  FoldingSetNodeID ID;
768  AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0);
769  ID.Add(Val);
770  void *IP = 0;
771  SDNode *N = NULL;
772  if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
773    if (!VT.isVector())
774      return SDOperand(N, 0);
775  if (!N) {
776    N = new ConstantSDNode(isT, Val, EltVT);
777    CSEMap.InsertNode(N, IP);
778    AllNodes.push_back(N);
779  }
780
781  SDOperand Result(N, 0);
782  if (VT.isVector()) {
783    SmallVector<SDOperand, 8> Ops;
784    Ops.assign(VT.getVectorNumElements(), Result);
785    Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
786  }
787  return Result;
788}
789
790SDOperand SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
791  return getConstant(Val, TLI.getPointerTy(), isTarget);
792}
793
794
795SDOperand SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
796  assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
797
798  MVT EltVT =
799    VT.isVector() ? VT.getVectorElementType() : VT;
800
801  // Do the map lookup using the actual bit pattern for the floating point
802  // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
803  // we don't have issues with SNANs.
804  unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
805  FoldingSetNodeID ID;
806  AddNodeIDNode(ID, Opc, getVTList(EltVT), (SDOperand*)0, 0);
807  ID.Add(V);
808  void *IP = 0;
809  SDNode *N = NULL;
810  if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
811    if (!VT.isVector())
812      return SDOperand(N, 0);
813  if (!N) {
814    N = new ConstantFPSDNode(isTarget, V, EltVT);
815    CSEMap.InsertNode(N, IP);
816    AllNodes.push_back(N);
817  }
818
819  SDOperand Result(N, 0);
820  if (VT.isVector()) {
821    SmallVector<SDOperand, 8> Ops;
822    Ops.assign(VT.getVectorNumElements(), Result);
823    Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size());
824  }
825  return Result;
826}
827
828SDOperand SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
829  MVT EltVT =
830    VT.isVector() ? VT.getVectorElementType() : VT;
831  if (EltVT==MVT::f32)
832    return getConstantFP(APFloat((float)Val), VT, isTarget);
833  else
834    return getConstantFP(APFloat(Val), VT, isTarget);
835}
836
837SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV,
838                                         MVT VT, int Offset,
839                                         bool isTargetGA) {
840  unsigned Opc;
841
842  const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
843  if (!GVar) {
844    // If GV is an alias then use the aliasee for determining thread-localness.
845    if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
846      GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal());
847  }
848
849  if (GVar && GVar->isThreadLocal())
850    Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
851  else
852    Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
853
854  FoldingSetNodeID ID;
855  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
856  ID.AddPointer(GV);
857  ID.AddInteger(Offset);
858  void *IP = 0;
859  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
860   return SDOperand(E, 0);
861  SDNode *N = new GlobalAddressSDNode(isTargetGA, GV, VT, Offset);
862  CSEMap.InsertNode(N, IP);
863  AllNodes.push_back(N);
864  return SDOperand(N, 0);
865}
866
867SDOperand SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
868  unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
869  FoldingSetNodeID ID;
870  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
871  ID.AddInteger(FI);
872  void *IP = 0;
873  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
874    return SDOperand(E, 0);
875  SDNode *N = new FrameIndexSDNode(FI, VT, isTarget);
876  CSEMap.InsertNode(N, IP);
877  AllNodes.push_back(N);
878  return SDOperand(N, 0);
879}
880
881SDOperand SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){
882  unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
883  FoldingSetNodeID ID;
884  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
885  ID.AddInteger(JTI);
886  void *IP = 0;
887  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
888    return SDOperand(E, 0);
889  SDNode *N = new JumpTableSDNode(JTI, VT, isTarget);
890  CSEMap.InsertNode(N, IP);
891  AllNodes.push_back(N);
892  return SDOperand(N, 0);
893}
894
895SDOperand SelectionDAG::getConstantPool(Constant *C, MVT VT,
896                                        unsigned Alignment, int Offset,
897                                        bool isTarget) {
898  unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
899  FoldingSetNodeID ID;
900  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
901  ID.AddInteger(Alignment);
902  ID.AddInteger(Offset);
903  ID.AddPointer(C);
904  void *IP = 0;
905  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
906    return SDOperand(E, 0);
907  SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
908  CSEMap.InsertNode(N, IP);
909  AllNodes.push_back(N);
910  return SDOperand(N, 0);
911}
912
913
914SDOperand SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
915                                        unsigned Alignment, int Offset,
916                                        bool isTarget) {
917  unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
918  FoldingSetNodeID ID;
919  AddNodeIDNode(ID, Opc, getVTList(VT), (SDOperand*)0, 0);
920  ID.AddInteger(Alignment);
921  ID.AddInteger(Offset);
922  C->AddSelectionDAGCSEId(ID);
923  void *IP = 0;
924  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
925    return SDOperand(E, 0);
926  SDNode *N = new ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment);
927  CSEMap.InsertNode(N, IP);
928  AllNodes.push_back(N);
929  return SDOperand(N, 0);
930}
931
932
933SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
934  FoldingSetNodeID ID;
935  AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), (SDOperand*)0, 0);
936  ID.AddPointer(MBB);
937  void *IP = 0;
938  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
939    return SDOperand(E, 0);
940  SDNode *N = new BasicBlockSDNode(MBB);
941  CSEMap.InsertNode(N, IP);
942  AllNodes.push_back(N);
943  return SDOperand(N, 0);
944}
945
946SDOperand SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) {
947  FoldingSetNodeID ID;
948  AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), (SDOperand*)0, 0);
949  ID.AddInteger(Flags.getRawBits());
950  void *IP = 0;
951  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
952    return SDOperand(E, 0);
953  SDNode *N = new ARG_FLAGSSDNode(Flags);
954  CSEMap.InsertNode(N, IP);
955  AllNodes.push_back(N);
956  return SDOperand(N, 0);
957}
958
959SDOperand SelectionDAG::getValueType(MVT VT) {
960  if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
961    ValueTypeNodes.resize(VT.getSimpleVT()+1);
962
963  SDNode *&N = VT.isExtended() ?
964    ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()];
965
966  if (N) return SDOperand(N, 0);
967  N = new VTSDNode(VT);
968  AllNodes.push_back(N);
969  return SDOperand(N, 0);
970}
971
972SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
973  SDNode *&N = ExternalSymbols[Sym];
974  if (N) return SDOperand(N, 0);
975  N = new ExternalSymbolSDNode(false, Sym, VT);
976  AllNodes.push_back(N);
977  return SDOperand(N, 0);
978}
979
980SDOperand SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) {
981  SDNode *&N = TargetExternalSymbols[Sym];
982  if (N) return SDOperand(N, 0);
983  N = new ExternalSymbolSDNode(true, Sym, VT);
984  AllNodes.push_back(N);
985  return SDOperand(N, 0);
986}
987
988SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) {
989  if ((unsigned)Cond >= CondCodeNodes.size())
990    CondCodeNodes.resize(Cond+1);
991
992  if (CondCodeNodes[Cond] == 0) {
993    CondCodeNodes[Cond] = new CondCodeSDNode(Cond);
994    AllNodes.push_back(CondCodeNodes[Cond]);
995  }
996  return SDOperand(CondCodeNodes[Cond], 0);
997}
998
999SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
1000  FoldingSetNodeID ID;
1001  AddNodeIDNode(ID, ISD::Register, getVTList(VT), (SDOperand*)0, 0);
1002  ID.AddInteger(RegNo);
1003  void *IP = 0;
1004  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1005    return SDOperand(E, 0);
1006  SDNode *N = new RegisterSDNode(RegNo, VT);
1007  CSEMap.InsertNode(N, IP);
1008  AllNodes.push_back(N);
1009  return SDOperand(N, 0);
1010}
1011
1012SDOperand SelectionDAG::getSrcValue(const Value *V) {
1013  assert((!V || isa<PointerType>(V->getType())) &&
1014         "SrcValue is not a pointer?");
1015
1016  FoldingSetNodeID ID;
1017  AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), (SDOperand*)0, 0);
1018  ID.AddPointer(V);
1019
1020  void *IP = 0;
1021  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1022    return SDOperand(E, 0);
1023
1024  SDNode *N = new SrcValueSDNode(V);
1025  CSEMap.InsertNode(N, IP);
1026  AllNodes.push_back(N);
1027  return SDOperand(N, 0);
1028}
1029
1030SDOperand SelectionDAG::getMemOperand(const MachineMemOperand &MO) {
1031  const Value *v = MO.getValue();
1032  assert((!v || isa<PointerType>(v->getType())) &&
1033         "SrcValue is not a pointer?");
1034
1035  FoldingSetNodeID ID;
1036  AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), (SDOperand*)0, 0);
1037  ID.AddPointer(v);
1038  ID.AddInteger(MO.getFlags());
1039  ID.AddInteger(MO.getOffset());
1040  ID.AddInteger(MO.getSize());
1041  ID.AddInteger(MO.getAlignment());
1042
1043  void *IP = 0;
1044  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1045    return SDOperand(E, 0);
1046
1047  SDNode *N = new MemOperandSDNode(MO);
1048  CSEMap.InsertNode(N, IP);
1049  AllNodes.push_back(N);
1050  return SDOperand(N, 0);
1051}
1052
1053/// CreateStackTemporary - Create a stack temporary, suitable for holding the
1054/// specified value type.
1055SDOperand SelectionDAG::CreateStackTemporary(MVT VT) {
1056  MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1057  unsigned ByteSize = VT.getSizeInBits()/8;
1058  const Type *Ty = VT.getTypeForMVT();
1059  unsigned StackAlign = (unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty);
1060  int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
1061  return getFrameIndex(FrameIdx, TLI.getPointerTy());
1062}
1063
1064
1065SDOperand SelectionDAG::FoldSetCC(MVT VT, SDOperand N1,
1066                                  SDOperand N2, ISD::CondCode Cond) {
1067  // These setcc operations always fold.
1068  switch (Cond) {
1069  default: break;
1070  case ISD::SETFALSE:
1071  case ISD::SETFALSE2: return getConstant(0, VT);
1072  case ISD::SETTRUE:
1073  case ISD::SETTRUE2:  return getConstant(1, VT);
1074
1075  case ISD::SETOEQ:
1076  case ISD::SETOGT:
1077  case ISD::SETOGE:
1078  case ISD::SETOLT:
1079  case ISD::SETOLE:
1080  case ISD::SETONE:
1081  case ISD::SETO:
1082  case ISD::SETUO:
1083  case ISD::SETUEQ:
1084  case ISD::SETUNE:
1085    assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1086    break;
1087  }
1088
1089  if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) {
1090    const APInt &C2 = N2C->getAPIntValue();
1091    if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
1092      const APInt &C1 = N1C->getAPIntValue();
1093
1094      switch (Cond) {
1095      default: assert(0 && "Unknown integer setcc!");
1096      case ISD::SETEQ:  return getConstant(C1 == C2, VT);
1097      case ISD::SETNE:  return getConstant(C1 != C2, VT);
1098      case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1099      case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1100      case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1101      case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1102      case ISD::SETLT:  return getConstant(C1.slt(C2), VT);
1103      case ISD::SETGT:  return getConstant(C1.sgt(C2), VT);
1104      case ISD::SETLE:  return getConstant(C1.sle(C2), VT);
1105      case ISD::SETGE:  return getConstant(C1.sge(C2), VT);
1106      }
1107    }
1108  }
1109  if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) {
1110    if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) {
1111      // No compile time operations on this type yet.
1112      if (N1C->getValueType(0) == MVT::ppcf128)
1113        return SDOperand();
1114
1115      APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1116      switch (Cond) {
1117      default: break;
1118      case ISD::SETEQ:  if (R==APFloat::cmpUnordered)
1119                          return getNode(ISD::UNDEF, VT);
1120                        // fall through
1121      case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1122      case ISD::SETNE:  if (R==APFloat::cmpUnordered)
1123                          return getNode(ISD::UNDEF, VT);
1124                        // fall through
1125      case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1126                                           R==APFloat::cmpLessThan, VT);
1127      case ISD::SETLT:  if (R==APFloat::cmpUnordered)
1128                          return getNode(ISD::UNDEF, VT);
1129                        // fall through
1130      case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1131      case ISD::SETGT:  if (R==APFloat::cmpUnordered)
1132                          return getNode(ISD::UNDEF, VT);
1133                        // fall through
1134      case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1135      case ISD::SETLE:  if (R==APFloat::cmpUnordered)
1136                          return getNode(ISD::UNDEF, VT);
1137                        // fall through
1138      case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1139                                           R==APFloat::cmpEqual, VT);
1140      case ISD::SETGE:  if (R==APFloat::cmpUnordered)
1141                          return getNode(ISD::UNDEF, VT);
1142                        // fall through
1143      case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1144                                           R==APFloat::cmpEqual, VT);
1145      case ISD::SETO:   return getConstant(R!=APFloat::cmpUnordered, VT);
1146      case ISD::SETUO:  return getConstant(R==APFloat::cmpUnordered, VT);
1147      case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1148                                           R==APFloat::cmpEqual, VT);
1149      case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1150      case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1151                                           R==APFloat::cmpLessThan, VT);
1152      case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1153                                           R==APFloat::cmpUnordered, VT);
1154      case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1155      case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1156      }
1157    } else {
1158      // Ensure that the constant occurs on the RHS.
1159      return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1160    }
1161  }
1162
1163  // Could not fold it.
1164  return SDOperand();
1165}
1166
1167/// SignBitIsZero - Return true if the sign bit of Op is known to be zero.  We
1168/// use this predicate to simplify operations downstream.
1169bool SelectionDAG::SignBitIsZero(SDOperand Op, unsigned Depth) const {
1170  unsigned BitWidth = Op.getValueSizeInBits();
1171  return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1172}
1173
1174/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero.  We use
1175/// this predicate to simplify operations downstream.  Mask is known to be zero
1176/// for bits that V cannot have.
1177bool SelectionDAG::MaskedValueIsZero(SDOperand Op, const APInt &Mask,
1178                                     unsigned Depth) const {
1179  APInt KnownZero, KnownOne;
1180  ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1181  assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1182  return (KnownZero & Mask) == Mask;
1183}
1184
1185/// ComputeMaskedBits - Determine which of the bits specified in Mask are
1186/// known to be either zero or one and return them in the KnownZero/KnownOne
1187/// bitsets.  This code only analyzes bits in Mask, in order to short-circuit
1188/// processing.
1189void SelectionDAG::ComputeMaskedBits(SDOperand Op, const APInt &Mask,
1190                                     APInt &KnownZero, APInt &KnownOne,
1191                                     unsigned Depth) const {
1192  unsigned BitWidth = Mask.getBitWidth();
1193  assert(BitWidth == Op.getValueType().getSizeInBits() &&
1194         "Mask size mismatches value type size!");
1195
1196  KnownZero = KnownOne = APInt(BitWidth, 0);   // Don't know anything.
1197  if (Depth == 6 || Mask == 0)
1198    return;  // Limit search depth.
1199
1200  APInt KnownZero2, KnownOne2;
1201
1202  switch (Op.getOpcode()) {
1203  case ISD::Constant:
1204    // We know all of the bits for a constant!
1205    KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask;
1206    KnownZero = ~KnownOne & Mask;
1207    return;
1208  case ISD::AND:
1209    // If either the LHS or the RHS are Zero, the result is zero.
1210    ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1211    ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero,
1212                      KnownZero2, KnownOne2, Depth+1);
1213    assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1214    assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1215
1216    // Output known-1 bits are only known if set in both the LHS & RHS.
1217    KnownOne &= KnownOne2;
1218    // Output known-0 are known to be clear if zero in either the LHS | RHS.
1219    KnownZero |= KnownZero2;
1220    return;
1221  case ISD::OR:
1222    ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1223    ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne,
1224                      KnownZero2, KnownOne2, Depth+1);
1225    assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1226    assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1227
1228    // Output known-0 bits are only known if clear in both the LHS & RHS.
1229    KnownZero &= KnownZero2;
1230    // Output known-1 are known to be set if set in either the LHS | RHS.
1231    KnownOne |= KnownOne2;
1232    return;
1233  case ISD::XOR: {
1234    ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1235    ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1);
1236    assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1237    assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1238
1239    // Output known-0 bits are known if clear or set in both the LHS & RHS.
1240    APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1241    // Output known-1 are known to be set if set in only one of the LHS, RHS.
1242    KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1243    KnownZero = KnownZeroOut;
1244    return;
1245  }
1246  case ISD::MUL: {
1247    APInt Mask2 = APInt::getAllOnesValue(BitWidth);
1248    ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1);
1249    ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1250    assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1251    assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1252
1253    // If low bits are zero in either operand, output low known-0 bits.
1254    // Also compute a conserative estimate for high known-0 bits.
1255    // More trickiness is possible, but this is sufficient for the
1256    // interesting case of alignment computation.
1257    KnownOne.clear();
1258    unsigned TrailZ = KnownZero.countTrailingOnes() +
1259                      KnownZero2.countTrailingOnes();
1260    unsigned LeadZ =  std::max(KnownZero.countLeadingOnes() +
1261                               KnownZero2.countLeadingOnes(),
1262                               BitWidth) - BitWidth;
1263
1264    TrailZ = std::min(TrailZ, BitWidth);
1265    LeadZ = std::min(LeadZ, BitWidth);
1266    KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1267                APInt::getHighBitsSet(BitWidth, LeadZ);
1268    KnownZero &= Mask;
1269    return;
1270  }
1271  case ISD::UDIV: {
1272    // For the purposes of computing leading zeros we can conservatively
1273    // treat a udiv as a logical right shift by the power of 2 known to
1274    // be less than the denominator.
1275    APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1276    ComputeMaskedBits(Op.getOperand(0),
1277                      AllOnes, KnownZero2, KnownOne2, Depth+1);
1278    unsigned LeadZ = KnownZero2.countLeadingOnes();
1279
1280    KnownOne2.clear();
1281    KnownZero2.clear();
1282    ComputeMaskedBits(Op.getOperand(1),
1283                      AllOnes, KnownZero2, KnownOne2, Depth+1);
1284    unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1285    if (RHSUnknownLeadingOnes != BitWidth)
1286      LeadZ = std::min(BitWidth,
1287                       LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1288
1289    KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask;
1290    return;
1291  }
1292  case ISD::SELECT:
1293    ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1);
1294    ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1);
1295    assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1296    assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1297
1298    // Only known if known in both the LHS and RHS.
1299    KnownOne &= KnownOne2;
1300    KnownZero &= KnownZero2;
1301    return;
1302  case ISD::SELECT_CC:
1303    ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1);
1304    ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1);
1305    assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1306    assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1307
1308    // Only known if known in both the LHS and RHS.
1309    KnownOne &= KnownOne2;
1310    KnownZero &= KnownZero2;
1311    return;
1312  case ISD::SETCC:
1313    // If we know the result of a setcc has the top bits zero, use this info.
1314    if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult &&
1315        BitWidth > 1)
1316      KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1317    return;
1318  case ISD::SHL:
1319    // (shl X, C1) & C2 == 0   iff   (X & C2 >>u C1) == 0
1320    if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1321      unsigned ShAmt = SA->getValue();
1322
1323      // If the shift count is an invalid immediate, don't do anything.
1324      if (ShAmt >= BitWidth)
1325        return;
1326
1327      ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
1328                        KnownZero, KnownOne, Depth+1);
1329      assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1330      KnownZero <<= ShAmt;
1331      KnownOne  <<= ShAmt;
1332      // low bits known zero.
1333      KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1334    }
1335    return;
1336  case ISD::SRL:
1337    // (ushr X, C1) & C2 == 0   iff  (-1 >> C1) & C2 == 0
1338    if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1339      unsigned ShAmt = SA->getValue();
1340
1341      // If the shift count is an invalid immediate, don't do anything.
1342      if (ShAmt >= BitWidth)
1343        return;
1344
1345      ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
1346                        KnownZero, KnownOne, Depth+1);
1347      assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1348      KnownZero = KnownZero.lshr(ShAmt);
1349      KnownOne  = KnownOne.lshr(ShAmt);
1350
1351      APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1352      KnownZero |= HighBits;  // High bits known zero.
1353    }
1354    return;
1355  case ISD::SRA:
1356    if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1357      unsigned ShAmt = SA->getValue();
1358
1359      // If the shift count is an invalid immediate, don't do anything.
1360      if (ShAmt >= BitWidth)
1361        return;
1362
1363      APInt InDemandedMask = (Mask << ShAmt);
1364      // If any of the demanded bits are produced by the sign extension, we also
1365      // demand the input sign bit.
1366      APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask;
1367      if (HighBits.getBoolValue())
1368        InDemandedMask |= APInt::getSignBit(BitWidth);
1369
1370      ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne,
1371                        Depth+1);
1372      assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1373      KnownZero = KnownZero.lshr(ShAmt);
1374      KnownOne  = KnownOne.lshr(ShAmt);
1375
1376      // Handle the sign bits.
1377      APInt SignBit = APInt::getSignBit(BitWidth);
1378      SignBit = SignBit.lshr(ShAmt);  // Adjust to where it is now in the mask.
1379
1380      if (KnownZero.intersects(SignBit)) {
1381        KnownZero |= HighBits;  // New bits are known zero.
1382      } else if (KnownOne.intersects(SignBit)) {
1383        KnownOne  |= HighBits;  // New bits are known one.
1384      }
1385    }
1386    return;
1387  case ISD::SIGN_EXTEND_INREG: {
1388    MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1389    unsigned EBits = EVT.getSizeInBits();
1390
1391    // Sign extension.  Compute the demanded bits in the result that are not
1392    // present in the input.
1393    APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask;
1394
1395    APInt InSignBit = APInt::getSignBit(EBits);
1396    APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits);
1397
1398    // If the sign extended bits are demanded, we know that the sign
1399    // bit is demanded.
1400    InSignBit.zext(BitWidth);
1401    if (NewBits.getBoolValue())
1402      InputDemandedBits |= InSignBit;
1403
1404    ComputeMaskedBits(Op.getOperand(0), InputDemandedBits,
1405                      KnownZero, KnownOne, Depth+1);
1406    assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1407
1408    // If the sign bit of the input is known set or clear, then we know the
1409    // top bits of the result.
1410    if (KnownZero.intersects(InSignBit)) {         // Input sign bit known clear
1411      KnownZero |= NewBits;
1412      KnownOne  &= ~NewBits;
1413    } else if (KnownOne.intersects(InSignBit)) {   // Input sign bit known set
1414      KnownOne  |= NewBits;
1415      KnownZero &= ~NewBits;
1416    } else {                              // Input sign bit unknown
1417      KnownZero &= ~NewBits;
1418      KnownOne  &= ~NewBits;
1419    }
1420    return;
1421  }
1422  case ISD::CTTZ:
1423  case ISD::CTLZ:
1424  case ISD::CTPOP: {
1425    unsigned LowBits = Log2_32(BitWidth)+1;
1426    KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1427    KnownOne.clear();
1428    return;
1429  }
1430  case ISD::LOAD: {
1431    if (ISD::isZEXTLoad(Op.Val)) {
1432      LoadSDNode *LD = cast<LoadSDNode>(Op);
1433      MVT VT = LD->getMemoryVT();
1434      unsigned MemBits = VT.getSizeInBits();
1435      KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
1436    }
1437    return;
1438  }
1439  case ISD::ZERO_EXTEND: {
1440    MVT InVT = Op.getOperand(0).getValueType();
1441    unsigned InBits = InVT.getSizeInBits();
1442    APInt NewBits   = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1443    APInt InMask    = Mask;
1444    InMask.trunc(InBits);
1445    KnownZero.trunc(InBits);
1446    KnownOne.trunc(InBits);
1447    ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1448    KnownZero.zext(BitWidth);
1449    KnownOne.zext(BitWidth);
1450    KnownZero |= NewBits;
1451    return;
1452  }
1453  case ISD::SIGN_EXTEND: {
1454    MVT InVT = Op.getOperand(0).getValueType();
1455    unsigned InBits = InVT.getSizeInBits();
1456    APInt InSignBit = APInt::getSignBit(InBits);
1457    APInt NewBits   = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
1458    APInt InMask = Mask;
1459    InMask.trunc(InBits);
1460
1461    // If any of the sign extended bits are demanded, we know that the sign
1462    // bit is demanded. Temporarily set this bit in the mask for our callee.
1463    if (NewBits.getBoolValue())
1464      InMask |= InSignBit;
1465
1466    KnownZero.trunc(InBits);
1467    KnownOne.trunc(InBits);
1468    ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1469
1470    // Note if the sign bit is known to be zero or one.
1471    bool SignBitKnownZero = KnownZero.isNegative();
1472    bool SignBitKnownOne  = KnownOne.isNegative();
1473    assert(!(SignBitKnownZero && SignBitKnownOne) &&
1474           "Sign bit can't be known to be both zero and one!");
1475
1476    // If the sign bit wasn't actually demanded by our caller, we don't
1477    // want it set in the KnownZero and KnownOne result values. Reset the
1478    // mask and reapply it to the result values.
1479    InMask = Mask;
1480    InMask.trunc(InBits);
1481    KnownZero &= InMask;
1482    KnownOne  &= InMask;
1483
1484    KnownZero.zext(BitWidth);
1485    KnownOne.zext(BitWidth);
1486
1487    // If the sign bit is known zero or one, the top bits match.
1488    if (SignBitKnownZero)
1489      KnownZero |= NewBits;
1490    else if (SignBitKnownOne)
1491      KnownOne  |= NewBits;
1492    return;
1493  }
1494  case ISD::ANY_EXTEND: {
1495    MVT InVT = Op.getOperand(0).getValueType();
1496    unsigned InBits = InVT.getSizeInBits();
1497    APInt InMask = Mask;
1498    InMask.trunc(InBits);
1499    KnownZero.trunc(InBits);
1500    KnownOne.trunc(InBits);
1501    ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1502    KnownZero.zext(BitWidth);
1503    KnownOne.zext(BitWidth);
1504    return;
1505  }
1506  case ISD::TRUNCATE: {
1507    MVT InVT = Op.getOperand(0).getValueType();
1508    unsigned InBits = InVT.getSizeInBits();
1509    APInt InMask = Mask;
1510    InMask.zext(InBits);
1511    KnownZero.zext(InBits);
1512    KnownOne.zext(InBits);
1513    ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1);
1514    assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1515    KnownZero.trunc(BitWidth);
1516    KnownOne.trunc(BitWidth);
1517    break;
1518  }
1519  case ISD::AssertZext: {
1520    MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1521    APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1522    ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
1523                      KnownOne, Depth+1);
1524    KnownZero |= (~InMask) & Mask;
1525    return;
1526  }
1527  case ISD::FGETSIGN:
1528    // All bits are zero except the low bit.
1529    KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1530    return;
1531
1532  case ISD::SUB: {
1533    if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1534      // We know that the top bits of C-X are clear if X contains less bits
1535      // than C (i.e. no wrap-around can happen).  For example, 20-X is
1536      // positive if we can prove that X is >= 0 and < 16.
1537      if (CLHS->getAPIntValue().isNonNegative()) {
1538        unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1539        // NLZ can't be BitWidth with no sign bit
1540        APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1541        ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2,
1542                          Depth+1);
1543
1544        // If all of the MaskV bits are known to be zero, then we know the
1545        // output top bits are zero, because we now know that the output is
1546        // from [0-C].
1547        if ((KnownZero2 & MaskV) == MaskV) {
1548          unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1549          // Top bits known zero.
1550          KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask;
1551        }
1552      }
1553    }
1554  }
1555  // fall through
1556  case ISD::ADD: {
1557    // Output known-0 bits are known if clear or set in both the low clear bits
1558    // common to both LHS & RHS.  For example, 8+(X<<3) is known to have the
1559    // low 3 bits clear.
1560    APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes());
1561    ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1);
1562    assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1563    unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1564
1565    ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1);
1566    assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1567    KnownZeroOut = std::min(KnownZeroOut,
1568                            KnownZero2.countTrailingOnes());
1569
1570    KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
1571    return;
1572  }
1573  case ISD::SREM:
1574    if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1575      APInt RA = Rem->getAPIntValue();
1576      if (RA.isPowerOf2() || (-RA).isPowerOf2()) {
1577        APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA;
1578        APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
1579        ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1);
1580
1581        // The sign of a remainder is equal to the sign of the first
1582        // operand (zero being positive).
1583        if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
1584          KnownZero2 |= ~LowBits;
1585        else if (KnownOne2[BitWidth-1])
1586          KnownOne2 |= ~LowBits;
1587
1588        KnownZero |= KnownZero2 & Mask;
1589        KnownOne |= KnownOne2 & Mask;
1590
1591        assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1592      }
1593    }
1594    return;
1595  case ISD::UREM: {
1596    if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1597      APInt RA = Rem->getAPIntValue();
1598      if (RA.isPowerOf2()) {
1599        APInt LowBits = (RA - 1);
1600        APInt Mask2 = LowBits & Mask;
1601        KnownZero |= ~LowBits & Mask;
1602        ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1);
1603        assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
1604        break;
1605      }
1606    }
1607
1608    // Since the result is less than or equal to either operand, any leading
1609    // zero bits in either operand must also exist in the result.
1610    APInt AllOnes = APInt::getAllOnesValue(BitWidth);
1611    ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne,
1612                      Depth+1);
1613    ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2,
1614                      Depth+1);
1615
1616    uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
1617                                KnownZero2.countLeadingOnes());
1618    KnownOne.clear();
1619    KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask;
1620    return;
1621  }
1622  default:
1623    // Allow the target to implement this method for its nodes.
1624    if (Op.getOpcode() >= ISD::BUILTIN_OP_END) {
1625  case ISD::INTRINSIC_WO_CHAIN:
1626  case ISD::INTRINSIC_W_CHAIN:
1627  case ISD::INTRINSIC_VOID:
1628      TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this);
1629    }
1630    return;
1631  }
1632}
1633
1634/// ComputeNumSignBits - Return the number of times the sign bit of the
1635/// register is replicated into the other bits.  We know that at least 1 bit
1636/// is always equal to the sign bit (itself), but other cases can give us
1637/// information.  For example, immediately after an "SRA X, 2", we know that
1638/// the top 3 bits are all equal to each other, so we return 3.
1639unsigned SelectionDAG::ComputeNumSignBits(SDOperand Op, unsigned Depth) const{
1640  MVT VT = Op.getValueType();
1641  assert(VT.isInteger() && "Invalid VT!");
1642  unsigned VTBits = VT.getSizeInBits();
1643  unsigned Tmp, Tmp2;
1644  unsigned FirstAnswer = 1;
1645
1646  if (Depth == 6)
1647    return 1;  // Limit search depth.
1648
1649  switch (Op.getOpcode()) {
1650  default: break;
1651  case ISD::AssertSext:
1652    Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1653    return VTBits-Tmp+1;
1654  case ISD::AssertZext:
1655    Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1656    return VTBits-Tmp;
1657
1658  case ISD::Constant: {
1659    const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
1660    // If negative, return # leading ones.
1661    if (Val.isNegative())
1662      return Val.countLeadingOnes();
1663
1664    // Return # leading zeros.
1665    return Val.countLeadingZeros();
1666  }
1667
1668  case ISD::SIGN_EXTEND:
1669    Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits();
1670    return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
1671
1672  case ISD::SIGN_EXTEND_INREG:
1673    // Max of the input and what this extends.
1674    Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
1675    Tmp = VTBits-Tmp+1;
1676
1677    Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1678    return std::max(Tmp, Tmp2);
1679
1680  case ISD::SRA:
1681    Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1682    // SRA X, C   -> adds C sign bits.
1683    if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1684      Tmp += C->getValue();
1685      if (Tmp > VTBits) Tmp = VTBits;
1686    }
1687    return Tmp;
1688  case ISD::SHL:
1689    if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1690      // shl destroys sign bits.
1691      Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1692      if (C->getValue() >= VTBits ||      // Bad shift.
1693          C->getValue() >= Tmp) break;    // Shifted all sign bits out.
1694      return Tmp - C->getValue();
1695    }
1696    break;
1697  case ISD::AND:
1698  case ISD::OR:
1699  case ISD::XOR:    // NOT is handled here.
1700    // Logical binary ops preserve the number of sign bits at the worst.
1701    Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1702    if (Tmp != 1) {
1703      Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1704      FirstAnswer = std::min(Tmp, Tmp2);
1705      // We computed what we know about the sign bits as our first
1706      // answer. Now proceed to the generic code that uses
1707      // ComputeMaskedBits, and pick whichever answer is better.
1708    }
1709    break;
1710
1711  case ISD::SELECT:
1712    Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1713    if (Tmp == 1) return 1;  // Early out.
1714    Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
1715    return std::min(Tmp, Tmp2);
1716
1717  case ISD::SETCC:
1718    // If setcc returns 0/-1, all bits are sign bits.
1719    if (TLI.getSetCCResultContents() ==
1720        TargetLowering::ZeroOrNegativeOneSetCCResult)
1721      return VTBits;
1722    break;
1723  case ISD::ROTL:
1724  case ISD::ROTR:
1725    if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1726      unsigned RotAmt = C->getValue() & (VTBits-1);
1727
1728      // Handle rotate right by N like a rotate left by 32-N.
1729      if (Op.getOpcode() == ISD::ROTR)
1730        RotAmt = (VTBits-RotAmt) & (VTBits-1);
1731
1732      // If we aren't rotating out all of the known-in sign bits, return the
1733      // number that are left.  This handles rotl(sext(x), 1) for example.
1734      Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1735      if (Tmp > RotAmt+1) return Tmp-RotAmt;
1736    }
1737    break;
1738  case ISD::ADD:
1739    // Add can have at most one carry bit.  Thus we know that the output
1740    // is, at worst, one more bit than the inputs.
1741    Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1742    if (Tmp == 1) return 1;  // Early out.
1743
1744    // Special case decrementing a value (ADD X, -1):
1745    if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1746      if (CRHS->isAllOnesValue()) {
1747        APInt KnownZero, KnownOne;
1748        APInt Mask = APInt::getAllOnesValue(VTBits);
1749        ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1);
1750
1751        // If the input is known to be 0 or 1, the output is 0/-1, which is all
1752        // sign bits set.
1753        if ((KnownZero | APInt(VTBits, 1)) == Mask)
1754          return VTBits;
1755
1756        // If we are subtracting one from a positive number, there is no carry
1757        // out of the result.
1758        if (KnownZero.isNegative())
1759          return Tmp;
1760      }
1761
1762    Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1763    if (Tmp2 == 1) return 1;
1764      return std::min(Tmp, Tmp2)-1;
1765    break;
1766
1767  case ISD::SUB:
1768    Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
1769    if (Tmp2 == 1) return 1;
1770
1771    // Handle NEG.
1772    if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
1773      if (CLHS->isNullValue()) {
1774        APInt KnownZero, KnownOne;
1775        APInt Mask = APInt::getAllOnesValue(VTBits);
1776        ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1);
1777        // If the input is known to be 0 or 1, the output is 0/-1, which is all
1778        // sign bits set.
1779        if ((KnownZero | APInt(VTBits, 1)) == Mask)
1780          return VTBits;
1781
1782        // If the input is known to be positive (the sign bit is known clear),
1783        // the output of the NEG has the same number of sign bits as the input.
1784        if (KnownZero.isNegative())
1785          return Tmp2;
1786
1787        // Otherwise, we treat this like a SUB.
1788      }
1789
1790    // Sub can have at most one carry bit.  Thus we know that the output
1791    // is, at worst, one more bit than the inputs.
1792    Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
1793    if (Tmp == 1) return 1;  // Early out.
1794      return std::min(Tmp, Tmp2)-1;
1795    break;
1796  case ISD::TRUNCATE:
1797    // FIXME: it's tricky to do anything useful for this, but it is an important
1798    // case for targets like X86.
1799    break;
1800  }
1801
1802  // Handle LOADX separately here. EXTLOAD case will fallthrough.
1803  if (Op.getOpcode() == ISD::LOAD) {
1804    LoadSDNode *LD = cast<LoadSDNode>(Op);
1805    unsigned ExtType = LD->getExtensionType();
1806    switch (ExtType) {
1807    default: break;
1808    case ISD::SEXTLOAD:    // '17' bits known
1809      Tmp = LD->getMemoryVT().getSizeInBits();
1810      return VTBits-Tmp+1;
1811    case ISD::ZEXTLOAD:    // '16' bits known
1812      Tmp = LD->getMemoryVT().getSizeInBits();
1813      return VTBits-Tmp;
1814    }
1815  }
1816
1817  // Allow the target to implement this method for its nodes.
1818  if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
1819      Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
1820      Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1821      Op.getOpcode() == ISD::INTRINSIC_VOID) {
1822    unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
1823    if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
1824  }
1825
1826  // Finally, if we can prove that the top bits of the result are 0's or 1's,
1827  // use this information.
1828  APInt KnownZero, KnownOne;
1829  APInt Mask = APInt::getAllOnesValue(VTBits);
1830  ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth);
1831
1832  if (KnownZero.isNegative()) {        // sign bit is 0
1833    Mask = KnownZero;
1834  } else if (KnownOne.isNegative()) {  // sign bit is 1;
1835    Mask = KnownOne;
1836  } else {
1837    // Nothing known.
1838    return FirstAnswer;
1839  }
1840
1841  // Okay, we know that the sign bit in Mask is set.  Use CLZ to determine
1842  // the number of identical bits in the top of the input value.
1843  Mask = ~Mask;
1844  Mask <<= Mask.getBitWidth()-VTBits;
1845  // Return # leading zeros.  We use 'min' here in case Val was zero before
1846  // shifting.  We don't want to return '64' as for an i32 "0".
1847  return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
1848}
1849
1850
1851bool SelectionDAG::isVerifiedDebugInfoDesc(SDOperand Op) const {
1852  GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
1853  if (!GA) return false;
1854  GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal());
1855  if (!GV) return false;
1856  MachineModuleInfo *MMI = getMachineModuleInfo();
1857  return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV);
1858}
1859
1860
1861/// getShuffleScalarElt - Returns the scalar element that will make up the ith
1862/// element of the result of the vector shuffle.
1863SDOperand SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) {
1864  MVT VT = N->getValueType(0);
1865  SDOperand PermMask = N->getOperand(2);
1866  SDOperand Idx = PermMask.getOperand(i);
1867  if (Idx.getOpcode() == ISD::UNDEF)
1868    return getNode(ISD::UNDEF, VT.getVectorElementType());
1869  unsigned Index = cast<ConstantSDNode>(Idx)->getValue();
1870  unsigned NumElems = PermMask.getNumOperands();
1871  SDOperand V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1);
1872  Index %= NumElems;
1873
1874  if (V.getOpcode() == ISD::BIT_CONVERT) {
1875    V = V.getOperand(0);
1876    if (V.getValueType().getVectorNumElements() != NumElems)
1877      return SDOperand();
1878  }
1879  if (V.getOpcode() == ISD::SCALAR_TO_VECTOR)
1880    return (Index == 0) ? V.getOperand(0)
1881                      : getNode(ISD::UNDEF, VT.getVectorElementType());
1882  if (V.getOpcode() == ISD::BUILD_VECTOR)
1883    return V.getOperand(Index);
1884  if (V.getOpcode() == ISD::VECTOR_SHUFFLE)
1885    return getShuffleScalarElt(V.Val, Index);
1886  return SDOperand();
1887}
1888
1889
1890/// getNode - Gets or creates the specified node.
1891///
1892SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT) {
1893  FoldingSetNodeID ID;
1894  AddNodeIDNode(ID, Opcode, getVTList(VT), (SDOperand*)0, 0);
1895  void *IP = 0;
1896  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1897    return SDOperand(E, 0);
1898  SDNode *N = new SDNode(Opcode, SDNode::getSDVTList(VT));
1899  CSEMap.InsertNode(N, IP);
1900
1901  AllNodes.push_back(N);
1902  return SDOperand(N, 0);
1903}
1904
1905SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT, SDOperand Operand) {
1906  // Constant fold unary operations with an integer constant operand.
1907  if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) {
1908    const APInt &Val = C->getAPIntValue();
1909    unsigned BitWidth = VT.getSizeInBits();
1910    switch (Opcode) {
1911    default: break;
1912    case ISD::SIGN_EXTEND:
1913      return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT);
1914    case ISD::ANY_EXTEND:
1915    case ISD::ZERO_EXTEND:
1916    case ISD::TRUNCATE:
1917      return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT);
1918    case ISD::UINT_TO_FP:
1919    case ISD::SINT_TO_FP: {
1920      const uint64_t zero[] = {0, 0};
1921      // No compile time operations on this type.
1922      if (VT==MVT::ppcf128)
1923        break;
1924      APFloat apf = APFloat(APInt(BitWidth, 2, zero));
1925      (void)apf.convertFromAPInt(Val,
1926                                 Opcode==ISD::SINT_TO_FP,
1927                                 APFloat::rmNearestTiesToEven);
1928      return getConstantFP(apf, VT);
1929    }
1930    case ISD::BIT_CONVERT:
1931      if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
1932        return getConstantFP(Val.bitsToFloat(), VT);
1933      else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
1934        return getConstantFP(Val.bitsToDouble(), VT);
1935      break;
1936    case ISD::BSWAP:
1937      return getConstant(Val.byteSwap(), VT);
1938    case ISD::CTPOP:
1939      return getConstant(Val.countPopulation(), VT);
1940    case ISD::CTLZ:
1941      return getConstant(Val.countLeadingZeros(), VT);
1942    case ISD::CTTZ:
1943      return getConstant(Val.countTrailingZeros(), VT);
1944    }
1945  }
1946
1947  // Constant fold unary operations with a floating point constant operand.
1948  if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) {
1949    APFloat V = C->getValueAPF();    // make copy
1950    if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
1951      switch (Opcode) {
1952      case ISD::FNEG:
1953        V.changeSign();
1954        return getConstantFP(V, VT);
1955      case ISD::FABS:
1956        V.clearSign();
1957        return getConstantFP(V, VT);
1958      case ISD::FP_ROUND:
1959      case ISD::FP_EXTEND:
1960        // This can return overflow, underflow, or inexact; we don't care.
1961        // FIXME need to be more flexible about rounding mode.
1962        (void)V.convert(*MVTToAPFloatSemantics(VT),
1963                        APFloat::rmNearestTiesToEven);
1964        return getConstantFP(V, VT);
1965      case ISD::FP_TO_SINT:
1966      case ISD::FP_TO_UINT: {
1967        integerPart x;
1968        assert(integerPartWidth >= 64);
1969        // FIXME need to be more flexible about rounding mode.
1970        APFloat::opStatus s = V.convertToInteger(&x, 64U,
1971                              Opcode==ISD::FP_TO_SINT,
1972                              APFloat::rmTowardZero);
1973        if (s==APFloat::opInvalidOp)     // inexact is OK, in fact usual
1974          break;
1975        return getConstant(x, VT);
1976      }
1977      case ISD::BIT_CONVERT:
1978        if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
1979          return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT);
1980        else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
1981          return getConstant(V.convertToAPInt().getZExtValue(), VT);
1982        break;
1983      }
1984    }
1985  }
1986
1987  unsigned OpOpcode = Operand.Val->getOpcode();
1988  switch (Opcode) {
1989  case ISD::TokenFactor:
1990  case ISD::MERGE_VALUES:
1991    return Operand;         // Factor or merge of one node?  No need.
1992  case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node");
1993  case ISD::FP_EXTEND:
1994    assert(VT.isFloatingPoint() &&
1995           Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
1996    if (Operand.getValueType() == VT) return Operand;  // noop conversion.
1997    if (Operand.getOpcode() == ISD::UNDEF)
1998      return getNode(ISD::UNDEF, VT);
1999    break;
2000  case ISD::SIGN_EXTEND:
2001    assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2002           "Invalid SIGN_EXTEND!");
2003    if (Operand.getValueType() == VT) return Operand;   // noop extension
2004    assert(Operand.getValueType().bitsLT(VT)
2005           && "Invalid sext node, dst < src!");
2006    if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2007      return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2008    break;
2009  case ISD::ZERO_EXTEND:
2010    assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2011           "Invalid ZERO_EXTEND!");
2012    if (Operand.getValueType() == VT) return Operand;   // noop extension
2013    assert(Operand.getValueType().bitsLT(VT)
2014           && "Invalid zext node, dst < src!");
2015    if (OpOpcode == ISD::ZERO_EXTEND)   // (zext (zext x)) -> (zext x)
2016      return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0));
2017    break;
2018  case ISD::ANY_EXTEND:
2019    assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2020           "Invalid ANY_EXTEND!");
2021    if (Operand.getValueType() == VT) return Operand;   // noop extension
2022    assert(Operand.getValueType().bitsLT(VT)
2023           && "Invalid anyext node, dst < src!");
2024    if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND)
2025      // (ext (zext x)) -> (zext x)  and  (ext (sext x)) -> (sext x)
2026      return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2027    break;
2028  case ISD::TRUNCATE:
2029    assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2030           "Invalid TRUNCATE!");
2031    if (Operand.getValueType() == VT) return Operand;   // noop truncate
2032    assert(Operand.getValueType().bitsGT(VT)
2033           && "Invalid truncate node, src < dst!");
2034    if (OpOpcode == ISD::TRUNCATE)
2035      return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
2036    else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2037             OpOpcode == ISD::ANY_EXTEND) {
2038      // If the source is smaller than the dest, we still need an extend.
2039      if (Operand.Val->getOperand(0).getValueType().bitsLT(VT))
2040        return getNode(OpOpcode, VT, Operand.Val->getOperand(0));
2041      else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT))
2042        return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0));
2043      else
2044        return Operand.Val->getOperand(0);
2045    }
2046    break;
2047  case ISD::BIT_CONVERT:
2048    // Basic sanity checking.
2049    assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2050           && "Cannot BIT_CONVERT between types of different sizes!");
2051    if (VT == Operand.getValueType()) return Operand;  // noop conversion.
2052    if (OpOpcode == ISD::BIT_CONVERT)  // bitconv(bitconv(x)) -> bitconv(x)
2053      return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0));
2054    if (OpOpcode == ISD::UNDEF)
2055      return getNode(ISD::UNDEF, VT);
2056    break;
2057  case ISD::SCALAR_TO_VECTOR:
2058    assert(VT.isVector() && !Operand.getValueType().isVector() &&
2059           VT.getVectorElementType() == Operand.getValueType() &&
2060           "Illegal SCALAR_TO_VECTOR node!");
2061    if (OpOpcode == ISD::UNDEF)
2062      return getNode(ISD::UNDEF, VT);
2063    // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2064    if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2065        isa<ConstantSDNode>(Operand.getOperand(1)) &&
2066        Operand.getConstantOperandVal(1) == 0 &&
2067        Operand.getOperand(0).getValueType() == VT)
2068      return Operand.getOperand(0);
2069    break;
2070  case ISD::FNEG:
2071    if (OpOpcode == ISD::FSUB)   // -(X-Y) -> (Y-X)
2072      return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1),
2073                     Operand.Val->getOperand(0));
2074    if (OpOpcode == ISD::FNEG)  // --X -> X
2075      return Operand.Val->getOperand(0);
2076    break;
2077  case ISD::FABS:
2078    if (OpOpcode == ISD::FNEG)  // abs(-X) -> abs(X)
2079      return getNode(ISD::FABS, VT, Operand.Val->getOperand(0));
2080    break;
2081  }
2082
2083  SDNode *N;
2084  SDVTList VTs = getVTList(VT);
2085  if (VT != MVT::Flag) { // Don't CSE flag producing nodes
2086    FoldingSetNodeID ID;
2087    SDOperand Ops[1] = { Operand };
2088    AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2089    void *IP = 0;
2090    if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2091      return SDOperand(E, 0);
2092    N = new UnarySDNode(Opcode, VTs, Operand);
2093    CSEMap.InsertNode(N, IP);
2094  } else {
2095    N = new UnarySDNode(Opcode, VTs, Operand);
2096  }
2097  AllNodes.push_back(N);
2098  return SDOperand(N, 0);
2099}
2100
2101
2102
2103SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
2104                                SDOperand N1, SDOperand N2) {
2105  ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
2106  ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
2107  switch (Opcode) {
2108  default: break;
2109  case ISD::TokenFactor:
2110    assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2111           N2.getValueType() == MVT::Other && "Invalid token factor!");
2112    // Fold trivial token factors.
2113    if (N1.getOpcode() == ISD::EntryToken) return N2;
2114    if (N2.getOpcode() == ISD::EntryToken) return N1;
2115    break;
2116  case ISD::AND:
2117    assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2118           N1.getValueType() == VT && "Binary operator types must match!");
2119    // (X & 0) -> 0.  This commonly occurs when legalizing i64 values, so it's
2120    // worth handling here.
2121    if (N2C && N2C->isNullValue())
2122      return N2;
2123    if (N2C && N2C->isAllOnesValue())  // X & -1 -> X
2124      return N1;
2125    break;
2126  case ISD::OR:
2127  case ISD::XOR:
2128  case ISD::ADD:
2129  case ISD::SUB:
2130    assert(VT.isInteger() && N1.getValueType() == N2.getValueType() &&
2131           N1.getValueType() == VT && "Binary operator types must match!");
2132    // (X ^|+- 0) -> X.  This commonly occurs when legalizing i64 values, so
2133    // it's worth handling here.
2134    if (N2C && N2C->isNullValue())
2135      return N1;
2136    break;
2137  case ISD::UDIV:
2138  case ISD::UREM:
2139  case ISD::MULHU:
2140  case ISD::MULHS:
2141    assert(VT.isInteger() && "This operator does not apply to FP types!");
2142    // fall through
2143  case ISD::MUL:
2144  case ISD::SDIV:
2145  case ISD::SREM:
2146  case ISD::FADD:
2147  case ISD::FSUB:
2148  case ISD::FMUL:
2149  case ISD::FDIV:
2150  case ISD::FREM:
2151    assert(N1.getValueType() == N2.getValueType() &&
2152           N1.getValueType() == VT && "Binary operator types must match!");
2153    break;
2154  case ISD::FCOPYSIGN:   // N1 and result must match.  N1/N2 need not match.
2155    assert(N1.getValueType() == VT &&
2156           N1.getValueType().isFloatingPoint() &&
2157           N2.getValueType().isFloatingPoint() &&
2158           "Invalid FCOPYSIGN!");
2159    break;
2160  case ISD::SHL:
2161  case ISD::SRA:
2162  case ISD::SRL:
2163  case ISD::ROTL:
2164  case ISD::ROTR:
2165    assert(VT == N1.getValueType() &&
2166           "Shift operators return type must be the same as their first arg");
2167    assert(VT.isInteger() && N2.getValueType().isInteger() &&
2168           VT != MVT::i1 && "Shifts only work on integers");
2169    break;
2170  case ISD::FP_ROUND_INREG: {
2171    MVT EVT = cast<VTSDNode>(N2)->getVT();
2172    assert(VT == N1.getValueType() && "Not an inreg round!");
2173    assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2174           "Cannot FP_ROUND_INREG integer types");
2175    assert(EVT.bitsLE(VT) && "Not rounding down!");
2176    if (cast<VTSDNode>(N2)->getVT() == VT) return N1;  // Not actually rounding.
2177    break;
2178  }
2179  case ISD::FP_ROUND:
2180    assert(VT.isFloatingPoint() &&
2181           N1.getValueType().isFloatingPoint() &&
2182           VT.bitsLE(N1.getValueType()) &&
2183           isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2184    if (N1.getValueType() == VT) return N1;  // noop conversion.
2185    break;
2186  case ISD::AssertSext:
2187  case ISD::AssertZext: {
2188    MVT EVT = cast<VTSDNode>(N2)->getVT();
2189    assert(VT == N1.getValueType() && "Not an inreg extend!");
2190    assert(VT.isInteger() && EVT.isInteger() &&
2191           "Cannot *_EXTEND_INREG FP types");
2192    assert(EVT.bitsLE(VT) && "Not extending!");
2193    if (VT == EVT) return N1; // noop assertion.
2194    break;
2195  }
2196  case ISD::SIGN_EXTEND_INREG: {
2197    MVT EVT = cast<VTSDNode>(N2)->getVT();
2198    assert(VT == N1.getValueType() && "Not an inreg extend!");
2199    assert(VT.isInteger() && EVT.isInteger() &&
2200           "Cannot *_EXTEND_INREG FP types");
2201    assert(EVT.bitsLE(VT) && "Not extending!");
2202    if (EVT == VT) return N1;  // Not actually extending
2203
2204    if (N1C) {
2205      APInt Val = N1C->getAPIntValue();
2206      unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits();
2207      Val <<= Val.getBitWidth()-FromBits;
2208      Val = Val.ashr(Val.getBitWidth()-FromBits);
2209      return getConstant(Val, VT);
2210    }
2211    break;
2212  }
2213  case ISD::EXTRACT_VECTOR_ELT:
2214    assert(N2C && "Bad EXTRACT_VECTOR_ELT!");
2215
2216    // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2217    if (N1.getOpcode() == ISD::UNDEF)
2218      return getNode(ISD::UNDEF, VT);
2219
2220    // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2221    // expanding copies of large vectors from registers.
2222    if (N1.getOpcode() == ISD::CONCAT_VECTORS &&
2223        N1.getNumOperands() > 0) {
2224      unsigned Factor =
2225        N1.getOperand(0).getValueType().getVectorNumElements();
2226      return getNode(ISD::EXTRACT_VECTOR_ELT, VT,
2227                     N1.getOperand(N2C->getValue() / Factor),
2228                     getConstant(N2C->getValue() % Factor, N2.getValueType()));
2229    }
2230
2231    // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2232    // expanding large vector constants.
2233    if (N1.getOpcode() == ISD::BUILD_VECTOR)
2234      return N1.getOperand(N2C->getValue());
2235
2236    // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2237    // operations are lowered to scalars.
2238    if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT)
2239      if (ConstantSDNode *IEC = dyn_cast<ConstantSDNode>(N1.getOperand(2))) {
2240        if (IEC == N2C)
2241          return N1.getOperand(1);
2242        else
2243          return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2);
2244      }
2245    break;
2246  case ISD::EXTRACT_ELEMENT:
2247    assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!");
2248    assert(!N1.getValueType().isVector() && !VT.isVector() &&
2249           (N1.getValueType().isInteger() == VT.isInteger()) &&
2250           "Wrong types for EXTRACT_ELEMENT!");
2251
2252    // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2253    // 64-bit integers into 32-bit parts.  Instead of building the extract of
2254    // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2255    if (N1.getOpcode() == ISD::BUILD_PAIR)
2256      return N1.getOperand(N2C->getValue());
2257
2258    // EXTRACT_ELEMENT of a constant int is also very common.
2259    if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2260      unsigned ElementSize = VT.getSizeInBits();
2261      unsigned Shift = ElementSize * N2C->getValue();
2262      APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2263      return getConstant(ShiftedVal.trunc(ElementSize), VT);
2264    }
2265    break;
2266  case ISD::EXTRACT_SUBVECTOR:
2267    if (N1.getValueType() == VT) // Trivial extraction.
2268      return N1;
2269    break;
2270  }
2271
2272  if (N1C) {
2273    if (N2C) {
2274      APInt C1 = N1C->getAPIntValue(), C2 = N2C->getAPIntValue();
2275      switch (Opcode) {
2276      case ISD::ADD: return getConstant(C1 + C2, VT);
2277      case ISD::SUB: return getConstant(C1 - C2, VT);
2278      case ISD::MUL: return getConstant(C1 * C2, VT);
2279      case ISD::UDIV:
2280        if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2281        break;
2282      case ISD::UREM :
2283        if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2284        break;
2285      case ISD::SDIV :
2286        if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2287        break;
2288      case ISD::SREM :
2289        if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2290        break;
2291      case ISD::AND  : return getConstant(C1 & C2, VT);
2292      case ISD::OR   : return getConstant(C1 | C2, VT);
2293      case ISD::XOR  : return getConstant(C1 ^ C2, VT);
2294      case ISD::SHL  : return getConstant(C1 << C2, VT);
2295      case ISD::SRL  : return getConstant(C1.lshr(C2), VT);
2296      case ISD::SRA  : return getConstant(C1.ashr(C2), VT);
2297      case ISD::ROTL : return getConstant(C1.rotl(C2), VT);
2298      case ISD::ROTR : return getConstant(C1.rotr(C2), VT);
2299      default: break;
2300      }
2301    } else {      // Cannonicalize constant to RHS if commutative
2302      if (isCommutativeBinOp(Opcode)) {
2303        std::swap(N1C, N2C);
2304        std::swap(N1, N2);
2305      }
2306    }
2307  }
2308
2309  // Constant fold FP operations.
2310  ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val);
2311  ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val);
2312  if (N1CFP) {
2313    if (!N2CFP && isCommutativeBinOp(Opcode)) {
2314      // Cannonicalize constant to RHS if commutative
2315      std::swap(N1CFP, N2CFP);
2316      std::swap(N1, N2);
2317    } else if (N2CFP && VT != MVT::ppcf128) {
2318      APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2319      APFloat::opStatus s;
2320      switch (Opcode) {
2321      case ISD::FADD:
2322        s = V1.add(V2, APFloat::rmNearestTiesToEven);
2323        if (s != APFloat::opInvalidOp)
2324          return getConstantFP(V1, VT);
2325        break;
2326      case ISD::FSUB:
2327        s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2328        if (s!=APFloat::opInvalidOp)
2329          return getConstantFP(V1, VT);
2330        break;
2331      case ISD::FMUL:
2332        s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2333        if (s!=APFloat::opInvalidOp)
2334          return getConstantFP(V1, VT);
2335        break;
2336      case ISD::FDIV:
2337        s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2338        if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2339          return getConstantFP(V1, VT);
2340        break;
2341      case ISD::FREM :
2342        s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2343        if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2344          return getConstantFP(V1, VT);
2345        break;
2346      case ISD::FCOPYSIGN:
2347        V1.copySign(V2);
2348        return getConstantFP(V1, VT);
2349      default: break;
2350      }
2351    }
2352  }
2353
2354  // Canonicalize an UNDEF to the RHS, even over a constant.
2355  if (N1.getOpcode() == ISD::UNDEF) {
2356    if (isCommutativeBinOp(Opcode)) {
2357      std::swap(N1, N2);
2358    } else {
2359      switch (Opcode) {
2360      case ISD::FP_ROUND_INREG:
2361      case ISD::SIGN_EXTEND_INREG:
2362      case ISD::SUB:
2363      case ISD::FSUB:
2364      case ISD::FDIV:
2365      case ISD::FREM:
2366      case ISD::SRA:
2367        return N1;     // fold op(undef, arg2) -> undef
2368      case ISD::UDIV:
2369      case ISD::SDIV:
2370      case ISD::UREM:
2371      case ISD::SREM:
2372      case ISD::SRL:
2373      case ISD::SHL:
2374        if (!VT.isVector())
2375          return getConstant(0, VT);    // fold op(undef, arg2) -> 0
2376        // For vectors, we can't easily build an all zero vector, just return
2377        // the LHS.
2378        return N2;
2379      }
2380    }
2381  }
2382
2383  // Fold a bunch of operators when the RHS is undef.
2384  if (N2.getOpcode() == ISD::UNDEF) {
2385    switch (Opcode) {
2386    case ISD::XOR:
2387      if (N1.getOpcode() == ISD::UNDEF)
2388        // Handle undef ^ undef -> 0 special case. This is a common
2389        // idiom (misuse).
2390        return getConstant(0, VT);
2391      // fallthrough
2392    case ISD::ADD:
2393    case ISD::ADDC:
2394    case ISD::ADDE:
2395    case ISD::SUB:
2396    case ISD::FADD:
2397    case ISD::FSUB:
2398    case ISD::FMUL:
2399    case ISD::FDIV:
2400    case ISD::FREM:
2401    case ISD::UDIV:
2402    case ISD::SDIV:
2403    case ISD::UREM:
2404    case ISD::SREM:
2405      return N2;       // fold op(arg1, undef) -> undef
2406    case ISD::MUL:
2407    case ISD::AND:
2408    case ISD::SRL:
2409    case ISD::SHL:
2410      if (!VT.isVector())
2411        return getConstant(0, VT);  // fold op(arg1, undef) -> 0
2412      // For vectors, we can't easily build an all zero vector, just return
2413      // the LHS.
2414      return N1;
2415    case ISD::OR:
2416      if (!VT.isVector())
2417        return getConstant(VT.getIntegerVTBitMask(), VT);
2418      // For vectors, we can't easily build an all one vector, just return
2419      // the LHS.
2420      return N1;
2421    case ISD::SRA:
2422      return N1;
2423    }
2424  }
2425
2426  // Memoize this node if possible.
2427  SDNode *N;
2428  SDVTList VTs = getVTList(VT);
2429  if (VT != MVT::Flag) {
2430    SDOperand Ops[] = { N1, N2 };
2431    FoldingSetNodeID ID;
2432    AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
2433    void *IP = 0;
2434    if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2435      return SDOperand(E, 0);
2436    N = new BinarySDNode(Opcode, VTs, N1, N2);
2437    CSEMap.InsertNode(N, IP);
2438  } else {
2439    N = new BinarySDNode(Opcode, VTs, N1, N2);
2440  }
2441
2442  AllNodes.push_back(N);
2443  return SDOperand(N, 0);
2444}
2445
2446SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
2447                                SDOperand N1, SDOperand N2, SDOperand N3) {
2448  // Perform various simplifications.
2449  ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
2450  ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val);
2451  switch (Opcode) {
2452  case ISD::SETCC: {
2453    // Use FoldSetCC to simplify SETCC's.
2454    SDOperand Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get());
2455    if (Simp.Val) return Simp;
2456    break;
2457  }
2458  case ISD::SELECT:
2459    if (N1C) {
2460     if (N1C->getValue())
2461        return N2;             // select true, X, Y -> X
2462      else
2463        return N3;             // select false, X, Y -> Y
2464    }
2465
2466    if (N2 == N3) return N2;   // select C, X, X -> X
2467    break;
2468  case ISD::BRCOND:
2469    if (N2C) {
2470      if (N2C->getValue()) // Unconditional branch
2471        return getNode(ISD::BR, MVT::Other, N1, N3);
2472      else
2473        return N1;         // Never-taken branch
2474    }
2475    break;
2476  case ISD::VECTOR_SHUFFLE:
2477    assert(VT == N1.getValueType() && VT == N2.getValueType() &&
2478           VT.isVector() && N3.getValueType().isVector() &&
2479           N3.getOpcode() == ISD::BUILD_VECTOR &&
2480           VT.getVectorNumElements() == N3.getNumOperands() &&
2481           "Illegal VECTOR_SHUFFLE node!");
2482    break;
2483  case ISD::BIT_CONVERT:
2484    // Fold bit_convert nodes from a type to themselves.
2485    if (N1.getValueType() == VT)
2486      return N1;
2487    break;
2488  }
2489
2490  // Memoize node if it doesn't produce a flag.
2491  SDNode *N;
2492  SDVTList VTs = getVTList(VT);
2493  if (VT != MVT::Flag) {
2494    SDOperand Ops[] = { N1, N2, N3 };
2495    FoldingSetNodeID ID;
2496    AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
2497    void *IP = 0;
2498    if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2499      return SDOperand(E, 0);
2500    N = new TernarySDNode(Opcode, VTs, N1, N2, N3);
2501    CSEMap.InsertNode(N, IP);
2502  } else {
2503    N = new TernarySDNode(Opcode, VTs, N1, N2, N3);
2504  }
2505  AllNodes.push_back(N);
2506  return SDOperand(N, 0);
2507}
2508
2509SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
2510                                SDOperand N1, SDOperand N2, SDOperand N3,
2511                                SDOperand N4) {
2512  SDOperand Ops[] = { N1, N2, N3, N4 };
2513  return getNode(Opcode, VT, Ops, 4);
2514}
2515
2516SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
2517                                SDOperand N1, SDOperand N2, SDOperand N3,
2518                                SDOperand N4, SDOperand N5) {
2519  SDOperand Ops[] = { N1, N2, N3, N4, N5 };
2520  return getNode(Opcode, VT, Ops, 5);
2521}
2522
2523/// getMemsetValue - Vectorized representation of the memset value
2524/// operand.
2525static SDOperand getMemsetValue(SDOperand Value, MVT VT, SelectionDAG &DAG) {
2526  unsigned NumBits = VT.isVector() ?
2527    VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
2528  if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
2529    APInt Val = APInt(NumBits, C->getValue() & 255);
2530    unsigned Shift = 8;
2531    for (unsigned i = NumBits; i > 8; i >>= 1) {
2532      Val = (Val << Shift) | Val;
2533      Shift <<= 1;
2534    }
2535    if (VT.isInteger())
2536      return DAG.getConstant(Val, VT);
2537    return DAG.getConstantFP(APFloat(Val), VT);
2538  }
2539
2540  Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value);
2541  unsigned Shift = 8;
2542  for (unsigned i = NumBits; i > 8; i >>= 1) {
2543    Value = DAG.getNode(ISD::OR, VT,
2544                        DAG.getNode(ISD::SHL, VT, Value,
2545                                    DAG.getConstant(Shift, MVT::i8)), Value);
2546    Shift <<= 1;
2547  }
2548
2549  return Value;
2550}
2551
2552/// getMemsetStringVal - Similar to getMemsetValue. Except this is only
2553/// used when a memcpy is turned into a memset when the source is a constant
2554/// string ptr.
2555static SDOperand getMemsetStringVal(MVT VT, SelectionDAG &DAG,
2556                                    const TargetLowering &TLI,
2557                                    std::string &Str, unsigned Offset) {
2558  assert(!VT.isVector() && "Can't handle vector type here!");
2559  unsigned NumBits = VT.getSizeInBits();
2560  unsigned MSB = NumBits / 8;
2561  uint64_t Val = 0;
2562  if (TLI.isLittleEndian())
2563    Offset = Offset + MSB - 1;
2564  for (unsigned i = 0; i != MSB; ++i) {
2565    Val = (Val << 8) | (unsigned char)Str[Offset];
2566    Offset += TLI.isLittleEndian() ? -1 : 1;
2567  }
2568  return DAG.getConstant(Val, VT);
2569}
2570
2571/// getMemBasePlusOffset - Returns base and offset node for the
2572///
2573static SDOperand getMemBasePlusOffset(SDOperand Base, unsigned Offset,
2574                                      SelectionDAG &DAG) {
2575  MVT VT = Base.getValueType();
2576  return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT));
2577}
2578
2579/// isMemSrcFromString - Returns true if memcpy source is a string constant.
2580///
2581static bool isMemSrcFromString(SDOperand Src, std::string &Str) {
2582  unsigned SrcDelta = 0;
2583  GlobalAddressSDNode *G = NULL;
2584  if (Src.getOpcode() == ISD::GlobalAddress)
2585    G = cast<GlobalAddressSDNode>(Src);
2586  else if (Src.getOpcode() == ISD::ADD &&
2587           Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
2588           Src.getOperand(1).getOpcode() == ISD::Constant) {
2589    G = cast<GlobalAddressSDNode>(Src.getOperand(0));
2590    SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue();
2591  }
2592  if (!G)
2593    return false;
2594
2595  GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal());
2596  if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false))
2597    return true;
2598
2599  return false;
2600}
2601
2602/// MeetsMaxMemopRequirement - Determines if the number of memory ops required
2603/// to replace the memset / memcpy is below the threshold. It also returns the
2604/// types of the sequence of memory ops to perform memset / memcpy.
2605static
2606bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
2607                              SDOperand Dst, SDOperand Src,
2608                              unsigned Limit, uint64_t Size, unsigned &Align,
2609                              SelectionDAG &DAG,
2610                              const TargetLowering &TLI) {
2611  bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
2612
2613  std::string Str;
2614  bool isSrcStr = isMemSrcFromString(Src, Str);
2615  bool isSrcConst = isa<ConstantSDNode>(Src);
2616  MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr);
2617  if (VT != MVT::iAny) {
2618    unsigned NewAlign = (unsigned)
2619      TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
2620    // If source is a string constant, this will require an unaligned load.
2621    if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
2622      if (Dst.getOpcode() != ISD::FrameIndex) {
2623        // Can't change destination alignment. It requires a unaligned store.
2624        if (AllowUnalign)
2625          VT = MVT::iAny;
2626      } else {
2627        int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
2628        MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
2629        if (MFI->isFixedObjectIndex(FI)) {
2630          // Can't change destination alignment. It requires a unaligned store.
2631          if (AllowUnalign)
2632            VT = MVT::iAny;
2633        } else {
2634          // Give the stack frame object a larger alignment if needed.
2635          if (MFI->getObjectAlignment(FI) < NewAlign)
2636            MFI->setObjectAlignment(FI, NewAlign);
2637          Align = NewAlign;
2638        }
2639      }
2640    }
2641  }
2642
2643  if (VT == MVT::iAny) {
2644    if (AllowUnalign) {
2645      VT = MVT::i64;
2646    } else {
2647      switch (Align & 7) {
2648      case 0:  VT = MVT::i64; break;
2649      case 4:  VT = MVT::i32; break;
2650      case 2:  VT = MVT::i16; break;
2651      default: VT = MVT::i8;  break;
2652      }
2653    }
2654
2655    MVT LVT = MVT::i64;
2656    while (!TLI.isTypeLegal(LVT))
2657      LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
2658    assert(LVT.isInteger());
2659
2660    if (VT.bitsGT(LVT))
2661      VT = LVT;
2662  }
2663
2664  unsigned NumMemOps = 0;
2665  while (Size != 0) {
2666    unsigned VTSize = VT.getSizeInBits() / 8;
2667    while (VTSize > Size) {
2668      // For now, only use non-vector load / store's for the left-over pieces.
2669      if (VT.isVector()) {
2670        VT = MVT::i64;
2671        while (!TLI.isTypeLegal(VT))
2672          VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2673        VTSize = VT.getSizeInBits() / 8;
2674      } else {
2675        VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
2676        VTSize >>= 1;
2677      }
2678    }
2679
2680    if (++NumMemOps > Limit)
2681      return false;
2682    MemOps.push_back(VT);
2683    Size -= VTSize;
2684  }
2685
2686  return true;
2687}
2688
2689static SDOperand getMemcpyLoadsAndStores(SelectionDAG &DAG,
2690                                         SDOperand Chain, SDOperand Dst,
2691                                         SDOperand Src, uint64_t Size,
2692                                         unsigned Align, bool AlwaysInline,
2693                                         const Value *DstSV, uint64_t DstSVOff,
2694                                         const Value *SrcSV, uint64_t SrcSVOff){
2695  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2696
2697  // Expand memcpy to a series of load and store ops if the size operand falls
2698  // below a certain threshold.
2699  std::vector<MVT> MemOps;
2700  uint64_t Limit = -1;
2701  if (!AlwaysInline)
2702    Limit = TLI.getMaxStoresPerMemcpy();
2703  unsigned DstAlign = Align;  // Destination alignment can change.
2704  if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2705                                DAG, TLI))
2706    return SDOperand();
2707
2708  std::string Str;
2709  bool CopyFromStr = isMemSrcFromString(Src, Str);
2710
2711  SmallVector<SDOperand, 8> OutChains;
2712  unsigned NumMemOps = MemOps.size();
2713  uint64_t SrcOff = 0, DstOff = 0;
2714  for (unsigned i = 0; i < NumMemOps; i++) {
2715    MVT VT = MemOps[i];
2716    unsigned VTSize = VT.getSizeInBits() / 8;
2717    SDOperand Value, Store;
2718
2719    if (CopyFromStr && !VT.isVector()) {
2720      // It's unlikely a store of a vector immediate can be done in a single
2721      // instruction. It would require a load from a constantpool first.
2722      // FIXME: Handle cases where store of vector immediate is done in a
2723      // single instruction.
2724      Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff);
2725      Store = DAG.getStore(Chain, Value,
2726                           getMemBasePlusOffset(Dst, DstOff, DAG),
2727                           DstSV, DstSVOff + DstOff);
2728    } else {
2729      Value = DAG.getLoad(VT, Chain,
2730                          getMemBasePlusOffset(Src, SrcOff, DAG),
2731                          SrcSV, SrcSVOff + SrcOff, false, Align);
2732      Store = DAG.getStore(Chain, Value,
2733                           getMemBasePlusOffset(Dst, DstOff, DAG),
2734                           DstSV, DstSVOff + DstOff, false, DstAlign);
2735    }
2736    OutChains.push_back(Store);
2737    SrcOff += VTSize;
2738    DstOff += VTSize;
2739  }
2740
2741  return DAG.getNode(ISD::TokenFactor, MVT::Other,
2742                     &OutChains[0], OutChains.size());
2743}
2744
2745static SDOperand getMemmoveLoadsAndStores(SelectionDAG &DAG,
2746                                          SDOperand Chain, SDOperand Dst,
2747                                          SDOperand Src, uint64_t Size,
2748                                          unsigned Align, bool AlwaysInline,
2749                                          const Value *DstSV, uint64_t DstSVOff,
2750                                          const Value *SrcSV, uint64_t SrcSVOff){
2751  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2752
2753  // Expand memmove to a series of load and store ops if the size operand falls
2754  // below a certain threshold.
2755  std::vector<MVT> MemOps;
2756  uint64_t Limit = -1;
2757  if (!AlwaysInline)
2758    Limit = TLI.getMaxStoresPerMemmove();
2759  unsigned DstAlign = Align;  // Destination alignment can change.
2760  if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign,
2761                                DAG, TLI))
2762    return SDOperand();
2763
2764  uint64_t SrcOff = 0, DstOff = 0;
2765
2766  SmallVector<SDOperand, 8> LoadValues;
2767  SmallVector<SDOperand, 8> LoadChains;
2768  SmallVector<SDOperand, 8> OutChains;
2769  unsigned NumMemOps = MemOps.size();
2770  for (unsigned i = 0; i < NumMemOps; i++) {
2771    MVT VT = MemOps[i];
2772    unsigned VTSize = VT.getSizeInBits() / 8;
2773    SDOperand Value, Store;
2774
2775    Value = DAG.getLoad(VT, Chain,
2776                        getMemBasePlusOffset(Src, SrcOff, DAG),
2777                        SrcSV, SrcSVOff + SrcOff, false, Align);
2778    LoadValues.push_back(Value);
2779    LoadChains.push_back(Value.getValue(1));
2780    SrcOff += VTSize;
2781  }
2782  Chain = DAG.getNode(ISD::TokenFactor, MVT::Other,
2783                      &LoadChains[0], LoadChains.size());
2784  OutChains.clear();
2785  for (unsigned i = 0; i < NumMemOps; i++) {
2786    MVT VT = MemOps[i];
2787    unsigned VTSize = VT.getSizeInBits() / 8;
2788    SDOperand Value, Store;
2789
2790    Store = DAG.getStore(Chain, LoadValues[i],
2791                         getMemBasePlusOffset(Dst, DstOff, DAG),
2792                         DstSV, DstSVOff + DstOff, false, DstAlign);
2793    OutChains.push_back(Store);
2794    DstOff += VTSize;
2795  }
2796
2797  return DAG.getNode(ISD::TokenFactor, MVT::Other,
2798                     &OutChains[0], OutChains.size());
2799}
2800
2801static SDOperand getMemsetStores(SelectionDAG &DAG,
2802                                 SDOperand Chain, SDOperand Dst,
2803                                 SDOperand Src, uint64_t Size,
2804                                 unsigned Align,
2805                                 const Value *DstSV, uint64_t DstSVOff) {
2806  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2807
2808  // Expand memset to a series of load/store ops if the size operand
2809  // falls below a certain threshold.
2810  std::vector<MVT> MemOps;
2811  if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
2812                                Size, Align, DAG, TLI))
2813    return SDOperand();
2814
2815  SmallVector<SDOperand, 8> OutChains;
2816  uint64_t DstOff = 0;
2817
2818  unsigned NumMemOps = MemOps.size();
2819  for (unsigned i = 0; i < NumMemOps; i++) {
2820    MVT VT = MemOps[i];
2821    unsigned VTSize = VT.getSizeInBits() / 8;
2822    SDOperand Value = getMemsetValue(Src, VT, DAG);
2823    SDOperand Store = DAG.getStore(Chain, Value,
2824                                   getMemBasePlusOffset(Dst, DstOff, DAG),
2825                                   DstSV, DstSVOff + DstOff);
2826    OutChains.push_back(Store);
2827    DstOff += VTSize;
2828  }
2829
2830  return DAG.getNode(ISD::TokenFactor, MVT::Other,
2831                     &OutChains[0], OutChains.size());
2832}
2833
2834SDOperand SelectionDAG::getMemcpy(SDOperand Chain, SDOperand Dst,
2835                                  SDOperand Src, SDOperand Size,
2836                                  unsigned Align, bool AlwaysInline,
2837                                  const Value *DstSV, uint64_t DstSVOff,
2838                                  const Value *SrcSV, uint64_t SrcSVOff) {
2839
2840  // Check to see if we should lower the memcpy to loads and stores first.
2841  // For cases within the target-specified limits, this is the best choice.
2842  ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
2843  if (ConstantSize) {
2844    // Memcpy with size zero? Just return the original chain.
2845    if (ConstantSize->isNullValue())
2846      return Chain;
2847
2848    SDOperand Result =
2849      getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(),
2850                              Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
2851    if (Result.Val)
2852      return Result;
2853  }
2854
2855  // Then check to see if we should lower the memcpy with target-specific
2856  // code. If the target chooses to do this, this is the next best.
2857  SDOperand Result =
2858    TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align,
2859                                AlwaysInline,
2860                                DstSV, DstSVOff, SrcSV, SrcSVOff);
2861  if (Result.Val)
2862    return Result;
2863
2864  // If we really need inline code and the target declined to provide it,
2865  // use a (potentially long) sequence of loads and stores.
2866  if (AlwaysInline) {
2867    assert(ConstantSize && "AlwaysInline requires a constant size!");
2868    return getMemcpyLoadsAndStores(*this, Chain, Dst, Src,
2869                                   ConstantSize->getValue(), Align, true,
2870                                   DstSV, DstSVOff, SrcSV, SrcSVOff);
2871  }
2872
2873  // Emit a library call.
2874  TargetLowering::ArgListTy Args;
2875  TargetLowering::ArgListEntry Entry;
2876  Entry.Ty = TLI.getTargetData()->getIntPtrType();
2877  Entry.Node = Dst; Args.push_back(Entry);
2878  Entry.Node = Src; Args.push_back(Entry);
2879  Entry.Node = Size; Args.push_back(Entry);
2880  std::pair<SDOperand,SDOperand> CallResult =
2881    TLI.LowerCallTo(Chain, Type::VoidTy,
2882                    false, false, false, CallingConv::C, false,
2883                    getExternalSymbol("memcpy", TLI.getPointerTy()),
2884                    Args, *this);
2885  return CallResult.second;
2886}
2887
2888SDOperand SelectionDAG::getMemmove(SDOperand Chain, SDOperand Dst,
2889                                   SDOperand Src, SDOperand Size,
2890                                   unsigned Align,
2891                                   const Value *DstSV, uint64_t DstSVOff,
2892                                   const Value *SrcSV, uint64_t SrcSVOff) {
2893
2894  // Check to see if we should lower the memmove to loads and stores first.
2895  // For cases within the target-specified limits, this is the best choice.
2896  ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
2897  if (ConstantSize) {
2898    // Memmove with size zero? Just return the original chain.
2899    if (ConstantSize->isNullValue())
2900      return Chain;
2901
2902    SDOperand Result =
2903      getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(),
2904                               Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff);
2905    if (Result.Val)
2906      return Result;
2907  }
2908
2909  // Then check to see if we should lower the memmove with target-specific
2910  // code. If the target chooses to do this, this is the next best.
2911  SDOperand Result =
2912    TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align,
2913                                 DstSV, DstSVOff, SrcSV, SrcSVOff);
2914  if (Result.Val)
2915    return Result;
2916
2917  // Emit a library call.
2918  TargetLowering::ArgListTy Args;
2919  TargetLowering::ArgListEntry Entry;
2920  Entry.Ty = TLI.getTargetData()->getIntPtrType();
2921  Entry.Node = Dst; Args.push_back(Entry);
2922  Entry.Node = Src; Args.push_back(Entry);
2923  Entry.Node = Size; Args.push_back(Entry);
2924  std::pair<SDOperand,SDOperand> CallResult =
2925    TLI.LowerCallTo(Chain, Type::VoidTy,
2926                    false, false, false, CallingConv::C, false,
2927                    getExternalSymbol("memmove", TLI.getPointerTy()),
2928                    Args, *this);
2929  return CallResult.second;
2930}
2931
2932SDOperand SelectionDAG::getMemset(SDOperand Chain, SDOperand Dst,
2933                                  SDOperand Src, SDOperand Size,
2934                                  unsigned Align,
2935                                  const Value *DstSV, uint64_t DstSVOff) {
2936
2937  // Check to see if we should lower the memset to stores first.
2938  // For cases within the target-specified limits, this is the best choice.
2939  ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
2940  if (ConstantSize) {
2941    // Memset with size zero? Just return the original chain.
2942    if (ConstantSize->isNullValue())
2943      return Chain;
2944
2945    SDOperand Result =
2946      getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align,
2947                      DstSV, DstSVOff);
2948    if (Result.Val)
2949      return Result;
2950  }
2951
2952  // Then check to see if we should lower the memset with target-specific
2953  // code. If the target chooses to do this, this is the next best.
2954  SDOperand Result =
2955    TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align,
2956                                DstSV, DstSVOff);
2957  if (Result.Val)
2958    return Result;
2959
2960  // Emit a library call.
2961  const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType();
2962  TargetLowering::ArgListTy Args;
2963  TargetLowering::ArgListEntry Entry;
2964  Entry.Node = Dst; Entry.Ty = IntPtrTy;
2965  Args.push_back(Entry);
2966  // Extend or truncate the argument to be an i32 value for the call.
2967  if (Src.getValueType().bitsGT(MVT::i32))
2968    Src = getNode(ISD::TRUNCATE, MVT::i32, Src);
2969  else
2970    Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src);
2971  Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
2972  Args.push_back(Entry);
2973  Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
2974  Args.push_back(Entry);
2975  std::pair<SDOperand,SDOperand> CallResult =
2976    TLI.LowerCallTo(Chain, Type::VoidTy,
2977                    false, false, false, CallingConv::C, false,
2978                    getExternalSymbol("memset", TLI.getPointerTy()),
2979                    Args, *this);
2980  return CallResult.second;
2981}
2982
2983SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain,
2984                                  SDOperand Ptr, SDOperand Cmp,
2985                                  SDOperand Swp, const Value* PtrVal,
2986                                  unsigned Alignment) {
2987  assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
2988  assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
2989  SDVTList VTs = getVTList(Cmp.getValueType(), MVT::Other);
2990  FoldingSetNodeID ID;
2991  SDOperand Ops[] = {Chain, Ptr, Cmp, Swp};
2992  AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
2993  void* IP = 0;
2994  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2995    return SDOperand(E, 0);
2996  SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp,
2997                               PtrVal, Alignment);
2998  CSEMap.InsertNode(N, IP);
2999  AllNodes.push_back(N);
3000  return SDOperand(N, 0);
3001}
3002
3003SDOperand SelectionDAG::getAtomic(unsigned Opcode, SDOperand Chain,
3004                                  SDOperand Ptr, SDOperand Val,
3005                                  const Value* PtrVal,
3006                                  unsigned Alignment) {
3007  assert((   Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB
3008          || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND
3009          || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR
3010          || Opcode == ISD::ATOMIC_LOAD_NAND
3011          || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX
3012          || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX)
3013         && "Invalid Atomic Op");
3014  SDVTList VTs = getVTList(Val.getValueType(), MVT::Other);
3015  FoldingSetNodeID ID;
3016  SDOperand Ops[] = {Chain, Ptr, Val};
3017  AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3018  void* IP = 0;
3019  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3020    return SDOperand(E, 0);
3021  SDNode* N = new AtomicSDNode(Opcode, VTs, Chain, Ptr, Val,
3022                               PtrVal, Alignment);
3023  CSEMap.InsertNode(N, IP);
3024  AllNodes.push_back(N);
3025  return SDOperand(N, 0);
3026}
3027
3028SDOperand
3029SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
3030                      MVT VT, SDOperand Chain,
3031                      SDOperand Ptr, SDOperand Offset,
3032                      const Value *SV, int SVOffset, MVT EVT,
3033                      bool isVolatile, unsigned Alignment) {
3034  if (Alignment == 0) { // Ensure that codegen never sees alignment 0
3035    const Type *Ty = 0;
3036    if (VT != MVT::iPTR) {
3037      Ty = VT.getTypeForMVT();
3038    } else if (SV) {
3039      const PointerType *PT = dyn_cast<PointerType>(SV->getType());
3040      assert(PT && "Value for load must be a pointer");
3041      Ty = PT->getElementType();
3042    }
3043    assert(Ty && "Could not get type information for load");
3044    Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
3045  }
3046
3047  if (VT == EVT) {
3048    ExtType = ISD::NON_EXTLOAD;
3049  } else if (ExtType == ISD::NON_EXTLOAD) {
3050    assert(VT == EVT && "Non-extending load from different memory type!");
3051  } else {
3052    // Extending load.
3053    if (VT.isVector())
3054      assert(EVT == VT.getVectorElementType() && "Invalid vector extload!");
3055    else
3056      assert(EVT.bitsLT(VT) &&
3057             "Should only be an extending load, not truncating!");
3058    assert((ExtType == ISD::EXTLOAD || VT.isInteger()) &&
3059           "Cannot sign/zero extend a FP/Vector load!");
3060    assert(VT.isInteger() == EVT.isInteger() &&
3061           "Cannot convert from FP to Int or Int -> FP!");
3062  }
3063
3064  bool Indexed = AM != ISD::UNINDEXED;
3065  assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
3066         "Unindexed load with an offset!");
3067
3068  SDVTList VTs = Indexed ?
3069    getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
3070  SDOperand Ops[] = { Chain, Ptr, Offset };
3071  FoldingSetNodeID ID;
3072  AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
3073  ID.AddInteger(AM);
3074  ID.AddInteger(ExtType);
3075  ID.AddInteger(EVT.getRawBits());
3076  ID.AddInteger(Alignment);
3077  ID.AddInteger(isVolatile);
3078  void *IP = 0;
3079  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3080    return SDOperand(E, 0);
3081  SDNode *N = new LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset,
3082                             Alignment, isVolatile);
3083  CSEMap.InsertNode(N, IP);
3084  AllNodes.push_back(N);
3085  return SDOperand(N, 0);
3086}
3087
3088SDOperand SelectionDAG::getLoad(MVT VT,
3089                                SDOperand Chain, SDOperand Ptr,
3090                                const Value *SV, int SVOffset,
3091                                bool isVolatile, unsigned Alignment) {
3092  SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3093  return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef,
3094                 SV, SVOffset, VT, isVolatile, Alignment);
3095}
3096
3097SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT,
3098                                   SDOperand Chain, SDOperand Ptr,
3099                                   const Value *SV,
3100                                   int SVOffset, MVT EVT,
3101                                   bool isVolatile, unsigned Alignment) {
3102  SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3103  return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef,
3104                 SV, SVOffset, EVT, isVolatile, Alignment);
3105}
3106
3107SDOperand
3108SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base,
3109                             SDOperand Offset, ISD::MemIndexedMode AM) {
3110  LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
3111  assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
3112         "Load is already a indexed load!");
3113  return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(),
3114                 LD->getChain(), Base, Offset, LD->getSrcValue(),
3115                 LD->getSrcValueOffset(), LD->getMemoryVT(),
3116                 LD->isVolatile(), LD->getAlignment());
3117}
3118
3119SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Val,
3120                                 SDOperand Ptr, const Value *SV, int SVOffset,
3121                                 bool isVolatile, unsigned Alignment) {
3122  MVT VT = Val.getValueType();
3123
3124  if (Alignment == 0) { // Ensure that codegen never sees alignment 0
3125    const Type *Ty = 0;
3126    if (VT != MVT::iPTR) {
3127      Ty = VT.getTypeForMVT();
3128    } else if (SV) {
3129      const PointerType *PT = dyn_cast<PointerType>(SV->getType());
3130      assert(PT && "Value for store must be a pointer");
3131      Ty = PT->getElementType();
3132    }
3133    assert(Ty && "Could not get type information for store");
3134    Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
3135  }
3136  SDVTList VTs = getVTList(MVT::Other);
3137  SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3138  SDOperand Ops[] = { Chain, Val, Ptr, Undef };
3139  FoldingSetNodeID ID;
3140  AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3141  ID.AddInteger(ISD::UNINDEXED);
3142  ID.AddInteger(false);
3143  ID.AddInteger(VT.getRawBits());
3144  ID.AddInteger(Alignment);
3145  ID.AddInteger(isVolatile);
3146  void *IP = 0;
3147  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3148    return SDOperand(E, 0);
3149  SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, false,
3150                              VT, SV, SVOffset, Alignment, isVolatile);
3151  CSEMap.InsertNode(N, IP);
3152  AllNodes.push_back(N);
3153  return SDOperand(N, 0);
3154}
3155
3156SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val,
3157                                      SDOperand Ptr, const Value *SV,
3158                                      int SVOffset, MVT SVT,
3159                                      bool isVolatile, unsigned Alignment) {
3160  MVT VT = Val.getValueType();
3161
3162  if (VT == SVT)
3163    return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
3164
3165  assert(VT.bitsGT(SVT) && "Not a truncation?");
3166  assert(VT.isInteger() == SVT.isInteger() &&
3167         "Can't do FP-INT conversion!");
3168
3169  if (Alignment == 0) { // Ensure that codegen never sees alignment 0
3170    const Type *Ty = 0;
3171    if (VT != MVT::iPTR) {
3172      Ty = VT.getTypeForMVT();
3173    } else if (SV) {
3174      const PointerType *PT = dyn_cast<PointerType>(SV->getType());
3175      assert(PT && "Value for store must be a pointer");
3176      Ty = PT->getElementType();
3177    }
3178    assert(Ty && "Could not get type information for store");
3179    Alignment = TLI.getTargetData()->getABITypeAlignment(Ty);
3180  }
3181  SDVTList VTs = getVTList(MVT::Other);
3182  SDOperand Undef = getNode(ISD::UNDEF, Ptr.getValueType());
3183  SDOperand Ops[] = { Chain, Val, Ptr, Undef };
3184  FoldingSetNodeID ID;
3185  AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3186  ID.AddInteger(ISD::UNINDEXED);
3187  ID.AddInteger(1);
3188  ID.AddInteger(SVT.getRawBits());
3189  ID.AddInteger(Alignment);
3190  ID.AddInteger(isVolatile);
3191  void *IP = 0;
3192  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3193    return SDOperand(E, 0);
3194  SDNode *N = new StoreSDNode(Ops, VTs, ISD::UNINDEXED, true,
3195                              SVT, SV, SVOffset, Alignment, isVolatile);
3196  CSEMap.InsertNode(N, IP);
3197  AllNodes.push_back(N);
3198  return SDOperand(N, 0);
3199}
3200
3201SDOperand
3202SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base,
3203                              SDOperand Offset, ISD::MemIndexedMode AM) {
3204  StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
3205  assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
3206         "Store is already a indexed store!");
3207  SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
3208  SDOperand Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
3209  FoldingSetNodeID ID;
3210  AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
3211  ID.AddInteger(AM);
3212  ID.AddInteger(ST->isTruncatingStore());
3213  ID.AddInteger(ST->getMemoryVT().getRawBits());
3214  ID.AddInteger(ST->getAlignment());
3215  ID.AddInteger(ST->isVolatile());
3216  void *IP = 0;
3217  if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3218    return SDOperand(E, 0);
3219  SDNode *N = new StoreSDNode(Ops, VTs, AM,
3220                              ST->isTruncatingStore(), ST->getMemoryVT(),
3221                              ST->getSrcValue(), ST->getSrcValueOffset(),
3222                              ST->getAlignment(), ST->isVolatile());
3223  CSEMap.InsertNode(N, IP);
3224  AllNodes.push_back(N);
3225  return SDOperand(N, 0);
3226}
3227
3228SDOperand SelectionDAG::getVAArg(MVT VT,
3229                                 SDOperand Chain, SDOperand Ptr,
3230                                 SDOperand SV) {
3231  SDOperand Ops[] = { Chain, Ptr, SV };
3232  return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3);
3233}
3234
3235SDOperand SelectionDAG::getNode(unsigned Opcode, MVT VT,
3236                                SDOperandPtr Ops, unsigned NumOps) {
3237  switch (NumOps) {
3238  case 0: return getNode(Opcode, VT);
3239  case 1: return getNode(Opcode, VT, Ops[0]);
3240  case 2: return getNode(Opcode, VT, Ops[0], Ops[1]);
3241  case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]);
3242  default: break;
3243  }
3244
3245  switch (Opcode) {
3246  default: break;
3247  case ISD::SELECT_CC: {
3248    assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
3249    assert(Ops[0].getValueType() == Ops[1].getValueType() &&
3250           "LHS and RHS of condition must have same type!");
3251    assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3252           "True and False arms of SelectCC must have same type!");
3253    assert(Ops[2].getValueType() == VT &&
3254           "select_cc node must be of same type as true and false value!");
3255    break;
3256  }
3257  case ISD::BR_CC: {
3258    assert(NumOps == 5 && "BR_CC takes 5 operands!");
3259    assert(Ops[2].getValueType() == Ops[3].getValueType() &&
3260           "LHS/RHS of comparison should match types!");
3261    break;
3262  }
3263  }
3264
3265  // Memoize nodes.
3266  SDNode *N;
3267  SDVTList VTs = getVTList(VT);
3268  if (VT != MVT::Flag) {
3269    FoldingSetNodeID ID;
3270    AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
3271    void *IP = 0;
3272    if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3273      return SDOperand(E, 0);
3274    N = new SDNode(Opcode, VTs, Ops, NumOps);
3275    CSEMap.InsertNode(N, IP);
3276  } else {
3277    N = new SDNode(Opcode, VTs, Ops, NumOps);
3278  }
3279  AllNodes.push_back(N);
3280  return SDOperand(N, 0);
3281}
3282
3283SDOperand SelectionDAG::getNode(unsigned Opcode,
3284                                std::vector<MVT> &ResultTys,
3285                                SDOperandPtr Ops, unsigned NumOps) {
3286  return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(),
3287                 Ops, NumOps);
3288}
3289
3290SDOperand SelectionDAG::getNode(unsigned Opcode,
3291                                const MVT *VTs, unsigned NumVTs,
3292                                SDOperandPtr Ops, unsigned NumOps) {
3293  if (NumVTs == 1)
3294    return getNode(Opcode, VTs[0], Ops, NumOps);
3295  return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps);
3296}
3297
3298SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3299                                SDOperandPtr Ops, unsigned NumOps) {
3300  if (VTList.NumVTs == 1)
3301    return getNode(Opcode, VTList.VTs[0], Ops, NumOps);
3302
3303  switch (Opcode) {
3304  // FIXME: figure out how to safely handle things like
3305  // int foo(int x) { return 1 << (x & 255); }
3306  // int bar() { return foo(256); }
3307#if 0
3308  case ISD::SRA_PARTS:
3309  case ISD::SRL_PARTS:
3310  case ISD::SHL_PARTS:
3311    if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
3312        cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
3313      return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3314    else if (N3.getOpcode() == ISD::AND)
3315      if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
3316        // If the and is only masking out bits that cannot effect the shift,
3317        // eliminate the and.
3318        unsigned NumBits = VT.getSizeInBits()*2;
3319        if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
3320          return getNode(Opcode, VT, N1, N2, N3.getOperand(0));
3321      }
3322    break;
3323#endif
3324  }
3325
3326  // Memoize the node unless it returns a flag.
3327  SDNode *N;
3328  if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3329    FoldingSetNodeID ID;
3330    AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3331    void *IP = 0;
3332    if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3333      return SDOperand(E, 0);
3334    if (NumOps == 1)
3335      N = new UnarySDNode(Opcode, VTList, Ops[0]);
3336    else if (NumOps == 2)
3337      N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3338    else if (NumOps == 3)
3339      N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3340    else
3341      N = new SDNode(Opcode, VTList, Ops, NumOps);
3342    CSEMap.InsertNode(N, IP);
3343  } else {
3344    if (NumOps == 1)
3345      N = new UnarySDNode(Opcode, VTList, Ops[0]);
3346    else if (NumOps == 2)
3347      N = new BinarySDNode(Opcode, VTList, Ops[0], Ops[1]);
3348    else if (NumOps == 3)
3349      N = new TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]);
3350    else
3351      N = new SDNode(Opcode, VTList, Ops, NumOps);
3352  }
3353  AllNodes.push_back(N);
3354  return SDOperand(N, 0);
3355}
3356
3357SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) {
3358  return getNode(Opcode, VTList, (SDOperand*)0, 0);
3359}
3360
3361SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3362                                SDOperand N1) {
3363  SDOperand Ops[] = { N1 };
3364  return getNode(Opcode, VTList, Ops, 1);
3365}
3366
3367SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3368                                SDOperand N1, SDOperand N2) {
3369  SDOperand Ops[] = { N1, N2 };
3370  return getNode(Opcode, VTList, Ops, 2);
3371}
3372
3373SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3374                                SDOperand N1, SDOperand N2, SDOperand N3) {
3375  SDOperand Ops[] = { N1, N2, N3 };
3376  return getNode(Opcode, VTList, Ops, 3);
3377}
3378
3379SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3380                                SDOperand N1, SDOperand N2, SDOperand N3,
3381                                SDOperand N4) {
3382  SDOperand Ops[] = { N1, N2, N3, N4 };
3383  return getNode(Opcode, VTList, Ops, 4);
3384}
3385
3386SDOperand SelectionDAG::getNode(unsigned Opcode, SDVTList VTList,
3387                                SDOperand N1, SDOperand N2, SDOperand N3,
3388                                SDOperand N4, SDOperand N5) {
3389  SDOperand Ops[] = { N1, N2, N3, N4, N5 };
3390  return getNode(Opcode, VTList, Ops, 5);
3391}
3392
3393SDVTList SelectionDAG::getVTList(MVT VT) {
3394  return makeVTList(SDNode::getValueTypeList(VT), 1);
3395}
3396
3397SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
3398  for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
3399       E = VTList.end(); I != E; ++I) {
3400    if (I->size() == 2 && (*I)[0] == VT1 && (*I)[1] == VT2)
3401      return makeVTList(&(*I)[0], 2);
3402  }
3403  std::vector<MVT> V;
3404  V.push_back(VT1);
3405  V.push_back(VT2);
3406  VTList.push_front(V);
3407  return makeVTList(&(*VTList.begin())[0], 2);
3408}
3409SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2,
3410                                 MVT VT3) {
3411  for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
3412       E = VTList.end(); I != E; ++I) {
3413    if (I->size() == 3 && (*I)[0] == VT1 && (*I)[1] == VT2 &&
3414        (*I)[2] == VT3)
3415      return makeVTList(&(*I)[0], 3);
3416  }
3417  std::vector<MVT> V;
3418  V.push_back(VT1);
3419  V.push_back(VT2);
3420  V.push_back(VT3);
3421  VTList.push_front(V);
3422  return makeVTList(&(*VTList.begin())[0], 3);
3423}
3424
3425SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
3426  switch (NumVTs) {
3427    case 0: assert(0 && "Cannot have nodes without results!");
3428    case 1: return getVTList(VTs[0]);
3429    case 2: return getVTList(VTs[0], VTs[1]);
3430    case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
3431    default: break;
3432  }
3433
3434  for (std::list<std::vector<MVT> >::iterator I = VTList.begin(),
3435       E = VTList.end(); I != E; ++I) {
3436    if (I->size() != NumVTs || VTs[0] != (*I)[0] || VTs[1] != (*I)[1]) continue;
3437
3438    bool NoMatch = false;
3439    for (unsigned i = 2; i != NumVTs; ++i)
3440      if (VTs[i] != (*I)[i]) {
3441        NoMatch = true;
3442        break;
3443      }
3444    if (!NoMatch)
3445      return makeVTList(&*I->begin(), NumVTs);
3446  }
3447
3448  VTList.push_front(std::vector<MVT>(VTs, VTs+NumVTs));
3449  return makeVTList(&*VTList.begin()->begin(), NumVTs);
3450}
3451
3452
3453/// UpdateNodeOperands - *Mutate* the specified node in-place to have the
3454/// specified operands.  If the resultant node already exists in the DAG,
3455/// this does not modify the specified node, instead it returns the node that
3456/// already exists.  If the resultant node does not exist in the DAG, the
3457/// input node is returned.  As a degenerate case, if you specify the same
3458/// input operands as the node already has, the input node is returned.
3459SDOperand SelectionDAG::
3460UpdateNodeOperands(SDOperand InN, SDOperand Op) {
3461  SDNode *N = InN.Val;
3462  assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
3463
3464  // Check to see if there is no change.
3465  if (Op == N->getOperand(0)) return InN;
3466
3467  // See if the modified node already exists.
3468  void *InsertPos = 0;
3469  if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
3470    return SDOperand(Existing, InN.ResNo);
3471
3472  // Nope it doesn't.  Remove the node from it's current place in the maps.
3473  if (InsertPos)
3474    RemoveNodeFromCSEMaps(N);
3475
3476  // Now we update the operands.
3477  N->OperandList[0].getVal()->removeUser(0, N);
3478  N->OperandList[0] = Op;
3479  N->OperandList[0].setUser(N);
3480  Op.Val->addUser(0, N);
3481
3482  // If this gets put into a CSE map, add it.
3483  if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3484  return InN;
3485}
3486
3487SDOperand SelectionDAG::
3488UpdateNodeOperands(SDOperand InN, SDOperand Op1, SDOperand Op2) {
3489  SDNode *N = InN.Val;
3490  assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
3491
3492  // Check to see if there is no change.
3493  if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
3494    return InN;   // No operands changed, just return the input node.
3495
3496  // See if the modified node already exists.
3497  void *InsertPos = 0;
3498  if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
3499    return SDOperand(Existing, InN.ResNo);
3500
3501  // Nope it doesn't.  Remove the node from it's current place in the maps.
3502  if (InsertPos)
3503    RemoveNodeFromCSEMaps(N);
3504
3505  // Now we update the operands.
3506  if (N->OperandList[0] != Op1) {
3507    N->OperandList[0].getVal()->removeUser(0, N);
3508    N->OperandList[0] = Op1;
3509    N->OperandList[0].setUser(N);
3510    Op1.Val->addUser(0, N);
3511  }
3512  if (N->OperandList[1] != Op2) {
3513    N->OperandList[1].getVal()->removeUser(1, N);
3514    N->OperandList[1] = Op2;
3515    N->OperandList[1].setUser(N);
3516    Op2.Val->addUser(1, N);
3517  }
3518
3519  // If this gets put into a CSE map, add it.
3520  if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3521  return InN;
3522}
3523
3524SDOperand SelectionDAG::
3525UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2, SDOperand Op3) {
3526  SDOperand Ops[] = { Op1, Op2, Op3 };
3527  return UpdateNodeOperands(N, Ops, 3);
3528}
3529
3530SDOperand SelectionDAG::
3531UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2,
3532                   SDOperand Op3, SDOperand Op4) {
3533  SDOperand Ops[] = { Op1, Op2, Op3, Op4 };
3534  return UpdateNodeOperands(N, Ops, 4);
3535}
3536
3537SDOperand SelectionDAG::
3538UpdateNodeOperands(SDOperand N, SDOperand Op1, SDOperand Op2,
3539                   SDOperand Op3, SDOperand Op4, SDOperand Op5) {
3540  SDOperand Ops[] = { Op1, Op2, Op3, Op4, Op5 };
3541  return UpdateNodeOperands(N, Ops, 5);
3542}
3543
3544SDOperand SelectionDAG::
3545UpdateNodeOperands(SDOperand InN, SDOperandPtr Ops, unsigned NumOps) {
3546  SDNode *N = InN.Val;
3547  assert(N->getNumOperands() == NumOps &&
3548         "Update with wrong number of operands");
3549
3550  // Check to see if there is no change.
3551  bool AnyChange = false;
3552  for (unsigned i = 0; i != NumOps; ++i) {
3553    if (Ops[i] != N->getOperand(i)) {
3554      AnyChange = true;
3555      break;
3556    }
3557  }
3558
3559  // No operands changed, just return the input node.
3560  if (!AnyChange) return InN;
3561
3562  // See if the modified node already exists.
3563  void *InsertPos = 0;
3564  if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
3565    return SDOperand(Existing, InN.ResNo);
3566
3567  // Nope it doesn't.  Remove the node from its current place in the maps.
3568  if (InsertPos)
3569    RemoveNodeFromCSEMaps(N);
3570
3571  // Now we update the operands.
3572  for (unsigned i = 0; i != NumOps; ++i) {
3573    if (N->OperandList[i] != Ops[i]) {
3574      N->OperandList[i].getVal()->removeUser(i, N);
3575      N->OperandList[i] = Ops[i];
3576      N->OperandList[i].setUser(N);
3577      Ops[i].Val->addUser(i, N);
3578    }
3579  }
3580
3581  // If this gets put into a CSE map, add it.
3582  if (InsertPos) CSEMap.InsertNode(N, InsertPos);
3583  return InN;
3584}
3585
3586/// MorphNodeTo - This frees the operands of the current node, resets the
3587/// opcode, types, and operands to the specified value.  This should only be
3588/// used by the SelectionDAG class.
3589void SDNode::MorphNodeTo(unsigned Opc, SDVTList L,
3590                         SDOperandPtr Ops, unsigned NumOps) {
3591  NodeType = Opc;
3592  ValueList = L.VTs;
3593  NumValues = L.NumVTs;
3594
3595  // Clear the operands list, updating used nodes to remove this from their
3596  // use list.
3597  for (op_iterator I = op_begin(), E = op_end(); I != E; ++I)
3598    I->getVal()->removeUser(std::distance(op_begin(), I), this);
3599
3600  // If NumOps is larger than the # of operands we currently have, reallocate
3601  // the operand list.
3602  if (NumOps > NumOperands) {
3603    if (OperandsNeedDelete) {
3604      delete [] OperandList;
3605    }
3606    OperandList = new SDUse[NumOps];
3607    OperandsNeedDelete = true;
3608  }
3609
3610  // Assign the new operands.
3611  NumOperands = NumOps;
3612
3613  for (unsigned i = 0, e = NumOps; i != e; ++i) {
3614    OperandList[i] = Ops[i];
3615    OperandList[i].setUser(this);
3616    SDNode *N = OperandList[i].getVal();
3617    N->addUser(i, this);
3618    ++N->UsesSize;
3619  }
3620}
3621
3622/// SelectNodeTo - These are used for target selectors to *mutate* the
3623/// specified node to have the specified return type, Target opcode, and
3624/// operands.  Note that target opcodes are stored as
3625/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field.
3626///
3627/// Note that SelectNodeTo returns the resultant node.  If there is already a
3628/// node of the specified opcode and operands, it returns that node instead of
3629/// the current one.
3630SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3631                                   MVT VT) {
3632  SDVTList VTs = getVTList(VT);
3633  FoldingSetNodeID ID;
3634  AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, (SDOperand*)0, 0);
3635  void *IP = 0;
3636  if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3637    return ON;
3638
3639  RemoveNodeFromCSEMaps(N);
3640
3641  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, SDOperandPtr(), 0);
3642
3643  CSEMap.InsertNode(N, IP);
3644  return N;
3645}
3646
3647SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3648                                   MVT VT, SDOperand Op1) {
3649  // If an identical node already exists, use it.
3650  SDVTList VTs = getVTList(VT);
3651  SDOperand Ops[] = { Op1 };
3652
3653  FoldingSetNodeID ID;
3654  AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1);
3655  void *IP = 0;
3656  if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3657    return ON;
3658
3659  RemoveNodeFromCSEMaps(N);
3660  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 1);
3661  CSEMap.InsertNode(N, IP);
3662  return N;
3663}
3664
3665SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3666                                   MVT VT, SDOperand Op1,
3667                                   SDOperand Op2) {
3668  // If an identical node already exists, use it.
3669  SDVTList VTs = getVTList(VT);
3670  SDOperand Ops[] = { Op1, Op2 };
3671
3672  FoldingSetNodeID ID;
3673  AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
3674  void *IP = 0;
3675  if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3676    return ON;
3677
3678  RemoveNodeFromCSEMaps(N);
3679
3680  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
3681
3682  CSEMap.InsertNode(N, IP);   // Memoize the new node.
3683  return N;
3684}
3685
3686SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3687                                   MVT VT, SDOperand Op1,
3688                                   SDOperand Op2, SDOperand Op3) {
3689  // If an identical node already exists, use it.
3690  SDVTList VTs = getVTList(VT);
3691  SDOperand Ops[] = { Op1, Op2, Op3 };
3692  FoldingSetNodeID ID;
3693  AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
3694  void *IP = 0;
3695  if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3696    return ON;
3697
3698  RemoveNodeFromCSEMaps(N);
3699
3700  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
3701
3702  CSEMap.InsertNode(N, IP);   // Memoize the new node.
3703  return N;
3704}
3705
3706SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3707                                   MVT VT, SDOperandPtr Ops,
3708                                   unsigned NumOps) {
3709  // If an identical node already exists, use it.
3710  SDVTList VTs = getVTList(VT);
3711  FoldingSetNodeID ID;
3712  AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps);
3713  void *IP = 0;
3714  if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3715    return ON;
3716
3717  RemoveNodeFromCSEMaps(N);
3718  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, NumOps);
3719
3720  CSEMap.InsertNode(N, IP);   // Memoize the new node.
3721  return N;
3722}
3723
3724SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3725                                   MVT VT1, MVT VT2,
3726                                   SDOperand Op1, SDOperand Op2) {
3727  SDVTList VTs = getVTList(VT1, VT2);
3728  FoldingSetNodeID ID;
3729  SDOperand Ops[] = { Op1, Op2 };
3730  AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
3731  void *IP = 0;
3732  if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3733    return ON;
3734
3735  RemoveNodeFromCSEMaps(N);
3736  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 2);
3737  CSEMap.InsertNode(N, IP);   // Memoize the new node.
3738  return N;
3739}
3740
3741SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc,
3742                                   MVT VT1, MVT VT2,
3743                                   SDOperand Op1, SDOperand Op2,
3744                                   SDOperand Op3) {
3745  // If an identical node already exists, use it.
3746  SDVTList VTs = getVTList(VT1, VT2);
3747  SDOperand Ops[] = { Op1, Op2, Op3 };
3748  FoldingSetNodeID ID;
3749  AddNodeIDNode(ID, ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
3750  void *IP = 0;
3751  if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
3752    return ON;
3753
3754  RemoveNodeFromCSEMaps(N);
3755
3756  N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc, VTs, Ops, 3);
3757  CSEMap.InsertNode(N, IP);   // Memoize the new node.
3758  return N;
3759}
3760
3761
3762/// getTargetNode - These are used for target selectors to create a new node
3763/// with specified return type(s), target opcode, and operands.
3764///
3765/// Note that getTargetNode returns the resultant node.  If there is already a
3766/// node of the specified opcode and operands, it returns that node instead of
3767/// the current one.
3768SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) {
3769  return getNode(ISD::BUILTIN_OP_END+Opcode, VT).Val;
3770}
3771SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDOperand Op1) {
3772  return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1).Val;
3773}
3774SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
3775                                    SDOperand Op1, SDOperand Op2) {
3776  return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2).Val;
3777}
3778SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
3779                                    SDOperand Op1, SDOperand Op2,
3780                                    SDOperand Op3) {
3781  return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Op1, Op2, Op3).Val;
3782}
3783SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT,
3784                                    SDOperandPtr Ops, unsigned NumOps) {
3785  return getNode(ISD::BUILTIN_OP_END+Opcode, VT, Ops, NumOps).Val;
3786}
3787SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) {
3788  const MVT *VTs = getNodeValueTypes(VT1, VT2);
3789  SDOperand Op;
3790  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op, 0).Val;
3791}
3792SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
3793                                    MVT VT2, SDOperand Op1) {
3794  const MVT *VTs = getNodeValueTypes(VT1, VT2);
3795  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, &Op1, 1).Val;
3796}
3797SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
3798                                    MVT VT2, SDOperand Op1,
3799                                    SDOperand Op2) {
3800  const MVT *VTs = getNodeValueTypes(VT1, VT2);
3801  SDOperand Ops[] = { Op1, Op2 };
3802  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 2).Val;
3803}
3804SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
3805                                    MVT VT2, SDOperand Op1,
3806                                    SDOperand Op2, SDOperand Op3) {
3807  const MVT *VTs = getNodeValueTypes(VT1, VT2);
3808  SDOperand Ops[] = { Op1, Op2, Op3 };
3809  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, 3).Val;
3810}
3811SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2,
3812                                    SDOperandPtr Ops, unsigned NumOps) {
3813  const MVT *VTs = getNodeValueTypes(VT1, VT2);
3814  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 2, Ops, NumOps).Val;
3815}
3816SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
3817                                    SDOperand Op1, SDOperand Op2) {
3818  const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
3819  SDOperand Ops[] = { Op1, Op2 };
3820  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 2).Val;
3821}
3822SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
3823                                    SDOperand Op1, SDOperand Op2,
3824                                    SDOperand Op3) {
3825  const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
3826  SDOperand Ops[] = { Op1, Op2, Op3 };
3827  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, 3).Val;
3828}
3829SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3,
3830                                    SDOperandPtr Ops, unsigned NumOps) {
3831  const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3);
3832  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 3, Ops, NumOps).Val;
3833}
3834SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1,
3835                                    MVT VT2, MVT VT3, MVT VT4,
3836                                    SDOperandPtr Ops, unsigned NumOps) {
3837  std::vector<MVT> VTList;
3838  VTList.push_back(VT1);
3839  VTList.push_back(VT2);
3840  VTList.push_back(VT3);
3841  VTList.push_back(VT4);
3842  const MVT *VTs = getNodeValueTypes(VTList);
3843  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, 4, Ops, NumOps).Val;
3844}
3845SDNode *SelectionDAG::getTargetNode(unsigned Opcode,
3846                                    std::vector<MVT> &ResultTys,
3847                                    SDOperandPtr Ops, unsigned NumOps) {
3848  const MVT *VTs = getNodeValueTypes(ResultTys);
3849  return getNode(ISD::BUILTIN_OP_END+Opcode, VTs, ResultTys.size(),
3850                 Ops, NumOps).Val;
3851}
3852
3853/// getNodeIfExists - Get the specified node if it's already available, or
3854/// else return NULL.
3855SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
3856                                      SDOperandPtr Ops, unsigned NumOps) {
3857  if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
3858    FoldingSetNodeID ID;
3859    AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
3860    void *IP = 0;
3861    if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3862      return E;
3863  }
3864  return NULL;
3865}
3866
3867
3868/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
3869/// This can cause recursive merging of nodes in the DAG.
3870///
3871/// This version assumes From has a single result value.
3872///
3873void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand To,
3874                                      DAGUpdateListener *UpdateListener) {
3875  SDNode *From = FromN.Val;
3876  assert(From->getNumValues() == 1 && FromN.ResNo == 0 &&
3877         "Cannot replace with this method!");
3878  assert(From != To.Val && "Cannot replace uses of with self");
3879
3880  while (!From->use_empty()) {
3881    SDNode::use_iterator UI = From->use_begin();
3882    SDNode *U = UI->getUser();
3883
3884    // This node is about to morph, remove its old self from the CSE maps.
3885    RemoveNodeFromCSEMaps(U);
3886    int operandNum = 0;
3887    for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
3888         I != E; ++I, ++operandNum)
3889      if (I->getVal() == From) {
3890        From->removeUser(operandNum, U);
3891        *I = To;
3892        I->setUser(U);
3893        To.Val->addUser(operandNum, U);
3894      }
3895
3896    // Now that we have modified U, add it back to the CSE maps.  If it already
3897    // exists there, recursively merge the results together.
3898    if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
3899      ReplaceAllUsesWith(U, Existing, UpdateListener);
3900      // U is now dead.  Inform the listener if it exists and delete it.
3901      if (UpdateListener)
3902        UpdateListener->NodeDeleted(U, Existing);
3903      DeleteNodeNotInCSEMaps(U);
3904    } else {
3905      // If the node doesn't already exist, we updated it.  Inform a listener if
3906      // it exists.
3907      if (UpdateListener)
3908        UpdateListener->NodeUpdated(U);
3909    }
3910  }
3911}
3912
3913/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
3914/// This can cause recursive merging of nodes in the DAG.
3915///
3916/// This version assumes From/To have matching types and numbers of result
3917/// values.
3918///
3919void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
3920                                      DAGUpdateListener *UpdateListener) {
3921  assert(From != To && "Cannot replace uses of with self");
3922  assert(From->getNumValues() == To->getNumValues() &&
3923         "Cannot use this version of ReplaceAllUsesWith!");
3924  if (From->getNumValues() == 1)   // If possible, use the faster version.
3925    return ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0),
3926                              UpdateListener);
3927
3928  while (!From->use_empty()) {
3929    SDNode::use_iterator UI = From->use_begin();
3930    SDNode *U = UI->getUser();
3931
3932    // This node is about to morph, remove its old self from the CSE maps.
3933    RemoveNodeFromCSEMaps(U);
3934    int operandNum = 0;
3935    for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
3936         I != E; ++I, ++operandNum)
3937      if (I->getVal() == From) {
3938        From->removeUser(operandNum, U);
3939        I->getVal() = To;
3940        To->addUser(operandNum, U);
3941      }
3942
3943    // Now that we have modified U, add it back to the CSE maps.  If it already
3944    // exists there, recursively merge the results together.
3945    if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
3946      ReplaceAllUsesWith(U, Existing, UpdateListener);
3947      // U is now dead.  Inform the listener if it exists and delete it.
3948      if (UpdateListener)
3949        UpdateListener->NodeDeleted(U, Existing);
3950      DeleteNodeNotInCSEMaps(U);
3951    } else {
3952      // If the node doesn't already exist, we updated it.  Inform a listener if
3953      // it exists.
3954      if (UpdateListener)
3955        UpdateListener->NodeUpdated(U);
3956    }
3957  }
3958}
3959
3960/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
3961/// This can cause recursive merging of nodes in the DAG.
3962///
3963/// This version can replace From with any result values.  To must match the
3964/// number and types of values returned by From.
3965void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
3966                                      SDOperandPtr To,
3967                                      DAGUpdateListener *UpdateListener) {
3968  if (From->getNumValues() == 1)  // Handle the simple case efficiently.
3969    return ReplaceAllUsesWith(SDOperand(From, 0), To[0], UpdateListener);
3970
3971  while (!From->use_empty()) {
3972    SDNode::use_iterator UI = From->use_begin();
3973    SDNode *U = UI->getUser();
3974
3975    // This node is about to morph, remove its old self from the CSE maps.
3976    RemoveNodeFromCSEMaps(U);
3977    int operandNum = 0;
3978    for (SDNode::op_iterator I = U->op_begin(), E = U->op_end();
3979         I != E; ++I, ++operandNum)
3980      if (I->getVal() == From) {
3981        const SDOperand &ToOp = To[I->getSDOperand().ResNo];
3982        From->removeUser(operandNum, U);
3983        *I = ToOp;
3984        I->setUser(U);
3985        ToOp.Val->addUser(operandNum, U);
3986      }
3987
3988    // Now that we have modified U, add it back to the CSE maps.  If it already
3989    // exists there, recursively merge the results together.
3990    if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) {
3991      ReplaceAllUsesWith(U, Existing, UpdateListener);
3992      // U is now dead.  Inform the listener if it exists and delete it.
3993      if (UpdateListener)
3994        UpdateListener->NodeDeleted(U, Existing);
3995      DeleteNodeNotInCSEMaps(U);
3996    } else {
3997      // If the node doesn't already exist, we updated it.  Inform a listener if
3998      // it exists.
3999      if (UpdateListener)
4000        UpdateListener->NodeUpdated(U);
4001    }
4002  }
4003}
4004
4005namespace {
4006  /// ChainedSetUpdaterListener - This class is a DAGUpdateListener that removes
4007  /// any deleted nodes from the set passed into its constructor and recursively
4008  /// notifies another update listener if specified.
4009  class ChainedSetUpdaterListener :
4010  public SelectionDAG::DAGUpdateListener {
4011    SmallSetVector<SDNode*, 16> &Set;
4012    SelectionDAG::DAGUpdateListener *Chain;
4013  public:
4014    ChainedSetUpdaterListener(SmallSetVector<SDNode*, 16> &set,
4015                              SelectionDAG::DAGUpdateListener *chain)
4016      : Set(set), Chain(chain) {}
4017
4018    virtual void NodeDeleted(SDNode *N, SDNode *E) {
4019      Set.remove(N);
4020      if (Chain) Chain->NodeDeleted(N, E);
4021    }
4022    virtual void NodeUpdated(SDNode *N) {
4023      if (Chain) Chain->NodeUpdated(N);
4024    }
4025  };
4026}
4027
4028/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
4029/// uses of other values produced by From.Val alone.  The Deleted vector is
4030/// handled the same way as for ReplaceAllUsesWith.
4031void SelectionDAG::ReplaceAllUsesOfValueWith(SDOperand From, SDOperand To,
4032                                             DAGUpdateListener *UpdateListener){
4033  assert(From != To && "Cannot replace a value with itself");
4034
4035  // Handle the simple, trivial, case efficiently.
4036  if (From.Val->getNumValues() == 1) {
4037    ReplaceAllUsesWith(From, To, UpdateListener);
4038    return;
4039  }
4040
4041  if (From.use_empty()) return;
4042
4043  // Get all of the users of From.Val.  We want these in a nice,
4044  // deterministically ordered and uniqued set, so we use a SmallSetVector.
4045  SmallSetVector<SDNode*, 16> Users;
4046  for (SDNode::use_iterator UI = From.Val->use_begin(),
4047      E = From.Val->use_end(); UI != E; ++UI) {
4048    SDNode *User = UI->getUser();
4049    if (!Users.count(User))
4050      Users.insert(User);
4051  }
4052
4053  // When one of the recursive merges deletes nodes from the graph, we need to
4054  // make sure that UpdateListener is notified *and* that the node is removed
4055  // from Users if present.  CSUL does this.
4056  ChainedSetUpdaterListener CSUL(Users, UpdateListener);
4057
4058  while (!Users.empty()) {
4059    // We know that this user uses some value of From.  If it is the right
4060    // value, update it.
4061    SDNode *User = Users.back();
4062    Users.pop_back();
4063
4064    // Scan for an operand that matches From.
4065    SDNode::op_iterator Op = User->op_begin(), E = User->op_end();
4066    for (; Op != E; ++Op)
4067      if (*Op == From) break;
4068
4069    // If there are no matches, the user must use some other result of From.
4070    if (Op == E) continue;
4071
4072    // Okay, we know this user needs to be updated.  Remove its old self
4073    // from the CSE maps.
4074    RemoveNodeFromCSEMaps(User);
4075
4076    // Update all operands that match "From" in case there are multiple uses.
4077    for (; Op != E; ++Op) {
4078      if (*Op == From) {
4079        From.Val->removeUser(Op-User->op_begin(), User);
4080        *Op = To;
4081        Op->setUser(User);
4082        To.Val->addUser(Op-User->op_begin(), User);
4083      }
4084    }
4085
4086    // Now that we have modified User, add it back to the CSE maps.  If it
4087    // already exists there, recursively merge the results together.
4088    SDNode *Existing = AddNonLeafNodeToCSEMaps(User);
4089    if (!Existing) {
4090      if (UpdateListener) UpdateListener->NodeUpdated(User);
4091      continue;  // Continue on to next user.
4092    }
4093
4094    // If there was already an existing matching node, use ReplaceAllUsesWith
4095    // to replace the dead one with the existing one.  This can cause
4096    // recursive merging of other unrelated nodes down the line.  The merging
4097    // can cause deletion of nodes that used the old value.  To handle this, we
4098    // use CSUL to remove them from the Users set.
4099    ReplaceAllUsesWith(User, Existing, &CSUL);
4100
4101    // User is now dead.  Notify a listener if present.
4102    if (UpdateListener) UpdateListener->NodeDeleted(User, Existing);
4103    DeleteNodeNotInCSEMaps(User);
4104  }
4105}
4106
4107/// AssignNodeIds - Assign a unique node id for each node in the DAG based on
4108/// their allnodes order. It returns the maximum id.
4109unsigned SelectionDAG::AssignNodeIds() {
4110  unsigned Id = 0;
4111  for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I){
4112    SDNode *N = I;
4113    N->setNodeId(Id++);
4114  }
4115  return Id;
4116}
4117
4118/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
4119/// based on their topological order. It returns the maximum id and a vector
4120/// of the SDNodes* in assigned order by reference.
4121unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) {
4122  unsigned DAGSize = AllNodes.size();
4123  std::vector<unsigned> InDegree(DAGSize);
4124  std::vector<SDNode*> Sources;
4125
4126  // Use a two pass approach to avoid using a std::map which is slow.
4127  unsigned Id = 0;
4128  for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){
4129    SDNode *N = I;
4130    N->setNodeId(Id++);
4131    unsigned Degree = N->use_size();
4132    InDegree[N->getNodeId()] = Degree;
4133    if (Degree == 0)
4134      Sources.push_back(N);
4135  }
4136
4137  TopOrder.clear();
4138  while (!Sources.empty()) {
4139    SDNode *N = Sources.back();
4140    Sources.pop_back();
4141    TopOrder.push_back(N);
4142    for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
4143      SDNode *P = I->getVal();
4144      unsigned Degree = --InDegree[P->getNodeId()];
4145      if (Degree == 0)
4146        Sources.push_back(P);
4147    }
4148  }
4149
4150  // Second pass, assign the actual topological order as node ids.
4151  Id = 0;
4152  for (std::vector<SDNode*>::iterator TI = TopOrder.begin(),TE = TopOrder.end();
4153       TI != TE; ++TI)
4154    (*TI)->setNodeId(Id++);
4155
4156  return Id;
4157}
4158
4159
4160
4161//===----------------------------------------------------------------------===//
4162//                              SDNode Class
4163//===----------------------------------------------------------------------===//
4164
4165// Out-of-line virtual method to give class a home.
4166void SDNode::ANCHOR() {}
4167void UnarySDNode::ANCHOR() {}
4168void BinarySDNode::ANCHOR() {}
4169void TernarySDNode::ANCHOR() {}
4170void HandleSDNode::ANCHOR() {}
4171void StringSDNode::ANCHOR() {}
4172void ConstantSDNode::ANCHOR() {}
4173void ConstantFPSDNode::ANCHOR() {}
4174void GlobalAddressSDNode::ANCHOR() {}
4175void FrameIndexSDNode::ANCHOR() {}
4176void JumpTableSDNode::ANCHOR() {}
4177void ConstantPoolSDNode::ANCHOR() {}
4178void BasicBlockSDNode::ANCHOR() {}
4179void SrcValueSDNode::ANCHOR() {}
4180void MemOperandSDNode::ANCHOR() {}
4181void RegisterSDNode::ANCHOR() {}
4182void ExternalSymbolSDNode::ANCHOR() {}
4183void CondCodeSDNode::ANCHOR() {}
4184void ARG_FLAGSSDNode::ANCHOR() {}
4185void VTSDNode::ANCHOR() {}
4186void MemSDNode::ANCHOR() {}
4187void LoadSDNode::ANCHOR() {}
4188void StoreSDNode::ANCHOR() {}
4189void AtomicSDNode::ANCHOR() {}
4190
4191HandleSDNode::~HandleSDNode() {
4192  SDVTList VTs = { 0, 0 };
4193  MorphNodeTo(ISD::HANDLENODE, VTs, SDOperandPtr(), 0);  // Drops operand uses.
4194}
4195
4196GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA,
4197                                         MVT VT, int o)
4198  : SDNode(isa<GlobalVariable>(GA) &&
4199           cast<GlobalVariable>(GA)->isThreadLocal() ?
4200           // Thread Local
4201           (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) :
4202           // Non Thread Local
4203           (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress),
4204           getSDVTList(VT)), Offset(o) {
4205  TheGlobal = const_cast<GlobalValue*>(GA);
4206}
4207
4208/// getMemOperand - Return a MachineMemOperand object describing the memory
4209/// reference performed by this atomic.
4210MachineMemOperand AtomicSDNode::getMemOperand() const {
4211  int Size = (getValueType(0).getSizeInBits() + 7) >> 3;
4212  int Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
4213  if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4214
4215  // Check if the atomic references a frame index
4216  const FrameIndexSDNode *FI =
4217  dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
4218  if (!getSrcValue() && FI)
4219    return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags,
4220                             FI->getIndex(), Size, getAlignment());
4221  else
4222    return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(),
4223                             Size, getAlignment());
4224}
4225
4226/// getMemOperand - Return a MachineMemOperand object describing the memory
4227/// reference performed by this load or store.
4228MachineMemOperand LSBaseSDNode::getMemOperand() const {
4229  int Size = (getMemoryVT().getSizeInBits() + 7) >> 3;
4230  int Flags =
4231    getOpcode() == ISD::LOAD ? MachineMemOperand::MOLoad :
4232                               MachineMemOperand::MOStore;
4233  if (isVolatile()) Flags |= MachineMemOperand::MOVolatile;
4234
4235  // Check if the load references a frame index, and does not have
4236  // an SV attached.
4237  const FrameIndexSDNode *FI =
4238    dyn_cast<const FrameIndexSDNode>(getBasePtr().Val);
4239  if (!getSrcValue() && FI)
4240    return MachineMemOperand(PseudoSourceValue::getFixedStack(), Flags,
4241                             FI->getIndex(), Size, getAlignment());
4242  else
4243    return MachineMemOperand(getSrcValue(), Flags,
4244                             getSrcValueOffset(), Size, getAlignment());
4245}
4246
4247/// Profile - Gather unique data for the node.
4248///
4249void SDNode::Profile(FoldingSetNodeID &ID) {
4250  AddNodeIDNode(ID, this);
4251}
4252
4253/// getValueTypeList - Return a pointer to the specified value type.
4254///
4255const MVT *SDNode::getValueTypeList(MVT VT) {
4256  if (VT.isExtended()) {
4257    static std::set<MVT, MVT::compareRawBits> EVTs;
4258    return &(*EVTs.insert(VT).first);
4259  } else {
4260    static MVT VTs[MVT::LAST_VALUETYPE];
4261    VTs[VT.getSimpleVT()] = VT;
4262    return &VTs[VT.getSimpleVT()];
4263  }
4264}
4265
4266/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
4267/// indicated value.  This method ignores uses of other values defined by this
4268/// operation.
4269bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
4270  assert(Value < getNumValues() && "Bad value!");
4271
4272  // If there is only one value, this is easy.
4273  if (getNumValues() == 1)
4274    return use_size() == NUses;
4275  if (use_size() < NUses) return false;
4276
4277  SDOperand TheValue(const_cast<SDNode *>(this), Value);
4278
4279  SmallPtrSet<SDNode*, 32> UsersHandled;
4280
4281  // TODO: Only iterate over uses of a given value of the node
4282  for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4283    if (*UI == TheValue) {
4284      if (NUses == 0)
4285        return false;
4286      --NUses;
4287    }
4288  }
4289
4290  // Found exactly the right number of uses?
4291  return NUses == 0;
4292}
4293
4294
4295/// hasAnyUseOfValue - Return true if there are any use of the indicated
4296/// value. This method ignores uses of other values defined by this operation.
4297bool SDNode::hasAnyUseOfValue(unsigned Value) const {
4298  assert(Value < getNumValues() && "Bad value!");
4299
4300  if (use_empty()) return false;
4301
4302  SDOperand TheValue(const_cast<SDNode *>(this), Value);
4303
4304  SmallPtrSet<SDNode*, 32> UsersHandled;
4305
4306  for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
4307    SDNode *User = UI->getUser();
4308    if (User->getNumOperands() == 1 ||
4309        UsersHandled.insert(User))     // First time we've seen this?
4310      for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i)
4311        if (User->getOperand(i) == TheValue) {
4312          return true;
4313        }
4314  }
4315
4316  return false;
4317}
4318
4319
4320/// isOnlyUseOf - Return true if this node is the only use of N.
4321///
4322bool SDNode::isOnlyUseOf(SDNode *N) const {
4323  bool Seen = false;
4324  for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
4325    SDNode *User = I->getUser();
4326    if (User == this)
4327      Seen = true;
4328    else
4329      return false;
4330  }
4331
4332  return Seen;
4333}
4334
4335/// isOperand - Return true if this node is an operand of N.
4336///
4337bool SDOperand::isOperandOf(SDNode *N) const {
4338  for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4339    if (*this == N->getOperand(i))
4340      return true;
4341  return false;
4342}
4343
4344bool SDNode::isOperandOf(SDNode *N) const {
4345  for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
4346    if (this == N->OperandList[i].getVal())
4347      return true;
4348  return false;
4349}
4350
4351/// reachesChainWithoutSideEffects - Return true if this operand (which must
4352/// be a chain) reaches the specified operand without crossing any
4353/// side-effecting instructions.  In practice, this looks through token
4354/// factors and non-volatile loads.  In order to remain efficient, this only
4355/// looks a couple of nodes in, it does not do an exhaustive search.
4356bool SDOperand::reachesChainWithoutSideEffects(SDOperand Dest,
4357                                               unsigned Depth) const {
4358  if (*this == Dest) return true;
4359
4360  // Don't search too deeply, we just want to be able to see through
4361  // TokenFactor's etc.
4362  if (Depth == 0) return false;
4363
4364  // If this is a token factor, all inputs to the TF happen in parallel.  If any
4365  // of the operands of the TF reach dest, then we can do the xform.
4366  if (getOpcode() == ISD::TokenFactor) {
4367    for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
4368      if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
4369        return true;
4370    return false;
4371  }
4372
4373  // Loads don't have side effects, look through them.
4374  if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
4375    if (!Ld->isVolatile())
4376      return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
4377  }
4378  return false;
4379}
4380
4381
4382static void findPredecessor(SDNode *N, const SDNode *P, bool &found,
4383                            SmallPtrSet<SDNode *, 32> &Visited) {
4384  if (found || !Visited.insert(N))
4385    return;
4386
4387  for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) {
4388    SDNode *Op = N->getOperand(i).Val;
4389    if (Op == P) {
4390      found = true;
4391      return;
4392    }
4393    findPredecessor(Op, P, found, Visited);
4394  }
4395}
4396
4397/// isPredecessorOf - Return true if this node is a predecessor of N. This node
4398/// is either an operand of N or it can be reached by recursively traversing
4399/// up the operands.
4400/// NOTE: this is an expensive method. Use it carefully.
4401bool SDNode::isPredecessorOf(SDNode *N) const {
4402  SmallPtrSet<SDNode *, 32> Visited;
4403  bool found = false;
4404  findPredecessor(N, this, found, Visited);
4405  return found;
4406}
4407
4408uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
4409  assert(Num < NumOperands && "Invalid child # of SDNode!");
4410  return cast<ConstantSDNode>(OperandList[Num])->getValue();
4411}
4412
4413std::string SDNode::getOperationName(const SelectionDAG *G) const {
4414  switch (getOpcode()) {
4415  default:
4416    if (getOpcode() < ISD::BUILTIN_OP_END)
4417      return "<<Unknown DAG Node>>";
4418    else {
4419      if (G) {
4420        if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo())
4421          if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes())
4422            return TII->get(getOpcode()-ISD::BUILTIN_OP_END).getName();
4423
4424        TargetLowering &TLI = G->getTargetLoweringInfo();
4425        const char *Name =
4426          TLI.getTargetNodeName(getOpcode());
4427        if (Name) return Name;
4428      }
4429
4430      return "<<Unknown Target Node>>";
4431    }
4432
4433  case ISD::PREFETCH:      return "Prefetch";
4434  case ISD::MEMBARRIER:    return "MemBarrier";
4435  case ISD::ATOMIC_CMP_SWAP:  return "AtomicCmpSwap";
4436  case ISD::ATOMIC_LOAD_ADD:  return "AtomicLoadAdd";
4437  case ISD::ATOMIC_LOAD_SUB:  return "AtomicLoadSub";
4438  case ISD::ATOMIC_LOAD_AND:  return "AtomicLoadAnd";
4439  case ISD::ATOMIC_LOAD_OR:   return "AtomicLoadOr";
4440  case ISD::ATOMIC_LOAD_XOR:  return "AtomicLoadXor";
4441  case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
4442  case ISD::ATOMIC_LOAD_MIN:  return "AtomicLoadMin";
4443  case ISD::ATOMIC_LOAD_MAX:  return "AtomicLoadMax";
4444  case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
4445  case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
4446  case ISD::ATOMIC_SWAP:   return "AtomicSWAP";
4447  case ISD::PCMARKER:      return "PCMarker";
4448  case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
4449  case ISD::SRCVALUE:      return "SrcValue";
4450  case ISD::MEMOPERAND:    return "MemOperand";
4451  case ISD::EntryToken:    return "EntryToken";
4452  case ISD::TokenFactor:   return "TokenFactor";
4453  case ISD::AssertSext:    return "AssertSext";
4454  case ISD::AssertZext:    return "AssertZext";
4455
4456  case ISD::STRING:        return "String";
4457  case ISD::BasicBlock:    return "BasicBlock";
4458  case ISD::ARG_FLAGS:     return "ArgFlags";
4459  case ISD::VALUETYPE:     return "ValueType";
4460  case ISD::Register:      return "Register";
4461
4462  case ISD::Constant:      return "Constant";
4463  case ISD::ConstantFP:    return "ConstantFP";
4464  case ISD::GlobalAddress: return "GlobalAddress";
4465  case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
4466  case ISD::FrameIndex:    return "FrameIndex";
4467  case ISD::JumpTable:     return "JumpTable";
4468  case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
4469  case ISD::RETURNADDR: return "RETURNADDR";
4470  case ISD::FRAMEADDR: return "FRAMEADDR";
4471  case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
4472  case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR";
4473  case ISD::EHSELECTION: return "EHSELECTION";
4474  case ISD::EH_RETURN: return "EH_RETURN";
4475  case ISD::ConstantPool:  return "ConstantPool";
4476  case ISD::ExternalSymbol: return "ExternalSymbol";
4477  case ISD::INTRINSIC_WO_CHAIN: {
4478    unsigned IID = cast<ConstantSDNode>(getOperand(0))->getValue();
4479    return Intrinsic::getName((Intrinsic::ID)IID);
4480  }
4481  case ISD::INTRINSIC_VOID:
4482  case ISD::INTRINSIC_W_CHAIN: {
4483    unsigned IID = cast<ConstantSDNode>(getOperand(1))->getValue();
4484    return Intrinsic::getName((Intrinsic::ID)IID);
4485  }
4486
4487  case ISD::BUILD_VECTOR:   return "BUILD_VECTOR";
4488  case ISD::TargetConstant: return "TargetConstant";
4489  case ISD::TargetConstantFP:return "TargetConstantFP";
4490  case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
4491  case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
4492  case ISD::TargetFrameIndex: return "TargetFrameIndex";
4493  case ISD::TargetJumpTable:  return "TargetJumpTable";
4494  case ISD::TargetConstantPool:  return "TargetConstantPool";
4495  case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
4496
4497  case ISD::CopyToReg:     return "CopyToReg";
4498  case ISD::CopyFromReg:   return "CopyFromReg";
4499  case ISD::UNDEF:         return "undef";
4500  case ISD::MERGE_VALUES:  return "merge_values";
4501  case ISD::INLINEASM:     return "inlineasm";
4502  case ISD::LABEL:         return "label";
4503  case ISD::DECLARE:       return "declare";
4504  case ISD::HANDLENODE:    return "handlenode";
4505  case ISD::FORMAL_ARGUMENTS: return "formal_arguments";
4506  case ISD::CALL:          return "call";
4507
4508  // Unary operators
4509  case ISD::FABS:   return "fabs";
4510  case ISD::FNEG:   return "fneg";
4511  case ISD::FSQRT:  return "fsqrt";
4512  case ISD::FSIN:   return "fsin";
4513  case ISD::FCOS:   return "fcos";
4514  case ISD::FPOWI:  return "fpowi";
4515  case ISD::FPOW:   return "fpow";
4516
4517  // Binary operators
4518  case ISD::ADD:    return "add";
4519  case ISD::SUB:    return "sub";
4520  case ISD::MUL:    return "mul";
4521  case ISD::MULHU:  return "mulhu";
4522  case ISD::MULHS:  return "mulhs";
4523  case ISD::SDIV:   return "sdiv";
4524  case ISD::UDIV:   return "udiv";
4525  case ISD::SREM:   return "srem";
4526  case ISD::UREM:   return "urem";
4527  case ISD::SMUL_LOHI:  return "smul_lohi";
4528  case ISD::UMUL_LOHI:  return "umul_lohi";
4529  case ISD::SDIVREM:    return "sdivrem";
4530  case ISD::UDIVREM:    return "divrem";
4531  case ISD::AND:    return "and";
4532  case ISD::OR:     return "or";
4533  case ISD::XOR:    return "xor";
4534  case ISD::SHL:    return "shl";
4535  case ISD::SRA:    return "sra";
4536  case ISD::SRL:    return "srl";
4537  case ISD::ROTL:   return "rotl";
4538  case ISD::ROTR:   return "rotr";
4539  case ISD::FADD:   return "fadd";
4540  case ISD::FSUB:   return "fsub";
4541  case ISD::FMUL:   return "fmul";
4542  case ISD::FDIV:   return "fdiv";
4543  case ISD::FREM:   return "frem";
4544  case ISD::FCOPYSIGN: return "fcopysign";
4545  case ISD::FGETSIGN:  return "fgetsign";
4546
4547  case ISD::SETCC:       return "setcc";
4548  case ISD::VSETCC:      return "vsetcc";
4549  case ISD::SELECT:      return "select";
4550  case ISD::SELECT_CC:   return "select_cc";
4551  case ISD::INSERT_VECTOR_ELT:   return "insert_vector_elt";
4552  case ISD::EXTRACT_VECTOR_ELT:  return "extract_vector_elt";
4553  case ISD::CONCAT_VECTORS:      return "concat_vectors";
4554  case ISD::EXTRACT_SUBVECTOR:   return "extract_subvector";
4555  case ISD::SCALAR_TO_VECTOR:    return "scalar_to_vector";
4556  case ISD::VECTOR_SHUFFLE:      return "vector_shuffle";
4557  case ISD::CARRY_FALSE:         return "carry_false";
4558  case ISD::ADDC:        return "addc";
4559  case ISD::ADDE:        return "adde";
4560  case ISD::SUBC:        return "subc";
4561  case ISD::SUBE:        return "sube";
4562  case ISD::SHL_PARTS:   return "shl_parts";
4563  case ISD::SRA_PARTS:   return "sra_parts";
4564  case ISD::SRL_PARTS:   return "srl_parts";
4565
4566  case ISD::EXTRACT_SUBREG:     return "extract_subreg";
4567  case ISD::INSERT_SUBREG:      return "insert_subreg";
4568
4569  // Conversion operators.
4570  case ISD::SIGN_EXTEND: return "sign_extend";
4571  case ISD::ZERO_EXTEND: return "zero_extend";
4572  case ISD::ANY_EXTEND:  return "any_extend";
4573  case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
4574  case ISD::TRUNCATE:    return "truncate";
4575  case ISD::FP_ROUND:    return "fp_round";
4576  case ISD::FLT_ROUNDS_: return "flt_rounds";
4577  case ISD::FP_ROUND_INREG: return "fp_round_inreg";
4578  case ISD::FP_EXTEND:   return "fp_extend";
4579
4580  case ISD::SINT_TO_FP:  return "sint_to_fp";
4581  case ISD::UINT_TO_FP:  return "uint_to_fp";
4582  case ISD::FP_TO_SINT:  return "fp_to_sint";
4583  case ISD::FP_TO_UINT:  return "fp_to_uint";
4584  case ISD::BIT_CONVERT: return "bit_convert";
4585
4586    // Control flow instructions
4587  case ISD::BR:      return "br";
4588  case ISD::BRIND:   return "brind";
4589  case ISD::BR_JT:   return "br_jt";
4590  case ISD::BRCOND:  return "brcond";
4591  case ISD::BR_CC:   return "br_cc";
4592  case ISD::RET:     return "ret";
4593  case ISD::CALLSEQ_START:  return "callseq_start";
4594  case ISD::CALLSEQ_END:    return "callseq_end";
4595
4596    // Other operators
4597  case ISD::LOAD:               return "load";
4598  case ISD::STORE:              return "store";
4599  case ISD::VAARG:              return "vaarg";
4600  case ISD::VACOPY:             return "vacopy";
4601  case ISD::VAEND:              return "vaend";
4602  case ISD::VASTART:            return "vastart";
4603  case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
4604  case ISD::EXTRACT_ELEMENT:    return "extract_element";
4605  case ISD::BUILD_PAIR:         return "build_pair";
4606  case ISD::STACKSAVE:          return "stacksave";
4607  case ISD::STACKRESTORE:       return "stackrestore";
4608  case ISD::TRAP:               return "trap";
4609
4610  // Bit manipulation
4611  case ISD::BSWAP:   return "bswap";
4612  case ISD::CTPOP:   return "ctpop";
4613  case ISD::CTTZ:    return "cttz";
4614  case ISD::CTLZ:    return "ctlz";
4615
4616  // Debug info
4617  case ISD::LOCATION: return "location";
4618  case ISD::DEBUG_LOC: return "debug_loc";
4619
4620  // Trampolines
4621  case ISD::TRAMPOLINE: return "trampoline";
4622
4623  case ISD::CONDCODE:
4624    switch (cast<CondCodeSDNode>(this)->get()) {
4625    default: assert(0 && "Unknown setcc condition!");
4626    case ISD::SETOEQ:  return "setoeq";
4627    case ISD::SETOGT:  return "setogt";
4628    case ISD::SETOGE:  return "setoge";
4629    case ISD::SETOLT:  return "setolt";
4630    case ISD::SETOLE:  return "setole";
4631    case ISD::SETONE:  return "setone";
4632
4633    case ISD::SETO:    return "seto";
4634    case ISD::SETUO:   return "setuo";
4635    case ISD::SETUEQ:  return "setue";
4636    case ISD::SETUGT:  return "setugt";
4637    case ISD::SETUGE:  return "setuge";
4638    case ISD::SETULT:  return "setult";
4639    case ISD::SETULE:  return "setule";
4640    case ISD::SETUNE:  return "setune";
4641
4642    case ISD::SETEQ:   return "seteq";
4643    case ISD::SETGT:   return "setgt";
4644    case ISD::SETGE:   return "setge";
4645    case ISD::SETLT:   return "setlt";
4646    case ISD::SETLE:   return "setle";
4647    case ISD::SETNE:   return "setne";
4648    }
4649  }
4650}
4651
4652const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
4653  switch (AM) {
4654  default:
4655    return "";
4656  case ISD::PRE_INC:
4657    return "<pre-inc>";
4658  case ISD::PRE_DEC:
4659    return "<pre-dec>";
4660  case ISD::POST_INC:
4661    return "<post-inc>";
4662  case ISD::POST_DEC:
4663    return "<post-dec>";
4664  }
4665}
4666
4667std::string ISD::ArgFlagsTy::getArgFlagsString() {
4668  std::string S = "< ";
4669
4670  if (isZExt())
4671    S += "zext ";
4672  if (isSExt())
4673    S += "sext ";
4674  if (isInReg())
4675    S += "inreg ";
4676  if (isSRet())
4677    S += "sret ";
4678  if (isByVal())
4679    S += "byval ";
4680  if (isNest())
4681    S += "nest ";
4682  if (getByValAlign())
4683    S += "byval-align:" + utostr(getByValAlign()) + " ";
4684  if (getOrigAlign())
4685    S += "orig-align:" + utostr(getOrigAlign()) + " ";
4686  if (getByValSize())
4687    S += "byval-size:" + utostr(getByValSize()) + " ";
4688  return S + ">";
4689}
4690
4691void SDNode::dump() const { dump(0); }
4692void SDNode::dump(const SelectionDAG *G) const {
4693  cerr << (void*)this << ": ";
4694
4695  for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
4696    if (i) cerr << ",";
4697    if (getValueType(i) == MVT::Other)
4698      cerr << "ch";
4699    else
4700      cerr << getValueType(i).getMVTString();
4701  }
4702  cerr << " = " << getOperationName(G);
4703
4704  cerr << " ";
4705  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
4706    if (i) cerr << ", ";
4707    cerr << (void*)getOperand(i).Val;
4708    if (unsigned RN = getOperand(i).ResNo)
4709      cerr << ":" << RN;
4710  }
4711
4712  if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) {
4713    SDNode *Mask = getOperand(2).Val;
4714    cerr << "<";
4715    for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) {
4716      if (i) cerr << ",";
4717      if (Mask->getOperand(i).getOpcode() == ISD::UNDEF)
4718        cerr << "u";
4719      else
4720        cerr << cast<ConstantSDNode>(Mask->getOperand(i))->getValue();
4721    }
4722    cerr << ">";
4723  }
4724
4725  if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
4726    cerr << "<" << CSDN->getValue() << ">";
4727  } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
4728    if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
4729      cerr << "<" << CSDN->getValueAPF().convertToFloat() << ">";
4730    else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
4731      cerr << "<" << CSDN->getValueAPF().convertToDouble() << ">";
4732    else {
4733      cerr << "<APFloat(";
4734      CSDN->getValueAPF().convertToAPInt().dump();
4735      cerr << ")>";
4736    }
4737  } else if (const GlobalAddressSDNode *GADN =
4738             dyn_cast<GlobalAddressSDNode>(this)) {
4739    int offset = GADN->getOffset();
4740    cerr << "<";
4741    WriteAsOperand(*cerr.stream(), GADN->getGlobal()) << ">";
4742    if (offset > 0)
4743      cerr << " + " << offset;
4744    else
4745      cerr << " " << offset;
4746  } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
4747    cerr << "<" << FIDN->getIndex() << ">";
4748  } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
4749    cerr << "<" << JTDN->getIndex() << ">";
4750  } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
4751    int offset = CP->getOffset();
4752    if (CP->isMachineConstantPoolEntry())
4753      cerr << "<" << *CP->getMachineCPVal() << ">";
4754    else
4755      cerr << "<" << *CP->getConstVal() << ">";
4756    if (offset > 0)
4757      cerr << " + " << offset;
4758    else
4759      cerr << " " << offset;
4760  } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
4761    cerr << "<";
4762    const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
4763    if (LBB)
4764      cerr << LBB->getName() << " ";
4765    cerr << (const void*)BBDN->getBasicBlock() << ">";
4766  } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
4767    if (G && R->getReg() &&
4768        TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
4769      cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg());
4770    } else {
4771      cerr << " #" << R->getReg();
4772    }
4773  } else if (const ExternalSymbolSDNode *ES =
4774             dyn_cast<ExternalSymbolSDNode>(this)) {
4775    cerr << "'" << ES->getSymbol() << "'";
4776  } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
4777    if (M->getValue())
4778      cerr << "<" << M->getValue() << ">";
4779    else
4780      cerr << "<null>";
4781  } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) {
4782    if (M->MO.getValue())
4783      cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">";
4784    else
4785      cerr << "<null:" << M->MO.getOffset() << ">";
4786  } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) {
4787    cerr << N->getArgFlags().getArgFlagsString();
4788  } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
4789    cerr << ":" << N->getVT().getMVTString();
4790  }
4791  else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
4792    const Value *SrcValue = LD->getSrcValue();
4793    int SrcOffset = LD->getSrcValueOffset();
4794    cerr << " <";
4795    if (SrcValue)
4796      cerr << SrcValue;
4797    else
4798      cerr << "null";
4799    cerr << ":" << SrcOffset << ">";
4800
4801    bool doExt = true;
4802    switch (LD->getExtensionType()) {
4803    default: doExt = false; break;
4804    case ISD::EXTLOAD:
4805      cerr << " <anyext ";
4806      break;
4807    case ISD::SEXTLOAD:
4808      cerr << " <sext ";
4809      break;
4810    case ISD::ZEXTLOAD:
4811      cerr << " <zext ";
4812      break;
4813    }
4814    if (doExt)
4815      cerr << LD->getMemoryVT().getMVTString() << ">";
4816
4817    const char *AM = getIndexedModeName(LD->getAddressingMode());
4818    if (*AM)
4819      cerr << " " << AM;
4820    if (LD->isVolatile())
4821      cerr << " <volatile>";
4822    cerr << " alignment=" << LD->getAlignment();
4823  } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
4824    const Value *SrcValue = ST->getSrcValue();
4825    int SrcOffset = ST->getSrcValueOffset();
4826    cerr << " <";
4827    if (SrcValue)
4828      cerr << SrcValue;
4829    else
4830      cerr << "null";
4831    cerr << ":" << SrcOffset << ">";
4832
4833    if (ST->isTruncatingStore())
4834      cerr << " <trunc "
4835           << ST->getMemoryVT().getMVTString() << ">";
4836
4837    const char *AM = getIndexedModeName(ST->getAddressingMode());
4838    if (*AM)
4839      cerr << " " << AM;
4840    if (ST->isVolatile())
4841      cerr << " <volatile>";
4842    cerr << " alignment=" << ST->getAlignment();
4843  } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) {
4844    const Value *SrcValue = AT->getSrcValue();
4845    int SrcOffset = AT->getSrcValueOffset();
4846    cerr << " <";
4847    if (SrcValue)
4848      cerr << SrcValue;
4849    else
4850      cerr << "null";
4851    cerr << ":" << SrcOffset << ">";
4852    if (AT->isVolatile())
4853      cerr << " <volatile>";
4854    cerr << " alignment=" << AT->getAlignment();
4855  }
4856}
4857
4858static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
4859  for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
4860    if (N->getOperand(i).Val->hasOneUse())
4861      DumpNodes(N->getOperand(i).Val, indent+2, G);
4862    else
4863      cerr << "\n" << std::string(indent+2, ' ')
4864           << (void*)N->getOperand(i).Val << ": <multiple use>";
4865
4866
4867  cerr << "\n" << std::string(indent, ' ');
4868  N->dump(G);
4869}
4870
4871void SelectionDAG::dump() const {
4872  cerr << "SelectionDAG has " << AllNodes.size() << " nodes:";
4873  std::vector<const SDNode*> Nodes;
4874  for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
4875       I != E; ++I)
4876    Nodes.push_back(I);
4877
4878  std::sort(Nodes.begin(), Nodes.end());
4879
4880  for (unsigned i = 0, e = Nodes.size(); i != e; ++i) {
4881    if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val)
4882      DumpNodes(Nodes[i], 2, this);
4883  }
4884
4885  if (getRoot().Val) DumpNodes(getRoot().Val, 2, this);
4886
4887  cerr << "\n\n";
4888}
4889
4890const Type *ConstantPoolSDNode::getType() const {
4891  if (isMachineConstantPoolEntry())
4892    return Val.MachineCPVal->getType();
4893  return Val.ConstVal->getType();
4894}
4895