SelectionDAG.cpp revision 06ef88472f7bac3512e224974e87a0a456471b82
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Target/TargetLowering.h" 20#include <iostream> 21#include <set> 22#include <cmath> 23#include <algorithm> 24using namespace llvm; 25 26static bool isCommutativeBinOp(unsigned Opcode) { 27 switch (Opcode) { 28 case ISD::ADD: 29 case ISD::MUL: 30 case ISD::AND: 31 case ISD::OR: 32 case ISD::XOR: return true; 33 default: return false; // FIXME: Need commutative info for user ops! 34 } 35} 36 37static bool isAssociativeBinOp(unsigned Opcode) { 38 switch (Opcode) { 39 case ISD::ADD: 40 case ISD::MUL: 41 case ISD::AND: 42 case ISD::OR: 43 case ISD::XOR: return true; 44 default: return false; // FIXME: Need associative info for user ops! 45 } 46} 47 48static unsigned ExactLog2(uint64_t Val) { 49 unsigned Count = 0; 50 while (Val != 1) { 51 Val >>= 1; 52 ++Count; 53 } 54 return Count; 55} 56 57// isInvertibleForFree - Return true if there is no cost to emitting the logical 58// inverse of this node. 59static bool isInvertibleForFree(SDOperand N) { 60 if (isa<ConstantSDNode>(N.Val)) return true; 61 if (isa<SetCCSDNode>(N.Val) && N.Val->hasOneUse()) 62 return true; 63 return false; 64} 65 66 67/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 68/// when given the operation for (X op Y). 69ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 70 // To perform this operation, we just need to swap the L and G bits of the 71 // operation. 72 unsigned OldL = (Operation >> 2) & 1; 73 unsigned OldG = (Operation >> 1) & 1; 74 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 75 (OldL << 1) | // New G bit 76 (OldG << 2)); // New L bit. 77} 78 79/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 80/// 'op' is a valid SetCC operation. 81ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 82 unsigned Operation = Op; 83 if (isInteger) 84 Operation ^= 7; // Flip L, G, E bits, but not U. 85 else 86 Operation ^= 15; // Flip all of the condition bits. 87 if (Operation > ISD::SETTRUE2) 88 Operation &= ~8; // Don't let N and U bits get set. 89 return ISD::CondCode(Operation); 90} 91 92 93/// isSignedOp - For an integer comparison, return 1 if the comparison is a 94/// signed operation and 2 if the result is an unsigned comparison. Return zero 95/// if the operation does not depend on the sign of the input (setne and seteq). 96static int isSignedOp(ISD::CondCode Opcode) { 97 switch (Opcode) { 98 default: assert(0 && "Illegal integer setcc operation!"); 99 case ISD::SETEQ: 100 case ISD::SETNE: return 0; 101 case ISD::SETLT: 102 case ISD::SETLE: 103 case ISD::SETGT: 104 case ISD::SETGE: return 1; 105 case ISD::SETULT: 106 case ISD::SETULE: 107 case ISD::SETUGT: 108 case ISD::SETUGE: return 2; 109 } 110} 111 112/// getSetCCOrOperation - Return the result of a logical OR between different 113/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 114/// returns SETCC_INVALID if it is not possible to represent the resultant 115/// comparison. 116ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 117 bool isInteger) { 118 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 119 // Cannot fold a signed integer setcc with an unsigned integer setcc. 120 return ISD::SETCC_INVALID; 121 122 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 123 124 // If the N and U bits get set then the resultant comparison DOES suddenly 125 // care about orderedness, and is true when ordered. 126 if (Op > ISD::SETTRUE2) 127 Op &= ~16; // Clear the N bit. 128 return ISD::CondCode(Op); 129} 130 131/// getSetCCAndOperation - Return the result of a logical AND between different 132/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 133/// function returns zero if it is not possible to represent the resultant 134/// comparison. 135ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 136 bool isInteger) { 137 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 138 // Cannot fold a signed setcc with an unsigned setcc. 139 return ISD::SETCC_INVALID; 140 141 // Combine all of the condition bits. 142 return ISD::CondCode(Op1 & Op2); 143} 144 145const TargetMachine &SelectionDAG::getTarget() const { 146 return TLI.getTargetMachine(); 147} 148 149 150/// RemoveDeadNodes - This method deletes all unreachable nodes in the 151/// SelectionDAG, including nodes (like loads) that have uses of their token 152/// chain but no other uses and no side effect. If a node is passed in as an 153/// argument, it is used as the seed for node deletion. 154void SelectionDAG::RemoveDeadNodes(SDNode *N) { 155 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 156 157 // Create a dummy node (which is not added to allnodes), that adds a reference 158 // to the root node, preventing it from being deleted. 159 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 160 161 DeleteNodeIfDead(N, &AllNodeSet); 162 163 Restart: 164 unsigned NumNodes = AllNodeSet.size(); 165 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 166 I != E; ++I) { 167 // Try to delete this node. 168 DeleteNodeIfDead(*I, &AllNodeSet); 169 170 // If we actually deleted any nodes, do not use invalid iterators in 171 // AllNodeSet. 172 if (AllNodeSet.size() != NumNodes) 173 goto Restart; 174 } 175 176 // Restore AllNodes. 177 if (AllNodes.size() != NumNodes) 178 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 179 180 // If the root changed (e.g. it was a dead load, update the root). 181 setRoot(DummyNode->getOperand(0)); 182 183 // Now that we are done with the dummy node, delete it. 184 DummyNode->getOperand(0).Val->removeUser(DummyNode); 185 delete DummyNode; 186} 187 188void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 189 if (!N->use_empty()) 190 return; 191 192 // Okay, we really are going to delete this node. First take this out of the 193 // appropriate CSE map. 194 switch (N->getOpcode()) { 195 case ISD::Constant: 196 Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 197 N->getValueType(0))); 198 break; 199 case ISD::ConstantFP: { 200 union { 201 double DV; 202 uint64_t IV; 203 }; 204 DV = cast<ConstantFPSDNode>(N)->getValue(); 205 ConstantFPs.erase(std::make_pair(IV, N->getValueType(0))); 206 break; 207 } 208 case ISD::GlobalAddress: 209 GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 210 break; 211 case ISD::FrameIndex: 212 FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 213 break; 214 case ISD::ConstantPool: 215 ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->getIndex()); 216 break; 217 case ISD::BasicBlock: 218 BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 219 break; 220 case ISD::ExternalSymbol: 221 ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 222 break; 223 224 case ISD::LOAD: 225 Loads.erase(std::make_pair(N->getOperand(1), 226 std::make_pair(N->getOperand(0), 227 N->getValueType(0)))); 228 break; 229 case ISD::SETCC: 230 SetCCs.erase(std::make_pair(std::make_pair(N->getOperand(0), 231 N->getOperand(1)), 232 std::make_pair( 233 cast<SetCCSDNode>(N)->getCondition(), 234 N->getValueType(0)))); 235 break; 236 case ISD::TRUNCSTORE: 237 case ISD::SIGN_EXTEND_INREG: 238 case ISD::FP_ROUND_INREG: 239 case ISD::EXTLOAD: 240 case ISD::SEXTLOAD: 241 case ISD::ZEXTLOAD: { 242 EVTStruct NN; 243 NN.Opcode = N->getOpcode(); 244 NN.VT = N->getValueType(0); 245 NN.EVT = cast<MVTSDNode>(N)->getExtraValueType(); 246 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 247 NN.Ops.push_back(N->getOperand(i)); 248 MVTSDNodes.erase(NN); 249 break; 250 } 251 default: 252 if (N->getNumOperands() == 1) 253 UnaryOps.erase(std::make_pair(N->getOpcode(), 254 std::make_pair(N->getOperand(0), 255 N->getValueType(0)))); 256 else if (N->getNumOperands() == 2) 257 BinaryOps.erase(std::make_pair(N->getOpcode(), 258 std::make_pair(N->getOperand(0), 259 N->getOperand(1)))); 260 else if (N->getNumValues() == 1) { 261 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 262 OneResultNodes.erase(std::make_pair(N->getOpcode(), 263 std::make_pair(N->getValueType(0), 264 Ops))); 265 } else { 266 // Remove the node from the ArbitraryNodes map. 267 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 268 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 269 ArbitraryNodes.erase(std::make_pair(N->getOpcode(), 270 std::make_pair(RV, Ops))); 271 } 272 break; 273 } 274 275 // Next, brutally remove the operand list. 276 while (!N->Operands.empty()) { 277 SDNode *O = N->Operands.back().Val; 278 N->Operands.pop_back(); 279 O->removeUser(N); 280 281 // Now that we removed this operand, see if there are no uses of it left. 282 DeleteNodeIfDead(O, NodeSet); 283 } 284 285 // Remove the node from the nodes set and delete it. 286 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 287 AllNodeSet.erase(N); 288 289 // Now that the node is gone, check to see if any of the operands of this node 290 // are dead now. 291 delete N; 292} 293 294 295SelectionDAG::~SelectionDAG() { 296 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 297 delete AllNodes[i]; 298} 299 300SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 301 if (Op.getValueType() == VT) return Op; 302 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); 303 return getNode(ISD::AND, Op.getValueType(), Op, 304 getConstant(Imm, Op.getValueType())); 305} 306 307SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 308 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 309 // Mask out any bits that are not valid for this constant. 310 if (VT != MVT::i64) 311 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 312 313 SDNode *&N = Constants[std::make_pair(Val, VT)]; 314 if (N) return SDOperand(N, 0); 315 N = new ConstantSDNode(Val, VT); 316 AllNodes.push_back(N); 317 return SDOperand(N, 0); 318} 319 320SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 321 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 322 if (VT == MVT::f32) 323 Val = (float)Val; // Mask out extra precision. 324 325 // Do the map lookup using the actual bit pattern for the floating point 326 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 327 // we don't have issues with SNANs. 328 union { 329 double DV; 330 uint64_t IV; 331 }; 332 333 DV = Val; 334 335 SDNode *&N = ConstantFPs[std::make_pair(IV, VT)]; 336 if (N) return SDOperand(N, 0); 337 N = new ConstantFPSDNode(Val, VT); 338 AllNodes.push_back(N); 339 return SDOperand(N, 0); 340} 341 342 343 344SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 345 MVT::ValueType VT) { 346 SDNode *&N = GlobalValues[GV]; 347 if (N) return SDOperand(N, 0); 348 N = new GlobalAddressSDNode(GV,VT); 349 AllNodes.push_back(N); 350 return SDOperand(N, 0); 351} 352 353SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 354 SDNode *&N = FrameIndices[FI]; 355 if (N) return SDOperand(N, 0); 356 N = new FrameIndexSDNode(FI, VT); 357 AllNodes.push_back(N); 358 return SDOperand(N, 0); 359} 360 361SDOperand SelectionDAG::getConstantPool(unsigned CPIdx, MVT::ValueType VT) { 362 SDNode *N = ConstantPoolIndices[CPIdx]; 363 if (N) return SDOperand(N, 0); 364 N = new ConstantPoolSDNode(CPIdx, VT); 365 AllNodes.push_back(N); 366 return SDOperand(N, 0); 367} 368 369SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 370 SDNode *&N = BBNodes[MBB]; 371 if (N) return SDOperand(N, 0); 372 N = new BasicBlockSDNode(MBB); 373 AllNodes.push_back(N); 374 return SDOperand(N, 0); 375} 376 377SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 378 SDNode *&N = ExternalSymbols[Sym]; 379 if (N) return SDOperand(N, 0); 380 N = new ExternalSymbolSDNode(Sym, VT); 381 AllNodes.push_back(N); 382 return SDOperand(N, 0); 383} 384 385SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, 386 SDOperand N1, SDOperand N2) { 387 // These setcc operations always fold. 388 switch (Cond) { 389 default: break; 390 case ISD::SETFALSE: 391 case ISD::SETFALSE2: return getConstant(0, VT); 392 case ISD::SETTRUE: 393 case ISD::SETTRUE2: return getConstant(1, VT); 394 } 395 396 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 397 uint64_t C2 = N2C->getValue(); 398 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 399 uint64_t C1 = N1C->getValue(); 400 401 // Sign extend the operands if required 402 if (ISD::isSignedIntSetCC(Cond)) { 403 C1 = N1C->getSignExtended(); 404 C2 = N2C->getSignExtended(); 405 } 406 407 switch (Cond) { 408 default: assert(0 && "Unknown integer setcc!"); 409 case ISD::SETEQ: return getConstant(C1 == C2, VT); 410 case ISD::SETNE: return getConstant(C1 != C2, VT); 411 case ISD::SETULT: return getConstant(C1 < C2, VT); 412 case ISD::SETUGT: return getConstant(C1 > C2, VT); 413 case ISD::SETULE: return getConstant(C1 <= C2, VT); 414 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 415 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 416 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 417 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 418 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 419 } 420 } else { 421 // If the LHS is a ZERO_EXTEND and if this is an ==/!= comparison, perform 422 // the comparison on the input. 423 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 424 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 425 426 // If the comparison constant has bits in the upper part, the 427 // zero-extended value could never match. 428 if (C2 & (~0ULL << InSize)) { 429 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 430 switch (Cond) { 431 case ISD::SETUGT: 432 case ISD::SETUGE: 433 case ISD::SETEQ: return getConstant(0, VT); 434 case ISD::SETULT: 435 case ISD::SETULE: 436 case ISD::SETNE: return getConstant(1, VT); 437 case ISD::SETGT: 438 case ISD::SETGE: 439 // True if the sign bit of C2 is set. 440 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 441 case ISD::SETLT: 442 case ISD::SETLE: 443 // True if the sign bit of C2 isn't set. 444 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 445 default: 446 break; 447 } 448 } 449 450 // Otherwise, we can perform the comparison with the low bits. 451 switch (Cond) { 452 case ISD::SETEQ: 453 case ISD::SETNE: 454 case ISD::SETUGT: 455 case ISD::SETUGE: 456 case ISD::SETULT: 457 case ISD::SETULE: 458 return getSetCC(Cond, VT, N1.getOperand(0), 459 getConstant(C2, N1.getOperand(0).getValueType())); 460 default: 461 break; // todo, be more careful with signed comparisons 462 } 463 } 464 465 466 uint64_t MinVal, MaxVal; 467 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 468 if (ISD::isSignedIntSetCC(Cond)) { 469 MinVal = 1ULL << (OperandBitSize-1); 470 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 471 MaxVal = ~0ULL >> (65-OperandBitSize); 472 else 473 MaxVal = 0; 474 } else { 475 MinVal = 0; 476 MaxVal = ~0ULL >> (64-OperandBitSize); 477 } 478 479 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 480 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 481 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 482 --C2; // X >= C1 --> X > (C1-1) 483 Cond = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; 484 N2 = getConstant(C2, N2.getValueType()); 485 N2C = cast<ConstantSDNode>(N2.Val); 486 } 487 488 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 489 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 490 ++C2; // X <= C1 --> X < (C1+1) 491 Cond = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; 492 N2 = getConstant(C2, N2.getValueType()); 493 N2C = cast<ConstantSDNode>(N2.Val); 494 } 495 496 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 497 return getConstant(0, VT); // X < MIN --> false 498 499 // Canonicalize setgt X, Min --> setne X, Min 500 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 501 return getSetCC(ISD::SETNE, VT, N1, N2); 502 503 // If we have setult X, 1, turn it into seteq X, 0 504 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 505 return getSetCC(ISD::SETEQ, VT, N1, 506 getConstant(MinVal, N1.getValueType())); 507 // If we have setugt X, Max-1, turn it into seteq X, Max 508 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 509 return getSetCC(ISD::SETEQ, VT, N1, 510 getConstant(MaxVal, N1.getValueType())); 511 512 // If we have "setcc X, C1", check to see if we can shrink the immediate 513 // by changing cc. 514 515 // SETUGT X, SINTMAX -> SETLT X, 0 516 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 517 C2 == (~0ULL >> (65-OperandBitSize))) 518 return getSetCC(ISD::SETLT, VT, N1, getConstant(0, N2.getValueType())); 519 520 // FIXME: Implement the rest of these. 521 522 523 // Fold bit comparisons when we can. 524 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 525 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 526 if (ConstantSDNode *AndRHS = 527 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 528 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 529 // Perform the xform if the AND RHS is a single bit. 530 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 531 return getNode(ISD::SRL, VT, N1, 532 getConstant(ExactLog2(AndRHS->getValue()), 533 TLI.getShiftAmountTy())); 534 } 535 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 536 // (X & 8) == 8 --> (X & 8) >> 3 537 // Perform the xform if C2 is a single bit. 538 if ((C2 & (C2-1)) == 0) { 539 return getNode(ISD::SRL, VT, N1, 540 getConstant(ExactLog2(C2),TLI.getShiftAmountTy())); 541 } 542 } 543 } 544 } 545 } else if (isa<ConstantSDNode>(N1.Val)) { 546 // Ensure that the constant occurs on the RHS. 547 return getSetCC(ISD::getSetCCSwappedOperands(Cond), VT, N2, N1); 548 } 549 550 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 551 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 552 double C1 = N1C->getValue(), C2 = N2C->getValue(); 553 554 switch (Cond) { 555 default: break; // FIXME: Implement the rest of these! 556 case ISD::SETEQ: return getConstant(C1 == C2, VT); 557 case ISD::SETNE: return getConstant(C1 != C2, VT); 558 case ISD::SETLT: return getConstant(C1 < C2, VT); 559 case ISD::SETGT: return getConstant(C1 > C2, VT); 560 case ISD::SETLE: return getConstant(C1 <= C2, VT); 561 case ISD::SETGE: return getConstant(C1 >= C2, VT); 562 } 563 } else { 564 // Ensure that the constant occurs on the RHS. 565 Cond = ISD::getSetCCSwappedOperands(Cond); 566 std::swap(N1, N2); 567 } 568 569 if (N1 == N2) { 570 // We can always fold X == Y for integer setcc's. 571 if (MVT::isInteger(N1.getValueType())) 572 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 573 unsigned UOF = ISD::getUnorderedFlavor(Cond); 574 if (UOF == 2) // FP operators that are undefined on NaNs. 575 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 576 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond))) 577 return getConstant(UOF, VT); 578 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 579 // if it is not already. 580 Cond = UOF == 0 ? ISD::SETUO : ISD::SETO; 581 } 582 583 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 584 MVT::isInteger(N1.getValueType())) { 585 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 586 N1.getOpcode() == ISD::XOR) { 587 // Simplify (X+Y) == (X+Z) --> Y == Z 588 if (N1.getOpcode() == N2.getOpcode()) { 589 if (N1.getOperand(0) == N2.getOperand(0)) 590 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 591 if (N1.getOperand(1) == N2.getOperand(1)) 592 return getSetCC(Cond, VT, N1.getOperand(0), N2.getOperand(0)); 593 if (isCommutativeBinOp(N1.getOpcode())) { 594 // If X op Y == Y op X, try other combinations. 595 if (N1.getOperand(0) == N2.getOperand(1)) 596 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(0)); 597 if (N1.getOperand(1) == N2.getOperand(0)) 598 return getSetCC(Cond, VT, N1.getOperand(1), N2.getOperand(1)); 599 } 600 } 601 602 // FIXME: move this stuff to the DAG Combiner when it exists! 603 604 // Simplify (X+Z) == X --> Z == 0 605 if (N1.getOperand(0) == N2) 606 return getSetCC(Cond, VT, N1.getOperand(1), 607 getConstant(0, N1.getValueType())); 608 if (N1.getOperand(1) == N2) { 609 if (isCommutativeBinOp(N1.getOpcode())) 610 return getSetCC(Cond, VT, N1.getOperand(0), 611 getConstant(0, N1.getValueType())); 612 else { 613 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 614 // (Z-X) == X --> Z == X<<1 615 return getSetCC(Cond, VT, N1.getOperand(0), 616 getNode(ISD::SHL, N2.getValueType(), 617 N2, getConstant(1, TLI.getShiftAmountTy()))); 618 } 619 } 620 } 621 622 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 623 N2.getOpcode() == ISD::XOR) { 624 // Simplify X == (X+Z) --> Z == 0 625 if (N2.getOperand(0) == N1) 626 return getSetCC(Cond, VT, N2.getOperand(1), 627 getConstant(0, N2.getValueType())); 628 else if (N2.getOperand(1) == N1) 629 return getSetCC(Cond, VT, N2.getOperand(0), 630 getConstant(0, N2.getValueType())); 631 } 632 } 633 634 // Fold away ALL boolean setcc's. 635 if (N1.getValueType() == MVT::i1) { 636 switch (Cond) { 637 default: assert(0 && "Unknown integer setcc!"); 638 case ISD::SETEQ: // X == Y -> (X^Y)^1 639 N1 = getNode(ISD::XOR, MVT::i1, 640 getNode(ISD::XOR, MVT::i1, N1, N2), 641 getConstant(1, MVT::i1)); 642 break; 643 case ISD::SETNE: // X != Y --> (X^Y) 644 N1 = getNode(ISD::XOR, MVT::i1, N1, N2); 645 break; 646 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y 647 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y 648 N1 = getNode(ISD::AND, MVT::i1, N2, 649 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 650 break; 651 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X 652 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X 653 N1 = getNode(ISD::AND, MVT::i1, N1, 654 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 655 break; 656 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y 657 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y 658 N1 = getNode(ISD::OR, MVT::i1, N2, 659 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 660 break; 661 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X 662 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X 663 N1 = getNode(ISD::OR, MVT::i1, N1, 664 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 665 break; 666 } 667 if (VT != MVT::i1) 668 N1 = getNode(ISD::ZERO_EXTEND, VT, N1); 669 return N1; 670 } 671 672 673 SetCCSDNode *&N = SetCCs[std::make_pair(std::make_pair(N1, N2), 674 std::make_pair(Cond, VT))]; 675 if (N) return SDOperand(N, 0); 676 N = new SetCCSDNode(Cond, N1, N2); 677 N->setValueTypes(VT); 678 AllNodes.push_back(N); 679 return SDOperand(N, 0); 680} 681 682 683 684/// getNode - Gets or creates the specified node. 685/// 686SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 687 SDNode *N = new SDNode(Opcode, VT); 688 AllNodes.push_back(N); 689 return SDOperand(N, 0); 690} 691 692SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 693 SDOperand Operand) { 694 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 695 uint64_t Val = C->getValue(); 696 switch (Opcode) { 697 default: break; 698 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 699 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 700 case ISD::TRUNCATE: return getConstant(Val, VT); 701 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 702 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 703 } 704 } 705 706 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 707 switch (Opcode) { 708 case ISD::FNEG: 709 return getConstantFP(-C->getValue(), VT); 710 case ISD::FP_ROUND: 711 case ISD::FP_EXTEND: 712 return getConstantFP(C->getValue(), VT); 713 case ISD::FP_TO_SINT: 714 return getConstant((int64_t)C->getValue(), VT); 715 case ISD::FP_TO_UINT: 716 return getConstant((uint64_t)C->getValue(), VT); 717 } 718 719 unsigned OpOpcode = Operand.Val->getOpcode(); 720 switch (Opcode) { 721 case ISD::TokenFactor: 722 return Operand; // Factor of one node? No factor. 723 case ISD::SIGN_EXTEND: 724 if (Operand.getValueType() == VT) return Operand; // noop extension 725 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 726 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 727 break; 728 case ISD::ZERO_EXTEND: 729 if (Operand.getValueType() == VT) return Operand; // noop extension 730 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 731 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 732 break; 733 case ISD::TRUNCATE: 734 if (Operand.getValueType() == VT) return Operand; // noop truncate 735 if (OpOpcode == ISD::TRUNCATE) 736 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 737 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) { 738 // If the source is smaller than the dest, we still need an extend. 739 if (Operand.Val->getOperand(0).getValueType() < VT) 740 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 741 else if (Operand.Val->getOperand(0).getValueType() > VT) 742 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 743 else 744 return Operand.Val->getOperand(0); 745 } 746 break; 747 case ISD::FNEG: 748 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X) 749 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1), 750 Operand.Val->getOperand(0)); 751 if (OpOpcode == ISD::FNEG) // --X -> X 752 return Operand.Val->getOperand(0); 753 break; 754 case ISD::FABS: 755 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 756 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 757 break; 758 } 759 760 SDNode *&N = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 761 if (N) return SDOperand(N, 0); 762 N = new SDNode(Opcode, Operand); 763 N->setValueTypes(VT); 764 AllNodes.push_back(N); 765 return SDOperand(N, 0); 766} 767 768/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 769/// this predicate to simplify operations downstream. V and Mask are known to 770/// be the same type. 771static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 772 const TargetLowering &TLI) { 773 unsigned SrcBits; 774 if (Mask == 0) return true; 775 776 // If we know the result of a setcc has the top bits zero, use this info. 777 switch (Op.getOpcode()) { 778 case ISD::UNDEF: 779 return true; 780 case ISD::Constant: 781 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 782 783 case ISD::SETCC: 784 return ((Mask & 1) == 0) && 785 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 786 787 case ISD::ZEXTLOAD: 788 SrcBits = MVT::getSizeInBits(cast<MVTSDNode>(Op)->getExtraValueType()); 789 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 790 case ISD::ZERO_EXTEND: 791 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 792 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 793 794 case ISD::AND: 795 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 796 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 797 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 798 799 // FALL THROUGH 800 case ISD::OR: 801 case ISD::XOR: 802 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 803 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 804 case ISD::SELECT: 805 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 806 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 807 808 case ISD::SRL: 809 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 810 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 811 uint64_t NewVal = Mask << ShAmt->getValue(); 812 SrcBits = MVT::getSizeInBits(Op.getValueType()); 813 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 814 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 815 } 816 return false; 817 case ISD::SHL: 818 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 819 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 820 uint64_t NewVal = Mask >> ShAmt->getValue(); 821 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 822 } 823 return false; 824 // TODO we could handle some SRA cases here. 825 default: break; 826 } 827 828 return false; 829} 830 831 832 833SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 834 SDOperand N1, SDOperand N2) { 835#ifndef NDEBUG 836 switch (Opcode) { 837 case ISD::TokenFactor: 838 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 839 N2.getValueType() == MVT::Other && "Invalid token factor!"); 840 break; 841 case ISD::AND: 842 case ISD::OR: 843 case ISD::XOR: 844 case ISD::UDIV: 845 case ISD::UREM: 846 case ISD::MULHU: 847 case ISD::MULHS: 848 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 849 // fall through 850 case ISD::ADD: 851 case ISD::SUB: 852 case ISD::MUL: 853 case ISD::SDIV: 854 case ISD::SREM: 855 assert(N1.getValueType() == N2.getValueType() && 856 N1.getValueType() == VT && "Binary operator types must match!"); 857 break; 858 859 case ISD::SHL: 860 case ISD::SRA: 861 case ISD::SRL: 862 assert(VT == N1.getValueType() && 863 "Shift operators return type must be the same as their first arg"); 864 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 865 VT != MVT::i1 && "Shifts only work on integers"); 866 break; 867 default: break; 868 } 869#endif 870 871 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 872 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 873 if (N1C) { 874 if (N2C) { 875 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 876 switch (Opcode) { 877 case ISD::ADD: return getConstant(C1 + C2, VT); 878 case ISD::SUB: return getConstant(C1 - C2, VT); 879 case ISD::MUL: return getConstant(C1 * C2, VT); 880 case ISD::UDIV: 881 if (C2) return getConstant(C1 / C2, VT); 882 break; 883 case ISD::UREM : 884 if (C2) return getConstant(C1 % C2, VT); 885 break; 886 case ISD::SDIV : 887 if (C2) return getConstant(N1C->getSignExtended() / 888 N2C->getSignExtended(), VT); 889 break; 890 case ISD::SREM : 891 if (C2) return getConstant(N1C->getSignExtended() % 892 N2C->getSignExtended(), VT); 893 break; 894 case ISD::AND : return getConstant(C1 & C2, VT); 895 case ISD::OR : return getConstant(C1 | C2, VT); 896 case ISD::XOR : return getConstant(C1 ^ C2, VT); 897 case ISD::SHL : return getConstant(C1 << (int)C2, VT); 898 case ISD::SRL : return getConstant(C1 >> (unsigned)C2, VT); 899 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 900 default: break; 901 } 902 903 } else { // Cannonicalize constant to RHS if commutative 904 if (isCommutativeBinOp(Opcode)) { 905 std::swap(N1C, N2C); 906 std::swap(N1, N2); 907 } 908 } 909 910 switch (Opcode) { 911 default: break; 912 case ISD::SHL: // shl 0, X -> 0 913 if (N1C->isNullValue()) return N1; 914 break; 915 case ISD::SRL: // srl 0, X -> 0 916 if (N1C->isNullValue()) return N1; 917 break; 918 case ISD::SRA: // sra -1, X -> -1 919 if (N1C->isAllOnesValue()) return N1; 920 break; 921 } 922 } 923 924 if (N2C) { 925 uint64_t C2 = N2C->getValue(); 926 927 switch (Opcode) { 928 case ISD::ADD: 929 if (!C2) return N1; // add X, 0 -> X 930 break; 931 case ISD::SUB: 932 if (!C2) return N1; // sub X, 0 -> X 933 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT)); 934 case ISD::MUL: 935 if (!C2) return N2; // mul X, 0 -> 0 936 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 937 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 938 939 // FIXME: Move this to the DAG combiner when it exists. 940 if ((C2 & C2-1) == 0) { 941 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 942 return getNode(ISD::SHL, VT, N1, ShAmt); 943 } 944 break; 945 946 case ISD::MULHU: 947 case ISD::MULHS: 948 if (!C2) return N2; // mul X, 0 -> 0 949 950 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0 951 return getConstant(0, VT); 952 953 // Many others could be handled here, including -1, powers of 2, etc. 954 break; 955 956 case ISD::UDIV: 957 // FIXME: Move this to the DAG combiner when it exists. 958 if ((C2 & C2-1) == 0 && C2) { 959 SDOperand ShAmt = getConstant(ExactLog2(C2), TLI.getShiftAmountTy()); 960 return getNode(ISD::SRL, VT, N1, ShAmt); 961 } 962 break; 963 964 case ISD::SHL: 965 case ISD::SRL: 966 case ISD::SRA: 967 // If the shift amount is bigger than the size of the data, then all the 968 // bits are shifted out. Simplify to undef. 969 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 970 return getNode(ISD::UNDEF, N1.getValueType()); 971 } 972 if (C2 == 0) return N1; 973 974 if (Opcode == ISD::SHL && N1.getNumOperands() == 2) 975 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 976 unsigned OpSAC = OpSA->getValue(); 977 if (N1.getOpcode() == ISD::SHL) { 978 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType())) 979 return getConstant(0, N1.getValueType()); 980 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0), 981 getConstant(C2+OpSAC, N2.getValueType())); 982 } else if (N1.getOpcode() == ISD::SRL) { 983 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1) 984 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0), 985 getConstant(~0ULL << OpSAC, VT)); 986 if (C2 > OpSAC) { 987 return getNode(ISD::SHL, VT, Mask, 988 getConstant(C2-OpSAC, N2.getValueType())); 989 } else { 990 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2) 991 return getNode(ISD::SRL, VT, Mask, 992 getConstant(OpSAC-C2, N2.getValueType())); 993 } 994 } else if (N1.getOpcode() == ISD::SRA) { 995 // if C1 == C2, just mask out low bits. 996 if (C2 == OpSAC) 997 return getNode(ISD::AND, VT, N1.getOperand(0), 998 getConstant(~0ULL << C2, VT)); 999 } 1000 } 1001 break; 1002 1003 case ISD::AND: 1004 if (!C2) return N2; // X and 0 -> 0 1005 if (N2C->isAllOnesValue()) 1006 return N1; // X and -1 -> X 1007 1008 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 1009 return getConstant(0, VT); 1010 1011 { 1012 uint64_t NotC2 = ~C2; 1013 if (VT != MVT::i64) 1014 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1; 1015 1016 if (MaskedValueIsZero(N1, NotC2, TLI)) 1017 return N1; // if (X & ~C2) -> 0, the and is redundant 1018 } 1019 1020 // FIXME: Should add a corresponding version of this for 1021 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 1022 // we don't have yet. 1023 1024 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 1025 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 1026 // If we are masking out the part of our input that was extended, just 1027 // mask the input to the extension directly. 1028 unsigned ExtendBits = 1029 MVT::getSizeInBits(cast<MVTSDNode>(N1)->getExtraValueType()); 1030 if ((C2 & (~0ULL << ExtendBits)) == 0) 1031 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 1032 } 1033 break; 1034 case ISD::OR: 1035 if (!C2)return N1; // X or 0 -> X 1036 if (N2C->isAllOnesValue()) 1037 return N2; // X or -1 -> -1 1038 break; 1039 case ISD::XOR: 1040 if (!C2) return N1; // X xor 0 -> X 1041 if (N2C->isAllOnesValue()) { 1042 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1.Val)){ 1043 // !(X op Y) -> (X !op Y) 1044 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 1045 return getSetCC(ISD::getSetCCInverse(SetCC->getCondition(),isInteger), 1046 SetCC->getValueType(0), 1047 SetCC->getOperand(0), SetCC->getOperand(1)); 1048 } else if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 1049 SDNode *Op = N1.Val; 1050 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 1051 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 1052 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 1053 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 1054 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 1055 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 1056 if (Op->getOpcode() == ISD::AND) 1057 return getNode(ISD::OR, VT, LHS, RHS); 1058 return getNode(ISD::AND, VT, LHS, RHS); 1059 } 1060 } 1061 // X xor -1 -> not(x) ? 1062 } 1063 break; 1064 } 1065 1066 // Reassociate ((X op C1) op C2) if possible. 1067 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 1068 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 1069 return getNode(Opcode, VT, N1.Val->getOperand(0), 1070 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 1071 } 1072 1073 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1074 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1075 if (N1CFP) 1076 if (N2CFP) { 1077 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1078 switch (Opcode) { 1079 case ISD::ADD: return getConstantFP(C1 + C2, VT); 1080 case ISD::SUB: return getConstantFP(C1 - C2, VT); 1081 case ISD::MUL: return getConstantFP(C1 * C2, VT); 1082 case ISD::SDIV: 1083 if (C2) return getConstantFP(C1 / C2, VT); 1084 break; 1085 case ISD::SREM : 1086 if (C2) return getConstantFP(fmod(C1, C2), VT); 1087 break; 1088 default: break; 1089 } 1090 1091 } else { // Cannonicalize constant to RHS if commutative 1092 if (isCommutativeBinOp(Opcode)) { 1093 std::swap(N1CFP, N2CFP); 1094 std::swap(N1, N2); 1095 } 1096 } 1097 1098 // Finally, fold operations that do not require constants. 1099 switch (Opcode) { 1100 case ISD::TokenFactor: 1101 if (N1.getOpcode() == ISD::EntryToken) 1102 return N2; 1103 if (N2.getOpcode() == ISD::EntryToken) 1104 return N1; 1105 break; 1106 1107 case ISD::AND: 1108 case ISD::OR: 1109 if (SetCCSDNode *LHS = dyn_cast<SetCCSDNode>(N1.Val)) 1110 if (SetCCSDNode *RHS = dyn_cast<SetCCSDNode>(N2.Val)) { 1111 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 1112 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 1113 ISD::CondCode Op2 = RHS->getCondition(); 1114 1115 if (LR == RR && isa<ConstantSDNode>(LR) && 1116 Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) { 1117 // (X != 0) | (Y != 0) -> (X|Y != 0) 1118 // (X == 0) & (Y == 0) -> (X|Y == 0) 1119 // (X < 0) | (Y < 0) -> (X|Y < 0) 1120 if (cast<ConstantSDNode>(LR)->getValue() == 0 && 1121 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 1122 (Op2 == ISD::SETNE && Opcode == ISD::OR) || 1123 (Op2 == ISD::SETLT && Opcode == ISD::OR))) 1124 return getSetCC(Op2, VT, 1125 getNode(ISD::OR, LR.getValueType(), LL, RL), LR); 1126 1127 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) { 1128 // (X == -1) & (Y == -1) -> (X&Y == -1) 1129 // (X != -1) | (Y != -1) -> (X&Y != -1) 1130 // (X > -1) | (Y > -1) -> (X&Y > -1) 1131 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) || 1132 (Opcode == ISD::OR && Op2 == ISD::SETNE) || 1133 (Opcode == ISD::OR && Op2 == ISD::SETGT)) 1134 return getSetCC(Op2, VT, 1135 getNode(ISD::AND, LR.getValueType(), LL, RL), LR); 1136 // (X > -1) & (Y > -1) -> (X|Y > -1) 1137 if (Opcode == ISD::AND && Op2 == ISD::SETGT) 1138 return getSetCC(Op2, VT, 1139 getNode(ISD::OR, LR.getValueType(), LL, RL), LR); 1140 } 1141 } 1142 1143 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 1144 if (LL == RR && LR == RL) { 1145 Op2 = ISD::getSetCCSwappedOperands(Op2); 1146 goto MatchedBackwards; 1147 } 1148 1149 if (LL == RL && LR == RR) { 1150 MatchedBackwards: 1151 ISD::CondCode Result; 1152 bool isInteger = MVT::isInteger(LL.getValueType()); 1153 if (Opcode == ISD::OR) 1154 Result = ISD::getSetCCOrOperation(LHS->getCondition(), Op2, 1155 isInteger); 1156 else 1157 Result = ISD::getSetCCAndOperation(LHS->getCondition(), Op2, 1158 isInteger); 1159 if (Result != ISD::SETCC_INVALID) 1160 return getSetCC(Result, LHS->getValueType(0), LL, LR); 1161 } 1162 } 1163 1164 // and/or zext(a), zext(b) -> zext(and/or a, b) 1165 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1166 N2.getOpcode() == ISD::ZERO_EXTEND && 1167 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1168 return getNode(ISD::ZERO_EXTEND, VT, 1169 getNode(Opcode, N1.getOperand(0).getValueType(), 1170 N1.getOperand(0), N2.getOperand(0))); 1171 break; 1172 case ISD::XOR: 1173 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1174 break; 1175 case ISD::ADD: 1176 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1177 return getNode(ISD::SUB, VT, N1, N2.getOperand(0)); 1178 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1179 return getNode(ISD::SUB, VT, N2, N1.getOperand(0)); 1180 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1181 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1182 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1183 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1184 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1185 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1186 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1) && 1187 !MVT::isFloatingPoint(N2.getValueType())) 1188 return N2.Val->getOperand(0); // A+(B-A) -> B 1189 break; 1190 case ISD::SUB: 1191 if (N1.getOpcode() == ISD::ADD) { 1192 if (N1.Val->getOperand(0) == N2 && 1193 !MVT::isFloatingPoint(N2.getValueType())) 1194 return N1.Val->getOperand(1); // (A+B)-A == B 1195 if (N1.Val->getOperand(1) == N2 && 1196 !MVT::isFloatingPoint(N2.getValueType())) 1197 return N1.Val->getOperand(0); // (A+B)-B == A 1198 } 1199 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1200 return getNode(ISD::ADD, VT, N1, N2.getOperand(0)); 1201 break; 1202 // FIXME: figure out how to safely handle things like 1203 // int foo(int x) { return 1 << (x & 255); } 1204 // int bar() { return foo(256); } 1205#if 0 1206 case ISD::SHL: 1207 case ISD::SRL: 1208 case ISD::SRA: 1209 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1210 cast<MVTSDNode>(N2)->getExtraValueType() != MVT::i1) 1211 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1212 else if (N2.getOpcode() == ISD::AND) 1213 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1214 // If the and is only masking out bits that cannot effect the shift, 1215 // eliminate the and. 1216 unsigned NumBits = MVT::getSizeInBits(VT); 1217 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1218 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1219 } 1220 break; 1221#endif 1222 } 1223 1224 // Memoize this node if possible. 1225 SDNode *N; 1226 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END) { 1227 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1228 if (BON) return SDOperand(BON, 0); 1229 1230 BON = N = new SDNode(Opcode, N1, N2); 1231 } else { 1232 N = new SDNode(Opcode, N1, N2); 1233 } 1234 1235 N->setValueTypes(VT); 1236 AllNodes.push_back(N); 1237 return SDOperand(N, 0); 1238} 1239 1240// setAdjCallChain - This method changes the token chain of an 1241// CALLSEQ_START/END node to be the specified operand. 1242void SDNode::setAdjCallChain(SDOperand N) { 1243 assert(N.getValueType() == MVT::Other); 1244 assert((getOpcode() == ISD::CALLSEQ_START || 1245 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); 1246 1247 Operands[0].Val->removeUser(this); 1248 Operands[0] = N; 1249 N.Val->Uses.push_back(this); 1250} 1251 1252 1253 1254SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1255 SDOperand Chain, SDOperand Ptr, 1256 SDOperand SV) { 1257 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1258 if (N) return SDOperand(N, 0); 1259 N = new SDNode(ISD::LOAD, Chain, Ptr, SV); 1260 1261 // Loads have a token chain. 1262 N->setValueTypes(VT, MVT::Other); 1263 AllNodes.push_back(N); 1264 return SDOperand(N, 0); 1265} 1266 1267SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1268 SDOperand N1, SDOperand N2, SDOperand N3) { 1269 // Perform various simplifications. 1270 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1271 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1272 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1273 switch (Opcode) { 1274 case ISD::SELECT: 1275 if (N1C) 1276 if (N1C->getValue()) 1277 return N2; // select true, X, Y -> X 1278 else 1279 return N3; // select false, X, Y -> Y 1280 1281 if (N2 == N3) return N2; // select C, X, X -> X 1282 1283 if (VT == MVT::i1) { // Boolean SELECT 1284 if (N2C) { 1285 if (N2C->getValue()) // select C, 1, X -> C | X 1286 return getNode(ISD::OR, VT, N1, N3); 1287 else // select C, 0, X -> ~C & X 1288 return getNode(ISD::AND, VT, 1289 getNode(ISD::XOR, N1.getValueType(), N1, 1290 getConstant(1, N1.getValueType())), N3); 1291 } else if (N3C) { 1292 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1293 return getNode(ISD::OR, VT, 1294 getNode(ISD::XOR, N1.getValueType(), N1, 1295 getConstant(1, N1.getValueType())), N2); 1296 else // select C, X, 0 -> C & X 1297 return getNode(ISD::AND, VT, N1, N2); 1298 } 1299 1300 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1301 return getNode(ISD::OR, VT, N1, N3); 1302 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1303 return getNode(ISD::AND, VT, N1, N2); 1304 } 1305 1306 // If this is a selectcc, check to see if we can simplify the result. 1307 if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(N1)) { 1308 if (ConstantFPSDNode *CFP = 1309 dyn_cast<ConstantFPSDNode>(SetCC->getOperand(1))) 1310 if (CFP->getValue() == 0.0) { // Allow either -0.0 or 0.0 1311 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1312 if ((SetCC->getCondition() == ISD::SETGE || 1313 SetCC->getCondition() == ISD::SETGT) && 1314 N2 == SetCC->getOperand(0) && N3.getOpcode() == ISD::FNEG && 1315 N3.getOperand(0) == N2) 1316 return getNode(ISD::FABS, VT, N2); 1317 1318 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1319 if ((SetCC->getCondition() == ISD::SETLT || 1320 SetCC->getCondition() == ISD::SETLE) && 1321 N3 == SetCC->getOperand(0) && N2.getOpcode() == ISD::FNEG && 1322 N2.getOperand(0) == N3) 1323 return getNode(ISD::FABS, VT, N3); 1324 } 1325 // select (setlt X, 0), A, 0 -> and (sra X, size(X)-1), A 1326 if (ConstantSDNode *CN = 1327 dyn_cast<ConstantSDNode>(SetCC->getOperand(1))) 1328 if (CN->getValue() == 0 && N3C && N3C->getValue() == 0) 1329 if (SetCC->getCondition() == ISD::SETLT) { 1330 MVT::ValueType XType = SetCC->getOperand(0).getValueType(); 1331 MVT::ValueType AType = N2.getValueType(); 1332 if (XType >= AType) { 1333 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a 1334 // single-bit constant. FIXME: remove once the dag combiner 1335 // exists. 1336 if (ConstantSDNode *AC = dyn_cast<ConstantSDNode>(N2)) 1337 if ((AC->getValue() & (AC->getValue()-1)) == 0) { 1338 unsigned ShCtV = ExactLog2(AC->getValue()); 1339 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1; 1340 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy()); 1341 SDOperand Shift = getNode(ISD::SRL, XType, 1342 SetCC->getOperand(0), ShCt); 1343 if (XType > AType) 1344 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1345 return getNode(ISD::AND, AType, Shift, N2); 1346 } 1347 1348 1349 SDOperand Shift = getNode(ISD::SRA, XType, SetCC->getOperand(0), 1350 getConstant(MVT::getSizeInBits(XType)-1, 1351 TLI.getShiftAmountTy())); 1352 if (XType > AType) 1353 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1354 return getNode(ISD::AND, AType, Shift, N2); 1355 } 1356 } 1357 } 1358 break; 1359 case ISD::BRCOND: 1360 if (N2C) 1361 if (N2C->getValue()) // Unconditional branch 1362 return getNode(ISD::BR, MVT::Other, N1, N3); 1363 else 1364 return N1; // Never-taken branch 1365 break; 1366 } 1367 1368 std::vector<SDOperand> Ops; 1369 Ops.reserve(3); 1370 Ops.push_back(N1); 1371 Ops.push_back(N2); 1372 Ops.push_back(N3); 1373 1374 // Memoize nodes. 1375 SDNode *&N = OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1376 if (N) return SDOperand(N, 0); 1377 1378 N = new SDNode(Opcode, N1, N2, N3); 1379 N->setValueTypes(VT); 1380 AllNodes.push_back(N); 1381 return SDOperand(N, 0); 1382} 1383 1384SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1385 SDOperand N1, SDOperand N2, SDOperand N3, 1386 SDOperand N4) { 1387 std::vector<SDOperand> Ops; 1388 Ops.reserve(4); 1389 Ops.push_back(N1); 1390 Ops.push_back(N2); 1391 Ops.push_back(N3); 1392 Ops.push_back(N4); 1393 return getNode(Opcode, VT, Ops); 1394} 1395 1396SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { 1397 assert((!V || isa<PointerType>(V->getType())) && 1398 "SrcValue is not a pointer?"); 1399 SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; 1400 if (N) return SDOperand(N, 0); 1401 1402 N = new SrcValueSDNode(V, Offset); 1403 AllNodes.push_back(N); 1404 return SDOperand(N, 0); 1405} 1406 1407SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1408 std::vector<SDOperand> &Ops) { 1409 switch (Ops.size()) { 1410 case 0: return getNode(Opcode, VT); 1411 case 1: return getNode(Opcode, VT, Ops[0]); 1412 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 1413 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 1414 default: break; 1415 } 1416 1417 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val); 1418 switch (Opcode) { 1419 default: break; 1420 case ISD::BRCONDTWOWAY: 1421 if (N1C) 1422 if (N1C->getValue()) // Unconditional branch to true dest. 1423 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]); 1424 else // Unconditional branch to false dest. 1425 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]); 1426 break; 1427 } 1428 1429 // Memoize nodes. 1430 SDNode *&N = OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1431 if (N) return SDOperand(N, 0); 1432 N = new SDNode(Opcode, Ops); 1433 N->setValueTypes(VT); 1434 AllNodes.push_back(N); 1435 return SDOperand(N, 0); 1436} 1437 1438SDOperand SelectionDAG::getNode(unsigned Opcode, 1439 std::vector<MVT::ValueType> &ResultTys, 1440 std::vector<SDOperand> &Ops) { 1441 if (ResultTys.size() == 1) 1442 return getNode(Opcode, ResultTys[0], Ops); 1443 1444 // FIXME: figure out how to safely handle things like 1445 // int foo(int x) { return 1 << (x & 255); } 1446 // int bar() { return foo(256); } 1447#if 0 1448 switch (Opcode) { 1449 case ISD::SRA_PARTS: 1450 case ISD::SRL_PARTS: 1451 case ISD::SHL_PARTS: 1452 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 1453 cast<MVTSDNode>(N3)->getExtraValueType() != MVT::i1) 1454 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1455 else if (N3.getOpcode() == ISD::AND) 1456 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 1457 // If the and is only masking out bits that cannot effect the shift, 1458 // eliminate the and. 1459 unsigned NumBits = MVT::getSizeInBits(VT)*2; 1460 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1461 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1462 } 1463 break; 1464 } 1465#endif 1466 1467 // Memoize the node. 1468 SDNode *&N = ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, 1469 Ops))]; 1470 if (N) return SDOperand(N, 0); 1471 N = new SDNode(Opcode, Ops); 1472 N->setValueTypes(ResultTys); 1473 AllNodes.push_back(N); 1474 return SDOperand(N, 0); 1475} 1476 1477 1478SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1479 MVT::ValueType EVT) { 1480 1481 switch (Opcode) { 1482 default: assert(0 && "Bad opcode for this accessor!"); 1483 case ISD::FP_ROUND_INREG: 1484 assert(VT == N1.getValueType() && "Not an inreg round!"); 1485 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1486 "Cannot FP_ROUND_INREG integer types"); 1487 if (EVT == VT) return N1; // Not actually rounding 1488 assert(EVT < VT && "Not rounding down!"); 1489 1490 if (isa<ConstantFPSDNode>(N1)) 1491 return getNode(ISD::FP_EXTEND, VT, getNode(ISD::FP_ROUND, EVT, N1)); 1492 break; 1493 case ISD::SIGN_EXTEND_INREG: 1494 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1495 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1496 "Cannot *_EXTEND_INREG FP types"); 1497 if (EVT == VT) return N1; // Not actually extending 1498 assert(EVT < VT && "Not extending!"); 1499 1500 // Extending a constant? Just return the extended constant. 1501 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1502 SDOperand Tmp = getNode(ISD::TRUNCATE, EVT, N1); 1503 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1504 } 1505 1506 // If we are sign extending an extension, use the original source. 1507 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) 1508 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1509 return N1; 1510 1511 // If we are sign extending a sextload, return just the load. 1512 if (N1.getOpcode() == ISD::SEXTLOAD && Opcode == ISD::SIGN_EXTEND_INREG) 1513 if (cast<MVTSDNode>(N1)->getExtraValueType() <= EVT) 1514 return N1; 1515 1516 // If we are extending the result of a setcc, and we already know the 1517 // contents of the top bits, eliminate the extension. 1518 if (N1.getOpcode() == ISD::SETCC && 1519 TLI.getSetCCResultContents() == 1520 TargetLowering::ZeroOrNegativeOneSetCCResult) 1521 return N1; 1522 1523 // If we are sign extending the result of an (and X, C) operation, and we 1524 // know the extended bits are zeros already, don't do the extend. 1525 if (N1.getOpcode() == ISD::AND) 1526 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1527 uint64_t Mask = N1C->getValue(); 1528 unsigned NumBits = MVT::getSizeInBits(EVT); 1529 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1530 return N1; 1531 } 1532 break; 1533 } 1534 1535 EVTStruct NN; 1536 NN.Opcode = Opcode; 1537 NN.VT = VT; 1538 NN.EVT = EVT; 1539 NN.Ops.push_back(N1); 1540 1541 SDNode *&N = MVTSDNodes[NN]; 1542 if (N) return SDOperand(N, 0); 1543 N = new MVTSDNode(Opcode, VT, N1, EVT); 1544 AllNodes.push_back(N); 1545 return SDOperand(N, 0); 1546} 1547 1548SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1549 SDOperand N2, SDOperand N3, MVT::ValueType EVT) { 1550 switch (Opcode) { 1551 default: assert(0 && "Bad opcode for this accessor!"); 1552 case ISD::EXTLOAD: 1553 case ISD::SEXTLOAD: 1554 case ISD::ZEXTLOAD: 1555 // If they are asking for an extending load from/to the same thing, return a 1556 // normal load. 1557 if (VT == EVT) 1558 return getLoad(VT, N1, N2, N3); 1559 assert(EVT < VT && "Should only be an extending load, not truncating!"); 1560 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) && 1561 "Cannot sign/zero extend a FP load!"); 1562 assert(MVT::isInteger(VT) == MVT::isInteger(EVT) && 1563 "Cannot convert from FP to Int or Int -> FP!"); 1564 break; 1565 } 1566 1567 EVTStruct NN; 1568 NN.Opcode = Opcode; 1569 NN.VT = VT; 1570 NN.EVT = EVT; 1571 NN.Ops.push_back(N1); 1572 NN.Ops.push_back(N2); 1573 NN.Ops.push_back(N3); 1574 1575 SDNode *&N = MVTSDNodes[NN]; 1576 if (N) return SDOperand(N, 0); 1577 N = new MVTSDNode(Opcode, VT, MVT::Other, N1, N2, N3, EVT); 1578 AllNodes.push_back(N); 1579 return SDOperand(N, 0); 1580} 1581 1582SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, 1583 SDOperand N2, SDOperand N3, SDOperand N4, 1584 MVT::ValueType EVT) { 1585 switch (Opcode) { 1586 default: assert(0 && "Bad opcode for this accessor!"); 1587 case ISD::TRUNCSTORE: 1588#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1589 // If this is a truncating store of a constant, convert to the desired type 1590 // and store it instead. 1591 if (isa<Constant>(N1)) { 1592 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1593 if (isa<Constant>(Op)) 1594 N1 = Op; 1595 } 1596 // Also for ConstantFP? 1597#endif 1598 if (N1.getValueType() == EVT) // Normal store? 1599 return getNode(ISD::STORE, VT, N1, N2, N3, N4); 1600 assert(N2.getValueType() > EVT && "Not a truncation?"); 1601 assert(MVT::isInteger(N2.getValueType()) == MVT::isInteger(EVT) && 1602 "Can't do FP-INT conversion!"); 1603 break; 1604 } 1605 1606 EVTStruct NN; 1607 NN.Opcode = Opcode; 1608 NN.VT = VT; 1609 NN.EVT = EVT; 1610 NN.Ops.push_back(N1); 1611 NN.Ops.push_back(N2); 1612 NN.Ops.push_back(N3); 1613 NN.Ops.push_back(N4); 1614 1615 SDNode *&N = MVTSDNodes[NN]; 1616 if (N) return SDOperand(N, 0); 1617 N = new MVTSDNode(Opcode, VT, N1, N2, N3, N4, EVT); 1618 AllNodes.push_back(N); 1619 return SDOperand(N, 0); 1620} 1621 1622 1623/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 1624/// indicated value. This method ignores uses of other values defined by this 1625/// operation. 1626bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 1627 assert(Value < getNumValues() && "Bad value!"); 1628 1629 // If there is only one value, this is easy. 1630 if (getNumValues() == 1) 1631 return use_size() == NUses; 1632 if (Uses.size() < NUses) return false; 1633 1634 SDOperand TheValue(this, Value); 1635 1636 std::set<SDNode*> UsersHandled; 1637 1638 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 1639 UI != E; ++UI) { 1640 SDNode *User = *UI; 1641 if (User->getNumOperands() == 1 || 1642 UsersHandled.insert(User).second) // First time we've seen this? 1643 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 1644 if (User->getOperand(i) == TheValue) { 1645 if (NUses == 0) 1646 return false; // too many uses 1647 --NUses; 1648 } 1649 } 1650 1651 // Found exactly the right number of uses? 1652 return NUses == 0; 1653} 1654 1655 1656const char *SDNode::getOperationName() const { 1657 switch (getOpcode()) { 1658 default: return "<<Unknown>>"; 1659 case ISD::PCMARKER: return "PCMarker"; 1660 case ISD::SRCVALUE: return "SrcValue"; 1661 case ISD::EntryToken: return "EntryToken"; 1662 case ISD::TokenFactor: return "TokenFactor"; 1663 case ISD::Constant: return "Constant"; 1664 case ISD::ConstantFP: return "ConstantFP"; 1665 case ISD::GlobalAddress: return "GlobalAddress"; 1666 case ISD::FrameIndex: return "FrameIndex"; 1667 case ISD::BasicBlock: return "BasicBlock"; 1668 case ISD::ExternalSymbol: return "ExternalSymbol"; 1669 case ISD::ConstantPool: return "ConstantPoolIndex"; 1670 case ISD::CopyToReg: return "CopyToReg"; 1671 case ISD::CopyFromReg: return "CopyFromReg"; 1672 case ISD::ImplicitDef: return "ImplicitDef"; 1673 case ISD::UNDEF: return "undef"; 1674 1675 // Unary operators 1676 case ISD::FABS: return "fabs"; 1677 case ISD::FNEG: return "fneg"; 1678 case ISD::FSQRT: return "fsqrt"; 1679 case ISD::FSIN: return "fsin"; 1680 case ISD::FCOS: return "fcos"; 1681 1682 // Binary operators 1683 case ISD::ADD: return "add"; 1684 case ISD::SUB: return "sub"; 1685 case ISD::MUL: return "mul"; 1686 case ISD::MULHU: return "mulhu"; 1687 case ISD::MULHS: return "mulhs"; 1688 case ISD::SDIV: return "sdiv"; 1689 case ISD::UDIV: return "udiv"; 1690 case ISD::SREM: return "srem"; 1691 case ISD::UREM: return "urem"; 1692 case ISD::AND: return "and"; 1693 case ISD::OR: return "or"; 1694 case ISD::XOR: return "xor"; 1695 case ISD::SHL: return "shl"; 1696 case ISD::SRA: return "sra"; 1697 case ISD::SRL: return "srl"; 1698 1699 case ISD::SELECT: return "select"; 1700 case ISD::ADD_PARTS: return "add_parts"; 1701 case ISD::SUB_PARTS: return "sub_parts"; 1702 case ISD::SHL_PARTS: return "shl_parts"; 1703 case ISD::SRA_PARTS: return "sra_parts"; 1704 case ISD::SRL_PARTS: return "srl_parts"; 1705 1706 // Conversion operators. 1707 case ISD::SIGN_EXTEND: return "sign_extend"; 1708 case ISD::ZERO_EXTEND: return "zero_extend"; 1709 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 1710 case ISD::TRUNCATE: return "truncate"; 1711 case ISD::FP_ROUND: return "fp_round"; 1712 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 1713 case ISD::FP_EXTEND: return "fp_extend"; 1714 1715 case ISD::SINT_TO_FP: return "sint_to_fp"; 1716 case ISD::UINT_TO_FP: return "uint_to_fp"; 1717 case ISD::FP_TO_SINT: return "fp_to_sint"; 1718 case ISD::FP_TO_UINT: return "fp_to_uint"; 1719 1720 // Control flow instructions 1721 case ISD::BR: return "br"; 1722 case ISD::BRCOND: return "brcond"; 1723 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 1724 case ISD::RET: return "ret"; 1725 case ISD::CALL: return "call"; 1726 case ISD::TAILCALL:return "tailcall"; 1727 case ISD::CALLSEQ_START: return "callseq_start"; 1728 case ISD::CALLSEQ_END: return "callseq_end"; 1729 1730 // Other operators 1731 case ISD::LOAD: return "load"; 1732 case ISD::STORE: return "store"; 1733 case ISD::EXTLOAD: return "extload"; 1734 case ISD::SEXTLOAD: return "sextload"; 1735 case ISD::ZEXTLOAD: return "zextload"; 1736 case ISD::TRUNCSTORE: return "truncstore"; 1737 1738 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 1739 case ISD::EXTRACT_ELEMENT: return "extract_element"; 1740 case ISD::BUILD_PAIR: return "build_pair"; 1741 case ISD::MEMSET: return "memset"; 1742 case ISD::MEMCPY: return "memcpy"; 1743 case ISD::MEMMOVE: return "memmove"; 1744 1745 // Bit counting 1746 case ISD::CTPOP: return "ctpop"; 1747 case ISD::CTTZ: return "cttz"; 1748 case ISD::CTLZ: return "ctlz"; 1749 1750 // IO Intrinsics 1751 case ISD::READPORT: return "readport"; 1752 case ISD::WRITEPORT: return "writeport"; 1753 case ISD::READIO: return "readio"; 1754 case ISD::WRITEIO: return "writeio"; 1755 1756 case ISD::SETCC: 1757 const SetCCSDNode *SetCC = cast<SetCCSDNode>(this); 1758 switch (SetCC->getCondition()) { 1759 default: assert(0 && "Unknown setcc condition!"); 1760 case ISD::SETOEQ: return "setcc:setoeq"; 1761 case ISD::SETOGT: return "setcc:setogt"; 1762 case ISD::SETOGE: return "setcc:setoge"; 1763 case ISD::SETOLT: return "setcc:setolt"; 1764 case ISD::SETOLE: return "setcc:setole"; 1765 case ISD::SETONE: return "setcc:setone"; 1766 1767 case ISD::SETO: return "setcc:seto"; 1768 case ISD::SETUO: return "setcc:setuo"; 1769 case ISD::SETUEQ: return "setcc:setue"; 1770 case ISD::SETUGT: return "setcc:setugt"; 1771 case ISD::SETUGE: return "setcc:setuge"; 1772 case ISD::SETULT: return "setcc:setult"; 1773 case ISD::SETULE: return "setcc:setule"; 1774 case ISD::SETUNE: return "setcc:setune"; 1775 1776 case ISD::SETEQ: return "setcc:seteq"; 1777 case ISD::SETGT: return "setcc:setgt"; 1778 case ISD::SETGE: return "setcc:setge"; 1779 case ISD::SETLT: return "setcc:setlt"; 1780 case ISD::SETLE: return "setcc:setle"; 1781 case ISD::SETNE: return "setcc:setne"; 1782 } 1783 } 1784} 1785 1786void SDNode::dump() const { 1787 std::cerr << (void*)this << ": "; 1788 1789 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 1790 if (i) std::cerr << ","; 1791 if (getValueType(i) == MVT::Other) 1792 std::cerr << "ch"; 1793 else 1794 std::cerr << MVT::getValueTypeString(getValueType(i)); 1795 } 1796 std::cerr << " = " << getOperationName(); 1797 1798 std::cerr << " "; 1799 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1800 if (i) std::cerr << ", "; 1801 std::cerr << (void*)getOperand(i).Val; 1802 if (unsigned RN = getOperand(i).ResNo) 1803 std::cerr << ":" << RN; 1804 } 1805 1806 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 1807 std::cerr << "<" << CSDN->getValue() << ">"; 1808 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 1809 std::cerr << "<" << CSDN->getValue() << ">"; 1810 } else if (const GlobalAddressSDNode *GADN = 1811 dyn_cast<GlobalAddressSDNode>(this)) { 1812 std::cerr << "<"; 1813 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 1814 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 1815 std::cerr << "<" << FIDN->getIndex() << ">"; 1816 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 1817 std::cerr << "<" << CP->getIndex() << ">"; 1818 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 1819 std::cerr << "<"; 1820 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 1821 if (LBB) 1822 std::cerr << LBB->getName() << " "; 1823 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 1824 } else if (const RegSDNode *C2V = dyn_cast<RegSDNode>(this)) { 1825 std::cerr << "<reg #" << C2V->getReg() << ">"; 1826 } else if (const ExternalSymbolSDNode *ES = 1827 dyn_cast<ExternalSymbolSDNode>(this)) { 1828 std::cerr << "'" << ES->getSymbol() << "'"; 1829 } else if (const MVTSDNode *M = dyn_cast<MVTSDNode>(this)) { 1830 std::cerr << " - Ty = " << MVT::getValueTypeString(M->getExtraValueType()); 1831 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 1832 if (M->getValue()) 1833 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">"; 1834 else 1835 std::cerr << "<null:" << M->getOffset() << ">"; 1836 } 1837} 1838 1839static void DumpNodes(SDNode *N, unsigned indent) { 1840 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 1841 if (N->getOperand(i).Val->hasOneUse()) 1842 DumpNodes(N->getOperand(i).Val, indent+2); 1843 else 1844 std::cerr << "\n" << std::string(indent+2, ' ') 1845 << (void*)N->getOperand(i).Val << ": <multiple use>"; 1846 1847 1848 std::cerr << "\n" << std::string(indent, ' '); 1849 N->dump(); 1850} 1851 1852void SelectionDAG::dump() const { 1853 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 1854 std::vector<SDNode*> Nodes(AllNodes); 1855 std::sort(Nodes.begin(), Nodes.end()); 1856 1857 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 1858 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 1859 DumpNodes(Nodes[i], 2); 1860 } 1861 1862 DumpNodes(getRoot().Val, 2); 1863 1864 std::cerr << "\n\n"; 1865} 1866 1867