SelectionDAG.cpp revision 20270c909357e5e501cac1f5393430dfacfc57d8
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/Function.h" 17#include "llvm/GlobalAlias.h" 18#include "llvm/GlobalVariable.h" 19#include "llvm/Intrinsics.h" 20#include "llvm/DerivedTypes.h" 21#include "llvm/Assembly/Writer.h" 22#include "llvm/CallingConv.h" 23#include "llvm/CodeGen/MachineBasicBlock.h" 24#include "llvm/CodeGen/MachineConstantPool.h" 25#include "llvm/CodeGen/MachineFrameInfo.h" 26#include "llvm/CodeGen/MachineModuleInfo.h" 27#include "llvm/CodeGen/PseudoSourceValue.h" 28#include "llvm/Target/TargetRegisterInfo.h" 29#include "llvm/Target/TargetData.h" 30#include "llvm/Target/TargetLowering.h" 31#include "llvm/Target/TargetOptions.h" 32#include "llvm/Target/TargetInstrInfo.h" 33#include "llvm/Target/TargetIntrinsicInfo.h" 34#include "llvm/Target/TargetMachine.h" 35#include "llvm/Support/CommandLine.h" 36#include "llvm/Support/ErrorHandling.h" 37#include "llvm/Support/ManagedStatic.h" 38#include "llvm/Support/MathExtras.h" 39#include "llvm/Support/raw_ostream.h" 40#include "llvm/System/Mutex.h" 41#include "llvm/ADT/SetVector.h" 42#include "llvm/ADT/SmallPtrSet.h" 43#include "llvm/ADT/SmallSet.h" 44#include "llvm/ADT/SmallVector.h" 45#include "llvm/ADT/StringExtras.h" 46#include <algorithm> 47#include <cmath> 48using namespace llvm; 49 50/// makeVTList - Return an instance of the SDVTList struct initialized with the 51/// specified members. 52static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 53 SDVTList Res = {VTs, NumVTs}; 54 return Res; 55} 56 57static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 58 switch (VT.getSimpleVT().SimpleTy) { 59 default: llvm_unreachable("Unknown FP format"); 60 case MVT::f32: return &APFloat::IEEEsingle; 61 case MVT::f64: return &APFloat::IEEEdouble; 62 case MVT::f80: return &APFloat::x87DoubleExtended; 63 case MVT::f128: return &APFloat::IEEEquad; 64 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 65 } 66} 67 68SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 69 70//===----------------------------------------------------------------------===// 71// ConstantFPSDNode Class 72//===----------------------------------------------------------------------===// 73 74/// isExactlyValue - We don't rely on operator== working on double values, as 75/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 76/// As such, this method can be used to do an exact bit-for-bit comparison of 77/// two floating point values. 78bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 79 return getValueAPF().bitwiseIsEqual(V); 80} 81 82bool ConstantFPSDNode::isValueValidForType(EVT VT, 83 const APFloat& Val) { 84 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 85 86 // PPC long double cannot be converted to any other type. 87 if (VT == MVT::ppcf128 || 88 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 89 return false; 90 91 // convert modifies in place, so make a copy. 92 APFloat Val2 = APFloat(Val); 93 bool losesInfo; 94 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 95 &losesInfo); 96 return !losesInfo; 97} 98 99//===----------------------------------------------------------------------===// 100// ISD Namespace 101//===----------------------------------------------------------------------===// 102 103/// isBuildVectorAllOnes - Return true if the specified node is a 104/// BUILD_VECTOR where all of the elements are ~0 or undef. 105bool ISD::isBuildVectorAllOnes(const SDNode *N) { 106 // Look through a bit convert. 107 if (N->getOpcode() == ISD::BIT_CONVERT) 108 N = N->getOperand(0).getNode(); 109 110 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 111 112 unsigned i = 0, e = N->getNumOperands(); 113 114 // Skip over all of the undef values. 115 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 116 ++i; 117 118 // Do not accept an all-undef vector. 119 if (i == e) return false; 120 121 // Do not accept build_vectors that aren't all constants or which have non-~0 122 // elements. 123 SDValue NotZero = N->getOperand(i); 124 if (isa<ConstantSDNode>(NotZero)) { 125 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 126 return false; 127 } else if (isa<ConstantFPSDNode>(NotZero)) { 128 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 129 bitcastToAPInt().isAllOnesValue()) 130 return false; 131 } else 132 return false; 133 134 // Okay, we have at least one ~0 value, check to see if the rest match or are 135 // undefs. 136 for (++i; i != e; ++i) 137 if (N->getOperand(i) != NotZero && 138 N->getOperand(i).getOpcode() != ISD::UNDEF) 139 return false; 140 return true; 141} 142 143 144/// isBuildVectorAllZeros - Return true if the specified node is a 145/// BUILD_VECTOR where all of the elements are 0 or undef. 146bool ISD::isBuildVectorAllZeros(const SDNode *N) { 147 // Look through a bit convert. 148 if (N->getOpcode() == ISD::BIT_CONVERT) 149 N = N->getOperand(0).getNode(); 150 151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 152 153 unsigned i = 0, e = N->getNumOperands(); 154 155 // Skip over all of the undef values. 156 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 157 ++i; 158 159 // Do not accept an all-undef vector. 160 if (i == e) return false; 161 162 // Do not accept build_vectors that aren't all constants or which have non-0 163 // elements. 164 SDValue Zero = N->getOperand(i); 165 if (isa<ConstantSDNode>(Zero)) { 166 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 167 return false; 168 } else if (isa<ConstantFPSDNode>(Zero)) { 169 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 170 return false; 171 } else 172 return false; 173 174 // Okay, we have at least one 0 value, check to see if the rest match or are 175 // undefs. 176 for (++i; i != e; ++i) 177 if (N->getOperand(i) != Zero && 178 N->getOperand(i).getOpcode() != ISD::UNDEF) 179 return false; 180 return true; 181} 182 183/// isScalarToVector - Return true if the specified node is a 184/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 185/// element is not an undef. 186bool ISD::isScalarToVector(const SDNode *N) { 187 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 188 return true; 189 190 if (N->getOpcode() != ISD::BUILD_VECTOR) 191 return false; 192 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 193 return false; 194 unsigned NumElems = N->getNumOperands(); 195 for (unsigned i = 1; i < NumElems; ++i) { 196 SDValue V = N->getOperand(i); 197 if (V.getOpcode() != ISD::UNDEF) 198 return false; 199 } 200 return true; 201} 202 203 204/// isDebugLabel - Return true if the specified node represents a debug 205/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 206bool ISD::isDebugLabel(const SDNode *N) { 207 SDValue Zero; 208 if (N->getOpcode() == ISD::DBG_LABEL) 209 return true; 210 if (N->isMachineOpcode() && 211 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 212 return true; 213 return false; 214} 215 216/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 217/// when given the operation for (X op Y). 218ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 219 // To perform this operation, we just need to swap the L and G bits of the 220 // operation. 221 unsigned OldL = (Operation >> 2) & 1; 222 unsigned OldG = (Operation >> 1) & 1; 223 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 224 (OldL << 1) | // New G bit 225 (OldG << 2)); // New L bit. 226} 227 228/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 229/// 'op' is a valid SetCC operation. 230ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 231 unsigned Operation = Op; 232 if (isInteger) 233 Operation ^= 7; // Flip L, G, E bits, but not U. 234 else 235 Operation ^= 15; // Flip all of the condition bits. 236 237 if (Operation > ISD::SETTRUE2) 238 Operation &= ~8; // Don't let N and U bits get set. 239 240 return ISD::CondCode(Operation); 241} 242 243 244/// isSignedOp - For an integer comparison, return 1 if the comparison is a 245/// signed operation and 2 if the result is an unsigned comparison. Return zero 246/// if the operation does not depend on the sign of the input (setne and seteq). 247static int isSignedOp(ISD::CondCode Opcode) { 248 switch (Opcode) { 249 default: llvm_unreachable("Illegal integer setcc operation!"); 250 case ISD::SETEQ: 251 case ISD::SETNE: return 0; 252 case ISD::SETLT: 253 case ISD::SETLE: 254 case ISD::SETGT: 255 case ISD::SETGE: return 1; 256 case ISD::SETULT: 257 case ISD::SETULE: 258 case ISD::SETUGT: 259 case ISD::SETUGE: return 2; 260 } 261} 262 263/// getSetCCOrOperation - Return the result of a logical OR between different 264/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 265/// returns SETCC_INVALID if it is not possible to represent the resultant 266/// comparison. 267ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 268 bool isInteger) { 269 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 270 // Cannot fold a signed integer setcc with an unsigned integer setcc. 271 return ISD::SETCC_INVALID; 272 273 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 274 275 // If the N and U bits get set then the resultant comparison DOES suddenly 276 // care about orderedness, and is true when ordered. 277 if (Op > ISD::SETTRUE2) 278 Op &= ~16; // Clear the U bit if the N bit is set. 279 280 // Canonicalize illegal integer setcc's. 281 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 282 Op = ISD::SETNE; 283 284 return ISD::CondCode(Op); 285} 286 287/// getSetCCAndOperation - Return the result of a logical AND between different 288/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 289/// function returns zero if it is not possible to represent the resultant 290/// comparison. 291ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 292 bool isInteger) { 293 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 294 // Cannot fold a signed setcc with an unsigned setcc. 295 return ISD::SETCC_INVALID; 296 297 // Combine all of the condition bits. 298 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 299 300 // Canonicalize illegal integer setcc's. 301 if (isInteger) { 302 switch (Result) { 303 default: break; 304 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 305 case ISD::SETOEQ: // SETEQ & SETU[LG]E 306 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 307 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 308 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 309 } 310 } 311 312 return Result; 313} 314 315const TargetMachine &SelectionDAG::getTarget() const { 316 return MF->getTarget(); 317} 318 319//===----------------------------------------------------------------------===// 320// SDNode Profile Support 321//===----------------------------------------------------------------------===// 322 323/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 324/// 325static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 326 ID.AddInteger(OpC); 327} 328 329/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 330/// solely with their pointer. 331static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 332 ID.AddPointer(VTList.VTs); 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDValue *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 346/// 347static void AddNodeIDOperands(FoldingSetNodeID &ID, 348 const SDUse *Ops, unsigned NumOps) { 349 for (; NumOps; --NumOps, ++Ops) { 350 ID.AddPointer(Ops->getNode()); 351 ID.AddInteger(Ops->getResNo()); 352 } 353} 354 355static void AddNodeIDNode(FoldingSetNodeID &ID, 356 unsigned short OpC, SDVTList VTList, 357 const SDValue *OpList, unsigned N) { 358 AddNodeIDOpcode(ID, OpC); 359 AddNodeIDValueTypes(ID, VTList); 360 AddNodeIDOperands(ID, OpList, N); 361} 362 363/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 364/// the NodeID data. 365static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 366 switch (N->getOpcode()) { 367 case ISD::TargetExternalSymbol: 368 case ISD::ExternalSymbol: 369 llvm_unreachable("Should only be used on nodes with operands"); 370 default: break; // Normal nodes don't need extra info. 371 case ISD::TargetConstant: 372 case ISD::Constant: 373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 374 break; 375 case ISD::TargetConstantFP: 376 case ISD::ConstantFP: { 377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 378 break; 379 } 380 case ISD::TargetGlobalAddress: 381 case ISD::GlobalAddress: 382 case ISD::TargetGlobalTLSAddress: 383 case ISD::GlobalTLSAddress: { 384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 385 ID.AddPointer(GA->getGlobal()); 386 ID.AddInteger(GA->getOffset()); 387 ID.AddInteger(GA->getTargetFlags()); 388 break; 389 } 390 case ISD::BasicBlock: 391 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 392 break; 393 case ISD::Register: 394 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 395 break; 396 case ISD::DBG_STOPPOINT: { 397 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 398 ID.AddInteger(DSP->getLine()); 399 ID.AddInteger(DSP->getColumn()); 400 ID.AddPointer(DSP->getCompileUnit()); 401 break; 402 } 403 case ISD::SRCVALUE: 404 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 405 break; 406 case ISD::FrameIndex: 407 case ISD::TargetFrameIndex: 408 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 409 break; 410 case ISD::JumpTable: 411 case ISD::TargetJumpTable: 412 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 413 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 414 break; 415 case ISD::ConstantPool: 416 case ISD::TargetConstantPool: { 417 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 418 ID.AddInteger(CP->getAlignment()); 419 ID.AddInteger(CP->getOffset()); 420 if (CP->isMachineConstantPoolEntry()) 421 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 422 else 423 ID.AddPointer(CP->getConstVal()); 424 ID.AddInteger(CP->getTargetFlags()); 425 break; 426 } 427 case ISD::LOAD: { 428 const LoadSDNode *LD = cast<LoadSDNode>(N); 429 ID.AddInteger(LD->getMemoryVT().getRawBits()); 430 ID.AddInteger(LD->getRawSubclassData()); 431 break; 432 } 433 case ISD::STORE: { 434 const StoreSDNode *ST = cast<StoreSDNode>(N); 435 ID.AddInteger(ST->getMemoryVT().getRawBits()); 436 ID.AddInteger(ST->getRawSubclassData()); 437 break; 438 } 439 case ISD::ATOMIC_CMP_SWAP: 440 case ISD::ATOMIC_SWAP: 441 case ISD::ATOMIC_LOAD_ADD: 442 case ISD::ATOMIC_LOAD_SUB: 443 case ISD::ATOMIC_LOAD_AND: 444 case ISD::ATOMIC_LOAD_OR: 445 case ISD::ATOMIC_LOAD_XOR: 446 case ISD::ATOMIC_LOAD_NAND: 447 case ISD::ATOMIC_LOAD_MIN: 448 case ISD::ATOMIC_LOAD_MAX: 449 case ISD::ATOMIC_LOAD_UMIN: 450 case ISD::ATOMIC_LOAD_UMAX: { 451 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 452 ID.AddInteger(AT->getMemoryVT().getRawBits()); 453 ID.AddInteger(AT->getRawSubclassData()); 454 break; 455 } 456 case ISD::VECTOR_SHUFFLE: { 457 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 458 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 459 i != e; ++i) 460 ID.AddInteger(SVN->getMaskElt(i)); 461 break; 462 } 463 } // end switch (N->getOpcode()) 464} 465 466/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 467/// data. 468static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 469 AddNodeIDOpcode(ID, N->getOpcode()); 470 // Add the return value info. 471 AddNodeIDValueTypes(ID, N->getVTList()); 472 // Add the operand info. 473 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 474 475 // Handle SDNode leafs with special info. 476 AddNodeIDCustom(ID, N); 477} 478 479/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 480/// the CSE map that carries volatility, indexing mode, and 481/// extension/truncation information. 482/// 483static inline unsigned 484encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile) { 485 assert((ConvType & 3) == ConvType && 486 "ConvType may not require more than 2 bits!"); 487 assert((AM & 7) == AM && 488 "AM may not require more than 3 bits!"); 489 return ConvType | 490 (AM << 2) | 491 (isVolatile << 5); 492} 493 494//===----------------------------------------------------------------------===// 495// SelectionDAG Class 496//===----------------------------------------------------------------------===// 497 498/// doNotCSE - Return true if CSE should not be performed for this node. 499static bool doNotCSE(SDNode *N) { 500 if (N->getValueType(0) == MVT::Flag) 501 return true; // Never CSE anything that produces a flag. 502 503 switch (N->getOpcode()) { 504 default: break; 505 case ISD::HANDLENODE: 506 case ISD::DBG_LABEL: 507 case ISD::DBG_STOPPOINT: 508 case ISD::EH_LABEL: 509 return true; // Never CSE these nodes. 510 } 511 512 // Check that remaining values produced are not flags. 513 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 514 if (N->getValueType(i) == MVT::Flag) 515 return true; // Never CSE anything that produces a flag. 516 517 return false; 518} 519 520/// RemoveDeadNodes - This method deletes all unreachable nodes in the 521/// SelectionDAG. 522void SelectionDAG::RemoveDeadNodes() { 523 // Create a dummy node (which is not added to allnodes), that adds a reference 524 // to the root node, preventing it from being deleted. 525 HandleSDNode Dummy(getRoot()); 526 527 SmallVector<SDNode*, 128> DeadNodes; 528 529 // Add all obviously-dead nodes to the DeadNodes worklist. 530 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 531 if (I->use_empty()) 532 DeadNodes.push_back(I); 533 534 RemoveDeadNodes(DeadNodes); 535 536 // If the root changed (e.g. it was a dead load, update the root). 537 setRoot(Dummy.getValue()); 538} 539 540/// RemoveDeadNodes - This method deletes the unreachable nodes in the 541/// given list, and any nodes that become unreachable as a result. 542void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 543 DAGUpdateListener *UpdateListener) { 544 545 // Process the worklist, deleting the nodes and adding their uses to the 546 // worklist. 547 while (!DeadNodes.empty()) { 548 SDNode *N = DeadNodes.pop_back_val(); 549 550 if (UpdateListener) 551 UpdateListener->NodeDeleted(N, 0); 552 553 // Take the node out of the appropriate CSE map. 554 RemoveNodeFromCSEMaps(N); 555 556 // Next, brutally remove the operand list. This is safe to do, as there are 557 // no cycles in the graph. 558 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 559 SDUse &Use = *I++; 560 SDNode *Operand = Use.getNode(); 561 Use.set(SDValue()); 562 563 // Now that we removed this operand, see if there are no uses of it left. 564 if (Operand->use_empty()) 565 DeadNodes.push_back(Operand); 566 } 567 568 DeallocateNode(N); 569 } 570} 571 572void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 573 SmallVector<SDNode*, 16> DeadNodes(1, N); 574 RemoveDeadNodes(DeadNodes, UpdateListener); 575} 576 577void SelectionDAG::DeleteNode(SDNode *N) { 578 // First take this out of the appropriate CSE map. 579 RemoveNodeFromCSEMaps(N); 580 581 // Finally, remove uses due to operands of this node, remove from the 582 // AllNodes list, and delete the node. 583 DeleteNodeNotInCSEMaps(N); 584} 585 586void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 587 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 588 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 589 590 // Drop all of the operands and decrement used node's use counts. 591 N->DropOperands(); 592 593 DeallocateNode(N); 594} 595 596void SelectionDAG::DeallocateNode(SDNode *N) { 597 if (N->OperandsNeedDelete) 598 delete[] N->OperandList; 599 600 // Set the opcode to DELETED_NODE to help catch bugs when node 601 // memory is reallocated. 602 N->NodeType = ISD::DELETED_NODE; 603 604 NodeAllocator.Deallocate(AllNodes.remove(N)); 605} 606 607/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 608/// correspond to it. This is useful when we're about to delete or repurpose 609/// the node. We don't want future request for structurally identical nodes 610/// to return N anymore. 611bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 612 bool Erased = false; 613 switch (N->getOpcode()) { 614 case ISD::EntryToken: 615 llvm_unreachable("EntryToken should not be in CSEMaps!"); 616 return false; 617 case ISD::HANDLENODE: return false; // noop. 618 case ISD::CONDCODE: 619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 620 "Cond code doesn't exist!"); 621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 623 break; 624 case ISD::ExternalSymbol: 625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 626 break; 627 case ISD::TargetExternalSymbol: { 628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 629 Erased = TargetExternalSymbols.erase( 630 std::pair<std::string,unsigned char>(ESN->getSymbol(), 631 ESN->getTargetFlags())); 632 break; 633 } 634 case ISD::VALUETYPE: { 635 EVT VT = cast<VTSDNode>(N)->getVT(); 636 if (VT.isExtended()) { 637 Erased = ExtendedValueTypeNodes.erase(VT); 638 } else { 639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 641 } 642 break; 643 } 644 default: 645 // Remove it from the CSE Map. 646 Erased = CSEMap.RemoveNode(N); 647 break; 648 } 649#ifndef NDEBUG 650 // Verify that the node was actually in one of the CSE maps, unless it has a 651 // flag result (which cannot be CSE'd) or is one of the special cases that are 652 // not subject to CSE. 653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 654 !N->isMachineOpcode() && !doNotCSE(N)) { 655 N->dump(this); 656 errs() << "\n"; 657 llvm_unreachable("Node is not in map!"); 658 } 659#endif 660 return Erased; 661} 662 663/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 664/// maps and modified in place. Add it back to the CSE maps, unless an identical 665/// node already exists, in which case transfer all its users to the existing 666/// node. This transfer can potentially trigger recursive merging. 667/// 668void 669SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 670 DAGUpdateListener *UpdateListener) { 671 // For node types that aren't CSE'd, just act as if no identical node 672 // already exists. 673 if (!doNotCSE(N)) { 674 SDNode *Existing = CSEMap.GetOrInsertNode(N); 675 if (Existing != N) { 676 // If there was already an existing matching node, use ReplaceAllUsesWith 677 // to replace the dead one with the existing one. This can cause 678 // recursive merging of other unrelated nodes down the line. 679 ReplaceAllUsesWith(N, Existing, UpdateListener); 680 681 // N is now dead. Inform the listener if it exists and delete it. 682 if (UpdateListener) 683 UpdateListener->NodeDeleted(N, Existing); 684 DeleteNodeNotInCSEMaps(N); 685 return; 686 } 687 } 688 689 // If the node doesn't already exist, we updated it. Inform a listener if 690 // it exists. 691 if (UpdateListener) 692 UpdateListener->NodeUpdated(N); 693} 694 695/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 696/// were replaced with those specified. If this node is never memoized, 697/// return null, otherwise return a pointer to the slot it would take. If a 698/// node already exists with these operands, the slot will be non-null. 699SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 700 void *&InsertPos) { 701 if (doNotCSE(N)) 702 return 0; 703 704 SDValue Ops[] = { Op }; 705 FoldingSetNodeID ID; 706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 707 AddNodeIDCustom(ID, N); 708 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 709} 710 711/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 712/// were replaced with those specified. If this node is never memoized, 713/// return null, otherwise return a pointer to the slot it would take. If a 714/// node already exists with these operands, the slot will be non-null. 715SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 716 SDValue Op1, SDValue Op2, 717 void *&InsertPos) { 718 if (doNotCSE(N)) 719 return 0; 720 721 SDValue Ops[] = { Op1, Op2 }; 722 FoldingSetNodeID ID; 723 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 724 AddNodeIDCustom(ID, N); 725 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743} 744 745/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 746void SelectionDAG::VerifyNode(SDNode *N) { 747 switch (N->getOpcode()) { 748 default: 749 break; 750 case ISD::BUILD_PAIR: { 751 EVT VT = N->getValueType(0); 752 assert(N->getNumValues() == 1 && "Too many results!"); 753 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 754 "Wrong return type!"); 755 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 756 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 757 "Mismatched operand types!"); 758 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 759 "Wrong operand type!"); 760 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 761 "Wrong return type size"); 762 break; 763 } 764 case ISD::BUILD_VECTOR: { 765 assert(N->getNumValues() == 1 && "Too many results!"); 766 assert(N->getValueType(0).isVector() && "Wrong return type!"); 767 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 768 "Wrong number of operands!"); 769 EVT EltVT = N->getValueType(0).getVectorElementType(); 770 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 771 assert((I->getValueType() == EltVT || 772 (EltVT.isInteger() && I->getValueType().isInteger() && 773 EltVT.bitsLE(I->getValueType()))) && 774 "Wrong operand type!"); 775 break; 776 } 777 } 778} 779 780/// getEVTAlignment - Compute the default alignment value for the 781/// given type. 782/// 783unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 784 const Type *Ty = VT == MVT::iPTR ? 785 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 786 VT.getTypeForEVT(*getContext()); 787 788 return TLI.getTargetData()->getABITypeAlignment(Ty); 789} 790 791// EntryNode could meaningfully have debug info if we can find it... 792SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 793 : TLI(tli), FLI(fli), DW(0), 794 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 795 getVTList(MVT::Other)), Root(getEntryNode()) { 796 AllNodes.push_back(&EntryNode); 797} 798 799void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 800 DwarfWriter *dw) { 801 MF = &mf; 802 MMI = mmi; 803 DW = dw; 804 Context = &mf.getFunction()->getContext(); 805} 806 807SelectionDAG::~SelectionDAG() { 808 allnodes_clear(); 809} 810 811void SelectionDAG::allnodes_clear() { 812 assert(&*AllNodes.begin() == &EntryNode); 813 AllNodes.remove(AllNodes.begin()); 814 while (!AllNodes.empty()) 815 DeallocateNode(AllNodes.begin()); 816} 817 818void SelectionDAG::clear() { 819 allnodes_clear(); 820 OperandAllocator.Reset(); 821 CSEMap.clear(); 822 823 ExtendedValueTypeNodes.clear(); 824 ExternalSymbols.clear(); 825 TargetExternalSymbols.clear(); 826 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 827 static_cast<CondCodeSDNode*>(0)); 828 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 829 static_cast<SDNode*>(0)); 830 831 EntryNode.UseList = 0; 832 AllNodes.push_back(&EntryNode); 833 Root = getEntryNode(); 834} 835 836SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 837 return VT.bitsGT(Op.getValueType()) ? 838 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 839 getNode(ISD::TRUNCATE, DL, VT, Op); 840} 841 842SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 843 return VT.bitsGT(Op.getValueType()) ? 844 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 845 getNode(ISD::TRUNCATE, DL, VT, Op); 846} 847 848SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 849 if (Op.getValueType() == VT) return Op; 850 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 851 VT.getSizeInBits()); 852 return getNode(ISD::AND, DL, Op.getValueType(), Op, 853 getConstant(Imm, Op.getValueType())); 854} 855 856/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 857/// 858SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 859 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 860 SDValue NegOne = 861 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 862 return getNode(ISD::XOR, DL, VT, Val, NegOne); 863} 864 865SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 866 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 867 assert((EltVT.getSizeInBits() >= 64 || 868 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 869 "getConstant with a uint64_t value that doesn't fit in the type!"); 870 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 871} 872 873SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 874 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 875} 876 877SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 878 assert(VT.isInteger() && "Cannot create FP integer constant!"); 879 880 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 881 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 882 "APInt size does not match type size!"); 883 884 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 885 FoldingSetNodeID ID; 886 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 887 ID.AddPointer(&Val); 888 void *IP = 0; 889 SDNode *N = NULL; 890 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 891 if (!VT.isVector()) 892 return SDValue(N, 0); 893 if (!N) { 894 N = NodeAllocator.Allocate<ConstantSDNode>(); 895 new (N) ConstantSDNode(isT, &Val, EltVT); 896 CSEMap.InsertNode(N, IP); 897 AllNodes.push_back(N); 898 } 899 900 SDValue Result(N, 0); 901 if (VT.isVector()) { 902 SmallVector<SDValue, 8> Ops; 903 Ops.assign(VT.getVectorNumElements(), Result); 904 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 905 VT, &Ops[0], Ops.size()); 906 } 907 return Result; 908} 909 910SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 911 return getConstant(Val, TLI.getPointerTy(), isTarget); 912} 913 914 915SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 916 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 917} 918 919SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 920 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 921 922 EVT EltVT = 923 VT.isVector() ? VT.getVectorElementType() : VT; 924 925 // Do the map lookup using the actual bit pattern for the floating point 926 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 927 // we don't have issues with SNANs. 928 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 929 FoldingSetNodeID ID; 930 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 931 ID.AddPointer(&V); 932 void *IP = 0; 933 SDNode *N = NULL; 934 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 935 if (!VT.isVector()) 936 return SDValue(N, 0); 937 if (!N) { 938 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 939 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 940 CSEMap.InsertNode(N, IP); 941 AllNodes.push_back(N); 942 } 943 944 SDValue Result(N, 0); 945 if (VT.isVector()) { 946 SmallVector<SDValue, 8> Ops; 947 Ops.assign(VT.getVectorNumElements(), Result); 948 // FIXME DebugLoc info might be appropriate here 949 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 950 VT, &Ops[0], Ops.size()); 951 } 952 return Result; 953} 954 955SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 956 EVT EltVT = 957 VT.isVector() ? VT.getVectorElementType() : VT; 958 if (EltVT==MVT::f32) 959 return getConstantFP(APFloat((float)Val), VT, isTarget); 960 else 961 return getConstantFP(APFloat(Val), VT, isTarget); 962} 963 964SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 965 EVT VT, int64_t Offset, 966 bool isTargetGA, 967 unsigned char TargetFlags) { 968 assert((TargetFlags == 0 || isTargetGA) && 969 "Cannot set target flags on target-independent globals"); 970 971 // Truncate (with sign-extension) the offset value to the pointer size. 972 EVT PTy = TLI.getPointerTy(); 973 unsigned BitWidth = PTy.getSizeInBits(); 974 if (BitWidth < 64) 975 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 976 977 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 978 if (!GVar) { 979 // If GV is an alias then use the aliasee for determining thread-localness. 980 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 981 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 982 } 983 984 unsigned Opc; 985 if (GVar && GVar->isThreadLocal()) 986 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 987 else 988 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 989 990 FoldingSetNodeID ID; 991 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 992 ID.AddPointer(GV); 993 ID.AddInteger(Offset); 994 ID.AddInteger(TargetFlags); 995 void *IP = 0; 996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 997 return SDValue(E, 0); 998 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 999 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags); 1000 CSEMap.InsertNode(N, IP); 1001 AllNodes.push_back(N); 1002 return SDValue(N, 0); 1003} 1004 1005SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1006 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1007 FoldingSetNodeID ID; 1008 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1009 ID.AddInteger(FI); 1010 void *IP = 0; 1011 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1012 return SDValue(E, 0); 1013 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1014 new (N) FrameIndexSDNode(FI, VT, isTarget); 1015 CSEMap.InsertNode(N, IP); 1016 AllNodes.push_back(N); 1017 return SDValue(N, 0); 1018} 1019 1020SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1021 unsigned char TargetFlags) { 1022 assert((TargetFlags == 0 || isTarget) && 1023 "Cannot set target flags on target-independent jump tables"); 1024 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1025 FoldingSetNodeID ID; 1026 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1027 ID.AddInteger(JTI); 1028 ID.AddInteger(TargetFlags); 1029 void *IP = 0; 1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1031 return SDValue(E, 0); 1032 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1033 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags); 1034 CSEMap.InsertNode(N, IP); 1035 AllNodes.push_back(N); 1036 return SDValue(N, 0); 1037} 1038 1039SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1040 unsigned Alignment, int Offset, 1041 bool isTarget, 1042 unsigned char TargetFlags) { 1043 assert((TargetFlags == 0 || isTarget) && 1044 "Cannot set target flags on target-independent globals"); 1045 if (Alignment == 0) 1046 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1047 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1048 FoldingSetNodeID ID; 1049 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1050 ID.AddInteger(Alignment); 1051 ID.AddInteger(Offset); 1052 ID.AddPointer(C); 1053 ID.AddInteger(TargetFlags); 1054 void *IP = 0; 1055 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1056 return SDValue(E, 0); 1057 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1058 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1059 CSEMap.InsertNode(N, IP); 1060 AllNodes.push_back(N); 1061 return SDValue(N, 0); 1062} 1063 1064 1065SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1066 unsigned Alignment, int Offset, 1067 bool isTarget, 1068 unsigned char TargetFlags) { 1069 assert((TargetFlags == 0 || isTarget) && 1070 "Cannot set target flags on target-independent globals"); 1071 if (Alignment == 0) 1072 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1073 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1074 FoldingSetNodeID ID; 1075 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1076 ID.AddInteger(Alignment); 1077 ID.AddInteger(Offset); 1078 C->AddSelectionDAGCSEId(ID); 1079 ID.AddInteger(TargetFlags); 1080 void *IP = 0; 1081 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1082 return SDValue(E, 0); 1083 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1084 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1085 CSEMap.InsertNode(N, IP); 1086 AllNodes.push_back(N); 1087 return SDValue(N, 0); 1088} 1089 1090SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1091 FoldingSetNodeID ID; 1092 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1093 ID.AddPointer(MBB); 1094 void *IP = 0; 1095 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1096 return SDValue(E, 0); 1097 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1098 new (N) BasicBlockSDNode(MBB); 1099 CSEMap.InsertNode(N, IP); 1100 AllNodes.push_back(N); 1101 return SDValue(N, 0); 1102} 1103 1104SDValue SelectionDAG::getValueType(EVT VT) { 1105 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1106 ValueTypeNodes.size()) 1107 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1108 1109 SDNode *&N = VT.isExtended() ? 1110 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1111 1112 if (N) return SDValue(N, 0); 1113 N = NodeAllocator.Allocate<VTSDNode>(); 1114 new (N) VTSDNode(VT); 1115 AllNodes.push_back(N); 1116 return SDValue(N, 0); 1117} 1118 1119SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1120 SDNode *&N = ExternalSymbols[Sym]; 1121 if (N) return SDValue(N, 0); 1122 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1123 new (N) ExternalSymbolSDNode(false, Sym, 0, VT); 1124 AllNodes.push_back(N); 1125 return SDValue(N, 0); 1126} 1127 1128SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1129 unsigned char TargetFlags) { 1130 SDNode *&N = 1131 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1132 TargetFlags)]; 1133 if (N) return SDValue(N, 0); 1134 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1135 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1136 AllNodes.push_back(N); 1137 return SDValue(N, 0); 1138} 1139 1140SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1141 if ((unsigned)Cond >= CondCodeNodes.size()) 1142 CondCodeNodes.resize(Cond+1); 1143 1144 if (CondCodeNodes[Cond] == 0) { 1145 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1146 new (N) CondCodeSDNode(Cond); 1147 CondCodeNodes[Cond] = N; 1148 AllNodes.push_back(N); 1149 } 1150 return SDValue(CondCodeNodes[Cond], 0); 1151} 1152 1153// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1154// the shuffle mask M that point at N1 to point at N2, and indices that point 1155// N2 to point at N1. 1156static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1157 std::swap(N1, N2); 1158 int NElts = M.size(); 1159 for (int i = 0; i != NElts; ++i) { 1160 if (M[i] >= NElts) 1161 M[i] -= NElts; 1162 else if (M[i] >= 0) 1163 M[i] += NElts; 1164 } 1165} 1166 1167SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1168 SDValue N2, const int *Mask) { 1169 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1170 assert(VT.isVector() && N1.getValueType().isVector() && 1171 "Vector Shuffle VTs must be a vectors"); 1172 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1173 && "Vector Shuffle VTs must have same element type"); 1174 1175 // Canonicalize shuffle undef, undef -> undef 1176 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1177 return getUNDEF(VT); 1178 1179 // Validate that all indices in Mask are within the range of the elements 1180 // input to the shuffle. 1181 unsigned NElts = VT.getVectorNumElements(); 1182 SmallVector<int, 8> MaskVec; 1183 for (unsigned i = 0; i != NElts; ++i) { 1184 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1185 MaskVec.push_back(Mask[i]); 1186 } 1187 1188 // Canonicalize shuffle v, v -> v, undef 1189 if (N1 == N2) { 1190 N2 = getUNDEF(VT); 1191 for (unsigned i = 0; i != NElts; ++i) 1192 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1193 } 1194 1195 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1196 if (N1.getOpcode() == ISD::UNDEF) 1197 commuteShuffle(N1, N2, MaskVec); 1198 1199 // Canonicalize all index into lhs, -> shuffle lhs, undef 1200 // Canonicalize all index into rhs, -> shuffle rhs, undef 1201 bool AllLHS = true, AllRHS = true; 1202 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1203 for (unsigned i = 0; i != NElts; ++i) { 1204 if (MaskVec[i] >= (int)NElts) { 1205 if (N2Undef) 1206 MaskVec[i] = -1; 1207 else 1208 AllLHS = false; 1209 } else if (MaskVec[i] >= 0) { 1210 AllRHS = false; 1211 } 1212 } 1213 if (AllLHS && AllRHS) 1214 return getUNDEF(VT); 1215 if (AllLHS && !N2Undef) 1216 N2 = getUNDEF(VT); 1217 if (AllRHS) { 1218 N1 = getUNDEF(VT); 1219 commuteShuffle(N1, N2, MaskVec); 1220 } 1221 1222 // If Identity shuffle, or all shuffle in to undef, return that node. 1223 bool AllUndef = true; 1224 bool Identity = true; 1225 for (unsigned i = 0; i != NElts; ++i) { 1226 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1227 if (MaskVec[i] >= 0) AllUndef = false; 1228 } 1229 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1230 return N1; 1231 if (AllUndef) 1232 return getUNDEF(VT); 1233 1234 FoldingSetNodeID ID; 1235 SDValue Ops[2] = { N1, N2 }; 1236 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1237 for (unsigned i = 0; i != NElts; ++i) 1238 ID.AddInteger(MaskVec[i]); 1239 1240 void* IP = 0; 1241 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1242 return SDValue(E, 0); 1243 1244 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1245 // SDNode doesn't have access to it. This memory will be "leaked" when 1246 // the node is deallocated, but recovered when the NodeAllocator is released. 1247 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1248 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1249 1250 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>(); 1251 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1252 CSEMap.InsertNode(N, IP); 1253 AllNodes.push_back(N); 1254 return SDValue(N, 0); 1255} 1256 1257SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1258 SDValue Val, SDValue DTy, 1259 SDValue STy, SDValue Rnd, SDValue Sat, 1260 ISD::CvtCode Code) { 1261 // If the src and dest types are the same and the conversion is between 1262 // integer types of the same sign or two floats, no conversion is necessary. 1263 if (DTy == STy && 1264 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1265 return Val; 1266 1267 FoldingSetNodeID ID; 1268 void* IP = 0; 1269 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1270 return SDValue(E, 0); 1271 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1272 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1273 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code); 1274 CSEMap.InsertNode(N, IP); 1275 AllNodes.push_back(N); 1276 return SDValue(N, 0); 1277} 1278 1279SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1280 FoldingSetNodeID ID; 1281 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1282 ID.AddInteger(RegNo); 1283 void *IP = 0; 1284 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1285 return SDValue(E, 0); 1286 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1287 new (N) RegisterSDNode(RegNo, VT); 1288 CSEMap.InsertNode(N, IP); 1289 AllNodes.push_back(N); 1290 return SDValue(N, 0); 1291} 1292 1293SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root, 1294 unsigned Line, unsigned Col, 1295 MDNode *CU) { 1296 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1297 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1298 N->setDebugLoc(DL); 1299 AllNodes.push_back(N); 1300 return SDValue(N, 0); 1301} 1302 1303SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1304 SDValue Root, 1305 unsigned LabelID) { 1306 FoldingSetNodeID ID; 1307 SDValue Ops[] = { Root }; 1308 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1309 ID.AddInteger(LabelID); 1310 void *IP = 0; 1311 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1312 return SDValue(E, 0); 1313 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1314 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1315 CSEMap.InsertNode(N, IP); 1316 AllNodes.push_back(N); 1317 return SDValue(N, 0); 1318} 1319 1320SDValue SelectionDAG::getSrcValue(const Value *V) { 1321 assert((!V || isa<PointerType>(V->getType())) && 1322 "SrcValue is not a pointer?"); 1323 1324 FoldingSetNodeID ID; 1325 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1326 ID.AddPointer(V); 1327 1328 void *IP = 0; 1329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1330 return SDValue(E, 0); 1331 1332 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1333 new (N) SrcValueSDNode(V); 1334 CSEMap.InsertNode(N, IP); 1335 AllNodes.push_back(N); 1336 return SDValue(N, 0); 1337} 1338 1339/// getShiftAmountOperand - Return the specified value casted to 1340/// the target's desired shift amount type. 1341SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1342 EVT OpTy = Op.getValueType(); 1343 MVT ShTy = TLI.getShiftAmountTy(); 1344 if (OpTy == ShTy || OpTy.isVector()) return Op; 1345 1346 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1347 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1348} 1349 1350/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1351/// specified value type. 1352SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1353 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1354 unsigned ByteSize = VT.getStoreSize(); 1355 const Type *Ty = VT.getTypeForEVT(*getContext()); 1356 unsigned StackAlign = 1357 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1358 1359 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1360 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1361} 1362 1363/// CreateStackTemporary - Create a stack temporary suitable for holding 1364/// either of the specified value types. 1365SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1366 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1367 VT2.getStoreSizeInBits())/8; 1368 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1369 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1370 const TargetData *TD = TLI.getTargetData(); 1371 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1372 TD->getPrefTypeAlignment(Ty2)); 1373 1374 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1375 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1376 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1377} 1378 1379SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1380 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1381 // These setcc operations always fold. 1382 switch (Cond) { 1383 default: break; 1384 case ISD::SETFALSE: 1385 case ISD::SETFALSE2: return getConstant(0, VT); 1386 case ISD::SETTRUE: 1387 case ISD::SETTRUE2: return getConstant(1, VT); 1388 1389 case ISD::SETOEQ: 1390 case ISD::SETOGT: 1391 case ISD::SETOGE: 1392 case ISD::SETOLT: 1393 case ISD::SETOLE: 1394 case ISD::SETONE: 1395 case ISD::SETO: 1396 case ISD::SETUO: 1397 case ISD::SETUEQ: 1398 case ISD::SETUNE: 1399 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1400 break; 1401 } 1402 1403 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1404 const APInt &C2 = N2C->getAPIntValue(); 1405 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1406 const APInt &C1 = N1C->getAPIntValue(); 1407 1408 switch (Cond) { 1409 default: llvm_unreachable("Unknown integer setcc!"); 1410 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1411 case ISD::SETNE: return getConstant(C1 != C2, VT); 1412 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1413 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1414 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1415 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1416 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1417 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1418 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1419 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1420 } 1421 } 1422 } 1423 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1424 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1425 // No compile time operations on this type yet. 1426 if (N1C->getValueType(0) == MVT::ppcf128) 1427 return SDValue(); 1428 1429 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1430 switch (Cond) { 1431 default: break; 1432 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1433 return getUNDEF(VT); 1434 // fall through 1435 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1436 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1437 return getUNDEF(VT); 1438 // fall through 1439 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1440 R==APFloat::cmpLessThan, VT); 1441 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1442 return getUNDEF(VT); 1443 // fall through 1444 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1445 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1446 return getUNDEF(VT); 1447 // fall through 1448 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1449 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1450 return getUNDEF(VT); 1451 // fall through 1452 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1453 R==APFloat::cmpEqual, VT); 1454 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1455 return getUNDEF(VT); 1456 // fall through 1457 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1458 R==APFloat::cmpEqual, VT); 1459 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1460 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1461 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1462 R==APFloat::cmpEqual, VT); 1463 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1464 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1465 R==APFloat::cmpLessThan, VT); 1466 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1467 R==APFloat::cmpUnordered, VT); 1468 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1469 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1470 } 1471 } else { 1472 // Ensure that the constant occurs on the RHS. 1473 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1474 } 1475 } 1476 1477 // Could not fold it. 1478 return SDValue(); 1479} 1480 1481/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1482/// use this predicate to simplify operations downstream. 1483bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1484 // This predicate is not safe for vector operations. 1485 if (Op.getValueType().isVector()) 1486 return false; 1487 1488 unsigned BitWidth = Op.getValueSizeInBits(); 1489 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1490} 1491 1492/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1493/// this predicate to simplify operations downstream. Mask is known to be zero 1494/// for bits that V cannot have. 1495bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1496 unsigned Depth) const { 1497 APInt KnownZero, KnownOne; 1498 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1499 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1500 return (KnownZero & Mask) == Mask; 1501} 1502 1503/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1504/// known to be either zero or one and return them in the KnownZero/KnownOne 1505/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1506/// processing. 1507void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1508 APInt &KnownZero, APInt &KnownOne, 1509 unsigned Depth) const { 1510 unsigned BitWidth = Mask.getBitWidth(); 1511 assert(BitWidth == Op.getValueType().getSizeInBits() && 1512 "Mask size mismatches value type size!"); 1513 1514 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1515 if (Depth == 6 || Mask == 0) 1516 return; // Limit search depth. 1517 1518 APInt KnownZero2, KnownOne2; 1519 1520 switch (Op.getOpcode()) { 1521 case ISD::Constant: 1522 // We know all of the bits for a constant! 1523 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1524 KnownZero = ~KnownOne & Mask; 1525 return; 1526 case ISD::AND: 1527 // If either the LHS or the RHS are Zero, the result is zero. 1528 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1529 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1530 KnownZero2, KnownOne2, Depth+1); 1531 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1532 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1533 1534 // Output known-1 bits are only known if set in both the LHS & RHS. 1535 KnownOne &= KnownOne2; 1536 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1537 KnownZero |= KnownZero2; 1538 return; 1539 case ISD::OR: 1540 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1541 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1542 KnownZero2, KnownOne2, Depth+1); 1543 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1544 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1545 1546 // Output known-0 bits are only known if clear in both the LHS & RHS. 1547 KnownZero &= KnownZero2; 1548 // Output known-1 are known to be set if set in either the LHS | RHS. 1549 KnownOne |= KnownOne2; 1550 return; 1551 case ISD::XOR: { 1552 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1553 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1554 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1555 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1556 1557 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1558 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1559 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1560 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1561 KnownZero = KnownZeroOut; 1562 return; 1563 } 1564 case ISD::MUL: { 1565 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1566 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1567 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1568 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1569 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1570 1571 // If low bits are zero in either operand, output low known-0 bits. 1572 // Also compute a conserative estimate for high known-0 bits. 1573 // More trickiness is possible, but this is sufficient for the 1574 // interesting case of alignment computation. 1575 KnownOne.clear(); 1576 unsigned TrailZ = KnownZero.countTrailingOnes() + 1577 KnownZero2.countTrailingOnes(); 1578 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1579 KnownZero2.countLeadingOnes(), 1580 BitWidth) - BitWidth; 1581 1582 TrailZ = std::min(TrailZ, BitWidth); 1583 LeadZ = std::min(LeadZ, BitWidth); 1584 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1585 APInt::getHighBitsSet(BitWidth, LeadZ); 1586 KnownZero &= Mask; 1587 return; 1588 } 1589 case ISD::UDIV: { 1590 // For the purposes of computing leading zeros we can conservatively 1591 // treat a udiv as a logical right shift by the power of 2 known to 1592 // be less than the denominator. 1593 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1594 ComputeMaskedBits(Op.getOperand(0), 1595 AllOnes, KnownZero2, KnownOne2, Depth+1); 1596 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1597 1598 KnownOne2.clear(); 1599 KnownZero2.clear(); 1600 ComputeMaskedBits(Op.getOperand(1), 1601 AllOnes, KnownZero2, KnownOne2, Depth+1); 1602 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1603 if (RHSUnknownLeadingOnes != BitWidth) 1604 LeadZ = std::min(BitWidth, 1605 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1606 1607 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1608 return; 1609 } 1610 case ISD::SELECT: 1611 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1612 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1614 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1615 1616 // Only known if known in both the LHS and RHS. 1617 KnownOne &= KnownOne2; 1618 KnownZero &= KnownZero2; 1619 return; 1620 case ISD::SELECT_CC: 1621 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1622 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1623 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1624 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1625 1626 // Only known if known in both the LHS and RHS. 1627 KnownOne &= KnownOne2; 1628 KnownZero &= KnownZero2; 1629 return; 1630 case ISD::SADDO: 1631 case ISD::UADDO: 1632 case ISD::SSUBO: 1633 case ISD::USUBO: 1634 case ISD::SMULO: 1635 case ISD::UMULO: 1636 if (Op.getResNo() != 1) 1637 return; 1638 // The boolean result conforms to getBooleanContents. Fall through. 1639 case ISD::SETCC: 1640 // If we know the result of a setcc has the top bits zero, use this info. 1641 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1642 BitWidth > 1) 1643 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1644 return; 1645 case ISD::SHL: 1646 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1647 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1648 unsigned ShAmt = SA->getZExtValue(); 1649 1650 // If the shift count is an invalid immediate, don't do anything. 1651 if (ShAmt >= BitWidth) 1652 return; 1653 1654 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1655 KnownZero, KnownOne, Depth+1); 1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1657 KnownZero <<= ShAmt; 1658 KnownOne <<= ShAmt; 1659 // low bits known zero. 1660 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1661 } 1662 return; 1663 case ISD::SRL: 1664 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1665 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1666 unsigned ShAmt = SA->getZExtValue(); 1667 1668 // If the shift count is an invalid immediate, don't do anything. 1669 if (ShAmt >= BitWidth) 1670 return; 1671 1672 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1673 KnownZero, KnownOne, Depth+1); 1674 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1675 KnownZero = KnownZero.lshr(ShAmt); 1676 KnownOne = KnownOne.lshr(ShAmt); 1677 1678 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1679 KnownZero |= HighBits; // High bits known zero. 1680 } 1681 return; 1682 case ISD::SRA: 1683 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1684 unsigned ShAmt = SA->getZExtValue(); 1685 1686 // If the shift count is an invalid immediate, don't do anything. 1687 if (ShAmt >= BitWidth) 1688 return; 1689 1690 APInt InDemandedMask = (Mask << ShAmt); 1691 // If any of the demanded bits are produced by the sign extension, we also 1692 // demand the input sign bit. 1693 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1694 if (HighBits.getBoolValue()) 1695 InDemandedMask |= APInt::getSignBit(BitWidth); 1696 1697 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1698 Depth+1); 1699 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1700 KnownZero = KnownZero.lshr(ShAmt); 1701 KnownOne = KnownOne.lshr(ShAmt); 1702 1703 // Handle the sign bits. 1704 APInt SignBit = APInt::getSignBit(BitWidth); 1705 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1706 1707 if (KnownZero.intersects(SignBit)) { 1708 KnownZero |= HighBits; // New bits are known zero. 1709 } else if (KnownOne.intersects(SignBit)) { 1710 KnownOne |= HighBits; // New bits are known one. 1711 } 1712 } 1713 return; 1714 case ISD::SIGN_EXTEND_INREG: { 1715 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1716 unsigned EBits = EVT.getSizeInBits(); 1717 1718 // Sign extension. Compute the demanded bits in the result that are not 1719 // present in the input. 1720 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1721 1722 APInt InSignBit = APInt::getSignBit(EBits); 1723 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1724 1725 // If the sign extended bits are demanded, we know that the sign 1726 // bit is demanded. 1727 InSignBit.zext(BitWidth); 1728 if (NewBits.getBoolValue()) 1729 InputDemandedBits |= InSignBit; 1730 1731 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1732 KnownZero, KnownOne, Depth+1); 1733 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1734 1735 // If the sign bit of the input is known set or clear, then we know the 1736 // top bits of the result. 1737 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1738 KnownZero |= NewBits; 1739 KnownOne &= ~NewBits; 1740 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1741 KnownOne |= NewBits; 1742 KnownZero &= ~NewBits; 1743 } else { // Input sign bit unknown 1744 KnownZero &= ~NewBits; 1745 KnownOne &= ~NewBits; 1746 } 1747 return; 1748 } 1749 case ISD::CTTZ: 1750 case ISD::CTLZ: 1751 case ISD::CTPOP: { 1752 unsigned LowBits = Log2_32(BitWidth)+1; 1753 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1754 KnownOne.clear(); 1755 return; 1756 } 1757 case ISD::LOAD: { 1758 if (ISD::isZEXTLoad(Op.getNode())) { 1759 LoadSDNode *LD = cast<LoadSDNode>(Op); 1760 EVT VT = LD->getMemoryVT(); 1761 unsigned MemBits = VT.getSizeInBits(); 1762 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1763 } 1764 return; 1765 } 1766 case ISD::ZERO_EXTEND: { 1767 EVT InVT = Op.getOperand(0).getValueType(); 1768 unsigned InBits = InVT.getSizeInBits(); 1769 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1770 APInt InMask = Mask; 1771 InMask.trunc(InBits); 1772 KnownZero.trunc(InBits); 1773 KnownOne.trunc(InBits); 1774 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1775 KnownZero.zext(BitWidth); 1776 KnownOne.zext(BitWidth); 1777 KnownZero |= NewBits; 1778 return; 1779 } 1780 case ISD::SIGN_EXTEND: { 1781 EVT InVT = Op.getOperand(0).getValueType(); 1782 unsigned InBits = InVT.getSizeInBits(); 1783 APInt InSignBit = APInt::getSignBit(InBits); 1784 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1785 APInt InMask = Mask; 1786 InMask.trunc(InBits); 1787 1788 // If any of the sign extended bits are demanded, we know that the sign 1789 // bit is demanded. Temporarily set this bit in the mask for our callee. 1790 if (NewBits.getBoolValue()) 1791 InMask |= InSignBit; 1792 1793 KnownZero.trunc(InBits); 1794 KnownOne.trunc(InBits); 1795 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1796 1797 // Note if the sign bit is known to be zero or one. 1798 bool SignBitKnownZero = KnownZero.isNegative(); 1799 bool SignBitKnownOne = KnownOne.isNegative(); 1800 assert(!(SignBitKnownZero && SignBitKnownOne) && 1801 "Sign bit can't be known to be both zero and one!"); 1802 1803 // If the sign bit wasn't actually demanded by our caller, we don't 1804 // want it set in the KnownZero and KnownOne result values. Reset the 1805 // mask and reapply it to the result values. 1806 InMask = Mask; 1807 InMask.trunc(InBits); 1808 KnownZero &= InMask; 1809 KnownOne &= InMask; 1810 1811 KnownZero.zext(BitWidth); 1812 KnownOne.zext(BitWidth); 1813 1814 // If the sign bit is known zero or one, the top bits match. 1815 if (SignBitKnownZero) 1816 KnownZero |= NewBits; 1817 else if (SignBitKnownOne) 1818 KnownOne |= NewBits; 1819 return; 1820 } 1821 case ISD::ANY_EXTEND: { 1822 EVT InVT = Op.getOperand(0).getValueType(); 1823 unsigned InBits = InVT.getSizeInBits(); 1824 APInt InMask = Mask; 1825 InMask.trunc(InBits); 1826 KnownZero.trunc(InBits); 1827 KnownOne.trunc(InBits); 1828 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1829 KnownZero.zext(BitWidth); 1830 KnownOne.zext(BitWidth); 1831 return; 1832 } 1833 case ISD::TRUNCATE: { 1834 EVT InVT = Op.getOperand(0).getValueType(); 1835 unsigned InBits = InVT.getSizeInBits(); 1836 APInt InMask = Mask; 1837 InMask.zext(InBits); 1838 KnownZero.zext(InBits); 1839 KnownOne.zext(InBits); 1840 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1841 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1842 KnownZero.trunc(BitWidth); 1843 KnownOne.trunc(BitWidth); 1844 break; 1845 } 1846 case ISD::AssertZext: { 1847 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1848 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1849 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1850 KnownOne, Depth+1); 1851 KnownZero |= (~InMask) & Mask; 1852 return; 1853 } 1854 case ISD::FGETSIGN: 1855 // All bits are zero except the low bit. 1856 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1857 return; 1858 1859 case ISD::SUB: { 1860 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1861 // We know that the top bits of C-X are clear if X contains less bits 1862 // than C (i.e. no wrap-around can happen). For example, 20-X is 1863 // positive if we can prove that X is >= 0 and < 16. 1864 if (CLHS->getAPIntValue().isNonNegative()) { 1865 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1866 // NLZ can't be BitWidth with no sign bit 1867 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1868 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1869 Depth+1); 1870 1871 // If all of the MaskV bits are known to be zero, then we know the 1872 // output top bits are zero, because we now know that the output is 1873 // from [0-C]. 1874 if ((KnownZero2 & MaskV) == MaskV) { 1875 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1876 // Top bits known zero. 1877 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1878 } 1879 } 1880 } 1881 } 1882 // fall through 1883 case ISD::ADD: { 1884 // Output known-0 bits are known if clear or set in both the low clear bits 1885 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1886 // low 3 bits clear. 1887 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1888 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1889 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1890 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1891 1892 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1893 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1894 KnownZeroOut = std::min(KnownZeroOut, 1895 KnownZero2.countTrailingOnes()); 1896 1897 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1898 return; 1899 } 1900 case ISD::SREM: 1901 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1902 const APInt &RA = Rem->getAPIntValue(); 1903 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1904 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1905 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1906 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1907 1908 // If the sign bit of the first operand is zero, the sign bit of 1909 // the result is zero. If the first operand has no one bits below 1910 // the second operand's single 1 bit, its sign will be zero. 1911 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1912 KnownZero2 |= ~LowBits; 1913 1914 KnownZero |= KnownZero2 & Mask; 1915 1916 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1917 } 1918 } 1919 return; 1920 case ISD::UREM: { 1921 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1922 const APInt &RA = Rem->getAPIntValue(); 1923 if (RA.isPowerOf2()) { 1924 APInt LowBits = (RA - 1); 1925 APInt Mask2 = LowBits & Mask; 1926 KnownZero |= ~LowBits & Mask; 1927 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1928 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1929 break; 1930 } 1931 } 1932 1933 // Since the result is less than or equal to either operand, any leading 1934 // zero bits in either operand must also exist in the result. 1935 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1936 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1937 Depth+1); 1938 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1939 Depth+1); 1940 1941 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1942 KnownZero2.countLeadingOnes()); 1943 KnownOne.clear(); 1944 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1945 return; 1946 } 1947 default: 1948 // Allow the target to implement this method for its nodes. 1949 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1950 case ISD::INTRINSIC_WO_CHAIN: 1951 case ISD::INTRINSIC_W_CHAIN: 1952 case ISD::INTRINSIC_VOID: 1953 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1954 Depth); 1955 } 1956 return; 1957 } 1958} 1959 1960/// ComputeNumSignBits - Return the number of times the sign bit of the 1961/// register is replicated into the other bits. We know that at least 1 bit 1962/// is always equal to the sign bit (itself), but other cases can give us 1963/// information. For example, immediately after an "SRA X, 2", we know that 1964/// the top 3 bits are all equal to each other, so we return 3. 1965unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1966 EVT VT = Op.getValueType(); 1967 assert(VT.isInteger() && "Invalid VT!"); 1968 unsigned VTBits = VT.getSizeInBits(); 1969 unsigned Tmp, Tmp2; 1970 unsigned FirstAnswer = 1; 1971 1972 if (Depth == 6) 1973 return 1; // Limit search depth. 1974 1975 switch (Op.getOpcode()) { 1976 default: break; 1977 case ISD::AssertSext: 1978 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1979 return VTBits-Tmp+1; 1980 case ISD::AssertZext: 1981 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1982 return VTBits-Tmp; 1983 1984 case ISD::Constant: { 1985 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1986 // If negative, return # leading ones. 1987 if (Val.isNegative()) 1988 return Val.countLeadingOnes(); 1989 1990 // Return # leading zeros. 1991 return Val.countLeadingZeros(); 1992 } 1993 1994 case ISD::SIGN_EXTEND: 1995 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1996 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1997 1998 case ISD::SIGN_EXTEND_INREG: 1999 // Max of the input and what this extends. 2000 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2001 Tmp = VTBits-Tmp+1; 2002 2003 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2004 return std::max(Tmp, Tmp2); 2005 2006 case ISD::SRA: 2007 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2008 // SRA X, C -> adds C sign bits. 2009 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2010 Tmp += C->getZExtValue(); 2011 if (Tmp > VTBits) Tmp = VTBits; 2012 } 2013 return Tmp; 2014 case ISD::SHL: 2015 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2016 // shl destroys sign bits. 2017 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2018 if (C->getZExtValue() >= VTBits || // Bad shift. 2019 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2020 return Tmp - C->getZExtValue(); 2021 } 2022 break; 2023 case ISD::AND: 2024 case ISD::OR: 2025 case ISD::XOR: // NOT is handled here. 2026 // Logical binary ops preserve the number of sign bits at the worst. 2027 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2028 if (Tmp != 1) { 2029 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2030 FirstAnswer = std::min(Tmp, Tmp2); 2031 // We computed what we know about the sign bits as our first 2032 // answer. Now proceed to the generic code that uses 2033 // ComputeMaskedBits, and pick whichever answer is better. 2034 } 2035 break; 2036 2037 case ISD::SELECT: 2038 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2039 if (Tmp == 1) return 1; // Early out. 2040 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2041 return std::min(Tmp, Tmp2); 2042 2043 case ISD::SADDO: 2044 case ISD::UADDO: 2045 case ISD::SSUBO: 2046 case ISD::USUBO: 2047 case ISD::SMULO: 2048 case ISD::UMULO: 2049 if (Op.getResNo() != 1) 2050 break; 2051 // The boolean result conforms to getBooleanContents. Fall through. 2052 case ISD::SETCC: 2053 // If setcc returns 0/-1, all bits are sign bits. 2054 if (TLI.getBooleanContents() == 2055 TargetLowering::ZeroOrNegativeOneBooleanContent) 2056 return VTBits; 2057 break; 2058 case ISD::ROTL: 2059 case ISD::ROTR: 2060 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2061 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2062 2063 // Handle rotate right by N like a rotate left by 32-N. 2064 if (Op.getOpcode() == ISD::ROTR) 2065 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2066 2067 // If we aren't rotating out all of the known-in sign bits, return the 2068 // number that are left. This handles rotl(sext(x), 1) for example. 2069 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2070 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2071 } 2072 break; 2073 case ISD::ADD: 2074 // Add can have at most one carry bit. Thus we know that the output 2075 // is, at worst, one more bit than the inputs. 2076 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2077 if (Tmp == 1) return 1; // Early out. 2078 2079 // Special case decrementing a value (ADD X, -1): 2080 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2081 if (CRHS->isAllOnesValue()) { 2082 APInt KnownZero, KnownOne; 2083 APInt Mask = APInt::getAllOnesValue(VTBits); 2084 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2085 2086 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2087 // sign bits set. 2088 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2089 return VTBits; 2090 2091 // If we are subtracting one from a positive number, there is no carry 2092 // out of the result. 2093 if (KnownZero.isNegative()) 2094 return Tmp; 2095 } 2096 2097 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2098 if (Tmp2 == 1) return 1; 2099 return std::min(Tmp, Tmp2)-1; 2100 break; 2101 2102 case ISD::SUB: 2103 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2104 if (Tmp2 == 1) return 1; 2105 2106 // Handle NEG. 2107 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2108 if (CLHS->isNullValue()) { 2109 APInt KnownZero, KnownOne; 2110 APInt Mask = APInt::getAllOnesValue(VTBits); 2111 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2112 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2113 // sign bits set. 2114 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2115 return VTBits; 2116 2117 // If the input is known to be positive (the sign bit is known clear), 2118 // the output of the NEG has the same number of sign bits as the input. 2119 if (KnownZero.isNegative()) 2120 return Tmp2; 2121 2122 // Otherwise, we treat this like a SUB. 2123 } 2124 2125 // Sub can have at most one carry bit. Thus we know that the output 2126 // is, at worst, one more bit than the inputs. 2127 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2128 if (Tmp == 1) return 1; // Early out. 2129 return std::min(Tmp, Tmp2)-1; 2130 break; 2131 case ISD::TRUNCATE: 2132 // FIXME: it's tricky to do anything useful for this, but it is an important 2133 // case for targets like X86. 2134 break; 2135 } 2136 2137 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2138 if (Op.getOpcode() == ISD::LOAD) { 2139 LoadSDNode *LD = cast<LoadSDNode>(Op); 2140 unsigned ExtType = LD->getExtensionType(); 2141 switch (ExtType) { 2142 default: break; 2143 case ISD::SEXTLOAD: // '17' bits known 2144 Tmp = LD->getMemoryVT().getSizeInBits(); 2145 return VTBits-Tmp+1; 2146 case ISD::ZEXTLOAD: // '16' bits known 2147 Tmp = LD->getMemoryVT().getSizeInBits(); 2148 return VTBits-Tmp; 2149 } 2150 } 2151 2152 // Allow the target to implement this method for its nodes. 2153 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2154 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2155 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2156 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2157 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2158 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2159 } 2160 2161 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2162 // use this information. 2163 APInt KnownZero, KnownOne; 2164 APInt Mask = APInt::getAllOnesValue(VTBits); 2165 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2166 2167 if (KnownZero.isNegative()) { // sign bit is 0 2168 Mask = KnownZero; 2169 } else if (KnownOne.isNegative()) { // sign bit is 1; 2170 Mask = KnownOne; 2171 } else { 2172 // Nothing known. 2173 return FirstAnswer; 2174 } 2175 2176 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2177 // the number of identical bits in the top of the input value. 2178 Mask = ~Mask; 2179 Mask <<= Mask.getBitWidth()-VTBits; 2180 // Return # leading zeros. We use 'min' here in case Val was zero before 2181 // shifting. We don't want to return '64' as for an i32 "0". 2182 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2183} 2184 2185bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2186 // If we're told that NaNs won't happen, assume they won't. 2187 if (FiniteOnlyFPMath()) 2188 return true; 2189 2190 // If the value is a constant, we can obviously see if it is a NaN or not. 2191 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2192 return !C->getValueAPF().isNaN(); 2193 2194 // TODO: Recognize more cases here. 2195 2196 return false; 2197} 2198 2199bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2200 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2201 if (!GA) return false; 2202 if (GA->getOffset() != 0) return false; 2203 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2204 if (!GV) return false; 2205 MachineModuleInfo *MMI = getMachineModuleInfo(); 2206 return MMI && MMI->hasDebugInfo(); 2207} 2208 2209 2210/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2211/// element of the result of the vector shuffle. 2212SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2213 unsigned i) { 2214 EVT VT = N->getValueType(0); 2215 DebugLoc dl = N->getDebugLoc(); 2216 if (N->getMaskElt(i) < 0) 2217 return getUNDEF(VT.getVectorElementType()); 2218 unsigned Index = N->getMaskElt(i); 2219 unsigned NumElems = VT.getVectorNumElements(); 2220 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2221 Index %= NumElems; 2222 2223 if (V.getOpcode() == ISD::BIT_CONVERT) { 2224 V = V.getOperand(0); 2225 EVT VVT = V.getValueType(); 2226 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2227 return SDValue(); 2228 } 2229 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2230 return (Index == 0) ? V.getOperand(0) 2231 : getUNDEF(VT.getVectorElementType()); 2232 if (V.getOpcode() == ISD::BUILD_VECTOR) 2233 return V.getOperand(Index); 2234 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2235 return getShuffleScalarElt(SVN, Index); 2236 return SDValue(); 2237} 2238 2239 2240/// getNode - Gets or creates the specified node. 2241/// 2242SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2243 FoldingSetNodeID ID; 2244 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2245 void *IP = 0; 2246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2247 return SDValue(E, 0); 2248 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2249 new (N) SDNode(Opcode, DL, getVTList(VT)); 2250 CSEMap.InsertNode(N, IP); 2251 2252 AllNodes.push_back(N); 2253#ifndef NDEBUG 2254 VerifyNode(N); 2255#endif 2256 return SDValue(N, 0); 2257} 2258 2259SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2260 EVT VT, SDValue Operand) { 2261 // Constant fold unary operations with an integer constant operand. 2262 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2263 const APInt &Val = C->getAPIntValue(); 2264 unsigned BitWidth = VT.getSizeInBits(); 2265 switch (Opcode) { 2266 default: break; 2267 case ISD::SIGN_EXTEND: 2268 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2269 case ISD::ANY_EXTEND: 2270 case ISD::ZERO_EXTEND: 2271 case ISD::TRUNCATE: 2272 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2273 case ISD::UINT_TO_FP: 2274 case ISD::SINT_TO_FP: { 2275 const uint64_t zero[] = {0, 0}; 2276 // No compile time operations on this type. 2277 if (VT==MVT::ppcf128) 2278 break; 2279 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2280 (void)apf.convertFromAPInt(Val, 2281 Opcode==ISD::SINT_TO_FP, 2282 APFloat::rmNearestTiesToEven); 2283 return getConstantFP(apf, VT); 2284 } 2285 case ISD::BIT_CONVERT: 2286 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2287 return getConstantFP(Val.bitsToFloat(), VT); 2288 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2289 return getConstantFP(Val.bitsToDouble(), VT); 2290 break; 2291 case ISD::BSWAP: 2292 return getConstant(Val.byteSwap(), VT); 2293 case ISD::CTPOP: 2294 return getConstant(Val.countPopulation(), VT); 2295 case ISD::CTLZ: 2296 return getConstant(Val.countLeadingZeros(), VT); 2297 case ISD::CTTZ: 2298 return getConstant(Val.countTrailingZeros(), VT); 2299 } 2300 } 2301 2302 // Constant fold unary operations with a floating point constant operand. 2303 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2304 APFloat V = C->getValueAPF(); // make copy 2305 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2306 switch (Opcode) { 2307 case ISD::FNEG: 2308 V.changeSign(); 2309 return getConstantFP(V, VT); 2310 case ISD::FABS: 2311 V.clearSign(); 2312 return getConstantFP(V, VT); 2313 case ISD::FP_ROUND: 2314 case ISD::FP_EXTEND: { 2315 bool ignored; 2316 // This can return overflow, underflow, or inexact; we don't care. 2317 // FIXME need to be more flexible about rounding mode. 2318 (void)V.convert(*EVTToAPFloatSemantics(VT), 2319 APFloat::rmNearestTiesToEven, &ignored); 2320 return getConstantFP(V, VT); 2321 } 2322 case ISD::FP_TO_SINT: 2323 case ISD::FP_TO_UINT: { 2324 integerPart x[2]; 2325 bool ignored; 2326 assert(integerPartWidth >= 64); 2327 // FIXME need to be more flexible about rounding mode. 2328 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2329 Opcode==ISD::FP_TO_SINT, 2330 APFloat::rmTowardZero, &ignored); 2331 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2332 break; 2333 APInt api(VT.getSizeInBits(), 2, x); 2334 return getConstant(api, VT); 2335 } 2336 case ISD::BIT_CONVERT: 2337 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2338 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2339 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2340 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2341 break; 2342 } 2343 } 2344 } 2345 2346 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2347 switch (Opcode) { 2348 case ISD::TokenFactor: 2349 case ISD::MERGE_VALUES: 2350 case ISD::CONCAT_VECTORS: 2351 return Operand; // Factor, merge or concat of one node? No need. 2352 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2353 case ISD::FP_EXTEND: 2354 assert(VT.isFloatingPoint() && 2355 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2356 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2357 if (Operand.getOpcode() == ISD::UNDEF) 2358 return getUNDEF(VT); 2359 break; 2360 case ISD::SIGN_EXTEND: 2361 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2362 "Invalid SIGN_EXTEND!"); 2363 if (Operand.getValueType() == VT) return Operand; // noop extension 2364 assert(Operand.getValueType().bitsLT(VT) 2365 && "Invalid sext node, dst < src!"); 2366 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2367 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2368 break; 2369 case ISD::ZERO_EXTEND: 2370 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2371 "Invalid ZERO_EXTEND!"); 2372 if (Operand.getValueType() == VT) return Operand; // noop extension 2373 assert(Operand.getValueType().bitsLT(VT) 2374 && "Invalid zext node, dst < src!"); 2375 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2376 return getNode(ISD::ZERO_EXTEND, DL, VT, 2377 Operand.getNode()->getOperand(0)); 2378 break; 2379 case ISD::ANY_EXTEND: 2380 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2381 "Invalid ANY_EXTEND!"); 2382 if (Operand.getValueType() == VT) return Operand; // noop extension 2383 assert(Operand.getValueType().bitsLT(VT) 2384 && "Invalid anyext node, dst < src!"); 2385 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2386 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2387 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2388 break; 2389 case ISD::TRUNCATE: 2390 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2391 "Invalid TRUNCATE!"); 2392 if (Operand.getValueType() == VT) return Operand; // noop truncate 2393 assert(Operand.getValueType().bitsGT(VT) 2394 && "Invalid truncate node, src < dst!"); 2395 if (OpOpcode == ISD::TRUNCATE) 2396 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2397 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2398 OpOpcode == ISD::ANY_EXTEND) { 2399 // If the source is smaller than the dest, we still need an extend. 2400 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2401 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2402 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2403 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2404 else 2405 return Operand.getNode()->getOperand(0); 2406 } 2407 break; 2408 case ISD::BIT_CONVERT: 2409 // Basic sanity checking. 2410 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2411 && "Cannot BIT_CONVERT between types of different sizes!"); 2412 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2413 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2414 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2415 if (OpOpcode == ISD::UNDEF) 2416 return getUNDEF(VT); 2417 break; 2418 case ISD::SCALAR_TO_VECTOR: 2419 assert(VT.isVector() && !Operand.getValueType().isVector() && 2420 (VT.getVectorElementType() == Operand.getValueType() || 2421 (VT.getVectorElementType().isInteger() && 2422 Operand.getValueType().isInteger() && 2423 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2424 "Illegal SCALAR_TO_VECTOR node!"); 2425 if (OpOpcode == ISD::UNDEF) 2426 return getUNDEF(VT); 2427 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2428 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2429 isa<ConstantSDNode>(Operand.getOperand(1)) && 2430 Operand.getConstantOperandVal(1) == 0 && 2431 Operand.getOperand(0).getValueType() == VT) 2432 return Operand.getOperand(0); 2433 break; 2434 case ISD::FNEG: 2435 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2436 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2437 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2438 Operand.getNode()->getOperand(0)); 2439 if (OpOpcode == ISD::FNEG) // --X -> X 2440 return Operand.getNode()->getOperand(0); 2441 break; 2442 case ISD::FABS: 2443 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2444 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2445 break; 2446 } 2447 2448 SDNode *N; 2449 SDVTList VTs = getVTList(VT); 2450 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2451 FoldingSetNodeID ID; 2452 SDValue Ops[1] = { Operand }; 2453 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2454 void *IP = 0; 2455 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2456 return SDValue(E, 0); 2457 N = NodeAllocator.Allocate<UnarySDNode>(); 2458 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2459 CSEMap.InsertNode(N, IP); 2460 } else { 2461 N = NodeAllocator.Allocate<UnarySDNode>(); 2462 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2463 } 2464 2465 AllNodes.push_back(N); 2466#ifndef NDEBUG 2467 VerifyNode(N); 2468#endif 2469 return SDValue(N, 0); 2470} 2471 2472SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2473 EVT VT, 2474 ConstantSDNode *Cst1, 2475 ConstantSDNode *Cst2) { 2476 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2477 2478 switch (Opcode) { 2479 case ISD::ADD: return getConstant(C1 + C2, VT); 2480 case ISD::SUB: return getConstant(C1 - C2, VT); 2481 case ISD::MUL: return getConstant(C1 * C2, VT); 2482 case ISD::UDIV: 2483 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2484 break; 2485 case ISD::UREM: 2486 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2487 break; 2488 case ISD::SDIV: 2489 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2490 break; 2491 case ISD::SREM: 2492 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2493 break; 2494 case ISD::AND: return getConstant(C1 & C2, VT); 2495 case ISD::OR: return getConstant(C1 | C2, VT); 2496 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2497 case ISD::SHL: return getConstant(C1 << C2, VT); 2498 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2499 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2500 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2501 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2502 default: break; 2503 } 2504 2505 return SDValue(); 2506} 2507 2508SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2509 SDValue N1, SDValue N2) { 2510 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2511 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2512 switch (Opcode) { 2513 default: break; 2514 case ISD::TokenFactor: 2515 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2516 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2517 // Fold trivial token factors. 2518 if (N1.getOpcode() == ISD::EntryToken) return N2; 2519 if (N2.getOpcode() == ISD::EntryToken) return N1; 2520 if (N1 == N2) return N1; 2521 break; 2522 case ISD::CONCAT_VECTORS: 2523 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2524 // one big BUILD_VECTOR. 2525 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2526 N2.getOpcode() == ISD::BUILD_VECTOR) { 2527 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2528 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2529 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2530 } 2531 break; 2532 case ISD::AND: 2533 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2534 N1.getValueType() == VT && "Binary operator types must match!"); 2535 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2536 // worth handling here. 2537 if (N2C && N2C->isNullValue()) 2538 return N2; 2539 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2540 return N1; 2541 break; 2542 case ISD::OR: 2543 case ISD::XOR: 2544 case ISD::ADD: 2545 case ISD::SUB: 2546 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2547 N1.getValueType() == VT && "Binary operator types must match!"); 2548 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2549 // it's worth handling here. 2550 if (N2C && N2C->isNullValue()) 2551 return N1; 2552 break; 2553 case ISD::UDIV: 2554 case ISD::UREM: 2555 case ISD::MULHU: 2556 case ISD::MULHS: 2557 case ISD::MUL: 2558 case ISD::SDIV: 2559 case ISD::SREM: 2560 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2561 // fall through 2562 case ISD::FADD: 2563 case ISD::FSUB: 2564 case ISD::FMUL: 2565 case ISD::FDIV: 2566 case ISD::FREM: 2567 if (UnsafeFPMath) { 2568 if (Opcode == ISD::FADD) { 2569 // 0+x --> x 2570 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2571 if (CFP->getValueAPF().isZero()) 2572 return N2; 2573 // x+0 --> x 2574 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2575 if (CFP->getValueAPF().isZero()) 2576 return N1; 2577 } else if (Opcode == ISD::FSUB) { 2578 // x-0 --> x 2579 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2580 if (CFP->getValueAPF().isZero()) 2581 return N1; 2582 } 2583 } 2584 assert(N1.getValueType() == N2.getValueType() && 2585 N1.getValueType() == VT && "Binary operator types must match!"); 2586 break; 2587 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2588 assert(N1.getValueType() == VT && 2589 N1.getValueType().isFloatingPoint() && 2590 N2.getValueType().isFloatingPoint() && 2591 "Invalid FCOPYSIGN!"); 2592 break; 2593 case ISD::SHL: 2594 case ISD::SRA: 2595 case ISD::SRL: 2596 case ISD::ROTL: 2597 case ISD::ROTR: 2598 assert(VT == N1.getValueType() && 2599 "Shift operators return type must be the same as their first arg"); 2600 assert(VT.isInteger() && N2.getValueType().isInteger() && 2601 "Shifts only work on integers"); 2602 2603 // Always fold shifts of i1 values so the code generator doesn't need to 2604 // handle them. Since we know the size of the shift has to be less than the 2605 // size of the value, the shift/rotate count is guaranteed to be zero. 2606 if (VT == MVT::i1) 2607 return N1; 2608 break; 2609 case ISD::FP_ROUND_INREG: { 2610 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2611 assert(VT == N1.getValueType() && "Not an inreg round!"); 2612 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2613 "Cannot FP_ROUND_INREG integer types"); 2614 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2615 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2616 break; 2617 } 2618 case ISD::FP_ROUND: 2619 assert(VT.isFloatingPoint() && 2620 N1.getValueType().isFloatingPoint() && 2621 VT.bitsLE(N1.getValueType()) && 2622 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2623 if (N1.getValueType() == VT) return N1; // noop conversion. 2624 break; 2625 case ISD::AssertSext: 2626 case ISD::AssertZext: { 2627 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2628 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2629 assert(VT.isInteger() && EVT.isInteger() && 2630 "Cannot *_EXTEND_INREG FP types"); 2631 assert(EVT.bitsLE(VT) && "Not extending!"); 2632 if (VT == EVT) return N1; // noop assertion. 2633 break; 2634 } 2635 case ISD::SIGN_EXTEND_INREG: { 2636 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2637 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2638 assert(VT.isInteger() && EVT.isInteger() && 2639 "Cannot *_EXTEND_INREG FP types"); 2640 assert(EVT.bitsLE(VT) && "Not extending!"); 2641 if (EVT == VT) return N1; // Not actually extending 2642 2643 if (N1C) { 2644 APInt Val = N1C->getAPIntValue(); 2645 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2646 Val <<= Val.getBitWidth()-FromBits; 2647 Val = Val.ashr(Val.getBitWidth()-FromBits); 2648 return getConstant(Val, VT); 2649 } 2650 break; 2651 } 2652 case ISD::EXTRACT_VECTOR_ELT: 2653 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2654 if (N1.getOpcode() == ISD::UNDEF) 2655 return getUNDEF(VT); 2656 2657 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2658 // expanding copies of large vectors from registers. 2659 if (N2C && 2660 N1.getOpcode() == ISD::CONCAT_VECTORS && 2661 N1.getNumOperands() > 0) { 2662 unsigned Factor = 2663 N1.getOperand(0).getValueType().getVectorNumElements(); 2664 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2665 N1.getOperand(N2C->getZExtValue() / Factor), 2666 getConstant(N2C->getZExtValue() % Factor, 2667 N2.getValueType())); 2668 } 2669 2670 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2671 // expanding large vector constants. 2672 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2673 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2674 EVT VEltTy = N1.getValueType().getVectorElementType(); 2675 if (Elt.getValueType() != VEltTy) { 2676 // If the vector element type is not legal, the BUILD_VECTOR operands 2677 // are promoted and implicitly truncated. Make that explicit here. 2678 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2679 } 2680 if (VT != VEltTy) { 2681 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2682 // result is implicitly extended. 2683 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2684 } 2685 return Elt; 2686 } 2687 2688 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2689 // operations are lowered to scalars. 2690 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2691 // If the indices are the same, return the inserted element. 2692 if (N1.getOperand(2) == N2) 2693 return N1.getOperand(1); 2694 // If the indices are known different, extract the element from 2695 // the original vector. 2696 else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2697 isa<ConstantSDNode>(N2)) 2698 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2699 } 2700 break; 2701 case ISD::EXTRACT_ELEMENT: 2702 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2703 assert(!N1.getValueType().isVector() && !VT.isVector() && 2704 (N1.getValueType().isInteger() == VT.isInteger()) && 2705 "Wrong types for EXTRACT_ELEMENT!"); 2706 2707 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2708 // 64-bit integers into 32-bit parts. Instead of building the extract of 2709 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2710 if (N1.getOpcode() == ISD::BUILD_PAIR) 2711 return N1.getOperand(N2C->getZExtValue()); 2712 2713 // EXTRACT_ELEMENT of a constant int is also very common. 2714 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2715 unsigned ElementSize = VT.getSizeInBits(); 2716 unsigned Shift = ElementSize * N2C->getZExtValue(); 2717 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2718 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2719 } 2720 break; 2721 case ISD::EXTRACT_SUBVECTOR: 2722 if (N1.getValueType() == VT) // Trivial extraction. 2723 return N1; 2724 break; 2725 } 2726 2727 if (N1C) { 2728 if (N2C) { 2729 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2730 if (SV.getNode()) return SV; 2731 } else { // Cannonicalize constant to RHS if commutative 2732 if (isCommutativeBinOp(Opcode)) { 2733 std::swap(N1C, N2C); 2734 std::swap(N1, N2); 2735 } 2736 } 2737 } 2738 2739 // Constant fold FP operations. 2740 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2741 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2742 if (N1CFP) { 2743 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2744 // Cannonicalize constant to RHS if commutative 2745 std::swap(N1CFP, N2CFP); 2746 std::swap(N1, N2); 2747 } else if (N2CFP && VT != MVT::ppcf128) { 2748 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2749 APFloat::opStatus s; 2750 switch (Opcode) { 2751 case ISD::FADD: 2752 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2753 if (s != APFloat::opInvalidOp) 2754 return getConstantFP(V1, VT); 2755 break; 2756 case ISD::FSUB: 2757 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2758 if (s!=APFloat::opInvalidOp) 2759 return getConstantFP(V1, VT); 2760 break; 2761 case ISD::FMUL: 2762 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2763 if (s!=APFloat::opInvalidOp) 2764 return getConstantFP(V1, VT); 2765 break; 2766 case ISD::FDIV: 2767 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2768 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2769 return getConstantFP(V1, VT); 2770 break; 2771 case ISD::FREM : 2772 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2773 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2774 return getConstantFP(V1, VT); 2775 break; 2776 case ISD::FCOPYSIGN: 2777 V1.copySign(V2); 2778 return getConstantFP(V1, VT); 2779 default: break; 2780 } 2781 } 2782 } 2783 2784 // Canonicalize an UNDEF to the RHS, even over a constant. 2785 if (N1.getOpcode() == ISD::UNDEF) { 2786 if (isCommutativeBinOp(Opcode)) { 2787 std::swap(N1, N2); 2788 } else { 2789 switch (Opcode) { 2790 case ISD::FP_ROUND_INREG: 2791 case ISD::SIGN_EXTEND_INREG: 2792 case ISD::SUB: 2793 case ISD::FSUB: 2794 case ISD::FDIV: 2795 case ISD::FREM: 2796 case ISD::SRA: 2797 return N1; // fold op(undef, arg2) -> undef 2798 case ISD::UDIV: 2799 case ISD::SDIV: 2800 case ISD::UREM: 2801 case ISD::SREM: 2802 case ISD::SRL: 2803 case ISD::SHL: 2804 if (!VT.isVector()) 2805 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2806 // For vectors, we can't easily build an all zero vector, just return 2807 // the LHS. 2808 return N2; 2809 } 2810 } 2811 } 2812 2813 // Fold a bunch of operators when the RHS is undef. 2814 if (N2.getOpcode() == ISD::UNDEF) { 2815 switch (Opcode) { 2816 case ISD::XOR: 2817 if (N1.getOpcode() == ISD::UNDEF) 2818 // Handle undef ^ undef -> 0 special case. This is a common 2819 // idiom (misuse). 2820 return getConstant(0, VT); 2821 // fallthrough 2822 case ISD::ADD: 2823 case ISD::ADDC: 2824 case ISD::ADDE: 2825 case ISD::SUB: 2826 case ISD::UDIV: 2827 case ISD::SDIV: 2828 case ISD::UREM: 2829 case ISD::SREM: 2830 return N2; // fold op(arg1, undef) -> undef 2831 case ISD::FADD: 2832 case ISD::FSUB: 2833 case ISD::FMUL: 2834 case ISD::FDIV: 2835 case ISD::FREM: 2836 if (UnsafeFPMath) 2837 return N2; 2838 break; 2839 case ISD::MUL: 2840 case ISD::AND: 2841 case ISD::SRL: 2842 case ISD::SHL: 2843 if (!VT.isVector()) 2844 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2845 // For vectors, we can't easily build an all zero vector, just return 2846 // the LHS. 2847 return N1; 2848 case ISD::OR: 2849 if (!VT.isVector()) 2850 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2851 // For vectors, we can't easily build an all one vector, just return 2852 // the LHS. 2853 return N1; 2854 case ISD::SRA: 2855 return N1; 2856 } 2857 } 2858 2859 // Memoize this node if possible. 2860 SDNode *N; 2861 SDVTList VTs = getVTList(VT); 2862 if (VT != MVT::Flag) { 2863 SDValue Ops[] = { N1, N2 }; 2864 FoldingSetNodeID ID; 2865 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2866 void *IP = 0; 2867 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2868 return SDValue(E, 0); 2869 N = NodeAllocator.Allocate<BinarySDNode>(); 2870 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2871 CSEMap.InsertNode(N, IP); 2872 } else { 2873 N = NodeAllocator.Allocate<BinarySDNode>(); 2874 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2875 } 2876 2877 AllNodes.push_back(N); 2878#ifndef NDEBUG 2879 VerifyNode(N); 2880#endif 2881 return SDValue(N, 0); 2882} 2883 2884SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2885 SDValue N1, SDValue N2, SDValue N3) { 2886 // Perform various simplifications. 2887 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2888 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2889 switch (Opcode) { 2890 case ISD::CONCAT_VECTORS: 2891 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2892 // one big BUILD_VECTOR. 2893 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2894 N2.getOpcode() == ISD::BUILD_VECTOR && 2895 N3.getOpcode() == ISD::BUILD_VECTOR) { 2896 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2897 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2898 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2899 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2900 } 2901 break; 2902 case ISD::SETCC: { 2903 // Use FoldSetCC to simplify SETCC's. 2904 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2905 if (Simp.getNode()) return Simp; 2906 break; 2907 } 2908 case ISD::SELECT: 2909 if (N1C) { 2910 if (N1C->getZExtValue()) 2911 return N2; // select true, X, Y -> X 2912 else 2913 return N3; // select false, X, Y -> Y 2914 } 2915 2916 if (N2 == N3) return N2; // select C, X, X -> X 2917 break; 2918 case ISD::BRCOND: 2919 if (N2C) { 2920 if (N2C->getZExtValue()) // Unconditional branch 2921 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 2922 else 2923 return N1; // Never-taken branch 2924 } 2925 break; 2926 case ISD::VECTOR_SHUFFLE: 2927 llvm_unreachable("should use getVectorShuffle constructor!"); 2928 break; 2929 case ISD::BIT_CONVERT: 2930 // Fold bit_convert nodes from a type to themselves. 2931 if (N1.getValueType() == VT) 2932 return N1; 2933 break; 2934 } 2935 2936 // Memoize node if it doesn't produce a flag. 2937 SDNode *N; 2938 SDVTList VTs = getVTList(VT); 2939 if (VT != MVT::Flag) { 2940 SDValue Ops[] = { N1, N2, N3 }; 2941 FoldingSetNodeID ID; 2942 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2943 void *IP = 0; 2944 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2945 return SDValue(E, 0); 2946 N = NodeAllocator.Allocate<TernarySDNode>(); 2947 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2948 CSEMap.InsertNode(N, IP); 2949 } else { 2950 N = NodeAllocator.Allocate<TernarySDNode>(); 2951 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2952 } 2953 AllNodes.push_back(N); 2954#ifndef NDEBUG 2955 VerifyNode(N); 2956#endif 2957 return SDValue(N, 0); 2958} 2959 2960SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2961 SDValue N1, SDValue N2, SDValue N3, 2962 SDValue N4) { 2963 SDValue Ops[] = { N1, N2, N3, N4 }; 2964 return getNode(Opcode, DL, VT, Ops, 4); 2965} 2966 2967SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2968 SDValue N1, SDValue N2, SDValue N3, 2969 SDValue N4, SDValue N5) { 2970 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2971 return getNode(Opcode, DL, VT, Ops, 5); 2972} 2973 2974/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 2975/// the incoming stack arguments to be loaded from the stack. 2976SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 2977 SmallVector<SDValue, 8> ArgChains; 2978 2979 // Include the original chain at the beginning of the list. When this is 2980 // used by target LowerCall hooks, this helps legalize find the 2981 // CALLSEQ_BEGIN node. 2982 ArgChains.push_back(Chain); 2983 2984 // Add a chain value for each stack argument. 2985 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 2986 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 2987 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 2988 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 2989 if (FI->getIndex() < 0) 2990 ArgChains.push_back(SDValue(L, 1)); 2991 2992 // Build a tokenfactor for all the chains. 2993 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 2994 &ArgChains[0], ArgChains.size()); 2995} 2996 2997/// getMemsetValue - Vectorized representation of the memset value 2998/// operand. 2999static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3000 DebugLoc dl) { 3001 unsigned NumBits = VT.isVector() ? 3002 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 3003 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3004 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3005 unsigned Shift = 8; 3006 for (unsigned i = NumBits; i > 8; i >>= 1) { 3007 Val = (Val << Shift) | Val; 3008 Shift <<= 1; 3009 } 3010 if (VT.isInteger()) 3011 return DAG.getConstant(Val, VT); 3012 return DAG.getConstantFP(APFloat(Val), VT); 3013 } 3014 3015 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3016 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3017 unsigned Shift = 8; 3018 for (unsigned i = NumBits; i > 8; i >>= 1) { 3019 Value = DAG.getNode(ISD::OR, dl, VT, 3020 DAG.getNode(ISD::SHL, dl, VT, Value, 3021 DAG.getConstant(Shift, 3022 TLI.getShiftAmountTy())), 3023 Value); 3024 Shift <<= 1; 3025 } 3026 3027 return Value; 3028} 3029 3030/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3031/// used when a memcpy is turned into a memset when the source is a constant 3032/// string ptr. 3033static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3034 const TargetLowering &TLI, 3035 std::string &Str, unsigned Offset) { 3036 // Handle vector with all elements zero. 3037 if (Str.empty()) { 3038 if (VT.isInteger()) 3039 return DAG.getConstant(0, VT); 3040 unsigned NumElts = VT.getVectorNumElements(); 3041 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3042 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3043 DAG.getConstant(0, 3044 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3045 } 3046 3047 assert(!VT.isVector() && "Can't handle vector type here!"); 3048 unsigned NumBits = VT.getSizeInBits(); 3049 unsigned MSB = NumBits / 8; 3050 uint64_t Val = 0; 3051 if (TLI.isLittleEndian()) 3052 Offset = Offset + MSB - 1; 3053 for (unsigned i = 0; i != MSB; ++i) { 3054 Val = (Val << 8) | (unsigned char)Str[Offset]; 3055 Offset += TLI.isLittleEndian() ? -1 : 1; 3056 } 3057 return DAG.getConstant(Val, VT); 3058} 3059 3060/// getMemBasePlusOffset - Returns base and offset node for the 3061/// 3062static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3063 SelectionDAG &DAG) { 3064 EVT VT = Base.getValueType(); 3065 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3066 VT, Base, DAG.getConstant(Offset, VT)); 3067} 3068 3069/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3070/// 3071static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3072 unsigned SrcDelta = 0; 3073 GlobalAddressSDNode *G = NULL; 3074 if (Src.getOpcode() == ISD::GlobalAddress) 3075 G = cast<GlobalAddressSDNode>(Src); 3076 else if (Src.getOpcode() == ISD::ADD && 3077 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3078 Src.getOperand(1).getOpcode() == ISD::Constant) { 3079 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3080 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3081 } 3082 if (!G) 3083 return false; 3084 3085 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3086 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3087 return true; 3088 3089 return false; 3090} 3091 3092/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3093/// to replace the memset / memcpy is below the threshold. It also returns the 3094/// types of the sequence of memory ops to perform memset / memcpy. 3095static 3096bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3097 SDValue Dst, SDValue Src, 3098 unsigned Limit, uint64_t Size, unsigned &Align, 3099 std::string &Str, bool &isSrcStr, 3100 SelectionDAG &DAG, 3101 const TargetLowering &TLI) { 3102 isSrcStr = isMemSrcFromString(Src, Str); 3103 bool isSrcConst = isa<ConstantSDNode>(Src); 3104 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3105 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT); 3106 if (VT != MVT::iAny) { 3107 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3108 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3109 // If source is a string constant, this will require an unaligned load. 3110 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3111 if (Dst.getOpcode() != ISD::FrameIndex) { 3112 // Can't change destination alignment. It requires a unaligned store. 3113 if (AllowUnalign) 3114 VT = MVT::iAny; 3115 } else { 3116 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3117 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3118 if (MFI->isFixedObjectIndex(FI)) { 3119 // Can't change destination alignment. It requires a unaligned store. 3120 if (AllowUnalign) 3121 VT = MVT::iAny; 3122 } else { 3123 // Give the stack frame object a larger alignment if needed. 3124 if (MFI->getObjectAlignment(FI) < NewAlign) 3125 MFI->setObjectAlignment(FI, NewAlign); 3126 Align = NewAlign; 3127 } 3128 } 3129 } 3130 } 3131 3132 if (VT == MVT::iAny) { 3133 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) { 3134 VT = MVT::i64; 3135 } else { 3136 switch (Align & 7) { 3137 case 0: VT = MVT::i64; break; 3138 case 4: VT = MVT::i32; break; 3139 case 2: VT = MVT::i16; break; 3140 default: VT = MVT::i8; break; 3141 } 3142 } 3143 3144 MVT LVT = MVT::i64; 3145 while (!TLI.isTypeLegal(LVT)) 3146 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3147 assert(LVT.isInteger()); 3148 3149 if (VT.bitsGT(LVT)) 3150 VT = LVT; 3151 } 3152 3153 unsigned NumMemOps = 0; 3154 while (Size != 0) { 3155 unsigned VTSize = VT.getSizeInBits() / 8; 3156 while (VTSize > Size) { 3157 // For now, only use non-vector load / store's for the left-over pieces. 3158 if (VT.isVector()) { 3159 VT = MVT::i64; 3160 while (!TLI.isTypeLegal(VT)) 3161 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3162 VTSize = VT.getSizeInBits() / 8; 3163 } else { 3164 // This can result in a type that is not legal on the target, e.g. 3165 // 1 or 2 bytes on PPC. 3166 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3167 VTSize >>= 1; 3168 } 3169 } 3170 3171 if (++NumMemOps > Limit) 3172 return false; 3173 MemOps.push_back(VT); 3174 Size -= VTSize; 3175 } 3176 3177 return true; 3178} 3179 3180static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3181 SDValue Chain, SDValue Dst, 3182 SDValue Src, uint64_t Size, 3183 unsigned Align, bool AlwaysInline, 3184 const Value *DstSV, uint64_t DstSVOff, 3185 const Value *SrcSV, uint64_t SrcSVOff){ 3186 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3187 3188 // Expand memcpy to a series of load and store ops if the size operand falls 3189 // below a certain threshold. 3190 std::vector<EVT> MemOps; 3191 uint64_t Limit = -1ULL; 3192 if (!AlwaysInline) 3193 Limit = TLI.getMaxStoresPerMemcpy(); 3194 unsigned DstAlign = Align; // Destination alignment can change. 3195 std::string Str; 3196 bool CopyFromStr; 3197 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3198 Str, CopyFromStr, DAG, TLI)) 3199 return SDValue(); 3200 3201 3202 bool isZeroStr = CopyFromStr && Str.empty(); 3203 SmallVector<SDValue, 8> OutChains; 3204 unsigned NumMemOps = MemOps.size(); 3205 uint64_t SrcOff = 0, DstOff = 0; 3206 for (unsigned i = 0; i != NumMemOps; ++i) { 3207 EVT VT = MemOps[i]; 3208 unsigned VTSize = VT.getSizeInBits() / 8; 3209 SDValue Value, Store; 3210 3211 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3212 // It's unlikely a store of a vector immediate can be done in a single 3213 // instruction. It would require a load from a constantpool first. 3214 // We also handle store a vector with all zero's. 3215 // FIXME: Handle other cases where store of vector immediate is done in 3216 // a single instruction. 3217 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3218 Store = DAG.getStore(Chain, dl, Value, 3219 getMemBasePlusOffset(Dst, DstOff, DAG), 3220 DstSV, DstSVOff + DstOff, false, DstAlign); 3221 } else { 3222 // The type might not be legal for the target. This should only happen 3223 // if the type is smaller than a legal type, as on PPC, so the right 3224 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3225 // to Load/Store if NVT==VT. 3226 // FIXME does the case above also need this? 3227 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3228 assert(NVT.bitsGE(VT)); 3229 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3230 getMemBasePlusOffset(Src, SrcOff, DAG), 3231 SrcSV, SrcSVOff + SrcOff, VT, false, Align); 3232 Store = DAG.getTruncStore(Chain, dl, Value, 3233 getMemBasePlusOffset(Dst, DstOff, DAG), 3234 DstSV, DstSVOff + DstOff, VT, false, DstAlign); 3235 } 3236 OutChains.push_back(Store); 3237 SrcOff += VTSize; 3238 DstOff += VTSize; 3239 } 3240 3241 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3242 &OutChains[0], OutChains.size()); 3243} 3244 3245static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3246 SDValue Chain, SDValue Dst, 3247 SDValue Src, uint64_t Size, 3248 unsigned Align, bool AlwaysInline, 3249 const Value *DstSV, uint64_t DstSVOff, 3250 const Value *SrcSV, uint64_t SrcSVOff){ 3251 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3252 3253 // Expand memmove to a series of load and store ops if the size operand falls 3254 // below a certain threshold. 3255 std::vector<EVT> MemOps; 3256 uint64_t Limit = -1ULL; 3257 if (!AlwaysInline) 3258 Limit = TLI.getMaxStoresPerMemmove(); 3259 unsigned DstAlign = Align; // Destination alignment can change. 3260 std::string Str; 3261 bool CopyFromStr; 3262 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3263 Str, CopyFromStr, DAG, TLI)) 3264 return SDValue(); 3265 3266 uint64_t SrcOff = 0, DstOff = 0; 3267 3268 SmallVector<SDValue, 8> LoadValues; 3269 SmallVector<SDValue, 8> LoadChains; 3270 SmallVector<SDValue, 8> OutChains; 3271 unsigned NumMemOps = MemOps.size(); 3272 for (unsigned i = 0; i < NumMemOps; i++) { 3273 EVT VT = MemOps[i]; 3274 unsigned VTSize = VT.getSizeInBits() / 8; 3275 SDValue Value, Store; 3276 3277 Value = DAG.getLoad(VT, dl, Chain, 3278 getMemBasePlusOffset(Src, SrcOff, DAG), 3279 SrcSV, SrcSVOff + SrcOff, false, Align); 3280 LoadValues.push_back(Value); 3281 LoadChains.push_back(Value.getValue(1)); 3282 SrcOff += VTSize; 3283 } 3284 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3285 &LoadChains[0], LoadChains.size()); 3286 OutChains.clear(); 3287 for (unsigned i = 0; i < NumMemOps; i++) { 3288 EVT VT = MemOps[i]; 3289 unsigned VTSize = VT.getSizeInBits() / 8; 3290 SDValue Value, Store; 3291 3292 Store = DAG.getStore(Chain, dl, LoadValues[i], 3293 getMemBasePlusOffset(Dst, DstOff, DAG), 3294 DstSV, DstSVOff + DstOff, false, DstAlign); 3295 OutChains.push_back(Store); 3296 DstOff += VTSize; 3297 } 3298 3299 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3300 &OutChains[0], OutChains.size()); 3301} 3302 3303static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3304 SDValue Chain, SDValue Dst, 3305 SDValue Src, uint64_t Size, 3306 unsigned Align, 3307 const Value *DstSV, uint64_t DstSVOff) { 3308 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3309 3310 // Expand memset to a series of load/store ops if the size operand 3311 // falls below a certain threshold. 3312 std::vector<EVT> MemOps; 3313 std::string Str; 3314 bool CopyFromStr; 3315 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3316 Size, Align, Str, CopyFromStr, DAG, TLI)) 3317 return SDValue(); 3318 3319 SmallVector<SDValue, 8> OutChains; 3320 uint64_t DstOff = 0; 3321 3322 unsigned NumMemOps = MemOps.size(); 3323 for (unsigned i = 0; i < NumMemOps; i++) { 3324 EVT VT = MemOps[i]; 3325 unsigned VTSize = VT.getSizeInBits() / 8; 3326 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3327 SDValue Store = DAG.getStore(Chain, dl, Value, 3328 getMemBasePlusOffset(Dst, DstOff, DAG), 3329 DstSV, DstSVOff + DstOff); 3330 OutChains.push_back(Store); 3331 DstOff += VTSize; 3332 } 3333 3334 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3335 &OutChains[0], OutChains.size()); 3336} 3337 3338SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3339 SDValue Src, SDValue Size, 3340 unsigned Align, bool AlwaysInline, 3341 const Value *DstSV, uint64_t DstSVOff, 3342 const Value *SrcSV, uint64_t SrcSVOff) { 3343 3344 // Check to see if we should lower the memcpy to loads and stores first. 3345 // For cases within the target-specified limits, this is the best choice. 3346 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3347 if (ConstantSize) { 3348 // Memcpy with size zero? Just return the original chain. 3349 if (ConstantSize->isNullValue()) 3350 return Chain; 3351 3352 SDValue Result = 3353 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3354 ConstantSize->getZExtValue(), 3355 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3356 if (Result.getNode()) 3357 return Result; 3358 } 3359 3360 // Then check to see if we should lower the memcpy with target-specific 3361 // code. If the target chooses to do this, this is the next best. 3362 SDValue Result = 3363 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3364 AlwaysInline, 3365 DstSV, DstSVOff, SrcSV, SrcSVOff); 3366 if (Result.getNode()) 3367 return Result; 3368 3369 // If we really need inline code and the target declined to provide it, 3370 // use a (potentially long) sequence of loads and stores. 3371 if (AlwaysInline) { 3372 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3373 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3374 ConstantSize->getZExtValue(), Align, true, 3375 DstSV, DstSVOff, SrcSV, SrcSVOff); 3376 } 3377 3378 // Emit a library call. 3379 TargetLowering::ArgListTy Args; 3380 TargetLowering::ArgListEntry Entry; 3381 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3382 Entry.Node = Dst; Args.push_back(Entry); 3383 Entry.Node = Src; Args.push_back(Entry); 3384 Entry.Node = Size; Args.push_back(Entry); 3385 // FIXME: pass in DebugLoc 3386 std::pair<SDValue,SDValue> CallResult = 3387 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3388 false, false, false, false, 0, 3389 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3390 /*isReturnValueUsed=*/false, 3391 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3392 TLI.getPointerTy()), 3393 Args, *this, dl); 3394 return CallResult.second; 3395} 3396 3397SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3398 SDValue Src, SDValue Size, 3399 unsigned Align, 3400 const Value *DstSV, uint64_t DstSVOff, 3401 const Value *SrcSV, uint64_t SrcSVOff) { 3402 3403 // Check to see if we should lower the memmove to loads and stores first. 3404 // For cases within the target-specified limits, this is the best choice. 3405 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3406 if (ConstantSize) { 3407 // Memmove with size zero? Just return the original chain. 3408 if (ConstantSize->isNullValue()) 3409 return Chain; 3410 3411 SDValue Result = 3412 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3413 ConstantSize->getZExtValue(), 3414 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3415 if (Result.getNode()) 3416 return Result; 3417 } 3418 3419 // Then check to see if we should lower the memmove with target-specific 3420 // code. If the target chooses to do this, this is the next best. 3421 SDValue Result = 3422 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3423 DstSV, DstSVOff, SrcSV, SrcSVOff); 3424 if (Result.getNode()) 3425 return Result; 3426 3427 // Emit a library call. 3428 TargetLowering::ArgListTy Args; 3429 TargetLowering::ArgListEntry Entry; 3430 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3431 Entry.Node = Dst; Args.push_back(Entry); 3432 Entry.Node = Src; Args.push_back(Entry); 3433 Entry.Node = Size; Args.push_back(Entry); 3434 // FIXME: pass in DebugLoc 3435 std::pair<SDValue,SDValue> CallResult = 3436 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3437 false, false, false, false, 0, 3438 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3439 /*isReturnValueUsed=*/false, 3440 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3441 TLI.getPointerTy()), 3442 Args, *this, dl); 3443 return CallResult.second; 3444} 3445 3446SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3447 SDValue Src, SDValue Size, 3448 unsigned Align, 3449 const Value *DstSV, uint64_t DstSVOff) { 3450 3451 // Check to see if we should lower the memset to stores first. 3452 // For cases within the target-specified limits, this is the best choice. 3453 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3454 if (ConstantSize) { 3455 // Memset with size zero? Just return the original chain. 3456 if (ConstantSize->isNullValue()) 3457 return Chain; 3458 3459 SDValue Result = 3460 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3461 Align, DstSV, DstSVOff); 3462 if (Result.getNode()) 3463 return Result; 3464 } 3465 3466 // Then check to see if we should lower the memset with target-specific 3467 // code. If the target chooses to do this, this is the next best. 3468 SDValue Result = 3469 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3470 DstSV, DstSVOff); 3471 if (Result.getNode()) 3472 return Result; 3473 3474 // Emit a library call. 3475 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3476 TargetLowering::ArgListTy Args; 3477 TargetLowering::ArgListEntry Entry; 3478 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3479 Args.push_back(Entry); 3480 // Extend or truncate the argument to be an i32 value for the call. 3481 if (Src.getValueType().bitsGT(MVT::i32)) 3482 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3483 else 3484 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3485 Entry.Node = Src; 3486 Entry.Ty = Type::getInt32Ty(*getContext()); 3487 Entry.isSExt = true; 3488 Args.push_back(Entry); 3489 Entry.Node = Size; 3490 Entry.Ty = IntPtrTy; 3491 Entry.isSExt = false; 3492 Args.push_back(Entry); 3493 // FIXME: pass in DebugLoc 3494 std::pair<SDValue,SDValue> CallResult = 3495 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3496 false, false, false, false, 0, 3497 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3498 /*isReturnValueUsed=*/false, 3499 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3500 TLI.getPointerTy()), 3501 Args, *this, dl); 3502 return CallResult.second; 3503} 3504 3505SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3506 SDValue Chain, 3507 SDValue Ptr, SDValue Cmp, 3508 SDValue Swp, const Value* PtrVal, 3509 unsigned Alignment) { 3510 MachineFunction &MF = getMachineFunction(); 3511 MachineFrameInfo *FrameInfo = MF.getFrameInfo(); 3512 3513 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3514 Alignment = getEVTAlignment(MemVT); 3515 3516 // Check if the memory reference references a frame index 3517 if (!PtrVal) 3518 if (const FrameIndexSDNode *FI = 3519 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) { 3520 if (FrameInfo->isFixedObjectIndex(FI->getIndex())) 3521 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3522 else 3523 PtrVal = PseudoSourceValue::getStack(); 3524 } 3525 3526 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3527 3528 // For now, atomics are considered to be volatile always. 3529 Flags |= MachineMemOperand::MOVolatile; 3530 3531 MachineMemOperand *MMO = 3532 MF.getMachineMemOperand(PtrVal, Flags, 0, 3533 MemVT.getStoreSize(), Alignment); 3534 3535 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3536} 3537 3538SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3539 SDValue Chain, 3540 SDValue Ptr, SDValue Cmp, 3541 SDValue Swp, MachineMemOperand *MMO) { 3542 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3543 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3544 3545 EVT VT = Cmp.getValueType(); 3546 3547 SDVTList VTs = getVTList(VT, MVT::Other); 3548 FoldingSetNodeID ID; 3549 ID.AddInteger(MemVT.getRawBits()); 3550 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3551 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3552 void* IP = 0; 3553 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3554 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3555 return SDValue(E, 0); 3556 } 3557 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3558 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3559 CSEMap.InsertNode(N, IP); 3560 AllNodes.push_back(N); 3561 return SDValue(N, 0); 3562} 3563 3564SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3565 SDValue Chain, 3566 SDValue Ptr, SDValue Val, 3567 const Value* PtrVal, 3568 unsigned Alignment) { 3569 MachineFunction &MF = getMachineFunction(); 3570 MachineFrameInfo *FrameInfo = MF.getFrameInfo(); 3571 3572 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3573 Alignment = getEVTAlignment(MemVT); 3574 3575 // Check if the memory reference references a frame index 3576 if (!PtrVal) 3577 if (const FrameIndexSDNode *FI = 3578 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3579 if (FrameInfo->isFixedObjectIndex(FI->getIndex())) 3580 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3581 else 3582 PtrVal = PseudoSourceValue::getStack(); 3583 3584 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3585 3586 // For now, atomics are considered to be volatile always. 3587 Flags |= MachineMemOperand::MOVolatile; 3588 3589 MachineMemOperand *MMO = 3590 MF.getMachineMemOperand(PtrVal, Flags, 0, 3591 MemVT.getStoreSize(), Alignment); 3592 3593 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3594} 3595 3596SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3597 SDValue Chain, 3598 SDValue Ptr, SDValue Val, 3599 MachineMemOperand *MMO) { 3600 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3601 Opcode == ISD::ATOMIC_LOAD_SUB || 3602 Opcode == ISD::ATOMIC_LOAD_AND || 3603 Opcode == ISD::ATOMIC_LOAD_OR || 3604 Opcode == ISD::ATOMIC_LOAD_XOR || 3605 Opcode == ISD::ATOMIC_LOAD_NAND || 3606 Opcode == ISD::ATOMIC_LOAD_MIN || 3607 Opcode == ISD::ATOMIC_LOAD_MAX || 3608 Opcode == ISD::ATOMIC_LOAD_UMIN || 3609 Opcode == ISD::ATOMIC_LOAD_UMAX || 3610 Opcode == ISD::ATOMIC_SWAP) && 3611 "Invalid Atomic Op"); 3612 3613 EVT VT = Val.getValueType(); 3614 3615 SDVTList VTs = getVTList(VT, MVT::Other); 3616 FoldingSetNodeID ID; 3617 ID.AddInteger(MemVT.getRawBits()); 3618 SDValue Ops[] = {Chain, Ptr, Val}; 3619 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3620 void* IP = 0; 3621 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3622 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3623 return SDValue(E, 0); 3624 } 3625 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3626 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO); 3627 CSEMap.InsertNode(N, IP); 3628 AllNodes.push_back(N); 3629 return SDValue(N, 0); 3630} 3631 3632/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3633/// Allowed to return something different (and simpler) if Simplify is true. 3634SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3635 DebugLoc dl) { 3636 if (NumOps == 1) 3637 return Ops[0]; 3638 3639 SmallVector<EVT, 4> VTs; 3640 VTs.reserve(NumOps); 3641 for (unsigned i = 0; i < NumOps; ++i) 3642 VTs.push_back(Ops[i].getValueType()); 3643 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3644 Ops, NumOps); 3645} 3646 3647SDValue 3648SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3649 const EVT *VTs, unsigned NumVTs, 3650 const SDValue *Ops, unsigned NumOps, 3651 EVT MemVT, const Value *srcValue, int SVOff, 3652 unsigned Align, bool Vol, 3653 bool ReadMem, bool WriteMem) { 3654 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3655 MemVT, srcValue, SVOff, Align, Vol, 3656 ReadMem, WriteMem); 3657} 3658 3659SDValue 3660SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3661 const SDValue *Ops, unsigned NumOps, 3662 EVT MemVT, const Value *srcValue, int SVOff, 3663 unsigned Align, bool Vol, 3664 bool ReadMem, bool WriteMem) { 3665 if (Align == 0) // Ensure that codegen never sees alignment 0 3666 Align = getEVTAlignment(MemVT); 3667 3668 MachineFunction &MF = getMachineFunction(); 3669 unsigned Flags = 0; 3670 if (WriteMem) 3671 Flags |= MachineMemOperand::MOStore; 3672 if (ReadMem) 3673 Flags |= MachineMemOperand::MOLoad; 3674 if (Vol) 3675 Flags |= MachineMemOperand::MOVolatile; 3676 MachineMemOperand *MMO = 3677 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3678 MemVT.getStoreSize(), Align); 3679 3680 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3681} 3682 3683SDValue 3684SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3685 const SDValue *Ops, unsigned NumOps, 3686 EVT MemVT, MachineMemOperand *MMO) { 3687 assert((Opcode == ISD::INTRINSIC_VOID || 3688 Opcode == ISD::INTRINSIC_W_CHAIN || 3689 (Opcode <= INT_MAX && 3690 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3691 "Opcode is not a memory-accessing opcode!"); 3692 3693 // Memoize the node unless it returns a flag. 3694 MemIntrinsicSDNode *N; 3695 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3696 FoldingSetNodeID ID; 3697 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3698 void *IP = 0; 3699 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3700 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3701 return SDValue(E, 0); 3702 } 3703 3704 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3705 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3706 CSEMap.InsertNode(N, IP); 3707 } else { 3708 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3709 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3710 } 3711 AllNodes.push_back(N); 3712 return SDValue(N, 0); 3713} 3714 3715SDValue 3716SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3717 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3718 SDValue Ptr, SDValue Offset, 3719 const Value *SV, int SVOffset, EVT MemVT, 3720 bool isVolatile, unsigned Alignment) { 3721 MachineFunction &MF = getMachineFunction(); 3722 MachineFrameInfo *FrameInfo = MF.getFrameInfo(); 3723 3724 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3725 Alignment = getEVTAlignment(VT); 3726 3727 // Check if the memory reference references a frame index 3728 if (!SV) 3729 if (const FrameIndexSDNode *FI = 3730 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3731 if (FrameInfo->isFixedObjectIndex(FI->getIndex())) 3732 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3733 else 3734 SV = PseudoSourceValue::getStack(); 3735 3736 unsigned Flags = MachineMemOperand::MOLoad; 3737 if (isVolatile) 3738 Flags |= MachineMemOperand::MOVolatile; 3739 MachineMemOperand *MMO = 3740 MF.getMachineMemOperand(SV, Flags, SVOffset, 3741 MemVT.getStoreSize(), Alignment); 3742 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3743} 3744 3745SDValue 3746SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3747 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3748 SDValue Ptr, SDValue Offset, EVT MemVT, 3749 MachineMemOperand *MMO) { 3750 if (VT == MemVT) { 3751 ExtType = ISD::NON_EXTLOAD; 3752 } else if (ExtType == ISD::NON_EXTLOAD) { 3753 assert(VT == MemVT && "Non-extending load from different memory type!"); 3754 } else { 3755 // Extending load. 3756 if (VT.isVector()) 3757 assert(MemVT.getVectorNumElements() == VT.getVectorNumElements() && 3758 "Invalid vector extload!"); 3759 else 3760 assert(MemVT.bitsLT(VT) && 3761 "Should only be an extending load, not truncating!"); 3762 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3763 "Cannot sign/zero extend a FP/Vector load!"); 3764 assert(VT.isInteger() == MemVT.isInteger() && 3765 "Cannot convert from FP to Int or Int -> FP!"); 3766 } 3767 3768 bool Indexed = AM != ISD::UNINDEXED; 3769 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3770 "Unindexed load with an offset!"); 3771 3772 SDVTList VTs = Indexed ? 3773 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3774 SDValue Ops[] = { Chain, Ptr, Offset }; 3775 FoldingSetNodeID ID; 3776 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3777 ID.AddInteger(MemVT.getRawBits()); 3778 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile())); 3779 void *IP = 0; 3780 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3781 cast<LoadSDNode>(E)->refineAlignment(MMO); 3782 return SDValue(E, 0); 3783 } 3784 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3785 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO); 3786 CSEMap.InsertNode(N, IP); 3787 AllNodes.push_back(N); 3788 return SDValue(N, 0); 3789} 3790 3791SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3792 SDValue Chain, SDValue Ptr, 3793 const Value *SV, int SVOffset, 3794 bool isVolatile, unsigned Alignment) { 3795 SDValue Undef = getUNDEF(Ptr.getValueType()); 3796 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3797 SV, SVOffset, VT, isVolatile, Alignment); 3798} 3799 3800SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3801 SDValue Chain, SDValue Ptr, 3802 const Value *SV, 3803 int SVOffset, EVT MemVT, 3804 bool isVolatile, unsigned Alignment) { 3805 SDValue Undef = getUNDEF(Ptr.getValueType()); 3806 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3807 SV, SVOffset, MemVT, isVolatile, Alignment); 3808} 3809 3810SDValue 3811SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3812 SDValue Offset, ISD::MemIndexedMode AM) { 3813 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3814 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3815 "Load is already a indexed load!"); 3816 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3817 LD->getChain(), Base, Offset, LD->getSrcValue(), 3818 LD->getSrcValueOffset(), LD->getMemoryVT(), 3819 LD->isVolatile(), LD->getAlignment()); 3820} 3821 3822SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3823 SDValue Ptr, const Value *SV, int SVOffset, 3824 bool isVolatile, unsigned Alignment) { 3825 MachineFunction &MF = getMachineFunction(); 3826 MachineFrameInfo *FrameInfo = MF.getFrameInfo(); 3827 3828 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3829 Alignment = getEVTAlignment(Val.getValueType()); 3830 3831 // Check if the memory reference references a frame index 3832 if (!SV) 3833 if (const FrameIndexSDNode *FI = 3834 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3835 if (FrameInfo->isFixedObjectIndex(FI->getIndex())) 3836 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3837 else 3838 SV = PseudoSourceValue::getStack(); 3839 3840 unsigned Flags = MachineMemOperand::MOStore; 3841 if (isVolatile) 3842 Flags |= MachineMemOperand::MOVolatile; 3843 MachineMemOperand *MMO = 3844 MF.getMachineMemOperand(SV, Flags, SVOffset, 3845 Val.getValueType().getStoreSize(), Alignment); 3846 3847 return getStore(Chain, dl, Val, Ptr, MMO); 3848} 3849 3850SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3851 SDValue Ptr, MachineMemOperand *MMO) { 3852 EVT VT = Val.getValueType(); 3853 SDVTList VTs = getVTList(MVT::Other); 3854 SDValue Undef = getUNDEF(Ptr.getValueType()); 3855 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3856 FoldingSetNodeID ID; 3857 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3858 ID.AddInteger(VT.getRawBits()); 3859 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile())); 3860 void *IP = 0; 3861 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3862 cast<StoreSDNode>(E)->refineAlignment(MMO); 3863 return SDValue(E, 0); 3864 } 3865 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3866 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO); 3867 CSEMap.InsertNode(N, IP); 3868 AllNodes.push_back(N); 3869 return SDValue(N, 0); 3870} 3871 3872SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3873 SDValue Ptr, const Value *SV, 3874 int SVOffset, EVT SVT, 3875 bool isVolatile, unsigned Alignment) { 3876 MachineFunction &MF = getMachineFunction(); 3877 MachineFrameInfo *FrameInfo = MF.getFrameInfo(); 3878 3879 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3880 Alignment = getEVTAlignment(SVT); 3881 3882 // Check if the memory reference references a frame index 3883 if (!SV) 3884 if (const FrameIndexSDNode *FI = 3885 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3886 if (FrameInfo->isFixedObjectIndex(FI->getIndex())) 3887 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3888 else 3889 SV = PseudoSourceValue::getStack(); 3890 3891 unsigned Flags = MachineMemOperand::MOStore; 3892 if (isVolatile) 3893 Flags |= MachineMemOperand::MOVolatile; 3894 MachineMemOperand *MMO = 3895 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 3896 3897 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 3898} 3899 3900SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3901 SDValue Ptr, EVT SVT, 3902 MachineMemOperand *MMO) { 3903 EVT VT = Val.getValueType(); 3904 3905 if (VT == SVT) 3906 return getStore(Chain, dl, Val, Ptr, MMO); 3907 3908 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3909 assert(VT.isInteger() == SVT.isInteger() && 3910 "Can't do FP-INT conversion!"); 3911 3912 3913 SDVTList VTs = getVTList(MVT::Other); 3914 SDValue Undef = getUNDEF(Ptr.getValueType()); 3915 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3916 FoldingSetNodeID ID; 3917 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3918 ID.AddInteger(SVT.getRawBits()); 3919 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile())); 3920 void *IP = 0; 3921 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3922 cast<StoreSDNode>(E)->refineAlignment(MMO); 3923 return SDValue(E, 0); 3924 } 3925 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3926 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO); 3927 CSEMap.InsertNode(N, IP); 3928 AllNodes.push_back(N); 3929 return SDValue(N, 0); 3930} 3931 3932SDValue 3933SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 3934 SDValue Offset, ISD::MemIndexedMode AM) { 3935 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3936 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3937 "Store is already a indexed store!"); 3938 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3939 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3940 FoldingSetNodeID ID; 3941 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3942 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3943 ID.AddInteger(ST->getRawSubclassData()); 3944 void *IP = 0; 3945 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3946 return SDValue(E, 0); 3947 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3948 new (N) StoreSDNode(Ops, dl, VTs, AM, 3949 ST->isTruncatingStore(), ST->getMemoryVT(), 3950 ST->getMemOperand()); 3951 CSEMap.InsertNode(N, IP); 3952 AllNodes.push_back(N); 3953 return SDValue(N, 0); 3954} 3955 3956SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 3957 SDValue Chain, SDValue Ptr, 3958 SDValue SV) { 3959 SDValue Ops[] = { Chain, Ptr, SV }; 3960 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 3961} 3962 3963SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3964 const SDUse *Ops, unsigned NumOps) { 3965 switch (NumOps) { 3966 case 0: return getNode(Opcode, DL, VT); 3967 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3968 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3969 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3970 default: break; 3971 } 3972 3973 // Copy from an SDUse array into an SDValue array for use with 3974 // the regular getNode logic. 3975 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3976 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 3977} 3978 3979SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3980 const SDValue *Ops, unsigned NumOps) { 3981 switch (NumOps) { 3982 case 0: return getNode(Opcode, DL, VT); 3983 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3984 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3985 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3986 default: break; 3987 } 3988 3989 switch (Opcode) { 3990 default: break; 3991 case ISD::SELECT_CC: { 3992 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3993 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3994 "LHS and RHS of condition must have same type!"); 3995 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3996 "True and False arms of SelectCC must have same type!"); 3997 assert(Ops[2].getValueType() == VT && 3998 "select_cc node must be of same type as true and false value!"); 3999 break; 4000 } 4001 case ISD::BR_CC: { 4002 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4003 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4004 "LHS/RHS of comparison should match types!"); 4005 break; 4006 } 4007 } 4008 4009 // Memoize nodes. 4010 SDNode *N; 4011 SDVTList VTs = getVTList(VT); 4012 4013 if (VT != MVT::Flag) { 4014 FoldingSetNodeID ID; 4015 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4016 void *IP = 0; 4017 4018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4019 return SDValue(E, 0); 4020 4021 N = NodeAllocator.Allocate<SDNode>(); 4022 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4023 CSEMap.InsertNode(N, IP); 4024 } else { 4025 N = NodeAllocator.Allocate<SDNode>(); 4026 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4027 } 4028 4029 AllNodes.push_back(N); 4030#ifndef NDEBUG 4031 VerifyNode(N); 4032#endif 4033 return SDValue(N, 0); 4034} 4035 4036SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4037 const std::vector<EVT> &ResultTys, 4038 const SDValue *Ops, unsigned NumOps) { 4039 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4040 Ops, NumOps); 4041} 4042 4043SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4044 const EVT *VTs, unsigned NumVTs, 4045 const SDValue *Ops, unsigned NumOps) { 4046 if (NumVTs == 1) 4047 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4048 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4049} 4050 4051SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4052 const SDValue *Ops, unsigned NumOps) { 4053 if (VTList.NumVTs == 1) 4054 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4055 4056#if 0 4057 switch (Opcode) { 4058 // FIXME: figure out how to safely handle things like 4059 // int foo(int x) { return 1 << (x & 255); } 4060 // int bar() { return foo(256); } 4061 case ISD::SRA_PARTS: 4062 case ISD::SRL_PARTS: 4063 case ISD::SHL_PARTS: 4064 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4065 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4066 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4067 else if (N3.getOpcode() == ISD::AND) 4068 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4069 // If the and is only masking out bits that cannot effect the shift, 4070 // eliminate the and. 4071 unsigned NumBits = VT.getSizeInBits()*2; 4072 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4073 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4074 } 4075 break; 4076 } 4077#endif 4078 4079 // Memoize the node unless it returns a flag. 4080 SDNode *N; 4081 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4082 FoldingSetNodeID ID; 4083 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4084 void *IP = 0; 4085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4086 return SDValue(E, 0); 4087 if (NumOps == 1) { 4088 N = NodeAllocator.Allocate<UnarySDNode>(); 4089 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4090 } else if (NumOps == 2) { 4091 N = NodeAllocator.Allocate<BinarySDNode>(); 4092 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4093 } else if (NumOps == 3) { 4094 N = NodeAllocator.Allocate<TernarySDNode>(); 4095 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4096 } else { 4097 N = NodeAllocator.Allocate<SDNode>(); 4098 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4099 } 4100 CSEMap.InsertNode(N, IP); 4101 } else { 4102 if (NumOps == 1) { 4103 N = NodeAllocator.Allocate<UnarySDNode>(); 4104 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4105 } else if (NumOps == 2) { 4106 N = NodeAllocator.Allocate<BinarySDNode>(); 4107 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4108 } else if (NumOps == 3) { 4109 N = NodeAllocator.Allocate<TernarySDNode>(); 4110 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4111 } else { 4112 N = NodeAllocator.Allocate<SDNode>(); 4113 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4114 } 4115 } 4116 AllNodes.push_back(N); 4117#ifndef NDEBUG 4118 VerifyNode(N); 4119#endif 4120 return SDValue(N, 0); 4121} 4122 4123SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4124 return getNode(Opcode, DL, VTList, 0, 0); 4125} 4126 4127SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4128 SDValue N1) { 4129 SDValue Ops[] = { N1 }; 4130 return getNode(Opcode, DL, VTList, Ops, 1); 4131} 4132 4133SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4134 SDValue N1, SDValue N2) { 4135 SDValue Ops[] = { N1, N2 }; 4136 return getNode(Opcode, DL, VTList, Ops, 2); 4137} 4138 4139SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4140 SDValue N1, SDValue N2, SDValue N3) { 4141 SDValue Ops[] = { N1, N2, N3 }; 4142 return getNode(Opcode, DL, VTList, Ops, 3); 4143} 4144 4145SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4146 SDValue N1, SDValue N2, SDValue N3, 4147 SDValue N4) { 4148 SDValue Ops[] = { N1, N2, N3, N4 }; 4149 return getNode(Opcode, DL, VTList, Ops, 4); 4150} 4151 4152SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4153 SDValue N1, SDValue N2, SDValue N3, 4154 SDValue N4, SDValue N5) { 4155 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4156 return getNode(Opcode, DL, VTList, Ops, 5); 4157} 4158 4159SDVTList SelectionDAG::getVTList(EVT VT) { 4160 return makeVTList(SDNode::getValueTypeList(VT), 1); 4161} 4162 4163SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4164 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4165 E = VTList.rend(); I != E; ++I) 4166 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4167 return *I; 4168 4169 EVT *Array = Allocator.Allocate<EVT>(2); 4170 Array[0] = VT1; 4171 Array[1] = VT2; 4172 SDVTList Result = makeVTList(Array, 2); 4173 VTList.push_back(Result); 4174 return Result; 4175} 4176 4177SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4178 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4179 E = VTList.rend(); I != E; ++I) 4180 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4181 I->VTs[2] == VT3) 4182 return *I; 4183 4184 EVT *Array = Allocator.Allocate<EVT>(3); 4185 Array[0] = VT1; 4186 Array[1] = VT2; 4187 Array[2] = VT3; 4188 SDVTList Result = makeVTList(Array, 3); 4189 VTList.push_back(Result); 4190 return Result; 4191} 4192 4193SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4194 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4195 E = VTList.rend(); I != E; ++I) 4196 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4197 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4198 return *I; 4199 4200 EVT *Array = Allocator.Allocate<EVT>(3); 4201 Array[0] = VT1; 4202 Array[1] = VT2; 4203 Array[2] = VT3; 4204 Array[3] = VT4; 4205 SDVTList Result = makeVTList(Array, 4); 4206 VTList.push_back(Result); 4207 return Result; 4208} 4209 4210SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4211 switch (NumVTs) { 4212 case 0: llvm_unreachable("Cannot have nodes without results!"); 4213 case 1: return getVTList(VTs[0]); 4214 case 2: return getVTList(VTs[0], VTs[1]); 4215 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4216 default: break; 4217 } 4218 4219 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4220 E = VTList.rend(); I != E; ++I) { 4221 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4222 continue; 4223 4224 bool NoMatch = false; 4225 for (unsigned i = 2; i != NumVTs; ++i) 4226 if (VTs[i] != I->VTs[i]) { 4227 NoMatch = true; 4228 break; 4229 } 4230 if (!NoMatch) 4231 return *I; 4232 } 4233 4234 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4235 std::copy(VTs, VTs+NumVTs, Array); 4236 SDVTList Result = makeVTList(Array, NumVTs); 4237 VTList.push_back(Result); 4238 return Result; 4239} 4240 4241 4242/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4243/// specified operands. If the resultant node already exists in the DAG, 4244/// this does not modify the specified node, instead it returns the node that 4245/// already exists. If the resultant node does not exist in the DAG, the 4246/// input node is returned. As a degenerate case, if you specify the same 4247/// input operands as the node already has, the input node is returned. 4248SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4249 SDNode *N = InN.getNode(); 4250 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4251 4252 // Check to see if there is no change. 4253 if (Op == N->getOperand(0)) return InN; 4254 4255 // See if the modified node already exists. 4256 void *InsertPos = 0; 4257 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4258 return SDValue(Existing, InN.getResNo()); 4259 4260 // Nope it doesn't. Remove the node from its current place in the maps. 4261 if (InsertPos) 4262 if (!RemoveNodeFromCSEMaps(N)) 4263 InsertPos = 0; 4264 4265 // Now we update the operands. 4266 N->OperandList[0].set(Op); 4267 4268 // If this gets put into a CSE map, add it. 4269 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4270 return InN; 4271} 4272 4273SDValue SelectionDAG:: 4274UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4275 SDNode *N = InN.getNode(); 4276 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4277 4278 // Check to see if there is no change. 4279 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4280 return InN; // No operands changed, just return the input node. 4281 4282 // See if the modified node already exists. 4283 void *InsertPos = 0; 4284 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4285 return SDValue(Existing, InN.getResNo()); 4286 4287 // Nope it doesn't. Remove the node from its current place in the maps. 4288 if (InsertPos) 4289 if (!RemoveNodeFromCSEMaps(N)) 4290 InsertPos = 0; 4291 4292 // Now we update the operands. 4293 if (N->OperandList[0] != Op1) 4294 N->OperandList[0].set(Op1); 4295 if (N->OperandList[1] != Op2) 4296 N->OperandList[1].set(Op2); 4297 4298 // If this gets put into a CSE map, add it. 4299 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4300 return InN; 4301} 4302 4303SDValue SelectionDAG:: 4304UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4305 SDValue Ops[] = { Op1, Op2, Op3 }; 4306 return UpdateNodeOperands(N, Ops, 3); 4307} 4308 4309SDValue SelectionDAG:: 4310UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4311 SDValue Op3, SDValue Op4) { 4312 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4313 return UpdateNodeOperands(N, Ops, 4); 4314} 4315 4316SDValue SelectionDAG:: 4317UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4318 SDValue Op3, SDValue Op4, SDValue Op5) { 4319 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4320 return UpdateNodeOperands(N, Ops, 5); 4321} 4322 4323SDValue SelectionDAG:: 4324UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4325 SDNode *N = InN.getNode(); 4326 assert(N->getNumOperands() == NumOps && 4327 "Update with wrong number of operands"); 4328 4329 // Check to see if there is no change. 4330 bool AnyChange = false; 4331 for (unsigned i = 0; i != NumOps; ++i) { 4332 if (Ops[i] != N->getOperand(i)) { 4333 AnyChange = true; 4334 break; 4335 } 4336 } 4337 4338 // No operands changed, just return the input node. 4339 if (!AnyChange) return InN; 4340 4341 // See if the modified node already exists. 4342 void *InsertPos = 0; 4343 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4344 return SDValue(Existing, InN.getResNo()); 4345 4346 // Nope it doesn't. Remove the node from its current place in the maps. 4347 if (InsertPos) 4348 if (!RemoveNodeFromCSEMaps(N)) 4349 InsertPos = 0; 4350 4351 // Now we update the operands. 4352 for (unsigned i = 0; i != NumOps; ++i) 4353 if (N->OperandList[i] != Ops[i]) 4354 N->OperandList[i].set(Ops[i]); 4355 4356 // If this gets put into a CSE map, add it. 4357 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4358 return InN; 4359} 4360 4361/// DropOperands - Release the operands and set this node to have 4362/// zero operands. 4363void SDNode::DropOperands() { 4364 // Unlike the code in MorphNodeTo that does this, we don't need to 4365 // watch for dead nodes here. 4366 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4367 SDUse &Use = *I++; 4368 Use.set(SDValue()); 4369 } 4370} 4371 4372/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4373/// machine opcode. 4374/// 4375SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4376 EVT VT) { 4377 SDVTList VTs = getVTList(VT); 4378 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4379} 4380 4381SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4382 EVT VT, SDValue Op1) { 4383 SDVTList VTs = getVTList(VT); 4384 SDValue Ops[] = { Op1 }; 4385 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4386} 4387 4388SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4389 EVT VT, SDValue Op1, 4390 SDValue Op2) { 4391 SDVTList VTs = getVTList(VT); 4392 SDValue Ops[] = { Op1, Op2 }; 4393 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4394} 4395 4396SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4397 EVT VT, SDValue Op1, 4398 SDValue Op2, SDValue Op3) { 4399 SDVTList VTs = getVTList(VT); 4400 SDValue Ops[] = { Op1, Op2, Op3 }; 4401 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4402} 4403 4404SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4405 EVT VT, const SDValue *Ops, 4406 unsigned NumOps) { 4407 SDVTList VTs = getVTList(VT); 4408 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4409} 4410 4411SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4412 EVT VT1, EVT VT2, const SDValue *Ops, 4413 unsigned NumOps) { 4414 SDVTList VTs = getVTList(VT1, VT2); 4415 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4416} 4417 4418SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4419 EVT VT1, EVT VT2) { 4420 SDVTList VTs = getVTList(VT1, VT2); 4421 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4422} 4423 4424SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4425 EVT VT1, EVT VT2, EVT VT3, 4426 const SDValue *Ops, unsigned NumOps) { 4427 SDVTList VTs = getVTList(VT1, VT2, VT3); 4428 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4429} 4430 4431SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4432 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4433 const SDValue *Ops, unsigned NumOps) { 4434 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4435 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4436} 4437 4438SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4439 EVT VT1, EVT VT2, 4440 SDValue Op1) { 4441 SDVTList VTs = getVTList(VT1, VT2); 4442 SDValue Ops[] = { Op1 }; 4443 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4444} 4445 4446SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4447 EVT VT1, EVT VT2, 4448 SDValue Op1, SDValue Op2) { 4449 SDVTList VTs = getVTList(VT1, VT2); 4450 SDValue Ops[] = { Op1, Op2 }; 4451 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4452} 4453 4454SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4455 EVT VT1, EVT VT2, 4456 SDValue Op1, SDValue Op2, 4457 SDValue Op3) { 4458 SDVTList VTs = getVTList(VT1, VT2); 4459 SDValue Ops[] = { Op1, Op2, Op3 }; 4460 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4461} 4462 4463SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4464 EVT VT1, EVT VT2, EVT VT3, 4465 SDValue Op1, SDValue Op2, 4466 SDValue Op3) { 4467 SDVTList VTs = getVTList(VT1, VT2, VT3); 4468 SDValue Ops[] = { Op1, Op2, Op3 }; 4469 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4470} 4471 4472SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4473 SDVTList VTs, const SDValue *Ops, 4474 unsigned NumOps) { 4475 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4476} 4477 4478SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4479 EVT VT) { 4480 SDVTList VTs = getVTList(VT); 4481 return MorphNodeTo(N, Opc, VTs, 0, 0); 4482} 4483 4484SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4485 EVT VT, SDValue Op1) { 4486 SDVTList VTs = getVTList(VT); 4487 SDValue Ops[] = { Op1 }; 4488 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4489} 4490 4491SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4492 EVT VT, SDValue Op1, 4493 SDValue Op2) { 4494 SDVTList VTs = getVTList(VT); 4495 SDValue Ops[] = { Op1, Op2 }; 4496 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4497} 4498 4499SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4500 EVT VT, SDValue Op1, 4501 SDValue Op2, SDValue Op3) { 4502 SDVTList VTs = getVTList(VT); 4503 SDValue Ops[] = { Op1, Op2, Op3 }; 4504 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4505} 4506 4507SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4508 EVT VT, const SDValue *Ops, 4509 unsigned NumOps) { 4510 SDVTList VTs = getVTList(VT); 4511 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4512} 4513 4514SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4515 EVT VT1, EVT VT2, const SDValue *Ops, 4516 unsigned NumOps) { 4517 SDVTList VTs = getVTList(VT1, VT2); 4518 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4519} 4520 4521SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4522 EVT VT1, EVT VT2) { 4523 SDVTList VTs = getVTList(VT1, VT2); 4524 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4525} 4526 4527SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4528 EVT VT1, EVT VT2, EVT VT3, 4529 const SDValue *Ops, unsigned NumOps) { 4530 SDVTList VTs = getVTList(VT1, VT2, VT3); 4531 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4532} 4533 4534SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4535 EVT VT1, EVT VT2, 4536 SDValue Op1) { 4537 SDVTList VTs = getVTList(VT1, VT2); 4538 SDValue Ops[] = { Op1 }; 4539 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4540} 4541 4542SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4543 EVT VT1, EVT VT2, 4544 SDValue Op1, SDValue Op2) { 4545 SDVTList VTs = getVTList(VT1, VT2); 4546 SDValue Ops[] = { Op1, Op2 }; 4547 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4548} 4549 4550SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4551 EVT VT1, EVT VT2, 4552 SDValue Op1, SDValue Op2, 4553 SDValue Op3) { 4554 SDVTList VTs = getVTList(VT1, VT2); 4555 SDValue Ops[] = { Op1, Op2, Op3 }; 4556 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4557} 4558 4559/// MorphNodeTo - These *mutate* the specified node to have the specified 4560/// return type, opcode, and operands. 4561/// 4562/// Note that MorphNodeTo returns the resultant node. If there is already a 4563/// node of the specified opcode and operands, it returns that node instead of 4564/// the current one. Note that the DebugLoc need not be the same. 4565/// 4566/// Using MorphNodeTo is faster than creating a new node and swapping it in 4567/// with ReplaceAllUsesWith both because it often avoids allocating a new 4568/// node, and because it doesn't require CSE recalculation for any of 4569/// the node's users. 4570/// 4571SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4572 SDVTList VTs, const SDValue *Ops, 4573 unsigned NumOps) { 4574 // If an identical node already exists, use it. 4575 void *IP = 0; 4576 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4577 FoldingSetNodeID ID; 4578 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4579 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4580 return ON; 4581 } 4582 4583 if (!RemoveNodeFromCSEMaps(N)) 4584 IP = 0; 4585 4586 // Start the morphing. 4587 N->NodeType = Opc; 4588 N->ValueList = VTs.VTs; 4589 N->NumValues = VTs.NumVTs; 4590 4591 // Clear the operands list, updating used nodes to remove this from their 4592 // use list. Keep track of any operands that become dead as a result. 4593 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4594 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4595 SDUse &Use = *I++; 4596 SDNode *Used = Use.getNode(); 4597 Use.set(SDValue()); 4598 if (Used->use_empty()) 4599 DeadNodeSet.insert(Used); 4600 } 4601 4602 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4603 // Initialize the memory references information. 4604 MN->setMemRefs(0, 0); 4605 // If NumOps is larger than the # of operands we can have in a 4606 // MachineSDNode, reallocate the operand list. 4607 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4608 if (MN->OperandsNeedDelete) 4609 delete[] MN->OperandList; 4610 if (NumOps > array_lengthof(MN->LocalOperands)) 4611 // We're creating a final node that will live unmorphed for the 4612 // remainder of the current SelectionDAG iteration, so we can allocate 4613 // the operands directly out of a pool with no recycling metadata. 4614 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4615 Ops, NumOps); 4616 else 4617 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4618 MN->OperandsNeedDelete = false; 4619 } else 4620 MN->InitOperands(MN->OperandList, Ops, NumOps); 4621 } else { 4622 // If NumOps is larger than the # of operands we currently have, reallocate 4623 // the operand list. 4624 if (NumOps > N->NumOperands) { 4625 if (N->OperandsNeedDelete) 4626 delete[] N->OperandList; 4627 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4628 N->OperandsNeedDelete = true; 4629 } else 4630 MN->InitOperands(MN->OperandList, Ops, NumOps); 4631 } 4632 4633 // Delete any nodes that are still dead after adding the uses for the 4634 // new operands. 4635 SmallVector<SDNode *, 16> DeadNodes; 4636 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4637 E = DeadNodeSet.end(); I != E; ++I) 4638 if ((*I)->use_empty()) 4639 DeadNodes.push_back(*I); 4640 RemoveDeadNodes(DeadNodes); 4641 4642 if (IP) 4643 CSEMap.InsertNode(N, IP); // Memoize the new node. 4644 return N; 4645} 4646 4647 4648/// getMachineNode - These are used for target selectors to create a new node 4649/// with specified return type(s), MachineInstr opcode, and operands. 4650/// 4651/// Note that getMachineNode returns the resultant node. If there is already a 4652/// node of the specified opcode and operands, it returns that node instead of 4653/// the current one. 4654MachineSDNode * 4655SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4656 SDVTList VTs = getVTList(VT); 4657 return getMachineNode(Opcode, dl, VTs, 0, 0); 4658} 4659 4660MachineSDNode * 4661SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4662 SDVTList VTs = getVTList(VT); 4663 SDValue Ops[] = { Op1 }; 4664 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4665} 4666 4667MachineSDNode * 4668SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4669 SDValue Op1, SDValue Op2) { 4670 SDVTList VTs = getVTList(VT); 4671 SDValue Ops[] = { Op1, Op2 }; 4672 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4673} 4674 4675MachineSDNode * 4676SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4677 SDValue Op1, SDValue Op2, SDValue Op3) { 4678 SDVTList VTs = getVTList(VT); 4679 SDValue Ops[] = { Op1, Op2, Op3 }; 4680 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4681} 4682 4683MachineSDNode * 4684SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4685 const SDValue *Ops, unsigned NumOps) { 4686 SDVTList VTs = getVTList(VT); 4687 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4688} 4689 4690MachineSDNode * 4691SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4692 SDVTList VTs = getVTList(VT1, VT2); 4693 return getMachineNode(Opcode, dl, VTs, 0, 0); 4694} 4695 4696MachineSDNode * 4697SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4698 EVT VT1, EVT VT2, SDValue Op1) { 4699 SDVTList VTs = getVTList(VT1, VT2); 4700 SDValue Ops[] = { Op1 }; 4701 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4702} 4703 4704MachineSDNode * 4705SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4706 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4707 SDVTList VTs = getVTList(VT1, VT2); 4708 SDValue Ops[] = { Op1, Op2 }; 4709 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4710} 4711 4712MachineSDNode * 4713SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4714 EVT VT1, EVT VT2, SDValue Op1, 4715 SDValue Op2, SDValue Op3) { 4716 SDVTList VTs = getVTList(VT1, VT2); 4717 SDValue Ops[] = { Op1, Op2, Op3 }; 4718 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4719} 4720 4721MachineSDNode * 4722SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4723 EVT VT1, EVT VT2, 4724 const SDValue *Ops, unsigned NumOps) { 4725 SDVTList VTs = getVTList(VT1, VT2); 4726 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4727} 4728 4729MachineSDNode * 4730SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4731 EVT VT1, EVT VT2, EVT VT3, 4732 SDValue Op1, SDValue Op2) { 4733 SDVTList VTs = getVTList(VT1, VT2, VT3); 4734 SDValue Ops[] = { Op1, Op2 }; 4735 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4736} 4737 4738MachineSDNode * 4739SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4740 EVT VT1, EVT VT2, EVT VT3, 4741 SDValue Op1, SDValue Op2, SDValue Op3) { 4742 SDVTList VTs = getVTList(VT1, VT2, VT3); 4743 SDValue Ops[] = { Op1, Op2, Op3 }; 4744 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4745} 4746 4747MachineSDNode * 4748SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4749 EVT VT1, EVT VT2, EVT VT3, 4750 const SDValue *Ops, unsigned NumOps) { 4751 SDVTList VTs = getVTList(VT1, VT2, VT3); 4752 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4753} 4754 4755MachineSDNode * 4756SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4757 EVT VT2, EVT VT3, EVT VT4, 4758 const SDValue *Ops, unsigned NumOps) { 4759 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4760 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4761} 4762 4763MachineSDNode * 4764SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4765 const std::vector<EVT> &ResultTys, 4766 const SDValue *Ops, unsigned NumOps) { 4767 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4768 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4769} 4770 4771MachineSDNode * 4772SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4773 const SDValue *Ops, unsigned NumOps) { 4774 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4775 MachineSDNode *N; 4776 void *IP; 4777 4778 if (DoCSE) { 4779 FoldingSetNodeID ID; 4780 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4781 IP = 0; 4782 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4783 return cast<MachineSDNode>(E); 4784 } 4785 4786 // Allocate a new MachineSDNode. 4787 N = NodeAllocator.Allocate<MachineSDNode>(); 4788 new (N) MachineSDNode(~Opcode, DL, VTs); 4789 4790 // Initialize the operands list. 4791 if (NumOps > array_lengthof(N->LocalOperands)) 4792 // We're creating a final node that will live unmorphed for the 4793 // remainder of the current SelectionDAG iteration, so we can allocate 4794 // the operands directly out of a pool with no recycling metadata. 4795 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4796 Ops, NumOps); 4797 else 4798 N->InitOperands(N->LocalOperands, Ops, NumOps); 4799 N->OperandsNeedDelete = false; 4800 4801 if (DoCSE) 4802 CSEMap.InsertNode(N, IP); 4803 4804 AllNodes.push_back(N); 4805#ifndef NDEBUG 4806 VerifyNode(N); 4807#endif 4808 return N; 4809} 4810 4811/// getTargetExtractSubreg - A convenience function for creating 4812/// TargetInstrInfo::EXTRACT_SUBREG nodes. 4813SDValue 4814SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4815 SDValue Operand) { 4816 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4817 SDNode *Subreg = getMachineNode(TargetInstrInfo::EXTRACT_SUBREG, DL, 4818 VT, Operand, SRIdxVal); 4819 return SDValue(Subreg, 0); 4820} 4821 4822/// getTargetInsertSubreg - A convenience function for creating 4823/// TargetInstrInfo::INSERT_SUBREG nodes. 4824SDValue 4825SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4826 SDValue Operand, SDValue Subreg) { 4827 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4828 SDNode *Result = getMachineNode(TargetInstrInfo::INSERT_SUBREG, DL, 4829 VT, Operand, Subreg, SRIdxVal); 4830 return SDValue(Result, 0); 4831} 4832 4833/// getNodeIfExists - Get the specified node if it's already available, or 4834/// else return NULL. 4835SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4836 const SDValue *Ops, unsigned NumOps) { 4837 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4838 FoldingSetNodeID ID; 4839 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4840 void *IP = 0; 4841 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4842 return E; 4843 } 4844 return NULL; 4845} 4846 4847/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4848/// This can cause recursive merging of nodes in the DAG. 4849/// 4850/// This version assumes From has a single result value. 4851/// 4852void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4853 DAGUpdateListener *UpdateListener) { 4854 SDNode *From = FromN.getNode(); 4855 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4856 "Cannot replace with this method!"); 4857 assert(From != To.getNode() && "Cannot replace uses of with self"); 4858 4859 // Iterate over all the existing uses of From. New uses will be added 4860 // to the beginning of the use list, which we avoid visiting. 4861 // This specifically avoids visiting uses of From that arise while the 4862 // replacement is happening, because any such uses would be the result 4863 // of CSE: If an existing node looks like From after one of its operands 4864 // is replaced by To, we don't want to replace of all its users with To 4865 // too. See PR3018 for more info. 4866 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4867 while (UI != UE) { 4868 SDNode *User = *UI; 4869 4870 // This node is about to morph, remove its old self from the CSE maps. 4871 RemoveNodeFromCSEMaps(User); 4872 4873 // A user can appear in a use list multiple times, and when this 4874 // happens the uses are usually next to each other in the list. 4875 // To help reduce the number of CSE recomputations, process all 4876 // the uses of this user that we can find this way. 4877 do { 4878 SDUse &Use = UI.getUse(); 4879 ++UI; 4880 Use.set(To); 4881 } while (UI != UE && *UI == User); 4882 4883 // Now that we have modified User, add it back to the CSE maps. If it 4884 // already exists there, recursively merge the results together. 4885 AddModifiedNodeToCSEMaps(User, UpdateListener); 4886 } 4887} 4888 4889/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4890/// This can cause recursive merging of nodes in the DAG. 4891/// 4892/// This version assumes that for each value of From, there is a 4893/// corresponding value in To in the same position with the same type. 4894/// 4895void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4896 DAGUpdateListener *UpdateListener) { 4897#ifndef NDEBUG 4898 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4899 assert((!From->hasAnyUseOfValue(i) || 4900 From->getValueType(i) == To->getValueType(i)) && 4901 "Cannot use this version of ReplaceAllUsesWith!"); 4902#endif 4903 4904 // Handle the trivial case. 4905 if (From == To) 4906 return; 4907 4908 // Iterate over just the existing users of From. See the comments in 4909 // the ReplaceAllUsesWith above. 4910 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4911 while (UI != UE) { 4912 SDNode *User = *UI; 4913 4914 // This node is about to morph, remove its old self from the CSE maps. 4915 RemoveNodeFromCSEMaps(User); 4916 4917 // A user can appear in a use list multiple times, and when this 4918 // happens the uses are usually next to each other in the list. 4919 // To help reduce the number of CSE recomputations, process all 4920 // the uses of this user that we can find this way. 4921 do { 4922 SDUse &Use = UI.getUse(); 4923 ++UI; 4924 Use.setNode(To); 4925 } while (UI != UE && *UI == User); 4926 4927 // Now that we have modified User, add it back to the CSE maps. If it 4928 // already exists there, recursively merge the results together. 4929 AddModifiedNodeToCSEMaps(User, UpdateListener); 4930 } 4931} 4932 4933/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4934/// This can cause recursive merging of nodes in the DAG. 4935/// 4936/// This version can replace From with any result values. To must match the 4937/// number and types of values returned by From. 4938void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4939 const SDValue *To, 4940 DAGUpdateListener *UpdateListener) { 4941 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4942 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4943 4944 // Iterate over just the existing users of From. See the comments in 4945 // the ReplaceAllUsesWith above. 4946 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4947 while (UI != UE) { 4948 SDNode *User = *UI; 4949 4950 // This node is about to morph, remove its old self from the CSE maps. 4951 RemoveNodeFromCSEMaps(User); 4952 4953 // A user can appear in a use list multiple times, and when this 4954 // happens the uses are usually next to each other in the list. 4955 // To help reduce the number of CSE recomputations, process all 4956 // the uses of this user that we can find this way. 4957 do { 4958 SDUse &Use = UI.getUse(); 4959 const SDValue &ToOp = To[Use.getResNo()]; 4960 ++UI; 4961 Use.set(ToOp); 4962 } while (UI != UE && *UI == User); 4963 4964 // Now that we have modified User, add it back to the CSE maps. If it 4965 // already exists there, recursively merge the results together. 4966 AddModifiedNodeToCSEMaps(User, UpdateListener); 4967 } 4968} 4969 4970/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4971/// uses of other values produced by From.getNode() alone. The Deleted 4972/// vector is handled the same way as for ReplaceAllUsesWith. 4973void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4974 DAGUpdateListener *UpdateListener){ 4975 // Handle the really simple, really trivial case efficiently. 4976 if (From == To) return; 4977 4978 // Handle the simple, trivial, case efficiently. 4979 if (From.getNode()->getNumValues() == 1) { 4980 ReplaceAllUsesWith(From, To, UpdateListener); 4981 return; 4982 } 4983 4984 // Iterate over just the existing users of From. See the comments in 4985 // the ReplaceAllUsesWith above. 4986 SDNode::use_iterator UI = From.getNode()->use_begin(), 4987 UE = From.getNode()->use_end(); 4988 while (UI != UE) { 4989 SDNode *User = *UI; 4990 bool UserRemovedFromCSEMaps = false; 4991 4992 // A user can appear in a use list multiple times, and when this 4993 // happens the uses are usually next to each other in the list. 4994 // To help reduce the number of CSE recomputations, process all 4995 // the uses of this user that we can find this way. 4996 do { 4997 SDUse &Use = UI.getUse(); 4998 4999 // Skip uses of different values from the same node. 5000 if (Use.getResNo() != From.getResNo()) { 5001 ++UI; 5002 continue; 5003 } 5004 5005 // If this node hasn't been modified yet, it's still in the CSE maps, 5006 // so remove its old self from the CSE maps. 5007 if (!UserRemovedFromCSEMaps) { 5008 RemoveNodeFromCSEMaps(User); 5009 UserRemovedFromCSEMaps = true; 5010 } 5011 5012 ++UI; 5013 Use.set(To); 5014 } while (UI != UE && *UI == User); 5015 5016 // We are iterating over all uses of the From node, so if a use 5017 // doesn't use the specific value, no changes are made. 5018 if (!UserRemovedFromCSEMaps) 5019 continue; 5020 5021 // Now that we have modified User, add it back to the CSE maps. If it 5022 // already exists there, recursively merge the results together. 5023 AddModifiedNodeToCSEMaps(User, UpdateListener); 5024 } 5025} 5026 5027namespace { 5028 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5029 /// to record information about a use. 5030 struct UseMemo { 5031 SDNode *User; 5032 unsigned Index; 5033 SDUse *Use; 5034 }; 5035 5036 /// operator< - Sort Memos by User. 5037 bool operator<(const UseMemo &L, const UseMemo &R) { 5038 return (intptr_t)L.User < (intptr_t)R.User; 5039 } 5040} 5041 5042/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5043/// uses of other values produced by From.getNode() alone. The same value 5044/// may appear in both the From and To list. The Deleted vector is 5045/// handled the same way as for ReplaceAllUsesWith. 5046void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5047 const SDValue *To, 5048 unsigned Num, 5049 DAGUpdateListener *UpdateListener){ 5050 // Handle the simple, trivial case efficiently. 5051 if (Num == 1) 5052 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5053 5054 // Read up all the uses and make records of them. This helps 5055 // processing new uses that are introduced during the 5056 // replacement process. 5057 SmallVector<UseMemo, 4> Uses; 5058 for (unsigned i = 0; i != Num; ++i) { 5059 unsigned FromResNo = From[i].getResNo(); 5060 SDNode *FromNode = From[i].getNode(); 5061 for (SDNode::use_iterator UI = FromNode->use_begin(), 5062 E = FromNode->use_end(); UI != E; ++UI) { 5063 SDUse &Use = UI.getUse(); 5064 if (Use.getResNo() == FromResNo) { 5065 UseMemo Memo = { *UI, i, &Use }; 5066 Uses.push_back(Memo); 5067 } 5068 } 5069 } 5070 5071 // Sort the uses, so that all the uses from a given User are together. 5072 std::sort(Uses.begin(), Uses.end()); 5073 5074 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5075 UseIndex != UseIndexEnd; ) { 5076 // We know that this user uses some value of From. If it is the right 5077 // value, update it. 5078 SDNode *User = Uses[UseIndex].User; 5079 5080 // This node is about to morph, remove its old self from the CSE maps. 5081 RemoveNodeFromCSEMaps(User); 5082 5083 // The Uses array is sorted, so all the uses for a given User 5084 // are next to each other in the list. 5085 // To help reduce the number of CSE recomputations, process all 5086 // the uses of this user that we can find this way. 5087 do { 5088 unsigned i = Uses[UseIndex].Index; 5089 SDUse &Use = *Uses[UseIndex].Use; 5090 ++UseIndex; 5091 5092 Use.set(To[i]); 5093 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5094 5095 // Now that we have modified User, add it back to the CSE maps. If it 5096 // already exists there, recursively merge the results together. 5097 AddModifiedNodeToCSEMaps(User, UpdateListener); 5098 } 5099} 5100 5101/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5102/// based on their topological order. It returns the maximum id and a vector 5103/// of the SDNodes* in assigned order by reference. 5104unsigned SelectionDAG::AssignTopologicalOrder() { 5105 5106 unsigned DAGSize = 0; 5107 5108 // SortedPos tracks the progress of the algorithm. Nodes before it are 5109 // sorted, nodes after it are unsorted. When the algorithm completes 5110 // it is at the end of the list. 5111 allnodes_iterator SortedPos = allnodes_begin(); 5112 5113 // Visit all the nodes. Move nodes with no operands to the front of 5114 // the list immediately. Annotate nodes that do have operands with their 5115 // operand count. Before we do this, the Node Id fields of the nodes 5116 // may contain arbitrary values. After, the Node Id fields for nodes 5117 // before SortedPos will contain the topological sort index, and the 5118 // Node Id fields for nodes At SortedPos and after will contain the 5119 // count of outstanding operands. 5120 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5121 SDNode *N = I++; 5122 unsigned Degree = N->getNumOperands(); 5123 if (Degree == 0) { 5124 // A node with no uses, add it to the result array immediately. 5125 N->setNodeId(DAGSize++); 5126 allnodes_iterator Q = N; 5127 if (Q != SortedPos) 5128 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5129 ++SortedPos; 5130 } else { 5131 // Temporarily use the Node Id as scratch space for the degree count. 5132 N->setNodeId(Degree); 5133 } 5134 } 5135 5136 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5137 // such that by the time the end is reached all nodes will be sorted. 5138 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5139 SDNode *N = I; 5140 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5141 UI != UE; ++UI) { 5142 SDNode *P = *UI; 5143 unsigned Degree = P->getNodeId(); 5144 --Degree; 5145 if (Degree == 0) { 5146 // All of P's operands are sorted, so P may sorted now. 5147 P->setNodeId(DAGSize++); 5148 if (P != SortedPos) 5149 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5150 ++SortedPos; 5151 } else { 5152 // Update P's outstanding operand count. 5153 P->setNodeId(Degree); 5154 } 5155 } 5156 } 5157 5158 assert(SortedPos == AllNodes.end() && 5159 "Topological sort incomplete!"); 5160 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5161 "First node in topological sort is not the entry token!"); 5162 assert(AllNodes.front().getNodeId() == 0 && 5163 "First node in topological sort has non-zero id!"); 5164 assert(AllNodes.front().getNumOperands() == 0 && 5165 "First node in topological sort has operands!"); 5166 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5167 "Last node in topologic sort has unexpected id!"); 5168 assert(AllNodes.back().use_empty() && 5169 "Last node in topologic sort has users!"); 5170 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5171 return DAGSize; 5172} 5173 5174 5175 5176//===----------------------------------------------------------------------===// 5177// SDNode Class 5178//===----------------------------------------------------------------------===// 5179 5180HandleSDNode::~HandleSDNode() { 5181 DropOperands(); 5182} 5183 5184GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5185 EVT VT, int64_t o, unsigned char TF) 5186 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 5187 Offset(o), TargetFlags(TF) { 5188 TheGlobal = const_cast<GlobalValue*>(GA); 5189} 5190 5191MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5192 MachineMemOperand *mmo) 5193 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5194 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile()); 5195 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5196 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5197} 5198 5199MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5200 const SDValue *Ops, unsigned NumOps, EVT memvt, 5201 MachineMemOperand *mmo) 5202 : SDNode(Opc, dl, VTs, Ops, NumOps), 5203 MemoryVT(memvt), MMO(mmo) { 5204 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile()); 5205 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5206 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5207} 5208 5209/// Profile - Gather unique data for the node. 5210/// 5211void SDNode::Profile(FoldingSetNodeID &ID) const { 5212 AddNodeIDNode(ID, this); 5213} 5214 5215namespace { 5216 struct EVTArray { 5217 std::vector<EVT> VTs; 5218 5219 EVTArray() { 5220 VTs.reserve(MVT::LAST_VALUETYPE); 5221 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5222 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5223 } 5224 }; 5225} 5226 5227static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5228static ManagedStatic<EVTArray> SimpleVTArray; 5229static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5230 5231/// getValueTypeList - Return a pointer to the specified value type. 5232/// 5233const EVT *SDNode::getValueTypeList(EVT VT) { 5234 if (VT.isExtended()) { 5235 sys::SmartScopedLock<true> Lock(*VTMutex); 5236 return &(*EVTs->insert(VT).first); 5237 } else { 5238 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5239 } 5240} 5241 5242/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5243/// indicated value. This method ignores uses of other values defined by this 5244/// operation. 5245bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5246 assert(Value < getNumValues() && "Bad value!"); 5247 5248 // TODO: Only iterate over uses of a given value of the node 5249 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5250 if (UI.getUse().getResNo() == Value) { 5251 if (NUses == 0) 5252 return false; 5253 --NUses; 5254 } 5255 } 5256 5257 // Found exactly the right number of uses? 5258 return NUses == 0; 5259} 5260 5261 5262/// hasAnyUseOfValue - Return true if there are any use of the indicated 5263/// value. This method ignores uses of other values defined by this operation. 5264bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5265 assert(Value < getNumValues() && "Bad value!"); 5266 5267 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5268 if (UI.getUse().getResNo() == Value) 5269 return true; 5270 5271 return false; 5272} 5273 5274 5275/// isOnlyUserOf - Return true if this node is the only use of N. 5276/// 5277bool SDNode::isOnlyUserOf(SDNode *N) const { 5278 bool Seen = false; 5279 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5280 SDNode *User = *I; 5281 if (User == this) 5282 Seen = true; 5283 else 5284 return false; 5285 } 5286 5287 return Seen; 5288} 5289 5290/// isOperand - Return true if this node is an operand of N. 5291/// 5292bool SDValue::isOperandOf(SDNode *N) const { 5293 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5294 if (*this == N->getOperand(i)) 5295 return true; 5296 return false; 5297} 5298 5299bool SDNode::isOperandOf(SDNode *N) const { 5300 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5301 if (this == N->OperandList[i].getNode()) 5302 return true; 5303 return false; 5304} 5305 5306/// reachesChainWithoutSideEffects - Return true if this operand (which must 5307/// be a chain) reaches the specified operand without crossing any 5308/// side-effecting instructions. In practice, this looks through token 5309/// factors and non-volatile loads. In order to remain efficient, this only 5310/// looks a couple of nodes in, it does not do an exhaustive search. 5311bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5312 unsigned Depth) const { 5313 if (*this == Dest) return true; 5314 5315 // Don't search too deeply, we just want to be able to see through 5316 // TokenFactor's etc. 5317 if (Depth == 0) return false; 5318 5319 // If this is a token factor, all inputs to the TF happen in parallel. If any 5320 // of the operands of the TF reach dest, then we can do the xform. 5321 if (getOpcode() == ISD::TokenFactor) { 5322 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5323 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5324 return true; 5325 return false; 5326 } 5327 5328 // Loads don't have side effects, look through them. 5329 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5330 if (!Ld->isVolatile()) 5331 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5332 } 5333 return false; 5334} 5335 5336 5337static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 5338 SmallPtrSet<SDNode *, 32> &Visited) { 5339 if (found || !Visited.insert(N)) 5340 return; 5341 5342 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 5343 SDNode *Op = N->getOperand(i).getNode(); 5344 if (Op == P) { 5345 found = true; 5346 return; 5347 } 5348 findPredecessor(Op, P, found, Visited); 5349 } 5350} 5351 5352/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5353/// is either an operand of N or it can be reached by recursively traversing 5354/// up the operands. 5355/// NOTE: this is an expensive method. Use it carefully. 5356bool SDNode::isPredecessorOf(SDNode *N) const { 5357 SmallPtrSet<SDNode *, 32> Visited; 5358 bool found = false; 5359 findPredecessor(N, this, found, Visited); 5360 return found; 5361} 5362 5363uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5364 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5365 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5366} 5367 5368std::string SDNode::getOperationName(const SelectionDAG *G) const { 5369 switch (getOpcode()) { 5370 default: 5371 if (getOpcode() < ISD::BUILTIN_OP_END) 5372 return "<<Unknown DAG Node>>"; 5373 if (isMachineOpcode()) { 5374 if (G) 5375 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5376 if (getMachineOpcode() < TII->getNumOpcodes()) 5377 return TII->get(getMachineOpcode()).getName(); 5378 return "<<Unknown Machine Node>>"; 5379 } 5380 if (G) { 5381 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5382 const char *Name = TLI.getTargetNodeName(getOpcode()); 5383 if (Name) return Name; 5384 return "<<Unknown Target Node>>"; 5385 } 5386 return "<<Unknown Node>>"; 5387 5388#ifndef NDEBUG 5389 case ISD::DELETED_NODE: 5390 return "<<Deleted Node!>>"; 5391#endif 5392 case ISD::PREFETCH: return "Prefetch"; 5393 case ISD::MEMBARRIER: return "MemBarrier"; 5394 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5395 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5396 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5397 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5398 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5399 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5400 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5401 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5402 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5403 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5404 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5405 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5406 case ISD::PCMARKER: return "PCMarker"; 5407 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5408 case ISD::SRCVALUE: return "SrcValue"; 5409 case ISD::EntryToken: return "EntryToken"; 5410 case ISD::TokenFactor: return "TokenFactor"; 5411 case ISD::AssertSext: return "AssertSext"; 5412 case ISD::AssertZext: return "AssertZext"; 5413 5414 case ISD::BasicBlock: return "BasicBlock"; 5415 case ISD::VALUETYPE: return "ValueType"; 5416 case ISD::Register: return "Register"; 5417 5418 case ISD::Constant: return "Constant"; 5419 case ISD::ConstantFP: return "ConstantFP"; 5420 case ISD::GlobalAddress: return "GlobalAddress"; 5421 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5422 case ISD::FrameIndex: return "FrameIndex"; 5423 case ISD::JumpTable: return "JumpTable"; 5424 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5425 case ISD::RETURNADDR: return "RETURNADDR"; 5426 case ISD::FRAMEADDR: return "FRAMEADDR"; 5427 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5428 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5429 case ISD::LSDAADDR: return "LSDAADDR"; 5430 case ISD::EHSELECTION: return "EHSELECTION"; 5431 case ISD::EH_RETURN: return "EH_RETURN"; 5432 case ISD::ConstantPool: return "ConstantPool"; 5433 case ISD::ExternalSymbol: return "ExternalSymbol"; 5434 case ISD::INTRINSIC_WO_CHAIN: 5435 case ISD::INTRINSIC_VOID: 5436 case ISD::INTRINSIC_W_CHAIN: { 5437 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5438 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5439 if (IID < Intrinsic::num_intrinsics) 5440 return Intrinsic::getName((Intrinsic::ID)IID); 5441 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5442 return TII->getName(IID); 5443 llvm_unreachable("Invalid intrinsic ID"); 5444 } 5445 5446 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5447 case ISD::TargetConstant: return "TargetConstant"; 5448 case ISD::TargetConstantFP:return "TargetConstantFP"; 5449 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5450 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5451 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5452 case ISD::TargetJumpTable: return "TargetJumpTable"; 5453 case ISD::TargetConstantPool: return "TargetConstantPool"; 5454 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5455 5456 case ISD::CopyToReg: return "CopyToReg"; 5457 case ISD::CopyFromReg: return "CopyFromReg"; 5458 case ISD::UNDEF: return "undef"; 5459 case ISD::MERGE_VALUES: return "merge_values"; 5460 case ISD::INLINEASM: return "inlineasm"; 5461 case ISD::DBG_LABEL: return "dbg_label"; 5462 case ISD::EH_LABEL: return "eh_label"; 5463 case ISD::HANDLENODE: return "handlenode"; 5464 5465 // Unary operators 5466 case ISD::FABS: return "fabs"; 5467 case ISD::FNEG: return "fneg"; 5468 case ISD::FSQRT: return "fsqrt"; 5469 case ISD::FSIN: return "fsin"; 5470 case ISD::FCOS: return "fcos"; 5471 case ISD::FPOWI: return "fpowi"; 5472 case ISD::FPOW: return "fpow"; 5473 case ISD::FTRUNC: return "ftrunc"; 5474 case ISD::FFLOOR: return "ffloor"; 5475 case ISD::FCEIL: return "fceil"; 5476 case ISD::FRINT: return "frint"; 5477 case ISD::FNEARBYINT: return "fnearbyint"; 5478 5479 // Binary operators 5480 case ISD::ADD: return "add"; 5481 case ISD::SUB: return "sub"; 5482 case ISD::MUL: return "mul"; 5483 case ISD::MULHU: return "mulhu"; 5484 case ISD::MULHS: return "mulhs"; 5485 case ISD::SDIV: return "sdiv"; 5486 case ISD::UDIV: return "udiv"; 5487 case ISD::SREM: return "srem"; 5488 case ISD::UREM: return "urem"; 5489 case ISD::SMUL_LOHI: return "smul_lohi"; 5490 case ISD::UMUL_LOHI: return "umul_lohi"; 5491 case ISD::SDIVREM: return "sdivrem"; 5492 case ISD::UDIVREM: return "udivrem"; 5493 case ISD::AND: return "and"; 5494 case ISD::OR: return "or"; 5495 case ISD::XOR: return "xor"; 5496 case ISD::SHL: return "shl"; 5497 case ISD::SRA: return "sra"; 5498 case ISD::SRL: return "srl"; 5499 case ISD::ROTL: return "rotl"; 5500 case ISD::ROTR: return "rotr"; 5501 case ISD::FADD: return "fadd"; 5502 case ISD::FSUB: return "fsub"; 5503 case ISD::FMUL: return "fmul"; 5504 case ISD::FDIV: return "fdiv"; 5505 case ISD::FREM: return "frem"; 5506 case ISD::FCOPYSIGN: return "fcopysign"; 5507 case ISD::FGETSIGN: return "fgetsign"; 5508 5509 case ISD::SETCC: return "setcc"; 5510 case ISD::VSETCC: return "vsetcc"; 5511 case ISD::SELECT: return "select"; 5512 case ISD::SELECT_CC: return "select_cc"; 5513 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5514 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5515 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5516 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5517 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5518 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5519 case ISD::CARRY_FALSE: return "carry_false"; 5520 case ISD::ADDC: return "addc"; 5521 case ISD::ADDE: return "adde"; 5522 case ISD::SADDO: return "saddo"; 5523 case ISD::UADDO: return "uaddo"; 5524 case ISD::SSUBO: return "ssubo"; 5525 case ISD::USUBO: return "usubo"; 5526 case ISD::SMULO: return "smulo"; 5527 case ISD::UMULO: return "umulo"; 5528 case ISD::SUBC: return "subc"; 5529 case ISD::SUBE: return "sube"; 5530 case ISD::SHL_PARTS: return "shl_parts"; 5531 case ISD::SRA_PARTS: return "sra_parts"; 5532 case ISD::SRL_PARTS: return "srl_parts"; 5533 5534 // Conversion operators. 5535 case ISD::SIGN_EXTEND: return "sign_extend"; 5536 case ISD::ZERO_EXTEND: return "zero_extend"; 5537 case ISD::ANY_EXTEND: return "any_extend"; 5538 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5539 case ISD::TRUNCATE: return "truncate"; 5540 case ISD::FP_ROUND: return "fp_round"; 5541 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5542 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5543 case ISD::FP_EXTEND: return "fp_extend"; 5544 5545 case ISD::SINT_TO_FP: return "sint_to_fp"; 5546 case ISD::UINT_TO_FP: return "uint_to_fp"; 5547 case ISD::FP_TO_SINT: return "fp_to_sint"; 5548 case ISD::FP_TO_UINT: return "fp_to_uint"; 5549 case ISD::BIT_CONVERT: return "bit_convert"; 5550 5551 case ISD::CONVERT_RNDSAT: { 5552 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5553 default: llvm_unreachable("Unknown cvt code!"); 5554 case ISD::CVT_FF: return "cvt_ff"; 5555 case ISD::CVT_FS: return "cvt_fs"; 5556 case ISD::CVT_FU: return "cvt_fu"; 5557 case ISD::CVT_SF: return "cvt_sf"; 5558 case ISD::CVT_UF: return "cvt_uf"; 5559 case ISD::CVT_SS: return "cvt_ss"; 5560 case ISD::CVT_SU: return "cvt_su"; 5561 case ISD::CVT_US: return "cvt_us"; 5562 case ISD::CVT_UU: return "cvt_uu"; 5563 } 5564 } 5565 5566 // Control flow instructions 5567 case ISD::BR: return "br"; 5568 case ISD::BRIND: return "brind"; 5569 case ISD::BR_JT: return "br_jt"; 5570 case ISD::BRCOND: return "brcond"; 5571 case ISD::BR_CC: return "br_cc"; 5572 case ISD::CALLSEQ_START: return "callseq_start"; 5573 case ISD::CALLSEQ_END: return "callseq_end"; 5574 5575 // Other operators 5576 case ISD::LOAD: return "load"; 5577 case ISD::STORE: return "store"; 5578 case ISD::VAARG: return "vaarg"; 5579 case ISD::VACOPY: return "vacopy"; 5580 case ISD::VAEND: return "vaend"; 5581 case ISD::VASTART: return "vastart"; 5582 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5583 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5584 case ISD::BUILD_PAIR: return "build_pair"; 5585 case ISD::STACKSAVE: return "stacksave"; 5586 case ISD::STACKRESTORE: return "stackrestore"; 5587 case ISD::TRAP: return "trap"; 5588 5589 // Bit manipulation 5590 case ISD::BSWAP: return "bswap"; 5591 case ISD::CTPOP: return "ctpop"; 5592 case ISD::CTTZ: return "cttz"; 5593 case ISD::CTLZ: return "ctlz"; 5594 5595 // Debug info 5596 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5597 case ISD::DEBUG_LOC: return "debug_loc"; 5598 5599 // Trampolines 5600 case ISD::TRAMPOLINE: return "trampoline"; 5601 5602 case ISD::CONDCODE: 5603 switch (cast<CondCodeSDNode>(this)->get()) { 5604 default: llvm_unreachable("Unknown setcc condition!"); 5605 case ISD::SETOEQ: return "setoeq"; 5606 case ISD::SETOGT: return "setogt"; 5607 case ISD::SETOGE: return "setoge"; 5608 case ISD::SETOLT: return "setolt"; 5609 case ISD::SETOLE: return "setole"; 5610 case ISD::SETONE: return "setone"; 5611 5612 case ISD::SETO: return "seto"; 5613 case ISD::SETUO: return "setuo"; 5614 case ISD::SETUEQ: return "setue"; 5615 case ISD::SETUGT: return "setugt"; 5616 case ISD::SETUGE: return "setuge"; 5617 case ISD::SETULT: return "setult"; 5618 case ISD::SETULE: return "setule"; 5619 case ISD::SETUNE: return "setune"; 5620 5621 case ISD::SETEQ: return "seteq"; 5622 case ISD::SETGT: return "setgt"; 5623 case ISD::SETGE: return "setge"; 5624 case ISD::SETLT: return "setlt"; 5625 case ISD::SETLE: return "setle"; 5626 case ISD::SETNE: return "setne"; 5627 } 5628 } 5629} 5630 5631const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5632 switch (AM) { 5633 default: 5634 return ""; 5635 case ISD::PRE_INC: 5636 return "<pre-inc>"; 5637 case ISD::PRE_DEC: 5638 return "<pre-dec>"; 5639 case ISD::POST_INC: 5640 return "<post-inc>"; 5641 case ISD::POST_DEC: 5642 return "<post-dec>"; 5643 } 5644} 5645 5646std::string ISD::ArgFlagsTy::getArgFlagsString() { 5647 std::string S = "< "; 5648 5649 if (isZExt()) 5650 S += "zext "; 5651 if (isSExt()) 5652 S += "sext "; 5653 if (isInReg()) 5654 S += "inreg "; 5655 if (isSRet()) 5656 S += "sret "; 5657 if (isByVal()) 5658 S += "byval "; 5659 if (isNest()) 5660 S += "nest "; 5661 if (getByValAlign()) 5662 S += "byval-align:" + utostr(getByValAlign()) + " "; 5663 if (getOrigAlign()) 5664 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5665 if (getByValSize()) 5666 S += "byval-size:" + utostr(getByValSize()) + " "; 5667 return S + ">"; 5668} 5669 5670void SDNode::dump() const { dump(0); } 5671void SDNode::dump(const SelectionDAG *G) const { 5672 print(errs(), G); 5673} 5674 5675void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5676 OS << (void*)this << ": "; 5677 5678 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5679 if (i) OS << ","; 5680 if (getValueType(i) == MVT::Other) 5681 OS << "ch"; 5682 else 5683 OS << getValueType(i).getEVTString(); 5684 } 5685 OS << " = " << getOperationName(G); 5686} 5687 5688void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5689 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5690 if (!MN->memoperands_empty()) { 5691 OS << "<"; 5692 OS << "Mem:"; 5693 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5694 e = MN->memoperands_end(); i != e; ++i) { 5695 OS << **i; 5696 if (next(i) != e) 5697 OS << " "; 5698 } 5699 OS << ">"; 5700 } 5701 } else if (const ShuffleVectorSDNode *SVN = 5702 dyn_cast<ShuffleVectorSDNode>(this)) { 5703 OS << "<"; 5704 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5705 int Idx = SVN->getMaskElt(i); 5706 if (i) OS << ","; 5707 if (Idx < 0) 5708 OS << "u"; 5709 else 5710 OS << Idx; 5711 } 5712 OS << ">"; 5713 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5714 OS << '<' << CSDN->getAPIntValue() << '>'; 5715 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5716 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5717 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5718 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5719 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5720 else { 5721 OS << "<APFloat("; 5722 CSDN->getValueAPF().bitcastToAPInt().dump(); 5723 OS << ")>"; 5724 } 5725 } else if (const GlobalAddressSDNode *GADN = 5726 dyn_cast<GlobalAddressSDNode>(this)) { 5727 int64_t offset = GADN->getOffset(); 5728 OS << '<'; 5729 WriteAsOperand(OS, GADN->getGlobal()); 5730 OS << '>'; 5731 if (offset > 0) 5732 OS << " + " << offset; 5733 else 5734 OS << " " << offset; 5735 if (unsigned int TF = GADN->getTargetFlags()) 5736 OS << " [TF=" << TF << ']'; 5737 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5738 OS << "<" << FIDN->getIndex() << ">"; 5739 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5740 OS << "<" << JTDN->getIndex() << ">"; 5741 if (unsigned int TF = JTDN->getTargetFlags()) 5742 OS << " [TF=" << TF << ']'; 5743 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5744 int offset = CP->getOffset(); 5745 if (CP->isMachineConstantPoolEntry()) 5746 OS << "<" << *CP->getMachineCPVal() << ">"; 5747 else 5748 OS << "<" << *CP->getConstVal() << ">"; 5749 if (offset > 0) 5750 OS << " + " << offset; 5751 else 5752 OS << " " << offset; 5753 if (unsigned int TF = CP->getTargetFlags()) 5754 OS << " [TF=" << TF << ']'; 5755 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5756 OS << "<"; 5757 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5758 if (LBB) 5759 OS << LBB->getName() << " "; 5760 OS << (const void*)BBDN->getBasicBlock() << ">"; 5761 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5762 if (G && R->getReg() && 5763 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5764 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5765 } else { 5766 OS << " #" << R->getReg(); 5767 } 5768 } else if (const ExternalSymbolSDNode *ES = 5769 dyn_cast<ExternalSymbolSDNode>(this)) { 5770 OS << "'" << ES->getSymbol() << "'"; 5771 if (unsigned int TF = ES->getTargetFlags()) 5772 OS << " [TF=" << TF << ']'; 5773 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5774 if (M->getValue()) 5775 OS << "<" << M->getValue() << ">"; 5776 else 5777 OS << "<null>"; 5778 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5779 OS << ":" << N->getVT().getEVTString(); 5780 } 5781 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5782 OS << " <" << *LD->getMemOperand(); 5783 5784 bool doExt = true; 5785 switch (LD->getExtensionType()) { 5786 default: doExt = false; break; 5787 case ISD::EXTLOAD: OS << ", anyext"; break; 5788 case ISD::SEXTLOAD: OS << ", sext"; break; 5789 case ISD::ZEXTLOAD: OS << ", zext"; break; 5790 } 5791 if (doExt) 5792 OS << " from " << LD->getMemoryVT().getEVTString(); 5793 5794 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5795 if (*AM) 5796 OS << ", " << AM; 5797 5798 OS << ">"; 5799 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5800 OS << " <" << *ST->getMemOperand(); 5801 5802 if (ST->isTruncatingStore()) 5803 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5804 5805 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5806 if (*AM) 5807 OS << ", " << AM; 5808 5809 OS << ">"; 5810 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5811 OS << " <" << *M->getMemOperand() << ">"; 5812 } 5813} 5814 5815void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5816 print_types(OS, G); 5817 OS << " "; 5818 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5819 if (i) OS << ", "; 5820 OS << (void*)getOperand(i).getNode(); 5821 if (unsigned RN = getOperand(i).getResNo()) 5822 OS << ":" << RN; 5823 } 5824 print_details(OS, G); 5825} 5826 5827static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5828 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5829 if (N->getOperand(i).getNode()->hasOneUse()) 5830 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5831 else 5832 errs() << "\n" << std::string(indent+2, ' ') 5833 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5834 5835 5836 errs() << "\n"; 5837 errs().indent(indent); 5838 N->dump(G); 5839} 5840 5841void SelectionDAG::dump() const { 5842 errs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5843 5844 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5845 I != E; ++I) { 5846 const SDNode *N = I; 5847 if (!N->hasOneUse() && N != getRoot().getNode()) 5848 DumpNodes(N, 2, this); 5849 } 5850 5851 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5852 5853 errs() << "\n\n"; 5854} 5855 5856void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 5857 print_types(OS, G); 5858 print_details(OS, G); 5859} 5860 5861typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 5862static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 5863 const SelectionDAG *G, VisitedSDNodeSet &once) { 5864 if (!once.insert(N)) // If we've been here before, return now. 5865 return; 5866 // Dump the current SDNode, but don't end the line yet. 5867 OS << std::string(indent, ' '); 5868 N->printr(OS, G); 5869 // Having printed this SDNode, walk the children: 5870 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5871 const SDNode *child = N->getOperand(i).getNode(); 5872 if (i) OS << ","; 5873 OS << " "; 5874 if (child->getNumOperands() == 0) { 5875 // This child has no grandchildren; print it inline right here. 5876 child->printr(OS, G); 5877 once.insert(child); 5878 } else { // Just the address. FIXME: also print the child's opcode 5879 OS << (void*)child; 5880 if (unsigned RN = N->getOperand(i).getResNo()) 5881 OS << ":" << RN; 5882 } 5883 } 5884 OS << "\n"; 5885 // Dump children that have grandchildren on their own line(s). 5886 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5887 const SDNode *child = N->getOperand(i).getNode(); 5888 DumpNodesr(OS, child, indent+2, G, once); 5889 } 5890} 5891 5892void SDNode::dumpr() const { 5893 VisitedSDNodeSet once; 5894 DumpNodesr(errs(), this, 0, 0, once); 5895} 5896 5897void SDNode::dumpr(const SelectionDAG *G) const { 5898 VisitedSDNodeSet once; 5899 DumpNodesr(errs(), this, 0, G, once); 5900} 5901 5902 5903// getAddressSpace - Return the address space this GlobalAddress belongs to. 5904unsigned GlobalAddressSDNode::getAddressSpace() const { 5905 return getGlobal()->getType()->getAddressSpace(); 5906} 5907 5908 5909const Type *ConstantPoolSDNode::getType() const { 5910 if (isMachineConstantPoolEntry()) 5911 return Val.MachineCPVal->getType(); 5912 return Val.ConstVal->getType(); 5913} 5914 5915bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 5916 APInt &SplatUndef, 5917 unsigned &SplatBitSize, 5918 bool &HasAnyUndefs, 5919 unsigned MinSplatBits) { 5920 EVT VT = getValueType(0); 5921 assert(VT.isVector() && "Expected a vector type"); 5922 unsigned sz = VT.getSizeInBits(); 5923 if (MinSplatBits > sz) 5924 return false; 5925 5926 SplatValue = APInt(sz, 0); 5927 SplatUndef = APInt(sz, 0); 5928 5929 // Get the bits. Bits with undefined values (when the corresponding element 5930 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 5931 // in SplatValue. If any of the values are not constant, give up and return 5932 // false. 5933 unsigned int nOps = getNumOperands(); 5934 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 5935 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 5936 for (unsigned i = 0; i < nOps; ++i) { 5937 SDValue OpVal = getOperand(i); 5938 unsigned BitPos = i * EltBitSize; 5939 5940 if (OpVal.getOpcode() == ISD::UNDEF) 5941 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos +EltBitSize); 5942 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 5943 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 5944 zextOrTrunc(sz) << BitPos); 5945 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 5946 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 5947 else 5948 return false; 5949 } 5950 5951 // The build_vector is all constants or undefs. Find the smallest element 5952 // size that splats the vector. 5953 5954 HasAnyUndefs = (SplatUndef != 0); 5955 while (sz > 8) { 5956 5957 unsigned HalfSize = sz / 2; 5958 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 5959 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 5960 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 5961 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 5962 5963 // If the two halves do not match (ignoring undef bits), stop here. 5964 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 5965 MinSplatBits > HalfSize) 5966 break; 5967 5968 SplatValue = HighValue | LowValue; 5969 SplatUndef = HighUndef & LowUndef; 5970 5971 sz = HalfSize; 5972 } 5973 5974 SplatBitSize = sz; 5975 return true; 5976} 5977 5978bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 5979 // Find the first non-undef value in the shuffle mask. 5980 unsigned i, e; 5981 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 5982 /* search */; 5983 5984 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 5985 5986 // Make sure all remaining elements are either undef or the same as the first 5987 // non-undef value. 5988 for (int Idx = Mask[i]; i != e; ++i) 5989 if (Mask[i] >= 0 && Mask[i] != Idx) 5990 return false; 5991 return true; 5992} 5993