SelectionDAG.cpp revision 20bd5296cec8d8d597ab9db2aca7346a88e580c8
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetSelectionDAGInfo.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Support/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BITCAST) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BITCAST) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 if (NumElems == 1) 201 return false; 202 for (unsigned i = 1; i < NumElems; ++i) { 203 SDValue V = N->getOperand(i); 204 if (V.getOpcode() != ISD::UNDEF) 205 return false; 206 } 207 return true; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: llvm_unreachable("Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309//===----------------------------------------------------------------------===// 310// SDNode Profile Support 311//===----------------------------------------------------------------------===// 312 313/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 314/// 315static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 316 ID.AddInteger(OpC); 317} 318 319/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 320/// solely with their pointer. 321static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 322 ID.AddPointer(VTList.VTs); 323} 324 325/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 326/// 327static void AddNodeIDOperands(FoldingSetNodeID &ID, 328 const SDValue *Ops, unsigned NumOps) { 329 for (; NumOps; --NumOps, ++Ops) { 330 ID.AddPointer(Ops->getNode()); 331 ID.AddInteger(Ops->getResNo()); 332 } 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDUse *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345static void AddNodeIDNode(FoldingSetNodeID &ID, 346 unsigned short OpC, SDVTList VTList, 347 const SDValue *OpList, unsigned N) { 348 AddNodeIDOpcode(ID, OpC); 349 AddNodeIDValueTypes(ID, VTList); 350 AddNodeIDOperands(ID, OpList, N); 351} 352 353/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 354/// the NodeID data. 355static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 356 switch (N->getOpcode()) { 357 case ISD::TargetExternalSymbol: 358 case ISD::ExternalSymbol: 359 llvm_unreachable("Should only be used on nodes with operands"); 360 default: break; // Normal nodes don't need extra info. 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 ID.AddInteger(GA->getTargetFlags()); 378 break; 379 } 380 case ISD::BasicBlock: 381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 382 break; 383 case ISD::Register: 384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 385 break; 386 case ISD::RegisterMask: 387 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 388 break; 389 case ISD::SRCVALUE: 390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 391 break; 392 case ISD::FrameIndex: 393 case ISD::TargetFrameIndex: 394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 395 break; 396 case ISD::JumpTable: 397 case ISD::TargetJumpTable: 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 400 break; 401 case ISD::ConstantPool: 402 case ISD::TargetConstantPool: { 403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 404 ID.AddInteger(CP->getAlignment()); 405 ID.AddInteger(CP->getOffset()); 406 if (CP->isMachineConstantPoolEntry()) 407 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 408 else 409 ID.AddPointer(CP->getConstVal()); 410 ID.AddInteger(CP->getTargetFlags()); 411 break; 412 } 413 case ISD::LOAD: { 414 const LoadSDNode *LD = cast<LoadSDNode>(N); 415 ID.AddInteger(LD->getMemoryVT().getRawBits()); 416 ID.AddInteger(LD->getRawSubclassData()); 417 break; 418 } 419 case ISD::STORE: { 420 const StoreSDNode *ST = cast<StoreSDNode>(N); 421 ID.AddInteger(ST->getMemoryVT().getRawBits()); 422 ID.AddInteger(ST->getRawSubclassData()); 423 break; 424 } 425 case ISD::ATOMIC_CMP_SWAP: 426 case ISD::ATOMIC_SWAP: 427 case ISD::ATOMIC_LOAD_ADD: 428 case ISD::ATOMIC_LOAD_SUB: 429 case ISD::ATOMIC_LOAD_AND: 430 case ISD::ATOMIC_LOAD_OR: 431 case ISD::ATOMIC_LOAD_XOR: 432 case ISD::ATOMIC_LOAD_NAND: 433 case ISD::ATOMIC_LOAD_MIN: 434 case ISD::ATOMIC_LOAD_MAX: 435 case ISD::ATOMIC_LOAD_UMIN: 436 case ISD::ATOMIC_LOAD_UMAX: 437 case ISD::ATOMIC_LOAD: 438 case ISD::ATOMIC_STORE: { 439 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 440 ID.AddInteger(AT->getMemoryVT().getRawBits()); 441 ID.AddInteger(AT->getRawSubclassData()); 442 break; 443 } 444 case ISD::VECTOR_SHUFFLE: { 445 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 446 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 447 i != e; ++i) 448 ID.AddInteger(SVN->getMaskElt(i)); 449 break; 450 } 451 case ISD::TargetBlockAddress: 452 case ISD::BlockAddress: { 453 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 454 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 455 break; 456 } 457 } // end switch (N->getOpcode()) 458} 459 460/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 461/// data. 462static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 463 AddNodeIDOpcode(ID, N->getOpcode()); 464 // Add the return value info. 465 AddNodeIDValueTypes(ID, N->getVTList()); 466 // Add the operand info. 467 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 468 469 // Handle SDNode leafs with special info. 470 AddNodeIDCustom(ID, N); 471} 472 473/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 474/// the CSE map that carries volatility, temporalness, indexing mode, and 475/// extension/truncation information. 476/// 477static inline unsigned 478encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 479 bool isNonTemporal, bool isInvariant) { 480 assert((ConvType & 3) == ConvType && 481 "ConvType may not require more than 2 bits!"); 482 assert((AM & 7) == AM && 483 "AM may not require more than 3 bits!"); 484 return ConvType | 485 (AM << 2) | 486 (isVolatile << 5) | 487 (isNonTemporal << 6) | 488 (isInvariant << 7); 489} 490 491//===----------------------------------------------------------------------===// 492// SelectionDAG Class 493//===----------------------------------------------------------------------===// 494 495/// doNotCSE - Return true if CSE should not be performed for this node. 496static bool doNotCSE(SDNode *N) { 497 if (N->getValueType(0) == MVT::Glue) 498 return true; // Never CSE anything that produces a flag. 499 500 switch (N->getOpcode()) { 501 default: break; 502 case ISD::HANDLENODE: 503 case ISD::EH_LABEL: 504 return true; // Never CSE these nodes. 505 } 506 507 // Check that remaining values produced are not flags. 508 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 509 if (N->getValueType(i) == MVT::Glue) 510 return true; // Never CSE anything that produces a flag. 511 512 return false; 513} 514 515/// RemoveDeadNodes - This method deletes all unreachable nodes in the 516/// SelectionDAG. 517void SelectionDAG::RemoveDeadNodes() { 518 // Create a dummy node (which is not added to allnodes), that adds a reference 519 // to the root node, preventing it from being deleted. 520 HandleSDNode Dummy(getRoot()); 521 522 SmallVector<SDNode*, 128> DeadNodes; 523 524 // Add all obviously-dead nodes to the DeadNodes worklist. 525 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 526 if (I->use_empty()) 527 DeadNodes.push_back(I); 528 529 RemoveDeadNodes(DeadNodes); 530 531 // If the root changed (e.g. it was a dead load, update the root). 532 setRoot(Dummy.getValue()); 533} 534 535/// RemoveDeadNodes - This method deletes the unreachable nodes in the 536/// given list, and any nodes that become unreachable as a result. 537void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 538 DAGUpdateListener *UpdateListener) { 539 540 // Process the worklist, deleting the nodes and adding their uses to the 541 // worklist. 542 while (!DeadNodes.empty()) { 543 SDNode *N = DeadNodes.pop_back_val(); 544 545 if (UpdateListener) 546 UpdateListener->NodeDeleted(N, 0); 547 548 // Take the node out of the appropriate CSE map. 549 RemoveNodeFromCSEMaps(N); 550 551 // Next, brutally remove the operand list. This is safe to do, as there are 552 // no cycles in the graph. 553 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 554 SDUse &Use = *I++; 555 SDNode *Operand = Use.getNode(); 556 Use.set(SDValue()); 557 558 // Now that we removed this operand, see if there are no uses of it left. 559 if (Operand->use_empty()) 560 DeadNodes.push_back(Operand); 561 } 562 563 DeallocateNode(N); 564 } 565} 566 567void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 568 SmallVector<SDNode*, 16> DeadNodes(1, N); 569 570 // Create a dummy node that adds a reference to the root node, preventing 571 // it from being deleted. (This matters if the root is an operand of the 572 // dead node.) 573 HandleSDNode Dummy(getRoot()); 574 575 RemoveDeadNodes(DeadNodes, UpdateListener); 576} 577 578void SelectionDAG::DeleteNode(SDNode *N) { 579 // First take this out of the appropriate CSE map. 580 RemoveNodeFromCSEMaps(N); 581 582 // Finally, remove uses due to operands of this node, remove from the 583 // AllNodes list, and delete the node. 584 DeleteNodeNotInCSEMaps(N); 585} 586 587void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 588 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 589 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 590 591 // Drop all of the operands and decrement used node's use counts. 592 N->DropOperands(); 593 594 DeallocateNode(N); 595} 596 597void SelectionDAG::DeallocateNode(SDNode *N) { 598 if (N->OperandsNeedDelete) 599 delete[] N->OperandList; 600 601 // Set the opcode to DELETED_NODE to help catch bugs when node 602 // memory is reallocated. 603 N->NodeType = ISD::DELETED_NODE; 604 605 NodeAllocator.Deallocate(AllNodes.remove(N)); 606 607 // Remove the ordering of this node. 608 Ordering->remove(N); 609 610 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 611 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 612 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 613 DbgVals[i]->setIsInvalidated(); 614} 615 616/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 617/// correspond to it. This is useful when we're about to delete or repurpose 618/// the node. We don't want future request for structurally identical nodes 619/// to return N anymore. 620bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 621 bool Erased = false; 622 switch (N->getOpcode()) { 623 case ISD::HANDLENODE: return false; // noop. 624 case ISD::CONDCODE: 625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 626 "Cond code doesn't exist!"); 627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 629 break; 630 case ISD::ExternalSymbol: 631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 632 break; 633 case ISD::TargetExternalSymbol: { 634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 635 Erased = TargetExternalSymbols.erase( 636 std::pair<std::string,unsigned char>(ESN->getSymbol(), 637 ESN->getTargetFlags())); 638 break; 639 } 640 case ISD::VALUETYPE: { 641 EVT VT = cast<VTSDNode>(N)->getVT(); 642 if (VT.isExtended()) { 643 Erased = ExtendedValueTypeNodes.erase(VT); 644 } else { 645 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 646 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 647 } 648 break; 649 } 650 default: 651 // Remove it from the CSE Map. 652 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 653 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 654 Erased = CSEMap.RemoveNode(N); 655 break; 656 } 657#ifndef NDEBUG 658 // Verify that the node was actually in one of the CSE maps, unless it has a 659 // flag result (which cannot be CSE'd) or is one of the special cases that are 660 // not subject to CSE. 661 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 662 !N->isMachineOpcode() && !doNotCSE(N)) { 663 N->dump(this); 664 dbgs() << "\n"; 665 llvm_unreachable("Node is not in map!"); 666 } 667#endif 668 return Erased; 669} 670 671/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 672/// maps and modified in place. Add it back to the CSE maps, unless an identical 673/// node already exists, in which case transfer all its users to the existing 674/// node. This transfer can potentially trigger recursive merging. 675/// 676void 677SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 678 DAGUpdateListener *UpdateListener) { 679 // For node types that aren't CSE'd, just act as if no identical node 680 // already exists. 681 if (!doNotCSE(N)) { 682 SDNode *Existing = CSEMap.GetOrInsertNode(N); 683 if (Existing != N) { 684 // If there was already an existing matching node, use ReplaceAllUsesWith 685 // to replace the dead one with the existing one. This can cause 686 // recursive merging of other unrelated nodes down the line. 687 ReplaceAllUsesWith(N, Existing, UpdateListener); 688 689 // N is now dead. Inform the listener if it exists and delete it. 690 if (UpdateListener) 691 UpdateListener->NodeDeleted(N, Existing); 692 DeleteNodeNotInCSEMaps(N); 693 return; 694 } 695 } 696 697 // If the node doesn't already exist, we updated it. Inform a listener if 698 // it exists. 699 if (UpdateListener) 700 UpdateListener->NodeUpdated(N); 701} 702 703/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 704/// were replaced with those specified. If this node is never memoized, 705/// return null, otherwise return a pointer to the slot it would take. If a 706/// node already exists with these operands, the slot will be non-null. 707SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 708 void *&InsertPos) { 709 if (doNotCSE(N)) 710 return 0; 711 712 SDValue Ops[] = { Op }; 713 FoldingSetNodeID ID; 714 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 715 AddNodeIDCustom(ID, N); 716 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 717 return Node; 718} 719 720/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 721/// were replaced with those specified. If this node is never memoized, 722/// return null, otherwise return a pointer to the slot it would take. If a 723/// node already exists with these operands, the slot will be non-null. 724SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 725 SDValue Op1, SDValue Op2, 726 void *&InsertPos) { 727 if (doNotCSE(N)) 728 return 0; 729 730 SDValue Ops[] = { Op1, Op2 }; 731 FoldingSetNodeID ID; 732 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 733 AddNodeIDCustom(ID, N); 734 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 735 return Node; 736} 737 738 739/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 740/// were replaced with those specified. If this node is never memoized, 741/// return null, otherwise return a pointer to the slot it would take. If a 742/// node already exists with these operands, the slot will be non-null. 743SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 744 const SDValue *Ops,unsigned NumOps, 745 void *&InsertPos) { 746 if (doNotCSE(N)) 747 return 0; 748 749 FoldingSetNodeID ID; 750 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 751 AddNodeIDCustom(ID, N); 752 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 753 return Node; 754} 755 756#ifndef NDEBUG 757/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 758static void VerifyNodeCommon(SDNode *N) { 759 switch (N->getOpcode()) { 760 default: 761 break; 762 case ISD::BUILD_PAIR: { 763 EVT VT = N->getValueType(0); 764 assert(N->getNumValues() == 1 && "Too many results!"); 765 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 766 "Wrong return type!"); 767 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 768 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 769 "Mismatched operand types!"); 770 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 771 "Wrong operand type!"); 772 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 773 "Wrong return type size"); 774 break; 775 } 776 case ISD::BUILD_VECTOR: { 777 assert(N->getNumValues() == 1 && "Too many results!"); 778 assert(N->getValueType(0).isVector() && "Wrong return type!"); 779 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 780 "Wrong number of operands!"); 781 EVT EltVT = N->getValueType(0).getVectorElementType(); 782 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 783 assert((I->getValueType() == EltVT || 784 (EltVT.isInteger() && I->getValueType().isInteger() && 785 EltVT.bitsLE(I->getValueType()))) && 786 "Wrong operand type!"); 787 assert(I->getValueType() == N->getOperand(0).getValueType() && 788 "Operands must all have the same type"); 789 } 790 break; 791 } 792 } 793} 794 795/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 796static void VerifySDNode(SDNode *N) { 797 // The SDNode allocators cannot be used to allocate nodes with fields that are 798 // not present in an SDNode! 799 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 800 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 801 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 802 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 803 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 804 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 805 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 806 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 807 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 808 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 809 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 810 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 811 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 812 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 813 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 814 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 815 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 816 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 817 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 818 819 VerifyNodeCommon(N); 820} 821 822/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 823/// invalid. 824static void VerifyMachineNode(SDNode *N) { 825 // The MachineNode allocators cannot be used to allocate nodes with fields 826 // that are not present in a MachineNode! 827 // Currently there are no such nodes. 828 829 VerifyNodeCommon(N); 830} 831#endif // NDEBUG 832 833/// getEVTAlignment - Compute the default alignment value for the 834/// given type. 835/// 836unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 837 Type *Ty = VT == MVT::iPTR ? 838 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 839 VT.getTypeForEVT(*getContext()); 840 841 return TLI.getTargetData()->getABITypeAlignment(Ty); 842} 843 844// EntryNode could meaningfully have debug info if we can find it... 845SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 846 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 847 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 848 Root(getEntryNode()), Ordering(0) { 849 AllNodes.push_back(&EntryNode); 850 Ordering = new SDNodeOrdering(); 851 DbgInfo = new SDDbgInfo(); 852} 853 854void SelectionDAG::init(MachineFunction &mf) { 855 MF = &mf; 856 Context = &mf.getFunction()->getContext(); 857} 858 859SelectionDAG::~SelectionDAG() { 860 allnodes_clear(); 861 delete Ordering; 862 delete DbgInfo; 863} 864 865void SelectionDAG::allnodes_clear() { 866 assert(&*AllNodes.begin() == &EntryNode); 867 AllNodes.remove(AllNodes.begin()); 868 while (!AllNodes.empty()) 869 DeallocateNode(AllNodes.begin()); 870} 871 872void SelectionDAG::clear() { 873 allnodes_clear(); 874 OperandAllocator.Reset(); 875 CSEMap.clear(); 876 877 ExtendedValueTypeNodes.clear(); 878 ExternalSymbols.clear(); 879 TargetExternalSymbols.clear(); 880 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 881 static_cast<CondCodeSDNode*>(0)); 882 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 883 static_cast<SDNode*>(0)); 884 885 EntryNode.UseList = 0; 886 AllNodes.push_back(&EntryNode); 887 Root = getEntryNode(); 888 Ordering->clear(); 889 DbgInfo->clear(); 890} 891 892SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 893 return VT.bitsGT(Op.getValueType()) ? 894 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 895 getNode(ISD::TRUNCATE, DL, VT, Op); 896} 897 898SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 899 return VT.bitsGT(Op.getValueType()) ? 900 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 901 getNode(ISD::TRUNCATE, DL, VT, Op); 902} 903 904SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 905 return VT.bitsGT(Op.getValueType()) ? 906 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 907 getNode(ISD::TRUNCATE, DL, VT, Op); 908} 909 910SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 911 assert(!VT.isVector() && 912 "getZeroExtendInReg should use the vector element type instead of " 913 "the vector type!"); 914 if (Op.getValueType() == VT) return Op; 915 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 916 APInt Imm = APInt::getLowBitsSet(BitWidth, 917 VT.getSizeInBits()); 918 return getNode(ISD::AND, DL, Op.getValueType(), Op, 919 getConstant(Imm, Op.getValueType())); 920} 921 922/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 923/// 924SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 925 EVT EltVT = VT.getScalarType(); 926 SDValue NegOne = 927 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 928 return getNode(ISD::XOR, DL, VT, Val, NegOne); 929} 930 931SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 932 EVT EltVT = VT.getScalarType(); 933 assert((EltVT.getSizeInBits() >= 64 || 934 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 935 "getConstant with a uint64_t value that doesn't fit in the type!"); 936 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 937} 938 939SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 940 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 941} 942 943SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 944 assert(VT.isInteger() && "Cannot create FP integer constant!"); 945 946 EVT EltVT = VT.getScalarType(); 947 const ConstantInt *Elt = &Val; 948 949 // In some cases the vector type is legal but the element type is illegal and 950 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 951 // inserted value (the type does not need to match the vector element type). 952 // Any extra bits introduced will be truncated away. 953 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 954 TargetLowering::TypePromoteInteger) { 955 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 956 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 957 Elt = ConstantInt::get(*getContext(), NewVal); 958 } 959 960 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 961 "APInt size does not match type size!"); 962 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 963 FoldingSetNodeID ID; 964 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 965 ID.AddPointer(Elt); 966 void *IP = 0; 967 SDNode *N = NULL; 968 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 969 if (!VT.isVector()) 970 return SDValue(N, 0); 971 972 if (!N) { 973 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 974 CSEMap.InsertNode(N, IP); 975 AllNodes.push_back(N); 976 } 977 978 SDValue Result(N, 0); 979 if (VT.isVector()) { 980 SmallVector<SDValue, 8> Ops; 981 Ops.assign(VT.getVectorNumElements(), Result); 982 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 983 } 984 return Result; 985} 986 987SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 988 return getConstant(Val, TLI.getPointerTy(), isTarget); 989} 990 991 992SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 993 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 994} 995 996SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 997 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 998 999 EVT EltVT = VT.getScalarType(); 1000 1001 // Do the map lookup using the actual bit pattern for the floating point 1002 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1003 // we don't have issues with SNANs. 1004 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1005 FoldingSetNodeID ID; 1006 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1007 ID.AddPointer(&V); 1008 void *IP = 0; 1009 SDNode *N = NULL; 1010 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1011 if (!VT.isVector()) 1012 return SDValue(N, 0); 1013 1014 if (!N) { 1015 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1016 CSEMap.InsertNode(N, IP); 1017 AllNodes.push_back(N); 1018 } 1019 1020 SDValue Result(N, 0); 1021 if (VT.isVector()) { 1022 SmallVector<SDValue, 8> Ops; 1023 Ops.assign(VT.getVectorNumElements(), Result); 1024 // FIXME DebugLoc info might be appropriate here 1025 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1026 } 1027 return Result; 1028} 1029 1030SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1031 EVT EltVT = VT.getScalarType(); 1032 if (EltVT==MVT::f32) 1033 return getConstantFP(APFloat((float)Val), VT, isTarget); 1034 else if (EltVT==MVT::f64) 1035 return getConstantFP(APFloat(Val), VT, isTarget); 1036 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1037 bool ignored; 1038 APFloat apf = APFloat(Val); 1039 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1040 &ignored); 1041 return getConstantFP(apf, VT, isTarget); 1042 } else 1043 llvm_unreachable("Unsupported type in getConstantFP"); 1044} 1045 1046SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1047 EVT VT, int64_t Offset, 1048 bool isTargetGA, 1049 unsigned char TargetFlags) { 1050 assert((TargetFlags == 0 || isTargetGA) && 1051 "Cannot set target flags on target-independent globals"); 1052 1053 // Truncate (with sign-extension) the offset value to the pointer size. 1054 EVT PTy = TLI.getPointerTy(); 1055 unsigned BitWidth = PTy.getSizeInBits(); 1056 if (BitWidth < 64) 1057 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1058 1059 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1060 if (!GVar) { 1061 // If GV is an alias then use the aliasee for determining thread-localness. 1062 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1063 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1064 } 1065 1066 unsigned Opc; 1067 if (GVar && GVar->isThreadLocal()) 1068 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1069 else 1070 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1071 1072 FoldingSetNodeID ID; 1073 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1074 ID.AddPointer(GV); 1075 ID.AddInteger(Offset); 1076 ID.AddInteger(TargetFlags); 1077 void *IP = 0; 1078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1079 return SDValue(E, 0); 1080 1081 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1082 Offset, TargetFlags); 1083 CSEMap.InsertNode(N, IP); 1084 AllNodes.push_back(N); 1085 return SDValue(N, 0); 1086} 1087 1088SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1089 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1090 FoldingSetNodeID ID; 1091 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1092 ID.AddInteger(FI); 1093 void *IP = 0; 1094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1095 return SDValue(E, 0); 1096 1097 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1098 CSEMap.InsertNode(N, IP); 1099 AllNodes.push_back(N); 1100 return SDValue(N, 0); 1101} 1102 1103SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1104 unsigned char TargetFlags) { 1105 assert((TargetFlags == 0 || isTarget) && 1106 "Cannot set target flags on target-independent jump tables"); 1107 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1108 FoldingSetNodeID ID; 1109 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1110 ID.AddInteger(JTI); 1111 ID.AddInteger(TargetFlags); 1112 void *IP = 0; 1113 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1114 return SDValue(E, 0); 1115 1116 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1117 TargetFlags); 1118 CSEMap.InsertNode(N, IP); 1119 AllNodes.push_back(N); 1120 return SDValue(N, 0); 1121} 1122 1123SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1124 unsigned Alignment, int Offset, 1125 bool isTarget, 1126 unsigned char TargetFlags) { 1127 assert((TargetFlags == 0 || isTarget) && 1128 "Cannot set target flags on target-independent globals"); 1129 if (Alignment == 0) 1130 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1131 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1132 FoldingSetNodeID ID; 1133 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1134 ID.AddInteger(Alignment); 1135 ID.AddInteger(Offset); 1136 ID.AddPointer(C); 1137 ID.AddInteger(TargetFlags); 1138 void *IP = 0; 1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1140 return SDValue(E, 0); 1141 1142 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1143 Alignment, TargetFlags); 1144 CSEMap.InsertNode(N, IP); 1145 AllNodes.push_back(N); 1146 return SDValue(N, 0); 1147} 1148 1149 1150SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1151 unsigned Alignment, int Offset, 1152 bool isTarget, 1153 unsigned char TargetFlags) { 1154 assert((TargetFlags == 0 || isTarget) && 1155 "Cannot set target flags on target-independent globals"); 1156 if (Alignment == 0) 1157 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1158 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1159 FoldingSetNodeID ID; 1160 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1161 ID.AddInteger(Alignment); 1162 ID.AddInteger(Offset); 1163 C->addSelectionDAGCSEId(ID); 1164 ID.AddInteger(TargetFlags); 1165 void *IP = 0; 1166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1167 return SDValue(E, 0); 1168 1169 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1170 Alignment, TargetFlags); 1171 CSEMap.InsertNode(N, IP); 1172 AllNodes.push_back(N); 1173 return SDValue(N, 0); 1174} 1175 1176SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1177 FoldingSetNodeID ID; 1178 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1179 ID.AddPointer(MBB); 1180 void *IP = 0; 1181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1182 return SDValue(E, 0); 1183 1184 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1185 CSEMap.InsertNode(N, IP); 1186 AllNodes.push_back(N); 1187 return SDValue(N, 0); 1188} 1189 1190SDValue SelectionDAG::getValueType(EVT VT) { 1191 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1192 ValueTypeNodes.size()) 1193 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1194 1195 SDNode *&N = VT.isExtended() ? 1196 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1197 1198 if (N) return SDValue(N, 0); 1199 N = new (NodeAllocator) VTSDNode(VT); 1200 AllNodes.push_back(N); 1201 return SDValue(N, 0); 1202} 1203 1204SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1205 SDNode *&N = ExternalSymbols[Sym]; 1206 if (N) return SDValue(N, 0); 1207 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1208 AllNodes.push_back(N); 1209 return SDValue(N, 0); 1210} 1211 1212SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1213 unsigned char TargetFlags) { 1214 SDNode *&N = 1215 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1216 TargetFlags)]; 1217 if (N) return SDValue(N, 0); 1218 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1219 AllNodes.push_back(N); 1220 return SDValue(N, 0); 1221} 1222 1223SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1224 if ((unsigned)Cond >= CondCodeNodes.size()) 1225 CondCodeNodes.resize(Cond+1); 1226 1227 if (CondCodeNodes[Cond] == 0) { 1228 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1229 CondCodeNodes[Cond] = N; 1230 AllNodes.push_back(N); 1231 } 1232 1233 return SDValue(CondCodeNodes[Cond], 0); 1234} 1235 1236// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1237// the shuffle mask M that point at N1 to point at N2, and indices that point 1238// N2 to point at N1. 1239static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1240 std::swap(N1, N2); 1241 int NElts = M.size(); 1242 for (int i = 0; i != NElts; ++i) { 1243 if (M[i] >= NElts) 1244 M[i] -= NElts; 1245 else if (M[i] >= 0) 1246 M[i] += NElts; 1247 } 1248} 1249 1250SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1251 SDValue N2, const int *Mask) { 1252 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1253 assert(VT.isVector() && N1.getValueType().isVector() && 1254 "Vector Shuffle VTs must be a vectors"); 1255 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1256 && "Vector Shuffle VTs must have same element type"); 1257 1258 // Canonicalize shuffle undef, undef -> undef 1259 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1260 return getUNDEF(VT); 1261 1262 // Validate that all indices in Mask are within the range of the elements 1263 // input to the shuffle. 1264 unsigned NElts = VT.getVectorNumElements(); 1265 SmallVector<int, 8> MaskVec; 1266 for (unsigned i = 0; i != NElts; ++i) { 1267 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1268 MaskVec.push_back(Mask[i]); 1269 } 1270 1271 // Canonicalize shuffle v, v -> v, undef 1272 if (N1 == N2) { 1273 N2 = getUNDEF(VT); 1274 for (unsigned i = 0; i != NElts; ++i) 1275 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1276 } 1277 1278 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1279 if (N1.getOpcode() == ISD::UNDEF) 1280 commuteShuffle(N1, N2, MaskVec); 1281 1282 // Canonicalize all index into lhs, -> shuffle lhs, undef 1283 // Canonicalize all index into rhs, -> shuffle rhs, undef 1284 bool AllLHS = true, AllRHS = true; 1285 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1286 for (unsigned i = 0; i != NElts; ++i) { 1287 if (MaskVec[i] >= (int)NElts) { 1288 if (N2Undef) 1289 MaskVec[i] = -1; 1290 else 1291 AllLHS = false; 1292 } else if (MaskVec[i] >= 0) { 1293 AllRHS = false; 1294 } 1295 } 1296 if (AllLHS && AllRHS) 1297 return getUNDEF(VT); 1298 if (AllLHS && !N2Undef) 1299 N2 = getUNDEF(VT); 1300 if (AllRHS) { 1301 N1 = getUNDEF(VT); 1302 commuteShuffle(N1, N2, MaskVec); 1303 } 1304 1305 // If Identity shuffle, or all shuffle in to undef, return that node. 1306 bool AllUndef = true; 1307 bool Identity = true; 1308 for (unsigned i = 0; i != NElts; ++i) { 1309 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1310 if (MaskVec[i] >= 0) AllUndef = false; 1311 } 1312 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1313 return N1; 1314 if (AllUndef) 1315 return getUNDEF(VT); 1316 1317 FoldingSetNodeID ID; 1318 SDValue Ops[2] = { N1, N2 }; 1319 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1320 for (unsigned i = 0; i != NElts; ++i) 1321 ID.AddInteger(MaskVec[i]); 1322 1323 void* IP = 0; 1324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1325 return SDValue(E, 0); 1326 1327 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1328 // SDNode doesn't have access to it. This memory will be "leaked" when 1329 // the node is deallocated, but recovered when the NodeAllocator is released. 1330 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1331 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1332 1333 ShuffleVectorSDNode *N = 1334 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1335 CSEMap.InsertNode(N, IP); 1336 AllNodes.push_back(N); 1337 return SDValue(N, 0); 1338} 1339 1340SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1341 SDValue Val, SDValue DTy, 1342 SDValue STy, SDValue Rnd, SDValue Sat, 1343 ISD::CvtCode Code) { 1344 // If the src and dest types are the same and the conversion is between 1345 // integer types of the same sign or two floats, no conversion is necessary. 1346 if (DTy == STy && 1347 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1348 return Val; 1349 1350 FoldingSetNodeID ID; 1351 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1352 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1353 void* IP = 0; 1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1355 return SDValue(E, 0); 1356 1357 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1358 Code); 1359 CSEMap.InsertNode(N, IP); 1360 AllNodes.push_back(N); 1361 return SDValue(N, 0); 1362} 1363 1364SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1365 FoldingSetNodeID ID; 1366 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1367 ID.AddInteger(RegNo); 1368 void *IP = 0; 1369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1370 return SDValue(E, 0); 1371 1372 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1373 CSEMap.InsertNode(N, IP); 1374 AllNodes.push_back(N); 1375 return SDValue(N, 0); 1376} 1377 1378SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1379 FoldingSetNodeID ID; 1380 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1381 ID.AddPointer(RegMask); 1382 void *IP = 0; 1383 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1384 return SDValue(E, 0); 1385 1386 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1387 CSEMap.InsertNode(N, IP); 1388 AllNodes.push_back(N); 1389 return SDValue(N, 0); 1390} 1391 1392SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1393 FoldingSetNodeID ID; 1394 SDValue Ops[] = { Root }; 1395 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1396 ID.AddPointer(Label); 1397 void *IP = 0; 1398 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1399 return SDValue(E, 0); 1400 1401 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1402 CSEMap.InsertNode(N, IP); 1403 AllNodes.push_back(N); 1404 return SDValue(N, 0); 1405} 1406 1407 1408SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1409 bool isTarget, 1410 unsigned char TargetFlags) { 1411 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1412 1413 FoldingSetNodeID ID; 1414 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1415 ID.AddPointer(BA); 1416 ID.AddInteger(TargetFlags); 1417 void *IP = 0; 1418 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1419 return SDValue(E, 0); 1420 1421 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1422 CSEMap.InsertNode(N, IP); 1423 AllNodes.push_back(N); 1424 return SDValue(N, 0); 1425} 1426 1427SDValue SelectionDAG::getSrcValue(const Value *V) { 1428 assert((!V || V->getType()->isPointerTy()) && 1429 "SrcValue is not a pointer?"); 1430 1431 FoldingSetNodeID ID; 1432 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1433 ID.AddPointer(V); 1434 1435 void *IP = 0; 1436 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1437 return SDValue(E, 0); 1438 1439 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1440 CSEMap.InsertNode(N, IP); 1441 AllNodes.push_back(N); 1442 return SDValue(N, 0); 1443} 1444 1445/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1446SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1447 FoldingSetNodeID ID; 1448 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1449 ID.AddPointer(MD); 1450 1451 void *IP = 0; 1452 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1453 return SDValue(E, 0); 1454 1455 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1456 CSEMap.InsertNode(N, IP); 1457 AllNodes.push_back(N); 1458 return SDValue(N, 0); 1459} 1460 1461 1462/// getShiftAmountOperand - Return the specified value casted to 1463/// the target's desired shift amount type. 1464SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1465 EVT OpTy = Op.getValueType(); 1466 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1467 if (OpTy == ShTy || OpTy.isVector()) return Op; 1468 1469 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1470 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1471} 1472 1473/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1474/// specified value type. 1475SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1476 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1477 unsigned ByteSize = VT.getStoreSize(); 1478 Type *Ty = VT.getTypeForEVT(*getContext()); 1479 unsigned StackAlign = 1480 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1481 1482 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1483 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1484} 1485 1486/// CreateStackTemporary - Create a stack temporary suitable for holding 1487/// either of the specified value types. 1488SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1489 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1490 VT2.getStoreSizeInBits())/8; 1491 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1492 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1493 const TargetData *TD = TLI.getTargetData(); 1494 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1495 TD->getPrefTypeAlignment(Ty2)); 1496 1497 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1498 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1499 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1500} 1501 1502SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1503 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1504 // These setcc operations always fold. 1505 switch (Cond) { 1506 default: break; 1507 case ISD::SETFALSE: 1508 case ISD::SETFALSE2: return getConstant(0, VT); 1509 case ISD::SETTRUE: 1510 case ISD::SETTRUE2: return getConstant(1, VT); 1511 1512 case ISD::SETOEQ: 1513 case ISD::SETOGT: 1514 case ISD::SETOGE: 1515 case ISD::SETOLT: 1516 case ISD::SETOLE: 1517 case ISD::SETONE: 1518 case ISD::SETO: 1519 case ISD::SETUO: 1520 case ISD::SETUEQ: 1521 case ISD::SETUNE: 1522 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1523 break; 1524 } 1525 1526 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1527 const APInt &C2 = N2C->getAPIntValue(); 1528 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1529 const APInt &C1 = N1C->getAPIntValue(); 1530 1531 switch (Cond) { 1532 default: llvm_unreachable("Unknown integer setcc!"); 1533 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1534 case ISD::SETNE: return getConstant(C1 != C2, VT); 1535 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1536 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1537 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1538 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1539 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1540 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1541 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1542 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1543 } 1544 } 1545 } 1546 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1547 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1548 // No compile time operations on this type yet. 1549 if (N1C->getValueType(0) == MVT::ppcf128) 1550 return SDValue(); 1551 1552 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1553 switch (Cond) { 1554 default: break; 1555 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1556 return getUNDEF(VT); 1557 // fall through 1558 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1559 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1560 return getUNDEF(VT); 1561 // fall through 1562 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1563 R==APFloat::cmpLessThan, VT); 1564 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1565 return getUNDEF(VT); 1566 // fall through 1567 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1568 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1569 return getUNDEF(VT); 1570 // fall through 1571 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1572 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1573 return getUNDEF(VT); 1574 // fall through 1575 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1576 R==APFloat::cmpEqual, VT); 1577 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1578 return getUNDEF(VT); 1579 // fall through 1580 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1581 R==APFloat::cmpEqual, VT); 1582 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1583 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1584 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1585 R==APFloat::cmpEqual, VT); 1586 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1587 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1588 R==APFloat::cmpLessThan, VT); 1589 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1590 R==APFloat::cmpUnordered, VT); 1591 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1592 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1593 } 1594 } else { 1595 // Ensure that the constant occurs on the RHS. 1596 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1597 } 1598 } 1599 1600 // Could not fold it. 1601 return SDValue(); 1602} 1603 1604/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1605/// use this predicate to simplify operations downstream. 1606bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1607 // This predicate is not safe for vector operations. 1608 if (Op.getValueType().isVector()) 1609 return false; 1610 1611 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1612 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1613} 1614 1615/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1616/// this predicate to simplify operations downstream. Mask is known to be zero 1617/// for bits that V cannot have. 1618bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1619 unsigned Depth) const { 1620 APInt KnownZero, KnownOne; 1621 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1622 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1623 return (KnownZero & Mask) == Mask; 1624} 1625 1626/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1627/// known to be either zero or one and return them in the KnownZero/KnownOne 1628/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1629/// processing. 1630void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1631 APInt &KnownZero, APInt &KnownOne, 1632 unsigned Depth) const { 1633 unsigned BitWidth = Mask.getBitWidth(); 1634 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1635 "Mask size mismatches value type size!"); 1636 1637 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1638 if (Depth == 6 || Mask == 0) 1639 return; // Limit search depth. 1640 1641 APInt KnownZero2, KnownOne2; 1642 1643 switch (Op.getOpcode()) { 1644 case ISD::Constant: 1645 // We know all of the bits for a constant! 1646 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1647 KnownZero = ~KnownOne & Mask; 1648 return; 1649 case ISD::AND: 1650 // If either the LHS or the RHS are Zero, the result is zero. 1651 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1652 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1653 KnownZero2, KnownOne2, Depth+1); 1654 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1655 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1656 1657 // Output known-1 bits are only known if set in both the LHS & RHS. 1658 KnownOne &= KnownOne2; 1659 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1660 KnownZero |= KnownZero2; 1661 return; 1662 case ISD::OR: 1663 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1664 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1665 KnownZero2, KnownOne2, Depth+1); 1666 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1667 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1668 1669 // Output known-0 bits are only known if clear in both the LHS & RHS. 1670 KnownZero &= KnownZero2; 1671 // Output known-1 are known to be set if set in either the LHS | RHS. 1672 KnownOne |= KnownOne2; 1673 return; 1674 case ISD::XOR: { 1675 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1676 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1677 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1678 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1679 1680 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1681 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1682 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1683 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1684 KnownZero = KnownZeroOut; 1685 return; 1686 } 1687 case ISD::MUL: { 1688 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1689 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1690 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1691 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1692 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1693 1694 // If low bits are zero in either operand, output low known-0 bits. 1695 // Also compute a conserative estimate for high known-0 bits. 1696 // More trickiness is possible, but this is sufficient for the 1697 // interesting case of alignment computation. 1698 KnownOne.clearAllBits(); 1699 unsigned TrailZ = KnownZero.countTrailingOnes() + 1700 KnownZero2.countTrailingOnes(); 1701 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1702 KnownZero2.countLeadingOnes(), 1703 BitWidth) - BitWidth; 1704 1705 TrailZ = std::min(TrailZ, BitWidth); 1706 LeadZ = std::min(LeadZ, BitWidth); 1707 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1708 APInt::getHighBitsSet(BitWidth, LeadZ); 1709 KnownZero &= Mask; 1710 return; 1711 } 1712 case ISD::UDIV: { 1713 // For the purposes of computing leading zeros we can conservatively 1714 // treat a udiv as a logical right shift by the power of 2 known to 1715 // be less than the denominator. 1716 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1717 ComputeMaskedBits(Op.getOperand(0), 1718 AllOnes, KnownZero2, KnownOne2, Depth+1); 1719 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1720 1721 KnownOne2.clearAllBits(); 1722 KnownZero2.clearAllBits(); 1723 ComputeMaskedBits(Op.getOperand(1), 1724 AllOnes, KnownZero2, KnownOne2, Depth+1); 1725 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1726 if (RHSUnknownLeadingOnes != BitWidth) 1727 LeadZ = std::min(BitWidth, 1728 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1729 1730 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1731 return; 1732 } 1733 case ISD::SELECT: 1734 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1735 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1738 1739 // Only known if known in both the LHS and RHS. 1740 KnownOne &= KnownOne2; 1741 KnownZero &= KnownZero2; 1742 return; 1743 case ISD::SELECT_CC: 1744 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1745 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1746 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1747 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1748 1749 // Only known if known in both the LHS and RHS. 1750 KnownOne &= KnownOne2; 1751 KnownZero &= KnownZero2; 1752 return; 1753 case ISD::SADDO: 1754 case ISD::UADDO: 1755 case ISD::SSUBO: 1756 case ISD::USUBO: 1757 case ISD::SMULO: 1758 case ISD::UMULO: 1759 if (Op.getResNo() != 1) 1760 return; 1761 // The boolean result conforms to getBooleanContents. Fall through. 1762 case ISD::SETCC: 1763 // If we know the result of a setcc has the top bits zero, use this info. 1764 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1765 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1766 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1767 return; 1768 case ISD::SHL: 1769 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1770 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1771 unsigned ShAmt = SA->getZExtValue(); 1772 1773 // If the shift count is an invalid immediate, don't do anything. 1774 if (ShAmt >= BitWidth) 1775 return; 1776 1777 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1778 KnownZero, KnownOne, Depth+1); 1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1780 KnownZero <<= ShAmt; 1781 KnownOne <<= ShAmt; 1782 // low bits known zero. 1783 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1784 } 1785 return; 1786 case ISD::SRL: 1787 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1788 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1789 unsigned ShAmt = SA->getZExtValue(); 1790 1791 // If the shift count is an invalid immediate, don't do anything. 1792 if (ShAmt >= BitWidth) 1793 return; 1794 1795 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1796 KnownZero, KnownOne, Depth+1); 1797 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1798 KnownZero = KnownZero.lshr(ShAmt); 1799 KnownOne = KnownOne.lshr(ShAmt); 1800 1801 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1802 KnownZero |= HighBits; // High bits known zero. 1803 } 1804 return; 1805 case ISD::SRA: 1806 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1807 unsigned ShAmt = SA->getZExtValue(); 1808 1809 // If the shift count is an invalid immediate, don't do anything. 1810 if (ShAmt >= BitWidth) 1811 return; 1812 1813 APInt InDemandedMask = (Mask << ShAmt); 1814 // If any of the demanded bits are produced by the sign extension, we also 1815 // demand the input sign bit. 1816 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1817 if (HighBits.getBoolValue()) 1818 InDemandedMask |= APInt::getSignBit(BitWidth); 1819 1820 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1821 Depth+1); 1822 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1823 KnownZero = KnownZero.lshr(ShAmt); 1824 KnownOne = KnownOne.lshr(ShAmt); 1825 1826 // Handle the sign bits. 1827 APInt SignBit = APInt::getSignBit(BitWidth); 1828 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1829 1830 if (KnownZero.intersects(SignBit)) { 1831 KnownZero |= HighBits; // New bits are known zero. 1832 } else if (KnownOne.intersects(SignBit)) { 1833 KnownOne |= HighBits; // New bits are known one. 1834 } 1835 } 1836 return; 1837 case ISD::SIGN_EXTEND_INREG: { 1838 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1839 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1840 1841 // Sign extension. Compute the demanded bits in the result that are not 1842 // present in the input. 1843 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1844 1845 APInt InSignBit = APInt::getSignBit(EBits); 1846 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1847 1848 // If the sign extended bits are demanded, we know that the sign 1849 // bit is demanded. 1850 InSignBit = InSignBit.zext(BitWidth); 1851 if (NewBits.getBoolValue()) 1852 InputDemandedBits |= InSignBit; 1853 1854 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1855 KnownZero, KnownOne, Depth+1); 1856 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1857 1858 // If the sign bit of the input is known set or clear, then we know the 1859 // top bits of the result. 1860 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1861 KnownZero |= NewBits; 1862 KnownOne &= ~NewBits; 1863 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1864 KnownOne |= NewBits; 1865 KnownZero &= ~NewBits; 1866 } else { // Input sign bit unknown 1867 KnownZero &= ~NewBits; 1868 KnownOne &= ~NewBits; 1869 } 1870 return; 1871 } 1872 case ISD::CTTZ: 1873 case ISD::CTTZ_ZERO_UNDEF: 1874 case ISD::CTLZ: 1875 case ISD::CTLZ_ZERO_UNDEF: 1876 case ISD::CTPOP: { 1877 unsigned LowBits = Log2_32(BitWidth)+1; 1878 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1879 KnownOne.clearAllBits(); 1880 return; 1881 } 1882 case ISD::LOAD: { 1883 if (ISD::isZEXTLoad(Op.getNode())) { 1884 LoadSDNode *LD = cast<LoadSDNode>(Op); 1885 EVT VT = LD->getMemoryVT(); 1886 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1887 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1888 } 1889 return; 1890 } 1891 case ISD::ZERO_EXTEND: { 1892 EVT InVT = Op.getOperand(0).getValueType(); 1893 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1894 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1895 APInt InMask = Mask.trunc(InBits); 1896 KnownZero = KnownZero.trunc(InBits); 1897 KnownOne = KnownOne.trunc(InBits); 1898 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1899 KnownZero = KnownZero.zext(BitWidth); 1900 KnownOne = KnownOne.zext(BitWidth); 1901 KnownZero |= NewBits; 1902 return; 1903 } 1904 case ISD::SIGN_EXTEND: { 1905 EVT InVT = Op.getOperand(0).getValueType(); 1906 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1907 APInt InSignBit = APInt::getSignBit(InBits); 1908 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1909 APInt InMask = Mask.trunc(InBits); 1910 1911 // If any of the sign extended bits are demanded, we know that the sign 1912 // bit is demanded. Temporarily set this bit in the mask for our callee. 1913 if (NewBits.getBoolValue()) 1914 InMask |= InSignBit; 1915 1916 KnownZero = KnownZero.trunc(InBits); 1917 KnownOne = KnownOne.trunc(InBits); 1918 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1919 1920 // Note if the sign bit is known to be zero or one. 1921 bool SignBitKnownZero = KnownZero.isNegative(); 1922 bool SignBitKnownOne = KnownOne.isNegative(); 1923 assert(!(SignBitKnownZero && SignBitKnownOne) && 1924 "Sign bit can't be known to be both zero and one!"); 1925 1926 // If the sign bit wasn't actually demanded by our caller, we don't 1927 // want it set in the KnownZero and KnownOne result values. Reset the 1928 // mask and reapply it to the result values. 1929 InMask = Mask.trunc(InBits); 1930 KnownZero &= InMask; 1931 KnownOne &= InMask; 1932 1933 KnownZero = KnownZero.zext(BitWidth); 1934 KnownOne = KnownOne.zext(BitWidth); 1935 1936 // If the sign bit is known zero or one, the top bits match. 1937 if (SignBitKnownZero) 1938 KnownZero |= NewBits; 1939 else if (SignBitKnownOne) 1940 KnownOne |= NewBits; 1941 return; 1942 } 1943 case ISD::ANY_EXTEND: { 1944 EVT InVT = Op.getOperand(0).getValueType(); 1945 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1946 APInt InMask = Mask.trunc(InBits); 1947 KnownZero = KnownZero.trunc(InBits); 1948 KnownOne = KnownOne.trunc(InBits); 1949 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1950 KnownZero = KnownZero.zext(BitWidth); 1951 KnownOne = KnownOne.zext(BitWidth); 1952 return; 1953 } 1954 case ISD::TRUNCATE: { 1955 EVT InVT = Op.getOperand(0).getValueType(); 1956 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1957 APInt InMask = Mask.zext(InBits); 1958 KnownZero = KnownZero.zext(InBits); 1959 KnownOne = KnownOne.zext(InBits); 1960 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1961 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1962 KnownZero = KnownZero.trunc(BitWidth); 1963 KnownOne = KnownOne.trunc(BitWidth); 1964 break; 1965 } 1966 case ISD::AssertZext: { 1967 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1968 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1969 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1970 KnownOne, Depth+1); 1971 KnownZero |= (~InMask) & Mask; 1972 return; 1973 } 1974 case ISD::FGETSIGN: 1975 // All bits are zero except the low bit. 1976 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1977 return; 1978 1979 case ISD::SUB: { 1980 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1981 // We know that the top bits of C-X are clear if X contains less bits 1982 // than C (i.e. no wrap-around can happen). For example, 20-X is 1983 // positive if we can prove that X is >= 0 and < 16. 1984 if (CLHS->getAPIntValue().isNonNegative()) { 1985 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1986 // NLZ can't be BitWidth with no sign bit 1987 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1988 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1989 Depth+1); 1990 1991 // If all of the MaskV bits are known to be zero, then we know the 1992 // output top bits are zero, because we now know that the output is 1993 // from [0-C]. 1994 if ((KnownZero2 & MaskV) == MaskV) { 1995 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1996 // Top bits known zero. 1997 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1998 } 1999 } 2000 } 2001 } 2002 // fall through 2003 case ISD::ADD: 2004 case ISD::ADDE: { 2005 // Output known-0 bits are known if clear or set in both the low clear bits 2006 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2007 // low 3 bits clear. 2008 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 2009 BitWidth - Mask.countLeadingZeros()); 2010 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 2011 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2012 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2013 2014 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 2015 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2016 KnownZeroOut = std::min(KnownZeroOut, 2017 KnownZero2.countTrailingOnes()); 2018 2019 if (Op.getOpcode() == ISD::ADD) { 2020 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2021 return; 2022 } 2023 2024 // With ADDE, a carry bit may be added in, so we can only use this 2025 // information if we know (at least) that the low two bits are clear. We 2026 // then return to the caller that the low bit is unknown but that other bits 2027 // are known zero. 2028 if (KnownZeroOut >= 2) // ADDE 2029 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2030 return; 2031 } 2032 case ISD::SREM: 2033 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2034 const APInt &RA = Rem->getAPIntValue().abs(); 2035 if (RA.isPowerOf2()) { 2036 APInt LowBits = RA - 1; 2037 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2038 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 2039 2040 // The low bits of the first operand are unchanged by the srem. 2041 KnownZero = KnownZero2 & LowBits; 2042 KnownOne = KnownOne2 & LowBits; 2043 2044 // If the first operand is non-negative or has all low bits zero, then 2045 // the upper bits are all zero. 2046 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2047 KnownZero |= ~LowBits; 2048 2049 // If the first operand is negative and not all low bits are zero, then 2050 // the upper bits are all one. 2051 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2052 KnownOne |= ~LowBits; 2053 2054 KnownZero &= Mask; 2055 KnownOne &= Mask; 2056 2057 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2058 } 2059 } 2060 return; 2061 case ISD::UREM: { 2062 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2063 const APInt &RA = Rem->getAPIntValue(); 2064 if (RA.isPowerOf2()) { 2065 APInt LowBits = (RA - 1); 2066 APInt Mask2 = LowBits & Mask; 2067 KnownZero |= ~LowBits & Mask; 2068 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 2069 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2070 break; 2071 } 2072 } 2073 2074 // Since the result is less than or equal to either operand, any leading 2075 // zero bits in either operand must also exist in the result. 2076 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 2077 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 2078 Depth+1); 2079 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 2080 Depth+1); 2081 2082 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2083 KnownZero2.countLeadingOnes()); 2084 KnownOne.clearAllBits(); 2085 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2086 return; 2087 } 2088 case ISD::FrameIndex: 2089 case ISD::TargetFrameIndex: 2090 if (unsigned Align = InferPtrAlignment(Op)) { 2091 // The low bits are known zero if the pointer is aligned. 2092 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2093 return; 2094 } 2095 break; 2096 2097 default: 2098 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2099 break; 2100 // Fallthrough 2101 case ISD::INTRINSIC_WO_CHAIN: 2102 case ISD::INTRINSIC_W_CHAIN: 2103 case ISD::INTRINSIC_VOID: 2104 // Allow the target to implement this method for its nodes. 2105 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2106 Depth); 2107 return; 2108 } 2109} 2110 2111/// ComputeNumSignBits - Return the number of times the sign bit of the 2112/// register is replicated into the other bits. We know that at least 1 bit 2113/// is always equal to the sign bit (itself), but other cases can give us 2114/// information. For example, immediately after an "SRA X, 2", we know that 2115/// the top 3 bits are all equal to each other, so we return 3. 2116unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2117 EVT VT = Op.getValueType(); 2118 assert(VT.isInteger() && "Invalid VT!"); 2119 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2120 unsigned Tmp, Tmp2; 2121 unsigned FirstAnswer = 1; 2122 2123 if (Depth == 6) 2124 return 1; // Limit search depth. 2125 2126 switch (Op.getOpcode()) { 2127 default: break; 2128 case ISD::AssertSext: 2129 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2130 return VTBits-Tmp+1; 2131 case ISD::AssertZext: 2132 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2133 return VTBits-Tmp; 2134 2135 case ISD::Constant: { 2136 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2137 return Val.getNumSignBits(); 2138 } 2139 2140 case ISD::SIGN_EXTEND: 2141 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2142 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2143 2144 case ISD::SIGN_EXTEND_INREG: 2145 // Max of the input and what this extends. 2146 Tmp = 2147 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2148 Tmp = VTBits-Tmp+1; 2149 2150 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2151 return std::max(Tmp, Tmp2); 2152 2153 case ISD::SRA: 2154 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2155 // SRA X, C -> adds C sign bits. 2156 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2157 Tmp += C->getZExtValue(); 2158 if (Tmp > VTBits) Tmp = VTBits; 2159 } 2160 return Tmp; 2161 case ISD::SHL: 2162 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2163 // shl destroys sign bits. 2164 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2165 if (C->getZExtValue() >= VTBits || // Bad shift. 2166 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2167 return Tmp - C->getZExtValue(); 2168 } 2169 break; 2170 case ISD::AND: 2171 case ISD::OR: 2172 case ISD::XOR: // NOT is handled here. 2173 // Logical binary ops preserve the number of sign bits at the worst. 2174 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2175 if (Tmp != 1) { 2176 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2177 FirstAnswer = std::min(Tmp, Tmp2); 2178 // We computed what we know about the sign bits as our first 2179 // answer. Now proceed to the generic code that uses 2180 // ComputeMaskedBits, and pick whichever answer is better. 2181 } 2182 break; 2183 2184 case ISD::SELECT: 2185 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2186 if (Tmp == 1) return 1; // Early out. 2187 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2188 return std::min(Tmp, Tmp2); 2189 2190 case ISD::SADDO: 2191 case ISD::UADDO: 2192 case ISD::SSUBO: 2193 case ISD::USUBO: 2194 case ISD::SMULO: 2195 case ISD::UMULO: 2196 if (Op.getResNo() != 1) 2197 break; 2198 // The boolean result conforms to getBooleanContents. Fall through. 2199 case ISD::SETCC: 2200 // If setcc returns 0/-1, all bits are sign bits. 2201 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2202 TargetLowering::ZeroOrNegativeOneBooleanContent) 2203 return VTBits; 2204 break; 2205 case ISD::ROTL: 2206 case ISD::ROTR: 2207 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2208 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2209 2210 // Handle rotate right by N like a rotate left by 32-N. 2211 if (Op.getOpcode() == ISD::ROTR) 2212 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2213 2214 // If we aren't rotating out all of the known-in sign bits, return the 2215 // number that are left. This handles rotl(sext(x), 1) for example. 2216 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2217 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2218 } 2219 break; 2220 case ISD::ADD: 2221 // Add can have at most one carry bit. Thus we know that the output 2222 // is, at worst, one more bit than the inputs. 2223 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2224 if (Tmp == 1) return 1; // Early out. 2225 2226 // Special case decrementing a value (ADD X, -1): 2227 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2228 if (CRHS->isAllOnesValue()) { 2229 APInt KnownZero, KnownOne; 2230 APInt Mask = APInt::getAllOnesValue(VTBits); 2231 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2232 2233 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2234 // sign bits set. 2235 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2236 return VTBits; 2237 2238 // If we are subtracting one from a positive number, there is no carry 2239 // out of the result. 2240 if (KnownZero.isNegative()) 2241 return Tmp; 2242 } 2243 2244 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2245 if (Tmp2 == 1) return 1; 2246 return std::min(Tmp, Tmp2)-1; 2247 2248 case ISD::SUB: 2249 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2250 if (Tmp2 == 1) return 1; 2251 2252 // Handle NEG. 2253 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2254 if (CLHS->isNullValue()) { 2255 APInt KnownZero, KnownOne; 2256 APInt Mask = APInt::getAllOnesValue(VTBits); 2257 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2258 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2259 // sign bits set. 2260 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2261 return VTBits; 2262 2263 // If the input is known to be positive (the sign bit is known clear), 2264 // the output of the NEG has the same number of sign bits as the input. 2265 if (KnownZero.isNegative()) 2266 return Tmp2; 2267 2268 // Otherwise, we treat this like a SUB. 2269 } 2270 2271 // Sub can have at most one carry bit. Thus we know that the output 2272 // is, at worst, one more bit than the inputs. 2273 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2274 if (Tmp == 1) return 1; // Early out. 2275 return std::min(Tmp, Tmp2)-1; 2276 case ISD::TRUNCATE: 2277 // FIXME: it's tricky to do anything useful for this, but it is an important 2278 // case for targets like X86. 2279 break; 2280 } 2281 2282 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2283 if (Op.getOpcode() == ISD::LOAD) { 2284 LoadSDNode *LD = cast<LoadSDNode>(Op); 2285 unsigned ExtType = LD->getExtensionType(); 2286 switch (ExtType) { 2287 default: break; 2288 case ISD::SEXTLOAD: // '17' bits known 2289 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2290 return VTBits-Tmp+1; 2291 case ISD::ZEXTLOAD: // '16' bits known 2292 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2293 return VTBits-Tmp; 2294 } 2295 } 2296 2297 // Allow the target to implement this method for its nodes. 2298 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2299 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2300 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2301 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2302 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2303 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2304 } 2305 2306 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2307 // use this information. 2308 APInt KnownZero, KnownOne; 2309 APInt Mask = APInt::getAllOnesValue(VTBits); 2310 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2311 2312 if (KnownZero.isNegative()) { // sign bit is 0 2313 Mask = KnownZero; 2314 } else if (KnownOne.isNegative()) { // sign bit is 1; 2315 Mask = KnownOne; 2316 } else { 2317 // Nothing known. 2318 return FirstAnswer; 2319 } 2320 2321 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2322 // the number of identical bits in the top of the input value. 2323 Mask = ~Mask; 2324 Mask <<= Mask.getBitWidth()-VTBits; 2325 // Return # leading zeros. We use 'min' here in case Val was zero before 2326 // shifting. We don't want to return '64' as for an i32 "0". 2327 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2328} 2329 2330/// isBaseWithConstantOffset - Return true if the specified operand is an 2331/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2332/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2333/// semantics as an ADD. This handles the equivalence: 2334/// X|Cst == X+Cst iff X&Cst = 0. 2335bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2336 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2337 !isa<ConstantSDNode>(Op.getOperand(1))) 2338 return false; 2339 2340 if (Op.getOpcode() == ISD::OR && 2341 !MaskedValueIsZero(Op.getOperand(0), 2342 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2343 return false; 2344 2345 return true; 2346} 2347 2348 2349bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2350 // If we're told that NaNs won't happen, assume they won't. 2351 if (getTarget().Options.NoNaNsFPMath) 2352 return true; 2353 2354 // If the value is a constant, we can obviously see if it is a NaN or not. 2355 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2356 return !C->getValueAPF().isNaN(); 2357 2358 // TODO: Recognize more cases here. 2359 2360 return false; 2361} 2362 2363bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2364 // If the value is a constant, we can obviously see if it is a zero or not. 2365 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2366 return !C->isZero(); 2367 2368 // TODO: Recognize more cases here. 2369 switch (Op.getOpcode()) { 2370 default: break; 2371 case ISD::OR: 2372 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2373 return !C->isNullValue(); 2374 break; 2375 } 2376 2377 return false; 2378} 2379 2380bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2381 // Check the obvious case. 2382 if (A == B) return true; 2383 2384 // For for negative and positive zero. 2385 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2386 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2387 if (CA->isZero() && CB->isZero()) return true; 2388 2389 // Otherwise they may not be equal. 2390 return false; 2391} 2392 2393/// getNode - Gets or creates the specified node. 2394/// 2395SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2396 FoldingSetNodeID ID; 2397 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2398 void *IP = 0; 2399 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2400 return SDValue(E, 0); 2401 2402 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2403 CSEMap.InsertNode(N, IP); 2404 2405 AllNodes.push_back(N); 2406#ifndef NDEBUG 2407 VerifySDNode(N); 2408#endif 2409 return SDValue(N, 0); 2410} 2411 2412SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2413 EVT VT, SDValue Operand) { 2414 // Constant fold unary operations with an integer constant operand. 2415 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2416 const APInt &Val = C->getAPIntValue(); 2417 switch (Opcode) { 2418 default: break; 2419 case ISD::SIGN_EXTEND: 2420 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2421 case ISD::ANY_EXTEND: 2422 case ISD::ZERO_EXTEND: 2423 case ISD::TRUNCATE: 2424 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2425 case ISD::UINT_TO_FP: 2426 case ISD::SINT_TO_FP: { 2427 // No compile time operations on ppcf128. 2428 if (VT == MVT::ppcf128) break; 2429 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2430 (void)apf.convertFromAPInt(Val, 2431 Opcode==ISD::SINT_TO_FP, 2432 APFloat::rmNearestTiesToEven); 2433 return getConstantFP(apf, VT); 2434 } 2435 case ISD::BITCAST: 2436 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2437 return getConstantFP(Val.bitsToFloat(), VT); 2438 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2439 return getConstantFP(Val.bitsToDouble(), VT); 2440 break; 2441 case ISD::BSWAP: 2442 return getConstant(Val.byteSwap(), VT); 2443 case ISD::CTPOP: 2444 return getConstant(Val.countPopulation(), VT); 2445 case ISD::CTLZ: 2446 case ISD::CTLZ_ZERO_UNDEF: 2447 return getConstant(Val.countLeadingZeros(), VT); 2448 case ISD::CTTZ: 2449 case ISD::CTTZ_ZERO_UNDEF: 2450 return getConstant(Val.countTrailingZeros(), VT); 2451 } 2452 } 2453 2454 // Constant fold unary operations with a floating point constant operand. 2455 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2456 APFloat V = C->getValueAPF(); // make copy 2457 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2458 switch (Opcode) { 2459 case ISD::FNEG: 2460 V.changeSign(); 2461 return getConstantFP(V, VT); 2462 case ISD::FABS: 2463 V.clearSign(); 2464 return getConstantFP(V, VT); 2465 case ISD::FP_ROUND: 2466 case ISD::FP_EXTEND: { 2467 bool ignored; 2468 // This can return overflow, underflow, or inexact; we don't care. 2469 // FIXME need to be more flexible about rounding mode. 2470 (void)V.convert(*EVTToAPFloatSemantics(VT), 2471 APFloat::rmNearestTiesToEven, &ignored); 2472 return getConstantFP(V, VT); 2473 } 2474 case ISD::FP_TO_SINT: 2475 case ISD::FP_TO_UINT: { 2476 integerPart x[2]; 2477 bool ignored; 2478 assert(integerPartWidth >= 64); 2479 // FIXME need to be more flexible about rounding mode. 2480 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2481 Opcode==ISD::FP_TO_SINT, 2482 APFloat::rmTowardZero, &ignored); 2483 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2484 break; 2485 APInt api(VT.getSizeInBits(), x); 2486 return getConstant(api, VT); 2487 } 2488 case ISD::BITCAST: 2489 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2490 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2491 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2492 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2493 break; 2494 } 2495 } 2496 } 2497 2498 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2499 switch (Opcode) { 2500 case ISD::TokenFactor: 2501 case ISD::MERGE_VALUES: 2502 case ISD::CONCAT_VECTORS: 2503 return Operand; // Factor, merge or concat of one node? No need. 2504 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2505 case ISD::FP_EXTEND: 2506 assert(VT.isFloatingPoint() && 2507 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2508 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2509 assert((!VT.isVector() || 2510 VT.getVectorNumElements() == 2511 Operand.getValueType().getVectorNumElements()) && 2512 "Vector element count mismatch!"); 2513 if (Operand.getOpcode() == ISD::UNDEF) 2514 return getUNDEF(VT); 2515 break; 2516 case ISD::SIGN_EXTEND: 2517 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2518 "Invalid SIGN_EXTEND!"); 2519 if (Operand.getValueType() == VT) return Operand; // noop extension 2520 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2521 "Invalid sext node, dst < src!"); 2522 assert((!VT.isVector() || 2523 VT.getVectorNumElements() == 2524 Operand.getValueType().getVectorNumElements()) && 2525 "Vector element count mismatch!"); 2526 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2527 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2528 else if (OpOpcode == ISD::UNDEF) 2529 // sext(undef) = 0, because the top bits will all be the same. 2530 return getConstant(0, VT); 2531 break; 2532 case ISD::ZERO_EXTEND: 2533 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2534 "Invalid ZERO_EXTEND!"); 2535 if (Operand.getValueType() == VT) return Operand; // noop extension 2536 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2537 "Invalid zext node, dst < src!"); 2538 assert((!VT.isVector() || 2539 VT.getVectorNumElements() == 2540 Operand.getValueType().getVectorNumElements()) && 2541 "Vector element count mismatch!"); 2542 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2543 return getNode(ISD::ZERO_EXTEND, DL, VT, 2544 Operand.getNode()->getOperand(0)); 2545 else if (OpOpcode == ISD::UNDEF) 2546 // zext(undef) = 0, because the top bits will be zero. 2547 return getConstant(0, VT); 2548 break; 2549 case ISD::ANY_EXTEND: 2550 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2551 "Invalid ANY_EXTEND!"); 2552 if (Operand.getValueType() == VT) return Operand; // noop extension 2553 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2554 "Invalid anyext node, dst < src!"); 2555 assert((!VT.isVector() || 2556 VT.getVectorNumElements() == 2557 Operand.getValueType().getVectorNumElements()) && 2558 "Vector element count mismatch!"); 2559 2560 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2561 OpOpcode == ISD::ANY_EXTEND) 2562 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2563 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2564 else if (OpOpcode == ISD::UNDEF) 2565 return getUNDEF(VT); 2566 2567 // (ext (trunx x)) -> x 2568 if (OpOpcode == ISD::TRUNCATE) { 2569 SDValue OpOp = Operand.getNode()->getOperand(0); 2570 if (OpOp.getValueType() == VT) 2571 return OpOp; 2572 } 2573 break; 2574 case ISD::TRUNCATE: 2575 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2576 "Invalid TRUNCATE!"); 2577 if (Operand.getValueType() == VT) return Operand; // noop truncate 2578 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2579 "Invalid truncate node, src < dst!"); 2580 assert((!VT.isVector() || 2581 VT.getVectorNumElements() == 2582 Operand.getValueType().getVectorNumElements()) && 2583 "Vector element count mismatch!"); 2584 if (OpOpcode == ISD::TRUNCATE) 2585 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2586 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2587 OpOpcode == ISD::ANY_EXTEND) { 2588 // If the source is smaller than the dest, we still need an extend. 2589 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2590 .bitsLT(VT.getScalarType())) 2591 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2592 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2593 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2594 return Operand.getNode()->getOperand(0); 2595 } 2596 if (OpOpcode == ISD::UNDEF) 2597 return getUNDEF(VT); 2598 break; 2599 case ISD::BITCAST: 2600 // Basic sanity checking. 2601 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2602 && "Cannot BITCAST between types of different sizes!"); 2603 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2604 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2605 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2606 if (OpOpcode == ISD::UNDEF) 2607 return getUNDEF(VT); 2608 break; 2609 case ISD::SCALAR_TO_VECTOR: 2610 assert(VT.isVector() && !Operand.getValueType().isVector() && 2611 (VT.getVectorElementType() == Operand.getValueType() || 2612 (VT.getVectorElementType().isInteger() && 2613 Operand.getValueType().isInteger() && 2614 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2615 "Illegal SCALAR_TO_VECTOR node!"); 2616 if (OpOpcode == ISD::UNDEF) 2617 return getUNDEF(VT); 2618 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2619 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2620 isa<ConstantSDNode>(Operand.getOperand(1)) && 2621 Operand.getConstantOperandVal(1) == 0 && 2622 Operand.getOperand(0).getValueType() == VT) 2623 return Operand.getOperand(0); 2624 break; 2625 case ISD::FNEG: 2626 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2627 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2628 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2629 Operand.getNode()->getOperand(0)); 2630 if (OpOpcode == ISD::FNEG) // --X -> X 2631 return Operand.getNode()->getOperand(0); 2632 break; 2633 case ISD::FABS: 2634 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2635 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2636 break; 2637 } 2638 2639 SDNode *N; 2640 SDVTList VTs = getVTList(VT); 2641 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2642 FoldingSetNodeID ID; 2643 SDValue Ops[1] = { Operand }; 2644 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2645 void *IP = 0; 2646 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2647 return SDValue(E, 0); 2648 2649 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2650 CSEMap.InsertNode(N, IP); 2651 } else { 2652 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2653 } 2654 2655 AllNodes.push_back(N); 2656#ifndef NDEBUG 2657 VerifySDNode(N); 2658#endif 2659 return SDValue(N, 0); 2660} 2661 2662SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2663 EVT VT, 2664 ConstantSDNode *Cst1, 2665 ConstantSDNode *Cst2) { 2666 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2667 2668 switch (Opcode) { 2669 case ISD::ADD: return getConstant(C1 + C2, VT); 2670 case ISD::SUB: return getConstant(C1 - C2, VT); 2671 case ISD::MUL: return getConstant(C1 * C2, VT); 2672 case ISD::UDIV: 2673 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2674 break; 2675 case ISD::UREM: 2676 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2677 break; 2678 case ISD::SDIV: 2679 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2680 break; 2681 case ISD::SREM: 2682 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2683 break; 2684 case ISD::AND: return getConstant(C1 & C2, VT); 2685 case ISD::OR: return getConstant(C1 | C2, VT); 2686 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2687 case ISD::SHL: return getConstant(C1 << C2, VT); 2688 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2689 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2690 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2691 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2692 default: break; 2693 } 2694 2695 return SDValue(); 2696} 2697 2698SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2699 SDValue N1, SDValue N2) { 2700 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2701 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2702 switch (Opcode) { 2703 default: break; 2704 case ISD::TokenFactor: 2705 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2706 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2707 // Fold trivial token factors. 2708 if (N1.getOpcode() == ISD::EntryToken) return N2; 2709 if (N2.getOpcode() == ISD::EntryToken) return N1; 2710 if (N1 == N2) return N1; 2711 break; 2712 case ISD::CONCAT_VECTORS: 2713 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2714 // one big BUILD_VECTOR. 2715 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2716 N2.getOpcode() == ISD::BUILD_VECTOR) { 2717 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2718 N1.getNode()->op_end()); 2719 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2720 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2721 } 2722 break; 2723 case ISD::AND: 2724 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2725 assert(N1.getValueType() == N2.getValueType() && 2726 N1.getValueType() == VT && "Binary operator types must match!"); 2727 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2728 // worth handling here. 2729 if (N2C && N2C->isNullValue()) 2730 return N2; 2731 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2732 return N1; 2733 break; 2734 case ISD::OR: 2735 case ISD::XOR: 2736 case ISD::ADD: 2737 case ISD::SUB: 2738 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2739 assert(N1.getValueType() == N2.getValueType() && 2740 N1.getValueType() == VT && "Binary operator types must match!"); 2741 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2742 // it's worth handling here. 2743 if (N2C && N2C->isNullValue()) 2744 return N1; 2745 break; 2746 case ISD::UDIV: 2747 case ISD::UREM: 2748 case ISD::MULHU: 2749 case ISD::MULHS: 2750 case ISD::MUL: 2751 case ISD::SDIV: 2752 case ISD::SREM: 2753 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2754 assert(N1.getValueType() == N2.getValueType() && 2755 N1.getValueType() == VT && "Binary operator types must match!"); 2756 break; 2757 case ISD::FADD: 2758 case ISD::FSUB: 2759 case ISD::FMUL: 2760 case ISD::FDIV: 2761 case ISD::FREM: 2762 if (getTarget().Options.UnsafeFPMath) { 2763 if (Opcode == ISD::FADD) { 2764 // 0+x --> x 2765 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2766 if (CFP->getValueAPF().isZero()) 2767 return N2; 2768 // x+0 --> x 2769 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2770 if (CFP->getValueAPF().isZero()) 2771 return N1; 2772 } else if (Opcode == ISD::FSUB) { 2773 // x-0 --> x 2774 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2775 if (CFP->getValueAPF().isZero()) 2776 return N1; 2777 } 2778 } 2779 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2780 assert(N1.getValueType() == N2.getValueType() && 2781 N1.getValueType() == VT && "Binary operator types must match!"); 2782 break; 2783 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2784 assert(N1.getValueType() == VT && 2785 N1.getValueType().isFloatingPoint() && 2786 N2.getValueType().isFloatingPoint() && 2787 "Invalid FCOPYSIGN!"); 2788 break; 2789 case ISD::SHL: 2790 case ISD::SRA: 2791 case ISD::SRL: 2792 case ISD::ROTL: 2793 case ISD::ROTR: 2794 assert(VT == N1.getValueType() && 2795 "Shift operators return type must be the same as their first arg"); 2796 assert(VT.isInteger() && N2.getValueType().isInteger() && 2797 "Shifts only work on integers"); 2798 // Verify that the shift amount VT is bit enough to hold valid shift 2799 // amounts. This catches things like trying to shift an i1024 value by an 2800 // i8, which is easy to fall into in generic code that uses 2801 // TLI.getShiftAmount(). 2802 assert(N2.getValueType().getSizeInBits() >= 2803 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2804 "Invalid use of small shift amount with oversized value!"); 2805 2806 // Always fold shifts of i1 values so the code generator doesn't need to 2807 // handle them. Since we know the size of the shift has to be less than the 2808 // size of the value, the shift/rotate count is guaranteed to be zero. 2809 if (VT == MVT::i1) 2810 return N1; 2811 if (N2C && N2C->isNullValue()) 2812 return N1; 2813 break; 2814 case ISD::FP_ROUND_INREG: { 2815 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2816 assert(VT == N1.getValueType() && "Not an inreg round!"); 2817 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2818 "Cannot FP_ROUND_INREG integer types"); 2819 assert(EVT.isVector() == VT.isVector() && 2820 "FP_ROUND_INREG type should be vector iff the operand " 2821 "type is vector!"); 2822 assert((!EVT.isVector() || 2823 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2824 "Vector element counts must match in FP_ROUND_INREG"); 2825 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2826 (void)EVT; 2827 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2828 break; 2829 } 2830 case ISD::FP_ROUND: 2831 assert(VT.isFloatingPoint() && 2832 N1.getValueType().isFloatingPoint() && 2833 VT.bitsLE(N1.getValueType()) && 2834 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2835 if (N1.getValueType() == VT) return N1; // noop conversion. 2836 break; 2837 case ISD::AssertSext: 2838 case ISD::AssertZext: { 2839 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2840 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2841 assert(VT.isInteger() && EVT.isInteger() && 2842 "Cannot *_EXTEND_INREG FP types"); 2843 assert(!EVT.isVector() && 2844 "AssertSExt/AssertZExt type should be the vector element type " 2845 "rather than the vector type!"); 2846 assert(EVT.bitsLE(VT) && "Not extending!"); 2847 if (VT == EVT) return N1; // noop assertion. 2848 break; 2849 } 2850 case ISD::SIGN_EXTEND_INREG: { 2851 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2852 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2853 assert(VT.isInteger() && EVT.isInteger() && 2854 "Cannot *_EXTEND_INREG FP types"); 2855 assert(EVT.isVector() == VT.isVector() && 2856 "SIGN_EXTEND_INREG type should be vector iff the operand " 2857 "type is vector!"); 2858 assert((!EVT.isVector() || 2859 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2860 "Vector element counts must match in SIGN_EXTEND_INREG"); 2861 assert(EVT.bitsLE(VT) && "Not extending!"); 2862 if (EVT == VT) return N1; // Not actually extending 2863 2864 if (N1C) { 2865 APInt Val = N1C->getAPIntValue(); 2866 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2867 Val <<= Val.getBitWidth()-FromBits; 2868 Val = Val.ashr(Val.getBitWidth()-FromBits); 2869 return getConstant(Val, VT); 2870 } 2871 break; 2872 } 2873 case ISD::EXTRACT_VECTOR_ELT: 2874 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2875 if (N1.getOpcode() == ISD::UNDEF) 2876 return getUNDEF(VT); 2877 2878 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2879 // expanding copies of large vectors from registers. 2880 if (N2C && 2881 N1.getOpcode() == ISD::CONCAT_VECTORS && 2882 N1.getNumOperands() > 0) { 2883 unsigned Factor = 2884 N1.getOperand(0).getValueType().getVectorNumElements(); 2885 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2886 N1.getOperand(N2C->getZExtValue() / Factor), 2887 getConstant(N2C->getZExtValue() % Factor, 2888 N2.getValueType())); 2889 } 2890 2891 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2892 // expanding large vector constants. 2893 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2894 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2895 EVT VEltTy = N1.getValueType().getVectorElementType(); 2896 if (Elt.getValueType() != VEltTy) { 2897 // If the vector element type is not legal, the BUILD_VECTOR operands 2898 // are promoted and implicitly truncated. Make that explicit here. 2899 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2900 } 2901 if (VT != VEltTy) { 2902 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2903 // result is implicitly extended. 2904 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2905 } 2906 return Elt; 2907 } 2908 2909 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2910 // operations are lowered to scalars. 2911 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2912 // If the indices are the same, return the inserted element else 2913 // if the indices are known different, extract the element from 2914 // the original vector. 2915 SDValue N1Op2 = N1.getOperand(2); 2916 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2917 2918 if (N1Op2C && N2C) { 2919 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2920 if (VT == N1.getOperand(1).getValueType()) 2921 return N1.getOperand(1); 2922 else 2923 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2924 } 2925 2926 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2927 } 2928 } 2929 break; 2930 case ISD::EXTRACT_ELEMENT: 2931 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2932 assert(!N1.getValueType().isVector() && !VT.isVector() && 2933 (N1.getValueType().isInteger() == VT.isInteger()) && 2934 N1.getValueType() != VT && 2935 "Wrong types for EXTRACT_ELEMENT!"); 2936 2937 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2938 // 64-bit integers into 32-bit parts. Instead of building the extract of 2939 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2940 if (N1.getOpcode() == ISD::BUILD_PAIR) 2941 return N1.getOperand(N2C->getZExtValue()); 2942 2943 // EXTRACT_ELEMENT of a constant int is also very common. 2944 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2945 unsigned ElementSize = VT.getSizeInBits(); 2946 unsigned Shift = ElementSize * N2C->getZExtValue(); 2947 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2948 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2949 } 2950 break; 2951 case ISD::EXTRACT_SUBVECTOR: { 2952 SDValue Index = N2; 2953 if (VT.isSimple() && N1.getValueType().isSimple()) { 2954 assert(VT.isVector() && N1.getValueType().isVector() && 2955 "Extract subvector VTs must be a vectors!"); 2956 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2957 "Extract subvector VTs must have the same element type!"); 2958 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2959 "Extract subvector must be from larger vector to smaller vector!"); 2960 2961 if (isa<ConstantSDNode>(Index.getNode())) { 2962 assert((VT.getVectorNumElements() + 2963 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2964 <= N1.getValueType().getVectorNumElements()) 2965 && "Extract subvector overflow!"); 2966 } 2967 2968 // Trivial extraction. 2969 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2970 return N1; 2971 } 2972 break; 2973 } 2974 } 2975 2976 if (N1C) { 2977 if (N2C) { 2978 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2979 if (SV.getNode()) return SV; 2980 } else { // Cannonicalize constant to RHS if commutative 2981 if (isCommutativeBinOp(Opcode)) { 2982 std::swap(N1C, N2C); 2983 std::swap(N1, N2); 2984 } 2985 } 2986 } 2987 2988 // Constant fold FP operations. 2989 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2990 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2991 if (N1CFP) { 2992 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2993 // Cannonicalize constant to RHS if commutative 2994 std::swap(N1CFP, N2CFP); 2995 std::swap(N1, N2); 2996 } else if (N2CFP && VT != MVT::ppcf128) { 2997 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2998 APFloat::opStatus s; 2999 switch (Opcode) { 3000 case ISD::FADD: 3001 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3002 if (s != APFloat::opInvalidOp) 3003 return getConstantFP(V1, VT); 3004 break; 3005 case ISD::FSUB: 3006 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3007 if (s!=APFloat::opInvalidOp) 3008 return getConstantFP(V1, VT); 3009 break; 3010 case ISD::FMUL: 3011 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3012 if (s!=APFloat::opInvalidOp) 3013 return getConstantFP(V1, VT); 3014 break; 3015 case ISD::FDIV: 3016 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3017 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3018 return getConstantFP(V1, VT); 3019 break; 3020 case ISD::FREM : 3021 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3022 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3023 return getConstantFP(V1, VT); 3024 break; 3025 case ISD::FCOPYSIGN: 3026 V1.copySign(V2); 3027 return getConstantFP(V1, VT); 3028 default: break; 3029 } 3030 } 3031 } 3032 3033 // Canonicalize an UNDEF to the RHS, even over a constant. 3034 if (N1.getOpcode() == ISD::UNDEF) { 3035 if (isCommutativeBinOp(Opcode)) { 3036 std::swap(N1, N2); 3037 } else { 3038 switch (Opcode) { 3039 case ISD::FP_ROUND_INREG: 3040 case ISD::SIGN_EXTEND_INREG: 3041 case ISD::SUB: 3042 case ISD::FSUB: 3043 case ISD::FDIV: 3044 case ISD::FREM: 3045 case ISD::SRA: 3046 return N1; // fold op(undef, arg2) -> undef 3047 case ISD::UDIV: 3048 case ISD::SDIV: 3049 case ISD::UREM: 3050 case ISD::SREM: 3051 case ISD::SRL: 3052 case ISD::SHL: 3053 if (!VT.isVector()) 3054 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3055 // For vectors, we can't easily build an all zero vector, just return 3056 // the LHS. 3057 return N2; 3058 } 3059 } 3060 } 3061 3062 // Fold a bunch of operators when the RHS is undef. 3063 if (N2.getOpcode() == ISD::UNDEF) { 3064 switch (Opcode) { 3065 case ISD::XOR: 3066 if (N1.getOpcode() == ISD::UNDEF) 3067 // Handle undef ^ undef -> 0 special case. This is a common 3068 // idiom (misuse). 3069 return getConstant(0, VT); 3070 // fallthrough 3071 case ISD::ADD: 3072 case ISD::ADDC: 3073 case ISD::ADDE: 3074 case ISD::SUB: 3075 case ISD::UDIV: 3076 case ISD::SDIV: 3077 case ISD::UREM: 3078 case ISD::SREM: 3079 return N2; // fold op(arg1, undef) -> undef 3080 case ISD::FADD: 3081 case ISD::FSUB: 3082 case ISD::FMUL: 3083 case ISD::FDIV: 3084 case ISD::FREM: 3085 if (getTarget().Options.UnsafeFPMath) 3086 return N2; 3087 break; 3088 case ISD::MUL: 3089 case ISD::AND: 3090 case ISD::SRL: 3091 case ISD::SHL: 3092 if (!VT.isVector()) 3093 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3094 // For vectors, we can't easily build an all zero vector, just return 3095 // the LHS. 3096 return N1; 3097 case ISD::OR: 3098 if (!VT.isVector()) 3099 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3100 // For vectors, we can't easily build an all one vector, just return 3101 // the LHS. 3102 return N1; 3103 case ISD::SRA: 3104 return N1; 3105 } 3106 } 3107 3108 // Memoize this node if possible. 3109 SDNode *N; 3110 SDVTList VTs = getVTList(VT); 3111 if (VT != MVT::Glue) { 3112 SDValue Ops[] = { N1, N2 }; 3113 FoldingSetNodeID ID; 3114 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3115 void *IP = 0; 3116 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3117 return SDValue(E, 0); 3118 3119 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3120 CSEMap.InsertNode(N, IP); 3121 } else { 3122 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3123 } 3124 3125 AllNodes.push_back(N); 3126#ifndef NDEBUG 3127 VerifySDNode(N); 3128#endif 3129 return SDValue(N, 0); 3130} 3131 3132SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3133 SDValue N1, SDValue N2, SDValue N3) { 3134 // Perform various simplifications. 3135 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3136 switch (Opcode) { 3137 case ISD::CONCAT_VECTORS: 3138 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3139 // one big BUILD_VECTOR. 3140 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3141 N2.getOpcode() == ISD::BUILD_VECTOR && 3142 N3.getOpcode() == ISD::BUILD_VECTOR) { 3143 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3144 N1.getNode()->op_end()); 3145 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3146 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3147 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3148 } 3149 break; 3150 case ISD::SETCC: { 3151 // Use FoldSetCC to simplify SETCC's. 3152 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3153 if (Simp.getNode()) return Simp; 3154 break; 3155 } 3156 case ISD::SELECT: 3157 if (N1C) { 3158 if (N1C->getZExtValue()) 3159 return N2; // select true, X, Y -> X 3160 return N3; // select false, X, Y -> Y 3161 } 3162 3163 if (N2 == N3) return N2; // select C, X, X -> X 3164 break; 3165 case ISD::VECTOR_SHUFFLE: 3166 llvm_unreachable("should use getVectorShuffle constructor!"); 3167 case ISD::INSERT_SUBVECTOR: { 3168 SDValue Index = N3; 3169 if (VT.isSimple() && N1.getValueType().isSimple() 3170 && N2.getValueType().isSimple()) { 3171 assert(VT.isVector() && N1.getValueType().isVector() && 3172 N2.getValueType().isVector() && 3173 "Insert subvector VTs must be a vectors"); 3174 assert(VT == N1.getValueType() && 3175 "Dest and insert subvector source types must match!"); 3176 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3177 "Insert subvector must be from smaller vector to larger vector!"); 3178 if (isa<ConstantSDNode>(Index.getNode())) { 3179 assert((N2.getValueType().getVectorNumElements() + 3180 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3181 <= VT.getVectorNumElements()) 3182 && "Insert subvector overflow!"); 3183 } 3184 3185 // Trivial insertion. 3186 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3187 return N2; 3188 } 3189 break; 3190 } 3191 case ISD::BITCAST: 3192 // Fold bit_convert nodes from a type to themselves. 3193 if (N1.getValueType() == VT) 3194 return N1; 3195 break; 3196 } 3197 3198 // Memoize node if it doesn't produce a flag. 3199 SDNode *N; 3200 SDVTList VTs = getVTList(VT); 3201 if (VT != MVT::Glue) { 3202 SDValue Ops[] = { N1, N2, N3 }; 3203 FoldingSetNodeID ID; 3204 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3205 void *IP = 0; 3206 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3207 return SDValue(E, 0); 3208 3209 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3210 CSEMap.InsertNode(N, IP); 3211 } else { 3212 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3213 } 3214 3215 AllNodes.push_back(N); 3216#ifndef NDEBUG 3217 VerifySDNode(N); 3218#endif 3219 return SDValue(N, 0); 3220} 3221 3222SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3223 SDValue N1, SDValue N2, SDValue N3, 3224 SDValue N4) { 3225 SDValue Ops[] = { N1, N2, N3, N4 }; 3226 return getNode(Opcode, DL, VT, Ops, 4); 3227} 3228 3229SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3230 SDValue N1, SDValue N2, SDValue N3, 3231 SDValue N4, SDValue N5) { 3232 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3233 return getNode(Opcode, DL, VT, Ops, 5); 3234} 3235 3236/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3237/// the incoming stack arguments to be loaded from the stack. 3238SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3239 SmallVector<SDValue, 8> ArgChains; 3240 3241 // Include the original chain at the beginning of the list. When this is 3242 // used by target LowerCall hooks, this helps legalize find the 3243 // CALLSEQ_BEGIN node. 3244 ArgChains.push_back(Chain); 3245 3246 // Add a chain value for each stack argument. 3247 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3248 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3249 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3250 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3251 if (FI->getIndex() < 0) 3252 ArgChains.push_back(SDValue(L, 1)); 3253 3254 // Build a tokenfactor for all the chains. 3255 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3256 &ArgChains[0], ArgChains.size()); 3257} 3258 3259/// SplatByte - Distribute ByteVal over NumBits bits. 3260static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3261 APInt Val = APInt(NumBits, ByteVal); 3262 unsigned Shift = 8; 3263 for (unsigned i = NumBits; i > 8; i >>= 1) { 3264 Val = (Val << Shift) | Val; 3265 Shift <<= 1; 3266 } 3267 return Val; 3268} 3269 3270/// getMemsetValue - Vectorized representation of the memset value 3271/// operand. 3272static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3273 DebugLoc dl) { 3274 assert(Value.getOpcode() != ISD::UNDEF); 3275 3276 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3277 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3278 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3279 if (VT.isInteger()) 3280 return DAG.getConstant(Val, VT); 3281 return DAG.getConstantFP(APFloat(Val), VT); 3282 } 3283 3284 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3285 if (NumBits > 8) { 3286 // Use a multiplication with 0x010101... to extend the input to the 3287 // required length. 3288 APInt Magic = SplatByte(NumBits, 0x01); 3289 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3290 } 3291 3292 return Value; 3293} 3294 3295/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3296/// used when a memcpy is turned into a memset when the source is a constant 3297/// string ptr. 3298static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3299 const TargetLowering &TLI, StringRef Str) { 3300 // Handle vector with all elements zero. 3301 if (Str.empty()) { 3302 if (VT.isInteger()) 3303 return DAG.getConstant(0, VT); 3304 else if (VT == MVT::f32 || VT == MVT::f64) 3305 return DAG.getConstantFP(0.0, VT); 3306 else if (VT.isVector()) { 3307 unsigned NumElts = VT.getVectorNumElements(); 3308 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3309 return DAG.getNode(ISD::BITCAST, dl, VT, 3310 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3311 EltVT, NumElts))); 3312 } else 3313 llvm_unreachable("Expected type!"); 3314 } 3315 3316 assert(!VT.isVector() && "Can't handle vector type here!"); 3317 unsigned NumVTBytes = VT.getSizeInBits() / 8; 3318 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3319 3320 uint64_t Val = 0; 3321 if (TLI.isLittleEndian()) { 3322 for (unsigned i = 0; i != NumBytes; ++i) 3323 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3324 } else { 3325 for (unsigned i = 0; i != NumBytes; ++i) 3326 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3327 } 3328 3329 return DAG.getConstant(Val, VT); 3330} 3331 3332/// getMemBasePlusOffset - Returns base and offset node for the 3333/// 3334static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3335 SelectionDAG &DAG) { 3336 EVT VT = Base.getValueType(); 3337 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3338 VT, Base, DAG.getConstant(Offset, VT)); 3339} 3340 3341/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3342/// 3343static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3344 unsigned SrcDelta = 0; 3345 GlobalAddressSDNode *G = NULL; 3346 if (Src.getOpcode() == ISD::GlobalAddress) 3347 G = cast<GlobalAddressSDNode>(Src); 3348 else if (Src.getOpcode() == ISD::ADD && 3349 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3350 Src.getOperand(1).getOpcode() == ISD::Constant) { 3351 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3352 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3353 } 3354 if (!G) 3355 return false; 3356 3357 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3358} 3359 3360/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3361/// to replace the memset / memcpy. Return true if the number of memory ops 3362/// is below the threshold. It returns the types of the sequence of 3363/// memory ops to perform memset / memcpy by reference. 3364static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3365 unsigned Limit, uint64_t Size, 3366 unsigned DstAlign, unsigned SrcAlign, 3367 bool IsZeroVal, 3368 bool MemcpyStrSrc, 3369 SelectionDAG &DAG, 3370 const TargetLowering &TLI) { 3371 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3372 "Expecting memcpy / memset source to meet alignment requirement!"); 3373 // If 'SrcAlign' is zero, that means the memory operation does not need to 3374 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3375 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3376 // is the specified alignment of the memory operation. If it is zero, that 3377 // means it's possible to change the alignment of the destination. 3378 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3379 // not need to be loaded. 3380 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3381 IsZeroVal, MemcpyStrSrc, 3382 DAG.getMachineFunction()); 3383 3384 if (VT == MVT::Other) { 3385 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3386 TLI.allowsUnalignedMemoryAccesses(VT)) { 3387 VT = TLI.getPointerTy(); 3388 } else { 3389 switch (DstAlign & 7) { 3390 case 0: VT = MVT::i64; break; 3391 case 4: VT = MVT::i32; break; 3392 case 2: VT = MVT::i16; break; 3393 default: VT = MVT::i8; break; 3394 } 3395 } 3396 3397 MVT LVT = MVT::i64; 3398 while (!TLI.isTypeLegal(LVT)) 3399 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3400 assert(LVT.isInteger()); 3401 3402 if (VT.bitsGT(LVT)) 3403 VT = LVT; 3404 } 3405 3406 unsigned NumMemOps = 0; 3407 while (Size != 0) { 3408 unsigned VTSize = VT.getSizeInBits() / 8; 3409 while (VTSize > Size) { 3410 // For now, only use non-vector load / store's for the left-over pieces. 3411 if (VT.isVector() || VT.isFloatingPoint()) { 3412 VT = MVT::i64; 3413 while (!TLI.isTypeLegal(VT)) 3414 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3415 VTSize = VT.getSizeInBits() / 8; 3416 } else { 3417 // This can result in a type that is not legal on the target, e.g. 3418 // 1 or 2 bytes on PPC. 3419 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3420 VTSize >>= 1; 3421 } 3422 } 3423 3424 if (++NumMemOps > Limit) 3425 return false; 3426 MemOps.push_back(VT); 3427 Size -= VTSize; 3428 } 3429 3430 return true; 3431} 3432 3433static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3434 SDValue Chain, SDValue Dst, 3435 SDValue Src, uint64_t Size, 3436 unsigned Align, bool isVol, 3437 bool AlwaysInline, 3438 MachinePointerInfo DstPtrInfo, 3439 MachinePointerInfo SrcPtrInfo) { 3440 // Turn a memcpy of undef to nop. 3441 if (Src.getOpcode() == ISD::UNDEF) 3442 return Chain; 3443 3444 // Expand memcpy to a series of load and store ops if the size operand falls 3445 // below a certain threshold. 3446 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3447 // rather than maybe a humongous number of loads and stores. 3448 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3449 std::vector<EVT> MemOps; 3450 bool DstAlignCanChange = false; 3451 MachineFunction &MF = DAG.getMachineFunction(); 3452 MachineFrameInfo *MFI = MF.getFrameInfo(); 3453 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3454 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3455 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3456 DstAlignCanChange = true; 3457 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3458 if (Align > SrcAlign) 3459 SrcAlign = Align; 3460 StringRef Str; 3461 bool CopyFromStr = isMemSrcFromString(Src, Str); 3462 bool isZeroStr = CopyFromStr && Str.empty(); 3463 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3464 3465 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3466 (DstAlignCanChange ? 0 : Align), 3467 (isZeroStr ? 0 : SrcAlign), 3468 true, CopyFromStr, DAG, TLI)) 3469 return SDValue(); 3470 3471 if (DstAlignCanChange) { 3472 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3473 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3474 if (NewAlign > Align) { 3475 // Give the stack frame object a larger alignment if needed. 3476 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3477 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3478 Align = NewAlign; 3479 } 3480 } 3481 3482 SmallVector<SDValue, 8> OutChains; 3483 unsigned NumMemOps = MemOps.size(); 3484 uint64_t SrcOff = 0, DstOff = 0; 3485 for (unsigned i = 0; i != NumMemOps; ++i) { 3486 EVT VT = MemOps[i]; 3487 unsigned VTSize = VT.getSizeInBits() / 8; 3488 SDValue Value, Store; 3489 3490 if (CopyFromStr && 3491 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3492 // It's unlikely a store of a vector immediate can be done in a single 3493 // instruction. It would require a load from a constantpool first. 3494 // We only handle zero vectors here. 3495 // FIXME: Handle other cases where store of vector immediate is done in 3496 // a single instruction. 3497 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3498 Store = DAG.getStore(Chain, dl, Value, 3499 getMemBasePlusOffset(Dst, DstOff, DAG), 3500 DstPtrInfo.getWithOffset(DstOff), isVol, 3501 false, Align); 3502 } else { 3503 // The type might not be legal for the target. This should only happen 3504 // if the type is smaller than a legal type, as on PPC, so the right 3505 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3506 // to Load/Store if NVT==VT. 3507 // FIXME does the case above also need this? 3508 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3509 assert(NVT.bitsGE(VT)); 3510 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3511 getMemBasePlusOffset(Src, SrcOff, DAG), 3512 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3513 MinAlign(SrcAlign, SrcOff)); 3514 Store = DAG.getTruncStore(Chain, dl, Value, 3515 getMemBasePlusOffset(Dst, DstOff, DAG), 3516 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3517 false, Align); 3518 } 3519 OutChains.push_back(Store); 3520 SrcOff += VTSize; 3521 DstOff += VTSize; 3522 } 3523 3524 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3525 &OutChains[0], OutChains.size()); 3526} 3527 3528static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3529 SDValue Chain, SDValue Dst, 3530 SDValue Src, uint64_t Size, 3531 unsigned Align, bool isVol, 3532 bool AlwaysInline, 3533 MachinePointerInfo DstPtrInfo, 3534 MachinePointerInfo SrcPtrInfo) { 3535 // Turn a memmove of undef to nop. 3536 if (Src.getOpcode() == ISD::UNDEF) 3537 return Chain; 3538 3539 // Expand memmove to a series of load and store ops if the size operand falls 3540 // below a certain threshold. 3541 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3542 std::vector<EVT> MemOps; 3543 bool DstAlignCanChange = false; 3544 MachineFunction &MF = DAG.getMachineFunction(); 3545 MachineFrameInfo *MFI = MF.getFrameInfo(); 3546 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3547 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3548 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3549 DstAlignCanChange = true; 3550 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3551 if (Align > SrcAlign) 3552 SrcAlign = Align; 3553 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3554 3555 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3556 (DstAlignCanChange ? 0 : Align), 3557 SrcAlign, true, false, DAG, TLI)) 3558 return SDValue(); 3559 3560 if (DstAlignCanChange) { 3561 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3562 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3563 if (NewAlign > Align) { 3564 // Give the stack frame object a larger alignment if needed. 3565 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3566 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3567 Align = NewAlign; 3568 } 3569 } 3570 3571 uint64_t SrcOff = 0, DstOff = 0; 3572 SmallVector<SDValue, 8> LoadValues; 3573 SmallVector<SDValue, 8> LoadChains; 3574 SmallVector<SDValue, 8> OutChains; 3575 unsigned NumMemOps = MemOps.size(); 3576 for (unsigned i = 0; i < NumMemOps; i++) { 3577 EVT VT = MemOps[i]; 3578 unsigned VTSize = VT.getSizeInBits() / 8; 3579 SDValue Value, Store; 3580 3581 Value = DAG.getLoad(VT, dl, Chain, 3582 getMemBasePlusOffset(Src, SrcOff, DAG), 3583 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3584 false, false, SrcAlign); 3585 LoadValues.push_back(Value); 3586 LoadChains.push_back(Value.getValue(1)); 3587 SrcOff += VTSize; 3588 } 3589 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3590 &LoadChains[0], LoadChains.size()); 3591 OutChains.clear(); 3592 for (unsigned i = 0; i < NumMemOps; i++) { 3593 EVT VT = MemOps[i]; 3594 unsigned VTSize = VT.getSizeInBits() / 8; 3595 SDValue Value, Store; 3596 3597 Store = DAG.getStore(Chain, dl, LoadValues[i], 3598 getMemBasePlusOffset(Dst, DstOff, DAG), 3599 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3600 OutChains.push_back(Store); 3601 DstOff += VTSize; 3602 } 3603 3604 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3605 &OutChains[0], OutChains.size()); 3606} 3607 3608static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3609 SDValue Chain, SDValue Dst, 3610 SDValue Src, uint64_t Size, 3611 unsigned Align, bool isVol, 3612 MachinePointerInfo DstPtrInfo) { 3613 // Turn a memset of undef to nop. 3614 if (Src.getOpcode() == ISD::UNDEF) 3615 return Chain; 3616 3617 // Expand memset to a series of load/store ops if the size operand 3618 // falls below a certain threshold. 3619 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3620 std::vector<EVT> MemOps; 3621 bool DstAlignCanChange = false; 3622 MachineFunction &MF = DAG.getMachineFunction(); 3623 MachineFrameInfo *MFI = MF.getFrameInfo(); 3624 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3625 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3626 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3627 DstAlignCanChange = true; 3628 bool IsZeroVal = 3629 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3630 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3631 Size, (DstAlignCanChange ? 0 : Align), 0, 3632 IsZeroVal, false, DAG, TLI)) 3633 return SDValue(); 3634 3635 if (DstAlignCanChange) { 3636 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3637 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3638 if (NewAlign > Align) { 3639 // Give the stack frame object a larger alignment if needed. 3640 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3641 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3642 Align = NewAlign; 3643 } 3644 } 3645 3646 SmallVector<SDValue, 8> OutChains; 3647 uint64_t DstOff = 0; 3648 unsigned NumMemOps = MemOps.size(); 3649 3650 // Find the largest store and generate the bit pattern for it. 3651 EVT LargestVT = MemOps[0]; 3652 for (unsigned i = 1; i < NumMemOps; i++) 3653 if (MemOps[i].bitsGT(LargestVT)) 3654 LargestVT = MemOps[i]; 3655 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3656 3657 for (unsigned i = 0; i < NumMemOps; i++) { 3658 EVT VT = MemOps[i]; 3659 3660 // If this store is smaller than the largest store see whether we can get 3661 // the smaller value for free with a truncate. 3662 SDValue Value = MemSetValue; 3663 if (VT.bitsLT(LargestVT)) { 3664 if (!LargestVT.isVector() && !VT.isVector() && 3665 TLI.isTruncateFree(LargestVT, VT)) 3666 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3667 else 3668 Value = getMemsetValue(Src, VT, DAG, dl); 3669 } 3670 assert(Value.getValueType() == VT && "Value with wrong type."); 3671 SDValue Store = DAG.getStore(Chain, dl, Value, 3672 getMemBasePlusOffset(Dst, DstOff, DAG), 3673 DstPtrInfo.getWithOffset(DstOff), 3674 isVol, false, Align); 3675 OutChains.push_back(Store); 3676 DstOff += VT.getSizeInBits() / 8; 3677 } 3678 3679 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3680 &OutChains[0], OutChains.size()); 3681} 3682 3683SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3684 SDValue Src, SDValue Size, 3685 unsigned Align, bool isVol, bool AlwaysInline, 3686 MachinePointerInfo DstPtrInfo, 3687 MachinePointerInfo SrcPtrInfo) { 3688 3689 // Check to see if we should lower the memcpy to loads and stores first. 3690 // For cases within the target-specified limits, this is the best choice. 3691 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3692 if (ConstantSize) { 3693 // Memcpy with size zero? Just return the original chain. 3694 if (ConstantSize->isNullValue()) 3695 return Chain; 3696 3697 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3698 ConstantSize->getZExtValue(),Align, 3699 isVol, false, DstPtrInfo, SrcPtrInfo); 3700 if (Result.getNode()) 3701 return Result; 3702 } 3703 3704 // Then check to see if we should lower the memcpy with target-specific 3705 // code. If the target chooses to do this, this is the next best. 3706 SDValue Result = 3707 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3708 isVol, AlwaysInline, 3709 DstPtrInfo, SrcPtrInfo); 3710 if (Result.getNode()) 3711 return Result; 3712 3713 // If we really need inline code and the target declined to provide it, 3714 // use a (potentially long) sequence of loads and stores. 3715 if (AlwaysInline) { 3716 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3717 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3718 ConstantSize->getZExtValue(), Align, isVol, 3719 true, DstPtrInfo, SrcPtrInfo); 3720 } 3721 3722 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3723 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3724 // respect volatile, so they may do things like read or write memory 3725 // beyond the given memory regions. But fixing this isn't easy, and most 3726 // people don't care. 3727 3728 // Emit a library call. 3729 TargetLowering::ArgListTy Args; 3730 TargetLowering::ArgListEntry Entry; 3731 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3732 Entry.Node = Dst; Args.push_back(Entry); 3733 Entry.Node = Src; Args.push_back(Entry); 3734 Entry.Node = Size; Args.push_back(Entry); 3735 // FIXME: pass in DebugLoc 3736 std::pair<SDValue,SDValue> CallResult = 3737 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3738 false, false, false, false, 0, 3739 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3740 /*isReturnValueUsed=*/false, 3741 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3742 TLI.getPointerTy()), 3743 Args, *this, dl); 3744 return CallResult.second; 3745} 3746 3747SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3748 SDValue Src, SDValue Size, 3749 unsigned Align, bool isVol, 3750 MachinePointerInfo DstPtrInfo, 3751 MachinePointerInfo SrcPtrInfo) { 3752 3753 // Check to see if we should lower the memmove to loads and stores first. 3754 // For cases within the target-specified limits, this is the best choice. 3755 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3756 if (ConstantSize) { 3757 // Memmove with size zero? Just return the original chain. 3758 if (ConstantSize->isNullValue()) 3759 return Chain; 3760 3761 SDValue Result = 3762 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3763 ConstantSize->getZExtValue(), Align, isVol, 3764 false, DstPtrInfo, SrcPtrInfo); 3765 if (Result.getNode()) 3766 return Result; 3767 } 3768 3769 // Then check to see if we should lower the memmove with target-specific 3770 // code. If the target chooses to do this, this is the next best. 3771 SDValue Result = 3772 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3773 DstPtrInfo, SrcPtrInfo); 3774 if (Result.getNode()) 3775 return Result; 3776 3777 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3778 // not be safe. See memcpy above for more details. 3779 3780 // Emit a library call. 3781 TargetLowering::ArgListTy Args; 3782 TargetLowering::ArgListEntry Entry; 3783 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3784 Entry.Node = Dst; Args.push_back(Entry); 3785 Entry.Node = Src; Args.push_back(Entry); 3786 Entry.Node = Size; Args.push_back(Entry); 3787 // FIXME: pass in DebugLoc 3788 std::pair<SDValue,SDValue> CallResult = 3789 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3790 false, false, false, false, 0, 3791 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3792 /*isReturnValueUsed=*/false, 3793 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3794 TLI.getPointerTy()), 3795 Args, *this, dl); 3796 return CallResult.second; 3797} 3798 3799SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3800 SDValue Src, SDValue Size, 3801 unsigned Align, bool isVol, 3802 MachinePointerInfo DstPtrInfo) { 3803 3804 // Check to see if we should lower the memset to stores first. 3805 // For cases within the target-specified limits, this is the best choice. 3806 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3807 if (ConstantSize) { 3808 // Memset with size zero? Just return the original chain. 3809 if (ConstantSize->isNullValue()) 3810 return Chain; 3811 3812 SDValue Result = 3813 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3814 Align, isVol, DstPtrInfo); 3815 3816 if (Result.getNode()) 3817 return Result; 3818 } 3819 3820 // Then check to see if we should lower the memset with target-specific 3821 // code. If the target chooses to do this, this is the next best. 3822 SDValue Result = 3823 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3824 DstPtrInfo); 3825 if (Result.getNode()) 3826 return Result; 3827 3828 // Emit a library call. 3829 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3830 TargetLowering::ArgListTy Args; 3831 TargetLowering::ArgListEntry Entry; 3832 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3833 Args.push_back(Entry); 3834 // Extend or truncate the argument to be an i32 value for the call. 3835 if (Src.getValueType().bitsGT(MVT::i32)) 3836 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3837 else 3838 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3839 Entry.Node = Src; 3840 Entry.Ty = Type::getInt32Ty(*getContext()); 3841 Entry.isSExt = true; 3842 Args.push_back(Entry); 3843 Entry.Node = Size; 3844 Entry.Ty = IntPtrTy; 3845 Entry.isSExt = false; 3846 Args.push_back(Entry); 3847 // FIXME: pass in DebugLoc 3848 std::pair<SDValue,SDValue> CallResult = 3849 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3850 false, false, false, false, 0, 3851 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3852 /*isReturnValueUsed=*/false, 3853 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3854 TLI.getPointerTy()), 3855 Args, *this, dl); 3856 return CallResult.second; 3857} 3858 3859SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3860 SDValue Chain, SDValue Ptr, SDValue Cmp, 3861 SDValue Swp, MachinePointerInfo PtrInfo, 3862 unsigned Alignment, 3863 AtomicOrdering Ordering, 3864 SynchronizationScope SynchScope) { 3865 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3866 Alignment = getEVTAlignment(MemVT); 3867 3868 MachineFunction &MF = getMachineFunction(); 3869 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3870 3871 // For now, atomics are considered to be volatile always. 3872 // FIXME: Volatile isn't really correct; we should keep track of atomic 3873 // orderings in the memoperand. 3874 Flags |= MachineMemOperand::MOVolatile; 3875 3876 MachineMemOperand *MMO = 3877 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3878 3879 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3880 Ordering, SynchScope); 3881} 3882 3883SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3884 SDValue Chain, 3885 SDValue Ptr, SDValue Cmp, 3886 SDValue Swp, MachineMemOperand *MMO, 3887 AtomicOrdering Ordering, 3888 SynchronizationScope SynchScope) { 3889 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3890 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3891 3892 EVT VT = Cmp.getValueType(); 3893 3894 SDVTList VTs = getVTList(VT, MVT::Other); 3895 FoldingSetNodeID ID; 3896 ID.AddInteger(MemVT.getRawBits()); 3897 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3898 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3899 void* IP = 0; 3900 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3901 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3902 return SDValue(E, 0); 3903 } 3904 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3905 Ptr, Cmp, Swp, MMO, Ordering, 3906 SynchScope); 3907 CSEMap.InsertNode(N, IP); 3908 AllNodes.push_back(N); 3909 return SDValue(N, 0); 3910} 3911 3912SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3913 SDValue Chain, 3914 SDValue Ptr, SDValue Val, 3915 const Value* PtrVal, 3916 unsigned Alignment, 3917 AtomicOrdering Ordering, 3918 SynchronizationScope SynchScope) { 3919 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3920 Alignment = getEVTAlignment(MemVT); 3921 3922 MachineFunction &MF = getMachineFunction(); 3923 // A monotonic store does not load; a release store "loads" in the sense 3924 // that other stores cannot be sunk past it. 3925 // (An atomicrmw obviously both loads and stores.) 3926 unsigned Flags = MachineMemOperand::MOStore; 3927 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic) 3928 Flags |= MachineMemOperand::MOLoad; 3929 3930 // For now, atomics are considered to be volatile always. 3931 // FIXME: Volatile isn't really correct; we should keep track of atomic 3932 // orderings in the memoperand. 3933 Flags |= MachineMemOperand::MOVolatile; 3934 3935 MachineMemOperand *MMO = 3936 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3937 MemVT.getStoreSize(), Alignment); 3938 3939 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 3940 Ordering, SynchScope); 3941} 3942 3943SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3944 SDValue Chain, 3945 SDValue Ptr, SDValue Val, 3946 MachineMemOperand *MMO, 3947 AtomicOrdering Ordering, 3948 SynchronizationScope SynchScope) { 3949 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3950 Opcode == ISD::ATOMIC_LOAD_SUB || 3951 Opcode == ISD::ATOMIC_LOAD_AND || 3952 Opcode == ISD::ATOMIC_LOAD_OR || 3953 Opcode == ISD::ATOMIC_LOAD_XOR || 3954 Opcode == ISD::ATOMIC_LOAD_NAND || 3955 Opcode == ISD::ATOMIC_LOAD_MIN || 3956 Opcode == ISD::ATOMIC_LOAD_MAX || 3957 Opcode == ISD::ATOMIC_LOAD_UMIN || 3958 Opcode == ISD::ATOMIC_LOAD_UMAX || 3959 Opcode == ISD::ATOMIC_SWAP || 3960 Opcode == ISD::ATOMIC_STORE) && 3961 "Invalid Atomic Op"); 3962 3963 EVT VT = Val.getValueType(); 3964 3965 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 3966 getVTList(VT, MVT::Other); 3967 FoldingSetNodeID ID; 3968 ID.AddInteger(MemVT.getRawBits()); 3969 SDValue Ops[] = {Chain, Ptr, Val}; 3970 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3971 void* IP = 0; 3972 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3973 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3974 return SDValue(E, 0); 3975 } 3976 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3977 Ptr, Val, MMO, 3978 Ordering, SynchScope); 3979 CSEMap.InsertNode(N, IP); 3980 AllNodes.push_back(N); 3981 return SDValue(N, 0); 3982} 3983 3984SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3985 EVT VT, SDValue Chain, 3986 SDValue Ptr, 3987 const Value* PtrVal, 3988 unsigned Alignment, 3989 AtomicOrdering Ordering, 3990 SynchronizationScope SynchScope) { 3991 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3992 Alignment = getEVTAlignment(MemVT); 3993 3994 MachineFunction &MF = getMachineFunction(); 3995 // A monotonic load does not store; an acquire load "stores" in the sense 3996 // that other loads cannot be hoisted past it. 3997 unsigned Flags = MachineMemOperand::MOLoad; 3998 if (Ordering > Monotonic) 3999 Flags |= MachineMemOperand::MOStore; 4000 4001 // For now, atomics are considered to be volatile always. 4002 // FIXME: Volatile isn't really correct; we should keep track of atomic 4003 // orderings in the memoperand. 4004 Flags |= MachineMemOperand::MOVolatile; 4005 4006 MachineMemOperand *MMO = 4007 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4008 MemVT.getStoreSize(), Alignment); 4009 4010 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4011 Ordering, SynchScope); 4012} 4013 4014SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4015 EVT VT, SDValue Chain, 4016 SDValue Ptr, 4017 MachineMemOperand *MMO, 4018 AtomicOrdering Ordering, 4019 SynchronizationScope SynchScope) { 4020 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4021 4022 SDVTList VTs = getVTList(VT, MVT::Other); 4023 FoldingSetNodeID ID; 4024 ID.AddInteger(MemVT.getRawBits()); 4025 SDValue Ops[] = {Chain, Ptr}; 4026 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4027 void* IP = 0; 4028 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4029 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4030 return SDValue(E, 0); 4031 } 4032 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4033 Ptr, MMO, Ordering, SynchScope); 4034 CSEMap.InsertNode(N, IP); 4035 AllNodes.push_back(N); 4036 return SDValue(N, 0); 4037} 4038 4039/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4040SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4041 DebugLoc dl) { 4042 if (NumOps == 1) 4043 return Ops[0]; 4044 4045 SmallVector<EVT, 4> VTs; 4046 VTs.reserve(NumOps); 4047 for (unsigned i = 0; i < NumOps; ++i) 4048 VTs.push_back(Ops[i].getValueType()); 4049 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4050 Ops, NumOps); 4051} 4052 4053SDValue 4054SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4055 const EVT *VTs, unsigned NumVTs, 4056 const SDValue *Ops, unsigned NumOps, 4057 EVT MemVT, MachinePointerInfo PtrInfo, 4058 unsigned Align, bool Vol, 4059 bool ReadMem, bool WriteMem) { 4060 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4061 MemVT, PtrInfo, Align, Vol, 4062 ReadMem, WriteMem); 4063} 4064 4065SDValue 4066SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4067 const SDValue *Ops, unsigned NumOps, 4068 EVT MemVT, MachinePointerInfo PtrInfo, 4069 unsigned Align, bool Vol, 4070 bool ReadMem, bool WriteMem) { 4071 if (Align == 0) // Ensure that codegen never sees alignment 0 4072 Align = getEVTAlignment(MemVT); 4073 4074 MachineFunction &MF = getMachineFunction(); 4075 unsigned Flags = 0; 4076 if (WriteMem) 4077 Flags |= MachineMemOperand::MOStore; 4078 if (ReadMem) 4079 Flags |= MachineMemOperand::MOLoad; 4080 if (Vol) 4081 Flags |= MachineMemOperand::MOVolatile; 4082 MachineMemOperand *MMO = 4083 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4084 4085 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4086} 4087 4088SDValue 4089SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4090 const SDValue *Ops, unsigned NumOps, 4091 EVT MemVT, MachineMemOperand *MMO) { 4092 assert((Opcode == ISD::INTRINSIC_VOID || 4093 Opcode == ISD::INTRINSIC_W_CHAIN || 4094 Opcode == ISD::PREFETCH || 4095 (Opcode <= INT_MAX && 4096 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4097 "Opcode is not a memory-accessing opcode!"); 4098 4099 // Memoize the node unless it returns a flag. 4100 MemIntrinsicSDNode *N; 4101 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4102 FoldingSetNodeID ID; 4103 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4104 void *IP = 0; 4105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4106 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4107 return SDValue(E, 0); 4108 } 4109 4110 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4111 MemVT, MMO); 4112 CSEMap.InsertNode(N, IP); 4113 } else { 4114 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4115 MemVT, MMO); 4116 } 4117 AllNodes.push_back(N); 4118 return SDValue(N, 0); 4119} 4120 4121/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4122/// MachinePointerInfo record from it. This is particularly useful because the 4123/// code generator has many cases where it doesn't bother passing in a 4124/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4125static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4126 // If this is FI+Offset, we can model it. 4127 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4128 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4129 4130 // If this is (FI+Offset1)+Offset2, we can model it. 4131 if (Ptr.getOpcode() != ISD::ADD || 4132 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4133 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4134 return MachinePointerInfo(); 4135 4136 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4137 return MachinePointerInfo::getFixedStack(FI, Offset+ 4138 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4139} 4140 4141/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4142/// MachinePointerInfo record from it. This is particularly useful because the 4143/// code generator has many cases where it doesn't bother passing in a 4144/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4145static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4146 // If the 'Offset' value isn't a constant, we can't handle this. 4147 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4148 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4149 if (OffsetOp.getOpcode() == ISD::UNDEF) 4150 return InferPointerInfo(Ptr); 4151 return MachinePointerInfo(); 4152} 4153 4154 4155SDValue 4156SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4157 EVT VT, DebugLoc dl, SDValue Chain, 4158 SDValue Ptr, SDValue Offset, 4159 MachinePointerInfo PtrInfo, EVT MemVT, 4160 bool isVolatile, bool isNonTemporal, bool isInvariant, 4161 unsigned Alignment, const MDNode *TBAAInfo) { 4162 assert(Chain.getValueType() == MVT::Other && 4163 "Invalid chain type"); 4164 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4165 Alignment = getEVTAlignment(VT); 4166 4167 unsigned Flags = MachineMemOperand::MOLoad; 4168 if (isVolatile) 4169 Flags |= MachineMemOperand::MOVolatile; 4170 if (isNonTemporal) 4171 Flags |= MachineMemOperand::MONonTemporal; 4172 if (isInvariant) 4173 Flags |= MachineMemOperand::MOInvariant; 4174 4175 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4176 // clients. 4177 if (PtrInfo.V == 0) 4178 PtrInfo = InferPointerInfo(Ptr, Offset); 4179 4180 MachineFunction &MF = getMachineFunction(); 4181 MachineMemOperand *MMO = 4182 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4183 TBAAInfo); 4184 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4185} 4186 4187SDValue 4188SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4189 EVT VT, DebugLoc dl, SDValue Chain, 4190 SDValue Ptr, SDValue Offset, EVT MemVT, 4191 MachineMemOperand *MMO) { 4192 if (VT == MemVT) { 4193 ExtType = ISD::NON_EXTLOAD; 4194 } else if (ExtType == ISD::NON_EXTLOAD) { 4195 assert(VT == MemVT && "Non-extending load from different memory type!"); 4196 } else { 4197 // Extending load. 4198 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4199 "Should only be an extending load, not truncating!"); 4200 assert(VT.isInteger() == MemVT.isInteger() && 4201 "Cannot convert from FP to Int or Int -> FP!"); 4202 assert(VT.isVector() == MemVT.isVector() && 4203 "Cannot use trunc store to convert to or from a vector!"); 4204 assert((!VT.isVector() || 4205 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4206 "Cannot use trunc store to change the number of vector elements!"); 4207 } 4208 4209 bool Indexed = AM != ISD::UNINDEXED; 4210 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4211 "Unindexed load with an offset!"); 4212 4213 SDVTList VTs = Indexed ? 4214 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4215 SDValue Ops[] = { Chain, Ptr, Offset }; 4216 FoldingSetNodeID ID; 4217 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4218 ID.AddInteger(MemVT.getRawBits()); 4219 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4220 MMO->isNonTemporal(), 4221 MMO->isInvariant())); 4222 void *IP = 0; 4223 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4224 cast<LoadSDNode>(E)->refineAlignment(MMO); 4225 return SDValue(E, 0); 4226 } 4227 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4228 MemVT, MMO); 4229 CSEMap.InsertNode(N, IP); 4230 AllNodes.push_back(N); 4231 return SDValue(N, 0); 4232} 4233 4234SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4235 SDValue Chain, SDValue Ptr, 4236 MachinePointerInfo PtrInfo, 4237 bool isVolatile, bool isNonTemporal, 4238 bool isInvariant, unsigned Alignment, 4239 const MDNode *TBAAInfo) { 4240 SDValue Undef = getUNDEF(Ptr.getValueType()); 4241 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4242 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4243 TBAAInfo); 4244} 4245 4246SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4247 SDValue Chain, SDValue Ptr, 4248 MachinePointerInfo PtrInfo, EVT MemVT, 4249 bool isVolatile, bool isNonTemporal, 4250 unsigned Alignment, const MDNode *TBAAInfo) { 4251 SDValue Undef = getUNDEF(Ptr.getValueType()); 4252 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4253 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4254 TBAAInfo); 4255} 4256 4257 4258SDValue 4259SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4260 SDValue Offset, ISD::MemIndexedMode AM) { 4261 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4262 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4263 "Load is already a indexed load!"); 4264 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4265 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4266 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4267 false, LD->getAlignment()); 4268} 4269 4270SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4271 SDValue Ptr, MachinePointerInfo PtrInfo, 4272 bool isVolatile, bool isNonTemporal, 4273 unsigned Alignment, const MDNode *TBAAInfo) { 4274 assert(Chain.getValueType() == MVT::Other && 4275 "Invalid chain type"); 4276 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4277 Alignment = getEVTAlignment(Val.getValueType()); 4278 4279 unsigned Flags = MachineMemOperand::MOStore; 4280 if (isVolatile) 4281 Flags |= MachineMemOperand::MOVolatile; 4282 if (isNonTemporal) 4283 Flags |= MachineMemOperand::MONonTemporal; 4284 4285 if (PtrInfo.V == 0) 4286 PtrInfo = InferPointerInfo(Ptr); 4287 4288 MachineFunction &MF = getMachineFunction(); 4289 MachineMemOperand *MMO = 4290 MF.getMachineMemOperand(PtrInfo, Flags, 4291 Val.getValueType().getStoreSize(), Alignment, 4292 TBAAInfo); 4293 4294 return getStore(Chain, dl, Val, Ptr, MMO); 4295} 4296 4297SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4298 SDValue Ptr, MachineMemOperand *MMO) { 4299 assert(Chain.getValueType() == MVT::Other && 4300 "Invalid chain type"); 4301 EVT VT = Val.getValueType(); 4302 SDVTList VTs = getVTList(MVT::Other); 4303 SDValue Undef = getUNDEF(Ptr.getValueType()); 4304 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4305 FoldingSetNodeID ID; 4306 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4307 ID.AddInteger(VT.getRawBits()); 4308 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4309 MMO->isNonTemporal(), MMO->isInvariant())); 4310 void *IP = 0; 4311 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4312 cast<StoreSDNode>(E)->refineAlignment(MMO); 4313 return SDValue(E, 0); 4314 } 4315 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4316 false, VT, MMO); 4317 CSEMap.InsertNode(N, IP); 4318 AllNodes.push_back(N); 4319 return SDValue(N, 0); 4320} 4321 4322SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4323 SDValue Ptr, MachinePointerInfo PtrInfo, 4324 EVT SVT,bool isVolatile, bool isNonTemporal, 4325 unsigned Alignment, 4326 const MDNode *TBAAInfo) { 4327 assert(Chain.getValueType() == MVT::Other && 4328 "Invalid chain type"); 4329 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4330 Alignment = getEVTAlignment(SVT); 4331 4332 unsigned Flags = MachineMemOperand::MOStore; 4333 if (isVolatile) 4334 Flags |= MachineMemOperand::MOVolatile; 4335 if (isNonTemporal) 4336 Flags |= MachineMemOperand::MONonTemporal; 4337 4338 if (PtrInfo.V == 0) 4339 PtrInfo = InferPointerInfo(Ptr); 4340 4341 MachineFunction &MF = getMachineFunction(); 4342 MachineMemOperand *MMO = 4343 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4344 TBAAInfo); 4345 4346 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4347} 4348 4349SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4350 SDValue Ptr, EVT SVT, 4351 MachineMemOperand *MMO) { 4352 EVT VT = Val.getValueType(); 4353 4354 assert(Chain.getValueType() == MVT::Other && 4355 "Invalid chain type"); 4356 if (VT == SVT) 4357 return getStore(Chain, dl, Val, Ptr, MMO); 4358 4359 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4360 "Should only be a truncating store, not extending!"); 4361 assert(VT.isInteger() == SVT.isInteger() && 4362 "Can't do FP-INT conversion!"); 4363 assert(VT.isVector() == SVT.isVector() && 4364 "Cannot use trunc store to convert to or from a vector!"); 4365 assert((!VT.isVector() || 4366 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4367 "Cannot use trunc store to change the number of vector elements!"); 4368 4369 SDVTList VTs = getVTList(MVT::Other); 4370 SDValue Undef = getUNDEF(Ptr.getValueType()); 4371 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4372 FoldingSetNodeID ID; 4373 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4374 ID.AddInteger(SVT.getRawBits()); 4375 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4376 MMO->isNonTemporal(), MMO->isInvariant())); 4377 void *IP = 0; 4378 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4379 cast<StoreSDNode>(E)->refineAlignment(MMO); 4380 return SDValue(E, 0); 4381 } 4382 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4383 true, SVT, MMO); 4384 CSEMap.InsertNode(N, IP); 4385 AllNodes.push_back(N); 4386 return SDValue(N, 0); 4387} 4388 4389SDValue 4390SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4391 SDValue Offset, ISD::MemIndexedMode AM) { 4392 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4393 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4394 "Store is already a indexed store!"); 4395 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4396 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4397 FoldingSetNodeID ID; 4398 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4399 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4400 ID.AddInteger(ST->getRawSubclassData()); 4401 void *IP = 0; 4402 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4403 return SDValue(E, 0); 4404 4405 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4406 ST->isTruncatingStore(), 4407 ST->getMemoryVT(), 4408 ST->getMemOperand()); 4409 CSEMap.InsertNode(N, IP); 4410 AllNodes.push_back(N); 4411 return SDValue(N, 0); 4412} 4413 4414SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4415 SDValue Chain, SDValue Ptr, 4416 SDValue SV, 4417 unsigned Align) { 4418 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4419 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4420} 4421 4422SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4423 const SDUse *Ops, unsigned NumOps) { 4424 switch (NumOps) { 4425 case 0: return getNode(Opcode, DL, VT); 4426 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4427 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4428 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4429 default: break; 4430 } 4431 4432 // Copy from an SDUse array into an SDValue array for use with 4433 // the regular getNode logic. 4434 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4435 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4436} 4437 4438SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4439 const SDValue *Ops, unsigned NumOps) { 4440 switch (NumOps) { 4441 case 0: return getNode(Opcode, DL, VT); 4442 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4443 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4444 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4445 default: break; 4446 } 4447 4448 switch (Opcode) { 4449 default: break; 4450 case ISD::SELECT_CC: { 4451 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4452 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4453 "LHS and RHS of condition must have same type!"); 4454 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4455 "True and False arms of SelectCC must have same type!"); 4456 assert(Ops[2].getValueType() == VT && 4457 "select_cc node must be of same type as true and false value!"); 4458 break; 4459 } 4460 case ISD::BR_CC: { 4461 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4462 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4463 "LHS/RHS of comparison should match types!"); 4464 break; 4465 } 4466 } 4467 4468 // Memoize nodes. 4469 SDNode *N; 4470 SDVTList VTs = getVTList(VT); 4471 4472 if (VT != MVT::Glue) { 4473 FoldingSetNodeID ID; 4474 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4475 void *IP = 0; 4476 4477 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4478 return SDValue(E, 0); 4479 4480 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4481 CSEMap.InsertNode(N, IP); 4482 } else { 4483 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4484 } 4485 4486 AllNodes.push_back(N); 4487#ifndef NDEBUG 4488 VerifySDNode(N); 4489#endif 4490 return SDValue(N, 0); 4491} 4492 4493SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4494 const std::vector<EVT> &ResultTys, 4495 const SDValue *Ops, unsigned NumOps) { 4496 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4497 Ops, NumOps); 4498} 4499 4500SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4501 const EVT *VTs, unsigned NumVTs, 4502 const SDValue *Ops, unsigned NumOps) { 4503 if (NumVTs == 1) 4504 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4505 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4506} 4507 4508SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4509 const SDValue *Ops, unsigned NumOps) { 4510 if (VTList.NumVTs == 1) 4511 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4512 4513#if 0 4514 switch (Opcode) { 4515 // FIXME: figure out how to safely handle things like 4516 // int foo(int x) { return 1 << (x & 255); } 4517 // int bar() { return foo(256); } 4518 case ISD::SRA_PARTS: 4519 case ISD::SRL_PARTS: 4520 case ISD::SHL_PARTS: 4521 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4522 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4523 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4524 else if (N3.getOpcode() == ISD::AND) 4525 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4526 // If the and is only masking out bits that cannot effect the shift, 4527 // eliminate the and. 4528 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4529 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4530 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4531 } 4532 break; 4533 } 4534#endif 4535 4536 // Memoize the node unless it returns a flag. 4537 SDNode *N; 4538 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4539 FoldingSetNodeID ID; 4540 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4541 void *IP = 0; 4542 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4543 return SDValue(E, 0); 4544 4545 if (NumOps == 1) { 4546 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4547 } else if (NumOps == 2) { 4548 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4549 } else if (NumOps == 3) { 4550 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4551 Ops[2]); 4552 } else { 4553 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4554 } 4555 CSEMap.InsertNode(N, IP); 4556 } else { 4557 if (NumOps == 1) { 4558 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4559 } else if (NumOps == 2) { 4560 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4561 } else if (NumOps == 3) { 4562 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4563 Ops[2]); 4564 } else { 4565 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4566 } 4567 } 4568 AllNodes.push_back(N); 4569#ifndef NDEBUG 4570 VerifySDNode(N); 4571#endif 4572 return SDValue(N, 0); 4573} 4574 4575SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4576 return getNode(Opcode, DL, VTList, 0, 0); 4577} 4578 4579SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4580 SDValue N1) { 4581 SDValue Ops[] = { N1 }; 4582 return getNode(Opcode, DL, VTList, Ops, 1); 4583} 4584 4585SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4586 SDValue N1, SDValue N2) { 4587 SDValue Ops[] = { N1, N2 }; 4588 return getNode(Opcode, DL, VTList, Ops, 2); 4589} 4590 4591SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4592 SDValue N1, SDValue N2, SDValue N3) { 4593 SDValue Ops[] = { N1, N2, N3 }; 4594 return getNode(Opcode, DL, VTList, Ops, 3); 4595} 4596 4597SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4598 SDValue N1, SDValue N2, SDValue N3, 4599 SDValue N4) { 4600 SDValue Ops[] = { N1, N2, N3, N4 }; 4601 return getNode(Opcode, DL, VTList, Ops, 4); 4602} 4603 4604SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4605 SDValue N1, SDValue N2, SDValue N3, 4606 SDValue N4, SDValue N5) { 4607 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4608 return getNode(Opcode, DL, VTList, Ops, 5); 4609} 4610 4611SDVTList SelectionDAG::getVTList(EVT VT) { 4612 return makeVTList(SDNode::getValueTypeList(VT), 1); 4613} 4614 4615SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4616 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4617 E = VTList.rend(); I != E; ++I) 4618 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4619 return *I; 4620 4621 EVT *Array = Allocator.Allocate<EVT>(2); 4622 Array[0] = VT1; 4623 Array[1] = VT2; 4624 SDVTList Result = makeVTList(Array, 2); 4625 VTList.push_back(Result); 4626 return Result; 4627} 4628 4629SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4630 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4631 E = VTList.rend(); I != E; ++I) 4632 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4633 I->VTs[2] == VT3) 4634 return *I; 4635 4636 EVT *Array = Allocator.Allocate<EVT>(3); 4637 Array[0] = VT1; 4638 Array[1] = VT2; 4639 Array[2] = VT3; 4640 SDVTList Result = makeVTList(Array, 3); 4641 VTList.push_back(Result); 4642 return Result; 4643} 4644 4645SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4646 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4647 E = VTList.rend(); I != E; ++I) 4648 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4649 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4650 return *I; 4651 4652 EVT *Array = Allocator.Allocate<EVT>(4); 4653 Array[0] = VT1; 4654 Array[1] = VT2; 4655 Array[2] = VT3; 4656 Array[3] = VT4; 4657 SDVTList Result = makeVTList(Array, 4); 4658 VTList.push_back(Result); 4659 return Result; 4660} 4661 4662SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4663 switch (NumVTs) { 4664 case 0: llvm_unreachable("Cannot have nodes without results!"); 4665 case 1: return getVTList(VTs[0]); 4666 case 2: return getVTList(VTs[0], VTs[1]); 4667 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4668 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4669 default: break; 4670 } 4671 4672 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4673 E = VTList.rend(); I != E; ++I) { 4674 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4675 continue; 4676 4677 bool NoMatch = false; 4678 for (unsigned i = 2; i != NumVTs; ++i) 4679 if (VTs[i] != I->VTs[i]) { 4680 NoMatch = true; 4681 break; 4682 } 4683 if (!NoMatch) 4684 return *I; 4685 } 4686 4687 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4688 std::copy(VTs, VTs+NumVTs, Array); 4689 SDVTList Result = makeVTList(Array, NumVTs); 4690 VTList.push_back(Result); 4691 return Result; 4692} 4693 4694 4695/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4696/// specified operands. If the resultant node already exists in the DAG, 4697/// this does not modify the specified node, instead it returns the node that 4698/// already exists. If the resultant node does not exist in the DAG, the 4699/// input node is returned. As a degenerate case, if you specify the same 4700/// input operands as the node already has, the input node is returned. 4701SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4702 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4703 4704 // Check to see if there is no change. 4705 if (Op == N->getOperand(0)) return N; 4706 4707 // See if the modified node already exists. 4708 void *InsertPos = 0; 4709 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4710 return Existing; 4711 4712 // Nope it doesn't. Remove the node from its current place in the maps. 4713 if (InsertPos) 4714 if (!RemoveNodeFromCSEMaps(N)) 4715 InsertPos = 0; 4716 4717 // Now we update the operands. 4718 N->OperandList[0].set(Op); 4719 4720 // If this gets put into a CSE map, add it. 4721 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4722 return N; 4723} 4724 4725SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4726 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4727 4728 // Check to see if there is no change. 4729 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4730 return N; // No operands changed, just return the input node. 4731 4732 // See if the modified node already exists. 4733 void *InsertPos = 0; 4734 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4735 return Existing; 4736 4737 // Nope it doesn't. Remove the node from its current place in the maps. 4738 if (InsertPos) 4739 if (!RemoveNodeFromCSEMaps(N)) 4740 InsertPos = 0; 4741 4742 // Now we update the operands. 4743 if (N->OperandList[0] != Op1) 4744 N->OperandList[0].set(Op1); 4745 if (N->OperandList[1] != Op2) 4746 N->OperandList[1].set(Op2); 4747 4748 // If this gets put into a CSE map, add it. 4749 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4750 return N; 4751} 4752 4753SDNode *SelectionDAG:: 4754UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4755 SDValue Ops[] = { Op1, Op2, Op3 }; 4756 return UpdateNodeOperands(N, Ops, 3); 4757} 4758 4759SDNode *SelectionDAG:: 4760UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4761 SDValue Op3, SDValue Op4) { 4762 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4763 return UpdateNodeOperands(N, Ops, 4); 4764} 4765 4766SDNode *SelectionDAG:: 4767UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4768 SDValue Op3, SDValue Op4, SDValue Op5) { 4769 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4770 return UpdateNodeOperands(N, Ops, 5); 4771} 4772 4773SDNode *SelectionDAG:: 4774UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4775 assert(N->getNumOperands() == NumOps && 4776 "Update with wrong number of operands"); 4777 4778 // Check to see if there is no change. 4779 bool AnyChange = false; 4780 for (unsigned i = 0; i != NumOps; ++i) { 4781 if (Ops[i] != N->getOperand(i)) { 4782 AnyChange = true; 4783 break; 4784 } 4785 } 4786 4787 // No operands changed, just return the input node. 4788 if (!AnyChange) return N; 4789 4790 // See if the modified node already exists. 4791 void *InsertPos = 0; 4792 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4793 return Existing; 4794 4795 // Nope it doesn't. Remove the node from its current place in the maps. 4796 if (InsertPos) 4797 if (!RemoveNodeFromCSEMaps(N)) 4798 InsertPos = 0; 4799 4800 // Now we update the operands. 4801 for (unsigned i = 0; i != NumOps; ++i) 4802 if (N->OperandList[i] != Ops[i]) 4803 N->OperandList[i].set(Ops[i]); 4804 4805 // If this gets put into a CSE map, add it. 4806 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4807 return N; 4808} 4809 4810/// DropOperands - Release the operands and set this node to have 4811/// zero operands. 4812void SDNode::DropOperands() { 4813 // Unlike the code in MorphNodeTo that does this, we don't need to 4814 // watch for dead nodes here. 4815 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4816 SDUse &Use = *I++; 4817 Use.set(SDValue()); 4818 } 4819} 4820 4821/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4822/// machine opcode. 4823/// 4824SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4825 EVT VT) { 4826 SDVTList VTs = getVTList(VT); 4827 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4828} 4829 4830SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4831 EVT VT, SDValue Op1) { 4832 SDVTList VTs = getVTList(VT); 4833 SDValue Ops[] = { Op1 }; 4834 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4835} 4836 4837SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4838 EVT VT, SDValue Op1, 4839 SDValue Op2) { 4840 SDVTList VTs = getVTList(VT); 4841 SDValue Ops[] = { Op1, Op2 }; 4842 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4843} 4844 4845SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4846 EVT VT, SDValue Op1, 4847 SDValue Op2, SDValue Op3) { 4848 SDVTList VTs = getVTList(VT); 4849 SDValue Ops[] = { Op1, Op2, Op3 }; 4850 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4851} 4852 4853SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4854 EVT VT, const SDValue *Ops, 4855 unsigned NumOps) { 4856 SDVTList VTs = getVTList(VT); 4857 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4858} 4859 4860SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4861 EVT VT1, EVT VT2, const SDValue *Ops, 4862 unsigned NumOps) { 4863 SDVTList VTs = getVTList(VT1, VT2); 4864 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4865} 4866 4867SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4868 EVT VT1, EVT VT2) { 4869 SDVTList VTs = getVTList(VT1, VT2); 4870 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4871} 4872 4873SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4874 EVT VT1, EVT VT2, EVT VT3, 4875 const SDValue *Ops, unsigned NumOps) { 4876 SDVTList VTs = getVTList(VT1, VT2, VT3); 4877 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4878} 4879 4880SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4881 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4882 const SDValue *Ops, unsigned NumOps) { 4883 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4884 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4885} 4886 4887SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4888 EVT VT1, EVT VT2, 4889 SDValue Op1) { 4890 SDVTList VTs = getVTList(VT1, VT2); 4891 SDValue Ops[] = { Op1 }; 4892 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4893} 4894 4895SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4896 EVT VT1, EVT VT2, 4897 SDValue Op1, SDValue Op2) { 4898 SDVTList VTs = getVTList(VT1, VT2); 4899 SDValue Ops[] = { Op1, Op2 }; 4900 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4901} 4902 4903SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4904 EVT VT1, EVT VT2, 4905 SDValue Op1, SDValue Op2, 4906 SDValue Op3) { 4907 SDVTList VTs = getVTList(VT1, VT2); 4908 SDValue Ops[] = { Op1, Op2, Op3 }; 4909 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4910} 4911 4912SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4913 EVT VT1, EVT VT2, EVT VT3, 4914 SDValue Op1, SDValue Op2, 4915 SDValue Op3) { 4916 SDVTList VTs = getVTList(VT1, VT2, VT3); 4917 SDValue Ops[] = { Op1, Op2, Op3 }; 4918 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4919} 4920 4921SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4922 SDVTList VTs, const SDValue *Ops, 4923 unsigned NumOps) { 4924 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4925 // Reset the NodeID to -1. 4926 N->setNodeId(-1); 4927 return N; 4928} 4929 4930/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 4931/// the line number information on the merged node since it is not possible to 4932/// preserve the information that operation is associated with multiple lines. 4933/// This will make the debugger working better at -O0, were there is a higher 4934/// probability having other instructions associated with that line. 4935/// 4936SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 4937 DebugLoc NLoc = N->getDebugLoc(); 4938 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 4939 N->setDebugLoc(DebugLoc()); 4940 } 4941 return N; 4942} 4943 4944/// MorphNodeTo - This *mutates* the specified node to have the specified 4945/// return type, opcode, and operands. 4946/// 4947/// Note that MorphNodeTo returns the resultant node. If there is already a 4948/// node of the specified opcode and operands, it returns that node instead of 4949/// the current one. Note that the DebugLoc need not be the same. 4950/// 4951/// Using MorphNodeTo is faster than creating a new node and swapping it in 4952/// with ReplaceAllUsesWith both because it often avoids allocating a new 4953/// node, and because it doesn't require CSE recalculation for any of 4954/// the node's users. 4955/// 4956SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4957 SDVTList VTs, const SDValue *Ops, 4958 unsigned NumOps) { 4959 // If an identical node already exists, use it. 4960 void *IP = 0; 4961 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4962 FoldingSetNodeID ID; 4963 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4964 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4965 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 4966 } 4967 4968 if (!RemoveNodeFromCSEMaps(N)) 4969 IP = 0; 4970 4971 // Start the morphing. 4972 N->NodeType = Opc; 4973 N->ValueList = VTs.VTs; 4974 N->NumValues = VTs.NumVTs; 4975 4976 // Clear the operands list, updating used nodes to remove this from their 4977 // use list. Keep track of any operands that become dead as a result. 4978 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4979 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4980 SDUse &Use = *I++; 4981 SDNode *Used = Use.getNode(); 4982 Use.set(SDValue()); 4983 if (Used->use_empty()) 4984 DeadNodeSet.insert(Used); 4985 } 4986 4987 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4988 // Initialize the memory references information. 4989 MN->setMemRefs(0, 0); 4990 // If NumOps is larger than the # of operands we can have in a 4991 // MachineSDNode, reallocate the operand list. 4992 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4993 if (MN->OperandsNeedDelete) 4994 delete[] MN->OperandList; 4995 if (NumOps > array_lengthof(MN->LocalOperands)) 4996 // We're creating a final node that will live unmorphed for the 4997 // remainder of the current SelectionDAG iteration, so we can allocate 4998 // the operands directly out of a pool with no recycling metadata. 4999 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5000 Ops, NumOps); 5001 else 5002 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5003 MN->OperandsNeedDelete = false; 5004 } else 5005 MN->InitOperands(MN->OperandList, Ops, NumOps); 5006 } else { 5007 // If NumOps is larger than the # of operands we currently have, reallocate 5008 // the operand list. 5009 if (NumOps > N->NumOperands) { 5010 if (N->OperandsNeedDelete) 5011 delete[] N->OperandList; 5012 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5013 N->OperandsNeedDelete = true; 5014 } else 5015 N->InitOperands(N->OperandList, Ops, NumOps); 5016 } 5017 5018 // Delete any nodes that are still dead after adding the uses for the 5019 // new operands. 5020 if (!DeadNodeSet.empty()) { 5021 SmallVector<SDNode *, 16> DeadNodes; 5022 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5023 E = DeadNodeSet.end(); I != E; ++I) 5024 if ((*I)->use_empty()) 5025 DeadNodes.push_back(*I); 5026 RemoveDeadNodes(DeadNodes); 5027 } 5028 5029 if (IP) 5030 CSEMap.InsertNode(N, IP); // Memoize the new node. 5031 return N; 5032} 5033 5034 5035/// getMachineNode - These are used for target selectors to create a new node 5036/// with specified return type(s), MachineInstr opcode, and operands. 5037/// 5038/// Note that getMachineNode returns the resultant node. If there is already a 5039/// node of the specified opcode and operands, it returns that node instead of 5040/// the current one. 5041MachineSDNode * 5042SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5043 SDVTList VTs = getVTList(VT); 5044 return getMachineNode(Opcode, dl, VTs, 0, 0); 5045} 5046 5047MachineSDNode * 5048SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5049 SDVTList VTs = getVTList(VT); 5050 SDValue Ops[] = { Op1 }; 5051 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5052} 5053 5054MachineSDNode * 5055SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5056 SDValue Op1, SDValue Op2) { 5057 SDVTList VTs = getVTList(VT); 5058 SDValue Ops[] = { Op1, Op2 }; 5059 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5060} 5061 5062MachineSDNode * 5063SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5064 SDValue Op1, SDValue Op2, SDValue Op3) { 5065 SDVTList VTs = getVTList(VT); 5066 SDValue Ops[] = { Op1, Op2, Op3 }; 5067 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5068} 5069 5070MachineSDNode * 5071SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5072 const SDValue *Ops, unsigned NumOps) { 5073 SDVTList VTs = getVTList(VT); 5074 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5075} 5076 5077MachineSDNode * 5078SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5079 SDVTList VTs = getVTList(VT1, VT2); 5080 return getMachineNode(Opcode, dl, VTs, 0, 0); 5081} 5082 5083MachineSDNode * 5084SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5085 EVT VT1, EVT VT2, SDValue Op1) { 5086 SDVTList VTs = getVTList(VT1, VT2); 5087 SDValue Ops[] = { Op1 }; 5088 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5089} 5090 5091MachineSDNode * 5092SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5093 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5094 SDVTList VTs = getVTList(VT1, VT2); 5095 SDValue Ops[] = { Op1, Op2 }; 5096 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5097} 5098 5099MachineSDNode * 5100SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5101 EVT VT1, EVT VT2, SDValue Op1, 5102 SDValue Op2, SDValue Op3) { 5103 SDVTList VTs = getVTList(VT1, VT2); 5104 SDValue Ops[] = { Op1, Op2, Op3 }; 5105 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5106} 5107 5108MachineSDNode * 5109SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5110 EVT VT1, EVT VT2, 5111 const SDValue *Ops, unsigned NumOps) { 5112 SDVTList VTs = getVTList(VT1, VT2); 5113 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5114} 5115 5116MachineSDNode * 5117SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5118 EVT VT1, EVT VT2, EVT VT3, 5119 SDValue Op1, SDValue Op2) { 5120 SDVTList VTs = getVTList(VT1, VT2, VT3); 5121 SDValue Ops[] = { Op1, Op2 }; 5122 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5123} 5124 5125MachineSDNode * 5126SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5127 EVT VT1, EVT VT2, EVT VT3, 5128 SDValue Op1, SDValue Op2, SDValue Op3) { 5129 SDVTList VTs = getVTList(VT1, VT2, VT3); 5130 SDValue Ops[] = { Op1, Op2, Op3 }; 5131 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5132} 5133 5134MachineSDNode * 5135SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5136 EVT VT1, EVT VT2, EVT VT3, 5137 const SDValue *Ops, unsigned NumOps) { 5138 SDVTList VTs = getVTList(VT1, VT2, VT3); 5139 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5140} 5141 5142MachineSDNode * 5143SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5144 EVT VT2, EVT VT3, EVT VT4, 5145 const SDValue *Ops, unsigned NumOps) { 5146 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5147 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5148} 5149 5150MachineSDNode * 5151SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5152 const std::vector<EVT> &ResultTys, 5153 const SDValue *Ops, unsigned NumOps) { 5154 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5155 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5156} 5157 5158MachineSDNode * 5159SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5160 const SDValue *Ops, unsigned NumOps) { 5161 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5162 MachineSDNode *N; 5163 void *IP = 0; 5164 5165 if (DoCSE) { 5166 FoldingSetNodeID ID; 5167 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5168 IP = 0; 5169 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5170 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5171 } 5172 } 5173 5174 // Allocate a new MachineSDNode. 5175 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5176 5177 // Initialize the operands list. 5178 if (NumOps > array_lengthof(N->LocalOperands)) 5179 // We're creating a final node that will live unmorphed for the 5180 // remainder of the current SelectionDAG iteration, so we can allocate 5181 // the operands directly out of a pool with no recycling metadata. 5182 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5183 Ops, NumOps); 5184 else 5185 N->InitOperands(N->LocalOperands, Ops, NumOps); 5186 N->OperandsNeedDelete = false; 5187 5188 if (DoCSE) 5189 CSEMap.InsertNode(N, IP); 5190 5191 AllNodes.push_back(N); 5192#ifndef NDEBUG 5193 VerifyMachineNode(N); 5194#endif 5195 return N; 5196} 5197 5198/// getTargetExtractSubreg - A convenience function for creating 5199/// TargetOpcode::EXTRACT_SUBREG nodes. 5200SDValue 5201SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5202 SDValue Operand) { 5203 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5204 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5205 VT, Operand, SRIdxVal); 5206 return SDValue(Subreg, 0); 5207} 5208 5209/// getTargetInsertSubreg - A convenience function for creating 5210/// TargetOpcode::INSERT_SUBREG nodes. 5211SDValue 5212SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5213 SDValue Operand, SDValue Subreg) { 5214 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5215 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5216 VT, Operand, Subreg, SRIdxVal); 5217 return SDValue(Result, 0); 5218} 5219 5220/// getNodeIfExists - Get the specified node if it's already available, or 5221/// else return NULL. 5222SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5223 const SDValue *Ops, unsigned NumOps) { 5224 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5225 FoldingSetNodeID ID; 5226 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5227 void *IP = 0; 5228 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5229 return E; 5230 } 5231 return NULL; 5232} 5233 5234/// getDbgValue - Creates a SDDbgValue node. 5235/// 5236SDDbgValue * 5237SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5238 DebugLoc DL, unsigned O) { 5239 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5240} 5241 5242SDDbgValue * 5243SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5244 DebugLoc DL, unsigned O) { 5245 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5246} 5247 5248SDDbgValue * 5249SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5250 DebugLoc DL, unsigned O) { 5251 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5252} 5253 5254namespace { 5255 5256/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5257/// pointed to by a use iterator is deleted, increment the use iterator 5258/// so that it doesn't dangle. 5259/// 5260/// This class also manages a "downlink" DAGUpdateListener, to forward 5261/// messages to ReplaceAllUsesWith's callers. 5262/// 5263class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5264 SelectionDAG::DAGUpdateListener *DownLink; 5265 SDNode::use_iterator &UI; 5266 SDNode::use_iterator &UE; 5267 5268 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5269 // Increment the iterator as needed. 5270 while (UI != UE && N == *UI) 5271 ++UI; 5272 5273 // Then forward the message. 5274 if (DownLink) DownLink->NodeDeleted(N, E); 5275 } 5276 5277 virtual void NodeUpdated(SDNode *N) { 5278 // Just forward the message. 5279 if (DownLink) DownLink->NodeUpdated(N); 5280 } 5281 5282public: 5283 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5284 SDNode::use_iterator &ui, 5285 SDNode::use_iterator &ue) 5286 : DownLink(dl), UI(ui), UE(ue) {} 5287}; 5288 5289} 5290 5291/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5292/// This can cause recursive merging of nodes in the DAG. 5293/// 5294/// This version assumes From has a single result value. 5295/// 5296void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5297 DAGUpdateListener *UpdateListener) { 5298 SDNode *From = FromN.getNode(); 5299 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5300 "Cannot replace with this method!"); 5301 assert(From != To.getNode() && "Cannot replace uses of with self"); 5302 5303 // Iterate over all the existing uses of From. New uses will be added 5304 // to the beginning of the use list, which we avoid visiting. 5305 // This specifically avoids visiting uses of From that arise while the 5306 // replacement is happening, because any such uses would be the result 5307 // of CSE: If an existing node looks like From after one of its operands 5308 // is replaced by To, we don't want to replace of all its users with To 5309 // too. See PR3018 for more info. 5310 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5311 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5312 while (UI != UE) { 5313 SDNode *User = *UI; 5314 5315 // This node is about to morph, remove its old self from the CSE maps. 5316 RemoveNodeFromCSEMaps(User); 5317 5318 // A user can appear in a use list multiple times, and when this 5319 // happens the uses are usually next to each other in the list. 5320 // To help reduce the number of CSE recomputations, process all 5321 // the uses of this user that we can find this way. 5322 do { 5323 SDUse &Use = UI.getUse(); 5324 ++UI; 5325 Use.set(To); 5326 } while (UI != UE && *UI == User); 5327 5328 // Now that we have modified User, add it back to the CSE maps. If it 5329 // already exists there, recursively merge the results together. 5330 AddModifiedNodeToCSEMaps(User, &Listener); 5331 } 5332 5333 // If we just RAUW'd the root, take note. 5334 if (FromN == getRoot()) 5335 setRoot(To); 5336} 5337 5338/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5339/// This can cause recursive merging of nodes in the DAG. 5340/// 5341/// This version assumes that for each value of From, there is a 5342/// corresponding value in To in the same position with the same type. 5343/// 5344void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5345 DAGUpdateListener *UpdateListener) { 5346#ifndef NDEBUG 5347 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5348 assert((!From->hasAnyUseOfValue(i) || 5349 From->getValueType(i) == To->getValueType(i)) && 5350 "Cannot use this version of ReplaceAllUsesWith!"); 5351#endif 5352 5353 // Handle the trivial case. 5354 if (From == To) 5355 return; 5356 5357 // Iterate over just the existing users of From. See the comments in 5358 // the ReplaceAllUsesWith above. 5359 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5360 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5361 while (UI != UE) { 5362 SDNode *User = *UI; 5363 5364 // This node is about to morph, remove its old self from the CSE maps. 5365 RemoveNodeFromCSEMaps(User); 5366 5367 // A user can appear in a use list multiple times, and when this 5368 // happens the uses are usually next to each other in the list. 5369 // To help reduce the number of CSE recomputations, process all 5370 // the uses of this user that we can find this way. 5371 do { 5372 SDUse &Use = UI.getUse(); 5373 ++UI; 5374 Use.setNode(To); 5375 } while (UI != UE && *UI == User); 5376 5377 // Now that we have modified User, add it back to the CSE maps. If it 5378 // already exists there, recursively merge the results together. 5379 AddModifiedNodeToCSEMaps(User, &Listener); 5380 } 5381 5382 // If we just RAUW'd the root, take note. 5383 if (From == getRoot().getNode()) 5384 setRoot(SDValue(To, getRoot().getResNo())); 5385} 5386 5387/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5388/// This can cause recursive merging of nodes in the DAG. 5389/// 5390/// This version can replace From with any result values. To must match the 5391/// number and types of values returned by From. 5392void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5393 const SDValue *To, 5394 DAGUpdateListener *UpdateListener) { 5395 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5396 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5397 5398 // Iterate over just the existing users of From. See the comments in 5399 // the ReplaceAllUsesWith above. 5400 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5401 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5402 while (UI != UE) { 5403 SDNode *User = *UI; 5404 5405 // This node is about to morph, remove its old self from the CSE maps. 5406 RemoveNodeFromCSEMaps(User); 5407 5408 // A user can appear in a use list multiple times, and when this 5409 // happens the uses are usually next to each other in the list. 5410 // To help reduce the number of CSE recomputations, process all 5411 // the uses of this user that we can find this way. 5412 do { 5413 SDUse &Use = UI.getUse(); 5414 const SDValue &ToOp = To[Use.getResNo()]; 5415 ++UI; 5416 Use.set(ToOp); 5417 } while (UI != UE && *UI == User); 5418 5419 // Now that we have modified User, add it back to the CSE maps. If it 5420 // already exists there, recursively merge the results together. 5421 AddModifiedNodeToCSEMaps(User, &Listener); 5422 } 5423 5424 // If we just RAUW'd the root, take note. 5425 if (From == getRoot().getNode()) 5426 setRoot(SDValue(To[getRoot().getResNo()])); 5427} 5428 5429/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5430/// uses of other values produced by From.getNode() alone. The Deleted 5431/// vector is handled the same way as for ReplaceAllUsesWith. 5432void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5433 DAGUpdateListener *UpdateListener){ 5434 // Handle the really simple, really trivial case efficiently. 5435 if (From == To) return; 5436 5437 // Handle the simple, trivial, case efficiently. 5438 if (From.getNode()->getNumValues() == 1) { 5439 ReplaceAllUsesWith(From, To, UpdateListener); 5440 return; 5441 } 5442 5443 // Iterate over just the existing users of From. See the comments in 5444 // the ReplaceAllUsesWith above. 5445 SDNode::use_iterator UI = From.getNode()->use_begin(), 5446 UE = From.getNode()->use_end(); 5447 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5448 while (UI != UE) { 5449 SDNode *User = *UI; 5450 bool UserRemovedFromCSEMaps = false; 5451 5452 // A user can appear in a use list multiple times, and when this 5453 // happens the uses are usually next to each other in the list. 5454 // To help reduce the number of CSE recomputations, process all 5455 // the uses of this user that we can find this way. 5456 do { 5457 SDUse &Use = UI.getUse(); 5458 5459 // Skip uses of different values from the same node. 5460 if (Use.getResNo() != From.getResNo()) { 5461 ++UI; 5462 continue; 5463 } 5464 5465 // If this node hasn't been modified yet, it's still in the CSE maps, 5466 // so remove its old self from the CSE maps. 5467 if (!UserRemovedFromCSEMaps) { 5468 RemoveNodeFromCSEMaps(User); 5469 UserRemovedFromCSEMaps = true; 5470 } 5471 5472 ++UI; 5473 Use.set(To); 5474 } while (UI != UE && *UI == User); 5475 5476 // We are iterating over all uses of the From node, so if a use 5477 // doesn't use the specific value, no changes are made. 5478 if (!UserRemovedFromCSEMaps) 5479 continue; 5480 5481 // Now that we have modified User, add it back to the CSE maps. If it 5482 // already exists there, recursively merge the results together. 5483 AddModifiedNodeToCSEMaps(User, &Listener); 5484 } 5485 5486 // If we just RAUW'd the root, take note. 5487 if (From == getRoot()) 5488 setRoot(To); 5489} 5490 5491namespace { 5492 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5493 /// to record information about a use. 5494 struct UseMemo { 5495 SDNode *User; 5496 unsigned Index; 5497 SDUse *Use; 5498 }; 5499 5500 /// operator< - Sort Memos by User. 5501 bool operator<(const UseMemo &L, const UseMemo &R) { 5502 return (intptr_t)L.User < (intptr_t)R.User; 5503 } 5504} 5505 5506/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5507/// uses of other values produced by From.getNode() alone. The same value 5508/// may appear in both the From and To list. The Deleted vector is 5509/// handled the same way as for ReplaceAllUsesWith. 5510void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5511 const SDValue *To, 5512 unsigned Num, 5513 DAGUpdateListener *UpdateListener){ 5514 // Handle the simple, trivial case efficiently. 5515 if (Num == 1) 5516 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5517 5518 // Read up all the uses and make records of them. This helps 5519 // processing new uses that are introduced during the 5520 // replacement process. 5521 SmallVector<UseMemo, 4> Uses; 5522 for (unsigned i = 0; i != Num; ++i) { 5523 unsigned FromResNo = From[i].getResNo(); 5524 SDNode *FromNode = From[i].getNode(); 5525 for (SDNode::use_iterator UI = FromNode->use_begin(), 5526 E = FromNode->use_end(); UI != E; ++UI) { 5527 SDUse &Use = UI.getUse(); 5528 if (Use.getResNo() == FromResNo) { 5529 UseMemo Memo = { *UI, i, &Use }; 5530 Uses.push_back(Memo); 5531 } 5532 } 5533 } 5534 5535 // Sort the uses, so that all the uses from a given User are together. 5536 std::sort(Uses.begin(), Uses.end()); 5537 5538 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5539 UseIndex != UseIndexEnd; ) { 5540 // We know that this user uses some value of From. If it is the right 5541 // value, update it. 5542 SDNode *User = Uses[UseIndex].User; 5543 5544 // This node is about to morph, remove its old self from the CSE maps. 5545 RemoveNodeFromCSEMaps(User); 5546 5547 // The Uses array is sorted, so all the uses for a given User 5548 // are next to each other in the list. 5549 // To help reduce the number of CSE recomputations, process all 5550 // the uses of this user that we can find this way. 5551 do { 5552 unsigned i = Uses[UseIndex].Index; 5553 SDUse &Use = *Uses[UseIndex].Use; 5554 ++UseIndex; 5555 5556 Use.set(To[i]); 5557 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5558 5559 // Now that we have modified User, add it back to the CSE maps. If it 5560 // already exists there, recursively merge the results together. 5561 AddModifiedNodeToCSEMaps(User, UpdateListener); 5562 } 5563} 5564 5565/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5566/// based on their topological order. It returns the maximum id and a vector 5567/// of the SDNodes* in assigned order by reference. 5568unsigned SelectionDAG::AssignTopologicalOrder() { 5569 5570 unsigned DAGSize = 0; 5571 5572 // SortedPos tracks the progress of the algorithm. Nodes before it are 5573 // sorted, nodes after it are unsorted. When the algorithm completes 5574 // it is at the end of the list. 5575 allnodes_iterator SortedPos = allnodes_begin(); 5576 5577 // Visit all the nodes. Move nodes with no operands to the front of 5578 // the list immediately. Annotate nodes that do have operands with their 5579 // operand count. Before we do this, the Node Id fields of the nodes 5580 // may contain arbitrary values. After, the Node Id fields for nodes 5581 // before SortedPos will contain the topological sort index, and the 5582 // Node Id fields for nodes At SortedPos and after will contain the 5583 // count of outstanding operands. 5584 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5585 SDNode *N = I++; 5586 checkForCycles(N); 5587 unsigned Degree = N->getNumOperands(); 5588 if (Degree == 0) { 5589 // A node with no uses, add it to the result array immediately. 5590 N->setNodeId(DAGSize++); 5591 allnodes_iterator Q = N; 5592 if (Q != SortedPos) 5593 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5594 assert(SortedPos != AllNodes.end() && "Overran node list"); 5595 ++SortedPos; 5596 } else { 5597 // Temporarily use the Node Id as scratch space for the degree count. 5598 N->setNodeId(Degree); 5599 } 5600 } 5601 5602 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5603 // such that by the time the end is reached all nodes will be sorted. 5604 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5605 SDNode *N = I; 5606 checkForCycles(N); 5607 // N is in sorted position, so all its uses have one less operand 5608 // that needs to be sorted. 5609 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5610 UI != UE; ++UI) { 5611 SDNode *P = *UI; 5612 unsigned Degree = P->getNodeId(); 5613 assert(Degree != 0 && "Invalid node degree"); 5614 --Degree; 5615 if (Degree == 0) { 5616 // All of P's operands are sorted, so P may sorted now. 5617 P->setNodeId(DAGSize++); 5618 if (P != SortedPos) 5619 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5620 assert(SortedPos != AllNodes.end() && "Overran node list"); 5621 ++SortedPos; 5622 } else { 5623 // Update P's outstanding operand count. 5624 P->setNodeId(Degree); 5625 } 5626 } 5627 if (I == SortedPos) { 5628#ifndef NDEBUG 5629 SDNode *S = ++I; 5630 dbgs() << "Overran sorted position:\n"; 5631 S->dumprFull(); 5632#endif 5633 llvm_unreachable(0); 5634 } 5635 } 5636 5637 assert(SortedPos == AllNodes.end() && 5638 "Topological sort incomplete!"); 5639 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5640 "First node in topological sort is not the entry token!"); 5641 assert(AllNodes.front().getNodeId() == 0 && 5642 "First node in topological sort has non-zero id!"); 5643 assert(AllNodes.front().getNumOperands() == 0 && 5644 "First node in topological sort has operands!"); 5645 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5646 "Last node in topologic sort has unexpected id!"); 5647 assert(AllNodes.back().use_empty() && 5648 "Last node in topologic sort has users!"); 5649 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5650 return DAGSize; 5651} 5652 5653/// AssignOrdering - Assign an order to the SDNode. 5654void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5655 assert(SD && "Trying to assign an order to a null node!"); 5656 Ordering->add(SD, Order); 5657} 5658 5659/// GetOrdering - Get the order for the SDNode. 5660unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5661 assert(SD && "Trying to get the order of a null node!"); 5662 return Ordering->getOrder(SD); 5663} 5664 5665/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5666/// value is produced by SD. 5667void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5668 DbgInfo->add(DB, SD, isParameter); 5669 if (SD) 5670 SD->setHasDebugValue(true); 5671} 5672 5673/// TransferDbgValues - Transfer SDDbgValues. 5674void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5675 if (From == To || !From.getNode()->getHasDebugValue()) 5676 return; 5677 SDNode *FromNode = From.getNode(); 5678 SDNode *ToNode = To.getNode(); 5679 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5680 SmallVector<SDDbgValue *, 2> ClonedDVs; 5681 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5682 I != E; ++I) { 5683 SDDbgValue *Dbg = *I; 5684 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5685 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5686 Dbg->getOffset(), Dbg->getDebugLoc(), 5687 Dbg->getOrder()); 5688 ClonedDVs.push_back(Clone); 5689 } 5690 } 5691 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5692 E = ClonedDVs.end(); I != E; ++I) 5693 AddDbgValue(*I, ToNode, false); 5694} 5695 5696//===----------------------------------------------------------------------===// 5697// SDNode Class 5698//===----------------------------------------------------------------------===// 5699 5700HandleSDNode::~HandleSDNode() { 5701 DropOperands(); 5702} 5703 5704GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5705 const GlobalValue *GA, 5706 EVT VT, int64_t o, unsigned char TF) 5707 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5708 TheGlobal = GA; 5709} 5710 5711MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5712 MachineMemOperand *mmo) 5713 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5714 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5715 MMO->isNonTemporal(), MMO->isInvariant()); 5716 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5717 assert(isNonTemporal() == MMO->isNonTemporal() && 5718 "Non-temporal encoding error!"); 5719 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5720} 5721 5722MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5723 const SDValue *Ops, unsigned NumOps, EVT memvt, 5724 MachineMemOperand *mmo) 5725 : SDNode(Opc, dl, VTs, Ops, NumOps), 5726 MemoryVT(memvt), MMO(mmo) { 5727 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5728 MMO->isNonTemporal(), MMO->isInvariant()); 5729 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5730 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5731} 5732 5733/// Profile - Gather unique data for the node. 5734/// 5735void SDNode::Profile(FoldingSetNodeID &ID) const { 5736 AddNodeIDNode(ID, this); 5737} 5738 5739namespace { 5740 struct EVTArray { 5741 std::vector<EVT> VTs; 5742 5743 EVTArray() { 5744 VTs.reserve(MVT::LAST_VALUETYPE); 5745 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5746 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5747 } 5748 }; 5749} 5750 5751static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5752static ManagedStatic<EVTArray> SimpleVTArray; 5753static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5754 5755/// getValueTypeList - Return a pointer to the specified value type. 5756/// 5757const EVT *SDNode::getValueTypeList(EVT VT) { 5758 if (VT.isExtended()) { 5759 sys::SmartScopedLock<true> Lock(*VTMutex); 5760 return &(*EVTs->insert(VT).first); 5761 } else { 5762 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5763 "Value type out of range!"); 5764 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5765 } 5766} 5767 5768/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5769/// indicated value. This method ignores uses of other values defined by this 5770/// operation. 5771bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5772 assert(Value < getNumValues() && "Bad value!"); 5773 5774 // TODO: Only iterate over uses of a given value of the node 5775 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5776 if (UI.getUse().getResNo() == Value) { 5777 if (NUses == 0) 5778 return false; 5779 --NUses; 5780 } 5781 } 5782 5783 // Found exactly the right number of uses? 5784 return NUses == 0; 5785} 5786 5787 5788/// hasAnyUseOfValue - Return true if there are any use of the indicated 5789/// value. This method ignores uses of other values defined by this operation. 5790bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5791 assert(Value < getNumValues() && "Bad value!"); 5792 5793 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5794 if (UI.getUse().getResNo() == Value) 5795 return true; 5796 5797 return false; 5798} 5799 5800 5801/// isOnlyUserOf - Return true if this node is the only use of N. 5802/// 5803bool SDNode::isOnlyUserOf(SDNode *N) const { 5804 bool Seen = false; 5805 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5806 SDNode *User = *I; 5807 if (User == this) 5808 Seen = true; 5809 else 5810 return false; 5811 } 5812 5813 return Seen; 5814} 5815 5816/// isOperand - Return true if this node is an operand of N. 5817/// 5818bool SDValue::isOperandOf(SDNode *N) const { 5819 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5820 if (*this == N->getOperand(i)) 5821 return true; 5822 return false; 5823} 5824 5825bool SDNode::isOperandOf(SDNode *N) const { 5826 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5827 if (this == N->OperandList[i].getNode()) 5828 return true; 5829 return false; 5830} 5831 5832/// reachesChainWithoutSideEffects - Return true if this operand (which must 5833/// be a chain) reaches the specified operand without crossing any 5834/// side-effecting instructions on any chain path. In practice, this looks 5835/// through token factors and non-volatile loads. In order to remain efficient, 5836/// this only looks a couple of nodes in, it does not do an exhaustive search. 5837bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5838 unsigned Depth) const { 5839 if (*this == Dest) return true; 5840 5841 // Don't search too deeply, we just want to be able to see through 5842 // TokenFactor's etc. 5843 if (Depth == 0) return false; 5844 5845 // If this is a token factor, all inputs to the TF happen in parallel. If any 5846 // of the operands of the TF does not reach dest, then we cannot do the xform. 5847 if (getOpcode() == ISD::TokenFactor) { 5848 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5849 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5850 return false; 5851 return true; 5852 } 5853 5854 // Loads don't have side effects, look through them. 5855 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5856 if (!Ld->isVolatile()) 5857 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5858 } 5859 return false; 5860} 5861 5862/// hasPredecessor - Return true if N is a predecessor of this node. 5863/// N is either an operand of this node, or can be reached by recursively 5864/// traversing up the operands. 5865/// NOTE: This is an expensive method. Use it carefully. 5866bool SDNode::hasPredecessor(const SDNode *N) const { 5867 SmallPtrSet<const SDNode *, 32> Visited; 5868 SmallVector<const SDNode *, 16> Worklist; 5869 return hasPredecessorHelper(N, Visited, Worklist); 5870} 5871 5872bool SDNode::hasPredecessorHelper(const SDNode *N, 5873 SmallPtrSet<const SDNode *, 32> &Visited, 5874 SmallVector<const SDNode *, 16> &Worklist) const { 5875 if (Visited.empty()) { 5876 Worklist.push_back(this); 5877 } else { 5878 // Take a look in the visited set. If we've already encountered this node 5879 // we needn't search further. 5880 if (Visited.count(N)) 5881 return true; 5882 } 5883 5884 // Haven't visited N yet. Continue the search. 5885 while (!Worklist.empty()) { 5886 const SDNode *M = Worklist.pop_back_val(); 5887 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5888 SDNode *Op = M->getOperand(i).getNode(); 5889 if (Visited.insert(Op)) 5890 Worklist.push_back(Op); 5891 if (Op == N) 5892 return true; 5893 } 5894 } 5895 5896 return false; 5897} 5898 5899uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5900 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5901 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5902} 5903 5904std::string SDNode::getOperationName(const SelectionDAG *G) const { 5905 switch (getOpcode()) { 5906 default: 5907 if (getOpcode() < ISD::BUILTIN_OP_END) 5908 return "<<Unknown DAG Node>>"; 5909 if (isMachineOpcode()) { 5910 if (G) 5911 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5912 if (getMachineOpcode() < TII->getNumOpcodes()) 5913 return TII->getName(getMachineOpcode()); 5914 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5915 } 5916 if (G) { 5917 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5918 const char *Name = TLI.getTargetNodeName(getOpcode()); 5919 if (Name) return Name; 5920 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5921 } 5922 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5923 5924#ifndef NDEBUG 5925 case ISD::DELETED_NODE: 5926 return "<<Deleted Node!>>"; 5927#endif 5928 case ISD::PREFETCH: return "Prefetch"; 5929 case ISD::MEMBARRIER: return "MemBarrier"; 5930 case ISD::ATOMIC_FENCE: return "AtomicFence"; 5931 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5932 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5933 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5934 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5935 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5936 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5937 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5938 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5939 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5940 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5941 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5942 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5943 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 5944 case ISD::ATOMIC_STORE: return "AtomicStore"; 5945 case ISD::PCMARKER: return "PCMarker"; 5946 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5947 case ISD::SRCVALUE: return "SrcValue"; 5948 case ISD::MDNODE_SDNODE: return "MDNode"; 5949 case ISD::EntryToken: return "EntryToken"; 5950 case ISD::TokenFactor: return "TokenFactor"; 5951 case ISD::AssertSext: return "AssertSext"; 5952 case ISD::AssertZext: return "AssertZext"; 5953 5954 case ISD::BasicBlock: return "BasicBlock"; 5955 case ISD::VALUETYPE: return "ValueType"; 5956 case ISD::Register: return "Register"; 5957 case ISD::RegisterMask: return "RegisterMask"; 5958 case ISD::Constant: return "Constant"; 5959 case ISD::ConstantFP: return "ConstantFP"; 5960 case ISD::GlobalAddress: return "GlobalAddress"; 5961 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5962 case ISD::FrameIndex: return "FrameIndex"; 5963 case ISD::JumpTable: return "JumpTable"; 5964 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5965 case ISD::RETURNADDR: return "RETURNADDR"; 5966 case ISD::FRAMEADDR: return "FRAMEADDR"; 5967 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5968 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5969 case ISD::LSDAADDR: return "LSDAADDR"; 5970 case ISD::EHSELECTION: return "EHSELECTION"; 5971 case ISD::EH_RETURN: return "EH_RETURN"; 5972 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5973 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5974 case ISD::ConstantPool: return "ConstantPool"; 5975 case ISD::ExternalSymbol: return "ExternalSymbol"; 5976 case ISD::BlockAddress: return "BlockAddress"; 5977 case ISD::INTRINSIC_WO_CHAIN: 5978 case ISD::INTRINSIC_VOID: 5979 case ISD::INTRINSIC_W_CHAIN: { 5980 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5981 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5982 if (IID < Intrinsic::num_intrinsics) 5983 return Intrinsic::getName((Intrinsic::ID)IID); 5984 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5985 return TII->getName(IID); 5986 llvm_unreachable("Invalid intrinsic ID"); 5987 } 5988 5989 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5990 case ISD::TargetConstant: return "TargetConstant"; 5991 case ISD::TargetConstantFP:return "TargetConstantFP"; 5992 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5993 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5994 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5995 case ISD::TargetJumpTable: return "TargetJumpTable"; 5996 case ISD::TargetConstantPool: return "TargetConstantPool"; 5997 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5998 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5999 6000 case ISD::CopyToReg: return "CopyToReg"; 6001 case ISD::CopyFromReg: return "CopyFromReg"; 6002 case ISD::UNDEF: return "undef"; 6003 case ISD::MERGE_VALUES: return "merge_values"; 6004 case ISD::INLINEASM: return "inlineasm"; 6005 case ISD::EH_LABEL: return "eh_label"; 6006 case ISD::HANDLENODE: return "handlenode"; 6007 6008 // Unary operators 6009 case ISD::FABS: return "fabs"; 6010 case ISD::FNEG: return "fneg"; 6011 case ISD::FSQRT: return "fsqrt"; 6012 case ISD::FSIN: return "fsin"; 6013 case ISD::FCOS: return "fcos"; 6014 case ISD::FTRUNC: return "ftrunc"; 6015 case ISD::FFLOOR: return "ffloor"; 6016 case ISD::FCEIL: return "fceil"; 6017 case ISD::FRINT: return "frint"; 6018 case ISD::FNEARBYINT: return "fnearbyint"; 6019 case ISD::FEXP: return "fexp"; 6020 case ISD::FEXP2: return "fexp2"; 6021 case ISD::FLOG: return "flog"; 6022 case ISD::FLOG2: return "flog2"; 6023 case ISD::FLOG10: return "flog10"; 6024 6025 // Binary operators 6026 case ISD::ADD: return "add"; 6027 case ISD::SUB: return "sub"; 6028 case ISD::MUL: return "mul"; 6029 case ISD::MULHU: return "mulhu"; 6030 case ISD::MULHS: return "mulhs"; 6031 case ISD::SDIV: return "sdiv"; 6032 case ISD::UDIV: return "udiv"; 6033 case ISD::SREM: return "srem"; 6034 case ISD::UREM: return "urem"; 6035 case ISD::SMUL_LOHI: return "smul_lohi"; 6036 case ISD::UMUL_LOHI: return "umul_lohi"; 6037 case ISD::SDIVREM: return "sdivrem"; 6038 case ISD::UDIVREM: return "udivrem"; 6039 case ISD::AND: return "and"; 6040 case ISD::OR: return "or"; 6041 case ISD::XOR: return "xor"; 6042 case ISD::SHL: return "shl"; 6043 case ISD::SRA: return "sra"; 6044 case ISD::SRL: return "srl"; 6045 case ISD::ROTL: return "rotl"; 6046 case ISD::ROTR: return "rotr"; 6047 case ISD::FADD: return "fadd"; 6048 case ISD::FSUB: return "fsub"; 6049 case ISD::FMUL: return "fmul"; 6050 case ISD::FDIV: return "fdiv"; 6051 case ISD::FMA: return "fma"; 6052 case ISD::FREM: return "frem"; 6053 case ISD::FCOPYSIGN: return "fcopysign"; 6054 case ISD::FGETSIGN: return "fgetsign"; 6055 case ISD::FPOW: return "fpow"; 6056 6057 case ISD::FPOWI: return "fpowi"; 6058 case ISD::SETCC: return "setcc"; 6059 case ISD::SELECT: return "select"; 6060 case ISD::VSELECT: return "vselect"; 6061 case ISD::SELECT_CC: return "select_cc"; 6062 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 6063 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 6064 case ISD::CONCAT_VECTORS: return "concat_vectors"; 6065 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 6066 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 6067 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 6068 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 6069 case ISD::CARRY_FALSE: return "carry_false"; 6070 case ISD::ADDC: return "addc"; 6071 case ISD::ADDE: return "adde"; 6072 case ISD::SADDO: return "saddo"; 6073 case ISD::UADDO: return "uaddo"; 6074 case ISD::SSUBO: return "ssubo"; 6075 case ISD::USUBO: return "usubo"; 6076 case ISD::SMULO: return "smulo"; 6077 case ISD::UMULO: return "umulo"; 6078 case ISD::SUBC: return "subc"; 6079 case ISD::SUBE: return "sube"; 6080 case ISD::SHL_PARTS: return "shl_parts"; 6081 case ISD::SRA_PARTS: return "sra_parts"; 6082 case ISD::SRL_PARTS: return "srl_parts"; 6083 6084 // Conversion operators. 6085 case ISD::SIGN_EXTEND: return "sign_extend"; 6086 case ISD::ZERO_EXTEND: return "zero_extend"; 6087 case ISD::ANY_EXTEND: return "any_extend"; 6088 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 6089 case ISD::TRUNCATE: return "truncate"; 6090 case ISD::FP_ROUND: return "fp_round"; 6091 case ISD::FLT_ROUNDS_: return "flt_rounds"; 6092 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 6093 case ISD::FP_EXTEND: return "fp_extend"; 6094 6095 case ISD::SINT_TO_FP: return "sint_to_fp"; 6096 case ISD::UINT_TO_FP: return "uint_to_fp"; 6097 case ISD::FP_TO_SINT: return "fp_to_sint"; 6098 case ISD::FP_TO_UINT: return "fp_to_uint"; 6099 case ISD::BITCAST: return "bitcast"; 6100 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 6101 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 6102 6103 case ISD::CONVERT_RNDSAT: { 6104 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 6105 default: llvm_unreachable("Unknown cvt code!"); 6106 case ISD::CVT_FF: return "cvt_ff"; 6107 case ISD::CVT_FS: return "cvt_fs"; 6108 case ISD::CVT_FU: return "cvt_fu"; 6109 case ISD::CVT_SF: return "cvt_sf"; 6110 case ISD::CVT_UF: return "cvt_uf"; 6111 case ISD::CVT_SS: return "cvt_ss"; 6112 case ISD::CVT_SU: return "cvt_su"; 6113 case ISD::CVT_US: return "cvt_us"; 6114 case ISD::CVT_UU: return "cvt_uu"; 6115 } 6116 } 6117 6118 // Control flow instructions 6119 case ISD::BR: return "br"; 6120 case ISD::BRIND: return "brind"; 6121 case ISD::BR_JT: return "br_jt"; 6122 case ISD::BRCOND: return "brcond"; 6123 case ISD::BR_CC: return "br_cc"; 6124 case ISD::CALLSEQ_START: return "callseq_start"; 6125 case ISD::CALLSEQ_END: return "callseq_end"; 6126 6127 // Other operators 6128 case ISD::LOAD: return "load"; 6129 case ISD::STORE: return "store"; 6130 case ISD::VAARG: return "vaarg"; 6131 case ISD::VACOPY: return "vacopy"; 6132 case ISD::VAEND: return "vaend"; 6133 case ISD::VASTART: return "vastart"; 6134 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 6135 case ISD::EXTRACT_ELEMENT: return "extract_element"; 6136 case ISD::BUILD_PAIR: return "build_pair"; 6137 case ISD::STACKSAVE: return "stacksave"; 6138 case ISD::STACKRESTORE: return "stackrestore"; 6139 case ISD::TRAP: return "trap"; 6140 6141 // Bit manipulation 6142 case ISD::BSWAP: return "bswap"; 6143 case ISD::CTPOP: return "ctpop"; 6144 case ISD::CTTZ: return "cttz"; 6145 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 6146 case ISD::CTLZ: return "ctlz"; 6147 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 6148 6149 // Trampolines 6150 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 6151 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 6152 6153 case ISD::CONDCODE: 6154 switch (cast<CondCodeSDNode>(this)->get()) { 6155 default: llvm_unreachable("Unknown setcc condition!"); 6156 case ISD::SETOEQ: return "setoeq"; 6157 case ISD::SETOGT: return "setogt"; 6158 case ISD::SETOGE: return "setoge"; 6159 case ISD::SETOLT: return "setolt"; 6160 case ISD::SETOLE: return "setole"; 6161 case ISD::SETONE: return "setone"; 6162 6163 case ISD::SETO: return "seto"; 6164 case ISD::SETUO: return "setuo"; 6165 case ISD::SETUEQ: return "setue"; 6166 case ISD::SETUGT: return "setugt"; 6167 case ISD::SETUGE: return "setuge"; 6168 case ISD::SETULT: return "setult"; 6169 case ISD::SETULE: return "setule"; 6170 case ISD::SETUNE: return "setune"; 6171 6172 case ISD::SETEQ: return "seteq"; 6173 case ISD::SETGT: return "setgt"; 6174 case ISD::SETGE: return "setge"; 6175 case ISD::SETLT: return "setlt"; 6176 case ISD::SETLE: return "setle"; 6177 case ISD::SETNE: return "setne"; 6178 6179 case ISD::SETTRUE: return "settrue"; 6180 case ISD::SETTRUE2: return "settrue2"; 6181 case ISD::SETFALSE: return "setfalse"; 6182 case ISD::SETFALSE2: return "setfalse2"; 6183 } 6184 } 6185} 6186 6187const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 6188 switch (AM) { 6189 default: 6190 return ""; 6191 case ISD::PRE_INC: 6192 return "<pre-inc>"; 6193 case ISD::PRE_DEC: 6194 return "<pre-dec>"; 6195 case ISD::POST_INC: 6196 return "<post-inc>"; 6197 case ISD::POST_DEC: 6198 return "<post-dec>"; 6199 } 6200} 6201 6202std::string ISD::ArgFlagsTy::getArgFlagsString() { 6203 std::string S = "< "; 6204 6205 if (isZExt()) 6206 S += "zext "; 6207 if (isSExt()) 6208 S += "sext "; 6209 if (isInReg()) 6210 S += "inreg "; 6211 if (isSRet()) 6212 S += "sret "; 6213 if (isByVal()) 6214 S += "byval "; 6215 if (isNest()) 6216 S += "nest "; 6217 if (getByValAlign()) 6218 S += "byval-align:" + utostr(getByValAlign()) + " "; 6219 if (getOrigAlign()) 6220 S += "orig-align:" + utostr(getOrigAlign()) + " "; 6221 if (getByValSize()) 6222 S += "byval-size:" + utostr(getByValSize()) + " "; 6223 return S + ">"; 6224} 6225 6226void SDNode::dump() const { dump(0); } 6227void SDNode::dump(const SelectionDAG *G) const { 6228 print(dbgs(), G); 6229 dbgs() << '\n'; 6230} 6231 6232void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 6233 OS << (void*)this << ": "; 6234 6235 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 6236 if (i) OS << ","; 6237 if (getValueType(i) == MVT::Other) 6238 OS << "ch"; 6239 else 6240 OS << getValueType(i).getEVTString(); 6241 } 6242 OS << " = " << getOperationName(G); 6243} 6244 6245void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 6246 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 6247 if (!MN->memoperands_empty()) { 6248 OS << "<"; 6249 OS << "Mem:"; 6250 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 6251 e = MN->memoperands_end(); i != e; ++i) { 6252 OS << **i; 6253 if (llvm::next(i) != e) 6254 OS << " "; 6255 } 6256 OS << ">"; 6257 } 6258 } else if (const ShuffleVectorSDNode *SVN = 6259 dyn_cast<ShuffleVectorSDNode>(this)) { 6260 OS << "<"; 6261 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 6262 int Idx = SVN->getMaskElt(i); 6263 if (i) OS << ","; 6264 if (Idx < 0) 6265 OS << "u"; 6266 else 6267 OS << Idx; 6268 } 6269 OS << ">"; 6270 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 6271 OS << '<' << CSDN->getAPIntValue() << '>'; 6272 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 6273 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 6274 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 6275 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 6276 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 6277 else { 6278 OS << "<APFloat("; 6279 CSDN->getValueAPF().bitcastToAPInt().dump(); 6280 OS << ")>"; 6281 } 6282 } else if (const GlobalAddressSDNode *GADN = 6283 dyn_cast<GlobalAddressSDNode>(this)) { 6284 int64_t offset = GADN->getOffset(); 6285 OS << '<'; 6286 WriteAsOperand(OS, GADN->getGlobal()); 6287 OS << '>'; 6288 if (offset > 0) 6289 OS << " + " << offset; 6290 else 6291 OS << " " << offset; 6292 if (unsigned int TF = GADN->getTargetFlags()) 6293 OS << " [TF=" << TF << ']'; 6294 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 6295 OS << "<" << FIDN->getIndex() << ">"; 6296 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 6297 OS << "<" << JTDN->getIndex() << ">"; 6298 if (unsigned int TF = JTDN->getTargetFlags()) 6299 OS << " [TF=" << TF << ']'; 6300 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 6301 int offset = CP->getOffset(); 6302 if (CP->isMachineConstantPoolEntry()) 6303 OS << "<" << *CP->getMachineCPVal() << ">"; 6304 else 6305 OS << "<" << *CP->getConstVal() << ">"; 6306 if (offset > 0) 6307 OS << " + " << offset; 6308 else 6309 OS << " " << offset; 6310 if (unsigned int TF = CP->getTargetFlags()) 6311 OS << " [TF=" << TF << ']'; 6312 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 6313 OS << "<"; 6314 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 6315 if (LBB) 6316 OS << LBB->getName() << " "; 6317 OS << (const void*)BBDN->getBasicBlock() << ">"; 6318 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 6319 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0); 6320 } else if (const ExternalSymbolSDNode *ES = 6321 dyn_cast<ExternalSymbolSDNode>(this)) { 6322 OS << "'" << ES->getSymbol() << "'"; 6323 if (unsigned int TF = ES->getTargetFlags()) 6324 OS << " [TF=" << TF << ']'; 6325 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 6326 if (M->getValue()) 6327 OS << "<" << M->getValue() << ">"; 6328 else 6329 OS << "<null>"; 6330 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 6331 if (MD->getMD()) 6332 OS << "<" << MD->getMD() << ">"; 6333 else 6334 OS << "<null>"; 6335 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6336 OS << ":" << N->getVT().getEVTString(); 6337 } 6338 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6339 OS << "<" << *LD->getMemOperand(); 6340 6341 bool doExt = true; 6342 switch (LD->getExtensionType()) { 6343 default: doExt = false; break; 6344 case ISD::EXTLOAD: OS << ", anyext"; break; 6345 case ISD::SEXTLOAD: OS << ", sext"; break; 6346 case ISD::ZEXTLOAD: OS << ", zext"; break; 6347 } 6348 if (doExt) 6349 OS << " from " << LD->getMemoryVT().getEVTString(); 6350 6351 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6352 if (*AM) 6353 OS << ", " << AM; 6354 6355 OS << ">"; 6356 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6357 OS << "<" << *ST->getMemOperand(); 6358 6359 if (ST->isTruncatingStore()) 6360 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6361 6362 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6363 if (*AM) 6364 OS << ", " << AM; 6365 6366 OS << ">"; 6367 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6368 OS << "<" << *M->getMemOperand() << ">"; 6369 } else if (const BlockAddressSDNode *BA = 6370 dyn_cast<BlockAddressSDNode>(this)) { 6371 OS << "<"; 6372 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6373 OS << ", "; 6374 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6375 OS << ">"; 6376 if (unsigned int TF = BA->getTargetFlags()) 6377 OS << " [TF=" << TF << ']'; 6378 } 6379 6380 if (G) 6381 if (unsigned Order = G->GetOrdering(this)) 6382 OS << " [ORD=" << Order << ']'; 6383 6384 if (getNodeId() != -1) 6385 OS << " [ID=" << getNodeId() << ']'; 6386 6387 DebugLoc dl = getDebugLoc(); 6388 if (G && !dl.isUnknown()) { 6389 DIScope 6390 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6391 OS << " dbg:"; 6392 // Omit the directory, since it's usually long and uninteresting. 6393 if (Scope.Verify()) 6394 OS << Scope.getFilename(); 6395 else 6396 OS << "<unknown>"; 6397 OS << ':' << dl.getLine(); 6398 if (dl.getCol() != 0) 6399 OS << ':' << dl.getCol(); 6400 } 6401} 6402 6403void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6404 print_types(OS, G); 6405 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6406 if (i) OS << ", "; else OS << " "; 6407 OS << (void*)getOperand(i).getNode(); 6408 if (unsigned RN = getOperand(i).getResNo()) 6409 OS << ":" << RN; 6410 } 6411 print_details(OS, G); 6412} 6413 6414static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6415 const SelectionDAG *G, unsigned depth, 6416 unsigned indent) { 6417 if (depth == 0) 6418 return; 6419 6420 OS.indent(indent); 6421 6422 N->print(OS, G); 6423 6424 if (depth < 1) 6425 return; 6426 6427 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6428 // Don't follow chain operands. 6429 if (N->getOperand(i).getValueType() == MVT::Other) 6430 continue; 6431 OS << '\n'; 6432 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6433 } 6434} 6435 6436void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6437 unsigned depth) const { 6438 printrWithDepthHelper(OS, this, G, depth, 0); 6439} 6440 6441void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6442 // Don't print impossibly deep things. 6443 printrWithDepth(OS, G, 10); 6444} 6445 6446void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6447 printrWithDepth(dbgs(), G, depth); 6448} 6449 6450void SDNode::dumprFull(const SelectionDAG *G) const { 6451 // Don't print impossibly deep things. 6452 dumprWithDepth(G, 10); 6453} 6454 6455static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6456 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6457 if (N->getOperand(i).getNode()->hasOneUse()) 6458 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6459 else 6460 dbgs() << "\n" << std::string(indent+2, ' ') 6461 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6462 6463 6464 dbgs() << "\n"; 6465 dbgs().indent(indent); 6466 N->dump(G); 6467} 6468 6469SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6470 assert(N->getNumValues() == 1 && 6471 "Can't unroll a vector with multiple results!"); 6472 6473 EVT VT = N->getValueType(0); 6474 unsigned NE = VT.getVectorNumElements(); 6475 EVT EltVT = VT.getVectorElementType(); 6476 DebugLoc dl = N->getDebugLoc(); 6477 6478 SmallVector<SDValue, 8> Scalars; 6479 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6480 6481 // If ResNE is 0, fully unroll the vector op. 6482 if (ResNE == 0) 6483 ResNE = NE; 6484 else if (NE > ResNE) 6485 NE = ResNE; 6486 6487 unsigned i; 6488 for (i= 0; i != NE; ++i) { 6489 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6490 SDValue Operand = N->getOperand(j); 6491 EVT OperandVT = Operand.getValueType(); 6492 if (OperandVT.isVector()) { 6493 // A vector operand; extract a single element. 6494 EVT OperandEltVT = OperandVT.getVectorElementType(); 6495 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6496 OperandEltVT, 6497 Operand, 6498 getConstant(i, TLI.getPointerTy())); 6499 } else { 6500 // A scalar operand; just use it as is. 6501 Operands[j] = Operand; 6502 } 6503 } 6504 6505 switch (N->getOpcode()) { 6506 default: 6507 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6508 &Operands[0], Operands.size())); 6509 break; 6510 case ISD::VSELECT: 6511 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6512 &Operands[0], Operands.size())); 6513 break; 6514 case ISD::SHL: 6515 case ISD::SRA: 6516 case ISD::SRL: 6517 case ISD::ROTL: 6518 case ISD::ROTR: 6519 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6520 getShiftAmountOperand(Operands[0].getValueType(), 6521 Operands[1]))); 6522 break; 6523 case ISD::SIGN_EXTEND_INREG: 6524 case ISD::FP_ROUND_INREG: { 6525 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6526 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6527 Operands[0], 6528 getValueType(ExtVT))); 6529 } 6530 } 6531 } 6532 6533 for (; i < ResNE; ++i) 6534 Scalars.push_back(getUNDEF(EltVT)); 6535 6536 return getNode(ISD::BUILD_VECTOR, dl, 6537 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6538 &Scalars[0], Scalars.size()); 6539} 6540 6541 6542/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6543/// location that is 'Dist' units away from the location that the 'Base' load 6544/// is loading from. 6545bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6546 unsigned Bytes, int Dist) const { 6547 if (LD->getChain() != Base->getChain()) 6548 return false; 6549 EVT VT = LD->getValueType(0); 6550 if (VT.getSizeInBits() / 8 != Bytes) 6551 return false; 6552 6553 SDValue Loc = LD->getOperand(1); 6554 SDValue BaseLoc = Base->getOperand(1); 6555 if (Loc.getOpcode() == ISD::FrameIndex) { 6556 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6557 return false; 6558 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6559 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6560 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6561 int FS = MFI->getObjectSize(FI); 6562 int BFS = MFI->getObjectSize(BFI); 6563 if (FS != BFS || FS != (int)Bytes) return false; 6564 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6565 } 6566 6567 // Handle X+C 6568 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6569 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6570 return true; 6571 6572 const GlobalValue *GV1 = NULL; 6573 const GlobalValue *GV2 = NULL; 6574 int64_t Offset1 = 0; 6575 int64_t Offset2 = 0; 6576 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6577 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6578 if (isGA1 && isGA2 && GV1 == GV2) 6579 return Offset1 == (Offset2 + Dist*Bytes); 6580 return false; 6581} 6582 6583 6584/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6585/// it cannot be inferred. 6586unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6587 // If this is a GlobalAddress + cst, return the alignment. 6588 const GlobalValue *GV; 6589 int64_t GVOffset = 0; 6590 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6591 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6592 APInt AllOnes = APInt::getAllOnesValue(PtrWidth); 6593 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6594 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), AllOnes, 6595 KnownZero, KnownOne, TLI.getTargetData()); 6596 unsigned AlignBits = KnownZero.countTrailingOnes(); 6597 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6598 if (Align) 6599 return MinAlign(Align, GVOffset); 6600 } 6601 6602 // If this is a direct reference to a stack slot, use information about the 6603 // stack slot's alignment. 6604 int FrameIdx = 1 << 31; 6605 int64_t FrameOffset = 0; 6606 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6607 FrameIdx = FI->getIndex(); 6608 } else if (isBaseWithConstantOffset(Ptr) && 6609 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6610 // Handle FI+Cst 6611 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6612 FrameOffset = Ptr.getConstantOperandVal(1); 6613 } 6614 6615 if (FrameIdx != (1 << 31)) { 6616 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6617 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6618 FrameOffset); 6619 return FIInfoAlign; 6620 } 6621 6622 return 0; 6623} 6624 6625void SelectionDAG::dump() const { 6626 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6627 6628 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6629 I != E; ++I) { 6630 const SDNode *N = I; 6631 if (!N->hasOneUse() && N != getRoot().getNode()) 6632 DumpNodes(N, 2, this); 6633 } 6634 6635 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6636 6637 dbgs() << "\n\n"; 6638} 6639 6640void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6641 print_types(OS, G); 6642 print_details(OS, G); 6643} 6644 6645typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6646static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6647 const SelectionDAG *G, VisitedSDNodeSet &once) { 6648 if (!once.insert(N)) // If we've been here before, return now. 6649 return; 6650 6651 // Dump the current SDNode, but don't end the line yet. 6652 OS.indent(indent); 6653 N->printr(OS, G); 6654 6655 // Having printed this SDNode, walk the children: 6656 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6657 const SDNode *child = N->getOperand(i).getNode(); 6658 6659 if (i) OS << ","; 6660 OS << " "; 6661 6662 if (child->getNumOperands() == 0) { 6663 // This child has no grandchildren; print it inline right here. 6664 child->printr(OS, G); 6665 once.insert(child); 6666 } else { // Just the address. FIXME: also print the child's opcode. 6667 OS << (void*)child; 6668 if (unsigned RN = N->getOperand(i).getResNo()) 6669 OS << ":" << RN; 6670 } 6671 } 6672 6673 OS << "\n"; 6674 6675 // Dump children that have grandchildren on their own line(s). 6676 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6677 const SDNode *child = N->getOperand(i).getNode(); 6678 DumpNodesr(OS, child, indent+2, G, once); 6679 } 6680} 6681 6682void SDNode::dumpr() const { 6683 VisitedSDNodeSet once; 6684 DumpNodesr(dbgs(), this, 0, 0, once); 6685} 6686 6687void SDNode::dumpr(const SelectionDAG *G) const { 6688 VisitedSDNodeSet once; 6689 DumpNodesr(dbgs(), this, 0, G, once); 6690} 6691 6692 6693// getAddressSpace - Return the address space this GlobalAddress belongs to. 6694unsigned GlobalAddressSDNode::getAddressSpace() const { 6695 return getGlobal()->getType()->getAddressSpace(); 6696} 6697 6698 6699Type *ConstantPoolSDNode::getType() const { 6700 if (isMachineConstantPoolEntry()) 6701 return Val.MachineCPVal->getType(); 6702 return Val.ConstVal->getType(); 6703} 6704 6705bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6706 APInt &SplatUndef, 6707 unsigned &SplatBitSize, 6708 bool &HasAnyUndefs, 6709 unsigned MinSplatBits, 6710 bool isBigEndian) { 6711 EVT VT = getValueType(0); 6712 assert(VT.isVector() && "Expected a vector type"); 6713 unsigned sz = VT.getSizeInBits(); 6714 if (MinSplatBits > sz) 6715 return false; 6716 6717 SplatValue = APInt(sz, 0); 6718 SplatUndef = APInt(sz, 0); 6719 6720 // Get the bits. Bits with undefined values (when the corresponding element 6721 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6722 // in SplatValue. If any of the values are not constant, give up and return 6723 // false. 6724 unsigned int nOps = getNumOperands(); 6725 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6726 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6727 6728 for (unsigned j = 0; j < nOps; ++j) { 6729 unsigned i = isBigEndian ? nOps-1-j : j; 6730 SDValue OpVal = getOperand(i); 6731 unsigned BitPos = j * EltBitSize; 6732 6733 if (OpVal.getOpcode() == ISD::UNDEF) 6734 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6735 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6736 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6737 zextOrTrunc(sz) << BitPos; 6738 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6739 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6740 else 6741 return false; 6742 } 6743 6744 // The build_vector is all constants or undefs. Find the smallest element 6745 // size that splats the vector. 6746 6747 HasAnyUndefs = (SplatUndef != 0); 6748 while (sz > 8) { 6749 6750 unsigned HalfSize = sz / 2; 6751 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6752 APInt LowValue = SplatValue.trunc(HalfSize); 6753 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6754 APInt LowUndef = SplatUndef.trunc(HalfSize); 6755 6756 // If the two halves do not match (ignoring undef bits), stop here. 6757 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6758 MinSplatBits > HalfSize) 6759 break; 6760 6761 SplatValue = HighValue | LowValue; 6762 SplatUndef = HighUndef & LowUndef; 6763 6764 sz = HalfSize; 6765 } 6766 6767 SplatBitSize = sz; 6768 return true; 6769} 6770 6771bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6772 // Find the first non-undef value in the shuffle mask. 6773 unsigned i, e; 6774 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6775 /* search */; 6776 6777 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6778 6779 // Make sure all remaining elements are either undef or the same as the first 6780 // non-undef value. 6781 for (int Idx = Mask[i]; i != e; ++i) 6782 if (Mask[i] >= 0 && Mask[i] != Idx) 6783 return false; 6784 return true; 6785} 6786 6787#ifdef XDEBUG 6788static void checkForCyclesHelper(const SDNode *N, 6789 SmallPtrSet<const SDNode*, 32> &Visited, 6790 SmallPtrSet<const SDNode*, 32> &Checked) { 6791 // If this node has already been checked, don't check it again. 6792 if (Checked.count(N)) 6793 return; 6794 6795 // If a node has already been visited on this depth-first walk, reject it as 6796 // a cycle. 6797 if (!Visited.insert(N)) { 6798 dbgs() << "Offending node:\n"; 6799 N->dumprFull(); 6800 errs() << "Detected cycle in SelectionDAG\n"; 6801 abort(); 6802 } 6803 6804 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6805 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6806 6807 Checked.insert(N); 6808 Visited.erase(N); 6809} 6810#endif 6811 6812void llvm::checkForCycles(const llvm::SDNode *N) { 6813#ifdef XDEBUG 6814 assert(N && "Checking nonexistant SDNode"); 6815 SmallPtrSet<const SDNode*, 32> visited; 6816 SmallPtrSet<const SDNode*, 32> checked; 6817 checkForCyclesHelper(N, visited, checked); 6818#endif 6819} 6820 6821void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6822 checkForCycles(DAG->getRoot().getNode()); 6823} 6824