SelectionDAG.cpp revision 23ff7cff52702a8bff904d8ab4c9ca67cc19d6ca
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetSelectionDAGInfo.h" 37#include "llvm/Target/TargetOptions.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetIntrinsicInfo.h" 40#include "llvm/Target/TargetMachine.h" 41#include "llvm/Support/CommandLine.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ErrorHandling.h" 44#include "llvm/Support/ManagedStatic.h" 45#include "llvm/Support/MathExtras.h" 46#include "llvm/Support/raw_ostream.h" 47#include "llvm/System/Mutex.h" 48#include "llvm/ADT/SetVector.h" 49#include "llvm/ADT/SmallPtrSet.h" 50#include "llvm/ADT/SmallSet.h" 51#include "llvm/ADT/SmallVector.h" 52#include "llvm/ADT/StringExtras.h" 53#include <algorithm> 54#include <cmath> 55using namespace llvm; 56 57/// makeVTList - Return an instance of the SDVTList struct initialized with the 58/// specified members. 59static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 60 SDVTList Res = {VTs, NumVTs}; 61 return Res; 62} 63 64static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 65 switch (VT.getSimpleVT().SimpleTy) { 66 default: llvm_unreachable("Unknown FP format"); 67 case MVT::f32: return &APFloat::IEEEsingle; 68 case MVT::f64: return &APFloat::IEEEdouble; 69 case MVT::f80: return &APFloat::x87DoubleExtended; 70 case MVT::f128: return &APFloat::IEEEquad; 71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 72 } 73} 74 75SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 76 77//===----------------------------------------------------------------------===// 78// ConstantFPSDNode Class 79//===----------------------------------------------------------------------===// 80 81/// isExactlyValue - We don't rely on operator== working on double values, as 82/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 83/// As such, this method can be used to do an exact bit-for-bit comparison of 84/// two floating point values. 85bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 86 return getValueAPF().bitwiseIsEqual(V); 87} 88 89bool ConstantFPSDNode::isValueValidForType(EVT VT, 90 const APFloat& Val) { 91 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 92 93 // PPC long double cannot be converted to any other type. 94 if (VT == MVT::ppcf128 || 95 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 96 return false; 97 98 // convert modifies in place, so make a copy. 99 APFloat Val2 = APFloat(Val); 100 bool losesInfo; 101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 102 &losesInfo); 103 return !losesInfo; 104} 105 106//===----------------------------------------------------------------------===// 107// ISD Namespace 108//===----------------------------------------------------------------------===// 109 110/// isBuildVectorAllOnes - Return true if the specified node is a 111/// BUILD_VECTOR where all of the elements are ~0 or undef. 112bool ISD::isBuildVectorAllOnes(const SDNode *N) { 113 // Look through a bit convert. 114 if (N->getOpcode() == ISD::BIT_CONVERT) 115 N = N->getOperand(0).getNode(); 116 117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 118 119 unsigned i = 0, e = N->getNumOperands(); 120 121 // Skip over all of the undef values. 122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 123 ++i; 124 125 // Do not accept an all-undef vector. 126 if (i == e) return false; 127 128 // Do not accept build_vectors that aren't all constants or which have non-~0 129 // elements. 130 SDValue NotZero = N->getOperand(i); 131 if (isa<ConstantSDNode>(NotZero)) { 132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 133 return false; 134 } else if (isa<ConstantFPSDNode>(NotZero)) { 135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 136 bitcastToAPInt().isAllOnesValue()) 137 return false; 138 } else 139 return false; 140 141 // Okay, we have at least one ~0 value, check to see if the rest match or are 142 // undefs. 143 for (++i; i != e; ++i) 144 if (N->getOperand(i) != NotZero && 145 N->getOperand(i).getOpcode() != ISD::UNDEF) 146 return false; 147 return true; 148} 149 150 151/// isBuildVectorAllZeros - Return true if the specified node is a 152/// BUILD_VECTOR where all of the elements are 0 or undef. 153bool ISD::isBuildVectorAllZeros(const SDNode *N) { 154 // Look through a bit convert. 155 if (N->getOpcode() == ISD::BIT_CONVERT) 156 N = N->getOperand(0).getNode(); 157 158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 159 160 unsigned i = 0, e = N->getNumOperands(); 161 162 // Skip over all of the undef values. 163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 164 ++i; 165 166 // Do not accept an all-undef vector. 167 if (i == e) return false; 168 169 // Do not accept build_vectors that aren't all constants or which have non-0 170 // elements. 171 SDValue Zero = N->getOperand(i); 172 if (isa<ConstantSDNode>(Zero)) { 173 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 174 return false; 175 } else if (isa<ConstantFPSDNode>(Zero)) { 176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 177 return false; 178 } else 179 return false; 180 181 // Okay, we have at least one 0 value, check to see if the rest match or are 182 // undefs. 183 for (++i; i != e; ++i) 184 if (N->getOperand(i) != Zero && 185 N->getOperand(i).getOpcode() != ISD::UNDEF) 186 return false; 187 return true; 188} 189 190/// isScalarToVector - Return true if the specified node is a 191/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 192/// element is not an undef. 193bool ISD::isScalarToVector(const SDNode *N) { 194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 195 return true; 196 197 if (N->getOpcode() != ISD::BUILD_VECTOR) 198 return false; 199 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 200 return false; 201 unsigned NumElems = N->getNumOperands(); 202 for (unsigned i = 1; i < NumElems; ++i) { 203 SDValue V = N->getOperand(i); 204 if (V.getOpcode() != ISD::UNDEF) 205 return false; 206 } 207 return true; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: llvm_unreachable("Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309//===----------------------------------------------------------------------===// 310// SDNode Profile Support 311//===----------------------------------------------------------------------===// 312 313/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 314/// 315static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 316 ID.AddInteger(OpC); 317} 318 319/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 320/// solely with their pointer. 321static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 322 ID.AddPointer(VTList.VTs); 323} 324 325/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 326/// 327static void AddNodeIDOperands(FoldingSetNodeID &ID, 328 const SDValue *Ops, unsigned NumOps) { 329 for (; NumOps; --NumOps, ++Ops) { 330 ID.AddPointer(Ops->getNode()); 331 ID.AddInteger(Ops->getResNo()); 332 } 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDUse *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345static void AddNodeIDNode(FoldingSetNodeID &ID, 346 unsigned short OpC, SDVTList VTList, 347 const SDValue *OpList, unsigned N) { 348 AddNodeIDOpcode(ID, OpC); 349 AddNodeIDValueTypes(ID, VTList); 350 AddNodeIDOperands(ID, OpList, N); 351} 352 353/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 354/// the NodeID data. 355static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 356 switch (N->getOpcode()) { 357 case ISD::TargetExternalSymbol: 358 case ISD::ExternalSymbol: 359 llvm_unreachable("Should only be used on nodes with operands"); 360 default: break; // Normal nodes don't need extra info. 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 ID.AddInteger(GA->getTargetFlags()); 378 break; 379 } 380 case ISD::BasicBlock: 381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 382 break; 383 case ISD::Register: 384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 385 break; 386 387 case ISD::SRCVALUE: 388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 389 break; 390 case ISD::FrameIndex: 391 case ISD::TargetFrameIndex: 392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 393 break; 394 case ISD::JumpTable: 395 case ISD::TargetJumpTable: 396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 398 break; 399 case ISD::ConstantPool: 400 case ISD::TargetConstantPool: { 401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 402 ID.AddInteger(CP->getAlignment()); 403 ID.AddInteger(CP->getOffset()); 404 if (CP->isMachineConstantPoolEntry()) 405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 406 else 407 ID.AddPointer(CP->getConstVal()); 408 ID.AddInteger(CP->getTargetFlags()); 409 break; 410 } 411 case ISD::LOAD: { 412 const LoadSDNode *LD = cast<LoadSDNode>(N); 413 ID.AddInteger(LD->getMemoryVT().getRawBits()); 414 ID.AddInteger(LD->getRawSubclassData()); 415 break; 416 } 417 case ISD::STORE: { 418 const StoreSDNode *ST = cast<StoreSDNode>(N); 419 ID.AddInteger(ST->getMemoryVT().getRawBits()); 420 ID.AddInteger(ST->getRawSubclassData()); 421 break; 422 } 423 case ISD::ATOMIC_CMP_SWAP: 424 case ISD::ATOMIC_SWAP: 425 case ISD::ATOMIC_LOAD_ADD: 426 case ISD::ATOMIC_LOAD_SUB: 427 case ISD::ATOMIC_LOAD_AND: 428 case ISD::ATOMIC_LOAD_OR: 429 case ISD::ATOMIC_LOAD_XOR: 430 case ISD::ATOMIC_LOAD_NAND: 431 case ISD::ATOMIC_LOAD_MIN: 432 case ISD::ATOMIC_LOAD_MAX: 433 case ISD::ATOMIC_LOAD_UMIN: 434 case ISD::ATOMIC_LOAD_UMAX: { 435 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 436 ID.AddInteger(AT->getMemoryVT().getRawBits()); 437 ID.AddInteger(AT->getRawSubclassData()); 438 break; 439 } 440 case ISD::VECTOR_SHUFFLE: { 441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 443 i != e; ++i) 444 ID.AddInteger(SVN->getMaskElt(i)); 445 break; 446 } 447 case ISD::TargetBlockAddress: 448 case ISD::BlockAddress: { 449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 451 break; 452 } 453 } // end switch (N->getOpcode()) 454} 455 456/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 457/// data. 458static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 459 AddNodeIDOpcode(ID, N->getOpcode()); 460 // Add the return value info. 461 AddNodeIDValueTypes(ID, N->getVTList()); 462 // Add the operand info. 463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 464 465 // Handle SDNode leafs with special info. 466 AddNodeIDCustom(ID, N); 467} 468 469/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 470/// the CSE map that carries volatility, temporalness, indexing mode, and 471/// extension/truncation information. 472/// 473static inline unsigned 474encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 475 bool isNonTemporal) { 476 assert((ConvType & 3) == ConvType && 477 "ConvType may not require more than 2 bits!"); 478 assert((AM & 7) == AM && 479 "AM may not require more than 3 bits!"); 480 return ConvType | 481 (AM << 2) | 482 (isVolatile << 5) | 483 (isNonTemporal << 6); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::EH_LABEL: 499 return true; // Never CSE these nodes. 500 } 501 502 // Check that remaining values produced are not flags. 503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 504 if (N->getValueType(i) == MVT::Flag) 505 return true; // Never CSE anything that produces a flag. 506 507 return false; 508} 509 510/// RemoveDeadNodes - This method deletes all unreachable nodes in the 511/// SelectionDAG. 512void SelectionDAG::RemoveDeadNodes() { 513 // Create a dummy node (which is not added to allnodes), that adds a reference 514 // to the root node, preventing it from being deleted. 515 HandleSDNode Dummy(getRoot()); 516 517 SmallVector<SDNode*, 128> DeadNodes; 518 519 // Add all obviously-dead nodes to the DeadNodes worklist. 520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 521 if (I->use_empty()) 522 DeadNodes.push_back(I); 523 524 RemoveDeadNodes(DeadNodes); 525 526 // If the root changed (e.g. it was a dead load, update the root). 527 setRoot(Dummy.getValue()); 528} 529 530/// RemoveDeadNodes - This method deletes the unreachable nodes in the 531/// given list, and any nodes that become unreachable as a result. 532void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 533 DAGUpdateListener *UpdateListener) { 534 535 // Process the worklist, deleting the nodes and adding their uses to the 536 // worklist. 537 while (!DeadNodes.empty()) { 538 SDNode *N = DeadNodes.pop_back_val(); 539 540 if (UpdateListener) 541 UpdateListener->NodeDeleted(N, 0); 542 543 // Take the node out of the appropriate CSE map. 544 RemoveNodeFromCSEMaps(N); 545 546 // Next, brutally remove the operand list. This is safe to do, as there are 547 // no cycles in the graph. 548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 549 SDUse &Use = *I++; 550 SDNode *Operand = Use.getNode(); 551 Use.set(SDValue()); 552 553 // Now that we removed this operand, see if there are no uses of it left. 554 if (Operand->use_empty()) 555 DeadNodes.push_back(Operand); 556 } 557 558 DeallocateNode(N); 559 } 560} 561 562void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 563 SmallVector<SDNode*, 16> DeadNodes(1, N); 564 RemoveDeadNodes(DeadNodes, UpdateListener); 565} 566 567void SelectionDAG::DeleteNode(SDNode *N) { 568 // First take this out of the appropriate CSE map. 569 RemoveNodeFromCSEMaps(N); 570 571 // Finally, remove uses due to operands of this node, remove from the 572 // AllNodes list, and delete the node. 573 DeleteNodeNotInCSEMaps(N); 574} 575 576void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 577 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 578 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 579 580 // Drop all of the operands and decrement used node's use counts. 581 N->DropOperands(); 582 583 DeallocateNode(N); 584} 585 586void SelectionDAG::DeallocateNode(SDNode *N) { 587 if (N->OperandsNeedDelete) 588 delete[] N->OperandList; 589 590 // Set the opcode to DELETED_NODE to help catch bugs when node 591 // memory is reallocated. 592 N->NodeType = ISD::DELETED_NODE; 593 594 NodeAllocator.Deallocate(AllNodes.remove(N)); 595 596 // Remove the ordering of this node. 597 Ordering->remove(N); 598 599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 602 DbgVals[i]->setIsInvalidated(); 603} 604 605/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 606/// correspond to it. This is useful when we're about to delete or repurpose 607/// the node. We don't want future request for structurally identical nodes 608/// to return N anymore. 609bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 610 bool Erased = false; 611 switch (N->getOpcode()) { 612 case ISD::EntryToken: 613 llvm_unreachable("EntryToken should not be in CSEMaps!"); 614 return false; 615 case ISD::HANDLENODE: return false; // noop. 616 case ISD::CONDCODE: 617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 618 "Cond code doesn't exist!"); 619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 621 break; 622 case ISD::ExternalSymbol: 623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 624 break; 625 case ISD::TargetExternalSymbol: { 626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 627 Erased = TargetExternalSymbols.erase( 628 std::pair<std::string,unsigned char>(ESN->getSymbol(), 629 ESN->getTargetFlags())); 630 break; 631 } 632 case ISD::VALUETYPE: { 633 EVT VT = cast<VTSDNode>(N)->getVT(); 634 if (VT.isExtended()) { 635 Erased = ExtendedValueTypeNodes.erase(VT); 636 } else { 637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 639 } 640 break; 641 } 642 default: 643 // Remove it from the CSE Map. 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 747void SelectionDAG::VerifyNode(SDNode *N) { 748 switch (N->getOpcode()) { 749 default: 750 break; 751 case ISD::BUILD_PAIR: { 752 EVT VT = N->getValueType(0); 753 assert(N->getNumValues() == 1 && "Too many results!"); 754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 755 "Wrong return type!"); 756 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 758 "Mismatched operand types!"); 759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 760 "Wrong operand type!"); 761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 762 "Wrong return type size"); 763 break; 764 } 765 case ISD::BUILD_VECTOR: { 766 assert(N->getNumValues() == 1 && "Too many results!"); 767 assert(N->getValueType(0).isVector() && "Wrong return type!"); 768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 769 "Wrong number of operands!"); 770 EVT EltVT = N->getValueType(0).getVectorElementType(); 771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 772 assert((I->getValueType() == EltVT || 773 (EltVT.isInteger() && I->getValueType().isInteger() && 774 EltVT.bitsLE(I->getValueType()))) && 775 "Wrong operand type!"); 776 break; 777 } 778 } 779} 780 781/// getEVTAlignment - Compute the default alignment value for the 782/// given type. 783/// 784unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 785 const Type *Ty = VT == MVT::iPTR ? 786 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 787 VT.getTypeForEVT(*getContext()); 788 789 return TLI.getTargetData()->getABITypeAlignment(Ty); 790} 791 792// EntryNode could meaningfully have debug info if we can find it... 793SelectionDAG::SelectionDAG(const TargetMachine &tm, FunctionLoweringInfo &fli) 794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 795 FLI(fli), 796 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 797 Root(getEntryNode()), Ordering(0) { 798 AllNodes.push_back(&EntryNode); 799 Ordering = new SDNodeOrdering(); 800 DbgInfo = new SDDbgInfo(); 801} 802 803void SelectionDAG::init(MachineFunction &mf) { 804 MF = &mf; 805 Context = &mf.getFunction()->getContext(); 806} 807 808SelectionDAG::~SelectionDAG() { 809 allnodes_clear(); 810 delete Ordering; 811 DbgInfo->clear(); 812 delete DbgInfo; 813} 814 815void SelectionDAG::allnodes_clear() { 816 assert(&*AllNodes.begin() == &EntryNode); 817 AllNodes.remove(AllNodes.begin()); 818 while (!AllNodes.empty()) 819 DeallocateNode(AllNodes.begin()); 820} 821 822void SelectionDAG::clear() { 823 allnodes_clear(); 824 OperandAllocator.Reset(); 825 CSEMap.clear(); 826 827 ExtendedValueTypeNodes.clear(); 828 ExternalSymbols.clear(); 829 TargetExternalSymbols.clear(); 830 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 831 static_cast<CondCodeSDNode*>(0)); 832 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 833 static_cast<SDNode*>(0)); 834 835 EntryNode.UseList = 0; 836 AllNodes.push_back(&EntryNode); 837 Root = getEntryNode(); 838 delete Ordering; 839 Ordering = new SDNodeOrdering(); 840 DbgInfo->clear(); 841 delete DbgInfo; 842 DbgInfo = new SDDbgInfo(); 843} 844 845SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 846 return VT.bitsGT(Op.getValueType()) ? 847 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 848 getNode(ISD::TRUNCATE, DL, VT, Op); 849} 850 851SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 852 return VT.bitsGT(Op.getValueType()) ? 853 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 854 getNode(ISD::TRUNCATE, DL, VT, Op); 855} 856 857SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 858 assert(!VT.isVector() && 859 "getZeroExtendInReg should use the vector element type instead of " 860 "the vector type!"); 861 if (Op.getValueType() == VT) return Op; 862 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 863 APInt Imm = APInt::getLowBitsSet(BitWidth, 864 VT.getSizeInBits()); 865 return getNode(ISD::AND, DL, Op.getValueType(), Op, 866 getConstant(Imm, Op.getValueType())); 867} 868 869/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 870/// 871SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 872 EVT EltVT = VT.getScalarType(); 873 SDValue NegOne = 874 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 875 return getNode(ISD::XOR, DL, VT, Val, NegOne); 876} 877 878SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 879 EVT EltVT = VT.getScalarType(); 880 assert((EltVT.getSizeInBits() >= 64 || 881 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 882 "getConstant with a uint64_t value that doesn't fit in the type!"); 883 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 884} 885 886SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 887 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 888} 889 890SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 891 assert(VT.isInteger() && "Cannot create FP integer constant!"); 892 893 EVT EltVT = VT.getScalarType(); 894 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 895 "APInt size does not match type size!"); 896 897 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 898 FoldingSetNodeID ID; 899 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 900 ID.AddPointer(&Val); 901 void *IP = 0; 902 SDNode *N = NULL; 903 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 904 if (!VT.isVector()) 905 return SDValue(N, 0); 906 907 if (!N) { 908 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 909 CSEMap.InsertNode(N, IP); 910 AllNodes.push_back(N); 911 } 912 913 SDValue Result(N, 0); 914 if (VT.isVector()) { 915 SmallVector<SDValue, 8> Ops; 916 Ops.assign(VT.getVectorNumElements(), Result); 917 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 918 } 919 return Result; 920} 921 922SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 923 return getConstant(Val, TLI.getPointerTy(), isTarget); 924} 925 926 927SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 928 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 929} 930 931SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 932 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 933 934 EVT EltVT = VT.getScalarType(); 935 936 // Do the map lookup using the actual bit pattern for the floating point 937 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 938 // we don't have issues with SNANs. 939 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 940 FoldingSetNodeID ID; 941 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 942 ID.AddPointer(&V); 943 void *IP = 0; 944 SDNode *N = NULL; 945 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 946 if (!VT.isVector()) 947 return SDValue(N, 0); 948 949 if (!N) { 950 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 951 CSEMap.InsertNode(N, IP); 952 AllNodes.push_back(N); 953 } 954 955 SDValue Result(N, 0); 956 if (VT.isVector()) { 957 SmallVector<SDValue, 8> Ops; 958 Ops.assign(VT.getVectorNumElements(), Result); 959 // FIXME DebugLoc info might be appropriate here 960 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 961 } 962 return Result; 963} 964 965SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 966 EVT EltVT = VT.getScalarType(); 967 if (EltVT==MVT::f32) 968 return getConstantFP(APFloat((float)Val), VT, isTarget); 969 else if (EltVT==MVT::f64) 970 return getConstantFP(APFloat(Val), VT, isTarget); 971 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 972 bool ignored; 973 APFloat apf = APFloat(Val); 974 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 975 &ignored); 976 return getConstantFP(apf, VT, isTarget); 977 } else { 978 assert(0 && "Unsupported type in getConstantFP"); 979 return SDValue(); 980 } 981} 982 983SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 984 EVT VT, int64_t Offset, 985 bool isTargetGA, 986 unsigned char TargetFlags) { 987 assert((TargetFlags == 0 || isTargetGA) && 988 "Cannot set target flags on target-independent globals"); 989 990 // Truncate (with sign-extension) the offset value to the pointer size. 991 EVT PTy = TLI.getPointerTy(); 992 unsigned BitWidth = PTy.getSizeInBits(); 993 if (BitWidth < 64) 994 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 995 996 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 997 if (!GVar) { 998 // If GV is an alias then use the aliasee for determining thread-localness. 999 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1000 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1001 } 1002 1003 unsigned Opc; 1004 if (GVar && GVar->isThreadLocal()) 1005 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1006 else 1007 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1008 1009 FoldingSetNodeID ID; 1010 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1011 ID.AddPointer(GV); 1012 ID.AddInteger(Offset); 1013 ID.AddInteger(TargetFlags); 1014 void *IP = 0; 1015 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1016 return SDValue(E, 0); 1017 1018 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1019 Offset, TargetFlags); 1020 CSEMap.InsertNode(N, IP); 1021 AllNodes.push_back(N); 1022 return SDValue(N, 0); 1023} 1024 1025SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1026 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1027 FoldingSetNodeID ID; 1028 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1029 ID.AddInteger(FI); 1030 void *IP = 0; 1031 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1032 return SDValue(E, 0); 1033 1034 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1035 CSEMap.InsertNode(N, IP); 1036 AllNodes.push_back(N); 1037 return SDValue(N, 0); 1038} 1039 1040SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1041 unsigned char TargetFlags) { 1042 assert((TargetFlags == 0 || isTarget) && 1043 "Cannot set target flags on target-independent jump tables"); 1044 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1045 FoldingSetNodeID ID; 1046 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1047 ID.AddInteger(JTI); 1048 ID.AddInteger(TargetFlags); 1049 void *IP = 0; 1050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1051 return SDValue(E, 0); 1052 1053 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1054 TargetFlags); 1055 CSEMap.InsertNode(N, IP); 1056 AllNodes.push_back(N); 1057 return SDValue(N, 0); 1058} 1059 1060SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1061 unsigned Alignment, int Offset, 1062 bool isTarget, 1063 unsigned char TargetFlags) { 1064 assert((TargetFlags == 0 || isTarget) && 1065 "Cannot set target flags on target-independent globals"); 1066 if (Alignment == 0) 1067 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1068 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1069 FoldingSetNodeID ID; 1070 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1071 ID.AddInteger(Alignment); 1072 ID.AddInteger(Offset); 1073 ID.AddPointer(C); 1074 ID.AddInteger(TargetFlags); 1075 void *IP = 0; 1076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1077 return SDValue(E, 0); 1078 1079 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1080 Alignment, TargetFlags); 1081 CSEMap.InsertNode(N, IP); 1082 AllNodes.push_back(N); 1083 return SDValue(N, 0); 1084} 1085 1086 1087SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1088 unsigned Alignment, int Offset, 1089 bool isTarget, 1090 unsigned char TargetFlags) { 1091 assert((TargetFlags == 0 || isTarget) && 1092 "Cannot set target flags on target-independent globals"); 1093 if (Alignment == 0) 1094 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1095 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1096 FoldingSetNodeID ID; 1097 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1098 ID.AddInteger(Alignment); 1099 ID.AddInteger(Offset); 1100 C->AddSelectionDAGCSEId(ID); 1101 ID.AddInteger(TargetFlags); 1102 void *IP = 0; 1103 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1104 return SDValue(E, 0); 1105 1106 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1107 Alignment, TargetFlags); 1108 CSEMap.InsertNode(N, IP); 1109 AllNodes.push_back(N); 1110 return SDValue(N, 0); 1111} 1112 1113SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1114 FoldingSetNodeID ID; 1115 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1116 ID.AddPointer(MBB); 1117 void *IP = 0; 1118 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1119 return SDValue(E, 0); 1120 1121 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1122 CSEMap.InsertNode(N, IP); 1123 AllNodes.push_back(N); 1124 return SDValue(N, 0); 1125} 1126 1127SDValue SelectionDAG::getValueType(EVT VT) { 1128 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1129 ValueTypeNodes.size()) 1130 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1131 1132 SDNode *&N = VT.isExtended() ? 1133 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1134 1135 if (N) return SDValue(N, 0); 1136 N = new (NodeAllocator) VTSDNode(VT); 1137 AllNodes.push_back(N); 1138 return SDValue(N, 0); 1139} 1140 1141SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1142 SDNode *&N = ExternalSymbols[Sym]; 1143 if (N) return SDValue(N, 0); 1144 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1145 AllNodes.push_back(N); 1146 return SDValue(N, 0); 1147} 1148 1149SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1150 unsigned char TargetFlags) { 1151 SDNode *&N = 1152 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1153 TargetFlags)]; 1154 if (N) return SDValue(N, 0); 1155 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1156 AllNodes.push_back(N); 1157 return SDValue(N, 0); 1158} 1159 1160SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1161 if ((unsigned)Cond >= CondCodeNodes.size()) 1162 CondCodeNodes.resize(Cond+1); 1163 1164 if (CondCodeNodes[Cond] == 0) { 1165 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1166 CondCodeNodes[Cond] = N; 1167 AllNodes.push_back(N); 1168 } 1169 1170 return SDValue(CondCodeNodes[Cond], 0); 1171} 1172 1173// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1174// the shuffle mask M that point at N1 to point at N2, and indices that point 1175// N2 to point at N1. 1176static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1177 std::swap(N1, N2); 1178 int NElts = M.size(); 1179 for (int i = 0; i != NElts; ++i) { 1180 if (M[i] >= NElts) 1181 M[i] -= NElts; 1182 else if (M[i] >= 0) 1183 M[i] += NElts; 1184 } 1185} 1186 1187SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1188 SDValue N2, const int *Mask) { 1189 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1190 assert(VT.isVector() && N1.getValueType().isVector() && 1191 "Vector Shuffle VTs must be a vectors"); 1192 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1193 && "Vector Shuffle VTs must have same element type"); 1194 1195 // Canonicalize shuffle undef, undef -> undef 1196 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1197 return getUNDEF(VT); 1198 1199 // Validate that all indices in Mask are within the range of the elements 1200 // input to the shuffle. 1201 unsigned NElts = VT.getVectorNumElements(); 1202 SmallVector<int, 8> MaskVec; 1203 for (unsigned i = 0; i != NElts; ++i) { 1204 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1205 MaskVec.push_back(Mask[i]); 1206 } 1207 1208 // Canonicalize shuffle v, v -> v, undef 1209 if (N1 == N2) { 1210 N2 = getUNDEF(VT); 1211 for (unsigned i = 0; i != NElts; ++i) 1212 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1213 } 1214 1215 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1216 if (N1.getOpcode() == ISD::UNDEF) 1217 commuteShuffle(N1, N2, MaskVec); 1218 1219 // Canonicalize all index into lhs, -> shuffle lhs, undef 1220 // Canonicalize all index into rhs, -> shuffle rhs, undef 1221 bool AllLHS = true, AllRHS = true; 1222 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1223 for (unsigned i = 0; i != NElts; ++i) { 1224 if (MaskVec[i] >= (int)NElts) { 1225 if (N2Undef) 1226 MaskVec[i] = -1; 1227 else 1228 AllLHS = false; 1229 } else if (MaskVec[i] >= 0) { 1230 AllRHS = false; 1231 } 1232 } 1233 if (AllLHS && AllRHS) 1234 return getUNDEF(VT); 1235 if (AllLHS && !N2Undef) 1236 N2 = getUNDEF(VT); 1237 if (AllRHS) { 1238 N1 = getUNDEF(VT); 1239 commuteShuffle(N1, N2, MaskVec); 1240 } 1241 1242 // If Identity shuffle, or all shuffle in to undef, return that node. 1243 bool AllUndef = true; 1244 bool Identity = true; 1245 for (unsigned i = 0; i != NElts; ++i) { 1246 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1247 if (MaskVec[i] >= 0) AllUndef = false; 1248 } 1249 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1250 return N1; 1251 if (AllUndef) 1252 return getUNDEF(VT); 1253 1254 FoldingSetNodeID ID; 1255 SDValue Ops[2] = { N1, N2 }; 1256 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1257 for (unsigned i = 0; i != NElts; ++i) 1258 ID.AddInteger(MaskVec[i]); 1259 1260 void* IP = 0; 1261 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1262 return SDValue(E, 0); 1263 1264 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1265 // SDNode doesn't have access to it. This memory will be "leaked" when 1266 // the node is deallocated, but recovered when the NodeAllocator is released. 1267 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1268 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1269 1270 ShuffleVectorSDNode *N = 1271 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1272 CSEMap.InsertNode(N, IP); 1273 AllNodes.push_back(N); 1274 return SDValue(N, 0); 1275} 1276 1277SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1278 SDValue Val, SDValue DTy, 1279 SDValue STy, SDValue Rnd, SDValue Sat, 1280 ISD::CvtCode Code) { 1281 // If the src and dest types are the same and the conversion is between 1282 // integer types of the same sign or two floats, no conversion is necessary. 1283 if (DTy == STy && 1284 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1285 return Val; 1286 1287 FoldingSetNodeID ID; 1288 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1289 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1290 void* IP = 0; 1291 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1292 return SDValue(E, 0); 1293 1294 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1295 Code); 1296 CSEMap.InsertNode(N, IP); 1297 AllNodes.push_back(N); 1298 return SDValue(N, 0); 1299} 1300 1301SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1302 FoldingSetNodeID ID; 1303 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1304 ID.AddInteger(RegNo); 1305 void *IP = 0; 1306 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1307 return SDValue(E, 0); 1308 1309 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1310 CSEMap.InsertNode(N, IP); 1311 AllNodes.push_back(N); 1312 return SDValue(N, 0); 1313} 1314 1315SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1316 FoldingSetNodeID ID; 1317 SDValue Ops[] = { Root }; 1318 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1319 ID.AddPointer(Label); 1320 void *IP = 0; 1321 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1322 return SDValue(E, 0); 1323 1324 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1325 CSEMap.InsertNode(N, IP); 1326 AllNodes.push_back(N); 1327 return SDValue(N, 0); 1328} 1329 1330 1331SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1332 bool isTarget, 1333 unsigned char TargetFlags) { 1334 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1335 1336 FoldingSetNodeID ID; 1337 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1338 ID.AddPointer(BA); 1339 ID.AddInteger(TargetFlags); 1340 void *IP = 0; 1341 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1342 return SDValue(E, 0); 1343 1344 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1345 CSEMap.InsertNode(N, IP); 1346 AllNodes.push_back(N); 1347 return SDValue(N, 0); 1348} 1349 1350SDValue SelectionDAG::getSrcValue(const Value *V) { 1351 assert((!V || V->getType()->isPointerTy()) && 1352 "SrcValue is not a pointer?"); 1353 1354 FoldingSetNodeID ID; 1355 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1356 ID.AddPointer(V); 1357 1358 void *IP = 0; 1359 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1360 return SDValue(E, 0); 1361 1362 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1363 CSEMap.InsertNode(N, IP); 1364 AllNodes.push_back(N); 1365 return SDValue(N, 0); 1366} 1367 1368/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1369SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1370 FoldingSetNodeID ID; 1371 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1372 ID.AddPointer(MD); 1373 1374 void *IP = 0; 1375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1376 return SDValue(E, 0); 1377 1378 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1379 CSEMap.InsertNode(N, IP); 1380 AllNodes.push_back(N); 1381 return SDValue(N, 0); 1382} 1383 1384 1385/// getShiftAmountOperand - Return the specified value casted to 1386/// the target's desired shift amount type. 1387SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1388 EVT OpTy = Op.getValueType(); 1389 MVT ShTy = TLI.getShiftAmountTy(); 1390 if (OpTy == ShTy || OpTy.isVector()) return Op; 1391 1392 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1393 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1394} 1395 1396/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1397/// specified value type. 1398SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1399 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1400 unsigned ByteSize = VT.getStoreSize(); 1401 const Type *Ty = VT.getTypeForEVT(*getContext()); 1402 unsigned StackAlign = 1403 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1404 1405 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1406 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1407} 1408 1409/// CreateStackTemporary - Create a stack temporary suitable for holding 1410/// either of the specified value types. 1411SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1412 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1413 VT2.getStoreSizeInBits())/8; 1414 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1415 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1416 const TargetData *TD = TLI.getTargetData(); 1417 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1418 TD->getPrefTypeAlignment(Ty2)); 1419 1420 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1421 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1422 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1423} 1424 1425SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1426 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1427 // These setcc operations always fold. 1428 switch (Cond) { 1429 default: break; 1430 case ISD::SETFALSE: 1431 case ISD::SETFALSE2: return getConstant(0, VT); 1432 case ISD::SETTRUE: 1433 case ISD::SETTRUE2: return getConstant(1, VT); 1434 1435 case ISD::SETOEQ: 1436 case ISD::SETOGT: 1437 case ISD::SETOGE: 1438 case ISD::SETOLT: 1439 case ISD::SETOLE: 1440 case ISD::SETONE: 1441 case ISD::SETO: 1442 case ISD::SETUO: 1443 case ISD::SETUEQ: 1444 case ISD::SETUNE: 1445 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1446 break; 1447 } 1448 1449 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1450 const APInt &C2 = N2C->getAPIntValue(); 1451 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1452 const APInt &C1 = N1C->getAPIntValue(); 1453 1454 switch (Cond) { 1455 default: llvm_unreachable("Unknown integer setcc!"); 1456 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1457 case ISD::SETNE: return getConstant(C1 != C2, VT); 1458 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1459 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1460 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1461 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1462 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1463 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1464 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1465 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1466 } 1467 } 1468 } 1469 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1470 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1471 // No compile time operations on this type yet. 1472 if (N1C->getValueType(0) == MVT::ppcf128) 1473 return SDValue(); 1474 1475 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1476 switch (Cond) { 1477 default: break; 1478 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1479 return getUNDEF(VT); 1480 // fall through 1481 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1482 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1483 return getUNDEF(VT); 1484 // fall through 1485 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1486 R==APFloat::cmpLessThan, VT); 1487 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1488 return getUNDEF(VT); 1489 // fall through 1490 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1491 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1492 return getUNDEF(VT); 1493 // fall through 1494 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1495 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1496 return getUNDEF(VT); 1497 // fall through 1498 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1499 R==APFloat::cmpEqual, VT); 1500 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1501 return getUNDEF(VT); 1502 // fall through 1503 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1504 R==APFloat::cmpEqual, VT); 1505 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1506 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1507 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1508 R==APFloat::cmpEqual, VT); 1509 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1510 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1511 R==APFloat::cmpLessThan, VT); 1512 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1513 R==APFloat::cmpUnordered, VT); 1514 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1515 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1516 } 1517 } else { 1518 // Ensure that the constant occurs on the RHS. 1519 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1520 } 1521 } 1522 1523 // Could not fold it. 1524 return SDValue(); 1525} 1526 1527/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1528/// use this predicate to simplify operations downstream. 1529bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1530 // This predicate is not safe for vector operations. 1531 if (Op.getValueType().isVector()) 1532 return false; 1533 1534 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1535 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1536} 1537 1538/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1539/// this predicate to simplify operations downstream. Mask is known to be zero 1540/// for bits that V cannot have. 1541bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1542 unsigned Depth) const { 1543 APInt KnownZero, KnownOne; 1544 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1545 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1546 return (KnownZero & Mask) == Mask; 1547} 1548 1549/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1550/// known to be either zero or one and return them in the KnownZero/KnownOne 1551/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1552/// processing. 1553void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1554 APInt &KnownZero, APInt &KnownOne, 1555 unsigned Depth) const { 1556 unsigned BitWidth = Mask.getBitWidth(); 1557 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1558 "Mask size mismatches value type size!"); 1559 1560 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1561 if (Depth == 6 || Mask == 0) 1562 return; // Limit search depth. 1563 1564 APInt KnownZero2, KnownOne2; 1565 1566 switch (Op.getOpcode()) { 1567 case ISD::Constant: 1568 // We know all of the bits for a constant! 1569 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1570 KnownZero = ~KnownOne & Mask; 1571 return; 1572 case ISD::AND: 1573 // If either the LHS or the RHS are Zero, the result is zero. 1574 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1575 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1576 KnownZero2, KnownOne2, Depth+1); 1577 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1578 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1579 1580 // Output known-1 bits are only known if set in both the LHS & RHS. 1581 KnownOne &= KnownOne2; 1582 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1583 KnownZero |= KnownZero2; 1584 return; 1585 case ISD::OR: 1586 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1587 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1588 KnownZero2, KnownOne2, Depth+1); 1589 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1590 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1591 1592 // Output known-0 bits are only known if clear in both the LHS & RHS. 1593 KnownZero &= KnownZero2; 1594 // Output known-1 are known to be set if set in either the LHS | RHS. 1595 KnownOne |= KnownOne2; 1596 return; 1597 case ISD::XOR: { 1598 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1599 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1600 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1601 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1602 1603 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1604 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1605 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1606 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1607 KnownZero = KnownZeroOut; 1608 return; 1609 } 1610 case ISD::MUL: { 1611 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1612 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1613 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1614 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1615 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1616 1617 // If low bits are zero in either operand, output low known-0 bits. 1618 // Also compute a conserative estimate for high known-0 bits. 1619 // More trickiness is possible, but this is sufficient for the 1620 // interesting case of alignment computation. 1621 KnownOne.clear(); 1622 unsigned TrailZ = KnownZero.countTrailingOnes() + 1623 KnownZero2.countTrailingOnes(); 1624 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1625 KnownZero2.countLeadingOnes(), 1626 BitWidth) - BitWidth; 1627 1628 TrailZ = std::min(TrailZ, BitWidth); 1629 LeadZ = std::min(LeadZ, BitWidth); 1630 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1631 APInt::getHighBitsSet(BitWidth, LeadZ); 1632 KnownZero &= Mask; 1633 return; 1634 } 1635 case ISD::UDIV: { 1636 // For the purposes of computing leading zeros we can conservatively 1637 // treat a udiv as a logical right shift by the power of 2 known to 1638 // be less than the denominator. 1639 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1640 ComputeMaskedBits(Op.getOperand(0), 1641 AllOnes, KnownZero2, KnownOne2, Depth+1); 1642 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1643 1644 KnownOne2.clear(); 1645 KnownZero2.clear(); 1646 ComputeMaskedBits(Op.getOperand(1), 1647 AllOnes, KnownZero2, KnownOne2, Depth+1); 1648 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1649 if (RHSUnknownLeadingOnes != BitWidth) 1650 LeadZ = std::min(BitWidth, 1651 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1652 1653 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1654 return; 1655 } 1656 case ISD::SELECT: 1657 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1658 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1659 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1660 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1661 1662 // Only known if known in both the LHS and RHS. 1663 KnownOne &= KnownOne2; 1664 KnownZero &= KnownZero2; 1665 return; 1666 case ISD::SELECT_CC: 1667 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1668 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1669 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1670 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1671 1672 // Only known if known in both the LHS and RHS. 1673 KnownOne &= KnownOne2; 1674 KnownZero &= KnownZero2; 1675 return; 1676 case ISD::SADDO: 1677 case ISD::UADDO: 1678 case ISD::SSUBO: 1679 case ISD::USUBO: 1680 case ISD::SMULO: 1681 case ISD::UMULO: 1682 if (Op.getResNo() != 1) 1683 return; 1684 // The boolean result conforms to getBooleanContents. Fall through. 1685 case ISD::SETCC: 1686 // If we know the result of a setcc has the top bits zero, use this info. 1687 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1688 BitWidth > 1) 1689 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1690 return; 1691 case ISD::SHL: 1692 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1693 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1694 unsigned ShAmt = SA->getZExtValue(); 1695 1696 // If the shift count is an invalid immediate, don't do anything. 1697 if (ShAmt >= BitWidth) 1698 return; 1699 1700 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1701 KnownZero, KnownOne, Depth+1); 1702 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1703 KnownZero <<= ShAmt; 1704 KnownOne <<= ShAmt; 1705 // low bits known zero. 1706 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1707 } 1708 return; 1709 case ISD::SRL: 1710 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1711 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1712 unsigned ShAmt = SA->getZExtValue(); 1713 1714 // If the shift count is an invalid immediate, don't do anything. 1715 if (ShAmt >= BitWidth) 1716 return; 1717 1718 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1719 KnownZero, KnownOne, Depth+1); 1720 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1721 KnownZero = KnownZero.lshr(ShAmt); 1722 KnownOne = KnownOne.lshr(ShAmt); 1723 1724 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1725 KnownZero |= HighBits; // High bits known zero. 1726 } 1727 return; 1728 case ISD::SRA: 1729 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1730 unsigned ShAmt = SA->getZExtValue(); 1731 1732 // If the shift count is an invalid immediate, don't do anything. 1733 if (ShAmt >= BitWidth) 1734 return; 1735 1736 APInt InDemandedMask = (Mask << ShAmt); 1737 // If any of the demanded bits are produced by the sign extension, we also 1738 // demand the input sign bit. 1739 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1740 if (HighBits.getBoolValue()) 1741 InDemandedMask |= APInt::getSignBit(BitWidth); 1742 1743 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1744 Depth+1); 1745 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1746 KnownZero = KnownZero.lshr(ShAmt); 1747 KnownOne = KnownOne.lshr(ShAmt); 1748 1749 // Handle the sign bits. 1750 APInt SignBit = APInt::getSignBit(BitWidth); 1751 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1752 1753 if (KnownZero.intersects(SignBit)) { 1754 KnownZero |= HighBits; // New bits are known zero. 1755 } else if (KnownOne.intersects(SignBit)) { 1756 KnownOne |= HighBits; // New bits are known one. 1757 } 1758 } 1759 return; 1760 case ISD::SIGN_EXTEND_INREG: { 1761 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1762 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1763 1764 // Sign extension. Compute the demanded bits in the result that are not 1765 // present in the input. 1766 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1767 1768 APInt InSignBit = APInt::getSignBit(EBits); 1769 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1770 1771 // If the sign extended bits are demanded, we know that the sign 1772 // bit is demanded. 1773 InSignBit.zext(BitWidth); 1774 if (NewBits.getBoolValue()) 1775 InputDemandedBits |= InSignBit; 1776 1777 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1778 KnownZero, KnownOne, Depth+1); 1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1780 1781 // If the sign bit of the input is known set or clear, then we know the 1782 // top bits of the result. 1783 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1784 KnownZero |= NewBits; 1785 KnownOne &= ~NewBits; 1786 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1787 KnownOne |= NewBits; 1788 KnownZero &= ~NewBits; 1789 } else { // Input sign bit unknown 1790 KnownZero &= ~NewBits; 1791 KnownOne &= ~NewBits; 1792 } 1793 return; 1794 } 1795 case ISD::CTTZ: 1796 case ISD::CTLZ: 1797 case ISD::CTPOP: { 1798 unsigned LowBits = Log2_32(BitWidth)+1; 1799 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1800 KnownOne.clear(); 1801 return; 1802 } 1803 case ISD::LOAD: { 1804 if (ISD::isZEXTLoad(Op.getNode())) { 1805 LoadSDNode *LD = cast<LoadSDNode>(Op); 1806 EVT VT = LD->getMemoryVT(); 1807 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1808 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1809 } 1810 return; 1811 } 1812 case ISD::ZERO_EXTEND: { 1813 EVT InVT = Op.getOperand(0).getValueType(); 1814 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1815 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1816 APInt InMask = Mask; 1817 InMask.trunc(InBits); 1818 KnownZero.trunc(InBits); 1819 KnownOne.trunc(InBits); 1820 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1821 KnownZero.zext(BitWidth); 1822 KnownOne.zext(BitWidth); 1823 KnownZero |= NewBits; 1824 return; 1825 } 1826 case ISD::SIGN_EXTEND: { 1827 EVT InVT = Op.getOperand(0).getValueType(); 1828 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1829 APInt InSignBit = APInt::getSignBit(InBits); 1830 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1831 APInt InMask = Mask; 1832 InMask.trunc(InBits); 1833 1834 // If any of the sign extended bits are demanded, we know that the sign 1835 // bit is demanded. Temporarily set this bit in the mask for our callee. 1836 if (NewBits.getBoolValue()) 1837 InMask |= InSignBit; 1838 1839 KnownZero.trunc(InBits); 1840 KnownOne.trunc(InBits); 1841 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1842 1843 // Note if the sign bit is known to be zero or one. 1844 bool SignBitKnownZero = KnownZero.isNegative(); 1845 bool SignBitKnownOne = KnownOne.isNegative(); 1846 assert(!(SignBitKnownZero && SignBitKnownOne) && 1847 "Sign bit can't be known to be both zero and one!"); 1848 1849 // If the sign bit wasn't actually demanded by our caller, we don't 1850 // want it set in the KnownZero and KnownOne result values. Reset the 1851 // mask and reapply it to the result values. 1852 InMask = Mask; 1853 InMask.trunc(InBits); 1854 KnownZero &= InMask; 1855 KnownOne &= InMask; 1856 1857 KnownZero.zext(BitWidth); 1858 KnownOne.zext(BitWidth); 1859 1860 // If the sign bit is known zero or one, the top bits match. 1861 if (SignBitKnownZero) 1862 KnownZero |= NewBits; 1863 else if (SignBitKnownOne) 1864 KnownOne |= NewBits; 1865 return; 1866 } 1867 case ISD::ANY_EXTEND: { 1868 EVT InVT = Op.getOperand(0).getValueType(); 1869 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1870 APInt InMask = Mask; 1871 InMask.trunc(InBits); 1872 KnownZero.trunc(InBits); 1873 KnownOne.trunc(InBits); 1874 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1875 KnownZero.zext(BitWidth); 1876 KnownOne.zext(BitWidth); 1877 return; 1878 } 1879 case ISD::TRUNCATE: { 1880 EVT InVT = Op.getOperand(0).getValueType(); 1881 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1882 APInt InMask = Mask; 1883 InMask.zext(InBits); 1884 KnownZero.zext(InBits); 1885 KnownOne.zext(InBits); 1886 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1887 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1888 KnownZero.trunc(BitWidth); 1889 KnownOne.trunc(BitWidth); 1890 break; 1891 } 1892 case ISD::AssertZext: { 1893 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1894 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1895 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1896 KnownOne, Depth+1); 1897 KnownZero |= (~InMask) & Mask; 1898 return; 1899 } 1900 case ISD::FGETSIGN: 1901 // All bits are zero except the low bit. 1902 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1903 return; 1904 1905 case ISD::SUB: { 1906 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1907 // We know that the top bits of C-X are clear if X contains less bits 1908 // than C (i.e. no wrap-around can happen). For example, 20-X is 1909 // positive if we can prove that X is >= 0 and < 16. 1910 if (CLHS->getAPIntValue().isNonNegative()) { 1911 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1912 // NLZ can't be BitWidth with no sign bit 1913 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1914 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1915 Depth+1); 1916 1917 // If all of the MaskV bits are known to be zero, then we know the 1918 // output top bits are zero, because we now know that the output is 1919 // from [0-C]. 1920 if ((KnownZero2 & MaskV) == MaskV) { 1921 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1922 // Top bits known zero. 1923 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1924 } 1925 } 1926 } 1927 } 1928 // fall through 1929 case ISD::ADD: { 1930 // Output known-0 bits are known if clear or set in both the low clear bits 1931 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1932 // low 3 bits clear. 1933 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1934 BitWidth - Mask.countLeadingZeros()); 1935 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1936 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1937 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1938 1939 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1940 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1941 KnownZeroOut = std::min(KnownZeroOut, 1942 KnownZero2.countTrailingOnes()); 1943 1944 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1945 return; 1946 } 1947 case ISD::SREM: 1948 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1949 const APInt &RA = Rem->getAPIntValue().abs(); 1950 if (RA.isPowerOf2()) { 1951 APInt LowBits = RA - 1; 1952 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1953 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1954 1955 // The low bits of the first operand are unchanged by the srem. 1956 KnownZero = KnownZero2 & LowBits; 1957 KnownOne = KnownOne2 & LowBits; 1958 1959 // If the first operand is non-negative or has all low bits zero, then 1960 // the upper bits are all zero. 1961 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1962 KnownZero |= ~LowBits; 1963 1964 // If the first operand is negative and not all low bits are zero, then 1965 // the upper bits are all one. 1966 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1967 KnownOne |= ~LowBits; 1968 1969 KnownZero &= Mask; 1970 KnownOne &= Mask; 1971 1972 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1973 } 1974 } 1975 return; 1976 case ISD::UREM: { 1977 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1978 const APInt &RA = Rem->getAPIntValue(); 1979 if (RA.isPowerOf2()) { 1980 APInt LowBits = (RA - 1); 1981 APInt Mask2 = LowBits & Mask; 1982 KnownZero |= ~LowBits & Mask; 1983 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1984 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1985 break; 1986 } 1987 } 1988 1989 // Since the result is less than or equal to either operand, any leading 1990 // zero bits in either operand must also exist in the result. 1991 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1992 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1993 Depth+1); 1994 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1995 Depth+1); 1996 1997 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1998 KnownZero2.countLeadingOnes()); 1999 KnownOne.clear(); 2000 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2001 return; 2002 } 2003 default: 2004 // Allow the target to implement this method for its nodes. 2005 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2006 case ISD::INTRINSIC_WO_CHAIN: 2007 case ISD::INTRINSIC_W_CHAIN: 2008 case ISD::INTRINSIC_VOID: 2009 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2010 Depth); 2011 } 2012 return; 2013 } 2014} 2015 2016/// ComputeNumSignBits - Return the number of times the sign bit of the 2017/// register is replicated into the other bits. We know that at least 1 bit 2018/// is always equal to the sign bit (itself), but other cases can give us 2019/// information. For example, immediately after an "SRA X, 2", we know that 2020/// the top 3 bits are all equal to each other, so we return 3. 2021unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2022 EVT VT = Op.getValueType(); 2023 assert(VT.isInteger() && "Invalid VT!"); 2024 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2025 unsigned Tmp, Tmp2; 2026 unsigned FirstAnswer = 1; 2027 2028 if (Depth == 6) 2029 return 1; // Limit search depth. 2030 2031 switch (Op.getOpcode()) { 2032 default: break; 2033 case ISD::AssertSext: 2034 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2035 return VTBits-Tmp+1; 2036 case ISD::AssertZext: 2037 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2038 return VTBits-Tmp; 2039 2040 case ISD::Constant: { 2041 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2042 // If negative, return # leading ones. 2043 if (Val.isNegative()) 2044 return Val.countLeadingOnes(); 2045 2046 // Return # leading zeros. 2047 return Val.countLeadingZeros(); 2048 } 2049 2050 case ISD::SIGN_EXTEND: 2051 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2052 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2053 2054 case ISD::SIGN_EXTEND_INREG: 2055 // Max of the input and what this extends. 2056 Tmp = 2057 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2058 Tmp = VTBits-Tmp+1; 2059 2060 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2061 return std::max(Tmp, Tmp2); 2062 2063 case ISD::SRA: 2064 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2065 // SRA X, C -> adds C sign bits. 2066 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2067 Tmp += C->getZExtValue(); 2068 if (Tmp > VTBits) Tmp = VTBits; 2069 } 2070 return Tmp; 2071 case ISD::SHL: 2072 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2073 // shl destroys sign bits. 2074 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2075 if (C->getZExtValue() >= VTBits || // Bad shift. 2076 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2077 return Tmp - C->getZExtValue(); 2078 } 2079 break; 2080 case ISD::AND: 2081 case ISD::OR: 2082 case ISD::XOR: // NOT is handled here. 2083 // Logical binary ops preserve the number of sign bits at the worst. 2084 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2085 if (Tmp != 1) { 2086 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2087 FirstAnswer = std::min(Tmp, Tmp2); 2088 // We computed what we know about the sign bits as our first 2089 // answer. Now proceed to the generic code that uses 2090 // ComputeMaskedBits, and pick whichever answer is better. 2091 } 2092 break; 2093 2094 case ISD::SELECT: 2095 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2096 if (Tmp == 1) return 1; // Early out. 2097 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2098 return std::min(Tmp, Tmp2); 2099 2100 case ISD::SADDO: 2101 case ISD::UADDO: 2102 case ISD::SSUBO: 2103 case ISD::USUBO: 2104 case ISD::SMULO: 2105 case ISD::UMULO: 2106 if (Op.getResNo() != 1) 2107 break; 2108 // The boolean result conforms to getBooleanContents. Fall through. 2109 case ISD::SETCC: 2110 // If setcc returns 0/-1, all bits are sign bits. 2111 if (TLI.getBooleanContents() == 2112 TargetLowering::ZeroOrNegativeOneBooleanContent) 2113 return VTBits; 2114 break; 2115 case ISD::ROTL: 2116 case ISD::ROTR: 2117 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2118 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2119 2120 // Handle rotate right by N like a rotate left by 32-N. 2121 if (Op.getOpcode() == ISD::ROTR) 2122 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2123 2124 // If we aren't rotating out all of the known-in sign bits, return the 2125 // number that are left. This handles rotl(sext(x), 1) for example. 2126 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2127 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2128 } 2129 break; 2130 case ISD::ADD: 2131 // Add can have at most one carry bit. Thus we know that the output 2132 // is, at worst, one more bit than the inputs. 2133 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2134 if (Tmp == 1) return 1; // Early out. 2135 2136 // Special case decrementing a value (ADD X, -1): 2137 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2138 if (CRHS->isAllOnesValue()) { 2139 APInt KnownZero, KnownOne; 2140 APInt Mask = APInt::getAllOnesValue(VTBits); 2141 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2142 2143 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2144 // sign bits set. 2145 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2146 return VTBits; 2147 2148 // If we are subtracting one from a positive number, there is no carry 2149 // out of the result. 2150 if (KnownZero.isNegative()) 2151 return Tmp; 2152 } 2153 2154 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2155 if (Tmp2 == 1) return 1; 2156 return std::min(Tmp, Tmp2)-1; 2157 break; 2158 2159 case ISD::SUB: 2160 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2161 if (Tmp2 == 1) return 1; 2162 2163 // Handle NEG. 2164 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2165 if (CLHS->isNullValue()) { 2166 APInt KnownZero, KnownOne; 2167 APInt Mask = APInt::getAllOnesValue(VTBits); 2168 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2169 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2170 // sign bits set. 2171 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2172 return VTBits; 2173 2174 // If the input is known to be positive (the sign bit is known clear), 2175 // the output of the NEG has the same number of sign bits as the input. 2176 if (KnownZero.isNegative()) 2177 return Tmp2; 2178 2179 // Otherwise, we treat this like a SUB. 2180 } 2181 2182 // Sub can have at most one carry bit. Thus we know that the output 2183 // is, at worst, one more bit than the inputs. 2184 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2185 if (Tmp == 1) return 1; // Early out. 2186 return std::min(Tmp, Tmp2)-1; 2187 break; 2188 case ISD::TRUNCATE: 2189 // FIXME: it's tricky to do anything useful for this, but it is an important 2190 // case for targets like X86. 2191 break; 2192 } 2193 2194 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2195 if (Op.getOpcode() == ISD::LOAD) { 2196 LoadSDNode *LD = cast<LoadSDNode>(Op); 2197 unsigned ExtType = LD->getExtensionType(); 2198 switch (ExtType) { 2199 default: break; 2200 case ISD::SEXTLOAD: // '17' bits known 2201 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2202 return VTBits-Tmp+1; 2203 case ISD::ZEXTLOAD: // '16' bits known 2204 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2205 return VTBits-Tmp; 2206 } 2207 } 2208 2209 // Allow the target to implement this method for its nodes. 2210 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2211 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2212 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2213 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2214 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2215 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2216 } 2217 2218 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2219 // use this information. 2220 APInt KnownZero, KnownOne; 2221 APInt Mask = APInt::getAllOnesValue(VTBits); 2222 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2223 2224 if (KnownZero.isNegative()) { // sign bit is 0 2225 Mask = KnownZero; 2226 } else if (KnownOne.isNegative()) { // sign bit is 1; 2227 Mask = KnownOne; 2228 } else { 2229 // Nothing known. 2230 return FirstAnswer; 2231 } 2232 2233 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2234 // the number of identical bits in the top of the input value. 2235 Mask = ~Mask; 2236 Mask <<= Mask.getBitWidth()-VTBits; 2237 // Return # leading zeros. We use 'min' here in case Val was zero before 2238 // shifting. We don't want to return '64' as for an i32 "0". 2239 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2240} 2241 2242bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2243 // If we're told that NaNs won't happen, assume they won't. 2244 if (FiniteOnlyFPMath()) 2245 return true; 2246 2247 // If the value is a constant, we can obviously see if it is a NaN or not. 2248 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2249 return !C->getValueAPF().isNaN(); 2250 2251 // TODO: Recognize more cases here. 2252 2253 return false; 2254} 2255 2256bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2257 // If the value is a constant, we can obviously see if it is a zero or not. 2258 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2259 return !C->isZero(); 2260 2261 // TODO: Recognize more cases here. 2262 2263 return false; 2264} 2265 2266bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2267 // Check the obvious case. 2268 if (A == B) return true; 2269 2270 // For for negative and positive zero. 2271 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2272 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2273 if (CA->isZero() && CB->isZero()) return true; 2274 2275 // Otherwise they may not be equal. 2276 return false; 2277} 2278 2279bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2280 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2281 if (!GA) return false; 2282 if (GA->getOffset() != 0) return false; 2283 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2284 if (!GV) return false; 2285 return MF->getMMI().hasDebugInfo(); 2286} 2287 2288 2289/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2290/// element of the result of the vector shuffle. 2291SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2292 unsigned i) { 2293 EVT VT = N->getValueType(0); 2294 DebugLoc dl = N->getDebugLoc(); 2295 if (N->getMaskElt(i) < 0) 2296 return getUNDEF(VT.getVectorElementType()); 2297 unsigned Index = N->getMaskElt(i); 2298 unsigned NumElems = VT.getVectorNumElements(); 2299 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2300 Index %= NumElems; 2301 2302 if (V.getOpcode() == ISD::BIT_CONVERT) { 2303 V = V.getOperand(0); 2304 EVT VVT = V.getValueType(); 2305 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2306 return SDValue(); 2307 } 2308 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2309 return (Index == 0) ? V.getOperand(0) 2310 : getUNDEF(VT.getVectorElementType()); 2311 if (V.getOpcode() == ISD::BUILD_VECTOR) 2312 return V.getOperand(Index); 2313 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2314 return getShuffleScalarElt(SVN, Index); 2315 return SDValue(); 2316} 2317 2318 2319/// getNode - Gets or creates the specified node. 2320/// 2321SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2322 FoldingSetNodeID ID; 2323 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2324 void *IP = 0; 2325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2326 return SDValue(E, 0); 2327 2328 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2329 CSEMap.InsertNode(N, IP); 2330 2331 AllNodes.push_back(N); 2332#ifndef NDEBUG 2333 VerifyNode(N); 2334#endif 2335 return SDValue(N, 0); 2336} 2337 2338SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2339 EVT VT, SDValue Operand) { 2340 // Constant fold unary operations with an integer constant operand. 2341 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2342 const APInt &Val = C->getAPIntValue(); 2343 switch (Opcode) { 2344 default: break; 2345 case ISD::SIGN_EXTEND: 2346 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2347 case ISD::ANY_EXTEND: 2348 case ISD::ZERO_EXTEND: 2349 case ISD::TRUNCATE: 2350 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2351 case ISD::UINT_TO_FP: 2352 case ISD::SINT_TO_FP: { 2353 const uint64_t zero[] = {0, 0}; 2354 // No compile time operations on ppcf128. 2355 if (VT == MVT::ppcf128) break; 2356 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2357 (void)apf.convertFromAPInt(Val, 2358 Opcode==ISD::SINT_TO_FP, 2359 APFloat::rmNearestTiesToEven); 2360 return getConstantFP(apf, VT); 2361 } 2362 case ISD::BIT_CONVERT: 2363 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2364 return getConstantFP(Val.bitsToFloat(), VT); 2365 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2366 return getConstantFP(Val.bitsToDouble(), VT); 2367 break; 2368 case ISD::BSWAP: 2369 return getConstant(Val.byteSwap(), VT); 2370 case ISD::CTPOP: 2371 return getConstant(Val.countPopulation(), VT); 2372 case ISD::CTLZ: 2373 return getConstant(Val.countLeadingZeros(), VT); 2374 case ISD::CTTZ: 2375 return getConstant(Val.countTrailingZeros(), VT); 2376 } 2377 } 2378 2379 // Constant fold unary operations with a floating point constant operand. 2380 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2381 APFloat V = C->getValueAPF(); // make copy 2382 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2383 switch (Opcode) { 2384 case ISD::FNEG: 2385 V.changeSign(); 2386 return getConstantFP(V, VT); 2387 case ISD::FABS: 2388 V.clearSign(); 2389 return getConstantFP(V, VT); 2390 case ISD::FP_ROUND: 2391 case ISD::FP_EXTEND: { 2392 bool ignored; 2393 // This can return overflow, underflow, or inexact; we don't care. 2394 // FIXME need to be more flexible about rounding mode. 2395 (void)V.convert(*EVTToAPFloatSemantics(VT), 2396 APFloat::rmNearestTiesToEven, &ignored); 2397 return getConstantFP(V, VT); 2398 } 2399 case ISD::FP_TO_SINT: 2400 case ISD::FP_TO_UINT: { 2401 integerPart x[2]; 2402 bool ignored; 2403 assert(integerPartWidth >= 64); 2404 // FIXME need to be more flexible about rounding mode. 2405 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2406 Opcode==ISD::FP_TO_SINT, 2407 APFloat::rmTowardZero, &ignored); 2408 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2409 break; 2410 APInt api(VT.getSizeInBits(), 2, x); 2411 return getConstant(api, VT); 2412 } 2413 case ISD::BIT_CONVERT: 2414 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2415 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2416 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2417 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2418 break; 2419 } 2420 } 2421 } 2422 2423 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2424 switch (Opcode) { 2425 case ISD::TokenFactor: 2426 case ISD::MERGE_VALUES: 2427 case ISD::CONCAT_VECTORS: 2428 return Operand; // Factor, merge or concat of one node? No need. 2429 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2430 case ISD::FP_EXTEND: 2431 assert(VT.isFloatingPoint() && 2432 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2433 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2434 assert((!VT.isVector() || 2435 VT.getVectorNumElements() == 2436 Operand.getValueType().getVectorNumElements()) && 2437 "Vector element count mismatch!"); 2438 if (Operand.getOpcode() == ISD::UNDEF) 2439 return getUNDEF(VT); 2440 break; 2441 case ISD::SIGN_EXTEND: 2442 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2443 "Invalid SIGN_EXTEND!"); 2444 if (Operand.getValueType() == VT) return Operand; // noop extension 2445 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2446 "Invalid sext node, dst < src!"); 2447 assert((!VT.isVector() || 2448 VT.getVectorNumElements() == 2449 Operand.getValueType().getVectorNumElements()) && 2450 "Vector element count mismatch!"); 2451 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2452 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2453 break; 2454 case ISD::ZERO_EXTEND: 2455 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2456 "Invalid ZERO_EXTEND!"); 2457 if (Operand.getValueType() == VT) return Operand; // noop extension 2458 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2459 "Invalid zext node, dst < src!"); 2460 assert((!VT.isVector() || 2461 VT.getVectorNumElements() == 2462 Operand.getValueType().getVectorNumElements()) && 2463 "Vector element count mismatch!"); 2464 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2465 return getNode(ISD::ZERO_EXTEND, DL, VT, 2466 Operand.getNode()->getOperand(0)); 2467 break; 2468 case ISD::ANY_EXTEND: 2469 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2470 "Invalid ANY_EXTEND!"); 2471 if (Operand.getValueType() == VT) return Operand; // noop extension 2472 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2473 "Invalid anyext node, dst < src!"); 2474 assert((!VT.isVector() || 2475 VT.getVectorNumElements() == 2476 Operand.getValueType().getVectorNumElements()) && 2477 "Vector element count mismatch!"); 2478 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2479 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2480 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2481 break; 2482 case ISD::TRUNCATE: 2483 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2484 "Invalid TRUNCATE!"); 2485 if (Operand.getValueType() == VT) return Operand; // noop truncate 2486 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2487 "Invalid truncate node, src < dst!"); 2488 assert((!VT.isVector() || 2489 VT.getVectorNumElements() == 2490 Operand.getValueType().getVectorNumElements()) && 2491 "Vector element count mismatch!"); 2492 if (OpOpcode == ISD::TRUNCATE) 2493 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2494 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2495 OpOpcode == ISD::ANY_EXTEND) { 2496 // If the source is smaller than the dest, we still need an extend. 2497 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2498 .bitsLT(VT.getScalarType())) 2499 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2500 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2501 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2502 else 2503 return Operand.getNode()->getOperand(0); 2504 } 2505 break; 2506 case ISD::BIT_CONVERT: 2507 // Basic sanity checking. 2508 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2509 && "Cannot BIT_CONVERT between types of different sizes!"); 2510 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2511 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2512 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2513 if (OpOpcode == ISD::UNDEF) 2514 return getUNDEF(VT); 2515 break; 2516 case ISD::SCALAR_TO_VECTOR: 2517 assert(VT.isVector() && !Operand.getValueType().isVector() && 2518 (VT.getVectorElementType() == Operand.getValueType() || 2519 (VT.getVectorElementType().isInteger() && 2520 Operand.getValueType().isInteger() && 2521 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2522 "Illegal SCALAR_TO_VECTOR node!"); 2523 if (OpOpcode == ISD::UNDEF) 2524 return getUNDEF(VT); 2525 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2526 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2527 isa<ConstantSDNode>(Operand.getOperand(1)) && 2528 Operand.getConstantOperandVal(1) == 0 && 2529 Operand.getOperand(0).getValueType() == VT) 2530 return Operand.getOperand(0); 2531 break; 2532 case ISD::FNEG: 2533 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2534 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2535 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2536 Operand.getNode()->getOperand(0)); 2537 if (OpOpcode == ISD::FNEG) // --X -> X 2538 return Operand.getNode()->getOperand(0); 2539 break; 2540 case ISD::FABS: 2541 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2542 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2543 break; 2544 } 2545 2546 SDNode *N; 2547 SDVTList VTs = getVTList(VT); 2548 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2549 FoldingSetNodeID ID; 2550 SDValue Ops[1] = { Operand }; 2551 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2552 void *IP = 0; 2553 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2554 return SDValue(E, 0); 2555 2556 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2557 CSEMap.InsertNode(N, IP); 2558 } else { 2559 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2560 } 2561 2562 AllNodes.push_back(N); 2563#ifndef NDEBUG 2564 VerifyNode(N); 2565#endif 2566 return SDValue(N, 0); 2567} 2568 2569SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2570 EVT VT, 2571 ConstantSDNode *Cst1, 2572 ConstantSDNode *Cst2) { 2573 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2574 2575 switch (Opcode) { 2576 case ISD::ADD: return getConstant(C1 + C2, VT); 2577 case ISD::SUB: return getConstant(C1 - C2, VT); 2578 case ISD::MUL: return getConstant(C1 * C2, VT); 2579 case ISD::UDIV: 2580 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2581 break; 2582 case ISD::UREM: 2583 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2584 break; 2585 case ISD::SDIV: 2586 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2587 break; 2588 case ISD::SREM: 2589 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2590 break; 2591 case ISD::AND: return getConstant(C1 & C2, VT); 2592 case ISD::OR: return getConstant(C1 | C2, VT); 2593 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2594 case ISD::SHL: return getConstant(C1 << C2, VT); 2595 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2596 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2597 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2598 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2599 default: break; 2600 } 2601 2602 return SDValue(); 2603} 2604 2605SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2606 SDValue N1, SDValue N2) { 2607 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2608 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2609 switch (Opcode) { 2610 default: break; 2611 case ISD::TokenFactor: 2612 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2613 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2614 // Fold trivial token factors. 2615 if (N1.getOpcode() == ISD::EntryToken) return N2; 2616 if (N2.getOpcode() == ISD::EntryToken) return N1; 2617 if (N1 == N2) return N1; 2618 break; 2619 case ISD::CONCAT_VECTORS: 2620 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2621 // one big BUILD_VECTOR. 2622 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2623 N2.getOpcode() == ISD::BUILD_VECTOR) { 2624 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2625 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2626 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2627 } 2628 break; 2629 case ISD::AND: 2630 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2631 assert(N1.getValueType() == N2.getValueType() && 2632 N1.getValueType() == VT && "Binary operator types must match!"); 2633 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2634 // worth handling here. 2635 if (N2C && N2C->isNullValue()) 2636 return N2; 2637 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2638 return N1; 2639 break; 2640 case ISD::OR: 2641 case ISD::XOR: 2642 case ISD::ADD: 2643 case ISD::SUB: 2644 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2645 assert(N1.getValueType() == N2.getValueType() && 2646 N1.getValueType() == VT && "Binary operator types must match!"); 2647 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2648 // it's worth handling here. 2649 if (N2C && N2C->isNullValue()) 2650 return N1; 2651 break; 2652 case ISD::UDIV: 2653 case ISD::UREM: 2654 case ISD::MULHU: 2655 case ISD::MULHS: 2656 case ISD::MUL: 2657 case ISD::SDIV: 2658 case ISD::SREM: 2659 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2660 assert(N1.getValueType() == N2.getValueType() && 2661 N1.getValueType() == VT && "Binary operator types must match!"); 2662 break; 2663 case ISD::FADD: 2664 case ISD::FSUB: 2665 case ISD::FMUL: 2666 case ISD::FDIV: 2667 case ISD::FREM: 2668 if (UnsafeFPMath) { 2669 if (Opcode == ISD::FADD) { 2670 // 0+x --> x 2671 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2672 if (CFP->getValueAPF().isZero()) 2673 return N2; 2674 // x+0 --> x 2675 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2676 if (CFP->getValueAPF().isZero()) 2677 return N1; 2678 } else if (Opcode == ISD::FSUB) { 2679 // x-0 --> x 2680 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2681 if (CFP->getValueAPF().isZero()) 2682 return N1; 2683 } 2684 } 2685 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2686 assert(N1.getValueType() == N2.getValueType() && 2687 N1.getValueType() == VT && "Binary operator types must match!"); 2688 break; 2689 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2690 assert(N1.getValueType() == VT && 2691 N1.getValueType().isFloatingPoint() && 2692 N2.getValueType().isFloatingPoint() && 2693 "Invalid FCOPYSIGN!"); 2694 break; 2695 case ISD::SHL: 2696 case ISD::SRA: 2697 case ISD::SRL: 2698 case ISD::ROTL: 2699 case ISD::ROTR: 2700 assert(VT == N1.getValueType() && 2701 "Shift operators return type must be the same as their first arg"); 2702 assert(VT.isInteger() && N2.getValueType().isInteger() && 2703 "Shifts only work on integers"); 2704 2705 // Always fold shifts of i1 values so the code generator doesn't need to 2706 // handle them. Since we know the size of the shift has to be less than the 2707 // size of the value, the shift/rotate count is guaranteed to be zero. 2708 if (VT == MVT::i1) 2709 return N1; 2710 if (N2C && N2C->isNullValue()) 2711 return N1; 2712 break; 2713 case ISD::FP_ROUND_INREG: { 2714 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2715 assert(VT == N1.getValueType() && "Not an inreg round!"); 2716 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2717 "Cannot FP_ROUND_INREG integer types"); 2718 assert(EVT.isVector() == VT.isVector() && 2719 "FP_ROUND_INREG type should be vector iff the operand " 2720 "type is vector!"); 2721 assert((!EVT.isVector() || 2722 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2723 "Vector element counts must match in FP_ROUND_INREG"); 2724 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2725 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2726 break; 2727 } 2728 case ISD::FP_ROUND: 2729 assert(VT.isFloatingPoint() && 2730 N1.getValueType().isFloatingPoint() && 2731 VT.bitsLE(N1.getValueType()) && 2732 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2733 if (N1.getValueType() == VT) return N1; // noop conversion. 2734 break; 2735 case ISD::AssertSext: 2736 case ISD::AssertZext: { 2737 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2738 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2739 assert(VT.isInteger() && EVT.isInteger() && 2740 "Cannot *_EXTEND_INREG FP types"); 2741 assert(!EVT.isVector() && 2742 "AssertSExt/AssertZExt type should be the vector element type " 2743 "rather than the vector type!"); 2744 assert(EVT.bitsLE(VT) && "Not extending!"); 2745 if (VT == EVT) return N1; // noop assertion. 2746 break; 2747 } 2748 case ISD::SIGN_EXTEND_INREG: { 2749 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2750 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2751 assert(VT.isInteger() && EVT.isInteger() && 2752 "Cannot *_EXTEND_INREG FP types"); 2753 assert(EVT.isVector() == VT.isVector() && 2754 "SIGN_EXTEND_INREG type should be vector iff the operand " 2755 "type is vector!"); 2756 assert((!EVT.isVector() || 2757 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2758 "Vector element counts must match in SIGN_EXTEND_INREG"); 2759 assert(EVT.bitsLE(VT) && "Not extending!"); 2760 if (EVT == VT) return N1; // Not actually extending 2761 2762 if (N1C) { 2763 APInt Val = N1C->getAPIntValue(); 2764 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2765 Val <<= Val.getBitWidth()-FromBits; 2766 Val = Val.ashr(Val.getBitWidth()-FromBits); 2767 return getConstant(Val, VT); 2768 } 2769 break; 2770 } 2771 case ISD::EXTRACT_VECTOR_ELT: 2772 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2773 if (N1.getOpcode() == ISD::UNDEF) 2774 return getUNDEF(VT); 2775 2776 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2777 // expanding copies of large vectors from registers. 2778 if (N2C && 2779 N1.getOpcode() == ISD::CONCAT_VECTORS && 2780 N1.getNumOperands() > 0) { 2781 unsigned Factor = 2782 N1.getOperand(0).getValueType().getVectorNumElements(); 2783 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2784 N1.getOperand(N2C->getZExtValue() / Factor), 2785 getConstant(N2C->getZExtValue() % Factor, 2786 N2.getValueType())); 2787 } 2788 2789 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2790 // expanding large vector constants. 2791 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2792 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2793 EVT VEltTy = N1.getValueType().getVectorElementType(); 2794 if (Elt.getValueType() != VEltTy) { 2795 // If the vector element type is not legal, the BUILD_VECTOR operands 2796 // are promoted and implicitly truncated. Make that explicit here. 2797 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2798 } 2799 if (VT != VEltTy) { 2800 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2801 // result is implicitly extended. 2802 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2803 } 2804 return Elt; 2805 } 2806 2807 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2808 // operations are lowered to scalars. 2809 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2810 // If the indices are the same, return the inserted element else 2811 // if the indices are known different, extract the element from 2812 // the original vector. 2813 SDValue N1Op2 = N1.getOperand(2); 2814 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2815 2816 if (N1Op2C && N2C) { 2817 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2818 if (VT == N1.getOperand(1).getValueType()) 2819 return N1.getOperand(1); 2820 else 2821 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2822 } 2823 2824 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2825 } 2826 } 2827 break; 2828 case ISD::EXTRACT_ELEMENT: 2829 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2830 assert(!N1.getValueType().isVector() && !VT.isVector() && 2831 (N1.getValueType().isInteger() == VT.isInteger()) && 2832 "Wrong types for EXTRACT_ELEMENT!"); 2833 2834 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2835 // 64-bit integers into 32-bit parts. Instead of building the extract of 2836 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2837 if (N1.getOpcode() == ISD::BUILD_PAIR) 2838 return N1.getOperand(N2C->getZExtValue()); 2839 2840 // EXTRACT_ELEMENT of a constant int is also very common. 2841 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2842 unsigned ElementSize = VT.getSizeInBits(); 2843 unsigned Shift = ElementSize * N2C->getZExtValue(); 2844 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2845 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2846 } 2847 break; 2848 case ISD::EXTRACT_SUBVECTOR: 2849 if (N1.getValueType() == VT) // Trivial extraction. 2850 return N1; 2851 break; 2852 } 2853 2854 if (N1C) { 2855 if (N2C) { 2856 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2857 if (SV.getNode()) return SV; 2858 } else { // Cannonicalize constant to RHS if commutative 2859 if (isCommutativeBinOp(Opcode)) { 2860 std::swap(N1C, N2C); 2861 std::swap(N1, N2); 2862 } 2863 } 2864 } 2865 2866 // Constant fold FP operations. 2867 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2868 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2869 if (N1CFP) { 2870 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2871 // Cannonicalize constant to RHS if commutative 2872 std::swap(N1CFP, N2CFP); 2873 std::swap(N1, N2); 2874 } else if (N2CFP && VT != MVT::ppcf128) { 2875 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2876 APFloat::opStatus s; 2877 switch (Opcode) { 2878 case ISD::FADD: 2879 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2880 if (s != APFloat::opInvalidOp) 2881 return getConstantFP(V1, VT); 2882 break; 2883 case ISD::FSUB: 2884 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2885 if (s!=APFloat::opInvalidOp) 2886 return getConstantFP(V1, VT); 2887 break; 2888 case ISD::FMUL: 2889 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2890 if (s!=APFloat::opInvalidOp) 2891 return getConstantFP(V1, VT); 2892 break; 2893 case ISD::FDIV: 2894 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2895 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2896 return getConstantFP(V1, VT); 2897 break; 2898 case ISD::FREM : 2899 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2900 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2901 return getConstantFP(V1, VT); 2902 break; 2903 case ISD::FCOPYSIGN: 2904 V1.copySign(V2); 2905 return getConstantFP(V1, VT); 2906 default: break; 2907 } 2908 } 2909 } 2910 2911 // Canonicalize an UNDEF to the RHS, even over a constant. 2912 if (N1.getOpcode() == ISD::UNDEF) { 2913 if (isCommutativeBinOp(Opcode)) { 2914 std::swap(N1, N2); 2915 } else { 2916 switch (Opcode) { 2917 case ISD::FP_ROUND_INREG: 2918 case ISD::SIGN_EXTEND_INREG: 2919 case ISD::SUB: 2920 case ISD::FSUB: 2921 case ISD::FDIV: 2922 case ISD::FREM: 2923 case ISD::SRA: 2924 return N1; // fold op(undef, arg2) -> undef 2925 case ISD::UDIV: 2926 case ISD::SDIV: 2927 case ISD::UREM: 2928 case ISD::SREM: 2929 case ISD::SRL: 2930 case ISD::SHL: 2931 if (!VT.isVector()) 2932 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2933 // For vectors, we can't easily build an all zero vector, just return 2934 // the LHS. 2935 return N2; 2936 } 2937 } 2938 } 2939 2940 // Fold a bunch of operators when the RHS is undef. 2941 if (N2.getOpcode() == ISD::UNDEF) { 2942 switch (Opcode) { 2943 case ISD::XOR: 2944 if (N1.getOpcode() == ISD::UNDEF) 2945 // Handle undef ^ undef -> 0 special case. This is a common 2946 // idiom (misuse). 2947 return getConstant(0, VT); 2948 // fallthrough 2949 case ISD::ADD: 2950 case ISD::ADDC: 2951 case ISD::ADDE: 2952 case ISD::SUB: 2953 case ISD::UDIV: 2954 case ISD::SDIV: 2955 case ISD::UREM: 2956 case ISD::SREM: 2957 return N2; // fold op(arg1, undef) -> undef 2958 case ISD::FADD: 2959 case ISD::FSUB: 2960 case ISD::FMUL: 2961 case ISD::FDIV: 2962 case ISD::FREM: 2963 if (UnsafeFPMath) 2964 return N2; 2965 break; 2966 case ISD::MUL: 2967 case ISD::AND: 2968 case ISD::SRL: 2969 case ISD::SHL: 2970 if (!VT.isVector()) 2971 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2972 // For vectors, we can't easily build an all zero vector, just return 2973 // the LHS. 2974 return N1; 2975 case ISD::OR: 2976 if (!VT.isVector()) 2977 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2978 // For vectors, we can't easily build an all one vector, just return 2979 // the LHS. 2980 return N1; 2981 case ISD::SRA: 2982 return N1; 2983 } 2984 } 2985 2986 // Memoize this node if possible. 2987 SDNode *N; 2988 SDVTList VTs = getVTList(VT); 2989 if (VT != MVT::Flag) { 2990 SDValue Ops[] = { N1, N2 }; 2991 FoldingSetNodeID ID; 2992 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2993 void *IP = 0; 2994 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2995 return SDValue(E, 0); 2996 2997 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2998 CSEMap.InsertNode(N, IP); 2999 } else { 3000 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3001 } 3002 3003 AllNodes.push_back(N); 3004#ifndef NDEBUG 3005 VerifyNode(N); 3006#endif 3007 return SDValue(N, 0); 3008} 3009 3010SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3011 SDValue N1, SDValue N2, SDValue N3) { 3012 // Perform various simplifications. 3013 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3014 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 3015 switch (Opcode) { 3016 case ISD::CONCAT_VECTORS: 3017 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3018 // one big BUILD_VECTOR. 3019 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3020 N2.getOpcode() == ISD::BUILD_VECTOR && 3021 N3.getOpcode() == ISD::BUILD_VECTOR) { 3022 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 3023 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3024 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3025 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3026 } 3027 break; 3028 case ISD::SETCC: { 3029 // Use FoldSetCC to simplify SETCC's. 3030 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3031 if (Simp.getNode()) return Simp; 3032 break; 3033 } 3034 case ISD::SELECT: 3035 if (N1C) { 3036 if (N1C->getZExtValue()) 3037 return N2; // select true, X, Y -> X 3038 else 3039 return N3; // select false, X, Y -> Y 3040 } 3041 3042 if (N2 == N3) return N2; // select C, X, X -> X 3043 break; 3044 case ISD::BRCOND: 3045 if (N2C) { 3046 if (N2C->getZExtValue()) // Unconditional branch 3047 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3048 else 3049 return N1; // Never-taken branch 3050 } 3051 break; 3052 case ISD::VECTOR_SHUFFLE: 3053 llvm_unreachable("should use getVectorShuffle constructor!"); 3054 break; 3055 case ISD::BIT_CONVERT: 3056 // Fold bit_convert nodes from a type to themselves. 3057 if (N1.getValueType() == VT) 3058 return N1; 3059 break; 3060 } 3061 3062 // Memoize node if it doesn't produce a flag. 3063 SDNode *N; 3064 SDVTList VTs = getVTList(VT); 3065 if (VT != MVT::Flag) { 3066 SDValue Ops[] = { N1, N2, N3 }; 3067 FoldingSetNodeID ID; 3068 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3069 void *IP = 0; 3070 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3071 return SDValue(E, 0); 3072 3073 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3074 CSEMap.InsertNode(N, IP); 3075 } else { 3076 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3077 } 3078 3079 AllNodes.push_back(N); 3080#ifndef NDEBUG 3081 VerifyNode(N); 3082#endif 3083 return SDValue(N, 0); 3084} 3085 3086SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3087 SDValue N1, SDValue N2, SDValue N3, 3088 SDValue N4) { 3089 SDValue Ops[] = { N1, N2, N3, N4 }; 3090 return getNode(Opcode, DL, VT, Ops, 4); 3091} 3092 3093SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3094 SDValue N1, SDValue N2, SDValue N3, 3095 SDValue N4, SDValue N5) { 3096 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3097 return getNode(Opcode, DL, VT, Ops, 5); 3098} 3099 3100/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3101/// the incoming stack arguments to be loaded from the stack. 3102SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3103 SmallVector<SDValue, 8> ArgChains; 3104 3105 // Include the original chain at the beginning of the list. When this is 3106 // used by target LowerCall hooks, this helps legalize find the 3107 // CALLSEQ_BEGIN node. 3108 ArgChains.push_back(Chain); 3109 3110 // Add a chain value for each stack argument. 3111 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3112 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3113 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3114 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3115 if (FI->getIndex() < 0) 3116 ArgChains.push_back(SDValue(L, 1)); 3117 3118 // Build a tokenfactor for all the chains. 3119 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3120 &ArgChains[0], ArgChains.size()); 3121} 3122 3123/// getMemsetValue - Vectorized representation of the memset value 3124/// operand. 3125static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3126 DebugLoc dl) { 3127 assert(Value.getOpcode() != ISD::UNDEF); 3128 3129 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3130 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3131 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3132 unsigned Shift = 8; 3133 for (unsigned i = NumBits; i > 8; i >>= 1) { 3134 Val = (Val << Shift) | Val; 3135 Shift <<= 1; 3136 } 3137 if (VT.isInteger()) 3138 return DAG.getConstant(Val, VT); 3139 return DAG.getConstantFP(APFloat(Val), VT); 3140 } 3141 3142 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3143 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3144 unsigned Shift = 8; 3145 for (unsigned i = NumBits; i > 8; i >>= 1) { 3146 Value = DAG.getNode(ISD::OR, dl, VT, 3147 DAG.getNode(ISD::SHL, dl, VT, Value, 3148 DAG.getConstant(Shift, 3149 TLI.getShiftAmountTy())), 3150 Value); 3151 Shift <<= 1; 3152 } 3153 3154 return Value; 3155} 3156 3157/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3158/// used when a memcpy is turned into a memset when the source is a constant 3159/// string ptr. 3160static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3161 const TargetLowering &TLI, 3162 std::string &Str, unsigned Offset) { 3163 // Handle vector with all elements zero. 3164 if (Str.empty()) { 3165 if (VT.isInteger()) 3166 return DAG.getConstant(0, VT); 3167 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3168 VT.getSimpleVT().SimpleTy == MVT::f64) 3169 return DAG.getConstantFP(0.0, VT); 3170 else if (VT.isVector()) { 3171 unsigned NumElts = VT.getVectorNumElements(); 3172 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3173 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3174 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3175 EltVT, NumElts))); 3176 } else 3177 llvm_unreachable("Expected type!"); 3178 } 3179 3180 assert(!VT.isVector() && "Can't handle vector type here!"); 3181 unsigned NumBits = VT.getSizeInBits(); 3182 unsigned MSB = NumBits / 8; 3183 uint64_t Val = 0; 3184 if (TLI.isLittleEndian()) 3185 Offset = Offset + MSB - 1; 3186 for (unsigned i = 0; i != MSB; ++i) { 3187 Val = (Val << 8) | (unsigned char)Str[Offset]; 3188 Offset += TLI.isLittleEndian() ? -1 : 1; 3189 } 3190 return DAG.getConstant(Val, VT); 3191} 3192 3193/// getMemBasePlusOffset - Returns base and offset node for the 3194/// 3195static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3196 SelectionDAG &DAG) { 3197 EVT VT = Base.getValueType(); 3198 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3199 VT, Base, DAG.getConstant(Offset, VT)); 3200} 3201 3202/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3203/// 3204static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3205 unsigned SrcDelta = 0; 3206 GlobalAddressSDNode *G = NULL; 3207 if (Src.getOpcode() == ISD::GlobalAddress) 3208 G = cast<GlobalAddressSDNode>(Src); 3209 else if (Src.getOpcode() == ISD::ADD && 3210 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3211 Src.getOperand(1).getOpcode() == ISD::Constant) { 3212 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3213 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3214 } 3215 if (!G) 3216 return false; 3217 3218 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3219 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3220 return true; 3221 3222 return false; 3223} 3224 3225/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3226/// to replace the memset / memcpy. Return true if the number of memory ops 3227/// is below the threshold. It returns the types of the sequence of 3228/// memory ops to perform memset / memcpy by reference. 3229static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3230 unsigned Limit, uint64_t Size, 3231 unsigned DstAlign, unsigned SrcAlign, 3232 bool NonScalarIntSafe, 3233 bool MemcpyStrSrc, 3234 SelectionDAG &DAG, 3235 const TargetLowering &TLI) { 3236 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3237 "Expecting memcpy / memset source to meet alignment requirement!"); 3238 // If 'SrcAlign' is zero, that means the memory operation does not need load 3239 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3240 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3241 // specified alignment of the memory operation. If it is zero, that means 3242 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3243 // indicates whether the memcpy source is constant so it does not need to be 3244 // loaded. 3245 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3246 NonScalarIntSafe, MemcpyStrSrc, 3247 DAG.getMachineFunction()); 3248 3249 if (VT == MVT::Other) { 3250 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3251 TLI.allowsUnalignedMemoryAccesses(VT)) { 3252 VT = TLI.getPointerTy(); 3253 } else { 3254 switch (DstAlign & 7) { 3255 case 0: VT = MVT::i64; break; 3256 case 4: VT = MVT::i32; break; 3257 case 2: VT = MVT::i16; break; 3258 default: VT = MVT::i8; break; 3259 } 3260 } 3261 3262 MVT LVT = MVT::i64; 3263 while (!TLI.isTypeLegal(LVT)) 3264 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3265 assert(LVT.isInteger()); 3266 3267 if (VT.bitsGT(LVT)) 3268 VT = LVT; 3269 } 3270 3271 unsigned NumMemOps = 0; 3272 while (Size != 0) { 3273 unsigned VTSize = VT.getSizeInBits() / 8; 3274 while (VTSize > Size) { 3275 // For now, only use non-vector load / store's for the left-over pieces. 3276 if (VT.isVector() || VT.isFloatingPoint()) { 3277 VT = MVT::i64; 3278 while (!TLI.isTypeLegal(VT)) 3279 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3280 VTSize = VT.getSizeInBits() / 8; 3281 } else { 3282 // This can result in a type that is not legal on the target, e.g. 3283 // 1 or 2 bytes on PPC. 3284 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3285 VTSize >>= 1; 3286 } 3287 } 3288 3289 if (++NumMemOps > Limit) 3290 return false; 3291 MemOps.push_back(VT); 3292 Size -= VTSize; 3293 } 3294 3295 return true; 3296} 3297 3298static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3299 SDValue Chain, SDValue Dst, 3300 SDValue Src, uint64_t Size, 3301 unsigned Align, bool isVol, 3302 bool AlwaysInline, 3303 const Value *DstSV, uint64_t DstSVOff, 3304 const Value *SrcSV, uint64_t SrcSVOff) { 3305 // Turn a memcpy of undef to nop. 3306 if (Src.getOpcode() == ISD::UNDEF) 3307 return Chain; 3308 3309 // Expand memcpy to a series of load and store ops if the size operand falls 3310 // below a certain threshold. 3311 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3312 std::vector<EVT> MemOps; 3313 bool DstAlignCanChange = false; 3314 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3315 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3316 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3317 DstAlignCanChange = true; 3318 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3319 if (Align > SrcAlign) 3320 SrcAlign = Align; 3321 std::string Str; 3322 bool CopyFromStr = isMemSrcFromString(Src, Str); 3323 bool isZeroStr = CopyFromStr && Str.empty(); 3324 uint64_t Limit = -1ULL; 3325 if (!AlwaysInline) 3326 Limit = TLI.getMaxStoresPerMemcpy(); 3327 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3328 (DstAlignCanChange ? 0 : Align), 3329 (isZeroStr ? 0 : SrcAlign), 3330 true, CopyFromStr, DAG, TLI)) 3331 return SDValue(); 3332 3333 if (DstAlignCanChange) { 3334 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3335 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3336 if (NewAlign > Align) { 3337 // Give the stack frame object a larger alignment if needed. 3338 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3339 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3340 Align = NewAlign; 3341 } 3342 } 3343 3344 SmallVector<SDValue, 8> OutChains; 3345 unsigned NumMemOps = MemOps.size(); 3346 uint64_t SrcOff = 0, DstOff = 0; 3347 for (unsigned i = 0; i != NumMemOps; ++i) { 3348 EVT VT = MemOps[i]; 3349 unsigned VTSize = VT.getSizeInBits() / 8; 3350 SDValue Value, Store; 3351 3352 if (CopyFromStr && 3353 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3354 // It's unlikely a store of a vector immediate can be done in a single 3355 // instruction. It would require a load from a constantpool first. 3356 // We only handle zero vectors here. 3357 // FIXME: Handle other cases where store of vector immediate is done in 3358 // a single instruction. 3359 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3360 Store = DAG.getStore(Chain, dl, Value, 3361 getMemBasePlusOffset(Dst, DstOff, DAG), 3362 DstSV, DstSVOff + DstOff, isVol, false, Align); 3363 } else { 3364 // The type might not be legal for the target. This should only happen 3365 // if the type is smaller than a legal type, as on PPC, so the right 3366 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3367 // to Load/Store if NVT==VT. 3368 // FIXME does the case above also need this? 3369 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3370 assert(NVT.bitsGE(VT)); 3371 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3372 getMemBasePlusOffset(Src, SrcOff, DAG), 3373 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3374 MinAlign(SrcAlign, SrcOff)); 3375 Store = DAG.getTruncStore(Chain, dl, Value, 3376 getMemBasePlusOffset(Dst, DstOff, DAG), 3377 DstSV, DstSVOff + DstOff, VT, isVol, false, 3378 Align); 3379 } 3380 OutChains.push_back(Store); 3381 SrcOff += VTSize; 3382 DstOff += VTSize; 3383 } 3384 3385 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3386 &OutChains[0], OutChains.size()); 3387} 3388 3389static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3390 SDValue Chain, SDValue Dst, 3391 SDValue Src, uint64_t Size, 3392 unsigned Align, bool isVol, 3393 bool AlwaysInline, 3394 const Value *DstSV, uint64_t DstSVOff, 3395 const Value *SrcSV, uint64_t SrcSVOff) { 3396 // Turn a memmove of undef to nop. 3397 if (Src.getOpcode() == ISD::UNDEF) 3398 return Chain; 3399 3400 // Expand memmove to a series of load and store ops if the size operand falls 3401 // below a certain threshold. 3402 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3403 std::vector<EVT> MemOps; 3404 uint64_t Limit = -1ULL; 3405 if (!AlwaysInline) 3406 Limit = TLI.getMaxStoresPerMemmove(); 3407 bool DstAlignCanChange = false; 3408 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3409 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3410 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3411 DstAlignCanChange = true; 3412 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3413 if (Align > SrcAlign) 3414 SrcAlign = Align; 3415 3416 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3417 (DstAlignCanChange ? 0 : Align), 3418 SrcAlign, true, false, DAG, TLI)) 3419 return SDValue(); 3420 3421 if (DstAlignCanChange) { 3422 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3423 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3424 if (NewAlign > Align) { 3425 // Give the stack frame object a larger alignment if needed. 3426 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3427 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3428 Align = NewAlign; 3429 } 3430 } 3431 3432 uint64_t SrcOff = 0, DstOff = 0; 3433 SmallVector<SDValue, 8> LoadValues; 3434 SmallVector<SDValue, 8> LoadChains; 3435 SmallVector<SDValue, 8> OutChains; 3436 unsigned NumMemOps = MemOps.size(); 3437 for (unsigned i = 0; i < NumMemOps; i++) { 3438 EVT VT = MemOps[i]; 3439 unsigned VTSize = VT.getSizeInBits() / 8; 3440 SDValue Value, Store; 3441 3442 Value = DAG.getLoad(VT, dl, Chain, 3443 getMemBasePlusOffset(Src, SrcOff, DAG), 3444 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3445 LoadValues.push_back(Value); 3446 LoadChains.push_back(Value.getValue(1)); 3447 SrcOff += VTSize; 3448 } 3449 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3450 &LoadChains[0], LoadChains.size()); 3451 OutChains.clear(); 3452 for (unsigned i = 0; i < NumMemOps; i++) { 3453 EVT VT = MemOps[i]; 3454 unsigned VTSize = VT.getSizeInBits() / 8; 3455 SDValue Value, Store; 3456 3457 Store = DAG.getStore(Chain, dl, LoadValues[i], 3458 getMemBasePlusOffset(Dst, DstOff, DAG), 3459 DstSV, DstSVOff + DstOff, isVol, false, Align); 3460 OutChains.push_back(Store); 3461 DstOff += VTSize; 3462 } 3463 3464 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3465 &OutChains[0], OutChains.size()); 3466} 3467 3468static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3469 SDValue Chain, SDValue Dst, 3470 SDValue Src, uint64_t Size, 3471 unsigned Align, bool isVol, 3472 const Value *DstSV, uint64_t DstSVOff) { 3473 // Turn a memset of undef to nop. 3474 if (Src.getOpcode() == ISD::UNDEF) 3475 return Chain; 3476 3477 // Expand memset to a series of load/store ops if the size operand 3478 // falls below a certain threshold. 3479 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3480 std::vector<EVT> MemOps; 3481 bool DstAlignCanChange = false; 3482 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3483 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3484 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3485 DstAlignCanChange = true; 3486 bool NonScalarIntSafe = 3487 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3488 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3489 Size, (DstAlignCanChange ? 0 : Align), 0, 3490 NonScalarIntSafe, false, DAG, TLI)) 3491 return SDValue(); 3492 3493 if (DstAlignCanChange) { 3494 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3495 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3496 if (NewAlign > Align) { 3497 // Give the stack frame object a larger alignment if needed. 3498 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3499 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3500 Align = NewAlign; 3501 } 3502 } 3503 3504 SmallVector<SDValue, 8> OutChains; 3505 uint64_t DstOff = 0; 3506 unsigned NumMemOps = MemOps.size(); 3507 for (unsigned i = 0; i < NumMemOps; i++) { 3508 EVT VT = MemOps[i]; 3509 unsigned VTSize = VT.getSizeInBits() / 8; 3510 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3511 SDValue Store = DAG.getStore(Chain, dl, Value, 3512 getMemBasePlusOffset(Dst, DstOff, DAG), 3513 DstSV, DstSVOff + DstOff, isVol, false, 0); 3514 OutChains.push_back(Store); 3515 DstOff += VTSize; 3516 } 3517 3518 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3519 &OutChains[0], OutChains.size()); 3520} 3521 3522SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3523 SDValue Src, SDValue Size, 3524 unsigned Align, bool isVol, bool AlwaysInline, 3525 const Value *DstSV, uint64_t DstSVOff, 3526 const Value *SrcSV, uint64_t SrcSVOff) { 3527 3528 // Check to see if we should lower the memcpy to loads and stores first. 3529 // For cases within the target-specified limits, this is the best choice. 3530 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3531 if (ConstantSize) { 3532 // Memcpy with size zero? Just return the original chain. 3533 if (ConstantSize->isNullValue()) 3534 return Chain; 3535 3536 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3537 ConstantSize->getZExtValue(),Align, 3538 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3539 if (Result.getNode()) 3540 return Result; 3541 } 3542 3543 // Then check to see if we should lower the memcpy with target-specific 3544 // code. If the target chooses to do this, this is the next best. 3545 SDValue Result = 3546 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3547 isVol, AlwaysInline, 3548 DstSV, DstSVOff, SrcSV, SrcSVOff); 3549 if (Result.getNode()) 3550 return Result; 3551 3552 // If we really need inline code and the target declined to provide it, 3553 // use a (potentially long) sequence of loads and stores. 3554 if (AlwaysInline) { 3555 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3556 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3557 ConstantSize->getZExtValue(), Align, isVol, 3558 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3559 } 3560 3561 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3562 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3563 // respect volatile, so they may do things like read or write memory 3564 // beyond the given memory regions. But fixing this isn't easy, and most 3565 // people don't care. 3566 3567 // Emit a library call. 3568 TargetLowering::ArgListTy Args; 3569 TargetLowering::ArgListEntry Entry; 3570 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3571 Entry.Node = Dst; Args.push_back(Entry); 3572 Entry.Node = Src; Args.push_back(Entry); 3573 Entry.Node = Size; Args.push_back(Entry); 3574 // FIXME: pass in DebugLoc 3575 std::pair<SDValue,SDValue> CallResult = 3576 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3577 false, false, false, false, 0, 3578 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3579 /*isReturnValueUsed=*/false, 3580 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3581 TLI.getPointerTy()), 3582 Args, *this, dl); 3583 return CallResult.second; 3584} 3585 3586SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3587 SDValue Src, SDValue Size, 3588 unsigned Align, bool isVol, 3589 const Value *DstSV, uint64_t DstSVOff, 3590 const Value *SrcSV, uint64_t SrcSVOff) { 3591 3592 // Check to see if we should lower the memmove to loads and stores first. 3593 // For cases within the target-specified limits, this is the best choice. 3594 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3595 if (ConstantSize) { 3596 // Memmove with size zero? Just return the original chain. 3597 if (ConstantSize->isNullValue()) 3598 return Chain; 3599 3600 SDValue Result = 3601 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3602 ConstantSize->getZExtValue(), Align, isVol, 3603 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3604 if (Result.getNode()) 3605 return Result; 3606 } 3607 3608 // Then check to see if we should lower the memmove with target-specific 3609 // code. If the target chooses to do this, this is the next best. 3610 SDValue Result = 3611 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3612 DstSV, DstSVOff, SrcSV, SrcSVOff); 3613 if (Result.getNode()) 3614 return Result; 3615 3616 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3617 // not be safe. See memcpy above for more details. 3618 3619 // Emit a library call. 3620 TargetLowering::ArgListTy Args; 3621 TargetLowering::ArgListEntry Entry; 3622 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3623 Entry.Node = Dst; Args.push_back(Entry); 3624 Entry.Node = Src; Args.push_back(Entry); 3625 Entry.Node = Size; Args.push_back(Entry); 3626 // FIXME: pass in DebugLoc 3627 std::pair<SDValue,SDValue> CallResult = 3628 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3629 false, false, false, false, 0, 3630 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3631 /*isReturnValueUsed=*/false, 3632 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3633 TLI.getPointerTy()), 3634 Args, *this, dl); 3635 return CallResult.second; 3636} 3637 3638SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3639 SDValue Src, SDValue Size, 3640 unsigned Align, bool isVol, 3641 const Value *DstSV, uint64_t DstSVOff) { 3642 3643 // Check to see if we should lower the memset to stores first. 3644 // For cases within the target-specified limits, this is the best choice. 3645 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3646 if (ConstantSize) { 3647 // Memset with size zero? Just return the original chain. 3648 if (ConstantSize->isNullValue()) 3649 return Chain; 3650 3651 SDValue Result = 3652 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3653 Align, isVol, DstSV, DstSVOff); 3654 3655 if (Result.getNode()) 3656 return Result; 3657 } 3658 3659 // Then check to see if we should lower the memset with target-specific 3660 // code. If the target chooses to do this, this is the next best. 3661 SDValue Result = 3662 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3663 DstSV, DstSVOff); 3664 if (Result.getNode()) 3665 return Result; 3666 3667 // Emit a library call. 3668 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3669 TargetLowering::ArgListTy Args; 3670 TargetLowering::ArgListEntry Entry; 3671 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3672 Args.push_back(Entry); 3673 // Extend or truncate the argument to be an i32 value for the call. 3674 if (Src.getValueType().bitsGT(MVT::i32)) 3675 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3676 else 3677 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3678 Entry.Node = Src; 3679 Entry.Ty = Type::getInt32Ty(*getContext()); 3680 Entry.isSExt = true; 3681 Args.push_back(Entry); 3682 Entry.Node = Size; 3683 Entry.Ty = IntPtrTy; 3684 Entry.isSExt = false; 3685 Args.push_back(Entry); 3686 // FIXME: pass in DebugLoc 3687 std::pair<SDValue,SDValue> CallResult = 3688 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3689 false, false, false, false, 0, 3690 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3691 /*isReturnValueUsed=*/false, 3692 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3693 TLI.getPointerTy()), 3694 Args, *this, dl); 3695 return CallResult.second; 3696} 3697 3698SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3699 SDValue Chain, 3700 SDValue Ptr, SDValue Cmp, 3701 SDValue Swp, const Value* PtrVal, 3702 unsigned Alignment) { 3703 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3704 Alignment = getEVTAlignment(MemVT); 3705 3706 // Check if the memory reference references a frame index 3707 if (!PtrVal) 3708 if (const FrameIndexSDNode *FI = 3709 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3710 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3711 3712 MachineFunction &MF = getMachineFunction(); 3713 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3714 3715 // For now, atomics are considered to be volatile always. 3716 Flags |= MachineMemOperand::MOVolatile; 3717 3718 MachineMemOperand *MMO = 3719 MF.getMachineMemOperand(PtrVal, Flags, 0, 3720 MemVT.getStoreSize(), Alignment); 3721 3722 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3723} 3724 3725SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3726 SDValue Chain, 3727 SDValue Ptr, SDValue Cmp, 3728 SDValue Swp, MachineMemOperand *MMO) { 3729 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3730 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3731 3732 EVT VT = Cmp.getValueType(); 3733 3734 SDVTList VTs = getVTList(VT, MVT::Other); 3735 FoldingSetNodeID ID; 3736 ID.AddInteger(MemVT.getRawBits()); 3737 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3738 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3739 void* IP = 0; 3740 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3741 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3742 return SDValue(E, 0); 3743 } 3744 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3745 Ptr, Cmp, Swp, MMO); 3746 CSEMap.InsertNode(N, IP); 3747 AllNodes.push_back(N); 3748 return SDValue(N, 0); 3749} 3750 3751SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3752 SDValue Chain, 3753 SDValue Ptr, SDValue Val, 3754 const Value* PtrVal, 3755 unsigned Alignment) { 3756 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3757 Alignment = getEVTAlignment(MemVT); 3758 3759 // Check if the memory reference references a frame index 3760 if (!PtrVal) 3761 if (const FrameIndexSDNode *FI = 3762 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3763 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3764 3765 MachineFunction &MF = getMachineFunction(); 3766 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3767 3768 // For now, atomics are considered to be volatile always. 3769 Flags |= MachineMemOperand::MOVolatile; 3770 3771 MachineMemOperand *MMO = 3772 MF.getMachineMemOperand(PtrVal, Flags, 0, 3773 MemVT.getStoreSize(), Alignment); 3774 3775 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3776} 3777 3778SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3779 SDValue Chain, 3780 SDValue Ptr, SDValue Val, 3781 MachineMemOperand *MMO) { 3782 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3783 Opcode == ISD::ATOMIC_LOAD_SUB || 3784 Opcode == ISD::ATOMIC_LOAD_AND || 3785 Opcode == ISD::ATOMIC_LOAD_OR || 3786 Opcode == ISD::ATOMIC_LOAD_XOR || 3787 Opcode == ISD::ATOMIC_LOAD_NAND || 3788 Opcode == ISD::ATOMIC_LOAD_MIN || 3789 Opcode == ISD::ATOMIC_LOAD_MAX || 3790 Opcode == ISD::ATOMIC_LOAD_UMIN || 3791 Opcode == ISD::ATOMIC_LOAD_UMAX || 3792 Opcode == ISD::ATOMIC_SWAP) && 3793 "Invalid Atomic Op"); 3794 3795 EVT VT = Val.getValueType(); 3796 3797 SDVTList VTs = getVTList(VT, MVT::Other); 3798 FoldingSetNodeID ID; 3799 ID.AddInteger(MemVT.getRawBits()); 3800 SDValue Ops[] = {Chain, Ptr, Val}; 3801 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3802 void* IP = 0; 3803 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3804 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3805 return SDValue(E, 0); 3806 } 3807 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3808 Ptr, Val, MMO); 3809 CSEMap.InsertNode(N, IP); 3810 AllNodes.push_back(N); 3811 return SDValue(N, 0); 3812} 3813 3814/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3815/// Allowed to return something different (and simpler) if Simplify is true. 3816SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3817 DebugLoc dl) { 3818 if (NumOps == 1) 3819 return Ops[0]; 3820 3821 SmallVector<EVT, 4> VTs; 3822 VTs.reserve(NumOps); 3823 for (unsigned i = 0; i < NumOps; ++i) 3824 VTs.push_back(Ops[i].getValueType()); 3825 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3826 Ops, NumOps); 3827} 3828 3829SDValue 3830SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3831 const EVT *VTs, unsigned NumVTs, 3832 const SDValue *Ops, unsigned NumOps, 3833 EVT MemVT, const Value *srcValue, int SVOff, 3834 unsigned Align, bool Vol, 3835 bool ReadMem, bool WriteMem) { 3836 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3837 MemVT, srcValue, SVOff, Align, Vol, 3838 ReadMem, WriteMem); 3839} 3840 3841SDValue 3842SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3843 const SDValue *Ops, unsigned NumOps, 3844 EVT MemVT, const Value *srcValue, int SVOff, 3845 unsigned Align, bool Vol, 3846 bool ReadMem, bool WriteMem) { 3847 if (Align == 0) // Ensure that codegen never sees alignment 0 3848 Align = getEVTAlignment(MemVT); 3849 3850 MachineFunction &MF = getMachineFunction(); 3851 unsigned Flags = 0; 3852 if (WriteMem) 3853 Flags |= MachineMemOperand::MOStore; 3854 if (ReadMem) 3855 Flags |= MachineMemOperand::MOLoad; 3856 if (Vol) 3857 Flags |= MachineMemOperand::MOVolatile; 3858 MachineMemOperand *MMO = 3859 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3860 MemVT.getStoreSize(), Align); 3861 3862 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3863} 3864 3865SDValue 3866SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3867 const SDValue *Ops, unsigned NumOps, 3868 EVT MemVT, MachineMemOperand *MMO) { 3869 assert((Opcode == ISD::INTRINSIC_VOID || 3870 Opcode == ISD::INTRINSIC_W_CHAIN || 3871 (Opcode <= INT_MAX && 3872 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3873 "Opcode is not a memory-accessing opcode!"); 3874 3875 // Memoize the node unless it returns a flag. 3876 MemIntrinsicSDNode *N; 3877 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3878 FoldingSetNodeID ID; 3879 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3880 void *IP = 0; 3881 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3882 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3883 return SDValue(E, 0); 3884 } 3885 3886 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3887 MemVT, MMO); 3888 CSEMap.InsertNode(N, IP); 3889 } else { 3890 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3891 MemVT, MMO); 3892 } 3893 AllNodes.push_back(N); 3894 return SDValue(N, 0); 3895} 3896 3897SDValue 3898SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3899 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3900 SDValue Ptr, SDValue Offset, 3901 const Value *SV, int SVOffset, EVT MemVT, 3902 bool isVolatile, bool isNonTemporal, 3903 unsigned Alignment) { 3904 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3905 Alignment = getEVTAlignment(VT); 3906 3907 // Check if the memory reference references a frame index 3908 if (!SV) 3909 if (const FrameIndexSDNode *FI = 3910 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3911 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3912 3913 MachineFunction &MF = getMachineFunction(); 3914 unsigned Flags = MachineMemOperand::MOLoad; 3915 if (isVolatile) 3916 Flags |= MachineMemOperand::MOVolatile; 3917 if (isNonTemporal) 3918 Flags |= MachineMemOperand::MONonTemporal; 3919 MachineMemOperand *MMO = 3920 MF.getMachineMemOperand(SV, Flags, SVOffset, 3921 MemVT.getStoreSize(), Alignment); 3922 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3923} 3924 3925SDValue 3926SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3927 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3928 SDValue Ptr, SDValue Offset, EVT MemVT, 3929 MachineMemOperand *MMO) { 3930 if (VT == MemVT) { 3931 ExtType = ISD::NON_EXTLOAD; 3932 } else if (ExtType == ISD::NON_EXTLOAD) { 3933 assert(VT == MemVT && "Non-extending load from different memory type!"); 3934 } else { 3935 // Extending load. 3936 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3937 "Should only be an extending load, not truncating!"); 3938 assert(VT.isInteger() == MemVT.isInteger() && 3939 "Cannot convert from FP to Int or Int -> FP!"); 3940 assert(VT.isVector() == MemVT.isVector() && 3941 "Cannot use trunc store to convert to or from a vector!"); 3942 assert((!VT.isVector() || 3943 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3944 "Cannot use trunc store to change the number of vector elements!"); 3945 } 3946 3947 bool Indexed = AM != ISD::UNINDEXED; 3948 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3949 "Unindexed load with an offset!"); 3950 3951 SDVTList VTs = Indexed ? 3952 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3953 SDValue Ops[] = { Chain, Ptr, Offset }; 3954 FoldingSetNodeID ID; 3955 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3956 ID.AddInteger(MemVT.getRawBits()); 3957 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3958 MMO->isNonTemporal())); 3959 void *IP = 0; 3960 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3961 cast<LoadSDNode>(E)->refineAlignment(MMO); 3962 return SDValue(E, 0); 3963 } 3964 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3965 MemVT, MMO); 3966 CSEMap.InsertNode(N, IP); 3967 AllNodes.push_back(N); 3968 return SDValue(N, 0); 3969} 3970 3971SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3972 SDValue Chain, SDValue Ptr, 3973 const Value *SV, int SVOffset, 3974 bool isVolatile, bool isNonTemporal, 3975 unsigned Alignment) { 3976 SDValue Undef = getUNDEF(Ptr.getValueType()); 3977 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3978 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3979} 3980 3981SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3982 SDValue Chain, SDValue Ptr, 3983 const Value *SV, 3984 int SVOffset, EVT MemVT, 3985 bool isVolatile, bool isNonTemporal, 3986 unsigned Alignment) { 3987 SDValue Undef = getUNDEF(Ptr.getValueType()); 3988 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3989 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3990} 3991 3992SDValue 3993SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3994 SDValue Offset, ISD::MemIndexedMode AM) { 3995 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3996 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3997 "Load is already a indexed load!"); 3998 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3999 LD->getChain(), Base, Offset, LD->getSrcValue(), 4000 LD->getSrcValueOffset(), LD->getMemoryVT(), 4001 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4002} 4003 4004SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4005 SDValue Ptr, const Value *SV, int SVOffset, 4006 bool isVolatile, bool isNonTemporal, 4007 unsigned Alignment) { 4008 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4009 Alignment = getEVTAlignment(Val.getValueType()); 4010 4011 // Check if the memory reference references a frame index 4012 if (!SV) 4013 if (const FrameIndexSDNode *FI = 4014 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4015 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4016 4017 MachineFunction &MF = getMachineFunction(); 4018 unsigned Flags = MachineMemOperand::MOStore; 4019 if (isVolatile) 4020 Flags |= MachineMemOperand::MOVolatile; 4021 if (isNonTemporal) 4022 Flags |= MachineMemOperand::MONonTemporal; 4023 MachineMemOperand *MMO = 4024 MF.getMachineMemOperand(SV, Flags, SVOffset, 4025 Val.getValueType().getStoreSize(), Alignment); 4026 4027 return getStore(Chain, dl, Val, Ptr, MMO); 4028} 4029 4030SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4031 SDValue Ptr, MachineMemOperand *MMO) { 4032 EVT VT = Val.getValueType(); 4033 SDVTList VTs = getVTList(MVT::Other); 4034 SDValue Undef = getUNDEF(Ptr.getValueType()); 4035 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4036 FoldingSetNodeID ID; 4037 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4038 ID.AddInteger(VT.getRawBits()); 4039 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4040 MMO->isNonTemporal())); 4041 void *IP = 0; 4042 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4043 cast<StoreSDNode>(E)->refineAlignment(MMO); 4044 return SDValue(E, 0); 4045 } 4046 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4047 false, VT, MMO); 4048 CSEMap.InsertNode(N, IP); 4049 AllNodes.push_back(N); 4050 return SDValue(N, 0); 4051} 4052 4053SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4054 SDValue Ptr, const Value *SV, 4055 int SVOffset, EVT SVT, 4056 bool isVolatile, bool isNonTemporal, 4057 unsigned Alignment) { 4058 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4059 Alignment = getEVTAlignment(SVT); 4060 4061 // Check if the memory reference references a frame index 4062 if (!SV) 4063 if (const FrameIndexSDNode *FI = 4064 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4065 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4066 4067 MachineFunction &MF = getMachineFunction(); 4068 unsigned Flags = MachineMemOperand::MOStore; 4069 if (isVolatile) 4070 Flags |= MachineMemOperand::MOVolatile; 4071 if (isNonTemporal) 4072 Flags |= MachineMemOperand::MONonTemporal; 4073 MachineMemOperand *MMO = 4074 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4075 4076 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4077} 4078 4079SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4080 SDValue Ptr, EVT SVT, 4081 MachineMemOperand *MMO) { 4082 EVT VT = Val.getValueType(); 4083 4084 if (VT == SVT) 4085 return getStore(Chain, dl, Val, Ptr, MMO); 4086 4087 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4088 "Should only be a truncating store, not extending!"); 4089 assert(VT.isInteger() == SVT.isInteger() && 4090 "Can't do FP-INT conversion!"); 4091 assert(VT.isVector() == SVT.isVector() && 4092 "Cannot use trunc store to convert to or from a vector!"); 4093 assert((!VT.isVector() || 4094 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4095 "Cannot use trunc store to change the number of vector elements!"); 4096 4097 SDVTList VTs = getVTList(MVT::Other); 4098 SDValue Undef = getUNDEF(Ptr.getValueType()); 4099 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4100 FoldingSetNodeID ID; 4101 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4102 ID.AddInteger(SVT.getRawBits()); 4103 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4104 MMO->isNonTemporal())); 4105 void *IP = 0; 4106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4107 cast<StoreSDNode>(E)->refineAlignment(MMO); 4108 return SDValue(E, 0); 4109 } 4110 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4111 true, SVT, MMO); 4112 CSEMap.InsertNode(N, IP); 4113 AllNodes.push_back(N); 4114 return SDValue(N, 0); 4115} 4116 4117SDValue 4118SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4119 SDValue Offset, ISD::MemIndexedMode AM) { 4120 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4121 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4122 "Store is already a indexed store!"); 4123 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4124 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4125 FoldingSetNodeID ID; 4126 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4127 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4128 ID.AddInteger(ST->getRawSubclassData()); 4129 void *IP = 0; 4130 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4131 return SDValue(E, 0); 4132 4133 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4134 ST->isTruncatingStore(), 4135 ST->getMemoryVT(), 4136 ST->getMemOperand()); 4137 CSEMap.InsertNode(N, IP); 4138 AllNodes.push_back(N); 4139 return SDValue(N, 0); 4140} 4141 4142SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4143 SDValue Chain, SDValue Ptr, 4144 SDValue SV) { 4145 SDValue Ops[] = { Chain, Ptr, SV }; 4146 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4147} 4148 4149SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4150 const SDUse *Ops, unsigned NumOps) { 4151 switch (NumOps) { 4152 case 0: return getNode(Opcode, DL, VT); 4153 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4154 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4155 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4156 default: break; 4157 } 4158 4159 // Copy from an SDUse array into an SDValue array for use with 4160 // the regular getNode logic. 4161 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4162 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4163} 4164 4165SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4166 const SDValue *Ops, unsigned NumOps) { 4167 switch (NumOps) { 4168 case 0: return getNode(Opcode, DL, VT); 4169 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4170 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4171 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4172 default: break; 4173 } 4174 4175 switch (Opcode) { 4176 default: break; 4177 case ISD::SELECT_CC: { 4178 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4179 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4180 "LHS and RHS of condition must have same type!"); 4181 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4182 "True and False arms of SelectCC must have same type!"); 4183 assert(Ops[2].getValueType() == VT && 4184 "select_cc node must be of same type as true and false value!"); 4185 break; 4186 } 4187 case ISD::BR_CC: { 4188 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4189 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4190 "LHS/RHS of comparison should match types!"); 4191 break; 4192 } 4193 } 4194 4195 // Memoize nodes. 4196 SDNode *N; 4197 SDVTList VTs = getVTList(VT); 4198 4199 if (VT != MVT::Flag) { 4200 FoldingSetNodeID ID; 4201 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4202 void *IP = 0; 4203 4204 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4205 return SDValue(E, 0); 4206 4207 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4208 CSEMap.InsertNode(N, IP); 4209 } else { 4210 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4211 } 4212 4213 AllNodes.push_back(N); 4214#ifndef NDEBUG 4215 VerifyNode(N); 4216#endif 4217 return SDValue(N, 0); 4218} 4219 4220SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4221 const std::vector<EVT> &ResultTys, 4222 const SDValue *Ops, unsigned NumOps) { 4223 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4224 Ops, NumOps); 4225} 4226 4227SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4228 const EVT *VTs, unsigned NumVTs, 4229 const SDValue *Ops, unsigned NumOps) { 4230 if (NumVTs == 1) 4231 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4232 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4233} 4234 4235SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4236 const SDValue *Ops, unsigned NumOps) { 4237 if (VTList.NumVTs == 1) 4238 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4239 4240#if 0 4241 switch (Opcode) { 4242 // FIXME: figure out how to safely handle things like 4243 // int foo(int x) { return 1 << (x & 255); } 4244 // int bar() { return foo(256); } 4245 case ISD::SRA_PARTS: 4246 case ISD::SRL_PARTS: 4247 case ISD::SHL_PARTS: 4248 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4249 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4250 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4251 else if (N3.getOpcode() == ISD::AND) 4252 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4253 // If the and is only masking out bits that cannot effect the shift, 4254 // eliminate the and. 4255 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4256 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4257 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4258 } 4259 break; 4260 } 4261#endif 4262 4263 // Memoize the node unless it returns a flag. 4264 SDNode *N; 4265 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4266 FoldingSetNodeID ID; 4267 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4268 void *IP = 0; 4269 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4270 return SDValue(E, 0); 4271 4272 if (NumOps == 1) { 4273 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4274 } else if (NumOps == 2) { 4275 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4276 } else if (NumOps == 3) { 4277 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4278 Ops[2]); 4279 } else { 4280 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4281 } 4282 CSEMap.InsertNode(N, IP); 4283 } else { 4284 if (NumOps == 1) { 4285 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4286 } else if (NumOps == 2) { 4287 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4288 } else if (NumOps == 3) { 4289 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4290 Ops[2]); 4291 } else { 4292 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4293 } 4294 } 4295 AllNodes.push_back(N); 4296#ifndef NDEBUG 4297 VerifyNode(N); 4298#endif 4299 return SDValue(N, 0); 4300} 4301 4302SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4303 return getNode(Opcode, DL, VTList, 0, 0); 4304} 4305 4306SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4307 SDValue N1) { 4308 SDValue Ops[] = { N1 }; 4309 return getNode(Opcode, DL, VTList, Ops, 1); 4310} 4311 4312SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4313 SDValue N1, SDValue N2) { 4314 SDValue Ops[] = { N1, N2 }; 4315 return getNode(Opcode, DL, VTList, Ops, 2); 4316} 4317 4318SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4319 SDValue N1, SDValue N2, SDValue N3) { 4320 SDValue Ops[] = { N1, N2, N3 }; 4321 return getNode(Opcode, DL, VTList, Ops, 3); 4322} 4323 4324SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4325 SDValue N1, SDValue N2, SDValue N3, 4326 SDValue N4) { 4327 SDValue Ops[] = { N1, N2, N3, N4 }; 4328 return getNode(Opcode, DL, VTList, Ops, 4); 4329} 4330 4331SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4332 SDValue N1, SDValue N2, SDValue N3, 4333 SDValue N4, SDValue N5) { 4334 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4335 return getNode(Opcode, DL, VTList, Ops, 5); 4336} 4337 4338SDVTList SelectionDAG::getVTList(EVT VT) { 4339 return makeVTList(SDNode::getValueTypeList(VT), 1); 4340} 4341 4342SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4343 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4344 E = VTList.rend(); I != E; ++I) 4345 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4346 return *I; 4347 4348 EVT *Array = Allocator.Allocate<EVT>(2); 4349 Array[0] = VT1; 4350 Array[1] = VT2; 4351 SDVTList Result = makeVTList(Array, 2); 4352 VTList.push_back(Result); 4353 return Result; 4354} 4355 4356SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4357 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4358 E = VTList.rend(); I != E; ++I) 4359 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4360 I->VTs[2] == VT3) 4361 return *I; 4362 4363 EVT *Array = Allocator.Allocate<EVT>(3); 4364 Array[0] = VT1; 4365 Array[1] = VT2; 4366 Array[2] = VT3; 4367 SDVTList Result = makeVTList(Array, 3); 4368 VTList.push_back(Result); 4369 return Result; 4370} 4371 4372SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4373 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4374 E = VTList.rend(); I != E; ++I) 4375 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4376 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4377 return *I; 4378 4379 EVT *Array = Allocator.Allocate<EVT>(4); 4380 Array[0] = VT1; 4381 Array[1] = VT2; 4382 Array[2] = VT3; 4383 Array[3] = VT4; 4384 SDVTList Result = makeVTList(Array, 4); 4385 VTList.push_back(Result); 4386 return Result; 4387} 4388 4389SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4390 switch (NumVTs) { 4391 case 0: llvm_unreachable("Cannot have nodes without results!"); 4392 case 1: return getVTList(VTs[0]); 4393 case 2: return getVTList(VTs[0], VTs[1]); 4394 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4395 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4396 default: break; 4397 } 4398 4399 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4400 E = VTList.rend(); I != E; ++I) { 4401 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4402 continue; 4403 4404 bool NoMatch = false; 4405 for (unsigned i = 2; i != NumVTs; ++i) 4406 if (VTs[i] != I->VTs[i]) { 4407 NoMatch = true; 4408 break; 4409 } 4410 if (!NoMatch) 4411 return *I; 4412 } 4413 4414 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4415 std::copy(VTs, VTs+NumVTs, Array); 4416 SDVTList Result = makeVTList(Array, NumVTs); 4417 VTList.push_back(Result); 4418 return Result; 4419} 4420 4421 4422/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4423/// specified operands. If the resultant node already exists in the DAG, 4424/// this does not modify the specified node, instead it returns the node that 4425/// already exists. If the resultant node does not exist in the DAG, the 4426/// input node is returned. As a degenerate case, if you specify the same 4427/// input operands as the node already has, the input node is returned. 4428SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4429 SDNode *N = InN.getNode(); 4430 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4431 4432 // Check to see if there is no change. 4433 if (Op == N->getOperand(0)) return InN; 4434 4435 // See if the modified node already exists. 4436 void *InsertPos = 0; 4437 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4438 return SDValue(Existing, InN.getResNo()); 4439 4440 // Nope it doesn't. Remove the node from its current place in the maps. 4441 if (InsertPos) 4442 if (!RemoveNodeFromCSEMaps(N)) 4443 InsertPos = 0; 4444 4445 // Now we update the operands. 4446 N->OperandList[0].set(Op); 4447 4448 // If this gets put into a CSE map, add it. 4449 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4450 return InN; 4451} 4452 4453SDValue SelectionDAG:: 4454UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4455 SDNode *N = InN.getNode(); 4456 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4457 4458 // Check to see if there is no change. 4459 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4460 return InN; // No operands changed, just return the input node. 4461 4462 // See if the modified node already exists. 4463 void *InsertPos = 0; 4464 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4465 return SDValue(Existing, InN.getResNo()); 4466 4467 // Nope it doesn't. Remove the node from its current place in the maps. 4468 if (InsertPos) 4469 if (!RemoveNodeFromCSEMaps(N)) 4470 InsertPos = 0; 4471 4472 // Now we update the operands. 4473 if (N->OperandList[0] != Op1) 4474 N->OperandList[0].set(Op1); 4475 if (N->OperandList[1] != Op2) 4476 N->OperandList[1].set(Op2); 4477 4478 // If this gets put into a CSE map, add it. 4479 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4480 return InN; 4481} 4482 4483SDValue SelectionDAG:: 4484UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4485 SDValue Ops[] = { Op1, Op2, Op3 }; 4486 return UpdateNodeOperands(N, Ops, 3); 4487} 4488 4489SDValue SelectionDAG:: 4490UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4491 SDValue Op3, SDValue Op4) { 4492 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4493 return UpdateNodeOperands(N, Ops, 4); 4494} 4495 4496SDValue SelectionDAG:: 4497UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4498 SDValue Op3, SDValue Op4, SDValue Op5) { 4499 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4500 return UpdateNodeOperands(N, Ops, 5); 4501} 4502 4503SDValue SelectionDAG:: 4504UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4505 SDNode *N = InN.getNode(); 4506 assert(N->getNumOperands() == NumOps && 4507 "Update with wrong number of operands"); 4508 4509 // Check to see if there is no change. 4510 bool AnyChange = false; 4511 for (unsigned i = 0; i != NumOps; ++i) { 4512 if (Ops[i] != N->getOperand(i)) { 4513 AnyChange = true; 4514 break; 4515 } 4516 } 4517 4518 // No operands changed, just return the input node. 4519 if (!AnyChange) return InN; 4520 4521 // See if the modified node already exists. 4522 void *InsertPos = 0; 4523 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4524 return SDValue(Existing, InN.getResNo()); 4525 4526 // Nope it doesn't. Remove the node from its current place in the maps. 4527 if (InsertPos) 4528 if (!RemoveNodeFromCSEMaps(N)) 4529 InsertPos = 0; 4530 4531 // Now we update the operands. 4532 for (unsigned i = 0; i != NumOps; ++i) 4533 if (N->OperandList[i] != Ops[i]) 4534 N->OperandList[i].set(Ops[i]); 4535 4536 // If this gets put into a CSE map, add it. 4537 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4538 return InN; 4539} 4540 4541/// DropOperands - Release the operands and set this node to have 4542/// zero operands. 4543void SDNode::DropOperands() { 4544 // Unlike the code in MorphNodeTo that does this, we don't need to 4545 // watch for dead nodes here. 4546 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4547 SDUse &Use = *I++; 4548 Use.set(SDValue()); 4549 } 4550} 4551 4552/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4553/// machine opcode. 4554/// 4555SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4556 EVT VT) { 4557 SDVTList VTs = getVTList(VT); 4558 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4559} 4560 4561SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4562 EVT VT, SDValue Op1) { 4563 SDVTList VTs = getVTList(VT); 4564 SDValue Ops[] = { Op1 }; 4565 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4566} 4567 4568SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4569 EVT VT, SDValue Op1, 4570 SDValue Op2) { 4571 SDVTList VTs = getVTList(VT); 4572 SDValue Ops[] = { Op1, Op2 }; 4573 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4574} 4575 4576SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4577 EVT VT, SDValue Op1, 4578 SDValue Op2, SDValue Op3) { 4579 SDVTList VTs = getVTList(VT); 4580 SDValue Ops[] = { Op1, Op2, Op3 }; 4581 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4582} 4583 4584SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4585 EVT VT, const SDValue *Ops, 4586 unsigned NumOps) { 4587 SDVTList VTs = getVTList(VT); 4588 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4589} 4590 4591SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4592 EVT VT1, EVT VT2, const SDValue *Ops, 4593 unsigned NumOps) { 4594 SDVTList VTs = getVTList(VT1, VT2); 4595 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4596} 4597 4598SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4599 EVT VT1, EVT VT2) { 4600 SDVTList VTs = getVTList(VT1, VT2); 4601 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4602} 4603 4604SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4605 EVT VT1, EVT VT2, EVT VT3, 4606 const SDValue *Ops, unsigned NumOps) { 4607 SDVTList VTs = getVTList(VT1, VT2, VT3); 4608 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4609} 4610 4611SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4612 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4613 const SDValue *Ops, unsigned NumOps) { 4614 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4615 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4616} 4617 4618SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4619 EVT VT1, EVT VT2, 4620 SDValue Op1) { 4621 SDVTList VTs = getVTList(VT1, VT2); 4622 SDValue Ops[] = { Op1 }; 4623 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4624} 4625 4626SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4627 EVT VT1, EVT VT2, 4628 SDValue Op1, SDValue Op2) { 4629 SDVTList VTs = getVTList(VT1, VT2); 4630 SDValue Ops[] = { Op1, Op2 }; 4631 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4632} 4633 4634SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4635 EVT VT1, EVT VT2, 4636 SDValue Op1, SDValue Op2, 4637 SDValue Op3) { 4638 SDVTList VTs = getVTList(VT1, VT2); 4639 SDValue Ops[] = { Op1, Op2, Op3 }; 4640 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4641} 4642 4643SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4644 EVT VT1, EVT VT2, EVT VT3, 4645 SDValue Op1, SDValue Op2, 4646 SDValue Op3) { 4647 SDVTList VTs = getVTList(VT1, VT2, VT3); 4648 SDValue Ops[] = { Op1, Op2, Op3 }; 4649 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4650} 4651 4652SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4653 SDVTList VTs, const SDValue *Ops, 4654 unsigned NumOps) { 4655 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4656 // Reset the NodeID to -1. 4657 N->setNodeId(-1); 4658 return N; 4659} 4660 4661/// MorphNodeTo - This *mutates* the specified node to have the specified 4662/// return type, opcode, and operands. 4663/// 4664/// Note that MorphNodeTo returns the resultant node. If there is already a 4665/// node of the specified opcode and operands, it returns that node instead of 4666/// the current one. Note that the DebugLoc need not be the same. 4667/// 4668/// Using MorphNodeTo is faster than creating a new node and swapping it in 4669/// with ReplaceAllUsesWith both because it often avoids allocating a new 4670/// node, and because it doesn't require CSE recalculation for any of 4671/// the node's users. 4672/// 4673SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4674 SDVTList VTs, const SDValue *Ops, 4675 unsigned NumOps) { 4676 // If an identical node already exists, use it. 4677 void *IP = 0; 4678 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4679 FoldingSetNodeID ID; 4680 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4681 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4682 return ON; 4683 } 4684 4685 if (!RemoveNodeFromCSEMaps(N)) 4686 IP = 0; 4687 4688 // Start the morphing. 4689 N->NodeType = Opc; 4690 N->ValueList = VTs.VTs; 4691 N->NumValues = VTs.NumVTs; 4692 4693 // Clear the operands list, updating used nodes to remove this from their 4694 // use list. Keep track of any operands that become dead as a result. 4695 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4696 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4697 SDUse &Use = *I++; 4698 SDNode *Used = Use.getNode(); 4699 Use.set(SDValue()); 4700 if (Used->use_empty()) 4701 DeadNodeSet.insert(Used); 4702 } 4703 4704 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4705 // Initialize the memory references information. 4706 MN->setMemRefs(0, 0); 4707 // If NumOps is larger than the # of operands we can have in a 4708 // MachineSDNode, reallocate the operand list. 4709 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4710 if (MN->OperandsNeedDelete) 4711 delete[] MN->OperandList; 4712 if (NumOps > array_lengthof(MN->LocalOperands)) 4713 // We're creating a final node that will live unmorphed for the 4714 // remainder of the current SelectionDAG iteration, so we can allocate 4715 // the operands directly out of a pool with no recycling metadata. 4716 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4717 Ops, NumOps); 4718 else 4719 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4720 MN->OperandsNeedDelete = false; 4721 } else 4722 MN->InitOperands(MN->OperandList, Ops, NumOps); 4723 } else { 4724 // If NumOps is larger than the # of operands we currently have, reallocate 4725 // the operand list. 4726 if (NumOps > N->NumOperands) { 4727 if (N->OperandsNeedDelete) 4728 delete[] N->OperandList; 4729 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4730 N->OperandsNeedDelete = true; 4731 } else 4732 N->InitOperands(N->OperandList, Ops, NumOps); 4733 } 4734 4735 // Delete any nodes that are still dead after adding the uses for the 4736 // new operands. 4737 if (!DeadNodeSet.empty()) { 4738 SmallVector<SDNode *, 16> DeadNodes; 4739 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4740 E = DeadNodeSet.end(); I != E; ++I) 4741 if ((*I)->use_empty()) 4742 DeadNodes.push_back(*I); 4743 RemoveDeadNodes(DeadNodes); 4744 } 4745 4746 if (IP) 4747 CSEMap.InsertNode(N, IP); // Memoize the new node. 4748 return N; 4749} 4750 4751 4752/// getMachineNode - These are used for target selectors to create a new node 4753/// with specified return type(s), MachineInstr opcode, and operands. 4754/// 4755/// Note that getMachineNode returns the resultant node. If there is already a 4756/// node of the specified opcode and operands, it returns that node instead of 4757/// the current one. 4758MachineSDNode * 4759SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4760 SDVTList VTs = getVTList(VT); 4761 return getMachineNode(Opcode, dl, VTs, 0, 0); 4762} 4763 4764MachineSDNode * 4765SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4766 SDVTList VTs = getVTList(VT); 4767 SDValue Ops[] = { Op1 }; 4768 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4769} 4770 4771MachineSDNode * 4772SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4773 SDValue Op1, SDValue Op2) { 4774 SDVTList VTs = getVTList(VT); 4775 SDValue Ops[] = { Op1, Op2 }; 4776 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4777} 4778 4779MachineSDNode * 4780SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4781 SDValue Op1, SDValue Op2, SDValue Op3) { 4782 SDVTList VTs = getVTList(VT); 4783 SDValue Ops[] = { Op1, Op2, Op3 }; 4784 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4785} 4786 4787MachineSDNode * 4788SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4789 const SDValue *Ops, unsigned NumOps) { 4790 SDVTList VTs = getVTList(VT); 4791 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4792} 4793 4794MachineSDNode * 4795SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4796 SDVTList VTs = getVTList(VT1, VT2); 4797 return getMachineNode(Opcode, dl, VTs, 0, 0); 4798} 4799 4800MachineSDNode * 4801SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4802 EVT VT1, EVT VT2, SDValue Op1) { 4803 SDVTList VTs = getVTList(VT1, VT2); 4804 SDValue Ops[] = { Op1 }; 4805 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4806} 4807 4808MachineSDNode * 4809SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4810 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4811 SDVTList VTs = getVTList(VT1, VT2); 4812 SDValue Ops[] = { Op1, Op2 }; 4813 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4814} 4815 4816MachineSDNode * 4817SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4818 EVT VT1, EVT VT2, SDValue Op1, 4819 SDValue Op2, SDValue Op3) { 4820 SDVTList VTs = getVTList(VT1, VT2); 4821 SDValue Ops[] = { Op1, Op2, Op3 }; 4822 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4823} 4824 4825MachineSDNode * 4826SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4827 EVT VT1, EVT VT2, 4828 const SDValue *Ops, unsigned NumOps) { 4829 SDVTList VTs = getVTList(VT1, VT2); 4830 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4831} 4832 4833MachineSDNode * 4834SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4835 EVT VT1, EVT VT2, EVT VT3, 4836 SDValue Op1, SDValue Op2) { 4837 SDVTList VTs = getVTList(VT1, VT2, VT3); 4838 SDValue Ops[] = { Op1, Op2 }; 4839 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4840} 4841 4842MachineSDNode * 4843SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4844 EVT VT1, EVT VT2, EVT VT3, 4845 SDValue Op1, SDValue Op2, SDValue Op3) { 4846 SDVTList VTs = getVTList(VT1, VT2, VT3); 4847 SDValue Ops[] = { Op1, Op2, Op3 }; 4848 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4849} 4850 4851MachineSDNode * 4852SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4853 EVT VT1, EVT VT2, EVT VT3, 4854 const SDValue *Ops, unsigned NumOps) { 4855 SDVTList VTs = getVTList(VT1, VT2, VT3); 4856 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4857} 4858 4859MachineSDNode * 4860SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4861 EVT VT2, EVT VT3, EVT VT4, 4862 const SDValue *Ops, unsigned NumOps) { 4863 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4864 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4865} 4866 4867MachineSDNode * 4868SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4869 const std::vector<EVT> &ResultTys, 4870 const SDValue *Ops, unsigned NumOps) { 4871 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4872 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4873} 4874 4875MachineSDNode * 4876SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4877 const SDValue *Ops, unsigned NumOps) { 4878 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4879 MachineSDNode *N; 4880 void *IP; 4881 4882 if (DoCSE) { 4883 FoldingSetNodeID ID; 4884 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4885 IP = 0; 4886 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4887 return cast<MachineSDNode>(E); 4888 } 4889 4890 // Allocate a new MachineSDNode. 4891 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4892 4893 // Initialize the operands list. 4894 if (NumOps > array_lengthof(N->LocalOperands)) 4895 // We're creating a final node that will live unmorphed for the 4896 // remainder of the current SelectionDAG iteration, so we can allocate 4897 // the operands directly out of a pool with no recycling metadata. 4898 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4899 Ops, NumOps); 4900 else 4901 N->InitOperands(N->LocalOperands, Ops, NumOps); 4902 N->OperandsNeedDelete = false; 4903 4904 if (DoCSE) 4905 CSEMap.InsertNode(N, IP); 4906 4907 AllNodes.push_back(N); 4908#ifndef NDEBUG 4909 VerifyNode(N); 4910#endif 4911 return N; 4912} 4913 4914/// getTargetExtractSubreg - A convenience function for creating 4915/// TargetOpcode::EXTRACT_SUBREG nodes. 4916SDValue 4917SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4918 SDValue Operand) { 4919 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4920 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4921 VT, Operand, SRIdxVal); 4922 return SDValue(Subreg, 0); 4923} 4924 4925/// getTargetInsertSubreg - A convenience function for creating 4926/// TargetOpcode::INSERT_SUBREG nodes. 4927SDValue 4928SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4929 SDValue Operand, SDValue Subreg) { 4930 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4931 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4932 VT, Operand, Subreg, SRIdxVal); 4933 return SDValue(Result, 0); 4934} 4935 4936/// getNodeIfExists - Get the specified node if it's already available, or 4937/// else return NULL. 4938SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4939 const SDValue *Ops, unsigned NumOps) { 4940 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4941 FoldingSetNodeID ID; 4942 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4943 void *IP = 0; 4944 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4945 return E; 4946 } 4947 return NULL; 4948} 4949 4950/// getDbgValue - Creates a SDDbgValue node. 4951/// 4952SDDbgValue * 4953SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4954 DebugLoc DL, unsigned O) { 4955 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4956} 4957 4958SDDbgValue * 4959SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4960 DebugLoc DL, unsigned O) { 4961 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4962} 4963 4964SDDbgValue * 4965SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4966 DebugLoc DL, unsigned O) { 4967 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4968} 4969 4970namespace { 4971 4972/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4973/// pointed to by a use iterator is deleted, increment the use iterator 4974/// so that it doesn't dangle. 4975/// 4976/// This class also manages a "downlink" DAGUpdateListener, to forward 4977/// messages to ReplaceAllUsesWith's callers. 4978/// 4979class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4980 SelectionDAG::DAGUpdateListener *DownLink; 4981 SDNode::use_iterator &UI; 4982 SDNode::use_iterator &UE; 4983 4984 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4985 // Increment the iterator as needed. 4986 while (UI != UE && N == *UI) 4987 ++UI; 4988 4989 // Then forward the message. 4990 if (DownLink) DownLink->NodeDeleted(N, E); 4991 } 4992 4993 virtual void NodeUpdated(SDNode *N) { 4994 // Just forward the message. 4995 if (DownLink) DownLink->NodeUpdated(N); 4996 } 4997 4998public: 4999 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5000 SDNode::use_iterator &ui, 5001 SDNode::use_iterator &ue) 5002 : DownLink(dl), UI(ui), UE(ue) {} 5003}; 5004 5005} 5006 5007/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5008/// This can cause recursive merging of nodes in the DAG. 5009/// 5010/// This version assumes From has a single result value. 5011/// 5012void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5013 DAGUpdateListener *UpdateListener) { 5014 SDNode *From = FromN.getNode(); 5015 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5016 "Cannot replace with this method!"); 5017 assert(From != To.getNode() && "Cannot replace uses of with self"); 5018 5019 // Iterate over all the existing uses of From. New uses will be added 5020 // to the beginning of the use list, which we avoid visiting. 5021 // This specifically avoids visiting uses of From that arise while the 5022 // replacement is happening, because any such uses would be the result 5023 // of CSE: If an existing node looks like From after one of its operands 5024 // is replaced by To, we don't want to replace of all its users with To 5025 // too. See PR3018 for more info. 5026 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5027 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5028 while (UI != UE) { 5029 SDNode *User = *UI; 5030 5031 // This node is about to morph, remove its old self from the CSE maps. 5032 RemoveNodeFromCSEMaps(User); 5033 5034 // A user can appear in a use list multiple times, and when this 5035 // happens the uses are usually next to each other in the list. 5036 // To help reduce the number of CSE recomputations, process all 5037 // the uses of this user that we can find this way. 5038 do { 5039 SDUse &Use = UI.getUse(); 5040 ++UI; 5041 Use.set(To); 5042 } while (UI != UE && *UI == User); 5043 5044 // Now that we have modified User, add it back to the CSE maps. If it 5045 // already exists there, recursively merge the results together. 5046 AddModifiedNodeToCSEMaps(User, &Listener); 5047 } 5048} 5049 5050/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5051/// This can cause recursive merging of nodes in the DAG. 5052/// 5053/// This version assumes that for each value of From, there is a 5054/// corresponding value in To in the same position with the same type. 5055/// 5056void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5057 DAGUpdateListener *UpdateListener) { 5058#ifndef NDEBUG 5059 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5060 assert((!From->hasAnyUseOfValue(i) || 5061 From->getValueType(i) == To->getValueType(i)) && 5062 "Cannot use this version of ReplaceAllUsesWith!"); 5063#endif 5064 5065 // Handle the trivial case. 5066 if (From == To) 5067 return; 5068 5069 // Iterate over just the existing users of From. See the comments in 5070 // the ReplaceAllUsesWith above. 5071 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5072 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5073 while (UI != UE) { 5074 SDNode *User = *UI; 5075 5076 // This node is about to morph, remove its old self from the CSE maps. 5077 RemoveNodeFromCSEMaps(User); 5078 5079 // A user can appear in a use list multiple times, and when this 5080 // happens the uses are usually next to each other in the list. 5081 // To help reduce the number of CSE recomputations, process all 5082 // the uses of this user that we can find this way. 5083 do { 5084 SDUse &Use = UI.getUse(); 5085 ++UI; 5086 Use.setNode(To); 5087 } while (UI != UE && *UI == User); 5088 5089 // Now that we have modified User, add it back to the CSE maps. If it 5090 // already exists there, recursively merge the results together. 5091 AddModifiedNodeToCSEMaps(User, &Listener); 5092 } 5093} 5094 5095/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5096/// This can cause recursive merging of nodes in the DAG. 5097/// 5098/// This version can replace From with any result values. To must match the 5099/// number and types of values returned by From. 5100void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5101 const SDValue *To, 5102 DAGUpdateListener *UpdateListener) { 5103 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5104 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5105 5106 // Iterate over just the existing users of From. See the comments in 5107 // the ReplaceAllUsesWith above. 5108 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5109 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5110 while (UI != UE) { 5111 SDNode *User = *UI; 5112 5113 // This node is about to morph, remove its old self from the CSE maps. 5114 RemoveNodeFromCSEMaps(User); 5115 5116 // A user can appear in a use list multiple times, and when this 5117 // happens the uses are usually next to each other in the list. 5118 // To help reduce the number of CSE recomputations, process all 5119 // the uses of this user that we can find this way. 5120 do { 5121 SDUse &Use = UI.getUse(); 5122 const SDValue &ToOp = To[Use.getResNo()]; 5123 ++UI; 5124 Use.set(ToOp); 5125 } while (UI != UE && *UI == User); 5126 5127 // Now that we have modified User, add it back to the CSE maps. If it 5128 // already exists there, recursively merge the results together. 5129 AddModifiedNodeToCSEMaps(User, &Listener); 5130 } 5131} 5132 5133/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5134/// uses of other values produced by From.getNode() alone. The Deleted 5135/// vector is handled the same way as for ReplaceAllUsesWith. 5136void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5137 DAGUpdateListener *UpdateListener){ 5138 // Handle the really simple, really trivial case efficiently. 5139 if (From == To) return; 5140 5141 // Handle the simple, trivial, case efficiently. 5142 if (From.getNode()->getNumValues() == 1) { 5143 ReplaceAllUsesWith(From, To, UpdateListener); 5144 return; 5145 } 5146 5147 // Iterate over just the existing users of From. See the comments in 5148 // the ReplaceAllUsesWith above. 5149 SDNode::use_iterator UI = From.getNode()->use_begin(), 5150 UE = From.getNode()->use_end(); 5151 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5152 while (UI != UE) { 5153 SDNode *User = *UI; 5154 bool UserRemovedFromCSEMaps = false; 5155 5156 // A user can appear in a use list multiple times, and when this 5157 // happens the uses are usually next to each other in the list. 5158 // To help reduce the number of CSE recomputations, process all 5159 // the uses of this user that we can find this way. 5160 do { 5161 SDUse &Use = UI.getUse(); 5162 5163 // Skip uses of different values from the same node. 5164 if (Use.getResNo() != From.getResNo()) { 5165 ++UI; 5166 continue; 5167 } 5168 5169 // If this node hasn't been modified yet, it's still in the CSE maps, 5170 // so remove its old self from the CSE maps. 5171 if (!UserRemovedFromCSEMaps) { 5172 RemoveNodeFromCSEMaps(User); 5173 UserRemovedFromCSEMaps = true; 5174 } 5175 5176 ++UI; 5177 Use.set(To); 5178 } while (UI != UE && *UI == User); 5179 5180 // We are iterating over all uses of the From node, so if a use 5181 // doesn't use the specific value, no changes are made. 5182 if (!UserRemovedFromCSEMaps) 5183 continue; 5184 5185 // Now that we have modified User, add it back to the CSE maps. If it 5186 // already exists there, recursively merge the results together. 5187 AddModifiedNodeToCSEMaps(User, &Listener); 5188 } 5189} 5190 5191namespace { 5192 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5193 /// to record information about a use. 5194 struct UseMemo { 5195 SDNode *User; 5196 unsigned Index; 5197 SDUse *Use; 5198 }; 5199 5200 /// operator< - Sort Memos by User. 5201 bool operator<(const UseMemo &L, const UseMemo &R) { 5202 return (intptr_t)L.User < (intptr_t)R.User; 5203 } 5204} 5205 5206/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5207/// uses of other values produced by From.getNode() alone. The same value 5208/// may appear in both the From and To list. The Deleted vector is 5209/// handled the same way as for ReplaceAllUsesWith. 5210void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5211 const SDValue *To, 5212 unsigned Num, 5213 DAGUpdateListener *UpdateListener){ 5214 // Handle the simple, trivial case efficiently. 5215 if (Num == 1) 5216 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5217 5218 // Read up all the uses and make records of them. This helps 5219 // processing new uses that are introduced during the 5220 // replacement process. 5221 SmallVector<UseMemo, 4> Uses; 5222 for (unsigned i = 0; i != Num; ++i) { 5223 unsigned FromResNo = From[i].getResNo(); 5224 SDNode *FromNode = From[i].getNode(); 5225 for (SDNode::use_iterator UI = FromNode->use_begin(), 5226 E = FromNode->use_end(); UI != E; ++UI) { 5227 SDUse &Use = UI.getUse(); 5228 if (Use.getResNo() == FromResNo) { 5229 UseMemo Memo = { *UI, i, &Use }; 5230 Uses.push_back(Memo); 5231 } 5232 } 5233 } 5234 5235 // Sort the uses, so that all the uses from a given User are together. 5236 std::sort(Uses.begin(), Uses.end()); 5237 5238 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5239 UseIndex != UseIndexEnd; ) { 5240 // We know that this user uses some value of From. If it is the right 5241 // value, update it. 5242 SDNode *User = Uses[UseIndex].User; 5243 5244 // This node is about to morph, remove its old self from the CSE maps. 5245 RemoveNodeFromCSEMaps(User); 5246 5247 // The Uses array is sorted, so all the uses for a given User 5248 // are next to each other in the list. 5249 // To help reduce the number of CSE recomputations, process all 5250 // the uses of this user that we can find this way. 5251 do { 5252 unsigned i = Uses[UseIndex].Index; 5253 SDUse &Use = *Uses[UseIndex].Use; 5254 ++UseIndex; 5255 5256 Use.set(To[i]); 5257 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5258 5259 // Now that we have modified User, add it back to the CSE maps. If it 5260 // already exists there, recursively merge the results together. 5261 AddModifiedNodeToCSEMaps(User, UpdateListener); 5262 } 5263} 5264 5265/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5266/// based on their topological order. It returns the maximum id and a vector 5267/// of the SDNodes* in assigned order by reference. 5268unsigned SelectionDAG::AssignTopologicalOrder() { 5269 5270 unsigned DAGSize = 0; 5271 5272 // SortedPos tracks the progress of the algorithm. Nodes before it are 5273 // sorted, nodes after it are unsorted. When the algorithm completes 5274 // it is at the end of the list. 5275 allnodes_iterator SortedPos = allnodes_begin(); 5276 5277 // Visit all the nodes. Move nodes with no operands to the front of 5278 // the list immediately. Annotate nodes that do have operands with their 5279 // operand count. Before we do this, the Node Id fields of the nodes 5280 // may contain arbitrary values. After, the Node Id fields for nodes 5281 // before SortedPos will contain the topological sort index, and the 5282 // Node Id fields for nodes At SortedPos and after will contain the 5283 // count of outstanding operands. 5284 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5285 SDNode *N = I++; 5286 checkForCycles(N); 5287 unsigned Degree = N->getNumOperands(); 5288 if (Degree == 0) { 5289 // A node with no uses, add it to the result array immediately. 5290 N->setNodeId(DAGSize++); 5291 allnodes_iterator Q = N; 5292 if (Q != SortedPos) 5293 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5294 assert(SortedPos != AllNodes.end() && "Overran node list"); 5295 ++SortedPos; 5296 } else { 5297 // Temporarily use the Node Id as scratch space for the degree count. 5298 N->setNodeId(Degree); 5299 } 5300 } 5301 5302 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5303 // such that by the time the end is reached all nodes will be sorted. 5304 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5305 SDNode *N = I; 5306 checkForCycles(N); 5307 // N is in sorted position, so all its uses have one less operand 5308 // that needs to be sorted. 5309 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5310 UI != UE; ++UI) { 5311 SDNode *P = *UI; 5312 unsigned Degree = P->getNodeId(); 5313 assert(Degree != 0 && "Invalid node degree"); 5314 --Degree; 5315 if (Degree == 0) { 5316 // All of P's operands are sorted, so P may sorted now. 5317 P->setNodeId(DAGSize++); 5318 if (P != SortedPos) 5319 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5320 assert(SortedPos != AllNodes.end() && "Overran node list"); 5321 ++SortedPos; 5322 } else { 5323 // Update P's outstanding operand count. 5324 P->setNodeId(Degree); 5325 } 5326 } 5327 if (I == SortedPos) { 5328#ifndef NDEBUG 5329 SDNode *S = ++I; 5330 dbgs() << "Overran sorted position:\n"; 5331 S->dumprFull(); 5332#endif 5333 llvm_unreachable(0); 5334 } 5335 } 5336 5337 assert(SortedPos == AllNodes.end() && 5338 "Topological sort incomplete!"); 5339 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5340 "First node in topological sort is not the entry token!"); 5341 assert(AllNodes.front().getNodeId() == 0 && 5342 "First node in topological sort has non-zero id!"); 5343 assert(AllNodes.front().getNumOperands() == 0 && 5344 "First node in topological sort has operands!"); 5345 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5346 "Last node in topologic sort has unexpected id!"); 5347 assert(AllNodes.back().use_empty() && 5348 "Last node in topologic sort has users!"); 5349 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5350 return DAGSize; 5351} 5352 5353/// AssignOrdering - Assign an order to the SDNode. 5354void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5355 assert(SD && "Trying to assign an order to a null node!"); 5356 Ordering->add(SD, Order); 5357} 5358 5359/// GetOrdering - Get the order for the SDNode. 5360unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5361 assert(SD && "Trying to get the order of a null node!"); 5362 return Ordering->getOrder(SD); 5363} 5364 5365/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5366/// value is produced by SD. 5367void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5368 DbgInfo->add(DB, SD, isParameter); 5369 if (SD) 5370 SD->setHasDebugValue(true); 5371} 5372 5373//===----------------------------------------------------------------------===// 5374// SDNode Class 5375//===----------------------------------------------------------------------===// 5376 5377HandleSDNode::~HandleSDNode() { 5378 DropOperands(); 5379} 5380 5381GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5382 EVT VT, int64_t o, unsigned char TF) 5383 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5384 TheGlobal = GA; 5385} 5386 5387MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5388 MachineMemOperand *mmo) 5389 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5390 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5391 MMO->isNonTemporal()); 5392 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5393 assert(isNonTemporal() == MMO->isNonTemporal() && 5394 "Non-temporal encoding error!"); 5395 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5396} 5397 5398MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5399 const SDValue *Ops, unsigned NumOps, EVT memvt, 5400 MachineMemOperand *mmo) 5401 : SDNode(Opc, dl, VTs, Ops, NumOps), 5402 MemoryVT(memvt), MMO(mmo) { 5403 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5404 MMO->isNonTemporal()); 5405 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5406 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5407} 5408 5409/// Profile - Gather unique data for the node. 5410/// 5411void SDNode::Profile(FoldingSetNodeID &ID) const { 5412 AddNodeIDNode(ID, this); 5413} 5414 5415namespace { 5416 struct EVTArray { 5417 std::vector<EVT> VTs; 5418 5419 EVTArray() { 5420 VTs.reserve(MVT::LAST_VALUETYPE); 5421 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5422 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5423 } 5424 }; 5425} 5426 5427static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5428static ManagedStatic<EVTArray> SimpleVTArray; 5429static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5430 5431/// getValueTypeList - Return a pointer to the specified value type. 5432/// 5433const EVT *SDNode::getValueTypeList(EVT VT) { 5434 if (VT.isExtended()) { 5435 sys::SmartScopedLock<true> Lock(*VTMutex); 5436 return &(*EVTs->insert(VT).first); 5437 } else { 5438 assert(VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 5439 "Value type out of range!"); 5440 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5441 } 5442} 5443 5444/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5445/// indicated value. This method ignores uses of other values defined by this 5446/// operation. 5447bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5448 assert(Value < getNumValues() && "Bad value!"); 5449 5450 // TODO: Only iterate over uses of a given value of the node 5451 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5452 if (UI.getUse().getResNo() == Value) { 5453 if (NUses == 0) 5454 return false; 5455 --NUses; 5456 } 5457 } 5458 5459 // Found exactly the right number of uses? 5460 return NUses == 0; 5461} 5462 5463 5464/// hasAnyUseOfValue - Return true if there are any use of the indicated 5465/// value. This method ignores uses of other values defined by this operation. 5466bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5467 assert(Value < getNumValues() && "Bad value!"); 5468 5469 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5470 if (UI.getUse().getResNo() == Value) 5471 return true; 5472 5473 return false; 5474} 5475 5476 5477/// isOnlyUserOf - Return true if this node is the only use of N. 5478/// 5479bool SDNode::isOnlyUserOf(SDNode *N) const { 5480 bool Seen = false; 5481 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5482 SDNode *User = *I; 5483 if (User == this) 5484 Seen = true; 5485 else 5486 return false; 5487 } 5488 5489 return Seen; 5490} 5491 5492/// isOperand - Return true if this node is an operand of N. 5493/// 5494bool SDValue::isOperandOf(SDNode *N) const { 5495 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5496 if (*this == N->getOperand(i)) 5497 return true; 5498 return false; 5499} 5500 5501bool SDNode::isOperandOf(SDNode *N) const { 5502 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5503 if (this == N->OperandList[i].getNode()) 5504 return true; 5505 return false; 5506} 5507 5508/// reachesChainWithoutSideEffects - Return true if this operand (which must 5509/// be a chain) reaches the specified operand without crossing any 5510/// side-effecting instructions. In practice, this looks through token 5511/// factors and non-volatile loads. In order to remain efficient, this only 5512/// looks a couple of nodes in, it does not do an exhaustive search. 5513bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5514 unsigned Depth) const { 5515 if (*this == Dest) return true; 5516 5517 // Don't search too deeply, we just want to be able to see through 5518 // TokenFactor's etc. 5519 if (Depth == 0) return false; 5520 5521 // If this is a token factor, all inputs to the TF happen in parallel. If any 5522 // of the operands of the TF reach dest, then we can do the xform. 5523 if (getOpcode() == ISD::TokenFactor) { 5524 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5525 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5526 return true; 5527 return false; 5528 } 5529 5530 // Loads don't have side effects, look through them. 5531 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5532 if (!Ld->isVolatile()) 5533 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5534 } 5535 return false; 5536} 5537 5538/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5539/// is either an operand of N or it can be reached by traversing up the operands. 5540/// NOTE: this is an expensive method. Use it carefully. 5541bool SDNode::isPredecessorOf(SDNode *N) const { 5542 SmallPtrSet<SDNode *, 32> Visited; 5543 SmallVector<SDNode *, 16> Worklist; 5544 Worklist.push_back(N); 5545 5546 do { 5547 N = Worklist.pop_back_val(); 5548 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5549 SDNode *Op = N->getOperand(i).getNode(); 5550 if (Op == this) 5551 return true; 5552 if (Visited.insert(Op)) 5553 Worklist.push_back(Op); 5554 } 5555 } while (!Worklist.empty()); 5556 5557 return false; 5558} 5559 5560uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5561 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5562 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5563} 5564 5565std::string SDNode::getOperationName(const SelectionDAG *G) const { 5566 switch (getOpcode()) { 5567 default: 5568 if (getOpcode() < ISD::BUILTIN_OP_END) 5569 return "<<Unknown DAG Node>>"; 5570 if (isMachineOpcode()) { 5571 if (G) 5572 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5573 if (getMachineOpcode() < TII->getNumOpcodes()) 5574 return TII->get(getMachineOpcode()).getName(); 5575 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5576 } 5577 if (G) { 5578 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5579 const char *Name = TLI.getTargetNodeName(getOpcode()); 5580 if (Name) return Name; 5581 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5582 } 5583 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5584 5585#ifndef NDEBUG 5586 case ISD::DELETED_NODE: 5587 return "<<Deleted Node!>>"; 5588#endif 5589 case ISD::PREFETCH: return "Prefetch"; 5590 case ISD::MEMBARRIER: return "MemBarrier"; 5591 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5592 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5593 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5594 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5595 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5596 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5597 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5598 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5599 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5600 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5601 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5602 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5603 case ISD::PCMARKER: return "PCMarker"; 5604 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5605 case ISD::SRCVALUE: return "SrcValue"; 5606 case ISD::MDNODE_SDNODE: return "MDNode"; 5607 case ISD::EntryToken: return "EntryToken"; 5608 case ISD::TokenFactor: return "TokenFactor"; 5609 case ISD::AssertSext: return "AssertSext"; 5610 case ISD::AssertZext: return "AssertZext"; 5611 5612 case ISD::BasicBlock: return "BasicBlock"; 5613 case ISD::VALUETYPE: return "ValueType"; 5614 case ISD::Register: return "Register"; 5615 5616 case ISD::Constant: return "Constant"; 5617 case ISD::ConstantFP: return "ConstantFP"; 5618 case ISD::GlobalAddress: return "GlobalAddress"; 5619 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5620 case ISD::FrameIndex: return "FrameIndex"; 5621 case ISD::JumpTable: return "JumpTable"; 5622 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5623 case ISD::RETURNADDR: return "RETURNADDR"; 5624 case ISD::FRAMEADDR: return "FRAMEADDR"; 5625 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5626 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5627 case ISD::LSDAADDR: return "LSDAADDR"; 5628 case ISD::EHSELECTION: return "EHSELECTION"; 5629 case ISD::EH_RETURN: return "EH_RETURN"; 5630 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5631 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5632 case ISD::ConstantPool: return "ConstantPool"; 5633 case ISD::ExternalSymbol: return "ExternalSymbol"; 5634 case ISD::BlockAddress: return "BlockAddress"; 5635 case ISD::INTRINSIC_WO_CHAIN: 5636 case ISD::INTRINSIC_VOID: 5637 case ISD::INTRINSIC_W_CHAIN: { 5638 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5639 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5640 if (IID < Intrinsic::num_intrinsics) 5641 return Intrinsic::getName((Intrinsic::ID)IID); 5642 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5643 return TII->getName(IID); 5644 llvm_unreachable("Invalid intrinsic ID"); 5645 } 5646 5647 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5648 case ISD::TargetConstant: return "TargetConstant"; 5649 case ISD::TargetConstantFP:return "TargetConstantFP"; 5650 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5651 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5652 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5653 case ISD::TargetJumpTable: return "TargetJumpTable"; 5654 case ISD::TargetConstantPool: return "TargetConstantPool"; 5655 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5656 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5657 5658 case ISD::CopyToReg: return "CopyToReg"; 5659 case ISD::CopyFromReg: return "CopyFromReg"; 5660 case ISD::UNDEF: return "undef"; 5661 case ISD::MERGE_VALUES: return "merge_values"; 5662 case ISD::INLINEASM: return "inlineasm"; 5663 case ISD::EH_LABEL: return "eh_label"; 5664 case ISD::HANDLENODE: return "handlenode"; 5665 5666 // Unary operators 5667 case ISD::FABS: return "fabs"; 5668 case ISD::FNEG: return "fneg"; 5669 case ISD::FSQRT: return "fsqrt"; 5670 case ISD::FSIN: return "fsin"; 5671 case ISD::FCOS: return "fcos"; 5672 case ISD::FPOWI: return "fpowi"; 5673 case ISD::FPOW: return "fpow"; 5674 case ISD::FTRUNC: return "ftrunc"; 5675 case ISD::FFLOOR: return "ffloor"; 5676 case ISD::FCEIL: return "fceil"; 5677 case ISD::FRINT: return "frint"; 5678 case ISD::FNEARBYINT: return "fnearbyint"; 5679 5680 // Binary operators 5681 case ISD::ADD: return "add"; 5682 case ISD::SUB: return "sub"; 5683 case ISD::MUL: return "mul"; 5684 case ISD::MULHU: return "mulhu"; 5685 case ISD::MULHS: return "mulhs"; 5686 case ISD::SDIV: return "sdiv"; 5687 case ISD::UDIV: return "udiv"; 5688 case ISD::SREM: return "srem"; 5689 case ISD::UREM: return "urem"; 5690 case ISD::SMUL_LOHI: return "smul_lohi"; 5691 case ISD::UMUL_LOHI: return "umul_lohi"; 5692 case ISD::SDIVREM: return "sdivrem"; 5693 case ISD::UDIVREM: return "udivrem"; 5694 case ISD::AND: return "and"; 5695 case ISD::OR: return "or"; 5696 case ISD::XOR: return "xor"; 5697 case ISD::SHL: return "shl"; 5698 case ISD::SRA: return "sra"; 5699 case ISD::SRL: return "srl"; 5700 case ISD::ROTL: return "rotl"; 5701 case ISD::ROTR: return "rotr"; 5702 case ISD::FADD: return "fadd"; 5703 case ISD::FSUB: return "fsub"; 5704 case ISD::FMUL: return "fmul"; 5705 case ISD::FDIV: return "fdiv"; 5706 case ISD::FREM: return "frem"; 5707 case ISD::FCOPYSIGN: return "fcopysign"; 5708 case ISD::FGETSIGN: return "fgetsign"; 5709 5710 case ISD::SETCC: return "setcc"; 5711 case ISD::VSETCC: return "vsetcc"; 5712 case ISD::SELECT: return "select"; 5713 case ISD::SELECT_CC: return "select_cc"; 5714 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5715 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5716 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5717 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5718 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5719 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5720 case ISD::CARRY_FALSE: return "carry_false"; 5721 case ISD::ADDC: return "addc"; 5722 case ISD::ADDE: return "adde"; 5723 case ISD::SADDO: return "saddo"; 5724 case ISD::UADDO: return "uaddo"; 5725 case ISD::SSUBO: return "ssubo"; 5726 case ISD::USUBO: return "usubo"; 5727 case ISD::SMULO: return "smulo"; 5728 case ISD::UMULO: return "umulo"; 5729 case ISD::SUBC: return "subc"; 5730 case ISD::SUBE: return "sube"; 5731 case ISD::SHL_PARTS: return "shl_parts"; 5732 case ISD::SRA_PARTS: return "sra_parts"; 5733 case ISD::SRL_PARTS: return "srl_parts"; 5734 5735 // Conversion operators. 5736 case ISD::SIGN_EXTEND: return "sign_extend"; 5737 case ISD::ZERO_EXTEND: return "zero_extend"; 5738 case ISD::ANY_EXTEND: return "any_extend"; 5739 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5740 case ISD::TRUNCATE: return "truncate"; 5741 case ISD::FP_ROUND: return "fp_round"; 5742 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5743 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5744 case ISD::FP_EXTEND: return "fp_extend"; 5745 5746 case ISD::SINT_TO_FP: return "sint_to_fp"; 5747 case ISD::UINT_TO_FP: return "uint_to_fp"; 5748 case ISD::FP_TO_SINT: return "fp_to_sint"; 5749 case ISD::FP_TO_UINT: return "fp_to_uint"; 5750 case ISD::BIT_CONVERT: return "bit_convert"; 5751 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5752 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5753 5754 case ISD::CONVERT_RNDSAT: { 5755 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5756 default: llvm_unreachable("Unknown cvt code!"); 5757 case ISD::CVT_FF: return "cvt_ff"; 5758 case ISD::CVT_FS: return "cvt_fs"; 5759 case ISD::CVT_FU: return "cvt_fu"; 5760 case ISD::CVT_SF: return "cvt_sf"; 5761 case ISD::CVT_UF: return "cvt_uf"; 5762 case ISD::CVT_SS: return "cvt_ss"; 5763 case ISD::CVT_SU: return "cvt_su"; 5764 case ISD::CVT_US: return "cvt_us"; 5765 case ISD::CVT_UU: return "cvt_uu"; 5766 } 5767 } 5768 5769 // Control flow instructions 5770 case ISD::BR: return "br"; 5771 case ISD::BRIND: return "brind"; 5772 case ISD::BR_JT: return "br_jt"; 5773 case ISD::BRCOND: return "brcond"; 5774 case ISD::BR_CC: return "br_cc"; 5775 case ISD::CALLSEQ_START: return "callseq_start"; 5776 case ISD::CALLSEQ_END: return "callseq_end"; 5777 5778 // Other operators 5779 case ISD::LOAD: return "load"; 5780 case ISD::STORE: return "store"; 5781 case ISD::VAARG: return "vaarg"; 5782 case ISD::VACOPY: return "vacopy"; 5783 case ISD::VAEND: return "vaend"; 5784 case ISD::VASTART: return "vastart"; 5785 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5786 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5787 case ISD::BUILD_PAIR: return "build_pair"; 5788 case ISD::STACKSAVE: return "stacksave"; 5789 case ISD::STACKRESTORE: return "stackrestore"; 5790 case ISD::TRAP: return "trap"; 5791 5792 // Bit manipulation 5793 case ISD::BSWAP: return "bswap"; 5794 case ISD::CTPOP: return "ctpop"; 5795 case ISD::CTTZ: return "cttz"; 5796 case ISD::CTLZ: return "ctlz"; 5797 5798 // Trampolines 5799 case ISD::TRAMPOLINE: return "trampoline"; 5800 5801 case ISD::CONDCODE: 5802 switch (cast<CondCodeSDNode>(this)->get()) { 5803 default: llvm_unreachable("Unknown setcc condition!"); 5804 case ISD::SETOEQ: return "setoeq"; 5805 case ISD::SETOGT: return "setogt"; 5806 case ISD::SETOGE: return "setoge"; 5807 case ISD::SETOLT: return "setolt"; 5808 case ISD::SETOLE: return "setole"; 5809 case ISD::SETONE: return "setone"; 5810 5811 case ISD::SETO: return "seto"; 5812 case ISD::SETUO: return "setuo"; 5813 case ISD::SETUEQ: return "setue"; 5814 case ISD::SETUGT: return "setugt"; 5815 case ISD::SETUGE: return "setuge"; 5816 case ISD::SETULT: return "setult"; 5817 case ISD::SETULE: return "setule"; 5818 case ISD::SETUNE: return "setune"; 5819 5820 case ISD::SETEQ: return "seteq"; 5821 case ISD::SETGT: return "setgt"; 5822 case ISD::SETGE: return "setge"; 5823 case ISD::SETLT: return "setlt"; 5824 case ISD::SETLE: return "setle"; 5825 case ISD::SETNE: return "setne"; 5826 } 5827 } 5828} 5829 5830const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5831 switch (AM) { 5832 default: 5833 return ""; 5834 case ISD::PRE_INC: 5835 return "<pre-inc>"; 5836 case ISD::PRE_DEC: 5837 return "<pre-dec>"; 5838 case ISD::POST_INC: 5839 return "<post-inc>"; 5840 case ISD::POST_DEC: 5841 return "<post-dec>"; 5842 } 5843} 5844 5845std::string ISD::ArgFlagsTy::getArgFlagsString() { 5846 std::string S = "< "; 5847 5848 if (isZExt()) 5849 S += "zext "; 5850 if (isSExt()) 5851 S += "sext "; 5852 if (isInReg()) 5853 S += "inreg "; 5854 if (isSRet()) 5855 S += "sret "; 5856 if (isByVal()) 5857 S += "byval "; 5858 if (isNest()) 5859 S += "nest "; 5860 if (getByValAlign()) 5861 S += "byval-align:" + utostr(getByValAlign()) + " "; 5862 if (getOrigAlign()) 5863 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5864 if (getByValSize()) 5865 S += "byval-size:" + utostr(getByValSize()) + " "; 5866 return S + ">"; 5867} 5868 5869void SDNode::dump() const { dump(0); } 5870void SDNode::dump(const SelectionDAG *G) const { 5871 print(dbgs(), G); 5872} 5873 5874void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5875 OS << (void*)this << ": "; 5876 5877 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5878 if (i) OS << ","; 5879 if (getValueType(i) == MVT::Other) 5880 OS << "ch"; 5881 else 5882 OS << getValueType(i).getEVTString(); 5883 } 5884 OS << " = " << getOperationName(G); 5885} 5886 5887void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5888 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5889 if (!MN->memoperands_empty()) { 5890 OS << "<"; 5891 OS << "Mem:"; 5892 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5893 e = MN->memoperands_end(); i != e; ++i) { 5894 OS << **i; 5895 if (next(i) != e) 5896 OS << " "; 5897 } 5898 OS << ">"; 5899 } 5900 } else if (const ShuffleVectorSDNode *SVN = 5901 dyn_cast<ShuffleVectorSDNode>(this)) { 5902 OS << "<"; 5903 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5904 int Idx = SVN->getMaskElt(i); 5905 if (i) OS << ","; 5906 if (Idx < 0) 5907 OS << "u"; 5908 else 5909 OS << Idx; 5910 } 5911 OS << ">"; 5912 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5913 OS << '<' << CSDN->getAPIntValue() << '>'; 5914 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5915 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5916 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5917 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5918 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5919 else { 5920 OS << "<APFloat("; 5921 CSDN->getValueAPF().bitcastToAPInt().dump(); 5922 OS << ")>"; 5923 } 5924 } else if (const GlobalAddressSDNode *GADN = 5925 dyn_cast<GlobalAddressSDNode>(this)) { 5926 int64_t offset = GADN->getOffset(); 5927 OS << '<'; 5928 WriteAsOperand(OS, GADN->getGlobal()); 5929 OS << '>'; 5930 if (offset > 0) 5931 OS << " + " << offset; 5932 else 5933 OS << " " << offset; 5934 if (unsigned int TF = GADN->getTargetFlags()) 5935 OS << " [TF=" << TF << ']'; 5936 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5937 OS << "<" << FIDN->getIndex() << ">"; 5938 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5939 OS << "<" << JTDN->getIndex() << ">"; 5940 if (unsigned int TF = JTDN->getTargetFlags()) 5941 OS << " [TF=" << TF << ']'; 5942 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5943 int offset = CP->getOffset(); 5944 if (CP->isMachineConstantPoolEntry()) 5945 OS << "<" << *CP->getMachineCPVal() << ">"; 5946 else 5947 OS << "<" << *CP->getConstVal() << ">"; 5948 if (offset > 0) 5949 OS << " + " << offset; 5950 else 5951 OS << " " << offset; 5952 if (unsigned int TF = CP->getTargetFlags()) 5953 OS << " [TF=" << TF << ']'; 5954 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5955 OS << "<"; 5956 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5957 if (LBB) 5958 OS << LBB->getName() << " "; 5959 OS << (const void*)BBDN->getBasicBlock() << ">"; 5960 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5961 if (G && R->getReg() && 5962 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5963 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5964 } else { 5965 OS << " %reg" << R->getReg(); 5966 } 5967 } else if (const ExternalSymbolSDNode *ES = 5968 dyn_cast<ExternalSymbolSDNode>(this)) { 5969 OS << "'" << ES->getSymbol() << "'"; 5970 if (unsigned int TF = ES->getTargetFlags()) 5971 OS << " [TF=" << TF << ']'; 5972 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5973 if (M->getValue()) 5974 OS << "<" << M->getValue() << ">"; 5975 else 5976 OS << "<null>"; 5977 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5978 if (MD->getMD()) 5979 OS << "<" << MD->getMD() << ">"; 5980 else 5981 OS << "<null>"; 5982 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5983 OS << ":" << N->getVT().getEVTString(); 5984 } 5985 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5986 OS << "<" << *LD->getMemOperand(); 5987 5988 bool doExt = true; 5989 switch (LD->getExtensionType()) { 5990 default: doExt = false; break; 5991 case ISD::EXTLOAD: OS << ", anyext"; break; 5992 case ISD::SEXTLOAD: OS << ", sext"; break; 5993 case ISD::ZEXTLOAD: OS << ", zext"; break; 5994 } 5995 if (doExt) 5996 OS << " from " << LD->getMemoryVT().getEVTString(); 5997 5998 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5999 if (*AM) 6000 OS << ", " << AM; 6001 6002 OS << ">"; 6003 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6004 OS << "<" << *ST->getMemOperand(); 6005 6006 if (ST->isTruncatingStore()) 6007 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6008 6009 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6010 if (*AM) 6011 OS << ", " << AM; 6012 6013 OS << ">"; 6014 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6015 OS << "<" << *M->getMemOperand() << ">"; 6016 } else if (const BlockAddressSDNode *BA = 6017 dyn_cast<BlockAddressSDNode>(this)) { 6018 OS << "<"; 6019 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6020 OS << ", "; 6021 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6022 OS << ">"; 6023 if (unsigned int TF = BA->getTargetFlags()) 6024 OS << " [TF=" << TF << ']'; 6025 } 6026 6027 if (G) 6028 if (unsigned Order = G->GetOrdering(this)) 6029 OS << " [ORD=" << Order << ']'; 6030 6031 if (getNodeId() != -1) 6032 OS << " [ID=" << getNodeId() << ']'; 6033 6034 DebugLoc dl = getDebugLoc(); 6035 if (G && !dl.isUnknown()) { 6036 DIScope 6037 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6038 OS << " dbg:"; 6039 // Omit the directory, since it's usually long and uninteresting. 6040 if (Scope.Verify()) 6041 OS << Scope.getFilename(); 6042 else 6043 OS << "<unknown>"; 6044 OS << ':' << dl.getLine(); 6045 if (dl.getCol() != 0) 6046 OS << ':' << dl.getCol(); 6047 } 6048} 6049 6050void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6051 print_types(OS, G); 6052 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6053 if (i) OS << ", "; else OS << " "; 6054 OS << (void*)getOperand(i).getNode(); 6055 if (unsigned RN = getOperand(i).getResNo()) 6056 OS << ":" << RN; 6057 } 6058 print_details(OS, G); 6059} 6060 6061static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6062 const SelectionDAG *G, unsigned depth, 6063 unsigned indent) 6064{ 6065 if (depth == 0) 6066 return; 6067 6068 OS.indent(indent); 6069 6070 N->print(OS, G); 6071 6072 if (depth < 1) 6073 return; 6074 6075 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6076 OS << '\n'; 6077 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6078 } 6079} 6080 6081void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6082 unsigned depth) const { 6083 printrWithDepthHelper(OS, this, G, depth, 0); 6084} 6085 6086void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6087 // Don't print impossibly deep things. 6088 printrWithDepth(OS, G, 100); 6089} 6090 6091void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6092 printrWithDepth(dbgs(), G, depth); 6093} 6094 6095void SDNode::dumprFull(const SelectionDAG *G) const { 6096 // Don't print impossibly deep things. 6097 dumprWithDepth(G, 100); 6098} 6099 6100static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6101 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6102 if (N->getOperand(i).getNode()->hasOneUse()) 6103 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6104 else 6105 dbgs() << "\n" << std::string(indent+2, ' ') 6106 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6107 6108 6109 dbgs() << "\n"; 6110 dbgs().indent(indent); 6111 N->dump(G); 6112} 6113 6114SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6115 assert(N->getNumValues() == 1 && 6116 "Can't unroll a vector with multiple results!"); 6117 6118 EVT VT = N->getValueType(0); 6119 unsigned NE = VT.getVectorNumElements(); 6120 EVT EltVT = VT.getVectorElementType(); 6121 DebugLoc dl = N->getDebugLoc(); 6122 6123 SmallVector<SDValue, 8> Scalars; 6124 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6125 6126 // If ResNE is 0, fully unroll the vector op. 6127 if (ResNE == 0) 6128 ResNE = NE; 6129 else if (NE > ResNE) 6130 NE = ResNE; 6131 6132 unsigned i; 6133 for (i= 0; i != NE; ++i) { 6134 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6135 SDValue Operand = N->getOperand(j); 6136 EVT OperandVT = Operand.getValueType(); 6137 if (OperandVT.isVector()) { 6138 // A vector operand; extract a single element. 6139 EVT OperandEltVT = OperandVT.getVectorElementType(); 6140 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6141 OperandEltVT, 6142 Operand, 6143 getConstant(i, MVT::i32)); 6144 } else { 6145 // A scalar operand; just use it as is. 6146 Operands[j] = Operand; 6147 } 6148 } 6149 6150 switch (N->getOpcode()) { 6151 default: 6152 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6153 &Operands[0], Operands.size())); 6154 break; 6155 case ISD::SHL: 6156 case ISD::SRA: 6157 case ISD::SRL: 6158 case ISD::ROTL: 6159 case ISD::ROTR: 6160 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6161 getShiftAmountOperand(Operands[1]))); 6162 break; 6163 case ISD::SIGN_EXTEND_INREG: 6164 case ISD::FP_ROUND_INREG: { 6165 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6166 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6167 Operands[0], 6168 getValueType(ExtVT))); 6169 } 6170 } 6171 } 6172 6173 for (; i < ResNE; ++i) 6174 Scalars.push_back(getUNDEF(EltVT)); 6175 6176 return getNode(ISD::BUILD_VECTOR, dl, 6177 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6178 &Scalars[0], Scalars.size()); 6179} 6180 6181 6182/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6183/// location that is 'Dist' units away from the location that the 'Base' load 6184/// is loading from. 6185bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6186 unsigned Bytes, int Dist) const { 6187 if (LD->getChain() != Base->getChain()) 6188 return false; 6189 EVT VT = LD->getValueType(0); 6190 if (VT.getSizeInBits() / 8 != Bytes) 6191 return false; 6192 6193 SDValue Loc = LD->getOperand(1); 6194 SDValue BaseLoc = Base->getOperand(1); 6195 if (Loc.getOpcode() == ISD::FrameIndex) { 6196 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6197 return false; 6198 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6199 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6200 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6201 int FS = MFI->getObjectSize(FI); 6202 int BFS = MFI->getObjectSize(BFI); 6203 if (FS != BFS || FS != (int)Bytes) return false; 6204 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6205 } 6206 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6207 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6208 if (V && (V->getSExtValue() == Dist*Bytes)) 6209 return true; 6210 } 6211 6212 const GlobalValue *GV1 = NULL; 6213 const GlobalValue *GV2 = NULL; 6214 int64_t Offset1 = 0; 6215 int64_t Offset2 = 0; 6216 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6217 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6218 if (isGA1 && isGA2 && GV1 == GV2) 6219 return Offset1 == (Offset2 + Dist*Bytes); 6220 return false; 6221} 6222 6223 6224/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6225/// it cannot be inferred. 6226unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6227 // If this is a GlobalAddress + cst, return the alignment. 6228 const GlobalValue *GV; 6229 int64_t GVOffset = 0; 6230 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6231 // If GV has specified alignment, then use it. Otherwise, use the preferred 6232 // alignment. 6233 unsigned Align = GV->getAlignment(); 6234 if (!Align) { 6235 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6236 if (GVar->hasInitializer()) { 6237 const TargetData *TD = TLI.getTargetData(); 6238 Align = TD->getPreferredAlignment(GVar); 6239 } 6240 } 6241 } 6242 return MinAlign(Align, GVOffset); 6243 } 6244 6245 // If this is a direct reference to a stack slot, use information about the 6246 // stack slot's alignment. 6247 int FrameIdx = 1 << 31; 6248 int64_t FrameOffset = 0; 6249 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6250 FrameIdx = FI->getIndex(); 6251 } else if (Ptr.getOpcode() == ISD::ADD && 6252 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6253 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6254 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6255 FrameOffset = Ptr.getConstantOperandVal(1); 6256 } 6257 6258 if (FrameIdx != (1 << 31)) { 6259 // FIXME: Handle FI+CST. 6260 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6261 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6262 FrameOffset); 6263 if (MFI.isFixedObjectIndex(FrameIdx)) { 6264 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6265 6266 // The alignment of the frame index can be determined from its offset from 6267 // the incoming frame position. If the frame object is at offset 32 and 6268 // the stack is guaranteed to be 16-byte aligned, then we know that the 6269 // object is 16-byte aligned. 6270 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6271 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6272 6273 // Finally, the frame object itself may have a known alignment. Factor 6274 // the alignment + offset into a new alignment. For example, if we know 6275 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6276 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6277 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6278 return std::max(Align, FIInfoAlign); 6279 } 6280 return FIInfoAlign; 6281 } 6282 6283 return 0; 6284} 6285 6286void SelectionDAG::dump() const { 6287 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6288 6289 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6290 I != E; ++I) { 6291 const SDNode *N = I; 6292 if (!N->hasOneUse() && N != getRoot().getNode()) 6293 DumpNodes(N, 2, this); 6294 } 6295 6296 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6297 6298 dbgs() << "\n\n"; 6299} 6300 6301void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6302 print_types(OS, G); 6303 print_details(OS, G); 6304} 6305 6306typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6307static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6308 const SelectionDAG *G, VisitedSDNodeSet &once) { 6309 if (!once.insert(N)) // If we've been here before, return now. 6310 return; 6311 6312 // Dump the current SDNode, but don't end the line yet. 6313 OS << std::string(indent, ' '); 6314 N->printr(OS, G); 6315 6316 // Having printed this SDNode, walk the children: 6317 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6318 const SDNode *child = N->getOperand(i).getNode(); 6319 6320 if (i) OS << ","; 6321 OS << " "; 6322 6323 if (child->getNumOperands() == 0) { 6324 // This child has no grandchildren; print it inline right here. 6325 child->printr(OS, G); 6326 once.insert(child); 6327 } else { // Just the address. FIXME: also print the child's opcode. 6328 OS << (void*)child; 6329 if (unsigned RN = N->getOperand(i).getResNo()) 6330 OS << ":" << RN; 6331 } 6332 } 6333 6334 OS << "\n"; 6335 6336 // Dump children that have grandchildren on their own line(s). 6337 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6338 const SDNode *child = N->getOperand(i).getNode(); 6339 DumpNodesr(OS, child, indent+2, G, once); 6340 } 6341} 6342 6343void SDNode::dumpr() const { 6344 VisitedSDNodeSet once; 6345 DumpNodesr(dbgs(), this, 0, 0, once); 6346} 6347 6348void SDNode::dumpr(const SelectionDAG *G) const { 6349 VisitedSDNodeSet once; 6350 DumpNodesr(dbgs(), this, 0, G, once); 6351} 6352 6353 6354// getAddressSpace - Return the address space this GlobalAddress belongs to. 6355unsigned GlobalAddressSDNode::getAddressSpace() const { 6356 return getGlobal()->getType()->getAddressSpace(); 6357} 6358 6359 6360const Type *ConstantPoolSDNode::getType() const { 6361 if (isMachineConstantPoolEntry()) 6362 return Val.MachineCPVal->getType(); 6363 return Val.ConstVal->getType(); 6364} 6365 6366bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6367 APInt &SplatUndef, 6368 unsigned &SplatBitSize, 6369 bool &HasAnyUndefs, 6370 unsigned MinSplatBits, 6371 bool isBigEndian) { 6372 EVT VT = getValueType(0); 6373 assert(VT.isVector() && "Expected a vector type"); 6374 unsigned sz = VT.getSizeInBits(); 6375 if (MinSplatBits > sz) 6376 return false; 6377 6378 SplatValue = APInt(sz, 0); 6379 SplatUndef = APInt(sz, 0); 6380 6381 // Get the bits. Bits with undefined values (when the corresponding element 6382 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6383 // in SplatValue. If any of the values are not constant, give up and return 6384 // false. 6385 unsigned int nOps = getNumOperands(); 6386 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6387 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6388 6389 for (unsigned j = 0; j < nOps; ++j) { 6390 unsigned i = isBigEndian ? nOps-1-j : j; 6391 SDValue OpVal = getOperand(i); 6392 unsigned BitPos = j * EltBitSize; 6393 6394 if (OpVal.getOpcode() == ISD::UNDEF) 6395 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6396 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6397 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6398 zextOrTrunc(sz) << BitPos; 6399 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6400 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6401 else 6402 return false; 6403 } 6404 6405 // The build_vector is all constants or undefs. Find the smallest element 6406 // size that splats the vector. 6407 6408 HasAnyUndefs = (SplatUndef != 0); 6409 while (sz > 8) { 6410 6411 unsigned HalfSize = sz / 2; 6412 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6413 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6414 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6415 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6416 6417 // If the two halves do not match (ignoring undef bits), stop here. 6418 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6419 MinSplatBits > HalfSize) 6420 break; 6421 6422 SplatValue = HighValue | LowValue; 6423 SplatUndef = HighUndef & LowUndef; 6424 6425 sz = HalfSize; 6426 } 6427 6428 SplatBitSize = sz; 6429 return true; 6430} 6431 6432bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6433 // Find the first non-undef value in the shuffle mask. 6434 unsigned i, e; 6435 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6436 /* search */; 6437 6438 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6439 6440 // Make sure all remaining elements are either undef or the same as the first 6441 // non-undef value. 6442 for (int Idx = Mask[i]; i != e; ++i) 6443 if (Mask[i] >= 0 && Mask[i] != Idx) 6444 return false; 6445 return true; 6446} 6447 6448#ifdef XDEBUG 6449static void checkForCyclesHelper(const SDNode *N, 6450 SmallPtrSet<const SDNode*, 32> &Visited, 6451 SmallPtrSet<const SDNode*, 32> &Checked) { 6452 // If this node has already been checked, don't check it again. 6453 if (Checked.count(N)) 6454 return; 6455 6456 // If a node has already been visited on this depth-first walk, reject it as 6457 // a cycle. 6458 if (!Visited.insert(N)) { 6459 dbgs() << "Offending node:\n"; 6460 N->dumprFull(); 6461 errs() << "Detected cycle in SelectionDAG\n"; 6462 abort(); 6463 } 6464 6465 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6466 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6467 6468 Checked.insert(N); 6469 Visited.erase(N); 6470} 6471#endif 6472 6473void llvm::checkForCycles(const llvm::SDNode *N) { 6474#ifdef XDEBUG 6475 assert(N && "Checking nonexistant SDNode"); 6476 SmallPtrSet<const SDNode*, 32> visited; 6477 SmallPtrSet<const SDNode*, 32> checked; 6478 checkForCyclesHelper(N, visited, checked); 6479#endif 6480} 6481 6482void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6483 checkForCycles(DAG->getRoot().getNode()); 6484} 6485