SelectionDAG.cpp revision 268c743a3ba44ada364938bc5ff9b1be219df54f
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeDbgValue.h" 16#include "llvm/ADT/SetVector.h" 17#include "llvm/ADT/SmallPtrSet.h" 18#include "llvm/ADT/SmallSet.h" 19#include "llvm/ADT/SmallVector.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/Analysis/TargetTransformInfo.h" 22#include "llvm/Analysis/ValueTracking.h" 23#include "llvm/Assembly/Writer.h" 24#include "llvm/CodeGen/MachineBasicBlock.h" 25#include "llvm/CodeGen/MachineConstantPool.h" 26#include "llvm/CodeGen/MachineFrameInfo.h" 27#include "llvm/CodeGen/MachineModuleInfo.h" 28#include "llvm/DebugInfo.h" 29#include "llvm/IR/CallingConv.h" 30#include "llvm/IR/Constants.h" 31#include "llvm/IR/DataLayout.h" 32#include "llvm/IR/DerivedTypes.h" 33#include "llvm/IR/Function.h" 34#include "llvm/IR/GlobalAlias.h" 35#include "llvm/IR/GlobalVariable.h" 36#include "llvm/IR/Intrinsics.h" 37#include "llvm/Support/CommandLine.h" 38#include "llvm/Support/Debug.h" 39#include "llvm/Support/ErrorHandling.h" 40#include "llvm/Support/ManagedStatic.h" 41#include "llvm/Support/MathExtras.h" 42#include "llvm/Support/Mutex.h" 43#include "llvm/Support/raw_ostream.h" 44#include "llvm/Target/TargetInstrInfo.h" 45#include "llvm/Target/TargetIntrinsicInfo.h" 46#include "llvm/Target/TargetLowering.h" 47#include "llvm/Target/TargetMachine.h" 48#include "llvm/Target/TargetOptions.h" 49#include "llvm/Target/TargetRegisterInfo.h" 50#include "llvm/Target/TargetSelectionDAGInfo.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62// Default null implementations of the callbacks. 63void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 64void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 65 66//===----------------------------------------------------------------------===// 67// ConstantFPSDNode Class 68//===----------------------------------------------------------------------===// 69 70/// isExactlyValue - We don't rely on operator== working on double values, as 71/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 72/// As such, this method can be used to do an exact bit-for-bit comparison of 73/// two floating point values. 74bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 75 return getValueAPF().bitwiseIsEqual(V); 76} 77 78bool ConstantFPSDNode::isValueValidForType(EVT VT, 79 const APFloat& Val) { 80 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 81 82 // convert modifies in place, so make a copy. 83 APFloat Val2 = APFloat(Val); 84 bool losesInfo; 85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT), 86 APFloat::rmNearestTiesToEven, 87 &losesInfo); 88 return !losesInfo; 89} 90 91//===----------------------------------------------------------------------===// 92// ISD Namespace 93//===----------------------------------------------------------------------===// 94 95/// isBuildVectorAllOnes - Return true if the specified node is a 96/// BUILD_VECTOR where all of the elements are ~0 or undef. 97bool ISD::isBuildVectorAllOnes(const SDNode *N) { 98 // Look through a bit convert. 99 if (N->getOpcode() == ISD::BITCAST) 100 N = N->getOperand(0).getNode(); 101 102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 103 104 unsigned i = 0, e = N->getNumOperands(); 105 106 // Skip over all of the undef values. 107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 108 ++i; 109 110 // Do not accept an all-undef vector. 111 if (i == e) return false; 112 113 // Do not accept build_vectors that aren't all constants or which have non-~0 114 // elements. We have to be a bit careful here, as the type of the constant 115 // may not be the same as the type of the vector elements due to type 116 // legalization (the elements are promoted to a legal type for the target and 117 // a vector of a type may be legal when the base element type is not). 118 // We only want to check enough bits to cover the vector elements, because 119 // we care if the resultant vector is all ones, not whether the individual 120 // constants are. 121 SDValue NotZero = N->getOperand(i); 122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) { 124 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 125 return false; 126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) { 127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 128 return false; 129 } else 130 return false; 131 132 // Okay, we have at least one ~0 value, check to see if the rest match or are 133 // undefs. Even with the above element type twiddling, this should be OK, as 134 // the same type legalization should have applied to all the elements. 135 for (++i; i != e; ++i) 136 if (N->getOperand(i) != NotZero && 137 N->getOperand(i).getOpcode() != ISD::UNDEF) 138 return false; 139 return true; 140} 141 142 143/// isBuildVectorAllZeros - Return true if the specified node is a 144/// BUILD_VECTOR where all of the elements are 0 or undef. 145bool ISD::isBuildVectorAllZeros(const SDNode *N) { 146 // Look through a bit convert. 147 if (N->getOpcode() == ISD::BITCAST) 148 N = N->getOperand(0).getNode(); 149 150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 151 152 unsigned i = 0, e = N->getNumOperands(); 153 154 // Skip over all of the undef values. 155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 156 ++i; 157 158 // Do not accept an all-undef vector. 159 if (i == e) return false; 160 161 // Do not accept build_vectors that aren't all constants or which have non-0 162 // elements. 163 SDValue Zero = N->getOperand(i); 164 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) { 165 if (!CN->isNullValue()) 166 return false; 167 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) { 168 if (!CFPN->getValueAPF().isPosZero()) 169 return false; 170 } else 171 return false; 172 173 // Okay, we have at least one 0 value, check to see if the rest match or are 174 // undefs. 175 for (++i; i != e; ++i) 176 if (N->getOperand(i) != Zero && 177 N->getOperand(i).getOpcode() != ISD::UNDEF) 178 return false; 179 return true; 180} 181 182/// isScalarToVector - Return true if the specified node is a 183/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 184/// element is not an undef. 185bool ISD::isScalarToVector(const SDNode *N) { 186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 187 return true; 188 189 if (N->getOpcode() != ISD::BUILD_VECTOR) 190 return false; 191 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 192 return false; 193 unsigned NumElems = N->getNumOperands(); 194 if (NumElems == 1) 195 return false; 196 for (unsigned i = 1; i < NumElems; ++i) { 197 SDValue V = N->getOperand(i); 198 if (V.getOpcode() != ISD::UNDEF) 199 return false; 200 } 201 return true; 202} 203 204/// allOperandsUndef - Return true if the node has at least one operand 205/// and all operands of the specified node are ISD::UNDEF. 206bool ISD::allOperandsUndef(const SDNode *N) { 207 // Return false if the node has no operands. 208 // This is "logically inconsistent" with the definition of "all" but 209 // is probably the desired behavior. 210 if (N->getNumOperands() == 0) 211 return false; 212 213 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 214 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 215 return false; 216 217 return true; 218} 219 220/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 221/// when given the operation for (X op Y). 222ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 223 // To perform this operation, we just need to swap the L and G bits of the 224 // operation. 225 unsigned OldL = (Operation >> 2) & 1; 226 unsigned OldG = (Operation >> 1) & 1; 227 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 228 (OldL << 1) | // New G bit 229 (OldG << 2)); // New L bit. 230} 231 232/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 233/// 'op' is a valid SetCC operation. 234ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 235 unsigned Operation = Op; 236 if (isInteger) 237 Operation ^= 7; // Flip L, G, E bits, but not U. 238 else 239 Operation ^= 15; // Flip all of the condition bits. 240 241 if (Operation > ISD::SETTRUE2) 242 Operation &= ~8; // Don't let N and U bits get set. 243 244 return ISD::CondCode(Operation); 245} 246 247 248/// isSignedOp - For an integer comparison, return 1 if the comparison is a 249/// signed operation and 2 if the result is an unsigned comparison. Return zero 250/// if the operation does not depend on the sign of the input (setne and seteq). 251static int isSignedOp(ISD::CondCode Opcode) { 252 switch (Opcode) { 253 default: llvm_unreachable("Illegal integer setcc operation!"); 254 case ISD::SETEQ: 255 case ISD::SETNE: return 0; 256 case ISD::SETLT: 257 case ISD::SETLE: 258 case ISD::SETGT: 259 case ISD::SETGE: return 1; 260 case ISD::SETULT: 261 case ISD::SETULE: 262 case ISD::SETUGT: 263 case ISD::SETUGE: return 2; 264 } 265} 266 267/// getSetCCOrOperation - Return the result of a logical OR between different 268/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 269/// returns SETCC_INVALID if it is not possible to represent the resultant 270/// comparison. 271ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 272 bool isInteger) { 273 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 274 // Cannot fold a signed integer setcc with an unsigned integer setcc. 275 return ISD::SETCC_INVALID; 276 277 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 278 279 // If the N and U bits get set then the resultant comparison DOES suddenly 280 // care about orderedness, and is true when ordered. 281 if (Op > ISD::SETTRUE2) 282 Op &= ~16; // Clear the U bit if the N bit is set. 283 284 // Canonicalize illegal integer setcc's. 285 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 286 Op = ISD::SETNE; 287 288 return ISD::CondCode(Op); 289} 290 291/// getSetCCAndOperation - Return the result of a logical AND between different 292/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 293/// function returns zero if it is not possible to represent the resultant 294/// comparison. 295ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 296 bool isInteger) { 297 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 298 // Cannot fold a signed setcc with an unsigned setcc. 299 return ISD::SETCC_INVALID; 300 301 // Combine all of the condition bits. 302 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 303 304 // Canonicalize illegal integer setcc's. 305 if (isInteger) { 306 switch (Result) { 307 default: break; 308 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 309 case ISD::SETOEQ: // SETEQ & SETU[LG]E 310 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 311 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 312 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 313 } 314 } 315 316 return Result; 317} 318 319//===----------------------------------------------------------------------===// 320// SDNode Profile Support 321//===----------------------------------------------------------------------===// 322 323/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 324/// 325static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 326 ID.AddInteger(OpC); 327} 328 329/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 330/// solely with their pointer. 331static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 332 ID.AddPointer(VTList.VTs); 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDValue *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 346/// 347static void AddNodeIDOperands(FoldingSetNodeID &ID, 348 const SDUse *Ops, unsigned NumOps) { 349 for (; NumOps; --NumOps, ++Ops) { 350 ID.AddPointer(Ops->getNode()); 351 ID.AddInteger(Ops->getResNo()); 352 } 353} 354 355static void AddNodeIDNode(FoldingSetNodeID &ID, 356 unsigned short OpC, SDVTList VTList, 357 const SDValue *OpList, unsigned N) { 358 AddNodeIDOpcode(ID, OpC); 359 AddNodeIDValueTypes(ID, VTList); 360 AddNodeIDOperands(ID, OpList, N); 361} 362 363/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 364/// the NodeID data. 365static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 366 switch (N->getOpcode()) { 367 case ISD::TargetExternalSymbol: 368 case ISD::ExternalSymbol: 369 llvm_unreachable("Should only be used on nodes with operands"); 370 default: break; // Normal nodes don't need extra info. 371 case ISD::TargetConstant: 372 case ISD::Constant: 373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 374 break; 375 case ISD::TargetConstantFP: 376 case ISD::ConstantFP: { 377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 378 break; 379 } 380 case ISD::TargetGlobalAddress: 381 case ISD::GlobalAddress: 382 case ISD::TargetGlobalTLSAddress: 383 case ISD::GlobalTLSAddress: { 384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 385 ID.AddPointer(GA->getGlobal()); 386 ID.AddInteger(GA->getOffset()); 387 ID.AddInteger(GA->getTargetFlags()); 388 ID.AddInteger(GA->getAddressSpace()); 389 break; 390 } 391 case ISD::BasicBlock: 392 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 393 break; 394 case ISD::Register: 395 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 396 break; 397 case ISD::RegisterMask: 398 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 399 break; 400 case ISD::SRCVALUE: 401 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 402 break; 403 case ISD::FrameIndex: 404 case ISD::TargetFrameIndex: 405 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 406 break; 407 case ISD::JumpTable: 408 case ISD::TargetJumpTable: 409 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 410 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 411 break; 412 case ISD::ConstantPool: 413 case ISD::TargetConstantPool: { 414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 415 ID.AddInteger(CP->getAlignment()); 416 ID.AddInteger(CP->getOffset()); 417 if (CP->isMachineConstantPoolEntry()) 418 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 419 else 420 ID.AddPointer(CP->getConstVal()); 421 ID.AddInteger(CP->getTargetFlags()); 422 break; 423 } 424 case ISD::TargetIndex: { 425 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 426 ID.AddInteger(TI->getIndex()); 427 ID.AddInteger(TI->getOffset()); 428 ID.AddInteger(TI->getTargetFlags()); 429 break; 430 } 431 case ISD::LOAD: { 432 const LoadSDNode *LD = cast<LoadSDNode>(N); 433 ID.AddInteger(LD->getMemoryVT().getRawBits()); 434 ID.AddInteger(LD->getRawSubclassData()); 435 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 436 break; 437 } 438 case ISD::STORE: { 439 const StoreSDNode *ST = cast<StoreSDNode>(N); 440 ID.AddInteger(ST->getMemoryVT().getRawBits()); 441 ID.AddInteger(ST->getRawSubclassData()); 442 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 443 break; 444 } 445 case ISD::ATOMIC_CMP_SWAP: 446 case ISD::ATOMIC_SWAP: 447 case ISD::ATOMIC_LOAD_ADD: 448 case ISD::ATOMIC_LOAD_SUB: 449 case ISD::ATOMIC_LOAD_AND: 450 case ISD::ATOMIC_LOAD_OR: 451 case ISD::ATOMIC_LOAD_XOR: 452 case ISD::ATOMIC_LOAD_NAND: 453 case ISD::ATOMIC_LOAD_MIN: 454 case ISD::ATOMIC_LOAD_MAX: 455 case ISD::ATOMIC_LOAD_UMIN: 456 case ISD::ATOMIC_LOAD_UMAX: 457 case ISD::ATOMIC_LOAD: 458 case ISD::ATOMIC_STORE: { 459 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 460 ID.AddInteger(AT->getMemoryVT().getRawBits()); 461 ID.AddInteger(AT->getRawSubclassData()); 462 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 463 break; 464 } 465 case ISD::PREFETCH: { 466 const MemSDNode *PF = cast<MemSDNode>(N); 467 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 468 break; 469 } 470 case ISD::VECTOR_SHUFFLE: { 471 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 472 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 473 i != e; ++i) 474 ID.AddInteger(SVN->getMaskElt(i)); 475 break; 476 } 477 case ISD::TargetBlockAddress: 478 case ISD::BlockAddress: { 479 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N); 480 ID.AddPointer(BA->getBlockAddress()); 481 ID.AddInteger(BA->getOffset()); 482 ID.AddInteger(BA->getTargetFlags()); 483 break; 484 } 485 } // end switch (N->getOpcode()) 486 487 // Target specific memory nodes could also have address spaces to check. 488 if (N->isTargetMemoryOpcode()) 489 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 490} 491 492/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 493/// data. 494static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 495 AddNodeIDOpcode(ID, N->getOpcode()); 496 // Add the return value info. 497 AddNodeIDValueTypes(ID, N->getVTList()); 498 // Add the operand info. 499 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 500 501 // Handle SDNode leafs with special info. 502 AddNodeIDCustom(ID, N); 503} 504 505/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 506/// the CSE map that carries volatility, temporalness, indexing mode, and 507/// extension/truncation information. 508/// 509static inline unsigned 510encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 511 bool isNonTemporal, bool isInvariant) { 512 assert((ConvType & 3) == ConvType && 513 "ConvType may not require more than 2 bits!"); 514 assert((AM & 7) == AM && 515 "AM may not require more than 3 bits!"); 516 return ConvType | 517 (AM << 2) | 518 (isVolatile << 5) | 519 (isNonTemporal << 6) | 520 (isInvariant << 7); 521} 522 523//===----------------------------------------------------------------------===// 524// SelectionDAG Class 525//===----------------------------------------------------------------------===// 526 527/// doNotCSE - Return true if CSE should not be performed for this node. 528static bool doNotCSE(SDNode *N) { 529 if (N->getValueType(0) == MVT::Glue) 530 return true; // Never CSE anything that produces a flag. 531 532 switch (N->getOpcode()) { 533 default: break; 534 case ISD::HANDLENODE: 535 case ISD::EH_LABEL: 536 return true; // Never CSE these nodes. 537 } 538 539 // Check that remaining values produced are not flags. 540 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 541 if (N->getValueType(i) == MVT::Glue) 542 return true; // Never CSE anything that produces a flag. 543 544 return false; 545} 546 547/// RemoveDeadNodes - This method deletes all unreachable nodes in the 548/// SelectionDAG. 549void SelectionDAG::RemoveDeadNodes() { 550 // Create a dummy node (which is not added to allnodes), that adds a reference 551 // to the root node, preventing it from being deleted. 552 HandleSDNode Dummy(getRoot()); 553 554 SmallVector<SDNode*, 128> DeadNodes; 555 556 // Add all obviously-dead nodes to the DeadNodes worklist. 557 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 558 if (I->use_empty()) 559 DeadNodes.push_back(I); 560 561 RemoveDeadNodes(DeadNodes); 562 563 // If the root changed (e.g. it was a dead load, update the root). 564 setRoot(Dummy.getValue()); 565} 566 567/// RemoveDeadNodes - This method deletes the unreachable nodes in the 568/// given list, and any nodes that become unreachable as a result. 569void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 570 571 // Process the worklist, deleting the nodes and adding their uses to the 572 // worklist. 573 while (!DeadNodes.empty()) { 574 SDNode *N = DeadNodes.pop_back_val(); 575 576 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 577 DUL->NodeDeleted(N, 0); 578 579 // Take the node out of the appropriate CSE map. 580 RemoveNodeFromCSEMaps(N); 581 582 // Next, brutally remove the operand list. This is safe to do, as there are 583 // no cycles in the graph. 584 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 585 SDUse &Use = *I++; 586 SDNode *Operand = Use.getNode(); 587 Use.set(SDValue()); 588 589 // Now that we removed this operand, see if there are no uses of it left. 590 if (Operand->use_empty()) 591 DeadNodes.push_back(Operand); 592 } 593 594 DeallocateNode(N); 595 } 596} 597 598void SelectionDAG::RemoveDeadNode(SDNode *N){ 599 SmallVector<SDNode*, 16> DeadNodes(1, N); 600 601 // Create a dummy node that adds a reference to the root node, preventing 602 // it from being deleted. (This matters if the root is an operand of the 603 // dead node.) 604 HandleSDNode Dummy(getRoot()); 605 606 RemoveDeadNodes(DeadNodes); 607} 608 609void SelectionDAG::DeleteNode(SDNode *N) { 610 // First take this out of the appropriate CSE map. 611 RemoveNodeFromCSEMaps(N); 612 613 // Finally, remove uses due to operands of this node, remove from the 614 // AllNodes list, and delete the node. 615 DeleteNodeNotInCSEMaps(N); 616} 617 618void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 619 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 620 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 621 622 // Drop all of the operands and decrement used node's use counts. 623 N->DropOperands(); 624 625 DeallocateNode(N); 626} 627 628void SelectionDAG::DeallocateNode(SDNode *N) { 629 if (N->OperandsNeedDelete) 630 delete[] N->OperandList; 631 632 // Set the opcode to DELETED_NODE to help catch bugs when node 633 // memory is reallocated. 634 N->NodeType = ISD::DELETED_NODE; 635 636 NodeAllocator.Deallocate(AllNodes.remove(N)); 637 638 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 639 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 640 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 641 DbgVals[i]->setIsInvalidated(); 642} 643 644/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 645/// correspond to it. This is useful when we're about to delete or repurpose 646/// the node. We don't want future request for structurally identical nodes 647/// to return N anymore. 648bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 649 bool Erased = false; 650 switch (N->getOpcode()) { 651 case ISD::HANDLENODE: return false; // noop. 652 case ISD::CONDCODE: 653 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 654 "Cond code doesn't exist!"); 655 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 656 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 657 break; 658 case ISD::ExternalSymbol: 659 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 660 break; 661 case ISD::TargetExternalSymbol: { 662 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 663 Erased = TargetExternalSymbols.erase( 664 std::pair<std::string,unsigned char>(ESN->getSymbol(), 665 ESN->getTargetFlags())); 666 break; 667 } 668 case ISD::VALUETYPE: { 669 EVT VT = cast<VTSDNode>(N)->getVT(); 670 if (VT.isExtended()) { 671 Erased = ExtendedValueTypeNodes.erase(VT); 672 } else { 673 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 674 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 675 } 676 break; 677 } 678 default: 679 // Remove it from the CSE Map. 680 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 681 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 682 Erased = CSEMap.RemoveNode(N); 683 break; 684 } 685#ifndef NDEBUG 686 // Verify that the node was actually in one of the CSE maps, unless it has a 687 // flag result (which cannot be CSE'd) or is one of the special cases that are 688 // not subject to CSE. 689 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 690 !N->isMachineOpcode() && !doNotCSE(N)) { 691 N->dump(this); 692 dbgs() << "\n"; 693 llvm_unreachable("Node is not in map!"); 694 } 695#endif 696 return Erased; 697} 698 699/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 700/// maps and modified in place. Add it back to the CSE maps, unless an identical 701/// node already exists, in which case transfer all its users to the existing 702/// node. This transfer can potentially trigger recursive merging. 703/// 704void 705SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 706 // For node types that aren't CSE'd, just act as if no identical node 707 // already exists. 708 if (!doNotCSE(N)) { 709 SDNode *Existing = CSEMap.GetOrInsertNode(N); 710 if (Existing != N) { 711 // If there was already an existing matching node, use ReplaceAllUsesWith 712 // to replace the dead one with the existing one. This can cause 713 // recursive merging of other unrelated nodes down the line. 714 ReplaceAllUsesWith(N, Existing); 715 716 // N is now dead. Inform the listeners and delete it. 717 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 718 DUL->NodeDeleted(N, Existing); 719 DeleteNodeNotInCSEMaps(N); 720 return; 721 } 722 } 723 724 // If the node doesn't already exist, we updated it. Inform listeners. 725 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 726 DUL->NodeUpdated(N); 727} 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 734 void *&InsertPos) { 735 if (doNotCSE(N)) 736 return 0; 737 738 SDValue Ops[] = { Op }; 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 747/// were replaced with those specified. If this node is never memoized, 748/// return null, otherwise return a pointer to the slot it would take. If a 749/// node already exists with these operands, the slot will be non-null. 750SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 751 SDValue Op1, SDValue Op2, 752 void *&InsertPos) { 753 if (doNotCSE(N)) 754 return 0; 755 756 SDValue Ops[] = { Op1, Op2 }; 757 FoldingSetNodeID ID; 758 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 759 AddNodeIDCustom(ID, N); 760 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 761 return Node; 762} 763 764 765/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 766/// were replaced with those specified. If this node is never memoized, 767/// return null, otherwise return a pointer to the slot it would take. If a 768/// node already exists with these operands, the slot will be non-null. 769SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 770 const SDValue *Ops,unsigned NumOps, 771 void *&InsertPos) { 772 if (doNotCSE(N)) 773 return 0; 774 775 FoldingSetNodeID ID; 776 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 777 AddNodeIDCustom(ID, N); 778 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 779 return Node; 780} 781 782#ifndef NDEBUG 783/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 784static void VerifyNodeCommon(SDNode *N) { 785 switch (N->getOpcode()) { 786 default: 787 break; 788 case ISD::BUILD_PAIR: { 789 EVT VT = N->getValueType(0); 790 assert(N->getNumValues() == 1 && "Too many results!"); 791 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 792 "Wrong return type!"); 793 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 794 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 795 "Mismatched operand types!"); 796 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 797 "Wrong operand type!"); 798 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 799 "Wrong return type size"); 800 break; 801 } 802 case ISD::BUILD_VECTOR: { 803 assert(N->getNumValues() == 1 && "Too many results!"); 804 assert(N->getValueType(0).isVector() && "Wrong return type!"); 805 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 806 "Wrong number of operands!"); 807 EVT EltVT = N->getValueType(0).getVectorElementType(); 808 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 809 assert((I->getValueType() == EltVT || 810 (EltVT.isInteger() && I->getValueType().isInteger() && 811 EltVT.bitsLE(I->getValueType()))) && 812 "Wrong operand type!"); 813 assert(I->getValueType() == N->getOperand(0).getValueType() && 814 "Operands must all have the same type"); 815 } 816 break; 817 } 818 } 819} 820 821/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 822static void VerifySDNode(SDNode *N) { 823 // The SDNode allocators cannot be used to allocate nodes with fields that are 824 // not present in an SDNode! 825 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 826 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 827 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 828 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 829 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 830 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 831 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 832 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 833 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 834 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 835 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 836 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 837 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 838 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 839 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 840 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 841 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 842 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 843 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 844 845 VerifyNodeCommon(N); 846} 847 848/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 849/// invalid. 850static void VerifyMachineNode(SDNode *N) { 851 // The MachineNode allocators cannot be used to allocate nodes with fields 852 // that are not present in a MachineNode! 853 // Currently there are no such nodes. 854 855 VerifyNodeCommon(N); 856} 857#endif // NDEBUG 858 859/// getEVTAlignment - Compute the default alignment value for the 860/// given type. 861/// 862unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 863 Type *Ty = VT == MVT::iPTR ? 864 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 865 VT.getTypeForEVT(*getContext()); 866 867 return TM.getTargetLowering()->getDataLayout()->getABITypeAlignment(Ty); 868} 869 870// EntryNode could meaningfully have debug info if we can find it... 871SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 872 : TM(tm), TSI(*tm.getSelectionDAGInfo()), TTI(0), OptLevel(OL), 873 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)), 874 Root(getEntryNode()), UpdateListeners(0) { 875 AllNodes.push_back(&EntryNode); 876 DbgInfo = new SDDbgInfo(); 877} 878 879void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) { 880 MF = &mf; 881 TTI = tti; 882 Context = &mf.getFunction()->getContext(); 883} 884 885SelectionDAG::~SelectionDAG() { 886 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 887 allnodes_clear(); 888 delete DbgInfo; 889} 890 891void SelectionDAG::allnodes_clear() { 892 assert(&*AllNodes.begin() == &EntryNode); 893 AllNodes.remove(AllNodes.begin()); 894 while (!AllNodes.empty()) 895 DeallocateNode(AllNodes.begin()); 896} 897 898void SelectionDAG::clear() { 899 allnodes_clear(); 900 OperandAllocator.Reset(); 901 CSEMap.clear(); 902 903 ExtendedValueTypeNodes.clear(); 904 ExternalSymbols.clear(); 905 TargetExternalSymbols.clear(); 906 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 907 static_cast<CondCodeSDNode*>(0)); 908 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 909 static_cast<SDNode*>(0)); 910 911 EntryNode.UseList = 0; 912 AllNodes.push_back(&EntryNode); 913 Root = getEntryNode(); 914 DbgInfo->clear(); 915} 916 917SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 918 return VT.bitsGT(Op.getValueType()) ? 919 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 920 getNode(ISD::TRUNCATE, DL, VT, Op); 921} 922 923SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 924 return VT.bitsGT(Op.getValueType()) ? 925 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 926 getNode(ISD::TRUNCATE, DL, VT, Op); 927} 928 929SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 930 return VT.bitsGT(Op.getValueType()) ? 931 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 932 getNode(ISD::TRUNCATE, DL, VT, Op); 933} 934 935SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) { 936 assert(!VT.isVector() && 937 "getZeroExtendInReg should use the vector element type instead of " 938 "the vector type!"); 939 if (Op.getValueType() == VT) return Op; 940 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 941 APInt Imm = APInt::getLowBitsSet(BitWidth, 942 VT.getSizeInBits()); 943 return getNode(ISD::AND, DL, Op.getValueType(), Op, 944 getConstant(Imm, Op.getValueType())); 945} 946 947/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 948/// 949SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) { 950 EVT EltVT = VT.getScalarType(); 951 SDValue NegOne = 952 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 953 return getNode(ISD::XOR, DL, VT, Val, NegOne); 954} 955 956SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 957 EVT EltVT = VT.getScalarType(); 958 assert((EltVT.getSizeInBits() >= 64 || 959 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 960 "getConstant with a uint64_t value that doesn't fit in the type!"); 961 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 962} 963 964SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 965 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 966} 967 968SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 969 assert(VT.isInteger() && "Cannot create FP integer constant!"); 970 971 EVT EltVT = VT.getScalarType(); 972 const ConstantInt *Elt = &Val; 973 974 const TargetLowering *TLI = TM.getTargetLowering(); 975 976 // In some cases the vector type is legal but the element type is illegal and 977 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 978 // inserted value (the type does not need to match the vector element type). 979 // Any extra bits introduced will be truncated away. 980 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) == 981 TargetLowering::TypePromoteInteger) { 982 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT); 983 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 984 Elt = ConstantInt::get(*getContext(), NewVal); 985 } 986 987 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 988 "APInt size does not match type size!"); 989 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 990 FoldingSetNodeID ID; 991 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 992 ID.AddPointer(Elt); 993 void *IP = 0; 994 SDNode *N = NULL; 995 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 996 if (!VT.isVector()) 997 return SDValue(N, 0); 998 999 if (!N) { 1000 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1001 CSEMap.InsertNode(N, IP); 1002 AllNodes.push_back(N); 1003 } 1004 1005 SDValue Result(N, 0); 1006 if (VT.isVector()) { 1007 SmallVector<SDValue, 8> Ops; 1008 Ops.assign(VT.getVectorNumElements(), Result); 1009 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size()); 1010 } 1011 return Result; 1012} 1013 1014SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1015 return getConstant(Val, TM.getTargetLowering()->getPointerTy(), isTarget); 1016} 1017 1018 1019SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1020 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1021} 1022 1023SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1024 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1025 1026 EVT EltVT = VT.getScalarType(); 1027 1028 // Do the map lookup using the actual bit pattern for the floating point 1029 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1030 // we don't have issues with SNANs. 1031 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1032 FoldingSetNodeID ID; 1033 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1034 ID.AddPointer(&V); 1035 void *IP = 0; 1036 SDNode *N = NULL; 1037 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1038 if (!VT.isVector()) 1039 return SDValue(N, 0); 1040 1041 if (!N) { 1042 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1043 CSEMap.InsertNode(N, IP); 1044 AllNodes.push_back(N); 1045 } 1046 1047 SDValue Result(N, 0); 1048 if (VT.isVector()) { 1049 SmallVector<SDValue, 8> Ops; 1050 Ops.assign(VT.getVectorNumElements(), Result); 1051 // FIXME SDLoc info might be appropriate here 1052 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size()); 1053 } 1054 return Result; 1055} 1056 1057SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1058 EVT EltVT = VT.getScalarType(); 1059 if (EltVT==MVT::f32) 1060 return getConstantFP(APFloat((float)Val), VT, isTarget); 1061 else if (EltVT==MVT::f64) 1062 return getConstantFP(APFloat(Val), VT, isTarget); 1063 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 || 1064 EltVT==MVT::f16) { 1065 bool ignored; 1066 APFloat apf = APFloat(Val); 1067 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1068 &ignored); 1069 return getConstantFP(apf, VT, isTarget); 1070 } else 1071 llvm_unreachable("Unsupported type in getConstantFP"); 1072} 1073 1074SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL, 1075 EVT VT, int64_t Offset, 1076 bool isTargetGA, 1077 unsigned char TargetFlags) { 1078 assert((TargetFlags == 0 || isTargetGA) && 1079 "Cannot set target flags on target-independent globals"); 1080 1081 // Truncate (with sign-extension) the offset value to the pointer size. 1082 unsigned BitWidth = TM.getTargetLowering()->getPointerTy().getSizeInBits(); 1083 if (BitWidth < 64) 1084 Offset = SignExtend64(Offset, BitWidth); 1085 1086 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1087 if (!GVar) { 1088 // If GV is an alias then use the aliasee for determining thread-localness. 1089 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1090 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1091 } 1092 1093 unsigned Opc; 1094 if (GVar && GVar->isThreadLocal()) 1095 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1096 else 1097 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1098 1099 FoldingSetNodeID ID; 1100 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1101 ID.AddPointer(GV); 1102 ID.AddInteger(Offset); 1103 ID.AddInteger(TargetFlags); 1104 ID.AddInteger(GV->getType()->getAddressSpace()); 1105 void *IP = 0; 1106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1107 return SDValue(E, 0); 1108 1109 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(), 1110 DL.getDebugLoc(), GV, VT, 1111 Offset, TargetFlags); 1112 CSEMap.InsertNode(N, IP); 1113 AllNodes.push_back(N); 1114 return SDValue(N, 0); 1115} 1116 1117SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1118 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1119 FoldingSetNodeID ID; 1120 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1121 ID.AddInteger(FI); 1122 void *IP = 0; 1123 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1124 return SDValue(E, 0); 1125 1126 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1127 CSEMap.InsertNode(N, IP); 1128 AllNodes.push_back(N); 1129 return SDValue(N, 0); 1130} 1131 1132SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1133 unsigned char TargetFlags) { 1134 assert((TargetFlags == 0 || isTarget) && 1135 "Cannot set target flags on target-independent jump tables"); 1136 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1137 FoldingSetNodeID ID; 1138 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1139 ID.AddInteger(JTI); 1140 ID.AddInteger(TargetFlags); 1141 void *IP = 0; 1142 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1143 return SDValue(E, 0); 1144 1145 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1146 TargetFlags); 1147 CSEMap.InsertNode(N, IP); 1148 AllNodes.push_back(N); 1149 return SDValue(N, 0); 1150} 1151 1152SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1153 unsigned Alignment, int Offset, 1154 bool isTarget, 1155 unsigned char TargetFlags) { 1156 assert((TargetFlags == 0 || isTarget) && 1157 "Cannot set target flags on target-independent globals"); 1158 if (Alignment == 0) 1159 Alignment = 1160 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType()); 1161 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1162 FoldingSetNodeID ID; 1163 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1164 ID.AddInteger(Alignment); 1165 ID.AddInteger(Offset); 1166 ID.AddPointer(C); 1167 ID.AddInteger(TargetFlags); 1168 void *IP = 0; 1169 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1170 return SDValue(E, 0); 1171 1172 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1173 Alignment, TargetFlags); 1174 CSEMap.InsertNode(N, IP); 1175 AllNodes.push_back(N); 1176 return SDValue(N, 0); 1177} 1178 1179 1180SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1181 unsigned Alignment, int Offset, 1182 bool isTarget, 1183 unsigned char TargetFlags) { 1184 assert((TargetFlags == 0 || isTarget) && 1185 "Cannot set target flags on target-independent globals"); 1186 if (Alignment == 0) 1187 Alignment = 1188 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType()); 1189 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1190 FoldingSetNodeID ID; 1191 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1192 ID.AddInteger(Alignment); 1193 ID.AddInteger(Offset); 1194 C->addSelectionDAGCSEId(ID); 1195 ID.AddInteger(TargetFlags); 1196 void *IP = 0; 1197 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1198 return SDValue(E, 0); 1199 1200 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1201 Alignment, TargetFlags); 1202 CSEMap.InsertNode(N, IP); 1203 AllNodes.push_back(N); 1204 return SDValue(N, 0); 1205} 1206 1207SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1208 unsigned char TargetFlags) { 1209 FoldingSetNodeID ID; 1210 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1211 ID.AddInteger(Index); 1212 ID.AddInteger(Offset); 1213 ID.AddInteger(TargetFlags); 1214 void *IP = 0; 1215 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1216 return SDValue(E, 0); 1217 1218 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1219 TargetFlags); 1220 CSEMap.InsertNode(N, IP); 1221 AllNodes.push_back(N); 1222 return SDValue(N, 0); 1223} 1224 1225SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1226 FoldingSetNodeID ID; 1227 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1228 ID.AddPointer(MBB); 1229 void *IP = 0; 1230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1231 return SDValue(E, 0); 1232 1233 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1234 CSEMap.InsertNode(N, IP); 1235 AllNodes.push_back(N); 1236 return SDValue(N, 0); 1237} 1238 1239SDValue SelectionDAG::getValueType(EVT VT) { 1240 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1241 ValueTypeNodes.size()) 1242 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1243 1244 SDNode *&N = VT.isExtended() ? 1245 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1246 1247 if (N) return SDValue(N, 0); 1248 N = new (NodeAllocator) VTSDNode(VT); 1249 AllNodes.push_back(N); 1250 return SDValue(N, 0); 1251} 1252 1253SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1254 SDNode *&N = ExternalSymbols[Sym]; 1255 if (N) return SDValue(N, 0); 1256 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1257 AllNodes.push_back(N); 1258 return SDValue(N, 0); 1259} 1260 1261SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1262 unsigned char TargetFlags) { 1263 SDNode *&N = 1264 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1265 TargetFlags)]; 1266 if (N) return SDValue(N, 0); 1267 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1273 if ((unsigned)Cond >= CondCodeNodes.size()) 1274 CondCodeNodes.resize(Cond+1); 1275 1276 if (CondCodeNodes[Cond] == 0) { 1277 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1278 CondCodeNodes[Cond] = N; 1279 AllNodes.push_back(N); 1280 } 1281 1282 return SDValue(CondCodeNodes[Cond], 0); 1283} 1284 1285// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1286// the shuffle mask M that point at N1 to point at N2, and indices that point 1287// N2 to point at N1. 1288static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1289 std::swap(N1, N2); 1290 int NElts = M.size(); 1291 for (int i = 0; i != NElts; ++i) { 1292 if (M[i] >= NElts) 1293 M[i] -= NElts; 1294 else if (M[i] >= 0) 1295 M[i] += NElts; 1296 } 1297} 1298 1299SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, 1300 SDValue N2, const int *Mask) { 1301 assert(VT == N1.getValueType() && VT == N2.getValueType() && 1302 "Invalid VECTOR_SHUFFLE"); 1303 1304 // Canonicalize shuffle undef, undef -> undef 1305 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1306 return getUNDEF(VT); 1307 1308 // Validate that all indices in Mask are within the range of the elements 1309 // input to the shuffle. 1310 unsigned NElts = VT.getVectorNumElements(); 1311 SmallVector<int, 8> MaskVec; 1312 for (unsigned i = 0; i != NElts; ++i) { 1313 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1314 MaskVec.push_back(Mask[i]); 1315 } 1316 1317 // Canonicalize shuffle v, v -> v, undef 1318 if (N1 == N2) { 1319 N2 = getUNDEF(VT); 1320 for (unsigned i = 0; i != NElts; ++i) 1321 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1322 } 1323 1324 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1325 if (N1.getOpcode() == ISD::UNDEF) 1326 commuteShuffle(N1, N2, MaskVec); 1327 1328 // Canonicalize all index into lhs, -> shuffle lhs, undef 1329 // Canonicalize all index into rhs, -> shuffle rhs, undef 1330 bool AllLHS = true, AllRHS = true; 1331 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1332 for (unsigned i = 0; i != NElts; ++i) { 1333 if (MaskVec[i] >= (int)NElts) { 1334 if (N2Undef) 1335 MaskVec[i] = -1; 1336 else 1337 AllLHS = false; 1338 } else if (MaskVec[i] >= 0) { 1339 AllRHS = false; 1340 } 1341 } 1342 if (AllLHS && AllRHS) 1343 return getUNDEF(VT); 1344 if (AllLHS && !N2Undef) 1345 N2 = getUNDEF(VT); 1346 if (AllRHS) { 1347 N1 = getUNDEF(VT); 1348 commuteShuffle(N1, N2, MaskVec); 1349 } 1350 1351 // If Identity shuffle return that node. 1352 bool Identity = true; 1353 for (unsigned i = 0; i != NElts; ++i) { 1354 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1355 } 1356 if (Identity && NElts) 1357 return N1; 1358 1359 FoldingSetNodeID ID; 1360 SDValue Ops[2] = { N1, N2 }; 1361 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1362 for (unsigned i = 0; i != NElts; ++i) 1363 ID.AddInteger(MaskVec[i]); 1364 1365 void* IP = 0; 1366 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1367 return SDValue(E, 0); 1368 1369 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1370 // SDNode doesn't have access to it. This memory will be "leaked" when 1371 // the node is deallocated, but recovered when the NodeAllocator is released. 1372 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1373 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1374 1375 ShuffleVectorSDNode *N = 1376 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(), 1377 dl.getDebugLoc(), N1, N2, 1378 MaskAlloc); 1379 CSEMap.InsertNode(N, IP); 1380 AllNodes.push_back(N); 1381 return SDValue(N, 0); 1382} 1383 1384SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl, 1385 SDValue Val, SDValue DTy, 1386 SDValue STy, SDValue Rnd, SDValue Sat, 1387 ISD::CvtCode Code) { 1388 // If the src and dest types are the same and the conversion is between 1389 // integer types of the same sign or two floats, no conversion is necessary. 1390 if (DTy == STy && 1391 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1392 return Val; 1393 1394 FoldingSetNodeID ID; 1395 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1396 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1397 void* IP = 0; 1398 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1399 return SDValue(E, 0); 1400 1401 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(), 1402 dl.getDebugLoc(), 1403 Ops, 5, Code); 1404 CSEMap.InsertNode(N, IP); 1405 AllNodes.push_back(N); 1406 return SDValue(N, 0); 1407} 1408 1409SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1410 FoldingSetNodeID ID; 1411 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1412 ID.AddInteger(RegNo); 1413 void *IP = 0; 1414 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1415 return SDValue(E, 0); 1416 1417 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1418 CSEMap.InsertNode(N, IP); 1419 AllNodes.push_back(N); 1420 return SDValue(N, 0); 1421} 1422 1423SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1424 FoldingSetNodeID ID; 1425 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1426 ID.AddPointer(RegMask); 1427 void *IP = 0; 1428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1429 return SDValue(E, 0); 1430 1431 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1432 CSEMap.InsertNode(N, IP); 1433 AllNodes.push_back(N); 1434 return SDValue(N, 0); 1435} 1436 1437SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) { 1438 FoldingSetNodeID ID; 1439 SDValue Ops[] = { Root }; 1440 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1441 ID.AddPointer(Label); 1442 void *IP = 0; 1443 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1444 return SDValue(E, 0); 1445 1446 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(), 1447 dl.getDebugLoc(), Root, Label); 1448 CSEMap.InsertNode(N, IP); 1449 AllNodes.push_back(N); 1450 return SDValue(N, 0); 1451} 1452 1453 1454SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1455 int64_t Offset, 1456 bool isTarget, 1457 unsigned char TargetFlags) { 1458 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1459 1460 FoldingSetNodeID ID; 1461 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1462 ID.AddPointer(BA); 1463 ID.AddInteger(Offset); 1464 ID.AddInteger(TargetFlags); 1465 void *IP = 0; 1466 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1467 return SDValue(E, 0); 1468 1469 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset, 1470 TargetFlags); 1471 CSEMap.InsertNode(N, IP); 1472 AllNodes.push_back(N); 1473 return SDValue(N, 0); 1474} 1475 1476SDValue SelectionDAG::getSrcValue(const Value *V) { 1477 assert((!V || V->getType()->isPointerTy()) && 1478 "SrcValue is not a pointer?"); 1479 1480 FoldingSetNodeID ID; 1481 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1482 ID.AddPointer(V); 1483 1484 void *IP = 0; 1485 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1486 return SDValue(E, 0); 1487 1488 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1489 CSEMap.InsertNode(N, IP); 1490 AllNodes.push_back(N); 1491 return SDValue(N, 0); 1492} 1493 1494/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1495SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1496 FoldingSetNodeID ID; 1497 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1498 ID.AddPointer(MD); 1499 1500 void *IP = 0; 1501 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1502 return SDValue(E, 0); 1503 1504 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1505 CSEMap.InsertNode(N, IP); 1506 AllNodes.push_back(N); 1507 return SDValue(N, 0); 1508} 1509 1510 1511/// getShiftAmountOperand - Return the specified value casted to 1512/// the target's desired shift amount type. 1513SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1514 EVT OpTy = Op.getValueType(); 1515 EVT ShTy = TM.getTargetLowering()->getShiftAmountTy(LHSTy); 1516 if (OpTy == ShTy || OpTy.isVector()) return Op; 1517 1518 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1519 return getNode(Opcode, SDLoc(Op), ShTy, Op); 1520} 1521 1522/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1523/// specified value type. 1524SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1525 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1526 unsigned ByteSize = VT.getStoreSize(); 1527 Type *Ty = VT.getTypeForEVT(*getContext()); 1528 const TargetLowering *TLI = TM.getTargetLowering(); 1529 unsigned StackAlign = 1530 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign); 1531 1532 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1533 return getFrameIndex(FrameIdx, TLI->getPointerTy()); 1534} 1535 1536/// CreateStackTemporary - Create a stack temporary suitable for holding 1537/// either of the specified value types. 1538SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1539 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1540 VT2.getStoreSizeInBits())/8; 1541 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1542 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1543 const TargetLowering *TLI = TM.getTargetLowering(); 1544 const DataLayout *TD = TLI->getDataLayout(); 1545 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1546 TD->getPrefTypeAlignment(Ty2)); 1547 1548 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1549 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1550 return getFrameIndex(FrameIdx, TLI->getPointerTy()); 1551} 1552 1553SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1554 SDValue N2, ISD::CondCode Cond, SDLoc dl) { 1555 // These setcc operations always fold. 1556 switch (Cond) { 1557 default: break; 1558 case ISD::SETFALSE: 1559 case ISD::SETFALSE2: return getConstant(0, VT); 1560 case ISD::SETTRUE: 1561 case ISD::SETTRUE2: { 1562 const TargetLowering *TLI = TM.getTargetLowering(); 1563 TargetLowering::BooleanContent Cnt = TLI->getBooleanContents(VT.isVector()); 1564 return getConstant( 1565 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT); 1566 } 1567 1568 case ISD::SETOEQ: 1569 case ISD::SETOGT: 1570 case ISD::SETOGE: 1571 case ISD::SETOLT: 1572 case ISD::SETOLE: 1573 case ISD::SETONE: 1574 case ISD::SETO: 1575 case ISD::SETUO: 1576 case ISD::SETUEQ: 1577 case ISD::SETUNE: 1578 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1579 break; 1580 } 1581 1582 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1583 const APInt &C2 = N2C->getAPIntValue(); 1584 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1585 const APInt &C1 = N1C->getAPIntValue(); 1586 1587 switch (Cond) { 1588 default: llvm_unreachable("Unknown integer setcc!"); 1589 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1590 case ISD::SETNE: return getConstant(C1 != C2, VT); 1591 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1592 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1593 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1594 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1595 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1596 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1597 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1598 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1599 } 1600 } 1601 } 1602 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1603 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1604 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1605 switch (Cond) { 1606 default: break; 1607 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1608 return getUNDEF(VT); 1609 // fall through 1610 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1611 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1612 return getUNDEF(VT); 1613 // fall through 1614 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1615 R==APFloat::cmpLessThan, VT); 1616 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1617 return getUNDEF(VT); 1618 // fall through 1619 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1620 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1621 return getUNDEF(VT); 1622 // fall through 1623 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1624 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1625 return getUNDEF(VT); 1626 // fall through 1627 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1628 R==APFloat::cmpEqual, VT); 1629 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1630 return getUNDEF(VT); 1631 // fall through 1632 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1633 R==APFloat::cmpEqual, VT); 1634 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1635 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1636 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1637 R==APFloat::cmpEqual, VT); 1638 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1639 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1640 R==APFloat::cmpLessThan, VT); 1641 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1642 R==APFloat::cmpUnordered, VT); 1643 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1644 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1645 } 1646 } else { 1647 // Ensure that the constant occurs on the RHS. 1648 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1649 } 1650 } 1651 1652 // Could not fold it. 1653 return SDValue(); 1654} 1655 1656/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1657/// use this predicate to simplify operations downstream. 1658bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1659 // This predicate is not safe for vector operations. 1660 if (Op.getValueType().isVector()) 1661 return false; 1662 1663 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1664 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1665} 1666 1667/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1668/// this predicate to simplify operations downstream. Mask is known to be zero 1669/// for bits that V cannot have. 1670bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1671 unsigned Depth) const { 1672 APInt KnownZero, KnownOne; 1673 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1674 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1675 return (KnownZero & Mask) == Mask; 1676} 1677 1678/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1679/// known to be either zero or one and return them in the KnownZero/KnownOne 1680/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1681/// processing. 1682void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1683 APInt &KnownOne, unsigned Depth) const { 1684 const TargetLowering *TLI = TM.getTargetLowering(); 1685 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1686 1687 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1688 if (Depth == 6) 1689 return; // Limit search depth. 1690 1691 APInt KnownZero2, KnownOne2; 1692 1693 switch (Op.getOpcode()) { 1694 case ISD::Constant: 1695 // We know all of the bits for a constant! 1696 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1697 KnownZero = ~KnownOne; 1698 return; 1699 case ISD::AND: 1700 // If either the LHS or the RHS are Zero, the result is zero. 1701 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1702 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1704 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1705 1706 // Output known-1 bits are only known if set in both the LHS & RHS. 1707 KnownOne &= KnownOne2; 1708 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1709 KnownZero |= KnownZero2; 1710 return; 1711 case ISD::OR: 1712 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1713 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1714 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1715 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1716 1717 // Output known-0 bits are only known if clear in both the LHS & RHS. 1718 KnownZero &= KnownZero2; 1719 // Output known-1 are known to be set if set in either the LHS | RHS. 1720 KnownOne |= KnownOne2; 1721 return; 1722 case ISD::XOR: { 1723 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1724 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1725 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1726 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1727 1728 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1729 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1730 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1731 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1732 KnownZero = KnownZeroOut; 1733 return; 1734 } 1735 case ISD::MUL: { 1736 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1737 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1738 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1739 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1740 1741 // If low bits are zero in either operand, output low known-0 bits. 1742 // Also compute a conserative estimate for high known-0 bits. 1743 // More trickiness is possible, but this is sufficient for the 1744 // interesting case of alignment computation. 1745 KnownOne.clearAllBits(); 1746 unsigned TrailZ = KnownZero.countTrailingOnes() + 1747 KnownZero2.countTrailingOnes(); 1748 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1749 KnownZero2.countLeadingOnes(), 1750 BitWidth) - BitWidth; 1751 1752 TrailZ = std::min(TrailZ, BitWidth); 1753 LeadZ = std::min(LeadZ, BitWidth); 1754 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1755 APInt::getHighBitsSet(BitWidth, LeadZ); 1756 return; 1757 } 1758 case ISD::UDIV: { 1759 // For the purposes of computing leading zeros we can conservatively 1760 // treat a udiv as a logical right shift by the power of 2 known to 1761 // be less than the denominator. 1762 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1763 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1764 1765 KnownOne2.clearAllBits(); 1766 KnownZero2.clearAllBits(); 1767 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1768 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1769 if (RHSUnknownLeadingOnes != BitWidth) 1770 LeadZ = std::min(BitWidth, 1771 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1772 1773 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1774 return; 1775 } 1776 case ISD::SELECT: 1777 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1778 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1780 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1781 1782 // Only known if known in both the LHS and RHS. 1783 KnownOne &= KnownOne2; 1784 KnownZero &= KnownZero2; 1785 return; 1786 case ISD::SELECT_CC: 1787 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1788 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1789 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1790 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1791 1792 // Only known if known in both the LHS and RHS. 1793 KnownOne &= KnownOne2; 1794 KnownZero &= KnownZero2; 1795 return; 1796 case ISD::SADDO: 1797 case ISD::UADDO: 1798 case ISD::SSUBO: 1799 case ISD::USUBO: 1800 case ISD::SMULO: 1801 case ISD::UMULO: 1802 if (Op.getResNo() != 1) 1803 return; 1804 // The boolean result conforms to getBooleanContents. Fall through. 1805 case ISD::SETCC: 1806 // If we know the result of a setcc has the top bits zero, use this info. 1807 if (TLI->getBooleanContents(Op.getValueType().isVector()) == 1808 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1809 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1810 return; 1811 case ISD::SHL: 1812 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1813 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1814 unsigned ShAmt = SA->getZExtValue(); 1815 1816 // If the shift count is an invalid immediate, don't do anything. 1817 if (ShAmt >= BitWidth) 1818 return; 1819 1820 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1821 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1822 KnownZero <<= ShAmt; 1823 KnownOne <<= ShAmt; 1824 // low bits known zero. 1825 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1826 } 1827 return; 1828 case ISD::SRL: 1829 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1830 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1831 unsigned ShAmt = SA->getZExtValue(); 1832 1833 // If the shift count is an invalid immediate, don't do anything. 1834 if (ShAmt >= BitWidth) 1835 return; 1836 1837 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1838 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1839 KnownZero = KnownZero.lshr(ShAmt); 1840 KnownOne = KnownOne.lshr(ShAmt); 1841 1842 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1843 KnownZero |= HighBits; // High bits known zero. 1844 } 1845 return; 1846 case ISD::SRA: 1847 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1848 unsigned ShAmt = SA->getZExtValue(); 1849 1850 // If the shift count is an invalid immediate, don't do anything. 1851 if (ShAmt >= BitWidth) 1852 return; 1853 1854 // If any of the demanded bits are produced by the sign extension, we also 1855 // demand the input sign bit. 1856 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1857 1858 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1859 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1860 KnownZero = KnownZero.lshr(ShAmt); 1861 KnownOne = KnownOne.lshr(ShAmt); 1862 1863 // Handle the sign bits. 1864 APInt SignBit = APInt::getSignBit(BitWidth); 1865 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1866 1867 if (KnownZero.intersects(SignBit)) { 1868 KnownZero |= HighBits; // New bits are known zero. 1869 } else if (KnownOne.intersects(SignBit)) { 1870 KnownOne |= HighBits; // New bits are known one. 1871 } 1872 } 1873 return; 1874 case ISD::SIGN_EXTEND_INREG: { 1875 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1876 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1877 1878 // Sign extension. Compute the demanded bits in the result that are not 1879 // present in the input. 1880 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1881 1882 APInt InSignBit = APInt::getSignBit(EBits); 1883 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1884 1885 // If the sign extended bits are demanded, we know that the sign 1886 // bit is demanded. 1887 InSignBit = InSignBit.zext(BitWidth); 1888 if (NewBits.getBoolValue()) 1889 InputDemandedBits |= InSignBit; 1890 1891 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1892 KnownOne &= InputDemandedBits; 1893 KnownZero &= InputDemandedBits; 1894 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1895 1896 // If the sign bit of the input is known set or clear, then we know the 1897 // top bits of the result. 1898 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1899 KnownZero |= NewBits; 1900 KnownOne &= ~NewBits; 1901 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1902 KnownOne |= NewBits; 1903 KnownZero &= ~NewBits; 1904 } else { // Input sign bit unknown 1905 KnownZero &= ~NewBits; 1906 KnownOne &= ~NewBits; 1907 } 1908 return; 1909 } 1910 case ISD::CTTZ: 1911 case ISD::CTTZ_ZERO_UNDEF: 1912 case ISD::CTLZ: 1913 case ISD::CTLZ_ZERO_UNDEF: 1914 case ISD::CTPOP: { 1915 unsigned LowBits = Log2_32(BitWidth)+1; 1916 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1917 KnownOne.clearAllBits(); 1918 return; 1919 } 1920 case ISD::LOAD: { 1921 LoadSDNode *LD = cast<LoadSDNode>(Op); 1922 // If this is a ZEXTLoad and we are looking at the loaded value. 1923 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) { 1924 EVT VT = LD->getMemoryVT(); 1925 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1926 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1927 } else if (const MDNode *Ranges = LD->getRanges()) { 1928 computeMaskedBitsLoad(*Ranges, KnownZero); 1929 } 1930 return; 1931 } 1932 case ISD::ZERO_EXTEND: { 1933 EVT InVT = Op.getOperand(0).getValueType(); 1934 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1935 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1936 KnownZero = KnownZero.trunc(InBits); 1937 KnownOne = KnownOne.trunc(InBits); 1938 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1939 KnownZero = KnownZero.zext(BitWidth); 1940 KnownOne = KnownOne.zext(BitWidth); 1941 KnownZero |= NewBits; 1942 return; 1943 } 1944 case ISD::SIGN_EXTEND: { 1945 EVT InVT = Op.getOperand(0).getValueType(); 1946 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1947 APInt InSignBit = APInt::getSignBit(InBits); 1948 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1949 1950 KnownZero = KnownZero.trunc(InBits); 1951 KnownOne = KnownOne.trunc(InBits); 1952 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1953 1954 // Note if the sign bit is known to be zero or one. 1955 bool SignBitKnownZero = KnownZero.isNegative(); 1956 bool SignBitKnownOne = KnownOne.isNegative(); 1957 assert(!(SignBitKnownZero && SignBitKnownOne) && 1958 "Sign bit can't be known to be both zero and one!"); 1959 1960 KnownZero = KnownZero.zext(BitWidth); 1961 KnownOne = KnownOne.zext(BitWidth); 1962 1963 // If the sign bit is known zero or one, the top bits match. 1964 if (SignBitKnownZero) 1965 KnownZero |= NewBits; 1966 else if (SignBitKnownOne) 1967 KnownOne |= NewBits; 1968 return; 1969 } 1970 case ISD::ANY_EXTEND: { 1971 EVT InVT = Op.getOperand(0).getValueType(); 1972 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1973 KnownZero = KnownZero.trunc(InBits); 1974 KnownOne = KnownOne.trunc(InBits); 1975 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1976 KnownZero = KnownZero.zext(BitWidth); 1977 KnownOne = KnownOne.zext(BitWidth); 1978 return; 1979 } 1980 case ISD::TRUNCATE: { 1981 EVT InVT = Op.getOperand(0).getValueType(); 1982 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1983 KnownZero = KnownZero.zext(InBits); 1984 KnownOne = KnownOne.zext(InBits); 1985 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1986 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1987 KnownZero = KnownZero.trunc(BitWidth); 1988 KnownOne = KnownOne.trunc(BitWidth); 1989 break; 1990 } 1991 case ISD::AssertZext: { 1992 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1993 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1994 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1995 KnownZero |= (~InMask); 1996 KnownOne &= (~KnownZero); 1997 return; 1998 } 1999 case ISD::FGETSIGN: 2000 // All bits are zero except the low bit. 2001 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 2002 return; 2003 2004 case ISD::SUB: { 2005 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2006 // We know that the top bits of C-X are clear if X contains less bits 2007 // than C (i.e. no wrap-around can happen). For example, 20-X is 2008 // positive if we can prove that X is >= 0 and < 16. 2009 if (CLHS->getAPIntValue().isNonNegative()) { 2010 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2011 // NLZ can't be BitWidth with no sign bit 2012 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2013 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2014 2015 // If all of the MaskV bits are known to be zero, then we know the 2016 // output top bits are zero, because we now know that the output is 2017 // from [0-C]. 2018 if ((KnownZero2 & MaskV) == MaskV) { 2019 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2020 // Top bits known zero. 2021 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2022 } 2023 } 2024 } 2025 } 2026 // fall through 2027 case ISD::ADD: 2028 case ISD::ADDE: { 2029 // Output known-0 bits are known if clear or set in both the low clear bits 2030 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2031 // low 3 bits clear. 2032 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2033 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2034 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2035 2036 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2037 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2038 KnownZeroOut = std::min(KnownZeroOut, 2039 KnownZero2.countTrailingOnes()); 2040 2041 if (Op.getOpcode() == ISD::ADD) { 2042 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2043 return; 2044 } 2045 2046 // With ADDE, a carry bit may be added in, so we can only use this 2047 // information if we know (at least) that the low two bits are clear. We 2048 // then return to the caller that the low bit is unknown but that other bits 2049 // are known zero. 2050 if (KnownZeroOut >= 2) // ADDE 2051 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2052 return; 2053 } 2054 case ISD::SREM: 2055 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2056 const APInt &RA = Rem->getAPIntValue().abs(); 2057 if (RA.isPowerOf2()) { 2058 APInt LowBits = RA - 1; 2059 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2060 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2061 2062 // The low bits of the first operand are unchanged by the srem. 2063 KnownZero = KnownZero2 & LowBits; 2064 KnownOne = KnownOne2 & LowBits; 2065 2066 // If the first operand is non-negative or has all low bits zero, then 2067 // the upper bits are all zero. 2068 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2069 KnownZero |= ~LowBits; 2070 2071 // If the first operand is negative and not all low bits are zero, then 2072 // the upper bits are all one. 2073 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2074 KnownOne |= ~LowBits; 2075 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2076 } 2077 } 2078 return; 2079 case ISD::UREM: { 2080 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2081 const APInt &RA = Rem->getAPIntValue(); 2082 if (RA.isPowerOf2()) { 2083 APInt LowBits = (RA - 1); 2084 KnownZero |= ~LowBits; 2085 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2086 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2087 break; 2088 } 2089 } 2090 2091 // Since the result is less than or equal to either operand, any leading 2092 // zero bits in either operand must also exist in the result. 2093 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2094 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2095 2096 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2097 KnownZero2.countLeadingOnes()); 2098 KnownOne.clearAllBits(); 2099 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2100 return; 2101 } 2102 case ISD::FrameIndex: 2103 case ISD::TargetFrameIndex: 2104 if (unsigned Align = InferPtrAlignment(Op)) { 2105 // The low bits are known zero if the pointer is aligned. 2106 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2107 return; 2108 } 2109 break; 2110 2111 default: 2112 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2113 break; 2114 // Fallthrough 2115 case ISD::INTRINSIC_WO_CHAIN: 2116 case ISD::INTRINSIC_W_CHAIN: 2117 case ISD::INTRINSIC_VOID: 2118 // Allow the target to implement this method for its nodes. 2119 TLI->computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2120 return; 2121 } 2122} 2123 2124/// ComputeNumSignBits - Return the number of times the sign bit of the 2125/// register is replicated into the other bits. We know that at least 1 bit 2126/// is always equal to the sign bit (itself), but other cases can give us 2127/// information. For example, immediately after an "SRA X, 2", we know that 2128/// the top 3 bits are all equal to each other, so we return 3. 2129unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2130 const TargetLowering *TLI = TM.getTargetLowering(); 2131 EVT VT = Op.getValueType(); 2132 assert(VT.isInteger() && "Invalid VT!"); 2133 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2134 unsigned Tmp, Tmp2; 2135 unsigned FirstAnswer = 1; 2136 2137 if (Depth == 6) 2138 return 1; // Limit search depth. 2139 2140 switch (Op.getOpcode()) { 2141 default: break; 2142 case ISD::AssertSext: 2143 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2144 return VTBits-Tmp+1; 2145 case ISD::AssertZext: 2146 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2147 return VTBits-Tmp; 2148 2149 case ISD::Constant: { 2150 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2151 return Val.getNumSignBits(); 2152 } 2153 2154 case ISD::SIGN_EXTEND: 2155 Tmp = 2156 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2157 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2158 2159 case ISD::SIGN_EXTEND_INREG: 2160 // Max of the input and what this extends. 2161 Tmp = 2162 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2163 Tmp = VTBits-Tmp+1; 2164 2165 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2166 return std::max(Tmp, Tmp2); 2167 2168 case ISD::SRA: 2169 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2170 // SRA X, C -> adds C sign bits. 2171 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2172 Tmp += C->getZExtValue(); 2173 if (Tmp > VTBits) Tmp = VTBits; 2174 } 2175 return Tmp; 2176 case ISD::SHL: 2177 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2178 // shl destroys sign bits. 2179 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2180 if (C->getZExtValue() >= VTBits || // Bad shift. 2181 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2182 return Tmp - C->getZExtValue(); 2183 } 2184 break; 2185 case ISD::AND: 2186 case ISD::OR: 2187 case ISD::XOR: // NOT is handled here. 2188 // Logical binary ops preserve the number of sign bits at the worst. 2189 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2190 if (Tmp != 1) { 2191 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2192 FirstAnswer = std::min(Tmp, Tmp2); 2193 // We computed what we know about the sign bits as our first 2194 // answer. Now proceed to the generic code that uses 2195 // ComputeMaskedBits, and pick whichever answer is better. 2196 } 2197 break; 2198 2199 case ISD::SELECT: 2200 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2201 if (Tmp == 1) return 1; // Early out. 2202 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2203 return std::min(Tmp, Tmp2); 2204 2205 case ISD::SADDO: 2206 case ISD::UADDO: 2207 case ISD::SSUBO: 2208 case ISD::USUBO: 2209 case ISD::SMULO: 2210 case ISD::UMULO: 2211 if (Op.getResNo() != 1) 2212 break; 2213 // The boolean result conforms to getBooleanContents. Fall through. 2214 case ISD::SETCC: 2215 // If setcc returns 0/-1, all bits are sign bits. 2216 if (TLI->getBooleanContents(Op.getValueType().isVector()) == 2217 TargetLowering::ZeroOrNegativeOneBooleanContent) 2218 return VTBits; 2219 break; 2220 case ISD::ROTL: 2221 case ISD::ROTR: 2222 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2223 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2224 2225 // Handle rotate right by N like a rotate left by 32-N. 2226 if (Op.getOpcode() == ISD::ROTR) 2227 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2228 2229 // If we aren't rotating out all of the known-in sign bits, return the 2230 // number that are left. This handles rotl(sext(x), 1) for example. 2231 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2232 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2233 } 2234 break; 2235 case ISD::ADD: 2236 // Add can have at most one carry bit. Thus we know that the output 2237 // is, at worst, one more bit than the inputs. 2238 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2239 if (Tmp == 1) return 1; // Early out. 2240 2241 // Special case decrementing a value (ADD X, -1): 2242 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2243 if (CRHS->isAllOnesValue()) { 2244 APInt KnownZero, KnownOne; 2245 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2246 2247 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2248 // sign bits set. 2249 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2250 return VTBits; 2251 2252 // If we are subtracting one from a positive number, there is no carry 2253 // out of the result. 2254 if (KnownZero.isNegative()) 2255 return Tmp; 2256 } 2257 2258 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2259 if (Tmp2 == 1) return 1; 2260 return std::min(Tmp, Tmp2)-1; 2261 2262 case ISD::SUB: 2263 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2264 if (Tmp2 == 1) return 1; 2265 2266 // Handle NEG. 2267 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2268 if (CLHS->isNullValue()) { 2269 APInt KnownZero, KnownOne; 2270 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2271 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2272 // sign bits set. 2273 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2274 return VTBits; 2275 2276 // If the input is known to be positive (the sign bit is known clear), 2277 // the output of the NEG has the same number of sign bits as the input. 2278 if (KnownZero.isNegative()) 2279 return Tmp2; 2280 2281 // Otherwise, we treat this like a SUB. 2282 } 2283 2284 // Sub can have at most one carry bit. Thus we know that the output 2285 // is, at worst, one more bit than the inputs. 2286 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2287 if (Tmp == 1) return 1; // Early out. 2288 return std::min(Tmp, Tmp2)-1; 2289 case ISD::TRUNCATE: 2290 // FIXME: it's tricky to do anything useful for this, but it is an important 2291 // case for targets like X86. 2292 break; 2293 } 2294 2295 // If we are looking at the loaded value of the SDNode. 2296 if (Op.getResNo() == 0) { 2297 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2298 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2299 unsigned ExtType = LD->getExtensionType(); 2300 switch (ExtType) { 2301 default: break; 2302 case ISD::SEXTLOAD: // '17' bits known 2303 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2304 return VTBits-Tmp+1; 2305 case ISD::ZEXTLOAD: // '16' bits known 2306 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2307 return VTBits-Tmp; 2308 } 2309 } 2310 } 2311 2312 // Allow the target to implement this method for its nodes. 2313 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2314 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2315 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2316 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2317 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, Depth); 2318 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2319 } 2320 2321 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2322 // use this information. 2323 APInt KnownZero, KnownOne; 2324 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2325 2326 APInt Mask; 2327 if (KnownZero.isNegative()) { // sign bit is 0 2328 Mask = KnownZero; 2329 } else if (KnownOne.isNegative()) { // sign bit is 1; 2330 Mask = KnownOne; 2331 } else { 2332 // Nothing known. 2333 return FirstAnswer; 2334 } 2335 2336 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2337 // the number of identical bits in the top of the input value. 2338 Mask = ~Mask; 2339 Mask <<= Mask.getBitWidth()-VTBits; 2340 // Return # leading zeros. We use 'min' here in case Val was zero before 2341 // shifting. We don't want to return '64' as for an i32 "0". 2342 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2343} 2344 2345/// isBaseWithConstantOffset - Return true if the specified operand is an 2346/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2347/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2348/// semantics as an ADD. This handles the equivalence: 2349/// X|Cst == X+Cst iff X&Cst = 0. 2350bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2351 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2352 !isa<ConstantSDNode>(Op.getOperand(1))) 2353 return false; 2354 2355 if (Op.getOpcode() == ISD::OR && 2356 !MaskedValueIsZero(Op.getOperand(0), 2357 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2358 return false; 2359 2360 return true; 2361} 2362 2363 2364bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2365 // If we're told that NaNs won't happen, assume they won't. 2366 if (getTarget().Options.NoNaNsFPMath) 2367 return true; 2368 2369 // If the value is a constant, we can obviously see if it is a NaN or not. 2370 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2371 return !C->getValueAPF().isNaN(); 2372 2373 // TODO: Recognize more cases here. 2374 2375 return false; 2376} 2377 2378bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2379 // If the value is a constant, we can obviously see if it is a zero or not. 2380 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2381 return !C->isZero(); 2382 2383 // TODO: Recognize more cases here. 2384 switch (Op.getOpcode()) { 2385 default: break; 2386 case ISD::OR: 2387 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2388 return !C->isNullValue(); 2389 break; 2390 } 2391 2392 return false; 2393} 2394 2395bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2396 // Check the obvious case. 2397 if (A == B) return true; 2398 2399 // For for negative and positive zero. 2400 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2401 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2402 if (CA->isZero() && CB->isZero()) return true; 2403 2404 // Otherwise they may not be equal. 2405 return false; 2406} 2407 2408/// getNode - Gets or creates the specified node. 2409/// 2410SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) { 2411 FoldingSetNodeID ID; 2412 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2413 void *IP = 0; 2414 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2415 return SDValue(E, 0); 2416 2417 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), 2418 DL.getDebugLoc(), getVTList(VT)); 2419 CSEMap.InsertNode(N, IP); 2420 2421 AllNodes.push_back(N); 2422#ifndef NDEBUG 2423 VerifySDNode(N); 2424#endif 2425 return SDValue(N, 0); 2426} 2427 2428SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 2429 EVT VT, SDValue Operand) { 2430 // Constant fold unary operations with an integer constant operand. 2431 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2432 const APInt &Val = C->getAPIntValue(); 2433 switch (Opcode) { 2434 default: break; 2435 case ISD::SIGN_EXTEND: 2436 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2437 case ISD::ANY_EXTEND: 2438 case ISD::ZERO_EXTEND: 2439 case ISD::TRUNCATE: 2440 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2441 case ISD::UINT_TO_FP: 2442 case ISD::SINT_TO_FP: { 2443 APFloat apf(EVTToAPFloatSemantics(VT), 2444 APInt::getNullValue(VT.getSizeInBits())); 2445 (void)apf.convertFromAPInt(Val, 2446 Opcode==ISD::SINT_TO_FP, 2447 APFloat::rmNearestTiesToEven); 2448 return getConstantFP(apf, VT); 2449 } 2450 case ISD::BITCAST: 2451 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2452 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT); 2453 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2454 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT); 2455 break; 2456 case ISD::BSWAP: 2457 return getConstant(Val.byteSwap(), VT); 2458 case ISD::CTPOP: 2459 return getConstant(Val.countPopulation(), VT); 2460 case ISD::CTLZ: 2461 case ISD::CTLZ_ZERO_UNDEF: 2462 return getConstant(Val.countLeadingZeros(), VT); 2463 case ISD::CTTZ: 2464 case ISD::CTTZ_ZERO_UNDEF: 2465 return getConstant(Val.countTrailingZeros(), VT); 2466 } 2467 } 2468 2469 // Constant fold unary operations with a floating point constant operand. 2470 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2471 APFloat V = C->getValueAPF(); // make copy 2472 switch (Opcode) { 2473 case ISD::FNEG: 2474 V.changeSign(); 2475 return getConstantFP(V, VT); 2476 case ISD::FABS: 2477 V.clearSign(); 2478 return getConstantFP(V, VT); 2479 case ISD::FCEIL: { 2480 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2481 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2482 return getConstantFP(V, VT); 2483 break; 2484 } 2485 case ISD::FTRUNC: { 2486 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2487 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2488 return getConstantFP(V, VT); 2489 break; 2490 } 2491 case ISD::FFLOOR: { 2492 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2493 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2494 return getConstantFP(V, VT); 2495 break; 2496 } 2497 case ISD::FP_EXTEND: { 2498 bool ignored; 2499 // This can return overflow, underflow, or inexact; we don't care. 2500 // FIXME need to be more flexible about rounding mode. 2501 (void)V.convert(EVTToAPFloatSemantics(VT), 2502 APFloat::rmNearestTiesToEven, &ignored); 2503 return getConstantFP(V, VT); 2504 } 2505 case ISD::FP_TO_SINT: 2506 case ISD::FP_TO_UINT: { 2507 integerPart x[2]; 2508 bool ignored; 2509 assert(integerPartWidth >= 64); 2510 // FIXME need to be more flexible about rounding mode. 2511 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2512 Opcode==ISD::FP_TO_SINT, 2513 APFloat::rmTowardZero, &ignored); 2514 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2515 break; 2516 APInt api(VT.getSizeInBits(), x); 2517 return getConstant(api, VT); 2518 } 2519 case ISD::BITCAST: 2520 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2521 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2522 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2523 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2524 break; 2525 } 2526 } 2527 2528 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2529 switch (Opcode) { 2530 case ISD::TokenFactor: 2531 case ISD::MERGE_VALUES: 2532 case ISD::CONCAT_VECTORS: 2533 return Operand; // Factor, merge or concat of one node? No need. 2534 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2535 case ISD::FP_EXTEND: 2536 assert(VT.isFloatingPoint() && 2537 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2538 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2539 assert((!VT.isVector() || 2540 VT.getVectorNumElements() == 2541 Operand.getValueType().getVectorNumElements()) && 2542 "Vector element count mismatch!"); 2543 if (Operand.getOpcode() == ISD::UNDEF) 2544 return getUNDEF(VT); 2545 break; 2546 case ISD::SIGN_EXTEND: 2547 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2548 "Invalid SIGN_EXTEND!"); 2549 if (Operand.getValueType() == VT) return Operand; // noop extension 2550 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2551 "Invalid sext node, dst < src!"); 2552 assert((!VT.isVector() || 2553 VT.getVectorNumElements() == 2554 Operand.getValueType().getVectorNumElements()) && 2555 "Vector element count mismatch!"); 2556 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2557 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2558 else if (OpOpcode == ISD::UNDEF) 2559 // sext(undef) = 0, because the top bits will all be the same. 2560 return getConstant(0, VT); 2561 break; 2562 case ISD::ZERO_EXTEND: 2563 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2564 "Invalid ZERO_EXTEND!"); 2565 if (Operand.getValueType() == VT) return Operand; // noop extension 2566 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2567 "Invalid zext node, dst < src!"); 2568 assert((!VT.isVector() || 2569 VT.getVectorNumElements() == 2570 Operand.getValueType().getVectorNumElements()) && 2571 "Vector element count mismatch!"); 2572 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2573 return getNode(ISD::ZERO_EXTEND, DL, VT, 2574 Operand.getNode()->getOperand(0)); 2575 else if (OpOpcode == ISD::UNDEF) 2576 // zext(undef) = 0, because the top bits will be zero. 2577 return getConstant(0, VT); 2578 break; 2579 case ISD::ANY_EXTEND: 2580 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2581 "Invalid ANY_EXTEND!"); 2582 if (Operand.getValueType() == VT) return Operand; // noop extension 2583 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2584 "Invalid anyext node, dst < src!"); 2585 assert((!VT.isVector() || 2586 VT.getVectorNumElements() == 2587 Operand.getValueType().getVectorNumElements()) && 2588 "Vector element count mismatch!"); 2589 2590 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2591 OpOpcode == ISD::ANY_EXTEND) 2592 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2593 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2594 else if (OpOpcode == ISD::UNDEF) 2595 return getUNDEF(VT); 2596 2597 // (ext (trunx x)) -> x 2598 if (OpOpcode == ISD::TRUNCATE) { 2599 SDValue OpOp = Operand.getNode()->getOperand(0); 2600 if (OpOp.getValueType() == VT) 2601 return OpOp; 2602 } 2603 break; 2604 case ISD::TRUNCATE: 2605 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2606 "Invalid TRUNCATE!"); 2607 if (Operand.getValueType() == VT) return Operand; // noop truncate 2608 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2609 "Invalid truncate node, src < dst!"); 2610 assert((!VT.isVector() || 2611 VT.getVectorNumElements() == 2612 Operand.getValueType().getVectorNumElements()) && 2613 "Vector element count mismatch!"); 2614 if (OpOpcode == ISD::TRUNCATE) 2615 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2616 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2617 OpOpcode == ISD::ANY_EXTEND) { 2618 // If the source is smaller than the dest, we still need an extend. 2619 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2620 .bitsLT(VT.getScalarType())) 2621 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2622 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2623 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2624 return Operand.getNode()->getOperand(0); 2625 } 2626 if (OpOpcode == ISD::UNDEF) 2627 return getUNDEF(VT); 2628 break; 2629 case ISD::BITCAST: 2630 // Basic sanity checking. 2631 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2632 && "Cannot BITCAST between types of different sizes!"); 2633 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2634 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2635 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2636 if (OpOpcode == ISD::UNDEF) 2637 return getUNDEF(VT); 2638 break; 2639 case ISD::SCALAR_TO_VECTOR: 2640 assert(VT.isVector() && !Operand.getValueType().isVector() && 2641 (VT.getVectorElementType() == Operand.getValueType() || 2642 (VT.getVectorElementType().isInteger() && 2643 Operand.getValueType().isInteger() && 2644 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2645 "Illegal SCALAR_TO_VECTOR node!"); 2646 if (OpOpcode == ISD::UNDEF) 2647 return getUNDEF(VT); 2648 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2649 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2650 isa<ConstantSDNode>(Operand.getOperand(1)) && 2651 Operand.getConstantOperandVal(1) == 0 && 2652 Operand.getOperand(0).getValueType() == VT) 2653 return Operand.getOperand(0); 2654 break; 2655 case ISD::FNEG: 2656 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2657 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2658 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2659 Operand.getNode()->getOperand(0)); 2660 if (OpOpcode == ISD::FNEG) // --X -> X 2661 return Operand.getNode()->getOperand(0); 2662 break; 2663 case ISD::FABS: 2664 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2665 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2666 break; 2667 } 2668 2669 SDNode *N; 2670 SDVTList VTs = getVTList(VT); 2671 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2672 FoldingSetNodeID ID; 2673 SDValue Ops[1] = { Operand }; 2674 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2675 void *IP = 0; 2676 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2677 return SDValue(E, 0); 2678 2679 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 2680 DL.getDebugLoc(), VTs, Operand); 2681 CSEMap.InsertNode(N, IP); 2682 } else { 2683 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 2684 DL.getDebugLoc(), VTs, Operand); 2685 } 2686 2687 AllNodes.push_back(N); 2688#ifndef NDEBUG 2689 VerifySDNode(N); 2690#endif 2691 return SDValue(N, 0); 2692} 2693 2694SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT, 2695 SDNode *Cst1, SDNode *Cst2) { 2696 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs; 2697 SmallVector<SDValue, 4> Outputs; 2698 EVT SVT = VT.getScalarType(); 2699 2700 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1); 2701 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2); 2702 if (Scalar1 && Scalar2) { 2703 // Scalar instruction. 2704 Inputs.push_back(std::make_pair(Scalar1, Scalar2)); 2705 } else { 2706 // For vectors extract each constant element into Inputs so we can constant 2707 // fold them individually. 2708 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1); 2709 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2); 2710 if (!BV1 || !BV2) 2711 return SDValue(); 2712 2713 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!"); 2714 2715 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) { 2716 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I)); 2717 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I)); 2718 if (!V1 || !V2) // Not a constant, bail. 2719 return SDValue(); 2720 2721 // Avoid BUILD_VECTOR nodes that perform implicit truncation. 2722 // FIXME: This is valid and could be handled by truncating the APInts. 2723 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT) 2724 return SDValue(); 2725 2726 Inputs.push_back(std::make_pair(V1, V2)); 2727 } 2728 } 2729 2730 // We have a number of constant values, constant fold them element by element. 2731 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) { 2732 const APInt &C1 = Inputs[I].first->getAPIntValue(); 2733 const APInt &C2 = Inputs[I].second->getAPIntValue(); 2734 2735 switch (Opcode) { 2736 case ISD::ADD: 2737 Outputs.push_back(getConstant(C1 + C2, SVT)); 2738 break; 2739 case ISD::SUB: 2740 Outputs.push_back(getConstant(C1 - C2, SVT)); 2741 break; 2742 case ISD::MUL: 2743 Outputs.push_back(getConstant(C1 * C2, SVT)); 2744 break; 2745 case ISD::UDIV: 2746 if (!C2.getBoolValue()) 2747 return SDValue(); 2748 Outputs.push_back(getConstant(C1.udiv(C2), SVT)); 2749 break; 2750 case ISD::UREM: 2751 if (!C2.getBoolValue()) 2752 return SDValue(); 2753 Outputs.push_back(getConstant(C1.urem(C2), SVT)); 2754 break; 2755 case ISD::SDIV: 2756 if (!C2.getBoolValue()) 2757 return SDValue(); 2758 Outputs.push_back(getConstant(C1.sdiv(C2), SVT)); 2759 break; 2760 case ISD::SREM: 2761 if (!C2.getBoolValue()) 2762 return SDValue(); 2763 Outputs.push_back(getConstant(C1.srem(C2), SVT)); 2764 break; 2765 case ISD::AND: 2766 Outputs.push_back(getConstant(C1 & C2, SVT)); 2767 break; 2768 case ISD::OR: 2769 Outputs.push_back(getConstant(C1 | C2, SVT)); 2770 break; 2771 case ISD::XOR: 2772 Outputs.push_back(getConstant(C1 ^ C2, SVT)); 2773 break; 2774 case ISD::SHL: 2775 Outputs.push_back(getConstant(C1 << C2, SVT)); 2776 break; 2777 case ISD::SRL: 2778 Outputs.push_back(getConstant(C1.lshr(C2), SVT)); 2779 break; 2780 case ISD::SRA: 2781 Outputs.push_back(getConstant(C1.ashr(C2), SVT)); 2782 break; 2783 case ISD::ROTL: 2784 Outputs.push_back(getConstant(C1.rotl(C2), SVT)); 2785 break; 2786 case ISD::ROTR: 2787 Outputs.push_back(getConstant(C1.rotr(C2), SVT)); 2788 break; 2789 default: 2790 return SDValue(); 2791 } 2792 } 2793 2794 // Handle the scalar case first. 2795 if (Scalar1 && Scalar2) 2796 return Outputs.back(); 2797 2798 // Otherwise build a big vector out of the scalar elements we generated. 2799 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs.data(), 2800 Outputs.size()); 2801} 2802 2803SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, 2804 SDValue N2) { 2805 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2806 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2807 switch (Opcode) { 2808 default: break; 2809 case ISD::TokenFactor: 2810 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2811 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2812 // Fold trivial token factors. 2813 if (N1.getOpcode() == ISD::EntryToken) return N2; 2814 if (N2.getOpcode() == ISD::EntryToken) return N1; 2815 if (N1 == N2) return N1; 2816 break; 2817 case ISD::CONCAT_VECTORS: 2818 // Concat of UNDEFs is UNDEF. 2819 if (N1.getOpcode() == ISD::UNDEF && 2820 N2.getOpcode() == ISD::UNDEF) 2821 return getUNDEF(VT); 2822 2823 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2824 // one big BUILD_VECTOR. 2825 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2826 N2.getOpcode() == ISD::BUILD_VECTOR) { 2827 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2828 N1.getNode()->op_end()); 2829 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2830 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2831 } 2832 break; 2833 case ISD::AND: 2834 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2835 assert(N1.getValueType() == N2.getValueType() && 2836 N1.getValueType() == VT && "Binary operator types must match!"); 2837 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2838 // worth handling here. 2839 if (N2C && N2C->isNullValue()) 2840 return N2; 2841 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2842 return N1; 2843 break; 2844 case ISD::OR: 2845 case ISD::XOR: 2846 case ISD::ADD: 2847 case ISD::SUB: 2848 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2849 assert(N1.getValueType() == N2.getValueType() && 2850 N1.getValueType() == VT && "Binary operator types must match!"); 2851 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2852 // it's worth handling here. 2853 if (N2C && N2C->isNullValue()) 2854 return N1; 2855 break; 2856 case ISD::UDIV: 2857 case ISD::UREM: 2858 case ISD::MULHU: 2859 case ISD::MULHS: 2860 case ISD::MUL: 2861 case ISD::SDIV: 2862 case ISD::SREM: 2863 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2864 assert(N1.getValueType() == N2.getValueType() && 2865 N1.getValueType() == VT && "Binary operator types must match!"); 2866 break; 2867 case ISD::FADD: 2868 case ISD::FSUB: 2869 case ISD::FMUL: 2870 case ISD::FDIV: 2871 case ISD::FREM: 2872 if (getTarget().Options.UnsafeFPMath) { 2873 if (Opcode == ISD::FADD) { 2874 // 0+x --> x 2875 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2876 if (CFP->getValueAPF().isZero()) 2877 return N2; 2878 // x+0 --> x 2879 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2880 if (CFP->getValueAPF().isZero()) 2881 return N1; 2882 } else if (Opcode == ISD::FSUB) { 2883 // x-0 --> x 2884 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2885 if (CFP->getValueAPF().isZero()) 2886 return N1; 2887 } else if (Opcode == ISD::FMUL) { 2888 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1); 2889 SDValue V = N2; 2890 2891 // If the first operand isn't the constant, try the second 2892 if (!CFP) { 2893 CFP = dyn_cast<ConstantFPSDNode>(N2); 2894 V = N1; 2895 } 2896 2897 if (CFP) { 2898 // 0*x --> 0 2899 if (CFP->isZero()) 2900 return SDValue(CFP,0); 2901 // 1*x --> x 2902 if (CFP->isExactlyValue(1.0)) 2903 return V; 2904 } 2905 } 2906 } 2907 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2908 assert(N1.getValueType() == N2.getValueType() && 2909 N1.getValueType() == VT && "Binary operator types must match!"); 2910 break; 2911 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2912 assert(N1.getValueType() == VT && 2913 N1.getValueType().isFloatingPoint() && 2914 N2.getValueType().isFloatingPoint() && 2915 "Invalid FCOPYSIGN!"); 2916 break; 2917 case ISD::SHL: 2918 case ISD::SRA: 2919 case ISD::SRL: 2920 case ISD::ROTL: 2921 case ISD::ROTR: 2922 assert(VT == N1.getValueType() && 2923 "Shift operators return type must be the same as their first arg"); 2924 assert(VT.isInteger() && N2.getValueType().isInteger() && 2925 "Shifts only work on integers"); 2926 assert((!VT.isVector() || VT == N2.getValueType()) && 2927 "Vector shift amounts must be in the same as their first arg"); 2928 // Verify that the shift amount VT is bit enough to hold valid shift 2929 // amounts. This catches things like trying to shift an i1024 value by an 2930 // i8, which is easy to fall into in generic code that uses 2931 // TLI.getShiftAmount(). 2932 assert(N2.getValueType().getSizeInBits() >= 2933 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2934 "Invalid use of small shift amount with oversized value!"); 2935 2936 // Always fold shifts of i1 values so the code generator doesn't need to 2937 // handle them. Since we know the size of the shift has to be less than the 2938 // size of the value, the shift/rotate count is guaranteed to be zero. 2939 if (VT == MVT::i1) 2940 return N1; 2941 if (N2C && N2C->isNullValue()) 2942 return N1; 2943 break; 2944 case ISD::FP_ROUND_INREG: { 2945 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2946 assert(VT == N1.getValueType() && "Not an inreg round!"); 2947 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2948 "Cannot FP_ROUND_INREG integer types"); 2949 assert(EVT.isVector() == VT.isVector() && 2950 "FP_ROUND_INREG type should be vector iff the operand " 2951 "type is vector!"); 2952 assert((!EVT.isVector() || 2953 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2954 "Vector element counts must match in FP_ROUND_INREG"); 2955 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2956 (void)EVT; 2957 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2958 break; 2959 } 2960 case ISD::FP_ROUND: 2961 assert(VT.isFloatingPoint() && 2962 N1.getValueType().isFloatingPoint() && 2963 VT.bitsLE(N1.getValueType()) && 2964 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2965 if (N1.getValueType() == VT) return N1; // noop conversion. 2966 break; 2967 case ISD::AssertSext: 2968 case ISD::AssertZext: { 2969 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2970 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2971 assert(VT.isInteger() && EVT.isInteger() && 2972 "Cannot *_EXTEND_INREG FP types"); 2973 assert(!EVT.isVector() && 2974 "AssertSExt/AssertZExt type should be the vector element type " 2975 "rather than the vector type!"); 2976 assert(EVT.bitsLE(VT) && "Not extending!"); 2977 if (VT == EVT) return N1; // noop assertion. 2978 break; 2979 } 2980 case ISD::SIGN_EXTEND_INREG: { 2981 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2982 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2983 assert(VT.isInteger() && EVT.isInteger() && 2984 "Cannot *_EXTEND_INREG FP types"); 2985 assert(EVT.isVector() == VT.isVector() && 2986 "SIGN_EXTEND_INREG type should be vector iff the operand " 2987 "type is vector!"); 2988 assert((!EVT.isVector() || 2989 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2990 "Vector element counts must match in SIGN_EXTEND_INREG"); 2991 assert(EVT.bitsLE(VT) && "Not extending!"); 2992 if (EVT == VT) return N1; // Not actually extending 2993 2994 if (N1C) { 2995 APInt Val = N1C->getAPIntValue(); 2996 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2997 Val <<= Val.getBitWidth()-FromBits; 2998 Val = Val.ashr(Val.getBitWidth()-FromBits); 2999 return getConstant(Val, VT); 3000 } 3001 break; 3002 } 3003 case ISD::EXTRACT_VECTOR_ELT: 3004 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 3005 if (N1.getOpcode() == ISD::UNDEF) 3006 return getUNDEF(VT); 3007 3008 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 3009 // expanding copies of large vectors from registers. 3010 if (N2C && 3011 N1.getOpcode() == ISD::CONCAT_VECTORS && 3012 N1.getNumOperands() > 0) { 3013 unsigned Factor = 3014 N1.getOperand(0).getValueType().getVectorNumElements(); 3015 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 3016 N1.getOperand(N2C->getZExtValue() / Factor), 3017 getConstant(N2C->getZExtValue() % Factor, 3018 N2.getValueType())); 3019 } 3020 3021 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 3022 // expanding large vector constants. 3023 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 3024 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 3025 3026 if (VT != Elt.getValueType()) 3027 // If the vector element type is not legal, the BUILD_VECTOR operands 3028 // are promoted and implicitly truncated, and the result implicitly 3029 // extended. Make that explicit here. 3030 Elt = getAnyExtOrTrunc(Elt, DL, VT); 3031 3032 return Elt; 3033 } 3034 3035 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 3036 // operations are lowered to scalars. 3037 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 3038 // If the indices are the same, return the inserted element else 3039 // if the indices are known different, extract the element from 3040 // the original vector. 3041 SDValue N1Op2 = N1.getOperand(2); 3042 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 3043 3044 if (N1Op2C && N2C) { 3045 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 3046 if (VT == N1.getOperand(1).getValueType()) 3047 return N1.getOperand(1); 3048 else 3049 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 3050 } 3051 3052 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 3053 } 3054 } 3055 break; 3056 case ISD::EXTRACT_ELEMENT: 3057 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 3058 assert(!N1.getValueType().isVector() && !VT.isVector() && 3059 (N1.getValueType().isInteger() == VT.isInteger()) && 3060 N1.getValueType() != VT && 3061 "Wrong types for EXTRACT_ELEMENT!"); 3062 3063 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 3064 // 64-bit integers into 32-bit parts. Instead of building the extract of 3065 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 3066 if (N1.getOpcode() == ISD::BUILD_PAIR) 3067 return N1.getOperand(N2C->getZExtValue()); 3068 3069 // EXTRACT_ELEMENT of a constant int is also very common. 3070 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 3071 unsigned ElementSize = VT.getSizeInBits(); 3072 unsigned Shift = ElementSize * N2C->getZExtValue(); 3073 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 3074 return getConstant(ShiftedVal.trunc(ElementSize), VT); 3075 } 3076 break; 3077 case ISD::EXTRACT_SUBVECTOR: { 3078 SDValue Index = N2; 3079 if (VT.isSimple() && N1.getValueType().isSimple()) { 3080 assert(VT.isVector() && N1.getValueType().isVector() && 3081 "Extract subvector VTs must be a vectors!"); 3082 assert(VT.getVectorElementType() == 3083 N1.getValueType().getVectorElementType() && 3084 "Extract subvector VTs must have the same element type!"); 3085 assert(VT.getSimpleVT() <= N1.getSimpleValueType() && 3086 "Extract subvector must be from larger vector to smaller vector!"); 3087 3088 if (isa<ConstantSDNode>(Index.getNode())) { 3089 assert((VT.getVectorNumElements() + 3090 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3091 <= N1.getValueType().getVectorNumElements()) 3092 && "Extract subvector overflow!"); 3093 } 3094 3095 // Trivial extraction. 3096 if (VT.getSimpleVT() == N1.getSimpleValueType()) 3097 return N1; 3098 } 3099 break; 3100 } 3101 } 3102 3103 // Perform trivial constant folding. 3104 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()); 3105 if (SV.getNode()) return SV; 3106 3107 // Canonicalize constant to RHS if commutative. 3108 if (N1C && !N2C && isCommutativeBinOp(Opcode)) { 3109 std::swap(N1C, N2C); 3110 std::swap(N1, N2); 3111 } 3112 3113 // Constant fold FP operations. 3114 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3115 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3116 if (N1CFP) { 3117 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3118 // Canonicalize constant to RHS if commutative. 3119 std::swap(N1CFP, N2CFP); 3120 std::swap(N1, N2); 3121 } else if (N2CFP) { 3122 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3123 APFloat::opStatus s; 3124 switch (Opcode) { 3125 case ISD::FADD: 3126 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3127 if (s != APFloat::opInvalidOp) 3128 return getConstantFP(V1, VT); 3129 break; 3130 case ISD::FSUB: 3131 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3132 if (s!=APFloat::opInvalidOp) 3133 return getConstantFP(V1, VT); 3134 break; 3135 case ISD::FMUL: 3136 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3137 if (s!=APFloat::opInvalidOp) 3138 return getConstantFP(V1, VT); 3139 break; 3140 case ISD::FDIV: 3141 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3142 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3143 return getConstantFP(V1, VT); 3144 break; 3145 case ISD::FREM : 3146 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3147 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3148 return getConstantFP(V1, VT); 3149 break; 3150 case ISD::FCOPYSIGN: 3151 V1.copySign(V2); 3152 return getConstantFP(V1, VT); 3153 default: break; 3154 } 3155 } 3156 3157 if (Opcode == ISD::FP_ROUND) { 3158 APFloat V = N1CFP->getValueAPF(); // make copy 3159 bool ignored; 3160 // This can return overflow, underflow, or inexact; we don't care. 3161 // FIXME need to be more flexible about rounding mode. 3162 (void)V.convert(EVTToAPFloatSemantics(VT), 3163 APFloat::rmNearestTiesToEven, &ignored); 3164 return getConstantFP(V, VT); 3165 } 3166 } 3167 3168 // Canonicalize an UNDEF to the RHS, even over a constant. 3169 if (N1.getOpcode() == ISD::UNDEF) { 3170 if (isCommutativeBinOp(Opcode)) { 3171 std::swap(N1, N2); 3172 } else { 3173 switch (Opcode) { 3174 case ISD::FP_ROUND_INREG: 3175 case ISD::SIGN_EXTEND_INREG: 3176 case ISD::SUB: 3177 case ISD::FSUB: 3178 case ISD::FDIV: 3179 case ISD::FREM: 3180 case ISD::SRA: 3181 return N1; // fold op(undef, arg2) -> undef 3182 case ISD::UDIV: 3183 case ISD::SDIV: 3184 case ISD::UREM: 3185 case ISD::SREM: 3186 case ISD::SRL: 3187 case ISD::SHL: 3188 if (!VT.isVector()) 3189 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3190 // For vectors, we can't easily build an all zero vector, just return 3191 // the LHS. 3192 return N2; 3193 } 3194 } 3195 } 3196 3197 // Fold a bunch of operators when the RHS is undef. 3198 if (N2.getOpcode() == ISD::UNDEF) { 3199 switch (Opcode) { 3200 case ISD::XOR: 3201 if (N1.getOpcode() == ISD::UNDEF) 3202 // Handle undef ^ undef -> 0 special case. This is a common 3203 // idiom (misuse). 3204 return getConstant(0, VT); 3205 // fallthrough 3206 case ISD::ADD: 3207 case ISD::ADDC: 3208 case ISD::ADDE: 3209 case ISD::SUB: 3210 case ISD::UDIV: 3211 case ISD::SDIV: 3212 case ISD::UREM: 3213 case ISD::SREM: 3214 return N2; // fold op(arg1, undef) -> undef 3215 case ISD::FADD: 3216 case ISD::FSUB: 3217 case ISD::FMUL: 3218 case ISD::FDIV: 3219 case ISD::FREM: 3220 if (getTarget().Options.UnsafeFPMath) 3221 return N2; 3222 break; 3223 case ISD::MUL: 3224 case ISD::AND: 3225 case ISD::SRL: 3226 case ISD::SHL: 3227 if (!VT.isVector()) 3228 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3229 // For vectors, we can't easily build an all zero vector, just return 3230 // the LHS. 3231 return N1; 3232 case ISD::OR: 3233 if (!VT.isVector()) 3234 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3235 // For vectors, we can't easily build an all one vector, just return 3236 // the LHS. 3237 return N1; 3238 case ISD::SRA: 3239 return N1; 3240 } 3241 } 3242 3243 // Memoize this node if possible. 3244 SDNode *N; 3245 SDVTList VTs = getVTList(VT); 3246 if (VT != MVT::Glue) { 3247 SDValue Ops[] = { N1, N2 }; 3248 FoldingSetNodeID ID; 3249 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3250 void *IP = 0; 3251 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3252 return SDValue(E, 0); 3253 3254 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 3255 DL.getDebugLoc(), VTs, N1, N2); 3256 CSEMap.InsertNode(N, IP); 3257 } else { 3258 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 3259 DL.getDebugLoc(), VTs, N1, N2); 3260 } 3261 3262 AllNodes.push_back(N); 3263#ifndef NDEBUG 3264 VerifySDNode(N); 3265#endif 3266 return SDValue(N, 0); 3267} 3268 3269SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3270 SDValue N1, SDValue N2, SDValue N3) { 3271 // Perform various simplifications. 3272 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3273 switch (Opcode) { 3274 case ISD::FMA: { 3275 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1); 3276 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2); 3277 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3); 3278 if (N1CFP && N2CFP && N3CFP) { 3279 APFloat V1 = N1CFP->getValueAPF(); 3280 const APFloat &V2 = N2CFP->getValueAPF(); 3281 const APFloat &V3 = N3CFP->getValueAPF(); 3282 APFloat::opStatus s = 3283 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven); 3284 if (s != APFloat::opInvalidOp) 3285 return getConstantFP(V1, VT); 3286 } 3287 break; 3288 } 3289 case ISD::CONCAT_VECTORS: 3290 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3291 // one big BUILD_VECTOR. 3292 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3293 N2.getOpcode() == ISD::BUILD_VECTOR && 3294 N3.getOpcode() == ISD::BUILD_VECTOR) { 3295 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3296 N1.getNode()->op_end()); 3297 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3298 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3299 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3300 } 3301 break; 3302 case ISD::SETCC: { 3303 // Use FoldSetCC to simplify SETCC's. 3304 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3305 if (Simp.getNode()) return Simp; 3306 break; 3307 } 3308 case ISD::SELECT: 3309 if (N1C) { 3310 if (N1C->getZExtValue()) 3311 return N2; // select true, X, Y -> X 3312 return N3; // select false, X, Y -> Y 3313 } 3314 3315 if (N2 == N3) return N2; // select C, X, X -> X 3316 break; 3317 case ISD::VECTOR_SHUFFLE: 3318 llvm_unreachable("should use getVectorShuffle constructor!"); 3319 case ISD::INSERT_SUBVECTOR: { 3320 SDValue Index = N3; 3321 if (VT.isSimple() && N1.getValueType().isSimple() 3322 && N2.getValueType().isSimple()) { 3323 assert(VT.isVector() && N1.getValueType().isVector() && 3324 N2.getValueType().isVector() && 3325 "Insert subvector VTs must be a vectors"); 3326 assert(VT == N1.getValueType() && 3327 "Dest and insert subvector source types must match!"); 3328 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() && 3329 "Insert subvector must be from smaller vector to larger vector!"); 3330 if (isa<ConstantSDNode>(Index.getNode())) { 3331 assert((N2.getValueType().getVectorNumElements() + 3332 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3333 <= VT.getVectorNumElements()) 3334 && "Insert subvector overflow!"); 3335 } 3336 3337 // Trivial insertion. 3338 if (VT.getSimpleVT() == N2.getSimpleValueType()) 3339 return N2; 3340 } 3341 break; 3342 } 3343 case ISD::BITCAST: 3344 // Fold bit_convert nodes from a type to themselves. 3345 if (N1.getValueType() == VT) 3346 return N1; 3347 break; 3348 } 3349 3350 // Memoize node if it doesn't produce a flag. 3351 SDNode *N; 3352 SDVTList VTs = getVTList(VT); 3353 if (VT != MVT::Glue) { 3354 SDValue Ops[] = { N1, N2, N3 }; 3355 FoldingSetNodeID ID; 3356 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3357 void *IP = 0; 3358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3359 return SDValue(E, 0); 3360 3361 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 3362 DL.getDebugLoc(), VTs, N1, N2, N3); 3363 CSEMap.InsertNode(N, IP); 3364 } else { 3365 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 3366 DL.getDebugLoc(), VTs, N1, N2, N3); 3367 } 3368 3369 AllNodes.push_back(N); 3370#ifndef NDEBUG 3371 VerifySDNode(N); 3372#endif 3373 return SDValue(N, 0); 3374} 3375 3376SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3377 SDValue N1, SDValue N2, SDValue N3, 3378 SDValue N4) { 3379 SDValue Ops[] = { N1, N2, N3, N4 }; 3380 return getNode(Opcode, DL, VT, Ops, 4); 3381} 3382 3383SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3384 SDValue N1, SDValue N2, SDValue N3, 3385 SDValue N4, SDValue N5) { 3386 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3387 return getNode(Opcode, DL, VT, Ops, 5); 3388} 3389 3390/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3391/// the incoming stack arguments to be loaded from the stack. 3392SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3393 SmallVector<SDValue, 8> ArgChains; 3394 3395 // Include the original chain at the beginning of the list. When this is 3396 // used by target LowerCall hooks, this helps legalize find the 3397 // CALLSEQ_BEGIN node. 3398 ArgChains.push_back(Chain); 3399 3400 // Add a chain value for each stack argument. 3401 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3402 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3403 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3404 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3405 if (FI->getIndex() < 0) 3406 ArgChains.push_back(SDValue(L, 1)); 3407 3408 // Build a tokenfactor for all the chains. 3409 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, 3410 &ArgChains[0], ArgChains.size()); 3411} 3412 3413/// getMemsetValue - Vectorized representation of the memset value 3414/// operand. 3415static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3416 SDLoc dl) { 3417 assert(Value.getOpcode() != ISD::UNDEF); 3418 3419 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3420 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3421 assert(C->getAPIntValue().getBitWidth() == 8); 3422 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue()); 3423 if (VT.isInteger()) 3424 return DAG.getConstant(Val, VT); 3425 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT); 3426 } 3427 3428 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3429 if (NumBits > 8) { 3430 // Use a multiplication with 0x010101... to extend the input to the 3431 // required length. 3432 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01)); 3433 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3434 } 3435 3436 return Value; 3437} 3438 3439/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3440/// used when a memcpy is turned into a memset when the source is a constant 3441/// string ptr. 3442static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG, 3443 const TargetLowering &TLI, StringRef Str) { 3444 // Handle vector with all elements zero. 3445 if (Str.empty()) { 3446 if (VT.isInteger()) 3447 return DAG.getConstant(0, VT); 3448 else if (VT == MVT::f32 || VT == MVT::f64) 3449 return DAG.getConstantFP(0.0, VT); 3450 else if (VT.isVector()) { 3451 unsigned NumElts = VT.getVectorNumElements(); 3452 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3453 return DAG.getNode(ISD::BITCAST, dl, VT, 3454 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3455 EltVT, NumElts))); 3456 } else 3457 llvm_unreachable("Expected type!"); 3458 } 3459 3460 assert(!VT.isVector() && "Can't handle vector type here!"); 3461 unsigned NumVTBits = VT.getSizeInBits(); 3462 unsigned NumVTBytes = NumVTBits / 8; 3463 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3464 3465 APInt Val(NumVTBits, 0); 3466 if (TLI.isLittleEndian()) { 3467 for (unsigned i = 0; i != NumBytes; ++i) 3468 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3469 } else { 3470 for (unsigned i = 0; i != NumBytes; ++i) 3471 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3472 } 3473 3474 // If the "cost" of materializing the integer immediate is 1 or free, then 3475 // it is cost effective to turn the load into the immediate. 3476 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo(); 3477 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2) 3478 return DAG.getConstant(Val, VT); 3479 return SDValue(0, 0); 3480} 3481 3482/// getMemBasePlusOffset - Returns base and offset node for the 3483/// 3484static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl, 3485 SelectionDAG &DAG) { 3486 EVT VT = Base.getValueType(); 3487 return DAG.getNode(ISD::ADD, dl, 3488 VT, Base, DAG.getConstant(Offset, VT)); 3489} 3490 3491/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3492/// 3493static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3494 unsigned SrcDelta = 0; 3495 GlobalAddressSDNode *G = NULL; 3496 if (Src.getOpcode() == ISD::GlobalAddress) 3497 G = cast<GlobalAddressSDNode>(Src); 3498 else if (Src.getOpcode() == ISD::ADD && 3499 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3500 Src.getOperand(1).getOpcode() == ISD::Constant) { 3501 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3502 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3503 } 3504 if (!G) 3505 return false; 3506 3507 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3508} 3509 3510/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3511/// to replace the memset / memcpy. Return true if the number of memory ops 3512/// is below the threshold. It returns the types of the sequence of 3513/// memory ops to perform memset / memcpy by reference. 3514static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3515 unsigned Limit, uint64_t Size, 3516 unsigned DstAlign, unsigned SrcAlign, 3517 bool IsMemset, 3518 bool ZeroMemset, 3519 bool MemcpyStrSrc, 3520 bool AllowOverlap, 3521 SelectionDAG &DAG, 3522 const TargetLowering &TLI) { 3523 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3524 "Expecting memcpy / memset source to meet alignment requirement!"); 3525 // If 'SrcAlign' is zero, that means the memory operation does not need to 3526 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3527 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3528 // is the specified alignment of the memory operation. If it is zero, that 3529 // means it's possible to change the alignment of the destination. 3530 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3531 // not need to be loaded. 3532 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3533 IsMemset, ZeroMemset, MemcpyStrSrc, 3534 DAG.getMachineFunction()); 3535 3536 if (VT == MVT::Other) { 3537 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() || 3538 TLI.allowsUnalignedMemoryAccesses(VT)) { 3539 VT = TLI.getPointerTy(); 3540 } else { 3541 switch (DstAlign & 7) { 3542 case 0: VT = MVT::i64; break; 3543 case 4: VT = MVT::i32; break; 3544 case 2: VT = MVT::i16; break; 3545 default: VT = MVT::i8; break; 3546 } 3547 } 3548 3549 MVT LVT = MVT::i64; 3550 while (!TLI.isTypeLegal(LVT)) 3551 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3552 assert(LVT.isInteger()); 3553 3554 if (VT.bitsGT(LVT)) 3555 VT = LVT; 3556 } 3557 3558 unsigned NumMemOps = 0; 3559 while (Size != 0) { 3560 unsigned VTSize = VT.getSizeInBits() / 8; 3561 while (VTSize > Size) { 3562 // For now, only use non-vector load / store's for the left-over pieces. 3563 EVT NewVT = VT; 3564 unsigned NewVTSize; 3565 3566 bool Found = false; 3567 if (VT.isVector() || VT.isFloatingPoint()) { 3568 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; 3569 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) && 3570 TLI.isSafeMemOpType(NewVT.getSimpleVT())) 3571 Found = true; 3572 else if (NewVT == MVT::i64 && 3573 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) && 3574 TLI.isSafeMemOpType(MVT::f64)) { 3575 // i64 is usually not legal on 32-bit targets, but f64 may be. 3576 NewVT = MVT::f64; 3577 Found = true; 3578 } 3579 } 3580 3581 if (!Found) { 3582 do { 3583 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); 3584 if (NewVT == MVT::i8) 3585 break; 3586 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT())); 3587 } 3588 NewVTSize = NewVT.getSizeInBits() / 8; 3589 3590 // If the new VT cannot cover all of the remaining bits, then consider 3591 // issuing a (or a pair of) unaligned and overlapping load / store. 3592 // FIXME: Only does this for 64-bit or more since we don't have proper 3593 // cost model for unaligned load / store. 3594 bool Fast; 3595 if (NumMemOps && AllowOverlap && 3596 VTSize >= 8 && NewVTSize < Size && 3597 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast) 3598 VTSize = Size; 3599 else { 3600 VT = NewVT; 3601 VTSize = NewVTSize; 3602 } 3603 } 3604 3605 if (++NumMemOps > Limit) 3606 return false; 3607 3608 MemOps.push_back(VT); 3609 Size -= VTSize; 3610 } 3611 3612 return true; 3613} 3614 3615static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl, 3616 SDValue Chain, SDValue Dst, 3617 SDValue Src, uint64_t Size, 3618 unsigned Align, bool isVol, 3619 bool AlwaysInline, 3620 MachinePointerInfo DstPtrInfo, 3621 MachinePointerInfo SrcPtrInfo) { 3622 // Turn a memcpy of undef to nop. 3623 if (Src.getOpcode() == ISD::UNDEF) 3624 return Chain; 3625 3626 // Expand memcpy to a series of load and store ops if the size operand falls 3627 // below a certain threshold. 3628 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3629 // rather than maybe a humongous number of loads and stores. 3630 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3631 std::vector<EVT> MemOps; 3632 bool DstAlignCanChange = false; 3633 MachineFunction &MF = DAG.getMachineFunction(); 3634 MachineFrameInfo *MFI = MF.getFrameInfo(); 3635 bool OptSize = 3636 MF.getFunction()->getAttributes(). 3637 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3638 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3639 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3640 DstAlignCanChange = true; 3641 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3642 if (Align > SrcAlign) 3643 SrcAlign = Align; 3644 StringRef Str; 3645 bool CopyFromStr = isMemSrcFromString(Src, Str); 3646 bool isZeroStr = CopyFromStr && Str.empty(); 3647 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3648 3649 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3650 (DstAlignCanChange ? 0 : Align), 3651 (isZeroStr ? 0 : SrcAlign), 3652 false, false, CopyFromStr, true, DAG, TLI)) 3653 return SDValue(); 3654 3655 if (DstAlignCanChange) { 3656 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3657 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3658 3659 // Don't promote to an alignment that would require dynamic stack 3660 // realignment. 3661 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 3662 if (!TRI->needsStackRealignment(MF)) 3663 while (NewAlign > Align && 3664 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign)) 3665 NewAlign /= 2; 3666 3667 if (NewAlign > Align) { 3668 // Give the stack frame object a larger alignment if needed. 3669 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3670 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3671 Align = NewAlign; 3672 } 3673 } 3674 3675 SmallVector<SDValue, 8> OutChains; 3676 unsigned NumMemOps = MemOps.size(); 3677 uint64_t SrcOff = 0, DstOff = 0; 3678 for (unsigned i = 0; i != NumMemOps; ++i) { 3679 EVT VT = MemOps[i]; 3680 unsigned VTSize = VT.getSizeInBits() / 8; 3681 SDValue Value, Store; 3682 3683 if (VTSize > Size) { 3684 // Issuing an unaligned load / store pair that overlaps with the previous 3685 // pair. Adjust the offset accordingly. 3686 assert(i == NumMemOps-1 && i != 0); 3687 SrcOff -= VTSize - Size; 3688 DstOff -= VTSize - Size; 3689 } 3690 3691 if (CopyFromStr && 3692 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3693 // It's unlikely a store of a vector immediate can be done in a single 3694 // instruction. It would require a load from a constantpool first. 3695 // We only handle zero vectors here. 3696 // FIXME: Handle other cases where store of vector immediate is done in 3697 // a single instruction. 3698 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3699 if (Value.getNode()) 3700 Store = DAG.getStore(Chain, dl, Value, 3701 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3702 DstPtrInfo.getWithOffset(DstOff), isVol, 3703 false, Align); 3704 } 3705 3706 if (!Store.getNode()) { 3707 // The type might not be legal for the target. This should only happen 3708 // if the type is smaller than a legal type, as on PPC, so the right 3709 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3710 // to Load/Store if NVT==VT. 3711 // FIXME does the case above also need this? 3712 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3713 assert(NVT.bitsGE(VT)); 3714 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3715 getMemBasePlusOffset(Src, SrcOff, dl, DAG), 3716 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3717 MinAlign(SrcAlign, SrcOff)); 3718 Store = DAG.getTruncStore(Chain, dl, Value, 3719 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3720 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3721 false, Align); 3722 } 3723 OutChains.push_back(Store); 3724 SrcOff += VTSize; 3725 DstOff += VTSize; 3726 Size -= VTSize; 3727 } 3728 3729 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3730 &OutChains[0], OutChains.size()); 3731} 3732 3733static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl, 3734 SDValue Chain, SDValue Dst, 3735 SDValue Src, uint64_t Size, 3736 unsigned Align, bool isVol, 3737 bool AlwaysInline, 3738 MachinePointerInfo DstPtrInfo, 3739 MachinePointerInfo SrcPtrInfo) { 3740 // Turn a memmove of undef to nop. 3741 if (Src.getOpcode() == ISD::UNDEF) 3742 return Chain; 3743 3744 // Expand memmove to a series of load and store ops if the size operand falls 3745 // below a certain threshold. 3746 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3747 std::vector<EVT> MemOps; 3748 bool DstAlignCanChange = false; 3749 MachineFunction &MF = DAG.getMachineFunction(); 3750 MachineFrameInfo *MFI = MF.getFrameInfo(); 3751 bool OptSize = MF.getFunction()->getAttributes(). 3752 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3753 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3754 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3755 DstAlignCanChange = true; 3756 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3757 if (Align > SrcAlign) 3758 SrcAlign = Align; 3759 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3760 3761 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3762 (DstAlignCanChange ? 0 : Align), SrcAlign, 3763 false, false, false, false, DAG, TLI)) 3764 return SDValue(); 3765 3766 if (DstAlignCanChange) { 3767 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3768 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3769 if (NewAlign > Align) { 3770 // Give the stack frame object a larger alignment if needed. 3771 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3772 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3773 Align = NewAlign; 3774 } 3775 } 3776 3777 uint64_t SrcOff = 0, DstOff = 0; 3778 SmallVector<SDValue, 8> LoadValues; 3779 SmallVector<SDValue, 8> LoadChains; 3780 SmallVector<SDValue, 8> OutChains; 3781 unsigned NumMemOps = MemOps.size(); 3782 for (unsigned i = 0; i < NumMemOps; i++) { 3783 EVT VT = MemOps[i]; 3784 unsigned VTSize = VT.getSizeInBits() / 8; 3785 SDValue Value, Store; 3786 3787 Value = DAG.getLoad(VT, dl, Chain, 3788 getMemBasePlusOffset(Src, SrcOff, dl, DAG), 3789 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3790 false, false, SrcAlign); 3791 LoadValues.push_back(Value); 3792 LoadChains.push_back(Value.getValue(1)); 3793 SrcOff += VTSize; 3794 } 3795 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3796 &LoadChains[0], LoadChains.size()); 3797 OutChains.clear(); 3798 for (unsigned i = 0; i < NumMemOps; i++) { 3799 EVT VT = MemOps[i]; 3800 unsigned VTSize = VT.getSizeInBits() / 8; 3801 SDValue Value, Store; 3802 3803 Store = DAG.getStore(Chain, dl, LoadValues[i], 3804 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3805 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3806 OutChains.push_back(Store); 3807 DstOff += VTSize; 3808 } 3809 3810 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3811 &OutChains[0], OutChains.size()); 3812} 3813 3814/// \brief Lower the call to 'memset' intrinsic function into a series of store 3815/// operations. 3816/// 3817/// \param DAG Selection DAG where lowered code is placed. 3818/// \param dl Link to corresponding IR location. 3819/// \param Chain Control flow dependency. 3820/// \param Dst Pointer to destination memory location. 3821/// \param Src Value of byte to write into the memory. 3822/// \param Size Number of bytes to write. 3823/// \param Align Alignment of the destination in bytes. 3824/// \param isVol True if destination is volatile. 3825/// \param DstPtrInfo IR information on the memory pointer. 3826/// \returns New head in the control flow, if lowering was successful, empty 3827/// SDValue otherwise. 3828/// 3829/// The function tries to replace 'llvm.memset' intrinsic with several store 3830/// operations and value calculation code. This is usually profitable for small 3831/// memory size. 3832static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl, 3833 SDValue Chain, SDValue Dst, 3834 SDValue Src, uint64_t Size, 3835 unsigned Align, bool isVol, 3836 MachinePointerInfo DstPtrInfo) { 3837 // Turn a memset of undef to nop. 3838 if (Src.getOpcode() == ISD::UNDEF) 3839 return Chain; 3840 3841 // Expand memset to a series of load/store ops if the size operand 3842 // falls below a certain threshold. 3843 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3844 std::vector<EVT> MemOps; 3845 bool DstAlignCanChange = false; 3846 MachineFunction &MF = DAG.getMachineFunction(); 3847 MachineFrameInfo *MFI = MF.getFrameInfo(); 3848 bool OptSize = MF.getFunction()->getAttributes(). 3849 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3850 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3851 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3852 DstAlignCanChange = true; 3853 bool IsZeroVal = 3854 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3855 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3856 Size, (DstAlignCanChange ? 0 : Align), 0, 3857 true, IsZeroVal, false, true, DAG, TLI)) 3858 return SDValue(); 3859 3860 if (DstAlignCanChange) { 3861 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3862 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3863 if (NewAlign > Align) { 3864 // Give the stack frame object a larger alignment if needed. 3865 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3866 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3867 Align = NewAlign; 3868 } 3869 } 3870 3871 SmallVector<SDValue, 8> OutChains; 3872 uint64_t DstOff = 0; 3873 unsigned NumMemOps = MemOps.size(); 3874 3875 // Find the largest store and generate the bit pattern for it. 3876 EVT LargestVT = MemOps[0]; 3877 for (unsigned i = 1; i < NumMemOps; i++) 3878 if (MemOps[i].bitsGT(LargestVT)) 3879 LargestVT = MemOps[i]; 3880 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3881 3882 for (unsigned i = 0; i < NumMemOps; i++) { 3883 EVT VT = MemOps[i]; 3884 unsigned VTSize = VT.getSizeInBits() / 8; 3885 if (VTSize > Size) { 3886 // Issuing an unaligned load / store pair that overlaps with the previous 3887 // pair. Adjust the offset accordingly. 3888 assert(i == NumMemOps-1 && i != 0); 3889 DstOff -= VTSize - Size; 3890 } 3891 3892 // If this store is smaller than the largest store see whether we can get 3893 // the smaller value for free with a truncate. 3894 SDValue Value = MemSetValue; 3895 if (VT.bitsLT(LargestVT)) { 3896 if (!LargestVT.isVector() && !VT.isVector() && 3897 TLI.isTruncateFree(LargestVT, VT)) 3898 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3899 else 3900 Value = getMemsetValue(Src, VT, DAG, dl); 3901 } 3902 assert(Value.getValueType() == VT && "Value with wrong type."); 3903 SDValue Store = DAG.getStore(Chain, dl, Value, 3904 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3905 DstPtrInfo.getWithOffset(DstOff), 3906 isVol, false, Align); 3907 OutChains.push_back(Store); 3908 DstOff += VT.getSizeInBits() / 8; 3909 Size -= VTSize; 3910 } 3911 3912 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3913 &OutChains[0], OutChains.size()); 3914} 3915 3916SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst, 3917 SDValue Src, SDValue Size, 3918 unsigned Align, bool isVol, bool AlwaysInline, 3919 MachinePointerInfo DstPtrInfo, 3920 MachinePointerInfo SrcPtrInfo) { 3921 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 3922 3923 // Check to see if we should lower the memcpy to loads and stores first. 3924 // For cases within the target-specified limits, this is the best choice. 3925 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3926 if (ConstantSize) { 3927 // Memcpy with size zero? Just return the original chain. 3928 if (ConstantSize->isNullValue()) 3929 return Chain; 3930 3931 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3932 ConstantSize->getZExtValue(),Align, 3933 isVol, false, DstPtrInfo, SrcPtrInfo); 3934 if (Result.getNode()) 3935 return Result; 3936 } 3937 3938 // Then check to see if we should lower the memcpy with target-specific 3939 // code. If the target chooses to do this, this is the next best. 3940 SDValue Result = 3941 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3942 isVol, AlwaysInline, 3943 DstPtrInfo, SrcPtrInfo); 3944 if (Result.getNode()) 3945 return Result; 3946 3947 // If we really need inline code and the target declined to provide it, 3948 // use a (potentially long) sequence of loads and stores. 3949 if (AlwaysInline) { 3950 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3951 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3952 ConstantSize->getZExtValue(), Align, isVol, 3953 true, DstPtrInfo, SrcPtrInfo); 3954 } 3955 3956 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3957 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3958 // respect volatile, so they may do things like read or write memory 3959 // beyond the given memory regions. But fixing this isn't easy, and most 3960 // people don't care. 3961 3962 const TargetLowering *TLI = TM.getTargetLowering(); 3963 3964 // Emit a library call. 3965 TargetLowering::ArgListTy Args; 3966 TargetLowering::ArgListEntry Entry; 3967 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext()); 3968 Entry.Node = Dst; Args.push_back(Entry); 3969 Entry.Node = Src; Args.push_back(Entry); 3970 Entry.Node = Size; Args.push_back(Entry); 3971 // FIXME: pass in SDLoc 3972 TargetLowering:: 3973 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3974 false, false, false, false, 0, 3975 TLI->getLibcallCallingConv(RTLIB::MEMCPY), 3976 /*isTailCall=*/false, 3977 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3978 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY), 3979 TLI->getPointerTy()), 3980 Args, *this, dl); 3981 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 3982 3983 return CallResult.second; 3984} 3985 3986SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst, 3987 SDValue Src, SDValue Size, 3988 unsigned Align, bool isVol, 3989 MachinePointerInfo DstPtrInfo, 3990 MachinePointerInfo SrcPtrInfo) { 3991 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 3992 3993 // Check to see if we should lower the memmove to loads and stores first. 3994 // For cases within the target-specified limits, this is the best choice. 3995 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3996 if (ConstantSize) { 3997 // Memmove with size zero? Just return the original chain. 3998 if (ConstantSize->isNullValue()) 3999 return Chain; 4000 4001 SDValue Result = 4002 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 4003 ConstantSize->getZExtValue(), Align, isVol, 4004 false, DstPtrInfo, SrcPtrInfo); 4005 if (Result.getNode()) 4006 return Result; 4007 } 4008 4009 // Then check to see if we should lower the memmove with target-specific 4010 // code. If the target chooses to do this, this is the next best. 4011 SDValue Result = 4012 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4013 DstPtrInfo, SrcPtrInfo); 4014 if (Result.getNode()) 4015 return Result; 4016 4017 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 4018 // not be safe. See memcpy above for more details. 4019 4020 const TargetLowering *TLI = TM.getTargetLowering(); 4021 4022 // Emit a library call. 4023 TargetLowering::ArgListTy Args; 4024 TargetLowering::ArgListEntry Entry; 4025 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext()); 4026 Entry.Node = Dst; Args.push_back(Entry); 4027 Entry.Node = Src; Args.push_back(Entry); 4028 Entry.Node = Size; Args.push_back(Entry); 4029 // FIXME: pass in SDLoc 4030 TargetLowering:: 4031 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4032 false, false, false, false, 0, 4033 TLI->getLibcallCallingConv(RTLIB::MEMMOVE), 4034 /*isTailCall=*/false, 4035 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 4036 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE), 4037 TLI->getPointerTy()), 4038 Args, *this, dl); 4039 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 4040 4041 return CallResult.second; 4042} 4043 4044SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst, 4045 SDValue Src, SDValue Size, 4046 unsigned Align, bool isVol, 4047 MachinePointerInfo DstPtrInfo) { 4048 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 4049 4050 // Check to see if we should lower the memset to stores first. 4051 // For cases within the target-specified limits, this is the best choice. 4052 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 4053 if (ConstantSize) { 4054 // Memset with size zero? Just return the original chain. 4055 if (ConstantSize->isNullValue()) 4056 return Chain; 4057 4058 SDValue Result = 4059 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 4060 Align, isVol, DstPtrInfo); 4061 4062 if (Result.getNode()) 4063 return Result; 4064 } 4065 4066 // Then check to see if we should lower the memset with target-specific 4067 // code. If the target chooses to do this, this is the next best. 4068 SDValue Result = 4069 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4070 DstPtrInfo); 4071 if (Result.getNode()) 4072 return Result; 4073 4074 // Emit a library call. 4075 const TargetLowering *TLI = TM.getTargetLowering(); 4076 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext()); 4077 TargetLowering::ArgListTy Args; 4078 TargetLowering::ArgListEntry Entry; 4079 Entry.Node = Dst; Entry.Ty = IntPtrTy; 4080 Args.push_back(Entry); 4081 // Extend or truncate the argument to be an i32 value for the call. 4082 if (Src.getValueType().bitsGT(MVT::i32)) 4083 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 4084 else 4085 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 4086 Entry.Node = Src; 4087 Entry.Ty = Type::getInt32Ty(*getContext()); 4088 Entry.isSExt = true; 4089 Args.push_back(Entry); 4090 Entry.Node = Size; 4091 Entry.Ty = IntPtrTy; 4092 Entry.isSExt = false; 4093 Args.push_back(Entry); 4094 // FIXME: pass in SDLoc 4095 TargetLowering:: 4096 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4097 false, false, false, false, 0, 4098 TLI->getLibcallCallingConv(RTLIB::MEMSET), 4099 /*isTailCall=*/false, 4100 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 4101 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET), 4102 TLI->getPointerTy()), 4103 Args, *this, dl); 4104 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 4105 4106 return CallResult.second; 4107} 4108 4109SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4110 SDVTList VTList, SDValue* Ops, unsigned NumOps, 4111 MachineMemOperand *MMO, 4112 AtomicOrdering Ordering, 4113 SynchronizationScope SynchScope) { 4114 FoldingSetNodeID ID; 4115 ID.AddInteger(MemVT.getRawBits()); 4116 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4117 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4118 void* IP = 0; 4119 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4120 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4121 return SDValue(E, 0); 4122 } 4123 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(), 4124 dl.getDebugLoc(), VTList, MemVT, 4125 Ops, NumOps, MMO, Ordering, 4126 SynchScope); 4127 CSEMap.InsertNode(N, IP); 4128 AllNodes.push_back(N); 4129 return SDValue(N, 0); 4130} 4131 4132SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4133 SDValue Chain, SDValue Ptr, SDValue Cmp, 4134 SDValue Swp, MachinePointerInfo PtrInfo, 4135 unsigned Alignment, 4136 AtomicOrdering Ordering, 4137 SynchronizationScope SynchScope) { 4138 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4139 Alignment = getEVTAlignment(MemVT); 4140 4141 MachineFunction &MF = getMachineFunction(); 4142 4143 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE. 4144 // For now, atomics are considered to be volatile always. 4145 // FIXME: Volatile isn't really correct; we should keep track of atomic 4146 // orderings in the memoperand. 4147 unsigned Flags = MachineMemOperand::MOVolatile; 4148 if (Opcode != ISD::ATOMIC_STORE) 4149 Flags |= MachineMemOperand::MOLoad; 4150 if (Opcode != ISD::ATOMIC_LOAD) 4151 Flags |= MachineMemOperand::MOStore; 4152 4153 MachineMemOperand *MMO = 4154 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 4155 4156 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 4157 Ordering, SynchScope); 4158} 4159 4160SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4161 SDValue Chain, 4162 SDValue Ptr, SDValue Cmp, 4163 SDValue Swp, MachineMemOperand *MMO, 4164 AtomicOrdering Ordering, 4165 SynchronizationScope SynchScope) { 4166 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 4167 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 4168 4169 EVT VT = Cmp.getValueType(); 4170 4171 SDVTList VTs = getVTList(VT, MVT::Other); 4172 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 4173 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 4, MMO, Ordering, SynchScope); 4174} 4175 4176SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4177 SDValue Chain, 4178 SDValue Ptr, SDValue Val, 4179 const Value* PtrVal, 4180 unsigned Alignment, 4181 AtomicOrdering Ordering, 4182 SynchronizationScope SynchScope) { 4183 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4184 Alignment = getEVTAlignment(MemVT); 4185 4186 MachineFunction &MF = getMachineFunction(); 4187 // An atomic store does not load. An atomic load does not store. 4188 // (An atomicrmw obviously both loads and stores.) 4189 // For now, atomics are considered to be volatile always, and they are 4190 // chained as such. 4191 // FIXME: Volatile isn't really correct; we should keep track of atomic 4192 // orderings in the memoperand. 4193 unsigned Flags = MachineMemOperand::MOVolatile; 4194 if (Opcode != ISD::ATOMIC_STORE) 4195 Flags |= MachineMemOperand::MOLoad; 4196 if (Opcode != ISD::ATOMIC_LOAD) 4197 Flags |= MachineMemOperand::MOStore; 4198 4199 MachineMemOperand *MMO = 4200 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4201 MemVT.getStoreSize(), Alignment); 4202 4203 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4204 Ordering, SynchScope); 4205} 4206 4207SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4208 SDValue Chain, 4209 SDValue Ptr, SDValue Val, 4210 MachineMemOperand *MMO, 4211 AtomicOrdering Ordering, 4212 SynchronizationScope SynchScope) { 4213 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4214 Opcode == ISD::ATOMIC_LOAD_SUB || 4215 Opcode == ISD::ATOMIC_LOAD_AND || 4216 Opcode == ISD::ATOMIC_LOAD_OR || 4217 Opcode == ISD::ATOMIC_LOAD_XOR || 4218 Opcode == ISD::ATOMIC_LOAD_NAND || 4219 Opcode == ISD::ATOMIC_LOAD_MIN || 4220 Opcode == ISD::ATOMIC_LOAD_MAX || 4221 Opcode == ISD::ATOMIC_LOAD_UMIN || 4222 Opcode == ISD::ATOMIC_LOAD_UMAX || 4223 Opcode == ISD::ATOMIC_SWAP || 4224 Opcode == ISD::ATOMIC_STORE) && 4225 "Invalid Atomic Op"); 4226 4227 EVT VT = Val.getValueType(); 4228 4229 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4230 getVTList(VT, MVT::Other); 4231 SDValue Ops[] = {Chain, Ptr, Val}; 4232 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 3, MMO, Ordering, SynchScope); 4233} 4234 4235SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4236 EVT VT, SDValue Chain, 4237 SDValue Ptr, 4238 const Value* PtrVal, 4239 unsigned Alignment, 4240 AtomicOrdering Ordering, 4241 SynchronizationScope SynchScope) { 4242 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4243 Alignment = getEVTAlignment(MemVT); 4244 4245 MachineFunction &MF = getMachineFunction(); 4246 // An atomic store does not load. An atomic load does not store. 4247 // (An atomicrmw obviously both loads and stores.) 4248 // For now, atomics are considered to be volatile always, and they are 4249 // chained as such. 4250 // FIXME: Volatile isn't really correct; we should keep track of atomic 4251 // orderings in the memoperand. 4252 unsigned Flags = MachineMemOperand::MOVolatile; 4253 if (Opcode != ISD::ATOMIC_STORE) 4254 Flags |= MachineMemOperand::MOLoad; 4255 if (Opcode != ISD::ATOMIC_LOAD) 4256 Flags |= MachineMemOperand::MOStore; 4257 4258 MachineMemOperand *MMO = 4259 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4260 MemVT.getStoreSize(), Alignment); 4261 4262 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4263 Ordering, SynchScope); 4264} 4265 4266SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4267 EVT VT, SDValue Chain, 4268 SDValue Ptr, 4269 MachineMemOperand *MMO, 4270 AtomicOrdering Ordering, 4271 SynchronizationScope SynchScope) { 4272 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4273 4274 SDVTList VTs = getVTList(VT, MVT::Other); 4275 SDValue Ops[] = {Chain, Ptr}; 4276 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 2, MMO, Ordering, SynchScope); 4277} 4278 4279/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4280SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4281 SDLoc dl) { 4282 if (NumOps == 1) 4283 return Ops[0]; 4284 4285 SmallVector<EVT, 4> VTs; 4286 VTs.reserve(NumOps); 4287 for (unsigned i = 0; i < NumOps; ++i) 4288 VTs.push_back(Ops[i].getValueType()); 4289 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4290 Ops, NumOps); 4291} 4292 4293SDValue 4294SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, 4295 const EVT *VTs, unsigned NumVTs, 4296 const SDValue *Ops, unsigned NumOps, 4297 EVT MemVT, MachinePointerInfo PtrInfo, 4298 unsigned Align, bool Vol, 4299 bool ReadMem, bool WriteMem) { 4300 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4301 MemVT, PtrInfo, Align, Vol, 4302 ReadMem, WriteMem); 4303} 4304 4305SDValue 4306SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 4307 const SDValue *Ops, unsigned NumOps, 4308 EVT MemVT, MachinePointerInfo PtrInfo, 4309 unsigned Align, bool Vol, 4310 bool ReadMem, bool WriteMem) { 4311 if (Align == 0) // Ensure that codegen never sees alignment 0 4312 Align = getEVTAlignment(MemVT); 4313 4314 MachineFunction &MF = getMachineFunction(); 4315 unsigned Flags = 0; 4316 if (WriteMem) 4317 Flags |= MachineMemOperand::MOStore; 4318 if (ReadMem) 4319 Flags |= MachineMemOperand::MOLoad; 4320 if (Vol) 4321 Flags |= MachineMemOperand::MOVolatile; 4322 MachineMemOperand *MMO = 4323 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4324 4325 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4326} 4327 4328SDValue 4329SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 4330 const SDValue *Ops, unsigned NumOps, 4331 EVT MemVT, MachineMemOperand *MMO) { 4332 assert((Opcode == ISD::INTRINSIC_VOID || 4333 Opcode == ISD::INTRINSIC_W_CHAIN || 4334 Opcode == ISD::PREFETCH || 4335 Opcode == ISD::LIFETIME_START || 4336 Opcode == ISD::LIFETIME_END || 4337 (Opcode <= INT_MAX && 4338 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4339 "Opcode is not a memory-accessing opcode!"); 4340 4341 // Memoize the node unless it returns a flag. 4342 MemIntrinsicSDNode *N; 4343 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4344 FoldingSetNodeID ID; 4345 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4346 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4347 void *IP = 0; 4348 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4349 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4350 return SDValue(E, 0); 4351 } 4352 4353 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(), 4354 dl.getDebugLoc(), VTList, Ops, 4355 NumOps, MemVT, MMO); 4356 CSEMap.InsertNode(N, IP); 4357 } else { 4358 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(), 4359 dl.getDebugLoc(), VTList, Ops, 4360 NumOps, MemVT, MMO); 4361 } 4362 AllNodes.push_back(N); 4363 return SDValue(N, 0); 4364} 4365 4366/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4367/// MachinePointerInfo record from it. This is particularly useful because the 4368/// code generator has many cases where it doesn't bother passing in a 4369/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4370static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4371 // If this is FI+Offset, we can model it. 4372 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4373 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4374 4375 // If this is (FI+Offset1)+Offset2, we can model it. 4376 if (Ptr.getOpcode() != ISD::ADD || 4377 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4378 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4379 return MachinePointerInfo(); 4380 4381 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4382 return MachinePointerInfo::getFixedStack(FI, Offset+ 4383 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4384} 4385 4386/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4387/// MachinePointerInfo record from it. This is particularly useful because the 4388/// code generator has many cases where it doesn't bother passing in a 4389/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4390static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4391 // If the 'Offset' value isn't a constant, we can't handle this. 4392 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4393 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4394 if (OffsetOp.getOpcode() == ISD::UNDEF) 4395 return InferPointerInfo(Ptr); 4396 return MachinePointerInfo(); 4397} 4398 4399 4400SDValue 4401SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4402 EVT VT, SDLoc dl, SDValue Chain, 4403 SDValue Ptr, SDValue Offset, 4404 MachinePointerInfo PtrInfo, EVT MemVT, 4405 bool isVolatile, bool isNonTemporal, bool isInvariant, 4406 unsigned Alignment, const MDNode *TBAAInfo, 4407 const MDNode *Ranges) { 4408 assert(Chain.getValueType() == MVT::Other && 4409 "Invalid chain type"); 4410 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4411 Alignment = getEVTAlignment(VT); 4412 4413 unsigned Flags = MachineMemOperand::MOLoad; 4414 if (isVolatile) 4415 Flags |= MachineMemOperand::MOVolatile; 4416 if (isNonTemporal) 4417 Flags |= MachineMemOperand::MONonTemporal; 4418 if (isInvariant) 4419 Flags |= MachineMemOperand::MOInvariant; 4420 4421 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4422 // clients. 4423 if (PtrInfo.V == 0) 4424 PtrInfo = InferPointerInfo(Ptr, Offset); 4425 4426 MachineFunction &MF = getMachineFunction(); 4427 MachineMemOperand *MMO = 4428 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4429 TBAAInfo, Ranges); 4430 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4431} 4432 4433SDValue 4434SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4435 EVT VT, SDLoc dl, SDValue Chain, 4436 SDValue Ptr, SDValue Offset, EVT MemVT, 4437 MachineMemOperand *MMO) { 4438 if (VT == MemVT) { 4439 ExtType = ISD::NON_EXTLOAD; 4440 } else if (ExtType == ISD::NON_EXTLOAD) { 4441 assert(VT == MemVT && "Non-extending load from different memory type!"); 4442 } else { 4443 // Extending load. 4444 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4445 "Should only be an extending load, not truncating!"); 4446 assert(VT.isInteger() == MemVT.isInteger() && 4447 "Cannot convert from FP to Int or Int -> FP!"); 4448 assert(VT.isVector() == MemVT.isVector() && 4449 "Cannot use trunc store to convert to or from a vector!"); 4450 assert((!VT.isVector() || 4451 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4452 "Cannot use trunc store to change the number of vector elements!"); 4453 } 4454 4455 bool Indexed = AM != ISD::UNINDEXED; 4456 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4457 "Unindexed load with an offset!"); 4458 4459 SDVTList VTs = Indexed ? 4460 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4461 SDValue Ops[] = { Chain, Ptr, Offset }; 4462 FoldingSetNodeID ID; 4463 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4464 ID.AddInteger(MemVT.getRawBits()); 4465 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4466 MMO->isNonTemporal(), 4467 MMO->isInvariant())); 4468 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4469 void *IP = 0; 4470 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4471 cast<LoadSDNode>(E)->refineAlignment(MMO); 4472 return SDValue(E, 0); 4473 } 4474 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(), 4475 dl.getDebugLoc(), VTs, AM, ExtType, 4476 MemVT, MMO); 4477 CSEMap.InsertNode(N, IP); 4478 AllNodes.push_back(N); 4479 return SDValue(N, 0); 4480} 4481 4482SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl, 4483 SDValue Chain, SDValue Ptr, 4484 MachinePointerInfo PtrInfo, 4485 bool isVolatile, bool isNonTemporal, 4486 bool isInvariant, unsigned Alignment, 4487 const MDNode *TBAAInfo, 4488 const MDNode *Ranges) { 4489 SDValue Undef = getUNDEF(Ptr.getValueType()); 4490 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4491 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4492 TBAAInfo, Ranges); 4493} 4494 4495SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 4496 SDValue Chain, SDValue Ptr, 4497 MachinePointerInfo PtrInfo, EVT MemVT, 4498 bool isVolatile, bool isNonTemporal, 4499 unsigned Alignment, const MDNode *TBAAInfo) { 4500 SDValue Undef = getUNDEF(Ptr.getValueType()); 4501 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4502 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4503 TBAAInfo); 4504} 4505 4506 4507SDValue 4508SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base, 4509 SDValue Offset, ISD::MemIndexedMode AM) { 4510 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4511 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4512 "Load is already a indexed load!"); 4513 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4514 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4515 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4516 false, LD->getAlignment()); 4517} 4518 4519SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val, 4520 SDValue Ptr, MachinePointerInfo PtrInfo, 4521 bool isVolatile, bool isNonTemporal, 4522 unsigned Alignment, const MDNode *TBAAInfo) { 4523 assert(Chain.getValueType() == MVT::Other && 4524 "Invalid chain type"); 4525 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4526 Alignment = getEVTAlignment(Val.getValueType()); 4527 4528 unsigned Flags = MachineMemOperand::MOStore; 4529 if (isVolatile) 4530 Flags |= MachineMemOperand::MOVolatile; 4531 if (isNonTemporal) 4532 Flags |= MachineMemOperand::MONonTemporal; 4533 4534 if (PtrInfo.V == 0) 4535 PtrInfo = InferPointerInfo(Ptr); 4536 4537 MachineFunction &MF = getMachineFunction(); 4538 MachineMemOperand *MMO = 4539 MF.getMachineMemOperand(PtrInfo, Flags, 4540 Val.getValueType().getStoreSize(), Alignment, 4541 TBAAInfo); 4542 4543 return getStore(Chain, dl, Val, Ptr, MMO); 4544} 4545 4546SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val, 4547 SDValue Ptr, MachineMemOperand *MMO) { 4548 assert(Chain.getValueType() == MVT::Other && 4549 "Invalid chain type"); 4550 EVT VT = Val.getValueType(); 4551 SDVTList VTs = getVTList(MVT::Other); 4552 SDValue Undef = getUNDEF(Ptr.getValueType()); 4553 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4554 FoldingSetNodeID ID; 4555 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4556 ID.AddInteger(VT.getRawBits()); 4557 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4558 MMO->isNonTemporal(), MMO->isInvariant())); 4559 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4560 void *IP = 0; 4561 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4562 cast<StoreSDNode>(E)->refineAlignment(MMO); 4563 return SDValue(E, 0); 4564 } 4565 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4566 dl.getDebugLoc(), VTs, 4567 ISD::UNINDEXED, false, VT, MMO); 4568 CSEMap.InsertNode(N, IP); 4569 AllNodes.push_back(N); 4570 return SDValue(N, 0); 4571} 4572 4573SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, 4574 SDValue Ptr, MachinePointerInfo PtrInfo, 4575 EVT SVT,bool isVolatile, bool isNonTemporal, 4576 unsigned Alignment, 4577 const MDNode *TBAAInfo) { 4578 assert(Chain.getValueType() == MVT::Other && 4579 "Invalid chain type"); 4580 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4581 Alignment = getEVTAlignment(SVT); 4582 4583 unsigned Flags = MachineMemOperand::MOStore; 4584 if (isVolatile) 4585 Flags |= MachineMemOperand::MOVolatile; 4586 if (isNonTemporal) 4587 Flags |= MachineMemOperand::MONonTemporal; 4588 4589 if (PtrInfo.V == 0) 4590 PtrInfo = InferPointerInfo(Ptr); 4591 4592 MachineFunction &MF = getMachineFunction(); 4593 MachineMemOperand *MMO = 4594 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4595 TBAAInfo); 4596 4597 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4598} 4599 4600SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, 4601 SDValue Ptr, EVT SVT, 4602 MachineMemOperand *MMO) { 4603 EVT VT = Val.getValueType(); 4604 4605 assert(Chain.getValueType() == MVT::Other && 4606 "Invalid chain type"); 4607 if (VT == SVT) 4608 return getStore(Chain, dl, Val, Ptr, MMO); 4609 4610 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4611 "Should only be a truncating store, not extending!"); 4612 assert(VT.isInteger() == SVT.isInteger() && 4613 "Can't do FP-INT conversion!"); 4614 assert(VT.isVector() == SVT.isVector() && 4615 "Cannot use trunc store to convert to or from a vector!"); 4616 assert((!VT.isVector() || 4617 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4618 "Cannot use trunc store to change the number of vector elements!"); 4619 4620 SDVTList VTs = getVTList(MVT::Other); 4621 SDValue Undef = getUNDEF(Ptr.getValueType()); 4622 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4623 FoldingSetNodeID ID; 4624 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4625 ID.AddInteger(SVT.getRawBits()); 4626 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4627 MMO->isNonTemporal(), MMO->isInvariant())); 4628 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4629 void *IP = 0; 4630 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4631 cast<StoreSDNode>(E)->refineAlignment(MMO); 4632 return SDValue(E, 0); 4633 } 4634 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4635 dl.getDebugLoc(), VTs, 4636 ISD::UNINDEXED, true, SVT, MMO); 4637 CSEMap.InsertNode(N, IP); 4638 AllNodes.push_back(N); 4639 return SDValue(N, 0); 4640} 4641 4642SDValue 4643SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base, 4644 SDValue Offset, ISD::MemIndexedMode AM) { 4645 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4646 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4647 "Store is already a indexed store!"); 4648 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4649 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4650 FoldingSetNodeID ID; 4651 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4652 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4653 ID.AddInteger(ST->getRawSubclassData()); 4654 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4655 void *IP = 0; 4656 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4657 return SDValue(E, 0); 4658 4659 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4660 dl.getDebugLoc(), VTs, AM, 4661 ST->isTruncatingStore(), 4662 ST->getMemoryVT(), 4663 ST->getMemOperand()); 4664 CSEMap.InsertNode(N, IP); 4665 AllNodes.push_back(N); 4666 return SDValue(N, 0); 4667} 4668 4669SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl, 4670 SDValue Chain, SDValue Ptr, 4671 SDValue SV, 4672 unsigned Align) { 4673 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4674 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4675} 4676 4677SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 4678 const SDUse *Ops, unsigned NumOps) { 4679 switch (NumOps) { 4680 case 0: return getNode(Opcode, DL, VT); 4681 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4682 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4683 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4684 default: break; 4685 } 4686 4687 // Copy from an SDUse array into an SDValue array for use with 4688 // the regular getNode logic. 4689 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4690 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4691} 4692 4693SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 4694 const SDValue *Ops, unsigned NumOps) { 4695 switch (NumOps) { 4696 case 0: return getNode(Opcode, DL, VT); 4697 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4698 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4699 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4700 default: break; 4701 } 4702 4703 switch (Opcode) { 4704 default: break; 4705 case ISD::SELECT_CC: { 4706 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4707 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4708 "LHS and RHS of condition must have same type!"); 4709 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4710 "True and False arms of SelectCC must have same type!"); 4711 assert(Ops[2].getValueType() == VT && 4712 "select_cc node must be of same type as true and false value!"); 4713 break; 4714 } 4715 case ISD::BR_CC: { 4716 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4717 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4718 "LHS/RHS of comparison should match types!"); 4719 break; 4720 } 4721 } 4722 4723 // Memoize nodes. 4724 SDNode *N; 4725 SDVTList VTs = getVTList(VT); 4726 4727 if (VT != MVT::Glue) { 4728 FoldingSetNodeID ID; 4729 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4730 void *IP = 0; 4731 4732 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4733 return SDValue(E, 0); 4734 4735 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4736 VTs, Ops, NumOps); 4737 CSEMap.InsertNode(N, IP); 4738 } else { 4739 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4740 VTs, Ops, NumOps); 4741 } 4742 4743 AllNodes.push_back(N); 4744#ifndef NDEBUG 4745 VerifySDNode(N); 4746#endif 4747 return SDValue(N, 0); 4748} 4749 4750SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 4751 ArrayRef<EVT> ResultTys, 4752 const SDValue *Ops, unsigned NumOps) { 4753 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4754 Ops, NumOps); 4755} 4756 4757SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 4758 const EVT *VTs, unsigned NumVTs, 4759 const SDValue *Ops, unsigned NumOps) { 4760 if (NumVTs == 1) 4761 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4762 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4763} 4764 4765SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4766 const SDValue *Ops, unsigned NumOps) { 4767 if (VTList.NumVTs == 1) 4768 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4769 4770#if 0 4771 switch (Opcode) { 4772 // FIXME: figure out how to safely handle things like 4773 // int foo(int x) { return 1 << (x & 255); } 4774 // int bar() { return foo(256); } 4775 case ISD::SRA_PARTS: 4776 case ISD::SRL_PARTS: 4777 case ISD::SHL_PARTS: 4778 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4779 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4780 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4781 else if (N3.getOpcode() == ISD::AND) 4782 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4783 // If the and is only masking out bits that cannot effect the shift, 4784 // eliminate the and. 4785 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4786 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4787 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4788 } 4789 break; 4790 } 4791#endif 4792 4793 // Memoize the node unless it returns a flag. 4794 SDNode *N; 4795 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4796 FoldingSetNodeID ID; 4797 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4798 void *IP = 0; 4799 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4800 return SDValue(E, 0); 4801 4802 if (NumOps == 1) { 4803 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 4804 DL.getDebugLoc(), VTList, Ops[0]); 4805 } else if (NumOps == 2) { 4806 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 4807 DL.getDebugLoc(), VTList, Ops[0], 4808 Ops[1]); 4809 } else if (NumOps == 3) { 4810 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 4811 DL.getDebugLoc(), VTList, Ops[0], 4812 Ops[1], Ops[2]); 4813 } else { 4814 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4815 VTList, Ops, NumOps); 4816 } 4817 CSEMap.InsertNode(N, IP); 4818 } else { 4819 if (NumOps == 1) { 4820 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 4821 DL.getDebugLoc(), VTList, Ops[0]); 4822 } else if (NumOps == 2) { 4823 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 4824 DL.getDebugLoc(), VTList, Ops[0], 4825 Ops[1]); 4826 } else if (NumOps == 3) { 4827 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 4828 DL.getDebugLoc(), VTList, Ops[0], 4829 Ops[1], Ops[2]); 4830 } else { 4831 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4832 VTList, Ops, NumOps); 4833 } 4834 } 4835 AllNodes.push_back(N); 4836#ifndef NDEBUG 4837 VerifySDNode(N); 4838#endif 4839 return SDValue(N, 0); 4840} 4841 4842SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) { 4843 return getNode(Opcode, DL, VTList, 0, 0); 4844} 4845 4846SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4847 SDValue N1) { 4848 SDValue Ops[] = { N1 }; 4849 return getNode(Opcode, DL, VTList, Ops, 1); 4850} 4851 4852SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4853 SDValue N1, SDValue N2) { 4854 SDValue Ops[] = { N1, N2 }; 4855 return getNode(Opcode, DL, VTList, Ops, 2); 4856} 4857 4858SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4859 SDValue N1, SDValue N2, SDValue N3) { 4860 SDValue Ops[] = { N1, N2, N3 }; 4861 return getNode(Opcode, DL, VTList, Ops, 3); 4862} 4863 4864SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4865 SDValue N1, SDValue N2, SDValue N3, 4866 SDValue N4) { 4867 SDValue Ops[] = { N1, N2, N3, N4 }; 4868 return getNode(Opcode, DL, VTList, Ops, 4); 4869} 4870 4871SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4872 SDValue N1, SDValue N2, SDValue N3, 4873 SDValue N4, SDValue N5) { 4874 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4875 return getNode(Opcode, DL, VTList, Ops, 5); 4876} 4877 4878SDVTList SelectionDAG::getVTList(EVT VT) { 4879 return makeVTList(SDNode::getValueTypeList(VT), 1); 4880} 4881 4882SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4883 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4884 E = VTList.rend(); I != E; ++I) 4885 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4886 return *I; 4887 4888 EVT *Array = Allocator.Allocate<EVT>(2); 4889 Array[0] = VT1; 4890 Array[1] = VT2; 4891 SDVTList Result = makeVTList(Array, 2); 4892 VTList.push_back(Result); 4893 return Result; 4894} 4895 4896SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4897 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4898 E = VTList.rend(); I != E; ++I) 4899 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4900 I->VTs[2] == VT3) 4901 return *I; 4902 4903 EVT *Array = Allocator.Allocate<EVT>(3); 4904 Array[0] = VT1; 4905 Array[1] = VT2; 4906 Array[2] = VT3; 4907 SDVTList Result = makeVTList(Array, 3); 4908 VTList.push_back(Result); 4909 return Result; 4910} 4911 4912SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4913 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4914 E = VTList.rend(); I != E; ++I) 4915 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4916 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4917 return *I; 4918 4919 EVT *Array = Allocator.Allocate<EVT>(4); 4920 Array[0] = VT1; 4921 Array[1] = VT2; 4922 Array[2] = VT3; 4923 Array[3] = VT4; 4924 SDVTList Result = makeVTList(Array, 4); 4925 VTList.push_back(Result); 4926 return Result; 4927} 4928 4929SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4930 switch (NumVTs) { 4931 case 0: llvm_unreachable("Cannot have nodes without results!"); 4932 case 1: return getVTList(VTs[0]); 4933 case 2: return getVTList(VTs[0], VTs[1]); 4934 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4935 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4936 default: break; 4937 } 4938 4939 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4940 E = VTList.rend(); I != E; ++I) { 4941 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4942 continue; 4943 4944 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4945 return *I; 4946 } 4947 4948 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4949 std::copy(VTs, VTs+NumVTs, Array); 4950 SDVTList Result = makeVTList(Array, NumVTs); 4951 VTList.push_back(Result); 4952 return Result; 4953} 4954 4955 4956/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4957/// specified operands. If the resultant node already exists in the DAG, 4958/// this does not modify the specified node, instead it returns the node that 4959/// already exists. If the resultant node does not exist in the DAG, the 4960/// input node is returned. As a degenerate case, if you specify the same 4961/// input operands as the node already has, the input node is returned. 4962SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4963 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4964 4965 // Check to see if there is no change. 4966 if (Op == N->getOperand(0)) return N; 4967 4968 // See if the modified node already exists. 4969 void *InsertPos = 0; 4970 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4971 return Existing; 4972 4973 // Nope it doesn't. Remove the node from its current place in the maps. 4974 if (InsertPos) 4975 if (!RemoveNodeFromCSEMaps(N)) 4976 InsertPos = 0; 4977 4978 // Now we update the operands. 4979 N->OperandList[0].set(Op); 4980 4981 // If this gets put into a CSE map, add it. 4982 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4983 return N; 4984} 4985 4986SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4987 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4988 4989 // Check to see if there is no change. 4990 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4991 return N; // No operands changed, just return the input node. 4992 4993 // See if the modified node already exists. 4994 void *InsertPos = 0; 4995 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4996 return Existing; 4997 4998 // Nope it doesn't. Remove the node from its current place in the maps. 4999 if (InsertPos) 5000 if (!RemoveNodeFromCSEMaps(N)) 5001 InsertPos = 0; 5002 5003 // Now we update the operands. 5004 if (N->OperandList[0] != Op1) 5005 N->OperandList[0].set(Op1); 5006 if (N->OperandList[1] != Op2) 5007 N->OperandList[1].set(Op2); 5008 5009 // If this gets put into a CSE map, add it. 5010 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5011 return N; 5012} 5013 5014SDNode *SelectionDAG:: 5015UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 5016 SDValue Ops[] = { Op1, Op2, Op3 }; 5017 return UpdateNodeOperands(N, Ops, 3); 5018} 5019 5020SDNode *SelectionDAG:: 5021UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 5022 SDValue Op3, SDValue Op4) { 5023 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 5024 return UpdateNodeOperands(N, Ops, 4); 5025} 5026 5027SDNode *SelectionDAG:: 5028UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 5029 SDValue Op3, SDValue Op4, SDValue Op5) { 5030 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 5031 return UpdateNodeOperands(N, Ops, 5); 5032} 5033 5034SDNode *SelectionDAG:: 5035UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 5036 assert(N->getNumOperands() == NumOps && 5037 "Update with wrong number of operands"); 5038 5039 // Check to see if there is no change. 5040 bool AnyChange = false; 5041 for (unsigned i = 0; i != NumOps; ++i) { 5042 if (Ops[i] != N->getOperand(i)) { 5043 AnyChange = true; 5044 break; 5045 } 5046 } 5047 5048 // No operands changed, just return the input node. 5049 if (!AnyChange) return N; 5050 5051 // See if the modified node already exists. 5052 void *InsertPos = 0; 5053 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 5054 return Existing; 5055 5056 // Nope it doesn't. Remove the node from its current place in the maps. 5057 if (InsertPos) 5058 if (!RemoveNodeFromCSEMaps(N)) 5059 InsertPos = 0; 5060 5061 // Now we update the operands. 5062 for (unsigned i = 0; i != NumOps; ++i) 5063 if (N->OperandList[i] != Ops[i]) 5064 N->OperandList[i].set(Ops[i]); 5065 5066 // If this gets put into a CSE map, add it. 5067 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5068 return N; 5069} 5070 5071/// DropOperands - Release the operands and set this node to have 5072/// zero operands. 5073void SDNode::DropOperands() { 5074 // Unlike the code in MorphNodeTo that does this, we don't need to 5075 // watch for dead nodes here. 5076 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 5077 SDUse &Use = *I++; 5078 Use.set(SDValue()); 5079 } 5080} 5081 5082/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 5083/// machine opcode. 5084/// 5085SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5086 EVT VT) { 5087 SDVTList VTs = getVTList(VT); 5088 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 5089} 5090 5091SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5092 EVT VT, SDValue Op1) { 5093 SDVTList VTs = getVTList(VT); 5094 SDValue Ops[] = { Op1 }; 5095 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5096} 5097 5098SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5099 EVT VT, SDValue Op1, 5100 SDValue Op2) { 5101 SDVTList VTs = getVTList(VT); 5102 SDValue Ops[] = { Op1, Op2 }; 5103 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5104} 5105 5106SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5107 EVT VT, SDValue Op1, 5108 SDValue Op2, SDValue Op3) { 5109 SDVTList VTs = getVTList(VT); 5110 SDValue Ops[] = { Op1, Op2, Op3 }; 5111 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5112} 5113 5114SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5115 EVT VT, const SDValue *Ops, 5116 unsigned NumOps) { 5117 SDVTList VTs = getVTList(VT); 5118 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5119} 5120 5121SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5122 EVT VT1, EVT VT2, const SDValue *Ops, 5123 unsigned NumOps) { 5124 SDVTList VTs = getVTList(VT1, VT2); 5125 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5126} 5127 5128SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5129 EVT VT1, EVT VT2) { 5130 SDVTList VTs = getVTList(VT1, VT2); 5131 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 5132} 5133 5134SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5135 EVT VT1, EVT VT2, EVT VT3, 5136 const SDValue *Ops, unsigned NumOps) { 5137 SDVTList VTs = getVTList(VT1, VT2, VT3); 5138 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5139} 5140 5141SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5142 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 5143 const SDValue *Ops, unsigned NumOps) { 5144 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5145 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5146} 5147 5148SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5149 EVT VT1, EVT VT2, 5150 SDValue Op1) { 5151 SDVTList VTs = getVTList(VT1, VT2); 5152 SDValue Ops[] = { Op1 }; 5153 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5154} 5155 5156SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5157 EVT VT1, EVT VT2, 5158 SDValue Op1, SDValue Op2) { 5159 SDVTList VTs = getVTList(VT1, VT2); 5160 SDValue Ops[] = { Op1, Op2 }; 5161 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5162} 5163 5164SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5165 EVT VT1, EVT VT2, 5166 SDValue Op1, SDValue Op2, 5167 SDValue Op3) { 5168 SDVTList VTs = getVTList(VT1, VT2); 5169 SDValue Ops[] = { Op1, Op2, Op3 }; 5170 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5171} 5172 5173SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5174 EVT VT1, EVT VT2, EVT VT3, 5175 SDValue Op1, SDValue Op2, 5176 SDValue Op3) { 5177 SDVTList VTs = getVTList(VT1, VT2, VT3); 5178 SDValue Ops[] = { Op1, Op2, Op3 }; 5179 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5180} 5181 5182SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5183 SDVTList VTs, const SDValue *Ops, 5184 unsigned NumOps) { 5185 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 5186 // Reset the NodeID to -1. 5187 N->setNodeId(-1); 5188 return N; 5189} 5190 5191/// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away 5192/// the line number information on the merged node since it is not possible to 5193/// preserve the information that operation is associated with multiple lines. 5194/// This will make the debugger working better at -O0, were there is a higher 5195/// probability having other instructions associated with that line. 5196/// 5197/// For IROrder, we keep the smaller of the two 5198SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) { 5199 DebugLoc NLoc = N->getDebugLoc(); 5200 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && 5201 (OLoc.getDebugLoc() != NLoc)) { 5202 N->setDebugLoc(DebugLoc()); 5203 } 5204 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder()); 5205 N->setIROrder(Order); 5206 return N; 5207} 5208 5209/// MorphNodeTo - This *mutates* the specified node to have the specified 5210/// return type, opcode, and operands. 5211/// 5212/// Note that MorphNodeTo returns the resultant node. If there is already a 5213/// node of the specified opcode and operands, it returns that node instead of 5214/// the current one. Note that the SDLoc need not be the same. 5215/// 5216/// Using MorphNodeTo is faster than creating a new node and swapping it in 5217/// with ReplaceAllUsesWith both because it often avoids allocating a new 5218/// node, and because it doesn't require CSE recalculation for any of 5219/// the node's users. 5220/// 5221SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5222 SDVTList VTs, const SDValue *Ops, 5223 unsigned NumOps) { 5224 // If an identical node already exists, use it. 5225 void *IP = 0; 5226 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5227 FoldingSetNodeID ID; 5228 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5229 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5230 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N)); 5231 } 5232 5233 if (!RemoveNodeFromCSEMaps(N)) 5234 IP = 0; 5235 5236 // Start the morphing. 5237 N->NodeType = Opc; 5238 N->ValueList = VTs.VTs; 5239 N->NumValues = VTs.NumVTs; 5240 5241 // Clear the operands list, updating used nodes to remove this from their 5242 // use list. Keep track of any operands that become dead as a result. 5243 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5244 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5245 SDUse &Use = *I++; 5246 SDNode *Used = Use.getNode(); 5247 Use.set(SDValue()); 5248 if (Used->use_empty()) 5249 DeadNodeSet.insert(Used); 5250 } 5251 5252 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5253 // Initialize the memory references information. 5254 MN->setMemRefs(0, 0); 5255 // If NumOps is larger than the # of operands we can have in a 5256 // MachineSDNode, reallocate the operand list. 5257 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5258 if (MN->OperandsNeedDelete) 5259 delete[] MN->OperandList; 5260 if (NumOps > array_lengthof(MN->LocalOperands)) 5261 // We're creating a final node that will live unmorphed for the 5262 // remainder of the current SelectionDAG iteration, so we can allocate 5263 // the operands directly out of a pool with no recycling metadata. 5264 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5265 Ops, NumOps); 5266 else 5267 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5268 MN->OperandsNeedDelete = false; 5269 } else 5270 MN->InitOperands(MN->OperandList, Ops, NumOps); 5271 } else { 5272 // If NumOps is larger than the # of operands we currently have, reallocate 5273 // the operand list. 5274 if (NumOps > N->NumOperands) { 5275 if (N->OperandsNeedDelete) 5276 delete[] N->OperandList; 5277 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5278 N->OperandsNeedDelete = true; 5279 } else 5280 N->InitOperands(N->OperandList, Ops, NumOps); 5281 } 5282 5283 // Delete any nodes that are still dead after adding the uses for the 5284 // new operands. 5285 if (!DeadNodeSet.empty()) { 5286 SmallVector<SDNode *, 16> DeadNodes; 5287 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5288 E = DeadNodeSet.end(); I != E; ++I) 5289 if ((*I)->use_empty()) 5290 DeadNodes.push_back(*I); 5291 RemoveDeadNodes(DeadNodes); 5292 } 5293 5294 if (IP) 5295 CSEMap.InsertNode(N, IP); // Memoize the new node. 5296 return N; 5297} 5298 5299 5300/// getMachineNode - These are used for target selectors to create a new node 5301/// with specified return type(s), MachineInstr opcode, and operands. 5302/// 5303/// Note that getMachineNode returns the resultant node. If there is already a 5304/// node of the specified opcode and operands, it returns that node instead of 5305/// the current one. 5306MachineSDNode * 5307SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) { 5308 SDVTList VTs = getVTList(VT); 5309 return getMachineNode(Opcode, dl, VTs, None); 5310} 5311 5312MachineSDNode * 5313SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) { 5314 SDVTList VTs = getVTList(VT); 5315 SDValue Ops[] = { Op1 }; 5316 return getMachineNode(Opcode, dl, VTs, Ops); 5317} 5318 5319MachineSDNode * 5320SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5321 SDValue Op1, SDValue Op2) { 5322 SDVTList VTs = getVTList(VT); 5323 SDValue Ops[] = { Op1, Op2 }; 5324 return getMachineNode(Opcode, dl, VTs, Ops); 5325} 5326 5327MachineSDNode * 5328SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5329 SDValue Op1, SDValue Op2, SDValue Op3) { 5330 SDVTList VTs = getVTList(VT); 5331 SDValue Ops[] = { Op1, Op2, Op3 }; 5332 return getMachineNode(Opcode, dl, VTs, Ops); 5333} 5334 5335MachineSDNode * 5336SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5337 ArrayRef<SDValue> Ops) { 5338 SDVTList VTs = getVTList(VT); 5339 return getMachineNode(Opcode, dl, VTs, Ops); 5340} 5341 5342MachineSDNode * 5343SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) { 5344 SDVTList VTs = getVTList(VT1, VT2); 5345 return getMachineNode(Opcode, dl, VTs, None); 5346} 5347 5348MachineSDNode * 5349SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5350 EVT VT1, EVT VT2, SDValue Op1) { 5351 SDVTList VTs = getVTList(VT1, VT2); 5352 SDValue Ops[] = { Op1 }; 5353 return getMachineNode(Opcode, dl, VTs, Ops); 5354} 5355 5356MachineSDNode * 5357SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5358 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5359 SDVTList VTs = getVTList(VT1, VT2); 5360 SDValue Ops[] = { Op1, Op2 }; 5361 return getMachineNode(Opcode, dl, VTs, Ops); 5362} 5363 5364MachineSDNode * 5365SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5366 EVT VT1, EVT VT2, SDValue Op1, 5367 SDValue Op2, SDValue Op3) { 5368 SDVTList VTs = getVTList(VT1, VT2); 5369 SDValue Ops[] = { Op1, Op2, Op3 }; 5370 return getMachineNode(Opcode, dl, VTs, Ops); 5371} 5372 5373MachineSDNode * 5374SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5375 EVT VT1, EVT VT2, 5376 ArrayRef<SDValue> Ops) { 5377 SDVTList VTs = getVTList(VT1, VT2); 5378 return getMachineNode(Opcode, dl, VTs, Ops); 5379} 5380 5381MachineSDNode * 5382SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5383 EVT VT1, EVT VT2, EVT VT3, 5384 SDValue Op1, SDValue Op2) { 5385 SDVTList VTs = getVTList(VT1, VT2, VT3); 5386 SDValue Ops[] = { Op1, Op2 }; 5387 return getMachineNode(Opcode, dl, VTs, Ops); 5388} 5389 5390MachineSDNode * 5391SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5392 EVT VT1, EVT VT2, EVT VT3, 5393 SDValue Op1, SDValue Op2, SDValue Op3) { 5394 SDVTList VTs = getVTList(VT1, VT2, VT3); 5395 SDValue Ops[] = { Op1, Op2, Op3 }; 5396 return getMachineNode(Opcode, dl, VTs, Ops); 5397} 5398 5399MachineSDNode * 5400SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5401 EVT VT1, EVT VT2, EVT VT3, 5402 ArrayRef<SDValue> Ops) { 5403 SDVTList VTs = getVTList(VT1, VT2, VT3); 5404 return getMachineNode(Opcode, dl, VTs, Ops); 5405} 5406 5407MachineSDNode * 5408SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, 5409 EVT VT2, EVT VT3, EVT VT4, 5410 ArrayRef<SDValue> Ops) { 5411 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5412 return getMachineNode(Opcode, dl, VTs, Ops); 5413} 5414 5415MachineSDNode * 5416SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5417 ArrayRef<EVT> ResultTys, 5418 ArrayRef<SDValue> Ops) { 5419 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5420 return getMachineNode(Opcode, dl, VTs, Ops); 5421} 5422 5423MachineSDNode * 5424SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 5425 ArrayRef<SDValue> OpsArray) { 5426 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5427 MachineSDNode *N; 5428 void *IP = 0; 5429 const SDValue *Ops = OpsArray.data(); 5430 unsigned NumOps = OpsArray.size(); 5431 5432 if (DoCSE) { 5433 FoldingSetNodeID ID; 5434 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5435 IP = 0; 5436 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5437 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL)); 5438 } 5439 } 5440 5441 // Allocate a new MachineSDNode. 5442 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(), 5443 DL.getDebugLoc(), VTs); 5444 5445 // Initialize the operands list. 5446 if (NumOps > array_lengthof(N->LocalOperands)) 5447 // We're creating a final node that will live unmorphed for the 5448 // remainder of the current SelectionDAG iteration, so we can allocate 5449 // the operands directly out of a pool with no recycling metadata. 5450 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5451 Ops, NumOps); 5452 else 5453 N->InitOperands(N->LocalOperands, Ops, NumOps); 5454 N->OperandsNeedDelete = false; 5455 5456 if (DoCSE) 5457 CSEMap.InsertNode(N, IP); 5458 5459 AllNodes.push_back(N); 5460#ifndef NDEBUG 5461 VerifyMachineNode(N); 5462#endif 5463 return N; 5464} 5465 5466/// getTargetExtractSubreg - A convenience function for creating 5467/// TargetOpcode::EXTRACT_SUBREG nodes. 5468SDValue 5469SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, 5470 SDValue Operand) { 5471 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5472 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5473 VT, Operand, SRIdxVal); 5474 return SDValue(Subreg, 0); 5475} 5476 5477/// getTargetInsertSubreg - A convenience function for creating 5478/// TargetOpcode::INSERT_SUBREG nodes. 5479SDValue 5480SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, 5481 SDValue Operand, SDValue Subreg) { 5482 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5483 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5484 VT, Operand, Subreg, SRIdxVal); 5485 return SDValue(Result, 0); 5486} 5487 5488/// getNodeIfExists - Get the specified node if it's already available, or 5489/// else return NULL. 5490SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5491 const SDValue *Ops, unsigned NumOps) { 5492 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5493 FoldingSetNodeID ID; 5494 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5495 void *IP = 0; 5496 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5497 return E; 5498 } 5499 return NULL; 5500} 5501 5502/// getDbgValue - Creates a SDDbgValue node. 5503/// 5504SDDbgValue * 5505SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5506 DebugLoc DL, unsigned O) { 5507 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5508} 5509 5510SDDbgValue * 5511SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5512 DebugLoc DL, unsigned O) { 5513 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5514} 5515 5516SDDbgValue * 5517SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5518 DebugLoc DL, unsigned O) { 5519 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5520} 5521 5522namespace { 5523 5524/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5525/// pointed to by a use iterator is deleted, increment the use iterator 5526/// so that it doesn't dangle. 5527/// 5528class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5529 SDNode::use_iterator &UI; 5530 SDNode::use_iterator &UE; 5531 5532 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5533 // Increment the iterator as needed. 5534 while (UI != UE && N == *UI) 5535 ++UI; 5536 } 5537 5538public: 5539 RAUWUpdateListener(SelectionDAG &d, 5540 SDNode::use_iterator &ui, 5541 SDNode::use_iterator &ue) 5542 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5543}; 5544 5545} 5546 5547/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5548/// This can cause recursive merging of nodes in the DAG. 5549/// 5550/// This version assumes From has a single result value. 5551/// 5552void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5553 SDNode *From = FromN.getNode(); 5554 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5555 "Cannot replace with this method!"); 5556 assert(From != To.getNode() && "Cannot replace uses of with self"); 5557 5558 // Iterate over all the existing uses of From. New uses will be added 5559 // to the beginning of the use list, which we avoid visiting. 5560 // This specifically avoids visiting uses of From that arise while the 5561 // replacement is happening, because any such uses would be the result 5562 // of CSE: If an existing node looks like From after one of its operands 5563 // is replaced by To, we don't want to replace of all its users with To 5564 // too. See PR3018 for more info. 5565 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5566 RAUWUpdateListener Listener(*this, UI, UE); 5567 while (UI != UE) { 5568 SDNode *User = *UI; 5569 5570 // This node is about to morph, remove its old self from the CSE maps. 5571 RemoveNodeFromCSEMaps(User); 5572 5573 // A user can appear in a use list multiple times, and when this 5574 // happens the uses are usually next to each other in the list. 5575 // To help reduce the number of CSE recomputations, process all 5576 // the uses of this user that we can find this way. 5577 do { 5578 SDUse &Use = UI.getUse(); 5579 ++UI; 5580 Use.set(To); 5581 } while (UI != UE && *UI == User); 5582 5583 // Now that we have modified User, add it back to the CSE maps. If it 5584 // already exists there, recursively merge the results together. 5585 AddModifiedNodeToCSEMaps(User); 5586 } 5587 5588 // If we just RAUW'd the root, take note. 5589 if (FromN == getRoot()) 5590 setRoot(To); 5591} 5592 5593/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5594/// This can cause recursive merging of nodes in the DAG. 5595/// 5596/// This version assumes that for each value of From, there is a 5597/// corresponding value in To in the same position with the same type. 5598/// 5599void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5600#ifndef NDEBUG 5601 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5602 assert((!From->hasAnyUseOfValue(i) || 5603 From->getValueType(i) == To->getValueType(i)) && 5604 "Cannot use this version of ReplaceAllUsesWith!"); 5605#endif 5606 5607 // Handle the trivial case. 5608 if (From == To) 5609 return; 5610 5611 // Iterate over just the existing users of From. See the comments in 5612 // the ReplaceAllUsesWith above. 5613 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5614 RAUWUpdateListener Listener(*this, UI, UE); 5615 while (UI != UE) { 5616 SDNode *User = *UI; 5617 5618 // This node is about to morph, remove its old self from the CSE maps. 5619 RemoveNodeFromCSEMaps(User); 5620 5621 // A user can appear in a use list multiple times, and when this 5622 // happens the uses are usually next to each other in the list. 5623 // To help reduce the number of CSE recomputations, process all 5624 // the uses of this user that we can find this way. 5625 do { 5626 SDUse &Use = UI.getUse(); 5627 ++UI; 5628 Use.setNode(To); 5629 } while (UI != UE && *UI == User); 5630 5631 // Now that we have modified User, add it back to the CSE maps. If it 5632 // already exists there, recursively merge the results together. 5633 AddModifiedNodeToCSEMaps(User); 5634 } 5635 5636 // If we just RAUW'd the root, take note. 5637 if (From == getRoot().getNode()) 5638 setRoot(SDValue(To, getRoot().getResNo())); 5639} 5640 5641/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5642/// This can cause recursive merging of nodes in the DAG. 5643/// 5644/// This version can replace From with any result values. To must match the 5645/// number and types of values returned by From. 5646void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5647 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5648 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5649 5650 // Iterate over just the existing users of From. See the comments in 5651 // the ReplaceAllUsesWith above. 5652 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5653 RAUWUpdateListener Listener(*this, UI, UE); 5654 while (UI != UE) { 5655 SDNode *User = *UI; 5656 5657 // This node is about to morph, remove its old self from the CSE maps. 5658 RemoveNodeFromCSEMaps(User); 5659 5660 // A user can appear in a use list multiple times, and when this 5661 // happens the uses are usually next to each other in the list. 5662 // To help reduce the number of CSE recomputations, process all 5663 // the uses of this user that we can find this way. 5664 do { 5665 SDUse &Use = UI.getUse(); 5666 const SDValue &ToOp = To[Use.getResNo()]; 5667 ++UI; 5668 Use.set(ToOp); 5669 } while (UI != UE && *UI == User); 5670 5671 // Now that we have modified User, add it back to the CSE maps. If it 5672 // already exists there, recursively merge the results together. 5673 AddModifiedNodeToCSEMaps(User); 5674 } 5675 5676 // If we just RAUW'd the root, take note. 5677 if (From == getRoot().getNode()) 5678 setRoot(SDValue(To[getRoot().getResNo()])); 5679} 5680 5681/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5682/// uses of other values produced by From.getNode() alone. The Deleted 5683/// vector is handled the same way as for ReplaceAllUsesWith. 5684void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5685 // Handle the really simple, really trivial case efficiently. 5686 if (From == To) return; 5687 5688 // Handle the simple, trivial, case efficiently. 5689 if (From.getNode()->getNumValues() == 1) { 5690 ReplaceAllUsesWith(From, To); 5691 return; 5692 } 5693 5694 // Iterate over just the existing users of From. See the comments in 5695 // the ReplaceAllUsesWith above. 5696 SDNode::use_iterator UI = From.getNode()->use_begin(), 5697 UE = From.getNode()->use_end(); 5698 RAUWUpdateListener Listener(*this, UI, UE); 5699 while (UI != UE) { 5700 SDNode *User = *UI; 5701 bool UserRemovedFromCSEMaps = false; 5702 5703 // A user can appear in a use list multiple times, and when this 5704 // happens the uses are usually next to each other in the list. 5705 // To help reduce the number of CSE recomputations, process all 5706 // the uses of this user that we can find this way. 5707 do { 5708 SDUse &Use = UI.getUse(); 5709 5710 // Skip uses of different values from the same node. 5711 if (Use.getResNo() != From.getResNo()) { 5712 ++UI; 5713 continue; 5714 } 5715 5716 // If this node hasn't been modified yet, it's still in the CSE maps, 5717 // so remove its old self from the CSE maps. 5718 if (!UserRemovedFromCSEMaps) { 5719 RemoveNodeFromCSEMaps(User); 5720 UserRemovedFromCSEMaps = true; 5721 } 5722 5723 ++UI; 5724 Use.set(To); 5725 } while (UI != UE && *UI == User); 5726 5727 // We are iterating over all uses of the From node, so if a use 5728 // doesn't use the specific value, no changes are made. 5729 if (!UserRemovedFromCSEMaps) 5730 continue; 5731 5732 // Now that we have modified User, add it back to the CSE maps. If it 5733 // already exists there, recursively merge the results together. 5734 AddModifiedNodeToCSEMaps(User); 5735 } 5736 5737 // If we just RAUW'd the root, take note. 5738 if (From == getRoot()) 5739 setRoot(To); 5740} 5741 5742namespace { 5743 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5744 /// to record information about a use. 5745 struct UseMemo { 5746 SDNode *User; 5747 unsigned Index; 5748 SDUse *Use; 5749 }; 5750 5751 /// operator< - Sort Memos by User. 5752 bool operator<(const UseMemo &L, const UseMemo &R) { 5753 return (intptr_t)L.User < (intptr_t)R.User; 5754 } 5755} 5756 5757/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5758/// uses of other values produced by From.getNode() alone. The same value 5759/// may appear in both the From and To list. The Deleted vector is 5760/// handled the same way as for ReplaceAllUsesWith. 5761void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5762 const SDValue *To, 5763 unsigned Num){ 5764 // Handle the simple, trivial case efficiently. 5765 if (Num == 1) 5766 return ReplaceAllUsesOfValueWith(*From, *To); 5767 5768 // Read up all the uses and make records of them. This helps 5769 // processing new uses that are introduced during the 5770 // replacement process. 5771 SmallVector<UseMemo, 4> Uses; 5772 for (unsigned i = 0; i != Num; ++i) { 5773 unsigned FromResNo = From[i].getResNo(); 5774 SDNode *FromNode = From[i].getNode(); 5775 for (SDNode::use_iterator UI = FromNode->use_begin(), 5776 E = FromNode->use_end(); UI != E; ++UI) { 5777 SDUse &Use = UI.getUse(); 5778 if (Use.getResNo() == FromResNo) { 5779 UseMemo Memo = { *UI, i, &Use }; 5780 Uses.push_back(Memo); 5781 } 5782 } 5783 } 5784 5785 // Sort the uses, so that all the uses from a given User are together. 5786 std::sort(Uses.begin(), Uses.end()); 5787 5788 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5789 UseIndex != UseIndexEnd; ) { 5790 // We know that this user uses some value of From. If it is the right 5791 // value, update it. 5792 SDNode *User = Uses[UseIndex].User; 5793 5794 // This node is about to morph, remove its old self from the CSE maps. 5795 RemoveNodeFromCSEMaps(User); 5796 5797 // The Uses array is sorted, so all the uses for a given User 5798 // are next to each other in the list. 5799 // To help reduce the number of CSE recomputations, process all 5800 // the uses of this user that we can find this way. 5801 do { 5802 unsigned i = Uses[UseIndex].Index; 5803 SDUse &Use = *Uses[UseIndex].Use; 5804 ++UseIndex; 5805 5806 Use.set(To[i]); 5807 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5808 5809 // Now that we have modified User, add it back to the CSE maps. If it 5810 // already exists there, recursively merge the results together. 5811 AddModifiedNodeToCSEMaps(User); 5812 } 5813} 5814 5815/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5816/// based on their topological order. It returns the maximum id and a vector 5817/// of the SDNodes* in assigned order by reference. 5818unsigned SelectionDAG::AssignTopologicalOrder() { 5819 5820 unsigned DAGSize = 0; 5821 5822 // SortedPos tracks the progress of the algorithm. Nodes before it are 5823 // sorted, nodes after it are unsorted. When the algorithm completes 5824 // it is at the end of the list. 5825 allnodes_iterator SortedPos = allnodes_begin(); 5826 5827 // Visit all the nodes. Move nodes with no operands to the front of 5828 // the list immediately. Annotate nodes that do have operands with their 5829 // operand count. Before we do this, the Node Id fields of the nodes 5830 // may contain arbitrary values. After, the Node Id fields for nodes 5831 // before SortedPos will contain the topological sort index, and the 5832 // Node Id fields for nodes At SortedPos and after will contain the 5833 // count of outstanding operands. 5834 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5835 SDNode *N = I++; 5836 checkForCycles(N); 5837 unsigned Degree = N->getNumOperands(); 5838 if (Degree == 0) { 5839 // A node with no uses, add it to the result array immediately. 5840 N->setNodeId(DAGSize++); 5841 allnodes_iterator Q = N; 5842 if (Q != SortedPos) 5843 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5844 assert(SortedPos != AllNodes.end() && "Overran node list"); 5845 ++SortedPos; 5846 } else { 5847 // Temporarily use the Node Id as scratch space for the degree count. 5848 N->setNodeId(Degree); 5849 } 5850 } 5851 5852 // Visit all the nodes. As we iterate, move nodes into sorted order, 5853 // such that by the time the end is reached all nodes will be sorted. 5854 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5855 SDNode *N = I; 5856 checkForCycles(N); 5857 // N is in sorted position, so all its uses have one less operand 5858 // that needs to be sorted. 5859 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5860 UI != UE; ++UI) { 5861 SDNode *P = *UI; 5862 unsigned Degree = P->getNodeId(); 5863 assert(Degree != 0 && "Invalid node degree"); 5864 --Degree; 5865 if (Degree == 0) { 5866 // All of P's operands are sorted, so P may sorted now. 5867 P->setNodeId(DAGSize++); 5868 if (P != SortedPos) 5869 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5870 assert(SortedPos != AllNodes.end() && "Overran node list"); 5871 ++SortedPos; 5872 } else { 5873 // Update P's outstanding operand count. 5874 P->setNodeId(Degree); 5875 } 5876 } 5877 if (I == SortedPos) { 5878#ifndef NDEBUG 5879 SDNode *S = ++I; 5880 dbgs() << "Overran sorted position:\n"; 5881 S->dumprFull(); 5882#endif 5883 llvm_unreachable(0); 5884 } 5885 } 5886 5887 assert(SortedPos == AllNodes.end() && 5888 "Topological sort incomplete!"); 5889 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5890 "First node in topological sort is not the entry token!"); 5891 assert(AllNodes.front().getNodeId() == 0 && 5892 "First node in topological sort has non-zero id!"); 5893 assert(AllNodes.front().getNumOperands() == 0 && 5894 "First node in topological sort has operands!"); 5895 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5896 "Last node in topologic sort has unexpected id!"); 5897 assert(AllNodes.back().use_empty() && 5898 "Last node in topologic sort has users!"); 5899 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5900 return DAGSize; 5901} 5902 5903/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5904/// value is produced by SD. 5905void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5906 DbgInfo->add(DB, SD, isParameter); 5907 if (SD) 5908 SD->setHasDebugValue(true); 5909} 5910 5911/// TransferDbgValues - Transfer SDDbgValues. 5912void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5913 if (From == To || !From.getNode()->getHasDebugValue()) 5914 return; 5915 SDNode *FromNode = From.getNode(); 5916 SDNode *ToNode = To.getNode(); 5917 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5918 SmallVector<SDDbgValue *, 2> ClonedDVs; 5919 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5920 I != E; ++I) { 5921 SDDbgValue *Dbg = *I; 5922 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5923 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5924 Dbg->getOffset(), Dbg->getDebugLoc(), 5925 Dbg->getOrder()); 5926 ClonedDVs.push_back(Clone); 5927 } 5928 } 5929 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(), 5930 E = ClonedDVs.end(); I != E; ++I) 5931 AddDbgValue(*I, ToNode, false); 5932} 5933 5934//===----------------------------------------------------------------------===// 5935// SDNode Class 5936//===----------------------------------------------------------------------===// 5937 5938HandleSDNode::~HandleSDNode() { 5939 DropOperands(); 5940} 5941 5942GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order, 5943 DebugLoc DL, const GlobalValue *GA, 5944 EVT VT, int64_t o, unsigned char TF) 5945 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5946 TheGlobal = GA; 5947} 5948 5949MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, 5950 EVT memvt, MachineMemOperand *mmo) 5951 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5952 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5953 MMO->isNonTemporal(), MMO->isInvariant()); 5954 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5955 assert(isNonTemporal() == MMO->isNonTemporal() && 5956 "Non-temporal encoding error!"); 5957 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5958} 5959 5960MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, 5961 const SDValue *Ops, unsigned NumOps, EVT memvt, 5962 MachineMemOperand *mmo) 5963 : SDNode(Opc, Order, dl, VTs, Ops, NumOps), 5964 MemoryVT(memvt), MMO(mmo) { 5965 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5966 MMO->isNonTemporal(), MMO->isInvariant()); 5967 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5968 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5969} 5970 5971/// Profile - Gather unique data for the node. 5972/// 5973void SDNode::Profile(FoldingSetNodeID &ID) const { 5974 AddNodeIDNode(ID, this); 5975} 5976 5977namespace { 5978 struct EVTArray { 5979 std::vector<EVT> VTs; 5980 5981 EVTArray() { 5982 VTs.reserve(MVT::LAST_VALUETYPE); 5983 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5984 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5985 } 5986 }; 5987} 5988 5989static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5990static ManagedStatic<EVTArray> SimpleVTArray; 5991static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5992 5993/// getValueTypeList - Return a pointer to the specified value type. 5994/// 5995const EVT *SDNode::getValueTypeList(EVT VT) { 5996 if (VT.isExtended()) { 5997 sys::SmartScopedLock<true> Lock(*VTMutex); 5998 return &(*EVTs->insert(VT).first); 5999 } else { 6000 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 6001 "Value type out of range!"); 6002 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 6003 } 6004} 6005 6006/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 6007/// indicated value. This method ignores uses of other values defined by this 6008/// operation. 6009bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 6010 assert(Value < getNumValues() && "Bad value!"); 6011 6012 // TODO: Only iterate over uses of a given value of the node 6013 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 6014 if (UI.getUse().getResNo() == Value) { 6015 if (NUses == 0) 6016 return false; 6017 --NUses; 6018 } 6019 } 6020 6021 // Found exactly the right number of uses? 6022 return NUses == 0; 6023} 6024 6025 6026/// hasAnyUseOfValue - Return true if there are any use of the indicated 6027/// value. This method ignores uses of other values defined by this operation. 6028bool SDNode::hasAnyUseOfValue(unsigned Value) const { 6029 assert(Value < getNumValues() && "Bad value!"); 6030 6031 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 6032 if (UI.getUse().getResNo() == Value) 6033 return true; 6034 6035 return false; 6036} 6037 6038 6039/// isOnlyUserOf - Return true if this node is the only use of N. 6040/// 6041bool SDNode::isOnlyUserOf(SDNode *N) const { 6042 bool Seen = false; 6043 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 6044 SDNode *User = *I; 6045 if (User == this) 6046 Seen = true; 6047 else 6048 return false; 6049 } 6050 6051 return Seen; 6052} 6053 6054/// isOperand - Return true if this node is an operand of N. 6055/// 6056bool SDValue::isOperandOf(SDNode *N) const { 6057 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6058 if (*this == N->getOperand(i)) 6059 return true; 6060 return false; 6061} 6062 6063bool SDNode::isOperandOf(SDNode *N) const { 6064 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 6065 if (this == N->OperandList[i].getNode()) 6066 return true; 6067 return false; 6068} 6069 6070/// reachesChainWithoutSideEffects - Return true if this operand (which must 6071/// be a chain) reaches the specified operand without crossing any 6072/// side-effecting instructions on any chain path. In practice, this looks 6073/// through token factors and non-volatile loads. In order to remain efficient, 6074/// this only looks a couple of nodes in, it does not do an exhaustive search. 6075bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 6076 unsigned Depth) const { 6077 if (*this == Dest) return true; 6078 6079 // Don't search too deeply, we just want to be able to see through 6080 // TokenFactor's etc. 6081 if (Depth == 0) return false; 6082 6083 // If this is a token factor, all inputs to the TF happen in parallel. If any 6084 // of the operands of the TF does not reach dest, then we cannot do the xform. 6085 if (getOpcode() == ISD::TokenFactor) { 6086 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 6087 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 6088 return false; 6089 return true; 6090 } 6091 6092 // Loads don't have side effects, look through them. 6093 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 6094 if (!Ld->isVolatile()) 6095 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 6096 } 6097 return false; 6098} 6099 6100/// hasPredecessor - Return true if N is a predecessor of this node. 6101/// N is either an operand of this node, or can be reached by recursively 6102/// traversing up the operands. 6103/// NOTE: This is an expensive method. Use it carefully. 6104bool SDNode::hasPredecessor(const SDNode *N) const { 6105 SmallPtrSet<const SDNode *, 32> Visited; 6106 SmallVector<const SDNode *, 16> Worklist; 6107 return hasPredecessorHelper(N, Visited, Worklist); 6108} 6109 6110bool 6111SDNode::hasPredecessorHelper(const SDNode *N, 6112 SmallPtrSet<const SDNode *, 32> &Visited, 6113 SmallVectorImpl<const SDNode *> &Worklist) const { 6114 if (Visited.empty()) { 6115 Worklist.push_back(this); 6116 } else { 6117 // Take a look in the visited set. If we've already encountered this node 6118 // we needn't search further. 6119 if (Visited.count(N)) 6120 return true; 6121 } 6122 6123 // Haven't visited N yet. Continue the search. 6124 while (!Worklist.empty()) { 6125 const SDNode *M = Worklist.pop_back_val(); 6126 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 6127 SDNode *Op = M->getOperand(i).getNode(); 6128 if (Visited.insert(Op)) 6129 Worklist.push_back(Op); 6130 if (Op == N) 6131 return true; 6132 } 6133 } 6134 6135 return false; 6136} 6137 6138uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 6139 assert(Num < NumOperands && "Invalid child # of SDNode!"); 6140 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 6141} 6142 6143SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6144 assert(N->getNumValues() == 1 && 6145 "Can't unroll a vector with multiple results!"); 6146 6147 EVT VT = N->getValueType(0); 6148 unsigned NE = VT.getVectorNumElements(); 6149 EVT EltVT = VT.getVectorElementType(); 6150 SDLoc dl(N); 6151 6152 SmallVector<SDValue, 8> Scalars; 6153 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6154 6155 // If ResNE is 0, fully unroll the vector op. 6156 if (ResNE == 0) 6157 ResNE = NE; 6158 else if (NE > ResNE) 6159 NE = ResNE; 6160 6161 unsigned i; 6162 for (i= 0; i != NE; ++i) { 6163 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6164 SDValue Operand = N->getOperand(j); 6165 EVT OperandVT = Operand.getValueType(); 6166 if (OperandVT.isVector()) { 6167 // A vector operand; extract a single element. 6168 const TargetLowering *TLI = TM.getTargetLowering(); 6169 EVT OperandEltVT = OperandVT.getVectorElementType(); 6170 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6171 OperandEltVT, 6172 Operand, 6173 getConstant(i, TLI->getVectorIdxTy())); 6174 } else { 6175 // A scalar operand; just use it as is. 6176 Operands[j] = Operand; 6177 } 6178 } 6179 6180 switch (N->getOpcode()) { 6181 default: 6182 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6183 &Operands[0], Operands.size())); 6184 break; 6185 case ISD::VSELECT: 6186 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6187 &Operands[0], Operands.size())); 6188 break; 6189 case ISD::SHL: 6190 case ISD::SRA: 6191 case ISD::SRL: 6192 case ISD::ROTL: 6193 case ISD::ROTR: 6194 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6195 getShiftAmountOperand(Operands[0].getValueType(), 6196 Operands[1]))); 6197 break; 6198 case ISD::SIGN_EXTEND_INREG: 6199 case ISD::FP_ROUND_INREG: { 6200 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6201 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6202 Operands[0], 6203 getValueType(ExtVT))); 6204 } 6205 } 6206 } 6207 6208 for (; i < ResNE; ++i) 6209 Scalars.push_back(getUNDEF(EltVT)); 6210 6211 return getNode(ISD::BUILD_VECTOR, dl, 6212 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6213 &Scalars[0], Scalars.size()); 6214} 6215 6216 6217/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6218/// location that is 'Dist' units away from the location that the 'Base' load 6219/// is loading from. 6220bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6221 unsigned Bytes, int Dist) const { 6222 if (LD->getChain() != Base->getChain()) 6223 return false; 6224 EVT VT = LD->getValueType(0); 6225 if (VT.getSizeInBits() / 8 != Bytes) 6226 return false; 6227 6228 SDValue Loc = LD->getOperand(1); 6229 SDValue BaseLoc = Base->getOperand(1); 6230 if (Loc.getOpcode() == ISD::FrameIndex) { 6231 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6232 return false; 6233 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6234 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6235 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6236 int FS = MFI->getObjectSize(FI); 6237 int BFS = MFI->getObjectSize(BFI); 6238 if (FS != BFS || FS != (int)Bytes) return false; 6239 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6240 } 6241 6242 // Handle X+C 6243 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6244 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6245 return true; 6246 6247 const GlobalValue *GV1 = NULL; 6248 const GlobalValue *GV2 = NULL; 6249 int64_t Offset1 = 0; 6250 int64_t Offset2 = 0; 6251 const TargetLowering *TLI = TM.getTargetLowering(); 6252 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6253 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6254 if (isGA1 && isGA2 && GV1 == GV2) 6255 return Offset1 == (Offset2 + Dist*Bytes); 6256 return false; 6257} 6258 6259 6260/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6261/// it cannot be inferred. 6262unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6263 // If this is a GlobalAddress + cst, return the alignment. 6264 const GlobalValue *GV; 6265 int64_t GVOffset = 0; 6266 const TargetLowering *TLI = TM.getTargetLowering(); 6267 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6268 unsigned PtrWidth = TLI->getPointerTy().getSizeInBits(); 6269 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6270 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6271 TLI->getDataLayout()); 6272 unsigned AlignBits = KnownZero.countTrailingOnes(); 6273 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6274 if (Align) 6275 return MinAlign(Align, GVOffset); 6276 } 6277 6278 // If this is a direct reference to a stack slot, use information about the 6279 // stack slot's alignment. 6280 int FrameIdx = 1 << 31; 6281 int64_t FrameOffset = 0; 6282 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6283 FrameIdx = FI->getIndex(); 6284 } else if (isBaseWithConstantOffset(Ptr) && 6285 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6286 // Handle FI+Cst 6287 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6288 FrameOffset = Ptr.getConstantOperandVal(1); 6289 } 6290 6291 if (FrameIdx != (1 << 31)) { 6292 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6293 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6294 FrameOffset); 6295 return FIInfoAlign; 6296 } 6297 6298 return 0; 6299} 6300 6301// getAddressSpace - Return the address space this GlobalAddress belongs to. 6302unsigned GlobalAddressSDNode::getAddressSpace() const { 6303 return getGlobal()->getType()->getAddressSpace(); 6304} 6305 6306 6307Type *ConstantPoolSDNode::getType() const { 6308 if (isMachineConstantPoolEntry()) 6309 return Val.MachineCPVal->getType(); 6310 return Val.ConstVal->getType(); 6311} 6312 6313bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6314 APInt &SplatUndef, 6315 unsigned &SplatBitSize, 6316 bool &HasAnyUndefs, 6317 unsigned MinSplatBits, 6318 bool isBigEndian) { 6319 EVT VT = getValueType(0); 6320 assert(VT.isVector() && "Expected a vector type"); 6321 unsigned sz = VT.getSizeInBits(); 6322 if (MinSplatBits > sz) 6323 return false; 6324 6325 SplatValue = APInt(sz, 0); 6326 SplatUndef = APInt(sz, 0); 6327 6328 // Get the bits. Bits with undefined values (when the corresponding element 6329 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6330 // in SplatValue. If any of the values are not constant, give up and return 6331 // false. 6332 unsigned int nOps = getNumOperands(); 6333 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6334 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6335 6336 for (unsigned j = 0; j < nOps; ++j) { 6337 unsigned i = isBigEndian ? nOps-1-j : j; 6338 SDValue OpVal = getOperand(i); 6339 unsigned BitPos = j * EltBitSize; 6340 6341 if (OpVal.getOpcode() == ISD::UNDEF) 6342 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6343 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6344 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6345 zextOrTrunc(sz) << BitPos; 6346 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6347 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6348 else 6349 return false; 6350 } 6351 6352 // The build_vector is all constants or undefs. Find the smallest element 6353 // size that splats the vector. 6354 6355 HasAnyUndefs = (SplatUndef != 0); 6356 while (sz > 8) { 6357 6358 unsigned HalfSize = sz / 2; 6359 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6360 APInt LowValue = SplatValue.trunc(HalfSize); 6361 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6362 APInt LowUndef = SplatUndef.trunc(HalfSize); 6363 6364 // If the two halves do not match (ignoring undef bits), stop here. 6365 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6366 MinSplatBits > HalfSize) 6367 break; 6368 6369 SplatValue = HighValue | LowValue; 6370 SplatUndef = HighUndef & LowUndef; 6371 6372 sz = HalfSize; 6373 } 6374 6375 SplatBitSize = sz; 6376 return true; 6377} 6378 6379bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6380 // Find the first non-undef value in the shuffle mask. 6381 unsigned i, e; 6382 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6383 /* search */; 6384 6385 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6386 6387 // Make sure all remaining elements are either undef or the same as the first 6388 // non-undef value. 6389 for (int Idx = Mask[i]; i != e; ++i) 6390 if (Mask[i] >= 0 && Mask[i] != Idx) 6391 return false; 6392 return true; 6393} 6394 6395#ifdef XDEBUG 6396static void checkForCyclesHelper(const SDNode *N, 6397 SmallPtrSet<const SDNode*, 32> &Visited, 6398 SmallPtrSet<const SDNode*, 32> &Checked) { 6399 // If this node has already been checked, don't check it again. 6400 if (Checked.count(N)) 6401 return; 6402 6403 // If a node has already been visited on this depth-first walk, reject it as 6404 // a cycle. 6405 if (!Visited.insert(N)) { 6406 dbgs() << "Offending node:\n"; 6407 N->dumprFull(); 6408 errs() << "Detected cycle in SelectionDAG\n"; 6409 abort(); 6410 } 6411 6412 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6413 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6414 6415 Checked.insert(N); 6416 Visited.erase(N); 6417} 6418#endif 6419 6420void llvm::checkForCycles(const llvm::SDNode *N) { 6421#ifdef XDEBUG 6422 assert(N && "Checking nonexistant SDNode"); 6423 SmallPtrSet<const SDNode*, 32> visited; 6424 SmallPtrSet<const SDNode*, 32> checked; 6425 checkForCyclesHelper(N, visited, checked); 6426#endif 6427} 6428 6429void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6430 checkForCycles(DAG->getRoot().getNode()); 6431} 6432