SelectionDAG.cpp revision 26c8dcc692fb2addd475446cfff24d6a4e958bca
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetSelectionDAGInfo.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Support/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BITCAST) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. We have to be a bit careful here, as the type of the constant 128 // may not be the same as the type of the vector elements due to type 129 // legalization (the elements are promoted to a legal type for the target and 130 // a vector of a type may be legal when the base element type is not). 131 // We only want to check enough bits to cover the vector elements, because 132 // we care if the resultant vector is all ones, not whether the individual 133 // constants are. 134 SDValue NotZero = N->getOperand(i); 135 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 136 if (isa<ConstantSDNode>(NotZero)) { 137 if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes() < 138 EltSize) 139 return false; 140 } else if (isa<ConstantFPSDNode>(NotZero)) { 141 if (cast<ConstantFPSDNode>(NotZero)->getValueAPF() 142 .bitcastToAPInt().countTrailingOnes() < EltSize) 143 return false; 144 } else 145 return false; 146 147 // Okay, we have at least one ~0 value, check to see if the rest match or are 148 // undefs. Even with the above element type twiddling, this should be OK, as 149 // the same type legalization should have applied to all the elements. 150 for (++i; i != e; ++i) 151 if (N->getOperand(i) != NotZero && 152 N->getOperand(i).getOpcode() != ISD::UNDEF) 153 return false; 154 return true; 155} 156 157 158/// isBuildVectorAllZeros - Return true if the specified node is a 159/// BUILD_VECTOR where all of the elements are 0 or undef. 160bool ISD::isBuildVectorAllZeros(const SDNode *N) { 161 // Look through a bit convert. 162 if (N->getOpcode() == ISD::BITCAST) 163 N = N->getOperand(0).getNode(); 164 165 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 166 167 unsigned i = 0, e = N->getNumOperands(); 168 169 // Skip over all of the undef values. 170 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 171 ++i; 172 173 // Do not accept an all-undef vector. 174 if (i == e) return false; 175 176 // Do not accept build_vectors that aren't all constants or which have non-0 177 // elements. 178 SDValue Zero = N->getOperand(i); 179 if (isa<ConstantSDNode>(Zero)) { 180 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 181 return false; 182 } else if (isa<ConstantFPSDNode>(Zero)) { 183 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 184 return false; 185 } else 186 return false; 187 188 // Okay, we have at least one 0 value, check to see if the rest match or are 189 // undefs. 190 for (++i; i != e; ++i) 191 if (N->getOperand(i) != Zero && 192 N->getOperand(i).getOpcode() != ISD::UNDEF) 193 return false; 194 return true; 195} 196 197/// isScalarToVector - Return true if the specified node is a 198/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 199/// element is not an undef. 200bool ISD::isScalarToVector(const SDNode *N) { 201 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 202 return true; 203 204 if (N->getOpcode() != ISD::BUILD_VECTOR) 205 return false; 206 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 207 return false; 208 unsigned NumElems = N->getNumOperands(); 209 if (NumElems == 1) 210 return false; 211 for (unsigned i = 1; i < NumElems; ++i) { 212 SDValue V = N->getOperand(i); 213 if (V.getOpcode() != ISD::UNDEF) 214 return false; 215 } 216 return true; 217} 218 219/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 220/// when given the operation for (X op Y). 221ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 222 // To perform this operation, we just need to swap the L and G bits of the 223 // operation. 224 unsigned OldL = (Operation >> 2) & 1; 225 unsigned OldG = (Operation >> 1) & 1; 226 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 227 (OldL << 1) | // New G bit 228 (OldG << 2)); // New L bit. 229} 230 231/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 232/// 'op' is a valid SetCC operation. 233ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 234 unsigned Operation = Op; 235 if (isInteger) 236 Operation ^= 7; // Flip L, G, E bits, but not U. 237 else 238 Operation ^= 15; // Flip all of the condition bits. 239 240 if (Operation > ISD::SETTRUE2) 241 Operation &= ~8; // Don't let N and U bits get set. 242 243 return ISD::CondCode(Operation); 244} 245 246 247/// isSignedOp - For an integer comparison, return 1 if the comparison is a 248/// signed operation and 2 if the result is an unsigned comparison. Return zero 249/// if the operation does not depend on the sign of the input (setne and seteq). 250static int isSignedOp(ISD::CondCode Opcode) { 251 switch (Opcode) { 252 default: llvm_unreachable("Illegal integer setcc operation!"); 253 case ISD::SETEQ: 254 case ISD::SETNE: return 0; 255 case ISD::SETLT: 256 case ISD::SETLE: 257 case ISD::SETGT: 258 case ISD::SETGE: return 1; 259 case ISD::SETULT: 260 case ISD::SETULE: 261 case ISD::SETUGT: 262 case ISD::SETUGE: return 2; 263 } 264} 265 266/// getSetCCOrOperation - Return the result of a logical OR between different 267/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 268/// returns SETCC_INVALID if it is not possible to represent the resultant 269/// comparison. 270ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 271 bool isInteger) { 272 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 273 // Cannot fold a signed integer setcc with an unsigned integer setcc. 274 return ISD::SETCC_INVALID; 275 276 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 277 278 // If the N and U bits get set then the resultant comparison DOES suddenly 279 // care about orderedness, and is true when ordered. 280 if (Op > ISD::SETTRUE2) 281 Op &= ~16; // Clear the U bit if the N bit is set. 282 283 // Canonicalize illegal integer setcc's. 284 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 285 Op = ISD::SETNE; 286 287 return ISD::CondCode(Op); 288} 289 290/// getSetCCAndOperation - Return the result of a logical AND between different 291/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 292/// function returns zero if it is not possible to represent the resultant 293/// comparison. 294ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 295 bool isInteger) { 296 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 297 // Cannot fold a signed setcc with an unsigned setcc. 298 return ISD::SETCC_INVALID; 299 300 // Combine all of the condition bits. 301 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 302 303 // Canonicalize illegal integer setcc's. 304 if (isInteger) { 305 switch (Result) { 306 default: break; 307 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 308 case ISD::SETOEQ: // SETEQ & SETU[LG]E 309 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 310 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 311 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 312 } 313 } 314 315 return Result; 316} 317 318//===----------------------------------------------------------------------===// 319// SDNode Profile Support 320//===----------------------------------------------------------------------===// 321 322/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 323/// 324static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 325 ID.AddInteger(OpC); 326} 327 328/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 329/// solely with their pointer. 330static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 331 ID.AddPointer(VTList.VTs); 332} 333 334/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 335/// 336static void AddNodeIDOperands(FoldingSetNodeID &ID, 337 const SDValue *Ops, unsigned NumOps) { 338 for (; NumOps; --NumOps, ++Ops) { 339 ID.AddPointer(Ops->getNode()); 340 ID.AddInteger(Ops->getResNo()); 341 } 342} 343 344/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 345/// 346static void AddNodeIDOperands(FoldingSetNodeID &ID, 347 const SDUse *Ops, unsigned NumOps) { 348 for (; NumOps; --NumOps, ++Ops) { 349 ID.AddPointer(Ops->getNode()); 350 ID.AddInteger(Ops->getResNo()); 351 } 352} 353 354static void AddNodeIDNode(FoldingSetNodeID &ID, 355 unsigned short OpC, SDVTList VTList, 356 const SDValue *OpList, unsigned N) { 357 AddNodeIDOpcode(ID, OpC); 358 AddNodeIDValueTypes(ID, VTList); 359 AddNodeIDOperands(ID, OpList, N); 360} 361 362/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 363/// the NodeID data. 364static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 365 switch (N->getOpcode()) { 366 case ISD::TargetExternalSymbol: 367 case ISD::ExternalSymbol: 368 llvm_unreachable("Should only be used on nodes with operands"); 369 default: break; // Normal nodes don't need extra info. 370 case ISD::TargetConstant: 371 case ISD::Constant: 372 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 373 break; 374 case ISD::TargetConstantFP: 375 case ISD::ConstantFP: { 376 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 377 break; 378 } 379 case ISD::TargetGlobalAddress: 380 case ISD::GlobalAddress: 381 case ISD::TargetGlobalTLSAddress: 382 case ISD::GlobalTLSAddress: { 383 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 384 ID.AddPointer(GA->getGlobal()); 385 ID.AddInteger(GA->getOffset()); 386 ID.AddInteger(GA->getTargetFlags()); 387 break; 388 } 389 case ISD::BasicBlock: 390 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 391 break; 392 case ISD::Register: 393 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 394 break; 395 case ISD::RegisterMask: 396 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 397 break; 398 case ISD::SRCVALUE: 399 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 400 break; 401 case ISD::FrameIndex: 402 case ISD::TargetFrameIndex: 403 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 404 break; 405 case ISD::JumpTable: 406 case ISD::TargetJumpTable: 407 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 408 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 409 break; 410 case ISD::ConstantPool: 411 case ISD::TargetConstantPool: { 412 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 413 ID.AddInteger(CP->getAlignment()); 414 ID.AddInteger(CP->getOffset()); 415 if (CP->isMachineConstantPoolEntry()) 416 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 417 else 418 ID.AddPointer(CP->getConstVal()); 419 ID.AddInteger(CP->getTargetFlags()); 420 break; 421 } 422 case ISD::LOAD: { 423 const LoadSDNode *LD = cast<LoadSDNode>(N); 424 ID.AddInteger(LD->getMemoryVT().getRawBits()); 425 ID.AddInteger(LD->getRawSubclassData()); 426 break; 427 } 428 case ISD::STORE: { 429 const StoreSDNode *ST = cast<StoreSDNode>(N); 430 ID.AddInteger(ST->getMemoryVT().getRawBits()); 431 ID.AddInteger(ST->getRawSubclassData()); 432 break; 433 } 434 case ISD::ATOMIC_CMP_SWAP: 435 case ISD::ATOMIC_SWAP: 436 case ISD::ATOMIC_LOAD_ADD: 437 case ISD::ATOMIC_LOAD_SUB: 438 case ISD::ATOMIC_LOAD_AND: 439 case ISD::ATOMIC_LOAD_OR: 440 case ISD::ATOMIC_LOAD_XOR: 441 case ISD::ATOMIC_LOAD_NAND: 442 case ISD::ATOMIC_LOAD_MIN: 443 case ISD::ATOMIC_LOAD_MAX: 444 case ISD::ATOMIC_LOAD_UMIN: 445 case ISD::ATOMIC_LOAD_UMAX: 446 case ISD::ATOMIC_LOAD: 447 case ISD::ATOMIC_STORE: { 448 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 449 ID.AddInteger(AT->getMemoryVT().getRawBits()); 450 ID.AddInteger(AT->getRawSubclassData()); 451 break; 452 } 453 case ISD::VECTOR_SHUFFLE: { 454 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 455 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 456 i != e; ++i) 457 ID.AddInteger(SVN->getMaskElt(i)); 458 break; 459 } 460 case ISD::TargetBlockAddress: 461 case ISD::BlockAddress: { 462 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 463 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 464 break; 465 } 466 } // end switch (N->getOpcode()) 467} 468 469/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 470/// data. 471static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 472 AddNodeIDOpcode(ID, N->getOpcode()); 473 // Add the return value info. 474 AddNodeIDValueTypes(ID, N->getVTList()); 475 // Add the operand info. 476 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 477 478 // Handle SDNode leafs with special info. 479 AddNodeIDCustom(ID, N); 480} 481 482/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 483/// the CSE map that carries volatility, temporalness, indexing mode, and 484/// extension/truncation information. 485/// 486static inline unsigned 487encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 488 bool isNonTemporal, bool isInvariant) { 489 assert((ConvType & 3) == ConvType && 490 "ConvType may not require more than 2 bits!"); 491 assert((AM & 7) == AM && 492 "AM may not require more than 3 bits!"); 493 return ConvType | 494 (AM << 2) | 495 (isVolatile << 5) | 496 (isNonTemporal << 6) | 497 (isInvariant << 7); 498} 499 500//===----------------------------------------------------------------------===// 501// SelectionDAG Class 502//===----------------------------------------------------------------------===// 503 504/// doNotCSE - Return true if CSE should not be performed for this node. 505static bool doNotCSE(SDNode *N) { 506 if (N->getValueType(0) == MVT::Glue) 507 return true; // Never CSE anything that produces a flag. 508 509 switch (N->getOpcode()) { 510 default: break; 511 case ISD::HANDLENODE: 512 case ISD::EH_LABEL: 513 return true; // Never CSE these nodes. 514 } 515 516 // Check that remaining values produced are not flags. 517 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 518 if (N->getValueType(i) == MVT::Glue) 519 return true; // Never CSE anything that produces a flag. 520 521 return false; 522} 523 524/// RemoveDeadNodes - This method deletes all unreachable nodes in the 525/// SelectionDAG. 526void SelectionDAG::RemoveDeadNodes() { 527 // Create a dummy node (which is not added to allnodes), that adds a reference 528 // to the root node, preventing it from being deleted. 529 HandleSDNode Dummy(getRoot()); 530 531 SmallVector<SDNode*, 128> DeadNodes; 532 533 // Add all obviously-dead nodes to the DeadNodes worklist. 534 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 535 if (I->use_empty()) 536 DeadNodes.push_back(I); 537 538 RemoveDeadNodes(DeadNodes); 539 540 // If the root changed (e.g. it was a dead load, update the root). 541 setRoot(Dummy.getValue()); 542} 543 544/// RemoveDeadNodes - This method deletes the unreachable nodes in the 545/// given list, and any nodes that become unreachable as a result. 546void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 547 DAGUpdateListener *UpdateListener) { 548 549 // Process the worklist, deleting the nodes and adding their uses to the 550 // worklist. 551 while (!DeadNodes.empty()) { 552 SDNode *N = DeadNodes.pop_back_val(); 553 554 if (UpdateListener) 555 UpdateListener->NodeDeleted(N, 0); 556 557 // Take the node out of the appropriate CSE map. 558 RemoveNodeFromCSEMaps(N); 559 560 // Next, brutally remove the operand list. This is safe to do, as there are 561 // no cycles in the graph. 562 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 563 SDUse &Use = *I++; 564 SDNode *Operand = Use.getNode(); 565 Use.set(SDValue()); 566 567 // Now that we removed this operand, see if there are no uses of it left. 568 if (Operand->use_empty()) 569 DeadNodes.push_back(Operand); 570 } 571 572 DeallocateNode(N); 573 } 574} 575 576void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 577 SmallVector<SDNode*, 16> DeadNodes(1, N); 578 579 // Create a dummy node that adds a reference to the root node, preventing 580 // it from being deleted. (This matters if the root is an operand of the 581 // dead node.) 582 HandleSDNode Dummy(getRoot()); 583 584 RemoveDeadNodes(DeadNodes, UpdateListener); 585} 586 587void SelectionDAG::DeleteNode(SDNode *N) { 588 // First take this out of the appropriate CSE map. 589 RemoveNodeFromCSEMaps(N); 590 591 // Finally, remove uses due to operands of this node, remove from the 592 // AllNodes list, and delete the node. 593 DeleteNodeNotInCSEMaps(N); 594} 595 596void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 597 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 598 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 599 600 // Drop all of the operands and decrement used node's use counts. 601 N->DropOperands(); 602 603 DeallocateNode(N); 604} 605 606void SelectionDAG::DeallocateNode(SDNode *N) { 607 if (N->OperandsNeedDelete) 608 delete[] N->OperandList; 609 610 // Set the opcode to DELETED_NODE to help catch bugs when node 611 // memory is reallocated. 612 N->NodeType = ISD::DELETED_NODE; 613 614 NodeAllocator.Deallocate(AllNodes.remove(N)); 615 616 // Remove the ordering of this node. 617 Ordering->remove(N); 618 619 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 620 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 621 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 622 DbgVals[i]->setIsInvalidated(); 623} 624 625/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 626/// correspond to it. This is useful when we're about to delete or repurpose 627/// the node. We don't want future request for structurally identical nodes 628/// to return N anymore. 629bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 630 bool Erased = false; 631 switch (N->getOpcode()) { 632 case ISD::HANDLENODE: return false; // noop. 633 case ISD::CONDCODE: 634 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 635 "Cond code doesn't exist!"); 636 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 637 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 638 break; 639 case ISD::ExternalSymbol: 640 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 641 break; 642 case ISD::TargetExternalSymbol: { 643 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 644 Erased = TargetExternalSymbols.erase( 645 std::pair<std::string,unsigned char>(ESN->getSymbol(), 646 ESN->getTargetFlags())); 647 break; 648 } 649 case ISD::VALUETYPE: { 650 EVT VT = cast<VTSDNode>(N)->getVT(); 651 if (VT.isExtended()) { 652 Erased = ExtendedValueTypeNodes.erase(VT); 653 } else { 654 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 655 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 656 } 657 break; 658 } 659 default: 660 // Remove it from the CSE Map. 661 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 662 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 663 Erased = CSEMap.RemoveNode(N); 664 break; 665 } 666#ifndef NDEBUG 667 // Verify that the node was actually in one of the CSE maps, unless it has a 668 // flag result (which cannot be CSE'd) or is one of the special cases that are 669 // not subject to CSE. 670 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 671 !N->isMachineOpcode() && !doNotCSE(N)) { 672 N->dump(this); 673 dbgs() << "\n"; 674 llvm_unreachable("Node is not in map!"); 675 } 676#endif 677 return Erased; 678} 679 680/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 681/// maps and modified in place. Add it back to the CSE maps, unless an identical 682/// node already exists, in which case transfer all its users to the existing 683/// node. This transfer can potentially trigger recursive merging. 684/// 685void 686SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 687 DAGUpdateListener *UpdateListener) { 688 // For node types that aren't CSE'd, just act as if no identical node 689 // already exists. 690 if (!doNotCSE(N)) { 691 SDNode *Existing = CSEMap.GetOrInsertNode(N); 692 if (Existing != N) { 693 // If there was already an existing matching node, use ReplaceAllUsesWith 694 // to replace the dead one with the existing one. This can cause 695 // recursive merging of other unrelated nodes down the line. 696 ReplaceAllUsesWith(N, Existing, UpdateListener); 697 698 // N is now dead. Inform the listener if it exists and delete it. 699 if (UpdateListener) 700 UpdateListener->NodeDeleted(N, Existing); 701 DeleteNodeNotInCSEMaps(N); 702 return; 703 } 704 } 705 706 // If the node doesn't already exist, we updated it. Inform a listener if 707 // it exists. 708 if (UpdateListener) 709 UpdateListener->NodeUpdated(N); 710} 711 712/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 713/// were replaced with those specified. If this node is never memoized, 714/// return null, otherwise return a pointer to the slot it would take. If a 715/// node already exists with these operands, the slot will be non-null. 716SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 717 void *&InsertPos) { 718 if (doNotCSE(N)) 719 return 0; 720 721 SDValue Ops[] = { Op }; 722 FoldingSetNodeID ID; 723 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 724 AddNodeIDCustom(ID, N); 725 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 726 return Node; 727} 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 SDValue Op1, SDValue Op2, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 SDValue Ops[] = { Op1, Op2 }; 740 FoldingSetNodeID ID; 741 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 742 AddNodeIDCustom(ID, N); 743 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 744 return Node; 745} 746 747 748/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 749/// were replaced with those specified. If this node is never memoized, 750/// return null, otherwise return a pointer to the slot it would take. If a 751/// node already exists with these operands, the slot will be non-null. 752SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 753 const SDValue *Ops,unsigned NumOps, 754 void *&InsertPos) { 755 if (doNotCSE(N)) 756 return 0; 757 758 FoldingSetNodeID ID; 759 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 760 AddNodeIDCustom(ID, N); 761 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 762 return Node; 763} 764 765#ifndef NDEBUG 766/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 767static void VerifyNodeCommon(SDNode *N) { 768 switch (N->getOpcode()) { 769 default: 770 break; 771 case ISD::BUILD_PAIR: { 772 EVT VT = N->getValueType(0); 773 assert(N->getNumValues() == 1 && "Too many results!"); 774 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 775 "Wrong return type!"); 776 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 777 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 778 "Mismatched operand types!"); 779 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 780 "Wrong operand type!"); 781 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 782 "Wrong return type size"); 783 break; 784 } 785 case ISD::BUILD_VECTOR: { 786 assert(N->getNumValues() == 1 && "Too many results!"); 787 assert(N->getValueType(0).isVector() && "Wrong return type!"); 788 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 789 "Wrong number of operands!"); 790 EVT EltVT = N->getValueType(0).getVectorElementType(); 791 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 792 assert((I->getValueType() == EltVT || 793 (EltVT.isInteger() && I->getValueType().isInteger() && 794 EltVT.bitsLE(I->getValueType()))) && 795 "Wrong operand type!"); 796 assert(I->getValueType() == N->getOperand(0).getValueType() && 797 "Operands must all have the same type"); 798 } 799 break; 800 } 801 } 802} 803 804/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 805static void VerifySDNode(SDNode *N) { 806 // The SDNode allocators cannot be used to allocate nodes with fields that are 807 // not present in an SDNode! 808 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 809 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 810 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 811 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 812 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 813 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 814 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 815 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 816 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 817 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 818 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 819 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 820 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 821 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 822 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 823 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 824 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 825 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 826 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 827 828 VerifyNodeCommon(N); 829} 830 831/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 832/// invalid. 833static void VerifyMachineNode(SDNode *N) { 834 // The MachineNode allocators cannot be used to allocate nodes with fields 835 // that are not present in a MachineNode! 836 // Currently there are no such nodes. 837 838 VerifyNodeCommon(N); 839} 840#endif // NDEBUG 841 842/// getEVTAlignment - Compute the default alignment value for the 843/// given type. 844/// 845unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 846 Type *Ty = VT == MVT::iPTR ? 847 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 848 VT.getTypeForEVT(*getContext()); 849 850 return TLI.getTargetData()->getABITypeAlignment(Ty); 851} 852 853// EntryNode could meaningfully have debug info if we can find it... 854SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 855 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 856 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 857 Root(getEntryNode()), Ordering(0) { 858 AllNodes.push_back(&EntryNode); 859 Ordering = new SDNodeOrdering(); 860 DbgInfo = new SDDbgInfo(); 861} 862 863void SelectionDAG::init(MachineFunction &mf) { 864 MF = &mf; 865 Context = &mf.getFunction()->getContext(); 866} 867 868SelectionDAG::~SelectionDAG() { 869 allnodes_clear(); 870 delete Ordering; 871 delete DbgInfo; 872} 873 874void SelectionDAG::allnodes_clear() { 875 assert(&*AllNodes.begin() == &EntryNode); 876 AllNodes.remove(AllNodes.begin()); 877 while (!AllNodes.empty()) 878 DeallocateNode(AllNodes.begin()); 879} 880 881void SelectionDAG::clear() { 882 allnodes_clear(); 883 OperandAllocator.Reset(); 884 CSEMap.clear(); 885 886 ExtendedValueTypeNodes.clear(); 887 ExternalSymbols.clear(); 888 TargetExternalSymbols.clear(); 889 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 890 static_cast<CondCodeSDNode*>(0)); 891 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 892 static_cast<SDNode*>(0)); 893 894 EntryNode.UseList = 0; 895 AllNodes.push_back(&EntryNode); 896 Root = getEntryNode(); 897 Ordering->clear(); 898 DbgInfo->clear(); 899} 900 901SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 902 return VT.bitsGT(Op.getValueType()) ? 903 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 904 getNode(ISD::TRUNCATE, DL, VT, Op); 905} 906 907SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 908 return VT.bitsGT(Op.getValueType()) ? 909 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 910 getNode(ISD::TRUNCATE, DL, VT, Op); 911} 912 913SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 914 return VT.bitsGT(Op.getValueType()) ? 915 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 916 getNode(ISD::TRUNCATE, DL, VT, Op); 917} 918 919SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 920 assert(!VT.isVector() && 921 "getZeroExtendInReg should use the vector element type instead of " 922 "the vector type!"); 923 if (Op.getValueType() == VT) return Op; 924 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 925 APInt Imm = APInt::getLowBitsSet(BitWidth, 926 VT.getSizeInBits()); 927 return getNode(ISD::AND, DL, Op.getValueType(), Op, 928 getConstant(Imm, Op.getValueType())); 929} 930 931/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 932/// 933SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 934 EVT EltVT = VT.getScalarType(); 935 SDValue NegOne = 936 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 937 return getNode(ISD::XOR, DL, VT, Val, NegOne); 938} 939 940SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 941 EVT EltVT = VT.getScalarType(); 942 assert((EltVT.getSizeInBits() >= 64 || 943 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 944 "getConstant with a uint64_t value that doesn't fit in the type!"); 945 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 946} 947 948SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 949 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 950} 951 952SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 953 assert(VT.isInteger() && "Cannot create FP integer constant!"); 954 955 EVT EltVT = VT.getScalarType(); 956 const ConstantInt *Elt = &Val; 957 958 // In some cases the vector type is legal but the element type is illegal and 959 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 960 // inserted value (the type does not need to match the vector element type). 961 // Any extra bits introduced will be truncated away. 962 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 963 TargetLowering::TypePromoteInteger) { 964 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 965 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 966 Elt = ConstantInt::get(*getContext(), NewVal); 967 } 968 969 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 970 "APInt size does not match type size!"); 971 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 972 FoldingSetNodeID ID; 973 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 974 ID.AddPointer(Elt); 975 void *IP = 0; 976 SDNode *N = NULL; 977 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 978 if (!VT.isVector()) 979 return SDValue(N, 0); 980 981 if (!N) { 982 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 983 CSEMap.InsertNode(N, IP); 984 AllNodes.push_back(N); 985 } 986 987 SDValue Result(N, 0); 988 if (VT.isVector()) { 989 SmallVector<SDValue, 8> Ops; 990 Ops.assign(VT.getVectorNumElements(), Result); 991 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 992 } 993 return Result; 994} 995 996SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 997 return getConstant(Val, TLI.getPointerTy(), isTarget); 998} 999 1000 1001SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1002 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1003} 1004 1005SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1006 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1007 1008 EVT EltVT = VT.getScalarType(); 1009 1010 // Do the map lookup using the actual bit pattern for the floating point 1011 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1012 // we don't have issues with SNANs. 1013 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1014 FoldingSetNodeID ID; 1015 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1016 ID.AddPointer(&V); 1017 void *IP = 0; 1018 SDNode *N = NULL; 1019 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1020 if (!VT.isVector()) 1021 return SDValue(N, 0); 1022 1023 if (!N) { 1024 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1025 CSEMap.InsertNode(N, IP); 1026 AllNodes.push_back(N); 1027 } 1028 1029 SDValue Result(N, 0); 1030 if (VT.isVector()) { 1031 SmallVector<SDValue, 8> Ops; 1032 Ops.assign(VT.getVectorNumElements(), Result); 1033 // FIXME DebugLoc info might be appropriate here 1034 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1035 } 1036 return Result; 1037} 1038 1039SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1040 EVT EltVT = VT.getScalarType(); 1041 if (EltVT==MVT::f32) 1042 return getConstantFP(APFloat((float)Val), VT, isTarget); 1043 else if (EltVT==MVT::f64) 1044 return getConstantFP(APFloat(Val), VT, isTarget); 1045 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1046 bool ignored; 1047 APFloat apf = APFloat(Val); 1048 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1049 &ignored); 1050 return getConstantFP(apf, VT, isTarget); 1051 } else 1052 llvm_unreachable("Unsupported type in getConstantFP"); 1053} 1054 1055SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1056 EVT VT, int64_t Offset, 1057 bool isTargetGA, 1058 unsigned char TargetFlags) { 1059 assert((TargetFlags == 0 || isTargetGA) && 1060 "Cannot set target flags on target-independent globals"); 1061 1062 // Truncate (with sign-extension) the offset value to the pointer size. 1063 EVT PTy = TLI.getPointerTy(); 1064 unsigned BitWidth = PTy.getSizeInBits(); 1065 if (BitWidth < 64) 1066 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1067 1068 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1069 if (!GVar) { 1070 // If GV is an alias then use the aliasee for determining thread-localness. 1071 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1072 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1073 } 1074 1075 unsigned Opc; 1076 if (GVar && GVar->isThreadLocal()) 1077 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1078 else 1079 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1080 1081 FoldingSetNodeID ID; 1082 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1083 ID.AddPointer(GV); 1084 ID.AddInteger(Offset); 1085 ID.AddInteger(TargetFlags); 1086 void *IP = 0; 1087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1088 return SDValue(E, 0); 1089 1090 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1091 Offset, TargetFlags); 1092 CSEMap.InsertNode(N, IP); 1093 AllNodes.push_back(N); 1094 return SDValue(N, 0); 1095} 1096 1097SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1098 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1099 FoldingSetNodeID ID; 1100 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1101 ID.AddInteger(FI); 1102 void *IP = 0; 1103 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1104 return SDValue(E, 0); 1105 1106 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1107 CSEMap.InsertNode(N, IP); 1108 AllNodes.push_back(N); 1109 return SDValue(N, 0); 1110} 1111 1112SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1113 unsigned char TargetFlags) { 1114 assert((TargetFlags == 0 || isTarget) && 1115 "Cannot set target flags on target-independent jump tables"); 1116 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1117 FoldingSetNodeID ID; 1118 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1119 ID.AddInteger(JTI); 1120 ID.AddInteger(TargetFlags); 1121 void *IP = 0; 1122 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1123 return SDValue(E, 0); 1124 1125 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1126 TargetFlags); 1127 CSEMap.InsertNode(N, IP); 1128 AllNodes.push_back(N); 1129 return SDValue(N, 0); 1130} 1131 1132SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1133 unsigned Alignment, int Offset, 1134 bool isTarget, 1135 unsigned char TargetFlags) { 1136 assert((TargetFlags == 0 || isTarget) && 1137 "Cannot set target flags on target-independent globals"); 1138 if (Alignment == 0) 1139 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1140 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1141 FoldingSetNodeID ID; 1142 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1143 ID.AddInteger(Alignment); 1144 ID.AddInteger(Offset); 1145 ID.AddPointer(C); 1146 ID.AddInteger(TargetFlags); 1147 void *IP = 0; 1148 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1149 return SDValue(E, 0); 1150 1151 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1152 Alignment, TargetFlags); 1153 CSEMap.InsertNode(N, IP); 1154 AllNodes.push_back(N); 1155 return SDValue(N, 0); 1156} 1157 1158 1159SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1160 unsigned Alignment, int Offset, 1161 bool isTarget, 1162 unsigned char TargetFlags) { 1163 assert((TargetFlags == 0 || isTarget) && 1164 "Cannot set target flags on target-independent globals"); 1165 if (Alignment == 0) 1166 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1167 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1168 FoldingSetNodeID ID; 1169 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1170 ID.AddInteger(Alignment); 1171 ID.AddInteger(Offset); 1172 C->addSelectionDAGCSEId(ID); 1173 ID.AddInteger(TargetFlags); 1174 void *IP = 0; 1175 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1176 return SDValue(E, 0); 1177 1178 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1179 Alignment, TargetFlags); 1180 CSEMap.InsertNode(N, IP); 1181 AllNodes.push_back(N); 1182 return SDValue(N, 0); 1183} 1184 1185SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1186 FoldingSetNodeID ID; 1187 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1188 ID.AddPointer(MBB); 1189 void *IP = 0; 1190 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1191 return SDValue(E, 0); 1192 1193 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1194 CSEMap.InsertNode(N, IP); 1195 AllNodes.push_back(N); 1196 return SDValue(N, 0); 1197} 1198 1199SDValue SelectionDAG::getValueType(EVT VT) { 1200 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1201 ValueTypeNodes.size()) 1202 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1203 1204 SDNode *&N = VT.isExtended() ? 1205 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1206 1207 if (N) return SDValue(N, 0); 1208 N = new (NodeAllocator) VTSDNode(VT); 1209 AllNodes.push_back(N); 1210 return SDValue(N, 0); 1211} 1212 1213SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1214 SDNode *&N = ExternalSymbols[Sym]; 1215 if (N) return SDValue(N, 0); 1216 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1217 AllNodes.push_back(N); 1218 return SDValue(N, 0); 1219} 1220 1221SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1222 unsigned char TargetFlags) { 1223 SDNode *&N = 1224 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1225 TargetFlags)]; 1226 if (N) return SDValue(N, 0); 1227 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1228 AllNodes.push_back(N); 1229 return SDValue(N, 0); 1230} 1231 1232SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1233 if ((unsigned)Cond >= CondCodeNodes.size()) 1234 CondCodeNodes.resize(Cond+1); 1235 1236 if (CondCodeNodes[Cond] == 0) { 1237 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1238 CondCodeNodes[Cond] = N; 1239 AllNodes.push_back(N); 1240 } 1241 1242 return SDValue(CondCodeNodes[Cond], 0); 1243} 1244 1245// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1246// the shuffle mask M that point at N1 to point at N2, and indices that point 1247// N2 to point at N1. 1248static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1249 std::swap(N1, N2); 1250 int NElts = M.size(); 1251 for (int i = 0; i != NElts; ++i) { 1252 if (M[i] >= NElts) 1253 M[i] -= NElts; 1254 else if (M[i] >= 0) 1255 M[i] += NElts; 1256 } 1257} 1258 1259SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1260 SDValue N2, const int *Mask) { 1261 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1262 assert(VT.isVector() && N1.getValueType().isVector() && 1263 "Vector Shuffle VTs must be a vectors"); 1264 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1265 && "Vector Shuffle VTs must have same element type"); 1266 1267 // Canonicalize shuffle undef, undef -> undef 1268 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1269 return getUNDEF(VT); 1270 1271 // Validate that all indices in Mask are within the range of the elements 1272 // input to the shuffle. 1273 unsigned NElts = VT.getVectorNumElements(); 1274 SmallVector<int, 8> MaskVec; 1275 for (unsigned i = 0; i != NElts; ++i) { 1276 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1277 MaskVec.push_back(Mask[i]); 1278 } 1279 1280 // Canonicalize shuffle v, v -> v, undef 1281 if (N1 == N2) { 1282 N2 = getUNDEF(VT); 1283 for (unsigned i = 0; i != NElts; ++i) 1284 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1285 } 1286 1287 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1288 if (N1.getOpcode() == ISD::UNDEF) 1289 commuteShuffle(N1, N2, MaskVec); 1290 1291 // Canonicalize all index into lhs, -> shuffle lhs, undef 1292 // Canonicalize all index into rhs, -> shuffle rhs, undef 1293 bool AllLHS = true, AllRHS = true; 1294 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1295 for (unsigned i = 0; i != NElts; ++i) { 1296 if (MaskVec[i] >= (int)NElts) { 1297 if (N2Undef) 1298 MaskVec[i] = -1; 1299 else 1300 AllLHS = false; 1301 } else if (MaskVec[i] >= 0) { 1302 AllRHS = false; 1303 } 1304 } 1305 if (AllLHS && AllRHS) 1306 return getUNDEF(VT); 1307 if (AllLHS && !N2Undef) 1308 N2 = getUNDEF(VT); 1309 if (AllRHS) { 1310 N1 = getUNDEF(VT); 1311 commuteShuffle(N1, N2, MaskVec); 1312 } 1313 1314 // If Identity shuffle, or all shuffle in to undef, return that node. 1315 bool AllUndef = true; 1316 bool Identity = true; 1317 for (unsigned i = 0; i != NElts; ++i) { 1318 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1319 if (MaskVec[i] >= 0) AllUndef = false; 1320 } 1321 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1322 return N1; 1323 if (AllUndef) 1324 return getUNDEF(VT); 1325 1326 FoldingSetNodeID ID; 1327 SDValue Ops[2] = { N1, N2 }; 1328 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1329 for (unsigned i = 0; i != NElts; ++i) 1330 ID.AddInteger(MaskVec[i]); 1331 1332 void* IP = 0; 1333 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1334 return SDValue(E, 0); 1335 1336 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1337 // SDNode doesn't have access to it. This memory will be "leaked" when 1338 // the node is deallocated, but recovered when the NodeAllocator is released. 1339 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1340 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1341 1342 ShuffleVectorSDNode *N = 1343 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1350 SDValue Val, SDValue DTy, 1351 SDValue STy, SDValue Rnd, SDValue Sat, 1352 ISD::CvtCode Code) { 1353 // If the src and dest types are the same and the conversion is between 1354 // integer types of the same sign or two floats, no conversion is necessary. 1355 if (DTy == STy && 1356 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1357 return Val; 1358 1359 FoldingSetNodeID ID; 1360 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1361 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1362 void* IP = 0; 1363 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1364 return SDValue(E, 0); 1365 1366 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1367 Code); 1368 CSEMap.InsertNode(N, IP); 1369 AllNodes.push_back(N); 1370 return SDValue(N, 0); 1371} 1372 1373SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1374 FoldingSetNodeID ID; 1375 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1376 ID.AddInteger(RegNo); 1377 void *IP = 0; 1378 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1379 return SDValue(E, 0); 1380 1381 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1382 CSEMap.InsertNode(N, IP); 1383 AllNodes.push_back(N); 1384 return SDValue(N, 0); 1385} 1386 1387SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1388 FoldingSetNodeID ID; 1389 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1390 ID.AddPointer(RegMask); 1391 void *IP = 0; 1392 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1393 return SDValue(E, 0); 1394 1395 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1396 CSEMap.InsertNode(N, IP); 1397 AllNodes.push_back(N); 1398 return SDValue(N, 0); 1399} 1400 1401SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1402 FoldingSetNodeID ID; 1403 SDValue Ops[] = { Root }; 1404 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1405 ID.AddPointer(Label); 1406 void *IP = 0; 1407 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1408 return SDValue(E, 0); 1409 1410 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1411 CSEMap.InsertNode(N, IP); 1412 AllNodes.push_back(N); 1413 return SDValue(N, 0); 1414} 1415 1416 1417SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1418 bool isTarget, 1419 unsigned char TargetFlags) { 1420 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1421 1422 FoldingSetNodeID ID; 1423 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1424 ID.AddPointer(BA); 1425 ID.AddInteger(TargetFlags); 1426 void *IP = 0; 1427 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1428 return SDValue(E, 0); 1429 1430 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1431 CSEMap.InsertNode(N, IP); 1432 AllNodes.push_back(N); 1433 return SDValue(N, 0); 1434} 1435 1436SDValue SelectionDAG::getSrcValue(const Value *V) { 1437 assert((!V || V->getType()->isPointerTy()) && 1438 "SrcValue is not a pointer?"); 1439 1440 FoldingSetNodeID ID; 1441 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1442 ID.AddPointer(V); 1443 1444 void *IP = 0; 1445 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1446 return SDValue(E, 0); 1447 1448 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1449 CSEMap.InsertNode(N, IP); 1450 AllNodes.push_back(N); 1451 return SDValue(N, 0); 1452} 1453 1454/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1455SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1456 FoldingSetNodeID ID; 1457 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1458 ID.AddPointer(MD); 1459 1460 void *IP = 0; 1461 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1462 return SDValue(E, 0); 1463 1464 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1465 CSEMap.InsertNode(N, IP); 1466 AllNodes.push_back(N); 1467 return SDValue(N, 0); 1468} 1469 1470 1471/// getShiftAmountOperand - Return the specified value casted to 1472/// the target's desired shift amount type. 1473SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1474 EVT OpTy = Op.getValueType(); 1475 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1476 if (OpTy == ShTy || OpTy.isVector()) return Op; 1477 1478 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1479 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1480} 1481 1482/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1483/// specified value type. 1484SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1485 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1486 unsigned ByteSize = VT.getStoreSize(); 1487 Type *Ty = VT.getTypeForEVT(*getContext()); 1488 unsigned StackAlign = 1489 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1490 1491 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1492 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1493} 1494 1495/// CreateStackTemporary - Create a stack temporary suitable for holding 1496/// either of the specified value types. 1497SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1498 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1499 VT2.getStoreSizeInBits())/8; 1500 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1501 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1502 const TargetData *TD = TLI.getTargetData(); 1503 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1504 TD->getPrefTypeAlignment(Ty2)); 1505 1506 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1507 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1508 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1509} 1510 1511SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1512 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1513 // These setcc operations always fold. 1514 switch (Cond) { 1515 default: break; 1516 case ISD::SETFALSE: 1517 case ISD::SETFALSE2: return getConstant(0, VT); 1518 case ISD::SETTRUE: 1519 case ISD::SETTRUE2: return getConstant(1, VT); 1520 1521 case ISD::SETOEQ: 1522 case ISD::SETOGT: 1523 case ISD::SETOGE: 1524 case ISD::SETOLT: 1525 case ISD::SETOLE: 1526 case ISD::SETONE: 1527 case ISD::SETO: 1528 case ISD::SETUO: 1529 case ISD::SETUEQ: 1530 case ISD::SETUNE: 1531 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1532 break; 1533 } 1534 1535 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1536 const APInt &C2 = N2C->getAPIntValue(); 1537 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1538 const APInt &C1 = N1C->getAPIntValue(); 1539 1540 switch (Cond) { 1541 default: llvm_unreachable("Unknown integer setcc!"); 1542 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1543 case ISD::SETNE: return getConstant(C1 != C2, VT); 1544 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1545 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1546 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1547 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1548 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1549 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1550 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1551 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1552 } 1553 } 1554 } 1555 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1556 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1557 // No compile time operations on this type yet. 1558 if (N1C->getValueType(0) == MVT::ppcf128) 1559 return SDValue(); 1560 1561 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1562 switch (Cond) { 1563 default: break; 1564 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1565 return getUNDEF(VT); 1566 // fall through 1567 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1568 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1569 return getUNDEF(VT); 1570 // fall through 1571 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1572 R==APFloat::cmpLessThan, VT); 1573 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1574 return getUNDEF(VT); 1575 // fall through 1576 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1577 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1578 return getUNDEF(VT); 1579 // fall through 1580 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1581 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1582 return getUNDEF(VT); 1583 // fall through 1584 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1585 R==APFloat::cmpEqual, VT); 1586 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1587 return getUNDEF(VT); 1588 // fall through 1589 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1590 R==APFloat::cmpEqual, VT); 1591 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1592 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1593 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1594 R==APFloat::cmpEqual, VT); 1595 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1596 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1597 R==APFloat::cmpLessThan, VT); 1598 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1599 R==APFloat::cmpUnordered, VT); 1600 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1601 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1602 } 1603 } else { 1604 // Ensure that the constant occurs on the RHS. 1605 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1606 } 1607 } 1608 1609 // Could not fold it. 1610 return SDValue(); 1611} 1612 1613/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1614/// use this predicate to simplify operations downstream. 1615bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1616 // This predicate is not safe for vector operations. 1617 if (Op.getValueType().isVector()) 1618 return false; 1619 1620 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1621 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1622} 1623 1624/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1625/// this predicate to simplify operations downstream. Mask is known to be zero 1626/// for bits that V cannot have. 1627bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1628 unsigned Depth) const { 1629 APInt KnownZero, KnownOne; 1630 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1631 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1632 return (KnownZero & Mask) == Mask; 1633} 1634 1635/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1636/// known to be either zero or one and return them in the KnownZero/KnownOne 1637/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1638/// processing. 1639void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1640 APInt &KnownOne, unsigned Depth) const { 1641 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1642 1643 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1644 if (Depth == 6) 1645 return; // Limit search depth. 1646 1647 APInt KnownZero2, KnownOne2; 1648 1649 switch (Op.getOpcode()) { 1650 case ISD::Constant: 1651 // We know all of the bits for a constant! 1652 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1653 KnownZero = ~KnownOne; 1654 return; 1655 case ISD::AND: 1656 // If either the LHS or the RHS are Zero, the result is zero. 1657 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1658 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1659 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1660 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1661 1662 // Output known-1 bits are only known if set in both the LHS & RHS. 1663 KnownOne &= KnownOne2; 1664 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1665 KnownZero |= KnownZero2; 1666 return; 1667 case ISD::OR: 1668 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1669 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1670 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1671 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1672 1673 // Output known-0 bits are only known if clear in both the LHS & RHS. 1674 KnownZero &= KnownZero2; 1675 // Output known-1 are known to be set if set in either the LHS | RHS. 1676 KnownOne |= KnownOne2; 1677 return; 1678 case ISD::XOR: { 1679 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1680 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1681 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1682 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1683 1684 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1685 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1686 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1687 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1688 KnownZero = KnownZeroOut; 1689 return; 1690 } 1691 case ISD::MUL: { 1692 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1693 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1694 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1695 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1696 1697 // If low bits are zero in either operand, output low known-0 bits. 1698 // Also compute a conserative estimate for high known-0 bits. 1699 // More trickiness is possible, but this is sufficient for the 1700 // interesting case of alignment computation. 1701 KnownOne.clearAllBits(); 1702 unsigned TrailZ = KnownZero.countTrailingOnes() + 1703 KnownZero2.countTrailingOnes(); 1704 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1705 KnownZero2.countLeadingOnes(), 1706 BitWidth) - BitWidth; 1707 1708 TrailZ = std::min(TrailZ, BitWidth); 1709 LeadZ = std::min(LeadZ, BitWidth); 1710 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1711 APInt::getHighBitsSet(BitWidth, LeadZ); 1712 return; 1713 } 1714 case ISD::UDIV: { 1715 // For the purposes of computing leading zeros we can conservatively 1716 // treat a udiv as a logical right shift by the power of 2 known to 1717 // be less than the denominator. 1718 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1719 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1720 1721 KnownOne2.clearAllBits(); 1722 KnownZero2.clearAllBits(); 1723 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1724 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1725 if (RHSUnknownLeadingOnes != BitWidth) 1726 LeadZ = std::min(BitWidth, 1727 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1728 1729 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1730 return; 1731 } 1732 case ISD::SELECT: 1733 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1734 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1735 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1736 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1737 1738 // Only known if known in both the LHS and RHS. 1739 KnownOne &= KnownOne2; 1740 KnownZero &= KnownZero2; 1741 return; 1742 case ISD::SELECT_CC: 1743 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1744 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1745 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1746 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1747 1748 // Only known if known in both the LHS and RHS. 1749 KnownOne &= KnownOne2; 1750 KnownZero &= KnownZero2; 1751 return; 1752 case ISD::SADDO: 1753 case ISD::UADDO: 1754 case ISD::SSUBO: 1755 case ISD::USUBO: 1756 case ISD::SMULO: 1757 case ISD::UMULO: 1758 if (Op.getResNo() != 1) 1759 return; 1760 // The boolean result conforms to getBooleanContents. Fall through. 1761 case ISD::SETCC: 1762 // If we know the result of a setcc has the top bits zero, use this info. 1763 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1764 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1765 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1766 return; 1767 case ISD::SHL: 1768 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1769 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1770 unsigned ShAmt = SA->getZExtValue(); 1771 1772 // If the shift count is an invalid immediate, don't do anything. 1773 if (ShAmt >= BitWidth) 1774 return; 1775 1776 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1778 KnownZero <<= ShAmt; 1779 KnownOne <<= ShAmt; 1780 // low bits known zero. 1781 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1782 } 1783 return; 1784 case ISD::SRL: 1785 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1786 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1787 unsigned ShAmt = SA->getZExtValue(); 1788 1789 // If the shift count is an invalid immediate, don't do anything. 1790 if (ShAmt >= BitWidth) 1791 return; 1792 1793 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1794 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1795 KnownZero = KnownZero.lshr(ShAmt); 1796 KnownOne = KnownOne.lshr(ShAmt); 1797 1798 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1799 KnownZero |= HighBits; // High bits known zero. 1800 } 1801 return; 1802 case ISD::SRA: 1803 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1804 unsigned ShAmt = SA->getZExtValue(); 1805 1806 // If the shift count is an invalid immediate, don't do anything. 1807 if (ShAmt >= BitWidth) 1808 return; 1809 1810 // If any of the demanded bits are produced by the sign extension, we also 1811 // demand the input sign bit. 1812 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1813 1814 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1815 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1816 KnownZero = KnownZero.lshr(ShAmt); 1817 KnownOne = KnownOne.lshr(ShAmt); 1818 1819 // Handle the sign bits. 1820 APInt SignBit = APInt::getSignBit(BitWidth); 1821 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1822 1823 if (KnownZero.intersects(SignBit)) { 1824 KnownZero |= HighBits; // New bits are known zero. 1825 } else if (KnownOne.intersects(SignBit)) { 1826 KnownOne |= HighBits; // New bits are known one. 1827 } 1828 } 1829 return; 1830 case ISD::SIGN_EXTEND_INREG: { 1831 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1832 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1833 1834 // Sign extension. Compute the demanded bits in the result that are not 1835 // present in the input. 1836 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1837 1838 APInt InSignBit = APInt::getSignBit(EBits); 1839 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1840 1841 // If the sign extended bits are demanded, we know that the sign 1842 // bit is demanded. 1843 InSignBit = InSignBit.zext(BitWidth); 1844 if (NewBits.getBoolValue()) 1845 InputDemandedBits |= InSignBit; 1846 1847 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1848 KnownOne &= InputDemandedBits; 1849 KnownZero &= InputDemandedBits; 1850 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1851 1852 // If the sign bit of the input is known set or clear, then we know the 1853 // top bits of the result. 1854 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1855 KnownZero |= NewBits; 1856 KnownOne &= ~NewBits; 1857 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1858 KnownOne |= NewBits; 1859 KnownZero &= ~NewBits; 1860 } else { // Input sign bit unknown 1861 KnownZero &= ~NewBits; 1862 KnownOne &= ~NewBits; 1863 } 1864 return; 1865 } 1866 case ISD::CTTZ: 1867 case ISD::CTTZ_ZERO_UNDEF: 1868 case ISD::CTLZ: 1869 case ISD::CTLZ_ZERO_UNDEF: 1870 case ISD::CTPOP: { 1871 unsigned LowBits = Log2_32(BitWidth)+1; 1872 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1873 KnownOne.clearAllBits(); 1874 return; 1875 } 1876 case ISD::LOAD: { 1877 LoadSDNode *LD = cast<LoadSDNode>(Op); 1878 if (ISD::isZEXTLoad(Op.getNode())) { 1879 EVT VT = LD->getMemoryVT(); 1880 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1881 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1882 } else if (const MDNode *Ranges = LD->getRanges()) { 1883 computeMaskedBitsLoad(*Ranges, KnownZero); 1884 } 1885 return; 1886 } 1887 case ISD::ZERO_EXTEND: { 1888 EVT InVT = Op.getOperand(0).getValueType(); 1889 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1890 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1891 KnownZero = KnownZero.trunc(InBits); 1892 KnownOne = KnownOne.trunc(InBits); 1893 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1894 KnownZero = KnownZero.zext(BitWidth); 1895 KnownOne = KnownOne.zext(BitWidth); 1896 KnownZero |= NewBits; 1897 return; 1898 } 1899 case ISD::SIGN_EXTEND: { 1900 EVT InVT = Op.getOperand(0).getValueType(); 1901 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1902 APInt InSignBit = APInt::getSignBit(InBits); 1903 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1904 1905 KnownZero = KnownZero.trunc(InBits); 1906 KnownOne = KnownOne.trunc(InBits); 1907 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1908 1909 // Note if the sign bit is known to be zero or one. 1910 bool SignBitKnownZero = KnownZero.isNegative(); 1911 bool SignBitKnownOne = KnownOne.isNegative(); 1912 assert(!(SignBitKnownZero && SignBitKnownOne) && 1913 "Sign bit can't be known to be both zero and one!"); 1914 1915 KnownZero = KnownZero.zext(BitWidth); 1916 KnownOne = KnownOne.zext(BitWidth); 1917 1918 // If the sign bit is known zero or one, the top bits match. 1919 if (SignBitKnownZero) 1920 KnownZero |= NewBits; 1921 else if (SignBitKnownOne) 1922 KnownOne |= NewBits; 1923 return; 1924 } 1925 case ISD::ANY_EXTEND: { 1926 EVT InVT = Op.getOperand(0).getValueType(); 1927 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1928 KnownZero = KnownZero.trunc(InBits); 1929 KnownOne = KnownOne.trunc(InBits); 1930 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1931 KnownZero = KnownZero.zext(BitWidth); 1932 KnownOne = KnownOne.zext(BitWidth); 1933 return; 1934 } 1935 case ISD::TRUNCATE: { 1936 EVT InVT = Op.getOperand(0).getValueType(); 1937 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1938 KnownZero = KnownZero.zext(InBits); 1939 KnownOne = KnownOne.zext(InBits); 1940 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1941 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1942 KnownZero = KnownZero.trunc(BitWidth); 1943 KnownOne = KnownOne.trunc(BitWidth); 1944 break; 1945 } 1946 case ISD::AssertZext: { 1947 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1948 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1949 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1950 KnownZero |= (~InMask); 1951 return; 1952 } 1953 case ISD::FGETSIGN: 1954 // All bits are zero except the low bit. 1955 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1956 return; 1957 1958 case ISD::SUB: { 1959 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1960 // We know that the top bits of C-X are clear if X contains less bits 1961 // than C (i.e. no wrap-around can happen). For example, 20-X is 1962 // positive if we can prove that X is >= 0 and < 16. 1963 if (CLHS->getAPIntValue().isNonNegative()) { 1964 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1965 // NLZ can't be BitWidth with no sign bit 1966 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1967 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1968 1969 // If all of the MaskV bits are known to be zero, then we know the 1970 // output top bits are zero, because we now know that the output is 1971 // from [0-C]. 1972 if ((KnownZero2 & MaskV) == MaskV) { 1973 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1974 // Top bits known zero. 1975 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 1976 } 1977 } 1978 } 1979 } 1980 // fall through 1981 case ISD::ADD: 1982 case ISD::ADDE: { 1983 // Output known-0 bits are known if clear or set in both the low clear bits 1984 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1985 // low 3 bits clear. 1986 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1987 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1988 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1989 1990 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1991 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1992 KnownZeroOut = std::min(KnownZeroOut, 1993 KnownZero2.countTrailingOnes()); 1994 1995 if (Op.getOpcode() == ISD::ADD) { 1996 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1997 return; 1998 } 1999 2000 // With ADDE, a carry bit may be added in, so we can only use this 2001 // information if we know (at least) that the low two bits are clear. We 2002 // then return to the caller that the low bit is unknown but that other bits 2003 // are known zero. 2004 if (KnownZeroOut >= 2) // ADDE 2005 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2006 return; 2007 } 2008 case ISD::SREM: 2009 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2010 const APInt &RA = Rem->getAPIntValue().abs(); 2011 if (RA.isPowerOf2()) { 2012 APInt LowBits = RA - 1; 2013 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2014 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2015 2016 // The low bits of the first operand are unchanged by the srem. 2017 KnownZero = KnownZero2 & LowBits; 2018 KnownOne = KnownOne2 & LowBits; 2019 2020 // If the first operand is non-negative or has all low bits zero, then 2021 // the upper bits are all zero. 2022 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2023 KnownZero |= ~LowBits; 2024 2025 // If the first operand is negative and not all low bits are zero, then 2026 // the upper bits are all one. 2027 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2028 KnownOne |= ~LowBits; 2029 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2030 } 2031 } 2032 return; 2033 case ISD::UREM: { 2034 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2035 const APInt &RA = Rem->getAPIntValue(); 2036 if (RA.isPowerOf2()) { 2037 APInt LowBits = (RA - 1); 2038 KnownZero |= ~LowBits; 2039 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2040 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2041 break; 2042 } 2043 } 2044 2045 // Since the result is less than or equal to either operand, any leading 2046 // zero bits in either operand must also exist in the result. 2047 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2048 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2049 2050 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2051 KnownZero2.countLeadingOnes()); 2052 KnownOne.clearAllBits(); 2053 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2054 return; 2055 } 2056 case ISD::FrameIndex: 2057 case ISD::TargetFrameIndex: 2058 if (unsigned Align = InferPtrAlignment(Op)) { 2059 // The low bits are known zero if the pointer is aligned. 2060 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2061 return; 2062 } 2063 break; 2064 2065 default: 2066 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2067 break; 2068 // Fallthrough 2069 case ISD::INTRINSIC_WO_CHAIN: 2070 case ISD::INTRINSIC_W_CHAIN: 2071 case ISD::INTRINSIC_VOID: 2072 // Allow the target to implement this method for its nodes. 2073 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2074 return; 2075 } 2076} 2077 2078/// ComputeNumSignBits - Return the number of times the sign bit of the 2079/// register is replicated into the other bits. We know that at least 1 bit 2080/// is always equal to the sign bit (itself), but other cases can give us 2081/// information. For example, immediately after an "SRA X, 2", we know that 2082/// the top 3 bits are all equal to each other, so we return 3. 2083unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2084 EVT VT = Op.getValueType(); 2085 assert(VT.isInteger() && "Invalid VT!"); 2086 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2087 unsigned Tmp, Tmp2; 2088 unsigned FirstAnswer = 1; 2089 2090 if (Depth == 6) 2091 return 1; // Limit search depth. 2092 2093 switch (Op.getOpcode()) { 2094 default: break; 2095 case ISD::AssertSext: 2096 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2097 return VTBits-Tmp+1; 2098 case ISD::AssertZext: 2099 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2100 return VTBits-Tmp; 2101 2102 case ISD::Constant: { 2103 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2104 return Val.getNumSignBits(); 2105 } 2106 2107 case ISD::SIGN_EXTEND: 2108 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2109 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2110 2111 case ISD::SIGN_EXTEND_INREG: 2112 // Max of the input and what this extends. 2113 Tmp = 2114 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2115 Tmp = VTBits-Tmp+1; 2116 2117 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2118 return std::max(Tmp, Tmp2); 2119 2120 case ISD::SRA: 2121 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2122 // SRA X, C -> adds C sign bits. 2123 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2124 Tmp += C->getZExtValue(); 2125 if (Tmp > VTBits) Tmp = VTBits; 2126 } 2127 return Tmp; 2128 case ISD::SHL: 2129 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2130 // shl destroys sign bits. 2131 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2132 if (C->getZExtValue() >= VTBits || // Bad shift. 2133 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2134 return Tmp - C->getZExtValue(); 2135 } 2136 break; 2137 case ISD::AND: 2138 case ISD::OR: 2139 case ISD::XOR: // NOT is handled here. 2140 // Logical binary ops preserve the number of sign bits at the worst. 2141 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2142 if (Tmp != 1) { 2143 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2144 FirstAnswer = std::min(Tmp, Tmp2); 2145 // We computed what we know about the sign bits as our first 2146 // answer. Now proceed to the generic code that uses 2147 // ComputeMaskedBits, and pick whichever answer is better. 2148 } 2149 break; 2150 2151 case ISD::SELECT: 2152 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2153 if (Tmp == 1) return 1; // Early out. 2154 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2155 return std::min(Tmp, Tmp2); 2156 2157 case ISD::SADDO: 2158 case ISD::UADDO: 2159 case ISD::SSUBO: 2160 case ISD::USUBO: 2161 case ISD::SMULO: 2162 case ISD::UMULO: 2163 if (Op.getResNo() != 1) 2164 break; 2165 // The boolean result conforms to getBooleanContents. Fall through. 2166 case ISD::SETCC: 2167 // If setcc returns 0/-1, all bits are sign bits. 2168 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2169 TargetLowering::ZeroOrNegativeOneBooleanContent) 2170 return VTBits; 2171 break; 2172 case ISD::ROTL: 2173 case ISD::ROTR: 2174 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2175 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2176 2177 // Handle rotate right by N like a rotate left by 32-N. 2178 if (Op.getOpcode() == ISD::ROTR) 2179 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2180 2181 // If we aren't rotating out all of the known-in sign bits, return the 2182 // number that are left. This handles rotl(sext(x), 1) for example. 2183 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2184 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2185 } 2186 break; 2187 case ISD::ADD: 2188 // Add can have at most one carry bit. Thus we know that the output 2189 // is, at worst, one more bit than the inputs. 2190 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2191 if (Tmp == 1) return 1; // Early out. 2192 2193 // Special case decrementing a value (ADD X, -1): 2194 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2195 if (CRHS->isAllOnesValue()) { 2196 APInt KnownZero, KnownOne; 2197 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2198 2199 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2200 // sign bits set. 2201 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2202 return VTBits; 2203 2204 // If we are subtracting one from a positive number, there is no carry 2205 // out of the result. 2206 if (KnownZero.isNegative()) 2207 return Tmp; 2208 } 2209 2210 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2211 if (Tmp2 == 1) return 1; 2212 return std::min(Tmp, Tmp2)-1; 2213 2214 case ISD::SUB: 2215 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2216 if (Tmp2 == 1) return 1; 2217 2218 // Handle NEG. 2219 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2220 if (CLHS->isNullValue()) { 2221 APInt KnownZero, KnownOne; 2222 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2223 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2224 // sign bits set. 2225 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2226 return VTBits; 2227 2228 // If the input is known to be positive (the sign bit is known clear), 2229 // the output of the NEG has the same number of sign bits as the input. 2230 if (KnownZero.isNegative()) 2231 return Tmp2; 2232 2233 // Otherwise, we treat this like a SUB. 2234 } 2235 2236 // Sub can have at most one carry bit. Thus we know that the output 2237 // is, at worst, one more bit than the inputs. 2238 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2239 if (Tmp == 1) return 1; // Early out. 2240 return std::min(Tmp, Tmp2)-1; 2241 case ISD::TRUNCATE: 2242 // FIXME: it's tricky to do anything useful for this, but it is an important 2243 // case for targets like X86. 2244 break; 2245 } 2246 2247 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2248 if (Op.getOpcode() == ISD::LOAD) { 2249 LoadSDNode *LD = cast<LoadSDNode>(Op); 2250 unsigned ExtType = LD->getExtensionType(); 2251 switch (ExtType) { 2252 default: break; 2253 case ISD::SEXTLOAD: // '17' bits known 2254 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2255 return VTBits-Tmp+1; 2256 case ISD::ZEXTLOAD: // '16' bits known 2257 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2258 return VTBits-Tmp; 2259 } 2260 } 2261 2262 // Allow the target to implement this method for its nodes. 2263 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2264 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2265 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2266 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2267 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2268 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2269 } 2270 2271 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2272 // use this information. 2273 APInt KnownZero, KnownOne; 2274 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2275 2276 APInt Mask; 2277 if (KnownZero.isNegative()) { // sign bit is 0 2278 Mask = KnownZero; 2279 } else if (KnownOne.isNegative()) { // sign bit is 1; 2280 Mask = KnownOne; 2281 } else { 2282 // Nothing known. 2283 return FirstAnswer; 2284 } 2285 2286 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2287 // the number of identical bits in the top of the input value. 2288 Mask = ~Mask; 2289 Mask <<= Mask.getBitWidth()-VTBits; 2290 // Return # leading zeros. We use 'min' here in case Val was zero before 2291 // shifting. We don't want to return '64' as for an i32 "0". 2292 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2293} 2294 2295/// isBaseWithConstantOffset - Return true if the specified operand is an 2296/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2297/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2298/// semantics as an ADD. This handles the equivalence: 2299/// X|Cst == X+Cst iff X&Cst = 0. 2300bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2301 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2302 !isa<ConstantSDNode>(Op.getOperand(1))) 2303 return false; 2304 2305 if (Op.getOpcode() == ISD::OR && 2306 !MaskedValueIsZero(Op.getOperand(0), 2307 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2308 return false; 2309 2310 return true; 2311} 2312 2313 2314bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2315 // If we're told that NaNs won't happen, assume they won't. 2316 if (getTarget().Options.NoNaNsFPMath) 2317 return true; 2318 2319 // If the value is a constant, we can obviously see if it is a NaN or not. 2320 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2321 return !C->getValueAPF().isNaN(); 2322 2323 // TODO: Recognize more cases here. 2324 2325 return false; 2326} 2327 2328bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2329 // If the value is a constant, we can obviously see if it is a zero or not. 2330 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2331 return !C->isZero(); 2332 2333 // TODO: Recognize more cases here. 2334 switch (Op.getOpcode()) { 2335 default: break; 2336 case ISD::OR: 2337 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2338 return !C->isNullValue(); 2339 break; 2340 } 2341 2342 return false; 2343} 2344 2345bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2346 // Check the obvious case. 2347 if (A == B) return true; 2348 2349 // For for negative and positive zero. 2350 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2351 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2352 if (CA->isZero() && CB->isZero()) return true; 2353 2354 // Otherwise they may not be equal. 2355 return false; 2356} 2357 2358/// getNode - Gets or creates the specified node. 2359/// 2360SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2361 FoldingSetNodeID ID; 2362 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2363 void *IP = 0; 2364 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2365 return SDValue(E, 0); 2366 2367 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2368 CSEMap.InsertNode(N, IP); 2369 2370 AllNodes.push_back(N); 2371#ifndef NDEBUG 2372 VerifySDNode(N); 2373#endif 2374 return SDValue(N, 0); 2375} 2376 2377SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2378 EVT VT, SDValue Operand) { 2379 // Constant fold unary operations with an integer constant operand. 2380 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2381 const APInt &Val = C->getAPIntValue(); 2382 switch (Opcode) { 2383 default: break; 2384 case ISD::SIGN_EXTEND: 2385 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2386 case ISD::ANY_EXTEND: 2387 case ISD::ZERO_EXTEND: 2388 case ISD::TRUNCATE: 2389 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2390 case ISD::UINT_TO_FP: 2391 case ISD::SINT_TO_FP: { 2392 // No compile time operations on ppcf128. 2393 if (VT == MVT::ppcf128) break; 2394 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2395 (void)apf.convertFromAPInt(Val, 2396 Opcode==ISD::SINT_TO_FP, 2397 APFloat::rmNearestTiesToEven); 2398 return getConstantFP(apf, VT); 2399 } 2400 case ISD::BITCAST: 2401 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2402 return getConstantFP(Val.bitsToFloat(), VT); 2403 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2404 return getConstantFP(Val.bitsToDouble(), VT); 2405 break; 2406 case ISD::BSWAP: 2407 return getConstant(Val.byteSwap(), VT); 2408 case ISD::CTPOP: 2409 return getConstant(Val.countPopulation(), VT); 2410 case ISD::CTLZ: 2411 case ISD::CTLZ_ZERO_UNDEF: 2412 return getConstant(Val.countLeadingZeros(), VT); 2413 case ISD::CTTZ: 2414 case ISD::CTTZ_ZERO_UNDEF: 2415 return getConstant(Val.countTrailingZeros(), VT); 2416 } 2417 } 2418 2419 // Constant fold unary operations with a floating point constant operand. 2420 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2421 APFloat V = C->getValueAPF(); // make copy 2422 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2423 switch (Opcode) { 2424 case ISD::FNEG: 2425 V.changeSign(); 2426 return getConstantFP(V, VT); 2427 case ISD::FABS: 2428 V.clearSign(); 2429 return getConstantFP(V, VT); 2430 case ISD::FP_ROUND: 2431 case ISD::FP_EXTEND: { 2432 bool ignored; 2433 // This can return overflow, underflow, or inexact; we don't care. 2434 // FIXME need to be more flexible about rounding mode. 2435 (void)V.convert(*EVTToAPFloatSemantics(VT), 2436 APFloat::rmNearestTiesToEven, &ignored); 2437 return getConstantFP(V, VT); 2438 } 2439 case ISD::FP_TO_SINT: 2440 case ISD::FP_TO_UINT: { 2441 integerPart x[2]; 2442 bool ignored; 2443 assert(integerPartWidth >= 64); 2444 // FIXME need to be more flexible about rounding mode. 2445 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2446 Opcode==ISD::FP_TO_SINT, 2447 APFloat::rmTowardZero, &ignored); 2448 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2449 break; 2450 APInt api(VT.getSizeInBits(), x); 2451 return getConstant(api, VT); 2452 } 2453 case ISD::BITCAST: 2454 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2455 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2456 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2457 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2458 break; 2459 } 2460 } 2461 } 2462 2463 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2464 switch (Opcode) { 2465 case ISD::TokenFactor: 2466 case ISD::MERGE_VALUES: 2467 case ISD::CONCAT_VECTORS: 2468 return Operand; // Factor, merge or concat of one node? No need. 2469 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2470 case ISD::FP_EXTEND: 2471 assert(VT.isFloatingPoint() && 2472 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2473 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2474 assert((!VT.isVector() || 2475 VT.getVectorNumElements() == 2476 Operand.getValueType().getVectorNumElements()) && 2477 "Vector element count mismatch!"); 2478 if (Operand.getOpcode() == ISD::UNDEF) 2479 return getUNDEF(VT); 2480 break; 2481 case ISD::SIGN_EXTEND: 2482 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2483 "Invalid SIGN_EXTEND!"); 2484 if (Operand.getValueType() == VT) return Operand; // noop extension 2485 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2486 "Invalid sext node, dst < src!"); 2487 assert((!VT.isVector() || 2488 VT.getVectorNumElements() == 2489 Operand.getValueType().getVectorNumElements()) && 2490 "Vector element count mismatch!"); 2491 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2492 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2493 else if (OpOpcode == ISD::UNDEF) 2494 // sext(undef) = 0, because the top bits will all be the same. 2495 return getConstant(0, VT); 2496 break; 2497 case ISD::ZERO_EXTEND: 2498 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2499 "Invalid ZERO_EXTEND!"); 2500 if (Operand.getValueType() == VT) return Operand; // noop extension 2501 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2502 "Invalid zext node, dst < src!"); 2503 assert((!VT.isVector() || 2504 VT.getVectorNumElements() == 2505 Operand.getValueType().getVectorNumElements()) && 2506 "Vector element count mismatch!"); 2507 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2508 return getNode(ISD::ZERO_EXTEND, DL, VT, 2509 Operand.getNode()->getOperand(0)); 2510 else if (OpOpcode == ISD::UNDEF) 2511 // zext(undef) = 0, because the top bits will be zero. 2512 return getConstant(0, VT); 2513 break; 2514 case ISD::ANY_EXTEND: 2515 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2516 "Invalid ANY_EXTEND!"); 2517 if (Operand.getValueType() == VT) return Operand; // noop extension 2518 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2519 "Invalid anyext node, dst < src!"); 2520 assert((!VT.isVector() || 2521 VT.getVectorNumElements() == 2522 Operand.getValueType().getVectorNumElements()) && 2523 "Vector element count mismatch!"); 2524 2525 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2526 OpOpcode == ISD::ANY_EXTEND) 2527 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2528 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2529 else if (OpOpcode == ISD::UNDEF) 2530 return getUNDEF(VT); 2531 2532 // (ext (trunx x)) -> x 2533 if (OpOpcode == ISD::TRUNCATE) { 2534 SDValue OpOp = Operand.getNode()->getOperand(0); 2535 if (OpOp.getValueType() == VT) 2536 return OpOp; 2537 } 2538 break; 2539 case ISD::TRUNCATE: 2540 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2541 "Invalid TRUNCATE!"); 2542 if (Operand.getValueType() == VT) return Operand; // noop truncate 2543 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2544 "Invalid truncate node, src < dst!"); 2545 assert((!VT.isVector() || 2546 VT.getVectorNumElements() == 2547 Operand.getValueType().getVectorNumElements()) && 2548 "Vector element count mismatch!"); 2549 if (OpOpcode == ISD::TRUNCATE) 2550 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2551 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2552 OpOpcode == ISD::ANY_EXTEND) { 2553 // If the source is smaller than the dest, we still need an extend. 2554 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2555 .bitsLT(VT.getScalarType())) 2556 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2557 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2558 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2559 return Operand.getNode()->getOperand(0); 2560 } 2561 if (OpOpcode == ISD::UNDEF) 2562 return getUNDEF(VT); 2563 break; 2564 case ISD::BITCAST: 2565 // Basic sanity checking. 2566 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2567 && "Cannot BITCAST between types of different sizes!"); 2568 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2569 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2570 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2571 if (OpOpcode == ISD::UNDEF) 2572 return getUNDEF(VT); 2573 break; 2574 case ISD::SCALAR_TO_VECTOR: 2575 assert(VT.isVector() && !Operand.getValueType().isVector() && 2576 (VT.getVectorElementType() == Operand.getValueType() || 2577 (VT.getVectorElementType().isInteger() && 2578 Operand.getValueType().isInteger() && 2579 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2580 "Illegal SCALAR_TO_VECTOR node!"); 2581 if (OpOpcode == ISD::UNDEF) 2582 return getUNDEF(VT); 2583 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2584 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2585 isa<ConstantSDNode>(Operand.getOperand(1)) && 2586 Operand.getConstantOperandVal(1) == 0 && 2587 Operand.getOperand(0).getValueType() == VT) 2588 return Operand.getOperand(0); 2589 break; 2590 case ISD::FNEG: 2591 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2592 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2593 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2594 Operand.getNode()->getOperand(0)); 2595 if (OpOpcode == ISD::FNEG) // --X -> X 2596 return Operand.getNode()->getOperand(0); 2597 break; 2598 case ISD::FABS: 2599 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2600 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2601 break; 2602 } 2603 2604 SDNode *N; 2605 SDVTList VTs = getVTList(VT); 2606 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2607 FoldingSetNodeID ID; 2608 SDValue Ops[1] = { Operand }; 2609 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2610 void *IP = 0; 2611 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2612 return SDValue(E, 0); 2613 2614 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2615 CSEMap.InsertNode(N, IP); 2616 } else { 2617 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2618 } 2619 2620 AllNodes.push_back(N); 2621#ifndef NDEBUG 2622 VerifySDNode(N); 2623#endif 2624 return SDValue(N, 0); 2625} 2626 2627SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2628 EVT VT, 2629 ConstantSDNode *Cst1, 2630 ConstantSDNode *Cst2) { 2631 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2632 2633 switch (Opcode) { 2634 case ISD::ADD: return getConstant(C1 + C2, VT); 2635 case ISD::SUB: return getConstant(C1 - C2, VT); 2636 case ISD::MUL: return getConstant(C1 * C2, VT); 2637 case ISD::UDIV: 2638 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2639 break; 2640 case ISD::UREM: 2641 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2642 break; 2643 case ISD::SDIV: 2644 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2645 break; 2646 case ISD::SREM: 2647 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2648 break; 2649 case ISD::AND: return getConstant(C1 & C2, VT); 2650 case ISD::OR: return getConstant(C1 | C2, VT); 2651 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2652 case ISD::SHL: return getConstant(C1 << C2, VT); 2653 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2654 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2655 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2656 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2657 default: break; 2658 } 2659 2660 return SDValue(); 2661} 2662 2663SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2664 SDValue N1, SDValue N2) { 2665 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2666 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2667 switch (Opcode) { 2668 default: break; 2669 case ISD::TokenFactor: 2670 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2671 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2672 // Fold trivial token factors. 2673 if (N1.getOpcode() == ISD::EntryToken) return N2; 2674 if (N2.getOpcode() == ISD::EntryToken) return N1; 2675 if (N1 == N2) return N1; 2676 break; 2677 case ISD::CONCAT_VECTORS: 2678 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2679 // one big BUILD_VECTOR. 2680 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2681 N2.getOpcode() == ISD::BUILD_VECTOR) { 2682 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2683 N1.getNode()->op_end()); 2684 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2685 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2686 } 2687 break; 2688 case ISD::AND: 2689 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2690 assert(N1.getValueType() == N2.getValueType() && 2691 N1.getValueType() == VT && "Binary operator types must match!"); 2692 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2693 // worth handling here. 2694 if (N2C && N2C->isNullValue()) 2695 return N2; 2696 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2697 return N1; 2698 break; 2699 case ISD::OR: 2700 case ISD::XOR: 2701 case ISD::ADD: 2702 case ISD::SUB: 2703 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2704 assert(N1.getValueType() == N2.getValueType() && 2705 N1.getValueType() == VT && "Binary operator types must match!"); 2706 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2707 // it's worth handling here. 2708 if (N2C && N2C->isNullValue()) 2709 return N1; 2710 break; 2711 case ISD::UDIV: 2712 case ISD::UREM: 2713 case ISD::MULHU: 2714 case ISD::MULHS: 2715 case ISD::MUL: 2716 case ISD::SDIV: 2717 case ISD::SREM: 2718 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2719 assert(N1.getValueType() == N2.getValueType() && 2720 N1.getValueType() == VT && "Binary operator types must match!"); 2721 break; 2722 case ISD::FADD: 2723 case ISD::FSUB: 2724 case ISD::FMUL: 2725 case ISD::FDIV: 2726 case ISD::FREM: 2727 if (getTarget().Options.UnsafeFPMath) { 2728 if (Opcode == ISD::FADD) { 2729 // 0+x --> x 2730 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2731 if (CFP->getValueAPF().isZero()) 2732 return N2; 2733 // x+0 --> x 2734 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2735 if (CFP->getValueAPF().isZero()) 2736 return N1; 2737 } else if (Opcode == ISD::FSUB) { 2738 // x-0 --> x 2739 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2740 if (CFP->getValueAPF().isZero()) 2741 return N1; 2742 } 2743 } 2744 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2745 assert(N1.getValueType() == N2.getValueType() && 2746 N1.getValueType() == VT && "Binary operator types must match!"); 2747 break; 2748 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2749 assert(N1.getValueType() == VT && 2750 N1.getValueType().isFloatingPoint() && 2751 N2.getValueType().isFloatingPoint() && 2752 "Invalid FCOPYSIGN!"); 2753 break; 2754 case ISD::SHL: 2755 case ISD::SRA: 2756 case ISD::SRL: 2757 case ISD::ROTL: 2758 case ISD::ROTR: 2759 assert(VT == N1.getValueType() && 2760 "Shift operators return type must be the same as their first arg"); 2761 assert(VT.isInteger() && N2.getValueType().isInteger() && 2762 "Shifts only work on integers"); 2763 // Verify that the shift amount VT is bit enough to hold valid shift 2764 // amounts. This catches things like trying to shift an i1024 value by an 2765 // i8, which is easy to fall into in generic code that uses 2766 // TLI.getShiftAmount(). 2767 assert(N2.getValueType().getSizeInBits() >= 2768 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2769 "Invalid use of small shift amount with oversized value!"); 2770 2771 // Always fold shifts of i1 values so the code generator doesn't need to 2772 // handle them. Since we know the size of the shift has to be less than the 2773 // size of the value, the shift/rotate count is guaranteed to be zero. 2774 if (VT == MVT::i1) 2775 return N1; 2776 if (N2C && N2C->isNullValue()) 2777 return N1; 2778 break; 2779 case ISD::FP_ROUND_INREG: { 2780 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2781 assert(VT == N1.getValueType() && "Not an inreg round!"); 2782 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2783 "Cannot FP_ROUND_INREG integer types"); 2784 assert(EVT.isVector() == VT.isVector() && 2785 "FP_ROUND_INREG type should be vector iff the operand " 2786 "type is vector!"); 2787 assert((!EVT.isVector() || 2788 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2789 "Vector element counts must match in FP_ROUND_INREG"); 2790 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2791 (void)EVT; 2792 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2793 break; 2794 } 2795 case ISD::FP_ROUND: 2796 assert(VT.isFloatingPoint() && 2797 N1.getValueType().isFloatingPoint() && 2798 VT.bitsLE(N1.getValueType()) && 2799 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2800 if (N1.getValueType() == VT) return N1; // noop conversion. 2801 break; 2802 case ISD::AssertSext: 2803 case ISD::AssertZext: { 2804 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2805 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2806 assert(VT.isInteger() && EVT.isInteger() && 2807 "Cannot *_EXTEND_INREG FP types"); 2808 assert(!EVT.isVector() && 2809 "AssertSExt/AssertZExt type should be the vector element type " 2810 "rather than the vector type!"); 2811 assert(EVT.bitsLE(VT) && "Not extending!"); 2812 if (VT == EVT) return N1; // noop assertion. 2813 break; 2814 } 2815 case ISD::SIGN_EXTEND_INREG: { 2816 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2817 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2818 assert(VT.isInteger() && EVT.isInteger() && 2819 "Cannot *_EXTEND_INREG FP types"); 2820 assert(EVT.isVector() == VT.isVector() && 2821 "SIGN_EXTEND_INREG type should be vector iff the operand " 2822 "type is vector!"); 2823 assert((!EVT.isVector() || 2824 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2825 "Vector element counts must match in SIGN_EXTEND_INREG"); 2826 assert(EVT.bitsLE(VT) && "Not extending!"); 2827 if (EVT == VT) return N1; // Not actually extending 2828 2829 if (N1C) { 2830 APInt Val = N1C->getAPIntValue(); 2831 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2832 Val <<= Val.getBitWidth()-FromBits; 2833 Val = Val.ashr(Val.getBitWidth()-FromBits); 2834 return getConstant(Val, VT); 2835 } 2836 break; 2837 } 2838 case ISD::EXTRACT_VECTOR_ELT: 2839 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2840 if (N1.getOpcode() == ISD::UNDEF) 2841 return getUNDEF(VT); 2842 2843 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2844 // expanding copies of large vectors from registers. 2845 if (N2C && 2846 N1.getOpcode() == ISD::CONCAT_VECTORS && 2847 N1.getNumOperands() > 0) { 2848 unsigned Factor = 2849 N1.getOperand(0).getValueType().getVectorNumElements(); 2850 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2851 N1.getOperand(N2C->getZExtValue() / Factor), 2852 getConstant(N2C->getZExtValue() % Factor, 2853 N2.getValueType())); 2854 } 2855 2856 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2857 // expanding large vector constants. 2858 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2859 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2860 EVT VEltTy = N1.getValueType().getVectorElementType(); 2861 if (Elt.getValueType() != VEltTy) { 2862 // If the vector element type is not legal, the BUILD_VECTOR operands 2863 // are promoted and implicitly truncated. Make that explicit here. 2864 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2865 } 2866 if (VT != VEltTy) { 2867 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2868 // result is implicitly extended. 2869 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2870 } 2871 return Elt; 2872 } 2873 2874 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2875 // operations are lowered to scalars. 2876 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2877 // If the indices are the same, return the inserted element else 2878 // if the indices are known different, extract the element from 2879 // the original vector. 2880 SDValue N1Op2 = N1.getOperand(2); 2881 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2882 2883 if (N1Op2C && N2C) { 2884 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2885 if (VT == N1.getOperand(1).getValueType()) 2886 return N1.getOperand(1); 2887 else 2888 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2889 } 2890 2891 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2892 } 2893 } 2894 break; 2895 case ISD::EXTRACT_ELEMENT: 2896 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2897 assert(!N1.getValueType().isVector() && !VT.isVector() && 2898 (N1.getValueType().isInteger() == VT.isInteger()) && 2899 N1.getValueType() != VT && 2900 "Wrong types for EXTRACT_ELEMENT!"); 2901 2902 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2903 // 64-bit integers into 32-bit parts. Instead of building the extract of 2904 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2905 if (N1.getOpcode() == ISD::BUILD_PAIR) 2906 return N1.getOperand(N2C->getZExtValue()); 2907 2908 // EXTRACT_ELEMENT of a constant int is also very common. 2909 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2910 unsigned ElementSize = VT.getSizeInBits(); 2911 unsigned Shift = ElementSize * N2C->getZExtValue(); 2912 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2913 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2914 } 2915 break; 2916 case ISD::EXTRACT_SUBVECTOR: { 2917 SDValue Index = N2; 2918 if (VT.isSimple() && N1.getValueType().isSimple()) { 2919 assert(VT.isVector() && N1.getValueType().isVector() && 2920 "Extract subvector VTs must be a vectors!"); 2921 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2922 "Extract subvector VTs must have the same element type!"); 2923 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2924 "Extract subvector must be from larger vector to smaller vector!"); 2925 2926 if (isa<ConstantSDNode>(Index.getNode())) { 2927 assert((VT.getVectorNumElements() + 2928 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2929 <= N1.getValueType().getVectorNumElements()) 2930 && "Extract subvector overflow!"); 2931 } 2932 2933 // Trivial extraction. 2934 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2935 return N1; 2936 } 2937 break; 2938 } 2939 } 2940 2941 if (N1C) { 2942 if (N2C) { 2943 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2944 if (SV.getNode()) return SV; 2945 } else { // Cannonicalize constant to RHS if commutative 2946 if (isCommutativeBinOp(Opcode)) { 2947 std::swap(N1C, N2C); 2948 std::swap(N1, N2); 2949 } 2950 } 2951 } 2952 2953 // Constant fold FP operations. 2954 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2955 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2956 if (N1CFP) { 2957 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2958 // Cannonicalize constant to RHS if commutative 2959 std::swap(N1CFP, N2CFP); 2960 std::swap(N1, N2); 2961 } else if (N2CFP && VT != MVT::ppcf128) { 2962 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2963 APFloat::opStatus s; 2964 switch (Opcode) { 2965 case ISD::FADD: 2966 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2967 if (s != APFloat::opInvalidOp) 2968 return getConstantFP(V1, VT); 2969 break; 2970 case ISD::FSUB: 2971 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2972 if (s!=APFloat::opInvalidOp) 2973 return getConstantFP(V1, VT); 2974 break; 2975 case ISD::FMUL: 2976 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2977 if (s!=APFloat::opInvalidOp) 2978 return getConstantFP(V1, VT); 2979 break; 2980 case ISD::FDIV: 2981 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2982 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2983 return getConstantFP(V1, VT); 2984 break; 2985 case ISD::FREM : 2986 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2987 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2988 return getConstantFP(V1, VT); 2989 break; 2990 case ISD::FCOPYSIGN: 2991 V1.copySign(V2); 2992 return getConstantFP(V1, VT); 2993 default: break; 2994 } 2995 } 2996 } 2997 2998 // Canonicalize an UNDEF to the RHS, even over a constant. 2999 if (N1.getOpcode() == ISD::UNDEF) { 3000 if (isCommutativeBinOp(Opcode)) { 3001 std::swap(N1, N2); 3002 } else { 3003 switch (Opcode) { 3004 case ISD::FP_ROUND_INREG: 3005 case ISD::SIGN_EXTEND_INREG: 3006 case ISD::SUB: 3007 case ISD::FSUB: 3008 case ISD::FDIV: 3009 case ISD::FREM: 3010 case ISD::SRA: 3011 return N1; // fold op(undef, arg2) -> undef 3012 case ISD::UDIV: 3013 case ISD::SDIV: 3014 case ISD::UREM: 3015 case ISD::SREM: 3016 case ISD::SRL: 3017 case ISD::SHL: 3018 if (!VT.isVector()) 3019 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3020 // For vectors, we can't easily build an all zero vector, just return 3021 // the LHS. 3022 return N2; 3023 } 3024 } 3025 } 3026 3027 // Fold a bunch of operators when the RHS is undef. 3028 if (N2.getOpcode() == ISD::UNDEF) { 3029 switch (Opcode) { 3030 case ISD::XOR: 3031 if (N1.getOpcode() == ISD::UNDEF) 3032 // Handle undef ^ undef -> 0 special case. This is a common 3033 // idiom (misuse). 3034 return getConstant(0, VT); 3035 // fallthrough 3036 case ISD::ADD: 3037 case ISD::ADDC: 3038 case ISD::ADDE: 3039 case ISD::SUB: 3040 case ISD::UDIV: 3041 case ISD::SDIV: 3042 case ISD::UREM: 3043 case ISD::SREM: 3044 return N2; // fold op(arg1, undef) -> undef 3045 case ISD::FADD: 3046 case ISD::FSUB: 3047 case ISD::FMUL: 3048 case ISD::FDIV: 3049 case ISD::FREM: 3050 if (getTarget().Options.UnsafeFPMath) 3051 return N2; 3052 break; 3053 case ISD::MUL: 3054 case ISD::AND: 3055 case ISD::SRL: 3056 case ISD::SHL: 3057 if (!VT.isVector()) 3058 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3059 // For vectors, we can't easily build an all zero vector, just return 3060 // the LHS. 3061 return N1; 3062 case ISD::OR: 3063 if (!VT.isVector()) 3064 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3065 // For vectors, we can't easily build an all one vector, just return 3066 // the LHS. 3067 return N1; 3068 case ISD::SRA: 3069 return N1; 3070 } 3071 } 3072 3073 // Memoize this node if possible. 3074 SDNode *N; 3075 SDVTList VTs = getVTList(VT); 3076 if (VT != MVT::Glue) { 3077 SDValue Ops[] = { N1, N2 }; 3078 FoldingSetNodeID ID; 3079 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3080 void *IP = 0; 3081 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3082 return SDValue(E, 0); 3083 3084 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3085 CSEMap.InsertNode(N, IP); 3086 } else { 3087 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3088 } 3089 3090 AllNodes.push_back(N); 3091#ifndef NDEBUG 3092 VerifySDNode(N); 3093#endif 3094 return SDValue(N, 0); 3095} 3096 3097SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3098 SDValue N1, SDValue N2, SDValue N3) { 3099 // Perform various simplifications. 3100 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3101 switch (Opcode) { 3102 case ISD::CONCAT_VECTORS: 3103 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3104 // one big BUILD_VECTOR. 3105 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3106 N2.getOpcode() == ISD::BUILD_VECTOR && 3107 N3.getOpcode() == ISD::BUILD_VECTOR) { 3108 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3109 N1.getNode()->op_end()); 3110 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3111 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3112 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3113 } 3114 break; 3115 case ISD::SETCC: { 3116 // Use FoldSetCC to simplify SETCC's. 3117 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3118 if (Simp.getNode()) return Simp; 3119 break; 3120 } 3121 case ISD::SELECT: 3122 if (N1C) { 3123 if (N1C->getZExtValue()) 3124 return N2; // select true, X, Y -> X 3125 return N3; // select false, X, Y -> Y 3126 } 3127 3128 if (N2 == N3) return N2; // select C, X, X -> X 3129 break; 3130 case ISD::VECTOR_SHUFFLE: 3131 llvm_unreachable("should use getVectorShuffle constructor!"); 3132 case ISD::INSERT_SUBVECTOR: { 3133 SDValue Index = N3; 3134 if (VT.isSimple() && N1.getValueType().isSimple() 3135 && N2.getValueType().isSimple()) { 3136 assert(VT.isVector() && N1.getValueType().isVector() && 3137 N2.getValueType().isVector() && 3138 "Insert subvector VTs must be a vectors"); 3139 assert(VT == N1.getValueType() && 3140 "Dest and insert subvector source types must match!"); 3141 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3142 "Insert subvector must be from smaller vector to larger vector!"); 3143 if (isa<ConstantSDNode>(Index.getNode())) { 3144 assert((N2.getValueType().getVectorNumElements() + 3145 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3146 <= VT.getVectorNumElements()) 3147 && "Insert subvector overflow!"); 3148 } 3149 3150 // Trivial insertion. 3151 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3152 return N2; 3153 } 3154 break; 3155 } 3156 case ISD::BITCAST: 3157 // Fold bit_convert nodes from a type to themselves. 3158 if (N1.getValueType() == VT) 3159 return N1; 3160 break; 3161 } 3162 3163 // Memoize node if it doesn't produce a flag. 3164 SDNode *N; 3165 SDVTList VTs = getVTList(VT); 3166 if (VT != MVT::Glue) { 3167 SDValue Ops[] = { N1, N2, N3 }; 3168 FoldingSetNodeID ID; 3169 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3170 void *IP = 0; 3171 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3172 return SDValue(E, 0); 3173 3174 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3175 CSEMap.InsertNode(N, IP); 3176 } else { 3177 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3178 } 3179 3180 AllNodes.push_back(N); 3181#ifndef NDEBUG 3182 VerifySDNode(N); 3183#endif 3184 return SDValue(N, 0); 3185} 3186 3187SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3188 SDValue N1, SDValue N2, SDValue N3, 3189 SDValue N4) { 3190 SDValue Ops[] = { N1, N2, N3, N4 }; 3191 return getNode(Opcode, DL, VT, Ops, 4); 3192} 3193 3194SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3195 SDValue N1, SDValue N2, SDValue N3, 3196 SDValue N4, SDValue N5) { 3197 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3198 return getNode(Opcode, DL, VT, Ops, 5); 3199} 3200 3201/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3202/// the incoming stack arguments to be loaded from the stack. 3203SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3204 SmallVector<SDValue, 8> ArgChains; 3205 3206 // Include the original chain at the beginning of the list. When this is 3207 // used by target LowerCall hooks, this helps legalize find the 3208 // CALLSEQ_BEGIN node. 3209 ArgChains.push_back(Chain); 3210 3211 // Add a chain value for each stack argument. 3212 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3213 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3214 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3215 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3216 if (FI->getIndex() < 0) 3217 ArgChains.push_back(SDValue(L, 1)); 3218 3219 // Build a tokenfactor for all the chains. 3220 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3221 &ArgChains[0], ArgChains.size()); 3222} 3223 3224/// SplatByte - Distribute ByteVal over NumBits bits. 3225static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3226 APInt Val = APInt(NumBits, ByteVal); 3227 unsigned Shift = 8; 3228 for (unsigned i = NumBits; i > 8; i >>= 1) { 3229 Val = (Val << Shift) | Val; 3230 Shift <<= 1; 3231 } 3232 return Val; 3233} 3234 3235/// getMemsetValue - Vectorized representation of the memset value 3236/// operand. 3237static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3238 DebugLoc dl) { 3239 assert(Value.getOpcode() != ISD::UNDEF); 3240 3241 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3242 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3243 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3244 if (VT.isInteger()) 3245 return DAG.getConstant(Val, VT); 3246 return DAG.getConstantFP(APFloat(Val), VT); 3247 } 3248 3249 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3250 if (NumBits > 8) { 3251 // Use a multiplication with 0x010101... to extend the input to the 3252 // required length. 3253 APInt Magic = SplatByte(NumBits, 0x01); 3254 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3255 } 3256 3257 return Value; 3258} 3259 3260/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3261/// used when a memcpy is turned into a memset when the source is a constant 3262/// string ptr. 3263static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3264 const TargetLowering &TLI, StringRef Str) { 3265 // Handle vector with all elements zero. 3266 if (Str.empty()) { 3267 if (VT.isInteger()) 3268 return DAG.getConstant(0, VT); 3269 else if (VT == MVT::f32 || VT == MVT::f64) 3270 return DAG.getConstantFP(0.0, VT); 3271 else if (VT.isVector()) { 3272 unsigned NumElts = VT.getVectorNumElements(); 3273 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3274 return DAG.getNode(ISD::BITCAST, dl, VT, 3275 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3276 EltVT, NumElts))); 3277 } else 3278 llvm_unreachable("Expected type!"); 3279 } 3280 3281 assert(!VT.isVector() && "Can't handle vector type here!"); 3282 unsigned NumVTBytes = VT.getSizeInBits() / 8; 3283 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3284 3285 uint64_t Val = 0; 3286 if (TLI.isLittleEndian()) { 3287 for (unsigned i = 0; i != NumBytes; ++i) 3288 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3289 } else { 3290 for (unsigned i = 0; i != NumBytes; ++i) 3291 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3292 } 3293 3294 return DAG.getConstant(Val, VT); 3295} 3296 3297/// getMemBasePlusOffset - Returns base and offset node for the 3298/// 3299static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3300 SelectionDAG &DAG) { 3301 EVT VT = Base.getValueType(); 3302 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3303 VT, Base, DAG.getConstant(Offset, VT)); 3304} 3305 3306/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3307/// 3308static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3309 unsigned SrcDelta = 0; 3310 GlobalAddressSDNode *G = NULL; 3311 if (Src.getOpcode() == ISD::GlobalAddress) 3312 G = cast<GlobalAddressSDNode>(Src); 3313 else if (Src.getOpcode() == ISD::ADD && 3314 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3315 Src.getOperand(1).getOpcode() == ISD::Constant) { 3316 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3317 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3318 } 3319 if (!G) 3320 return false; 3321 3322 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3323} 3324 3325/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3326/// to replace the memset / memcpy. Return true if the number of memory ops 3327/// is below the threshold. It returns the types of the sequence of 3328/// memory ops to perform memset / memcpy by reference. 3329static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3330 unsigned Limit, uint64_t Size, 3331 unsigned DstAlign, unsigned SrcAlign, 3332 bool IsZeroVal, 3333 bool MemcpyStrSrc, 3334 SelectionDAG &DAG, 3335 const TargetLowering &TLI) { 3336 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3337 "Expecting memcpy / memset source to meet alignment requirement!"); 3338 // If 'SrcAlign' is zero, that means the memory operation does not need to 3339 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3340 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3341 // is the specified alignment of the memory operation. If it is zero, that 3342 // means it's possible to change the alignment of the destination. 3343 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3344 // not need to be loaded. 3345 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3346 IsZeroVal, MemcpyStrSrc, 3347 DAG.getMachineFunction()); 3348 3349 if (VT == MVT::Other) { 3350 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3351 TLI.allowsUnalignedMemoryAccesses(VT)) { 3352 VT = TLI.getPointerTy(); 3353 } else { 3354 switch (DstAlign & 7) { 3355 case 0: VT = MVT::i64; break; 3356 case 4: VT = MVT::i32; break; 3357 case 2: VT = MVT::i16; break; 3358 default: VT = MVT::i8; break; 3359 } 3360 } 3361 3362 MVT LVT = MVT::i64; 3363 while (!TLI.isTypeLegal(LVT)) 3364 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3365 assert(LVT.isInteger()); 3366 3367 if (VT.bitsGT(LVT)) 3368 VT = LVT; 3369 } 3370 3371 unsigned NumMemOps = 0; 3372 while (Size != 0) { 3373 unsigned VTSize = VT.getSizeInBits() / 8; 3374 while (VTSize > Size) { 3375 // For now, only use non-vector load / store's for the left-over pieces. 3376 if (VT.isVector() || VT.isFloatingPoint()) { 3377 VT = MVT::i64; 3378 while (!TLI.isTypeLegal(VT)) 3379 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3380 VTSize = VT.getSizeInBits() / 8; 3381 } else { 3382 // This can result in a type that is not legal on the target, e.g. 3383 // 1 or 2 bytes on PPC. 3384 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3385 VTSize >>= 1; 3386 } 3387 } 3388 3389 if (++NumMemOps > Limit) 3390 return false; 3391 MemOps.push_back(VT); 3392 Size -= VTSize; 3393 } 3394 3395 return true; 3396} 3397 3398static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3399 SDValue Chain, SDValue Dst, 3400 SDValue Src, uint64_t Size, 3401 unsigned Align, bool isVol, 3402 bool AlwaysInline, 3403 MachinePointerInfo DstPtrInfo, 3404 MachinePointerInfo SrcPtrInfo) { 3405 // Turn a memcpy of undef to nop. 3406 if (Src.getOpcode() == ISD::UNDEF) 3407 return Chain; 3408 3409 // Expand memcpy to a series of load and store ops if the size operand falls 3410 // below a certain threshold. 3411 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3412 // rather than maybe a humongous number of loads and stores. 3413 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3414 std::vector<EVT> MemOps; 3415 bool DstAlignCanChange = false; 3416 MachineFunction &MF = DAG.getMachineFunction(); 3417 MachineFrameInfo *MFI = MF.getFrameInfo(); 3418 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3419 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3420 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3421 DstAlignCanChange = true; 3422 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3423 if (Align > SrcAlign) 3424 SrcAlign = Align; 3425 StringRef Str; 3426 bool CopyFromStr = isMemSrcFromString(Src, Str); 3427 bool isZeroStr = CopyFromStr && Str.empty(); 3428 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3429 3430 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3431 (DstAlignCanChange ? 0 : Align), 3432 (isZeroStr ? 0 : SrcAlign), 3433 true, CopyFromStr, DAG, TLI)) 3434 return SDValue(); 3435 3436 if (DstAlignCanChange) { 3437 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3438 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3439 if (NewAlign > Align) { 3440 // Give the stack frame object a larger alignment if needed. 3441 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3442 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3443 Align = NewAlign; 3444 } 3445 } 3446 3447 SmallVector<SDValue, 8> OutChains; 3448 unsigned NumMemOps = MemOps.size(); 3449 uint64_t SrcOff = 0, DstOff = 0; 3450 for (unsigned i = 0; i != NumMemOps; ++i) { 3451 EVT VT = MemOps[i]; 3452 unsigned VTSize = VT.getSizeInBits() / 8; 3453 SDValue Value, Store; 3454 3455 if (CopyFromStr && 3456 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3457 // It's unlikely a store of a vector immediate can be done in a single 3458 // instruction. It would require a load from a constantpool first. 3459 // We only handle zero vectors here. 3460 // FIXME: Handle other cases where store of vector immediate is done in 3461 // a single instruction. 3462 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3463 Store = DAG.getStore(Chain, dl, Value, 3464 getMemBasePlusOffset(Dst, DstOff, DAG), 3465 DstPtrInfo.getWithOffset(DstOff), isVol, 3466 false, Align); 3467 } else { 3468 // The type might not be legal for the target. This should only happen 3469 // if the type is smaller than a legal type, as on PPC, so the right 3470 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3471 // to Load/Store if NVT==VT. 3472 // FIXME does the case above also need this? 3473 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3474 assert(NVT.bitsGE(VT)); 3475 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3476 getMemBasePlusOffset(Src, SrcOff, DAG), 3477 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3478 MinAlign(SrcAlign, SrcOff)); 3479 Store = DAG.getTruncStore(Chain, dl, Value, 3480 getMemBasePlusOffset(Dst, DstOff, DAG), 3481 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3482 false, Align); 3483 } 3484 OutChains.push_back(Store); 3485 SrcOff += VTSize; 3486 DstOff += VTSize; 3487 } 3488 3489 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3490 &OutChains[0], OutChains.size()); 3491} 3492 3493static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3494 SDValue Chain, SDValue Dst, 3495 SDValue Src, uint64_t Size, 3496 unsigned Align, bool isVol, 3497 bool AlwaysInline, 3498 MachinePointerInfo DstPtrInfo, 3499 MachinePointerInfo SrcPtrInfo) { 3500 // Turn a memmove of undef to nop. 3501 if (Src.getOpcode() == ISD::UNDEF) 3502 return Chain; 3503 3504 // Expand memmove to a series of load and store ops if the size operand falls 3505 // below a certain threshold. 3506 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3507 std::vector<EVT> MemOps; 3508 bool DstAlignCanChange = false; 3509 MachineFunction &MF = DAG.getMachineFunction(); 3510 MachineFrameInfo *MFI = MF.getFrameInfo(); 3511 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3512 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3513 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3514 DstAlignCanChange = true; 3515 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3516 if (Align > SrcAlign) 3517 SrcAlign = Align; 3518 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3519 3520 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3521 (DstAlignCanChange ? 0 : Align), 3522 SrcAlign, true, false, DAG, TLI)) 3523 return SDValue(); 3524 3525 if (DstAlignCanChange) { 3526 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3527 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3528 if (NewAlign > Align) { 3529 // Give the stack frame object a larger alignment if needed. 3530 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3531 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3532 Align = NewAlign; 3533 } 3534 } 3535 3536 uint64_t SrcOff = 0, DstOff = 0; 3537 SmallVector<SDValue, 8> LoadValues; 3538 SmallVector<SDValue, 8> LoadChains; 3539 SmallVector<SDValue, 8> OutChains; 3540 unsigned NumMemOps = MemOps.size(); 3541 for (unsigned i = 0; i < NumMemOps; i++) { 3542 EVT VT = MemOps[i]; 3543 unsigned VTSize = VT.getSizeInBits() / 8; 3544 SDValue Value, Store; 3545 3546 Value = DAG.getLoad(VT, dl, Chain, 3547 getMemBasePlusOffset(Src, SrcOff, DAG), 3548 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3549 false, false, SrcAlign); 3550 LoadValues.push_back(Value); 3551 LoadChains.push_back(Value.getValue(1)); 3552 SrcOff += VTSize; 3553 } 3554 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3555 &LoadChains[0], LoadChains.size()); 3556 OutChains.clear(); 3557 for (unsigned i = 0; i < NumMemOps; i++) { 3558 EVT VT = MemOps[i]; 3559 unsigned VTSize = VT.getSizeInBits() / 8; 3560 SDValue Value, Store; 3561 3562 Store = DAG.getStore(Chain, dl, LoadValues[i], 3563 getMemBasePlusOffset(Dst, DstOff, DAG), 3564 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3565 OutChains.push_back(Store); 3566 DstOff += VTSize; 3567 } 3568 3569 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3570 &OutChains[0], OutChains.size()); 3571} 3572 3573static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3574 SDValue Chain, SDValue Dst, 3575 SDValue Src, uint64_t Size, 3576 unsigned Align, bool isVol, 3577 MachinePointerInfo DstPtrInfo) { 3578 // Turn a memset of undef to nop. 3579 if (Src.getOpcode() == ISD::UNDEF) 3580 return Chain; 3581 3582 // Expand memset to a series of load/store ops if the size operand 3583 // falls below a certain threshold. 3584 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3585 std::vector<EVT> MemOps; 3586 bool DstAlignCanChange = false; 3587 MachineFunction &MF = DAG.getMachineFunction(); 3588 MachineFrameInfo *MFI = MF.getFrameInfo(); 3589 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3590 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3591 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3592 DstAlignCanChange = true; 3593 bool IsZeroVal = 3594 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3595 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3596 Size, (DstAlignCanChange ? 0 : Align), 0, 3597 IsZeroVal, false, DAG, TLI)) 3598 return SDValue(); 3599 3600 if (DstAlignCanChange) { 3601 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3602 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3603 if (NewAlign > Align) { 3604 // Give the stack frame object a larger alignment if needed. 3605 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3606 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3607 Align = NewAlign; 3608 } 3609 } 3610 3611 SmallVector<SDValue, 8> OutChains; 3612 uint64_t DstOff = 0; 3613 unsigned NumMemOps = MemOps.size(); 3614 3615 // Find the largest store and generate the bit pattern for it. 3616 EVT LargestVT = MemOps[0]; 3617 for (unsigned i = 1; i < NumMemOps; i++) 3618 if (MemOps[i].bitsGT(LargestVT)) 3619 LargestVT = MemOps[i]; 3620 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3621 3622 for (unsigned i = 0; i < NumMemOps; i++) { 3623 EVT VT = MemOps[i]; 3624 3625 // If this store is smaller than the largest store see whether we can get 3626 // the smaller value for free with a truncate. 3627 SDValue Value = MemSetValue; 3628 if (VT.bitsLT(LargestVT)) { 3629 if (!LargestVT.isVector() && !VT.isVector() && 3630 TLI.isTruncateFree(LargestVT, VT)) 3631 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3632 else 3633 Value = getMemsetValue(Src, VT, DAG, dl); 3634 } 3635 assert(Value.getValueType() == VT && "Value with wrong type."); 3636 SDValue Store = DAG.getStore(Chain, dl, Value, 3637 getMemBasePlusOffset(Dst, DstOff, DAG), 3638 DstPtrInfo.getWithOffset(DstOff), 3639 isVol, false, Align); 3640 OutChains.push_back(Store); 3641 DstOff += VT.getSizeInBits() / 8; 3642 } 3643 3644 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3645 &OutChains[0], OutChains.size()); 3646} 3647 3648SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3649 SDValue Src, SDValue Size, 3650 unsigned Align, bool isVol, bool AlwaysInline, 3651 MachinePointerInfo DstPtrInfo, 3652 MachinePointerInfo SrcPtrInfo) { 3653 3654 // Check to see if we should lower the memcpy to loads and stores first. 3655 // For cases within the target-specified limits, this is the best choice. 3656 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3657 if (ConstantSize) { 3658 // Memcpy with size zero? Just return the original chain. 3659 if (ConstantSize->isNullValue()) 3660 return Chain; 3661 3662 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3663 ConstantSize->getZExtValue(),Align, 3664 isVol, false, DstPtrInfo, SrcPtrInfo); 3665 if (Result.getNode()) 3666 return Result; 3667 } 3668 3669 // Then check to see if we should lower the memcpy with target-specific 3670 // code. If the target chooses to do this, this is the next best. 3671 SDValue Result = 3672 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3673 isVol, AlwaysInline, 3674 DstPtrInfo, SrcPtrInfo); 3675 if (Result.getNode()) 3676 return Result; 3677 3678 // If we really need inline code and the target declined to provide it, 3679 // use a (potentially long) sequence of loads and stores. 3680 if (AlwaysInline) { 3681 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3682 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3683 ConstantSize->getZExtValue(), Align, isVol, 3684 true, DstPtrInfo, SrcPtrInfo); 3685 } 3686 3687 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3688 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3689 // respect volatile, so they may do things like read or write memory 3690 // beyond the given memory regions. But fixing this isn't easy, and most 3691 // people don't care. 3692 3693 // Emit a library call. 3694 TargetLowering::ArgListTy Args; 3695 TargetLowering::ArgListEntry Entry; 3696 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3697 Entry.Node = Dst; Args.push_back(Entry); 3698 Entry.Node = Src; Args.push_back(Entry); 3699 Entry.Node = Size; Args.push_back(Entry); 3700 // FIXME: pass in DebugLoc 3701 std::pair<SDValue,SDValue> CallResult = 3702 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3703 false, false, false, false, 0, 3704 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3705 /*isTailCall=*/false, 3706 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3707 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3708 TLI.getPointerTy()), 3709 Args, *this, dl); 3710 return CallResult.second; 3711} 3712 3713SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3714 SDValue Src, SDValue Size, 3715 unsigned Align, bool isVol, 3716 MachinePointerInfo DstPtrInfo, 3717 MachinePointerInfo SrcPtrInfo) { 3718 3719 // Check to see if we should lower the memmove to loads and stores first. 3720 // For cases within the target-specified limits, this is the best choice. 3721 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3722 if (ConstantSize) { 3723 // Memmove with size zero? Just return the original chain. 3724 if (ConstantSize->isNullValue()) 3725 return Chain; 3726 3727 SDValue Result = 3728 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3729 ConstantSize->getZExtValue(), Align, isVol, 3730 false, DstPtrInfo, SrcPtrInfo); 3731 if (Result.getNode()) 3732 return Result; 3733 } 3734 3735 // Then check to see if we should lower the memmove with target-specific 3736 // code. If the target chooses to do this, this is the next best. 3737 SDValue Result = 3738 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3739 DstPtrInfo, SrcPtrInfo); 3740 if (Result.getNode()) 3741 return Result; 3742 3743 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3744 // not be safe. See memcpy above for more details. 3745 3746 // Emit a library call. 3747 TargetLowering::ArgListTy Args; 3748 TargetLowering::ArgListEntry Entry; 3749 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3750 Entry.Node = Dst; Args.push_back(Entry); 3751 Entry.Node = Src; Args.push_back(Entry); 3752 Entry.Node = Size; Args.push_back(Entry); 3753 // FIXME: pass in DebugLoc 3754 std::pair<SDValue,SDValue> CallResult = 3755 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3756 false, false, false, false, 0, 3757 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 3758 /*isTailCall=*/false, 3759 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3760 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3761 TLI.getPointerTy()), 3762 Args, *this, dl); 3763 return CallResult.second; 3764} 3765 3766SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3767 SDValue Src, SDValue Size, 3768 unsigned Align, bool isVol, 3769 MachinePointerInfo DstPtrInfo) { 3770 3771 // Check to see if we should lower the memset to stores first. 3772 // For cases within the target-specified limits, this is the best choice. 3773 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3774 if (ConstantSize) { 3775 // Memset with size zero? Just return the original chain. 3776 if (ConstantSize->isNullValue()) 3777 return Chain; 3778 3779 SDValue Result = 3780 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3781 Align, isVol, DstPtrInfo); 3782 3783 if (Result.getNode()) 3784 return Result; 3785 } 3786 3787 // Then check to see if we should lower the memset with target-specific 3788 // code. If the target chooses to do this, this is the next best. 3789 SDValue Result = 3790 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3791 DstPtrInfo); 3792 if (Result.getNode()) 3793 return Result; 3794 3795 // Emit a library call. 3796 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3797 TargetLowering::ArgListTy Args; 3798 TargetLowering::ArgListEntry Entry; 3799 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3800 Args.push_back(Entry); 3801 // Extend or truncate the argument to be an i32 value for the call. 3802 if (Src.getValueType().bitsGT(MVT::i32)) 3803 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3804 else 3805 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3806 Entry.Node = Src; 3807 Entry.Ty = Type::getInt32Ty(*getContext()); 3808 Entry.isSExt = true; 3809 Args.push_back(Entry); 3810 Entry.Node = Size; 3811 Entry.Ty = IntPtrTy; 3812 Entry.isSExt = false; 3813 Args.push_back(Entry); 3814 // FIXME: pass in DebugLoc 3815 std::pair<SDValue,SDValue> CallResult = 3816 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3817 false, false, false, false, 0, 3818 TLI.getLibcallCallingConv(RTLIB::MEMSET), 3819 /*isTailCall=*/false, 3820 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 3821 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3822 TLI.getPointerTy()), 3823 Args, *this, dl); 3824 return CallResult.second; 3825} 3826 3827SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3828 SDValue Chain, SDValue Ptr, SDValue Cmp, 3829 SDValue Swp, MachinePointerInfo PtrInfo, 3830 unsigned Alignment, 3831 AtomicOrdering Ordering, 3832 SynchronizationScope SynchScope) { 3833 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3834 Alignment = getEVTAlignment(MemVT); 3835 3836 MachineFunction &MF = getMachineFunction(); 3837 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3838 3839 // For now, atomics are considered to be volatile always. 3840 // FIXME: Volatile isn't really correct; we should keep track of atomic 3841 // orderings in the memoperand. 3842 Flags |= MachineMemOperand::MOVolatile; 3843 3844 MachineMemOperand *MMO = 3845 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3846 3847 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3848 Ordering, SynchScope); 3849} 3850 3851SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3852 SDValue Chain, 3853 SDValue Ptr, SDValue Cmp, 3854 SDValue Swp, MachineMemOperand *MMO, 3855 AtomicOrdering Ordering, 3856 SynchronizationScope SynchScope) { 3857 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3858 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3859 3860 EVT VT = Cmp.getValueType(); 3861 3862 SDVTList VTs = getVTList(VT, MVT::Other); 3863 FoldingSetNodeID ID; 3864 ID.AddInteger(MemVT.getRawBits()); 3865 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3866 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3867 void* IP = 0; 3868 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3869 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3870 return SDValue(E, 0); 3871 } 3872 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3873 Ptr, Cmp, Swp, MMO, Ordering, 3874 SynchScope); 3875 CSEMap.InsertNode(N, IP); 3876 AllNodes.push_back(N); 3877 return SDValue(N, 0); 3878} 3879 3880SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3881 SDValue Chain, 3882 SDValue Ptr, SDValue Val, 3883 const Value* PtrVal, 3884 unsigned Alignment, 3885 AtomicOrdering Ordering, 3886 SynchronizationScope SynchScope) { 3887 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3888 Alignment = getEVTAlignment(MemVT); 3889 3890 MachineFunction &MF = getMachineFunction(); 3891 // A monotonic store does not load; a release store "loads" in the sense 3892 // that other stores cannot be sunk past it. 3893 // (An atomicrmw obviously both loads and stores.) 3894 unsigned Flags = MachineMemOperand::MOStore; 3895 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic) 3896 Flags |= MachineMemOperand::MOLoad; 3897 3898 // For now, atomics are considered to be volatile always. 3899 // FIXME: Volatile isn't really correct; we should keep track of atomic 3900 // orderings in the memoperand. 3901 Flags |= MachineMemOperand::MOVolatile; 3902 3903 MachineMemOperand *MMO = 3904 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3905 MemVT.getStoreSize(), Alignment); 3906 3907 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 3908 Ordering, SynchScope); 3909} 3910 3911SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3912 SDValue Chain, 3913 SDValue Ptr, SDValue Val, 3914 MachineMemOperand *MMO, 3915 AtomicOrdering Ordering, 3916 SynchronizationScope SynchScope) { 3917 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3918 Opcode == ISD::ATOMIC_LOAD_SUB || 3919 Opcode == ISD::ATOMIC_LOAD_AND || 3920 Opcode == ISD::ATOMIC_LOAD_OR || 3921 Opcode == ISD::ATOMIC_LOAD_XOR || 3922 Opcode == ISD::ATOMIC_LOAD_NAND || 3923 Opcode == ISD::ATOMIC_LOAD_MIN || 3924 Opcode == ISD::ATOMIC_LOAD_MAX || 3925 Opcode == ISD::ATOMIC_LOAD_UMIN || 3926 Opcode == ISD::ATOMIC_LOAD_UMAX || 3927 Opcode == ISD::ATOMIC_SWAP || 3928 Opcode == ISD::ATOMIC_STORE) && 3929 "Invalid Atomic Op"); 3930 3931 EVT VT = Val.getValueType(); 3932 3933 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 3934 getVTList(VT, MVT::Other); 3935 FoldingSetNodeID ID; 3936 ID.AddInteger(MemVT.getRawBits()); 3937 SDValue Ops[] = {Chain, Ptr, Val}; 3938 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3939 void* IP = 0; 3940 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3941 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3942 return SDValue(E, 0); 3943 } 3944 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3945 Ptr, Val, MMO, 3946 Ordering, SynchScope); 3947 CSEMap.InsertNode(N, IP); 3948 AllNodes.push_back(N); 3949 return SDValue(N, 0); 3950} 3951 3952SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3953 EVT VT, SDValue Chain, 3954 SDValue Ptr, 3955 const Value* PtrVal, 3956 unsigned Alignment, 3957 AtomicOrdering Ordering, 3958 SynchronizationScope SynchScope) { 3959 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3960 Alignment = getEVTAlignment(MemVT); 3961 3962 MachineFunction &MF = getMachineFunction(); 3963 // A monotonic load does not store; an acquire load "stores" in the sense 3964 // that other loads cannot be hoisted past it. 3965 unsigned Flags = MachineMemOperand::MOLoad; 3966 if (Ordering > Monotonic) 3967 Flags |= MachineMemOperand::MOStore; 3968 3969 // For now, atomics are considered to be volatile always. 3970 // FIXME: Volatile isn't really correct; we should keep track of atomic 3971 // orderings in the memoperand. 3972 Flags |= MachineMemOperand::MOVolatile; 3973 3974 MachineMemOperand *MMO = 3975 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3976 MemVT.getStoreSize(), Alignment); 3977 3978 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 3979 Ordering, SynchScope); 3980} 3981 3982SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3983 EVT VT, SDValue Chain, 3984 SDValue Ptr, 3985 MachineMemOperand *MMO, 3986 AtomicOrdering Ordering, 3987 SynchronizationScope SynchScope) { 3988 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 3989 3990 SDVTList VTs = getVTList(VT, MVT::Other); 3991 FoldingSetNodeID ID; 3992 ID.AddInteger(MemVT.getRawBits()); 3993 SDValue Ops[] = {Chain, Ptr}; 3994 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3995 void* IP = 0; 3996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3997 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3998 return SDValue(E, 0); 3999 } 4000 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4001 Ptr, MMO, Ordering, SynchScope); 4002 CSEMap.InsertNode(N, IP); 4003 AllNodes.push_back(N); 4004 return SDValue(N, 0); 4005} 4006 4007/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4008SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4009 DebugLoc dl) { 4010 if (NumOps == 1) 4011 return Ops[0]; 4012 4013 SmallVector<EVT, 4> VTs; 4014 VTs.reserve(NumOps); 4015 for (unsigned i = 0; i < NumOps; ++i) 4016 VTs.push_back(Ops[i].getValueType()); 4017 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4018 Ops, NumOps); 4019} 4020 4021SDValue 4022SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4023 const EVT *VTs, unsigned NumVTs, 4024 const SDValue *Ops, unsigned NumOps, 4025 EVT MemVT, MachinePointerInfo PtrInfo, 4026 unsigned Align, bool Vol, 4027 bool ReadMem, bool WriteMem) { 4028 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4029 MemVT, PtrInfo, Align, Vol, 4030 ReadMem, WriteMem); 4031} 4032 4033SDValue 4034SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4035 const SDValue *Ops, unsigned NumOps, 4036 EVT MemVT, MachinePointerInfo PtrInfo, 4037 unsigned Align, bool Vol, 4038 bool ReadMem, bool WriteMem) { 4039 if (Align == 0) // Ensure that codegen never sees alignment 0 4040 Align = getEVTAlignment(MemVT); 4041 4042 MachineFunction &MF = getMachineFunction(); 4043 unsigned Flags = 0; 4044 if (WriteMem) 4045 Flags |= MachineMemOperand::MOStore; 4046 if (ReadMem) 4047 Flags |= MachineMemOperand::MOLoad; 4048 if (Vol) 4049 Flags |= MachineMemOperand::MOVolatile; 4050 MachineMemOperand *MMO = 4051 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4052 4053 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4054} 4055 4056SDValue 4057SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4058 const SDValue *Ops, unsigned NumOps, 4059 EVT MemVT, MachineMemOperand *MMO) { 4060 assert((Opcode == ISD::INTRINSIC_VOID || 4061 Opcode == ISD::INTRINSIC_W_CHAIN || 4062 Opcode == ISD::PREFETCH || 4063 (Opcode <= INT_MAX && 4064 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4065 "Opcode is not a memory-accessing opcode!"); 4066 4067 // Memoize the node unless it returns a flag. 4068 MemIntrinsicSDNode *N; 4069 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4070 FoldingSetNodeID ID; 4071 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4072 void *IP = 0; 4073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4074 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4075 return SDValue(E, 0); 4076 } 4077 4078 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4079 MemVT, MMO); 4080 CSEMap.InsertNode(N, IP); 4081 } else { 4082 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4083 MemVT, MMO); 4084 } 4085 AllNodes.push_back(N); 4086 return SDValue(N, 0); 4087} 4088 4089/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4090/// MachinePointerInfo record from it. This is particularly useful because the 4091/// code generator has many cases where it doesn't bother passing in a 4092/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4093static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4094 // If this is FI+Offset, we can model it. 4095 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4096 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4097 4098 // If this is (FI+Offset1)+Offset2, we can model it. 4099 if (Ptr.getOpcode() != ISD::ADD || 4100 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4101 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4102 return MachinePointerInfo(); 4103 4104 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4105 return MachinePointerInfo::getFixedStack(FI, Offset+ 4106 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4107} 4108 4109/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4110/// MachinePointerInfo record from it. This is particularly useful because the 4111/// code generator has many cases where it doesn't bother passing in a 4112/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4113static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4114 // If the 'Offset' value isn't a constant, we can't handle this. 4115 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4116 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4117 if (OffsetOp.getOpcode() == ISD::UNDEF) 4118 return InferPointerInfo(Ptr); 4119 return MachinePointerInfo(); 4120} 4121 4122 4123SDValue 4124SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4125 EVT VT, DebugLoc dl, SDValue Chain, 4126 SDValue Ptr, SDValue Offset, 4127 MachinePointerInfo PtrInfo, EVT MemVT, 4128 bool isVolatile, bool isNonTemporal, bool isInvariant, 4129 unsigned Alignment, const MDNode *TBAAInfo, 4130 const MDNode *Ranges) { 4131 assert(Chain.getValueType() == MVT::Other && 4132 "Invalid chain type"); 4133 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4134 Alignment = getEVTAlignment(VT); 4135 4136 unsigned Flags = MachineMemOperand::MOLoad; 4137 if (isVolatile) 4138 Flags |= MachineMemOperand::MOVolatile; 4139 if (isNonTemporal) 4140 Flags |= MachineMemOperand::MONonTemporal; 4141 if (isInvariant) 4142 Flags |= MachineMemOperand::MOInvariant; 4143 4144 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4145 // clients. 4146 if (PtrInfo.V == 0) 4147 PtrInfo = InferPointerInfo(Ptr, Offset); 4148 4149 MachineFunction &MF = getMachineFunction(); 4150 MachineMemOperand *MMO = 4151 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4152 TBAAInfo, Ranges); 4153 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4154} 4155 4156SDValue 4157SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4158 EVT VT, DebugLoc dl, SDValue Chain, 4159 SDValue Ptr, SDValue Offset, EVT MemVT, 4160 MachineMemOperand *MMO) { 4161 if (VT == MemVT) { 4162 ExtType = ISD::NON_EXTLOAD; 4163 } else if (ExtType == ISD::NON_EXTLOAD) { 4164 assert(VT == MemVT && "Non-extending load from different memory type!"); 4165 } else { 4166 // Extending load. 4167 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4168 "Should only be an extending load, not truncating!"); 4169 assert(VT.isInteger() == MemVT.isInteger() && 4170 "Cannot convert from FP to Int or Int -> FP!"); 4171 assert(VT.isVector() == MemVT.isVector() && 4172 "Cannot use trunc store to convert to or from a vector!"); 4173 assert((!VT.isVector() || 4174 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4175 "Cannot use trunc store to change the number of vector elements!"); 4176 } 4177 4178 bool Indexed = AM != ISD::UNINDEXED; 4179 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4180 "Unindexed load with an offset!"); 4181 4182 SDVTList VTs = Indexed ? 4183 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4184 SDValue Ops[] = { Chain, Ptr, Offset }; 4185 FoldingSetNodeID ID; 4186 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4187 ID.AddInteger(MemVT.getRawBits()); 4188 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4189 MMO->isNonTemporal(), 4190 MMO->isInvariant())); 4191 void *IP = 0; 4192 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4193 cast<LoadSDNode>(E)->refineAlignment(MMO); 4194 return SDValue(E, 0); 4195 } 4196 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4197 MemVT, MMO); 4198 CSEMap.InsertNode(N, IP); 4199 AllNodes.push_back(N); 4200 return SDValue(N, 0); 4201} 4202 4203SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4204 SDValue Chain, SDValue Ptr, 4205 MachinePointerInfo PtrInfo, 4206 bool isVolatile, bool isNonTemporal, 4207 bool isInvariant, unsigned Alignment, 4208 const MDNode *TBAAInfo, 4209 const MDNode *Ranges) { 4210 SDValue Undef = getUNDEF(Ptr.getValueType()); 4211 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4212 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4213 TBAAInfo, Ranges); 4214} 4215 4216SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4217 SDValue Chain, SDValue Ptr, 4218 MachinePointerInfo PtrInfo, EVT MemVT, 4219 bool isVolatile, bool isNonTemporal, 4220 unsigned Alignment, const MDNode *TBAAInfo) { 4221 SDValue Undef = getUNDEF(Ptr.getValueType()); 4222 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4223 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4224 TBAAInfo); 4225} 4226 4227 4228SDValue 4229SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4230 SDValue Offset, ISD::MemIndexedMode AM) { 4231 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4232 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4233 "Load is already a indexed load!"); 4234 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4235 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4236 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4237 false, LD->getAlignment()); 4238} 4239 4240SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4241 SDValue Ptr, MachinePointerInfo PtrInfo, 4242 bool isVolatile, bool isNonTemporal, 4243 unsigned Alignment, const MDNode *TBAAInfo) { 4244 assert(Chain.getValueType() == MVT::Other && 4245 "Invalid chain type"); 4246 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4247 Alignment = getEVTAlignment(Val.getValueType()); 4248 4249 unsigned Flags = MachineMemOperand::MOStore; 4250 if (isVolatile) 4251 Flags |= MachineMemOperand::MOVolatile; 4252 if (isNonTemporal) 4253 Flags |= MachineMemOperand::MONonTemporal; 4254 4255 if (PtrInfo.V == 0) 4256 PtrInfo = InferPointerInfo(Ptr); 4257 4258 MachineFunction &MF = getMachineFunction(); 4259 MachineMemOperand *MMO = 4260 MF.getMachineMemOperand(PtrInfo, Flags, 4261 Val.getValueType().getStoreSize(), Alignment, 4262 TBAAInfo); 4263 4264 return getStore(Chain, dl, Val, Ptr, MMO); 4265} 4266 4267SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4268 SDValue Ptr, MachineMemOperand *MMO) { 4269 assert(Chain.getValueType() == MVT::Other && 4270 "Invalid chain type"); 4271 EVT VT = Val.getValueType(); 4272 SDVTList VTs = getVTList(MVT::Other); 4273 SDValue Undef = getUNDEF(Ptr.getValueType()); 4274 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4275 FoldingSetNodeID ID; 4276 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4277 ID.AddInteger(VT.getRawBits()); 4278 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4279 MMO->isNonTemporal(), MMO->isInvariant())); 4280 void *IP = 0; 4281 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4282 cast<StoreSDNode>(E)->refineAlignment(MMO); 4283 return SDValue(E, 0); 4284 } 4285 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4286 false, VT, MMO); 4287 CSEMap.InsertNode(N, IP); 4288 AllNodes.push_back(N); 4289 return SDValue(N, 0); 4290} 4291 4292SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4293 SDValue Ptr, MachinePointerInfo PtrInfo, 4294 EVT SVT,bool isVolatile, bool isNonTemporal, 4295 unsigned Alignment, 4296 const MDNode *TBAAInfo) { 4297 assert(Chain.getValueType() == MVT::Other && 4298 "Invalid chain type"); 4299 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4300 Alignment = getEVTAlignment(SVT); 4301 4302 unsigned Flags = MachineMemOperand::MOStore; 4303 if (isVolatile) 4304 Flags |= MachineMemOperand::MOVolatile; 4305 if (isNonTemporal) 4306 Flags |= MachineMemOperand::MONonTemporal; 4307 4308 if (PtrInfo.V == 0) 4309 PtrInfo = InferPointerInfo(Ptr); 4310 4311 MachineFunction &MF = getMachineFunction(); 4312 MachineMemOperand *MMO = 4313 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4314 TBAAInfo); 4315 4316 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4317} 4318 4319SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4320 SDValue Ptr, EVT SVT, 4321 MachineMemOperand *MMO) { 4322 EVT VT = Val.getValueType(); 4323 4324 assert(Chain.getValueType() == MVT::Other && 4325 "Invalid chain type"); 4326 if (VT == SVT) 4327 return getStore(Chain, dl, Val, Ptr, MMO); 4328 4329 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4330 "Should only be a truncating store, not extending!"); 4331 assert(VT.isInteger() == SVT.isInteger() && 4332 "Can't do FP-INT conversion!"); 4333 assert(VT.isVector() == SVT.isVector() && 4334 "Cannot use trunc store to convert to or from a vector!"); 4335 assert((!VT.isVector() || 4336 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4337 "Cannot use trunc store to change the number of vector elements!"); 4338 4339 SDVTList VTs = getVTList(MVT::Other); 4340 SDValue Undef = getUNDEF(Ptr.getValueType()); 4341 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4342 FoldingSetNodeID ID; 4343 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4344 ID.AddInteger(SVT.getRawBits()); 4345 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4346 MMO->isNonTemporal(), MMO->isInvariant())); 4347 void *IP = 0; 4348 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4349 cast<StoreSDNode>(E)->refineAlignment(MMO); 4350 return SDValue(E, 0); 4351 } 4352 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4353 true, SVT, MMO); 4354 CSEMap.InsertNode(N, IP); 4355 AllNodes.push_back(N); 4356 return SDValue(N, 0); 4357} 4358 4359SDValue 4360SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4361 SDValue Offset, ISD::MemIndexedMode AM) { 4362 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4363 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4364 "Store is already a indexed store!"); 4365 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4366 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4367 FoldingSetNodeID ID; 4368 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4369 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4370 ID.AddInteger(ST->getRawSubclassData()); 4371 void *IP = 0; 4372 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4373 return SDValue(E, 0); 4374 4375 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4376 ST->isTruncatingStore(), 4377 ST->getMemoryVT(), 4378 ST->getMemOperand()); 4379 CSEMap.InsertNode(N, IP); 4380 AllNodes.push_back(N); 4381 return SDValue(N, 0); 4382} 4383 4384SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4385 SDValue Chain, SDValue Ptr, 4386 SDValue SV, 4387 unsigned Align) { 4388 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4389 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4390} 4391 4392SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4393 const SDUse *Ops, unsigned NumOps) { 4394 switch (NumOps) { 4395 case 0: return getNode(Opcode, DL, VT); 4396 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4397 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4398 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4399 default: break; 4400 } 4401 4402 // Copy from an SDUse array into an SDValue array for use with 4403 // the regular getNode logic. 4404 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4405 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4406} 4407 4408SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4409 const SDValue *Ops, unsigned NumOps) { 4410 switch (NumOps) { 4411 case 0: return getNode(Opcode, DL, VT); 4412 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4413 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4414 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4415 default: break; 4416 } 4417 4418 switch (Opcode) { 4419 default: break; 4420 case ISD::SELECT_CC: { 4421 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4422 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4423 "LHS and RHS of condition must have same type!"); 4424 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4425 "True and False arms of SelectCC must have same type!"); 4426 assert(Ops[2].getValueType() == VT && 4427 "select_cc node must be of same type as true and false value!"); 4428 break; 4429 } 4430 case ISD::BR_CC: { 4431 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4432 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4433 "LHS/RHS of comparison should match types!"); 4434 break; 4435 } 4436 } 4437 4438 // Memoize nodes. 4439 SDNode *N; 4440 SDVTList VTs = getVTList(VT); 4441 4442 if (VT != MVT::Glue) { 4443 FoldingSetNodeID ID; 4444 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4445 void *IP = 0; 4446 4447 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4448 return SDValue(E, 0); 4449 4450 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4451 CSEMap.InsertNode(N, IP); 4452 } else { 4453 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4454 } 4455 4456 AllNodes.push_back(N); 4457#ifndef NDEBUG 4458 VerifySDNode(N); 4459#endif 4460 return SDValue(N, 0); 4461} 4462 4463SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4464 const std::vector<EVT> &ResultTys, 4465 const SDValue *Ops, unsigned NumOps) { 4466 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4467 Ops, NumOps); 4468} 4469 4470SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4471 const EVT *VTs, unsigned NumVTs, 4472 const SDValue *Ops, unsigned NumOps) { 4473 if (NumVTs == 1) 4474 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4475 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4476} 4477 4478SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4479 const SDValue *Ops, unsigned NumOps) { 4480 if (VTList.NumVTs == 1) 4481 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4482 4483#if 0 4484 switch (Opcode) { 4485 // FIXME: figure out how to safely handle things like 4486 // int foo(int x) { return 1 << (x & 255); } 4487 // int bar() { return foo(256); } 4488 case ISD::SRA_PARTS: 4489 case ISD::SRL_PARTS: 4490 case ISD::SHL_PARTS: 4491 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4492 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4493 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4494 else if (N3.getOpcode() == ISD::AND) 4495 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4496 // If the and is only masking out bits that cannot effect the shift, 4497 // eliminate the and. 4498 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4499 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4500 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4501 } 4502 break; 4503 } 4504#endif 4505 4506 // Memoize the node unless it returns a flag. 4507 SDNode *N; 4508 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4509 FoldingSetNodeID ID; 4510 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4511 void *IP = 0; 4512 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4513 return SDValue(E, 0); 4514 4515 if (NumOps == 1) { 4516 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4517 } else if (NumOps == 2) { 4518 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4519 } else if (NumOps == 3) { 4520 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4521 Ops[2]); 4522 } else { 4523 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4524 } 4525 CSEMap.InsertNode(N, IP); 4526 } else { 4527 if (NumOps == 1) { 4528 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4529 } else if (NumOps == 2) { 4530 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4531 } else if (NumOps == 3) { 4532 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4533 Ops[2]); 4534 } else { 4535 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4536 } 4537 } 4538 AllNodes.push_back(N); 4539#ifndef NDEBUG 4540 VerifySDNode(N); 4541#endif 4542 return SDValue(N, 0); 4543} 4544 4545SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4546 return getNode(Opcode, DL, VTList, 0, 0); 4547} 4548 4549SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4550 SDValue N1) { 4551 SDValue Ops[] = { N1 }; 4552 return getNode(Opcode, DL, VTList, Ops, 1); 4553} 4554 4555SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4556 SDValue N1, SDValue N2) { 4557 SDValue Ops[] = { N1, N2 }; 4558 return getNode(Opcode, DL, VTList, Ops, 2); 4559} 4560 4561SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4562 SDValue N1, SDValue N2, SDValue N3) { 4563 SDValue Ops[] = { N1, N2, N3 }; 4564 return getNode(Opcode, DL, VTList, Ops, 3); 4565} 4566 4567SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4568 SDValue N1, SDValue N2, SDValue N3, 4569 SDValue N4) { 4570 SDValue Ops[] = { N1, N2, N3, N4 }; 4571 return getNode(Opcode, DL, VTList, Ops, 4); 4572} 4573 4574SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4575 SDValue N1, SDValue N2, SDValue N3, 4576 SDValue N4, SDValue N5) { 4577 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4578 return getNode(Opcode, DL, VTList, Ops, 5); 4579} 4580 4581SDVTList SelectionDAG::getVTList(EVT VT) { 4582 return makeVTList(SDNode::getValueTypeList(VT), 1); 4583} 4584 4585SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4586 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4587 E = VTList.rend(); I != E; ++I) 4588 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4589 return *I; 4590 4591 EVT *Array = Allocator.Allocate<EVT>(2); 4592 Array[0] = VT1; 4593 Array[1] = VT2; 4594 SDVTList Result = makeVTList(Array, 2); 4595 VTList.push_back(Result); 4596 return Result; 4597} 4598 4599SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4600 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4601 E = VTList.rend(); I != E; ++I) 4602 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4603 I->VTs[2] == VT3) 4604 return *I; 4605 4606 EVT *Array = Allocator.Allocate<EVT>(3); 4607 Array[0] = VT1; 4608 Array[1] = VT2; 4609 Array[2] = VT3; 4610 SDVTList Result = makeVTList(Array, 3); 4611 VTList.push_back(Result); 4612 return Result; 4613} 4614 4615SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4616 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4617 E = VTList.rend(); I != E; ++I) 4618 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4619 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4620 return *I; 4621 4622 EVT *Array = Allocator.Allocate<EVT>(4); 4623 Array[0] = VT1; 4624 Array[1] = VT2; 4625 Array[2] = VT3; 4626 Array[3] = VT4; 4627 SDVTList Result = makeVTList(Array, 4); 4628 VTList.push_back(Result); 4629 return Result; 4630} 4631 4632SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4633 switch (NumVTs) { 4634 case 0: llvm_unreachable("Cannot have nodes without results!"); 4635 case 1: return getVTList(VTs[0]); 4636 case 2: return getVTList(VTs[0], VTs[1]); 4637 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4638 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4639 default: break; 4640 } 4641 4642 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4643 E = VTList.rend(); I != E; ++I) { 4644 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4645 continue; 4646 4647 bool NoMatch = false; 4648 for (unsigned i = 2; i != NumVTs; ++i) 4649 if (VTs[i] != I->VTs[i]) { 4650 NoMatch = true; 4651 break; 4652 } 4653 if (!NoMatch) 4654 return *I; 4655 } 4656 4657 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4658 std::copy(VTs, VTs+NumVTs, Array); 4659 SDVTList Result = makeVTList(Array, NumVTs); 4660 VTList.push_back(Result); 4661 return Result; 4662} 4663 4664 4665/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4666/// specified operands. If the resultant node already exists in the DAG, 4667/// this does not modify the specified node, instead it returns the node that 4668/// already exists. If the resultant node does not exist in the DAG, the 4669/// input node is returned. As a degenerate case, if you specify the same 4670/// input operands as the node already has, the input node is returned. 4671SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4672 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4673 4674 // Check to see if there is no change. 4675 if (Op == N->getOperand(0)) return N; 4676 4677 // See if the modified node already exists. 4678 void *InsertPos = 0; 4679 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4680 return Existing; 4681 4682 // Nope it doesn't. Remove the node from its current place in the maps. 4683 if (InsertPos) 4684 if (!RemoveNodeFromCSEMaps(N)) 4685 InsertPos = 0; 4686 4687 // Now we update the operands. 4688 N->OperandList[0].set(Op); 4689 4690 // If this gets put into a CSE map, add it. 4691 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4692 return N; 4693} 4694 4695SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4696 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4697 4698 // Check to see if there is no change. 4699 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4700 return N; // No operands changed, just return the input node. 4701 4702 // See if the modified node already exists. 4703 void *InsertPos = 0; 4704 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4705 return Existing; 4706 4707 // Nope it doesn't. Remove the node from its current place in the maps. 4708 if (InsertPos) 4709 if (!RemoveNodeFromCSEMaps(N)) 4710 InsertPos = 0; 4711 4712 // Now we update the operands. 4713 if (N->OperandList[0] != Op1) 4714 N->OperandList[0].set(Op1); 4715 if (N->OperandList[1] != Op2) 4716 N->OperandList[1].set(Op2); 4717 4718 // If this gets put into a CSE map, add it. 4719 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4720 return N; 4721} 4722 4723SDNode *SelectionDAG:: 4724UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4725 SDValue Ops[] = { Op1, Op2, Op3 }; 4726 return UpdateNodeOperands(N, Ops, 3); 4727} 4728 4729SDNode *SelectionDAG:: 4730UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4731 SDValue Op3, SDValue Op4) { 4732 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4733 return UpdateNodeOperands(N, Ops, 4); 4734} 4735 4736SDNode *SelectionDAG:: 4737UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4738 SDValue Op3, SDValue Op4, SDValue Op5) { 4739 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4740 return UpdateNodeOperands(N, Ops, 5); 4741} 4742 4743SDNode *SelectionDAG:: 4744UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4745 assert(N->getNumOperands() == NumOps && 4746 "Update with wrong number of operands"); 4747 4748 // Check to see if there is no change. 4749 bool AnyChange = false; 4750 for (unsigned i = 0; i != NumOps; ++i) { 4751 if (Ops[i] != N->getOperand(i)) { 4752 AnyChange = true; 4753 break; 4754 } 4755 } 4756 4757 // No operands changed, just return the input node. 4758 if (!AnyChange) return N; 4759 4760 // See if the modified node already exists. 4761 void *InsertPos = 0; 4762 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4763 return Existing; 4764 4765 // Nope it doesn't. Remove the node from its current place in the maps. 4766 if (InsertPos) 4767 if (!RemoveNodeFromCSEMaps(N)) 4768 InsertPos = 0; 4769 4770 // Now we update the operands. 4771 for (unsigned i = 0; i != NumOps; ++i) 4772 if (N->OperandList[i] != Ops[i]) 4773 N->OperandList[i].set(Ops[i]); 4774 4775 // If this gets put into a CSE map, add it. 4776 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4777 return N; 4778} 4779 4780/// DropOperands - Release the operands and set this node to have 4781/// zero operands. 4782void SDNode::DropOperands() { 4783 // Unlike the code in MorphNodeTo that does this, we don't need to 4784 // watch for dead nodes here. 4785 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4786 SDUse &Use = *I++; 4787 Use.set(SDValue()); 4788 } 4789} 4790 4791/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4792/// machine opcode. 4793/// 4794SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4795 EVT VT) { 4796 SDVTList VTs = getVTList(VT); 4797 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4798} 4799 4800SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4801 EVT VT, SDValue Op1) { 4802 SDVTList VTs = getVTList(VT); 4803 SDValue Ops[] = { Op1 }; 4804 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4805} 4806 4807SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4808 EVT VT, SDValue Op1, 4809 SDValue Op2) { 4810 SDVTList VTs = getVTList(VT); 4811 SDValue Ops[] = { Op1, Op2 }; 4812 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4813} 4814 4815SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4816 EVT VT, SDValue Op1, 4817 SDValue Op2, SDValue Op3) { 4818 SDVTList VTs = getVTList(VT); 4819 SDValue Ops[] = { Op1, Op2, Op3 }; 4820 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4821} 4822 4823SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4824 EVT VT, const SDValue *Ops, 4825 unsigned NumOps) { 4826 SDVTList VTs = getVTList(VT); 4827 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4828} 4829 4830SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4831 EVT VT1, EVT VT2, const SDValue *Ops, 4832 unsigned NumOps) { 4833 SDVTList VTs = getVTList(VT1, VT2); 4834 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4835} 4836 4837SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4838 EVT VT1, EVT VT2) { 4839 SDVTList VTs = getVTList(VT1, VT2); 4840 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4841} 4842 4843SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4844 EVT VT1, EVT VT2, EVT VT3, 4845 const SDValue *Ops, unsigned NumOps) { 4846 SDVTList VTs = getVTList(VT1, VT2, VT3); 4847 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4848} 4849 4850SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4851 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4852 const SDValue *Ops, unsigned NumOps) { 4853 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4854 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4855} 4856 4857SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4858 EVT VT1, EVT VT2, 4859 SDValue Op1) { 4860 SDVTList VTs = getVTList(VT1, VT2); 4861 SDValue Ops[] = { Op1 }; 4862 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4863} 4864 4865SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4866 EVT VT1, EVT VT2, 4867 SDValue Op1, SDValue Op2) { 4868 SDVTList VTs = getVTList(VT1, VT2); 4869 SDValue Ops[] = { Op1, Op2 }; 4870 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4871} 4872 4873SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4874 EVT VT1, EVT VT2, 4875 SDValue Op1, SDValue Op2, 4876 SDValue Op3) { 4877 SDVTList VTs = getVTList(VT1, VT2); 4878 SDValue Ops[] = { Op1, Op2, Op3 }; 4879 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4880} 4881 4882SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4883 EVT VT1, EVT VT2, EVT VT3, 4884 SDValue Op1, SDValue Op2, 4885 SDValue Op3) { 4886 SDVTList VTs = getVTList(VT1, VT2, VT3); 4887 SDValue Ops[] = { Op1, Op2, Op3 }; 4888 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4889} 4890 4891SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4892 SDVTList VTs, const SDValue *Ops, 4893 unsigned NumOps) { 4894 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4895 // Reset the NodeID to -1. 4896 N->setNodeId(-1); 4897 return N; 4898} 4899 4900/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 4901/// the line number information on the merged node since it is not possible to 4902/// preserve the information that operation is associated with multiple lines. 4903/// This will make the debugger working better at -O0, were there is a higher 4904/// probability having other instructions associated with that line. 4905/// 4906SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 4907 DebugLoc NLoc = N->getDebugLoc(); 4908 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 4909 N->setDebugLoc(DebugLoc()); 4910 } 4911 return N; 4912} 4913 4914/// MorphNodeTo - This *mutates* the specified node to have the specified 4915/// return type, opcode, and operands. 4916/// 4917/// Note that MorphNodeTo returns the resultant node. If there is already a 4918/// node of the specified opcode and operands, it returns that node instead of 4919/// the current one. Note that the DebugLoc need not be the same. 4920/// 4921/// Using MorphNodeTo is faster than creating a new node and swapping it in 4922/// with ReplaceAllUsesWith both because it often avoids allocating a new 4923/// node, and because it doesn't require CSE recalculation for any of 4924/// the node's users. 4925/// 4926SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4927 SDVTList VTs, const SDValue *Ops, 4928 unsigned NumOps) { 4929 // If an identical node already exists, use it. 4930 void *IP = 0; 4931 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4932 FoldingSetNodeID ID; 4933 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4934 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4935 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 4936 } 4937 4938 if (!RemoveNodeFromCSEMaps(N)) 4939 IP = 0; 4940 4941 // Start the morphing. 4942 N->NodeType = Opc; 4943 N->ValueList = VTs.VTs; 4944 N->NumValues = VTs.NumVTs; 4945 4946 // Clear the operands list, updating used nodes to remove this from their 4947 // use list. Keep track of any operands that become dead as a result. 4948 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4949 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4950 SDUse &Use = *I++; 4951 SDNode *Used = Use.getNode(); 4952 Use.set(SDValue()); 4953 if (Used->use_empty()) 4954 DeadNodeSet.insert(Used); 4955 } 4956 4957 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4958 // Initialize the memory references information. 4959 MN->setMemRefs(0, 0); 4960 // If NumOps is larger than the # of operands we can have in a 4961 // MachineSDNode, reallocate the operand list. 4962 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4963 if (MN->OperandsNeedDelete) 4964 delete[] MN->OperandList; 4965 if (NumOps > array_lengthof(MN->LocalOperands)) 4966 // We're creating a final node that will live unmorphed for the 4967 // remainder of the current SelectionDAG iteration, so we can allocate 4968 // the operands directly out of a pool with no recycling metadata. 4969 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4970 Ops, NumOps); 4971 else 4972 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4973 MN->OperandsNeedDelete = false; 4974 } else 4975 MN->InitOperands(MN->OperandList, Ops, NumOps); 4976 } else { 4977 // If NumOps is larger than the # of operands we currently have, reallocate 4978 // the operand list. 4979 if (NumOps > N->NumOperands) { 4980 if (N->OperandsNeedDelete) 4981 delete[] N->OperandList; 4982 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4983 N->OperandsNeedDelete = true; 4984 } else 4985 N->InitOperands(N->OperandList, Ops, NumOps); 4986 } 4987 4988 // Delete any nodes that are still dead after adding the uses for the 4989 // new operands. 4990 if (!DeadNodeSet.empty()) { 4991 SmallVector<SDNode *, 16> DeadNodes; 4992 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4993 E = DeadNodeSet.end(); I != E; ++I) 4994 if ((*I)->use_empty()) 4995 DeadNodes.push_back(*I); 4996 RemoveDeadNodes(DeadNodes); 4997 } 4998 4999 if (IP) 5000 CSEMap.InsertNode(N, IP); // Memoize the new node. 5001 return N; 5002} 5003 5004 5005/// getMachineNode - These are used for target selectors to create a new node 5006/// with specified return type(s), MachineInstr opcode, and operands. 5007/// 5008/// Note that getMachineNode returns the resultant node. If there is already a 5009/// node of the specified opcode and operands, it returns that node instead of 5010/// the current one. 5011MachineSDNode * 5012SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5013 SDVTList VTs = getVTList(VT); 5014 return getMachineNode(Opcode, dl, VTs, 0, 0); 5015} 5016 5017MachineSDNode * 5018SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5019 SDVTList VTs = getVTList(VT); 5020 SDValue Ops[] = { Op1 }; 5021 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5022} 5023 5024MachineSDNode * 5025SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5026 SDValue Op1, SDValue Op2) { 5027 SDVTList VTs = getVTList(VT); 5028 SDValue Ops[] = { Op1, Op2 }; 5029 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5030} 5031 5032MachineSDNode * 5033SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5034 SDValue Op1, SDValue Op2, SDValue Op3) { 5035 SDVTList VTs = getVTList(VT); 5036 SDValue Ops[] = { Op1, Op2, Op3 }; 5037 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5038} 5039 5040MachineSDNode * 5041SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5042 const SDValue *Ops, unsigned NumOps) { 5043 SDVTList VTs = getVTList(VT); 5044 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5045} 5046 5047MachineSDNode * 5048SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5049 SDVTList VTs = getVTList(VT1, VT2); 5050 return getMachineNode(Opcode, dl, VTs, 0, 0); 5051} 5052 5053MachineSDNode * 5054SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5055 EVT VT1, EVT VT2, SDValue Op1) { 5056 SDVTList VTs = getVTList(VT1, VT2); 5057 SDValue Ops[] = { Op1 }; 5058 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5059} 5060 5061MachineSDNode * 5062SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5063 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5064 SDVTList VTs = getVTList(VT1, VT2); 5065 SDValue Ops[] = { Op1, Op2 }; 5066 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5067} 5068 5069MachineSDNode * 5070SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5071 EVT VT1, EVT VT2, SDValue Op1, 5072 SDValue Op2, SDValue Op3) { 5073 SDVTList VTs = getVTList(VT1, VT2); 5074 SDValue Ops[] = { Op1, Op2, Op3 }; 5075 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5076} 5077 5078MachineSDNode * 5079SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5080 EVT VT1, EVT VT2, 5081 const SDValue *Ops, unsigned NumOps) { 5082 SDVTList VTs = getVTList(VT1, VT2); 5083 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5084} 5085 5086MachineSDNode * 5087SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5088 EVT VT1, EVT VT2, EVT VT3, 5089 SDValue Op1, SDValue Op2) { 5090 SDVTList VTs = getVTList(VT1, VT2, VT3); 5091 SDValue Ops[] = { Op1, Op2 }; 5092 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5093} 5094 5095MachineSDNode * 5096SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5097 EVT VT1, EVT VT2, EVT VT3, 5098 SDValue Op1, SDValue Op2, SDValue Op3) { 5099 SDVTList VTs = getVTList(VT1, VT2, VT3); 5100 SDValue Ops[] = { Op1, Op2, Op3 }; 5101 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5102} 5103 5104MachineSDNode * 5105SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5106 EVT VT1, EVT VT2, EVT VT3, 5107 const SDValue *Ops, unsigned NumOps) { 5108 SDVTList VTs = getVTList(VT1, VT2, VT3); 5109 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5110} 5111 5112MachineSDNode * 5113SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5114 EVT VT2, EVT VT3, EVT VT4, 5115 const SDValue *Ops, unsigned NumOps) { 5116 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5117 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5118} 5119 5120MachineSDNode * 5121SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5122 const std::vector<EVT> &ResultTys, 5123 const SDValue *Ops, unsigned NumOps) { 5124 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5125 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5126} 5127 5128MachineSDNode * 5129SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5130 const SDValue *Ops, unsigned NumOps) { 5131 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5132 MachineSDNode *N; 5133 void *IP = 0; 5134 5135 if (DoCSE) { 5136 FoldingSetNodeID ID; 5137 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5138 IP = 0; 5139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5140 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5141 } 5142 } 5143 5144 // Allocate a new MachineSDNode. 5145 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5146 5147 // Initialize the operands list. 5148 if (NumOps > array_lengthof(N->LocalOperands)) 5149 // We're creating a final node that will live unmorphed for the 5150 // remainder of the current SelectionDAG iteration, so we can allocate 5151 // the operands directly out of a pool with no recycling metadata. 5152 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5153 Ops, NumOps); 5154 else 5155 N->InitOperands(N->LocalOperands, Ops, NumOps); 5156 N->OperandsNeedDelete = false; 5157 5158 if (DoCSE) 5159 CSEMap.InsertNode(N, IP); 5160 5161 AllNodes.push_back(N); 5162#ifndef NDEBUG 5163 VerifyMachineNode(N); 5164#endif 5165 return N; 5166} 5167 5168/// getTargetExtractSubreg - A convenience function for creating 5169/// TargetOpcode::EXTRACT_SUBREG nodes. 5170SDValue 5171SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5172 SDValue Operand) { 5173 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5174 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5175 VT, Operand, SRIdxVal); 5176 return SDValue(Subreg, 0); 5177} 5178 5179/// getTargetInsertSubreg - A convenience function for creating 5180/// TargetOpcode::INSERT_SUBREG nodes. 5181SDValue 5182SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5183 SDValue Operand, SDValue Subreg) { 5184 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5185 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5186 VT, Operand, Subreg, SRIdxVal); 5187 return SDValue(Result, 0); 5188} 5189 5190/// getNodeIfExists - Get the specified node if it's already available, or 5191/// else return NULL. 5192SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5193 const SDValue *Ops, unsigned NumOps) { 5194 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5195 FoldingSetNodeID ID; 5196 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5197 void *IP = 0; 5198 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5199 return E; 5200 } 5201 return NULL; 5202} 5203 5204/// getDbgValue - Creates a SDDbgValue node. 5205/// 5206SDDbgValue * 5207SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5208 DebugLoc DL, unsigned O) { 5209 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5210} 5211 5212SDDbgValue * 5213SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5214 DebugLoc DL, unsigned O) { 5215 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5216} 5217 5218SDDbgValue * 5219SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5220 DebugLoc DL, unsigned O) { 5221 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5222} 5223 5224namespace { 5225 5226/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5227/// pointed to by a use iterator is deleted, increment the use iterator 5228/// so that it doesn't dangle. 5229/// 5230/// This class also manages a "downlink" DAGUpdateListener, to forward 5231/// messages to ReplaceAllUsesWith's callers. 5232/// 5233class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5234 SelectionDAG::DAGUpdateListener *DownLink; 5235 SDNode::use_iterator &UI; 5236 SDNode::use_iterator &UE; 5237 5238 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5239 // Increment the iterator as needed. 5240 while (UI != UE && N == *UI) 5241 ++UI; 5242 5243 // Then forward the message. 5244 if (DownLink) DownLink->NodeDeleted(N, E); 5245 } 5246 5247 virtual void NodeUpdated(SDNode *N) { 5248 // Just forward the message. 5249 if (DownLink) DownLink->NodeUpdated(N); 5250 } 5251 5252public: 5253 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5254 SDNode::use_iterator &ui, 5255 SDNode::use_iterator &ue) 5256 : DownLink(dl), UI(ui), UE(ue) {} 5257}; 5258 5259} 5260 5261/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5262/// This can cause recursive merging of nodes in the DAG. 5263/// 5264/// This version assumes From has a single result value. 5265/// 5266void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5267 DAGUpdateListener *UpdateListener) { 5268 SDNode *From = FromN.getNode(); 5269 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5270 "Cannot replace with this method!"); 5271 assert(From != To.getNode() && "Cannot replace uses of with self"); 5272 5273 // Iterate over all the existing uses of From. New uses will be added 5274 // to the beginning of the use list, which we avoid visiting. 5275 // This specifically avoids visiting uses of From that arise while the 5276 // replacement is happening, because any such uses would be the result 5277 // of CSE: If an existing node looks like From after one of its operands 5278 // is replaced by To, we don't want to replace of all its users with To 5279 // too. See PR3018 for more info. 5280 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5281 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5282 while (UI != UE) { 5283 SDNode *User = *UI; 5284 5285 // This node is about to morph, remove its old self from the CSE maps. 5286 RemoveNodeFromCSEMaps(User); 5287 5288 // A user can appear in a use list multiple times, and when this 5289 // happens the uses are usually next to each other in the list. 5290 // To help reduce the number of CSE recomputations, process all 5291 // the uses of this user that we can find this way. 5292 do { 5293 SDUse &Use = UI.getUse(); 5294 ++UI; 5295 Use.set(To); 5296 } while (UI != UE && *UI == User); 5297 5298 // Now that we have modified User, add it back to the CSE maps. If it 5299 // already exists there, recursively merge the results together. 5300 AddModifiedNodeToCSEMaps(User, &Listener); 5301 } 5302 5303 // If we just RAUW'd the root, take note. 5304 if (FromN == getRoot()) 5305 setRoot(To); 5306} 5307 5308/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5309/// This can cause recursive merging of nodes in the DAG. 5310/// 5311/// This version assumes that for each value of From, there is a 5312/// corresponding value in To in the same position with the same type. 5313/// 5314void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5315 DAGUpdateListener *UpdateListener) { 5316#ifndef NDEBUG 5317 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5318 assert((!From->hasAnyUseOfValue(i) || 5319 From->getValueType(i) == To->getValueType(i)) && 5320 "Cannot use this version of ReplaceAllUsesWith!"); 5321#endif 5322 5323 // Handle the trivial case. 5324 if (From == To) 5325 return; 5326 5327 // Iterate over just the existing users of From. See the comments in 5328 // the ReplaceAllUsesWith above. 5329 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5330 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5331 while (UI != UE) { 5332 SDNode *User = *UI; 5333 5334 // This node is about to morph, remove its old self from the CSE maps. 5335 RemoveNodeFromCSEMaps(User); 5336 5337 // A user can appear in a use list multiple times, and when this 5338 // happens the uses are usually next to each other in the list. 5339 // To help reduce the number of CSE recomputations, process all 5340 // the uses of this user that we can find this way. 5341 do { 5342 SDUse &Use = UI.getUse(); 5343 ++UI; 5344 Use.setNode(To); 5345 } while (UI != UE && *UI == User); 5346 5347 // Now that we have modified User, add it back to the CSE maps. If it 5348 // already exists there, recursively merge the results together. 5349 AddModifiedNodeToCSEMaps(User, &Listener); 5350 } 5351 5352 // If we just RAUW'd the root, take note. 5353 if (From == getRoot().getNode()) 5354 setRoot(SDValue(To, getRoot().getResNo())); 5355} 5356 5357/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5358/// This can cause recursive merging of nodes in the DAG. 5359/// 5360/// This version can replace From with any result values. To must match the 5361/// number and types of values returned by From. 5362void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5363 const SDValue *To, 5364 DAGUpdateListener *UpdateListener) { 5365 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5366 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5367 5368 // Iterate over just the existing users of From. See the comments in 5369 // the ReplaceAllUsesWith above. 5370 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5371 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5372 while (UI != UE) { 5373 SDNode *User = *UI; 5374 5375 // This node is about to morph, remove its old self from the CSE maps. 5376 RemoveNodeFromCSEMaps(User); 5377 5378 // A user can appear in a use list multiple times, and when this 5379 // happens the uses are usually next to each other in the list. 5380 // To help reduce the number of CSE recomputations, process all 5381 // the uses of this user that we can find this way. 5382 do { 5383 SDUse &Use = UI.getUse(); 5384 const SDValue &ToOp = To[Use.getResNo()]; 5385 ++UI; 5386 Use.set(ToOp); 5387 } while (UI != UE && *UI == User); 5388 5389 // Now that we have modified User, add it back to the CSE maps. If it 5390 // already exists there, recursively merge the results together. 5391 AddModifiedNodeToCSEMaps(User, &Listener); 5392 } 5393 5394 // If we just RAUW'd the root, take note. 5395 if (From == getRoot().getNode()) 5396 setRoot(SDValue(To[getRoot().getResNo()])); 5397} 5398 5399/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5400/// uses of other values produced by From.getNode() alone. The Deleted 5401/// vector is handled the same way as for ReplaceAllUsesWith. 5402void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5403 DAGUpdateListener *UpdateListener){ 5404 // Handle the really simple, really trivial case efficiently. 5405 if (From == To) return; 5406 5407 // Handle the simple, trivial, case efficiently. 5408 if (From.getNode()->getNumValues() == 1) { 5409 ReplaceAllUsesWith(From, To, UpdateListener); 5410 return; 5411 } 5412 5413 // Iterate over just the existing users of From. See the comments in 5414 // the ReplaceAllUsesWith above. 5415 SDNode::use_iterator UI = From.getNode()->use_begin(), 5416 UE = From.getNode()->use_end(); 5417 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5418 while (UI != UE) { 5419 SDNode *User = *UI; 5420 bool UserRemovedFromCSEMaps = false; 5421 5422 // A user can appear in a use list multiple times, and when this 5423 // happens the uses are usually next to each other in the list. 5424 // To help reduce the number of CSE recomputations, process all 5425 // the uses of this user that we can find this way. 5426 do { 5427 SDUse &Use = UI.getUse(); 5428 5429 // Skip uses of different values from the same node. 5430 if (Use.getResNo() != From.getResNo()) { 5431 ++UI; 5432 continue; 5433 } 5434 5435 // If this node hasn't been modified yet, it's still in the CSE maps, 5436 // so remove its old self from the CSE maps. 5437 if (!UserRemovedFromCSEMaps) { 5438 RemoveNodeFromCSEMaps(User); 5439 UserRemovedFromCSEMaps = true; 5440 } 5441 5442 ++UI; 5443 Use.set(To); 5444 } while (UI != UE && *UI == User); 5445 5446 // We are iterating over all uses of the From node, so if a use 5447 // doesn't use the specific value, no changes are made. 5448 if (!UserRemovedFromCSEMaps) 5449 continue; 5450 5451 // Now that we have modified User, add it back to the CSE maps. If it 5452 // already exists there, recursively merge the results together. 5453 AddModifiedNodeToCSEMaps(User, &Listener); 5454 } 5455 5456 // If we just RAUW'd the root, take note. 5457 if (From == getRoot()) 5458 setRoot(To); 5459} 5460 5461namespace { 5462 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5463 /// to record information about a use. 5464 struct UseMemo { 5465 SDNode *User; 5466 unsigned Index; 5467 SDUse *Use; 5468 }; 5469 5470 /// operator< - Sort Memos by User. 5471 bool operator<(const UseMemo &L, const UseMemo &R) { 5472 return (intptr_t)L.User < (intptr_t)R.User; 5473 } 5474} 5475 5476/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5477/// uses of other values produced by From.getNode() alone. The same value 5478/// may appear in both the From and To list. The Deleted vector is 5479/// handled the same way as for ReplaceAllUsesWith. 5480void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5481 const SDValue *To, 5482 unsigned Num, 5483 DAGUpdateListener *UpdateListener){ 5484 // Handle the simple, trivial case efficiently. 5485 if (Num == 1) 5486 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5487 5488 // Read up all the uses and make records of them. This helps 5489 // processing new uses that are introduced during the 5490 // replacement process. 5491 SmallVector<UseMemo, 4> Uses; 5492 for (unsigned i = 0; i != Num; ++i) { 5493 unsigned FromResNo = From[i].getResNo(); 5494 SDNode *FromNode = From[i].getNode(); 5495 for (SDNode::use_iterator UI = FromNode->use_begin(), 5496 E = FromNode->use_end(); UI != E; ++UI) { 5497 SDUse &Use = UI.getUse(); 5498 if (Use.getResNo() == FromResNo) { 5499 UseMemo Memo = { *UI, i, &Use }; 5500 Uses.push_back(Memo); 5501 } 5502 } 5503 } 5504 5505 // Sort the uses, so that all the uses from a given User are together. 5506 std::sort(Uses.begin(), Uses.end()); 5507 5508 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5509 UseIndex != UseIndexEnd; ) { 5510 // We know that this user uses some value of From. If it is the right 5511 // value, update it. 5512 SDNode *User = Uses[UseIndex].User; 5513 5514 // This node is about to morph, remove its old self from the CSE maps. 5515 RemoveNodeFromCSEMaps(User); 5516 5517 // The Uses array is sorted, so all the uses for a given User 5518 // are next to each other in the list. 5519 // To help reduce the number of CSE recomputations, process all 5520 // the uses of this user that we can find this way. 5521 do { 5522 unsigned i = Uses[UseIndex].Index; 5523 SDUse &Use = *Uses[UseIndex].Use; 5524 ++UseIndex; 5525 5526 Use.set(To[i]); 5527 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5528 5529 // Now that we have modified User, add it back to the CSE maps. If it 5530 // already exists there, recursively merge the results together. 5531 AddModifiedNodeToCSEMaps(User, UpdateListener); 5532 } 5533} 5534 5535/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5536/// based on their topological order. It returns the maximum id and a vector 5537/// of the SDNodes* in assigned order by reference. 5538unsigned SelectionDAG::AssignTopologicalOrder() { 5539 5540 unsigned DAGSize = 0; 5541 5542 // SortedPos tracks the progress of the algorithm. Nodes before it are 5543 // sorted, nodes after it are unsorted. When the algorithm completes 5544 // it is at the end of the list. 5545 allnodes_iterator SortedPos = allnodes_begin(); 5546 5547 // Visit all the nodes. Move nodes with no operands to the front of 5548 // the list immediately. Annotate nodes that do have operands with their 5549 // operand count. Before we do this, the Node Id fields of the nodes 5550 // may contain arbitrary values. After, the Node Id fields for nodes 5551 // before SortedPos will contain the topological sort index, and the 5552 // Node Id fields for nodes At SortedPos and after will contain the 5553 // count of outstanding operands. 5554 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5555 SDNode *N = I++; 5556 checkForCycles(N); 5557 unsigned Degree = N->getNumOperands(); 5558 if (Degree == 0) { 5559 // A node with no uses, add it to the result array immediately. 5560 N->setNodeId(DAGSize++); 5561 allnodes_iterator Q = N; 5562 if (Q != SortedPos) 5563 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5564 assert(SortedPos != AllNodes.end() && "Overran node list"); 5565 ++SortedPos; 5566 } else { 5567 // Temporarily use the Node Id as scratch space for the degree count. 5568 N->setNodeId(Degree); 5569 } 5570 } 5571 5572 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5573 // such that by the time the end is reached all nodes will be sorted. 5574 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5575 SDNode *N = I; 5576 checkForCycles(N); 5577 // N is in sorted position, so all its uses have one less operand 5578 // that needs to be sorted. 5579 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5580 UI != UE; ++UI) { 5581 SDNode *P = *UI; 5582 unsigned Degree = P->getNodeId(); 5583 assert(Degree != 0 && "Invalid node degree"); 5584 --Degree; 5585 if (Degree == 0) { 5586 // All of P's operands are sorted, so P may sorted now. 5587 P->setNodeId(DAGSize++); 5588 if (P != SortedPos) 5589 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5590 assert(SortedPos != AllNodes.end() && "Overran node list"); 5591 ++SortedPos; 5592 } else { 5593 // Update P's outstanding operand count. 5594 P->setNodeId(Degree); 5595 } 5596 } 5597 if (I == SortedPos) { 5598#ifndef NDEBUG 5599 SDNode *S = ++I; 5600 dbgs() << "Overran sorted position:\n"; 5601 S->dumprFull(); 5602#endif 5603 llvm_unreachable(0); 5604 } 5605 } 5606 5607 assert(SortedPos == AllNodes.end() && 5608 "Topological sort incomplete!"); 5609 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5610 "First node in topological sort is not the entry token!"); 5611 assert(AllNodes.front().getNodeId() == 0 && 5612 "First node in topological sort has non-zero id!"); 5613 assert(AllNodes.front().getNumOperands() == 0 && 5614 "First node in topological sort has operands!"); 5615 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5616 "Last node in topologic sort has unexpected id!"); 5617 assert(AllNodes.back().use_empty() && 5618 "Last node in topologic sort has users!"); 5619 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5620 return DAGSize; 5621} 5622 5623/// AssignOrdering - Assign an order to the SDNode. 5624void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5625 assert(SD && "Trying to assign an order to a null node!"); 5626 Ordering->add(SD, Order); 5627} 5628 5629/// GetOrdering - Get the order for the SDNode. 5630unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5631 assert(SD && "Trying to get the order of a null node!"); 5632 return Ordering->getOrder(SD); 5633} 5634 5635/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5636/// value is produced by SD. 5637void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5638 DbgInfo->add(DB, SD, isParameter); 5639 if (SD) 5640 SD->setHasDebugValue(true); 5641} 5642 5643/// TransferDbgValues - Transfer SDDbgValues. 5644void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5645 if (From == To || !From.getNode()->getHasDebugValue()) 5646 return; 5647 SDNode *FromNode = From.getNode(); 5648 SDNode *ToNode = To.getNode(); 5649 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5650 SmallVector<SDDbgValue *, 2> ClonedDVs; 5651 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5652 I != E; ++I) { 5653 SDDbgValue *Dbg = *I; 5654 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5655 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5656 Dbg->getOffset(), Dbg->getDebugLoc(), 5657 Dbg->getOrder()); 5658 ClonedDVs.push_back(Clone); 5659 } 5660 } 5661 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5662 E = ClonedDVs.end(); I != E; ++I) 5663 AddDbgValue(*I, ToNode, false); 5664} 5665 5666//===----------------------------------------------------------------------===// 5667// SDNode Class 5668//===----------------------------------------------------------------------===// 5669 5670HandleSDNode::~HandleSDNode() { 5671 DropOperands(); 5672} 5673 5674GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5675 const GlobalValue *GA, 5676 EVT VT, int64_t o, unsigned char TF) 5677 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5678 TheGlobal = GA; 5679} 5680 5681MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5682 MachineMemOperand *mmo) 5683 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5684 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5685 MMO->isNonTemporal(), MMO->isInvariant()); 5686 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5687 assert(isNonTemporal() == MMO->isNonTemporal() && 5688 "Non-temporal encoding error!"); 5689 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5690} 5691 5692MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5693 const SDValue *Ops, unsigned NumOps, EVT memvt, 5694 MachineMemOperand *mmo) 5695 : SDNode(Opc, dl, VTs, Ops, NumOps), 5696 MemoryVT(memvt), MMO(mmo) { 5697 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5698 MMO->isNonTemporal(), MMO->isInvariant()); 5699 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5700 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5701} 5702 5703/// Profile - Gather unique data for the node. 5704/// 5705void SDNode::Profile(FoldingSetNodeID &ID) const { 5706 AddNodeIDNode(ID, this); 5707} 5708 5709namespace { 5710 struct EVTArray { 5711 std::vector<EVT> VTs; 5712 5713 EVTArray() { 5714 VTs.reserve(MVT::LAST_VALUETYPE); 5715 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5716 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5717 } 5718 }; 5719} 5720 5721static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5722static ManagedStatic<EVTArray> SimpleVTArray; 5723static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5724 5725/// getValueTypeList - Return a pointer to the specified value type. 5726/// 5727const EVT *SDNode::getValueTypeList(EVT VT) { 5728 if (VT.isExtended()) { 5729 sys::SmartScopedLock<true> Lock(*VTMutex); 5730 return &(*EVTs->insert(VT).first); 5731 } else { 5732 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5733 "Value type out of range!"); 5734 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5735 } 5736} 5737 5738/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5739/// indicated value. This method ignores uses of other values defined by this 5740/// operation. 5741bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5742 assert(Value < getNumValues() && "Bad value!"); 5743 5744 // TODO: Only iterate over uses of a given value of the node 5745 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5746 if (UI.getUse().getResNo() == Value) { 5747 if (NUses == 0) 5748 return false; 5749 --NUses; 5750 } 5751 } 5752 5753 // Found exactly the right number of uses? 5754 return NUses == 0; 5755} 5756 5757 5758/// hasAnyUseOfValue - Return true if there are any use of the indicated 5759/// value. This method ignores uses of other values defined by this operation. 5760bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5761 assert(Value < getNumValues() && "Bad value!"); 5762 5763 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5764 if (UI.getUse().getResNo() == Value) 5765 return true; 5766 5767 return false; 5768} 5769 5770 5771/// isOnlyUserOf - Return true if this node is the only use of N. 5772/// 5773bool SDNode::isOnlyUserOf(SDNode *N) const { 5774 bool Seen = false; 5775 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5776 SDNode *User = *I; 5777 if (User == this) 5778 Seen = true; 5779 else 5780 return false; 5781 } 5782 5783 return Seen; 5784} 5785 5786/// isOperand - Return true if this node is an operand of N. 5787/// 5788bool SDValue::isOperandOf(SDNode *N) const { 5789 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5790 if (*this == N->getOperand(i)) 5791 return true; 5792 return false; 5793} 5794 5795bool SDNode::isOperandOf(SDNode *N) const { 5796 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5797 if (this == N->OperandList[i].getNode()) 5798 return true; 5799 return false; 5800} 5801 5802/// reachesChainWithoutSideEffects - Return true if this operand (which must 5803/// be a chain) reaches the specified operand without crossing any 5804/// side-effecting instructions on any chain path. In practice, this looks 5805/// through token factors and non-volatile loads. In order to remain efficient, 5806/// this only looks a couple of nodes in, it does not do an exhaustive search. 5807bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5808 unsigned Depth) const { 5809 if (*this == Dest) return true; 5810 5811 // Don't search too deeply, we just want to be able to see through 5812 // TokenFactor's etc. 5813 if (Depth == 0) return false; 5814 5815 // If this is a token factor, all inputs to the TF happen in parallel. If any 5816 // of the operands of the TF does not reach dest, then we cannot do the xform. 5817 if (getOpcode() == ISD::TokenFactor) { 5818 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5819 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5820 return false; 5821 return true; 5822 } 5823 5824 // Loads don't have side effects, look through them. 5825 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5826 if (!Ld->isVolatile()) 5827 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5828 } 5829 return false; 5830} 5831 5832/// hasPredecessor - Return true if N is a predecessor of this node. 5833/// N is either an operand of this node, or can be reached by recursively 5834/// traversing up the operands. 5835/// NOTE: This is an expensive method. Use it carefully. 5836bool SDNode::hasPredecessor(const SDNode *N) const { 5837 SmallPtrSet<const SDNode *, 32> Visited; 5838 SmallVector<const SDNode *, 16> Worklist; 5839 return hasPredecessorHelper(N, Visited, Worklist); 5840} 5841 5842bool SDNode::hasPredecessorHelper(const SDNode *N, 5843 SmallPtrSet<const SDNode *, 32> &Visited, 5844 SmallVector<const SDNode *, 16> &Worklist) const { 5845 if (Visited.empty()) { 5846 Worklist.push_back(this); 5847 } else { 5848 // Take a look in the visited set. If we've already encountered this node 5849 // we needn't search further. 5850 if (Visited.count(N)) 5851 return true; 5852 } 5853 5854 // Haven't visited N yet. Continue the search. 5855 while (!Worklist.empty()) { 5856 const SDNode *M = Worklist.pop_back_val(); 5857 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5858 SDNode *Op = M->getOperand(i).getNode(); 5859 if (Visited.insert(Op)) 5860 Worklist.push_back(Op); 5861 if (Op == N) 5862 return true; 5863 } 5864 } 5865 5866 return false; 5867} 5868 5869uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5870 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5871 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5872} 5873 5874SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 5875 assert(N->getNumValues() == 1 && 5876 "Can't unroll a vector with multiple results!"); 5877 5878 EVT VT = N->getValueType(0); 5879 unsigned NE = VT.getVectorNumElements(); 5880 EVT EltVT = VT.getVectorElementType(); 5881 DebugLoc dl = N->getDebugLoc(); 5882 5883 SmallVector<SDValue, 8> Scalars; 5884 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 5885 5886 // If ResNE is 0, fully unroll the vector op. 5887 if (ResNE == 0) 5888 ResNE = NE; 5889 else if (NE > ResNE) 5890 NE = ResNE; 5891 5892 unsigned i; 5893 for (i= 0; i != NE; ++i) { 5894 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 5895 SDValue Operand = N->getOperand(j); 5896 EVT OperandVT = Operand.getValueType(); 5897 if (OperandVT.isVector()) { 5898 // A vector operand; extract a single element. 5899 EVT OperandEltVT = OperandVT.getVectorElementType(); 5900 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 5901 OperandEltVT, 5902 Operand, 5903 getConstant(i, TLI.getPointerTy())); 5904 } else { 5905 // A scalar operand; just use it as is. 5906 Operands[j] = Operand; 5907 } 5908 } 5909 5910 switch (N->getOpcode()) { 5911 default: 5912 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 5913 &Operands[0], Operands.size())); 5914 break; 5915 case ISD::VSELECT: 5916 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 5917 &Operands[0], Operands.size())); 5918 break; 5919 case ISD::SHL: 5920 case ISD::SRA: 5921 case ISD::SRL: 5922 case ISD::ROTL: 5923 case ISD::ROTR: 5924 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 5925 getShiftAmountOperand(Operands[0].getValueType(), 5926 Operands[1]))); 5927 break; 5928 case ISD::SIGN_EXTEND_INREG: 5929 case ISD::FP_ROUND_INREG: { 5930 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 5931 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 5932 Operands[0], 5933 getValueType(ExtVT))); 5934 } 5935 } 5936 } 5937 5938 for (; i < ResNE; ++i) 5939 Scalars.push_back(getUNDEF(EltVT)); 5940 5941 return getNode(ISD::BUILD_VECTOR, dl, 5942 EVT::getVectorVT(*getContext(), EltVT, ResNE), 5943 &Scalars[0], Scalars.size()); 5944} 5945 5946 5947/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 5948/// location that is 'Dist' units away from the location that the 'Base' load 5949/// is loading from. 5950bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 5951 unsigned Bytes, int Dist) const { 5952 if (LD->getChain() != Base->getChain()) 5953 return false; 5954 EVT VT = LD->getValueType(0); 5955 if (VT.getSizeInBits() / 8 != Bytes) 5956 return false; 5957 5958 SDValue Loc = LD->getOperand(1); 5959 SDValue BaseLoc = Base->getOperand(1); 5960 if (Loc.getOpcode() == ISD::FrameIndex) { 5961 if (BaseLoc.getOpcode() != ISD::FrameIndex) 5962 return false; 5963 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 5964 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 5965 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 5966 int FS = MFI->getObjectSize(FI); 5967 int BFS = MFI->getObjectSize(BFI); 5968 if (FS != BFS || FS != (int)Bytes) return false; 5969 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 5970 } 5971 5972 // Handle X+C 5973 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 5974 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 5975 return true; 5976 5977 const GlobalValue *GV1 = NULL; 5978 const GlobalValue *GV2 = NULL; 5979 int64_t Offset1 = 0; 5980 int64_t Offset2 = 0; 5981 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 5982 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 5983 if (isGA1 && isGA2 && GV1 == GV2) 5984 return Offset1 == (Offset2 + Dist*Bytes); 5985 return false; 5986} 5987 5988 5989/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 5990/// it cannot be inferred. 5991unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 5992 // If this is a GlobalAddress + cst, return the alignment. 5993 const GlobalValue *GV; 5994 int64_t GVOffset = 0; 5995 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 5996 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 5997 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 5998 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 5999 TLI.getTargetData()); 6000 unsigned AlignBits = KnownZero.countTrailingOnes(); 6001 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6002 if (Align) 6003 return MinAlign(Align, GVOffset); 6004 } 6005 6006 // If this is a direct reference to a stack slot, use information about the 6007 // stack slot's alignment. 6008 int FrameIdx = 1 << 31; 6009 int64_t FrameOffset = 0; 6010 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6011 FrameIdx = FI->getIndex(); 6012 } else if (isBaseWithConstantOffset(Ptr) && 6013 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6014 // Handle FI+Cst 6015 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6016 FrameOffset = Ptr.getConstantOperandVal(1); 6017 } 6018 6019 if (FrameIdx != (1 << 31)) { 6020 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6021 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6022 FrameOffset); 6023 return FIInfoAlign; 6024 } 6025 6026 return 0; 6027} 6028 6029// getAddressSpace - Return the address space this GlobalAddress belongs to. 6030unsigned GlobalAddressSDNode::getAddressSpace() const { 6031 return getGlobal()->getType()->getAddressSpace(); 6032} 6033 6034 6035Type *ConstantPoolSDNode::getType() const { 6036 if (isMachineConstantPoolEntry()) 6037 return Val.MachineCPVal->getType(); 6038 return Val.ConstVal->getType(); 6039} 6040 6041bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6042 APInt &SplatUndef, 6043 unsigned &SplatBitSize, 6044 bool &HasAnyUndefs, 6045 unsigned MinSplatBits, 6046 bool isBigEndian) { 6047 EVT VT = getValueType(0); 6048 assert(VT.isVector() && "Expected a vector type"); 6049 unsigned sz = VT.getSizeInBits(); 6050 if (MinSplatBits > sz) 6051 return false; 6052 6053 SplatValue = APInt(sz, 0); 6054 SplatUndef = APInt(sz, 0); 6055 6056 // Get the bits. Bits with undefined values (when the corresponding element 6057 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6058 // in SplatValue. If any of the values are not constant, give up and return 6059 // false. 6060 unsigned int nOps = getNumOperands(); 6061 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6062 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6063 6064 for (unsigned j = 0; j < nOps; ++j) { 6065 unsigned i = isBigEndian ? nOps-1-j : j; 6066 SDValue OpVal = getOperand(i); 6067 unsigned BitPos = j * EltBitSize; 6068 6069 if (OpVal.getOpcode() == ISD::UNDEF) 6070 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6071 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6072 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6073 zextOrTrunc(sz) << BitPos; 6074 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6075 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6076 else 6077 return false; 6078 } 6079 6080 // The build_vector is all constants or undefs. Find the smallest element 6081 // size that splats the vector. 6082 6083 HasAnyUndefs = (SplatUndef != 0); 6084 while (sz > 8) { 6085 6086 unsigned HalfSize = sz / 2; 6087 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6088 APInt LowValue = SplatValue.trunc(HalfSize); 6089 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6090 APInt LowUndef = SplatUndef.trunc(HalfSize); 6091 6092 // If the two halves do not match (ignoring undef bits), stop here. 6093 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6094 MinSplatBits > HalfSize) 6095 break; 6096 6097 SplatValue = HighValue | LowValue; 6098 SplatUndef = HighUndef & LowUndef; 6099 6100 sz = HalfSize; 6101 } 6102 6103 SplatBitSize = sz; 6104 return true; 6105} 6106 6107bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6108 // Find the first non-undef value in the shuffle mask. 6109 unsigned i, e; 6110 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6111 /* search */; 6112 6113 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6114 6115 // Make sure all remaining elements are either undef or the same as the first 6116 // non-undef value. 6117 for (int Idx = Mask[i]; i != e; ++i) 6118 if (Mask[i] >= 0 && Mask[i] != Idx) 6119 return false; 6120 return true; 6121} 6122 6123#ifdef XDEBUG 6124static void checkForCyclesHelper(const SDNode *N, 6125 SmallPtrSet<const SDNode*, 32> &Visited, 6126 SmallPtrSet<const SDNode*, 32> &Checked) { 6127 // If this node has already been checked, don't check it again. 6128 if (Checked.count(N)) 6129 return; 6130 6131 // If a node has already been visited on this depth-first walk, reject it as 6132 // a cycle. 6133 if (!Visited.insert(N)) { 6134 dbgs() << "Offending node:\n"; 6135 N->dumprFull(); 6136 errs() << "Detected cycle in SelectionDAG\n"; 6137 abort(); 6138 } 6139 6140 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6141 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6142 6143 Checked.insert(N); 6144 Visited.erase(N); 6145} 6146#endif 6147 6148void llvm::checkForCycles(const llvm::SDNode *N) { 6149#ifdef XDEBUG 6150 assert(N && "Checking nonexistant SDNode"); 6151 SmallPtrSet<const SDNode*, 32> visited; 6152 SmallPtrSet<const SDNode*, 32> checked; 6153 checkForCyclesHelper(N, visited, checked); 6154#endif 6155} 6156 6157void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6158 checkForCycles(DAG->getRoot().getNode()); 6159} 6160