SelectionDAG.cpp revision 28b77e968d2b01fc9da724762bd8ddcd80650e32
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetSelectionDAGInfo.h" 36#include "llvm/Target/TargetOptions.h" 37#include "llvm/Target/TargetInstrInfo.h" 38#include "llvm/Target/TargetIntrinsicInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Debug.h" 42#include "llvm/Support/ErrorHandling.h" 43#include "llvm/Support/ManagedStatic.h" 44#include "llvm/Support/MathExtras.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/Support/Mutex.h" 47#include "llvm/ADT/SetVector.h" 48#include "llvm/ADT/SmallPtrSet.h" 49#include "llvm/ADT/SmallSet.h" 50#include "llvm/ADT/SmallVector.h" 51#include "llvm/ADT/StringExtras.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BITCAST) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. 129 SDValue NotZero = N->getOperand(i); 130 if (isa<ConstantSDNode>(NotZero)) { 131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 132 return false; 133 } else if (isa<ConstantFPSDNode>(NotZero)) { 134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 135 bitcastToAPInt().isAllOnesValue()) 136 return false; 137 } else 138 return false; 139 140 // Okay, we have at least one ~0 value, check to see if the rest match or are 141 // undefs. 142 for (++i; i != e; ++i) 143 if (N->getOperand(i) != NotZero && 144 N->getOperand(i).getOpcode() != ISD::UNDEF) 145 return false; 146 return true; 147} 148 149 150/// isBuildVectorAllZeros - Return true if the specified node is a 151/// BUILD_VECTOR where all of the elements are 0 or undef. 152bool ISD::isBuildVectorAllZeros(const SDNode *N) { 153 // Look through a bit convert. 154 if (N->getOpcode() == ISD::BITCAST) 155 N = N->getOperand(0).getNode(); 156 157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 158 159 unsigned i = 0, e = N->getNumOperands(); 160 161 // Skip over all of the undef values. 162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 163 ++i; 164 165 // Do not accept an all-undef vector. 166 if (i == e) return false; 167 168 // Do not accept build_vectors that aren't all constants or which have non-0 169 // elements. 170 SDValue Zero = N->getOperand(i); 171 if (isa<ConstantSDNode>(Zero)) { 172 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 173 return false; 174 } else if (isa<ConstantFPSDNode>(Zero)) { 175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 176 return false; 177 } else 178 return false; 179 180 // Okay, we have at least one 0 value, check to see if the rest match or are 181 // undefs. 182 for (++i; i != e; ++i) 183 if (N->getOperand(i) != Zero && 184 N->getOperand(i).getOpcode() != ISD::UNDEF) 185 return false; 186 return true; 187} 188 189/// isScalarToVector - Return true if the specified node is a 190/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 191/// element is not an undef. 192bool ISD::isScalarToVector(const SDNode *N) { 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 194 return true; 195 196 if (N->getOpcode() != ISD::BUILD_VECTOR) 197 return false; 198 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 199 return false; 200 unsigned NumElems = N->getNumOperands(); 201 if (NumElems == 1) 202 return false; 203 for (unsigned i = 1; i < NumElems; ++i) { 204 SDValue V = N->getOperand(i); 205 if (V.getOpcode() != ISD::UNDEF) 206 return false; 207 } 208 return true; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: llvm_unreachable("Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: 436 case ISD::ATOMIC_LOAD: 437 case ISD::ATOMIC_STORE: { 438 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 439 ID.AddInteger(AT->getMemoryVT().getRawBits()); 440 ID.AddInteger(AT->getRawSubclassData()); 441 break; 442 } 443 case ISD::VECTOR_SHUFFLE: { 444 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 445 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 446 i != e; ++i) 447 ID.AddInteger(SVN->getMaskElt(i)); 448 break; 449 } 450 case ISD::TargetBlockAddress: 451 case ISD::BlockAddress: { 452 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 453 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 454 break; 455 } 456 } // end switch (N->getOpcode()) 457} 458 459/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 460/// data. 461static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 462 AddNodeIDOpcode(ID, N->getOpcode()); 463 // Add the return value info. 464 AddNodeIDValueTypes(ID, N->getVTList()); 465 // Add the operand info. 466 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 467 468 // Handle SDNode leafs with special info. 469 AddNodeIDCustom(ID, N); 470} 471 472/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 473/// the CSE map that carries volatility, temporalness, indexing mode, and 474/// extension/truncation information. 475/// 476static inline unsigned 477encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 478 bool isNonTemporal) { 479 assert((ConvType & 3) == ConvType && 480 "ConvType may not require more than 2 bits!"); 481 assert((AM & 7) == AM && 482 "AM may not require more than 3 bits!"); 483 return ConvType | 484 (AM << 2) | 485 (isVolatile << 5) | 486 (isNonTemporal << 6); 487} 488 489//===----------------------------------------------------------------------===// 490// SelectionDAG Class 491//===----------------------------------------------------------------------===// 492 493/// doNotCSE - Return true if CSE should not be performed for this node. 494static bool doNotCSE(SDNode *N) { 495 if (N->getValueType(0) == MVT::Glue) 496 return true; // Never CSE anything that produces a flag. 497 498 switch (N->getOpcode()) { 499 default: break; 500 case ISD::HANDLENODE: 501 case ISD::EH_LABEL: 502 return true; // Never CSE these nodes. 503 } 504 505 // Check that remaining values produced are not flags. 506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 507 if (N->getValueType(i) == MVT::Glue) 508 return true; // Never CSE anything that produces a flag. 509 510 return false; 511} 512 513/// RemoveDeadNodes - This method deletes all unreachable nodes in the 514/// SelectionDAG. 515void SelectionDAG::RemoveDeadNodes() { 516 // Create a dummy node (which is not added to allnodes), that adds a reference 517 // to the root node, preventing it from being deleted. 518 HandleSDNode Dummy(getRoot()); 519 520 SmallVector<SDNode*, 128> DeadNodes; 521 522 // Add all obviously-dead nodes to the DeadNodes worklist. 523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 524 if (I->use_empty()) 525 DeadNodes.push_back(I); 526 527 RemoveDeadNodes(DeadNodes); 528 529 // If the root changed (e.g. it was a dead load, update the root). 530 setRoot(Dummy.getValue()); 531} 532 533/// RemoveDeadNodes - This method deletes the unreachable nodes in the 534/// given list, and any nodes that become unreachable as a result. 535void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 536 DAGUpdateListener *UpdateListener) { 537 538 // Process the worklist, deleting the nodes and adding their uses to the 539 // worklist. 540 while (!DeadNodes.empty()) { 541 SDNode *N = DeadNodes.pop_back_val(); 542 543 if (UpdateListener) 544 UpdateListener->NodeDeleted(N, 0); 545 546 // Take the node out of the appropriate CSE map. 547 RemoveNodeFromCSEMaps(N); 548 549 // Next, brutally remove the operand list. This is safe to do, as there are 550 // no cycles in the graph. 551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 552 SDUse &Use = *I++; 553 SDNode *Operand = Use.getNode(); 554 Use.set(SDValue()); 555 556 // Now that we removed this operand, see if there are no uses of it left. 557 if (Operand->use_empty()) 558 DeadNodes.push_back(Operand); 559 } 560 561 DeallocateNode(N); 562 } 563} 564 565void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 566 SmallVector<SDNode*, 16> DeadNodes(1, N); 567 RemoveDeadNodes(DeadNodes, UpdateListener); 568} 569 570void SelectionDAG::DeleteNode(SDNode *N) { 571 // First take this out of the appropriate CSE map. 572 RemoveNodeFromCSEMaps(N); 573 574 // Finally, remove uses due to operands of this node, remove from the 575 // AllNodes list, and delete the node. 576 DeleteNodeNotInCSEMaps(N); 577} 578 579void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 580 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 581 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 582 583 // Drop all of the operands and decrement used node's use counts. 584 N->DropOperands(); 585 586 DeallocateNode(N); 587} 588 589void SelectionDAG::DeallocateNode(SDNode *N) { 590 if (N->OperandsNeedDelete) 591 delete[] N->OperandList; 592 593 // Set the opcode to DELETED_NODE to help catch bugs when node 594 // memory is reallocated. 595 N->NodeType = ISD::DELETED_NODE; 596 597 NodeAllocator.Deallocate(AllNodes.remove(N)); 598 599 // Remove the ordering of this node. 600 Ordering->remove(N); 601 602 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 603 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 604 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 605 DbgVals[i]->setIsInvalidated(); 606} 607 608/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 609/// correspond to it. This is useful when we're about to delete or repurpose 610/// the node. We don't want future request for structurally identical nodes 611/// to return N anymore. 612bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 613 bool Erased = false; 614 switch (N->getOpcode()) { 615 case ISD::HANDLENODE: return false; // noop. 616 case ISD::CONDCODE: 617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 618 "Cond code doesn't exist!"); 619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 621 break; 622 case ISD::ExternalSymbol: 623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 624 break; 625 case ISD::TargetExternalSymbol: { 626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 627 Erased = TargetExternalSymbols.erase( 628 std::pair<std::string,unsigned char>(ESN->getSymbol(), 629 ESN->getTargetFlags())); 630 break; 631 } 632 case ISD::VALUETYPE: { 633 EVT VT = cast<VTSDNode>(N)->getVT(); 634 if (VT.isExtended()) { 635 Erased = ExtendedValueTypeNodes.erase(VT); 636 } else { 637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 639 } 640 break; 641 } 642 default: 643 // Remove it from the CSE Map. 644 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 645 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 646 Erased = CSEMap.RemoveNode(N); 647 break; 648 } 649#ifndef NDEBUG 650 // Verify that the node was actually in one of the CSE maps, unless it has a 651 // flag result (which cannot be CSE'd) or is one of the special cases that are 652 // not subject to CSE. 653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 654 !N->isMachineOpcode() && !doNotCSE(N)) { 655 N->dump(this); 656 dbgs() << "\n"; 657 llvm_unreachable("Node is not in map!"); 658 } 659#endif 660 return Erased; 661} 662 663/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 664/// maps and modified in place. Add it back to the CSE maps, unless an identical 665/// node already exists, in which case transfer all its users to the existing 666/// node. This transfer can potentially trigger recursive merging. 667/// 668void 669SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 670 DAGUpdateListener *UpdateListener) { 671 // For node types that aren't CSE'd, just act as if no identical node 672 // already exists. 673 if (!doNotCSE(N)) { 674 SDNode *Existing = CSEMap.GetOrInsertNode(N); 675 if (Existing != N) { 676 // If there was already an existing matching node, use ReplaceAllUsesWith 677 // to replace the dead one with the existing one. This can cause 678 // recursive merging of other unrelated nodes down the line. 679 ReplaceAllUsesWith(N, Existing, UpdateListener); 680 681 // N is now dead. Inform the listener if it exists and delete it. 682 if (UpdateListener) 683 UpdateListener->NodeDeleted(N, Existing); 684 DeleteNodeNotInCSEMaps(N); 685 return; 686 } 687 } 688 689 // If the node doesn't already exist, we updated it. Inform a listener if 690 // it exists. 691 if (UpdateListener) 692 UpdateListener->NodeUpdated(N); 693} 694 695/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 696/// were replaced with those specified. If this node is never memoized, 697/// return null, otherwise return a pointer to the slot it would take. If a 698/// node already exists with these operands, the slot will be non-null. 699SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 700 void *&InsertPos) { 701 if (doNotCSE(N)) 702 return 0; 703 704 SDValue Ops[] = { Op }; 705 FoldingSetNodeID ID; 706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 707 AddNodeIDCustom(ID, N); 708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 709 return Node; 710} 711 712/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 713/// were replaced with those specified. If this node is never memoized, 714/// return null, otherwise return a pointer to the slot it would take. If a 715/// node already exists with these operands, the slot will be non-null. 716SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 717 SDValue Op1, SDValue Op2, 718 void *&InsertPos) { 719 if (doNotCSE(N)) 720 return 0; 721 722 SDValue Ops[] = { Op1, Op2 }; 723 FoldingSetNodeID ID; 724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 725 AddNodeIDCustom(ID, N); 726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 727 return Node; 728} 729 730 731/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 732/// were replaced with those specified. If this node is never memoized, 733/// return null, otherwise return a pointer to the slot it would take. If a 734/// node already exists with these operands, the slot will be non-null. 735SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 736 const SDValue *Ops,unsigned NumOps, 737 void *&InsertPos) { 738 if (doNotCSE(N)) 739 return 0; 740 741 FoldingSetNodeID ID; 742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 743 AddNodeIDCustom(ID, N); 744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 745 return Node; 746} 747 748#ifndef NDEBUG 749/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 750static void VerifyNodeCommon(SDNode *N) { 751 switch (N->getOpcode()) { 752 default: 753 break; 754 case ISD::BUILD_PAIR: { 755 EVT VT = N->getValueType(0); 756 assert(N->getNumValues() == 1 && "Too many results!"); 757 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 758 "Wrong return type!"); 759 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 760 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 761 "Mismatched operand types!"); 762 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 763 "Wrong operand type!"); 764 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 765 "Wrong return type size"); 766 break; 767 } 768 case ISD::BUILD_VECTOR: { 769 assert(N->getNumValues() == 1 && "Too many results!"); 770 assert(N->getValueType(0).isVector() && "Wrong return type!"); 771 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 772 "Wrong number of operands!"); 773 EVT EltVT = N->getValueType(0).getVectorElementType(); 774 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 775 assert((I->getValueType() == EltVT || 776 (EltVT.isInteger() && I->getValueType().isInteger() && 777 EltVT.bitsLE(I->getValueType()))) && 778 "Wrong operand type!"); 779 break; 780 } 781 } 782} 783 784/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 785static void VerifySDNode(SDNode *N) { 786 // The SDNode allocators cannot be used to allocate nodes with fields that are 787 // not present in an SDNode! 788 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 789 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 790 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 791 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 792 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 793 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 794 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 795 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 796 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 797 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 798 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 799 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 800 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 801 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 802 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 803 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 804 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 805 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 806 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 807 808 VerifyNodeCommon(N); 809} 810 811/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 812/// invalid. 813static void VerifyMachineNode(SDNode *N) { 814 // The MachineNode allocators cannot be used to allocate nodes with fields 815 // that are not present in a MachineNode! 816 // Currently there are no such nodes. 817 818 VerifyNodeCommon(N); 819} 820#endif // NDEBUG 821 822/// getEVTAlignment - Compute the default alignment value for the 823/// given type. 824/// 825unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 826 Type *Ty = VT == MVT::iPTR ? 827 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 828 VT.getTypeForEVT(*getContext()); 829 830 return TLI.getTargetData()->getABITypeAlignment(Ty); 831} 832 833// EntryNode could meaningfully have debug info if we can find it... 834SelectionDAG::SelectionDAG(const TargetMachine &tm) 835 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 836 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 837 Root(getEntryNode()), Ordering(0) { 838 AllNodes.push_back(&EntryNode); 839 Ordering = new SDNodeOrdering(); 840 DbgInfo = new SDDbgInfo(); 841} 842 843void SelectionDAG::init(MachineFunction &mf) { 844 MF = &mf; 845 Context = &mf.getFunction()->getContext(); 846} 847 848SelectionDAG::~SelectionDAG() { 849 allnodes_clear(); 850 delete Ordering; 851 delete DbgInfo; 852} 853 854void SelectionDAG::allnodes_clear() { 855 assert(&*AllNodes.begin() == &EntryNode); 856 AllNodes.remove(AllNodes.begin()); 857 while (!AllNodes.empty()) 858 DeallocateNode(AllNodes.begin()); 859} 860 861void SelectionDAG::clear() { 862 allnodes_clear(); 863 OperandAllocator.Reset(); 864 CSEMap.clear(); 865 866 ExtendedValueTypeNodes.clear(); 867 ExternalSymbols.clear(); 868 TargetExternalSymbols.clear(); 869 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 870 static_cast<CondCodeSDNode*>(0)); 871 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 872 static_cast<SDNode*>(0)); 873 874 EntryNode.UseList = 0; 875 AllNodes.push_back(&EntryNode); 876 Root = getEntryNode(); 877 Ordering->clear(); 878 DbgInfo->clear(); 879} 880 881SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 882 return VT.bitsGT(Op.getValueType()) ? 883 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 884 getNode(ISD::TRUNCATE, DL, VT, Op); 885} 886 887SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 888 return VT.bitsGT(Op.getValueType()) ? 889 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 890 getNode(ISD::TRUNCATE, DL, VT, Op); 891} 892 893SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 894 assert(!VT.isVector() && 895 "getZeroExtendInReg should use the vector element type instead of " 896 "the vector type!"); 897 if (Op.getValueType() == VT) return Op; 898 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 899 APInt Imm = APInt::getLowBitsSet(BitWidth, 900 VT.getSizeInBits()); 901 return getNode(ISD::AND, DL, Op.getValueType(), Op, 902 getConstant(Imm, Op.getValueType())); 903} 904 905/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 906/// 907SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 908 EVT EltVT = VT.getScalarType(); 909 SDValue NegOne = 910 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 911 return getNode(ISD::XOR, DL, VT, Val, NegOne); 912} 913 914SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 915 EVT EltVT = VT.getScalarType(); 916 assert((EltVT.getSizeInBits() >= 64 || 917 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 918 "getConstant with a uint64_t value that doesn't fit in the type!"); 919 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 920} 921 922SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 923 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 924} 925 926SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 927 assert(VT.isInteger() && "Cannot create FP integer constant!"); 928 929 EVT EltVT = VT.getScalarType(); 930 const ConstantInt *Elt = &Val; 931 932 // In some cases the vector type is legal but the element type is illegal and 933 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 934 // inserted value (the type does not need to match the vector element type). 935 // Any extra bits introduced will be truncated away. 936 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 937 TargetLowering::TypePromoteInteger) { 938 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 939 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 940 Elt = ConstantInt::get(*getContext(), NewVal); 941 } 942 943 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 944 "APInt size does not match type size!"); 945 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 946 FoldingSetNodeID ID; 947 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 948 ID.AddPointer(Elt); 949 void *IP = 0; 950 SDNode *N = NULL; 951 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 952 if (!VT.isVector()) 953 return SDValue(N, 0); 954 955 if (!N) { 956 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 957 CSEMap.InsertNode(N, IP); 958 AllNodes.push_back(N); 959 } 960 961 SDValue Result(N, 0); 962 if (VT.isVector()) { 963 SmallVector<SDValue, 8> Ops; 964 Ops.assign(VT.getVectorNumElements(), Result); 965 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 966 } 967 return Result; 968} 969 970SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 971 return getConstant(Val, TLI.getPointerTy(), isTarget); 972} 973 974 975SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 976 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 977} 978 979SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 980 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 981 982 EVT EltVT = VT.getScalarType(); 983 984 // Do the map lookup using the actual bit pattern for the floating point 985 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 986 // we don't have issues with SNANs. 987 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 988 FoldingSetNodeID ID; 989 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 990 ID.AddPointer(&V); 991 void *IP = 0; 992 SDNode *N = NULL; 993 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 994 if (!VT.isVector()) 995 return SDValue(N, 0); 996 997 if (!N) { 998 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 999 CSEMap.InsertNode(N, IP); 1000 AllNodes.push_back(N); 1001 } 1002 1003 SDValue Result(N, 0); 1004 if (VT.isVector()) { 1005 SmallVector<SDValue, 8> Ops; 1006 Ops.assign(VT.getVectorNumElements(), Result); 1007 // FIXME DebugLoc info might be appropriate here 1008 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1009 } 1010 return Result; 1011} 1012 1013SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1014 EVT EltVT = VT.getScalarType(); 1015 if (EltVT==MVT::f32) 1016 return getConstantFP(APFloat((float)Val), VT, isTarget); 1017 else if (EltVT==MVT::f64) 1018 return getConstantFP(APFloat(Val), VT, isTarget); 1019 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1020 bool ignored; 1021 APFloat apf = APFloat(Val); 1022 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1023 &ignored); 1024 return getConstantFP(apf, VT, isTarget); 1025 } else { 1026 assert(0 && "Unsupported type in getConstantFP"); 1027 return SDValue(); 1028 } 1029} 1030 1031SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1032 EVT VT, int64_t Offset, 1033 bool isTargetGA, 1034 unsigned char TargetFlags) { 1035 assert((TargetFlags == 0 || isTargetGA) && 1036 "Cannot set target flags on target-independent globals"); 1037 1038 // Truncate (with sign-extension) the offset value to the pointer size. 1039 EVT PTy = TLI.getPointerTy(); 1040 unsigned BitWidth = PTy.getSizeInBits(); 1041 if (BitWidth < 64) 1042 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1043 1044 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1045 if (!GVar) { 1046 // If GV is an alias then use the aliasee for determining thread-localness. 1047 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1048 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1049 } 1050 1051 unsigned Opc; 1052 if (GVar && GVar->isThreadLocal()) 1053 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1054 else 1055 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1056 1057 FoldingSetNodeID ID; 1058 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1059 ID.AddPointer(GV); 1060 ID.AddInteger(Offset); 1061 ID.AddInteger(TargetFlags); 1062 void *IP = 0; 1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1064 return SDValue(E, 0); 1065 1066 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1067 Offset, TargetFlags); 1068 CSEMap.InsertNode(N, IP); 1069 AllNodes.push_back(N); 1070 return SDValue(N, 0); 1071} 1072 1073SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1074 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1075 FoldingSetNodeID ID; 1076 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1077 ID.AddInteger(FI); 1078 void *IP = 0; 1079 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1080 return SDValue(E, 0); 1081 1082 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1083 CSEMap.InsertNode(N, IP); 1084 AllNodes.push_back(N); 1085 return SDValue(N, 0); 1086} 1087 1088SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1089 unsigned char TargetFlags) { 1090 assert((TargetFlags == 0 || isTarget) && 1091 "Cannot set target flags on target-independent jump tables"); 1092 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1093 FoldingSetNodeID ID; 1094 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1095 ID.AddInteger(JTI); 1096 ID.AddInteger(TargetFlags); 1097 void *IP = 0; 1098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1099 return SDValue(E, 0); 1100 1101 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1102 TargetFlags); 1103 CSEMap.InsertNode(N, IP); 1104 AllNodes.push_back(N); 1105 return SDValue(N, 0); 1106} 1107 1108SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1109 unsigned Alignment, int Offset, 1110 bool isTarget, 1111 unsigned char TargetFlags) { 1112 assert((TargetFlags == 0 || isTarget) && 1113 "Cannot set target flags on target-independent globals"); 1114 if (Alignment == 0) 1115 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1116 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1117 FoldingSetNodeID ID; 1118 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1119 ID.AddInteger(Alignment); 1120 ID.AddInteger(Offset); 1121 ID.AddPointer(C); 1122 ID.AddInteger(TargetFlags); 1123 void *IP = 0; 1124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1125 return SDValue(E, 0); 1126 1127 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1128 Alignment, TargetFlags); 1129 CSEMap.InsertNode(N, IP); 1130 AllNodes.push_back(N); 1131 return SDValue(N, 0); 1132} 1133 1134 1135SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1136 unsigned Alignment, int Offset, 1137 bool isTarget, 1138 unsigned char TargetFlags) { 1139 assert((TargetFlags == 0 || isTarget) && 1140 "Cannot set target flags on target-independent globals"); 1141 if (Alignment == 0) 1142 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1143 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1144 FoldingSetNodeID ID; 1145 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1146 ID.AddInteger(Alignment); 1147 ID.AddInteger(Offset); 1148 C->AddSelectionDAGCSEId(ID); 1149 ID.AddInteger(TargetFlags); 1150 void *IP = 0; 1151 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1152 return SDValue(E, 0); 1153 1154 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1155 Alignment, TargetFlags); 1156 CSEMap.InsertNode(N, IP); 1157 AllNodes.push_back(N); 1158 return SDValue(N, 0); 1159} 1160 1161SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1162 FoldingSetNodeID ID; 1163 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1164 ID.AddPointer(MBB); 1165 void *IP = 0; 1166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1167 return SDValue(E, 0); 1168 1169 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1170 CSEMap.InsertNode(N, IP); 1171 AllNodes.push_back(N); 1172 return SDValue(N, 0); 1173} 1174 1175SDValue SelectionDAG::getValueType(EVT VT) { 1176 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1177 ValueTypeNodes.size()) 1178 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1179 1180 SDNode *&N = VT.isExtended() ? 1181 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1182 1183 if (N) return SDValue(N, 0); 1184 N = new (NodeAllocator) VTSDNode(VT); 1185 AllNodes.push_back(N); 1186 return SDValue(N, 0); 1187} 1188 1189SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1190 SDNode *&N = ExternalSymbols[Sym]; 1191 if (N) return SDValue(N, 0); 1192 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1193 AllNodes.push_back(N); 1194 return SDValue(N, 0); 1195} 1196 1197SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1198 unsigned char TargetFlags) { 1199 SDNode *&N = 1200 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1201 TargetFlags)]; 1202 if (N) return SDValue(N, 0); 1203 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1204 AllNodes.push_back(N); 1205 return SDValue(N, 0); 1206} 1207 1208SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1209 if ((unsigned)Cond >= CondCodeNodes.size()) 1210 CondCodeNodes.resize(Cond+1); 1211 1212 if (CondCodeNodes[Cond] == 0) { 1213 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1214 CondCodeNodes[Cond] = N; 1215 AllNodes.push_back(N); 1216 } 1217 1218 return SDValue(CondCodeNodes[Cond], 0); 1219} 1220 1221// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1222// the shuffle mask M that point at N1 to point at N2, and indices that point 1223// N2 to point at N1. 1224static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1225 std::swap(N1, N2); 1226 int NElts = M.size(); 1227 for (int i = 0; i != NElts; ++i) { 1228 if (M[i] >= NElts) 1229 M[i] -= NElts; 1230 else if (M[i] >= 0) 1231 M[i] += NElts; 1232 } 1233} 1234 1235SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1236 SDValue N2, const int *Mask) { 1237 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1238 assert(VT.isVector() && N1.getValueType().isVector() && 1239 "Vector Shuffle VTs must be a vectors"); 1240 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1241 && "Vector Shuffle VTs must have same element type"); 1242 1243 // Canonicalize shuffle undef, undef -> undef 1244 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1245 return getUNDEF(VT); 1246 1247 // Validate that all indices in Mask are within the range of the elements 1248 // input to the shuffle. 1249 unsigned NElts = VT.getVectorNumElements(); 1250 SmallVector<int, 8> MaskVec; 1251 for (unsigned i = 0; i != NElts; ++i) { 1252 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1253 MaskVec.push_back(Mask[i]); 1254 } 1255 1256 // Canonicalize shuffle v, v -> v, undef 1257 if (N1 == N2) { 1258 N2 = getUNDEF(VT); 1259 for (unsigned i = 0; i != NElts; ++i) 1260 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1261 } 1262 1263 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1264 if (N1.getOpcode() == ISD::UNDEF) 1265 commuteShuffle(N1, N2, MaskVec); 1266 1267 // Canonicalize all index into lhs, -> shuffle lhs, undef 1268 // Canonicalize all index into rhs, -> shuffle rhs, undef 1269 bool AllLHS = true, AllRHS = true; 1270 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1271 for (unsigned i = 0; i != NElts; ++i) { 1272 if (MaskVec[i] >= (int)NElts) { 1273 if (N2Undef) 1274 MaskVec[i] = -1; 1275 else 1276 AllLHS = false; 1277 } else if (MaskVec[i] >= 0) { 1278 AllRHS = false; 1279 } 1280 } 1281 if (AllLHS && AllRHS) 1282 return getUNDEF(VT); 1283 if (AllLHS && !N2Undef) 1284 N2 = getUNDEF(VT); 1285 if (AllRHS) { 1286 N1 = getUNDEF(VT); 1287 commuteShuffle(N1, N2, MaskVec); 1288 } 1289 1290 // If Identity shuffle, or all shuffle in to undef, return that node. 1291 bool AllUndef = true; 1292 bool Identity = true; 1293 for (unsigned i = 0; i != NElts; ++i) { 1294 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1295 if (MaskVec[i] >= 0) AllUndef = false; 1296 } 1297 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1298 return N1; 1299 if (AllUndef) 1300 return getUNDEF(VT); 1301 1302 FoldingSetNodeID ID; 1303 SDValue Ops[2] = { N1, N2 }; 1304 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1305 for (unsigned i = 0; i != NElts; ++i) 1306 ID.AddInteger(MaskVec[i]); 1307 1308 void* IP = 0; 1309 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1310 return SDValue(E, 0); 1311 1312 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1313 // SDNode doesn't have access to it. This memory will be "leaked" when 1314 // the node is deallocated, but recovered when the NodeAllocator is released. 1315 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1316 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1317 1318 ShuffleVectorSDNode *N = 1319 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1320 CSEMap.InsertNode(N, IP); 1321 AllNodes.push_back(N); 1322 return SDValue(N, 0); 1323} 1324 1325SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1326 SDValue Val, SDValue DTy, 1327 SDValue STy, SDValue Rnd, SDValue Sat, 1328 ISD::CvtCode Code) { 1329 // If the src and dest types are the same and the conversion is between 1330 // integer types of the same sign or two floats, no conversion is necessary. 1331 if (DTy == STy && 1332 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1333 return Val; 1334 1335 FoldingSetNodeID ID; 1336 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1337 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1338 void* IP = 0; 1339 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1340 return SDValue(E, 0); 1341 1342 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1343 Code); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1350 FoldingSetNodeID ID; 1351 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1352 ID.AddInteger(RegNo); 1353 void *IP = 0; 1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1355 return SDValue(E, 0); 1356 1357 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1358 CSEMap.InsertNode(N, IP); 1359 AllNodes.push_back(N); 1360 return SDValue(N, 0); 1361} 1362 1363SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1364 FoldingSetNodeID ID; 1365 SDValue Ops[] = { Root }; 1366 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1367 ID.AddPointer(Label); 1368 void *IP = 0; 1369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1370 return SDValue(E, 0); 1371 1372 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1373 CSEMap.InsertNode(N, IP); 1374 AllNodes.push_back(N); 1375 return SDValue(N, 0); 1376} 1377 1378 1379SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1380 bool isTarget, 1381 unsigned char TargetFlags) { 1382 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1383 1384 FoldingSetNodeID ID; 1385 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1386 ID.AddPointer(BA); 1387 ID.AddInteger(TargetFlags); 1388 void *IP = 0; 1389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1390 return SDValue(E, 0); 1391 1392 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1393 CSEMap.InsertNode(N, IP); 1394 AllNodes.push_back(N); 1395 return SDValue(N, 0); 1396} 1397 1398SDValue SelectionDAG::getSrcValue(const Value *V) { 1399 assert((!V || V->getType()->isPointerTy()) && 1400 "SrcValue is not a pointer?"); 1401 1402 FoldingSetNodeID ID; 1403 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1404 ID.AddPointer(V); 1405 1406 void *IP = 0; 1407 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1408 return SDValue(E, 0); 1409 1410 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1411 CSEMap.InsertNode(N, IP); 1412 AllNodes.push_back(N); 1413 return SDValue(N, 0); 1414} 1415 1416/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1417SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1418 FoldingSetNodeID ID; 1419 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1420 ID.AddPointer(MD); 1421 1422 void *IP = 0; 1423 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1424 return SDValue(E, 0); 1425 1426 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1427 CSEMap.InsertNode(N, IP); 1428 AllNodes.push_back(N); 1429 return SDValue(N, 0); 1430} 1431 1432 1433/// getShiftAmountOperand - Return the specified value casted to 1434/// the target's desired shift amount type. 1435SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1436 EVT OpTy = Op.getValueType(); 1437 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1438 if (OpTy == ShTy || OpTy.isVector()) return Op; 1439 1440 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1441 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1442} 1443 1444/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1445/// specified value type. 1446SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1447 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1448 unsigned ByteSize = VT.getStoreSize(); 1449 Type *Ty = VT.getTypeForEVT(*getContext()); 1450 unsigned StackAlign = 1451 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1452 1453 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1454 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1455} 1456 1457/// CreateStackTemporary - Create a stack temporary suitable for holding 1458/// either of the specified value types. 1459SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1460 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1461 VT2.getStoreSizeInBits())/8; 1462 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1463 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1464 const TargetData *TD = TLI.getTargetData(); 1465 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1466 TD->getPrefTypeAlignment(Ty2)); 1467 1468 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1469 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1470 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1471} 1472 1473SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1474 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1475 // These setcc operations always fold. 1476 switch (Cond) { 1477 default: break; 1478 case ISD::SETFALSE: 1479 case ISD::SETFALSE2: return getConstant(0, VT); 1480 case ISD::SETTRUE: 1481 case ISD::SETTRUE2: return getConstant(1, VT); 1482 1483 case ISD::SETOEQ: 1484 case ISD::SETOGT: 1485 case ISD::SETOGE: 1486 case ISD::SETOLT: 1487 case ISD::SETOLE: 1488 case ISD::SETONE: 1489 case ISD::SETO: 1490 case ISD::SETUO: 1491 case ISD::SETUEQ: 1492 case ISD::SETUNE: 1493 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1494 break; 1495 } 1496 1497 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1498 const APInt &C2 = N2C->getAPIntValue(); 1499 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1500 const APInt &C1 = N1C->getAPIntValue(); 1501 1502 switch (Cond) { 1503 default: llvm_unreachable("Unknown integer setcc!"); 1504 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1505 case ISD::SETNE: return getConstant(C1 != C2, VT); 1506 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1507 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1508 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1509 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1510 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1511 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1512 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1513 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1514 } 1515 } 1516 } 1517 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1518 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1519 // No compile time operations on this type yet. 1520 if (N1C->getValueType(0) == MVT::ppcf128) 1521 return SDValue(); 1522 1523 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1524 switch (Cond) { 1525 default: break; 1526 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1527 return getUNDEF(VT); 1528 // fall through 1529 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1530 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1531 return getUNDEF(VT); 1532 // fall through 1533 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1534 R==APFloat::cmpLessThan, VT); 1535 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1536 return getUNDEF(VT); 1537 // fall through 1538 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1539 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1540 return getUNDEF(VT); 1541 // fall through 1542 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1543 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1544 return getUNDEF(VT); 1545 // fall through 1546 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1547 R==APFloat::cmpEqual, VT); 1548 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1549 return getUNDEF(VT); 1550 // fall through 1551 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1552 R==APFloat::cmpEqual, VT); 1553 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1554 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1555 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1556 R==APFloat::cmpEqual, VT); 1557 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1558 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1559 R==APFloat::cmpLessThan, VT); 1560 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1561 R==APFloat::cmpUnordered, VT); 1562 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1563 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1564 } 1565 } else { 1566 // Ensure that the constant occurs on the RHS. 1567 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1568 } 1569 } 1570 1571 // Could not fold it. 1572 return SDValue(); 1573} 1574 1575/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1576/// use this predicate to simplify operations downstream. 1577bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1578 // This predicate is not safe for vector operations. 1579 if (Op.getValueType().isVector()) 1580 return false; 1581 1582 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1583 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1584} 1585 1586/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1587/// this predicate to simplify operations downstream. Mask is known to be zero 1588/// for bits that V cannot have. 1589bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1590 unsigned Depth) const { 1591 APInt KnownZero, KnownOne; 1592 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1593 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1594 return (KnownZero & Mask) == Mask; 1595} 1596 1597/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1598/// known to be either zero or one and return them in the KnownZero/KnownOne 1599/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1600/// processing. 1601void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1602 APInt &KnownZero, APInt &KnownOne, 1603 unsigned Depth) const { 1604 unsigned BitWidth = Mask.getBitWidth(); 1605 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1606 "Mask size mismatches value type size!"); 1607 1608 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1609 if (Depth == 6 || Mask == 0) 1610 return; // Limit search depth. 1611 1612 APInt KnownZero2, KnownOne2; 1613 1614 switch (Op.getOpcode()) { 1615 case ISD::Constant: 1616 // We know all of the bits for a constant! 1617 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1618 KnownZero = ~KnownOne & Mask; 1619 return; 1620 case ISD::AND: 1621 // If either the LHS or the RHS are Zero, the result is zero. 1622 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1623 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1624 KnownZero2, KnownOne2, Depth+1); 1625 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1626 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1627 1628 // Output known-1 bits are only known if set in both the LHS & RHS. 1629 KnownOne &= KnownOne2; 1630 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1631 KnownZero |= KnownZero2; 1632 return; 1633 case ISD::OR: 1634 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1635 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1636 KnownZero2, KnownOne2, Depth+1); 1637 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1638 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1639 1640 // Output known-0 bits are only known if clear in both the LHS & RHS. 1641 KnownZero &= KnownZero2; 1642 // Output known-1 are known to be set if set in either the LHS | RHS. 1643 KnownOne |= KnownOne2; 1644 return; 1645 case ISD::XOR: { 1646 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1647 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1650 1651 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1652 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1653 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1654 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1655 KnownZero = KnownZeroOut; 1656 return; 1657 } 1658 case ISD::MUL: { 1659 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1660 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1661 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1662 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1663 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1664 1665 // If low bits are zero in either operand, output low known-0 bits. 1666 // Also compute a conserative estimate for high known-0 bits. 1667 // More trickiness is possible, but this is sufficient for the 1668 // interesting case of alignment computation. 1669 KnownOne.clearAllBits(); 1670 unsigned TrailZ = KnownZero.countTrailingOnes() + 1671 KnownZero2.countTrailingOnes(); 1672 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1673 KnownZero2.countLeadingOnes(), 1674 BitWidth) - BitWidth; 1675 1676 TrailZ = std::min(TrailZ, BitWidth); 1677 LeadZ = std::min(LeadZ, BitWidth); 1678 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1679 APInt::getHighBitsSet(BitWidth, LeadZ); 1680 KnownZero &= Mask; 1681 return; 1682 } 1683 case ISD::UDIV: { 1684 // For the purposes of computing leading zeros we can conservatively 1685 // treat a udiv as a logical right shift by the power of 2 known to 1686 // be less than the denominator. 1687 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1688 ComputeMaskedBits(Op.getOperand(0), 1689 AllOnes, KnownZero2, KnownOne2, Depth+1); 1690 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1691 1692 KnownOne2.clearAllBits(); 1693 KnownZero2.clearAllBits(); 1694 ComputeMaskedBits(Op.getOperand(1), 1695 AllOnes, KnownZero2, KnownOne2, Depth+1); 1696 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1697 if (RHSUnknownLeadingOnes != BitWidth) 1698 LeadZ = std::min(BitWidth, 1699 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1700 1701 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1702 return; 1703 } 1704 case ISD::SELECT: 1705 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1706 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1707 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1708 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1709 1710 // Only known if known in both the LHS and RHS. 1711 KnownOne &= KnownOne2; 1712 KnownZero &= KnownZero2; 1713 return; 1714 case ISD::SELECT_CC: 1715 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1716 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1718 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1719 1720 // Only known if known in both the LHS and RHS. 1721 KnownOne &= KnownOne2; 1722 KnownZero &= KnownZero2; 1723 return; 1724 case ISD::SADDO: 1725 case ISD::UADDO: 1726 case ISD::SSUBO: 1727 case ISD::USUBO: 1728 case ISD::SMULO: 1729 case ISD::UMULO: 1730 if (Op.getResNo() != 1) 1731 return; 1732 // The boolean result conforms to getBooleanContents. Fall through. 1733 case ISD::SETCC: 1734 // If we know the result of a setcc has the top bits zero, use this info. 1735 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1736 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1737 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1738 return; 1739 case ISD::SHL: 1740 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1741 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1742 unsigned ShAmt = SA->getZExtValue(); 1743 1744 // If the shift count is an invalid immediate, don't do anything. 1745 if (ShAmt >= BitWidth) 1746 return; 1747 1748 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1749 KnownZero, KnownOne, Depth+1); 1750 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1751 KnownZero <<= ShAmt; 1752 KnownOne <<= ShAmt; 1753 // low bits known zero. 1754 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1755 } 1756 return; 1757 case ISD::SRL: 1758 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1759 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1760 unsigned ShAmt = SA->getZExtValue(); 1761 1762 // If the shift count is an invalid immediate, don't do anything. 1763 if (ShAmt >= BitWidth) 1764 return; 1765 1766 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1767 KnownZero, KnownOne, Depth+1); 1768 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1769 KnownZero = KnownZero.lshr(ShAmt); 1770 KnownOne = KnownOne.lshr(ShAmt); 1771 1772 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1773 KnownZero |= HighBits; // High bits known zero. 1774 } 1775 return; 1776 case ISD::SRA: 1777 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1778 unsigned ShAmt = SA->getZExtValue(); 1779 1780 // If the shift count is an invalid immediate, don't do anything. 1781 if (ShAmt >= BitWidth) 1782 return; 1783 1784 APInt InDemandedMask = (Mask << ShAmt); 1785 // If any of the demanded bits are produced by the sign extension, we also 1786 // demand the input sign bit. 1787 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1788 if (HighBits.getBoolValue()) 1789 InDemandedMask |= APInt::getSignBit(BitWidth); 1790 1791 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1792 Depth+1); 1793 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1794 KnownZero = KnownZero.lshr(ShAmt); 1795 KnownOne = KnownOne.lshr(ShAmt); 1796 1797 // Handle the sign bits. 1798 APInt SignBit = APInt::getSignBit(BitWidth); 1799 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1800 1801 if (KnownZero.intersects(SignBit)) { 1802 KnownZero |= HighBits; // New bits are known zero. 1803 } else if (KnownOne.intersects(SignBit)) { 1804 KnownOne |= HighBits; // New bits are known one. 1805 } 1806 } 1807 return; 1808 case ISD::SIGN_EXTEND_INREG: { 1809 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1810 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1811 1812 // Sign extension. Compute the demanded bits in the result that are not 1813 // present in the input. 1814 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1815 1816 APInt InSignBit = APInt::getSignBit(EBits); 1817 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1818 1819 // If the sign extended bits are demanded, we know that the sign 1820 // bit is demanded. 1821 InSignBit = InSignBit.zext(BitWidth); 1822 if (NewBits.getBoolValue()) 1823 InputDemandedBits |= InSignBit; 1824 1825 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1826 KnownZero, KnownOne, Depth+1); 1827 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1828 1829 // If the sign bit of the input is known set or clear, then we know the 1830 // top bits of the result. 1831 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1832 KnownZero |= NewBits; 1833 KnownOne &= ~NewBits; 1834 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1835 KnownOne |= NewBits; 1836 KnownZero &= ~NewBits; 1837 } else { // Input sign bit unknown 1838 KnownZero &= ~NewBits; 1839 KnownOne &= ~NewBits; 1840 } 1841 return; 1842 } 1843 case ISD::CTTZ: 1844 case ISD::CTLZ: 1845 case ISD::CTPOP: { 1846 unsigned LowBits = Log2_32(BitWidth)+1; 1847 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1848 KnownOne.clearAllBits(); 1849 return; 1850 } 1851 case ISD::LOAD: { 1852 if (ISD::isZEXTLoad(Op.getNode())) { 1853 LoadSDNode *LD = cast<LoadSDNode>(Op); 1854 EVT VT = LD->getMemoryVT(); 1855 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1856 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1857 } 1858 return; 1859 } 1860 case ISD::ZERO_EXTEND: { 1861 EVT InVT = Op.getOperand(0).getValueType(); 1862 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1863 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1864 APInt InMask = Mask.trunc(InBits); 1865 KnownZero = KnownZero.trunc(InBits); 1866 KnownOne = KnownOne.trunc(InBits); 1867 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1868 KnownZero = KnownZero.zext(BitWidth); 1869 KnownOne = KnownOne.zext(BitWidth); 1870 KnownZero |= NewBits; 1871 return; 1872 } 1873 case ISD::SIGN_EXTEND: { 1874 EVT InVT = Op.getOperand(0).getValueType(); 1875 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1876 APInt InSignBit = APInt::getSignBit(InBits); 1877 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1878 APInt InMask = Mask.trunc(InBits); 1879 1880 // If any of the sign extended bits are demanded, we know that the sign 1881 // bit is demanded. Temporarily set this bit in the mask for our callee. 1882 if (NewBits.getBoolValue()) 1883 InMask |= InSignBit; 1884 1885 KnownZero = KnownZero.trunc(InBits); 1886 KnownOne = KnownOne.trunc(InBits); 1887 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1888 1889 // Note if the sign bit is known to be zero or one. 1890 bool SignBitKnownZero = KnownZero.isNegative(); 1891 bool SignBitKnownOne = KnownOne.isNegative(); 1892 assert(!(SignBitKnownZero && SignBitKnownOne) && 1893 "Sign bit can't be known to be both zero and one!"); 1894 1895 // If the sign bit wasn't actually demanded by our caller, we don't 1896 // want it set in the KnownZero and KnownOne result values. Reset the 1897 // mask and reapply it to the result values. 1898 InMask = Mask.trunc(InBits); 1899 KnownZero &= InMask; 1900 KnownOne &= InMask; 1901 1902 KnownZero = KnownZero.zext(BitWidth); 1903 KnownOne = KnownOne.zext(BitWidth); 1904 1905 // If the sign bit is known zero or one, the top bits match. 1906 if (SignBitKnownZero) 1907 KnownZero |= NewBits; 1908 else if (SignBitKnownOne) 1909 KnownOne |= NewBits; 1910 return; 1911 } 1912 case ISD::ANY_EXTEND: { 1913 EVT InVT = Op.getOperand(0).getValueType(); 1914 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1915 APInt InMask = Mask.trunc(InBits); 1916 KnownZero = KnownZero.trunc(InBits); 1917 KnownOne = KnownOne.trunc(InBits); 1918 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1919 KnownZero = KnownZero.zext(BitWidth); 1920 KnownOne = KnownOne.zext(BitWidth); 1921 return; 1922 } 1923 case ISD::TRUNCATE: { 1924 EVT InVT = Op.getOperand(0).getValueType(); 1925 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1926 APInt InMask = Mask.zext(InBits); 1927 KnownZero = KnownZero.zext(InBits); 1928 KnownOne = KnownOne.zext(InBits); 1929 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1930 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1931 KnownZero = KnownZero.trunc(BitWidth); 1932 KnownOne = KnownOne.trunc(BitWidth); 1933 break; 1934 } 1935 case ISD::AssertZext: { 1936 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1937 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1938 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1939 KnownOne, Depth+1); 1940 KnownZero |= (~InMask) & Mask; 1941 return; 1942 } 1943 case ISD::FGETSIGN: 1944 // All bits are zero except the low bit. 1945 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1946 return; 1947 1948 case ISD::SUB: { 1949 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1950 // We know that the top bits of C-X are clear if X contains less bits 1951 // than C (i.e. no wrap-around can happen). For example, 20-X is 1952 // positive if we can prove that X is >= 0 and < 16. 1953 if (CLHS->getAPIntValue().isNonNegative()) { 1954 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1955 // NLZ can't be BitWidth with no sign bit 1956 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1957 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1958 Depth+1); 1959 1960 // If all of the MaskV bits are known to be zero, then we know the 1961 // output top bits are zero, because we now know that the output is 1962 // from [0-C]. 1963 if ((KnownZero2 & MaskV) == MaskV) { 1964 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1965 // Top bits known zero. 1966 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1967 } 1968 } 1969 } 1970 } 1971 // fall through 1972 case ISD::ADD: 1973 case ISD::ADDE: { 1974 // Output known-0 bits are known if clear or set in both the low clear bits 1975 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1976 // low 3 bits clear. 1977 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1978 BitWidth - Mask.countLeadingZeros()); 1979 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1980 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1981 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1982 1983 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1984 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1985 KnownZeroOut = std::min(KnownZeroOut, 1986 KnownZero2.countTrailingOnes()); 1987 1988 if (Op.getOpcode() == ISD::ADD) { 1989 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1990 return; 1991 } 1992 1993 // With ADDE, a carry bit may be added in, so we can only use this 1994 // information if we know (at least) that the low two bits are clear. We 1995 // then return to the caller that the low bit is unknown but that other bits 1996 // are known zero. 1997 if (KnownZeroOut >= 2) // ADDE 1998 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 1999 return; 2000 } 2001 case ISD::SREM: 2002 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2003 const APInt &RA = Rem->getAPIntValue().abs(); 2004 if (RA.isPowerOf2()) { 2005 APInt LowBits = RA - 1; 2006 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2007 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 2008 2009 // The low bits of the first operand are unchanged by the srem. 2010 KnownZero = KnownZero2 & LowBits; 2011 KnownOne = KnownOne2 & LowBits; 2012 2013 // If the first operand is non-negative or has all low bits zero, then 2014 // the upper bits are all zero. 2015 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2016 KnownZero |= ~LowBits; 2017 2018 // If the first operand is negative and not all low bits are zero, then 2019 // the upper bits are all one. 2020 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2021 KnownOne |= ~LowBits; 2022 2023 KnownZero &= Mask; 2024 KnownOne &= Mask; 2025 2026 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2027 } 2028 } 2029 return; 2030 case ISD::UREM: { 2031 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2032 const APInt &RA = Rem->getAPIntValue(); 2033 if (RA.isPowerOf2()) { 2034 APInt LowBits = (RA - 1); 2035 APInt Mask2 = LowBits & Mask; 2036 KnownZero |= ~LowBits & Mask; 2037 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 2038 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2039 break; 2040 } 2041 } 2042 2043 // Since the result is less than or equal to either operand, any leading 2044 // zero bits in either operand must also exist in the result. 2045 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 2046 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 2047 Depth+1); 2048 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 2049 Depth+1); 2050 2051 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2052 KnownZero2.countLeadingOnes()); 2053 KnownOne.clearAllBits(); 2054 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2055 return; 2056 } 2057 case ISD::FrameIndex: 2058 case ISD::TargetFrameIndex: 2059 if (unsigned Align = InferPtrAlignment(Op)) { 2060 // The low bits are known zero if the pointer is aligned. 2061 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2062 return; 2063 } 2064 break; 2065 2066 default: 2067 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2068 break; 2069 // Fallthrough 2070 case ISD::INTRINSIC_WO_CHAIN: 2071 case ISD::INTRINSIC_W_CHAIN: 2072 case ISD::INTRINSIC_VOID: 2073 // Allow the target to implement this method for its nodes. 2074 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2075 Depth); 2076 return; 2077 } 2078} 2079 2080/// ComputeNumSignBits - Return the number of times the sign bit of the 2081/// register is replicated into the other bits. We know that at least 1 bit 2082/// is always equal to the sign bit (itself), but other cases can give us 2083/// information. For example, immediately after an "SRA X, 2", we know that 2084/// the top 3 bits are all equal to each other, so we return 3. 2085unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2086 EVT VT = Op.getValueType(); 2087 assert(VT.isInteger() && "Invalid VT!"); 2088 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2089 unsigned Tmp, Tmp2; 2090 unsigned FirstAnswer = 1; 2091 2092 if (Depth == 6) 2093 return 1; // Limit search depth. 2094 2095 switch (Op.getOpcode()) { 2096 default: break; 2097 case ISD::AssertSext: 2098 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2099 return VTBits-Tmp+1; 2100 case ISD::AssertZext: 2101 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2102 return VTBits-Tmp; 2103 2104 case ISD::Constant: { 2105 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2106 return Val.getNumSignBits(); 2107 } 2108 2109 case ISD::SIGN_EXTEND: 2110 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2111 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2112 2113 case ISD::SIGN_EXTEND_INREG: 2114 // Max of the input and what this extends. 2115 Tmp = 2116 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2117 Tmp = VTBits-Tmp+1; 2118 2119 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2120 return std::max(Tmp, Tmp2); 2121 2122 case ISD::SRA: 2123 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2124 // SRA X, C -> adds C sign bits. 2125 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2126 Tmp += C->getZExtValue(); 2127 if (Tmp > VTBits) Tmp = VTBits; 2128 } 2129 return Tmp; 2130 case ISD::SHL: 2131 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2132 // shl destroys sign bits. 2133 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2134 if (C->getZExtValue() >= VTBits || // Bad shift. 2135 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2136 return Tmp - C->getZExtValue(); 2137 } 2138 break; 2139 case ISD::AND: 2140 case ISD::OR: 2141 case ISD::XOR: // NOT is handled here. 2142 // Logical binary ops preserve the number of sign bits at the worst. 2143 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2144 if (Tmp != 1) { 2145 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2146 FirstAnswer = std::min(Tmp, Tmp2); 2147 // We computed what we know about the sign bits as our first 2148 // answer. Now proceed to the generic code that uses 2149 // ComputeMaskedBits, and pick whichever answer is better. 2150 } 2151 break; 2152 2153 case ISD::SELECT: 2154 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2155 if (Tmp == 1) return 1; // Early out. 2156 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2157 return std::min(Tmp, Tmp2); 2158 2159 case ISD::SADDO: 2160 case ISD::UADDO: 2161 case ISD::SSUBO: 2162 case ISD::USUBO: 2163 case ISD::SMULO: 2164 case ISD::UMULO: 2165 if (Op.getResNo() != 1) 2166 break; 2167 // The boolean result conforms to getBooleanContents. Fall through. 2168 case ISD::SETCC: 2169 // If setcc returns 0/-1, all bits are sign bits. 2170 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2171 TargetLowering::ZeroOrNegativeOneBooleanContent) 2172 return VTBits; 2173 break; 2174 case ISD::ROTL: 2175 case ISD::ROTR: 2176 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2177 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2178 2179 // Handle rotate right by N like a rotate left by 32-N. 2180 if (Op.getOpcode() == ISD::ROTR) 2181 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2182 2183 // If we aren't rotating out all of the known-in sign bits, return the 2184 // number that are left. This handles rotl(sext(x), 1) for example. 2185 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2186 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2187 } 2188 break; 2189 case ISD::ADD: 2190 // Add can have at most one carry bit. Thus we know that the output 2191 // is, at worst, one more bit than the inputs. 2192 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2193 if (Tmp == 1) return 1; // Early out. 2194 2195 // Special case decrementing a value (ADD X, -1): 2196 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2197 if (CRHS->isAllOnesValue()) { 2198 APInt KnownZero, KnownOne; 2199 APInt Mask = APInt::getAllOnesValue(VTBits); 2200 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2201 2202 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2203 // sign bits set. 2204 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2205 return VTBits; 2206 2207 // If we are subtracting one from a positive number, there is no carry 2208 // out of the result. 2209 if (KnownZero.isNegative()) 2210 return Tmp; 2211 } 2212 2213 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2214 if (Tmp2 == 1) return 1; 2215 return std::min(Tmp, Tmp2)-1; 2216 break; 2217 2218 case ISD::SUB: 2219 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2220 if (Tmp2 == 1) return 1; 2221 2222 // Handle NEG. 2223 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2224 if (CLHS->isNullValue()) { 2225 APInt KnownZero, KnownOne; 2226 APInt Mask = APInt::getAllOnesValue(VTBits); 2227 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2228 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2229 // sign bits set. 2230 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2231 return VTBits; 2232 2233 // If the input is known to be positive (the sign bit is known clear), 2234 // the output of the NEG has the same number of sign bits as the input. 2235 if (KnownZero.isNegative()) 2236 return Tmp2; 2237 2238 // Otherwise, we treat this like a SUB. 2239 } 2240 2241 // Sub can have at most one carry bit. Thus we know that the output 2242 // is, at worst, one more bit than the inputs. 2243 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2244 if (Tmp == 1) return 1; // Early out. 2245 return std::min(Tmp, Tmp2)-1; 2246 break; 2247 case ISD::TRUNCATE: 2248 // FIXME: it's tricky to do anything useful for this, but it is an important 2249 // case for targets like X86. 2250 break; 2251 } 2252 2253 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2254 if (Op.getOpcode() == ISD::LOAD) { 2255 LoadSDNode *LD = cast<LoadSDNode>(Op); 2256 unsigned ExtType = LD->getExtensionType(); 2257 switch (ExtType) { 2258 default: break; 2259 case ISD::SEXTLOAD: // '17' bits known 2260 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2261 return VTBits-Tmp+1; 2262 case ISD::ZEXTLOAD: // '16' bits known 2263 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2264 return VTBits-Tmp; 2265 } 2266 } 2267 2268 // Allow the target to implement this method for its nodes. 2269 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2270 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2271 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2272 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2273 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2274 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2275 } 2276 2277 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2278 // use this information. 2279 APInt KnownZero, KnownOne; 2280 APInt Mask = APInt::getAllOnesValue(VTBits); 2281 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2282 2283 if (KnownZero.isNegative()) { // sign bit is 0 2284 Mask = KnownZero; 2285 } else if (KnownOne.isNegative()) { // sign bit is 1; 2286 Mask = KnownOne; 2287 } else { 2288 // Nothing known. 2289 return FirstAnswer; 2290 } 2291 2292 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2293 // the number of identical bits in the top of the input value. 2294 Mask = ~Mask; 2295 Mask <<= Mask.getBitWidth()-VTBits; 2296 // Return # leading zeros. We use 'min' here in case Val was zero before 2297 // shifting. We don't want to return '64' as for an i32 "0". 2298 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2299} 2300 2301/// isBaseWithConstantOffset - Return true if the specified operand is an 2302/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2303/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2304/// semantics as an ADD. This handles the equivalence: 2305/// X|Cst == X+Cst iff X&Cst = 0. 2306bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2307 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2308 !isa<ConstantSDNode>(Op.getOperand(1))) 2309 return false; 2310 2311 if (Op.getOpcode() == ISD::OR && 2312 !MaskedValueIsZero(Op.getOperand(0), 2313 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2314 return false; 2315 2316 return true; 2317} 2318 2319 2320bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2321 // If we're told that NaNs won't happen, assume they won't. 2322 if (NoNaNsFPMath) 2323 return true; 2324 2325 // If the value is a constant, we can obviously see if it is a NaN or not. 2326 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2327 return !C->getValueAPF().isNaN(); 2328 2329 // TODO: Recognize more cases here. 2330 2331 return false; 2332} 2333 2334bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2335 // If the value is a constant, we can obviously see if it is a zero or not. 2336 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2337 return !C->isZero(); 2338 2339 // TODO: Recognize more cases here. 2340 switch (Op.getOpcode()) { 2341 default: break; 2342 case ISD::OR: 2343 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2344 return !C->isNullValue(); 2345 break; 2346 } 2347 2348 return false; 2349} 2350 2351bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2352 // Check the obvious case. 2353 if (A == B) return true; 2354 2355 // For for negative and positive zero. 2356 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2357 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2358 if (CA->isZero() && CB->isZero()) return true; 2359 2360 // Otherwise they may not be equal. 2361 return false; 2362} 2363 2364/// getNode - Gets or creates the specified node. 2365/// 2366SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2367 FoldingSetNodeID ID; 2368 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2369 void *IP = 0; 2370 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2371 return SDValue(E, 0); 2372 2373 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2374 CSEMap.InsertNode(N, IP); 2375 2376 AllNodes.push_back(N); 2377#ifndef NDEBUG 2378 VerifySDNode(N); 2379#endif 2380 return SDValue(N, 0); 2381} 2382 2383SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2384 EVT VT, SDValue Operand) { 2385 // Constant fold unary operations with an integer constant operand. 2386 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2387 const APInt &Val = C->getAPIntValue(); 2388 switch (Opcode) { 2389 default: break; 2390 case ISD::SIGN_EXTEND: 2391 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2392 case ISD::ANY_EXTEND: 2393 case ISD::ZERO_EXTEND: 2394 case ISD::TRUNCATE: 2395 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2396 case ISD::UINT_TO_FP: 2397 case ISD::SINT_TO_FP: { 2398 // No compile time operations on ppcf128. 2399 if (VT == MVT::ppcf128) break; 2400 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2401 (void)apf.convertFromAPInt(Val, 2402 Opcode==ISD::SINT_TO_FP, 2403 APFloat::rmNearestTiesToEven); 2404 return getConstantFP(apf, VT); 2405 } 2406 case ISD::BITCAST: 2407 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2408 return getConstantFP(Val.bitsToFloat(), VT); 2409 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2410 return getConstantFP(Val.bitsToDouble(), VT); 2411 break; 2412 case ISD::BSWAP: 2413 return getConstant(Val.byteSwap(), VT); 2414 case ISD::CTPOP: 2415 return getConstant(Val.countPopulation(), VT); 2416 case ISD::CTLZ: 2417 return getConstant(Val.countLeadingZeros(), VT); 2418 case ISD::CTTZ: 2419 return getConstant(Val.countTrailingZeros(), VT); 2420 } 2421 } 2422 2423 // Constant fold unary operations with a floating point constant operand. 2424 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2425 APFloat V = C->getValueAPF(); // make copy 2426 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2427 switch (Opcode) { 2428 case ISD::FNEG: 2429 V.changeSign(); 2430 return getConstantFP(V, VT); 2431 case ISD::FABS: 2432 V.clearSign(); 2433 return getConstantFP(V, VT); 2434 case ISD::FP_ROUND: 2435 case ISD::FP_EXTEND: { 2436 bool ignored; 2437 // This can return overflow, underflow, or inexact; we don't care. 2438 // FIXME need to be more flexible about rounding mode. 2439 (void)V.convert(*EVTToAPFloatSemantics(VT), 2440 APFloat::rmNearestTiesToEven, &ignored); 2441 return getConstantFP(V, VT); 2442 } 2443 case ISD::FP_TO_SINT: 2444 case ISD::FP_TO_UINT: { 2445 integerPart x[2]; 2446 bool ignored; 2447 assert(integerPartWidth >= 64); 2448 // FIXME need to be more flexible about rounding mode. 2449 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2450 Opcode==ISD::FP_TO_SINT, 2451 APFloat::rmTowardZero, &ignored); 2452 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2453 break; 2454 APInt api(VT.getSizeInBits(), x); 2455 return getConstant(api, VT); 2456 } 2457 case ISD::BITCAST: 2458 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2459 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2460 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2461 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2462 break; 2463 } 2464 } 2465 } 2466 2467 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2468 switch (Opcode) { 2469 case ISD::TokenFactor: 2470 case ISD::MERGE_VALUES: 2471 case ISD::CONCAT_VECTORS: 2472 return Operand; // Factor, merge or concat of one node? No need. 2473 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2474 case ISD::FP_EXTEND: 2475 assert(VT.isFloatingPoint() && 2476 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2477 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2478 assert((!VT.isVector() || 2479 VT.getVectorNumElements() == 2480 Operand.getValueType().getVectorNumElements()) && 2481 "Vector element count mismatch!"); 2482 if (Operand.getOpcode() == ISD::UNDEF) 2483 return getUNDEF(VT); 2484 break; 2485 case ISD::SIGN_EXTEND: 2486 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2487 "Invalid SIGN_EXTEND!"); 2488 if (Operand.getValueType() == VT) return Operand; // noop extension 2489 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2490 "Invalid sext node, dst < src!"); 2491 assert((!VT.isVector() || 2492 VT.getVectorNumElements() == 2493 Operand.getValueType().getVectorNumElements()) && 2494 "Vector element count mismatch!"); 2495 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2496 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2497 else if (OpOpcode == ISD::UNDEF) 2498 // sext(undef) = 0, because the top bits will all be the same. 2499 return getConstant(0, VT); 2500 break; 2501 case ISD::ZERO_EXTEND: 2502 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2503 "Invalid ZERO_EXTEND!"); 2504 if (Operand.getValueType() == VT) return Operand; // noop extension 2505 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2506 "Invalid zext node, dst < src!"); 2507 assert((!VT.isVector() || 2508 VT.getVectorNumElements() == 2509 Operand.getValueType().getVectorNumElements()) && 2510 "Vector element count mismatch!"); 2511 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2512 return getNode(ISD::ZERO_EXTEND, DL, VT, 2513 Operand.getNode()->getOperand(0)); 2514 else if (OpOpcode == ISD::UNDEF) 2515 // zext(undef) = 0, because the top bits will be zero. 2516 return getConstant(0, VT); 2517 break; 2518 case ISD::ANY_EXTEND: 2519 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2520 "Invalid ANY_EXTEND!"); 2521 if (Operand.getValueType() == VT) return Operand; // noop extension 2522 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2523 "Invalid anyext node, dst < src!"); 2524 assert((!VT.isVector() || 2525 VT.getVectorNumElements() == 2526 Operand.getValueType().getVectorNumElements()) && 2527 "Vector element count mismatch!"); 2528 2529 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2530 OpOpcode == ISD::ANY_EXTEND) 2531 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2532 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2533 else if (OpOpcode == ISD::UNDEF) 2534 return getUNDEF(VT); 2535 2536 // (ext (trunx x)) -> x 2537 if (OpOpcode == ISD::TRUNCATE) { 2538 SDValue OpOp = Operand.getNode()->getOperand(0); 2539 if (OpOp.getValueType() == VT) 2540 return OpOp; 2541 } 2542 break; 2543 case ISD::TRUNCATE: 2544 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2545 "Invalid TRUNCATE!"); 2546 if (Operand.getValueType() == VT) return Operand; // noop truncate 2547 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2548 "Invalid truncate node, src < dst!"); 2549 assert((!VT.isVector() || 2550 VT.getVectorNumElements() == 2551 Operand.getValueType().getVectorNumElements()) && 2552 "Vector element count mismatch!"); 2553 if (OpOpcode == ISD::TRUNCATE) 2554 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2555 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2556 OpOpcode == ISD::ANY_EXTEND) { 2557 // If the source is smaller than the dest, we still need an extend. 2558 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2559 .bitsLT(VT.getScalarType())) 2560 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2561 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2562 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2563 else 2564 return Operand.getNode()->getOperand(0); 2565 } 2566 break; 2567 case ISD::BITCAST: 2568 // Basic sanity checking. 2569 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2570 && "Cannot BITCAST between types of different sizes!"); 2571 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2572 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2573 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2574 if (OpOpcode == ISD::UNDEF) 2575 return getUNDEF(VT); 2576 break; 2577 case ISD::SCALAR_TO_VECTOR: 2578 assert(VT.isVector() && !Operand.getValueType().isVector() && 2579 (VT.getVectorElementType() == Operand.getValueType() || 2580 (VT.getVectorElementType().isInteger() && 2581 Operand.getValueType().isInteger() && 2582 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2583 "Illegal SCALAR_TO_VECTOR node!"); 2584 if (OpOpcode == ISD::UNDEF) 2585 return getUNDEF(VT); 2586 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2587 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2588 isa<ConstantSDNode>(Operand.getOperand(1)) && 2589 Operand.getConstantOperandVal(1) == 0 && 2590 Operand.getOperand(0).getValueType() == VT) 2591 return Operand.getOperand(0); 2592 break; 2593 case ISD::FNEG: 2594 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2595 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2596 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2597 Operand.getNode()->getOperand(0)); 2598 if (OpOpcode == ISD::FNEG) // --X -> X 2599 return Operand.getNode()->getOperand(0); 2600 break; 2601 case ISD::FABS: 2602 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2603 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2604 break; 2605 } 2606 2607 SDNode *N; 2608 SDVTList VTs = getVTList(VT); 2609 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2610 FoldingSetNodeID ID; 2611 SDValue Ops[1] = { Operand }; 2612 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2613 void *IP = 0; 2614 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2615 return SDValue(E, 0); 2616 2617 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2618 CSEMap.InsertNode(N, IP); 2619 } else { 2620 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2621 } 2622 2623 AllNodes.push_back(N); 2624#ifndef NDEBUG 2625 VerifySDNode(N); 2626#endif 2627 return SDValue(N, 0); 2628} 2629 2630SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2631 EVT VT, 2632 ConstantSDNode *Cst1, 2633 ConstantSDNode *Cst2) { 2634 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2635 2636 switch (Opcode) { 2637 case ISD::ADD: return getConstant(C1 + C2, VT); 2638 case ISD::SUB: return getConstant(C1 - C2, VT); 2639 case ISD::MUL: return getConstant(C1 * C2, VT); 2640 case ISD::UDIV: 2641 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2642 break; 2643 case ISD::UREM: 2644 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2645 break; 2646 case ISD::SDIV: 2647 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2648 break; 2649 case ISD::SREM: 2650 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2651 break; 2652 case ISD::AND: return getConstant(C1 & C2, VT); 2653 case ISD::OR: return getConstant(C1 | C2, VT); 2654 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2655 case ISD::SHL: return getConstant(C1 << C2, VT); 2656 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2657 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2658 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2659 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2660 default: break; 2661 } 2662 2663 return SDValue(); 2664} 2665 2666SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2667 SDValue N1, SDValue N2) { 2668 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2669 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2670 switch (Opcode) { 2671 default: break; 2672 case ISD::TokenFactor: 2673 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2674 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2675 // Fold trivial token factors. 2676 if (N1.getOpcode() == ISD::EntryToken) return N2; 2677 if (N2.getOpcode() == ISD::EntryToken) return N1; 2678 if (N1 == N2) return N1; 2679 break; 2680 case ISD::CONCAT_VECTORS: 2681 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2682 // one big BUILD_VECTOR. 2683 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2684 N2.getOpcode() == ISD::BUILD_VECTOR) { 2685 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2686 N1.getNode()->op_end()); 2687 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2688 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2689 } 2690 break; 2691 case ISD::AND: 2692 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2693 assert(N1.getValueType() == N2.getValueType() && 2694 N1.getValueType() == VT && "Binary operator types must match!"); 2695 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2696 // worth handling here. 2697 if (N2C && N2C->isNullValue()) 2698 return N2; 2699 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2700 return N1; 2701 break; 2702 case ISD::OR: 2703 case ISD::XOR: 2704 case ISD::ADD: 2705 case ISD::SUB: 2706 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2707 assert(N1.getValueType() == N2.getValueType() && 2708 N1.getValueType() == VT && "Binary operator types must match!"); 2709 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2710 // it's worth handling here. 2711 if (N2C && N2C->isNullValue()) 2712 return N1; 2713 break; 2714 case ISD::UDIV: 2715 case ISD::UREM: 2716 case ISD::MULHU: 2717 case ISD::MULHS: 2718 case ISD::MUL: 2719 case ISD::SDIV: 2720 case ISD::SREM: 2721 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2722 assert(N1.getValueType() == N2.getValueType() && 2723 N1.getValueType() == VT && "Binary operator types must match!"); 2724 break; 2725 case ISD::FADD: 2726 case ISD::FSUB: 2727 case ISD::FMUL: 2728 case ISD::FDIV: 2729 case ISD::FREM: 2730 if (UnsafeFPMath) { 2731 if (Opcode == ISD::FADD) { 2732 // 0+x --> x 2733 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2734 if (CFP->getValueAPF().isZero()) 2735 return N2; 2736 // x+0 --> x 2737 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2738 if (CFP->getValueAPF().isZero()) 2739 return N1; 2740 } else if (Opcode == ISD::FSUB) { 2741 // x-0 --> x 2742 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2743 if (CFP->getValueAPF().isZero()) 2744 return N1; 2745 } 2746 } 2747 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2748 assert(N1.getValueType() == N2.getValueType() && 2749 N1.getValueType() == VT && "Binary operator types must match!"); 2750 break; 2751 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2752 assert(N1.getValueType() == VT && 2753 N1.getValueType().isFloatingPoint() && 2754 N2.getValueType().isFloatingPoint() && 2755 "Invalid FCOPYSIGN!"); 2756 break; 2757 case ISD::SHL: 2758 case ISD::SRA: 2759 case ISD::SRL: 2760 case ISD::ROTL: 2761 case ISD::ROTR: 2762 assert(VT == N1.getValueType() && 2763 "Shift operators return type must be the same as their first arg"); 2764 assert(VT.isInteger() && N2.getValueType().isInteger() && 2765 "Shifts only work on integers"); 2766 // Verify that the shift amount VT is bit enough to hold valid shift 2767 // amounts. This catches things like trying to shift an i1024 value by an 2768 // i8, which is easy to fall into in generic code that uses 2769 // TLI.getShiftAmount(). 2770 assert(N2.getValueType().getSizeInBits() >= 2771 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2772 "Invalid use of small shift amount with oversized value!"); 2773 2774 // Always fold shifts of i1 values so the code generator doesn't need to 2775 // handle them. Since we know the size of the shift has to be less than the 2776 // size of the value, the shift/rotate count is guaranteed to be zero. 2777 if (VT == MVT::i1) 2778 return N1; 2779 if (N2C && N2C->isNullValue()) 2780 return N1; 2781 break; 2782 case ISD::FP_ROUND_INREG: { 2783 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2784 assert(VT == N1.getValueType() && "Not an inreg round!"); 2785 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2786 "Cannot FP_ROUND_INREG integer types"); 2787 assert(EVT.isVector() == VT.isVector() && 2788 "FP_ROUND_INREG type should be vector iff the operand " 2789 "type is vector!"); 2790 assert((!EVT.isVector() || 2791 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2792 "Vector element counts must match in FP_ROUND_INREG"); 2793 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2794 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2795 break; 2796 } 2797 case ISD::FP_ROUND: 2798 assert(VT.isFloatingPoint() && 2799 N1.getValueType().isFloatingPoint() && 2800 VT.bitsLE(N1.getValueType()) && 2801 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2802 if (N1.getValueType() == VT) return N1; // noop conversion. 2803 break; 2804 case ISD::AssertSext: 2805 case ISD::AssertZext: { 2806 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2807 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2808 assert(VT.isInteger() && EVT.isInteger() && 2809 "Cannot *_EXTEND_INREG FP types"); 2810 assert(!EVT.isVector() && 2811 "AssertSExt/AssertZExt type should be the vector element type " 2812 "rather than the vector type!"); 2813 assert(EVT.bitsLE(VT) && "Not extending!"); 2814 if (VT == EVT) return N1; // noop assertion. 2815 break; 2816 } 2817 case ISD::SIGN_EXTEND_INREG: { 2818 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2819 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2820 assert(VT.isInteger() && EVT.isInteger() && 2821 "Cannot *_EXTEND_INREG FP types"); 2822 assert(EVT.isVector() == VT.isVector() && 2823 "SIGN_EXTEND_INREG type should be vector iff the operand " 2824 "type is vector!"); 2825 assert((!EVT.isVector() || 2826 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2827 "Vector element counts must match in SIGN_EXTEND_INREG"); 2828 assert(EVT.bitsLE(VT) && "Not extending!"); 2829 if (EVT == VT) return N1; // Not actually extending 2830 2831 if (N1C) { 2832 APInt Val = N1C->getAPIntValue(); 2833 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2834 Val <<= Val.getBitWidth()-FromBits; 2835 Val = Val.ashr(Val.getBitWidth()-FromBits); 2836 return getConstant(Val, VT); 2837 } 2838 break; 2839 } 2840 case ISD::EXTRACT_VECTOR_ELT: 2841 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2842 if (N1.getOpcode() == ISD::UNDEF) 2843 return getUNDEF(VT); 2844 2845 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2846 // expanding copies of large vectors from registers. 2847 if (N2C && 2848 N1.getOpcode() == ISD::CONCAT_VECTORS && 2849 N1.getNumOperands() > 0) { 2850 unsigned Factor = 2851 N1.getOperand(0).getValueType().getVectorNumElements(); 2852 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2853 N1.getOperand(N2C->getZExtValue() / Factor), 2854 getConstant(N2C->getZExtValue() % Factor, 2855 N2.getValueType())); 2856 } 2857 2858 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2859 // expanding large vector constants. 2860 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2861 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2862 EVT VEltTy = N1.getValueType().getVectorElementType(); 2863 if (Elt.getValueType() != VEltTy) { 2864 // If the vector element type is not legal, the BUILD_VECTOR operands 2865 // are promoted and implicitly truncated. Make that explicit here. 2866 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2867 } 2868 if (VT != VEltTy) { 2869 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2870 // result is implicitly extended. 2871 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2872 } 2873 return Elt; 2874 } 2875 2876 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2877 // operations are lowered to scalars. 2878 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2879 // If the indices are the same, return the inserted element else 2880 // if the indices are known different, extract the element from 2881 // the original vector. 2882 SDValue N1Op2 = N1.getOperand(2); 2883 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2884 2885 if (N1Op2C && N2C) { 2886 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2887 if (VT == N1.getOperand(1).getValueType()) 2888 return N1.getOperand(1); 2889 else 2890 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2891 } 2892 2893 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2894 } 2895 } 2896 break; 2897 case ISD::EXTRACT_ELEMENT: 2898 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2899 assert(!N1.getValueType().isVector() && !VT.isVector() && 2900 (N1.getValueType().isInteger() == VT.isInteger()) && 2901 N1.getValueType() != VT && 2902 "Wrong types for EXTRACT_ELEMENT!"); 2903 2904 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2905 // 64-bit integers into 32-bit parts. Instead of building the extract of 2906 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2907 if (N1.getOpcode() == ISD::BUILD_PAIR) 2908 return N1.getOperand(N2C->getZExtValue()); 2909 2910 // EXTRACT_ELEMENT of a constant int is also very common. 2911 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2912 unsigned ElementSize = VT.getSizeInBits(); 2913 unsigned Shift = ElementSize * N2C->getZExtValue(); 2914 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2915 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2916 } 2917 break; 2918 case ISD::EXTRACT_SUBVECTOR: { 2919 SDValue Index = N2; 2920 if (VT.isSimple() && N1.getValueType().isSimple()) { 2921 assert(VT.isVector() && N1.getValueType().isVector() && 2922 "Extract subvector VTs must be a vectors!"); 2923 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2924 "Extract subvector VTs must have the same element type!"); 2925 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2926 "Extract subvector must be from larger vector to smaller vector!"); 2927 2928 if (isa<ConstantSDNode>(Index.getNode())) { 2929 assert((VT.getVectorNumElements() + 2930 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2931 <= N1.getValueType().getVectorNumElements()) 2932 && "Extract subvector overflow!"); 2933 } 2934 2935 // Trivial extraction. 2936 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2937 return N1; 2938 } 2939 break; 2940 } 2941 } 2942 2943 if (N1C) { 2944 if (N2C) { 2945 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2946 if (SV.getNode()) return SV; 2947 } else { // Cannonicalize constant to RHS if commutative 2948 if (isCommutativeBinOp(Opcode)) { 2949 std::swap(N1C, N2C); 2950 std::swap(N1, N2); 2951 } 2952 } 2953 } 2954 2955 // Constant fold FP operations. 2956 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2957 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2958 if (N1CFP) { 2959 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2960 // Cannonicalize constant to RHS if commutative 2961 std::swap(N1CFP, N2CFP); 2962 std::swap(N1, N2); 2963 } else if (N2CFP && VT != MVT::ppcf128) { 2964 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2965 APFloat::opStatus s; 2966 switch (Opcode) { 2967 case ISD::FADD: 2968 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2969 if (s != APFloat::opInvalidOp) 2970 return getConstantFP(V1, VT); 2971 break; 2972 case ISD::FSUB: 2973 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2974 if (s!=APFloat::opInvalidOp) 2975 return getConstantFP(V1, VT); 2976 break; 2977 case ISD::FMUL: 2978 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2979 if (s!=APFloat::opInvalidOp) 2980 return getConstantFP(V1, VT); 2981 break; 2982 case ISD::FDIV: 2983 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2984 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2985 return getConstantFP(V1, VT); 2986 break; 2987 case ISD::FREM : 2988 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2989 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2990 return getConstantFP(V1, VT); 2991 break; 2992 case ISD::FCOPYSIGN: 2993 V1.copySign(V2); 2994 return getConstantFP(V1, VT); 2995 default: break; 2996 } 2997 } 2998 } 2999 3000 // Canonicalize an UNDEF to the RHS, even over a constant. 3001 if (N1.getOpcode() == ISD::UNDEF) { 3002 if (isCommutativeBinOp(Opcode)) { 3003 std::swap(N1, N2); 3004 } else { 3005 switch (Opcode) { 3006 case ISD::FP_ROUND_INREG: 3007 case ISD::SIGN_EXTEND_INREG: 3008 case ISD::SUB: 3009 case ISD::FSUB: 3010 case ISD::FDIV: 3011 case ISD::FREM: 3012 case ISD::SRA: 3013 return N1; // fold op(undef, arg2) -> undef 3014 case ISD::UDIV: 3015 case ISD::SDIV: 3016 case ISD::UREM: 3017 case ISD::SREM: 3018 case ISD::SRL: 3019 case ISD::SHL: 3020 if (!VT.isVector()) 3021 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3022 // For vectors, we can't easily build an all zero vector, just return 3023 // the LHS. 3024 return N2; 3025 } 3026 } 3027 } 3028 3029 // Fold a bunch of operators when the RHS is undef. 3030 if (N2.getOpcode() == ISD::UNDEF) { 3031 switch (Opcode) { 3032 case ISD::XOR: 3033 if (N1.getOpcode() == ISD::UNDEF) 3034 // Handle undef ^ undef -> 0 special case. This is a common 3035 // idiom (misuse). 3036 return getConstant(0, VT); 3037 // fallthrough 3038 case ISD::ADD: 3039 case ISD::ADDC: 3040 case ISD::ADDE: 3041 case ISD::SUB: 3042 case ISD::UDIV: 3043 case ISD::SDIV: 3044 case ISD::UREM: 3045 case ISD::SREM: 3046 return N2; // fold op(arg1, undef) -> undef 3047 case ISD::FADD: 3048 case ISD::FSUB: 3049 case ISD::FMUL: 3050 case ISD::FDIV: 3051 case ISD::FREM: 3052 if (UnsafeFPMath) 3053 return N2; 3054 break; 3055 case ISD::MUL: 3056 case ISD::AND: 3057 case ISD::SRL: 3058 case ISD::SHL: 3059 if (!VT.isVector()) 3060 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3061 // For vectors, we can't easily build an all zero vector, just return 3062 // the LHS. 3063 return N1; 3064 case ISD::OR: 3065 if (!VT.isVector()) 3066 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3067 // For vectors, we can't easily build an all one vector, just return 3068 // the LHS. 3069 return N1; 3070 case ISD::SRA: 3071 return N1; 3072 } 3073 } 3074 3075 // Memoize this node if possible. 3076 SDNode *N; 3077 SDVTList VTs = getVTList(VT); 3078 if (VT != MVT::Glue) { 3079 SDValue Ops[] = { N1, N2 }; 3080 FoldingSetNodeID ID; 3081 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3082 void *IP = 0; 3083 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3084 return SDValue(E, 0); 3085 3086 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3087 CSEMap.InsertNode(N, IP); 3088 } else { 3089 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3090 } 3091 3092 AllNodes.push_back(N); 3093#ifndef NDEBUG 3094 VerifySDNode(N); 3095#endif 3096 return SDValue(N, 0); 3097} 3098 3099SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3100 SDValue N1, SDValue N2, SDValue N3) { 3101 // Perform various simplifications. 3102 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3103 switch (Opcode) { 3104 case ISD::CONCAT_VECTORS: 3105 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3106 // one big BUILD_VECTOR. 3107 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3108 N2.getOpcode() == ISD::BUILD_VECTOR && 3109 N3.getOpcode() == ISD::BUILD_VECTOR) { 3110 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3111 N1.getNode()->op_end()); 3112 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3113 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3114 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3115 } 3116 break; 3117 case ISD::SETCC: { 3118 // Use FoldSetCC to simplify SETCC's. 3119 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3120 if (Simp.getNode()) return Simp; 3121 break; 3122 } 3123 case ISD::SELECT: 3124 if (N1C) { 3125 if (N1C->getZExtValue()) 3126 return N2; // select true, X, Y -> X 3127 else 3128 return N3; // select false, X, Y -> Y 3129 } 3130 3131 if (N2 == N3) return N2; // select C, X, X -> X 3132 break; 3133 case ISD::VECTOR_SHUFFLE: 3134 llvm_unreachable("should use getVectorShuffle constructor!"); 3135 break; 3136 case ISD::INSERT_SUBVECTOR: { 3137 SDValue Index = N3; 3138 if (VT.isSimple() && N1.getValueType().isSimple() 3139 && N2.getValueType().isSimple()) { 3140 assert(VT.isVector() && N1.getValueType().isVector() && 3141 N2.getValueType().isVector() && 3142 "Insert subvector VTs must be a vectors"); 3143 assert(VT == N1.getValueType() && 3144 "Dest and insert subvector source types must match!"); 3145 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3146 "Insert subvector must be from smaller vector to larger vector!"); 3147 if (isa<ConstantSDNode>(Index.getNode())) { 3148 assert((N2.getValueType().getVectorNumElements() + 3149 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3150 <= VT.getVectorNumElements()) 3151 && "Insert subvector overflow!"); 3152 } 3153 3154 // Trivial insertion. 3155 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3156 return N2; 3157 } 3158 break; 3159 } 3160 case ISD::BITCAST: 3161 // Fold bit_convert nodes from a type to themselves. 3162 if (N1.getValueType() == VT) 3163 return N1; 3164 break; 3165 } 3166 3167 // Memoize node if it doesn't produce a flag. 3168 SDNode *N; 3169 SDVTList VTs = getVTList(VT); 3170 if (VT != MVT::Glue) { 3171 SDValue Ops[] = { N1, N2, N3 }; 3172 FoldingSetNodeID ID; 3173 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3174 void *IP = 0; 3175 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3176 return SDValue(E, 0); 3177 3178 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3179 CSEMap.InsertNode(N, IP); 3180 } else { 3181 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3182 } 3183 3184 AllNodes.push_back(N); 3185#ifndef NDEBUG 3186 VerifySDNode(N); 3187#endif 3188 return SDValue(N, 0); 3189} 3190 3191SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3192 SDValue N1, SDValue N2, SDValue N3, 3193 SDValue N4) { 3194 SDValue Ops[] = { N1, N2, N3, N4 }; 3195 return getNode(Opcode, DL, VT, Ops, 4); 3196} 3197 3198SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3199 SDValue N1, SDValue N2, SDValue N3, 3200 SDValue N4, SDValue N5) { 3201 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3202 return getNode(Opcode, DL, VT, Ops, 5); 3203} 3204 3205/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3206/// the incoming stack arguments to be loaded from the stack. 3207SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3208 SmallVector<SDValue, 8> ArgChains; 3209 3210 // Include the original chain at the beginning of the list. When this is 3211 // used by target LowerCall hooks, this helps legalize find the 3212 // CALLSEQ_BEGIN node. 3213 ArgChains.push_back(Chain); 3214 3215 // Add a chain value for each stack argument. 3216 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3217 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3218 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3219 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3220 if (FI->getIndex() < 0) 3221 ArgChains.push_back(SDValue(L, 1)); 3222 3223 // Build a tokenfactor for all the chains. 3224 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3225 &ArgChains[0], ArgChains.size()); 3226} 3227 3228/// SplatByte - Distribute ByteVal over NumBits bits. 3229static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3230 APInt Val = APInt(NumBits, ByteVal); 3231 unsigned Shift = 8; 3232 for (unsigned i = NumBits; i > 8; i >>= 1) { 3233 Val = (Val << Shift) | Val; 3234 Shift <<= 1; 3235 } 3236 return Val; 3237} 3238 3239/// getMemsetValue - Vectorized representation of the memset value 3240/// operand. 3241static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3242 DebugLoc dl) { 3243 assert(Value.getOpcode() != ISD::UNDEF); 3244 3245 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3246 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3247 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3248 if (VT.isInteger()) 3249 return DAG.getConstant(Val, VT); 3250 return DAG.getConstantFP(APFloat(Val), VT); 3251 } 3252 3253 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3254 if (NumBits > 8) { 3255 // Use a multiplication with 0x010101... to extend the input to the 3256 // required length. 3257 APInt Magic = SplatByte(NumBits, 0x01); 3258 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3259 } 3260 3261 return Value; 3262} 3263 3264/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3265/// used when a memcpy is turned into a memset when the source is a constant 3266/// string ptr. 3267static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3268 const TargetLowering &TLI, 3269 std::string &Str, unsigned Offset) { 3270 // Handle vector with all elements zero. 3271 if (Str.empty()) { 3272 if (VT.isInteger()) 3273 return DAG.getConstant(0, VT); 3274 else if (VT == MVT::f32 || VT == MVT::f64) 3275 return DAG.getConstantFP(0.0, VT); 3276 else if (VT.isVector()) { 3277 unsigned NumElts = VT.getVectorNumElements(); 3278 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3279 return DAG.getNode(ISD::BITCAST, dl, VT, 3280 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3281 EltVT, NumElts))); 3282 } else 3283 llvm_unreachable("Expected type!"); 3284 } 3285 3286 assert(!VT.isVector() && "Can't handle vector type here!"); 3287 unsigned NumBits = VT.getSizeInBits(); 3288 unsigned MSB = NumBits / 8; 3289 uint64_t Val = 0; 3290 if (TLI.isLittleEndian()) 3291 Offset = Offset + MSB - 1; 3292 for (unsigned i = 0; i != MSB; ++i) { 3293 Val = (Val << 8) | (unsigned char)Str[Offset]; 3294 Offset += TLI.isLittleEndian() ? -1 : 1; 3295 } 3296 return DAG.getConstant(Val, VT); 3297} 3298 3299/// getMemBasePlusOffset - Returns base and offset node for the 3300/// 3301static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3302 SelectionDAG &DAG) { 3303 EVT VT = Base.getValueType(); 3304 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3305 VT, Base, DAG.getConstant(Offset, VT)); 3306} 3307 3308/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3309/// 3310static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3311 unsigned SrcDelta = 0; 3312 GlobalAddressSDNode *G = NULL; 3313 if (Src.getOpcode() == ISD::GlobalAddress) 3314 G = cast<GlobalAddressSDNode>(Src); 3315 else if (Src.getOpcode() == ISD::ADD && 3316 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3317 Src.getOperand(1).getOpcode() == ISD::Constant) { 3318 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3319 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3320 } 3321 if (!G) 3322 return false; 3323 3324 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3325 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3326 return true; 3327 3328 return false; 3329} 3330 3331/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3332/// to replace the memset / memcpy. Return true if the number of memory ops 3333/// is below the threshold. It returns the types of the sequence of 3334/// memory ops to perform memset / memcpy by reference. 3335static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3336 unsigned Limit, uint64_t Size, 3337 unsigned DstAlign, unsigned SrcAlign, 3338 bool NonScalarIntSafe, 3339 bool MemcpyStrSrc, 3340 SelectionDAG &DAG, 3341 const TargetLowering &TLI) { 3342 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3343 "Expecting memcpy / memset source to meet alignment requirement!"); 3344 // If 'SrcAlign' is zero, that means the memory operation does not need to 3345 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3346 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3347 // is the specified alignment of the memory operation. If it is zero, that 3348 // means it's possible to change the alignment of the destination. 3349 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3350 // not need to be loaded. 3351 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3352 NonScalarIntSafe, MemcpyStrSrc, 3353 DAG.getMachineFunction()); 3354 3355 if (VT == MVT::Other) { 3356 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3357 TLI.allowsUnalignedMemoryAccesses(VT)) { 3358 VT = TLI.getPointerTy(); 3359 } else { 3360 switch (DstAlign & 7) { 3361 case 0: VT = MVT::i64; break; 3362 case 4: VT = MVT::i32; break; 3363 case 2: VT = MVT::i16; break; 3364 default: VT = MVT::i8; break; 3365 } 3366 } 3367 3368 MVT LVT = MVT::i64; 3369 while (!TLI.isTypeLegal(LVT)) 3370 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3371 assert(LVT.isInteger()); 3372 3373 if (VT.bitsGT(LVT)) 3374 VT = LVT; 3375 } 3376 3377 unsigned NumMemOps = 0; 3378 while (Size != 0) { 3379 unsigned VTSize = VT.getSizeInBits() / 8; 3380 while (VTSize > Size) { 3381 // For now, only use non-vector load / store's for the left-over pieces. 3382 if (VT.isVector() || VT.isFloatingPoint()) { 3383 VT = MVT::i64; 3384 while (!TLI.isTypeLegal(VT)) 3385 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3386 VTSize = VT.getSizeInBits() / 8; 3387 } else { 3388 // This can result in a type that is not legal on the target, e.g. 3389 // 1 or 2 bytes on PPC. 3390 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3391 VTSize >>= 1; 3392 } 3393 } 3394 3395 if (++NumMemOps > Limit) 3396 return false; 3397 MemOps.push_back(VT); 3398 Size -= VTSize; 3399 } 3400 3401 return true; 3402} 3403 3404static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3405 SDValue Chain, SDValue Dst, 3406 SDValue Src, uint64_t Size, 3407 unsigned Align, bool isVol, 3408 bool AlwaysInline, 3409 MachinePointerInfo DstPtrInfo, 3410 MachinePointerInfo SrcPtrInfo) { 3411 // Turn a memcpy of undef to nop. 3412 if (Src.getOpcode() == ISD::UNDEF) 3413 return Chain; 3414 3415 // Expand memcpy to a series of load and store ops if the size operand falls 3416 // below a certain threshold. 3417 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3418 // rather than maybe a humongous number of loads and stores. 3419 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3420 std::vector<EVT> MemOps; 3421 bool DstAlignCanChange = false; 3422 MachineFunction &MF = DAG.getMachineFunction(); 3423 MachineFrameInfo *MFI = MF.getFrameInfo(); 3424 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3425 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3426 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3427 DstAlignCanChange = true; 3428 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3429 if (Align > SrcAlign) 3430 SrcAlign = Align; 3431 std::string Str; 3432 bool CopyFromStr = isMemSrcFromString(Src, Str); 3433 bool isZeroStr = CopyFromStr && Str.empty(); 3434 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3435 3436 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3437 (DstAlignCanChange ? 0 : Align), 3438 (isZeroStr ? 0 : SrcAlign), 3439 true, CopyFromStr, DAG, TLI)) 3440 return SDValue(); 3441 3442 if (DstAlignCanChange) { 3443 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3444 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3445 if (NewAlign > Align) { 3446 // Give the stack frame object a larger alignment if needed. 3447 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3448 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3449 Align = NewAlign; 3450 } 3451 } 3452 3453 SmallVector<SDValue, 8> OutChains; 3454 unsigned NumMemOps = MemOps.size(); 3455 uint64_t SrcOff = 0, DstOff = 0; 3456 for (unsigned i = 0; i != NumMemOps; ++i) { 3457 EVT VT = MemOps[i]; 3458 unsigned VTSize = VT.getSizeInBits() / 8; 3459 SDValue Value, Store; 3460 3461 if (CopyFromStr && 3462 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3463 // It's unlikely a store of a vector immediate can be done in a single 3464 // instruction. It would require a load from a constantpool first. 3465 // We only handle zero vectors here. 3466 // FIXME: Handle other cases where store of vector immediate is done in 3467 // a single instruction. 3468 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3469 Store = DAG.getStore(Chain, dl, Value, 3470 getMemBasePlusOffset(Dst, DstOff, DAG), 3471 DstPtrInfo.getWithOffset(DstOff), isVol, 3472 false, Align); 3473 } else { 3474 // The type might not be legal for the target. This should only happen 3475 // if the type is smaller than a legal type, as on PPC, so the right 3476 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3477 // to Load/Store if NVT==VT. 3478 // FIXME does the case above also need this? 3479 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3480 assert(NVT.bitsGE(VT)); 3481 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3482 getMemBasePlusOffset(Src, SrcOff, DAG), 3483 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3484 MinAlign(SrcAlign, SrcOff)); 3485 Store = DAG.getTruncStore(Chain, dl, Value, 3486 getMemBasePlusOffset(Dst, DstOff, DAG), 3487 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3488 false, Align); 3489 } 3490 OutChains.push_back(Store); 3491 SrcOff += VTSize; 3492 DstOff += VTSize; 3493 } 3494 3495 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3496 &OutChains[0], OutChains.size()); 3497} 3498 3499static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3500 SDValue Chain, SDValue Dst, 3501 SDValue Src, uint64_t Size, 3502 unsigned Align, bool isVol, 3503 bool AlwaysInline, 3504 MachinePointerInfo DstPtrInfo, 3505 MachinePointerInfo SrcPtrInfo) { 3506 // Turn a memmove of undef to nop. 3507 if (Src.getOpcode() == ISD::UNDEF) 3508 return Chain; 3509 3510 // Expand memmove to a series of load and store ops if the size operand falls 3511 // below a certain threshold. 3512 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3513 std::vector<EVT> MemOps; 3514 bool DstAlignCanChange = false; 3515 MachineFunction &MF = DAG.getMachineFunction(); 3516 MachineFrameInfo *MFI = MF.getFrameInfo(); 3517 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3518 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3519 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3520 DstAlignCanChange = true; 3521 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3522 if (Align > SrcAlign) 3523 SrcAlign = Align; 3524 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3525 3526 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3527 (DstAlignCanChange ? 0 : Align), 3528 SrcAlign, true, false, DAG, TLI)) 3529 return SDValue(); 3530 3531 if (DstAlignCanChange) { 3532 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3533 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3534 if (NewAlign > Align) { 3535 // Give the stack frame object a larger alignment if needed. 3536 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3537 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3538 Align = NewAlign; 3539 } 3540 } 3541 3542 uint64_t SrcOff = 0, DstOff = 0; 3543 SmallVector<SDValue, 8> LoadValues; 3544 SmallVector<SDValue, 8> LoadChains; 3545 SmallVector<SDValue, 8> OutChains; 3546 unsigned NumMemOps = MemOps.size(); 3547 for (unsigned i = 0; i < NumMemOps; i++) { 3548 EVT VT = MemOps[i]; 3549 unsigned VTSize = VT.getSizeInBits() / 8; 3550 SDValue Value, Store; 3551 3552 Value = DAG.getLoad(VT, dl, Chain, 3553 getMemBasePlusOffset(Src, SrcOff, DAG), 3554 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3555 false, SrcAlign); 3556 LoadValues.push_back(Value); 3557 LoadChains.push_back(Value.getValue(1)); 3558 SrcOff += VTSize; 3559 } 3560 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3561 &LoadChains[0], LoadChains.size()); 3562 OutChains.clear(); 3563 for (unsigned i = 0; i < NumMemOps; i++) { 3564 EVT VT = MemOps[i]; 3565 unsigned VTSize = VT.getSizeInBits() / 8; 3566 SDValue Value, Store; 3567 3568 Store = DAG.getStore(Chain, dl, LoadValues[i], 3569 getMemBasePlusOffset(Dst, DstOff, DAG), 3570 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3571 OutChains.push_back(Store); 3572 DstOff += VTSize; 3573 } 3574 3575 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3576 &OutChains[0], OutChains.size()); 3577} 3578 3579static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3580 SDValue Chain, SDValue Dst, 3581 SDValue Src, uint64_t Size, 3582 unsigned Align, bool isVol, 3583 MachinePointerInfo DstPtrInfo) { 3584 // Turn a memset of undef to nop. 3585 if (Src.getOpcode() == ISD::UNDEF) 3586 return Chain; 3587 3588 // Expand memset to a series of load/store ops if the size operand 3589 // falls below a certain threshold. 3590 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3591 std::vector<EVT> MemOps; 3592 bool DstAlignCanChange = false; 3593 MachineFunction &MF = DAG.getMachineFunction(); 3594 MachineFrameInfo *MFI = MF.getFrameInfo(); 3595 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3596 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3597 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3598 DstAlignCanChange = true; 3599 bool NonScalarIntSafe = 3600 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3601 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3602 Size, (DstAlignCanChange ? 0 : Align), 0, 3603 NonScalarIntSafe, false, DAG, TLI)) 3604 return SDValue(); 3605 3606 if (DstAlignCanChange) { 3607 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3608 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3609 if (NewAlign > Align) { 3610 // Give the stack frame object a larger alignment if needed. 3611 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3612 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3613 Align = NewAlign; 3614 } 3615 } 3616 3617 SmallVector<SDValue, 8> OutChains; 3618 uint64_t DstOff = 0; 3619 unsigned NumMemOps = MemOps.size(); 3620 3621 // Find the largest store and generate the bit pattern for it. 3622 EVT LargestVT = MemOps[0]; 3623 for (unsigned i = 1; i < NumMemOps; i++) 3624 if (MemOps[i].bitsGT(LargestVT)) 3625 LargestVT = MemOps[i]; 3626 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3627 3628 for (unsigned i = 0; i < NumMemOps; i++) { 3629 EVT VT = MemOps[i]; 3630 3631 // If this store is smaller than the largest store see whether we can get 3632 // the smaller value for free with a truncate. 3633 SDValue Value = MemSetValue; 3634 if (VT.bitsLT(LargestVT)) { 3635 if (!LargestVT.isVector() && !VT.isVector() && 3636 TLI.isTruncateFree(LargestVT, VT)) 3637 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3638 else 3639 Value = getMemsetValue(Src, VT, DAG, dl); 3640 } 3641 assert(Value.getValueType() == VT && "Value with wrong type."); 3642 SDValue Store = DAG.getStore(Chain, dl, Value, 3643 getMemBasePlusOffset(Dst, DstOff, DAG), 3644 DstPtrInfo.getWithOffset(DstOff), 3645 isVol, false, Align); 3646 OutChains.push_back(Store); 3647 DstOff += VT.getSizeInBits() / 8; 3648 } 3649 3650 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3651 &OutChains[0], OutChains.size()); 3652} 3653 3654SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3655 SDValue Src, SDValue Size, 3656 unsigned Align, bool isVol, bool AlwaysInline, 3657 MachinePointerInfo DstPtrInfo, 3658 MachinePointerInfo SrcPtrInfo) { 3659 3660 // Check to see if we should lower the memcpy to loads and stores first. 3661 // For cases within the target-specified limits, this is the best choice. 3662 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3663 if (ConstantSize) { 3664 // Memcpy with size zero? Just return the original chain. 3665 if (ConstantSize->isNullValue()) 3666 return Chain; 3667 3668 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3669 ConstantSize->getZExtValue(),Align, 3670 isVol, false, DstPtrInfo, SrcPtrInfo); 3671 if (Result.getNode()) 3672 return Result; 3673 } 3674 3675 // Then check to see if we should lower the memcpy with target-specific 3676 // code. If the target chooses to do this, this is the next best. 3677 SDValue Result = 3678 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3679 isVol, AlwaysInline, 3680 DstPtrInfo, SrcPtrInfo); 3681 if (Result.getNode()) 3682 return Result; 3683 3684 // If we really need inline code and the target declined to provide it, 3685 // use a (potentially long) sequence of loads and stores. 3686 if (AlwaysInline) { 3687 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3688 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3689 ConstantSize->getZExtValue(), Align, isVol, 3690 true, DstPtrInfo, SrcPtrInfo); 3691 } 3692 3693 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3694 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3695 // respect volatile, so they may do things like read or write memory 3696 // beyond the given memory regions. But fixing this isn't easy, and most 3697 // people don't care. 3698 3699 // Emit a library call. 3700 TargetLowering::ArgListTy Args; 3701 TargetLowering::ArgListEntry Entry; 3702 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3703 Entry.Node = Dst; Args.push_back(Entry); 3704 Entry.Node = Src; Args.push_back(Entry); 3705 Entry.Node = Size; Args.push_back(Entry); 3706 // FIXME: pass in DebugLoc 3707 std::pair<SDValue,SDValue> CallResult = 3708 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3709 false, false, false, false, 0, 3710 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3711 /*isReturnValueUsed=*/false, 3712 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3713 TLI.getPointerTy()), 3714 Args, *this, dl); 3715 return CallResult.second; 3716} 3717 3718SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3719 SDValue Src, SDValue Size, 3720 unsigned Align, bool isVol, 3721 MachinePointerInfo DstPtrInfo, 3722 MachinePointerInfo SrcPtrInfo) { 3723 3724 // Check to see if we should lower the memmove to loads and stores first. 3725 // For cases within the target-specified limits, this is the best choice. 3726 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3727 if (ConstantSize) { 3728 // Memmove with size zero? Just return the original chain. 3729 if (ConstantSize->isNullValue()) 3730 return Chain; 3731 3732 SDValue Result = 3733 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3734 ConstantSize->getZExtValue(), Align, isVol, 3735 false, DstPtrInfo, SrcPtrInfo); 3736 if (Result.getNode()) 3737 return Result; 3738 } 3739 3740 // Then check to see if we should lower the memmove with target-specific 3741 // code. If the target chooses to do this, this is the next best. 3742 SDValue Result = 3743 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3744 DstPtrInfo, SrcPtrInfo); 3745 if (Result.getNode()) 3746 return Result; 3747 3748 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3749 // not be safe. See memcpy above for more details. 3750 3751 // Emit a library call. 3752 TargetLowering::ArgListTy Args; 3753 TargetLowering::ArgListEntry Entry; 3754 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3755 Entry.Node = Dst; Args.push_back(Entry); 3756 Entry.Node = Src; Args.push_back(Entry); 3757 Entry.Node = Size; Args.push_back(Entry); 3758 // FIXME: pass in DebugLoc 3759 std::pair<SDValue,SDValue> CallResult = 3760 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3761 false, false, false, false, 0, 3762 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3763 /*isReturnValueUsed=*/false, 3764 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3765 TLI.getPointerTy()), 3766 Args, *this, dl); 3767 return CallResult.second; 3768} 3769 3770SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3771 SDValue Src, SDValue Size, 3772 unsigned Align, bool isVol, 3773 MachinePointerInfo DstPtrInfo) { 3774 3775 // Check to see if we should lower the memset to stores first. 3776 // For cases within the target-specified limits, this is the best choice. 3777 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3778 if (ConstantSize) { 3779 // Memset with size zero? Just return the original chain. 3780 if (ConstantSize->isNullValue()) 3781 return Chain; 3782 3783 SDValue Result = 3784 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3785 Align, isVol, DstPtrInfo); 3786 3787 if (Result.getNode()) 3788 return Result; 3789 } 3790 3791 // Then check to see if we should lower the memset with target-specific 3792 // code. If the target chooses to do this, this is the next best. 3793 SDValue Result = 3794 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3795 DstPtrInfo); 3796 if (Result.getNode()) 3797 return Result; 3798 3799 // Emit a library call. 3800 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3801 TargetLowering::ArgListTy Args; 3802 TargetLowering::ArgListEntry Entry; 3803 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3804 Args.push_back(Entry); 3805 // Extend or truncate the argument to be an i32 value for the call. 3806 if (Src.getValueType().bitsGT(MVT::i32)) 3807 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3808 else 3809 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3810 Entry.Node = Src; 3811 Entry.Ty = Type::getInt32Ty(*getContext()); 3812 Entry.isSExt = true; 3813 Args.push_back(Entry); 3814 Entry.Node = Size; 3815 Entry.Ty = IntPtrTy; 3816 Entry.isSExt = false; 3817 Args.push_back(Entry); 3818 // FIXME: pass in DebugLoc 3819 std::pair<SDValue,SDValue> CallResult = 3820 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3821 false, false, false, false, 0, 3822 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3823 /*isReturnValueUsed=*/false, 3824 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3825 TLI.getPointerTy()), 3826 Args, *this, dl); 3827 return CallResult.second; 3828} 3829 3830SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3831 SDValue Chain, SDValue Ptr, SDValue Cmp, 3832 SDValue Swp, MachinePointerInfo PtrInfo, 3833 unsigned Alignment, 3834 AtomicOrdering Ordering, 3835 SynchronizationScope SynchScope) { 3836 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3837 Alignment = getEVTAlignment(MemVT); 3838 3839 MachineFunction &MF = getMachineFunction(); 3840 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3841 3842 // For now, atomics are considered to be volatile always. 3843 Flags |= MachineMemOperand::MOVolatile; 3844 3845 MachineMemOperand *MMO = 3846 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3847 3848 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3849 Ordering, SynchScope); 3850} 3851 3852SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3853 SDValue Chain, 3854 SDValue Ptr, SDValue Cmp, 3855 SDValue Swp, MachineMemOperand *MMO, 3856 AtomicOrdering Ordering, 3857 SynchronizationScope SynchScope) { 3858 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3859 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3860 3861 EVT VT = Cmp.getValueType(); 3862 3863 SDVTList VTs = getVTList(VT, MVT::Other); 3864 FoldingSetNodeID ID; 3865 ID.AddInteger(MemVT.getRawBits()); 3866 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3867 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3868 void* IP = 0; 3869 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3870 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3871 return SDValue(E, 0); 3872 } 3873 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3874 Ptr, Cmp, Swp, MMO, Ordering, 3875 SynchScope); 3876 CSEMap.InsertNode(N, IP); 3877 AllNodes.push_back(N); 3878 return SDValue(N, 0); 3879} 3880 3881SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3882 SDValue Chain, 3883 SDValue Ptr, SDValue Val, 3884 const Value* PtrVal, 3885 unsigned Alignment, 3886 AtomicOrdering Ordering, 3887 SynchronizationScope SynchScope) { 3888 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3889 Alignment = getEVTAlignment(MemVT); 3890 3891 MachineFunction &MF = getMachineFunction(); 3892 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3893 3894 // For now, atomics are considered to be volatile always. 3895 Flags |= MachineMemOperand::MOVolatile; 3896 3897 MachineMemOperand *MMO = 3898 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3899 MemVT.getStoreSize(), Alignment); 3900 3901 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 3902 Ordering, SynchScope); 3903} 3904 3905SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3906 SDValue Chain, 3907 SDValue Ptr, SDValue Val, 3908 MachineMemOperand *MMO, 3909 AtomicOrdering Ordering, 3910 SynchronizationScope SynchScope) { 3911 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3912 Opcode == ISD::ATOMIC_LOAD_SUB || 3913 Opcode == ISD::ATOMIC_LOAD_AND || 3914 Opcode == ISD::ATOMIC_LOAD_OR || 3915 Opcode == ISD::ATOMIC_LOAD_XOR || 3916 Opcode == ISD::ATOMIC_LOAD_NAND || 3917 Opcode == ISD::ATOMIC_LOAD_MIN || 3918 Opcode == ISD::ATOMIC_LOAD_MAX || 3919 Opcode == ISD::ATOMIC_LOAD_UMIN || 3920 Opcode == ISD::ATOMIC_LOAD_UMAX || 3921 Opcode == ISD::ATOMIC_SWAP || 3922 Opcode == ISD::ATOMIC_STORE) && 3923 "Invalid Atomic Op"); 3924 3925 EVT VT = Val.getValueType(); 3926 3927 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 3928 getVTList(VT, MVT::Other); 3929 FoldingSetNodeID ID; 3930 ID.AddInteger(MemVT.getRawBits()); 3931 SDValue Ops[] = {Chain, Ptr, Val}; 3932 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3933 void* IP = 0; 3934 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3935 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3936 return SDValue(E, 0); 3937 } 3938 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3939 Ptr, Val, MMO, 3940 Ordering, SynchScope); 3941 CSEMap.InsertNode(N, IP); 3942 AllNodes.push_back(N); 3943 return SDValue(N, 0); 3944} 3945 3946SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3947 EVT VT, SDValue Chain, 3948 SDValue Ptr, 3949 const Value* PtrVal, 3950 unsigned Alignment, 3951 AtomicOrdering Ordering, 3952 SynchronizationScope SynchScope) { 3953 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3954 Alignment = getEVTAlignment(MemVT); 3955 3956 MachineFunction &MF = getMachineFunction(); 3957 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3958 3959 // For now, atomics are considered to be volatile always. 3960 Flags |= MachineMemOperand::MOVolatile; 3961 3962 MachineMemOperand *MMO = 3963 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3964 MemVT.getStoreSize(), Alignment); 3965 3966 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 3967 Ordering, SynchScope); 3968} 3969 3970SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3971 EVT VT, SDValue Chain, 3972 SDValue Ptr, 3973 MachineMemOperand *MMO, 3974 AtomicOrdering Ordering, 3975 SynchronizationScope SynchScope) { 3976 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 3977 3978 SDVTList VTs = getVTList(VT, MVT::Other); 3979 FoldingSetNodeID ID; 3980 ID.AddInteger(MemVT.getRawBits()); 3981 SDValue Ops[] = {Chain, Ptr}; 3982 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3983 void* IP = 0; 3984 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3985 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3986 return SDValue(E, 0); 3987 } 3988 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3989 Ptr, MMO, Ordering, SynchScope); 3990 CSEMap.InsertNode(N, IP); 3991 AllNodes.push_back(N); 3992 return SDValue(N, 0); 3993} 3994 3995/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3996SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3997 DebugLoc dl) { 3998 if (NumOps == 1) 3999 return Ops[0]; 4000 4001 SmallVector<EVT, 4> VTs; 4002 VTs.reserve(NumOps); 4003 for (unsigned i = 0; i < NumOps; ++i) 4004 VTs.push_back(Ops[i].getValueType()); 4005 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4006 Ops, NumOps); 4007} 4008 4009SDValue 4010SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4011 const EVT *VTs, unsigned NumVTs, 4012 const SDValue *Ops, unsigned NumOps, 4013 EVT MemVT, MachinePointerInfo PtrInfo, 4014 unsigned Align, bool Vol, 4015 bool ReadMem, bool WriteMem) { 4016 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4017 MemVT, PtrInfo, Align, Vol, 4018 ReadMem, WriteMem); 4019} 4020 4021SDValue 4022SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4023 const SDValue *Ops, unsigned NumOps, 4024 EVT MemVT, MachinePointerInfo PtrInfo, 4025 unsigned Align, bool Vol, 4026 bool ReadMem, bool WriteMem) { 4027 if (Align == 0) // Ensure that codegen never sees alignment 0 4028 Align = getEVTAlignment(MemVT); 4029 4030 MachineFunction &MF = getMachineFunction(); 4031 unsigned Flags = 0; 4032 if (WriteMem) 4033 Flags |= MachineMemOperand::MOStore; 4034 if (ReadMem) 4035 Flags |= MachineMemOperand::MOLoad; 4036 if (Vol) 4037 Flags |= MachineMemOperand::MOVolatile; 4038 MachineMemOperand *MMO = 4039 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4040 4041 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4042} 4043 4044SDValue 4045SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4046 const SDValue *Ops, unsigned NumOps, 4047 EVT MemVT, MachineMemOperand *MMO) { 4048 assert((Opcode == ISD::INTRINSIC_VOID || 4049 Opcode == ISD::INTRINSIC_W_CHAIN || 4050 Opcode == ISD::PREFETCH || 4051 (Opcode <= INT_MAX && 4052 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4053 "Opcode is not a memory-accessing opcode!"); 4054 4055 // Memoize the node unless it returns a flag. 4056 MemIntrinsicSDNode *N; 4057 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4058 FoldingSetNodeID ID; 4059 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4060 void *IP = 0; 4061 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4062 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4063 return SDValue(E, 0); 4064 } 4065 4066 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4067 MemVT, MMO); 4068 CSEMap.InsertNode(N, IP); 4069 } else { 4070 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4071 MemVT, MMO); 4072 } 4073 AllNodes.push_back(N); 4074 return SDValue(N, 0); 4075} 4076 4077/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4078/// MachinePointerInfo record from it. This is particularly useful because the 4079/// code generator has many cases where it doesn't bother passing in a 4080/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4081static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4082 // If this is FI+Offset, we can model it. 4083 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4084 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4085 4086 // If this is (FI+Offset1)+Offset2, we can model it. 4087 if (Ptr.getOpcode() != ISD::ADD || 4088 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4089 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4090 return MachinePointerInfo(); 4091 4092 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4093 return MachinePointerInfo::getFixedStack(FI, Offset+ 4094 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4095} 4096 4097/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4098/// MachinePointerInfo record from it. This is particularly useful because the 4099/// code generator has many cases where it doesn't bother passing in a 4100/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4101static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4102 // If the 'Offset' value isn't a constant, we can't handle this. 4103 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4104 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4105 if (OffsetOp.getOpcode() == ISD::UNDEF) 4106 return InferPointerInfo(Ptr); 4107 return MachinePointerInfo(); 4108} 4109 4110 4111SDValue 4112SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4113 EVT VT, DebugLoc dl, SDValue Chain, 4114 SDValue Ptr, SDValue Offset, 4115 MachinePointerInfo PtrInfo, EVT MemVT, 4116 bool isVolatile, bool isNonTemporal, 4117 unsigned Alignment, const MDNode *TBAAInfo) { 4118 assert(Chain.getValueType() == MVT::Other && 4119 "Invalid chain type"); 4120 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4121 Alignment = getEVTAlignment(VT); 4122 4123 unsigned Flags = MachineMemOperand::MOLoad; 4124 if (isVolatile) 4125 Flags |= MachineMemOperand::MOVolatile; 4126 if (isNonTemporal) 4127 Flags |= MachineMemOperand::MONonTemporal; 4128 4129 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4130 // clients. 4131 if (PtrInfo.V == 0) 4132 PtrInfo = InferPointerInfo(Ptr, Offset); 4133 4134 MachineFunction &MF = getMachineFunction(); 4135 MachineMemOperand *MMO = 4136 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4137 TBAAInfo); 4138 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4139} 4140 4141SDValue 4142SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4143 EVT VT, DebugLoc dl, SDValue Chain, 4144 SDValue Ptr, SDValue Offset, EVT MemVT, 4145 MachineMemOperand *MMO) { 4146 if (VT == MemVT) { 4147 ExtType = ISD::NON_EXTLOAD; 4148 } else if (ExtType == ISD::NON_EXTLOAD) { 4149 assert(VT == MemVT && "Non-extending load from different memory type!"); 4150 } else { 4151 // Extending load. 4152 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4153 "Should only be an extending load, not truncating!"); 4154 assert(VT.isInteger() == MemVT.isInteger() && 4155 "Cannot convert from FP to Int or Int -> FP!"); 4156 assert(VT.isVector() == MemVT.isVector() && 4157 "Cannot use trunc store to convert to or from a vector!"); 4158 assert((!VT.isVector() || 4159 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4160 "Cannot use trunc store to change the number of vector elements!"); 4161 } 4162 4163 bool Indexed = AM != ISD::UNINDEXED; 4164 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4165 "Unindexed load with an offset!"); 4166 4167 SDVTList VTs = Indexed ? 4168 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4169 SDValue Ops[] = { Chain, Ptr, Offset }; 4170 FoldingSetNodeID ID; 4171 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4172 ID.AddInteger(MemVT.getRawBits()); 4173 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4174 MMO->isNonTemporal())); 4175 void *IP = 0; 4176 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4177 cast<LoadSDNode>(E)->refineAlignment(MMO); 4178 return SDValue(E, 0); 4179 } 4180 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4181 MemVT, MMO); 4182 CSEMap.InsertNode(N, IP); 4183 AllNodes.push_back(N); 4184 return SDValue(N, 0); 4185} 4186 4187SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4188 SDValue Chain, SDValue Ptr, 4189 MachinePointerInfo PtrInfo, 4190 bool isVolatile, bool isNonTemporal, 4191 unsigned Alignment, const MDNode *TBAAInfo) { 4192 SDValue Undef = getUNDEF(Ptr.getValueType()); 4193 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4194 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 4195} 4196 4197SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4198 SDValue Chain, SDValue Ptr, 4199 MachinePointerInfo PtrInfo, EVT MemVT, 4200 bool isVolatile, bool isNonTemporal, 4201 unsigned Alignment, const MDNode *TBAAInfo) { 4202 SDValue Undef = getUNDEF(Ptr.getValueType()); 4203 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4204 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment, 4205 TBAAInfo); 4206} 4207 4208 4209SDValue 4210SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4211 SDValue Offset, ISD::MemIndexedMode AM) { 4212 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4213 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4214 "Load is already a indexed load!"); 4215 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4216 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4217 LD->getMemoryVT(), 4218 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4219} 4220 4221SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4222 SDValue Ptr, MachinePointerInfo PtrInfo, 4223 bool isVolatile, bool isNonTemporal, 4224 unsigned Alignment, const MDNode *TBAAInfo) { 4225 assert(Chain.getValueType() == MVT::Other && 4226 "Invalid chain type"); 4227 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4228 Alignment = getEVTAlignment(Val.getValueType()); 4229 4230 unsigned Flags = MachineMemOperand::MOStore; 4231 if (isVolatile) 4232 Flags |= MachineMemOperand::MOVolatile; 4233 if (isNonTemporal) 4234 Flags |= MachineMemOperand::MONonTemporal; 4235 4236 if (PtrInfo.V == 0) 4237 PtrInfo = InferPointerInfo(Ptr); 4238 4239 MachineFunction &MF = getMachineFunction(); 4240 MachineMemOperand *MMO = 4241 MF.getMachineMemOperand(PtrInfo, Flags, 4242 Val.getValueType().getStoreSize(), Alignment, 4243 TBAAInfo); 4244 4245 return getStore(Chain, dl, Val, Ptr, MMO); 4246} 4247 4248SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4249 SDValue Ptr, MachineMemOperand *MMO) { 4250 assert(Chain.getValueType() == MVT::Other && 4251 "Invalid chain type"); 4252 EVT VT = Val.getValueType(); 4253 SDVTList VTs = getVTList(MVT::Other); 4254 SDValue Undef = getUNDEF(Ptr.getValueType()); 4255 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4256 FoldingSetNodeID ID; 4257 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4258 ID.AddInteger(VT.getRawBits()); 4259 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4260 MMO->isNonTemporal())); 4261 void *IP = 0; 4262 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4263 cast<StoreSDNode>(E)->refineAlignment(MMO); 4264 return SDValue(E, 0); 4265 } 4266 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4267 false, VT, MMO); 4268 CSEMap.InsertNode(N, IP); 4269 AllNodes.push_back(N); 4270 return SDValue(N, 0); 4271} 4272 4273SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4274 SDValue Ptr, MachinePointerInfo PtrInfo, 4275 EVT SVT,bool isVolatile, bool isNonTemporal, 4276 unsigned Alignment, 4277 const MDNode *TBAAInfo) { 4278 assert(Chain.getValueType() == MVT::Other && 4279 "Invalid chain type"); 4280 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4281 Alignment = getEVTAlignment(SVT); 4282 4283 unsigned Flags = MachineMemOperand::MOStore; 4284 if (isVolatile) 4285 Flags |= MachineMemOperand::MOVolatile; 4286 if (isNonTemporal) 4287 Flags |= MachineMemOperand::MONonTemporal; 4288 4289 if (PtrInfo.V == 0) 4290 PtrInfo = InferPointerInfo(Ptr); 4291 4292 MachineFunction &MF = getMachineFunction(); 4293 MachineMemOperand *MMO = 4294 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4295 TBAAInfo); 4296 4297 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4298} 4299 4300SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4301 SDValue Ptr, EVT SVT, 4302 MachineMemOperand *MMO) { 4303 EVT VT = Val.getValueType(); 4304 4305 assert(Chain.getValueType() == MVT::Other && 4306 "Invalid chain type"); 4307 if (VT == SVT) 4308 return getStore(Chain, dl, Val, Ptr, MMO); 4309 4310 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4311 "Should only be a truncating store, not extending!"); 4312 assert(VT.isInteger() == SVT.isInteger() && 4313 "Can't do FP-INT conversion!"); 4314 assert(VT.isVector() == SVT.isVector() && 4315 "Cannot use trunc store to convert to or from a vector!"); 4316 assert((!VT.isVector() || 4317 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4318 "Cannot use trunc store to change the number of vector elements!"); 4319 4320 SDVTList VTs = getVTList(MVT::Other); 4321 SDValue Undef = getUNDEF(Ptr.getValueType()); 4322 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4323 FoldingSetNodeID ID; 4324 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4325 ID.AddInteger(SVT.getRawBits()); 4326 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4327 MMO->isNonTemporal())); 4328 void *IP = 0; 4329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4330 cast<StoreSDNode>(E)->refineAlignment(MMO); 4331 return SDValue(E, 0); 4332 } 4333 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4334 true, SVT, MMO); 4335 CSEMap.InsertNode(N, IP); 4336 AllNodes.push_back(N); 4337 return SDValue(N, 0); 4338} 4339 4340SDValue 4341SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4342 SDValue Offset, ISD::MemIndexedMode AM) { 4343 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4344 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4345 "Store is already a indexed store!"); 4346 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4347 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4348 FoldingSetNodeID ID; 4349 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4350 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4351 ID.AddInteger(ST->getRawSubclassData()); 4352 void *IP = 0; 4353 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4354 return SDValue(E, 0); 4355 4356 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4357 ST->isTruncatingStore(), 4358 ST->getMemoryVT(), 4359 ST->getMemOperand()); 4360 CSEMap.InsertNode(N, IP); 4361 AllNodes.push_back(N); 4362 return SDValue(N, 0); 4363} 4364 4365SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4366 SDValue Chain, SDValue Ptr, 4367 SDValue SV, 4368 unsigned Align) { 4369 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4370 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4371} 4372 4373SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4374 const SDUse *Ops, unsigned NumOps) { 4375 switch (NumOps) { 4376 case 0: return getNode(Opcode, DL, VT); 4377 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4378 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4379 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4380 default: break; 4381 } 4382 4383 // Copy from an SDUse array into an SDValue array for use with 4384 // the regular getNode logic. 4385 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4386 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4387} 4388 4389SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4390 const SDValue *Ops, unsigned NumOps) { 4391 switch (NumOps) { 4392 case 0: return getNode(Opcode, DL, VT); 4393 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4394 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4395 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4396 default: break; 4397 } 4398 4399 switch (Opcode) { 4400 default: break; 4401 case ISD::SELECT_CC: { 4402 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4403 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4404 "LHS and RHS of condition must have same type!"); 4405 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4406 "True and False arms of SelectCC must have same type!"); 4407 assert(Ops[2].getValueType() == VT && 4408 "select_cc node must be of same type as true and false value!"); 4409 break; 4410 } 4411 case ISD::BR_CC: { 4412 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4413 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4414 "LHS/RHS of comparison should match types!"); 4415 break; 4416 } 4417 } 4418 4419 // Memoize nodes. 4420 SDNode *N; 4421 SDVTList VTs = getVTList(VT); 4422 4423 if (VT != MVT::Glue) { 4424 FoldingSetNodeID ID; 4425 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4426 void *IP = 0; 4427 4428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4429 return SDValue(E, 0); 4430 4431 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4432 CSEMap.InsertNode(N, IP); 4433 } else { 4434 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4435 } 4436 4437 AllNodes.push_back(N); 4438#ifndef NDEBUG 4439 VerifySDNode(N); 4440#endif 4441 return SDValue(N, 0); 4442} 4443 4444SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4445 const std::vector<EVT> &ResultTys, 4446 const SDValue *Ops, unsigned NumOps) { 4447 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4448 Ops, NumOps); 4449} 4450 4451SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4452 const EVT *VTs, unsigned NumVTs, 4453 const SDValue *Ops, unsigned NumOps) { 4454 if (NumVTs == 1) 4455 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4456 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4457} 4458 4459SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4460 const SDValue *Ops, unsigned NumOps) { 4461 if (VTList.NumVTs == 1) 4462 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4463 4464#if 0 4465 switch (Opcode) { 4466 // FIXME: figure out how to safely handle things like 4467 // int foo(int x) { return 1 << (x & 255); } 4468 // int bar() { return foo(256); } 4469 case ISD::SRA_PARTS: 4470 case ISD::SRL_PARTS: 4471 case ISD::SHL_PARTS: 4472 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4473 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4474 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4475 else if (N3.getOpcode() == ISD::AND) 4476 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4477 // If the and is only masking out bits that cannot effect the shift, 4478 // eliminate the and. 4479 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4480 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4481 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4482 } 4483 break; 4484 } 4485#endif 4486 4487 // Memoize the node unless it returns a flag. 4488 SDNode *N; 4489 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4490 FoldingSetNodeID ID; 4491 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4492 void *IP = 0; 4493 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4494 return SDValue(E, 0); 4495 4496 if (NumOps == 1) { 4497 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4498 } else if (NumOps == 2) { 4499 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4500 } else if (NumOps == 3) { 4501 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4502 Ops[2]); 4503 } else { 4504 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4505 } 4506 CSEMap.InsertNode(N, IP); 4507 } else { 4508 if (NumOps == 1) { 4509 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4510 } else if (NumOps == 2) { 4511 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4512 } else if (NumOps == 3) { 4513 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4514 Ops[2]); 4515 } else { 4516 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4517 } 4518 } 4519 AllNodes.push_back(N); 4520#ifndef NDEBUG 4521 VerifySDNode(N); 4522#endif 4523 return SDValue(N, 0); 4524} 4525 4526SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4527 return getNode(Opcode, DL, VTList, 0, 0); 4528} 4529 4530SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4531 SDValue N1) { 4532 SDValue Ops[] = { N1 }; 4533 return getNode(Opcode, DL, VTList, Ops, 1); 4534} 4535 4536SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4537 SDValue N1, SDValue N2) { 4538 SDValue Ops[] = { N1, N2 }; 4539 return getNode(Opcode, DL, VTList, Ops, 2); 4540} 4541 4542SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4543 SDValue N1, SDValue N2, SDValue N3) { 4544 SDValue Ops[] = { N1, N2, N3 }; 4545 return getNode(Opcode, DL, VTList, Ops, 3); 4546} 4547 4548SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4549 SDValue N1, SDValue N2, SDValue N3, 4550 SDValue N4) { 4551 SDValue Ops[] = { N1, N2, N3, N4 }; 4552 return getNode(Opcode, DL, VTList, Ops, 4); 4553} 4554 4555SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4556 SDValue N1, SDValue N2, SDValue N3, 4557 SDValue N4, SDValue N5) { 4558 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4559 return getNode(Opcode, DL, VTList, Ops, 5); 4560} 4561 4562SDVTList SelectionDAG::getVTList(EVT VT) { 4563 return makeVTList(SDNode::getValueTypeList(VT), 1); 4564} 4565 4566SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4567 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4568 E = VTList.rend(); I != E; ++I) 4569 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4570 return *I; 4571 4572 EVT *Array = Allocator.Allocate<EVT>(2); 4573 Array[0] = VT1; 4574 Array[1] = VT2; 4575 SDVTList Result = makeVTList(Array, 2); 4576 VTList.push_back(Result); 4577 return Result; 4578} 4579 4580SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4581 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4582 E = VTList.rend(); I != E; ++I) 4583 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4584 I->VTs[2] == VT3) 4585 return *I; 4586 4587 EVT *Array = Allocator.Allocate<EVT>(3); 4588 Array[0] = VT1; 4589 Array[1] = VT2; 4590 Array[2] = VT3; 4591 SDVTList Result = makeVTList(Array, 3); 4592 VTList.push_back(Result); 4593 return Result; 4594} 4595 4596SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4597 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4598 E = VTList.rend(); I != E; ++I) 4599 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4600 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4601 return *I; 4602 4603 EVT *Array = Allocator.Allocate<EVT>(4); 4604 Array[0] = VT1; 4605 Array[1] = VT2; 4606 Array[2] = VT3; 4607 Array[3] = VT4; 4608 SDVTList Result = makeVTList(Array, 4); 4609 VTList.push_back(Result); 4610 return Result; 4611} 4612 4613SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4614 switch (NumVTs) { 4615 case 0: llvm_unreachable("Cannot have nodes without results!"); 4616 case 1: return getVTList(VTs[0]); 4617 case 2: return getVTList(VTs[0], VTs[1]); 4618 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4619 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4620 default: break; 4621 } 4622 4623 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4624 E = VTList.rend(); I != E; ++I) { 4625 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4626 continue; 4627 4628 bool NoMatch = false; 4629 for (unsigned i = 2; i != NumVTs; ++i) 4630 if (VTs[i] != I->VTs[i]) { 4631 NoMatch = true; 4632 break; 4633 } 4634 if (!NoMatch) 4635 return *I; 4636 } 4637 4638 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4639 std::copy(VTs, VTs+NumVTs, Array); 4640 SDVTList Result = makeVTList(Array, NumVTs); 4641 VTList.push_back(Result); 4642 return Result; 4643} 4644 4645 4646/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4647/// specified operands. If the resultant node already exists in the DAG, 4648/// this does not modify the specified node, instead it returns the node that 4649/// already exists. If the resultant node does not exist in the DAG, the 4650/// input node is returned. As a degenerate case, if you specify the same 4651/// input operands as the node already has, the input node is returned. 4652SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4653 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4654 4655 // Check to see if there is no change. 4656 if (Op == N->getOperand(0)) return N; 4657 4658 // See if the modified node already exists. 4659 void *InsertPos = 0; 4660 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4661 return Existing; 4662 4663 // Nope it doesn't. Remove the node from its current place in the maps. 4664 if (InsertPos) 4665 if (!RemoveNodeFromCSEMaps(N)) 4666 InsertPos = 0; 4667 4668 // Now we update the operands. 4669 N->OperandList[0].set(Op); 4670 4671 // If this gets put into a CSE map, add it. 4672 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4673 return N; 4674} 4675 4676SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4677 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4678 4679 // Check to see if there is no change. 4680 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4681 return N; // No operands changed, just return the input node. 4682 4683 // See if the modified node already exists. 4684 void *InsertPos = 0; 4685 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4686 return Existing; 4687 4688 // Nope it doesn't. Remove the node from its current place in the maps. 4689 if (InsertPos) 4690 if (!RemoveNodeFromCSEMaps(N)) 4691 InsertPos = 0; 4692 4693 // Now we update the operands. 4694 if (N->OperandList[0] != Op1) 4695 N->OperandList[0].set(Op1); 4696 if (N->OperandList[1] != Op2) 4697 N->OperandList[1].set(Op2); 4698 4699 // If this gets put into a CSE map, add it. 4700 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4701 return N; 4702} 4703 4704SDNode *SelectionDAG:: 4705UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4706 SDValue Ops[] = { Op1, Op2, Op3 }; 4707 return UpdateNodeOperands(N, Ops, 3); 4708} 4709 4710SDNode *SelectionDAG:: 4711UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4712 SDValue Op3, SDValue Op4) { 4713 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4714 return UpdateNodeOperands(N, Ops, 4); 4715} 4716 4717SDNode *SelectionDAG:: 4718UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4719 SDValue Op3, SDValue Op4, SDValue Op5) { 4720 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4721 return UpdateNodeOperands(N, Ops, 5); 4722} 4723 4724SDNode *SelectionDAG:: 4725UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4726 assert(N->getNumOperands() == NumOps && 4727 "Update with wrong number of operands"); 4728 4729 // Check to see if there is no change. 4730 bool AnyChange = false; 4731 for (unsigned i = 0; i != NumOps; ++i) { 4732 if (Ops[i] != N->getOperand(i)) { 4733 AnyChange = true; 4734 break; 4735 } 4736 } 4737 4738 // No operands changed, just return the input node. 4739 if (!AnyChange) return N; 4740 4741 // See if the modified node already exists. 4742 void *InsertPos = 0; 4743 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4744 return Existing; 4745 4746 // Nope it doesn't. Remove the node from its current place in the maps. 4747 if (InsertPos) 4748 if (!RemoveNodeFromCSEMaps(N)) 4749 InsertPos = 0; 4750 4751 // Now we update the operands. 4752 for (unsigned i = 0; i != NumOps; ++i) 4753 if (N->OperandList[i] != Ops[i]) 4754 N->OperandList[i].set(Ops[i]); 4755 4756 // If this gets put into a CSE map, add it. 4757 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4758 return N; 4759} 4760 4761/// DropOperands - Release the operands and set this node to have 4762/// zero operands. 4763void SDNode::DropOperands() { 4764 // Unlike the code in MorphNodeTo that does this, we don't need to 4765 // watch for dead nodes here. 4766 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4767 SDUse &Use = *I++; 4768 Use.set(SDValue()); 4769 } 4770} 4771 4772/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4773/// machine opcode. 4774/// 4775SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4776 EVT VT) { 4777 SDVTList VTs = getVTList(VT); 4778 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4779} 4780 4781SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4782 EVT VT, SDValue Op1) { 4783 SDVTList VTs = getVTList(VT); 4784 SDValue Ops[] = { Op1 }; 4785 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4786} 4787 4788SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4789 EVT VT, SDValue Op1, 4790 SDValue Op2) { 4791 SDVTList VTs = getVTList(VT); 4792 SDValue Ops[] = { Op1, Op2 }; 4793 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4794} 4795 4796SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4797 EVT VT, SDValue Op1, 4798 SDValue Op2, SDValue Op3) { 4799 SDVTList VTs = getVTList(VT); 4800 SDValue Ops[] = { Op1, Op2, Op3 }; 4801 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4802} 4803 4804SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4805 EVT VT, const SDValue *Ops, 4806 unsigned NumOps) { 4807 SDVTList VTs = getVTList(VT); 4808 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4809} 4810 4811SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4812 EVT VT1, EVT VT2, const SDValue *Ops, 4813 unsigned NumOps) { 4814 SDVTList VTs = getVTList(VT1, VT2); 4815 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4816} 4817 4818SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4819 EVT VT1, EVT VT2) { 4820 SDVTList VTs = getVTList(VT1, VT2); 4821 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4822} 4823 4824SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4825 EVT VT1, EVT VT2, EVT VT3, 4826 const SDValue *Ops, unsigned NumOps) { 4827 SDVTList VTs = getVTList(VT1, VT2, VT3); 4828 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4829} 4830 4831SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4832 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4833 const SDValue *Ops, unsigned NumOps) { 4834 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4835 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4836} 4837 4838SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4839 EVT VT1, EVT VT2, 4840 SDValue Op1) { 4841 SDVTList VTs = getVTList(VT1, VT2); 4842 SDValue Ops[] = { Op1 }; 4843 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4844} 4845 4846SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4847 EVT VT1, EVT VT2, 4848 SDValue Op1, SDValue Op2) { 4849 SDVTList VTs = getVTList(VT1, VT2); 4850 SDValue Ops[] = { Op1, Op2 }; 4851 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4852} 4853 4854SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4855 EVT VT1, EVT VT2, 4856 SDValue Op1, SDValue Op2, 4857 SDValue Op3) { 4858 SDVTList VTs = getVTList(VT1, VT2); 4859 SDValue Ops[] = { Op1, Op2, Op3 }; 4860 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4861} 4862 4863SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4864 EVT VT1, EVT VT2, EVT VT3, 4865 SDValue Op1, SDValue Op2, 4866 SDValue Op3) { 4867 SDVTList VTs = getVTList(VT1, VT2, VT3); 4868 SDValue Ops[] = { Op1, Op2, Op3 }; 4869 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4870} 4871 4872SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4873 SDVTList VTs, const SDValue *Ops, 4874 unsigned NumOps) { 4875 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4876 // Reset the NodeID to -1. 4877 N->setNodeId(-1); 4878 return N; 4879} 4880 4881/// MorphNodeTo - This *mutates* the specified node to have the specified 4882/// return type, opcode, and operands. 4883/// 4884/// Note that MorphNodeTo returns the resultant node. If there is already a 4885/// node of the specified opcode and operands, it returns that node instead of 4886/// the current one. Note that the DebugLoc need not be the same. 4887/// 4888/// Using MorphNodeTo is faster than creating a new node and swapping it in 4889/// with ReplaceAllUsesWith both because it often avoids allocating a new 4890/// node, and because it doesn't require CSE recalculation for any of 4891/// the node's users. 4892/// 4893SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4894 SDVTList VTs, const SDValue *Ops, 4895 unsigned NumOps) { 4896 // If an identical node already exists, use it. 4897 void *IP = 0; 4898 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4899 FoldingSetNodeID ID; 4900 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4901 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4902 return ON; 4903 } 4904 4905 if (!RemoveNodeFromCSEMaps(N)) 4906 IP = 0; 4907 4908 // Start the morphing. 4909 N->NodeType = Opc; 4910 N->ValueList = VTs.VTs; 4911 N->NumValues = VTs.NumVTs; 4912 4913 // Clear the operands list, updating used nodes to remove this from their 4914 // use list. Keep track of any operands that become dead as a result. 4915 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4916 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4917 SDUse &Use = *I++; 4918 SDNode *Used = Use.getNode(); 4919 Use.set(SDValue()); 4920 if (Used->use_empty()) 4921 DeadNodeSet.insert(Used); 4922 } 4923 4924 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4925 // Initialize the memory references information. 4926 MN->setMemRefs(0, 0); 4927 // If NumOps is larger than the # of operands we can have in a 4928 // MachineSDNode, reallocate the operand list. 4929 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4930 if (MN->OperandsNeedDelete) 4931 delete[] MN->OperandList; 4932 if (NumOps > array_lengthof(MN->LocalOperands)) 4933 // We're creating a final node that will live unmorphed for the 4934 // remainder of the current SelectionDAG iteration, so we can allocate 4935 // the operands directly out of a pool with no recycling metadata. 4936 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4937 Ops, NumOps); 4938 else 4939 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4940 MN->OperandsNeedDelete = false; 4941 } else 4942 MN->InitOperands(MN->OperandList, Ops, NumOps); 4943 } else { 4944 // If NumOps is larger than the # of operands we currently have, reallocate 4945 // the operand list. 4946 if (NumOps > N->NumOperands) { 4947 if (N->OperandsNeedDelete) 4948 delete[] N->OperandList; 4949 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4950 N->OperandsNeedDelete = true; 4951 } else 4952 N->InitOperands(N->OperandList, Ops, NumOps); 4953 } 4954 4955 // Delete any nodes that are still dead after adding the uses for the 4956 // new operands. 4957 if (!DeadNodeSet.empty()) { 4958 SmallVector<SDNode *, 16> DeadNodes; 4959 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4960 E = DeadNodeSet.end(); I != E; ++I) 4961 if ((*I)->use_empty()) 4962 DeadNodes.push_back(*I); 4963 RemoveDeadNodes(DeadNodes); 4964 } 4965 4966 if (IP) 4967 CSEMap.InsertNode(N, IP); // Memoize the new node. 4968 return N; 4969} 4970 4971 4972/// getMachineNode - These are used for target selectors to create a new node 4973/// with specified return type(s), MachineInstr opcode, and operands. 4974/// 4975/// Note that getMachineNode returns the resultant node. If there is already a 4976/// node of the specified opcode and operands, it returns that node instead of 4977/// the current one. 4978MachineSDNode * 4979SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4980 SDVTList VTs = getVTList(VT); 4981 return getMachineNode(Opcode, dl, VTs, 0, 0); 4982} 4983 4984MachineSDNode * 4985SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4986 SDVTList VTs = getVTList(VT); 4987 SDValue Ops[] = { Op1 }; 4988 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4989} 4990 4991MachineSDNode * 4992SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4993 SDValue Op1, SDValue Op2) { 4994 SDVTList VTs = getVTList(VT); 4995 SDValue Ops[] = { Op1, Op2 }; 4996 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4997} 4998 4999MachineSDNode * 5000SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5001 SDValue Op1, SDValue Op2, SDValue Op3) { 5002 SDVTList VTs = getVTList(VT); 5003 SDValue Ops[] = { Op1, Op2, Op3 }; 5004 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5005} 5006 5007MachineSDNode * 5008SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5009 const SDValue *Ops, unsigned NumOps) { 5010 SDVTList VTs = getVTList(VT); 5011 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5012} 5013 5014MachineSDNode * 5015SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5016 SDVTList VTs = getVTList(VT1, VT2); 5017 return getMachineNode(Opcode, dl, VTs, 0, 0); 5018} 5019 5020MachineSDNode * 5021SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5022 EVT VT1, EVT VT2, SDValue Op1) { 5023 SDVTList VTs = getVTList(VT1, VT2); 5024 SDValue Ops[] = { Op1 }; 5025 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5026} 5027 5028MachineSDNode * 5029SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5030 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5031 SDVTList VTs = getVTList(VT1, VT2); 5032 SDValue Ops[] = { Op1, Op2 }; 5033 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5034} 5035 5036MachineSDNode * 5037SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5038 EVT VT1, EVT VT2, SDValue Op1, 5039 SDValue Op2, SDValue Op3) { 5040 SDVTList VTs = getVTList(VT1, VT2); 5041 SDValue Ops[] = { Op1, Op2, Op3 }; 5042 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5043} 5044 5045MachineSDNode * 5046SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5047 EVT VT1, EVT VT2, 5048 const SDValue *Ops, unsigned NumOps) { 5049 SDVTList VTs = getVTList(VT1, VT2); 5050 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5051} 5052 5053MachineSDNode * 5054SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5055 EVT VT1, EVT VT2, EVT VT3, 5056 SDValue Op1, SDValue Op2) { 5057 SDVTList VTs = getVTList(VT1, VT2, VT3); 5058 SDValue Ops[] = { Op1, Op2 }; 5059 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5060} 5061 5062MachineSDNode * 5063SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5064 EVT VT1, EVT VT2, EVT VT3, 5065 SDValue Op1, SDValue Op2, SDValue Op3) { 5066 SDVTList VTs = getVTList(VT1, VT2, VT3); 5067 SDValue Ops[] = { Op1, Op2, Op3 }; 5068 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5069} 5070 5071MachineSDNode * 5072SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5073 EVT VT1, EVT VT2, EVT VT3, 5074 const SDValue *Ops, unsigned NumOps) { 5075 SDVTList VTs = getVTList(VT1, VT2, VT3); 5076 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5077} 5078 5079MachineSDNode * 5080SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5081 EVT VT2, EVT VT3, EVT VT4, 5082 const SDValue *Ops, unsigned NumOps) { 5083 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5084 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5085} 5086 5087MachineSDNode * 5088SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5089 const std::vector<EVT> &ResultTys, 5090 const SDValue *Ops, unsigned NumOps) { 5091 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5092 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5093} 5094 5095MachineSDNode * 5096SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5097 const SDValue *Ops, unsigned NumOps) { 5098 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5099 MachineSDNode *N; 5100 void *IP = 0; 5101 5102 if (DoCSE) { 5103 FoldingSetNodeID ID; 5104 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5105 IP = 0; 5106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5107 return cast<MachineSDNode>(E); 5108 } 5109 5110 // Allocate a new MachineSDNode. 5111 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5112 5113 // Initialize the operands list. 5114 if (NumOps > array_lengthof(N->LocalOperands)) 5115 // We're creating a final node that will live unmorphed for the 5116 // remainder of the current SelectionDAG iteration, so we can allocate 5117 // the operands directly out of a pool with no recycling metadata. 5118 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5119 Ops, NumOps); 5120 else 5121 N->InitOperands(N->LocalOperands, Ops, NumOps); 5122 N->OperandsNeedDelete = false; 5123 5124 if (DoCSE) 5125 CSEMap.InsertNode(N, IP); 5126 5127 AllNodes.push_back(N); 5128#ifndef NDEBUG 5129 VerifyMachineNode(N); 5130#endif 5131 return N; 5132} 5133 5134/// getTargetExtractSubreg - A convenience function for creating 5135/// TargetOpcode::EXTRACT_SUBREG nodes. 5136SDValue 5137SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5138 SDValue Operand) { 5139 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5140 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5141 VT, Operand, SRIdxVal); 5142 return SDValue(Subreg, 0); 5143} 5144 5145/// getTargetInsertSubreg - A convenience function for creating 5146/// TargetOpcode::INSERT_SUBREG nodes. 5147SDValue 5148SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5149 SDValue Operand, SDValue Subreg) { 5150 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5151 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5152 VT, Operand, Subreg, SRIdxVal); 5153 return SDValue(Result, 0); 5154} 5155 5156/// getNodeIfExists - Get the specified node if it's already available, or 5157/// else return NULL. 5158SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5159 const SDValue *Ops, unsigned NumOps) { 5160 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5161 FoldingSetNodeID ID; 5162 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5163 void *IP = 0; 5164 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5165 return E; 5166 } 5167 return NULL; 5168} 5169 5170/// getDbgValue - Creates a SDDbgValue node. 5171/// 5172SDDbgValue * 5173SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5174 DebugLoc DL, unsigned O) { 5175 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5176} 5177 5178SDDbgValue * 5179SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5180 DebugLoc DL, unsigned O) { 5181 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5182} 5183 5184SDDbgValue * 5185SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5186 DebugLoc DL, unsigned O) { 5187 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5188} 5189 5190namespace { 5191 5192/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5193/// pointed to by a use iterator is deleted, increment the use iterator 5194/// so that it doesn't dangle. 5195/// 5196/// This class also manages a "downlink" DAGUpdateListener, to forward 5197/// messages to ReplaceAllUsesWith's callers. 5198/// 5199class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5200 SelectionDAG::DAGUpdateListener *DownLink; 5201 SDNode::use_iterator &UI; 5202 SDNode::use_iterator &UE; 5203 5204 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5205 // Increment the iterator as needed. 5206 while (UI != UE && N == *UI) 5207 ++UI; 5208 5209 // Then forward the message. 5210 if (DownLink) DownLink->NodeDeleted(N, E); 5211 } 5212 5213 virtual void NodeUpdated(SDNode *N) { 5214 // Just forward the message. 5215 if (DownLink) DownLink->NodeUpdated(N); 5216 } 5217 5218public: 5219 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5220 SDNode::use_iterator &ui, 5221 SDNode::use_iterator &ue) 5222 : DownLink(dl), UI(ui), UE(ue) {} 5223}; 5224 5225} 5226 5227/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5228/// This can cause recursive merging of nodes in the DAG. 5229/// 5230/// This version assumes From has a single result value. 5231/// 5232void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5233 DAGUpdateListener *UpdateListener) { 5234 SDNode *From = FromN.getNode(); 5235 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5236 "Cannot replace with this method!"); 5237 assert(From != To.getNode() && "Cannot replace uses of with self"); 5238 5239 // Iterate over all the existing uses of From. New uses will be added 5240 // to the beginning of the use list, which we avoid visiting. 5241 // This specifically avoids visiting uses of From that arise while the 5242 // replacement is happening, because any such uses would be the result 5243 // of CSE: If an existing node looks like From after one of its operands 5244 // is replaced by To, we don't want to replace of all its users with To 5245 // too. See PR3018 for more info. 5246 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5247 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5248 while (UI != UE) { 5249 SDNode *User = *UI; 5250 5251 // This node is about to morph, remove its old self from the CSE maps. 5252 RemoveNodeFromCSEMaps(User); 5253 5254 // A user can appear in a use list multiple times, and when this 5255 // happens the uses are usually next to each other in the list. 5256 // To help reduce the number of CSE recomputations, process all 5257 // the uses of this user that we can find this way. 5258 do { 5259 SDUse &Use = UI.getUse(); 5260 ++UI; 5261 Use.set(To); 5262 } while (UI != UE && *UI == User); 5263 5264 // Now that we have modified User, add it back to the CSE maps. If it 5265 // already exists there, recursively merge the results together. 5266 AddModifiedNodeToCSEMaps(User, &Listener); 5267 } 5268} 5269 5270/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5271/// This can cause recursive merging of nodes in the DAG. 5272/// 5273/// This version assumes that for each value of From, there is a 5274/// corresponding value in To in the same position with the same type. 5275/// 5276void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5277 DAGUpdateListener *UpdateListener) { 5278#ifndef NDEBUG 5279 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5280 assert((!From->hasAnyUseOfValue(i) || 5281 From->getValueType(i) == To->getValueType(i)) && 5282 "Cannot use this version of ReplaceAllUsesWith!"); 5283#endif 5284 5285 // Handle the trivial case. 5286 if (From == To) 5287 return; 5288 5289 // Iterate over just the existing users of From. See the comments in 5290 // the ReplaceAllUsesWith above. 5291 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5292 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5293 while (UI != UE) { 5294 SDNode *User = *UI; 5295 5296 // This node is about to morph, remove its old self from the CSE maps. 5297 RemoveNodeFromCSEMaps(User); 5298 5299 // A user can appear in a use list multiple times, and when this 5300 // happens the uses are usually next to each other in the list. 5301 // To help reduce the number of CSE recomputations, process all 5302 // the uses of this user that we can find this way. 5303 do { 5304 SDUse &Use = UI.getUse(); 5305 ++UI; 5306 Use.setNode(To); 5307 } while (UI != UE && *UI == User); 5308 5309 // Now that we have modified User, add it back to the CSE maps. If it 5310 // already exists there, recursively merge the results together. 5311 AddModifiedNodeToCSEMaps(User, &Listener); 5312 } 5313} 5314 5315/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5316/// This can cause recursive merging of nodes in the DAG. 5317/// 5318/// This version can replace From with any result values. To must match the 5319/// number and types of values returned by From. 5320void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5321 const SDValue *To, 5322 DAGUpdateListener *UpdateListener) { 5323 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5324 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5325 5326 // Iterate over just the existing users of From. See the comments in 5327 // the ReplaceAllUsesWith above. 5328 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5329 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5330 while (UI != UE) { 5331 SDNode *User = *UI; 5332 5333 // This node is about to morph, remove its old self from the CSE maps. 5334 RemoveNodeFromCSEMaps(User); 5335 5336 // A user can appear in a use list multiple times, and when this 5337 // happens the uses are usually next to each other in the list. 5338 // To help reduce the number of CSE recomputations, process all 5339 // the uses of this user that we can find this way. 5340 do { 5341 SDUse &Use = UI.getUse(); 5342 const SDValue &ToOp = To[Use.getResNo()]; 5343 ++UI; 5344 Use.set(ToOp); 5345 } while (UI != UE && *UI == User); 5346 5347 // Now that we have modified User, add it back to the CSE maps. If it 5348 // already exists there, recursively merge the results together. 5349 AddModifiedNodeToCSEMaps(User, &Listener); 5350 } 5351} 5352 5353/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5354/// uses of other values produced by From.getNode() alone. The Deleted 5355/// vector is handled the same way as for ReplaceAllUsesWith. 5356void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5357 DAGUpdateListener *UpdateListener){ 5358 // Handle the really simple, really trivial case efficiently. 5359 if (From == To) return; 5360 5361 // Handle the simple, trivial, case efficiently. 5362 if (From.getNode()->getNumValues() == 1) { 5363 ReplaceAllUsesWith(From, To, UpdateListener); 5364 return; 5365 } 5366 5367 // Iterate over just the existing users of From. See the comments in 5368 // the ReplaceAllUsesWith above. 5369 SDNode::use_iterator UI = From.getNode()->use_begin(), 5370 UE = From.getNode()->use_end(); 5371 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5372 while (UI != UE) { 5373 SDNode *User = *UI; 5374 bool UserRemovedFromCSEMaps = false; 5375 5376 // A user can appear in a use list multiple times, and when this 5377 // happens the uses are usually next to each other in the list. 5378 // To help reduce the number of CSE recomputations, process all 5379 // the uses of this user that we can find this way. 5380 do { 5381 SDUse &Use = UI.getUse(); 5382 5383 // Skip uses of different values from the same node. 5384 if (Use.getResNo() != From.getResNo()) { 5385 ++UI; 5386 continue; 5387 } 5388 5389 // If this node hasn't been modified yet, it's still in the CSE maps, 5390 // so remove its old self from the CSE maps. 5391 if (!UserRemovedFromCSEMaps) { 5392 RemoveNodeFromCSEMaps(User); 5393 UserRemovedFromCSEMaps = true; 5394 } 5395 5396 ++UI; 5397 Use.set(To); 5398 } while (UI != UE && *UI == User); 5399 5400 // We are iterating over all uses of the From node, so if a use 5401 // doesn't use the specific value, no changes are made. 5402 if (!UserRemovedFromCSEMaps) 5403 continue; 5404 5405 // Now that we have modified User, add it back to the CSE maps. If it 5406 // already exists there, recursively merge the results together. 5407 AddModifiedNodeToCSEMaps(User, &Listener); 5408 } 5409} 5410 5411namespace { 5412 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5413 /// to record information about a use. 5414 struct UseMemo { 5415 SDNode *User; 5416 unsigned Index; 5417 SDUse *Use; 5418 }; 5419 5420 /// operator< - Sort Memos by User. 5421 bool operator<(const UseMemo &L, const UseMemo &R) { 5422 return (intptr_t)L.User < (intptr_t)R.User; 5423 } 5424} 5425 5426/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5427/// uses of other values produced by From.getNode() alone. The same value 5428/// may appear in both the From and To list. The Deleted vector is 5429/// handled the same way as for ReplaceAllUsesWith. 5430void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5431 const SDValue *To, 5432 unsigned Num, 5433 DAGUpdateListener *UpdateListener){ 5434 // Handle the simple, trivial case efficiently. 5435 if (Num == 1) 5436 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5437 5438 // Read up all the uses and make records of them. This helps 5439 // processing new uses that are introduced during the 5440 // replacement process. 5441 SmallVector<UseMemo, 4> Uses; 5442 for (unsigned i = 0; i != Num; ++i) { 5443 unsigned FromResNo = From[i].getResNo(); 5444 SDNode *FromNode = From[i].getNode(); 5445 for (SDNode::use_iterator UI = FromNode->use_begin(), 5446 E = FromNode->use_end(); UI != E; ++UI) { 5447 SDUse &Use = UI.getUse(); 5448 if (Use.getResNo() == FromResNo) { 5449 UseMemo Memo = { *UI, i, &Use }; 5450 Uses.push_back(Memo); 5451 } 5452 } 5453 } 5454 5455 // Sort the uses, so that all the uses from a given User are together. 5456 std::sort(Uses.begin(), Uses.end()); 5457 5458 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5459 UseIndex != UseIndexEnd; ) { 5460 // We know that this user uses some value of From. If it is the right 5461 // value, update it. 5462 SDNode *User = Uses[UseIndex].User; 5463 5464 // This node is about to morph, remove its old self from the CSE maps. 5465 RemoveNodeFromCSEMaps(User); 5466 5467 // The Uses array is sorted, so all the uses for a given User 5468 // are next to each other in the list. 5469 // To help reduce the number of CSE recomputations, process all 5470 // the uses of this user that we can find this way. 5471 do { 5472 unsigned i = Uses[UseIndex].Index; 5473 SDUse &Use = *Uses[UseIndex].Use; 5474 ++UseIndex; 5475 5476 Use.set(To[i]); 5477 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5478 5479 // Now that we have modified User, add it back to the CSE maps. If it 5480 // already exists there, recursively merge the results together. 5481 AddModifiedNodeToCSEMaps(User, UpdateListener); 5482 } 5483} 5484 5485/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5486/// based on their topological order. It returns the maximum id and a vector 5487/// of the SDNodes* in assigned order by reference. 5488unsigned SelectionDAG::AssignTopologicalOrder() { 5489 5490 unsigned DAGSize = 0; 5491 5492 // SortedPos tracks the progress of the algorithm. Nodes before it are 5493 // sorted, nodes after it are unsorted. When the algorithm completes 5494 // it is at the end of the list. 5495 allnodes_iterator SortedPos = allnodes_begin(); 5496 5497 // Visit all the nodes. Move nodes with no operands to the front of 5498 // the list immediately. Annotate nodes that do have operands with their 5499 // operand count. Before we do this, the Node Id fields of the nodes 5500 // may contain arbitrary values. After, the Node Id fields for nodes 5501 // before SortedPos will contain the topological sort index, and the 5502 // Node Id fields for nodes At SortedPos and after will contain the 5503 // count of outstanding operands. 5504 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5505 SDNode *N = I++; 5506 checkForCycles(N); 5507 unsigned Degree = N->getNumOperands(); 5508 if (Degree == 0) { 5509 // A node with no uses, add it to the result array immediately. 5510 N->setNodeId(DAGSize++); 5511 allnodes_iterator Q = N; 5512 if (Q != SortedPos) 5513 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5514 assert(SortedPos != AllNodes.end() && "Overran node list"); 5515 ++SortedPos; 5516 } else { 5517 // Temporarily use the Node Id as scratch space for the degree count. 5518 N->setNodeId(Degree); 5519 } 5520 } 5521 5522 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5523 // such that by the time the end is reached all nodes will be sorted. 5524 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5525 SDNode *N = I; 5526 checkForCycles(N); 5527 // N is in sorted position, so all its uses have one less operand 5528 // that needs to be sorted. 5529 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5530 UI != UE; ++UI) { 5531 SDNode *P = *UI; 5532 unsigned Degree = P->getNodeId(); 5533 assert(Degree != 0 && "Invalid node degree"); 5534 --Degree; 5535 if (Degree == 0) { 5536 // All of P's operands are sorted, so P may sorted now. 5537 P->setNodeId(DAGSize++); 5538 if (P != SortedPos) 5539 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5540 assert(SortedPos != AllNodes.end() && "Overran node list"); 5541 ++SortedPos; 5542 } else { 5543 // Update P's outstanding operand count. 5544 P->setNodeId(Degree); 5545 } 5546 } 5547 if (I == SortedPos) { 5548#ifndef NDEBUG 5549 SDNode *S = ++I; 5550 dbgs() << "Overran sorted position:\n"; 5551 S->dumprFull(); 5552#endif 5553 llvm_unreachable(0); 5554 } 5555 } 5556 5557 assert(SortedPos == AllNodes.end() && 5558 "Topological sort incomplete!"); 5559 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5560 "First node in topological sort is not the entry token!"); 5561 assert(AllNodes.front().getNodeId() == 0 && 5562 "First node in topological sort has non-zero id!"); 5563 assert(AllNodes.front().getNumOperands() == 0 && 5564 "First node in topological sort has operands!"); 5565 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5566 "Last node in topologic sort has unexpected id!"); 5567 assert(AllNodes.back().use_empty() && 5568 "Last node in topologic sort has users!"); 5569 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5570 return DAGSize; 5571} 5572 5573/// AssignOrdering - Assign an order to the SDNode. 5574void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5575 assert(SD && "Trying to assign an order to a null node!"); 5576 Ordering->add(SD, Order); 5577} 5578 5579/// GetOrdering - Get the order for the SDNode. 5580unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5581 assert(SD && "Trying to get the order of a null node!"); 5582 return Ordering->getOrder(SD); 5583} 5584 5585/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5586/// value is produced by SD. 5587void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5588 DbgInfo->add(DB, SD, isParameter); 5589 if (SD) 5590 SD->setHasDebugValue(true); 5591} 5592 5593/// TransferDbgValues - Transfer SDDbgValues. 5594void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5595 if (From == To || !From.getNode()->getHasDebugValue()) 5596 return; 5597 SDNode *FromNode = From.getNode(); 5598 SDNode *ToNode = To.getNode(); 5599 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5600 SmallVector<SDDbgValue *, 2> ClonedDVs; 5601 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5602 I != E; ++I) { 5603 SDDbgValue *Dbg = *I; 5604 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5605 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5606 Dbg->getOffset(), Dbg->getDebugLoc(), 5607 Dbg->getOrder()); 5608 ClonedDVs.push_back(Clone); 5609 } 5610 } 5611 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5612 E = ClonedDVs.end(); I != E; ++I) 5613 AddDbgValue(*I, ToNode, false); 5614} 5615 5616//===----------------------------------------------------------------------===// 5617// SDNode Class 5618//===----------------------------------------------------------------------===// 5619 5620HandleSDNode::~HandleSDNode() { 5621 DropOperands(); 5622} 5623 5624GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5625 const GlobalValue *GA, 5626 EVT VT, int64_t o, unsigned char TF) 5627 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5628 TheGlobal = GA; 5629} 5630 5631MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5632 MachineMemOperand *mmo) 5633 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5634 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5635 MMO->isNonTemporal()); 5636 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5637 assert(isNonTemporal() == MMO->isNonTemporal() && 5638 "Non-temporal encoding error!"); 5639 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5640} 5641 5642MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5643 const SDValue *Ops, unsigned NumOps, EVT memvt, 5644 MachineMemOperand *mmo) 5645 : SDNode(Opc, dl, VTs, Ops, NumOps), 5646 MemoryVT(memvt), MMO(mmo) { 5647 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5648 MMO->isNonTemporal()); 5649 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5650 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5651} 5652 5653/// Profile - Gather unique data for the node. 5654/// 5655void SDNode::Profile(FoldingSetNodeID &ID) const { 5656 AddNodeIDNode(ID, this); 5657} 5658 5659namespace { 5660 struct EVTArray { 5661 std::vector<EVT> VTs; 5662 5663 EVTArray() { 5664 VTs.reserve(MVT::LAST_VALUETYPE); 5665 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5666 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5667 } 5668 }; 5669} 5670 5671static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5672static ManagedStatic<EVTArray> SimpleVTArray; 5673static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5674 5675/// getValueTypeList - Return a pointer to the specified value type. 5676/// 5677const EVT *SDNode::getValueTypeList(EVT VT) { 5678 if (VT.isExtended()) { 5679 sys::SmartScopedLock<true> Lock(*VTMutex); 5680 return &(*EVTs->insert(VT).first); 5681 } else { 5682 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5683 "Value type out of range!"); 5684 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5685 } 5686} 5687 5688/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5689/// indicated value. This method ignores uses of other values defined by this 5690/// operation. 5691bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5692 assert(Value < getNumValues() && "Bad value!"); 5693 5694 // TODO: Only iterate over uses of a given value of the node 5695 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5696 if (UI.getUse().getResNo() == Value) { 5697 if (NUses == 0) 5698 return false; 5699 --NUses; 5700 } 5701 } 5702 5703 // Found exactly the right number of uses? 5704 return NUses == 0; 5705} 5706 5707 5708/// hasAnyUseOfValue - Return true if there are any use of the indicated 5709/// value. This method ignores uses of other values defined by this operation. 5710bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5711 assert(Value < getNumValues() && "Bad value!"); 5712 5713 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5714 if (UI.getUse().getResNo() == Value) 5715 return true; 5716 5717 return false; 5718} 5719 5720 5721/// isOnlyUserOf - Return true if this node is the only use of N. 5722/// 5723bool SDNode::isOnlyUserOf(SDNode *N) const { 5724 bool Seen = false; 5725 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5726 SDNode *User = *I; 5727 if (User == this) 5728 Seen = true; 5729 else 5730 return false; 5731 } 5732 5733 return Seen; 5734} 5735 5736/// isOperand - Return true if this node is an operand of N. 5737/// 5738bool SDValue::isOperandOf(SDNode *N) const { 5739 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5740 if (*this == N->getOperand(i)) 5741 return true; 5742 return false; 5743} 5744 5745bool SDNode::isOperandOf(SDNode *N) const { 5746 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5747 if (this == N->OperandList[i].getNode()) 5748 return true; 5749 return false; 5750} 5751 5752/// reachesChainWithoutSideEffects - Return true if this operand (which must 5753/// be a chain) reaches the specified operand without crossing any 5754/// side-effecting instructions on any chain path. In practice, this looks 5755/// through token factors and non-volatile loads. In order to remain efficient, 5756/// this only looks a couple of nodes in, it does not do an exhaustive search. 5757bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5758 unsigned Depth) const { 5759 if (*this == Dest) return true; 5760 5761 // Don't search too deeply, we just want to be able to see through 5762 // TokenFactor's etc. 5763 if (Depth == 0) return false; 5764 5765 // If this is a token factor, all inputs to the TF happen in parallel. If any 5766 // of the operands of the TF does not reach dest, then we cannot do the xform. 5767 if (getOpcode() == ISD::TokenFactor) { 5768 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5769 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5770 return false; 5771 return true; 5772 } 5773 5774 // Loads don't have side effects, look through them. 5775 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5776 if (!Ld->isVolatile()) 5777 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5778 } 5779 return false; 5780} 5781 5782/// hasPredecessor - Return true if N is a predecessor of this node. 5783/// N is either an operand of this node, or can be reached by recursively 5784/// traversing up the operands. 5785/// NOTE: This is an expensive method. Use it carefully. 5786bool SDNode::hasPredecessor(const SDNode *N) const { 5787 SmallPtrSet<const SDNode *, 32> Visited; 5788 SmallVector<const SDNode *, 16> Worklist; 5789 return hasPredecessorHelper(N, Visited, Worklist); 5790} 5791 5792bool SDNode::hasPredecessorHelper(const SDNode *N, 5793 SmallPtrSet<const SDNode *, 32> &Visited, 5794 SmallVector<const SDNode *, 16> &Worklist) const { 5795 if (Visited.empty()) { 5796 Worklist.push_back(this); 5797 } else { 5798 // Take a look in the visited set. If we've already encountered this node 5799 // we needn't search further. 5800 if (Visited.count(N)) 5801 return true; 5802 } 5803 5804 // Haven't visited N yet. Continue the search. 5805 while (!Worklist.empty()) { 5806 const SDNode *M = Worklist.pop_back_val(); 5807 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5808 SDNode *Op = M->getOperand(i).getNode(); 5809 if (Visited.insert(Op)) 5810 Worklist.push_back(Op); 5811 if (Op == N) 5812 return true; 5813 } 5814 } 5815 5816 return false; 5817} 5818 5819uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5820 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5821 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5822} 5823 5824std::string SDNode::getOperationName(const SelectionDAG *G) const { 5825 switch (getOpcode()) { 5826 default: 5827 if (getOpcode() < ISD::BUILTIN_OP_END) 5828 return "<<Unknown DAG Node>>"; 5829 if (isMachineOpcode()) { 5830 if (G) 5831 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5832 if (getMachineOpcode() < TII->getNumOpcodes()) 5833 return TII->get(getMachineOpcode()).getName(); 5834 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5835 } 5836 if (G) { 5837 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5838 const char *Name = TLI.getTargetNodeName(getOpcode()); 5839 if (Name) return Name; 5840 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5841 } 5842 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5843 5844#ifndef NDEBUG 5845 case ISD::DELETED_NODE: 5846 return "<<Deleted Node!>>"; 5847#endif 5848 case ISD::PREFETCH: return "Prefetch"; 5849 case ISD::MEMBARRIER: return "MemBarrier"; 5850 case ISD::ATOMIC_FENCE: return "AtomicFence"; 5851 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5852 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5853 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5854 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5855 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5856 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5857 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5858 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5859 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5860 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5861 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5862 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5863 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 5864 case ISD::ATOMIC_STORE: return "AtomicStore"; 5865 case ISD::PCMARKER: return "PCMarker"; 5866 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5867 case ISD::SRCVALUE: return "SrcValue"; 5868 case ISD::MDNODE_SDNODE: return "MDNode"; 5869 case ISD::EntryToken: return "EntryToken"; 5870 case ISD::TokenFactor: return "TokenFactor"; 5871 case ISD::AssertSext: return "AssertSext"; 5872 case ISD::AssertZext: return "AssertZext"; 5873 5874 case ISD::BasicBlock: return "BasicBlock"; 5875 case ISD::VALUETYPE: return "ValueType"; 5876 case ISD::Register: return "Register"; 5877 5878 case ISD::Constant: return "Constant"; 5879 case ISD::ConstantFP: return "ConstantFP"; 5880 case ISD::GlobalAddress: return "GlobalAddress"; 5881 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5882 case ISD::FrameIndex: return "FrameIndex"; 5883 case ISD::JumpTable: return "JumpTable"; 5884 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5885 case ISD::RETURNADDR: return "RETURNADDR"; 5886 case ISD::FRAMEADDR: return "FRAMEADDR"; 5887 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5888 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5889 case ISD::LSDAADDR: return "LSDAADDR"; 5890 case ISD::EHSELECTION: return "EHSELECTION"; 5891 case ISD::EH_RETURN: return "EH_RETURN"; 5892 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5893 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5894 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP"; 5895 case ISD::ConstantPool: return "ConstantPool"; 5896 case ISD::ExternalSymbol: return "ExternalSymbol"; 5897 case ISD::BlockAddress: return "BlockAddress"; 5898 case ISD::INTRINSIC_WO_CHAIN: 5899 case ISD::INTRINSIC_VOID: 5900 case ISD::INTRINSIC_W_CHAIN: { 5901 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5902 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5903 if (IID < Intrinsic::num_intrinsics) 5904 return Intrinsic::getName((Intrinsic::ID)IID); 5905 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5906 return TII->getName(IID); 5907 llvm_unreachable("Invalid intrinsic ID"); 5908 } 5909 5910 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5911 case ISD::TargetConstant: return "TargetConstant"; 5912 case ISD::TargetConstantFP:return "TargetConstantFP"; 5913 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5914 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5915 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5916 case ISD::TargetJumpTable: return "TargetJumpTable"; 5917 case ISD::TargetConstantPool: return "TargetConstantPool"; 5918 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5919 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5920 5921 case ISD::CopyToReg: return "CopyToReg"; 5922 case ISD::CopyFromReg: return "CopyFromReg"; 5923 case ISD::UNDEF: return "undef"; 5924 case ISD::MERGE_VALUES: return "merge_values"; 5925 case ISD::INLINEASM: return "inlineasm"; 5926 case ISD::EH_LABEL: return "eh_label"; 5927 case ISD::HANDLENODE: return "handlenode"; 5928 5929 // Unary operators 5930 case ISD::FABS: return "fabs"; 5931 case ISD::FNEG: return "fneg"; 5932 case ISD::FSQRT: return "fsqrt"; 5933 case ISD::FSIN: return "fsin"; 5934 case ISD::FCOS: return "fcos"; 5935 case ISD::FTRUNC: return "ftrunc"; 5936 case ISD::FFLOOR: return "ffloor"; 5937 case ISD::FCEIL: return "fceil"; 5938 case ISD::FRINT: return "frint"; 5939 case ISD::FNEARBYINT: return "fnearbyint"; 5940 case ISD::FEXP: return "fexp"; 5941 case ISD::FEXP2: return "fexp2"; 5942 case ISD::FLOG: return "flog"; 5943 case ISD::FLOG2: return "flog2"; 5944 case ISD::FLOG10: return "flog10"; 5945 5946 // Binary operators 5947 case ISD::ADD: return "add"; 5948 case ISD::SUB: return "sub"; 5949 case ISD::MUL: return "mul"; 5950 case ISD::MULHU: return "mulhu"; 5951 case ISD::MULHS: return "mulhs"; 5952 case ISD::SDIV: return "sdiv"; 5953 case ISD::UDIV: return "udiv"; 5954 case ISD::SREM: return "srem"; 5955 case ISD::UREM: return "urem"; 5956 case ISD::SMUL_LOHI: return "smul_lohi"; 5957 case ISD::UMUL_LOHI: return "umul_lohi"; 5958 case ISD::SDIVREM: return "sdivrem"; 5959 case ISD::UDIVREM: return "udivrem"; 5960 case ISD::AND: return "and"; 5961 case ISD::OR: return "or"; 5962 case ISD::XOR: return "xor"; 5963 case ISD::SHL: return "shl"; 5964 case ISD::SRA: return "sra"; 5965 case ISD::SRL: return "srl"; 5966 case ISD::ROTL: return "rotl"; 5967 case ISD::ROTR: return "rotr"; 5968 case ISD::FADD: return "fadd"; 5969 case ISD::FSUB: return "fsub"; 5970 case ISD::FMUL: return "fmul"; 5971 case ISD::FDIV: return "fdiv"; 5972 case ISD::FMA: return "fma"; 5973 case ISD::FREM: return "frem"; 5974 case ISD::FCOPYSIGN: return "fcopysign"; 5975 case ISD::FGETSIGN: return "fgetsign"; 5976 case ISD::FPOW: return "fpow"; 5977 5978 case ISD::FPOWI: return "fpowi"; 5979 case ISD::SETCC: return "setcc"; 5980 case ISD::SELECT: return "select"; 5981 case ISD::VSELECT: return "vselect"; 5982 case ISD::SELECT_CC: return "select_cc"; 5983 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5984 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5985 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5986 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 5987 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5988 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5989 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5990 case ISD::CARRY_FALSE: return "carry_false"; 5991 case ISD::ADDC: return "addc"; 5992 case ISD::ADDE: return "adde"; 5993 case ISD::SADDO: return "saddo"; 5994 case ISD::UADDO: return "uaddo"; 5995 case ISD::SSUBO: return "ssubo"; 5996 case ISD::USUBO: return "usubo"; 5997 case ISD::SMULO: return "smulo"; 5998 case ISD::UMULO: return "umulo"; 5999 case ISD::SUBC: return "subc"; 6000 case ISD::SUBE: return "sube"; 6001 case ISD::SHL_PARTS: return "shl_parts"; 6002 case ISD::SRA_PARTS: return "sra_parts"; 6003 case ISD::SRL_PARTS: return "srl_parts"; 6004 6005 // Conversion operators. 6006 case ISD::SIGN_EXTEND: return "sign_extend"; 6007 case ISD::ZERO_EXTEND: return "zero_extend"; 6008 case ISD::ANY_EXTEND: return "any_extend"; 6009 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 6010 case ISD::TRUNCATE: return "truncate"; 6011 case ISD::FP_ROUND: return "fp_round"; 6012 case ISD::FLT_ROUNDS_: return "flt_rounds"; 6013 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 6014 case ISD::FP_EXTEND: return "fp_extend"; 6015 6016 case ISD::SINT_TO_FP: return "sint_to_fp"; 6017 case ISD::UINT_TO_FP: return "uint_to_fp"; 6018 case ISD::FP_TO_SINT: return "fp_to_sint"; 6019 case ISD::FP_TO_UINT: return "fp_to_uint"; 6020 case ISD::BITCAST: return "bitcast"; 6021 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 6022 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 6023 6024 case ISD::CONVERT_RNDSAT: { 6025 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 6026 default: llvm_unreachable("Unknown cvt code!"); 6027 case ISD::CVT_FF: return "cvt_ff"; 6028 case ISD::CVT_FS: return "cvt_fs"; 6029 case ISD::CVT_FU: return "cvt_fu"; 6030 case ISD::CVT_SF: return "cvt_sf"; 6031 case ISD::CVT_UF: return "cvt_uf"; 6032 case ISD::CVT_SS: return "cvt_ss"; 6033 case ISD::CVT_SU: return "cvt_su"; 6034 case ISD::CVT_US: return "cvt_us"; 6035 case ISD::CVT_UU: return "cvt_uu"; 6036 } 6037 } 6038 6039 // Control flow instructions 6040 case ISD::BR: return "br"; 6041 case ISD::BRIND: return "brind"; 6042 case ISD::BR_JT: return "br_jt"; 6043 case ISD::BRCOND: return "brcond"; 6044 case ISD::BR_CC: return "br_cc"; 6045 case ISD::CALLSEQ_START: return "callseq_start"; 6046 case ISD::CALLSEQ_END: return "callseq_end"; 6047 6048 // Other operators 6049 case ISD::LOAD: return "load"; 6050 case ISD::STORE: return "store"; 6051 case ISD::VAARG: return "vaarg"; 6052 case ISD::VACOPY: return "vacopy"; 6053 case ISD::VAEND: return "vaend"; 6054 case ISD::VASTART: return "vastart"; 6055 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 6056 case ISD::EXTRACT_ELEMENT: return "extract_element"; 6057 case ISD::BUILD_PAIR: return "build_pair"; 6058 case ISD::STACKSAVE: return "stacksave"; 6059 case ISD::STACKRESTORE: return "stackrestore"; 6060 case ISD::TRAP: return "trap"; 6061 6062 // Bit manipulation 6063 case ISD::BSWAP: return "bswap"; 6064 case ISD::CTPOP: return "ctpop"; 6065 case ISD::CTTZ: return "cttz"; 6066 case ISD::CTLZ: return "ctlz"; 6067 6068 // Trampolines 6069 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 6070 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 6071 6072 case ISD::CONDCODE: 6073 switch (cast<CondCodeSDNode>(this)->get()) { 6074 default: llvm_unreachable("Unknown setcc condition!"); 6075 case ISD::SETOEQ: return "setoeq"; 6076 case ISD::SETOGT: return "setogt"; 6077 case ISD::SETOGE: return "setoge"; 6078 case ISD::SETOLT: return "setolt"; 6079 case ISD::SETOLE: return "setole"; 6080 case ISD::SETONE: return "setone"; 6081 6082 case ISD::SETO: return "seto"; 6083 case ISD::SETUO: return "setuo"; 6084 case ISD::SETUEQ: return "setue"; 6085 case ISD::SETUGT: return "setugt"; 6086 case ISD::SETUGE: return "setuge"; 6087 case ISD::SETULT: return "setult"; 6088 case ISD::SETULE: return "setule"; 6089 case ISD::SETUNE: return "setune"; 6090 6091 case ISD::SETEQ: return "seteq"; 6092 case ISD::SETGT: return "setgt"; 6093 case ISD::SETGE: return "setge"; 6094 case ISD::SETLT: return "setlt"; 6095 case ISD::SETLE: return "setle"; 6096 case ISD::SETNE: return "setne"; 6097 } 6098 } 6099} 6100 6101const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 6102 switch (AM) { 6103 default: 6104 return ""; 6105 case ISD::PRE_INC: 6106 return "<pre-inc>"; 6107 case ISD::PRE_DEC: 6108 return "<pre-dec>"; 6109 case ISD::POST_INC: 6110 return "<post-inc>"; 6111 case ISD::POST_DEC: 6112 return "<post-dec>"; 6113 } 6114} 6115 6116std::string ISD::ArgFlagsTy::getArgFlagsString() { 6117 std::string S = "< "; 6118 6119 if (isZExt()) 6120 S += "zext "; 6121 if (isSExt()) 6122 S += "sext "; 6123 if (isInReg()) 6124 S += "inreg "; 6125 if (isSRet()) 6126 S += "sret "; 6127 if (isByVal()) 6128 S += "byval "; 6129 if (isNest()) 6130 S += "nest "; 6131 if (getByValAlign()) 6132 S += "byval-align:" + utostr(getByValAlign()) + " "; 6133 if (getOrigAlign()) 6134 S += "orig-align:" + utostr(getOrigAlign()) + " "; 6135 if (getByValSize()) 6136 S += "byval-size:" + utostr(getByValSize()) + " "; 6137 return S + ">"; 6138} 6139 6140void SDNode::dump() const { dump(0); } 6141void SDNode::dump(const SelectionDAG *G) const { 6142 print(dbgs(), G); 6143 dbgs() << '\n'; 6144} 6145 6146void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 6147 OS << (void*)this << ": "; 6148 6149 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 6150 if (i) OS << ","; 6151 if (getValueType(i) == MVT::Other) 6152 OS << "ch"; 6153 else 6154 OS << getValueType(i).getEVTString(); 6155 } 6156 OS << " = " << getOperationName(G); 6157} 6158 6159void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 6160 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 6161 if (!MN->memoperands_empty()) { 6162 OS << "<"; 6163 OS << "Mem:"; 6164 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 6165 e = MN->memoperands_end(); i != e; ++i) { 6166 OS << **i; 6167 if (llvm::next(i) != e) 6168 OS << " "; 6169 } 6170 OS << ">"; 6171 } 6172 } else if (const ShuffleVectorSDNode *SVN = 6173 dyn_cast<ShuffleVectorSDNode>(this)) { 6174 OS << "<"; 6175 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 6176 int Idx = SVN->getMaskElt(i); 6177 if (i) OS << ","; 6178 if (Idx < 0) 6179 OS << "u"; 6180 else 6181 OS << Idx; 6182 } 6183 OS << ">"; 6184 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 6185 OS << '<' << CSDN->getAPIntValue() << '>'; 6186 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 6187 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 6188 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 6189 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 6190 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 6191 else { 6192 OS << "<APFloat("; 6193 CSDN->getValueAPF().bitcastToAPInt().dump(); 6194 OS << ")>"; 6195 } 6196 } else if (const GlobalAddressSDNode *GADN = 6197 dyn_cast<GlobalAddressSDNode>(this)) { 6198 int64_t offset = GADN->getOffset(); 6199 OS << '<'; 6200 WriteAsOperand(OS, GADN->getGlobal()); 6201 OS << '>'; 6202 if (offset > 0) 6203 OS << " + " << offset; 6204 else 6205 OS << " " << offset; 6206 if (unsigned int TF = GADN->getTargetFlags()) 6207 OS << " [TF=" << TF << ']'; 6208 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 6209 OS << "<" << FIDN->getIndex() << ">"; 6210 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 6211 OS << "<" << JTDN->getIndex() << ">"; 6212 if (unsigned int TF = JTDN->getTargetFlags()) 6213 OS << " [TF=" << TF << ']'; 6214 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 6215 int offset = CP->getOffset(); 6216 if (CP->isMachineConstantPoolEntry()) 6217 OS << "<" << *CP->getMachineCPVal() << ">"; 6218 else 6219 OS << "<" << *CP->getConstVal() << ">"; 6220 if (offset > 0) 6221 OS << " + " << offset; 6222 else 6223 OS << " " << offset; 6224 if (unsigned int TF = CP->getTargetFlags()) 6225 OS << " [TF=" << TF << ']'; 6226 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 6227 OS << "<"; 6228 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 6229 if (LBB) 6230 OS << LBB->getName() << " "; 6231 OS << (const void*)BBDN->getBasicBlock() << ">"; 6232 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 6233 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0); 6234 } else if (const ExternalSymbolSDNode *ES = 6235 dyn_cast<ExternalSymbolSDNode>(this)) { 6236 OS << "'" << ES->getSymbol() << "'"; 6237 if (unsigned int TF = ES->getTargetFlags()) 6238 OS << " [TF=" << TF << ']'; 6239 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 6240 if (M->getValue()) 6241 OS << "<" << M->getValue() << ">"; 6242 else 6243 OS << "<null>"; 6244 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 6245 if (MD->getMD()) 6246 OS << "<" << MD->getMD() << ">"; 6247 else 6248 OS << "<null>"; 6249 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6250 OS << ":" << N->getVT().getEVTString(); 6251 } 6252 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6253 OS << "<" << *LD->getMemOperand(); 6254 6255 bool doExt = true; 6256 switch (LD->getExtensionType()) { 6257 default: doExt = false; break; 6258 case ISD::EXTLOAD: OS << ", anyext"; break; 6259 case ISD::SEXTLOAD: OS << ", sext"; break; 6260 case ISD::ZEXTLOAD: OS << ", zext"; break; 6261 } 6262 if (doExt) 6263 OS << " from " << LD->getMemoryVT().getEVTString(); 6264 6265 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6266 if (*AM) 6267 OS << ", " << AM; 6268 6269 OS << ">"; 6270 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6271 OS << "<" << *ST->getMemOperand(); 6272 6273 if (ST->isTruncatingStore()) 6274 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6275 6276 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6277 if (*AM) 6278 OS << ", " << AM; 6279 6280 OS << ">"; 6281 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6282 OS << "<" << *M->getMemOperand() << ">"; 6283 } else if (const BlockAddressSDNode *BA = 6284 dyn_cast<BlockAddressSDNode>(this)) { 6285 OS << "<"; 6286 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6287 OS << ", "; 6288 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6289 OS << ">"; 6290 if (unsigned int TF = BA->getTargetFlags()) 6291 OS << " [TF=" << TF << ']'; 6292 } 6293 6294 if (G) 6295 if (unsigned Order = G->GetOrdering(this)) 6296 OS << " [ORD=" << Order << ']'; 6297 6298 if (getNodeId() != -1) 6299 OS << " [ID=" << getNodeId() << ']'; 6300 6301 DebugLoc dl = getDebugLoc(); 6302 if (G && !dl.isUnknown()) { 6303 DIScope 6304 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6305 OS << " dbg:"; 6306 // Omit the directory, since it's usually long and uninteresting. 6307 if (Scope.Verify()) 6308 OS << Scope.getFilename(); 6309 else 6310 OS << "<unknown>"; 6311 OS << ':' << dl.getLine(); 6312 if (dl.getCol() != 0) 6313 OS << ':' << dl.getCol(); 6314 } 6315} 6316 6317void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6318 print_types(OS, G); 6319 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6320 if (i) OS << ", "; else OS << " "; 6321 OS << (void*)getOperand(i).getNode(); 6322 if (unsigned RN = getOperand(i).getResNo()) 6323 OS << ":" << RN; 6324 } 6325 print_details(OS, G); 6326} 6327 6328static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6329 const SelectionDAG *G, unsigned depth, 6330 unsigned indent) 6331{ 6332 if (depth == 0) 6333 return; 6334 6335 OS.indent(indent); 6336 6337 N->print(OS, G); 6338 6339 if (depth < 1) 6340 return; 6341 6342 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6343 // Don't follow chain operands. 6344 if (N->getOperand(i).getValueType() == MVT::Other) 6345 continue; 6346 OS << '\n'; 6347 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6348 } 6349} 6350 6351void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6352 unsigned depth) const { 6353 printrWithDepthHelper(OS, this, G, depth, 0); 6354} 6355 6356void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6357 // Don't print impossibly deep things. 6358 printrWithDepth(OS, G, 10); 6359} 6360 6361void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6362 printrWithDepth(dbgs(), G, depth); 6363} 6364 6365void SDNode::dumprFull(const SelectionDAG *G) const { 6366 // Don't print impossibly deep things. 6367 dumprWithDepth(G, 10); 6368} 6369 6370static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6371 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6372 if (N->getOperand(i).getNode()->hasOneUse()) 6373 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6374 else 6375 dbgs() << "\n" << std::string(indent+2, ' ') 6376 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6377 6378 6379 dbgs() << "\n"; 6380 dbgs().indent(indent); 6381 N->dump(G); 6382} 6383 6384SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6385 assert(N->getNumValues() == 1 && 6386 "Can't unroll a vector with multiple results!"); 6387 6388 EVT VT = N->getValueType(0); 6389 unsigned NE = VT.getVectorNumElements(); 6390 EVT EltVT = VT.getVectorElementType(); 6391 DebugLoc dl = N->getDebugLoc(); 6392 6393 SmallVector<SDValue, 8> Scalars; 6394 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6395 6396 // If ResNE is 0, fully unroll the vector op. 6397 if (ResNE == 0) 6398 ResNE = NE; 6399 else if (NE > ResNE) 6400 NE = ResNE; 6401 6402 unsigned i; 6403 for (i= 0; i != NE; ++i) { 6404 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6405 SDValue Operand = N->getOperand(j); 6406 EVT OperandVT = Operand.getValueType(); 6407 if (OperandVT.isVector()) { 6408 // A vector operand; extract a single element. 6409 EVT OperandEltVT = OperandVT.getVectorElementType(); 6410 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6411 OperandEltVT, 6412 Operand, 6413 getConstant(i, TLI.getPointerTy())); 6414 } else { 6415 // A scalar operand; just use it as is. 6416 Operands[j] = Operand; 6417 } 6418 } 6419 6420 switch (N->getOpcode()) { 6421 default: 6422 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6423 &Operands[0], Operands.size())); 6424 break; 6425 case ISD::SHL: 6426 case ISD::SRA: 6427 case ISD::SRL: 6428 case ISD::ROTL: 6429 case ISD::ROTR: 6430 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6431 getShiftAmountOperand(Operands[0].getValueType(), 6432 Operands[1]))); 6433 break; 6434 case ISD::SIGN_EXTEND_INREG: 6435 case ISD::FP_ROUND_INREG: { 6436 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6437 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6438 Operands[0], 6439 getValueType(ExtVT))); 6440 } 6441 } 6442 } 6443 6444 for (; i < ResNE; ++i) 6445 Scalars.push_back(getUNDEF(EltVT)); 6446 6447 return getNode(ISD::BUILD_VECTOR, dl, 6448 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6449 &Scalars[0], Scalars.size()); 6450} 6451 6452 6453/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6454/// location that is 'Dist' units away from the location that the 'Base' load 6455/// is loading from. 6456bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6457 unsigned Bytes, int Dist) const { 6458 if (LD->getChain() != Base->getChain()) 6459 return false; 6460 EVT VT = LD->getValueType(0); 6461 if (VT.getSizeInBits() / 8 != Bytes) 6462 return false; 6463 6464 SDValue Loc = LD->getOperand(1); 6465 SDValue BaseLoc = Base->getOperand(1); 6466 if (Loc.getOpcode() == ISD::FrameIndex) { 6467 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6468 return false; 6469 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6470 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6471 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6472 int FS = MFI->getObjectSize(FI); 6473 int BFS = MFI->getObjectSize(BFI); 6474 if (FS != BFS || FS != (int)Bytes) return false; 6475 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6476 } 6477 6478 // Handle X+C 6479 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6480 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6481 return true; 6482 6483 const GlobalValue *GV1 = NULL; 6484 const GlobalValue *GV2 = NULL; 6485 int64_t Offset1 = 0; 6486 int64_t Offset2 = 0; 6487 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6488 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6489 if (isGA1 && isGA2 && GV1 == GV2) 6490 return Offset1 == (Offset2 + Dist*Bytes); 6491 return false; 6492} 6493 6494 6495/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6496/// it cannot be inferred. 6497unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6498 // If this is a GlobalAddress + cst, return the alignment. 6499 const GlobalValue *GV; 6500 int64_t GVOffset = 0; 6501 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6502 // If GV has specified alignment, then use it. Otherwise, use the preferred 6503 // alignment. 6504 unsigned Align = GV->getAlignment(); 6505 if (!Align) { 6506 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6507 if (GVar->hasInitializer()) { 6508 const TargetData *TD = TLI.getTargetData(); 6509 Align = TD->getPreferredAlignment(GVar); 6510 } 6511 } 6512 } 6513 return MinAlign(Align, GVOffset); 6514 } 6515 6516 // If this is a direct reference to a stack slot, use information about the 6517 // stack slot's alignment. 6518 int FrameIdx = 1 << 31; 6519 int64_t FrameOffset = 0; 6520 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6521 FrameIdx = FI->getIndex(); 6522 } else if (isBaseWithConstantOffset(Ptr) && 6523 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6524 // Handle FI+Cst 6525 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6526 FrameOffset = Ptr.getConstantOperandVal(1); 6527 } 6528 6529 if (FrameIdx != (1 << 31)) { 6530 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6531 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6532 FrameOffset); 6533 return FIInfoAlign; 6534 } 6535 6536 return 0; 6537} 6538 6539void SelectionDAG::dump() const { 6540 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6541 6542 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6543 I != E; ++I) { 6544 const SDNode *N = I; 6545 if (!N->hasOneUse() && N != getRoot().getNode()) 6546 DumpNodes(N, 2, this); 6547 } 6548 6549 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6550 6551 dbgs() << "\n\n"; 6552} 6553 6554void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6555 print_types(OS, G); 6556 print_details(OS, G); 6557} 6558 6559typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6560static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6561 const SelectionDAG *G, VisitedSDNodeSet &once) { 6562 if (!once.insert(N)) // If we've been here before, return now. 6563 return; 6564 6565 // Dump the current SDNode, but don't end the line yet. 6566 OS << std::string(indent, ' '); 6567 N->printr(OS, G); 6568 6569 // Having printed this SDNode, walk the children: 6570 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6571 const SDNode *child = N->getOperand(i).getNode(); 6572 6573 if (i) OS << ","; 6574 OS << " "; 6575 6576 if (child->getNumOperands() == 0) { 6577 // This child has no grandchildren; print it inline right here. 6578 child->printr(OS, G); 6579 once.insert(child); 6580 } else { // Just the address. FIXME: also print the child's opcode. 6581 OS << (void*)child; 6582 if (unsigned RN = N->getOperand(i).getResNo()) 6583 OS << ":" << RN; 6584 } 6585 } 6586 6587 OS << "\n"; 6588 6589 // Dump children that have grandchildren on their own line(s). 6590 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6591 const SDNode *child = N->getOperand(i).getNode(); 6592 DumpNodesr(OS, child, indent+2, G, once); 6593 } 6594} 6595 6596void SDNode::dumpr() const { 6597 VisitedSDNodeSet once; 6598 DumpNodesr(dbgs(), this, 0, 0, once); 6599} 6600 6601void SDNode::dumpr(const SelectionDAG *G) const { 6602 VisitedSDNodeSet once; 6603 DumpNodesr(dbgs(), this, 0, G, once); 6604} 6605 6606 6607// getAddressSpace - Return the address space this GlobalAddress belongs to. 6608unsigned GlobalAddressSDNode::getAddressSpace() const { 6609 return getGlobal()->getType()->getAddressSpace(); 6610} 6611 6612 6613Type *ConstantPoolSDNode::getType() const { 6614 if (isMachineConstantPoolEntry()) 6615 return Val.MachineCPVal->getType(); 6616 return Val.ConstVal->getType(); 6617} 6618 6619bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6620 APInt &SplatUndef, 6621 unsigned &SplatBitSize, 6622 bool &HasAnyUndefs, 6623 unsigned MinSplatBits, 6624 bool isBigEndian) { 6625 EVT VT = getValueType(0); 6626 assert(VT.isVector() && "Expected a vector type"); 6627 unsigned sz = VT.getSizeInBits(); 6628 if (MinSplatBits > sz) 6629 return false; 6630 6631 SplatValue = APInt(sz, 0); 6632 SplatUndef = APInt(sz, 0); 6633 6634 // Get the bits. Bits with undefined values (when the corresponding element 6635 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6636 // in SplatValue. If any of the values are not constant, give up and return 6637 // false. 6638 unsigned int nOps = getNumOperands(); 6639 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6640 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6641 6642 for (unsigned j = 0; j < nOps; ++j) { 6643 unsigned i = isBigEndian ? nOps-1-j : j; 6644 SDValue OpVal = getOperand(i); 6645 unsigned BitPos = j * EltBitSize; 6646 6647 if (OpVal.getOpcode() == ISD::UNDEF) 6648 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6649 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6650 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6651 zextOrTrunc(sz) << BitPos; 6652 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6653 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6654 else 6655 return false; 6656 } 6657 6658 // The build_vector is all constants or undefs. Find the smallest element 6659 // size that splats the vector. 6660 6661 HasAnyUndefs = (SplatUndef != 0); 6662 while (sz > 8) { 6663 6664 unsigned HalfSize = sz / 2; 6665 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6666 APInt LowValue = SplatValue.trunc(HalfSize); 6667 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6668 APInt LowUndef = SplatUndef.trunc(HalfSize); 6669 6670 // If the two halves do not match (ignoring undef bits), stop here. 6671 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6672 MinSplatBits > HalfSize) 6673 break; 6674 6675 SplatValue = HighValue | LowValue; 6676 SplatUndef = HighUndef & LowUndef; 6677 6678 sz = HalfSize; 6679 } 6680 6681 SplatBitSize = sz; 6682 return true; 6683} 6684 6685bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6686 // Find the first non-undef value in the shuffle mask. 6687 unsigned i, e; 6688 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6689 /* search */; 6690 6691 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6692 6693 // Make sure all remaining elements are either undef or the same as the first 6694 // non-undef value. 6695 for (int Idx = Mask[i]; i != e; ++i) 6696 if (Mask[i] >= 0 && Mask[i] != Idx) 6697 return false; 6698 return true; 6699} 6700 6701#ifdef XDEBUG 6702static void checkForCyclesHelper(const SDNode *N, 6703 SmallPtrSet<const SDNode*, 32> &Visited, 6704 SmallPtrSet<const SDNode*, 32> &Checked) { 6705 // If this node has already been checked, don't check it again. 6706 if (Checked.count(N)) 6707 return; 6708 6709 // If a node has already been visited on this depth-first walk, reject it as 6710 // a cycle. 6711 if (!Visited.insert(N)) { 6712 dbgs() << "Offending node:\n"; 6713 N->dumprFull(); 6714 errs() << "Detected cycle in SelectionDAG\n"; 6715 abort(); 6716 } 6717 6718 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6719 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6720 6721 Checked.insert(N); 6722 Visited.erase(N); 6723} 6724#endif 6725 6726void llvm::checkForCycles(const llvm::SDNode *N) { 6727#ifdef XDEBUG 6728 assert(N && "Checking nonexistant SDNode"); 6729 SmallPtrSet<const SDNode*, 32> visited; 6730 SmallPtrSet<const SDNode*, 32> checked; 6731 checkForCyclesHelper(N, visited, checked); 6732#endif 6733} 6734 6735void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6736 checkForCycles(DAG->getRoot().getNode()); 6737} 6738