SelectionDAG.cpp revision 29cbade25aa094ca9a149a96a8614cf6f3247480
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/Function.h" 17#include "llvm/GlobalAlias.h" 18#include "llvm/GlobalVariable.h" 19#include "llvm/Intrinsics.h" 20#include "llvm/DerivedTypes.h" 21#include "llvm/Assembly/Writer.h" 22#include "llvm/CallingConv.h" 23#include "llvm/CodeGen/MachineBasicBlock.h" 24#include "llvm/CodeGen/MachineConstantPool.h" 25#include "llvm/CodeGen/MachineFrameInfo.h" 26#include "llvm/CodeGen/MachineModuleInfo.h" 27#include "llvm/CodeGen/PseudoSourceValue.h" 28#include "llvm/Target/TargetRegisterInfo.h" 29#include "llvm/Target/TargetData.h" 30#include "llvm/Target/TargetLowering.h" 31#include "llvm/Target/TargetOptions.h" 32#include "llvm/Target/TargetInstrInfo.h" 33#include "llvm/Target/TargetIntrinsicInfo.h" 34#include "llvm/Target/TargetMachine.h" 35#include "llvm/Support/CommandLine.h" 36#include "llvm/Support/ErrorHandling.h" 37#include "llvm/Support/ManagedStatic.h" 38#include "llvm/Support/MathExtras.h" 39#include "llvm/Support/raw_ostream.h" 40#include "llvm/System/Mutex.h" 41#include "llvm/ADT/SetVector.h" 42#include "llvm/ADT/SmallPtrSet.h" 43#include "llvm/ADT/SmallSet.h" 44#include "llvm/ADT/SmallVector.h" 45#include "llvm/ADT/StringExtras.h" 46#include <algorithm> 47#include <cmath> 48using namespace llvm; 49 50/// makeVTList - Return an instance of the SDVTList struct initialized with the 51/// specified members. 52static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 53 SDVTList Res = {VTs, NumVTs}; 54 return Res; 55} 56 57static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 58 switch (VT.getSimpleVT().SimpleTy) { 59 default: llvm_unreachable("Unknown FP format"); 60 case MVT::f32: return &APFloat::IEEEsingle; 61 case MVT::f64: return &APFloat::IEEEdouble; 62 case MVT::f80: return &APFloat::x87DoubleExtended; 63 case MVT::f128: return &APFloat::IEEEquad; 64 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 65 } 66} 67 68SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 69 70//===----------------------------------------------------------------------===// 71// ConstantFPSDNode Class 72//===----------------------------------------------------------------------===// 73 74/// isExactlyValue - We don't rely on operator== working on double values, as 75/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 76/// As such, this method can be used to do an exact bit-for-bit comparison of 77/// two floating point values. 78bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 79 return getValueAPF().bitwiseIsEqual(V); 80} 81 82bool ConstantFPSDNode::isValueValidForType(EVT VT, 83 const APFloat& Val) { 84 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 85 86 // PPC long double cannot be converted to any other type. 87 if (VT == MVT::ppcf128 || 88 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 89 return false; 90 91 // convert modifies in place, so make a copy. 92 APFloat Val2 = APFloat(Val); 93 bool losesInfo; 94 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 95 &losesInfo); 96 return !losesInfo; 97} 98 99//===----------------------------------------------------------------------===// 100// ISD Namespace 101//===----------------------------------------------------------------------===// 102 103/// isBuildVectorAllOnes - Return true if the specified node is a 104/// BUILD_VECTOR where all of the elements are ~0 or undef. 105bool ISD::isBuildVectorAllOnes(const SDNode *N) { 106 // Look through a bit convert. 107 if (N->getOpcode() == ISD::BIT_CONVERT) 108 N = N->getOperand(0).getNode(); 109 110 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 111 112 unsigned i = 0, e = N->getNumOperands(); 113 114 // Skip over all of the undef values. 115 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 116 ++i; 117 118 // Do not accept an all-undef vector. 119 if (i == e) return false; 120 121 // Do not accept build_vectors that aren't all constants or which have non-~0 122 // elements. 123 SDValue NotZero = N->getOperand(i); 124 if (isa<ConstantSDNode>(NotZero)) { 125 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 126 return false; 127 } else if (isa<ConstantFPSDNode>(NotZero)) { 128 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 129 bitcastToAPInt().isAllOnesValue()) 130 return false; 131 } else 132 return false; 133 134 // Okay, we have at least one ~0 value, check to see if the rest match or are 135 // undefs. 136 for (++i; i != e; ++i) 137 if (N->getOperand(i) != NotZero && 138 N->getOperand(i).getOpcode() != ISD::UNDEF) 139 return false; 140 return true; 141} 142 143 144/// isBuildVectorAllZeros - Return true if the specified node is a 145/// BUILD_VECTOR where all of the elements are 0 or undef. 146bool ISD::isBuildVectorAllZeros(const SDNode *N) { 147 // Look through a bit convert. 148 if (N->getOpcode() == ISD::BIT_CONVERT) 149 N = N->getOperand(0).getNode(); 150 151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 152 153 unsigned i = 0, e = N->getNumOperands(); 154 155 // Skip over all of the undef values. 156 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 157 ++i; 158 159 // Do not accept an all-undef vector. 160 if (i == e) return false; 161 162 // Do not accept build_vectors that aren't all constants or which have non-0 163 // elements. 164 SDValue Zero = N->getOperand(i); 165 if (isa<ConstantSDNode>(Zero)) { 166 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 167 return false; 168 } else if (isa<ConstantFPSDNode>(Zero)) { 169 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 170 return false; 171 } else 172 return false; 173 174 // Okay, we have at least one 0 value, check to see if the rest match or are 175 // undefs. 176 for (++i; i != e; ++i) 177 if (N->getOperand(i) != Zero && 178 N->getOperand(i).getOpcode() != ISD::UNDEF) 179 return false; 180 return true; 181} 182 183/// isScalarToVector - Return true if the specified node is a 184/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 185/// element is not an undef. 186bool ISD::isScalarToVector(const SDNode *N) { 187 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 188 return true; 189 190 if (N->getOpcode() != ISD::BUILD_VECTOR) 191 return false; 192 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 193 return false; 194 unsigned NumElems = N->getNumOperands(); 195 for (unsigned i = 1; i < NumElems; ++i) { 196 SDValue V = N->getOperand(i); 197 if (V.getOpcode() != ISD::UNDEF) 198 return false; 199 } 200 return true; 201} 202 203 204/// isDebugLabel - Return true if the specified node represents a debug 205/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 206bool ISD::isDebugLabel(const SDNode *N) { 207 SDValue Zero; 208 if (N->getOpcode() == ISD::DBG_LABEL) 209 return true; 210 if (N->isMachineOpcode() && 211 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 212 return true; 213 return false; 214} 215 216/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 217/// when given the operation for (X op Y). 218ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 219 // To perform this operation, we just need to swap the L and G bits of the 220 // operation. 221 unsigned OldL = (Operation >> 2) & 1; 222 unsigned OldG = (Operation >> 1) & 1; 223 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 224 (OldL << 1) | // New G bit 225 (OldG << 2)); // New L bit. 226} 227 228/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 229/// 'op' is a valid SetCC operation. 230ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 231 unsigned Operation = Op; 232 if (isInteger) 233 Operation ^= 7; // Flip L, G, E bits, but not U. 234 else 235 Operation ^= 15; // Flip all of the condition bits. 236 237 if (Operation > ISD::SETTRUE2) 238 Operation &= ~8; // Don't let N and U bits get set. 239 240 return ISD::CondCode(Operation); 241} 242 243 244/// isSignedOp - For an integer comparison, return 1 if the comparison is a 245/// signed operation and 2 if the result is an unsigned comparison. Return zero 246/// if the operation does not depend on the sign of the input (setne and seteq). 247static int isSignedOp(ISD::CondCode Opcode) { 248 switch (Opcode) { 249 default: llvm_unreachable("Illegal integer setcc operation!"); 250 case ISD::SETEQ: 251 case ISD::SETNE: return 0; 252 case ISD::SETLT: 253 case ISD::SETLE: 254 case ISD::SETGT: 255 case ISD::SETGE: return 1; 256 case ISD::SETULT: 257 case ISD::SETULE: 258 case ISD::SETUGT: 259 case ISD::SETUGE: return 2; 260 } 261} 262 263/// getSetCCOrOperation - Return the result of a logical OR between different 264/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 265/// returns SETCC_INVALID if it is not possible to represent the resultant 266/// comparison. 267ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 268 bool isInteger) { 269 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 270 // Cannot fold a signed integer setcc with an unsigned integer setcc. 271 return ISD::SETCC_INVALID; 272 273 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 274 275 // If the N and U bits get set then the resultant comparison DOES suddenly 276 // care about orderedness, and is true when ordered. 277 if (Op > ISD::SETTRUE2) 278 Op &= ~16; // Clear the U bit if the N bit is set. 279 280 // Canonicalize illegal integer setcc's. 281 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 282 Op = ISD::SETNE; 283 284 return ISD::CondCode(Op); 285} 286 287/// getSetCCAndOperation - Return the result of a logical AND between different 288/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 289/// function returns zero if it is not possible to represent the resultant 290/// comparison. 291ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 292 bool isInteger) { 293 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 294 // Cannot fold a signed setcc with an unsigned setcc. 295 return ISD::SETCC_INVALID; 296 297 // Combine all of the condition bits. 298 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 299 300 // Canonicalize illegal integer setcc's. 301 if (isInteger) { 302 switch (Result) { 303 default: break; 304 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 305 case ISD::SETOEQ: // SETEQ & SETU[LG]E 306 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 307 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 308 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 309 } 310 } 311 312 return Result; 313} 314 315const TargetMachine &SelectionDAG::getTarget() const { 316 return MF->getTarget(); 317} 318 319//===----------------------------------------------------------------------===// 320// SDNode Profile Support 321//===----------------------------------------------------------------------===// 322 323/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 324/// 325static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 326 ID.AddInteger(OpC); 327} 328 329/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 330/// solely with their pointer. 331static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 332 ID.AddPointer(VTList.VTs); 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDValue *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 346/// 347static void AddNodeIDOperands(FoldingSetNodeID &ID, 348 const SDUse *Ops, unsigned NumOps) { 349 for (; NumOps; --NumOps, ++Ops) { 350 ID.AddPointer(Ops->getNode()); 351 ID.AddInteger(Ops->getResNo()); 352 } 353} 354 355static void AddNodeIDNode(FoldingSetNodeID &ID, 356 unsigned short OpC, SDVTList VTList, 357 const SDValue *OpList, unsigned N) { 358 AddNodeIDOpcode(ID, OpC); 359 AddNodeIDValueTypes(ID, VTList); 360 AddNodeIDOperands(ID, OpList, N); 361} 362 363/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 364/// the NodeID data. 365static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 366 switch (N->getOpcode()) { 367 case ISD::TargetExternalSymbol: 368 case ISD::ExternalSymbol: 369 llvm_unreachable("Should only be used on nodes with operands"); 370 default: break; // Normal nodes don't need extra info. 371 case ISD::TargetConstant: 372 case ISD::Constant: 373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 374 break; 375 case ISD::TargetConstantFP: 376 case ISD::ConstantFP: { 377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 378 break; 379 } 380 case ISD::TargetGlobalAddress: 381 case ISD::GlobalAddress: 382 case ISD::TargetGlobalTLSAddress: 383 case ISD::GlobalTLSAddress: { 384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 385 ID.AddPointer(GA->getGlobal()); 386 ID.AddInteger(GA->getOffset()); 387 ID.AddInteger(GA->getTargetFlags()); 388 break; 389 } 390 case ISD::BasicBlock: 391 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 392 break; 393 case ISD::Register: 394 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 395 break; 396 case ISD::DBG_STOPPOINT: { 397 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 398 ID.AddInteger(DSP->getLine()); 399 ID.AddInteger(DSP->getColumn()); 400 ID.AddPointer(DSP->getCompileUnit()); 401 break; 402 } 403 case ISD::SRCVALUE: 404 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 405 break; 406 case ISD::FrameIndex: 407 case ISD::TargetFrameIndex: 408 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 409 break; 410 case ISD::JumpTable: 411 case ISD::TargetJumpTable: 412 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 413 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 414 break; 415 case ISD::ConstantPool: 416 case ISD::TargetConstantPool: { 417 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 418 ID.AddInteger(CP->getAlignment()); 419 ID.AddInteger(CP->getOffset()); 420 if (CP->isMachineConstantPoolEntry()) 421 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 422 else 423 ID.AddPointer(CP->getConstVal()); 424 ID.AddInteger(CP->getTargetFlags()); 425 break; 426 } 427 case ISD::LOAD: { 428 const LoadSDNode *LD = cast<LoadSDNode>(N); 429 ID.AddInteger(LD->getMemoryVT().getRawBits()); 430 ID.AddInteger(LD->getRawSubclassData()); 431 break; 432 } 433 case ISD::STORE: { 434 const StoreSDNode *ST = cast<StoreSDNode>(N); 435 ID.AddInteger(ST->getMemoryVT().getRawBits()); 436 ID.AddInteger(ST->getRawSubclassData()); 437 break; 438 } 439 case ISD::ATOMIC_CMP_SWAP: 440 case ISD::ATOMIC_SWAP: 441 case ISD::ATOMIC_LOAD_ADD: 442 case ISD::ATOMIC_LOAD_SUB: 443 case ISD::ATOMIC_LOAD_AND: 444 case ISD::ATOMIC_LOAD_OR: 445 case ISD::ATOMIC_LOAD_XOR: 446 case ISD::ATOMIC_LOAD_NAND: 447 case ISD::ATOMIC_LOAD_MIN: 448 case ISD::ATOMIC_LOAD_MAX: 449 case ISD::ATOMIC_LOAD_UMIN: 450 case ISD::ATOMIC_LOAD_UMAX: { 451 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 452 ID.AddInteger(AT->getMemoryVT().getRawBits()); 453 ID.AddInteger(AT->getRawSubclassData()); 454 break; 455 } 456 case ISD::VECTOR_SHUFFLE: { 457 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 458 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 459 i != e; ++i) 460 ID.AddInteger(SVN->getMaskElt(i)); 461 break; 462 } 463 case ISD::TargetBlockAddress: 464 case ISD::BlockAddress: { 465 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 466 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 467 break; 468 } 469 } // end switch (N->getOpcode()) 470} 471 472/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 473/// data. 474static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 475 AddNodeIDOpcode(ID, N->getOpcode()); 476 // Add the return value info. 477 AddNodeIDValueTypes(ID, N->getVTList()); 478 // Add the operand info. 479 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 480 481 // Handle SDNode leafs with special info. 482 AddNodeIDCustom(ID, N); 483} 484 485/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 486/// the CSE map that carries volatility, indexing mode, and 487/// extension/truncation information. 488/// 489static inline unsigned 490encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile) { 491 assert((ConvType & 3) == ConvType && 492 "ConvType may not require more than 2 bits!"); 493 assert((AM & 7) == AM && 494 "AM may not require more than 3 bits!"); 495 return ConvType | 496 (AM << 2) | 497 (isVolatile << 5); 498} 499 500//===----------------------------------------------------------------------===// 501// SelectionDAG Class 502//===----------------------------------------------------------------------===// 503 504/// doNotCSE - Return true if CSE should not be performed for this node. 505static bool doNotCSE(SDNode *N) { 506 if (N->getValueType(0) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 switch (N->getOpcode()) { 510 default: break; 511 case ISD::HANDLENODE: 512 case ISD::DBG_LABEL: 513 case ISD::DBG_STOPPOINT: 514 case ISD::EH_LABEL: 515 return true; // Never CSE these nodes. 516 } 517 518 // Check that remaining values produced are not flags. 519 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 520 if (N->getValueType(i) == MVT::Flag) 521 return true; // Never CSE anything that produces a flag. 522 523 return false; 524} 525 526/// RemoveDeadNodes - This method deletes all unreachable nodes in the 527/// SelectionDAG. 528void SelectionDAG::RemoveDeadNodes() { 529 // Create a dummy node (which is not added to allnodes), that adds a reference 530 // to the root node, preventing it from being deleted. 531 HandleSDNode Dummy(getRoot()); 532 533 SmallVector<SDNode*, 128> DeadNodes; 534 535 // Add all obviously-dead nodes to the DeadNodes worklist. 536 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 537 if (I->use_empty()) 538 DeadNodes.push_back(I); 539 540 RemoveDeadNodes(DeadNodes); 541 542 // If the root changed (e.g. it was a dead load, update the root). 543 setRoot(Dummy.getValue()); 544} 545 546/// RemoveDeadNodes - This method deletes the unreachable nodes in the 547/// given list, and any nodes that become unreachable as a result. 548void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 549 DAGUpdateListener *UpdateListener) { 550 551 // Process the worklist, deleting the nodes and adding their uses to the 552 // worklist. 553 while (!DeadNodes.empty()) { 554 SDNode *N = DeadNodes.pop_back_val(); 555 556 if (UpdateListener) 557 UpdateListener->NodeDeleted(N, 0); 558 559 // Take the node out of the appropriate CSE map. 560 RemoveNodeFromCSEMaps(N); 561 562 // Next, brutally remove the operand list. This is safe to do, as there are 563 // no cycles in the graph. 564 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 565 SDUse &Use = *I++; 566 SDNode *Operand = Use.getNode(); 567 Use.set(SDValue()); 568 569 // Now that we removed this operand, see if there are no uses of it left. 570 if (Operand->use_empty()) 571 DeadNodes.push_back(Operand); 572 } 573 574 DeallocateNode(N); 575 } 576} 577 578void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 579 SmallVector<SDNode*, 16> DeadNodes(1, N); 580 RemoveDeadNodes(DeadNodes, UpdateListener); 581} 582 583void SelectionDAG::DeleteNode(SDNode *N) { 584 // First take this out of the appropriate CSE map. 585 RemoveNodeFromCSEMaps(N); 586 587 // Finally, remove uses due to operands of this node, remove from the 588 // AllNodes list, and delete the node. 589 DeleteNodeNotInCSEMaps(N); 590} 591 592void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 593 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 594 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 595 596 // Drop all of the operands and decrement used node's use counts. 597 N->DropOperands(); 598 599 DeallocateNode(N); 600} 601 602void SelectionDAG::DeallocateNode(SDNode *N) { 603 if (N->OperandsNeedDelete) 604 delete[] N->OperandList; 605 606 // Set the opcode to DELETED_NODE to help catch bugs when node 607 // memory is reallocated. 608 N->NodeType = ISD::DELETED_NODE; 609 610 NodeAllocator.Deallocate(AllNodes.remove(N)); 611} 612 613/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 614/// correspond to it. This is useful when we're about to delete or repurpose 615/// the node. We don't want future request for structurally identical nodes 616/// to return N anymore. 617bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 618 bool Erased = false; 619 switch (N->getOpcode()) { 620 case ISD::EntryToken: 621 llvm_unreachable("EntryToken should not be in CSEMaps!"); 622 return false; 623 case ISD::HANDLENODE: return false; // noop. 624 case ISD::CONDCODE: 625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 626 "Cond code doesn't exist!"); 627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 629 break; 630 case ISD::ExternalSymbol: 631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 632 break; 633 case ISD::TargetExternalSymbol: { 634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 635 Erased = TargetExternalSymbols.erase( 636 std::pair<std::string,unsigned char>(ESN->getSymbol(), 637 ESN->getTargetFlags())); 638 break; 639 } 640 case ISD::VALUETYPE: { 641 EVT VT = cast<VTSDNode>(N)->getVT(); 642 if (VT.isExtended()) { 643 Erased = ExtendedValueTypeNodes.erase(VT); 644 } else { 645 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 646 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 647 } 648 break; 649 } 650 default: 651 // Remove it from the CSE Map. 652 Erased = CSEMap.RemoveNode(N); 653 break; 654 } 655#ifndef NDEBUG 656 // Verify that the node was actually in one of the CSE maps, unless it has a 657 // flag result (which cannot be CSE'd) or is one of the special cases that are 658 // not subject to CSE. 659 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 660 !N->isMachineOpcode() && !doNotCSE(N)) { 661 N->dump(this); 662 errs() << "\n"; 663 llvm_unreachable("Node is not in map!"); 664 } 665#endif 666 return Erased; 667} 668 669/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 670/// maps and modified in place. Add it back to the CSE maps, unless an identical 671/// node already exists, in which case transfer all its users to the existing 672/// node. This transfer can potentially trigger recursive merging. 673/// 674void 675SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 676 DAGUpdateListener *UpdateListener) { 677 // For node types that aren't CSE'd, just act as if no identical node 678 // already exists. 679 if (!doNotCSE(N)) { 680 SDNode *Existing = CSEMap.GetOrInsertNode(N); 681 if (Existing != N) { 682 // If there was already an existing matching node, use ReplaceAllUsesWith 683 // to replace the dead one with the existing one. This can cause 684 // recursive merging of other unrelated nodes down the line. 685 ReplaceAllUsesWith(N, Existing, UpdateListener); 686 687 // N is now dead. Inform the listener if it exists and delete it. 688 if (UpdateListener) 689 UpdateListener->NodeDeleted(N, Existing); 690 DeleteNodeNotInCSEMaps(N); 691 return; 692 } 693 } 694 695 // If the node doesn't already exist, we updated it. Inform a listener if 696 // it exists. 697 if (UpdateListener) 698 UpdateListener->NodeUpdated(N); 699} 700 701/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 702/// were replaced with those specified. If this node is never memoized, 703/// return null, otherwise return a pointer to the slot it would take. If a 704/// node already exists with these operands, the slot will be non-null. 705SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 706 void *&InsertPos) { 707 if (doNotCSE(N)) 708 return 0; 709 710 SDValue Ops[] = { Op }; 711 FoldingSetNodeID ID; 712 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 713 AddNodeIDCustom(ID, N); 714 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 715} 716 717/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 718/// were replaced with those specified. If this node is never memoized, 719/// return null, otherwise return a pointer to the slot it would take. If a 720/// node already exists with these operands, the slot will be non-null. 721SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 722 SDValue Op1, SDValue Op2, 723 void *&InsertPos) { 724 if (doNotCSE(N)) 725 return 0; 726 727 SDValue Ops[] = { Op1, Op2 }; 728 FoldingSetNodeID ID; 729 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 730 AddNodeIDCustom(ID, N); 731 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 732} 733 734 735/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 736/// were replaced with those specified. If this node is never memoized, 737/// return null, otherwise return a pointer to the slot it would take. If a 738/// node already exists with these operands, the slot will be non-null. 739SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 740 const SDValue *Ops,unsigned NumOps, 741 void *&InsertPos) { 742 if (doNotCSE(N)) 743 return 0; 744 745 FoldingSetNodeID ID; 746 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 747 AddNodeIDCustom(ID, N); 748 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 749} 750 751/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 752void SelectionDAG::VerifyNode(SDNode *N) { 753 switch (N->getOpcode()) { 754 default: 755 break; 756 case ISD::BUILD_PAIR: { 757 EVT VT = N->getValueType(0); 758 assert(N->getNumValues() == 1 && "Too many results!"); 759 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 760 "Wrong return type!"); 761 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 762 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 763 "Mismatched operand types!"); 764 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 765 "Wrong operand type!"); 766 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 767 "Wrong return type size"); 768 break; 769 } 770 case ISD::BUILD_VECTOR: { 771 assert(N->getNumValues() == 1 && "Too many results!"); 772 assert(N->getValueType(0).isVector() && "Wrong return type!"); 773 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 774 "Wrong number of operands!"); 775 EVT EltVT = N->getValueType(0).getVectorElementType(); 776 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 777 assert((I->getValueType() == EltVT || 778 (EltVT.isInteger() && I->getValueType().isInteger() && 779 EltVT.bitsLE(I->getValueType()))) && 780 "Wrong operand type!"); 781 break; 782 } 783 } 784} 785 786/// getEVTAlignment - Compute the default alignment value for the 787/// given type. 788/// 789unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 790 const Type *Ty = VT == MVT::iPTR ? 791 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 792 VT.getTypeForEVT(*getContext()); 793 794 return TLI.getTargetData()->getABITypeAlignment(Ty); 795} 796 797// EntryNode could meaningfully have debug info if we can find it... 798SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 799 : TLI(tli), FLI(fli), DW(0), 800 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 801 getVTList(MVT::Other)), Root(getEntryNode()) { 802 AllNodes.push_back(&EntryNode); 803} 804 805void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 806 DwarfWriter *dw) { 807 MF = &mf; 808 MMI = mmi; 809 DW = dw; 810 Context = &mf.getFunction()->getContext(); 811} 812 813SelectionDAG::~SelectionDAG() { 814 allnodes_clear(); 815} 816 817void SelectionDAG::allnodes_clear() { 818 assert(&*AllNodes.begin() == &EntryNode); 819 AllNodes.remove(AllNodes.begin()); 820 while (!AllNodes.empty()) 821 DeallocateNode(AllNodes.begin()); 822} 823 824void SelectionDAG::clear() { 825 allnodes_clear(); 826 OperandAllocator.Reset(); 827 CSEMap.clear(); 828 829 ExtendedValueTypeNodes.clear(); 830 ExternalSymbols.clear(); 831 TargetExternalSymbols.clear(); 832 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 833 static_cast<CondCodeSDNode*>(0)); 834 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 835 static_cast<SDNode*>(0)); 836 837 EntryNode.UseList = 0; 838 AllNodes.push_back(&EntryNode); 839 Root = getEntryNode(); 840} 841 842SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 843 return VT.bitsGT(Op.getValueType()) ? 844 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 845 getNode(ISD::TRUNCATE, DL, VT, Op); 846} 847 848SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 849 return VT.bitsGT(Op.getValueType()) ? 850 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 851 getNode(ISD::TRUNCATE, DL, VT, Op); 852} 853 854SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 855 if (Op.getValueType() == VT) return Op; 856 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 857 VT.getSizeInBits()); 858 return getNode(ISD::AND, DL, Op.getValueType(), Op, 859 getConstant(Imm, Op.getValueType())); 860} 861 862/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 863/// 864SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 865 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 866 SDValue NegOne = 867 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 868 return getNode(ISD::XOR, DL, VT, Val, NegOne); 869} 870 871SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 872 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 873 assert((EltVT.getSizeInBits() >= 64 || 874 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 875 "getConstant with a uint64_t value that doesn't fit in the type!"); 876 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 877} 878 879SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 880 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 881} 882 883SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 884 assert(VT.isInteger() && "Cannot create FP integer constant!"); 885 886 EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 887 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 888 "APInt size does not match type size!"); 889 890 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 891 FoldingSetNodeID ID; 892 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 893 ID.AddPointer(&Val); 894 void *IP = 0; 895 SDNode *N = NULL; 896 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 897 if (!VT.isVector()) 898 return SDValue(N, 0); 899 if (!N) { 900 N = NodeAllocator.Allocate<ConstantSDNode>(); 901 new (N) ConstantSDNode(isT, &Val, EltVT); 902 CSEMap.InsertNode(N, IP); 903 AllNodes.push_back(N); 904 } 905 906 SDValue Result(N, 0); 907 if (VT.isVector()) { 908 SmallVector<SDValue, 8> Ops; 909 Ops.assign(VT.getVectorNumElements(), Result); 910 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 911 VT, &Ops[0], Ops.size()); 912 } 913 return Result; 914} 915 916SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 917 return getConstant(Val, TLI.getPointerTy(), isTarget); 918} 919 920 921SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 922 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 923} 924 925SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 926 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 927 928 EVT EltVT = 929 VT.isVector() ? VT.getVectorElementType() : VT; 930 931 // Do the map lookup using the actual bit pattern for the floating point 932 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 933 // we don't have issues with SNANs. 934 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 935 FoldingSetNodeID ID; 936 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 937 ID.AddPointer(&V); 938 void *IP = 0; 939 SDNode *N = NULL; 940 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 941 if (!VT.isVector()) 942 return SDValue(N, 0); 943 if (!N) { 944 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 945 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 946 CSEMap.InsertNode(N, IP); 947 AllNodes.push_back(N); 948 } 949 950 SDValue Result(N, 0); 951 if (VT.isVector()) { 952 SmallVector<SDValue, 8> Ops; 953 Ops.assign(VT.getVectorNumElements(), Result); 954 // FIXME DebugLoc info might be appropriate here 955 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 956 VT, &Ops[0], Ops.size()); 957 } 958 return Result; 959} 960 961SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 962 EVT EltVT = 963 VT.isVector() ? VT.getVectorElementType() : VT; 964 if (EltVT==MVT::f32) 965 return getConstantFP(APFloat((float)Val), VT, isTarget); 966 else 967 return getConstantFP(APFloat(Val), VT, isTarget); 968} 969 970SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 971 EVT VT, int64_t Offset, 972 bool isTargetGA, 973 unsigned char TargetFlags) { 974 assert((TargetFlags == 0 || isTargetGA) && 975 "Cannot set target flags on target-independent globals"); 976 977 // Truncate (with sign-extension) the offset value to the pointer size. 978 EVT PTy = TLI.getPointerTy(); 979 unsigned BitWidth = PTy.getSizeInBits(); 980 if (BitWidth < 64) 981 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 982 983 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 984 if (!GVar) { 985 // If GV is an alias then use the aliasee for determining thread-localness. 986 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 987 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 988 } 989 990 unsigned Opc; 991 if (GVar && GVar->isThreadLocal()) 992 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 993 else 994 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 995 996 FoldingSetNodeID ID; 997 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 998 ID.AddPointer(GV); 999 ID.AddInteger(Offset); 1000 ID.AddInteger(TargetFlags); 1001 void *IP = 0; 1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1003 return SDValue(E, 0); 1004 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 1005 new (N) GlobalAddressSDNode(Opc, GV, VT, Offset, TargetFlags); 1006 CSEMap.InsertNode(N, IP); 1007 AllNodes.push_back(N); 1008 return SDValue(N, 0); 1009} 1010 1011SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1012 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1013 FoldingSetNodeID ID; 1014 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1015 ID.AddInteger(FI); 1016 void *IP = 0; 1017 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1018 return SDValue(E, 0); 1019 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1020 new (N) FrameIndexSDNode(FI, VT, isTarget); 1021 CSEMap.InsertNode(N, IP); 1022 AllNodes.push_back(N); 1023 return SDValue(N, 0); 1024} 1025 1026SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1027 unsigned char TargetFlags) { 1028 assert((TargetFlags == 0 || isTarget) && 1029 "Cannot set target flags on target-independent jump tables"); 1030 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1031 FoldingSetNodeID ID; 1032 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1033 ID.AddInteger(JTI); 1034 ID.AddInteger(TargetFlags); 1035 void *IP = 0; 1036 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1037 return SDValue(E, 0); 1038 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1039 new (N) JumpTableSDNode(JTI, VT, isTarget, TargetFlags); 1040 CSEMap.InsertNode(N, IP); 1041 AllNodes.push_back(N); 1042 return SDValue(N, 0); 1043} 1044 1045SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1046 unsigned Alignment, int Offset, 1047 bool isTarget, 1048 unsigned char TargetFlags) { 1049 assert((TargetFlags == 0 || isTarget) && 1050 "Cannot set target flags on target-independent globals"); 1051 if (Alignment == 0) 1052 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1053 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1054 FoldingSetNodeID ID; 1055 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1056 ID.AddInteger(Alignment); 1057 ID.AddInteger(Offset); 1058 ID.AddPointer(C); 1059 ID.AddInteger(TargetFlags); 1060 void *IP = 0; 1061 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1062 return SDValue(E, 0); 1063 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1064 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1065 CSEMap.InsertNode(N, IP); 1066 AllNodes.push_back(N); 1067 return SDValue(N, 0); 1068} 1069 1070 1071SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1072 unsigned Alignment, int Offset, 1073 bool isTarget, 1074 unsigned char TargetFlags) { 1075 assert((TargetFlags == 0 || isTarget) && 1076 "Cannot set target flags on target-independent globals"); 1077 if (Alignment == 0) 1078 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1079 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1080 FoldingSetNodeID ID; 1081 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1082 ID.AddInteger(Alignment); 1083 ID.AddInteger(Offset); 1084 C->AddSelectionDAGCSEId(ID); 1085 ID.AddInteger(TargetFlags); 1086 void *IP = 0; 1087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1088 return SDValue(E, 0); 1089 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1090 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment, TargetFlags); 1091 CSEMap.InsertNode(N, IP); 1092 AllNodes.push_back(N); 1093 return SDValue(N, 0); 1094} 1095 1096SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1097 FoldingSetNodeID ID; 1098 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1099 ID.AddPointer(MBB); 1100 void *IP = 0; 1101 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1102 return SDValue(E, 0); 1103 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1104 new (N) BasicBlockSDNode(MBB); 1105 CSEMap.InsertNode(N, IP); 1106 AllNodes.push_back(N); 1107 return SDValue(N, 0); 1108} 1109 1110SDValue SelectionDAG::getValueType(EVT VT) { 1111 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1112 ValueTypeNodes.size()) 1113 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1114 1115 SDNode *&N = VT.isExtended() ? 1116 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1117 1118 if (N) return SDValue(N, 0); 1119 N = NodeAllocator.Allocate<VTSDNode>(); 1120 new (N) VTSDNode(VT); 1121 AllNodes.push_back(N); 1122 return SDValue(N, 0); 1123} 1124 1125SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1126 SDNode *&N = ExternalSymbols[Sym]; 1127 if (N) return SDValue(N, 0); 1128 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1129 new (N) ExternalSymbolSDNode(false, Sym, 0, VT); 1130 AllNodes.push_back(N); 1131 return SDValue(N, 0); 1132} 1133 1134SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1135 unsigned char TargetFlags) { 1136 SDNode *&N = 1137 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1138 TargetFlags)]; 1139 if (N) return SDValue(N, 0); 1140 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1141 new (N) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1142 AllNodes.push_back(N); 1143 return SDValue(N, 0); 1144} 1145 1146SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1147 if ((unsigned)Cond >= CondCodeNodes.size()) 1148 CondCodeNodes.resize(Cond+1); 1149 1150 if (CondCodeNodes[Cond] == 0) { 1151 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1152 new (N) CondCodeSDNode(Cond); 1153 CondCodeNodes[Cond] = N; 1154 AllNodes.push_back(N); 1155 } 1156 return SDValue(CondCodeNodes[Cond], 0); 1157} 1158 1159// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1160// the shuffle mask M that point at N1 to point at N2, and indices that point 1161// N2 to point at N1. 1162static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1163 std::swap(N1, N2); 1164 int NElts = M.size(); 1165 for (int i = 0; i != NElts; ++i) { 1166 if (M[i] >= NElts) 1167 M[i] -= NElts; 1168 else if (M[i] >= 0) 1169 M[i] += NElts; 1170 } 1171} 1172 1173SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1174 SDValue N2, const int *Mask) { 1175 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1176 assert(VT.isVector() && N1.getValueType().isVector() && 1177 "Vector Shuffle VTs must be a vectors"); 1178 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1179 && "Vector Shuffle VTs must have same element type"); 1180 1181 // Canonicalize shuffle undef, undef -> undef 1182 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1183 return getUNDEF(VT); 1184 1185 // Validate that all indices in Mask are within the range of the elements 1186 // input to the shuffle. 1187 unsigned NElts = VT.getVectorNumElements(); 1188 SmallVector<int, 8> MaskVec; 1189 for (unsigned i = 0; i != NElts; ++i) { 1190 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1191 MaskVec.push_back(Mask[i]); 1192 } 1193 1194 // Canonicalize shuffle v, v -> v, undef 1195 if (N1 == N2) { 1196 N2 = getUNDEF(VT); 1197 for (unsigned i = 0; i != NElts; ++i) 1198 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1199 } 1200 1201 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1202 if (N1.getOpcode() == ISD::UNDEF) 1203 commuteShuffle(N1, N2, MaskVec); 1204 1205 // Canonicalize all index into lhs, -> shuffle lhs, undef 1206 // Canonicalize all index into rhs, -> shuffle rhs, undef 1207 bool AllLHS = true, AllRHS = true; 1208 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1209 for (unsigned i = 0; i != NElts; ++i) { 1210 if (MaskVec[i] >= (int)NElts) { 1211 if (N2Undef) 1212 MaskVec[i] = -1; 1213 else 1214 AllLHS = false; 1215 } else if (MaskVec[i] >= 0) { 1216 AllRHS = false; 1217 } 1218 } 1219 if (AllLHS && AllRHS) 1220 return getUNDEF(VT); 1221 if (AllLHS && !N2Undef) 1222 N2 = getUNDEF(VT); 1223 if (AllRHS) { 1224 N1 = getUNDEF(VT); 1225 commuteShuffle(N1, N2, MaskVec); 1226 } 1227 1228 // If Identity shuffle, or all shuffle in to undef, return that node. 1229 bool AllUndef = true; 1230 bool Identity = true; 1231 for (unsigned i = 0; i != NElts; ++i) { 1232 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1233 if (MaskVec[i] >= 0) AllUndef = false; 1234 } 1235 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1236 return N1; 1237 if (AllUndef) 1238 return getUNDEF(VT); 1239 1240 FoldingSetNodeID ID; 1241 SDValue Ops[2] = { N1, N2 }; 1242 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1243 for (unsigned i = 0; i != NElts; ++i) 1244 ID.AddInteger(MaskVec[i]); 1245 1246 void* IP = 0; 1247 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1248 return SDValue(E, 0); 1249 1250 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1251 // SDNode doesn't have access to it. This memory will be "leaked" when 1252 // the node is deallocated, but recovered when the NodeAllocator is released. 1253 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1254 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1255 1256 ShuffleVectorSDNode *N = NodeAllocator.Allocate<ShuffleVectorSDNode>(); 1257 new (N) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1258 CSEMap.InsertNode(N, IP); 1259 AllNodes.push_back(N); 1260 return SDValue(N, 0); 1261} 1262 1263SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1264 SDValue Val, SDValue DTy, 1265 SDValue STy, SDValue Rnd, SDValue Sat, 1266 ISD::CvtCode Code) { 1267 // If the src and dest types are the same and the conversion is between 1268 // integer types of the same sign or two floats, no conversion is necessary. 1269 if (DTy == STy && 1270 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1271 return Val; 1272 1273 FoldingSetNodeID ID; 1274 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1275 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1276 void* IP = 0; 1277 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1278 return SDValue(E, 0); 1279 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1280 new (N) CvtRndSatSDNode(VT, dl, Ops, 5, Code); 1281 CSEMap.InsertNode(N, IP); 1282 AllNodes.push_back(N); 1283 return SDValue(N, 0); 1284} 1285 1286SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1287 FoldingSetNodeID ID; 1288 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1289 ID.AddInteger(RegNo); 1290 void *IP = 0; 1291 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1292 return SDValue(E, 0); 1293 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1294 new (N) RegisterSDNode(RegNo, VT); 1295 CSEMap.InsertNode(N, IP); 1296 AllNodes.push_back(N); 1297 return SDValue(N, 0); 1298} 1299 1300SDValue SelectionDAG::getDbgStopPoint(DebugLoc DL, SDValue Root, 1301 unsigned Line, unsigned Col, 1302 MDNode *CU) { 1303 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1304 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1305 N->setDebugLoc(DL); 1306 AllNodes.push_back(N); 1307 return SDValue(N, 0); 1308} 1309 1310SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1311 SDValue Root, 1312 unsigned LabelID) { 1313 FoldingSetNodeID ID; 1314 SDValue Ops[] = { Root }; 1315 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1316 ID.AddInteger(LabelID); 1317 void *IP = 0; 1318 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1319 return SDValue(E, 0); 1320 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1321 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1322 CSEMap.InsertNode(N, IP); 1323 AllNodes.push_back(N); 1324 return SDValue(N, 0); 1325} 1326 1327SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1328 bool isTarget, 1329 unsigned char TargetFlags) { 1330 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1331 1332 FoldingSetNodeID ID; 1333 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1334 ID.AddPointer(BA); 1335 ID.AddInteger(TargetFlags); 1336 void *IP = 0; 1337 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1338 return SDValue(E, 0); 1339 SDNode *N = NodeAllocator.Allocate<BlockAddressSDNode>(); 1340 new (N) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1341 CSEMap.InsertNode(N, IP); 1342 AllNodes.push_back(N); 1343 return SDValue(N, 0); 1344} 1345 1346SDValue SelectionDAG::getSrcValue(const Value *V) { 1347 assert((!V || isa<PointerType>(V->getType())) && 1348 "SrcValue is not a pointer?"); 1349 1350 FoldingSetNodeID ID; 1351 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1352 ID.AddPointer(V); 1353 1354 void *IP = 0; 1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1356 return SDValue(E, 0); 1357 1358 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1359 new (N) SrcValueSDNode(V); 1360 CSEMap.InsertNode(N, IP); 1361 AllNodes.push_back(N); 1362 return SDValue(N, 0); 1363} 1364 1365/// getShiftAmountOperand - Return the specified value casted to 1366/// the target's desired shift amount type. 1367SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1368 EVT OpTy = Op.getValueType(); 1369 MVT ShTy = TLI.getShiftAmountTy(); 1370 if (OpTy == ShTy || OpTy.isVector()) return Op; 1371 1372 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1373 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1374} 1375 1376/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1377/// specified value type. 1378SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1379 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1380 unsigned ByteSize = VT.getStoreSize(); 1381 const Type *Ty = VT.getTypeForEVT(*getContext()); 1382 unsigned StackAlign = 1383 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1384 1385 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1386 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1387} 1388 1389/// CreateStackTemporary - Create a stack temporary suitable for holding 1390/// either of the specified value types. 1391SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1392 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1393 VT2.getStoreSizeInBits())/8; 1394 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1395 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1396 const TargetData *TD = TLI.getTargetData(); 1397 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1398 TD->getPrefTypeAlignment(Ty2)); 1399 1400 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1401 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1402 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1403} 1404 1405SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1406 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1407 // These setcc operations always fold. 1408 switch (Cond) { 1409 default: break; 1410 case ISD::SETFALSE: 1411 case ISD::SETFALSE2: return getConstant(0, VT); 1412 case ISD::SETTRUE: 1413 case ISD::SETTRUE2: return getConstant(1, VT); 1414 1415 case ISD::SETOEQ: 1416 case ISD::SETOGT: 1417 case ISD::SETOGE: 1418 case ISD::SETOLT: 1419 case ISD::SETOLE: 1420 case ISD::SETONE: 1421 case ISD::SETO: 1422 case ISD::SETUO: 1423 case ISD::SETUEQ: 1424 case ISD::SETUNE: 1425 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1426 break; 1427 } 1428 1429 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1430 const APInt &C2 = N2C->getAPIntValue(); 1431 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1432 const APInt &C1 = N1C->getAPIntValue(); 1433 1434 switch (Cond) { 1435 default: llvm_unreachable("Unknown integer setcc!"); 1436 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1437 case ISD::SETNE: return getConstant(C1 != C2, VT); 1438 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1439 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1440 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1441 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1442 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1443 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1444 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1445 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1446 } 1447 } 1448 } 1449 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1450 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1451 // No compile time operations on this type yet. 1452 if (N1C->getValueType(0) == MVT::ppcf128) 1453 return SDValue(); 1454 1455 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1456 switch (Cond) { 1457 default: break; 1458 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1459 return getUNDEF(VT); 1460 // fall through 1461 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1462 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1463 return getUNDEF(VT); 1464 // fall through 1465 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1466 R==APFloat::cmpLessThan, VT); 1467 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1468 return getUNDEF(VT); 1469 // fall through 1470 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1471 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1472 return getUNDEF(VT); 1473 // fall through 1474 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1475 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1476 return getUNDEF(VT); 1477 // fall through 1478 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1479 R==APFloat::cmpEqual, VT); 1480 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1481 return getUNDEF(VT); 1482 // fall through 1483 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1484 R==APFloat::cmpEqual, VT); 1485 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1486 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1487 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1488 R==APFloat::cmpEqual, VT); 1489 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1490 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1491 R==APFloat::cmpLessThan, VT); 1492 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1493 R==APFloat::cmpUnordered, VT); 1494 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1495 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1496 } 1497 } else { 1498 // Ensure that the constant occurs on the RHS. 1499 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1500 } 1501 } 1502 1503 // Could not fold it. 1504 return SDValue(); 1505} 1506 1507/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1508/// use this predicate to simplify operations downstream. 1509bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1510 // This predicate is not safe for vector operations. 1511 if (Op.getValueType().isVector()) 1512 return false; 1513 1514 unsigned BitWidth = Op.getValueSizeInBits(); 1515 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1516} 1517 1518/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1519/// this predicate to simplify operations downstream. Mask is known to be zero 1520/// for bits that V cannot have. 1521bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1522 unsigned Depth) const { 1523 APInt KnownZero, KnownOne; 1524 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1525 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1526 return (KnownZero & Mask) == Mask; 1527} 1528 1529/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1530/// known to be either zero or one and return them in the KnownZero/KnownOne 1531/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1532/// processing. 1533void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1534 APInt &KnownZero, APInt &KnownOne, 1535 unsigned Depth) const { 1536 unsigned BitWidth = Mask.getBitWidth(); 1537 assert(BitWidth == Op.getValueType().getSizeInBits() && 1538 "Mask size mismatches value type size!"); 1539 1540 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1541 if (Depth == 6 || Mask == 0) 1542 return; // Limit search depth. 1543 1544 APInt KnownZero2, KnownOne2; 1545 1546 switch (Op.getOpcode()) { 1547 case ISD::Constant: 1548 // We know all of the bits for a constant! 1549 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1550 KnownZero = ~KnownOne & Mask; 1551 return; 1552 case ISD::AND: 1553 // If either the LHS or the RHS are Zero, the result is zero. 1554 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1555 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1556 KnownZero2, KnownOne2, Depth+1); 1557 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1558 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1559 1560 // Output known-1 bits are only known if set in both the LHS & RHS. 1561 KnownOne &= KnownOne2; 1562 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1563 KnownZero |= KnownZero2; 1564 return; 1565 case ISD::OR: 1566 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1567 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1568 KnownZero2, KnownOne2, Depth+1); 1569 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1570 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1571 1572 // Output known-0 bits are only known if clear in both the LHS & RHS. 1573 KnownZero &= KnownZero2; 1574 // Output known-1 are known to be set if set in either the LHS | RHS. 1575 KnownOne |= KnownOne2; 1576 return; 1577 case ISD::XOR: { 1578 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1579 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1580 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1581 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1582 1583 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1584 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1585 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1586 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1587 KnownZero = KnownZeroOut; 1588 return; 1589 } 1590 case ISD::MUL: { 1591 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1592 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1593 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1594 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1595 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1596 1597 // If low bits are zero in either operand, output low known-0 bits. 1598 // Also compute a conserative estimate for high known-0 bits. 1599 // More trickiness is possible, but this is sufficient for the 1600 // interesting case of alignment computation. 1601 KnownOne.clear(); 1602 unsigned TrailZ = KnownZero.countTrailingOnes() + 1603 KnownZero2.countTrailingOnes(); 1604 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1605 KnownZero2.countLeadingOnes(), 1606 BitWidth) - BitWidth; 1607 1608 TrailZ = std::min(TrailZ, BitWidth); 1609 LeadZ = std::min(LeadZ, BitWidth); 1610 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1611 APInt::getHighBitsSet(BitWidth, LeadZ); 1612 KnownZero &= Mask; 1613 return; 1614 } 1615 case ISD::UDIV: { 1616 // For the purposes of computing leading zeros we can conservatively 1617 // treat a udiv as a logical right shift by the power of 2 known to 1618 // be less than the denominator. 1619 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1620 ComputeMaskedBits(Op.getOperand(0), 1621 AllOnes, KnownZero2, KnownOne2, Depth+1); 1622 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1623 1624 KnownOne2.clear(); 1625 KnownZero2.clear(); 1626 ComputeMaskedBits(Op.getOperand(1), 1627 AllOnes, KnownZero2, KnownOne2, Depth+1); 1628 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1629 if (RHSUnknownLeadingOnes != BitWidth) 1630 LeadZ = std::min(BitWidth, 1631 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1632 1633 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1634 return; 1635 } 1636 case ISD::SELECT: 1637 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1638 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1641 1642 // Only known if known in both the LHS and RHS. 1643 KnownOne &= KnownOne2; 1644 KnownZero &= KnownZero2; 1645 return; 1646 case ISD::SELECT_CC: 1647 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1648 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1649 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1650 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1651 1652 // Only known if known in both the LHS and RHS. 1653 KnownOne &= KnownOne2; 1654 KnownZero &= KnownZero2; 1655 return; 1656 case ISD::SADDO: 1657 case ISD::UADDO: 1658 case ISD::SSUBO: 1659 case ISD::USUBO: 1660 case ISD::SMULO: 1661 case ISD::UMULO: 1662 if (Op.getResNo() != 1) 1663 return; 1664 // The boolean result conforms to getBooleanContents. Fall through. 1665 case ISD::SETCC: 1666 // If we know the result of a setcc has the top bits zero, use this info. 1667 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1668 BitWidth > 1) 1669 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1670 return; 1671 case ISD::SHL: 1672 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1673 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1674 unsigned ShAmt = SA->getZExtValue(); 1675 1676 // If the shift count is an invalid immediate, don't do anything. 1677 if (ShAmt >= BitWidth) 1678 return; 1679 1680 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1681 KnownZero, KnownOne, Depth+1); 1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1683 KnownZero <<= ShAmt; 1684 KnownOne <<= ShAmt; 1685 // low bits known zero. 1686 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1687 } 1688 return; 1689 case ISD::SRL: 1690 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1691 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1692 unsigned ShAmt = SA->getZExtValue(); 1693 1694 // If the shift count is an invalid immediate, don't do anything. 1695 if (ShAmt >= BitWidth) 1696 return; 1697 1698 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1699 KnownZero, KnownOne, Depth+1); 1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1701 KnownZero = KnownZero.lshr(ShAmt); 1702 KnownOne = KnownOne.lshr(ShAmt); 1703 1704 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1705 KnownZero |= HighBits; // High bits known zero. 1706 } 1707 return; 1708 case ISD::SRA: 1709 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1710 unsigned ShAmt = SA->getZExtValue(); 1711 1712 // If the shift count is an invalid immediate, don't do anything. 1713 if (ShAmt >= BitWidth) 1714 return; 1715 1716 APInt InDemandedMask = (Mask << ShAmt); 1717 // If any of the demanded bits are produced by the sign extension, we also 1718 // demand the input sign bit. 1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1720 if (HighBits.getBoolValue()) 1721 InDemandedMask |= APInt::getSignBit(BitWidth); 1722 1723 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1724 Depth+1); 1725 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1726 KnownZero = KnownZero.lshr(ShAmt); 1727 KnownOne = KnownOne.lshr(ShAmt); 1728 1729 // Handle the sign bits. 1730 APInt SignBit = APInt::getSignBit(BitWidth); 1731 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1732 1733 if (KnownZero.intersects(SignBit)) { 1734 KnownZero |= HighBits; // New bits are known zero. 1735 } else if (KnownOne.intersects(SignBit)) { 1736 KnownOne |= HighBits; // New bits are known one. 1737 } 1738 } 1739 return; 1740 case ISD::SIGN_EXTEND_INREG: { 1741 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1742 unsigned EBits = EVT.getSizeInBits(); 1743 1744 // Sign extension. Compute the demanded bits in the result that are not 1745 // present in the input. 1746 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1747 1748 APInt InSignBit = APInt::getSignBit(EBits); 1749 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1750 1751 // If the sign extended bits are demanded, we know that the sign 1752 // bit is demanded. 1753 InSignBit.zext(BitWidth); 1754 if (NewBits.getBoolValue()) 1755 InputDemandedBits |= InSignBit; 1756 1757 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1758 KnownZero, KnownOne, Depth+1); 1759 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1760 1761 // If the sign bit of the input is known set or clear, then we know the 1762 // top bits of the result. 1763 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1764 KnownZero |= NewBits; 1765 KnownOne &= ~NewBits; 1766 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1767 KnownOne |= NewBits; 1768 KnownZero &= ~NewBits; 1769 } else { // Input sign bit unknown 1770 KnownZero &= ~NewBits; 1771 KnownOne &= ~NewBits; 1772 } 1773 return; 1774 } 1775 case ISD::CTTZ: 1776 case ISD::CTLZ: 1777 case ISD::CTPOP: { 1778 unsigned LowBits = Log2_32(BitWidth)+1; 1779 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1780 KnownOne.clear(); 1781 return; 1782 } 1783 case ISD::LOAD: { 1784 if (ISD::isZEXTLoad(Op.getNode())) { 1785 LoadSDNode *LD = cast<LoadSDNode>(Op); 1786 EVT VT = LD->getMemoryVT(); 1787 unsigned MemBits = VT.getSizeInBits(); 1788 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1789 } 1790 return; 1791 } 1792 case ISD::ZERO_EXTEND: { 1793 EVT InVT = Op.getOperand(0).getValueType(); 1794 unsigned InBits = InVT.getSizeInBits(); 1795 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1796 APInt InMask = Mask; 1797 InMask.trunc(InBits); 1798 KnownZero.trunc(InBits); 1799 KnownOne.trunc(InBits); 1800 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1801 KnownZero.zext(BitWidth); 1802 KnownOne.zext(BitWidth); 1803 KnownZero |= NewBits; 1804 return; 1805 } 1806 case ISD::SIGN_EXTEND: { 1807 EVT InVT = Op.getOperand(0).getValueType(); 1808 unsigned InBits = InVT.getSizeInBits(); 1809 APInt InSignBit = APInt::getSignBit(InBits); 1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1811 APInt InMask = Mask; 1812 InMask.trunc(InBits); 1813 1814 // If any of the sign extended bits are demanded, we know that the sign 1815 // bit is demanded. Temporarily set this bit in the mask for our callee. 1816 if (NewBits.getBoolValue()) 1817 InMask |= InSignBit; 1818 1819 KnownZero.trunc(InBits); 1820 KnownOne.trunc(InBits); 1821 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1822 1823 // Note if the sign bit is known to be zero or one. 1824 bool SignBitKnownZero = KnownZero.isNegative(); 1825 bool SignBitKnownOne = KnownOne.isNegative(); 1826 assert(!(SignBitKnownZero && SignBitKnownOne) && 1827 "Sign bit can't be known to be both zero and one!"); 1828 1829 // If the sign bit wasn't actually demanded by our caller, we don't 1830 // want it set in the KnownZero and KnownOne result values. Reset the 1831 // mask and reapply it to the result values. 1832 InMask = Mask; 1833 InMask.trunc(InBits); 1834 KnownZero &= InMask; 1835 KnownOne &= InMask; 1836 1837 KnownZero.zext(BitWidth); 1838 KnownOne.zext(BitWidth); 1839 1840 // If the sign bit is known zero or one, the top bits match. 1841 if (SignBitKnownZero) 1842 KnownZero |= NewBits; 1843 else if (SignBitKnownOne) 1844 KnownOne |= NewBits; 1845 return; 1846 } 1847 case ISD::ANY_EXTEND: { 1848 EVT InVT = Op.getOperand(0).getValueType(); 1849 unsigned InBits = InVT.getSizeInBits(); 1850 APInt InMask = Mask; 1851 InMask.trunc(InBits); 1852 KnownZero.trunc(InBits); 1853 KnownOne.trunc(InBits); 1854 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1855 KnownZero.zext(BitWidth); 1856 KnownOne.zext(BitWidth); 1857 return; 1858 } 1859 case ISD::TRUNCATE: { 1860 EVT InVT = Op.getOperand(0).getValueType(); 1861 unsigned InBits = InVT.getSizeInBits(); 1862 APInt InMask = Mask; 1863 InMask.zext(InBits); 1864 KnownZero.zext(InBits); 1865 KnownOne.zext(InBits); 1866 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1867 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1868 KnownZero.trunc(BitWidth); 1869 KnownOne.trunc(BitWidth); 1870 break; 1871 } 1872 case ISD::AssertZext: { 1873 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1874 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1875 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1876 KnownOne, Depth+1); 1877 KnownZero |= (~InMask) & Mask; 1878 return; 1879 } 1880 case ISD::FGETSIGN: 1881 // All bits are zero except the low bit. 1882 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1883 return; 1884 1885 case ISD::SUB: { 1886 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1887 // We know that the top bits of C-X are clear if X contains less bits 1888 // than C (i.e. no wrap-around can happen). For example, 20-X is 1889 // positive if we can prove that X is >= 0 and < 16. 1890 if (CLHS->getAPIntValue().isNonNegative()) { 1891 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1892 // NLZ can't be BitWidth with no sign bit 1893 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1894 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1895 Depth+1); 1896 1897 // If all of the MaskV bits are known to be zero, then we know the 1898 // output top bits are zero, because we now know that the output is 1899 // from [0-C]. 1900 if ((KnownZero2 & MaskV) == MaskV) { 1901 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1902 // Top bits known zero. 1903 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1904 } 1905 } 1906 } 1907 } 1908 // fall through 1909 case ISD::ADD: { 1910 // Output known-0 bits are known if clear or set in both the low clear bits 1911 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1912 // low 3 bits clear. 1913 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1914 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1915 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1916 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1917 1918 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1919 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1920 KnownZeroOut = std::min(KnownZeroOut, 1921 KnownZero2.countTrailingOnes()); 1922 1923 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1924 return; 1925 } 1926 case ISD::SREM: 1927 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1928 const APInt &RA = Rem->getAPIntValue(); 1929 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1930 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1931 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1932 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1933 1934 // If the sign bit of the first operand is zero, the sign bit of 1935 // the result is zero. If the first operand has no one bits below 1936 // the second operand's single 1 bit, its sign will be zero. 1937 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1938 KnownZero2 |= ~LowBits; 1939 1940 KnownZero |= KnownZero2 & Mask; 1941 1942 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1943 } 1944 } 1945 return; 1946 case ISD::UREM: { 1947 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1948 const APInt &RA = Rem->getAPIntValue(); 1949 if (RA.isPowerOf2()) { 1950 APInt LowBits = (RA - 1); 1951 APInt Mask2 = LowBits & Mask; 1952 KnownZero |= ~LowBits & Mask; 1953 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1954 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1955 break; 1956 } 1957 } 1958 1959 // Since the result is less than or equal to either operand, any leading 1960 // zero bits in either operand must also exist in the result. 1961 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1962 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1963 Depth+1); 1964 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1965 Depth+1); 1966 1967 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1968 KnownZero2.countLeadingOnes()); 1969 KnownOne.clear(); 1970 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1971 return; 1972 } 1973 default: 1974 // Allow the target to implement this method for its nodes. 1975 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1976 case ISD::INTRINSIC_WO_CHAIN: 1977 case ISD::INTRINSIC_W_CHAIN: 1978 case ISD::INTRINSIC_VOID: 1979 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1980 Depth); 1981 } 1982 return; 1983 } 1984} 1985 1986/// ComputeNumSignBits - Return the number of times the sign bit of the 1987/// register is replicated into the other bits. We know that at least 1 bit 1988/// is always equal to the sign bit (itself), but other cases can give us 1989/// information. For example, immediately after an "SRA X, 2", we know that 1990/// the top 3 bits are all equal to each other, so we return 3. 1991unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1992 EVT VT = Op.getValueType(); 1993 assert(VT.isInteger() && "Invalid VT!"); 1994 unsigned VTBits = VT.getSizeInBits(); 1995 unsigned Tmp, Tmp2; 1996 unsigned FirstAnswer = 1; 1997 1998 if (Depth == 6) 1999 return 1; // Limit search depth. 2000 2001 switch (Op.getOpcode()) { 2002 default: break; 2003 case ISD::AssertSext: 2004 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2005 return VTBits-Tmp+1; 2006 case ISD::AssertZext: 2007 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2008 return VTBits-Tmp; 2009 2010 case ISD::Constant: { 2011 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2012 // If negative, return # leading ones. 2013 if (Val.isNegative()) 2014 return Val.countLeadingOnes(); 2015 2016 // Return # leading zeros. 2017 return Val.countLeadingZeros(); 2018 } 2019 2020 case ISD::SIGN_EXTEND: 2021 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 2022 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2023 2024 case ISD::SIGN_EXTEND_INREG: 2025 // Max of the input and what this extends. 2026 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2027 Tmp = VTBits-Tmp+1; 2028 2029 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2030 return std::max(Tmp, Tmp2); 2031 2032 case ISD::SRA: 2033 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2034 // SRA X, C -> adds C sign bits. 2035 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2036 Tmp += C->getZExtValue(); 2037 if (Tmp > VTBits) Tmp = VTBits; 2038 } 2039 return Tmp; 2040 case ISD::SHL: 2041 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2042 // shl destroys sign bits. 2043 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2044 if (C->getZExtValue() >= VTBits || // Bad shift. 2045 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2046 return Tmp - C->getZExtValue(); 2047 } 2048 break; 2049 case ISD::AND: 2050 case ISD::OR: 2051 case ISD::XOR: // NOT is handled here. 2052 // Logical binary ops preserve the number of sign bits at the worst. 2053 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2054 if (Tmp != 1) { 2055 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2056 FirstAnswer = std::min(Tmp, Tmp2); 2057 // We computed what we know about the sign bits as our first 2058 // answer. Now proceed to the generic code that uses 2059 // ComputeMaskedBits, and pick whichever answer is better. 2060 } 2061 break; 2062 2063 case ISD::SELECT: 2064 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2065 if (Tmp == 1) return 1; // Early out. 2066 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2067 return std::min(Tmp, Tmp2); 2068 2069 case ISD::SADDO: 2070 case ISD::UADDO: 2071 case ISD::SSUBO: 2072 case ISD::USUBO: 2073 case ISD::SMULO: 2074 case ISD::UMULO: 2075 if (Op.getResNo() != 1) 2076 break; 2077 // The boolean result conforms to getBooleanContents. Fall through. 2078 case ISD::SETCC: 2079 // If setcc returns 0/-1, all bits are sign bits. 2080 if (TLI.getBooleanContents() == 2081 TargetLowering::ZeroOrNegativeOneBooleanContent) 2082 return VTBits; 2083 break; 2084 case ISD::ROTL: 2085 case ISD::ROTR: 2086 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2087 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2088 2089 // Handle rotate right by N like a rotate left by 32-N. 2090 if (Op.getOpcode() == ISD::ROTR) 2091 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2092 2093 // If we aren't rotating out all of the known-in sign bits, return the 2094 // number that are left. This handles rotl(sext(x), 1) for example. 2095 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2096 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2097 } 2098 break; 2099 case ISD::ADD: 2100 // Add can have at most one carry bit. Thus we know that the output 2101 // is, at worst, one more bit than the inputs. 2102 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2103 if (Tmp == 1) return 1; // Early out. 2104 2105 // Special case decrementing a value (ADD X, -1): 2106 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2107 if (CRHS->isAllOnesValue()) { 2108 APInt KnownZero, KnownOne; 2109 APInt Mask = APInt::getAllOnesValue(VTBits); 2110 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2111 2112 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2113 // sign bits set. 2114 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2115 return VTBits; 2116 2117 // If we are subtracting one from a positive number, there is no carry 2118 // out of the result. 2119 if (KnownZero.isNegative()) 2120 return Tmp; 2121 } 2122 2123 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2124 if (Tmp2 == 1) return 1; 2125 return std::min(Tmp, Tmp2)-1; 2126 break; 2127 2128 case ISD::SUB: 2129 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2130 if (Tmp2 == 1) return 1; 2131 2132 // Handle NEG. 2133 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2134 if (CLHS->isNullValue()) { 2135 APInt KnownZero, KnownOne; 2136 APInt Mask = APInt::getAllOnesValue(VTBits); 2137 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2138 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2139 // sign bits set. 2140 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2141 return VTBits; 2142 2143 // If the input is known to be positive (the sign bit is known clear), 2144 // the output of the NEG has the same number of sign bits as the input. 2145 if (KnownZero.isNegative()) 2146 return Tmp2; 2147 2148 // Otherwise, we treat this like a SUB. 2149 } 2150 2151 // Sub can have at most one carry bit. Thus we know that the output 2152 // is, at worst, one more bit than the inputs. 2153 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2154 if (Tmp == 1) return 1; // Early out. 2155 return std::min(Tmp, Tmp2)-1; 2156 break; 2157 case ISD::TRUNCATE: 2158 // FIXME: it's tricky to do anything useful for this, but it is an important 2159 // case for targets like X86. 2160 break; 2161 } 2162 2163 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2164 if (Op.getOpcode() == ISD::LOAD) { 2165 LoadSDNode *LD = cast<LoadSDNode>(Op); 2166 unsigned ExtType = LD->getExtensionType(); 2167 switch (ExtType) { 2168 default: break; 2169 case ISD::SEXTLOAD: // '17' bits known 2170 Tmp = LD->getMemoryVT().getSizeInBits(); 2171 return VTBits-Tmp+1; 2172 case ISD::ZEXTLOAD: // '16' bits known 2173 Tmp = LD->getMemoryVT().getSizeInBits(); 2174 return VTBits-Tmp; 2175 } 2176 } 2177 2178 // Allow the target to implement this method for its nodes. 2179 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2180 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2181 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2182 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2183 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2184 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2185 } 2186 2187 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2188 // use this information. 2189 APInt KnownZero, KnownOne; 2190 APInt Mask = APInt::getAllOnesValue(VTBits); 2191 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2192 2193 if (KnownZero.isNegative()) { // sign bit is 0 2194 Mask = KnownZero; 2195 } else if (KnownOne.isNegative()) { // sign bit is 1; 2196 Mask = KnownOne; 2197 } else { 2198 // Nothing known. 2199 return FirstAnswer; 2200 } 2201 2202 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2203 // the number of identical bits in the top of the input value. 2204 Mask = ~Mask; 2205 Mask <<= Mask.getBitWidth()-VTBits; 2206 // Return # leading zeros. We use 'min' here in case Val was zero before 2207 // shifting. We don't want to return '64' as for an i32 "0". 2208 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2209} 2210 2211bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2212 // If we're told that NaNs won't happen, assume they won't. 2213 if (FiniteOnlyFPMath()) 2214 return true; 2215 2216 // If the value is a constant, we can obviously see if it is a NaN or not. 2217 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2218 return !C->getValueAPF().isNaN(); 2219 2220 // TODO: Recognize more cases here. 2221 2222 return false; 2223} 2224 2225bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2226 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2227 if (!GA) return false; 2228 if (GA->getOffset() != 0) return false; 2229 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2230 if (!GV) return false; 2231 MachineModuleInfo *MMI = getMachineModuleInfo(); 2232 return MMI && MMI->hasDebugInfo(); 2233} 2234 2235 2236/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2237/// element of the result of the vector shuffle. 2238SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2239 unsigned i) { 2240 EVT VT = N->getValueType(0); 2241 DebugLoc dl = N->getDebugLoc(); 2242 if (N->getMaskElt(i) < 0) 2243 return getUNDEF(VT.getVectorElementType()); 2244 unsigned Index = N->getMaskElt(i); 2245 unsigned NumElems = VT.getVectorNumElements(); 2246 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2247 Index %= NumElems; 2248 2249 if (V.getOpcode() == ISD::BIT_CONVERT) { 2250 V = V.getOperand(0); 2251 EVT VVT = V.getValueType(); 2252 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2253 return SDValue(); 2254 } 2255 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2256 return (Index == 0) ? V.getOperand(0) 2257 : getUNDEF(VT.getVectorElementType()); 2258 if (V.getOpcode() == ISD::BUILD_VECTOR) 2259 return V.getOperand(Index); 2260 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2261 return getShuffleScalarElt(SVN, Index); 2262 return SDValue(); 2263} 2264 2265 2266/// getNode - Gets or creates the specified node. 2267/// 2268SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2269 FoldingSetNodeID ID; 2270 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2271 void *IP = 0; 2272 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2273 return SDValue(E, 0); 2274 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2275 new (N) SDNode(Opcode, DL, getVTList(VT)); 2276 CSEMap.InsertNode(N, IP); 2277 2278 AllNodes.push_back(N); 2279#ifndef NDEBUG 2280 VerifyNode(N); 2281#endif 2282 return SDValue(N, 0); 2283} 2284 2285SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2286 EVT VT, SDValue Operand) { 2287 // Constant fold unary operations with an integer constant operand. 2288 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2289 const APInt &Val = C->getAPIntValue(); 2290 unsigned BitWidth = VT.getSizeInBits(); 2291 switch (Opcode) { 2292 default: break; 2293 case ISD::SIGN_EXTEND: 2294 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2295 case ISD::ANY_EXTEND: 2296 case ISD::ZERO_EXTEND: 2297 case ISD::TRUNCATE: 2298 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2299 case ISD::UINT_TO_FP: 2300 case ISD::SINT_TO_FP: { 2301 const uint64_t zero[] = {0, 0}; 2302 // No compile time operations on this type. 2303 if (VT==MVT::ppcf128) 2304 break; 2305 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2306 (void)apf.convertFromAPInt(Val, 2307 Opcode==ISD::SINT_TO_FP, 2308 APFloat::rmNearestTiesToEven); 2309 return getConstantFP(apf, VT); 2310 } 2311 case ISD::BIT_CONVERT: 2312 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2313 return getConstantFP(Val.bitsToFloat(), VT); 2314 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2315 return getConstantFP(Val.bitsToDouble(), VT); 2316 break; 2317 case ISD::BSWAP: 2318 return getConstant(Val.byteSwap(), VT); 2319 case ISD::CTPOP: 2320 return getConstant(Val.countPopulation(), VT); 2321 case ISD::CTLZ: 2322 return getConstant(Val.countLeadingZeros(), VT); 2323 case ISD::CTTZ: 2324 return getConstant(Val.countTrailingZeros(), VT); 2325 } 2326 } 2327 2328 // Constant fold unary operations with a floating point constant operand. 2329 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2330 APFloat V = C->getValueAPF(); // make copy 2331 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2332 switch (Opcode) { 2333 case ISD::FNEG: 2334 V.changeSign(); 2335 return getConstantFP(V, VT); 2336 case ISD::FABS: 2337 V.clearSign(); 2338 return getConstantFP(V, VT); 2339 case ISD::FP_ROUND: 2340 case ISD::FP_EXTEND: { 2341 bool ignored; 2342 // This can return overflow, underflow, or inexact; we don't care. 2343 // FIXME need to be more flexible about rounding mode. 2344 (void)V.convert(*EVTToAPFloatSemantics(VT), 2345 APFloat::rmNearestTiesToEven, &ignored); 2346 return getConstantFP(V, VT); 2347 } 2348 case ISD::FP_TO_SINT: 2349 case ISD::FP_TO_UINT: { 2350 integerPart x[2]; 2351 bool ignored; 2352 assert(integerPartWidth >= 64); 2353 // FIXME need to be more flexible about rounding mode. 2354 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2355 Opcode==ISD::FP_TO_SINT, 2356 APFloat::rmTowardZero, &ignored); 2357 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2358 break; 2359 APInt api(VT.getSizeInBits(), 2, x); 2360 return getConstant(api, VT); 2361 } 2362 case ISD::BIT_CONVERT: 2363 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2364 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2365 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2366 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2367 break; 2368 } 2369 } 2370 } 2371 2372 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2373 switch (Opcode) { 2374 case ISD::TokenFactor: 2375 case ISD::MERGE_VALUES: 2376 case ISD::CONCAT_VECTORS: 2377 return Operand; // Factor, merge or concat of one node? No need. 2378 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2379 case ISD::FP_EXTEND: 2380 assert(VT.isFloatingPoint() && 2381 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2382 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2383 if (Operand.getOpcode() == ISD::UNDEF) 2384 return getUNDEF(VT); 2385 break; 2386 case ISD::SIGN_EXTEND: 2387 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2388 "Invalid SIGN_EXTEND!"); 2389 if (Operand.getValueType() == VT) return Operand; // noop extension 2390 assert(Operand.getValueType().bitsLT(VT) 2391 && "Invalid sext node, dst < src!"); 2392 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2393 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2394 break; 2395 case ISD::ZERO_EXTEND: 2396 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2397 "Invalid ZERO_EXTEND!"); 2398 if (Operand.getValueType() == VT) return Operand; // noop extension 2399 assert(Operand.getValueType().bitsLT(VT) 2400 && "Invalid zext node, dst < src!"); 2401 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2402 return getNode(ISD::ZERO_EXTEND, DL, VT, 2403 Operand.getNode()->getOperand(0)); 2404 break; 2405 case ISD::ANY_EXTEND: 2406 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2407 "Invalid ANY_EXTEND!"); 2408 if (Operand.getValueType() == VT) return Operand; // noop extension 2409 assert(Operand.getValueType().bitsLT(VT) 2410 && "Invalid anyext node, dst < src!"); 2411 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2412 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2413 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2414 break; 2415 case ISD::TRUNCATE: 2416 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2417 "Invalid TRUNCATE!"); 2418 if (Operand.getValueType() == VT) return Operand; // noop truncate 2419 assert(Operand.getValueType().bitsGT(VT) 2420 && "Invalid truncate node, src < dst!"); 2421 if (OpOpcode == ISD::TRUNCATE) 2422 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2423 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2424 OpOpcode == ISD::ANY_EXTEND) { 2425 // If the source is smaller than the dest, we still need an extend. 2426 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2427 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2428 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2429 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2430 else 2431 return Operand.getNode()->getOperand(0); 2432 } 2433 break; 2434 case ISD::BIT_CONVERT: 2435 // Basic sanity checking. 2436 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2437 && "Cannot BIT_CONVERT between types of different sizes!"); 2438 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2439 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2440 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2441 if (OpOpcode == ISD::UNDEF) 2442 return getUNDEF(VT); 2443 break; 2444 case ISD::SCALAR_TO_VECTOR: 2445 assert(VT.isVector() && !Operand.getValueType().isVector() && 2446 (VT.getVectorElementType() == Operand.getValueType() || 2447 (VT.getVectorElementType().isInteger() && 2448 Operand.getValueType().isInteger() && 2449 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2450 "Illegal SCALAR_TO_VECTOR node!"); 2451 if (OpOpcode == ISD::UNDEF) 2452 return getUNDEF(VT); 2453 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2454 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2455 isa<ConstantSDNode>(Operand.getOperand(1)) && 2456 Operand.getConstantOperandVal(1) == 0 && 2457 Operand.getOperand(0).getValueType() == VT) 2458 return Operand.getOperand(0); 2459 break; 2460 case ISD::FNEG: 2461 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2462 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2463 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2464 Operand.getNode()->getOperand(0)); 2465 if (OpOpcode == ISD::FNEG) // --X -> X 2466 return Operand.getNode()->getOperand(0); 2467 break; 2468 case ISD::FABS: 2469 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2470 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2471 break; 2472 } 2473 2474 SDNode *N; 2475 SDVTList VTs = getVTList(VT); 2476 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2477 FoldingSetNodeID ID; 2478 SDValue Ops[1] = { Operand }; 2479 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2480 void *IP = 0; 2481 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2482 return SDValue(E, 0); 2483 N = NodeAllocator.Allocate<UnarySDNode>(); 2484 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2485 CSEMap.InsertNode(N, IP); 2486 } else { 2487 N = NodeAllocator.Allocate<UnarySDNode>(); 2488 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2489 } 2490 2491 AllNodes.push_back(N); 2492#ifndef NDEBUG 2493 VerifyNode(N); 2494#endif 2495 return SDValue(N, 0); 2496} 2497 2498SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2499 EVT VT, 2500 ConstantSDNode *Cst1, 2501 ConstantSDNode *Cst2) { 2502 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2503 2504 switch (Opcode) { 2505 case ISD::ADD: return getConstant(C1 + C2, VT); 2506 case ISD::SUB: return getConstant(C1 - C2, VT); 2507 case ISD::MUL: return getConstant(C1 * C2, VT); 2508 case ISD::UDIV: 2509 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2510 break; 2511 case ISD::UREM: 2512 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2513 break; 2514 case ISD::SDIV: 2515 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2516 break; 2517 case ISD::SREM: 2518 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2519 break; 2520 case ISD::AND: return getConstant(C1 & C2, VT); 2521 case ISD::OR: return getConstant(C1 | C2, VT); 2522 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2523 case ISD::SHL: return getConstant(C1 << C2, VT); 2524 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2525 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2526 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2527 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2528 default: break; 2529 } 2530 2531 return SDValue(); 2532} 2533 2534SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2535 SDValue N1, SDValue N2) { 2536 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2537 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2538 switch (Opcode) { 2539 default: break; 2540 case ISD::TokenFactor: 2541 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2542 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2543 // Fold trivial token factors. 2544 if (N1.getOpcode() == ISD::EntryToken) return N2; 2545 if (N2.getOpcode() == ISD::EntryToken) return N1; 2546 if (N1 == N2) return N1; 2547 break; 2548 case ISD::CONCAT_VECTORS: 2549 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2550 // one big BUILD_VECTOR. 2551 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2552 N2.getOpcode() == ISD::BUILD_VECTOR) { 2553 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2554 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2555 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2556 } 2557 break; 2558 case ISD::AND: 2559 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2560 N1.getValueType() == VT && "Binary operator types must match!"); 2561 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2562 // worth handling here. 2563 if (N2C && N2C->isNullValue()) 2564 return N2; 2565 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2566 return N1; 2567 break; 2568 case ISD::OR: 2569 case ISD::XOR: 2570 case ISD::ADD: 2571 case ISD::SUB: 2572 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2573 N1.getValueType() == VT && "Binary operator types must match!"); 2574 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2575 // it's worth handling here. 2576 if (N2C && N2C->isNullValue()) 2577 return N1; 2578 break; 2579 case ISD::UDIV: 2580 case ISD::UREM: 2581 case ISD::MULHU: 2582 case ISD::MULHS: 2583 case ISD::MUL: 2584 case ISD::SDIV: 2585 case ISD::SREM: 2586 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2587 // fall through 2588 case ISD::FADD: 2589 case ISD::FSUB: 2590 case ISD::FMUL: 2591 case ISD::FDIV: 2592 case ISD::FREM: 2593 if (UnsafeFPMath) { 2594 if (Opcode == ISD::FADD) { 2595 // 0+x --> x 2596 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2597 if (CFP->getValueAPF().isZero()) 2598 return N2; 2599 // x+0 --> x 2600 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2601 if (CFP->getValueAPF().isZero()) 2602 return N1; 2603 } else if (Opcode == ISD::FSUB) { 2604 // x-0 --> x 2605 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2606 if (CFP->getValueAPF().isZero()) 2607 return N1; 2608 } 2609 } 2610 assert(N1.getValueType() == N2.getValueType() && 2611 N1.getValueType() == VT && "Binary operator types must match!"); 2612 break; 2613 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2614 assert(N1.getValueType() == VT && 2615 N1.getValueType().isFloatingPoint() && 2616 N2.getValueType().isFloatingPoint() && 2617 "Invalid FCOPYSIGN!"); 2618 break; 2619 case ISD::SHL: 2620 case ISD::SRA: 2621 case ISD::SRL: 2622 case ISD::ROTL: 2623 case ISD::ROTR: 2624 assert(VT == N1.getValueType() && 2625 "Shift operators return type must be the same as their first arg"); 2626 assert(VT.isInteger() && N2.getValueType().isInteger() && 2627 "Shifts only work on integers"); 2628 2629 // Always fold shifts of i1 values so the code generator doesn't need to 2630 // handle them. Since we know the size of the shift has to be less than the 2631 // size of the value, the shift/rotate count is guaranteed to be zero. 2632 if (VT == MVT::i1) 2633 return N1; 2634 break; 2635 case ISD::FP_ROUND_INREG: { 2636 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2637 assert(VT == N1.getValueType() && "Not an inreg round!"); 2638 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2639 "Cannot FP_ROUND_INREG integer types"); 2640 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2641 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2642 break; 2643 } 2644 case ISD::FP_ROUND: 2645 assert(VT.isFloatingPoint() && 2646 N1.getValueType().isFloatingPoint() && 2647 VT.bitsLE(N1.getValueType()) && 2648 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2649 if (N1.getValueType() == VT) return N1; // noop conversion. 2650 break; 2651 case ISD::AssertSext: 2652 case ISD::AssertZext: { 2653 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2654 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2655 assert(VT.isInteger() && EVT.isInteger() && 2656 "Cannot *_EXTEND_INREG FP types"); 2657 assert(EVT.bitsLE(VT) && "Not extending!"); 2658 if (VT == EVT) return N1; // noop assertion. 2659 break; 2660 } 2661 case ISD::SIGN_EXTEND_INREG: { 2662 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2663 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2664 assert(VT.isInteger() && EVT.isInteger() && 2665 "Cannot *_EXTEND_INREG FP types"); 2666 assert(EVT.bitsLE(VT) && "Not extending!"); 2667 if (EVT == VT) return N1; // Not actually extending 2668 2669 if (N1C) { 2670 APInt Val = N1C->getAPIntValue(); 2671 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2672 Val <<= Val.getBitWidth()-FromBits; 2673 Val = Val.ashr(Val.getBitWidth()-FromBits); 2674 return getConstant(Val, VT); 2675 } 2676 break; 2677 } 2678 case ISD::EXTRACT_VECTOR_ELT: 2679 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2680 if (N1.getOpcode() == ISD::UNDEF) 2681 return getUNDEF(VT); 2682 2683 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2684 // expanding copies of large vectors from registers. 2685 if (N2C && 2686 N1.getOpcode() == ISD::CONCAT_VECTORS && 2687 N1.getNumOperands() > 0) { 2688 unsigned Factor = 2689 N1.getOperand(0).getValueType().getVectorNumElements(); 2690 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2691 N1.getOperand(N2C->getZExtValue() / Factor), 2692 getConstant(N2C->getZExtValue() % Factor, 2693 N2.getValueType())); 2694 } 2695 2696 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2697 // expanding large vector constants. 2698 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2699 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2700 EVT VEltTy = N1.getValueType().getVectorElementType(); 2701 if (Elt.getValueType() != VEltTy) { 2702 // If the vector element type is not legal, the BUILD_VECTOR operands 2703 // are promoted and implicitly truncated. Make that explicit here. 2704 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2705 } 2706 if (VT != VEltTy) { 2707 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2708 // result is implicitly extended. 2709 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2710 } 2711 return Elt; 2712 } 2713 2714 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2715 // operations are lowered to scalars. 2716 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2717 // If the indices are the same, return the inserted element. 2718 if (N1.getOperand(2) == N2) 2719 return N1.getOperand(1); 2720 // If the indices are known different, extract the element from 2721 // the original vector. 2722 else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2723 isa<ConstantSDNode>(N2)) 2724 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2725 } 2726 break; 2727 case ISD::EXTRACT_ELEMENT: 2728 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2729 assert(!N1.getValueType().isVector() && !VT.isVector() && 2730 (N1.getValueType().isInteger() == VT.isInteger()) && 2731 "Wrong types for EXTRACT_ELEMENT!"); 2732 2733 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2734 // 64-bit integers into 32-bit parts. Instead of building the extract of 2735 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2736 if (N1.getOpcode() == ISD::BUILD_PAIR) 2737 return N1.getOperand(N2C->getZExtValue()); 2738 2739 // EXTRACT_ELEMENT of a constant int is also very common. 2740 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2741 unsigned ElementSize = VT.getSizeInBits(); 2742 unsigned Shift = ElementSize * N2C->getZExtValue(); 2743 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2744 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2745 } 2746 break; 2747 case ISD::EXTRACT_SUBVECTOR: 2748 if (N1.getValueType() == VT) // Trivial extraction. 2749 return N1; 2750 break; 2751 } 2752 2753 if (N1C) { 2754 if (N2C) { 2755 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2756 if (SV.getNode()) return SV; 2757 } else { // Cannonicalize constant to RHS if commutative 2758 if (isCommutativeBinOp(Opcode)) { 2759 std::swap(N1C, N2C); 2760 std::swap(N1, N2); 2761 } 2762 } 2763 } 2764 2765 // Constant fold FP operations. 2766 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2767 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2768 if (N1CFP) { 2769 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2770 // Cannonicalize constant to RHS if commutative 2771 std::swap(N1CFP, N2CFP); 2772 std::swap(N1, N2); 2773 } else if (N2CFP && VT != MVT::ppcf128) { 2774 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2775 APFloat::opStatus s; 2776 switch (Opcode) { 2777 case ISD::FADD: 2778 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2779 if (s != APFloat::opInvalidOp) 2780 return getConstantFP(V1, VT); 2781 break; 2782 case ISD::FSUB: 2783 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2784 if (s!=APFloat::opInvalidOp) 2785 return getConstantFP(V1, VT); 2786 break; 2787 case ISD::FMUL: 2788 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2789 if (s!=APFloat::opInvalidOp) 2790 return getConstantFP(V1, VT); 2791 break; 2792 case ISD::FDIV: 2793 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2794 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2795 return getConstantFP(V1, VT); 2796 break; 2797 case ISD::FREM : 2798 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2799 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2800 return getConstantFP(V1, VT); 2801 break; 2802 case ISD::FCOPYSIGN: 2803 V1.copySign(V2); 2804 return getConstantFP(V1, VT); 2805 default: break; 2806 } 2807 } 2808 } 2809 2810 // Canonicalize an UNDEF to the RHS, even over a constant. 2811 if (N1.getOpcode() == ISD::UNDEF) { 2812 if (isCommutativeBinOp(Opcode)) { 2813 std::swap(N1, N2); 2814 } else { 2815 switch (Opcode) { 2816 case ISD::FP_ROUND_INREG: 2817 case ISD::SIGN_EXTEND_INREG: 2818 case ISD::SUB: 2819 case ISD::FSUB: 2820 case ISD::FDIV: 2821 case ISD::FREM: 2822 case ISD::SRA: 2823 return N1; // fold op(undef, arg2) -> undef 2824 case ISD::UDIV: 2825 case ISD::SDIV: 2826 case ISD::UREM: 2827 case ISD::SREM: 2828 case ISD::SRL: 2829 case ISD::SHL: 2830 if (!VT.isVector()) 2831 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2832 // For vectors, we can't easily build an all zero vector, just return 2833 // the LHS. 2834 return N2; 2835 } 2836 } 2837 } 2838 2839 // Fold a bunch of operators when the RHS is undef. 2840 if (N2.getOpcode() == ISD::UNDEF) { 2841 switch (Opcode) { 2842 case ISD::XOR: 2843 if (N1.getOpcode() == ISD::UNDEF) 2844 // Handle undef ^ undef -> 0 special case. This is a common 2845 // idiom (misuse). 2846 return getConstant(0, VT); 2847 // fallthrough 2848 case ISD::ADD: 2849 case ISD::ADDC: 2850 case ISD::ADDE: 2851 case ISD::SUB: 2852 case ISD::UDIV: 2853 case ISD::SDIV: 2854 case ISD::UREM: 2855 case ISD::SREM: 2856 return N2; // fold op(arg1, undef) -> undef 2857 case ISD::FADD: 2858 case ISD::FSUB: 2859 case ISD::FMUL: 2860 case ISD::FDIV: 2861 case ISD::FREM: 2862 if (UnsafeFPMath) 2863 return N2; 2864 break; 2865 case ISD::MUL: 2866 case ISD::AND: 2867 case ISD::SRL: 2868 case ISD::SHL: 2869 if (!VT.isVector()) 2870 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2871 // For vectors, we can't easily build an all zero vector, just return 2872 // the LHS. 2873 return N1; 2874 case ISD::OR: 2875 if (!VT.isVector()) 2876 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2877 // For vectors, we can't easily build an all one vector, just return 2878 // the LHS. 2879 return N1; 2880 case ISD::SRA: 2881 return N1; 2882 } 2883 } 2884 2885 // Memoize this node if possible. 2886 SDNode *N; 2887 SDVTList VTs = getVTList(VT); 2888 if (VT != MVT::Flag) { 2889 SDValue Ops[] = { N1, N2 }; 2890 FoldingSetNodeID ID; 2891 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2892 void *IP = 0; 2893 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2894 return SDValue(E, 0); 2895 N = NodeAllocator.Allocate<BinarySDNode>(); 2896 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2897 CSEMap.InsertNode(N, IP); 2898 } else { 2899 N = NodeAllocator.Allocate<BinarySDNode>(); 2900 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2901 } 2902 2903 AllNodes.push_back(N); 2904#ifndef NDEBUG 2905 VerifyNode(N); 2906#endif 2907 return SDValue(N, 0); 2908} 2909 2910SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2911 SDValue N1, SDValue N2, SDValue N3) { 2912 // Perform various simplifications. 2913 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2914 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2915 switch (Opcode) { 2916 case ISD::CONCAT_VECTORS: 2917 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2918 // one big BUILD_VECTOR. 2919 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2920 N2.getOpcode() == ISD::BUILD_VECTOR && 2921 N3.getOpcode() == ISD::BUILD_VECTOR) { 2922 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2923 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2924 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2925 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2926 } 2927 break; 2928 case ISD::SETCC: { 2929 // Use FoldSetCC to simplify SETCC's. 2930 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2931 if (Simp.getNode()) return Simp; 2932 break; 2933 } 2934 case ISD::SELECT: 2935 if (N1C) { 2936 if (N1C->getZExtValue()) 2937 return N2; // select true, X, Y -> X 2938 else 2939 return N3; // select false, X, Y -> Y 2940 } 2941 2942 if (N2 == N3) return N2; // select C, X, X -> X 2943 break; 2944 case ISD::BRCOND: 2945 if (N2C) { 2946 if (N2C->getZExtValue()) // Unconditional branch 2947 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 2948 else 2949 return N1; // Never-taken branch 2950 } 2951 break; 2952 case ISD::VECTOR_SHUFFLE: 2953 llvm_unreachable("should use getVectorShuffle constructor!"); 2954 break; 2955 case ISD::BIT_CONVERT: 2956 // Fold bit_convert nodes from a type to themselves. 2957 if (N1.getValueType() == VT) 2958 return N1; 2959 break; 2960 } 2961 2962 // Memoize node if it doesn't produce a flag. 2963 SDNode *N; 2964 SDVTList VTs = getVTList(VT); 2965 if (VT != MVT::Flag) { 2966 SDValue Ops[] = { N1, N2, N3 }; 2967 FoldingSetNodeID ID; 2968 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2969 void *IP = 0; 2970 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2971 return SDValue(E, 0); 2972 N = NodeAllocator.Allocate<TernarySDNode>(); 2973 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2974 CSEMap.InsertNode(N, IP); 2975 } else { 2976 N = NodeAllocator.Allocate<TernarySDNode>(); 2977 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2978 } 2979 AllNodes.push_back(N); 2980#ifndef NDEBUG 2981 VerifyNode(N); 2982#endif 2983 return SDValue(N, 0); 2984} 2985 2986SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2987 SDValue N1, SDValue N2, SDValue N3, 2988 SDValue N4) { 2989 SDValue Ops[] = { N1, N2, N3, N4 }; 2990 return getNode(Opcode, DL, VT, Ops, 4); 2991} 2992 2993SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2994 SDValue N1, SDValue N2, SDValue N3, 2995 SDValue N4, SDValue N5) { 2996 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2997 return getNode(Opcode, DL, VT, Ops, 5); 2998} 2999 3000/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3001/// the incoming stack arguments to be loaded from the stack. 3002SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3003 SmallVector<SDValue, 8> ArgChains; 3004 3005 // Include the original chain at the beginning of the list. When this is 3006 // used by target LowerCall hooks, this helps legalize find the 3007 // CALLSEQ_BEGIN node. 3008 ArgChains.push_back(Chain); 3009 3010 // Add a chain value for each stack argument. 3011 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3012 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3013 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3014 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3015 if (FI->getIndex() < 0) 3016 ArgChains.push_back(SDValue(L, 1)); 3017 3018 // Build a tokenfactor for all the chains. 3019 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3020 &ArgChains[0], ArgChains.size()); 3021} 3022 3023/// getMemsetValue - Vectorized representation of the memset value 3024/// operand. 3025static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3026 DebugLoc dl) { 3027 unsigned NumBits = VT.isVector() ? 3028 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 3029 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3030 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3031 unsigned Shift = 8; 3032 for (unsigned i = NumBits; i > 8; i >>= 1) { 3033 Val = (Val << Shift) | Val; 3034 Shift <<= 1; 3035 } 3036 if (VT.isInteger()) 3037 return DAG.getConstant(Val, VT); 3038 return DAG.getConstantFP(APFloat(Val), VT); 3039 } 3040 3041 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3042 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3043 unsigned Shift = 8; 3044 for (unsigned i = NumBits; i > 8; i >>= 1) { 3045 Value = DAG.getNode(ISD::OR, dl, VT, 3046 DAG.getNode(ISD::SHL, dl, VT, Value, 3047 DAG.getConstant(Shift, 3048 TLI.getShiftAmountTy())), 3049 Value); 3050 Shift <<= 1; 3051 } 3052 3053 return Value; 3054} 3055 3056/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3057/// used when a memcpy is turned into a memset when the source is a constant 3058/// string ptr. 3059static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3060 const TargetLowering &TLI, 3061 std::string &Str, unsigned Offset) { 3062 // Handle vector with all elements zero. 3063 if (Str.empty()) { 3064 if (VT.isInteger()) 3065 return DAG.getConstant(0, VT); 3066 unsigned NumElts = VT.getVectorNumElements(); 3067 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3068 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3069 DAG.getConstant(0, 3070 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3071 } 3072 3073 assert(!VT.isVector() && "Can't handle vector type here!"); 3074 unsigned NumBits = VT.getSizeInBits(); 3075 unsigned MSB = NumBits / 8; 3076 uint64_t Val = 0; 3077 if (TLI.isLittleEndian()) 3078 Offset = Offset + MSB - 1; 3079 for (unsigned i = 0; i != MSB; ++i) { 3080 Val = (Val << 8) | (unsigned char)Str[Offset]; 3081 Offset += TLI.isLittleEndian() ? -1 : 1; 3082 } 3083 return DAG.getConstant(Val, VT); 3084} 3085 3086/// getMemBasePlusOffset - Returns base and offset node for the 3087/// 3088static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3089 SelectionDAG &DAG) { 3090 EVT VT = Base.getValueType(); 3091 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3092 VT, Base, DAG.getConstant(Offset, VT)); 3093} 3094 3095/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3096/// 3097static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3098 unsigned SrcDelta = 0; 3099 GlobalAddressSDNode *G = NULL; 3100 if (Src.getOpcode() == ISD::GlobalAddress) 3101 G = cast<GlobalAddressSDNode>(Src); 3102 else if (Src.getOpcode() == ISD::ADD && 3103 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3104 Src.getOperand(1).getOpcode() == ISD::Constant) { 3105 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3106 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3107 } 3108 if (!G) 3109 return false; 3110 3111 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3112 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3113 return true; 3114 3115 return false; 3116} 3117 3118/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3119/// to replace the memset / memcpy is below the threshold. It also returns the 3120/// types of the sequence of memory ops to perform memset / memcpy. 3121static 3122bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3123 SDValue Dst, SDValue Src, 3124 unsigned Limit, uint64_t Size, unsigned &Align, 3125 std::string &Str, bool &isSrcStr, 3126 SelectionDAG &DAG, 3127 const TargetLowering &TLI) { 3128 isSrcStr = isMemSrcFromString(Src, Str); 3129 bool isSrcConst = isa<ConstantSDNode>(Src); 3130 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3131 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT); 3132 if (VT != MVT::iAny) { 3133 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3134 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3135 // If source is a string constant, this will require an unaligned load. 3136 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3137 if (Dst.getOpcode() != ISD::FrameIndex) { 3138 // Can't change destination alignment. It requires a unaligned store. 3139 if (AllowUnalign) 3140 VT = MVT::iAny; 3141 } else { 3142 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3143 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3144 if (MFI->isFixedObjectIndex(FI)) { 3145 // Can't change destination alignment. It requires a unaligned store. 3146 if (AllowUnalign) 3147 VT = MVT::iAny; 3148 } else { 3149 // Give the stack frame object a larger alignment if needed. 3150 if (MFI->getObjectAlignment(FI) < NewAlign) 3151 MFI->setObjectAlignment(FI, NewAlign); 3152 Align = NewAlign; 3153 } 3154 } 3155 } 3156 } 3157 3158 if (VT == MVT::iAny) { 3159 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) { 3160 VT = MVT::i64; 3161 } else { 3162 switch (Align & 7) { 3163 case 0: VT = MVT::i64; break; 3164 case 4: VT = MVT::i32; break; 3165 case 2: VT = MVT::i16; break; 3166 default: VT = MVT::i8; break; 3167 } 3168 } 3169 3170 MVT LVT = MVT::i64; 3171 while (!TLI.isTypeLegal(LVT)) 3172 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3173 assert(LVT.isInteger()); 3174 3175 if (VT.bitsGT(LVT)) 3176 VT = LVT; 3177 } 3178 3179 unsigned NumMemOps = 0; 3180 while (Size != 0) { 3181 unsigned VTSize = VT.getSizeInBits() / 8; 3182 while (VTSize > Size) { 3183 // For now, only use non-vector load / store's for the left-over pieces. 3184 if (VT.isVector()) { 3185 VT = MVT::i64; 3186 while (!TLI.isTypeLegal(VT)) 3187 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3188 VTSize = VT.getSizeInBits() / 8; 3189 } else { 3190 // This can result in a type that is not legal on the target, e.g. 3191 // 1 or 2 bytes on PPC. 3192 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3193 VTSize >>= 1; 3194 } 3195 } 3196 3197 if (++NumMemOps > Limit) 3198 return false; 3199 MemOps.push_back(VT); 3200 Size -= VTSize; 3201 } 3202 3203 return true; 3204} 3205 3206static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3207 SDValue Chain, SDValue Dst, 3208 SDValue Src, uint64_t Size, 3209 unsigned Align, bool AlwaysInline, 3210 const Value *DstSV, uint64_t DstSVOff, 3211 const Value *SrcSV, uint64_t SrcSVOff){ 3212 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3213 3214 // Expand memcpy to a series of load and store ops if the size operand falls 3215 // below a certain threshold. 3216 std::vector<EVT> MemOps; 3217 uint64_t Limit = -1ULL; 3218 if (!AlwaysInline) 3219 Limit = TLI.getMaxStoresPerMemcpy(); 3220 unsigned DstAlign = Align; // Destination alignment can change. 3221 std::string Str; 3222 bool CopyFromStr; 3223 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3224 Str, CopyFromStr, DAG, TLI)) 3225 return SDValue(); 3226 3227 3228 bool isZeroStr = CopyFromStr && Str.empty(); 3229 SmallVector<SDValue, 8> OutChains; 3230 unsigned NumMemOps = MemOps.size(); 3231 uint64_t SrcOff = 0, DstOff = 0; 3232 for (unsigned i = 0; i != NumMemOps; ++i) { 3233 EVT VT = MemOps[i]; 3234 unsigned VTSize = VT.getSizeInBits() / 8; 3235 SDValue Value, Store; 3236 3237 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3238 // It's unlikely a store of a vector immediate can be done in a single 3239 // instruction. It would require a load from a constantpool first. 3240 // We also handle store a vector with all zero's. 3241 // FIXME: Handle other cases where store of vector immediate is done in 3242 // a single instruction. 3243 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3244 Store = DAG.getStore(Chain, dl, Value, 3245 getMemBasePlusOffset(Dst, DstOff, DAG), 3246 DstSV, DstSVOff + DstOff, false, DstAlign); 3247 } else { 3248 // The type might not be legal for the target. This should only happen 3249 // if the type is smaller than a legal type, as on PPC, so the right 3250 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3251 // to Load/Store if NVT==VT. 3252 // FIXME does the case above also need this? 3253 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3254 assert(NVT.bitsGE(VT)); 3255 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3256 getMemBasePlusOffset(Src, SrcOff, DAG), 3257 SrcSV, SrcSVOff + SrcOff, VT, false, Align); 3258 Store = DAG.getTruncStore(Chain, dl, Value, 3259 getMemBasePlusOffset(Dst, DstOff, DAG), 3260 DstSV, DstSVOff + DstOff, VT, false, DstAlign); 3261 } 3262 OutChains.push_back(Store); 3263 SrcOff += VTSize; 3264 DstOff += VTSize; 3265 } 3266 3267 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3268 &OutChains[0], OutChains.size()); 3269} 3270 3271static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3272 SDValue Chain, SDValue Dst, 3273 SDValue Src, uint64_t Size, 3274 unsigned Align, bool AlwaysInline, 3275 const Value *DstSV, uint64_t DstSVOff, 3276 const Value *SrcSV, uint64_t SrcSVOff){ 3277 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3278 3279 // Expand memmove to a series of load and store ops if the size operand falls 3280 // below a certain threshold. 3281 std::vector<EVT> MemOps; 3282 uint64_t Limit = -1ULL; 3283 if (!AlwaysInline) 3284 Limit = TLI.getMaxStoresPerMemmove(); 3285 unsigned DstAlign = Align; // Destination alignment can change. 3286 std::string Str; 3287 bool CopyFromStr; 3288 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3289 Str, CopyFromStr, DAG, TLI)) 3290 return SDValue(); 3291 3292 uint64_t SrcOff = 0, DstOff = 0; 3293 3294 SmallVector<SDValue, 8> LoadValues; 3295 SmallVector<SDValue, 8> LoadChains; 3296 SmallVector<SDValue, 8> OutChains; 3297 unsigned NumMemOps = MemOps.size(); 3298 for (unsigned i = 0; i < NumMemOps; i++) { 3299 EVT VT = MemOps[i]; 3300 unsigned VTSize = VT.getSizeInBits() / 8; 3301 SDValue Value, Store; 3302 3303 Value = DAG.getLoad(VT, dl, Chain, 3304 getMemBasePlusOffset(Src, SrcOff, DAG), 3305 SrcSV, SrcSVOff + SrcOff, false, Align); 3306 LoadValues.push_back(Value); 3307 LoadChains.push_back(Value.getValue(1)); 3308 SrcOff += VTSize; 3309 } 3310 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3311 &LoadChains[0], LoadChains.size()); 3312 OutChains.clear(); 3313 for (unsigned i = 0; i < NumMemOps; i++) { 3314 EVT VT = MemOps[i]; 3315 unsigned VTSize = VT.getSizeInBits() / 8; 3316 SDValue Value, Store; 3317 3318 Store = DAG.getStore(Chain, dl, LoadValues[i], 3319 getMemBasePlusOffset(Dst, DstOff, DAG), 3320 DstSV, DstSVOff + DstOff, false, DstAlign); 3321 OutChains.push_back(Store); 3322 DstOff += VTSize; 3323 } 3324 3325 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3326 &OutChains[0], OutChains.size()); 3327} 3328 3329static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3330 SDValue Chain, SDValue Dst, 3331 SDValue Src, uint64_t Size, 3332 unsigned Align, 3333 const Value *DstSV, uint64_t DstSVOff) { 3334 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3335 3336 // Expand memset to a series of load/store ops if the size operand 3337 // falls below a certain threshold. 3338 std::vector<EVT> MemOps; 3339 std::string Str; 3340 bool CopyFromStr; 3341 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3342 Size, Align, Str, CopyFromStr, DAG, TLI)) 3343 return SDValue(); 3344 3345 SmallVector<SDValue, 8> OutChains; 3346 uint64_t DstOff = 0; 3347 3348 unsigned NumMemOps = MemOps.size(); 3349 for (unsigned i = 0; i < NumMemOps; i++) { 3350 EVT VT = MemOps[i]; 3351 unsigned VTSize = VT.getSizeInBits() / 8; 3352 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3353 SDValue Store = DAG.getStore(Chain, dl, Value, 3354 getMemBasePlusOffset(Dst, DstOff, DAG), 3355 DstSV, DstSVOff + DstOff); 3356 OutChains.push_back(Store); 3357 DstOff += VTSize; 3358 } 3359 3360 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3361 &OutChains[0], OutChains.size()); 3362} 3363 3364SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3365 SDValue Src, SDValue Size, 3366 unsigned Align, bool AlwaysInline, 3367 const Value *DstSV, uint64_t DstSVOff, 3368 const Value *SrcSV, uint64_t SrcSVOff) { 3369 3370 // Check to see if we should lower the memcpy to loads and stores first. 3371 // For cases within the target-specified limits, this is the best choice. 3372 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3373 if (ConstantSize) { 3374 // Memcpy with size zero? Just return the original chain. 3375 if (ConstantSize->isNullValue()) 3376 return Chain; 3377 3378 SDValue Result = 3379 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3380 ConstantSize->getZExtValue(), 3381 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3382 if (Result.getNode()) 3383 return Result; 3384 } 3385 3386 // Then check to see if we should lower the memcpy with target-specific 3387 // code. If the target chooses to do this, this is the next best. 3388 SDValue Result = 3389 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3390 AlwaysInline, 3391 DstSV, DstSVOff, SrcSV, SrcSVOff); 3392 if (Result.getNode()) 3393 return Result; 3394 3395 // If we really need inline code and the target declined to provide it, 3396 // use a (potentially long) sequence of loads and stores. 3397 if (AlwaysInline) { 3398 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3399 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3400 ConstantSize->getZExtValue(), Align, true, 3401 DstSV, DstSVOff, SrcSV, SrcSVOff); 3402 } 3403 3404 // Emit a library call. 3405 TargetLowering::ArgListTy Args; 3406 TargetLowering::ArgListEntry Entry; 3407 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3408 Entry.Node = Dst; Args.push_back(Entry); 3409 Entry.Node = Src; Args.push_back(Entry); 3410 Entry.Node = Size; Args.push_back(Entry); 3411 // FIXME: pass in DebugLoc 3412 std::pair<SDValue,SDValue> CallResult = 3413 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3414 false, false, false, false, 0, 3415 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3416 /*isReturnValueUsed=*/false, 3417 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3418 TLI.getPointerTy()), 3419 Args, *this, dl); 3420 return CallResult.second; 3421} 3422 3423SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3424 SDValue Src, SDValue Size, 3425 unsigned Align, 3426 const Value *DstSV, uint64_t DstSVOff, 3427 const Value *SrcSV, uint64_t SrcSVOff) { 3428 3429 // Check to see if we should lower the memmove to loads and stores first. 3430 // For cases within the target-specified limits, this is the best choice. 3431 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3432 if (ConstantSize) { 3433 // Memmove with size zero? Just return the original chain. 3434 if (ConstantSize->isNullValue()) 3435 return Chain; 3436 3437 SDValue Result = 3438 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3439 ConstantSize->getZExtValue(), 3440 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3441 if (Result.getNode()) 3442 return Result; 3443 } 3444 3445 // Then check to see if we should lower the memmove with target-specific 3446 // code. If the target chooses to do this, this is the next best. 3447 SDValue Result = 3448 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3449 DstSV, DstSVOff, SrcSV, SrcSVOff); 3450 if (Result.getNode()) 3451 return Result; 3452 3453 // Emit a library call. 3454 TargetLowering::ArgListTy Args; 3455 TargetLowering::ArgListEntry Entry; 3456 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3457 Entry.Node = Dst; Args.push_back(Entry); 3458 Entry.Node = Src; Args.push_back(Entry); 3459 Entry.Node = Size; Args.push_back(Entry); 3460 // FIXME: pass in DebugLoc 3461 std::pair<SDValue,SDValue> CallResult = 3462 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3463 false, false, false, false, 0, 3464 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3465 /*isReturnValueUsed=*/false, 3466 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3467 TLI.getPointerTy()), 3468 Args, *this, dl); 3469 return CallResult.second; 3470} 3471 3472SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3473 SDValue Src, SDValue Size, 3474 unsigned Align, 3475 const Value *DstSV, uint64_t DstSVOff) { 3476 3477 // Check to see if we should lower the memset to stores first. 3478 // For cases within the target-specified limits, this is the best choice. 3479 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3480 if (ConstantSize) { 3481 // Memset with size zero? Just return the original chain. 3482 if (ConstantSize->isNullValue()) 3483 return Chain; 3484 3485 SDValue Result = 3486 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3487 Align, DstSV, DstSVOff); 3488 if (Result.getNode()) 3489 return Result; 3490 } 3491 3492 // Then check to see if we should lower the memset with target-specific 3493 // code. If the target chooses to do this, this is the next best. 3494 SDValue Result = 3495 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3496 DstSV, DstSVOff); 3497 if (Result.getNode()) 3498 return Result; 3499 3500 // Emit a library call. 3501 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3502 TargetLowering::ArgListTy Args; 3503 TargetLowering::ArgListEntry Entry; 3504 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3505 Args.push_back(Entry); 3506 // Extend or truncate the argument to be an i32 value for the call. 3507 if (Src.getValueType().bitsGT(MVT::i32)) 3508 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3509 else 3510 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3511 Entry.Node = Src; 3512 Entry.Ty = Type::getInt32Ty(*getContext()); 3513 Entry.isSExt = true; 3514 Args.push_back(Entry); 3515 Entry.Node = Size; 3516 Entry.Ty = IntPtrTy; 3517 Entry.isSExt = false; 3518 Args.push_back(Entry); 3519 // FIXME: pass in DebugLoc 3520 std::pair<SDValue,SDValue> CallResult = 3521 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3522 false, false, false, false, 0, 3523 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3524 /*isReturnValueUsed=*/false, 3525 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3526 TLI.getPointerTy()), 3527 Args, *this, dl); 3528 return CallResult.second; 3529} 3530 3531SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3532 SDValue Chain, 3533 SDValue Ptr, SDValue Cmp, 3534 SDValue Swp, const Value* PtrVal, 3535 unsigned Alignment) { 3536 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3537 Alignment = getEVTAlignment(MemVT); 3538 3539 // Check if the memory reference references a frame index 3540 if (!PtrVal) 3541 if (const FrameIndexSDNode *FI = 3542 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3543 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3544 3545 MachineFunction &MF = getMachineFunction(); 3546 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3547 3548 // For now, atomics are considered to be volatile always. 3549 Flags |= MachineMemOperand::MOVolatile; 3550 3551 MachineMemOperand *MMO = 3552 MF.getMachineMemOperand(PtrVal, Flags, 0, 3553 MemVT.getStoreSize(), Alignment); 3554 3555 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3556} 3557 3558SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3559 SDValue Chain, 3560 SDValue Ptr, SDValue Cmp, 3561 SDValue Swp, MachineMemOperand *MMO) { 3562 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3563 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3564 3565 EVT VT = Cmp.getValueType(); 3566 3567 SDVTList VTs = getVTList(VT, MVT::Other); 3568 FoldingSetNodeID ID; 3569 ID.AddInteger(MemVT.getRawBits()); 3570 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3571 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3572 void* IP = 0; 3573 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3574 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3575 return SDValue(E, 0); 3576 } 3577 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3578 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3579 CSEMap.InsertNode(N, IP); 3580 AllNodes.push_back(N); 3581 return SDValue(N, 0); 3582} 3583 3584SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3585 SDValue Chain, 3586 SDValue Ptr, SDValue Val, 3587 const Value* PtrVal, 3588 unsigned Alignment) { 3589 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3590 Alignment = getEVTAlignment(MemVT); 3591 3592 // Check if the memory reference references a frame index 3593 if (!PtrVal) 3594 if (const FrameIndexSDNode *FI = 3595 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3596 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3597 3598 MachineFunction &MF = getMachineFunction(); 3599 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3600 3601 // For now, atomics are considered to be volatile always. 3602 Flags |= MachineMemOperand::MOVolatile; 3603 3604 MachineMemOperand *MMO = 3605 MF.getMachineMemOperand(PtrVal, Flags, 0, 3606 MemVT.getStoreSize(), Alignment); 3607 3608 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3609} 3610 3611SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3612 SDValue Chain, 3613 SDValue Ptr, SDValue Val, 3614 MachineMemOperand *MMO) { 3615 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3616 Opcode == ISD::ATOMIC_LOAD_SUB || 3617 Opcode == ISD::ATOMIC_LOAD_AND || 3618 Opcode == ISD::ATOMIC_LOAD_OR || 3619 Opcode == ISD::ATOMIC_LOAD_XOR || 3620 Opcode == ISD::ATOMIC_LOAD_NAND || 3621 Opcode == ISD::ATOMIC_LOAD_MIN || 3622 Opcode == ISD::ATOMIC_LOAD_MAX || 3623 Opcode == ISD::ATOMIC_LOAD_UMIN || 3624 Opcode == ISD::ATOMIC_LOAD_UMAX || 3625 Opcode == ISD::ATOMIC_SWAP) && 3626 "Invalid Atomic Op"); 3627 3628 EVT VT = Val.getValueType(); 3629 3630 SDVTList VTs = getVTList(VT, MVT::Other); 3631 FoldingSetNodeID ID; 3632 ID.AddInteger(MemVT.getRawBits()); 3633 SDValue Ops[] = {Chain, Ptr, Val}; 3634 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3635 void* IP = 0; 3636 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3637 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3638 return SDValue(E, 0); 3639 } 3640 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3641 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, Ptr, Val, MMO); 3642 CSEMap.InsertNode(N, IP); 3643 AllNodes.push_back(N); 3644 return SDValue(N, 0); 3645} 3646 3647/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3648/// Allowed to return something different (and simpler) if Simplify is true. 3649SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3650 DebugLoc dl) { 3651 if (NumOps == 1) 3652 return Ops[0]; 3653 3654 SmallVector<EVT, 4> VTs; 3655 VTs.reserve(NumOps); 3656 for (unsigned i = 0; i < NumOps; ++i) 3657 VTs.push_back(Ops[i].getValueType()); 3658 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3659 Ops, NumOps); 3660} 3661 3662SDValue 3663SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3664 const EVT *VTs, unsigned NumVTs, 3665 const SDValue *Ops, unsigned NumOps, 3666 EVT MemVT, const Value *srcValue, int SVOff, 3667 unsigned Align, bool Vol, 3668 bool ReadMem, bool WriteMem) { 3669 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3670 MemVT, srcValue, SVOff, Align, Vol, 3671 ReadMem, WriteMem); 3672} 3673 3674SDValue 3675SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3676 const SDValue *Ops, unsigned NumOps, 3677 EVT MemVT, const Value *srcValue, int SVOff, 3678 unsigned Align, bool Vol, 3679 bool ReadMem, bool WriteMem) { 3680 if (Align == 0) // Ensure that codegen never sees alignment 0 3681 Align = getEVTAlignment(MemVT); 3682 3683 MachineFunction &MF = getMachineFunction(); 3684 unsigned Flags = 0; 3685 if (WriteMem) 3686 Flags |= MachineMemOperand::MOStore; 3687 if (ReadMem) 3688 Flags |= MachineMemOperand::MOLoad; 3689 if (Vol) 3690 Flags |= MachineMemOperand::MOVolatile; 3691 MachineMemOperand *MMO = 3692 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3693 MemVT.getStoreSize(), Align); 3694 3695 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3696} 3697 3698SDValue 3699SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3700 const SDValue *Ops, unsigned NumOps, 3701 EVT MemVT, MachineMemOperand *MMO) { 3702 assert((Opcode == ISD::INTRINSIC_VOID || 3703 Opcode == ISD::INTRINSIC_W_CHAIN || 3704 (Opcode <= INT_MAX && 3705 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3706 "Opcode is not a memory-accessing opcode!"); 3707 3708 // Memoize the node unless it returns a flag. 3709 MemIntrinsicSDNode *N; 3710 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3711 FoldingSetNodeID ID; 3712 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3713 void *IP = 0; 3714 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3715 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3716 return SDValue(E, 0); 3717 } 3718 3719 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3720 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3721 CSEMap.InsertNode(N, IP); 3722 } else { 3723 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3724 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3725 } 3726 AllNodes.push_back(N); 3727 return SDValue(N, 0); 3728} 3729 3730SDValue 3731SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3732 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3733 SDValue Ptr, SDValue Offset, 3734 const Value *SV, int SVOffset, EVT MemVT, 3735 bool isVolatile, unsigned Alignment) { 3736 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3737 Alignment = getEVTAlignment(VT); 3738 3739 // Check if the memory reference references a frame index 3740 if (!SV) 3741 if (const FrameIndexSDNode *FI = 3742 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3743 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3744 3745 MachineFunction &MF = getMachineFunction(); 3746 unsigned Flags = MachineMemOperand::MOLoad; 3747 if (isVolatile) 3748 Flags |= MachineMemOperand::MOVolatile; 3749 MachineMemOperand *MMO = 3750 MF.getMachineMemOperand(SV, Flags, SVOffset, 3751 MemVT.getStoreSize(), Alignment); 3752 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3753} 3754 3755SDValue 3756SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3757 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3758 SDValue Ptr, SDValue Offset, EVT MemVT, 3759 MachineMemOperand *MMO) { 3760 if (VT == MemVT) { 3761 ExtType = ISD::NON_EXTLOAD; 3762 } else if (ExtType == ISD::NON_EXTLOAD) { 3763 assert(VT == MemVT && "Non-extending load from different memory type!"); 3764 } else { 3765 // Extending load. 3766 if (VT.isVector()) 3767 assert(MemVT.getVectorNumElements() == VT.getVectorNumElements() && 3768 "Invalid vector extload!"); 3769 else 3770 assert(MemVT.bitsLT(VT) && 3771 "Should only be an extending load, not truncating!"); 3772 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3773 "Cannot sign/zero extend a FP/Vector load!"); 3774 assert(VT.isInteger() == MemVT.isInteger() && 3775 "Cannot convert from FP to Int or Int -> FP!"); 3776 } 3777 3778 bool Indexed = AM != ISD::UNINDEXED; 3779 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3780 "Unindexed load with an offset!"); 3781 3782 SDVTList VTs = Indexed ? 3783 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3784 SDValue Ops[] = { Chain, Ptr, Offset }; 3785 FoldingSetNodeID ID; 3786 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3787 ID.AddInteger(MemVT.getRawBits()); 3788 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile())); 3789 void *IP = 0; 3790 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3791 cast<LoadSDNode>(E)->refineAlignment(MMO); 3792 return SDValue(E, 0); 3793 } 3794 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3795 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, MemVT, MMO); 3796 CSEMap.InsertNode(N, IP); 3797 AllNodes.push_back(N); 3798 return SDValue(N, 0); 3799} 3800 3801SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3802 SDValue Chain, SDValue Ptr, 3803 const Value *SV, int SVOffset, 3804 bool isVolatile, unsigned Alignment) { 3805 SDValue Undef = getUNDEF(Ptr.getValueType()); 3806 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3807 SV, SVOffset, VT, isVolatile, Alignment); 3808} 3809 3810SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3811 SDValue Chain, SDValue Ptr, 3812 const Value *SV, 3813 int SVOffset, EVT MemVT, 3814 bool isVolatile, unsigned Alignment) { 3815 SDValue Undef = getUNDEF(Ptr.getValueType()); 3816 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3817 SV, SVOffset, MemVT, isVolatile, Alignment); 3818} 3819 3820SDValue 3821SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3822 SDValue Offset, ISD::MemIndexedMode AM) { 3823 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3824 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3825 "Load is already a indexed load!"); 3826 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3827 LD->getChain(), Base, Offset, LD->getSrcValue(), 3828 LD->getSrcValueOffset(), LD->getMemoryVT(), 3829 LD->isVolatile(), LD->getAlignment()); 3830} 3831 3832SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3833 SDValue Ptr, const Value *SV, int SVOffset, 3834 bool isVolatile, unsigned Alignment) { 3835 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3836 Alignment = getEVTAlignment(Val.getValueType()); 3837 3838 // Check if the memory reference references a frame index 3839 if (!SV) 3840 if (const FrameIndexSDNode *FI = 3841 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3842 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3843 3844 MachineFunction &MF = getMachineFunction(); 3845 unsigned Flags = MachineMemOperand::MOStore; 3846 if (isVolatile) 3847 Flags |= MachineMemOperand::MOVolatile; 3848 MachineMemOperand *MMO = 3849 MF.getMachineMemOperand(SV, Flags, SVOffset, 3850 Val.getValueType().getStoreSize(), Alignment); 3851 3852 return getStore(Chain, dl, Val, Ptr, MMO); 3853} 3854 3855SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3856 SDValue Ptr, MachineMemOperand *MMO) { 3857 EVT VT = Val.getValueType(); 3858 SDVTList VTs = getVTList(MVT::Other); 3859 SDValue Undef = getUNDEF(Ptr.getValueType()); 3860 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3861 FoldingSetNodeID ID; 3862 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3863 ID.AddInteger(VT.getRawBits()); 3864 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile())); 3865 void *IP = 0; 3866 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3867 cast<StoreSDNode>(E)->refineAlignment(MMO); 3868 return SDValue(E, 0); 3869 } 3870 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3871 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, VT, MMO); 3872 CSEMap.InsertNode(N, IP); 3873 AllNodes.push_back(N); 3874 return SDValue(N, 0); 3875} 3876 3877SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3878 SDValue Ptr, const Value *SV, 3879 int SVOffset, EVT SVT, 3880 bool isVolatile, unsigned Alignment) { 3881 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3882 Alignment = getEVTAlignment(SVT); 3883 3884 // Check if the memory reference references a frame index 3885 if (!SV) 3886 if (const FrameIndexSDNode *FI = 3887 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3888 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3889 3890 MachineFunction &MF = getMachineFunction(); 3891 unsigned Flags = MachineMemOperand::MOStore; 3892 if (isVolatile) 3893 Flags |= MachineMemOperand::MOVolatile; 3894 MachineMemOperand *MMO = 3895 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 3896 3897 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 3898} 3899 3900SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3901 SDValue Ptr, EVT SVT, 3902 MachineMemOperand *MMO) { 3903 EVT VT = Val.getValueType(); 3904 3905 if (VT == SVT) 3906 return getStore(Chain, dl, Val, Ptr, MMO); 3907 3908 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3909 assert(VT.isInteger() == SVT.isInteger() && 3910 "Can't do FP-INT conversion!"); 3911 3912 3913 SDVTList VTs = getVTList(MVT::Other); 3914 SDValue Undef = getUNDEF(Ptr.getValueType()); 3915 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3916 FoldingSetNodeID ID; 3917 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3918 ID.AddInteger(SVT.getRawBits()); 3919 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile())); 3920 void *IP = 0; 3921 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3922 cast<StoreSDNode>(E)->refineAlignment(MMO); 3923 return SDValue(E, 0); 3924 } 3925 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3926 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, SVT, MMO); 3927 CSEMap.InsertNode(N, IP); 3928 AllNodes.push_back(N); 3929 return SDValue(N, 0); 3930} 3931 3932SDValue 3933SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 3934 SDValue Offset, ISD::MemIndexedMode AM) { 3935 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3936 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3937 "Store is already a indexed store!"); 3938 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3939 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3940 FoldingSetNodeID ID; 3941 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3942 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3943 ID.AddInteger(ST->getRawSubclassData()); 3944 void *IP = 0; 3945 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3946 return SDValue(E, 0); 3947 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3948 new (N) StoreSDNode(Ops, dl, VTs, AM, 3949 ST->isTruncatingStore(), ST->getMemoryVT(), 3950 ST->getMemOperand()); 3951 CSEMap.InsertNode(N, IP); 3952 AllNodes.push_back(N); 3953 return SDValue(N, 0); 3954} 3955 3956SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 3957 SDValue Chain, SDValue Ptr, 3958 SDValue SV) { 3959 SDValue Ops[] = { Chain, Ptr, SV }; 3960 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 3961} 3962 3963SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3964 const SDUse *Ops, unsigned NumOps) { 3965 switch (NumOps) { 3966 case 0: return getNode(Opcode, DL, VT); 3967 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3968 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3969 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3970 default: break; 3971 } 3972 3973 // Copy from an SDUse array into an SDValue array for use with 3974 // the regular getNode logic. 3975 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3976 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 3977} 3978 3979SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3980 const SDValue *Ops, unsigned NumOps) { 3981 switch (NumOps) { 3982 case 0: return getNode(Opcode, DL, VT); 3983 case 1: return getNode(Opcode, DL, VT, Ops[0]); 3984 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 3985 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 3986 default: break; 3987 } 3988 3989 switch (Opcode) { 3990 default: break; 3991 case ISD::SELECT_CC: { 3992 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3993 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3994 "LHS and RHS of condition must have same type!"); 3995 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3996 "True and False arms of SelectCC must have same type!"); 3997 assert(Ops[2].getValueType() == VT && 3998 "select_cc node must be of same type as true and false value!"); 3999 break; 4000 } 4001 case ISD::BR_CC: { 4002 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4003 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4004 "LHS/RHS of comparison should match types!"); 4005 break; 4006 } 4007 } 4008 4009 // Memoize nodes. 4010 SDNode *N; 4011 SDVTList VTs = getVTList(VT); 4012 4013 if (VT != MVT::Flag) { 4014 FoldingSetNodeID ID; 4015 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4016 void *IP = 0; 4017 4018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4019 return SDValue(E, 0); 4020 4021 N = NodeAllocator.Allocate<SDNode>(); 4022 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4023 CSEMap.InsertNode(N, IP); 4024 } else { 4025 N = NodeAllocator.Allocate<SDNode>(); 4026 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4027 } 4028 4029 AllNodes.push_back(N); 4030#ifndef NDEBUG 4031 VerifyNode(N); 4032#endif 4033 return SDValue(N, 0); 4034} 4035 4036SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4037 const std::vector<EVT> &ResultTys, 4038 const SDValue *Ops, unsigned NumOps) { 4039 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4040 Ops, NumOps); 4041} 4042 4043SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4044 const EVT *VTs, unsigned NumVTs, 4045 const SDValue *Ops, unsigned NumOps) { 4046 if (NumVTs == 1) 4047 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4048 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4049} 4050 4051SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4052 const SDValue *Ops, unsigned NumOps) { 4053 if (VTList.NumVTs == 1) 4054 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4055 4056#if 0 4057 switch (Opcode) { 4058 // FIXME: figure out how to safely handle things like 4059 // int foo(int x) { return 1 << (x & 255); } 4060 // int bar() { return foo(256); } 4061 case ISD::SRA_PARTS: 4062 case ISD::SRL_PARTS: 4063 case ISD::SHL_PARTS: 4064 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4065 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4066 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4067 else if (N3.getOpcode() == ISD::AND) 4068 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4069 // If the and is only masking out bits that cannot effect the shift, 4070 // eliminate the and. 4071 unsigned NumBits = VT.getSizeInBits()*2; 4072 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4073 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4074 } 4075 break; 4076 } 4077#endif 4078 4079 // Memoize the node unless it returns a flag. 4080 SDNode *N; 4081 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4082 FoldingSetNodeID ID; 4083 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4084 void *IP = 0; 4085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4086 return SDValue(E, 0); 4087 if (NumOps == 1) { 4088 N = NodeAllocator.Allocate<UnarySDNode>(); 4089 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4090 } else if (NumOps == 2) { 4091 N = NodeAllocator.Allocate<BinarySDNode>(); 4092 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4093 } else if (NumOps == 3) { 4094 N = NodeAllocator.Allocate<TernarySDNode>(); 4095 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4096 } else { 4097 N = NodeAllocator.Allocate<SDNode>(); 4098 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4099 } 4100 CSEMap.InsertNode(N, IP); 4101 } else { 4102 if (NumOps == 1) { 4103 N = NodeAllocator.Allocate<UnarySDNode>(); 4104 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4105 } else if (NumOps == 2) { 4106 N = NodeAllocator.Allocate<BinarySDNode>(); 4107 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4108 } else if (NumOps == 3) { 4109 N = NodeAllocator.Allocate<TernarySDNode>(); 4110 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4111 } else { 4112 N = NodeAllocator.Allocate<SDNode>(); 4113 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4114 } 4115 } 4116 AllNodes.push_back(N); 4117#ifndef NDEBUG 4118 VerifyNode(N); 4119#endif 4120 return SDValue(N, 0); 4121} 4122 4123SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4124 return getNode(Opcode, DL, VTList, 0, 0); 4125} 4126 4127SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4128 SDValue N1) { 4129 SDValue Ops[] = { N1 }; 4130 return getNode(Opcode, DL, VTList, Ops, 1); 4131} 4132 4133SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4134 SDValue N1, SDValue N2) { 4135 SDValue Ops[] = { N1, N2 }; 4136 return getNode(Opcode, DL, VTList, Ops, 2); 4137} 4138 4139SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4140 SDValue N1, SDValue N2, SDValue N3) { 4141 SDValue Ops[] = { N1, N2, N3 }; 4142 return getNode(Opcode, DL, VTList, Ops, 3); 4143} 4144 4145SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4146 SDValue N1, SDValue N2, SDValue N3, 4147 SDValue N4) { 4148 SDValue Ops[] = { N1, N2, N3, N4 }; 4149 return getNode(Opcode, DL, VTList, Ops, 4); 4150} 4151 4152SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4153 SDValue N1, SDValue N2, SDValue N3, 4154 SDValue N4, SDValue N5) { 4155 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4156 return getNode(Opcode, DL, VTList, Ops, 5); 4157} 4158 4159SDVTList SelectionDAG::getVTList(EVT VT) { 4160 return makeVTList(SDNode::getValueTypeList(VT), 1); 4161} 4162 4163SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4164 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4165 E = VTList.rend(); I != E; ++I) 4166 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4167 return *I; 4168 4169 EVT *Array = Allocator.Allocate<EVT>(2); 4170 Array[0] = VT1; 4171 Array[1] = VT2; 4172 SDVTList Result = makeVTList(Array, 2); 4173 VTList.push_back(Result); 4174 return Result; 4175} 4176 4177SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4178 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4179 E = VTList.rend(); I != E; ++I) 4180 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4181 I->VTs[2] == VT3) 4182 return *I; 4183 4184 EVT *Array = Allocator.Allocate<EVT>(3); 4185 Array[0] = VT1; 4186 Array[1] = VT2; 4187 Array[2] = VT3; 4188 SDVTList Result = makeVTList(Array, 3); 4189 VTList.push_back(Result); 4190 return Result; 4191} 4192 4193SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4194 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4195 E = VTList.rend(); I != E; ++I) 4196 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4197 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4198 return *I; 4199 4200 EVT *Array = Allocator.Allocate<EVT>(3); 4201 Array[0] = VT1; 4202 Array[1] = VT2; 4203 Array[2] = VT3; 4204 Array[3] = VT4; 4205 SDVTList Result = makeVTList(Array, 4); 4206 VTList.push_back(Result); 4207 return Result; 4208} 4209 4210SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4211 switch (NumVTs) { 4212 case 0: llvm_unreachable("Cannot have nodes without results!"); 4213 case 1: return getVTList(VTs[0]); 4214 case 2: return getVTList(VTs[0], VTs[1]); 4215 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4216 default: break; 4217 } 4218 4219 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4220 E = VTList.rend(); I != E; ++I) { 4221 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4222 continue; 4223 4224 bool NoMatch = false; 4225 for (unsigned i = 2; i != NumVTs; ++i) 4226 if (VTs[i] != I->VTs[i]) { 4227 NoMatch = true; 4228 break; 4229 } 4230 if (!NoMatch) 4231 return *I; 4232 } 4233 4234 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4235 std::copy(VTs, VTs+NumVTs, Array); 4236 SDVTList Result = makeVTList(Array, NumVTs); 4237 VTList.push_back(Result); 4238 return Result; 4239} 4240 4241 4242/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4243/// specified operands. If the resultant node already exists in the DAG, 4244/// this does not modify the specified node, instead it returns the node that 4245/// already exists. If the resultant node does not exist in the DAG, the 4246/// input node is returned. As a degenerate case, if you specify the same 4247/// input operands as the node already has, the input node is returned. 4248SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4249 SDNode *N = InN.getNode(); 4250 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4251 4252 // Check to see if there is no change. 4253 if (Op == N->getOperand(0)) return InN; 4254 4255 // See if the modified node already exists. 4256 void *InsertPos = 0; 4257 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4258 return SDValue(Existing, InN.getResNo()); 4259 4260 // Nope it doesn't. Remove the node from its current place in the maps. 4261 if (InsertPos) 4262 if (!RemoveNodeFromCSEMaps(N)) 4263 InsertPos = 0; 4264 4265 // Now we update the operands. 4266 N->OperandList[0].set(Op); 4267 4268 // If this gets put into a CSE map, add it. 4269 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4270 return InN; 4271} 4272 4273SDValue SelectionDAG:: 4274UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4275 SDNode *N = InN.getNode(); 4276 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4277 4278 // Check to see if there is no change. 4279 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4280 return InN; // No operands changed, just return the input node. 4281 4282 // See if the modified node already exists. 4283 void *InsertPos = 0; 4284 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4285 return SDValue(Existing, InN.getResNo()); 4286 4287 // Nope it doesn't. Remove the node from its current place in the maps. 4288 if (InsertPos) 4289 if (!RemoveNodeFromCSEMaps(N)) 4290 InsertPos = 0; 4291 4292 // Now we update the operands. 4293 if (N->OperandList[0] != Op1) 4294 N->OperandList[0].set(Op1); 4295 if (N->OperandList[1] != Op2) 4296 N->OperandList[1].set(Op2); 4297 4298 // If this gets put into a CSE map, add it. 4299 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4300 return InN; 4301} 4302 4303SDValue SelectionDAG:: 4304UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4305 SDValue Ops[] = { Op1, Op2, Op3 }; 4306 return UpdateNodeOperands(N, Ops, 3); 4307} 4308 4309SDValue SelectionDAG:: 4310UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4311 SDValue Op3, SDValue Op4) { 4312 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4313 return UpdateNodeOperands(N, Ops, 4); 4314} 4315 4316SDValue SelectionDAG:: 4317UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4318 SDValue Op3, SDValue Op4, SDValue Op5) { 4319 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4320 return UpdateNodeOperands(N, Ops, 5); 4321} 4322 4323SDValue SelectionDAG:: 4324UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4325 SDNode *N = InN.getNode(); 4326 assert(N->getNumOperands() == NumOps && 4327 "Update with wrong number of operands"); 4328 4329 // Check to see if there is no change. 4330 bool AnyChange = false; 4331 for (unsigned i = 0; i != NumOps; ++i) { 4332 if (Ops[i] != N->getOperand(i)) { 4333 AnyChange = true; 4334 break; 4335 } 4336 } 4337 4338 // No operands changed, just return the input node. 4339 if (!AnyChange) return InN; 4340 4341 // See if the modified node already exists. 4342 void *InsertPos = 0; 4343 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4344 return SDValue(Existing, InN.getResNo()); 4345 4346 // Nope it doesn't. Remove the node from its current place in the maps. 4347 if (InsertPos) 4348 if (!RemoveNodeFromCSEMaps(N)) 4349 InsertPos = 0; 4350 4351 // Now we update the operands. 4352 for (unsigned i = 0; i != NumOps; ++i) 4353 if (N->OperandList[i] != Ops[i]) 4354 N->OperandList[i].set(Ops[i]); 4355 4356 // If this gets put into a CSE map, add it. 4357 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4358 return InN; 4359} 4360 4361/// DropOperands - Release the operands and set this node to have 4362/// zero operands. 4363void SDNode::DropOperands() { 4364 // Unlike the code in MorphNodeTo that does this, we don't need to 4365 // watch for dead nodes here. 4366 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4367 SDUse &Use = *I++; 4368 Use.set(SDValue()); 4369 } 4370} 4371 4372/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4373/// machine opcode. 4374/// 4375SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4376 EVT VT) { 4377 SDVTList VTs = getVTList(VT); 4378 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4379} 4380 4381SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4382 EVT VT, SDValue Op1) { 4383 SDVTList VTs = getVTList(VT); 4384 SDValue Ops[] = { Op1 }; 4385 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4386} 4387 4388SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4389 EVT VT, SDValue Op1, 4390 SDValue Op2) { 4391 SDVTList VTs = getVTList(VT); 4392 SDValue Ops[] = { Op1, Op2 }; 4393 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4394} 4395 4396SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4397 EVT VT, SDValue Op1, 4398 SDValue Op2, SDValue Op3) { 4399 SDVTList VTs = getVTList(VT); 4400 SDValue Ops[] = { Op1, Op2, Op3 }; 4401 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4402} 4403 4404SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4405 EVT VT, const SDValue *Ops, 4406 unsigned NumOps) { 4407 SDVTList VTs = getVTList(VT); 4408 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4409} 4410 4411SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4412 EVT VT1, EVT VT2, const SDValue *Ops, 4413 unsigned NumOps) { 4414 SDVTList VTs = getVTList(VT1, VT2); 4415 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4416} 4417 4418SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4419 EVT VT1, EVT VT2) { 4420 SDVTList VTs = getVTList(VT1, VT2); 4421 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4422} 4423 4424SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4425 EVT VT1, EVT VT2, EVT VT3, 4426 const SDValue *Ops, unsigned NumOps) { 4427 SDVTList VTs = getVTList(VT1, VT2, VT3); 4428 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4429} 4430 4431SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4432 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4433 const SDValue *Ops, unsigned NumOps) { 4434 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4435 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4436} 4437 4438SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4439 EVT VT1, EVT VT2, 4440 SDValue Op1) { 4441 SDVTList VTs = getVTList(VT1, VT2); 4442 SDValue Ops[] = { Op1 }; 4443 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4444} 4445 4446SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4447 EVT VT1, EVT VT2, 4448 SDValue Op1, SDValue Op2) { 4449 SDVTList VTs = getVTList(VT1, VT2); 4450 SDValue Ops[] = { Op1, Op2 }; 4451 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4452} 4453 4454SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4455 EVT VT1, EVT VT2, 4456 SDValue Op1, SDValue Op2, 4457 SDValue Op3) { 4458 SDVTList VTs = getVTList(VT1, VT2); 4459 SDValue Ops[] = { Op1, Op2, Op3 }; 4460 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4461} 4462 4463SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4464 EVT VT1, EVT VT2, EVT VT3, 4465 SDValue Op1, SDValue Op2, 4466 SDValue Op3) { 4467 SDVTList VTs = getVTList(VT1, VT2, VT3); 4468 SDValue Ops[] = { Op1, Op2, Op3 }; 4469 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4470} 4471 4472SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4473 SDVTList VTs, const SDValue *Ops, 4474 unsigned NumOps) { 4475 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4476} 4477 4478SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4479 EVT VT) { 4480 SDVTList VTs = getVTList(VT); 4481 return MorphNodeTo(N, Opc, VTs, 0, 0); 4482} 4483 4484SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4485 EVT VT, SDValue Op1) { 4486 SDVTList VTs = getVTList(VT); 4487 SDValue Ops[] = { Op1 }; 4488 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4489} 4490 4491SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4492 EVT VT, SDValue Op1, 4493 SDValue Op2) { 4494 SDVTList VTs = getVTList(VT); 4495 SDValue Ops[] = { Op1, Op2 }; 4496 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4497} 4498 4499SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4500 EVT VT, SDValue Op1, 4501 SDValue Op2, SDValue Op3) { 4502 SDVTList VTs = getVTList(VT); 4503 SDValue Ops[] = { Op1, Op2, Op3 }; 4504 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4505} 4506 4507SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4508 EVT VT, const SDValue *Ops, 4509 unsigned NumOps) { 4510 SDVTList VTs = getVTList(VT); 4511 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4512} 4513 4514SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4515 EVT VT1, EVT VT2, const SDValue *Ops, 4516 unsigned NumOps) { 4517 SDVTList VTs = getVTList(VT1, VT2); 4518 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4519} 4520 4521SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4522 EVT VT1, EVT VT2) { 4523 SDVTList VTs = getVTList(VT1, VT2); 4524 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4525} 4526 4527SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4528 EVT VT1, EVT VT2, EVT VT3, 4529 const SDValue *Ops, unsigned NumOps) { 4530 SDVTList VTs = getVTList(VT1, VT2, VT3); 4531 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4532} 4533 4534SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4535 EVT VT1, EVT VT2, 4536 SDValue Op1) { 4537 SDVTList VTs = getVTList(VT1, VT2); 4538 SDValue Ops[] = { Op1 }; 4539 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4540} 4541 4542SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4543 EVT VT1, EVT VT2, 4544 SDValue Op1, SDValue Op2) { 4545 SDVTList VTs = getVTList(VT1, VT2); 4546 SDValue Ops[] = { Op1, Op2 }; 4547 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4548} 4549 4550SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4551 EVT VT1, EVT VT2, 4552 SDValue Op1, SDValue Op2, 4553 SDValue Op3) { 4554 SDVTList VTs = getVTList(VT1, VT2); 4555 SDValue Ops[] = { Op1, Op2, Op3 }; 4556 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4557} 4558 4559/// MorphNodeTo - These *mutate* the specified node to have the specified 4560/// return type, opcode, and operands. 4561/// 4562/// Note that MorphNodeTo returns the resultant node. If there is already a 4563/// node of the specified opcode and operands, it returns that node instead of 4564/// the current one. Note that the DebugLoc need not be the same. 4565/// 4566/// Using MorphNodeTo is faster than creating a new node and swapping it in 4567/// with ReplaceAllUsesWith both because it often avoids allocating a new 4568/// node, and because it doesn't require CSE recalculation for any of 4569/// the node's users. 4570/// 4571SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4572 SDVTList VTs, const SDValue *Ops, 4573 unsigned NumOps) { 4574 // If an identical node already exists, use it. 4575 void *IP = 0; 4576 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4577 FoldingSetNodeID ID; 4578 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4579 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4580 return ON; 4581 } 4582 4583 if (!RemoveNodeFromCSEMaps(N)) 4584 IP = 0; 4585 4586 // Start the morphing. 4587 N->NodeType = Opc; 4588 N->ValueList = VTs.VTs; 4589 N->NumValues = VTs.NumVTs; 4590 4591 // Clear the operands list, updating used nodes to remove this from their 4592 // use list. Keep track of any operands that become dead as a result. 4593 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4594 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4595 SDUse &Use = *I++; 4596 SDNode *Used = Use.getNode(); 4597 Use.set(SDValue()); 4598 if (Used->use_empty()) 4599 DeadNodeSet.insert(Used); 4600 } 4601 4602 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4603 // Initialize the memory references information. 4604 MN->setMemRefs(0, 0); 4605 // If NumOps is larger than the # of operands we can have in a 4606 // MachineSDNode, reallocate the operand list. 4607 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4608 if (MN->OperandsNeedDelete) 4609 delete[] MN->OperandList; 4610 if (NumOps > array_lengthof(MN->LocalOperands)) 4611 // We're creating a final node that will live unmorphed for the 4612 // remainder of the current SelectionDAG iteration, so we can allocate 4613 // the operands directly out of a pool with no recycling metadata. 4614 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4615 Ops, NumOps); 4616 else 4617 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4618 MN->OperandsNeedDelete = false; 4619 } else 4620 MN->InitOperands(MN->OperandList, Ops, NumOps); 4621 } else { 4622 // If NumOps is larger than the # of operands we currently have, reallocate 4623 // the operand list. 4624 if (NumOps > N->NumOperands) { 4625 if (N->OperandsNeedDelete) 4626 delete[] N->OperandList; 4627 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4628 N->OperandsNeedDelete = true; 4629 } else 4630 N->InitOperands(N->OperandList, Ops, NumOps); 4631 } 4632 4633 // Delete any nodes that are still dead after adding the uses for the 4634 // new operands. 4635 SmallVector<SDNode *, 16> DeadNodes; 4636 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4637 E = DeadNodeSet.end(); I != E; ++I) 4638 if ((*I)->use_empty()) 4639 DeadNodes.push_back(*I); 4640 RemoveDeadNodes(DeadNodes); 4641 4642 if (IP) 4643 CSEMap.InsertNode(N, IP); // Memoize the new node. 4644 return N; 4645} 4646 4647 4648/// getMachineNode - These are used for target selectors to create a new node 4649/// with specified return type(s), MachineInstr opcode, and operands. 4650/// 4651/// Note that getMachineNode returns the resultant node. If there is already a 4652/// node of the specified opcode and operands, it returns that node instead of 4653/// the current one. 4654MachineSDNode * 4655SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4656 SDVTList VTs = getVTList(VT); 4657 return getMachineNode(Opcode, dl, VTs, 0, 0); 4658} 4659 4660MachineSDNode * 4661SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4662 SDVTList VTs = getVTList(VT); 4663 SDValue Ops[] = { Op1 }; 4664 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4665} 4666 4667MachineSDNode * 4668SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4669 SDValue Op1, SDValue Op2) { 4670 SDVTList VTs = getVTList(VT); 4671 SDValue Ops[] = { Op1, Op2 }; 4672 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4673} 4674 4675MachineSDNode * 4676SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4677 SDValue Op1, SDValue Op2, SDValue Op3) { 4678 SDVTList VTs = getVTList(VT); 4679 SDValue Ops[] = { Op1, Op2, Op3 }; 4680 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4681} 4682 4683MachineSDNode * 4684SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4685 const SDValue *Ops, unsigned NumOps) { 4686 SDVTList VTs = getVTList(VT); 4687 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4688} 4689 4690MachineSDNode * 4691SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4692 SDVTList VTs = getVTList(VT1, VT2); 4693 return getMachineNode(Opcode, dl, VTs, 0, 0); 4694} 4695 4696MachineSDNode * 4697SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4698 EVT VT1, EVT VT2, SDValue Op1) { 4699 SDVTList VTs = getVTList(VT1, VT2); 4700 SDValue Ops[] = { Op1 }; 4701 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4702} 4703 4704MachineSDNode * 4705SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4706 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4707 SDVTList VTs = getVTList(VT1, VT2); 4708 SDValue Ops[] = { Op1, Op2 }; 4709 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4710} 4711 4712MachineSDNode * 4713SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4714 EVT VT1, EVT VT2, SDValue Op1, 4715 SDValue Op2, SDValue Op3) { 4716 SDVTList VTs = getVTList(VT1, VT2); 4717 SDValue Ops[] = { Op1, Op2, Op3 }; 4718 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4719} 4720 4721MachineSDNode * 4722SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4723 EVT VT1, EVT VT2, 4724 const SDValue *Ops, unsigned NumOps) { 4725 SDVTList VTs = getVTList(VT1, VT2); 4726 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4727} 4728 4729MachineSDNode * 4730SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4731 EVT VT1, EVT VT2, EVT VT3, 4732 SDValue Op1, SDValue Op2) { 4733 SDVTList VTs = getVTList(VT1, VT2, VT3); 4734 SDValue Ops[] = { Op1, Op2 }; 4735 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4736} 4737 4738MachineSDNode * 4739SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4740 EVT VT1, EVT VT2, EVT VT3, 4741 SDValue Op1, SDValue Op2, SDValue Op3) { 4742 SDVTList VTs = getVTList(VT1, VT2, VT3); 4743 SDValue Ops[] = { Op1, Op2, Op3 }; 4744 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4745} 4746 4747MachineSDNode * 4748SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4749 EVT VT1, EVT VT2, EVT VT3, 4750 const SDValue *Ops, unsigned NumOps) { 4751 SDVTList VTs = getVTList(VT1, VT2, VT3); 4752 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4753} 4754 4755MachineSDNode * 4756SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4757 EVT VT2, EVT VT3, EVT VT4, 4758 const SDValue *Ops, unsigned NumOps) { 4759 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4760 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4761} 4762 4763MachineSDNode * 4764SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4765 const std::vector<EVT> &ResultTys, 4766 const SDValue *Ops, unsigned NumOps) { 4767 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4768 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4769} 4770 4771MachineSDNode * 4772SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4773 const SDValue *Ops, unsigned NumOps) { 4774 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4775 MachineSDNode *N; 4776 void *IP; 4777 4778 if (DoCSE) { 4779 FoldingSetNodeID ID; 4780 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4781 IP = 0; 4782 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4783 return cast<MachineSDNode>(E); 4784 } 4785 4786 // Allocate a new MachineSDNode. 4787 N = NodeAllocator.Allocate<MachineSDNode>(); 4788 new (N) MachineSDNode(~Opcode, DL, VTs); 4789 4790 // Initialize the operands list. 4791 if (NumOps > array_lengthof(N->LocalOperands)) 4792 // We're creating a final node that will live unmorphed for the 4793 // remainder of the current SelectionDAG iteration, so we can allocate 4794 // the operands directly out of a pool with no recycling metadata. 4795 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4796 Ops, NumOps); 4797 else 4798 N->InitOperands(N->LocalOperands, Ops, NumOps); 4799 N->OperandsNeedDelete = false; 4800 4801 if (DoCSE) 4802 CSEMap.InsertNode(N, IP); 4803 4804 AllNodes.push_back(N); 4805#ifndef NDEBUG 4806 VerifyNode(N); 4807#endif 4808 return N; 4809} 4810 4811/// getTargetExtractSubreg - A convenience function for creating 4812/// TargetInstrInfo::EXTRACT_SUBREG nodes. 4813SDValue 4814SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4815 SDValue Operand) { 4816 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4817 SDNode *Subreg = getMachineNode(TargetInstrInfo::EXTRACT_SUBREG, DL, 4818 VT, Operand, SRIdxVal); 4819 return SDValue(Subreg, 0); 4820} 4821 4822/// getTargetInsertSubreg - A convenience function for creating 4823/// TargetInstrInfo::INSERT_SUBREG nodes. 4824SDValue 4825SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4826 SDValue Operand, SDValue Subreg) { 4827 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4828 SDNode *Result = getMachineNode(TargetInstrInfo::INSERT_SUBREG, DL, 4829 VT, Operand, Subreg, SRIdxVal); 4830 return SDValue(Result, 0); 4831} 4832 4833/// getNodeIfExists - Get the specified node if it's already available, or 4834/// else return NULL. 4835SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4836 const SDValue *Ops, unsigned NumOps) { 4837 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4838 FoldingSetNodeID ID; 4839 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4840 void *IP = 0; 4841 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4842 return E; 4843 } 4844 return NULL; 4845} 4846 4847/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4848/// This can cause recursive merging of nodes in the DAG. 4849/// 4850/// This version assumes From has a single result value. 4851/// 4852void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4853 DAGUpdateListener *UpdateListener) { 4854 SDNode *From = FromN.getNode(); 4855 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4856 "Cannot replace with this method!"); 4857 assert(From != To.getNode() && "Cannot replace uses of with self"); 4858 4859 // Iterate over all the existing uses of From. New uses will be added 4860 // to the beginning of the use list, which we avoid visiting. 4861 // This specifically avoids visiting uses of From that arise while the 4862 // replacement is happening, because any such uses would be the result 4863 // of CSE: If an existing node looks like From after one of its operands 4864 // is replaced by To, we don't want to replace of all its users with To 4865 // too. See PR3018 for more info. 4866 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4867 while (UI != UE) { 4868 SDNode *User = *UI; 4869 4870 // This node is about to morph, remove its old self from the CSE maps. 4871 RemoveNodeFromCSEMaps(User); 4872 4873 // A user can appear in a use list multiple times, and when this 4874 // happens the uses are usually next to each other in the list. 4875 // To help reduce the number of CSE recomputations, process all 4876 // the uses of this user that we can find this way. 4877 do { 4878 SDUse &Use = UI.getUse(); 4879 ++UI; 4880 Use.set(To); 4881 } while (UI != UE && *UI == User); 4882 4883 // Now that we have modified User, add it back to the CSE maps. If it 4884 // already exists there, recursively merge the results together. 4885 AddModifiedNodeToCSEMaps(User, UpdateListener); 4886 } 4887} 4888 4889/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4890/// This can cause recursive merging of nodes in the DAG. 4891/// 4892/// This version assumes that for each value of From, there is a 4893/// corresponding value in To in the same position with the same type. 4894/// 4895void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4896 DAGUpdateListener *UpdateListener) { 4897#ifndef NDEBUG 4898 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4899 assert((!From->hasAnyUseOfValue(i) || 4900 From->getValueType(i) == To->getValueType(i)) && 4901 "Cannot use this version of ReplaceAllUsesWith!"); 4902#endif 4903 4904 // Handle the trivial case. 4905 if (From == To) 4906 return; 4907 4908 // Iterate over just the existing users of From. See the comments in 4909 // the ReplaceAllUsesWith above. 4910 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4911 while (UI != UE) { 4912 SDNode *User = *UI; 4913 4914 // This node is about to morph, remove its old self from the CSE maps. 4915 RemoveNodeFromCSEMaps(User); 4916 4917 // A user can appear in a use list multiple times, and when this 4918 // happens the uses are usually next to each other in the list. 4919 // To help reduce the number of CSE recomputations, process all 4920 // the uses of this user that we can find this way. 4921 do { 4922 SDUse &Use = UI.getUse(); 4923 ++UI; 4924 Use.setNode(To); 4925 } while (UI != UE && *UI == User); 4926 4927 // Now that we have modified User, add it back to the CSE maps. If it 4928 // already exists there, recursively merge the results together. 4929 AddModifiedNodeToCSEMaps(User, UpdateListener); 4930 } 4931} 4932 4933/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4934/// This can cause recursive merging of nodes in the DAG. 4935/// 4936/// This version can replace From with any result values. To must match the 4937/// number and types of values returned by From. 4938void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4939 const SDValue *To, 4940 DAGUpdateListener *UpdateListener) { 4941 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4942 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4943 4944 // Iterate over just the existing users of From. See the comments in 4945 // the ReplaceAllUsesWith above. 4946 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4947 while (UI != UE) { 4948 SDNode *User = *UI; 4949 4950 // This node is about to morph, remove its old self from the CSE maps. 4951 RemoveNodeFromCSEMaps(User); 4952 4953 // A user can appear in a use list multiple times, and when this 4954 // happens the uses are usually next to each other in the list. 4955 // To help reduce the number of CSE recomputations, process all 4956 // the uses of this user that we can find this way. 4957 do { 4958 SDUse &Use = UI.getUse(); 4959 const SDValue &ToOp = To[Use.getResNo()]; 4960 ++UI; 4961 Use.set(ToOp); 4962 } while (UI != UE && *UI == User); 4963 4964 // Now that we have modified User, add it back to the CSE maps. If it 4965 // already exists there, recursively merge the results together. 4966 AddModifiedNodeToCSEMaps(User, UpdateListener); 4967 } 4968} 4969 4970/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4971/// uses of other values produced by From.getNode() alone. The Deleted 4972/// vector is handled the same way as for ReplaceAllUsesWith. 4973void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4974 DAGUpdateListener *UpdateListener){ 4975 // Handle the really simple, really trivial case efficiently. 4976 if (From == To) return; 4977 4978 // Handle the simple, trivial, case efficiently. 4979 if (From.getNode()->getNumValues() == 1) { 4980 ReplaceAllUsesWith(From, To, UpdateListener); 4981 return; 4982 } 4983 4984 // Iterate over just the existing users of From. See the comments in 4985 // the ReplaceAllUsesWith above. 4986 SDNode::use_iterator UI = From.getNode()->use_begin(), 4987 UE = From.getNode()->use_end(); 4988 while (UI != UE) { 4989 SDNode *User = *UI; 4990 bool UserRemovedFromCSEMaps = false; 4991 4992 // A user can appear in a use list multiple times, and when this 4993 // happens the uses are usually next to each other in the list. 4994 // To help reduce the number of CSE recomputations, process all 4995 // the uses of this user that we can find this way. 4996 do { 4997 SDUse &Use = UI.getUse(); 4998 4999 // Skip uses of different values from the same node. 5000 if (Use.getResNo() != From.getResNo()) { 5001 ++UI; 5002 continue; 5003 } 5004 5005 // If this node hasn't been modified yet, it's still in the CSE maps, 5006 // so remove its old self from the CSE maps. 5007 if (!UserRemovedFromCSEMaps) { 5008 RemoveNodeFromCSEMaps(User); 5009 UserRemovedFromCSEMaps = true; 5010 } 5011 5012 ++UI; 5013 Use.set(To); 5014 } while (UI != UE && *UI == User); 5015 5016 // We are iterating over all uses of the From node, so if a use 5017 // doesn't use the specific value, no changes are made. 5018 if (!UserRemovedFromCSEMaps) 5019 continue; 5020 5021 // Now that we have modified User, add it back to the CSE maps. If it 5022 // already exists there, recursively merge the results together. 5023 AddModifiedNodeToCSEMaps(User, UpdateListener); 5024 } 5025} 5026 5027namespace { 5028 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5029 /// to record information about a use. 5030 struct UseMemo { 5031 SDNode *User; 5032 unsigned Index; 5033 SDUse *Use; 5034 }; 5035 5036 /// operator< - Sort Memos by User. 5037 bool operator<(const UseMemo &L, const UseMemo &R) { 5038 return (intptr_t)L.User < (intptr_t)R.User; 5039 } 5040} 5041 5042/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5043/// uses of other values produced by From.getNode() alone. The same value 5044/// may appear in both the From and To list. The Deleted vector is 5045/// handled the same way as for ReplaceAllUsesWith. 5046void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5047 const SDValue *To, 5048 unsigned Num, 5049 DAGUpdateListener *UpdateListener){ 5050 // Handle the simple, trivial case efficiently. 5051 if (Num == 1) 5052 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5053 5054 // Read up all the uses and make records of them. This helps 5055 // processing new uses that are introduced during the 5056 // replacement process. 5057 SmallVector<UseMemo, 4> Uses; 5058 for (unsigned i = 0; i != Num; ++i) { 5059 unsigned FromResNo = From[i].getResNo(); 5060 SDNode *FromNode = From[i].getNode(); 5061 for (SDNode::use_iterator UI = FromNode->use_begin(), 5062 E = FromNode->use_end(); UI != E; ++UI) { 5063 SDUse &Use = UI.getUse(); 5064 if (Use.getResNo() == FromResNo) { 5065 UseMemo Memo = { *UI, i, &Use }; 5066 Uses.push_back(Memo); 5067 } 5068 } 5069 } 5070 5071 // Sort the uses, so that all the uses from a given User are together. 5072 std::sort(Uses.begin(), Uses.end()); 5073 5074 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5075 UseIndex != UseIndexEnd; ) { 5076 // We know that this user uses some value of From. If it is the right 5077 // value, update it. 5078 SDNode *User = Uses[UseIndex].User; 5079 5080 // This node is about to morph, remove its old self from the CSE maps. 5081 RemoveNodeFromCSEMaps(User); 5082 5083 // The Uses array is sorted, so all the uses for a given User 5084 // are next to each other in the list. 5085 // To help reduce the number of CSE recomputations, process all 5086 // the uses of this user that we can find this way. 5087 do { 5088 unsigned i = Uses[UseIndex].Index; 5089 SDUse &Use = *Uses[UseIndex].Use; 5090 ++UseIndex; 5091 5092 Use.set(To[i]); 5093 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5094 5095 // Now that we have modified User, add it back to the CSE maps. If it 5096 // already exists there, recursively merge the results together. 5097 AddModifiedNodeToCSEMaps(User, UpdateListener); 5098 } 5099} 5100 5101/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5102/// based on their topological order. It returns the maximum id and a vector 5103/// of the SDNodes* in assigned order by reference. 5104unsigned SelectionDAG::AssignTopologicalOrder() { 5105 5106 unsigned DAGSize = 0; 5107 5108 // SortedPos tracks the progress of the algorithm. Nodes before it are 5109 // sorted, nodes after it are unsorted. When the algorithm completes 5110 // it is at the end of the list. 5111 allnodes_iterator SortedPos = allnodes_begin(); 5112 5113 // Visit all the nodes. Move nodes with no operands to the front of 5114 // the list immediately. Annotate nodes that do have operands with their 5115 // operand count. Before we do this, the Node Id fields of the nodes 5116 // may contain arbitrary values. After, the Node Id fields for nodes 5117 // before SortedPos will contain the topological sort index, and the 5118 // Node Id fields for nodes At SortedPos and after will contain the 5119 // count of outstanding operands. 5120 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5121 SDNode *N = I++; 5122 unsigned Degree = N->getNumOperands(); 5123 if (Degree == 0) { 5124 // A node with no uses, add it to the result array immediately. 5125 N->setNodeId(DAGSize++); 5126 allnodes_iterator Q = N; 5127 if (Q != SortedPos) 5128 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5129 ++SortedPos; 5130 } else { 5131 // Temporarily use the Node Id as scratch space for the degree count. 5132 N->setNodeId(Degree); 5133 } 5134 } 5135 5136 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5137 // such that by the time the end is reached all nodes will be sorted. 5138 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5139 SDNode *N = I; 5140 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5141 UI != UE; ++UI) { 5142 SDNode *P = *UI; 5143 unsigned Degree = P->getNodeId(); 5144 --Degree; 5145 if (Degree == 0) { 5146 // All of P's operands are sorted, so P may sorted now. 5147 P->setNodeId(DAGSize++); 5148 if (P != SortedPos) 5149 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5150 ++SortedPos; 5151 } else { 5152 // Update P's outstanding operand count. 5153 P->setNodeId(Degree); 5154 } 5155 } 5156 } 5157 5158 assert(SortedPos == AllNodes.end() && 5159 "Topological sort incomplete!"); 5160 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5161 "First node in topological sort is not the entry token!"); 5162 assert(AllNodes.front().getNodeId() == 0 && 5163 "First node in topological sort has non-zero id!"); 5164 assert(AllNodes.front().getNumOperands() == 0 && 5165 "First node in topological sort has operands!"); 5166 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5167 "Last node in topologic sort has unexpected id!"); 5168 assert(AllNodes.back().use_empty() && 5169 "Last node in topologic sort has users!"); 5170 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5171 return DAGSize; 5172} 5173 5174 5175 5176//===----------------------------------------------------------------------===// 5177// SDNode Class 5178//===----------------------------------------------------------------------===// 5179 5180HandleSDNode::~HandleSDNode() { 5181 DropOperands(); 5182} 5183 5184GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5185 EVT VT, int64_t o, unsigned char TF) 5186 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 5187 Offset(o), TargetFlags(TF) { 5188 TheGlobal = const_cast<GlobalValue*>(GA); 5189} 5190 5191MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5192 MachineMemOperand *mmo) 5193 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5194 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile()); 5195 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5196 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5197} 5198 5199MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5200 const SDValue *Ops, unsigned NumOps, EVT memvt, 5201 MachineMemOperand *mmo) 5202 : SDNode(Opc, dl, VTs, Ops, NumOps), 5203 MemoryVT(memvt), MMO(mmo) { 5204 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile()); 5205 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5206 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5207} 5208 5209/// Profile - Gather unique data for the node. 5210/// 5211void SDNode::Profile(FoldingSetNodeID &ID) const { 5212 AddNodeIDNode(ID, this); 5213} 5214 5215namespace { 5216 struct EVTArray { 5217 std::vector<EVT> VTs; 5218 5219 EVTArray() { 5220 VTs.reserve(MVT::LAST_VALUETYPE); 5221 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5222 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5223 } 5224 }; 5225} 5226 5227static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5228static ManagedStatic<EVTArray> SimpleVTArray; 5229static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5230 5231/// getValueTypeList - Return a pointer to the specified value type. 5232/// 5233const EVT *SDNode::getValueTypeList(EVT VT) { 5234 if (VT.isExtended()) { 5235 sys::SmartScopedLock<true> Lock(*VTMutex); 5236 return &(*EVTs->insert(VT).first); 5237 } else { 5238 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5239 } 5240} 5241 5242/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5243/// indicated value. This method ignores uses of other values defined by this 5244/// operation. 5245bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5246 assert(Value < getNumValues() && "Bad value!"); 5247 5248 // TODO: Only iterate over uses of a given value of the node 5249 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5250 if (UI.getUse().getResNo() == Value) { 5251 if (NUses == 0) 5252 return false; 5253 --NUses; 5254 } 5255 } 5256 5257 // Found exactly the right number of uses? 5258 return NUses == 0; 5259} 5260 5261 5262/// hasAnyUseOfValue - Return true if there are any use of the indicated 5263/// value. This method ignores uses of other values defined by this operation. 5264bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5265 assert(Value < getNumValues() && "Bad value!"); 5266 5267 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5268 if (UI.getUse().getResNo() == Value) 5269 return true; 5270 5271 return false; 5272} 5273 5274 5275/// isOnlyUserOf - Return true if this node is the only use of N. 5276/// 5277bool SDNode::isOnlyUserOf(SDNode *N) const { 5278 bool Seen = false; 5279 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5280 SDNode *User = *I; 5281 if (User == this) 5282 Seen = true; 5283 else 5284 return false; 5285 } 5286 5287 return Seen; 5288} 5289 5290/// isOperand - Return true if this node is an operand of N. 5291/// 5292bool SDValue::isOperandOf(SDNode *N) const { 5293 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5294 if (*this == N->getOperand(i)) 5295 return true; 5296 return false; 5297} 5298 5299bool SDNode::isOperandOf(SDNode *N) const { 5300 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5301 if (this == N->OperandList[i].getNode()) 5302 return true; 5303 return false; 5304} 5305 5306/// reachesChainWithoutSideEffects - Return true if this operand (which must 5307/// be a chain) reaches the specified operand without crossing any 5308/// side-effecting instructions. In practice, this looks through token 5309/// factors and non-volatile loads. In order to remain efficient, this only 5310/// looks a couple of nodes in, it does not do an exhaustive search. 5311bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5312 unsigned Depth) const { 5313 if (*this == Dest) return true; 5314 5315 // Don't search too deeply, we just want to be able to see through 5316 // TokenFactor's etc. 5317 if (Depth == 0) return false; 5318 5319 // If this is a token factor, all inputs to the TF happen in parallel. If any 5320 // of the operands of the TF reach dest, then we can do the xform. 5321 if (getOpcode() == ISD::TokenFactor) { 5322 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5323 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5324 return true; 5325 return false; 5326 } 5327 5328 // Loads don't have side effects, look through them. 5329 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5330 if (!Ld->isVolatile()) 5331 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5332 } 5333 return false; 5334} 5335 5336/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5337/// is either an operand of N or it can be reached by traversing up the operands. 5338/// NOTE: this is an expensive method. Use it carefully. 5339bool SDNode::isPredecessorOf(SDNode *N) const { 5340 SmallPtrSet<SDNode *, 32> Visited; 5341 SmallVector<SDNode *, 16> Worklist; 5342 Worklist.push_back(N); 5343 5344 do { 5345 N = Worklist.pop_back_val(); 5346 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5347 SDNode *Op = N->getOperand(i).getNode(); 5348 if (Op == this) 5349 return true; 5350 if (Visited.insert(Op)) 5351 Worklist.push_back(Op); 5352 } 5353 } while (!Worklist.empty()); 5354 5355 return false; 5356} 5357 5358uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5359 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5360 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5361} 5362 5363std::string SDNode::getOperationName(const SelectionDAG *G) const { 5364 switch (getOpcode()) { 5365 default: 5366 if (getOpcode() < ISD::BUILTIN_OP_END) 5367 return "<<Unknown DAG Node>>"; 5368 if (isMachineOpcode()) { 5369 if (G) 5370 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5371 if (getMachineOpcode() < TII->getNumOpcodes()) 5372 return TII->get(getMachineOpcode()).getName(); 5373 return "<<Unknown Machine Node>>"; 5374 } 5375 if (G) { 5376 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5377 const char *Name = TLI.getTargetNodeName(getOpcode()); 5378 if (Name) return Name; 5379 return "<<Unknown Target Node>>"; 5380 } 5381 return "<<Unknown Node>>"; 5382 5383#ifndef NDEBUG 5384 case ISD::DELETED_NODE: 5385 return "<<Deleted Node!>>"; 5386#endif 5387 case ISD::PREFETCH: return "Prefetch"; 5388 case ISD::MEMBARRIER: return "MemBarrier"; 5389 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5390 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5391 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5392 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5393 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5394 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5395 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5396 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5397 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5398 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5399 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5400 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5401 case ISD::PCMARKER: return "PCMarker"; 5402 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5403 case ISD::SRCVALUE: return "SrcValue"; 5404 case ISD::EntryToken: return "EntryToken"; 5405 case ISD::TokenFactor: return "TokenFactor"; 5406 case ISD::AssertSext: return "AssertSext"; 5407 case ISD::AssertZext: return "AssertZext"; 5408 5409 case ISD::BasicBlock: return "BasicBlock"; 5410 case ISD::VALUETYPE: return "ValueType"; 5411 case ISD::Register: return "Register"; 5412 5413 case ISD::Constant: return "Constant"; 5414 case ISD::ConstantFP: return "ConstantFP"; 5415 case ISD::GlobalAddress: return "GlobalAddress"; 5416 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5417 case ISD::FrameIndex: return "FrameIndex"; 5418 case ISD::JumpTable: return "JumpTable"; 5419 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5420 case ISD::RETURNADDR: return "RETURNADDR"; 5421 case ISD::FRAMEADDR: return "FRAMEADDR"; 5422 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5423 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5424 case ISD::LSDAADDR: return "LSDAADDR"; 5425 case ISD::EHSELECTION: return "EHSELECTION"; 5426 case ISD::EH_RETURN: return "EH_RETURN"; 5427 case ISD::ConstantPool: return "ConstantPool"; 5428 case ISD::ExternalSymbol: return "ExternalSymbol"; 5429 case ISD::BlockAddress: return "BlockAddress"; 5430 case ISD::INTRINSIC_WO_CHAIN: 5431 case ISD::INTRINSIC_VOID: 5432 case ISD::INTRINSIC_W_CHAIN: { 5433 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5434 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5435 if (IID < Intrinsic::num_intrinsics) 5436 return Intrinsic::getName((Intrinsic::ID)IID); 5437 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5438 return TII->getName(IID); 5439 llvm_unreachable("Invalid intrinsic ID"); 5440 } 5441 5442 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5443 case ISD::TargetConstant: return "TargetConstant"; 5444 case ISD::TargetConstantFP:return "TargetConstantFP"; 5445 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5446 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5447 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5448 case ISD::TargetJumpTable: return "TargetJumpTable"; 5449 case ISD::TargetConstantPool: return "TargetConstantPool"; 5450 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5451 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5452 5453 case ISD::CopyToReg: return "CopyToReg"; 5454 case ISD::CopyFromReg: return "CopyFromReg"; 5455 case ISD::UNDEF: return "undef"; 5456 case ISD::MERGE_VALUES: return "merge_values"; 5457 case ISD::INLINEASM: return "inlineasm"; 5458 case ISD::DBG_LABEL: return "dbg_label"; 5459 case ISD::EH_LABEL: return "eh_label"; 5460 case ISD::HANDLENODE: return "handlenode"; 5461 5462 // Unary operators 5463 case ISD::FABS: return "fabs"; 5464 case ISD::FNEG: return "fneg"; 5465 case ISD::FSQRT: return "fsqrt"; 5466 case ISD::FSIN: return "fsin"; 5467 case ISD::FCOS: return "fcos"; 5468 case ISD::FPOWI: return "fpowi"; 5469 case ISD::FPOW: return "fpow"; 5470 case ISD::FTRUNC: return "ftrunc"; 5471 case ISD::FFLOOR: return "ffloor"; 5472 case ISD::FCEIL: return "fceil"; 5473 case ISD::FRINT: return "frint"; 5474 case ISD::FNEARBYINT: return "fnearbyint"; 5475 5476 // Binary operators 5477 case ISD::ADD: return "add"; 5478 case ISD::SUB: return "sub"; 5479 case ISD::MUL: return "mul"; 5480 case ISD::MULHU: return "mulhu"; 5481 case ISD::MULHS: return "mulhs"; 5482 case ISD::SDIV: return "sdiv"; 5483 case ISD::UDIV: return "udiv"; 5484 case ISD::SREM: return "srem"; 5485 case ISD::UREM: return "urem"; 5486 case ISD::SMUL_LOHI: return "smul_lohi"; 5487 case ISD::UMUL_LOHI: return "umul_lohi"; 5488 case ISD::SDIVREM: return "sdivrem"; 5489 case ISD::UDIVREM: return "udivrem"; 5490 case ISD::AND: return "and"; 5491 case ISD::OR: return "or"; 5492 case ISD::XOR: return "xor"; 5493 case ISD::SHL: return "shl"; 5494 case ISD::SRA: return "sra"; 5495 case ISD::SRL: return "srl"; 5496 case ISD::ROTL: return "rotl"; 5497 case ISD::ROTR: return "rotr"; 5498 case ISD::FADD: return "fadd"; 5499 case ISD::FSUB: return "fsub"; 5500 case ISD::FMUL: return "fmul"; 5501 case ISD::FDIV: return "fdiv"; 5502 case ISD::FREM: return "frem"; 5503 case ISD::FCOPYSIGN: return "fcopysign"; 5504 case ISD::FGETSIGN: return "fgetsign"; 5505 5506 case ISD::SETCC: return "setcc"; 5507 case ISD::VSETCC: return "vsetcc"; 5508 case ISD::SELECT: return "select"; 5509 case ISD::SELECT_CC: return "select_cc"; 5510 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5511 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5512 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5513 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5514 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5515 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5516 case ISD::CARRY_FALSE: return "carry_false"; 5517 case ISD::ADDC: return "addc"; 5518 case ISD::ADDE: return "adde"; 5519 case ISD::SADDO: return "saddo"; 5520 case ISD::UADDO: return "uaddo"; 5521 case ISD::SSUBO: return "ssubo"; 5522 case ISD::USUBO: return "usubo"; 5523 case ISD::SMULO: return "smulo"; 5524 case ISD::UMULO: return "umulo"; 5525 case ISD::SUBC: return "subc"; 5526 case ISD::SUBE: return "sube"; 5527 case ISD::SHL_PARTS: return "shl_parts"; 5528 case ISD::SRA_PARTS: return "sra_parts"; 5529 case ISD::SRL_PARTS: return "srl_parts"; 5530 5531 // Conversion operators. 5532 case ISD::SIGN_EXTEND: return "sign_extend"; 5533 case ISD::ZERO_EXTEND: return "zero_extend"; 5534 case ISD::ANY_EXTEND: return "any_extend"; 5535 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5536 case ISD::TRUNCATE: return "truncate"; 5537 case ISD::FP_ROUND: return "fp_round"; 5538 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5539 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5540 case ISD::FP_EXTEND: return "fp_extend"; 5541 5542 case ISD::SINT_TO_FP: return "sint_to_fp"; 5543 case ISD::UINT_TO_FP: return "uint_to_fp"; 5544 case ISD::FP_TO_SINT: return "fp_to_sint"; 5545 case ISD::FP_TO_UINT: return "fp_to_uint"; 5546 case ISD::BIT_CONVERT: return "bit_convert"; 5547 5548 case ISD::CONVERT_RNDSAT: { 5549 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5550 default: llvm_unreachable("Unknown cvt code!"); 5551 case ISD::CVT_FF: return "cvt_ff"; 5552 case ISD::CVT_FS: return "cvt_fs"; 5553 case ISD::CVT_FU: return "cvt_fu"; 5554 case ISD::CVT_SF: return "cvt_sf"; 5555 case ISD::CVT_UF: return "cvt_uf"; 5556 case ISD::CVT_SS: return "cvt_ss"; 5557 case ISD::CVT_SU: return "cvt_su"; 5558 case ISD::CVT_US: return "cvt_us"; 5559 case ISD::CVT_UU: return "cvt_uu"; 5560 } 5561 } 5562 5563 // Control flow instructions 5564 case ISD::BR: return "br"; 5565 case ISD::BRIND: return "brind"; 5566 case ISD::BR_JT: return "br_jt"; 5567 case ISD::BRCOND: return "brcond"; 5568 case ISD::BR_CC: return "br_cc"; 5569 case ISD::CALLSEQ_START: return "callseq_start"; 5570 case ISD::CALLSEQ_END: return "callseq_end"; 5571 5572 // Other operators 5573 case ISD::LOAD: return "load"; 5574 case ISD::STORE: return "store"; 5575 case ISD::VAARG: return "vaarg"; 5576 case ISD::VACOPY: return "vacopy"; 5577 case ISD::VAEND: return "vaend"; 5578 case ISD::VASTART: return "vastart"; 5579 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5580 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5581 case ISD::BUILD_PAIR: return "build_pair"; 5582 case ISD::STACKSAVE: return "stacksave"; 5583 case ISD::STACKRESTORE: return "stackrestore"; 5584 case ISD::TRAP: return "trap"; 5585 5586 // Bit manipulation 5587 case ISD::BSWAP: return "bswap"; 5588 case ISD::CTPOP: return "ctpop"; 5589 case ISD::CTTZ: return "cttz"; 5590 case ISD::CTLZ: return "ctlz"; 5591 5592 // Debug info 5593 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5594 case ISD::DEBUG_LOC: return "debug_loc"; 5595 5596 // Trampolines 5597 case ISD::TRAMPOLINE: return "trampoline"; 5598 5599 case ISD::CONDCODE: 5600 switch (cast<CondCodeSDNode>(this)->get()) { 5601 default: llvm_unreachable("Unknown setcc condition!"); 5602 case ISD::SETOEQ: return "setoeq"; 5603 case ISD::SETOGT: return "setogt"; 5604 case ISD::SETOGE: return "setoge"; 5605 case ISD::SETOLT: return "setolt"; 5606 case ISD::SETOLE: return "setole"; 5607 case ISD::SETONE: return "setone"; 5608 5609 case ISD::SETO: return "seto"; 5610 case ISD::SETUO: return "setuo"; 5611 case ISD::SETUEQ: return "setue"; 5612 case ISD::SETUGT: return "setugt"; 5613 case ISD::SETUGE: return "setuge"; 5614 case ISD::SETULT: return "setult"; 5615 case ISD::SETULE: return "setule"; 5616 case ISD::SETUNE: return "setune"; 5617 5618 case ISD::SETEQ: return "seteq"; 5619 case ISD::SETGT: return "setgt"; 5620 case ISD::SETGE: return "setge"; 5621 case ISD::SETLT: return "setlt"; 5622 case ISD::SETLE: return "setle"; 5623 case ISD::SETNE: return "setne"; 5624 } 5625 } 5626} 5627 5628const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5629 switch (AM) { 5630 default: 5631 return ""; 5632 case ISD::PRE_INC: 5633 return "<pre-inc>"; 5634 case ISD::PRE_DEC: 5635 return "<pre-dec>"; 5636 case ISD::POST_INC: 5637 return "<post-inc>"; 5638 case ISD::POST_DEC: 5639 return "<post-dec>"; 5640 } 5641} 5642 5643std::string ISD::ArgFlagsTy::getArgFlagsString() { 5644 std::string S = "< "; 5645 5646 if (isZExt()) 5647 S += "zext "; 5648 if (isSExt()) 5649 S += "sext "; 5650 if (isInReg()) 5651 S += "inreg "; 5652 if (isSRet()) 5653 S += "sret "; 5654 if (isByVal()) 5655 S += "byval "; 5656 if (isNest()) 5657 S += "nest "; 5658 if (getByValAlign()) 5659 S += "byval-align:" + utostr(getByValAlign()) + " "; 5660 if (getOrigAlign()) 5661 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5662 if (getByValSize()) 5663 S += "byval-size:" + utostr(getByValSize()) + " "; 5664 return S + ">"; 5665} 5666 5667void SDNode::dump() const { dump(0); } 5668void SDNode::dump(const SelectionDAG *G) const { 5669 print(errs(), G); 5670} 5671 5672void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5673 OS << (void*)this << ": "; 5674 5675 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5676 if (i) OS << ","; 5677 if (getValueType(i) == MVT::Other) 5678 OS << "ch"; 5679 else 5680 OS << getValueType(i).getEVTString(); 5681 } 5682 OS << " = " << getOperationName(G); 5683} 5684 5685void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5686 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5687 if (!MN->memoperands_empty()) { 5688 OS << "<"; 5689 OS << "Mem:"; 5690 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5691 e = MN->memoperands_end(); i != e; ++i) { 5692 OS << **i; 5693 if (next(i) != e) 5694 OS << " "; 5695 } 5696 OS << ">"; 5697 } 5698 } else if (const ShuffleVectorSDNode *SVN = 5699 dyn_cast<ShuffleVectorSDNode>(this)) { 5700 OS << "<"; 5701 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5702 int Idx = SVN->getMaskElt(i); 5703 if (i) OS << ","; 5704 if (Idx < 0) 5705 OS << "u"; 5706 else 5707 OS << Idx; 5708 } 5709 OS << ">"; 5710 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5711 OS << '<' << CSDN->getAPIntValue() << '>'; 5712 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5713 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5714 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5715 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5716 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5717 else { 5718 OS << "<APFloat("; 5719 CSDN->getValueAPF().bitcastToAPInt().dump(); 5720 OS << ")>"; 5721 } 5722 } else if (const GlobalAddressSDNode *GADN = 5723 dyn_cast<GlobalAddressSDNode>(this)) { 5724 int64_t offset = GADN->getOffset(); 5725 OS << '<'; 5726 WriteAsOperand(OS, GADN->getGlobal()); 5727 OS << '>'; 5728 if (offset > 0) 5729 OS << " + " << offset; 5730 else 5731 OS << " " << offset; 5732 if (unsigned int TF = GADN->getTargetFlags()) 5733 OS << " [TF=" << TF << ']'; 5734 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5735 OS << "<" << FIDN->getIndex() << ">"; 5736 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5737 OS << "<" << JTDN->getIndex() << ">"; 5738 if (unsigned int TF = JTDN->getTargetFlags()) 5739 OS << " [TF=" << TF << ']'; 5740 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5741 int offset = CP->getOffset(); 5742 if (CP->isMachineConstantPoolEntry()) 5743 OS << "<" << *CP->getMachineCPVal() << ">"; 5744 else 5745 OS << "<" << *CP->getConstVal() << ">"; 5746 if (offset > 0) 5747 OS << " + " << offset; 5748 else 5749 OS << " " << offset; 5750 if (unsigned int TF = CP->getTargetFlags()) 5751 OS << " [TF=" << TF << ']'; 5752 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5753 OS << "<"; 5754 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5755 if (LBB) 5756 OS << LBB->getName() << " "; 5757 OS << (const void*)BBDN->getBasicBlock() << ">"; 5758 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5759 if (G && R->getReg() && 5760 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5761 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5762 } else { 5763 OS << " %reg" << R->getReg(); 5764 } 5765 } else if (const ExternalSymbolSDNode *ES = 5766 dyn_cast<ExternalSymbolSDNode>(this)) { 5767 OS << "'" << ES->getSymbol() << "'"; 5768 if (unsigned int TF = ES->getTargetFlags()) 5769 OS << " [TF=" << TF << ']'; 5770 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5771 if (M->getValue()) 5772 OS << "<" << M->getValue() << ">"; 5773 else 5774 OS << "<null>"; 5775 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5776 OS << ":" << N->getVT().getEVTString(); 5777 } 5778 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5779 OS << "<" << *LD->getMemOperand(); 5780 5781 bool doExt = true; 5782 switch (LD->getExtensionType()) { 5783 default: doExt = false; break; 5784 case ISD::EXTLOAD: OS << ", anyext"; break; 5785 case ISD::SEXTLOAD: OS << ", sext"; break; 5786 case ISD::ZEXTLOAD: OS << ", zext"; break; 5787 } 5788 if (doExt) 5789 OS << " from " << LD->getMemoryVT().getEVTString(); 5790 5791 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5792 if (*AM) 5793 OS << ", " << AM; 5794 5795 OS << ">"; 5796 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5797 OS << "<" << *ST->getMemOperand(); 5798 5799 if (ST->isTruncatingStore()) 5800 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5801 5802 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5803 if (*AM) 5804 OS << ", " << AM; 5805 5806 OS << ">"; 5807 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5808 OS << "<" << *M->getMemOperand() << ">"; 5809 } else if (const BlockAddressSDNode *BA = 5810 dyn_cast<BlockAddressSDNode>(this)) { 5811 OS << "<"; 5812 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5813 OS << ", "; 5814 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5815 OS << ">"; 5816 if (unsigned int TF = BA->getTargetFlags()) 5817 OS << " [TF=" << TF << ']'; 5818 } 5819} 5820 5821void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5822 print_types(OS, G); 5823 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5824 if (i) OS << ", "; else OS << " "; 5825 OS << (void*)getOperand(i).getNode(); 5826 if (unsigned RN = getOperand(i).getResNo()) 5827 OS << ":" << RN; 5828 } 5829 print_details(OS, G); 5830} 5831 5832static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5833 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5834 if (N->getOperand(i).getNode()->hasOneUse()) 5835 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5836 else 5837 errs() << "\n" << std::string(indent+2, ' ') 5838 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5839 5840 5841 errs() << "\n"; 5842 errs().indent(indent); 5843 N->dump(G); 5844} 5845 5846void SelectionDAG::dump() const { 5847 errs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5848 5849 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5850 I != E; ++I) { 5851 const SDNode *N = I; 5852 if (!N->hasOneUse() && N != getRoot().getNode()) 5853 DumpNodes(N, 2, this); 5854 } 5855 5856 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5857 5858 errs() << "\n\n"; 5859} 5860 5861void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 5862 print_types(OS, G); 5863 print_details(OS, G); 5864} 5865 5866typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 5867static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 5868 const SelectionDAG *G, VisitedSDNodeSet &once) { 5869 if (!once.insert(N)) // If we've been here before, return now. 5870 return; 5871 // Dump the current SDNode, but don't end the line yet. 5872 OS << std::string(indent, ' '); 5873 N->printr(OS, G); 5874 // Having printed this SDNode, walk the children: 5875 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5876 const SDNode *child = N->getOperand(i).getNode(); 5877 if (i) OS << ","; 5878 OS << " "; 5879 if (child->getNumOperands() == 0) { 5880 // This child has no grandchildren; print it inline right here. 5881 child->printr(OS, G); 5882 once.insert(child); 5883 } else { // Just the address. FIXME: also print the child's opcode 5884 OS << (void*)child; 5885 if (unsigned RN = N->getOperand(i).getResNo()) 5886 OS << ":" << RN; 5887 } 5888 } 5889 OS << "\n"; 5890 // Dump children that have grandchildren on their own line(s). 5891 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5892 const SDNode *child = N->getOperand(i).getNode(); 5893 DumpNodesr(OS, child, indent+2, G, once); 5894 } 5895} 5896 5897void SDNode::dumpr() const { 5898 VisitedSDNodeSet once; 5899 DumpNodesr(errs(), this, 0, 0, once); 5900} 5901 5902void SDNode::dumpr(const SelectionDAG *G) const { 5903 VisitedSDNodeSet once; 5904 DumpNodesr(errs(), this, 0, G, once); 5905} 5906 5907 5908// getAddressSpace - Return the address space this GlobalAddress belongs to. 5909unsigned GlobalAddressSDNode::getAddressSpace() const { 5910 return getGlobal()->getType()->getAddressSpace(); 5911} 5912 5913 5914const Type *ConstantPoolSDNode::getType() const { 5915 if (isMachineConstantPoolEntry()) 5916 return Val.MachineCPVal->getType(); 5917 return Val.ConstVal->getType(); 5918} 5919 5920bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 5921 APInt &SplatUndef, 5922 unsigned &SplatBitSize, 5923 bool &HasAnyUndefs, 5924 unsigned MinSplatBits, 5925 bool isBigEndian) { 5926 EVT VT = getValueType(0); 5927 assert(VT.isVector() && "Expected a vector type"); 5928 unsigned sz = VT.getSizeInBits(); 5929 if (MinSplatBits > sz) 5930 return false; 5931 5932 SplatValue = APInt(sz, 0); 5933 SplatUndef = APInt(sz, 0); 5934 5935 // Get the bits. Bits with undefined values (when the corresponding element 5936 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 5937 // in SplatValue. If any of the values are not constant, give up and return 5938 // false. 5939 unsigned int nOps = getNumOperands(); 5940 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 5941 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 5942 5943 for (unsigned j = 0; j < nOps; ++j) { 5944 unsigned i = isBigEndian ? nOps-1-j : j; 5945 SDValue OpVal = getOperand(i); 5946 unsigned BitPos = j * EltBitSize; 5947 5948 if (OpVal.getOpcode() == ISD::UNDEF) 5949 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 5950 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 5951 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 5952 zextOrTrunc(sz) << BitPos); 5953 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 5954 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 5955 else 5956 return false; 5957 } 5958 5959 // The build_vector is all constants or undefs. Find the smallest element 5960 // size that splats the vector. 5961 5962 HasAnyUndefs = (SplatUndef != 0); 5963 while (sz > 8) { 5964 5965 unsigned HalfSize = sz / 2; 5966 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 5967 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 5968 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 5969 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 5970 5971 // If the two halves do not match (ignoring undef bits), stop here. 5972 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 5973 MinSplatBits > HalfSize) 5974 break; 5975 5976 SplatValue = HighValue | LowValue; 5977 SplatUndef = HighUndef & LowUndef; 5978 5979 sz = HalfSize; 5980 } 5981 5982 SplatBitSize = sz; 5983 return true; 5984} 5985 5986bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 5987 // Find the first non-undef value in the shuffle mask. 5988 unsigned i, e; 5989 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 5990 /* search */; 5991 5992 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 5993 5994 // Make sure all remaining elements are either undef or the same as the first 5995 // non-undef value. 5996 for (int Idx = Mask[i]; i != e; ++i) 5997 if (Mask[i] >= 0 && Mask[i] != Idx) 5998 return false; 5999 return true; 6000} 6001