SelectionDAG.cpp revision 2c39b15073db81d93bb629303915b7d7e5d088dc
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/CallingConv.h" 18#include "llvm/Constants.h" 19#include "llvm/DebugInfo.h" 20#include "llvm/DerivedTypes.h" 21#include "llvm/Function.h" 22#include "llvm/GlobalAlias.h" 23#include "llvm/GlobalVariable.h" 24#include "llvm/Intrinsics.h" 25#include "llvm/Analysis/ValueTracking.h" 26#include "llvm/Assembly/Writer.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/DataLayout.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetSelectionDAGInfo.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Support/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f16: return &APFloat::IEEEhalf; 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74// Default null implementations of the callbacks. 75void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 76void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 77 78//===----------------------------------------------------------------------===// 79// ConstantFPSDNode Class 80//===----------------------------------------------------------------------===// 81 82/// isExactlyValue - We don't rely on operator== working on double values, as 83/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 84/// As such, this method can be used to do an exact bit-for-bit comparison of 85/// two floating point values. 86bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 87 return getValueAPF().bitwiseIsEqual(V); 88} 89 90bool ConstantFPSDNode::isValueValidForType(EVT VT, 91 const APFloat& Val) { 92 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 93 94 // PPC long double cannot be converted to any other type. 95 if (VT == MVT::ppcf128 || 96 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 97 return false; 98 99 // convert modifies in place, so make a copy. 100 APFloat Val2 = APFloat(Val); 101 bool losesInfo; 102 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 103 &losesInfo); 104 return !losesInfo; 105} 106 107//===----------------------------------------------------------------------===// 108// ISD Namespace 109//===----------------------------------------------------------------------===// 110 111/// isBuildVectorAllOnes - Return true if the specified node is a 112/// BUILD_VECTOR where all of the elements are ~0 or undef. 113bool ISD::isBuildVectorAllOnes(const SDNode *N) { 114 // Look through a bit convert. 115 if (N->getOpcode() == ISD::BITCAST) 116 N = N->getOperand(0).getNode(); 117 118 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 119 120 unsigned i = 0, e = N->getNumOperands(); 121 122 // Skip over all of the undef values. 123 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 124 ++i; 125 126 // Do not accept an all-undef vector. 127 if (i == e) return false; 128 129 // Do not accept build_vectors that aren't all constants or which have non-~0 130 // elements. We have to be a bit careful here, as the type of the constant 131 // may not be the same as the type of the vector elements due to type 132 // legalization (the elements are promoted to a legal type for the target and 133 // a vector of a type may be legal when the base element type is not). 134 // We only want to check enough bits to cover the vector elements, because 135 // we care if the resultant vector is all ones, not whether the individual 136 // constants are. 137 SDValue NotZero = N->getOperand(i); 138 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 139 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) { 140 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 141 return false; 142 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) { 143 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 144 return false; 145 } else 146 return false; 147 148 // Okay, we have at least one ~0 value, check to see if the rest match or are 149 // undefs. Even with the above element type twiddling, this should be OK, as 150 // the same type legalization should have applied to all the elements. 151 for (++i; i != e; ++i) 152 if (N->getOperand(i) != NotZero && 153 N->getOperand(i).getOpcode() != ISD::UNDEF) 154 return false; 155 return true; 156} 157 158 159/// isBuildVectorAllZeros - Return true if the specified node is a 160/// BUILD_VECTOR where all of the elements are 0 or undef. 161bool ISD::isBuildVectorAllZeros(const SDNode *N) { 162 // Look through a bit convert. 163 if (N->getOpcode() == ISD::BITCAST) 164 N = N->getOperand(0).getNode(); 165 166 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 167 168 unsigned i = 0, e = N->getNumOperands(); 169 170 // Skip over all of the undef values. 171 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 172 ++i; 173 174 // Do not accept an all-undef vector. 175 if (i == e) return false; 176 177 // Do not accept build_vectors that aren't all constants or which have non-0 178 // elements. 179 SDValue Zero = N->getOperand(i); 180 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) { 181 if (!CN->isNullValue()) 182 return false; 183 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) { 184 if (!CFPN->getValueAPF().isPosZero()) 185 return false; 186 } else 187 return false; 188 189 // Okay, we have at least one 0 value, check to see if the rest match or are 190 // undefs. 191 for (++i; i != e; ++i) 192 if (N->getOperand(i) != Zero && 193 N->getOperand(i).getOpcode() != ISD::UNDEF) 194 return false; 195 return true; 196} 197 198/// isScalarToVector - Return true if the specified node is a 199/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 200/// element is not an undef. 201bool ISD::isScalarToVector(const SDNode *N) { 202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 203 return true; 204 205 if (N->getOpcode() != ISD::BUILD_VECTOR) 206 return false; 207 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 208 return false; 209 unsigned NumElems = N->getNumOperands(); 210 if (NumElems == 1) 211 return false; 212 for (unsigned i = 1; i < NumElems; ++i) { 213 SDValue V = N->getOperand(i); 214 if (V.getOpcode() != ISD::UNDEF) 215 return false; 216 } 217 return true; 218} 219 220/// allOperandsUndef - Return true if the node has at least one operand 221/// and all operands of the specified node are ISD::UNDEF. 222bool ISD::allOperandsUndef(const SDNode *N) { 223 // Return false if the node has no operands. 224 // This is "logically inconsistent" with the definition of "all" but 225 // is probably the desired behavior. 226 if (N->getNumOperands() == 0) 227 return false; 228 229 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 230 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 231 return false; 232 233 return true; 234} 235 236/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 237/// when given the operation for (X op Y). 238ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 239 // To perform this operation, we just need to swap the L and G bits of the 240 // operation. 241 unsigned OldL = (Operation >> 2) & 1; 242 unsigned OldG = (Operation >> 1) & 1; 243 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 244 (OldL << 1) | // New G bit 245 (OldG << 2)); // New L bit. 246} 247 248/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 249/// 'op' is a valid SetCC operation. 250ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 251 unsigned Operation = Op; 252 if (isInteger) 253 Operation ^= 7; // Flip L, G, E bits, but not U. 254 else 255 Operation ^= 15; // Flip all of the condition bits. 256 257 if (Operation > ISD::SETTRUE2) 258 Operation &= ~8; // Don't let N and U bits get set. 259 260 return ISD::CondCode(Operation); 261} 262 263 264/// isSignedOp - For an integer comparison, return 1 if the comparison is a 265/// signed operation and 2 if the result is an unsigned comparison. Return zero 266/// if the operation does not depend on the sign of the input (setne and seteq). 267static int isSignedOp(ISD::CondCode Opcode) { 268 switch (Opcode) { 269 default: llvm_unreachable("Illegal integer setcc operation!"); 270 case ISD::SETEQ: 271 case ISD::SETNE: return 0; 272 case ISD::SETLT: 273 case ISD::SETLE: 274 case ISD::SETGT: 275 case ISD::SETGE: return 1; 276 case ISD::SETULT: 277 case ISD::SETULE: 278 case ISD::SETUGT: 279 case ISD::SETUGE: return 2; 280 } 281} 282 283/// getSetCCOrOperation - Return the result of a logical OR between different 284/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 285/// returns SETCC_INVALID if it is not possible to represent the resultant 286/// comparison. 287ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 288 bool isInteger) { 289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 290 // Cannot fold a signed integer setcc with an unsigned integer setcc. 291 return ISD::SETCC_INVALID; 292 293 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 294 295 // If the N and U bits get set then the resultant comparison DOES suddenly 296 // care about orderedness, and is true when ordered. 297 if (Op > ISD::SETTRUE2) 298 Op &= ~16; // Clear the U bit if the N bit is set. 299 300 // Canonicalize illegal integer setcc's. 301 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 302 Op = ISD::SETNE; 303 304 return ISD::CondCode(Op); 305} 306 307/// getSetCCAndOperation - Return the result of a logical AND between different 308/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 309/// function returns zero if it is not possible to represent the resultant 310/// comparison. 311ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 312 bool isInteger) { 313 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 314 // Cannot fold a signed setcc with an unsigned setcc. 315 return ISD::SETCC_INVALID; 316 317 // Combine all of the condition bits. 318 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 319 320 // Canonicalize illegal integer setcc's. 321 if (isInteger) { 322 switch (Result) { 323 default: break; 324 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 325 case ISD::SETOEQ: // SETEQ & SETU[LG]E 326 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 327 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 328 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 329 } 330 } 331 332 return Result; 333} 334 335//===----------------------------------------------------------------------===// 336// SDNode Profile Support 337//===----------------------------------------------------------------------===// 338 339/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 340/// 341static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 342 ID.AddInteger(OpC); 343} 344 345/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 346/// solely with their pointer. 347static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 348 ID.AddPointer(VTList.VTs); 349} 350 351/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 352/// 353static void AddNodeIDOperands(FoldingSetNodeID &ID, 354 const SDValue *Ops, unsigned NumOps) { 355 for (; NumOps; --NumOps, ++Ops) { 356 ID.AddPointer(Ops->getNode()); 357 ID.AddInteger(Ops->getResNo()); 358 } 359} 360 361/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 362/// 363static void AddNodeIDOperands(FoldingSetNodeID &ID, 364 const SDUse *Ops, unsigned NumOps) { 365 for (; NumOps; --NumOps, ++Ops) { 366 ID.AddPointer(Ops->getNode()); 367 ID.AddInteger(Ops->getResNo()); 368 } 369} 370 371static void AddNodeIDNode(FoldingSetNodeID &ID, 372 unsigned short OpC, SDVTList VTList, 373 const SDValue *OpList, unsigned N) { 374 AddNodeIDOpcode(ID, OpC); 375 AddNodeIDValueTypes(ID, VTList); 376 AddNodeIDOperands(ID, OpList, N); 377} 378 379/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 380/// the NodeID data. 381static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 382 switch (N->getOpcode()) { 383 case ISD::TargetExternalSymbol: 384 case ISD::ExternalSymbol: 385 llvm_unreachable("Should only be used on nodes with operands"); 386 default: break; // Normal nodes don't need extra info. 387 case ISD::TargetConstant: 388 case ISD::Constant: 389 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 390 break; 391 case ISD::TargetConstantFP: 392 case ISD::ConstantFP: { 393 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 394 break; 395 } 396 case ISD::TargetGlobalAddress: 397 case ISD::GlobalAddress: 398 case ISD::TargetGlobalTLSAddress: 399 case ISD::GlobalTLSAddress: { 400 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 401 ID.AddPointer(GA->getGlobal()); 402 ID.AddInteger(GA->getOffset()); 403 ID.AddInteger(GA->getTargetFlags()); 404 ID.AddInteger(GA->getAddressSpace()); 405 break; 406 } 407 case ISD::BasicBlock: 408 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 409 break; 410 case ISD::Register: 411 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 412 break; 413 case ISD::RegisterMask: 414 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 415 break; 416 case ISD::SRCVALUE: 417 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 418 break; 419 case ISD::FrameIndex: 420 case ISD::TargetFrameIndex: 421 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 422 break; 423 case ISD::JumpTable: 424 case ISD::TargetJumpTable: 425 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 426 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 427 break; 428 case ISD::ConstantPool: 429 case ISD::TargetConstantPool: { 430 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 431 ID.AddInteger(CP->getAlignment()); 432 ID.AddInteger(CP->getOffset()); 433 if (CP->isMachineConstantPoolEntry()) 434 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 435 else 436 ID.AddPointer(CP->getConstVal()); 437 ID.AddInteger(CP->getTargetFlags()); 438 break; 439 } 440 case ISD::TargetIndex: { 441 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 442 ID.AddInteger(TI->getIndex()); 443 ID.AddInteger(TI->getOffset()); 444 ID.AddInteger(TI->getTargetFlags()); 445 break; 446 } 447 case ISD::LOAD: { 448 const LoadSDNode *LD = cast<LoadSDNode>(N); 449 ID.AddInteger(LD->getMemoryVT().getRawBits()); 450 ID.AddInteger(LD->getRawSubclassData()); 451 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 452 break; 453 } 454 case ISD::STORE: { 455 const StoreSDNode *ST = cast<StoreSDNode>(N); 456 ID.AddInteger(ST->getMemoryVT().getRawBits()); 457 ID.AddInteger(ST->getRawSubclassData()); 458 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 459 break; 460 } 461 case ISD::ATOMIC_CMP_SWAP: 462 case ISD::ATOMIC_SWAP: 463 case ISD::ATOMIC_LOAD_ADD: 464 case ISD::ATOMIC_LOAD_SUB: 465 case ISD::ATOMIC_LOAD_AND: 466 case ISD::ATOMIC_LOAD_OR: 467 case ISD::ATOMIC_LOAD_XOR: 468 case ISD::ATOMIC_LOAD_NAND: 469 case ISD::ATOMIC_LOAD_MIN: 470 case ISD::ATOMIC_LOAD_MAX: 471 case ISD::ATOMIC_LOAD_UMIN: 472 case ISD::ATOMIC_LOAD_UMAX: 473 case ISD::ATOMIC_LOAD: 474 case ISD::ATOMIC_STORE: { 475 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 476 ID.AddInteger(AT->getMemoryVT().getRawBits()); 477 ID.AddInteger(AT->getRawSubclassData()); 478 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 479 break; 480 } 481 case ISD::PREFETCH: { 482 const MemSDNode *PF = cast<MemSDNode>(N); 483 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 484 break; 485 } 486 case ISD::VECTOR_SHUFFLE: { 487 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 488 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 489 i != e; ++i) 490 ID.AddInteger(SVN->getMaskElt(i)); 491 break; 492 } 493 case ISD::TargetBlockAddress: 494 case ISD::BlockAddress: { 495 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N); 496 ID.AddPointer(BA->getBlockAddress()); 497 ID.AddInteger(BA->getOffset()); 498 ID.AddInteger(BA->getTargetFlags()); 499 break; 500 } 501 } // end switch (N->getOpcode()) 502 503 // Target specific memory nodes could also have address spaces to check. 504 if (N->isTargetMemoryOpcode()) 505 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 506} 507 508/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 509/// data. 510static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 511 AddNodeIDOpcode(ID, N->getOpcode()); 512 // Add the return value info. 513 AddNodeIDValueTypes(ID, N->getVTList()); 514 // Add the operand info. 515 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 516 517 // Handle SDNode leafs with special info. 518 AddNodeIDCustom(ID, N); 519} 520 521/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 522/// the CSE map that carries volatility, temporalness, indexing mode, and 523/// extension/truncation information. 524/// 525static inline unsigned 526encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 527 bool isNonTemporal, bool isInvariant) { 528 assert((ConvType & 3) == ConvType && 529 "ConvType may not require more than 2 bits!"); 530 assert((AM & 7) == AM && 531 "AM may not require more than 3 bits!"); 532 return ConvType | 533 (AM << 2) | 534 (isVolatile << 5) | 535 (isNonTemporal << 6) | 536 (isInvariant << 7); 537} 538 539//===----------------------------------------------------------------------===// 540// SelectionDAG Class 541//===----------------------------------------------------------------------===// 542 543/// doNotCSE - Return true if CSE should not be performed for this node. 544static bool doNotCSE(SDNode *N) { 545 if (N->getValueType(0) == MVT::Glue) 546 return true; // Never CSE anything that produces a flag. 547 548 switch (N->getOpcode()) { 549 default: break; 550 case ISD::HANDLENODE: 551 case ISD::EH_LABEL: 552 return true; // Never CSE these nodes. 553 } 554 555 // Check that remaining values produced are not flags. 556 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 557 if (N->getValueType(i) == MVT::Glue) 558 return true; // Never CSE anything that produces a flag. 559 560 return false; 561} 562 563/// RemoveDeadNodes - This method deletes all unreachable nodes in the 564/// SelectionDAG. 565void SelectionDAG::RemoveDeadNodes() { 566 // Create a dummy node (which is not added to allnodes), that adds a reference 567 // to the root node, preventing it from being deleted. 568 HandleSDNode Dummy(getRoot()); 569 570 SmallVector<SDNode*, 128> DeadNodes; 571 572 // Add all obviously-dead nodes to the DeadNodes worklist. 573 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 574 if (I->use_empty()) 575 DeadNodes.push_back(I); 576 577 RemoveDeadNodes(DeadNodes); 578 579 // If the root changed (e.g. it was a dead load, update the root). 580 setRoot(Dummy.getValue()); 581} 582 583/// RemoveDeadNodes - This method deletes the unreachable nodes in the 584/// given list, and any nodes that become unreachable as a result. 585void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 586 587 // Process the worklist, deleting the nodes and adding their uses to the 588 // worklist. 589 while (!DeadNodes.empty()) { 590 SDNode *N = DeadNodes.pop_back_val(); 591 592 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 593 DUL->NodeDeleted(N, 0); 594 595 // Take the node out of the appropriate CSE map. 596 RemoveNodeFromCSEMaps(N); 597 598 // Next, brutally remove the operand list. This is safe to do, as there are 599 // no cycles in the graph. 600 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 601 SDUse &Use = *I++; 602 SDNode *Operand = Use.getNode(); 603 Use.set(SDValue()); 604 605 // Now that we removed this operand, see if there are no uses of it left. 606 if (Operand->use_empty()) 607 DeadNodes.push_back(Operand); 608 } 609 610 DeallocateNode(N); 611 } 612} 613 614void SelectionDAG::RemoveDeadNode(SDNode *N){ 615 SmallVector<SDNode*, 16> DeadNodes(1, N); 616 617 // Create a dummy node that adds a reference to the root node, preventing 618 // it from being deleted. (This matters if the root is an operand of the 619 // dead node.) 620 HandleSDNode Dummy(getRoot()); 621 622 RemoveDeadNodes(DeadNodes); 623} 624 625void SelectionDAG::DeleteNode(SDNode *N) { 626 // First take this out of the appropriate CSE map. 627 RemoveNodeFromCSEMaps(N); 628 629 // Finally, remove uses due to operands of this node, remove from the 630 // AllNodes list, and delete the node. 631 DeleteNodeNotInCSEMaps(N); 632} 633 634void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 635 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 636 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 637 638 // Drop all of the operands and decrement used node's use counts. 639 N->DropOperands(); 640 641 DeallocateNode(N); 642} 643 644void SelectionDAG::DeallocateNode(SDNode *N) { 645 if (N->OperandsNeedDelete) 646 delete[] N->OperandList; 647 648 // Set the opcode to DELETED_NODE to help catch bugs when node 649 // memory is reallocated. 650 N->NodeType = ISD::DELETED_NODE; 651 652 NodeAllocator.Deallocate(AllNodes.remove(N)); 653 654 // Remove the ordering of this node. 655 Ordering->remove(N); 656 657 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 658 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 659 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 660 DbgVals[i]->setIsInvalidated(); 661} 662 663/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 664/// correspond to it. This is useful when we're about to delete or repurpose 665/// the node. We don't want future request for structurally identical nodes 666/// to return N anymore. 667bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 668 bool Erased = false; 669 switch (N->getOpcode()) { 670 case ISD::HANDLENODE: return false; // noop. 671 case ISD::CONDCODE: 672 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 673 "Cond code doesn't exist!"); 674 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 675 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 676 break; 677 case ISD::ExternalSymbol: 678 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 679 break; 680 case ISD::TargetExternalSymbol: { 681 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 682 Erased = TargetExternalSymbols.erase( 683 std::pair<std::string,unsigned char>(ESN->getSymbol(), 684 ESN->getTargetFlags())); 685 break; 686 } 687 case ISD::VALUETYPE: { 688 EVT VT = cast<VTSDNode>(N)->getVT(); 689 if (VT.isExtended()) { 690 Erased = ExtendedValueTypeNodes.erase(VT); 691 } else { 692 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 693 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 694 } 695 break; 696 } 697 default: 698 // Remove it from the CSE Map. 699 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 700 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 701 Erased = CSEMap.RemoveNode(N); 702 break; 703 } 704#ifndef NDEBUG 705 // Verify that the node was actually in one of the CSE maps, unless it has a 706 // flag result (which cannot be CSE'd) or is one of the special cases that are 707 // not subject to CSE. 708 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 709 !N->isMachineOpcode() && !doNotCSE(N)) { 710 N->dump(this); 711 dbgs() << "\n"; 712 llvm_unreachable("Node is not in map!"); 713 } 714#endif 715 return Erased; 716} 717 718/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 719/// maps and modified in place. Add it back to the CSE maps, unless an identical 720/// node already exists, in which case transfer all its users to the existing 721/// node. This transfer can potentially trigger recursive merging. 722/// 723void 724SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 725 // For node types that aren't CSE'd, just act as if no identical node 726 // already exists. 727 if (!doNotCSE(N)) { 728 SDNode *Existing = CSEMap.GetOrInsertNode(N); 729 if (Existing != N) { 730 // If there was already an existing matching node, use ReplaceAllUsesWith 731 // to replace the dead one with the existing one. This can cause 732 // recursive merging of other unrelated nodes down the line. 733 ReplaceAllUsesWith(N, Existing); 734 735 // N is now dead. Inform the listeners and delete it. 736 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 737 DUL->NodeDeleted(N, Existing); 738 DeleteNodeNotInCSEMaps(N); 739 return; 740 } 741 } 742 743 // If the node doesn't already exist, we updated it. Inform listeners. 744 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 745 DUL->NodeUpdated(N); 746} 747 748/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 749/// were replaced with those specified. If this node is never memoized, 750/// return null, otherwise return a pointer to the slot it would take. If a 751/// node already exists with these operands, the slot will be non-null. 752SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 753 void *&InsertPos) { 754 if (doNotCSE(N)) 755 return 0; 756 757 SDValue Ops[] = { Op }; 758 FoldingSetNodeID ID; 759 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 760 AddNodeIDCustom(ID, N); 761 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 762 return Node; 763} 764 765/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 766/// were replaced with those specified. If this node is never memoized, 767/// return null, otherwise return a pointer to the slot it would take. If a 768/// node already exists with these operands, the slot will be non-null. 769SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 770 SDValue Op1, SDValue Op2, 771 void *&InsertPos) { 772 if (doNotCSE(N)) 773 return 0; 774 775 SDValue Ops[] = { Op1, Op2 }; 776 FoldingSetNodeID ID; 777 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 778 AddNodeIDCustom(ID, N); 779 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 780 return Node; 781} 782 783 784/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 785/// were replaced with those specified. If this node is never memoized, 786/// return null, otherwise return a pointer to the slot it would take. If a 787/// node already exists with these operands, the slot will be non-null. 788SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 789 const SDValue *Ops,unsigned NumOps, 790 void *&InsertPos) { 791 if (doNotCSE(N)) 792 return 0; 793 794 FoldingSetNodeID ID; 795 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 796 AddNodeIDCustom(ID, N); 797 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 798 return Node; 799} 800 801#ifndef NDEBUG 802/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 803static void VerifyNodeCommon(SDNode *N) { 804 switch (N->getOpcode()) { 805 default: 806 break; 807 case ISD::BUILD_PAIR: { 808 EVT VT = N->getValueType(0); 809 assert(N->getNumValues() == 1 && "Too many results!"); 810 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 811 "Wrong return type!"); 812 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 813 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 814 "Mismatched operand types!"); 815 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 816 "Wrong operand type!"); 817 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 818 "Wrong return type size"); 819 break; 820 } 821 case ISD::BUILD_VECTOR: { 822 assert(N->getNumValues() == 1 && "Too many results!"); 823 assert(N->getValueType(0).isVector() && "Wrong return type!"); 824 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 825 "Wrong number of operands!"); 826 EVT EltVT = N->getValueType(0).getVectorElementType(); 827 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 828 assert((I->getValueType() == EltVT || 829 (EltVT.isInteger() && I->getValueType().isInteger() && 830 EltVT.bitsLE(I->getValueType()))) && 831 "Wrong operand type!"); 832 assert(I->getValueType() == N->getOperand(0).getValueType() && 833 "Operands must all have the same type"); 834 } 835 break; 836 } 837 } 838} 839 840/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 841static void VerifySDNode(SDNode *N) { 842 // The SDNode allocators cannot be used to allocate nodes with fields that are 843 // not present in an SDNode! 844 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 845 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 846 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 847 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 848 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 849 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 850 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 851 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 852 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 853 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 854 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 855 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 856 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 857 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 858 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 859 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 860 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 861 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 862 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 863 864 VerifyNodeCommon(N); 865} 866 867/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 868/// invalid. 869static void VerifyMachineNode(SDNode *N) { 870 // The MachineNode allocators cannot be used to allocate nodes with fields 871 // that are not present in a MachineNode! 872 // Currently there are no such nodes. 873 874 VerifyNodeCommon(N); 875} 876#endif // NDEBUG 877 878/// getEVTAlignment - Compute the default alignment value for the 879/// given type. 880/// 881unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 882 Type *Ty = VT == MVT::iPTR ? 883 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 884 VT.getTypeForEVT(*getContext()); 885 886 return TLI.getDataLayout()->getABITypeAlignment(Ty); 887} 888 889// EntryNode could meaningfully have debug info if we can find it... 890SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 891 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 892 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 893 Root(getEntryNode()), Ordering(0), UpdateListeners(0) { 894 AllNodes.push_back(&EntryNode); 895 Ordering = new SDNodeOrdering(); 896 DbgInfo = new SDDbgInfo(); 897} 898 899void SelectionDAG::init(MachineFunction &mf) { 900 MF = &mf; 901 Context = &mf.getFunction()->getContext(); 902} 903 904SelectionDAG::~SelectionDAG() { 905 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 906 allnodes_clear(); 907 delete Ordering; 908 delete DbgInfo; 909} 910 911void SelectionDAG::allnodes_clear() { 912 assert(&*AllNodes.begin() == &EntryNode); 913 AllNodes.remove(AllNodes.begin()); 914 while (!AllNodes.empty()) 915 DeallocateNode(AllNodes.begin()); 916} 917 918void SelectionDAG::clear() { 919 allnodes_clear(); 920 OperandAllocator.Reset(); 921 CSEMap.clear(); 922 923 ExtendedValueTypeNodes.clear(); 924 ExternalSymbols.clear(); 925 TargetExternalSymbols.clear(); 926 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 927 static_cast<CondCodeSDNode*>(0)); 928 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 929 static_cast<SDNode*>(0)); 930 931 EntryNode.UseList = 0; 932 AllNodes.push_back(&EntryNode); 933 Root = getEntryNode(); 934 Ordering->clear(); 935 DbgInfo->clear(); 936} 937 938SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 939 return VT.bitsGT(Op.getValueType()) ? 940 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 941 getNode(ISD::TRUNCATE, DL, VT, Op); 942} 943 944SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 945 return VT.bitsGT(Op.getValueType()) ? 946 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 947 getNode(ISD::TRUNCATE, DL, VT, Op); 948} 949 950SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 951 return VT.bitsGT(Op.getValueType()) ? 952 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 953 getNode(ISD::TRUNCATE, DL, VT, Op); 954} 955 956SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 957 assert(!VT.isVector() && 958 "getZeroExtendInReg should use the vector element type instead of " 959 "the vector type!"); 960 if (Op.getValueType() == VT) return Op; 961 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 962 APInt Imm = APInt::getLowBitsSet(BitWidth, 963 VT.getSizeInBits()); 964 return getNode(ISD::AND, DL, Op.getValueType(), Op, 965 getConstant(Imm, Op.getValueType())); 966} 967 968/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 969/// 970SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 971 EVT EltVT = VT.getScalarType(); 972 SDValue NegOne = 973 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 974 return getNode(ISD::XOR, DL, VT, Val, NegOne); 975} 976 977SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 978 EVT EltVT = VT.getScalarType(); 979 assert((EltVT.getSizeInBits() >= 64 || 980 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 981 "getConstant with a uint64_t value that doesn't fit in the type!"); 982 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 983} 984 985SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 986 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 987} 988 989SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 990 assert(VT.isInteger() && "Cannot create FP integer constant!"); 991 992 EVT EltVT = VT.getScalarType(); 993 const ConstantInt *Elt = &Val; 994 995 // In some cases the vector type is legal but the element type is illegal and 996 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 997 // inserted value (the type does not need to match the vector element type). 998 // Any extra bits introduced will be truncated away. 999 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 1000 TargetLowering::TypePromoteInteger) { 1001 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 1002 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 1003 Elt = ConstantInt::get(*getContext(), NewVal); 1004 } 1005 1006 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 1007 "APInt size does not match type size!"); 1008 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 1009 FoldingSetNodeID ID; 1010 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1011 ID.AddPointer(Elt); 1012 void *IP = 0; 1013 SDNode *N = NULL; 1014 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1015 if (!VT.isVector()) 1016 return SDValue(N, 0); 1017 1018 if (!N) { 1019 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1020 CSEMap.InsertNode(N, IP); 1021 AllNodes.push_back(N); 1022 } 1023 1024 SDValue Result(N, 0); 1025 if (VT.isVector()) { 1026 SmallVector<SDValue, 8> Ops; 1027 Ops.assign(VT.getVectorNumElements(), Result); 1028 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1029 } 1030 return Result; 1031} 1032 1033SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1034 return getConstant(Val, TLI.getPointerTy(), isTarget); 1035} 1036 1037 1038SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1039 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1040} 1041 1042SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1043 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1044 1045 EVT EltVT = VT.getScalarType(); 1046 1047 // Do the map lookup using the actual bit pattern for the floating point 1048 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1049 // we don't have issues with SNANs. 1050 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1051 FoldingSetNodeID ID; 1052 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1053 ID.AddPointer(&V); 1054 void *IP = 0; 1055 SDNode *N = NULL; 1056 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1057 if (!VT.isVector()) 1058 return SDValue(N, 0); 1059 1060 if (!N) { 1061 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1062 CSEMap.InsertNode(N, IP); 1063 AllNodes.push_back(N); 1064 } 1065 1066 SDValue Result(N, 0); 1067 if (VT.isVector()) { 1068 SmallVector<SDValue, 8> Ops; 1069 Ops.assign(VT.getVectorNumElements(), Result); 1070 // FIXME DebugLoc info might be appropriate here 1071 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1072 } 1073 return Result; 1074} 1075 1076SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1077 EVT EltVT = VT.getScalarType(); 1078 if (EltVT==MVT::f32) 1079 return getConstantFP(APFloat((float)Val), VT, isTarget); 1080 else if (EltVT==MVT::f64) 1081 return getConstantFP(APFloat(Val), VT, isTarget); 1082 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) { 1083 bool ignored; 1084 APFloat apf = APFloat(Val); 1085 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1086 &ignored); 1087 return getConstantFP(apf, VT, isTarget); 1088 } else 1089 llvm_unreachable("Unsupported type in getConstantFP"); 1090} 1091 1092SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1093 EVT VT, int64_t Offset, 1094 bool isTargetGA, 1095 unsigned char TargetFlags) { 1096 assert((TargetFlags == 0 || isTargetGA) && 1097 "Cannot set target flags on target-independent globals"); 1098 1099 // Truncate (with sign-extension) the offset value to the pointer size. 1100 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 1101 if (BitWidth < 64) 1102 Offset = SignExtend64(Offset, BitWidth); 1103 1104 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1105 if (!GVar) { 1106 // If GV is an alias then use the aliasee for determining thread-localness. 1107 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1108 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1109 } 1110 1111 unsigned Opc; 1112 if (GVar && GVar->isThreadLocal()) 1113 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1114 else 1115 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1116 1117 FoldingSetNodeID ID; 1118 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1119 ID.AddPointer(GV); 1120 ID.AddInteger(Offset); 1121 ID.AddInteger(TargetFlags); 1122 ID.AddInteger(GV->getType()->getAddressSpace()); 1123 void *IP = 0; 1124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1125 return SDValue(E, 0); 1126 1127 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1128 Offset, TargetFlags); 1129 CSEMap.InsertNode(N, IP); 1130 AllNodes.push_back(N); 1131 return SDValue(N, 0); 1132} 1133 1134SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1135 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1136 FoldingSetNodeID ID; 1137 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1138 ID.AddInteger(FI); 1139 void *IP = 0; 1140 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1141 return SDValue(E, 0); 1142 1143 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1144 CSEMap.InsertNode(N, IP); 1145 AllNodes.push_back(N); 1146 return SDValue(N, 0); 1147} 1148 1149SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1150 unsigned char TargetFlags) { 1151 assert((TargetFlags == 0 || isTarget) && 1152 "Cannot set target flags on target-independent jump tables"); 1153 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1154 FoldingSetNodeID ID; 1155 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1156 ID.AddInteger(JTI); 1157 ID.AddInteger(TargetFlags); 1158 void *IP = 0; 1159 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1160 return SDValue(E, 0); 1161 1162 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1163 TargetFlags); 1164 CSEMap.InsertNode(N, IP); 1165 AllNodes.push_back(N); 1166 return SDValue(N, 0); 1167} 1168 1169SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1170 unsigned Alignment, int Offset, 1171 bool isTarget, 1172 unsigned char TargetFlags) { 1173 assert((TargetFlags == 0 || isTarget) && 1174 "Cannot set target flags on target-independent globals"); 1175 if (Alignment == 0) 1176 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1177 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1178 FoldingSetNodeID ID; 1179 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1180 ID.AddInteger(Alignment); 1181 ID.AddInteger(Offset); 1182 ID.AddPointer(C); 1183 ID.AddInteger(TargetFlags); 1184 void *IP = 0; 1185 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1186 return SDValue(E, 0); 1187 1188 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1189 Alignment, TargetFlags); 1190 CSEMap.InsertNode(N, IP); 1191 AllNodes.push_back(N); 1192 return SDValue(N, 0); 1193} 1194 1195 1196SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1197 unsigned Alignment, int Offset, 1198 bool isTarget, 1199 unsigned char TargetFlags) { 1200 assert((TargetFlags == 0 || isTarget) && 1201 "Cannot set target flags on target-independent globals"); 1202 if (Alignment == 0) 1203 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1204 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1205 FoldingSetNodeID ID; 1206 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1207 ID.AddInteger(Alignment); 1208 ID.AddInteger(Offset); 1209 C->addSelectionDAGCSEId(ID); 1210 ID.AddInteger(TargetFlags); 1211 void *IP = 0; 1212 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1213 return SDValue(E, 0); 1214 1215 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1216 Alignment, TargetFlags); 1217 CSEMap.InsertNode(N, IP); 1218 AllNodes.push_back(N); 1219 return SDValue(N, 0); 1220} 1221 1222SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1223 unsigned char TargetFlags) { 1224 FoldingSetNodeID ID; 1225 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1226 ID.AddInteger(Index); 1227 ID.AddInteger(Offset); 1228 ID.AddInteger(TargetFlags); 1229 void *IP = 0; 1230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1231 return SDValue(E, 0); 1232 1233 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1234 TargetFlags); 1235 CSEMap.InsertNode(N, IP); 1236 AllNodes.push_back(N); 1237 return SDValue(N, 0); 1238} 1239 1240SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1241 FoldingSetNodeID ID; 1242 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1243 ID.AddPointer(MBB); 1244 void *IP = 0; 1245 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1246 return SDValue(E, 0); 1247 1248 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1249 CSEMap.InsertNode(N, IP); 1250 AllNodes.push_back(N); 1251 return SDValue(N, 0); 1252} 1253 1254SDValue SelectionDAG::getValueType(EVT VT) { 1255 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1256 ValueTypeNodes.size()) 1257 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1258 1259 SDNode *&N = VT.isExtended() ? 1260 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1261 1262 if (N) return SDValue(N, 0); 1263 N = new (NodeAllocator) VTSDNode(VT); 1264 AllNodes.push_back(N); 1265 return SDValue(N, 0); 1266} 1267 1268SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1269 SDNode *&N = ExternalSymbols[Sym]; 1270 if (N) return SDValue(N, 0); 1271 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1272 AllNodes.push_back(N); 1273 return SDValue(N, 0); 1274} 1275 1276SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1277 unsigned char TargetFlags) { 1278 SDNode *&N = 1279 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1280 TargetFlags)]; 1281 if (N) return SDValue(N, 0); 1282 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1283 AllNodes.push_back(N); 1284 return SDValue(N, 0); 1285} 1286 1287SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1288 if ((unsigned)Cond >= CondCodeNodes.size()) 1289 CondCodeNodes.resize(Cond+1); 1290 1291 if (CondCodeNodes[Cond] == 0) { 1292 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1293 CondCodeNodes[Cond] = N; 1294 AllNodes.push_back(N); 1295 } 1296 1297 return SDValue(CondCodeNodes[Cond], 0); 1298} 1299 1300// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1301// the shuffle mask M that point at N1 to point at N2, and indices that point 1302// N2 to point at N1. 1303static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1304 std::swap(N1, N2); 1305 int NElts = M.size(); 1306 for (int i = 0; i != NElts; ++i) { 1307 if (M[i] >= NElts) 1308 M[i] -= NElts; 1309 else if (M[i] >= 0) 1310 M[i] += NElts; 1311 } 1312} 1313 1314SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1315 SDValue N2, const int *Mask) { 1316 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1317 assert(VT.isVector() && N1.getValueType().isVector() && 1318 "Vector Shuffle VTs must be a vectors"); 1319 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1320 && "Vector Shuffle VTs must have same element type"); 1321 1322 // Canonicalize shuffle undef, undef -> undef 1323 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1324 return getUNDEF(VT); 1325 1326 // Validate that all indices in Mask are within the range of the elements 1327 // input to the shuffle. 1328 unsigned NElts = VT.getVectorNumElements(); 1329 SmallVector<int, 8> MaskVec; 1330 for (unsigned i = 0; i != NElts; ++i) { 1331 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1332 MaskVec.push_back(Mask[i]); 1333 } 1334 1335 // Canonicalize shuffle v, v -> v, undef 1336 if (N1 == N2) { 1337 N2 = getUNDEF(VT); 1338 for (unsigned i = 0; i != NElts; ++i) 1339 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1340 } 1341 1342 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1343 if (N1.getOpcode() == ISD::UNDEF) 1344 commuteShuffle(N1, N2, MaskVec); 1345 1346 // Canonicalize all index into lhs, -> shuffle lhs, undef 1347 // Canonicalize all index into rhs, -> shuffle rhs, undef 1348 bool AllLHS = true, AllRHS = true; 1349 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1350 for (unsigned i = 0; i != NElts; ++i) { 1351 if (MaskVec[i] >= (int)NElts) { 1352 if (N2Undef) 1353 MaskVec[i] = -1; 1354 else 1355 AllLHS = false; 1356 } else if (MaskVec[i] >= 0) { 1357 AllRHS = false; 1358 } 1359 } 1360 if (AllLHS && AllRHS) 1361 return getUNDEF(VT); 1362 if (AllLHS && !N2Undef) 1363 N2 = getUNDEF(VT); 1364 if (AllRHS) { 1365 N1 = getUNDEF(VT); 1366 commuteShuffle(N1, N2, MaskVec); 1367 } 1368 1369 // If Identity shuffle, or all shuffle in to undef, return that node. 1370 bool AllUndef = true; 1371 bool Identity = true; 1372 for (unsigned i = 0; i != NElts; ++i) { 1373 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1374 if (MaskVec[i] >= 0) AllUndef = false; 1375 } 1376 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1377 return N1; 1378 if (AllUndef) 1379 return getUNDEF(VT); 1380 1381 FoldingSetNodeID ID; 1382 SDValue Ops[2] = { N1, N2 }; 1383 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1384 for (unsigned i = 0; i != NElts; ++i) 1385 ID.AddInteger(MaskVec[i]); 1386 1387 void* IP = 0; 1388 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1389 return SDValue(E, 0); 1390 1391 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1392 // SDNode doesn't have access to it. This memory will be "leaked" when 1393 // the node is deallocated, but recovered when the NodeAllocator is released. 1394 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1395 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1396 1397 ShuffleVectorSDNode *N = 1398 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1399 CSEMap.InsertNode(N, IP); 1400 AllNodes.push_back(N); 1401 return SDValue(N, 0); 1402} 1403 1404SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1405 SDValue Val, SDValue DTy, 1406 SDValue STy, SDValue Rnd, SDValue Sat, 1407 ISD::CvtCode Code) { 1408 // If the src and dest types are the same and the conversion is between 1409 // integer types of the same sign or two floats, no conversion is necessary. 1410 if (DTy == STy && 1411 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1412 return Val; 1413 1414 FoldingSetNodeID ID; 1415 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1416 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1417 void* IP = 0; 1418 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1419 return SDValue(E, 0); 1420 1421 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1422 Code); 1423 CSEMap.InsertNode(N, IP); 1424 AllNodes.push_back(N); 1425 return SDValue(N, 0); 1426} 1427 1428SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1429 FoldingSetNodeID ID; 1430 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1431 ID.AddInteger(RegNo); 1432 void *IP = 0; 1433 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1434 return SDValue(E, 0); 1435 1436 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1437 CSEMap.InsertNode(N, IP); 1438 AllNodes.push_back(N); 1439 return SDValue(N, 0); 1440} 1441 1442SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1443 FoldingSetNodeID ID; 1444 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1445 ID.AddPointer(RegMask); 1446 void *IP = 0; 1447 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1448 return SDValue(E, 0); 1449 1450 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1451 CSEMap.InsertNode(N, IP); 1452 AllNodes.push_back(N); 1453 return SDValue(N, 0); 1454} 1455 1456SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1457 FoldingSetNodeID ID; 1458 SDValue Ops[] = { Root }; 1459 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1460 ID.AddPointer(Label); 1461 void *IP = 0; 1462 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1463 return SDValue(E, 0); 1464 1465 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1466 CSEMap.InsertNode(N, IP); 1467 AllNodes.push_back(N); 1468 return SDValue(N, 0); 1469} 1470 1471 1472SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1473 int64_t Offset, 1474 bool isTarget, 1475 unsigned char TargetFlags) { 1476 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1477 1478 FoldingSetNodeID ID; 1479 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1480 ID.AddPointer(BA); 1481 ID.AddInteger(Offset); 1482 ID.AddInteger(TargetFlags); 1483 void *IP = 0; 1484 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1485 return SDValue(E, 0); 1486 1487 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset, 1488 TargetFlags); 1489 CSEMap.InsertNode(N, IP); 1490 AllNodes.push_back(N); 1491 return SDValue(N, 0); 1492} 1493 1494SDValue SelectionDAG::getSrcValue(const Value *V) { 1495 assert((!V || V->getType()->isPointerTy()) && 1496 "SrcValue is not a pointer?"); 1497 1498 FoldingSetNodeID ID; 1499 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1500 ID.AddPointer(V); 1501 1502 void *IP = 0; 1503 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1504 return SDValue(E, 0); 1505 1506 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1507 CSEMap.InsertNode(N, IP); 1508 AllNodes.push_back(N); 1509 return SDValue(N, 0); 1510} 1511 1512/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1513SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1514 FoldingSetNodeID ID; 1515 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1516 ID.AddPointer(MD); 1517 1518 void *IP = 0; 1519 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1520 return SDValue(E, 0); 1521 1522 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1523 CSEMap.InsertNode(N, IP); 1524 AllNodes.push_back(N); 1525 return SDValue(N, 0); 1526} 1527 1528 1529/// getShiftAmountOperand - Return the specified value casted to 1530/// the target's desired shift amount type. 1531SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1532 EVT OpTy = Op.getValueType(); 1533 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1534 if (OpTy == ShTy || OpTy.isVector()) return Op; 1535 1536 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1537 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1538} 1539 1540/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1541/// specified value type. 1542SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1543 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1544 unsigned ByteSize = VT.getStoreSize(); 1545 Type *Ty = VT.getTypeForEVT(*getContext()); 1546 unsigned StackAlign = 1547 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign); 1548 1549 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1550 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1551} 1552 1553/// CreateStackTemporary - Create a stack temporary suitable for holding 1554/// either of the specified value types. 1555SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1556 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1557 VT2.getStoreSizeInBits())/8; 1558 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1559 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1560 const DataLayout *TD = TLI.getDataLayout(); 1561 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1562 TD->getPrefTypeAlignment(Ty2)); 1563 1564 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1565 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1566 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1567} 1568 1569SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1570 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1571 // These setcc operations always fold. 1572 switch (Cond) { 1573 default: break; 1574 case ISD::SETFALSE: 1575 case ISD::SETFALSE2: return getConstant(0, VT); 1576 case ISD::SETTRUE: 1577 case ISD::SETTRUE2: return getConstant(1, VT); 1578 1579 case ISD::SETOEQ: 1580 case ISD::SETOGT: 1581 case ISD::SETOGE: 1582 case ISD::SETOLT: 1583 case ISD::SETOLE: 1584 case ISD::SETONE: 1585 case ISD::SETO: 1586 case ISD::SETUO: 1587 case ISD::SETUEQ: 1588 case ISD::SETUNE: 1589 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1590 break; 1591 } 1592 1593 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1594 const APInt &C2 = N2C->getAPIntValue(); 1595 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1596 const APInt &C1 = N1C->getAPIntValue(); 1597 1598 switch (Cond) { 1599 default: llvm_unreachable("Unknown integer setcc!"); 1600 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1601 case ISD::SETNE: return getConstant(C1 != C2, VT); 1602 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1603 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1604 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1605 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1606 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1607 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1608 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1609 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1610 } 1611 } 1612 } 1613 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1614 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1615 // No compile time operations on this type yet. 1616 if (N1C->getValueType(0) == MVT::ppcf128) 1617 return SDValue(); 1618 1619 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1620 switch (Cond) { 1621 default: break; 1622 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1623 return getUNDEF(VT); 1624 // fall through 1625 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1626 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1627 return getUNDEF(VT); 1628 // fall through 1629 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1630 R==APFloat::cmpLessThan, VT); 1631 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1632 return getUNDEF(VT); 1633 // fall through 1634 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1635 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1636 return getUNDEF(VT); 1637 // fall through 1638 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1639 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1640 return getUNDEF(VT); 1641 // fall through 1642 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1643 R==APFloat::cmpEqual, VT); 1644 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1645 return getUNDEF(VT); 1646 // fall through 1647 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1648 R==APFloat::cmpEqual, VT); 1649 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1650 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1651 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1652 R==APFloat::cmpEqual, VT); 1653 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1654 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1655 R==APFloat::cmpLessThan, VT); 1656 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1657 R==APFloat::cmpUnordered, VT); 1658 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1659 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1660 } 1661 } else { 1662 // Ensure that the constant occurs on the RHS. 1663 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1664 } 1665 } 1666 1667 // Could not fold it. 1668 return SDValue(); 1669} 1670 1671/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1672/// use this predicate to simplify operations downstream. 1673bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1674 // This predicate is not safe for vector operations. 1675 if (Op.getValueType().isVector()) 1676 return false; 1677 1678 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1679 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1680} 1681 1682/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1683/// this predicate to simplify operations downstream. Mask is known to be zero 1684/// for bits that V cannot have. 1685bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1686 unsigned Depth) const { 1687 APInt KnownZero, KnownOne; 1688 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1689 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1690 return (KnownZero & Mask) == Mask; 1691} 1692 1693/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1694/// known to be either zero or one and return them in the KnownZero/KnownOne 1695/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1696/// processing. 1697void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1698 APInt &KnownOne, unsigned Depth) const { 1699 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1700 1701 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1702 if (Depth == 6) 1703 return; // Limit search depth. 1704 1705 APInt KnownZero2, KnownOne2; 1706 1707 switch (Op.getOpcode()) { 1708 case ISD::Constant: 1709 // We know all of the bits for a constant! 1710 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1711 KnownZero = ~KnownOne; 1712 return; 1713 case ISD::AND: 1714 // If either the LHS or the RHS are Zero, the result is zero. 1715 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1716 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1718 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1719 1720 // Output known-1 bits are only known if set in both the LHS & RHS. 1721 KnownOne &= KnownOne2; 1722 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1723 KnownZero |= KnownZero2; 1724 return; 1725 case ISD::OR: 1726 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1727 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1728 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1729 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1730 1731 // Output known-0 bits are only known if clear in both the LHS & RHS. 1732 KnownZero &= KnownZero2; 1733 // Output known-1 are known to be set if set in either the LHS | RHS. 1734 KnownOne |= KnownOne2; 1735 return; 1736 case ISD::XOR: { 1737 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1738 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1739 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1740 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1741 1742 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1743 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1744 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1745 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1746 KnownZero = KnownZeroOut; 1747 return; 1748 } 1749 case ISD::MUL: { 1750 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1751 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1752 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1753 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1754 1755 // If low bits are zero in either operand, output low known-0 bits. 1756 // Also compute a conserative estimate for high known-0 bits. 1757 // More trickiness is possible, but this is sufficient for the 1758 // interesting case of alignment computation. 1759 KnownOne.clearAllBits(); 1760 unsigned TrailZ = KnownZero.countTrailingOnes() + 1761 KnownZero2.countTrailingOnes(); 1762 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1763 KnownZero2.countLeadingOnes(), 1764 BitWidth) - BitWidth; 1765 1766 TrailZ = std::min(TrailZ, BitWidth); 1767 LeadZ = std::min(LeadZ, BitWidth); 1768 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1769 APInt::getHighBitsSet(BitWidth, LeadZ); 1770 return; 1771 } 1772 case ISD::UDIV: { 1773 // For the purposes of computing leading zeros we can conservatively 1774 // treat a udiv as a logical right shift by the power of 2 known to 1775 // be less than the denominator. 1776 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1777 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1778 1779 KnownOne2.clearAllBits(); 1780 KnownZero2.clearAllBits(); 1781 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1782 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1783 if (RHSUnknownLeadingOnes != BitWidth) 1784 LeadZ = std::min(BitWidth, 1785 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1786 1787 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1788 return; 1789 } 1790 case ISD::SELECT: 1791 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1792 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1793 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1794 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1795 1796 // Only known if known in both the LHS and RHS. 1797 KnownOne &= KnownOne2; 1798 KnownZero &= KnownZero2; 1799 return; 1800 case ISD::SELECT_CC: 1801 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1802 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1803 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1804 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1805 1806 // Only known if known in both the LHS and RHS. 1807 KnownOne &= KnownOne2; 1808 KnownZero &= KnownZero2; 1809 return; 1810 case ISD::SADDO: 1811 case ISD::UADDO: 1812 case ISD::SSUBO: 1813 case ISD::USUBO: 1814 case ISD::SMULO: 1815 case ISD::UMULO: 1816 if (Op.getResNo() != 1) 1817 return; 1818 // The boolean result conforms to getBooleanContents. Fall through. 1819 case ISD::SETCC: 1820 // If we know the result of a setcc has the top bits zero, use this info. 1821 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1822 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1823 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1824 return; 1825 case ISD::SHL: 1826 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1827 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1828 unsigned ShAmt = SA->getZExtValue(); 1829 1830 // If the shift count is an invalid immediate, don't do anything. 1831 if (ShAmt >= BitWidth) 1832 return; 1833 1834 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1835 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1836 KnownZero <<= ShAmt; 1837 KnownOne <<= ShAmt; 1838 // low bits known zero. 1839 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1840 } 1841 return; 1842 case ISD::SRL: 1843 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1844 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1845 unsigned ShAmt = SA->getZExtValue(); 1846 1847 // If the shift count is an invalid immediate, don't do anything. 1848 if (ShAmt >= BitWidth) 1849 return; 1850 1851 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1852 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1853 KnownZero = KnownZero.lshr(ShAmt); 1854 KnownOne = KnownOne.lshr(ShAmt); 1855 1856 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1857 KnownZero |= HighBits; // High bits known zero. 1858 } 1859 return; 1860 case ISD::SRA: 1861 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1862 unsigned ShAmt = SA->getZExtValue(); 1863 1864 // If the shift count is an invalid immediate, don't do anything. 1865 if (ShAmt >= BitWidth) 1866 return; 1867 1868 // If any of the demanded bits are produced by the sign extension, we also 1869 // demand the input sign bit. 1870 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1871 1872 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1873 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1874 KnownZero = KnownZero.lshr(ShAmt); 1875 KnownOne = KnownOne.lshr(ShAmt); 1876 1877 // Handle the sign bits. 1878 APInt SignBit = APInt::getSignBit(BitWidth); 1879 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1880 1881 if (KnownZero.intersects(SignBit)) { 1882 KnownZero |= HighBits; // New bits are known zero. 1883 } else if (KnownOne.intersects(SignBit)) { 1884 KnownOne |= HighBits; // New bits are known one. 1885 } 1886 } 1887 return; 1888 case ISD::SIGN_EXTEND_INREG: { 1889 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1890 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1891 1892 // Sign extension. Compute the demanded bits in the result that are not 1893 // present in the input. 1894 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1895 1896 APInt InSignBit = APInt::getSignBit(EBits); 1897 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1898 1899 // If the sign extended bits are demanded, we know that the sign 1900 // bit is demanded. 1901 InSignBit = InSignBit.zext(BitWidth); 1902 if (NewBits.getBoolValue()) 1903 InputDemandedBits |= InSignBit; 1904 1905 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1906 KnownOne &= InputDemandedBits; 1907 KnownZero &= InputDemandedBits; 1908 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1909 1910 // If the sign bit of the input is known set or clear, then we know the 1911 // top bits of the result. 1912 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1913 KnownZero |= NewBits; 1914 KnownOne &= ~NewBits; 1915 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1916 KnownOne |= NewBits; 1917 KnownZero &= ~NewBits; 1918 } else { // Input sign bit unknown 1919 KnownZero &= ~NewBits; 1920 KnownOne &= ~NewBits; 1921 } 1922 return; 1923 } 1924 case ISD::CTTZ: 1925 case ISD::CTTZ_ZERO_UNDEF: 1926 case ISD::CTLZ: 1927 case ISD::CTLZ_ZERO_UNDEF: 1928 case ISD::CTPOP: { 1929 unsigned LowBits = Log2_32(BitWidth)+1; 1930 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1931 KnownOne.clearAllBits(); 1932 return; 1933 } 1934 case ISD::LOAD: { 1935 LoadSDNode *LD = cast<LoadSDNode>(Op); 1936 if (ISD::isZEXTLoad(Op.getNode())) { 1937 EVT VT = LD->getMemoryVT(); 1938 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1939 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1940 } else if (const MDNode *Ranges = LD->getRanges()) { 1941 computeMaskedBitsLoad(*Ranges, KnownZero); 1942 } 1943 return; 1944 } 1945 case ISD::ZERO_EXTEND: { 1946 EVT InVT = Op.getOperand(0).getValueType(); 1947 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1948 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1949 KnownZero = KnownZero.trunc(InBits); 1950 KnownOne = KnownOne.trunc(InBits); 1951 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1952 KnownZero = KnownZero.zext(BitWidth); 1953 KnownOne = KnownOne.zext(BitWidth); 1954 KnownZero |= NewBits; 1955 return; 1956 } 1957 case ISD::SIGN_EXTEND: { 1958 EVT InVT = Op.getOperand(0).getValueType(); 1959 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1960 APInt InSignBit = APInt::getSignBit(InBits); 1961 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1962 1963 KnownZero = KnownZero.trunc(InBits); 1964 KnownOne = KnownOne.trunc(InBits); 1965 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1966 1967 // Note if the sign bit is known to be zero or one. 1968 bool SignBitKnownZero = KnownZero.isNegative(); 1969 bool SignBitKnownOne = KnownOne.isNegative(); 1970 assert(!(SignBitKnownZero && SignBitKnownOne) && 1971 "Sign bit can't be known to be both zero and one!"); 1972 1973 KnownZero = KnownZero.zext(BitWidth); 1974 KnownOne = KnownOne.zext(BitWidth); 1975 1976 // If the sign bit is known zero or one, the top bits match. 1977 if (SignBitKnownZero) 1978 KnownZero |= NewBits; 1979 else if (SignBitKnownOne) 1980 KnownOne |= NewBits; 1981 return; 1982 } 1983 case ISD::ANY_EXTEND: { 1984 EVT InVT = Op.getOperand(0).getValueType(); 1985 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1986 KnownZero = KnownZero.trunc(InBits); 1987 KnownOne = KnownOne.trunc(InBits); 1988 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1989 KnownZero = KnownZero.zext(BitWidth); 1990 KnownOne = KnownOne.zext(BitWidth); 1991 return; 1992 } 1993 case ISD::TRUNCATE: { 1994 EVT InVT = Op.getOperand(0).getValueType(); 1995 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1996 KnownZero = KnownZero.zext(InBits); 1997 KnownOne = KnownOne.zext(InBits); 1998 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1999 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 2000 KnownZero = KnownZero.trunc(BitWidth); 2001 KnownOne = KnownOne.trunc(BitWidth); 2002 break; 2003 } 2004 case ISD::AssertZext: { 2005 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 2006 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 2007 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2008 KnownZero |= (~InMask); 2009 KnownOne &= (~KnownZero); 2010 return; 2011 } 2012 case ISD::FGETSIGN: 2013 // All bits are zero except the low bit. 2014 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 2015 return; 2016 2017 case ISD::SUB: { 2018 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2019 // We know that the top bits of C-X are clear if X contains less bits 2020 // than C (i.e. no wrap-around can happen). For example, 20-X is 2021 // positive if we can prove that X is >= 0 and < 16. 2022 if (CLHS->getAPIntValue().isNonNegative()) { 2023 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2024 // NLZ can't be BitWidth with no sign bit 2025 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2026 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2027 2028 // If all of the MaskV bits are known to be zero, then we know the 2029 // output top bits are zero, because we now know that the output is 2030 // from [0-C]. 2031 if ((KnownZero2 & MaskV) == MaskV) { 2032 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2033 // Top bits known zero. 2034 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2035 } 2036 } 2037 } 2038 } 2039 // fall through 2040 case ISD::ADD: 2041 case ISD::ADDE: { 2042 // Output known-0 bits are known if clear or set in both the low clear bits 2043 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2044 // low 3 bits clear. 2045 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2046 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2047 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2048 2049 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2050 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2051 KnownZeroOut = std::min(KnownZeroOut, 2052 KnownZero2.countTrailingOnes()); 2053 2054 if (Op.getOpcode() == ISD::ADD) { 2055 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2056 return; 2057 } 2058 2059 // With ADDE, a carry bit may be added in, so we can only use this 2060 // information if we know (at least) that the low two bits are clear. We 2061 // then return to the caller that the low bit is unknown but that other bits 2062 // are known zero. 2063 if (KnownZeroOut >= 2) // ADDE 2064 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2065 return; 2066 } 2067 case ISD::SREM: 2068 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2069 const APInt &RA = Rem->getAPIntValue().abs(); 2070 if (RA.isPowerOf2()) { 2071 APInt LowBits = RA - 1; 2072 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2073 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2074 2075 // The low bits of the first operand are unchanged by the srem. 2076 KnownZero = KnownZero2 & LowBits; 2077 KnownOne = KnownOne2 & LowBits; 2078 2079 // If the first operand is non-negative or has all low bits zero, then 2080 // the upper bits are all zero. 2081 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2082 KnownZero |= ~LowBits; 2083 2084 // If the first operand is negative and not all low bits are zero, then 2085 // the upper bits are all one. 2086 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2087 KnownOne |= ~LowBits; 2088 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2089 } 2090 } 2091 return; 2092 case ISD::UREM: { 2093 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2094 const APInt &RA = Rem->getAPIntValue(); 2095 if (RA.isPowerOf2()) { 2096 APInt LowBits = (RA - 1); 2097 KnownZero |= ~LowBits; 2098 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2099 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2100 break; 2101 } 2102 } 2103 2104 // Since the result is less than or equal to either operand, any leading 2105 // zero bits in either operand must also exist in the result. 2106 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2107 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2108 2109 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2110 KnownZero2.countLeadingOnes()); 2111 KnownOne.clearAllBits(); 2112 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2113 return; 2114 } 2115 case ISD::FrameIndex: 2116 case ISD::TargetFrameIndex: 2117 if (unsigned Align = InferPtrAlignment(Op)) { 2118 // The low bits are known zero if the pointer is aligned. 2119 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2120 return; 2121 } 2122 break; 2123 2124 default: 2125 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2126 break; 2127 // Fallthrough 2128 case ISD::INTRINSIC_WO_CHAIN: 2129 case ISD::INTRINSIC_W_CHAIN: 2130 case ISD::INTRINSIC_VOID: 2131 // Allow the target to implement this method for its nodes. 2132 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2133 return; 2134 } 2135} 2136 2137/// ComputeNumSignBits - Return the number of times the sign bit of the 2138/// register is replicated into the other bits. We know that at least 1 bit 2139/// is always equal to the sign bit (itself), but other cases can give us 2140/// information. For example, immediately after an "SRA X, 2", we know that 2141/// the top 3 bits are all equal to each other, so we return 3. 2142unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2143 EVT VT = Op.getValueType(); 2144 assert(VT.isInteger() && "Invalid VT!"); 2145 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2146 unsigned Tmp, Tmp2; 2147 unsigned FirstAnswer = 1; 2148 2149 if (Depth == 6) 2150 return 1; // Limit search depth. 2151 2152 switch (Op.getOpcode()) { 2153 default: break; 2154 case ISD::AssertSext: 2155 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2156 return VTBits-Tmp+1; 2157 case ISD::AssertZext: 2158 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2159 return VTBits-Tmp; 2160 2161 case ISD::Constant: { 2162 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2163 return Val.getNumSignBits(); 2164 } 2165 2166 case ISD::SIGN_EXTEND: 2167 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2168 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2169 2170 case ISD::SIGN_EXTEND_INREG: 2171 // Max of the input and what this extends. 2172 Tmp = 2173 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2174 Tmp = VTBits-Tmp+1; 2175 2176 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2177 return std::max(Tmp, Tmp2); 2178 2179 case ISD::SRA: 2180 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2181 // SRA X, C -> adds C sign bits. 2182 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2183 Tmp += C->getZExtValue(); 2184 if (Tmp > VTBits) Tmp = VTBits; 2185 } 2186 return Tmp; 2187 case ISD::SHL: 2188 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2189 // shl destroys sign bits. 2190 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2191 if (C->getZExtValue() >= VTBits || // Bad shift. 2192 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2193 return Tmp - C->getZExtValue(); 2194 } 2195 break; 2196 case ISD::AND: 2197 case ISD::OR: 2198 case ISD::XOR: // NOT is handled here. 2199 // Logical binary ops preserve the number of sign bits at the worst. 2200 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2201 if (Tmp != 1) { 2202 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2203 FirstAnswer = std::min(Tmp, Tmp2); 2204 // We computed what we know about the sign bits as our first 2205 // answer. Now proceed to the generic code that uses 2206 // ComputeMaskedBits, and pick whichever answer is better. 2207 } 2208 break; 2209 2210 case ISD::SELECT: 2211 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2212 if (Tmp == 1) return 1; // Early out. 2213 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2214 return std::min(Tmp, Tmp2); 2215 2216 case ISD::SADDO: 2217 case ISD::UADDO: 2218 case ISD::SSUBO: 2219 case ISD::USUBO: 2220 case ISD::SMULO: 2221 case ISD::UMULO: 2222 if (Op.getResNo() != 1) 2223 break; 2224 // The boolean result conforms to getBooleanContents. Fall through. 2225 case ISD::SETCC: 2226 // If setcc returns 0/-1, all bits are sign bits. 2227 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2228 TargetLowering::ZeroOrNegativeOneBooleanContent) 2229 return VTBits; 2230 break; 2231 case ISD::ROTL: 2232 case ISD::ROTR: 2233 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2234 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2235 2236 // Handle rotate right by N like a rotate left by 32-N. 2237 if (Op.getOpcode() == ISD::ROTR) 2238 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2239 2240 // If we aren't rotating out all of the known-in sign bits, return the 2241 // number that are left. This handles rotl(sext(x), 1) for example. 2242 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2243 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2244 } 2245 break; 2246 case ISD::ADD: 2247 // Add can have at most one carry bit. Thus we know that the output 2248 // is, at worst, one more bit than the inputs. 2249 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2250 if (Tmp == 1) return 1; // Early out. 2251 2252 // Special case decrementing a value (ADD X, -1): 2253 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2254 if (CRHS->isAllOnesValue()) { 2255 APInt KnownZero, KnownOne; 2256 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2257 2258 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2259 // sign bits set. 2260 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2261 return VTBits; 2262 2263 // If we are subtracting one from a positive number, there is no carry 2264 // out of the result. 2265 if (KnownZero.isNegative()) 2266 return Tmp; 2267 } 2268 2269 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2270 if (Tmp2 == 1) return 1; 2271 return std::min(Tmp, Tmp2)-1; 2272 2273 case ISD::SUB: 2274 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2275 if (Tmp2 == 1) return 1; 2276 2277 // Handle NEG. 2278 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2279 if (CLHS->isNullValue()) { 2280 APInt KnownZero, KnownOne; 2281 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2282 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2283 // sign bits set. 2284 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2285 return VTBits; 2286 2287 // If the input is known to be positive (the sign bit is known clear), 2288 // the output of the NEG has the same number of sign bits as the input. 2289 if (KnownZero.isNegative()) 2290 return Tmp2; 2291 2292 // Otherwise, we treat this like a SUB. 2293 } 2294 2295 // Sub can have at most one carry bit. Thus we know that the output 2296 // is, at worst, one more bit than the inputs. 2297 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2298 if (Tmp == 1) return 1; // Early out. 2299 return std::min(Tmp, Tmp2)-1; 2300 case ISD::TRUNCATE: 2301 // FIXME: it's tricky to do anything useful for this, but it is an important 2302 // case for targets like X86. 2303 break; 2304 } 2305 2306 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2307 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2308 unsigned ExtType = LD->getExtensionType(); 2309 switch (ExtType) { 2310 default: break; 2311 case ISD::SEXTLOAD: // '17' bits known 2312 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2313 return VTBits-Tmp+1; 2314 case ISD::ZEXTLOAD: // '16' bits known 2315 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2316 return VTBits-Tmp; 2317 } 2318 } 2319 2320 // Allow the target to implement this method for its nodes. 2321 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2322 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2323 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2324 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2325 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2326 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2327 } 2328 2329 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2330 // use this information. 2331 APInt KnownZero, KnownOne; 2332 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2333 2334 APInt Mask; 2335 if (KnownZero.isNegative()) { // sign bit is 0 2336 Mask = KnownZero; 2337 } else if (KnownOne.isNegative()) { // sign bit is 1; 2338 Mask = KnownOne; 2339 } else { 2340 // Nothing known. 2341 return FirstAnswer; 2342 } 2343 2344 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2345 // the number of identical bits in the top of the input value. 2346 Mask = ~Mask; 2347 Mask <<= Mask.getBitWidth()-VTBits; 2348 // Return # leading zeros. We use 'min' here in case Val was zero before 2349 // shifting. We don't want to return '64' as for an i32 "0". 2350 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2351} 2352 2353/// isBaseWithConstantOffset - Return true if the specified operand is an 2354/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2355/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2356/// semantics as an ADD. This handles the equivalence: 2357/// X|Cst == X+Cst iff X&Cst = 0. 2358bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2359 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2360 !isa<ConstantSDNode>(Op.getOperand(1))) 2361 return false; 2362 2363 if (Op.getOpcode() == ISD::OR && 2364 !MaskedValueIsZero(Op.getOperand(0), 2365 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2366 return false; 2367 2368 return true; 2369} 2370 2371 2372bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2373 // If we're told that NaNs won't happen, assume they won't. 2374 if (getTarget().Options.NoNaNsFPMath) 2375 return true; 2376 2377 // If the value is a constant, we can obviously see if it is a NaN or not. 2378 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2379 return !C->getValueAPF().isNaN(); 2380 2381 // TODO: Recognize more cases here. 2382 2383 return false; 2384} 2385 2386bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2387 // If the value is a constant, we can obviously see if it is a zero or not. 2388 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2389 return !C->isZero(); 2390 2391 // TODO: Recognize more cases here. 2392 switch (Op.getOpcode()) { 2393 default: break; 2394 case ISD::OR: 2395 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2396 return !C->isNullValue(); 2397 break; 2398 } 2399 2400 return false; 2401} 2402 2403bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2404 // Check the obvious case. 2405 if (A == B) return true; 2406 2407 // For for negative and positive zero. 2408 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2409 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2410 if (CA->isZero() && CB->isZero()) return true; 2411 2412 // Otherwise they may not be equal. 2413 return false; 2414} 2415 2416/// getNode - Gets or creates the specified node. 2417/// 2418SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2419 FoldingSetNodeID ID; 2420 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2421 void *IP = 0; 2422 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2423 return SDValue(E, 0); 2424 2425 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2426 CSEMap.InsertNode(N, IP); 2427 2428 AllNodes.push_back(N); 2429#ifndef NDEBUG 2430 VerifySDNode(N); 2431#endif 2432 return SDValue(N, 0); 2433} 2434 2435SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2436 EVT VT, SDValue Operand) { 2437 // Constant fold unary operations with an integer constant operand. 2438 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2439 const APInt &Val = C->getAPIntValue(); 2440 switch (Opcode) { 2441 default: break; 2442 case ISD::SIGN_EXTEND: 2443 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2444 case ISD::ANY_EXTEND: 2445 case ISD::ZERO_EXTEND: 2446 case ISD::TRUNCATE: 2447 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2448 case ISD::UINT_TO_FP: 2449 case ISD::SINT_TO_FP: { 2450 // No compile time operations on ppcf128. 2451 if (VT == MVT::ppcf128) break; 2452 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2453 (void)apf.convertFromAPInt(Val, 2454 Opcode==ISD::SINT_TO_FP, 2455 APFloat::rmNearestTiesToEven); 2456 return getConstantFP(apf, VT); 2457 } 2458 case ISD::BITCAST: 2459 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2460 return getConstantFP(APFloat(Val), VT); 2461 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2462 return getConstantFP(APFloat(Val), VT); 2463 break; 2464 case ISD::BSWAP: 2465 return getConstant(Val.byteSwap(), VT); 2466 case ISD::CTPOP: 2467 return getConstant(Val.countPopulation(), VT); 2468 case ISD::CTLZ: 2469 case ISD::CTLZ_ZERO_UNDEF: 2470 return getConstant(Val.countLeadingZeros(), VT); 2471 case ISD::CTTZ: 2472 case ISD::CTTZ_ZERO_UNDEF: 2473 return getConstant(Val.countTrailingZeros(), VT); 2474 } 2475 } 2476 2477 // Constant fold unary operations with a floating point constant operand. 2478 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2479 APFloat V = C->getValueAPF(); // make copy 2480 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2481 switch (Opcode) { 2482 case ISD::FNEG: 2483 V.changeSign(); 2484 return getConstantFP(V, VT); 2485 case ISD::FABS: 2486 V.clearSign(); 2487 return getConstantFP(V, VT); 2488 case ISD::FCEIL: { 2489 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2490 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2491 return getConstantFP(V, VT); 2492 break; 2493 } 2494 case ISD::FTRUNC: { 2495 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2496 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2497 return getConstantFP(V, VT); 2498 break; 2499 } 2500 case ISD::FFLOOR: { 2501 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2502 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2503 return getConstantFP(V, VT); 2504 break; 2505 } 2506 case ISD::FP_EXTEND: { 2507 bool ignored; 2508 // This can return overflow, underflow, or inexact; we don't care. 2509 // FIXME need to be more flexible about rounding mode. 2510 (void)V.convert(*EVTToAPFloatSemantics(VT), 2511 APFloat::rmNearestTiesToEven, &ignored); 2512 return getConstantFP(V, VT); 2513 } 2514 case ISD::FP_TO_SINT: 2515 case ISD::FP_TO_UINT: { 2516 integerPart x[2]; 2517 bool ignored; 2518 assert(integerPartWidth >= 64); 2519 // FIXME need to be more flexible about rounding mode. 2520 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2521 Opcode==ISD::FP_TO_SINT, 2522 APFloat::rmTowardZero, &ignored); 2523 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2524 break; 2525 APInt api(VT.getSizeInBits(), x); 2526 return getConstant(api, VT); 2527 } 2528 case ISD::BITCAST: 2529 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2530 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2531 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2532 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2533 break; 2534 } 2535 } 2536 } 2537 2538 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2539 switch (Opcode) { 2540 case ISD::TokenFactor: 2541 case ISD::MERGE_VALUES: 2542 case ISD::CONCAT_VECTORS: 2543 return Operand; // Factor, merge or concat of one node? No need. 2544 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2545 case ISD::FP_EXTEND: 2546 assert(VT.isFloatingPoint() && 2547 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2548 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2549 assert((!VT.isVector() || 2550 VT.getVectorNumElements() == 2551 Operand.getValueType().getVectorNumElements()) && 2552 "Vector element count mismatch!"); 2553 if (Operand.getOpcode() == ISD::UNDEF) 2554 return getUNDEF(VT); 2555 break; 2556 case ISD::SIGN_EXTEND: 2557 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2558 "Invalid SIGN_EXTEND!"); 2559 if (Operand.getValueType() == VT) return Operand; // noop extension 2560 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2561 "Invalid sext node, dst < src!"); 2562 assert((!VT.isVector() || 2563 VT.getVectorNumElements() == 2564 Operand.getValueType().getVectorNumElements()) && 2565 "Vector element count mismatch!"); 2566 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2567 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2568 else if (OpOpcode == ISD::UNDEF) 2569 // sext(undef) = 0, because the top bits will all be the same. 2570 return getConstant(0, VT); 2571 break; 2572 case ISD::ZERO_EXTEND: 2573 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2574 "Invalid ZERO_EXTEND!"); 2575 if (Operand.getValueType() == VT) return Operand; // noop extension 2576 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2577 "Invalid zext node, dst < src!"); 2578 assert((!VT.isVector() || 2579 VT.getVectorNumElements() == 2580 Operand.getValueType().getVectorNumElements()) && 2581 "Vector element count mismatch!"); 2582 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2583 return getNode(ISD::ZERO_EXTEND, DL, VT, 2584 Operand.getNode()->getOperand(0)); 2585 else if (OpOpcode == ISD::UNDEF) 2586 // zext(undef) = 0, because the top bits will be zero. 2587 return getConstant(0, VT); 2588 break; 2589 case ISD::ANY_EXTEND: 2590 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2591 "Invalid ANY_EXTEND!"); 2592 if (Operand.getValueType() == VT) return Operand; // noop extension 2593 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2594 "Invalid anyext node, dst < src!"); 2595 assert((!VT.isVector() || 2596 VT.getVectorNumElements() == 2597 Operand.getValueType().getVectorNumElements()) && 2598 "Vector element count mismatch!"); 2599 2600 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2601 OpOpcode == ISD::ANY_EXTEND) 2602 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2603 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2604 else if (OpOpcode == ISD::UNDEF) 2605 return getUNDEF(VT); 2606 2607 // (ext (trunx x)) -> x 2608 if (OpOpcode == ISD::TRUNCATE) { 2609 SDValue OpOp = Operand.getNode()->getOperand(0); 2610 if (OpOp.getValueType() == VT) 2611 return OpOp; 2612 } 2613 break; 2614 case ISD::TRUNCATE: 2615 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2616 "Invalid TRUNCATE!"); 2617 if (Operand.getValueType() == VT) return Operand; // noop truncate 2618 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2619 "Invalid truncate node, src < dst!"); 2620 assert((!VT.isVector() || 2621 VT.getVectorNumElements() == 2622 Operand.getValueType().getVectorNumElements()) && 2623 "Vector element count mismatch!"); 2624 if (OpOpcode == ISD::TRUNCATE) 2625 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2626 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2627 OpOpcode == ISD::ANY_EXTEND) { 2628 // If the source is smaller than the dest, we still need an extend. 2629 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2630 .bitsLT(VT.getScalarType())) 2631 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2632 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2633 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2634 return Operand.getNode()->getOperand(0); 2635 } 2636 if (OpOpcode == ISD::UNDEF) 2637 return getUNDEF(VT); 2638 break; 2639 case ISD::BITCAST: 2640 // Basic sanity checking. 2641 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2642 && "Cannot BITCAST between types of different sizes!"); 2643 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2644 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2645 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2646 if (OpOpcode == ISD::UNDEF) 2647 return getUNDEF(VT); 2648 break; 2649 case ISD::SCALAR_TO_VECTOR: 2650 assert(VT.isVector() && !Operand.getValueType().isVector() && 2651 (VT.getVectorElementType() == Operand.getValueType() || 2652 (VT.getVectorElementType().isInteger() && 2653 Operand.getValueType().isInteger() && 2654 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2655 "Illegal SCALAR_TO_VECTOR node!"); 2656 if (OpOpcode == ISD::UNDEF) 2657 return getUNDEF(VT); 2658 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2659 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2660 isa<ConstantSDNode>(Operand.getOperand(1)) && 2661 Operand.getConstantOperandVal(1) == 0 && 2662 Operand.getOperand(0).getValueType() == VT) 2663 return Operand.getOperand(0); 2664 break; 2665 case ISD::FNEG: 2666 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2667 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2668 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2669 Operand.getNode()->getOperand(0)); 2670 if (OpOpcode == ISD::FNEG) // --X -> X 2671 return Operand.getNode()->getOperand(0); 2672 break; 2673 case ISD::FABS: 2674 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2675 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2676 break; 2677 } 2678 2679 SDNode *N; 2680 SDVTList VTs = getVTList(VT); 2681 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2682 FoldingSetNodeID ID; 2683 SDValue Ops[1] = { Operand }; 2684 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2685 void *IP = 0; 2686 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2687 return SDValue(E, 0); 2688 2689 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2690 CSEMap.InsertNode(N, IP); 2691 } else { 2692 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2693 } 2694 2695 AllNodes.push_back(N); 2696#ifndef NDEBUG 2697 VerifySDNode(N); 2698#endif 2699 return SDValue(N, 0); 2700} 2701 2702SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2703 EVT VT, 2704 ConstantSDNode *Cst1, 2705 ConstantSDNode *Cst2) { 2706 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2707 2708 switch (Opcode) { 2709 case ISD::ADD: return getConstant(C1 + C2, VT); 2710 case ISD::SUB: return getConstant(C1 - C2, VT); 2711 case ISD::MUL: return getConstant(C1 * C2, VT); 2712 case ISD::UDIV: 2713 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2714 break; 2715 case ISD::UREM: 2716 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2717 break; 2718 case ISD::SDIV: 2719 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2720 break; 2721 case ISD::SREM: 2722 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2723 break; 2724 case ISD::AND: return getConstant(C1 & C2, VT); 2725 case ISD::OR: return getConstant(C1 | C2, VT); 2726 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2727 case ISD::SHL: return getConstant(C1 << C2, VT); 2728 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2729 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2730 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2731 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2732 default: break; 2733 } 2734 2735 return SDValue(); 2736} 2737 2738SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2739 SDValue N1, SDValue N2) { 2740 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2741 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2742 switch (Opcode) { 2743 default: break; 2744 case ISD::TokenFactor: 2745 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2746 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2747 // Fold trivial token factors. 2748 if (N1.getOpcode() == ISD::EntryToken) return N2; 2749 if (N2.getOpcode() == ISD::EntryToken) return N1; 2750 if (N1 == N2) return N1; 2751 break; 2752 case ISD::CONCAT_VECTORS: 2753 // Concat of UNDEFs is UNDEF. 2754 if (N1.getOpcode() == ISD::UNDEF && 2755 N2.getOpcode() == ISD::UNDEF) 2756 return getUNDEF(VT); 2757 2758 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2759 // one big BUILD_VECTOR. 2760 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2761 N2.getOpcode() == ISD::BUILD_VECTOR) { 2762 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2763 N1.getNode()->op_end()); 2764 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2765 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2766 } 2767 break; 2768 case ISD::AND: 2769 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2770 assert(N1.getValueType() == N2.getValueType() && 2771 N1.getValueType() == VT && "Binary operator types must match!"); 2772 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2773 // worth handling here. 2774 if (N2C && N2C->isNullValue()) 2775 return N2; 2776 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2777 return N1; 2778 break; 2779 case ISD::OR: 2780 case ISD::XOR: 2781 case ISD::ADD: 2782 case ISD::SUB: 2783 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2784 assert(N1.getValueType() == N2.getValueType() && 2785 N1.getValueType() == VT && "Binary operator types must match!"); 2786 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2787 // it's worth handling here. 2788 if (N2C && N2C->isNullValue()) 2789 return N1; 2790 break; 2791 case ISD::UDIV: 2792 case ISD::UREM: 2793 case ISD::MULHU: 2794 case ISD::MULHS: 2795 case ISD::MUL: 2796 case ISD::SDIV: 2797 case ISD::SREM: 2798 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2799 assert(N1.getValueType() == N2.getValueType() && 2800 N1.getValueType() == VT && "Binary operator types must match!"); 2801 break; 2802 case ISD::FADD: 2803 case ISD::FSUB: 2804 case ISD::FMUL: 2805 case ISD::FDIV: 2806 case ISD::FREM: 2807 if (getTarget().Options.UnsafeFPMath) { 2808 if (Opcode == ISD::FADD) { 2809 // 0+x --> x 2810 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2811 if (CFP->getValueAPF().isZero()) 2812 return N2; 2813 // x+0 --> x 2814 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2815 if (CFP->getValueAPF().isZero()) 2816 return N1; 2817 } else if (Opcode == ISD::FSUB) { 2818 // x-0 --> x 2819 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2820 if (CFP->getValueAPF().isZero()) 2821 return N1; 2822 } else if (Opcode == ISD::FMUL) { 2823 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1); 2824 SDValue V = N2; 2825 2826 // If the first operand isn't the constant, try the second 2827 if (!CFP) { 2828 CFP = dyn_cast<ConstantFPSDNode>(N2); 2829 V = N1; 2830 } 2831 2832 if (CFP) { 2833 // 0*x --> 0 2834 if (CFP->isZero()) 2835 return SDValue(CFP,0); 2836 // 1*x --> x 2837 if (CFP->isExactlyValue(1.0)) 2838 return V; 2839 } 2840 } 2841 } 2842 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2843 assert(N1.getValueType() == N2.getValueType() && 2844 N1.getValueType() == VT && "Binary operator types must match!"); 2845 break; 2846 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2847 assert(N1.getValueType() == VT && 2848 N1.getValueType().isFloatingPoint() && 2849 N2.getValueType().isFloatingPoint() && 2850 "Invalid FCOPYSIGN!"); 2851 break; 2852 case ISD::SHL: 2853 case ISD::SRA: 2854 case ISD::SRL: 2855 case ISD::ROTL: 2856 case ISD::ROTR: 2857 assert(VT == N1.getValueType() && 2858 "Shift operators return type must be the same as their first arg"); 2859 assert(VT.isInteger() && N2.getValueType().isInteger() && 2860 "Shifts only work on integers"); 2861 // Verify that the shift amount VT is bit enough to hold valid shift 2862 // amounts. This catches things like trying to shift an i1024 value by an 2863 // i8, which is easy to fall into in generic code that uses 2864 // TLI.getShiftAmount(). 2865 assert(N2.getValueType().getSizeInBits() >= 2866 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2867 "Invalid use of small shift amount with oversized value!"); 2868 2869 // Always fold shifts of i1 values so the code generator doesn't need to 2870 // handle them. Since we know the size of the shift has to be less than the 2871 // size of the value, the shift/rotate count is guaranteed to be zero. 2872 if (VT == MVT::i1) 2873 return N1; 2874 if (N2C && N2C->isNullValue()) 2875 return N1; 2876 break; 2877 case ISD::FP_ROUND_INREG: { 2878 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2879 assert(VT == N1.getValueType() && "Not an inreg round!"); 2880 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2881 "Cannot FP_ROUND_INREG integer types"); 2882 assert(EVT.isVector() == VT.isVector() && 2883 "FP_ROUND_INREG type should be vector iff the operand " 2884 "type is vector!"); 2885 assert((!EVT.isVector() || 2886 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2887 "Vector element counts must match in FP_ROUND_INREG"); 2888 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2889 (void)EVT; 2890 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2891 break; 2892 } 2893 case ISD::FP_ROUND: 2894 assert(VT.isFloatingPoint() && 2895 N1.getValueType().isFloatingPoint() && 2896 VT.bitsLE(N1.getValueType()) && 2897 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2898 if (N1.getValueType() == VT) return N1; // noop conversion. 2899 break; 2900 case ISD::AssertSext: 2901 case ISD::AssertZext: { 2902 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2903 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2904 assert(VT.isInteger() && EVT.isInteger() && 2905 "Cannot *_EXTEND_INREG FP types"); 2906 assert(!EVT.isVector() && 2907 "AssertSExt/AssertZExt type should be the vector element type " 2908 "rather than the vector type!"); 2909 assert(EVT.bitsLE(VT) && "Not extending!"); 2910 if (VT == EVT) return N1; // noop assertion. 2911 break; 2912 } 2913 case ISD::SIGN_EXTEND_INREG: { 2914 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2915 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2916 assert(VT.isInteger() && EVT.isInteger() && 2917 "Cannot *_EXTEND_INREG FP types"); 2918 assert(EVT.isVector() == VT.isVector() && 2919 "SIGN_EXTEND_INREG type should be vector iff the operand " 2920 "type is vector!"); 2921 assert((!EVT.isVector() || 2922 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2923 "Vector element counts must match in SIGN_EXTEND_INREG"); 2924 assert(EVT.bitsLE(VT) && "Not extending!"); 2925 if (EVT == VT) return N1; // Not actually extending 2926 2927 if (N1C) { 2928 APInt Val = N1C->getAPIntValue(); 2929 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2930 Val <<= Val.getBitWidth()-FromBits; 2931 Val = Val.ashr(Val.getBitWidth()-FromBits); 2932 return getConstant(Val, VT); 2933 } 2934 break; 2935 } 2936 case ISD::EXTRACT_VECTOR_ELT: 2937 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2938 if (N1.getOpcode() == ISD::UNDEF) 2939 return getUNDEF(VT); 2940 2941 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2942 // expanding copies of large vectors from registers. 2943 if (N2C && 2944 N1.getOpcode() == ISD::CONCAT_VECTORS && 2945 N1.getNumOperands() > 0) { 2946 unsigned Factor = 2947 N1.getOperand(0).getValueType().getVectorNumElements(); 2948 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2949 N1.getOperand(N2C->getZExtValue() / Factor), 2950 getConstant(N2C->getZExtValue() % Factor, 2951 N2.getValueType())); 2952 } 2953 2954 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2955 // expanding large vector constants. 2956 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2957 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2958 2959 if (VT != Elt.getValueType()) 2960 // If the vector element type is not legal, the BUILD_VECTOR operands 2961 // are promoted and implicitly truncated, and the result implicitly 2962 // extended. Make that explicit here. 2963 Elt = getAnyExtOrTrunc(Elt, DL, VT); 2964 2965 return Elt; 2966 } 2967 2968 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2969 // operations are lowered to scalars. 2970 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2971 // If the indices are the same, return the inserted element else 2972 // if the indices are known different, extract the element from 2973 // the original vector. 2974 SDValue N1Op2 = N1.getOperand(2); 2975 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2976 2977 if (N1Op2C && N2C) { 2978 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2979 if (VT == N1.getOperand(1).getValueType()) 2980 return N1.getOperand(1); 2981 else 2982 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2983 } 2984 2985 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2986 } 2987 } 2988 break; 2989 case ISD::EXTRACT_ELEMENT: 2990 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2991 assert(!N1.getValueType().isVector() && !VT.isVector() && 2992 (N1.getValueType().isInteger() == VT.isInteger()) && 2993 N1.getValueType() != VT && 2994 "Wrong types for EXTRACT_ELEMENT!"); 2995 2996 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2997 // 64-bit integers into 32-bit parts. Instead of building the extract of 2998 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2999 if (N1.getOpcode() == ISD::BUILD_PAIR) 3000 return N1.getOperand(N2C->getZExtValue()); 3001 3002 // EXTRACT_ELEMENT of a constant int is also very common. 3003 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 3004 unsigned ElementSize = VT.getSizeInBits(); 3005 unsigned Shift = ElementSize * N2C->getZExtValue(); 3006 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 3007 return getConstant(ShiftedVal.trunc(ElementSize), VT); 3008 } 3009 break; 3010 case ISD::EXTRACT_SUBVECTOR: { 3011 SDValue Index = N2; 3012 if (VT.isSimple() && N1.getValueType().isSimple()) { 3013 assert(VT.isVector() && N1.getValueType().isVector() && 3014 "Extract subvector VTs must be a vectors!"); 3015 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 3016 "Extract subvector VTs must have the same element type!"); 3017 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 3018 "Extract subvector must be from larger vector to smaller vector!"); 3019 3020 if (isa<ConstantSDNode>(Index.getNode())) { 3021 assert((VT.getVectorNumElements() + 3022 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3023 <= N1.getValueType().getVectorNumElements()) 3024 && "Extract subvector overflow!"); 3025 } 3026 3027 // Trivial extraction. 3028 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 3029 return N1; 3030 } 3031 break; 3032 } 3033 } 3034 3035 if (N1C) { 3036 if (N2C) { 3037 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 3038 if (SV.getNode()) return SV; 3039 } else { // Cannonicalize constant to RHS if commutative 3040 if (isCommutativeBinOp(Opcode)) { 3041 std::swap(N1C, N2C); 3042 std::swap(N1, N2); 3043 } 3044 } 3045 } 3046 3047 // Constant fold FP operations. 3048 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3049 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3050 if (N1CFP) { 3051 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3052 // Cannonicalize constant to RHS if commutative 3053 std::swap(N1CFP, N2CFP); 3054 std::swap(N1, N2); 3055 } else if (N2CFP && VT != MVT::ppcf128) { 3056 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3057 APFloat::opStatus s; 3058 switch (Opcode) { 3059 case ISD::FADD: 3060 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3061 if (s != APFloat::opInvalidOp) 3062 return getConstantFP(V1, VT); 3063 break; 3064 case ISD::FSUB: 3065 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3066 if (s!=APFloat::opInvalidOp) 3067 return getConstantFP(V1, VT); 3068 break; 3069 case ISD::FMUL: 3070 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3071 if (s!=APFloat::opInvalidOp) 3072 return getConstantFP(V1, VT); 3073 break; 3074 case ISD::FDIV: 3075 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3076 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3077 return getConstantFP(V1, VT); 3078 break; 3079 case ISD::FREM : 3080 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3081 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3082 return getConstantFP(V1, VT); 3083 break; 3084 case ISD::FCOPYSIGN: 3085 V1.copySign(V2); 3086 return getConstantFP(V1, VT); 3087 default: break; 3088 } 3089 } 3090 3091 if (Opcode == ISD::FP_ROUND) { 3092 APFloat V = N1CFP->getValueAPF(); // make copy 3093 bool ignored; 3094 // This can return overflow, underflow, or inexact; we don't care. 3095 // FIXME need to be more flexible about rounding mode. 3096 (void)V.convert(*EVTToAPFloatSemantics(VT), 3097 APFloat::rmNearestTiesToEven, &ignored); 3098 return getConstantFP(V, VT); 3099 } 3100 } 3101 3102 // Canonicalize an UNDEF to the RHS, even over a constant. 3103 if (N1.getOpcode() == ISD::UNDEF) { 3104 if (isCommutativeBinOp(Opcode)) { 3105 std::swap(N1, N2); 3106 } else { 3107 switch (Opcode) { 3108 case ISD::FP_ROUND_INREG: 3109 case ISD::SIGN_EXTEND_INREG: 3110 case ISD::SUB: 3111 case ISD::FSUB: 3112 case ISD::FDIV: 3113 case ISD::FREM: 3114 case ISD::SRA: 3115 return N1; // fold op(undef, arg2) -> undef 3116 case ISD::UDIV: 3117 case ISD::SDIV: 3118 case ISD::UREM: 3119 case ISD::SREM: 3120 case ISD::SRL: 3121 case ISD::SHL: 3122 if (!VT.isVector()) 3123 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3124 // For vectors, we can't easily build an all zero vector, just return 3125 // the LHS. 3126 return N2; 3127 } 3128 } 3129 } 3130 3131 // Fold a bunch of operators when the RHS is undef. 3132 if (N2.getOpcode() == ISD::UNDEF) { 3133 switch (Opcode) { 3134 case ISD::XOR: 3135 if (N1.getOpcode() == ISD::UNDEF) 3136 // Handle undef ^ undef -> 0 special case. This is a common 3137 // idiom (misuse). 3138 return getConstant(0, VT); 3139 // fallthrough 3140 case ISD::ADD: 3141 case ISD::ADDC: 3142 case ISD::ADDE: 3143 case ISD::SUB: 3144 case ISD::UDIV: 3145 case ISD::SDIV: 3146 case ISD::UREM: 3147 case ISD::SREM: 3148 return N2; // fold op(arg1, undef) -> undef 3149 case ISD::FADD: 3150 case ISD::FSUB: 3151 case ISD::FMUL: 3152 case ISD::FDIV: 3153 case ISD::FREM: 3154 if (getTarget().Options.UnsafeFPMath) 3155 return N2; 3156 break; 3157 case ISD::MUL: 3158 case ISD::AND: 3159 case ISD::SRL: 3160 case ISD::SHL: 3161 if (!VT.isVector()) 3162 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3163 // For vectors, we can't easily build an all zero vector, just return 3164 // the LHS. 3165 return N1; 3166 case ISD::OR: 3167 if (!VT.isVector()) 3168 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3169 // For vectors, we can't easily build an all one vector, just return 3170 // the LHS. 3171 return N1; 3172 case ISD::SRA: 3173 return N1; 3174 } 3175 } 3176 3177 // Memoize this node if possible. 3178 SDNode *N; 3179 SDVTList VTs = getVTList(VT); 3180 if (VT != MVT::Glue) { 3181 SDValue Ops[] = { N1, N2 }; 3182 FoldingSetNodeID ID; 3183 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3184 void *IP = 0; 3185 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3186 return SDValue(E, 0); 3187 3188 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3189 CSEMap.InsertNode(N, IP); 3190 } else { 3191 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3192 } 3193 3194 AllNodes.push_back(N); 3195#ifndef NDEBUG 3196 VerifySDNode(N); 3197#endif 3198 return SDValue(N, 0); 3199} 3200 3201SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3202 SDValue N1, SDValue N2, SDValue N3) { 3203 // Perform various simplifications. 3204 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3205 switch (Opcode) { 3206 case ISD::CONCAT_VECTORS: 3207 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3208 // one big BUILD_VECTOR. 3209 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3210 N2.getOpcode() == ISD::BUILD_VECTOR && 3211 N3.getOpcode() == ISD::BUILD_VECTOR) { 3212 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3213 N1.getNode()->op_end()); 3214 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3215 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3216 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3217 } 3218 break; 3219 case ISD::SETCC: { 3220 // Use FoldSetCC to simplify SETCC's. 3221 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3222 if (Simp.getNode()) return Simp; 3223 break; 3224 } 3225 case ISD::SELECT: 3226 if (N1C) { 3227 if (N1C->getZExtValue()) 3228 return N2; // select true, X, Y -> X 3229 return N3; // select false, X, Y -> Y 3230 } 3231 3232 if (N2 == N3) return N2; // select C, X, X -> X 3233 break; 3234 case ISD::VECTOR_SHUFFLE: 3235 llvm_unreachable("should use getVectorShuffle constructor!"); 3236 case ISD::INSERT_SUBVECTOR: { 3237 SDValue Index = N3; 3238 if (VT.isSimple() && N1.getValueType().isSimple() 3239 && N2.getValueType().isSimple()) { 3240 assert(VT.isVector() && N1.getValueType().isVector() && 3241 N2.getValueType().isVector() && 3242 "Insert subvector VTs must be a vectors"); 3243 assert(VT == N1.getValueType() && 3244 "Dest and insert subvector source types must match!"); 3245 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3246 "Insert subvector must be from smaller vector to larger vector!"); 3247 if (isa<ConstantSDNode>(Index.getNode())) { 3248 assert((N2.getValueType().getVectorNumElements() + 3249 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3250 <= VT.getVectorNumElements()) 3251 && "Insert subvector overflow!"); 3252 } 3253 3254 // Trivial insertion. 3255 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3256 return N2; 3257 } 3258 break; 3259 } 3260 case ISD::BITCAST: 3261 // Fold bit_convert nodes from a type to themselves. 3262 if (N1.getValueType() == VT) 3263 return N1; 3264 break; 3265 } 3266 3267 // Memoize node if it doesn't produce a flag. 3268 SDNode *N; 3269 SDVTList VTs = getVTList(VT); 3270 if (VT != MVT::Glue) { 3271 SDValue Ops[] = { N1, N2, N3 }; 3272 FoldingSetNodeID ID; 3273 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3274 void *IP = 0; 3275 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3276 return SDValue(E, 0); 3277 3278 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3279 CSEMap.InsertNode(N, IP); 3280 } else { 3281 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3282 } 3283 3284 AllNodes.push_back(N); 3285#ifndef NDEBUG 3286 VerifySDNode(N); 3287#endif 3288 return SDValue(N, 0); 3289} 3290 3291SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3292 SDValue N1, SDValue N2, SDValue N3, 3293 SDValue N4) { 3294 SDValue Ops[] = { N1, N2, N3, N4 }; 3295 return getNode(Opcode, DL, VT, Ops, 4); 3296} 3297 3298SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3299 SDValue N1, SDValue N2, SDValue N3, 3300 SDValue N4, SDValue N5) { 3301 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3302 return getNode(Opcode, DL, VT, Ops, 5); 3303} 3304 3305/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3306/// the incoming stack arguments to be loaded from the stack. 3307SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3308 SmallVector<SDValue, 8> ArgChains; 3309 3310 // Include the original chain at the beginning of the list. When this is 3311 // used by target LowerCall hooks, this helps legalize find the 3312 // CALLSEQ_BEGIN node. 3313 ArgChains.push_back(Chain); 3314 3315 // Add a chain value for each stack argument. 3316 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3317 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3318 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3319 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3320 if (FI->getIndex() < 0) 3321 ArgChains.push_back(SDValue(L, 1)); 3322 3323 // Build a tokenfactor for all the chains. 3324 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3325 &ArgChains[0], ArgChains.size()); 3326} 3327 3328/// SplatByte - Distribute ByteVal over NumBits bits. 3329static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3330 APInt Val = APInt(NumBits, ByteVal); 3331 unsigned Shift = 8; 3332 for (unsigned i = NumBits; i > 8; i >>= 1) { 3333 Val = (Val << Shift) | Val; 3334 Shift <<= 1; 3335 } 3336 return Val; 3337} 3338 3339/// getMemsetValue - Vectorized representation of the memset value 3340/// operand. 3341static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3342 DebugLoc dl) { 3343 assert(Value.getOpcode() != ISD::UNDEF); 3344 3345 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3346 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3347 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3348 if (VT.isInteger()) 3349 return DAG.getConstant(Val, VT); 3350 return DAG.getConstantFP(APFloat(Val), VT); 3351 } 3352 3353 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3354 if (NumBits > 8) { 3355 // Use a multiplication with 0x010101... to extend the input to the 3356 // required length. 3357 APInt Magic = SplatByte(NumBits, 0x01); 3358 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3359 } 3360 3361 return Value; 3362} 3363 3364/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3365/// used when a memcpy is turned into a memset when the source is a constant 3366/// string ptr. 3367static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3368 const TargetLowering &TLI, StringRef Str) { 3369 // Handle vector with all elements zero. 3370 if (Str.empty()) { 3371 if (VT.isInteger()) 3372 return DAG.getConstant(0, VT); 3373 else if (VT == MVT::f32 || VT == MVT::f64) 3374 return DAG.getConstantFP(0.0, VT); 3375 else if (VT.isVector()) { 3376 unsigned NumElts = VT.getVectorNumElements(); 3377 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3378 return DAG.getNode(ISD::BITCAST, dl, VT, 3379 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3380 EltVT, NumElts))); 3381 } else 3382 llvm_unreachable("Expected type!"); 3383 } 3384 3385 assert(!VT.isVector() && "Can't handle vector type here!"); 3386 unsigned NumVTBytes = VT.getSizeInBits() / 8; 3387 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3388 3389 uint64_t Val = 0; 3390 if (TLI.isLittleEndian()) { 3391 for (unsigned i = 0; i != NumBytes; ++i) 3392 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3393 } else { 3394 for (unsigned i = 0; i != NumBytes; ++i) 3395 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3396 } 3397 3398 return DAG.getConstant(Val, VT); 3399} 3400 3401/// getMemBasePlusOffset - Returns base and offset node for the 3402/// 3403static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3404 SelectionDAG &DAG) { 3405 EVT VT = Base.getValueType(); 3406 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3407 VT, Base, DAG.getConstant(Offset, VT)); 3408} 3409 3410/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3411/// 3412static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3413 unsigned SrcDelta = 0; 3414 GlobalAddressSDNode *G = NULL; 3415 if (Src.getOpcode() == ISD::GlobalAddress) 3416 G = cast<GlobalAddressSDNode>(Src); 3417 else if (Src.getOpcode() == ISD::ADD && 3418 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3419 Src.getOperand(1).getOpcode() == ISD::Constant) { 3420 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3421 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3422 } 3423 if (!G) 3424 return false; 3425 3426 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3427} 3428 3429/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3430/// to replace the memset / memcpy. Return true if the number of memory ops 3431/// is below the threshold. It returns the types of the sequence of 3432/// memory ops to perform memset / memcpy by reference. 3433static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3434 unsigned Limit, uint64_t Size, 3435 unsigned DstAlign, unsigned SrcAlign, 3436 bool IsZeroVal, 3437 bool MemcpyStrSrc, 3438 SelectionDAG &DAG, 3439 const TargetLowering &TLI) { 3440 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3441 "Expecting memcpy / memset source to meet alignment requirement!"); 3442 // If 'SrcAlign' is zero, that means the memory operation does not need to 3443 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3444 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3445 // is the specified alignment of the memory operation. If it is zero, that 3446 // means it's possible to change the alignment of the destination. 3447 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3448 // not need to be loaded. 3449 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3450 IsZeroVal, MemcpyStrSrc, 3451 DAG.getMachineFunction()); 3452 Type *vtType = VT.isExtended() ? VT.getTypeForEVT(*DAG.getContext()) : NULL; 3453 unsigned AS = (vtType && vtType->isPointerTy()) ? 3454 cast<PointerType>(vtType)->getAddressSpace() : 0; 3455 3456 if (VT == MVT::Other) { 3457 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) || 3458 TLI.allowsUnalignedMemoryAccesses(VT)) { 3459 VT = TLI.getPointerTy(); 3460 } else { 3461 switch (DstAlign & 7) { 3462 case 0: VT = MVT::i64; break; 3463 case 4: VT = MVT::i32; break; 3464 case 2: VT = MVT::i16; break; 3465 default: VT = MVT::i8; break; 3466 } 3467 } 3468 3469 MVT LVT = MVT::i64; 3470 while (!TLI.isTypeLegal(LVT)) 3471 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3472 assert(LVT.isInteger()); 3473 3474 if (VT.bitsGT(LVT)) 3475 VT = LVT; 3476 } 3477 3478 unsigned NumMemOps = 0; 3479 while (Size != 0) { 3480 unsigned VTSize = VT.getSizeInBits() / 8; 3481 while (VTSize > Size) { 3482 // For now, only use non-vector load / store's for the left-over pieces. 3483 if (VT.isVector() || VT.isFloatingPoint()) { 3484 VT = MVT::i64; 3485 while (!TLI.isTypeLegal(VT)) 3486 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3487 VTSize = VT.getSizeInBits() / 8; 3488 } else { 3489 // This can result in a type that is not legal on the target, e.g. 3490 // 1 or 2 bytes on PPC. 3491 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3492 VTSize >>= 1; 3493 } 3494 } 3495 3496 if (++NumMemOps > Limit) 3497 return false; 3498 MemOps.push_back(VT); 3499 Size -= VTSize; 3500 } 3501 3502 return true; 3503} 3504 3505static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3506 SDValue Chain, SDValue Dst, 3507 SDValue Src, uint64_t Size, 3508 unsigned Align, bool isVol, 3509 bool AlwaysInline, 3510 MachinePointerInfo DstPtrInfo, 3511 MachinePointerInfo SrcPtrInfo) { 3512 // Turn a memcpy of undef to nop. 3513 if (Src.getOpcode() == ISD::UNDEF) 3514 return Chain; 3515 3516 // Expand memcpy to a series of load and store ops if the size operand falls 3517 // below a certain threshold. 3518 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3519 // rather than maybe a humongous number of loads and stores. 3520 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3521 std::vector<EVT> MemOps; 3522 bool DstAlignCanChange = false; 3523 MachineFunction &MF = DAG.getMachineFunction(); 3524 MachineFrameInfo *MFI = MF.getFrameInfo(); 3525 bool OptSize = 3526 MF.getFunction()->getFnAttributes(). 3527 hasAttribute(Attributes::OptimizeForSize); 3528 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3529 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3530 DstAlignCanChange = true; 3531 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3532 if (Align > SrcAlign) 3533 SrcAlign = Align; 3534 StringRef Str; 3535 bool CopyFromStr = isMemSrcFromString(Src, Str); 3536 bool isZeroStr = CopyFromStr && Str.empty(); 3537 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3538 3539 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3540 (DstAlignCanChange ? 0 : Align), 3541 (isZeroStr ? 0 : SrcAlign), 3542 true, CopyFromStr, DAG, TLI)) 3543 return SDValue(); 3544 3545 if (DstAlignCanChange) { 3546 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3547 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3548 if (NewAlign > Align) { 3549 // Give the stack frame object a larger alignment if needed. 3550 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3551 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3552 Align = NewAlign; 3553 } 3554 } 3555 3556 SmallVector<SDValue, 8> OutChains; 3557 unsigned NumMemOps = MemOps.size(); 3558 uint64_t SrcOff = 0, DstOff = 0; 3559 for (unsigned i = 0; i != NumMemOps; ++i) { 3560 EVT VT = MemOps[i]; 3561 unsigned VTSize = VT.getSizeInBits() / 8; 3562 SDValue Value, Store; 3563 3564 if (CopyFromStr && 3565 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3566 // It's unlikely a store of a vector immediate can be done in a single 3567 // instruction. It would require a load from a constantpool first. 3568 // We only handle zero vectors here. 3569 // FIXME: Handle other cases where store of vector immediate is done in 3570 // a single instruction. 3571 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3572 Store = DAG.getStore(Chain, dl, Value, 3573 getMemBasePlusOffset(Dst, DstOff, DAG), 3574 DstPtrInfo.getWithOffset(DstOff), isVol, 3575 false, Align); 3576 } else { 3577 // The type might not be legal for the target. This should only happen 3578 // if the type is smaller than a legal type, as on PPC, so the right 3579 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3580 // to Load/Store if NVT==VT. 3581 // FIXME does the case above also need this? 3582 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3583 assert(NVT.bitsGE(VT)); 3584 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3585 getMemBasePlusOffset(Src, SrcOff, DAG), 3586 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3587 MinAlign(SrcAlign, SrcOff)); 3588 Store = DAG.getTruncStore(Chain, dl, Value, 3589 getMemBasePlusOffset(Dst, DstOff, DAG), 3590 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3591 false, Align); 3592 } 3593 OutChains.push_back(Store); 3594 SrcOff += VTSize; 3595 DstOff += VTSize; 3596 } 3597 3598 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3599 &OutChains[0], OutChains.size()); 3600} 3601 3602static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3603 SDValue Chain, SDValue Dst, 3604 SDValue Src, uint64_t Size, 3605 unsigned Align, bool isVol, 3606 bool AlwaysInline, 3607 MachinePointerInfo DstPtrInfo, 3608 MachinePointerInfo SrcPtrInfo) { 3609 // Turn a memmove of undef to nop. 3610 if (Src.getOpcode() == ISD::UNDEF) 3611 return Chain; 3612 3613 // Expand memmove to a series of load and store ops if the size operand falls 3614 // below a certain threshold. 3615 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3616 std::vector<EVT> MemOps; 3617 bool DstAlignCanChange = false; 3618 MachineFunction &MF = DAG.getMachineFunction(); 3619 MachineFrameInfo *MFI = MF.getFrameInfo(); 3620 bool OptSize = MF.getFunction()->getFnAttributes(). 3621 hasAttribute(Attributes::OptimizeForSize); 3622 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3623 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3624 DstAlignCanChange = true; 3625 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3626 if (Align > SrcAlign) 3627 SrcAlign = Align; 3628 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3629 3630 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3631 (DstAlignCanChange ? 0 : Align), 3632 SrcAlign, true, false, DAG, TLI)) 3633 return SDValue(); 3634 3635 if (DstAlignCanChange) { 3636 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3637 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3638 if (NewAlign > Align) { 3639 // Give the stack frame object a larger alignment if needed. 3640 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3641 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3642 Align = NewAlign; 3643 } 3644 } 3645 3646 uint64_t SrcOff = 0, DstOff = 0; 3647 SmallVector<SDValue, 8> LoadValues; 3648 SmallVector<SDValue, 8> LoadChains; 3649 SmallVector<SDValue, 8> OutChains; 3650 unsigned NumMemOps = MemOps.size(); 3651 for (unsigned i = 0; i < NumMemOps; i++) { 3652 EVT VT = MemOps[i]; 3653 unsigned VTSize = VT.getSizeInBits() / 8; 3654 SDValue Value, Store; 3655 3656 Value = DAG.getLoad(VT, dl, Chain, 3657 getMemBasePlusOffset(Src, SrcOff, DAG), 3658 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3659 false, false, SrcAlign); 3660 LoadValues.push_back(Value); 3661 LoadChains.push_back(Value.getValue(1)); 3662 SrcOff += VTSize; 3663 } 3664 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3665 &LoadChains[0], LoadChains.size()); 3666 OutChains.clear(); 3667 for (unsigned i = 0; i < NumMemOps; i++) { 3668 EVT VT = MemOps[i]; 3669 unsigned VTSize = VT.getSizeInBits() / 8; 3670 SDValue Value, Store; 3671 3672 Store = DAG.getStore(Chain, dl, LoadValues[i], 3673 getMemBasePlusOffset(Dst, DstOff, DAG), 3674 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3675 OutChains.push_back(Store); 3676 DstOff += VTSize; 3677 } 3678 3679 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3680 &OutChains[0], OutChains.size()); 3681} 3682 3683static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3684 SDValue Chain, SDValue Dst, 3685 SDValue Src, uint64_t Size, 3686 unsigned Align, bool isVol, 3687 MachinePointerInfo DstPtrInfo) { 3688 // Turn a memset of undef to nop. 3689 if (Src.getOpcode() == ISD::UNDEF) 3690 return Chain; 3691 3692 // Expand memset to a series of load/store ops if the size operand 3693 // falls below a certain threshold. 3694 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3695 std::vector<EVT> MemOps; 3696 bool DstAlignCanChange = false; 3697 MachineFunction &MF = DAG.getMachineFunction(); 3698 MachineFrameInfo *MFI = MF.getFrameInfo(); 3699 bool OptSize = MF.getFunction()->getFnAttributes(). 3700 hasAttribute(Attributes::OptimizeForSize); 3701 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3702 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3703 DstAlignCanChange = true; 3704 bool IsZeroVal = 3705 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3706 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3707 Size, (DstAlignCanChange ? 0 : Align), 0, 3708 IsZeroVal, false, DAG, TLI)) 3709 return SDValue(); 3710 3711 if (DstAlignCanChange) { 3712 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3713 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3714 if (NewAlign > Align) { 3715 // Give the stack frame object a larger alignment if needed. 3716 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3717 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3718 Align = NewAlign; 3719 } 3720 } 3721 3722 SmallVector<SDValue, 8> OutChains; 3723 uint64_t DstOff = 0; 3724 unsigned NumMemOps = MemOps.size(); 3725 3726 // Find the largest store and generate the bit pattern for it. 3727 EVT LargestVT = MemOps[0]; 3728 for (unsigned i = 1; i < NumMemOps; i++) 3729 if (MemOps[i].bitsGT(LargestVT)) 3730 LargestVT = MemOps[i]; 3731 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3732 3733 for (unsigned i = 0; i < NumMemOps; i++) { 3734 EVT VT = MemOps[i]; 3735 3736 // If this store is smaller than the largest store see whether we can get 3737 // the smaller value for free with a truncate. 3738 SDValue Value = MemSetValue; 3739 if (VT.bitsLT(LargestVT)) { 3740 if (!LargestVT.isVector() && !VT.isVector() && 3741 TLI.isTruncateFree(LargestVT, VT)) 3742 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3743 else 3744 Value = getMemsetValue(Src, VT, DAG, dl); 3745 } 3746 assert(Value.getValueType() == VT && "Value with wrong type."); 3747 SDValue Store = DAG.getStore(Chain, dl, Value, 3748 getMemBasePlusOffset(Dst, DstOff, DAG), 3749 DstPtrInfo.getWithOffset(DstOff), 3750 isVol, false, Align); 3751 OutChains.push_back(Store); 3752 DstOff += VT.getSizeInBits() / 8; 3753 } 3754 3755 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3756 &OutChains[0], OutChains.size()); 3757} 3758 3759SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3760 SDValue Src, SDValue Size, 3761 unsigned Align, bool isVol, bool AlwaysInline, 3762 MachinePointerInfo DstPtrInfo, 3763 MachinePointerInfo SrcPtrInfo) { 3764 3765 // Check to see if we should lower the memcpy to loads and stores first. 3766 // For cases within the target-specified limits, this is the best choice. 3767 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3768 if (ConstantSize) { 3769 // Memcpy with size zero? Just return the original chain. 3770 if (ConstantSize->isNullValue()) 3771 return Chain; 3772 3773 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3774 ConstantSize->getZExtValue(),Align, 3775 isVol, false, DstPtrInfo, SrcPtrInfo); 3776 if (Result.getNode()) 3777 return Result; 3778 } 3779 3780 // Then check to see if we should lower the memcpy with target-specific 3781 // code. If the target chooses to do this, this is the next best. 3782 SDValue Result = 3783 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3784 isVol, AlwaysInline, 3785 DstPtrInfo, SrcPtrInfo); 3786 if (Result.getNode()) 3787 return Result; 3788 3789 // If we really need inline code and the target declined to provide it, 3790 // use a (potentially long) sequence of loads and stores. 3791 if (AlwaysInline) { 3792 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3793 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3794 ConstantSize->getZExtValue(), Align, isVol, 3795 true, DstPtrInfo, SrcPtrInfo); 3796 } 3797 3798 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3799 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3800 // respect volatile, so they may do things like read or write memory 3801 // beyond the given memory regions. But fixing this isn't easy, and most 3802 // people don't care. 3803 3804 // Emit a library call. 3805 TargetLowering::ArgListTy Args; 3806 TargetLowering::ArgListEntry Entry; 3807 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3808 Entry.Node = Dst; Args.push_back(Entry); 3809 Entry.Node = Src; Args.push_back(Entry); 3810 Entry.Node = Size; Args.push_back(Entry); 3811 // FIXME: pass in DebugLoc 3812 TargetLowering:: 3813 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3814 false, false, false, false, 0, 3815 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3816 /*isTailCall=*/false, 3817 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3818 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3819 TLI.getPointerTy()), 3820 Args, *this, dl); 3821 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3822 3823 return CallResult.second; 3824} 3825 3826SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3827 SDValue Src, SDValue Size, 3828 unsigned Align, bool isVol, 3829 MachinePointerInfo DstPtrInfo, 3830 MachinePointerInfo SrcPtrInfo) { 3831 3832 // Check to see if we should lower the memmove to loads and stores first. 3833 // For cases within the target-specified limits, this is the best choice. 3834 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3835 if (ConstantSize) { 3836 // Memmove with size zero? Just return the original chain. 3837 if (ConstantSize->isNullValue()) 3838 return Chain; 3839 3840 SDValue Result = 3841 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3842 ConstantSize->getZExtValue(), Align, isVol, 3843 false, DstPtrInfo, SrcPtrInfo); 3844 if (Result.getNode()) 3845 return Result; 3846 } 3847 3848 // Then check to see if we should lower the memmove with target-specific 3849 // code. If the target chooses to do this, this is the next best. 3850 SDValue Result = 3851 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3852 DstPtrInfo, SrcPtrInfo); 3853 if (Result.getNode()) 3854 return Result; 3855 3856 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3857 // not be safe. See memcpy above for more details. 3858 3859 // Emit a library call. 3860 TargetLowering::ArgListTy Args; 3861 TargetLowering::ArgListEntry Entry; 3862 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3863 Entry.Node = Dst; Args.push_back(Entry); 3864 Entry.Node = Src; Args.push_back(Entry); 3865 Entry.Node = Size; Args.push_back(Entry); 3866 // FIXME: pass in DebugLoc 3867 TargetLowering:: 3868 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3869 false, false, false, false, 0, 3870 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 3871 /*isTailCall=*/false, 3872 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3873 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3874 TLI.getPointerTy()), 3875 Args, *this, dl); 3876 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3877 3878 return CallResult.second; 3879} 3880 3881SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3882 SDValue Src, SDValue Size, 3883 unsigned Align, bool isVol, 3884 MachinePointerInfo DstPtrInfo) { 3885 3886 // Check to see if we should lower the memset to stores first. 3887 // For cases within the target-specified limits, this is the best choice. 3888 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3889 if (ConstantSize) { 3890 // Memset with size zero? Just return the original chain. 3891 if (ConstantSize->isNullValue()) 3892 return Chain; 3893 3894 SDValue Result = 3895 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3896 Align, isVol, DstPtrInfo); 3897 3898 if (Result.getNode()) 3899 return Result; 3900 } 3901 3902 // Then check to see if we should lower the memset with target-specific 3903 // code. If the target chooses to do this, this is the next best. 3904 SDValue Result = 3905 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3906 DstPtrInfo); 3907 if (Result.getNode()) 3908 return Result; 3909 3910 // Emit a library call. 3911 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext()); 3912 TargetLowering::ArgListTy Args; 3913 TargetLowering::ArgListEntry Entry; 3914 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3915 Args.push_back(Entry); 3916 // Extend or truncate the argument to be an i32 value for the call. 3917 if (Src.getValueType().bitsGT(MVT::i32)) 3918 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3919 else 3920 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3921 Entry.Node = Src; 3922 Entry.Ty = Type::getInt32Ty(*getContext()); 3923 Entry.isSExt = true; 3924 Args.push_back(Entry); 3925 Entry.Node = Size; 3926 Entry.Ty = IntPtrTy; 3927 Entry.isSExt = false; 3928 Args.push_back(Entry); 3929 // FIXME: pass in DebugLoc 3930 TargetLowering:: 3931 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3932 false, false, false, false, 0, 3933 TLI.getLibcallCallingConv(RTLIB::MEMSET), 3934 /*isTailCall=*/false, 3935 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 3936 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3937 TLI.getPointerTy()), 3938 Args, *this, dl); 3939 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3940 3941 return CallResult.second; 3942} 3943 3944SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3945 SDValue Chain, SDValue Ptr, SDValue Cmp, 3946 SDValue Swp, MachinePointerInfo PtrInfo, 3947 unsigned Alignment, 3948 AtomicOrdering Ordering, 3949 SynchronizationScope SynchScope) { 3950 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3951 Alignment = getEVTAlignment(MemVT); 3952 3953 MachineFunction &MF = getMachineFunction(); 3954 3955 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE. 3956 // For now, atomics are considered to be volatile always. 3957 // FIXME: Volatile isn't really correct; we should keep track of atomic 3958 // orderings in the memoperand. 3959 unsigned Flags = MachineMemOperand::MOVolatile; 3960 if (Opcode != ISD::ATOMIC_STORE) 3961 Flags |= MachineMemOperand::MOLoad; 3962 if (Opcode != ISD::ATOMIC_LOAD) 3963 Flags |= MachineMemOperand::MOStore; 3964 3965 MachineMemOperand *MMO = 3966 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3967 3968 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3969 Ordering, SynchScope); 3970} 3971 3972SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3973 SDValue Chain, 3974 SDValue Ptr, SDValue Cmp, 3975 SDValue Swp, MachineMemOperand *MMO, 3976 AtomicOrdering Ordering, 3977 SynchronizationScope SynchScope) { 3978 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3979 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3980 3981 EVT VT = Cmp.getValueType(); 3982 3983 SDVTList VTs = getVTList(VT, MVT::Other); 3984 FoldingSetNodeID ID; 3985 ID.AddInteger(MemVT.getRawBits()); 3986 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3987 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3988 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 3989 void* IP = 0; 3990 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3991 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3992 return SDValue(E, 0); 3993 } 3994 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3995 Ptr, Cmp, Swp, MMO, Ordering, 3996 SynchScope); 3997 CSEMap.InsertNode(N, IP); 3998 AllNodes.push_back(N); 3999 return SDValue(N, 0); 4000} 4001 4002SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4003 SDValue Chain, 4004 SDValue Ptr, SDValue Val, 4005 const Value* PtrVal, 4006 unsigned Alignment, 4007 AtomicOrdering Ordering, 4008 SynchronizationScope SynchScope) { 4009 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4010 Alignment = getEVTAlignment(MemVT); 4011 4012 MachineFunction &MF = getMachineFunction(); 4013 // An atomic store does not load. An atomic load does not store. 4014 // (An atomicrmw obviously both loads and stores.) 4015 // For now, atomics are considered to be volatile always, and they are 4016 // chained as such. 4017 // FIXME: Volatile isn't really correct; we should keep track of atomic 4018 // orderings in the memoperand. 4019 unsigned Flags = MachineMemOperand::MOVolatile; 4020 if (Opcode != ISD::ATOMIC_STORE) 4021 Flags |= MachineMemOperand::MOLoad; 4022 if (Opcode != ISD::ATOMIC_LOAD) 4023 Flags |= MachineMemOperand::MOStore; 4024 4025 MachineMemOperand *MMO = 4026 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4027 MemVT.getStoreSize(), Alignment); 4028 4029 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4030 Ordering, SynchScope); 4031} 4032 4033SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4034 SDValue Chain, 4035 SDValue Ptr, SDValue Val, 4036 MachineMemOperand *MMO, 4037 AtomicOrdering Ordering, 4038 SynchronizationScope SynchScope) { 4039 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4040 Opcode == ISD::ATOMIC_LOAD_SUB || 4041 Opcode == ISD::ATOMIC_LOAD_AND || 4042 Opcode == ISD::ATOMIC_LOAD_OR || 4043 Opcode == ISD::ATOMIC_LOAD_XOR || 4044 Opcode == ISD::ATOMIC_LOAD_NAND || 4045 Opcode == ISD::ATOMIC_LOAD_MIN || 4046 Opcode == ISD::ATOMIC_LOAD_MAX || 4047 Opcode == ISD::ATOMIC_LOAD_UMIN || 4048 Opcode == ISD::ATOMIC_LOAD_UMAX || 4049 Opcode == ISD::ATOMIC_SWAP || 4050 Opcode == ISD::ATOMIC_STORE) && 4051 "Invalid Atomic Op"); 4052 4053 EVT VT = Val.getValueType(); 4054 4055 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4056 getVTList(VT, MVT::Other); 4057 FoldingSetNodeID ID; 4058 ID.AddInteger(MemVT.getRawBits()); 4059 SDValue Ops[] = {Chain, Ptr, Val}; 4060 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 4061 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4062 void* IP = 0; 4063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4064 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4065 return SDValue(E, 0); 4066 } 4067 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4068 Ptr, Val, MMO, 4069 Ordering, SynchScope); 4070 CSEMap.InsertNode(N, IP); 4071 AllNodes.push_back(N); 4072 return SDValue(N, 0); 4073} 4074 4075SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4076 EVT VT, SDValue Chain, 4077 SDValue Ptr, 4078 const Value* PtrVal, 4079 unsigned Alignment, 4080 AtomicOrdering Ordering, 4081 SynchronizationScope SynchScope) { 4082 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4083 Alignment = getEVTAlignment(MemVT); 4084 4085 MachineFunction &MF = getMachineFunction(); 4086 // An atomic store does not load. An atomic load does not store. 4087 // (An atomicrmw obviously both loads and stores.) 4088 // For now, atomics are considered to be volatile always, and they are 4089 // chained as such. 4090 // FIXME: Volatile isn't really correct; we should keep track of atomic 4091 // orderings in the memoperand. 4092 unsigned Flags = MachineMemOperand::MOVolatile; 4093 if (Opcode != ISD::ATOMIC_STORE) 4094 Flags |= MachineMemOperand::MOLoad; 4095 if (Opcode != ISD::ATOMIC_LOAD) 4096 Flags |= MachineMemOperand::MOStore; 4097 4098 MachineMemOperand *MMO = 4099 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4100 MemVT.getStoreSize(), Alignment); 4101 4102 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4103 Ordering, SynchScope); 4104} 4105 4106SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4107 EVT VT, SDValue Chain, 4108 SDValue Ptr, 4109 MachineMemOperand *MMO, 4110 AtomicOrdering Ordering, 4111 SynchronizationScope SynchScope) { 4112 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4113 4114 SDVTList VTs = getVTList(VT, MVT::Other); 4115 FoldingSetNodeID ID; 4116 ID.AddInteger(MemVT.getRawBits()); 4117 SDValue Ops[] = {Chain, Ptr}; 4118 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4119 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4120 void* IP = 0; 4121 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4122 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4123 return SDValue(E, 0); 4124 } 4125 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4126 Ptr, MMO, Ordering, SynchScope); 4127 CSEMap.InsertNode(N, IP); 4128 AllNodes.push_back(N); 4129 return SDValue(N, 0); 4130} 4131 4132/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4133SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4134 DebugLoc dl) { 4135 if (NumOps == 1) 4136 return Ops[0]; 4137 4138 SmallVector<EVT, 4> VTs; 4139 VTs.reserve(NumOps); 4140 for (unsigned i = 0; i < NumOps; ++i) 4141 VTs.push_back(Ops[i].getValueType()); 4142 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4143 Ops, NumOps); 4144} 4145 4146SDValue 4147SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4148 const EVT *VTs, unsigned NumVTs, 4149 const SDValue *Ops, unsigned NumOps, 4150 EVT MemVT, MachinePointerInfo PtrInfo, 4151 unsigned Align, bool Vol, 4152 bool ReadMem, bool WriteMem) { 4153 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4154 MemVT, PtrInfo, Align, Vol, 4155 ReadMem, WriteMem); 4156} 4157 4158SDValue 4159SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4160 const SDValue *Ops, unsigned NumOps, 4161 EVT MemVT, MachinePointerInfo PtrInfo, 4162 unsigned Align, bool Vol, 4163 bool ReadMem, bool WriteMem) { 4164 if (Align == 0) // Ensure that codegen never sees alignment 0 4165 Align = getEVTAlignment(MemVT); 4166 4167 MachineFunction &MF = getMachineFunction(); 4168 unsigned Flags = 0; 4169 if (WriteMem) 4170 Flags |= MachineMemOperand::MOStore; 4171 if (ReadMem) 4172 Flags |= MachineMemOperand::MOLoad; 4173 if (Vol) 4174 Flags |= MachineMemOperand::MOVolatile; 4175 MachineMemOperand *MMO = 4176 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4177 4178 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4179} 4180 4181SDValue 4182SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4183 const SDValue *Ops, unsigned NumOps, 4184 EVT MemVT, MachineMemOperand *MMO) { 4185 assert((Opcode == ISD::INTRINSIC_VOID || 4186 Opcode == ISD::INTRINSIC_W_CHAIN || 4187 Opcode == ISD::PREFETCH || 4188 Opcode == ISD::LIFETIME_START || 4189 Opcode == ISD::LIFETIME_END || 4190 (Opcode <= INT_MAX && 4191 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4192 "Opcode is not a memory-accessing opcode!"); 4193 4194 // Memoize the node unless it returns a flag. 4195 MemIntrinsicSDNode *N; 4196 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4197 FoldingSetNodeID ID; 4198 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4199 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4200 void *IP = 0; 4201 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4202 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4203 return SDValue(E, 0); 4204 } 4205 4206 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4207 MemVT, MMO); 4208 CSEMap.InsertNode(N, IP); 4209 } else { 4210 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4211 MemVT, MMO); 4212 } 4213 AllNodes.push_back(N); 4214 return SDValue(N, 0); 4215} 4216 4217/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4218/// MachinePointerInfo record from it. This is particularly useful because the 4219/// code generator has many cases where it doesn't bother passing in a 4220/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4221static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4222 // If this is FI+Offset, we can model it. 4223 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4224 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4225 4226 // If this is (FI+Offset1)+Offset2, we can model it. 4227 if (Ptr.getOpcode() != ISD::ADD || 4228 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4229 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4230 return MachinePointerInfo(); 4231 4232 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4233 return MachinePointerInfo::getFixedStack(FI, Offset+ 4234 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4235} 4236 4237/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4238/// MachinePointerInfo record from it. This is particularly useful because the 4239/// code generator has many cases where it doesn't bother passing in a 4240/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4241static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4242 // If the 'Offset' value isn't a constant, we can't handle this. 4243 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4244 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4245 if (OffsetOp.getOpcode() == ISD::UNDEF) 4246 return InferPointerInfo(Ptr); 4247 return MachinePointerInfo(); 4248} 4249 4250 4251SDValue 4252SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4253 EVT VT, DebugLoc dl, SDValue Chain, 4254 SDValue Ptr, SDValue Offset, 4255 MachinePointerInfo PtrInfo, EVT MemVT, 4256 bool isVolatile, bool isNonTemporal, bool isInvariant, 4257 unsigned Alignment, const MDNode *TBAAInfo, 4258 const MDNode *Ranges) { 4259 assert(Chain.getValueType() == MVT::Other && 4260 "Invalid chain type"); 4261 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4262 Alignment = getEVTAlignment(VT); 4263 4264 unsigned Flags = MachineMemOperand::MOLoad; 4265 if (isVolatile) 4266 Flags |= MachineMemOperand::MOVolatile; 4267 if (isNonTemporal) 4268 Flags |= MachineMemOperand::MONonTemporal; 4269 if (isInvariant) 4270 Flags |= MachineMemOperand::MOInvariant; 4271 4272 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4273 // clients. 4274 if (PtrInfo.V == 0) 4275 PtrInfo = InferPointerInfo(Ptr, Offset); 4276 4277 MachineFunction &MF = getMachineFunction(); 4278 MachineMemOperand *MMO = 4279 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4280 TBAAInfo, Ranges); 4281 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4282} 4283 4284SDValue 4285SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4286 EVT VT, DebugLoc dl, SDValue Chain, 4287 SDValue Ptr, SDValue Offset, EVT MemVT, 4288 MachineMemOperand *MMO) { 4289 if (VT == MemVT) { 4290 ExtType = ISD::NON_EXTLOAD; 4291 } else if (ExtType == ISD::NON_EXTLOAD) { 4292 assert(VT == MemVT && "Non-extending load from different memory type!"); 4293 } else { 4294 // Extending load. 4295 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4296 "Should only be an extending load, not truncating!"); 4297 assert(VT.isInteger() == MemVT.isInteger() && 4298 "Cannot convert from FP to Int or Int -> FP!"); 4299 assert(VT.isVector() == MemVT.isVector() && 4300 "Cannot use trunc store to convert to or from a vector!"); 4301 assert((!VT.isVector() || 4302 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4303 "Cannot use trunc store to change the number of vector elements!"); 4304 } 4305 4306 bool Indexed = AM != ISD::UNINDEXED; 4307 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4308 "Unindexed load with an offset!"); 4309 4310 SDVTList VTs = Indexed ? 4311 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4312 SDValue Ops[] = { Chain, Ptr, Offset }; 4313 FoldingSetNodeID ID; 4314 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4315 ID.AddInteger(MemVT.getRawBits()); 4316 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4317 MMO->isNonTemporal(), 4318 MMO->isInvariant())); 4319 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4320 void *IP = 0; 4321 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4322 cast<LoadSDNode>(E)->refineAlignment(MMO); 4323 return SDValue(E, 0); 4324 } 4325 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4326 MemVT, MMO); 4327 CSEMap.InsertNode(N, IP); 4328 AllNodes.push_back(N); 4329 return SDValue(N, 0); 4330} 4331 4332SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4333 SDValue Chain, SDValue Ptr, 4334 MachinePointerInfo PtrInfo, 4335 bool isVolatile, bool isNonTemporal, 4336 bool isInvariant, unsigned Alignment, 4337 const MDNode *TBAAInfo, 4338 const MDNode *Ranges) { 4339 SDValue Undef = getUNDEF(Ptr.getValueType()); 4340 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4341 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4342 TBAAInfo, Ranges); 4343} 4344 4345SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4346 SDValue Chain, SDValue Ptr, 4347 MachinePointerInfo PtrInfo, EVT MemVT, 4348 bool isVolatile, bool isNonTemporal, 4349 unsigned Alignment, const MDNode *TBAAInfo) { 4350 SDValue Undef = getUNDEF(Ptr.getValueType()); 4351 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4352 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4353 TBAAInfo); 4354} 4355 4356 4357SDValue 4358SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4359 SDValue Offset, ISD::MemIndexedMode AM) { 4360 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4361 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4362 "Load is already a indexed load!"); 4363 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4364 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4365 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4366 false, LD->getAlignment()); 4367} 4368 4369SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4370 SDValue Ptr, MachinePointerInfo PtrInfo, 4371 bool isVolatile, bool isNonTemporal, 4372 unsigned Alignment, const MDNode *TBAAInfo) { 4373 assert(Chain.getValueType() == MVT::Other && 4374 "Invalid chain type"); 4375 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4376 Alignment = getEVTAlignment(Val.getValueType()); 4377 4378 unsigned Flags = MachineMemOperand::MOStore; 4379 if (isVolatile) 4380 Flags |= MachineMemOperand::MOVolatile; 4381 if (isNonTemporal) 4382 Flags |= MachineMemOperand::MONonTemporal; 4383 4384 if (PtrInfo.V == 0) 4385 PtrInfo = InferPointerInfo(Ptr); 4386 4387 MachineFunction &MF = getMachineFunction(); 4388 MachineMemOperand *MMO = 4389 MF.getMachineMemOperand(PtrInfo, Flags, 4390 Val.getValueType().getStoreSize(), Alignment, 4391 TBAAInfo); 4392 4393 return getStore(Chain, dl, Val, Ptr, MMO); 4394} 4395 4396SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4397 SDValue Ptr, MachineMemOperand *MMO) { 4398 assert(Chain.getValueType() == MVT::Other && 4399 "Invalid chain type"); 4400 EVT VT = Val.getValueType(); 4401 SDVTList VTs = getVTList(MVT::Other); 4402 SDValue Undef = getUNDEF(Ptr.getValueType()); 4403 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4404 FoldingSetNodeID ID; 4405 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4406 ID.AddInteger(VT.getRawBits()); 4407 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4408 MMO->isNonTemporal(), MMO->isInvariant())); 4409 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4410 void *IP = 0; 4411 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4412 cast<StoreSDNode>(E)->refineAlignment(MMO); 4413 return SDValue(E, 0); 4414 } 4415 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4416 false, VT, MMO); 4417 CSEMap.InsertNode(N, IP); 4418 AllNodes.push_back(N); 4419 return SDValue(N, 0); 4420} 4421 4422SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4423 SDValue Ptr, MachinePointerInfo PtrInfo, 4424 EVT SVT,bool isVolatile, bool isNonTemporal, 4425 unsigned Alignment, 4426 const MDNode *TBAAInfo) { 4427 assert(Chain.getValueType() == MVT::Other && 4428 "Invalid chain type"); 4429 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4430 Alignment = getEVTAlignment(SVT); 4431 4432 unsigned Flags = MachineMemOperand::MOStore; 4433 if (isVolatile) 4434 Flags |= MachineMemOperand::MOVolatile; 4435 if (isNonTemporal) 4436 Flags |= MachineMemOperand::MONonTemporal; 4437 4438 if (PtrInfo.V == 0) 4439 PtrInfo = InferPointerInfo(Ptr); 4440 4441 MachineFunction &MF = getMachineFunction(); 4442 MachineMemOperand *MMO = 4443 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4444 TBAAInfo); 4445 4446 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4447} 4448 4449SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4450 SDValue Ptr, EVT SVT, 4451 MachineMemOperand *MMO) { 4452 EVT VT = Val.getValueType(); 4453 4454 assert(Chain.getValueType() == MVT::Other && 4455 "Invalid chain type"); 4456 if (VT == SVT) 4457 return getStore(Chain, dl, Val, Ptr, MMO); 4458 4459 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4460 "Should only be a truncating store, not extending!"); 4461 assert(VT.isInteger() == SVT.isInteger() && 4462 "Can't do FP-INT conversion!"); 4463 assert(VT.isVector() == SVT.isVector() && 4464 "Cannot use trunc store to convert to or from a vector!"); 4465 assert((!VT.isVector() || 4466 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4467 "Cannot use trunc store to change the number of vector elements!"); 4468 4469 SDVTList VTs = getVTList(MVT::Other); 4470 SDValue Undef = getUNDEF(Ptr.getValueType()); 4471 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4472 FoldingSetNodeID ID; 4473 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4474 ID.AddInteger(SVT.getRawBits()); 4475 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4476 MMO->isNonTemporal(), MMO->isInvariant())); 4477 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4478 void *IP = 0; 4479 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4480 cast<StoreSDNode>(E)->refineAlignment(MMO); 4481 return SDValue(E, 0); 4482 } 4483 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4484 true, SVT, MMO); 4485 CSEMap.InsertNode(N, IP); 4486 AllNodes.push_back(N); 4487 return SDValue(N, 0); 4488} 4489 4490SDValue 4491SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4492 SDValue Offset, ISD::MemIndexedMode AM) { 4493 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4494 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4495 "Store is already a indexed store!"); 4496 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4497 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4498 FoldingSetNodeID ID; 4499 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4500 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4501 ID.AddInteger(ST->getRawSubclassData()); 4502 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4503 void *IP = 0; 4504 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4505 return SDValue(E, 0); 4506 4507 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4508 ST->isTruncatingStore(), 4509 ST->getMemoryVT(), 4510 ST->getMemOperand()); 4511 CSEMap.InsertNode(N, IP); 4512 AllNodes.push_back(N); 4513 return SDValue(N, 0); 4514} 4515 4516SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4517 SDValue Chain, SDValue Ptr, 4518 SDValue SV, 4519 unsigned Align) { 4520 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4521 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4522} 4523 4524SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4525 const SDUse *Ops, unsigned NumOps) { 4526 switch (NumOps) { 4527 case 0: return getNode(Opcode, DL, VT); 4528 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4529 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4530 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4531 default: break; 4532 } 4533 4534 // Copy from an SDUse array into an SDValue array for use with 4535 // the regular getNode logic. 4536 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4537 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4538} 4539 4540SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4541 const SDValue *Ops, unsigned NumOps) { 4542 switch (NumOps) { 4543 case 0: return getNode(Opcode, DL, VT); 4544 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4545 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4546 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4547 default: break; 4548 } 4549 4550 switch (Opcode) { 4551 default: break; 4552 case ISD::SELECT_CC: { 4553 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4554 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4555 "LHS and RHS of condition must have same type!"); 4556 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4557 "True and False arms of SelectCC must have same type!"); 4558 assert(Ops[2].getValueType() == VT && 4559 "select_cc node must be of same type as true and false value!"); 4560 break; 4561 } 4562 case ISD::BR_CC: { 4563 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4564 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4565 "LHS/RHS of comparison should match types!"); 4566 break; 4567 } 4568 } 4569 4570 // Memoize nodes. 4571 SDNode *N; 4572 SDVTList VTs = getVTList(VT); 4573 4574 if (VT != MVT::Glue) { 4575 FoldingSetNodeID ID; 4576 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4577 void *IP = 0; 4578 4579 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4580 return SDValue(E, 0); 4581 4582 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4583 CSEMap.InsertNode(N, IP); 4584 } else { 4585 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4586 } 4587 4588 AllNodes.push_back(N); 4589#ifndef NDEBUG 4590 VerifySDNode(N); 4591#endif 4592 return SDValue(N, 0); 4593} 4594 4595SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4596 const std::vector<EVT> &ResultTys, 4597 const SDValue *Ops, unsigned NumOps) { 4598 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4599 Ops, NumOps); 4600} 4601 4602SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4603 const EVT *VTs, unsigned NumVTs, 4604 const SDValue *Ops, unsigned NumOps) { 4605 if (NumVTs == 1) 4606 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4607 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4608} 4609 4610SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4611 const SDValue *Ops, unsigned NumOps) { 4612 if (VTList.NumVTs == 1) 4613 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4614 4615#if 0 4616 switch (Opcode) { 4617 // FIXME: figure out how to safely handle things like 4618 // int foo(int x) { return 1 << (x & 255); } 4619 // int bar() { return foo(256); } 4620 case ISD::SRA_PARTS: 4621 case ISD::SRL_PARTS: 4622 case ISD::SHL_PARTS: 4623 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4624 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4625 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4626 else if (N3.getOpcode() == ISD::AND) 4627 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4628 // If the and is only masking out bits that cannot effect the shift, 4629 // eliminate the and. 4630 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4631 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4632 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4633 } 4634 break; 4635 } 4636#endif 4637 4638 // Memoize the node unless it returns a flag. 4639 SDNode *N; 4640 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4641 FoldingSetNodeID ID; 4642 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4643 void *IP = 0; 4644 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4645 return SDValue(E, 0); 4646 4647 if (NumOps == 1) { 4648 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4649 } else if (NumOps == 2) { 4650 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4651 } else if (NumOps == 3) { 4652 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4653 Ops[2]); 4654 } else { 4655 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4656 } 4657 CSEMap.InsertNode(N, IP); 4658 } else { 4659 if (NumOps == 1) { 4660 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4661 } else if (NumOps == 2) { 4662 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4663 } else if (NumOps == 3) { 4664 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4665 Ops[2]); 4666 } else { 4667 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4668 } 4669 } 4670 AllNodes.push_back(N); 4671#ifndef NDEBUG 4672 VerifySDNode(N); 4673#endif 4674 return SDValue(N, 0); 4675} 4676 4677SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4678 return getNode(Opcode, DL, VTList, 0, 0); 4679} 4680 4681SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4682 SDValue N1) { 4683 SDValue Ops[] = { N1 }; 4684 return getNode(Opcode, DL, VTList, Ops, 1); 4685} 4686 4687SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4688 SDValue N1, SDValue N2) { 4689 SDValue Ops[] = { N1, N2 }; 4690 return getNode(Opcode, DL, VTList, Ops, 2); 4691} 4692 4693SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4694 SDValue N1, SDValue N2, SDValue N3) { 4695 SDValue Ops[] = { N1, N2, N3 }; 4696 return getNode(Opcode, DL, VTList, Ops, 3); 4697} 4698 4699SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4700 SDValue N1, SDValue N2, SDValue N3, 4701 SDValue N4) { 4702 SDValue Ops[] = { N1, N2, N3, N4 }; 4703 return getNode(Opcode, DL, VTList, Ops, 4); 4704} 4705 4706SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4707 SDValue N1, SDValue N2, SDValue N3, 4708 SDValue N4, SDValue N5) { 4709 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4710 return getNode(Opcode, DL, VTList, Ops, 5); 4711} 4712 4713SDVTList SelectionDAG::getVTList(EVT VT) { 4714 return makeVTList(SDNode::getValueTypeList(VT), 1); 4715} 4716 4717SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4718 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4719 E = VTList.rend(); I != E; ++I) 4720 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4721 return *I; 4722 4723 EVT *Array = Allocator.Allocate<EVT>(2); 4724 Array[0] = VT1; 4725 Array[1] = VT2; 4726 SDVTList Result = makeVTList(Array, 2); 4727 VTList.push_back(Result); 4728 return Result; 4729} 4730 4731SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4732 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4733 E = VTList.rend(); I != E; ++I) 4734 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4735 I->VTs[2] == VT3) 4736 return *I; 4737 4738 EVT *Array = Allocator.Allocate<EVT>(3); 4739 Array[0] = VT1; 4740 Array[1] = VT2; 4741 Array[2] = VT3; 4742 SDVTList Result = makeVTList(Array, 3); 4743 VTList.push_back(Result); 4744 return Result; 4745} 4746 4747SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4748 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4749 E = VTList.rend(); I != E; ++I) 4750 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4751 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4752 return *I; 4753 4754 EVT *Array = Allocator.Allocate<EVT>(4); 4755 Array[0] = VT1; 4756 Array[1] = VT2; 4757 Array[2] = VT3; 4758 Array[3] = VT4; 4759 SDVTList Result = makeVTList(Array, 4); 4760 VTList.push_back(Result); 4761 return Result; 4762} 4763 4764SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4765 switch (NumVTs) { 4766 case 0: llvm_unreachable("Cannot have nodes without results!"); 4767 case 1: return getVTList(VTs[0]); 4768 case 2: return getVTList(VTs[0], VTs[1]); 4769 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4770 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4771 default: break; 4772 } 4773 4774 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4775 E = VTList.rend(); I != E; ++I) { 4776 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4777 continue; 4778 4779 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4780 return *I; 4781 } 4782 4783 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4784 std::copy(VTs, VTs+NumVTs, Array); 4785 SDVTList Result = makeVTList(Array, NumVTs); 4786 VTList.push_back(Result); 4787 return Result; 4788} 4789 4790 4791/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4792/// specified operands. If the resultant node already exists in the DAG, 4793/// this does not modify the specified node, instead it returns the node that 4794/// already exists. If the resultant node does not exist in the DAG, the 4795/// input node is returned. As a degenerate case, if you specify the same 4796/// input operands as the node already has, the input node is returned. 4797SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4798 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4799 4800 // Check to see if there is no change. 4801 if (Op == N->getOperand(0)) return N; 4802 4803 // See if the modified node already exists. 4804 void *InsertPos = 0; 4805 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4806 return Existing; 4807 4808 // Nope it doesn't. Remove the node from its current place in the maps. 4809 if (InsertPos) 4810 if (!RemoveNodeFromCSEMaps(N)) 4811 InsertPos = 0; 4812 4813 // Now we update the operands. 4814 N->OperandList[0].set(Op); 4815 4816 // If this gets put into a CSE map, add it. 4817 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4818 return N; 4819} 4820 4821SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4822 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4823 4824 // Check to see if there is no change. 4825 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4826 return N; // No operands changed, just return the input node. 4827 4828 // See if the modified node already exists. 4829 void *InsertPos = 0; 4830 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4831 return Existing; 4832 4833 // Nope it doesn't. Remove the node from its current place in the maps. 4834 if (InsertPos) 4835 if (!RemoveNodeFromCSEMaps(N)) 4836 InsertPos = 0; 4837 4838 // Now we update the operands. 4839 if (N->OperandList[0] != Op1) 4840 N->OperandList[0].set(Op1); 4841 if (N->OperandList[1] != Op2) 4842 N->OperandList[1].set(Op2); 4843 4844 // If this gets put into a CSE map, add it. 4845 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4846 return N; 4847} 4848 4849SDNode *SelectionDAG:: 4850UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4851 SDValue Ops[] = { Op1, Op2, Op3 }; 4852 return UpdateNodeOperands(N, Ops, 3); 4853} 4854 4855SDNode *SelectionDAG:: 4856UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4857 SDValue Op3, SDValue Op4) { 4858 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4859 return UpdateNodeOperands(N, Ops, 4); 4860} 4861 4862SDNode *SelectionDAG:: 4863UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4864 SDValue Op3, SDValue Op4, SDValue Op5) { 4865 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4866 return UpdateNodeOperands(N, Ops, 5); 4867} 4868 4869SDNode *SelectionDAG:: 4870UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4871 assert(N->getNumOperands() == NumOps && 4872 "Update with wrong number of operands"); 4873 4874 // Check to see if there is no change. 4875 bool AnyChange = false; 4876 for (unsigned i = 0; i != NumOps; ++i) { 4877 if (Ops[i] != N->getOperand(i)) { 4878 AnyChange = true; 4879 break; 4880 } 4881 } 4882 4883 // No operands changed, just return the input node. 4884 if (!AnyChange) return N; 4885 4886 // See if the modified node already exists. 4887 void *InsertPos = 0; 4888 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4889 return Existing; 4890 4891 // Nope it doesn't. Remove the node from its current place in the maps. 4892 if (InsertPos) 4893 if (!RemoveNodeFromCSEMaps(N)) 4894 InsertPos = 0; 4895 4896 // Now we update the operands. 4897 for (unsigned i = 0; i != NumOps; ++i) 4898 if (N->OperandList[i] != Ops[i]) 4899 N->OperandList[i].set(Ops[i]); 4900 4901 // If this gets put into a CSE map, add it. 4902 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4903 return N; 4904} 4905 4906/// DropOperands - Release the operands and set this node to have 4907/// zero operands. 4908void SDNode::DropOperands() { 4909 // Unlike the code in MorphNodeTo that does this, we don't need to 4910 // watch for dead nodes here. 4911 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4912 SDUse &Use = *I++; 4913 Use.set(SDValue()); 4914 } 4915} 4916 4917/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4918/// machine opcode. 4919/// 4920SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4921 EVT VT) { 4922 SDVTList VTs = getVTList(VT); 4923 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4924} 4925 4926SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4927 EVT VT, SDValue Op1) { 4928 SDVTList VTs = getVTList(VT); 4929 SDValue Ops[] = { Op1 }; 4930 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4931} 4932 4933SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4934 EVT VT, SDValue Op1, 4935 SDValue Op2) { 4936 SDVTList VTs = getVTList(VT); 4937 SDValue Ops[] = { Op1, Op2 }; 4938 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4939} 4940 4941SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4942 EVT VT, SDValue Op1, 4943 SDValue Op2, SDValue Op3) { 4944 SDVTList VTs = getVTList(VT); 4945 SDValue Ops[] = { Op1, Op2, Op3 }; 4946 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4947} 4948 4949SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4950 EVT VT, const SDValue *Ops, 4951 unsigned NumOps) { 4952 SDVTList VTs = getVTList(VT); 4953 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4954} 4955 4956SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4957 EVT VT1, EVT VT2, const SDValue *Ops, 4958 unsigned NumOps) { 4959 SDVTList VTs = getVTList(VT1, VT2); 4960 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4961} 4962 4963SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4964 EVT VT1, EVT VT2) { 4965 SDVTList VTs = getVTList(VT1, VT2); 4966 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4967} 4968 4969SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4970 EVT VT1, EVT VT2, EVT VT3, 4971 const SDValue *Ops, unsigned NumOps) { 4972 SDVTList VTs = getVTList(VT1, VT2, VT3); 4973 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4974} 4975 4976SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4977 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4978 const SDValue *Ops, unsigned NumOps) { 4979 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4980 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4981} 4982 4983SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4984 EVT VT1, EVT VT2, 4985 SDValue Op1) { 4986 SDVTList VTs = getVTList(VT1, VT2); 4987 SDValue Ops[] = { Op1 }; 4988 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4989} 4990 4991SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4992 EVT VT1, EVT VT2, 4993 SDValue Op1, SDValue Op2) { 4994 SDVTList VTs = getVTList(VT1, VT2); 4995 SDValue Ops[] = { Op1, Op2 }; 4996 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4997} 4998 4999SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5000 EVT VT1, EVT VT2, 5001 SDValue Op1, SDValue Op2, 5002 SDValue Op3) { 5003 SDVTList VTs = getVTList(VT1, VT2); 5004 SDValue Ops[] = { Op1, Op2, Op3 }; 5005 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5006} 5007 5008SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5009 EVT VT1, EVT VT2, EVT VT3, 5010 SDValue Op1, SDValue Op2, 5011 SDValue Op3) { 5012 SDVTList VTs = getVTList(VT1, VT2, VT3); 5013 SDValue Ops[] = { Op1, Op2, Op3 }; 5014 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5015} 5016 5017SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5018 SDVTList VTs, const SDValue *Ops, 5019 unsigned NumOps) { 5020 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 5021 // Reset the NodeID to -1. 5022 N->setNodeId(-1); 5023 return N; 5024} 5025 5026/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 5027/// the line number information on the merged node since it is not possible to 5028/// preserve the information that operation is associated with multiple lines. 5029/// This will make the debugger working better at -O0, were there is a higher 5030/// probability having other instructions associated with that line. 5031/// 5032SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 5033 DebugLoc NLoc = N->getDebugLoc(); 5034 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 5035 N->setDebugLoc(DebugLoc()); 5036 } 5037 return N; 5038} 5039 5040/// MorphNodeTo - This *mutates* the specified node to have the specified 5041/// return type, opcode, and operands. 5042/// 5043/// Note that MorphNodeTo returns the resultant node. If there is already a 5044/// node of the specified opcode and operands, it returns that node instead of 5045/// the current one. Note that the DebugLoc need not be the same. 5046/// 5047/// Using MorphNodeTo is faster than creating a new node and swapping it in 5048/// with ReplaceAllUsesWith both because it often avoids allocating a new 5049/// node, and because it doesn't require CSE recalculation for any of 5050/// the node's users. 5051/// 5052SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5053 SDVTList VTs, const SDValue *Ops, 5054 unsigned NumOps) { 5055 // If an identical node already exists, use it. 5056 void *IP = 0; 5057 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5058 FoldingSetNodeID ID; 5059 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5060 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5061 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 5062 } 5063 5064 if (!RemoveNodeFromCSEMaps(N)) 5065 IP = 0; 5066 5067 // Start the morphing. 5068 N->NodeType = Opc; 5069 N->ValueList = VTs.VTs; 5070 N->NumValues = VTs.NumVTs; 5071 5072 // Clear the operands list, updating used nodes to remove this from their 5073 // use list. Keep track of any operands that become dead as a result. 5074 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5075 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5076 SDUse &Use = *I++; 5077 SDNode *Used = Use.getNode(); 5078 Use.set(SDValue()); 5079 if (Used->use_empty()) 5080 DeadNodeSet.insert(Used); 5081 } 5082 5083 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5084 // Initialize the memory references information. 5085 MN->setMemRefs(0, 0); 5086 // If NumOps is larger than the # of operands we can have in a 5087 // MachineSDNode, reallocate the operand list. 5088 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5089 if (MN->OperandsNeedDelete) 5090 delete[] MN->OperandList; 5091 if (NumOps > array_lengthof(MN->LocalOperands)) 5092 // We're creating a final node that will live unmorphed for the 5093 // remainder of the current SelectionDAG iteration, so we can allocate 5094 // the operands directly out of a pool with no recycling metadata. 5095 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5096 Ops, NumOps); 5097 else 5098 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5099 MN->OperandsNeedDelete = false; 5100 } else 5101 MN->InitOperands(MN->OperandList, Ops, NumOps); 5102 } else { 5103 // If NumOps is larger than the # of operands we currently have, reallocate 5104 // the operand list. 5105 if (NumOps > N->NumOperands) { 5106 if (N->OperandsNeedDelete) 5107 delete[] N->OperandList; 5108 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5109 N->OperandsNeedDelete = true; 5110 } else 5111 N->InitOperands(N->OperandList, Ops, NumOps); 5112 } 5113 5114 // Delete any nodes that are still dead after adding the uses for the 5115 // new operands. 5116 if (!DeadNodeSet.empty()) { 5117 SmallVector<SDNode *, 16> DeadNodes; 5118 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5119 E = DeadNodeSet.end(); I != E; ++I) 5120 if ((*I)->use_empty()) 5121 DeadNodes.push_back(*I); 5122 RemoveDeadNodes(DeadNodes); 5123 } 5124 5125 if (IP) 5126 CSEMap.InsertNode(N, IP); // Memoize the new node. 5127 return N; 5128} 5129 5130 5131/// getMachineNode - These are used for target selectors to create a new node 5132/// with specified return type(s), MachineInstr opcode, and operands. 5133/// 5134/// Note that getMachineNode returns the resultant node. If there is already a 5135/// node of the specified opcode and operands, it returns that node instead of 5136/// the current one. 5137MachineSDNode * 5138SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5139 SDVTList VTs = getVTList(VT); 5140 return getMachineNode(Opcode, dl, VTs, 0, 0); 5141} 5142 5143MachineSDNode * 5144SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5145 SDVTList VTs = getVTList(VT); 5146 SDValue Ops[] = { Op1 }; 5147 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5148} 5149 5150MachineSDNode * 5151SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5152 SDValue Op1, SDValue Op2) { 5153 SDVTList VTs = getVTList(VT); 5154 SDValue Ops[] = { Op1, Op2 }; 5155 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5156} 5157 5158MachineSDNode * 5159SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5160 SDValue Op1, SDValue Op2, SDValue Op3) { 5161 SDVTList VTs = getVTList(VT); 5162 SDValue Ops[] = { Op1, Op2, Op3 }; 5163 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5164} 5165 5166MachineSDNode * 5167SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5168 const SDValue *Ops, unsigned NumOps) { 5169 SDVTList VTs = getVTList(VT); 5170 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5171} 5172 5173MachineSDNode * 5174SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5175 SDVTList VTs = getVTList(VT1, VT2); 5176 return getMachineNode(Opcode, dl, VTs, 0, 0); 5177} 5178 5179MachineSDNode * 5180SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5181 EVT VT1, EVT VT2, SDValue Op1) { 5182 SDVTList VTs = getVTList(VT1, VT2); 5183 SDValue Ops[] = { Op1 }; 5184 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5185} 5186 5187MachineSDNode * 5188SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5189 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5190 SDVTList VTs = getVTList(VT1, VT2); 5191 SDValue Ops[] = { Op1, Op2 }; 5192 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5193} 5194 5195MachineSDNode * 5196SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5197 EVT VT1, EVT VT2, SDValue Op1, 5198 SDValue Op2, SDValue Op3) { 5199 SDVTList VTs = getVTList(VT1, VT2); 5200 SDValue Ops[] = { Op1, Op2, Op3 }; 5201 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5202} 5203 5204MachineSDNode * 5205SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5206 EVT VT1, EVT VT2, 5207 const SDValue *Ops, unsigned NumOps) { 5208 SDVTList VTs = getVTList(VT1, VT2); 5209 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5210} 5211 5212MachineSDNode * 5213SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5214 EVT VT1, EVT VT2, EVT VT3, 5215 SDValue Op1, SDValue Op2) { 5216 SDVTList VTs = getVTList(VT1, VT2, VT3); 5217 SDValue Ops[] = { Op1, Op2 }; 5218 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5219} 5220 5221MachineSDNode * 5222SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5223 EVT VT1, EVT VT2, EVT VT3, 5224 SDValue Op1, SDValue Op2, SDValue Op3) { 5225 SDVTList VTs = getVTList(VT1, VT2, VT3); 5226 SDValue Ops[] = { Op1, Op2, Op3 }; 5227 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5228} 5229 5230MachineSDNode * 5231SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5232 EVT VT1, EVT VT2, EVT VT3, 5233 const SDValue *Ops, unsigned NumOps) { 5234 SDVTList VTs = getVTList(VT1, VT2, VT3); 5235 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5236} 5237 5238MachineSDNode * 5239SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5240 EVT VT2, EVT VT3, EVT VT4, 5241 const SDValue *Ops, unsigned NumOps) { 5242 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5243 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5244} 5245 5246MachineSDNode * 5247SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5248 const std::vector<EVT> &ResultTys, 5249 const SDValue *Ops, unsigned NumOps) { 5250 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5251 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5252} 5253 5254MachineSDNode * 5255SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5256 const SDValue *Ops, unsigned NumOps) { 5257 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5258 MachineSDNode *N; 5259 void *IP = 0; 5260 5261 if (DoCSE) { 5262 FoldingSetNodeID ID; 5263 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5264 IP = 0; 5265 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5266 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5267 } 5268 } 5269 5270 // Allocate a new MachineSDNode. 5271 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5272 5273 // Initialize the operands list. 5274 if (NumOps > array_lengthof(N->LocalOperands)) 5275 // We're creating a final node that will live unmorphed for the 5276 // remainder of the current SelectionDAG iteration, so we can allocate 5277 // the operands directly out of a pool with no recycling metadata. 5278 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5279 Ops, NumOps); 5280 else 5281 N->InitOperands(N->LocalOperands, Ops, NumOps); 5282 N->OperandsNeedDelete = false; 5283 5284 if (DoCSE) 5285 CSEMap.InsertNode(N, IP); 5286 5287 AllNodes.push_back(N); 5288#ifndef NDEBUG 5289 VerifyMachineNode(N); 5290#endif 5291 return N; 5292} 5293 5294/// getTargetExtractSubreg - A convenience function for creating 5295/// TargetOpcode::EXTRACT_SUBREG nodes. 5296SDValue 5297SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5298 SDValue Operand) { 5299 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5300 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5301 VT, Operand, SRIdxVal); 5302 return SDValue(Subreg, 0); 5303} 5304 5305/// getTargetInsertSubreg - A convenience function for creating 5306/// TargetOpcode::INSERT_SUBREG nodes. 5307SDValue 5308SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5309 SDValue Operand, SDValue Subreg) { 5310 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5311 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5312 VT, Operand, Subreg, SRIdxVal); 5313 return SDValue(Result, 0); 5314} 5315 5316/// getNodeIfExists - Get the specified node if it's already available, or 5317/// else return NULL. 5318SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5319 const SDValue *Ops, unsigned NumOps) { 5320 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5321 FoldingSetNodeID ID; 5322 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5323 void *IP = 0; 5324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5325 return E; 5326 } 5327 return NULL; 5328} 5329 5330/// getDbgValue - Creates a SDDbgValue node. 5331/// 5332SDDbgValue * 5333SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5334 DebugLoc DL, unsigned O) { 5335 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5336} 5337 5338SDDbgValue * 5339SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5340 DebugLoc DL, unsigned O) { 5341 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5342} 5343 5344SDDbgValue * 5345SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5346 DebugLoc DL, unsigned O) { 5347 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5348} 5349 5350namespace { 5351 5352/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5353/// pointed to by a use iterator is deleted, increment the use iterator 5354/// so that it doesn't dangle. 5355/// 5356class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5357 SDNode::use_iterator &UI; 5358 SDNode::use_iterator &UE; 5359 5360 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5361 // Increment the iterator as needed. 5362 while (UI != UE && N == *UI) 5363 ++UI; 5364 } 5365 5366public: 5367 RAUWUpdateListener(SelectionDAG &d, 5368 SDNode::use_iterator &ui, 5369 SDNode::use_iterator &ue) 5370 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5371}; 5372 5373} 5374 5375/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5376/// This can cause recursive merging of nodes in the DAG. 5377/// 5378/// This version assumes From has a single result value. 5379/// 5380void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5381 SDNode *From = FromN.getNode(); 5382 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5383 "Cannot replace with this method!"); 5384 assert(From != To.getNode() && "Cannot replace uses of with self"); 5385 5386 // Iterate over all the existing uses of From. New uses will be added 5387 // to the beginning of the use list, which we avoid visiting. 5388 // This specifically avoids visiting uses of From that arise while the 5389 // replacement is happening, because any such uses would be the result 5390 // of CSE: If an existing node looks like From after one of its operands 5391 // is replaced by To, we don't want to replace of all its users with To 5392 // too. See PR3018 for more info. 5393 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5394 RAUWUpdateListener Listener(*this, UI, UE); 5395 while (UI != UE) { 5396 SDNode *User = *UI; 5397 5398 // This node is about to morph, remove its old self from the CSE maps. 5399 RemoveNodeFromCSEMaps(User); 5400 5401 // A user can appear in a use list multiple times, and when this 5402 // happens the uses are usually next to each other in the list. 5403 // To help reduce the number of CSE recomputations, process all 5404 // the uses of this user that we can find this way. 5405 do { 5406 SDUse &Use = UI.getUse(); 5407 ++UI; 5408 Use.set(To); 5409 } while (UI != UE && *UI == User); 5410 5411 // Now that we have modified User, add it back to the CSE maps. If it 5412 // already exists there, recursively merge the results together. 5413 AddModifiedNodeToCSEMaps(User); 5414 } 5415 5416 // If we just RAUW'd the root, take note. 5417 if (FromN == getRoot()) 5418 setRoot(To); 5419} 5420 5421/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5422/// This can cause recursive merging of nodes in the DAG. 5423/// 5424/// This version assumes that for each value of From, there is a 5425/// corresponding value in To in the same position with the same type. 5426/// 5427void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5428#ifndef NDEBUG 5429 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5430 assert((!From->hasAnyUseOfValue(i) || 5431 From->getValueType(i) == To->getValueType(i)) && 5432 "Cannot use this version of ReplaceAllUsesWith!"); 5433#endif 5434 5435 // Handle the trivial case. 5436 if (From == To) 5437 return; 5438 5439 // Iterate over just the existing users of From. See the comments in 5440 // the ReplaceAllUsesWith above. 5441 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5442 RAUWUpdateListener Listener(*this, UI, UE); 5443 while (UI != UE) { 5444 SDNode *User = *UI; 5445 5446 // This node is about to morph, remove its old self from the CSE maps. 5447 RemoveNodeFromCSEMaps(User); 5448 5449 // A user can appear in a use list multiple times, and when this 5450 // happens the uses are usually next to each other in the list. 5451 // To help reduce the number of CSE recomputations, process all 5452 // the uses of this user that we can find this way. 5453 do { 5454 SDUse &Use = UI.getUse(); 5455 ++UI; 5456 Use.setNode(To); 5457 } while (UI != UE && *UI == User); 5458 5459 // Now that we have modified User, add it back to the CSE maps. If it 5460 // already exists there, recursively merge the results together. 5461 AddModifiedNodeToCSEMaps(User); 5462 } 5463 5464 // If we just RAUW'd the root, take note. 5465 if (From == getRoot().getNode()) 5466 setRoot(SDValue(To, getRoot().getResNo())); 5467} 5468 5469/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5470/// This can cause recursive merging of nodes in the DAG. 5471/// 5472/// This version can replace From with any result values. To must match the 5473/// number and types of values returned by From. 5474void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5475 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5476 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5477 5478 // Iterate over just the existing users of From. See the comments in 5479 // the ReplaceAllUsesWith above. 5480 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5481 RAUWUpdateListener Listener(*this, UI, UE); 5482 while (UI != UE) { 5483 SDNode *User = *UI; 5484 5485 // This node is about to morph, remove its old self from the CSE maps. 5486 RemoveNodeFromCSEMaps(User); 5487 5488 // A user can appear in a use list multiple times, and when this 5489 // happens the uses are usually next to each other in the list. 5490 // To help reduce the number of CSE recomputations, process all 5491 // the uses of this user that we can find this way. 5492 do { 5493 SDUse &Use = UI.getUse(); 5494 const SDValue &ToOp = To[Use.getResNo()]; 5495 ++UI; 5496 Use.set(ToOp); 5497 } while (UI != UE && *UI == User); 5498 5499 // Now that we have modified User, add it back to the CSE maps. If it 5500 // already exists there, recursively merge the results together. 5501 AddModifiedNodeToCSEMaps(User); 5502 } 5503 5504 // If we just RAUW'd the root, take note. 5505 if (From == getRoot().getNode()) 5506 setRoot(SDValue(To[getRoot().getResNo()])); 5507} 5508 5509/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5510/// uses of other values produced by From.getNode() alone. The Deleted 5511/// vector is handled the same way as for ReplaceAllUsesWith. 5512void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5513 // Handle the really simple, really trivial case efficiently. 5514 if (From == To) return; 5515 5516 // Handle the simple, trivial, case efficiently. 5517 if (From.getNode()->getNumValues() == 1) { 5518 ReplaceAllUsesWith(From, To); 5519 return; 5520 } 5521 5522 // Iterate over just the existing users of From. See the comments in 5523 // the ReplaceAllUsesWith above. 5524 SDNode::use_iterator UI = From.getNode()->use_begin(), 5525 UE = From.getNode()->use_end(); 5526 RAUWUpdateListener Listener(*this, UI, UE); 5527 while (UI != UE) { 5528 SDNode *User = *UI; 5529 bool UserRemovedFromCSEMaps = false; 5530 5531 // A user can appear in a use list multiple times, and when this 5532 // happens the uses are usually next to each other in the list. 5533 // To help reduce the number of CSE recomputations, process all 5534 // the uses of this user that we can find this way. 5535 do { 5536 SDUse &Use = UI.getUse(); 5537 5538 // Skip uses of different values from the same node. 5539 if (Use.getResNo() != From.getResNo()) { 5540 ++UI; 5541 continue; 5542 } 5543 5544 // If this node hasn't been modified yet, it's still in the CSE maps, 5545 // so remove its old self from the CSE maps. 5546 if (!UserRemovedFromCSEMaps) { 5547 RemoveNodeFromCSEMaps(User); 5548 UserRemovedFromCSEMaps = true; 5549 } 5550 5551 ++UI; 5552 Use.set(To); 5553 } while (UI != UE && *UI == User); 5554 5555 // We are iterating over all uses of the From node, so if a use 5556 // doesn't use the specific value, no changes are made. 5557 if (!UserRemovedFromCSEMaps) 5558 continue; 5559 5560 // Now that we have modified User, add it back to the CSE maps. If it 5561 // already exists there, recursively merge the results together. 5562 AddModifiedNodeToCSEMaps(User); 5563 } 5564 5565 // If we just RAUW'd the root, take note. 5566 if (From == getRoot()) 5567 setRoot(To); 5568} 5569 5570namespace { 5571 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5572 /// to record information about a use. 5573 struct UseMemo { 5574 SDNode *User; 5575 unsigned Index; 5576 SDUse *Use; 5577 }; 5578 5579 /// operator< - Sort Memos by User. 5580 bool operator<(const UseMemo &L, const UseMemo &R) { 5581 return (intptr_t)L.User < (intptr_t)R.User; 5582 } 5583} 5584 5585/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5586/// uses of other values produced by From.getNode() alone. The same value 5587/// may appear in both the From and To list. The Deleted vector is 5588/// handled the same way as for ReplaceAllUsesWith. 5589void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5590 const SDValue *To, 5591 unsigned Num){ 5592 // Handle the simple, trivial case efficiently. 5593 if (Num == 1) 5594 return ReplaceAllUsesOfValueWith(*From, *To); 5595 5596 // Read up all the uses and make records of them. This helps 5597 // processing new uses that are introduced during the 5598 // replacement process. 5599 SmallVector<UseMemo, 4> Uses; 5600 for (unsigned i = 0; i != Num; ++i) { 5601 unsigned FromResNo = From[i].getResNo(); 5602 SDNode *FromNode = From[i].getNode(); 5603 for (SDNode::use_iterator UI = FromNode->use_begin(), 5604 E = FromNode->use_end(); UI != E; ++UI) { 5605 SDUse &Use = UI.getUse(); 5606 if (Use.getResNo() == FromResNo) { 5607 UseMemo Memo = { *UI, i, &Use }; 5608 Uses.push_back(Memo); 5609 } 5610 } 5611 } 5612 5613 // Sort the uses, so that all the uses from a given User are together. 5614 std::sort(Uses.begin(), Uses.end()); 5615 5616 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5617 UseIndex != UseIndexEnd; ) { 5618 // We know that this user uses some value of From. If it is the right 5619 // value, update it. 5620 SDNode *User = Uses[UseIndex].User; 5621 5622 // This node is about to morph, remove its old self from the CSE maps. 5623 RemoveNodeFromCSEMaps(User); 5624 5625 // The Uses array is sorted, so all the uses for a given User 5626 // are next to each other in the list. 5627 // To help reduce the number of CSE recomputations, process all 5628 // the uses of this user that we can find this way. 5629 do { 5630 unsigned i = Uses[UseIndex].Index; 5631 SDUse &Use = *Uses[UseIndex].Use; 5632 ++UseIndex; 5633 5634 Use.set(To[i]); 5635 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5636 5637 // Now that we have modified User, add it back to the CSE maps. If it 5638 // already exists there, recursively merge the results together. 5639 AddModifiedNodeToCSEMaps(User); 5640 } 5641} 5642 5643/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5644/// based on their topological order. It returns the maximum id and a vector 5645/// of the SDNodes* in assigned order by reference. 5646unsigned SelectionDAG::AssignTopologicalOrder() { 5647 5648 unsigned DAGSize = 0; 5649 5650 // SortedPos tracks the progress of the algorithm. Nodes before it are 5651 // sorted, nodes after it are unsorted. When the algorithm completes 5652 // it is at the end of the list. 5653 allnodes_iterator SortedPos = allnodes_begin(); 5654 5655 // Visit all the nodes. Move nodes with no operands to the front of 5656 // the list immediately. Annotate nodes that do have operands with their 5657 // operand count. Before we do this, the Node Id fields of the nodes 5658 // may contain arbitrary values. After, the Node Id fields for nodes 5659 // before SortedPos will contain the topological sort index, and the 5660 // Node Id fields for nodes At SortedPos and after will contain the 5661 // count of outstanding operands. 5662 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5663 SDNode *N = I++; 5664 checkForCycles(N); 5665 unsigned Degree = N->getNumOperands(); 5666 if (Degree == 0) { 5667 // A node with no uses, add it to the result array immediately. 5668 N->setNodeId(DAGSize++); 5669 allnodes_iterator Q = N; 5670 if (Q != SortedPos) 5671 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5672 assert(SortedPos != AllNodes.end() && "Overran node list"); 5673 ++SortedPos; 5674 } else { 5675 // Temporarily use the Node Id as scratch space for the degree count. 5676 N->setNodeId(Degree); 5677 } 5678 } 5679 5680 // Visit all the nodes. As we iterate, move nodes into sorted order, 5681 // such that by the time the end is reached all nodes will be sorted. 5682 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5683 SDNode *N = I; 5684 checkForCycles(N); 5685 // N is in sorted position, so all its uses have one less operand 5686 // that needs to be sorted. 5687 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5688 UI != UE; ++UI) { 5689 SDNode *P = *UI; 5690 unsigned Degree = P->getNodeId(); 5691 assert(Degree != 0 && "Invalid node degree"); 5692 --Degree; 5693 if (Degree == 0) { 5694 // All of P's operands are sorted, so P may sorted now. 5695 P->setNodeId(DAGSize++); 5696 if (P != SortedPos) 5697 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5698 assert(SortedPos != AllNodes.end() && "Overran node list"); 5699 ++SortedPos; 5700 } else { 5701 // Update P's outstanding operand count. 5702 P->setNodeId(Degree); 5703 } 5704 } 5705 if (I == SortedPos) { 5706#ifndef NDEBUG 5707 SDNode *S = ++I; 5708 dbgs() << "Overran sorted position:\n"; 5709 S->dumprFull(); 5710#endif 5711 llvm_unreachable(0); 5712 } 5713 } 5714 5715 assert(SortedPos == AllNodes.end() && 5716 "Topological sort incomplete!"); 5717 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5718 "First node in topological sort is not the entry token!"); 5719 assert(AllNodes.front().getNodeId() == 0 && 5720 "First node in topological sort has non-zero id!"); 5721 assert(AllNodes.front().getNumOperands() == 0 && 5722 "First node in topological sort has operands!"); 5723 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5724 "Last node in topologic sort has unexpected id!"); 5725 assert(AllNodes.back().use_empty() && 5726 "Last node in topologic sort has users!"); 5727 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5728 return DAGSize; 5729} 5730 5731/// AssignOrdering - Assign an order to the SDNode. 5732void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5733 assert(SD && "Trying to assign an order to a null node!"); 5734 Ordering->add(SD, Order); 5735} 5736 5737/// GetOrdering - Get the order for the SDNode. 5738unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5739 assert(SD && "Trying to get the order of a null node!"); 5740 return Ordering->getOrder(SD); 5741} 5742 5743/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5744/// value is produced by SD. 5745void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5746 DbgInfo->add(DB, SD, isParameter); 5747 if (SD) 5748 SD->setHasDebugValue(true); 5749} 5750 5751/// TransferDbgValues - Transfer SDDbgValues. 5752void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5753 if (From == To || !From.getNode()->getHasDebugValue()) 5754 return; 5755 SDNode *FromNode = From.getNode(); 5756 SDNode *ToNode = To.getNode(); 5757 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5758 SmallVector<SDDbgValue *, 2> ClonedDVs; 5759 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5760 I != E; ++I) { 5761 SDDbgValue *Dbg = *I; 5762 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5763 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5764 Dbg->getOffset(), Dbg->getDebugLoc(), 5765 Dbg->getOrder()); 5766 ClonedDVs.push_back(Clone); 5767 } 5768 } 5769 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5770 E = ClonedDVs.end(); I != E; ++I) 5771 AddDbgValue(*I, ToNode, false); 5772} 5773 5774//===----------------------------------------------------------------------===// 5775// SDNode Class 5776//===----------------------------------------------------------------------===// 5777 5778HandleSDNode::~HandleSDNode() { 5779 DropOperands(); 5780} 5781 5782GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5783 const GlobalValue *GA, 5784 EVT VT, int64_t o, unsigned char TF) 5785 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5786 TheGlobal = GA; 5787} 5788 5789MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5790 MachineMemOperand *mmo) 5791 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5792 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5793 MMO->isNonTemporal(), MMO->isInvariant()); 5794 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5795 assert(isNonTemporal() == MMO->isNonTemporal() && 5796 "Non-temporal encoding error!"); 5797 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5798} 5799 5800MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5801 const SDValue *Ops, unsigned NumOps, EVT memvt, 5802 MachineMemOperand *mmo) 5803 : SDNode(Opc, dl, VTs, Ops, NumOps), 5804 MemoryVT(memvt), MMO(mmo) { 5805 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5806 MMO->isNonTemporal(), MMO->isInvariant()); 5807 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5808 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5809} 5810 5811/// Profile - Gather unique data for the node. 5812/// 5813void SDNode::Profile(FoldingSetNodeID &ID) const { 5814 AddNodeIDNode(ID, this); 5815} 5816 5817namespace { 5818 struct EVTArray { 5819 std::vector<EVT> VTs; 5820 5821 EVTArray() { 5822 VTs.reserve(MVT::LAST_VALUETYPE); 5823 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5824 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5825 } 5826 }; 5827} 5828 5829static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5830static ManagedStatic<EVTArray> SimpleVTArray; 5831static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5832 5833/// getValueTypeList - Return a pointer to the specified value type. 5834/// 5835const EVT *SDNode::getValueTypeList(EVT VT) { 5836 if (VT.isExtended()) { 5837 sys::SmartScopedLock<true> Lock(*VTMutex); 5838 return &(*EVTs->insert(VT).first); 5839 } else { 5840 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5841 "Value type out of range!"); 5842 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5843 } 5844} 5845 5846/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5847/// indicated value. This method ignores uses of other values defined by this 5848/// operation. 5849bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5850 assert(Value < getNumValues() && "Bad value!"); 5851 5852 // TODO: Only iterate over uses of a given value of the node 5853 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5854 if (UI.getUse().getResNo() == Value) { 5855 if (NUses == 0) 5856 return false; 5857 --NUses; 5858 } 5859 } 5860 5861 // Found exactly the right number of uses? 5862 return NUses == 0; 5863} 5864 5865 5866/// hasAnyUseOfValue - Return true if there are any use of the indicated 5867/// value. This method ignores uses of other values defined by this operation. 5868bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5869 assert(Value < getNumValues() && "Bad value!"); 5870 5871 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5872 if (UI.getUse().getResNo() == Value) 5873 return true; 5874 5875 return false; 5876} 5877 5878 5879/// isOnlyUserOf - Return true if this node is the only use of N. 5880/// 5881bool SDNode::isOnlyUserOf(SDNode *N) const { 5882 bool Seen = false; 5883 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5884 SDNode *User = *I; 5885 if (User == this) 5886 Seen = true; 5887 else 5888 return false; 5889 } 5890 5891 return Seen; 5892} 5893 5894/// isOperand - Return true if this node is an operand of N. 5895/// 5896bool SDValue::isOperandOf(SDNode *N) const { 5897 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5898 if (*this == N->getOperand(i)) 5899 return true; 5900 return false; 5901} 5902 5903bool SDNode::isOperandOf(SDNode *N) const { 5904 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5905 if (this == N->OperandList[i].getNode()) 5906 return true; 5907 return false; 5908} 5909 5910/// reachesChainWithoutSideEffects - Return true if this operand (which must 5911/// be a chain) reaches the specified operand without crossing any 5912/// side-effecting instructions on any chain path. In practice, this looks 5913/// through token factors and non-volatile loads. In order to remain efficient, 5914/// this only looks a couple of nodes in, it does not do an exhaustive search. 5915bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5916 unsigned Depth) const { 5917 if (*this == Dest) return true; 5918 5919 // Don't search too deeply, we just want to be able to see through 5920 // TokenFactor's etc. 5921 if (Depth == 0) return false; 5922 5923 // If this is a token factor, all inputs to the TF happen in parallel. If any 5924 // of the operands of the TF does not reach dest, then we cannot do the xform. 5925 if (getOpcode() == ISD::TokenFactor) { 5926 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5927 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5928 return false; 5929 return true; 5930 } 5931 5932 // Loads don't have side effects, look through them. 5933 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5934 if (!Ld->isVolatile()) 5935 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5936 } 5937 return false; 5938} 5939 5940/// hasPredecessor - Return true if N is a predecessor of this node. 5941/// N is either an operand of this node, or can be reached by recursively 5942/// traversing up the operands. 5943/// NOTE: This is an expensive method. Use it carefully. 5944bool SDNode::hasPredecessor(const SDNode *N) const { 5945 SmallPtrSet<const SDNode *, 32> Visited; 5946 SmallVector<const SDNode *, 16> Worklist; 5947 return hasPredecessorHelper(N, Visited, Worklist); 5948} 5949 5950bool SDNode::hasPredecessorHelper(const SDNode *N, 5951 SmallPtrSet<const SDNode *, 32> &Visited, 5952 SmallVector<const SDNode *, 16> &Worklist) const { 5953 if (Visited.empty()) { 5954 Worklist.push_back(this); 5955 } else { 5956 // Take a look in the visited set. If we've already encountered this node 5957 // we needn't search further. 5958 if (Visited.count(N)) 5959 return true; 5960 } 5961 5962 // Haven't visited N yet. Continue the search. 5963 while (!Worklist.empty()) { 5964 const SDNode *M = Worklist.pop_back_val(); 5965 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5966 SDNode *Op = M->getOperand(i).getNode(); 5967 if (Visited.insert(Op)) 5968 Worklist.push_back(Op); 5969 if (Op == N) 5970 return true; 5971 } 5972 } 5973 5974 return false; 5975} 5976 5977uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5978 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5979 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5980} 5981 5982SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 5983 assert(N->getNumValues() == 1 && 5984 "Can't unroll a vector with multiple results!"); 5985 5986 EVT VT = N->getValueType(0); 5987 unsigned NE = VT.getVectorNumElements(); 5988 EVT EltVT = VT.getVectorElementType(); 5989 DebugLoc dl = N->getDebugLoc(); 5990 5991 SmallVector<SDValue, 8> Scalars; 5992 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 5993 5994 // If ResNE is 0, fully unroll the vector op. 5995 if (ResNE == 0) 5996 ResNE = NE; 5997 else if (NE > ResNE) 5998 NE = ResNE; 5999 6000 unsigned i; 6001 for (i= 0; i != NE; ++i) { 6002 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6003 SDValue Operand = N->getOperand(j); 6004 EVT OperandVT = Operand.getValueType(); 6005 if (OperandVT.isVector()) { 6006 // A vector operand; extract a single element. 6007 EVT OperandEltVT = OperandVT.getVectorElementType(); 6008 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6009 OperandEltVT, 6010 Operand, 6011 getConstant(i, TLI.getPointerTy())); 6012 } else { 6013 // A scalar operand; just use it as is. 6014 Operands[j] = Operand; 6015 } 6016 } 6017 6018 switch (N->getOpcode()) { 6019 default: 6020 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6021 &Operands[0], Operands.size())); 6022 break; 6023 case ISD::VSELECT: 6024 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6025 &Operands[0], Operands.size())); 6026 break; 6027 case ISD::SHL: 6028 case ISD::SRA: 6029 case ISD::SRL: 6030 case ISD::ROTL: 6031 case ISD::ROTR: 6032 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6033 getShiftAmountOperand(Operands[0].getValueType(), 6034 Operands[1]))); 6035 break; 6036 case ISD::SIGN_EXTEND_INREG: 6037 case ISD::FP_ROUND_INREG: { 6038 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6039 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6040 Operands[0], 6041 getValueType(ExtVT))); 6042 } 6043 } 6044 } 6045 6046 for (; i < ResNE; ++i) 6047 Scalars.push_back(getUNDEF(EltVT)); 6048 6049 return getNode(ISD::BUILD_VECTOR, dl, 6050 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6051 &Scalars[0], Scalars.size()); 6052} 6053 6054 6055/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6056/// location that is 'Dist' units away from the location that the 'Base' load 6057/// is loading from. 6058bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6059 unsigned Bytes, int Dist) const { 6060 if (LD->getChain() != Base->getChain()) 6061 return false; 6062 EVT VT = LD->getValueType(0); 6063 if (VT.getSizeInBits() / 8 != Bytes) 6064 return false; 6065 6066 SDValue Loc = LD->getOperand(1); 6067 SDValue BaseLoc = Base->getOperand(1); 6068 if (Loc.getOpcode() == ISD::FrameIndex) { 6069 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6070 return false; 6071 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6072 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6073 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6074 int FS = MFI->getObjectSize(FI); 6075 int BFS = MFI->getObjectSize(BFI); 6076 if (FS != BFS || FS != (int)Bytes) return false; 6077 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6078 } 6079 6080 // Handle X+C 6081 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6082 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6083 return true; 6084 6085 const GlobalValue *GV1 = NULL; 6086 const GlobalValue *GV2 = NULL; 6087 int64_t Offset1 = 0; 6088 int64_t Offset2 = 0; 6089 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6090 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6091 if (isGA1 && isGA2 && GV1 == GV2) 6092 return Offset1 == (Offset2 + Dist*Bytes); 6093 return false; 6094} 6095 6096 6097/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6098/// it cannot be inferred. 6099unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6100 // If this is a GlobalAddress + cst, return the alignment. 6101 const GlobalValue *GV; 6102 int64_t GVOffset = 0; 6103 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6104 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6105 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6106 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6107 TLI.getDataLayout()); 6108 unsigned AlignBits = KnownZero.countTrailingOnes(); 6109 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6110 if (Align) 6111 return MinAlign(Align, GVOffset); 6112 } 6113 6114 // If this is a direct reference to a stack slot, use information about the 6115 // stack slot's alignment. 6116 int FrameIdx = 1 << 31; 6117 int64_t FrameOffset = 0; 6118 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6119 FrameIdx = FI->getIndex(); 6120 } else if (isBaseWithConstantOffset(Ptr) && 6121 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6122 // Handle FI+Cst 6123 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6124 FrameOffset = Ptr.getConstantOperandVal(1); 6125 } 6126 6127 if (FrameIdx != (1 << 31)) { 6128 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6129 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6130 FrameOffset); 6131 return FIInfoAlign; 6132 } 6133 6134 return 0; 6135} 6136 6137// getAddressSpace - Return the address space this GlobalAddress belongs to. 6138unsigned GlobalAddressSDNode::getAddressSpace() const { 6139 return getGlobal()->getType()->getAddressSpace(); 6140} 6141 6142 6143Type *ConstantPoolSDNode::getType() const { 6144 if (isMachineConstantPoolEntry()) 6145 return Val.MachineCPVal->getType(); 6146 return Val.ConstVal->getType(); 6147} 6148 6149bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6150 APInt &SplatUndef, 6151 unsigned &SplatBitSize, 6152 bool &HasAnyUndefs, 6153 unsigned MinSplatBits, 6154 bool isBigEndian) { 6155 EVT VT = getValueType(0); 6156 assert(VT.isVector() && "Expected a vector type"); 6157 unsigned sz = VT.getSizeInBits(); 6158 if (MinSplatBits > sz) 6159 return false; 6160 6161 SplatValue = APInt(sz, 0); 6162 SplatUndef = APInt(sz, 0); 6163 6164 // Get the bits. Bits with undefined values (when the corresponding element 6165 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6166 // in SplatValue. If any of the values are not constant, give up and return 6167 // false. 6168 unsigned int nOps = getNumOperands(); 6169 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6170 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6171 6172 for (unsigned j = 0; j < nOps; ++j) { 6173 unsigned i = isBigEndian ? nOps-1-j : j; 6174 SDValue OpVal = getOperand(i); 6175 unsigned BitPos = j * EltBitSize; 6176 6177 if (OpVal.getOpcode() == ISD::UNDEF) 6178 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6179 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6180 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6181 zextOrTrunc(sz) << BitPos; 6182 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6183 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6184 else 6185 return false; 6186 } 6187 6188 // The build_vector is all constants or undefs. Find the smallest element 6189 // size that splats the vector. 6190 6191 HasAnyUndefs = (SplatUndef != 0); 6192 while (sz > 8) { 6193 6194 unsigned HalfSize = sz / 2; 6195 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6196 APInt LowValue = SplatValue.trunc(HalfSize); 6197 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6198 APInt LowUndef = SplatUndef.trunc(HalfSize); 6199 6200 // If the two halves do not match (ignoring undef bits), stop here. 6201 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6202 MinSplatBits > HalfSize) 6203 break; 6204 6205 SplatValue = HighValue | LowValue; 6206 SplatUndef = HighUndef & LowUndef; 6207 6208 sz = HalfSize; 6209 } 6210 6211 SplatBitSize = sz; 6212 return true; 6213} 6214 6215bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6216 // Find the first non-undef value in the shuffle mask. 6217 unsigned i, e; 6218 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6219 /* search */; 6220 6221 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6222 6223 // Make sure all remaining elements are either undef or the same as the first 6224 // non-undef value. 6225 for (int Idx = Mask[i]; i != e; ++i) 6226 if (Mask[i] >= 0 && Mask[i] != Idx) 6227 return false; 6228 return true; 6229} 6230 6231#ifdef XDEBUG 6232static void checkForCyclesHelper(const SDNode *N, 6233 SmallPtrSet<const SDNode*, 32> &Visited, 6234 SmallPtrSet<const SDNode*, 32> &Checked) { 6235 // If this node has already been checked, don't check it again. 6236 if (Checked.count(N)) 6237 return; 6238 6239 // If a node has already been visited on this depth-first walk, reject it as 6240 // a cycle. 6241 if (!Visited.insert(N)) { 6242 dbgs() << "Offending node:\n"; 6243 N->dumprFull(); 6244 errs() << "Detected cycle in SelectionDAG\n"; 6245 abort(); 6246 } 6247 6248 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6249 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6250 6251 Checked.insert(N); 6252 Visited.erase(N); 6253} 6254#endif 6255 6256void llvm::checkForCycles(const llvm::SDNode *N) { 6257#ifdef XDEBUG 6258 assert(N && "Checking nonexistant SDNode"); 6259 SmallPtrSet<const SDNode*, 32> visited; 6260 SmallPtrSet<const SDNode*, 32> checked; 6261 checkForCyclesHelper(N, visited, checked); 6262#endif 6263} 6264 6265void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6266 checkForCycles(DAG->getRoot().getNode()); 6267} 6268