SelectionDAG.cpp revision 2efa35f779213a828fa15d6aa3a508fc81d75d73
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetSelectionDAGInfo.h" 36#include "llvm/Target/TargetOptions.h" 37#include "llvm/Target/TargetInstrInfo.h" 38#include "llvm/Target/TargetIntrinsicInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Debug.h" 42#include "llvm/Support/ErrorHandling.h" 43#include "llvm/Support/ManagedStatic.h" 44#include "llvm/Support/MathExtras.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/Support/Mutex.h" 47#include "llvm/ADT/SetVector.h" 48#include "llvm/ADT/SmallPtrSet.h" 49#include "llvm/ADT/SmallSet.h" 50#include "llvm/ADT/SmallVector.h" 51#include "llvm/ADT/StringExtras.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BITCAST) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. 129 SDValue NotZero = N->getOperand(i); 130 if (isa<ConstantSDNode>(NotZero)) { 131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 132 return false; 133 } else if (isa<ConstantFPSDNode>(NotZero)) { 134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 135 bitcastToAPInt().isAllOnesValue()) 136 return false; 137 } else 138 return false; 139 140 // Okay, we have at least one ~0 value, check to see if the rest match or are 141 // undefs. 142 for (++i; i != e; ++i) 143 if (N->getOperand(i) != NotZero && 144 N->getOperand(i).getOpcode() != ISD::UNDEF) 145 return false; 146 return true; 147} 148 149 150/// isBuildVectorAllZeros - Return true if the specified node is a 151/// BUILD_VECTOR where all of the elements are 0 or undef. 152bool ISD::isBuildVectorAllZeros(const SDNode *N) { 153 // Look through a bit convert. 154 if (N->getOpcode() == ISD::BITCAST) 155 N = N->getOperand(0).getNode(); 156 157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 158 159 unsigned i = 0, e = N->getNumOperands(); 160 161 // Skip over all of the undef values. 162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 163 ++i; 164 165 // Do not accept an all-undef vector. 166 if (i == e) return false; 167 168 // Do not accept build_vectors that aren't all constants or which have non-0 169 // elements. 170 SDValue Zero = N->getOperand(i); 171 if (isa<ConstantSDNode>(Zero)) { 172 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 173 return false; 174 } else if (isa<ConstantFPSDNode>(Zero)) { 175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 176 return false; 177 } else 178 return false; 179 180 // Okay, we have at least one 0 value, check to see if the rest match or are 181 // undefs. 182 for (++i; i != e; ++i) 183 if (N->getOperand(i) != Zero && 184 N->getOperand(i).getOpcode() != ISD::UNDEF) 185 return false; 186 return true; 187} 188 189/// isScalarToVector - Return true if the specified node is a 190/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 191/// element is not an undef. 192bool ISD::isScalarToVector(const SDNode *N) { 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 194 return true; 195 196 if (N->getOpcode() != ISD::BUILD_VECTOR) 197 return false; 198 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 199 return false; 200 unsigned NumElems = N->getNumOperands(); 201 if (NumElems == 1) 202 return false; 203 for (unsigned i = 1; i < NumElems; ++i) { 204 SDValue V = N->getOperand(i); 205 if (V.getOpcode() != ISD::UNDEF) 206 return false; 207 } 208 return true; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: llvm_unreachable("Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: 436 case ISD::ATOMIC_LOAD: 437 case ISD::ATOMIC_STORE: { 438 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 439 ID.AddInteger(AT->getMemoryVT().getRawBits()); 440 ID.AddInteger(AT->getRawSubclassData()); 441 break; 442 } 443 case ISD::VECTOR_SHUFFLE: { 444 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 445 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 446 i != e; ++i) 447 ID.AddInteger(SVN->getMaskElt(i)); 448 break; 449 } 450 case ISD::TargetBlockAddress: 451 case ISD::BlockAddress: { 452 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 453 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 454 break; 455 } 456 } // end switch (N->getOpcode()) 457} 458 459/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 460/// data. 461static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 462 AddNodeIDOpcode(ID, N->getOpcode()); 463 // Add the return value info. 464 AddNodeIDValueTypes(ID, N->getVTList()); 465 // Add the operand info. 466 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 467 468 // Handle SDNode leafs with special info. 469 AddNodeIDCustom(ID, N); 470} 471 472/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 473/// the CSE map that carries volatility, temporalness, indexing mode, and 474/// extension/truncation information. 475/// 476static inline unsigned 477encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 478 bool isNonTemporal) { 479 assert((ConvType & 3) == ConvType && 480 "ConvType may not require more than 2 bits!"); 481 assert((AM & 7) == AM && 482 "AM may not require more than 3 bits!"); 483 return ConvType | 484 (AM << 2) | 485 (isVolatile << 5) | 486 (isNonTemporal << 6); 487} 488 489//===----------------------------------------------------------------------===// 490// SelectionDAG Class 491//===----------------------------------------------------------------------===// 492 493/// doNotCSE - Return true if CSE should not be performed for this node. 494static bool doNotCSE(SDNode *N) { 495 if (N->getValueType(0) == MVT::Glue) 496 return true; // Never CSE anything that produces a flag. 497 498 switch (N->getOpcode()) { 499 default: break; 500 case ISD::HANDLENODE: 501 case ISD::EH_LABEL: 502 return true; // Never CSE these nodes. 503 } 504 505 // Check that remaining values produced are not flags. 506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 507 if (N->getValueType(i) == MVT::Glue) 508 return true; // Never CSE anything that produces a flag. 509 510 return false; 511} 512 513/// RemoveDeadNodes - This method deletes all unreachable nodes in the 514/// SelectionDAG. 515void SelectionDAG::RemoveDeadNodes() { 516 // Create a dummy node (which is not added to allnodes), that adds a reference 517 // to the root node, preventing it from being deleted. 518 HandleSDNode Dummy(getRoot()); 519 520 SmallVector<SDNode*, 128> DeadNodes; 521 522 // Add all obviously-dead nodes to the DeadNodes worklist. 523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 524 if (I->use_empty()) 525 DeadNodes.push_back(I); 526 527 RemoveDeadNodes(DeadNodes); 528 529 // If the root changed (e.g. it was a dead load, update the root). 530 setRoot(Dummy.getValue()); 531} 532 533/// RemoveDeadNodes - This method deletes the unreachable nodes in the 534/// given list, and any nodes that become unreachable as a result. 535void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 536 DAGUpdateListener *UpdateListener) { 537 538 // Process the worklist, deleting the nodes and adding their uses to the 539 // worklist. 540 while (!DeadNodes.empty()) { 541 SDNode *N = DeadNodes.pop_back_val(); 542 543 if (UpdateListener) 544 UpdateListener->NodeDeleted(N, 0); 545 546 // Take the node out of the appropriate CSE map. 547 RemoveNodeFromCSEMaps(N); 548 549 // Next, brutally remove the operand list. This is safe to do, as there are 550 // no cycles in the graph. 551 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 552 SDUse &Use = *I++; 553 SDNode *Operand = Use.getNode(); 554 Use.set(SDValue()); 555 556 // Now that we removed this operand, see if there are no uses of it left. 557 if (Operand->use_empty()) 558 DeadNodes.push_back(Operand); 559 } 560 561 DeallocateNode(N); 562 } 563} 564 565void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 566 SmallVector<SDNode*, 16> DeadNodes(1, N); 567 568 // Create a dummy node that adds a reference to the root node, preventing 569 // it from being deleted. (This matters if the root is an operand of the 570 // dead node.) 571 HandleSDNode Dummy(getRoot()); 572 573 RemoveDeadNodes(DeadNodes, UpdateListener); 574} 575 576void SelectionDAG::DeleteNode(SDNode *N) { 577 // First take this out of the appropriate CSE map. 578 RemoveNodeFromCSEMaps(N); 579 580 // Finally, remove uses due to operands of this node, remove from the 581 // AllNodes list, and delete the node. 582 DeleteNodeNotInCSEMaps(N); 583} 584 585void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 586 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 587 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 588 589 // Drop all of the operands and decrement used node's use counts. 590 N->DropOperands(); 591 592 DeallocateNode(N); 593} 594 595void SelectionDAG::DeallocateNode(SDNode *N) { 596 if (N->OperandsNeedDelete) 597 delete[] N->OperandList; 598 599 // Set the opcode to DELETED_NODE to help catch bugs when node 600 // memory is reallocated. 601 N->NodeType = ISD::DELETED_NODE; 602 603 NodeAllocator.Deallocate(AllNodes.remove(N)); 604 605 // Remove the ordering of this node. 606 Ordering->remove(N); 607 608 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 609 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 610 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 611 DbgVals[i]->setIsInvalidated(); 612} 613 614/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 615/// correspond to it. This is useful when we're about to delete or repurpose 616/// the node. We don't want future request for structurally identical nodes 617/// to return N anymore. 618bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 619 bool Erased = false; 620 switch (N->getOpcode()) { 621 case ISD::HANDLENODE: return false; // noop. 622 case ISD::CONDCODE: 623 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 624 "Cond code doesn't exist!"); 625 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 626 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 627 break; 628 case ISD::ExternalSymbol: 629 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 630 break; 631 case ISD::TargetExternalSymbol: { 632 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 633 Erased = TargetExternalSymbols.erase( 634 std::pair<std::string,unsigned char>(ESN->getSymbol(), 635 ESN->getTargetFlags())); 636 break; 637 } 638 case ISD::VALUETYPE: { 639 EVT VT = cast<VTSDNode>(N)->getVT(); 640 if (VT.isExtended()) { 641 Erased = ExtendedValueTypeNodes.erase(VT); 642 } else { 643 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 644 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 645 } 646 break; 647 } 648 default: 649 // Remove it from the CSE Map. 650 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 651 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 652 Erased = CSEMap.RemoveNode(N); 653 break; 654 } 655#ifndef NDEBUG 656 // Verify that the node was actually in one of the CSE maps, unless it has a 657 // flag result (which cannot be CSE'd) or is one of the special cases that are 658 // not subject to CSE. 659 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 660 !N->isMachineOpcode() && !doNotCSE(N)) { 661 N->dump(this); 662 dbgs() << "\n"; 663 llvm_unreachable("Node is not in map!"); 664 } 665#endif 666 return Erased; 667} 668 669/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 670/// maps and modified in place. Add it back to the CSE maps, unless an identical 671/// node already exists, in which case transfer all its users to the existing 672/// node. This transfer can potentially trigger recursive merging. 673/// 674void 675SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 676 DAGUpdateListener *UpdateListener) { 677 // For node types that aren't CSE'd, just act as if no identical node 678 // already exists. 679 if (!doNotCSE(N)) { 680 SDNode *Existing = CSEMap.GetOrInsertNode(N); 681 if (Existing != N) { 682 // If there was already an existing matching node, use ReplaceAllUsesWith 683 // to replace the dead one with the existing one. This can cause 684 // recursive merging of other unrelated nodes down the line. 685 ReplaceAllUsesWith(N, Existing, UpdateListener); 686 687 // N is now dead. Inform the listener if it exists and delete it. 688 if (UpdateListener) 689 UpdateListener->NodeDeleted(N, Existing); 690 DeleteNodeNotInCSEMaps(N); 691 return; 692 } 693 } 694 695 // If the node doesn't already exist, we updated it. Inform a listener if 696 // it exists. 697 if (UpdateListener) 698 UpdateListener->NodeUpdated(N); 699} 700 701/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 702/// were replaced with those specified. If this node is never memoized, 703/// return null, otherwise return a pointer to the slot it would take. If a 704/// node already exists with these operands, the slot will be non-null. 705SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 706 void *&InsertPos) { 707 if (doNotCSE(N)) 708 return 0; 709 710 SDValue Ops[] = { Op }; 711 FoldingSetNodeID ID; 712 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 713 AddNodeIDCustom(ID, N); 714 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 715 return Node; 716} 717 718/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 719/// were replaced with those specified. If this node is never memoized, 720/// return null, otherwise return a pointer to the slot it would take. If a 721/// node already exists with these operands, the slot will be non-null. 722SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 723 SDValue Op1, SDValue Op2, 724 void *&InsertPos) { 725 if (doNotCSE(N)) 726 return 0; 727 728 SDValue Ops[] = { Op1, Op2 }; 729 FoldingSetNodeID ID; 730 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 731 AddNodeIDCustom(ID, N); 732 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 733 return Node; 734} 735 736 737/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 738/// were replaced with those specified. If this node is never memoized, 739/// return null, otherwise return a pointer to the slot it would take. If a 740/// node already exists with these operands, the slot will be non-null. 741SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 742 const SDValue *Ops,unsigned NumOps, 743 void *&InsertPos) { 744 if (doNotCSE(N)) 745 return 0; 746 747 FoldingSetNodeID ID; 748 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 749 AddNodeIDCustom(ID, N); 750 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 751 return Node; 752} 753 754#ifndef NDEBUG 755/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 756static void VerifyNodeCommon(SDNode *N) { 757 switch (N->getOpcode()) { 758 default: 759 break; 760 case ISD::BUILD_PAIR: { 761 EVT VT = N->getValueType(0); 762 assert(N->getNumValues() == 1 && "Too many results!"); 763 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 764 "Wrong return type!"); 765 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 766 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 767 "Mismatched operand types!"); 768 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 769 "Wrong operand type!"); 770 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 771 "Wrong return type size"); 772 break; 773 } 774 case ISD::BUILD_VECTOR: { 775 assert(N->getNumValues() == 1 && "Too many results!"); 776 assert(N->getValueType(0).isVector() && "Wrong return type!"); 777 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 778 "Wrong number of operands!"); 779 EVT EltVT = N->getValueType(0).getVectorElementType(); 780 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 781 assert((I->getValueType() == EltVT || 782 (EltVT.isInteger() && I->getValueType().isInteger() && 783 EltVT.bitsLE(I->getValueType()))) && 784 "Wrong operand type!"); 785 assert(I->getValueType() == N->getOperand(0).getValueType() && 786 "Operands must all have the same type"); 787 } 788 break; 789 } 790 } 791} 792 793/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 794static void VerifySDNode(SDNode *N) { 795 // The SDNode allocators cannot be used to allocate nodes with fields that are 796 // not present in an SDNode! 797 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 798 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 799 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 800 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 801 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 802 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 803 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 804 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 805 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 806 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 807 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 808 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 809 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 810 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 811 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 812 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 813 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 814 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 815 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 816 817 VerifyNodeCommon(N); 818} 819 820/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 821/// invalid. 822static void VerifyMachineNode(SDNode *N) { 823 // The MachineNode allocators cannot be used to allocate nodes with fields 824 // that are not present in a MachineNode! 825 // Currently there are no such nodes. 826 827 VerifyNodeCommon(N); 828} 829#endif // NDEBUG 830 831/// getEVTAlignment - Compute the default alignment value for the 832/// given type. 833/// 834unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 835 Type *Ty = VT == MVT::iPTR ? 836 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 837 VT.getTypeForEVT(*getContext()); 838 839 return TLI.getTargetData()->getABITypeAlignment(Ty); 840} 841 842// EntryNode could meaningfully have debug info if we can find it... 843SelectionDAG::SelectionDAG(const TargetMachine &tm) 844 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 845 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 846 Root(getEntryNode()), Ordering(0) { 847 AllNodes.push_back(&EntryNode); 848 Ordering = new SDNodeOrdering(); 849 DbgInfo = new SDDbgInfo(); 850} 851 852void SelectionDAG::init(MachineFunction &mf) { 853 MF = &mf; 854 Context = &mf.getFunction()->getContext(); 855} 856 857SelectionDAG::~SelectionDAG() { 858 allnodes_clear(); 859 delete Ordering; 860 delete DbgInfo; 861} 862 863void SelectionDAG::allnodes_clear() { 864 assert(&*AllNodes.begin() == &EntryNode); 865 AllNodes.remove(AllNodes.begin()); 866 while (!AllNodes.empty()) 867 DeallocateNode(AllNodes.begin()); 868} 869 870void SelectionDAG::clear() { 871 allnodes_clear(); 872 OperandAllocator.Reset(); 873 CSEMap.clear(); 874 875 ExtendedValueTypeNodes.clear(); 876 ExternalSymbols.clear(); 877 TargetExternalSymbols.clear(); 878 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 879 static_cast<CondCodeSDNode*>(0)); 880 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 881 static_cast<SDNode*>(0)); 882 883 EntryNode.UseList = 0; 884 AllNodes.push_back(&EntryNode); 885 Root = getEntryNode(); 886 Ordering->clear(); 887 DbgInfo->clear(); 888} 889 890SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 891 return VT.bitsGT(Op.getValueType()) ? 892 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 893 getNode(ISD::TRUNCATE, DL, VT, Op); 894} 895 896SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 897 return VT.bitsGT(Op.getValueType()) ? 898 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 899 getNode(ISD::TRUNCATE, DL, VT, Op); 900} 901 902SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 903 return VT.bitsGT(Op.getValueType()) ? 904 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 905 getNode(ISD::TRUNCATE, DL, VT, Op); 906} 907 908SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 909 assert(!VT.isVector() && 910 "getZeroExtendInReg should use the vector element type instead of " 911 "the vector type!"); 912 if (Op.getValueType() == VT) return Op; 913 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 914 APInt Imm = APInt::getLowBitsSet(BitWidth, 915 VT.getSizeInBits()); 916 return getNode(ISD::AND, DL, Op.getValueType(), Op, 917 getConstant(Imm, Op.getValueType())); 918} 919 920/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 921/// 922SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 923 EVT EltVT = VT.getScalarType(); 924 SDValue NegOne = 925 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 926 return getNode(ISD::XOR, DL, VT, Val, NegOne); 927} 928 929SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 930 EVT EltVT = VT.getScalarType(); 931 assert((EltVT.getSizeInBits() >= 64 || 932 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 933 "getConstant with a uint64_t value that doesn't fit in the type!"); 934 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 935} 936 937SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 938 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 939} 940 941SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 942 assert(VT.isInteger() && "Cannot create FP integer constant!"); 943 944 EVT EltVT = VT.getScalarType(); 945 const ConstantInt *Elt = &Val; 946 947 // In some cases the vector type is legal but the element type is illegal and 948 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 949 // inserted value (the type does not need to match the vector element type). 950 // Any extra bits introduced will be truncated away. 951 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 952 TargetLowering::TypePromoteInteger) { 953 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 954 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 955 Elt = ConstantInt::get(*getContext(), NewVal); 956 } 957 958 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 959 "APInt size does not match type size!"); 960 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 961 FoldingSetNodeID ID; 962 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 963 ID.AddPointer(Elt); 964 void *IP = 0; 965 SDNode *N = NULL; 966 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 967 if (!VT.isVector()) 968 return SDValue(N, 0); 969 970 if (!N) { 971 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 972 CSEMap.InsertNode(N, IP); 973 AllNodes.push_back(N); 974 } 975 976 SDValue Result(N, 0); 977 if (VT.isVector()) { 978 SmallVector<SDValue, 8> Ops; 979 Ops.assign(VT.getVectorNumElements(), Result); 980 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 981 } 982 return Result; 983} 984 985SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 986 return getConstant(Val, TLI.getPointerTy(), isTarget); 987} 988 989 990SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 991 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 992} 993 994SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 995 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 996 997 EVT EltVT = VT.getScalarType(); 998 999 // Do the map lookup using the actual bit pattern for the floating point 1000 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1001 // we don't have issues with SNANs. 1002 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1003 FoldingSetNodeID ID; 1004 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1005 ID.AddPointer(&V); 1006 void *IP = 0; 1007 SDNode *N = NULL; 1008 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1009 if (!VT.isVector()) 1010 return SDValue(N, 0); 1011 1012 if (!N) { 1013 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1014 CSEMap.InsertNode(N, IP); 1015 AllNodes.push_back(N); 1016 } 1017 1018 SDValue Result(N, 0); 1019 if (VT.isVector()) { 1020 SmallVector<SDValue, 8> Ops; 1021 Ops.assign(VT.getVectorNumElements(), Result); 1022 // FIXME DebugLoc info might be appropriate here 1023 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1024 } 1025 return Result; 1026} 1027 1028SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1029 EVT EltVT = VT.getScalarType(); 1030 if (EltVT==MVT::f32) 1031 return getConstantFP(APFloat((float)Val), VT, isTarget); 1032 else if (EltVT==MVT::f64) 1033 return getConstantFP(APFloat(Val), VT, isTarget); 1034 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1035 bool ignored; 1036 APFloat apf = APFloat(Val); 1037 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1038 &ignored); 1039 return getConstantFP(apf, VT, isTarget); 1040 } else { 1041 assert(0 && "Unsupported type in getConstantFP"); 1042 return SDValue(); 1043 } 1044} 1045 1046SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1047 EVT VT, int64_t Offset, 1048 bool isTargetGA, 1049 unsigned char TargetFlags) { 1050 assert((TargetFlags == 0 || isTargetGA) && 1051 "Cannot set target flags on target-independent globals"); 1052 1053 // Truncate (with sign-extension) the offset value to the pointer size. 1054 EVT PTy = TLI.getPointerTy(); 1055 unsigned BitWidth = PTy.getSizeInBits(); 1056 if (BitWidth < 64) 1057 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1058 1059 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1060 if (!GVar) { 1061 // If GV is an alias then use the aliasee for determining thread-localness. 1062 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1063 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1064 } 1065 1066 unsigned Opc; 1067 if (GVar && GVar->isThreadLocal()) 1068 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1069 else 1070 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1071 1072 FoldingSetNodeID ID; 1073 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1074 ID.AddPointer(GV); 1075 ID.AddInteger(Offset); 1076 ID.AddInteger(TargetFlags); 1077 void *IP = 0; 1078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1079 return SDValue(E, 0); 1080 1081 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1082 Offset, TargetFlags); 1083 CSEMap.InsertNode(N, IP); 1084 AllNodes.push_back(N); 1085 return SDValue(N, 0); 1086} 1087 1088SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1089 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1090 FoldingSetNodeID ID; 1091 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1092 ID.AddInteger(FI); 1093 void *IP = 0; 1094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1095 return SDValue(E, 0); 1096 1097 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1098 CSEMap.InsertNode(N, IP); 1099 AllNodes.push_back(N); 1100 return SDValue(N, 0); 1101} 1102 1103SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1104 unsigned char TargetFlags) { 1105 assert((TargetFlags == 0 || isTarget) && 1106 "Cannot set target flags on target-independent jump tables"); 1107 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1108 FoldingSetNodeID ID; 1109 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1110 ID.AddInteger(JTI); 1111 ID.AddInteger(TargetFlags); 1112 void *IP = 0; 1113 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1114 return SDValue(E, 0); 1115 1116 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1117 TargetFlags); 1118 CSEMap.InsertNode(N, IP); 1119 AllNodes.push_back(N); 1120 return SDValue(N, 0); 1121} 1122 1123SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1124 unsigned Alignment, int Offset, 1125 bool isTarget, 1126 unsigned char TargetFlags) { 1127 assert((TargetFlags == 0 || isTarget) && 1128 "Cannot set target flags on target-independent globals"); 1129 if (Alignment == 0) 1130 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1131 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1132 FoldingSetNodeID ID; 1133 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1134 ID.AddInteger(Alignment); 1135 ID.AddInteger(Offset); 1136 ID.AddPointer(C); 1137 ID.AddInteger(TargetFlags); 1138 void *IP = 0; 1139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1140 return SDValue(E, 0); 1141 1142 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1143 Alignment, TargetFlags); 1144 CSEMap.InsertNode(N, IP); 1145 AllNodes.push_back(N); 1146 return SDValue(N, 0); 1147} 1148 1149 1150SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1151 unsigned Alignment, int Offset, 1152 bool isTarget, 1153 unsigned char TargetFlags) { 1154 assert((TargetFlags == 0 || isTarget) && 1155 "Cannot set target flags on target-independent globals"); 1156 if (Alignment == 0) 1157 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1158 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1159 FoldingSetNodeID ID; 1160 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1161 ID.AddInteger(Alignment); 1162 ID.AddInteger(Offset); 1163 C->addSelectionDAGCSEId(ID); 1164 ID.AddInteger(TargetFlags); 1165 void *IP = 0; 1166 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1167 return SDValue(E, 0); 1168 1169 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1170 Alignment, TargetFlags); 1171 CSEMap.InsertNode(N, IP); 1172 AllNodes.push_back(N); 1173 return SDValue(N, 0); 1174} 1175 1176SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1177 FoldingSetNodeID ID; 1178 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1179 ID.AddPointer(MBB); 1180 void *IP = 0; 1181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1182 return SDValue(E, 0); 1183 1184 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1185 CSEMap.InsertNode(N, IP); 1186 AllNodes.push_back(N); 1187 return SDValue(N, 0); 1188} 1189 1190SDValue SelectionDAG::getValueType(EVT VT) { 1191 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1192 ValueTypeNodes.size()) 1193 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1194 1195 SDNode *&N = VT.isExtended() ? 1196 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1197 1198 if (N) return SDValue(N, 0); 1199 N = new (NodeAllocator) VTSDNode(VT); 1200 AllNodes.push_back(N); 1201 return SDValue(N, 0); 1202} 1203 1204SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1205 SDNode *&N = ExternalSymbols[Sym]; 1206 if (N) return SDValue(N, 0); 1207 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1208 AllNodes.push_back(N); 1209 return SDValue(N, 0); 1210} 1211 1212SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1213 unsigned char TargetFlags) { 1214 SDNode *&N = 1215 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1216 TargetFlags)]; 1217 if (N) return SDValue(N, 0); 1218 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1219 AllNodes.push_back(N); 1220 return SDValue(N, 0); 1221} 1222 1223SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1224 if ((unsigned)Cond >= CondCodeNodes.size()) 1225 CondCodeNodes.resize(Cond+1); 1226 1227 if (CondCodeNodes[Cond] == 0) { 1228 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1229 CondCodeNodes[Cond] = N; 1230 AllNodes.push_back(N); 1231 } 1232 1233 return SDValue(CondCodeNodes[Cond], 0); 1234} 1235 1236// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1237// the shuffle mask M that point at N1 to point at N2, and indices that point 1238// N2 to point at N1. 1239static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1240 std::swap(N1, N2); 1241 int NElts = M.size(); 1242 for (int i = 0; i != NElts; ++i) { 1243 if (M[i] >= NElts) 1244 M[i] -= NElts; 1245 else if (M[i] >= 0) 1246 M[i] += NElts; 1247 } 1248} 1249 1250SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1251 SDValue N2, const int *Mask) { 1252 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1253 assert(VT.isVector() && N1.getValueType().isVector() && 1254 "Vector Shuffle VTs must be a vectors"); 1255 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1256 && "Vector Shuffle VTs must have same element type"); 1257 1258 // Canonicalize shuffle undef, undef -> undef 1259 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1260 return getUNDEF(VT); 1261 1262 // Validate that all indices in Mask are within the range of the elements 1263 // input to the shuffle. 1264 unsigned NElts = VT.getVectorNumElements(); 1265 SmallVector<int, 8> MaskVec; 1266 for (unsigned i = 0; i != NElts; ++i) { 1267 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1268 MaskVec.push_back(Mask[i]); 1269 } 1270 1271 // Canonicalize shuffle v, v -> v, undef 1272 if (N1 == N2) { 1273 N2 = getUNDEF(VT); 1274 for (unsigned i = 0; i != NElts; ++i) 1275 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1276 } 1277 1278 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1279 if (N1.getOpcode() == ISD::UNDEF) 1280 commuteShuffle(N1, N2, MaskVec); 1281 1282 // Canonicalize all index into lhs, -> shuffle lhs, undef 1283 // Canonicalize all index into rhs, -> shuffle rhs, undef 1284 bool AllLHS = true, AllRHS = true; 1285 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1286 for (unsigned i = 0; i != NElts; ++i) { 1287 if (MaskVec[i] >= (int)NElts) { 1288 if (N2Undef) 1289 MaskVec[i] = -1; 1290 else 1291 AllLHS = false; 1292 } else if (MaskVec[i] >= 0) { 1293 AllRHS = false; 1294 } 1295 } 1296 if (AllLHS && AllRHS) 1297 return getUNDEF(VT); 1298 if (AllLHS && !N2Undef) 1299 N2 = getUNDEF(VT); 1300 if (AllRHS) { 1301 N1 = getUNDEF(VT); 1302 commuteShuffle(N1, N2, MaskVec); 1303 } 1304 1305 // If Identity shuffle, or all shuffle in to undef, return that node. 1306 bool AllUndef = true; 1307 bool Identity = true; 1308 for (unsigned i = 0; i != NElts; ++i) { 1309 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1310 if (MaskVec[i] >= 0) AllUndef = false; 1311 } 1312 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1313 return N1; 1314 if (AllUndef) 1315 return getUNDEF(VT); 1316 1317 FoldingSetNodeID ID; 1318 SDValue Ops[2] = { N1, N2 }; 1319 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1320 for (unsigned i = 0; i != NElts; ++i) 1321 ID.AddInteger(MaskVec[i]); 1322 1323 void* IP = 0; 1324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1325 return SDValue(E, 0); 1326 1327 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1328 // SDNode doesn't have access to it. This memory will be "leaked" when 1329 // the node is deallocated, but recovered when the NodeAllocator is released. 1330 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1331 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1332 1333 ShuffleVectorSDNode *N = 1334 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1335 CSEMap.InsertNode(N, IP); 1336 AllNodes.push_back(N); 1337 return SDValue(N, 0); 1338} 1339 1340SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1341 SDValue Val, SDValue DTy, 1342 SDValue STy, SDValue Rnd, SDValue Sat, 1343 ISD::CvtCode Code) { 1344 // If the src and dest types are the same and the conversion is between 1345 // integer types of the same sign or two floats, no conversion is necessary. 1346 if (DTy == STy && 1347 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1348 return Val; 1349 1350 FoldingSetNodeID ID; 1351 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1352 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1353 void* IP = 0; 1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1355 return SDValue(E, 0); 1356 1357 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1358 Code); 1359 CSEMap.InsertNode(N, IP); 1360 AllNodes.push_back(N); 1361 return SDValue(N, 0); 1362} 1363 1364SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1365 FoldingSetNodeID ID; 1366 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1367 ID.AddInteger(RegNo); 1368 void *IP = 0; 1369 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1370 return SDValue(E, 0); 1371 1372 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1373 CSEMap.InsertNode(N, IP); 1374 AllNodes.push_back(N); 1375 return SDValue(N, 0); 1376} 1377 1378SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1379 FoldingSetNodeID ID; 1380 SDValue Ops[] = { Root }; 1381 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1382 ID.AddPointer(Label); 1383 void *IP = 0; 1384 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1385 return SDValue(E, 0); 1386 1387 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1388 CSEMap.InsertNode(N, IP); 1389 AllNodes.push_back(N); 1390 return SDValue(N, 0); 1391} 1392 1393 1394SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1395 bool isTarget, 1396 unsigned char TargetFlags) { 1397 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1398 1399 FoldingSetNodeID ID; 1400 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1401 ID.AddPointer(BA); 1402 ID.AddInteger(TargetFlags); 1403 void *IP = 0; 1404 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1405 return SDValue(E, 0); 1406 1407 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1408 CSEMap.InsertNode(N, IP); 1409 AllNodes.push_back(N); 1410 return SDValue(N, 0); 1411} 1412 1413SDValue SelectionDAG::getSrcValue(const Value *V) { 1414 assert((!V || V->getType()->isPointerTy()) && 1415 "SrcValue is not a pointer?"); 1416 1417 FoldingSetNodeID ID; 1418 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1419 ID.AddPointer(V); 1420 1421 void *IP = 0; 1422 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1423 return SDValue(E, 0); 1424 1425 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1426 CSEMap.InsertNode(N, IP); 1427 AllNodes.push_back(N); 1428 return SDValue(N, 0); 1429} 1430 1431/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1432SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1433 FoldingSetNodeID ID; 1434 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1435 ID.AddPointer(MD); 1436 1437 void *IP = 0; 1438 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1439 return SDValue(E, 0); 1440 1441 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1442 CSEMap.InsertNode(N, IP); 1443 AllNodes.push_back(N); 1444 return SDValue(N, 0); 1445} 1446 1447 1448/// getShiftAmountOperand - Return the specified value casted to 1449/// the target's desired shift amount type. 1450SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1451 EVT OpTy = Op.getValueType(); 1452 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1453 if (OpTy == ShTy || OpTy.isVector()) return Op; 1454 1455 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1456 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1457} 1458 1459/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1460/// specified value type. 1461SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1462 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1463 unsigned ByteSize = VT.getStoreSize(); 1464 Type *Ty = VT.getTypeForEVT(*getContext()); 1465 unsigned StackAlign = 1466 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1467 1468 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1469 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1470} 1471 1472/// CreateStackTemporary - Create a stack temporary suitable for holding 1473/// either of the specified value types. 1474SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1475 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1476 VT2.getStoreSizeInBits())/8; 1477 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1478 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1479 const TargetData *TD = TLI.getTargetData(); 1480 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1481 TD->getPrefTypeAlignment(Ty2)); 1482 1483 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1484 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1485 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1486} 1487 1488SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1489 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1490 // These setcc operations always fold. 1491 switch (Cond) { 1492 default: break; 1493 case ISD::SETFALSE: 1494 case ISD::SETFALSE2: return getConstant(0, VT); 1495 case ISD::SETTRUE: 1496 case ISD::SETTRUE2: return getConstant(1, VT); 1497 1498 case ISD::SETOEQ: 1499 case ISD::SETOGT: 1500 case ISD::SETOGE: 1501 case ISD::SETOLT: 1502 case ISD::SETOLE: 1503 case ISD::SETONE: 1504 case ISD::SETO: 1505 case ISD::SETUO: 1506 case ISD::SETUEQ: 1507 case ISD::SETUNE: 1508 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1509 break; 1510 } 1511 1512 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1513 const APInt &C2 = N2C->getAPIntValue(); 1514 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1515 const APInt &C1 = N1C->getAPIntValue(); 1516 1517 switch (Cond) { 1518 default: llvm_unreachable("Unknown integer setcc!"); 1519 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1520 case ISD::SETNE: return getConstant(C1 != C2, VT); 1521 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1522 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1523 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1524 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1525 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1526 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1527 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1528 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1529 } 1530 } 1531 } 1532 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1533 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1534 // No compile time operations on this type yet. 1535 if (N1C->getValueType(0) == MVT::ppcf128) 1536 return SDValue(); 1537 1538 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1539 switch (Cond) { 1540 default: break; 1541 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1542 return getUNDEF(VT); 1543 // fall through 1544 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1545 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1546 return getUNDEF(VT); 1547 // fall through 1548 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1549 R==APFloat::cmpLessThan, VT); 1550 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1551 return getUNDEF(VT); 1552 // fall through 1553 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1554 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1555 return getUNDEF(VT); 1556 // fall through 1557 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1558 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1559 return getUNDEF(VT); 1560 // fall through 1561 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1562 R==APFloat::cmpEqual, VT); 1563 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1564 return getUNDEF(VT); 1565 // fall through 1566 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1567 R==APFloat::cmpEqual, VT); 1568 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1569 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1570 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1571 R==APFloat::cmpEqual, VT); 1572 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1573 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1574 R==APFloat::cmpLessThan, VT); 1575 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1576 R==APFloat::cmpUnordered, VT); 1577 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1578 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1579 } 1580 } else { 1581 // Ensure that the constant occurs on the RHS. 1582 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1583 } 1584 } 1585 1586 // Could not fold it. 1587 return SDValue(); 1588} 1589 1590/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1591/// use this predicate to simplify operations downstream. 1592bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1593 // This predicate is not safe for vector operations. 1594 if (Op.getValueType().isVector()) 1595 return false; 1596 1597 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1598 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1599} 1600 1601/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1602/// this predicate to simplify operations downstream. Mask is known to be zero 1603/// for bits that V cannot have. 1604bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1605 unsigned Depth) const { 1606 APInt KnownZero, KnownOne; 1607 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1608 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1609 return (KnownZero & Mask) == Mask; 1610} 1611 1612/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1613/// known to be either zero or one and return them in the KnownZero/KnownOne 1614/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1615/// processing. 1616void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1617 APInt &KnownZero, APInt &KnownOne, 1618 unsigned Depth) const { 1619 unsigned BitWidth = Mask.getBitWidth(); 1620 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1621 "Mask size mismatches value type size!"); 1622 1623 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1624 if (Depth == 6 || Mask == 0) 1625 return; // Limit search depth. 1626 1627 APInt KnownZero2, KnownOne2; 1628 1629 switch (Op.getOpcode()) { 1630 case ISD::Constant: 1631 // We know all of the bits for a constant! 1632 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1633 KnownZero = ~KnownOne & Mask; 1634 return; 1635 case ISD::AND: 1636 // If either the LHS or the RHS are Zero, the result is zero. 1637 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1638 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1639 KnownZero2, KnownOne2, Depth+1); 1640 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1641 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1642 1643 // Output known-1 bits are only known if set in both the LHS & RHS. 1644 KnownOne &= KnownOne2; 1645 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1646 KnownZero |= KnownZero2; 1647 return; 1648 case ISD::OR: 1649 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1650 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1651 KnownZero2, KnownOne2, Depth+1); 1652 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1653 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1654 1655 // Output known-0 bits are only known if clear in both the LHS & RHS. 1656 KnownZero &= KnownZero2; 1657 // Output known-1 are known to be set if set in either the LHS | RHS. 1658 KnownOne |= KnownOne2; 1659 return; 1660 case ISD::XOR: { 1661 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1662 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1663 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1664 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1665 1666 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1667 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1668 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1669 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1670 KnownZero = KnownZeroOut; 1671 return; 1672 } 1673 case ISD::MUL: { 1674 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1675 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1676 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1677 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1678 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1679 1680 // If low bits are zero in either operand, output low known-0 bits. 1681 // Also compute a conserative estimate for high known-0 bits. 1682 // More trickiness is possible, but this is sufficient for the 1683 // interesting case of alignment computation. 1684 KnownOne.clearAllBits(); 1685 unsigned TrailZ = KnownZero.countTrailingOnes() + 1686 KnownZero2.countTrailingOnes(); 1687 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1688 KnownZero2.countLeadingOnes(), 1689 BitWidth) - BitWidth; 1690 1691 TrailZ = std::min(TrailZ, BitWidth); 1692 LeadZ = std::min(LeadZ, BitWidth); 1693 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1694 APInt::getHighBitsSet(BitWidth, LeadZ); 1695 KnownZero &= Mask; 1696 return; 1697 } 1698 case ISD::UDIV: { 1699 // For the purposes of computing leading zeros we can conservatively 1700 // treat a udiv as a logical right shift by the power of 2 known to 1701 // be less than the denominator. 1702 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1703 ComputeMaskedBits(Op.getOperand(0), 1704 AllOnes, KnownZero2, KnownOne2, Depth+1); 1705 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1706 1707 KnownOne2.clearAllBits(); 1708 KnownZero2.clearAllBits(); 1709 ComputeMaskedBits(Op.getOperand(1), 1710 AllOnes, KnownZero2, KnownOne2, Depth+1); 1711 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1712 if (RHSUnknownLeadingOnes != BitWidth) 1713 LeadZ = std::min(BitWidth, 1714 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1715 1716 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1717 return; 1718 } 1719 case ISD::SELECT: 1720 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1721 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1722 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1723 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1724 1725 // Only known if known in both the LHS and RHS. 1726 KnownOne &= KnownOne2; 1727 KnownZero &= KnownZero2; 1728 return; 1729 case ISD::SELECT_CC: 1730 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1731 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1732 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1733 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1734 1735 // Only known if known in both the LHS and RHS. 1736 KnownOne &= KnownOne2; 1737 KnownZero &= KnownZero2; 1738 return; 1739 case ISD::SADDO: 1740 case ISD::UADDO: 1741 case ISD::SSUBO: 1742 case ISD::USUBO: 1743 case ISD::SMULO: 1744 case ISD::UMULO: 1745 if (Op.getResNo() != 1) 1746 return; 1747 // The boolean result conforms to getBooleanContents. Fall through. 1748 case ISD::SETCC: 1749 // If we know the result of a setcc has the top bits zero, use this info. 1750 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1751 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1752 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1753 return; 1754 case ISD::SHL: 1755 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1756 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1757 unsigned ShAmt = SA->getZExtValue(); 1758 1759 // If the shift count is an invalid immediate, don't do anything. 1760 if (ShAmt >= BitWidth) 1761 return; 1762 1763 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1764 KnownZero, KnownOne, Depth+1); 1765 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1766 KnownZero <<= ShAmt; 1767 KnownOne <<= ShAmt; 1768 // low bits known zero. 1769 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1770 } 1771 return; 1772 case ISD::SRL: 1773 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1774 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1775 unsigned ShAmt = SA->getZExtValue(); 1776 1777 // If the shift count is an invalid immediate, don't do anything. 1778 if (ShAmt >= BitWidth) 1779 return; 1780 1781 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1782 KnownZero, KnownOne, Depth+1); 1783 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1784 KnownZero = KnownZero.lshr(ShAmt); 1785 KnownOne = KnownOne.lshr(ShAmt); 1786 1787 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1788 KnownZero |= HighBits; // High bits known zero. 1789 } 1790 return; 1791 case ISD::SRA: 1792 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1793 unsigned ShAmt = SA->getZExtValue(); 1794 1795 // If the shift count is an invalid immediate, don't do anything. 1796 if (ShAmt >= BitWidth) 1797 return; 1798 1799 APInt InDemandedMask = (Mask << ShAmt); 1800 // If any of the demanded bits are produced by the sign extension, we also 1801 // demand the input sign bit. 1802 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1803 if (HighBits.getBoolValue()) 1804 InDemandedMask |= APInt::getSignBit(BitWidth); 1805 1806 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1807 Depth+1); 1808 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1809 KnownZero = KnownZero.lshr(ShAmt); 1810 KnownOne = KnownOne.lshr(ShAmt); 1811 1812 // Handle the sign bits. 1813 APInt SignBit = APInt::getSignBit(BitWidth); 1814 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1815 1816 if (KnownZero.intersects(SignBit)) { 1817 KnownZero |= HighBits; // New bits are known zero. 1818 } else if (KnownOne.intersects(SignBit)) { 1819 KnownOne |= HighBits; // New bits are known one. 1820 } 1821 } 1822 return; 1823 case ISD::SIGN_EXTEND_INREG: { 1824 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1825 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1826 1827 // Sign extension. Compute the demanded bits in the result that are not 1828 // present in the input. 1829 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1830 1831 APInt InSignBit = APInt::getSignBit(EBits); 1832 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1833 1834 // If the sign extended bits are demanded, we know that the sign 1835 // bit is demanded. 1836 InSignBit = InSignBit.zext(BitWidth); 1837 if (NewBits.getBoolValue()) 1838 InputDemandedBits |= InSignBit; 1839 1840 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1841 KnownZero, KnownOne, Depth+1); 1842 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1843 1844 // If the sign bit of the input is known set or clear, then we know the 1845 // top bits of the result. 1846 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1847 KnownZero |= NewBits; 1848 KnownOne &= ~NewBits; 1849 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1850 KnownOne |= NewBits; 1851 KnownZero &= ~NewBits; 1852 } else { // Input sign bit unknown 1853 KnownZero &= ~NewBits; 1854 KnownOne &= ~NewBits; 1855 } 1856 return; 1857 } 1858 case ISD::CTTZ: 1859 case ISD::CTLZ: 1860 case ISD::CTPOP: { 1861 unsigned LowBits = Log2_32(BitWidth)+1; 1862 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1863 KnownOne.clearAllBits(); 1864 return; 1865 } 1866 case ISD::LOAD: { 1867 if (ISD::isZEXTLoad(Op.getNode())) { 1868 LoadSDNode *LD = cast<LoadSDNode>(Op); 1869 EVT VT = LD->getMemoryVT(); 1870 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1871 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1872 } 1873 return; 1874 } 1875 case ISD::ZERO_EXTEND: { 1876 EVT InVT = Op.getOperand(0).getValueType(); 1877 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1878 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1879 APInt InMask = Mask.trunc(InBits); 1880 KnownZero = KnownZero.trunc(InBits); 1881 KnownOne = KnownOne.trunc(InBits); 1882 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1883 KnownZero = KnownZero.zext(BitWidth); 1884 KnownOne = KnownOne.zext(BitWidth); 1885 KnownZero |= NewBits; 1886 return; 1887 } 1888 case ISD::SIGN_EXTEND: { 1889 EVT InVT = Op.getOperand(0).getValueType(); 1890 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1891 APInt InSignBit = APInt::getSignBit(InBits); 1892 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1893 APInt InMask = Mask.trunc(InBits); 1894 1895 // If any of the sign extended bits are demanded, we know that the sign 1896 // bit is demanded. Temporarily set this bit in the mask for our callee. 1897 if (NewBits.getBoolValue()) 1898 InMask |= InSignBit; 1899 1900 KnownZero = KnownZero.trunc(InBits); 1901 KnownOne = KnownOne.trunc(InBits); 1902 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1903 1904 // Note if the sign bit is known to be zero or one. 1905 bool SignBitKnownZero = KnownZero.isNegative(); 1906 bool SignBitKnownOne = KnownOne.isNegative(); 1907 assert(!(SignBitKnownZero && SignBitKnownOne) && 1908 "Sign bit can't be known to be both zero and one!"); 1909 1910 // If the sign bit wasn't actually demanded by our caller, we don't 1911 // want it set in the KnownZero and KnownOne result values. Reset the 1912 // mask and reapply it to the result values. 1913 InMask = Mask.trunc(InBits); 1914 KnownZero &= InMask; 1915 KnownOne &= InMask; 1916 1917 KnownZero = KnownZero.zext(BitWidth); 1918 KnownOne = KnownOne.zext(BitWidth); 1919 1920 // If the sign bit is known zero or one, the top bits match. 1921 if (SignBitKnownZero) 1922 KnownZero |= NewBits; 1923 else if (SignBitKnownOne) 1924 KnownOne |= NewBits; 1925 return; 1926 } 1927 case ISD::ANY_EXTEND: { 1928 EVT InVT = Op.getOperand(0).getValueType(); 1929 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1930 APInt InMask = Mask.trunc(InBits); 1931 KnownZero = KnownZero.trunc(InBits); 1932 KnownOne = KnownOne.trunc(InBits); 1933 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1934 KnownZero = KnownZero.zext(BitWidth); 1935 KnownOne = KnownOne.zext(BitWidth); 1936 return; 1937 } 1938 case ISD::TRUNCATE: { 1939 EVT InVT = Op.getOperand(0).getValueType(); 1940 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1941 APInt InMask = Mask.zext(InBits); 1942 KnownZero = KnownZero.zext(InBits); 1943 KnownOne = KnownOne.zext(InBits); 1944 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1945 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1946 KnownZero = KnownZero.trunc(BitWidth); 1947 KnownOne = KnownOne.trunc(BitWidth); 1948 break; 1949 } 1950 case ISD::AssertZext: { 1951 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1952 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1953 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1954 KnownOne, Depth+1); 1955 KnownZero |= (~InMask) & Mask; 1956 return; 1957 } 1958 case ISD::FGETSIGN: 1959 // All bits are zero except the low bit. 1960 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1961 return; 1962 1963 case ISD::SUB: { 1964 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1965 // We know that the top bits of C-X are clear if X contains less bits 1966 // than C (i.e. no wrap-around can happen). For example, 20-X is 1967 // positive if we can prove that X is >= 0 and < 16. 1968 if (CLHS->getAPIntValue().isNonNegative()) { 1969 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1970 // NLZ can't be BitWidth with no sign bit 1971 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1972 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1973 Depth+1); 1974 1975 // If all of the MaskV bits are known to be zero, then we know the 1976 // output top bits are zero, because we now know that the output is 1977 // from [0-C]. 1978 if ((KnownZero2 & MaskV) == MaskV) { 1979 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1980 // Top bits known zero. 1981 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1982 } 1983 } 1984 } 1985 } 1986 // fall through 1987 case ISD::ADD: 1988 case ISD::ADDE: { 1989 // Output known-0 bits are known if clear or set in both the low clear bits 1990 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1991 // low 3 bits clear. 1992 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1993 BitWidth - Mask.countLeadingZeros()); 1994 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1995 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1996 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1997 1998 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1999 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2000 KnownZeroOut = std::min(KnownZeroOut, 2001 KnownZero2.countTrailingOnes()); 2002 2003 if (Op.getOpcode() == ISD::ADD) { 2004 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2005 return; 2006 } 2007 2008 // With ADDE, a carry bit may be added in, so we can only use this 2009 // information if we know (at least) that the low two bits are clear. We 2010 // then return to the caller that the low bit is unknown but that other bits 2011 // are known zero. 2012 if (KnownZeroOut >= 2) // ADDE 2013 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2014 return; 2015 } 2016 case ISD::SREM: 2017 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2018 const APInt &RA = Rem->getAPIntValue().abs(); 2019 if (RA.isPowerOf2()) { 2020 APInt LowBits = RA - 1; 2021 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2022 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 2023 2024 // The low bits of the first operand are unchanged by the srem. 2025 KnownZero = KnownZero2 & LowBits; 2026 KnownOne = KnownOne2 & LowBits; 2027 2028 // If the first operand is non-negative or has all low bits zero, then 2029 // the upper bits are all zero. 2030 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2031 KnownZero |= ~LowBits; 2032 2033 // If the first operand is negative and not all low bits are zero, then 2034 // the upper bits are all one. 2035 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2036 KnownOne |= ~LowBits; 2037 2038 KnownZero &= Mask; 2039 KnownOne &= Mask; 2040 2041 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2042 } 2043 } 2044 return; 2045 case ISD::UREM: { 2046 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2047 const APInt &RA = Rem->getAPIntValue(); 2048 if (RA.isPowerOf2()) { 2049 APInt LowBits = (RA - 1); 2050 APInt Mask2 = LowBits & Mask; 2051 KnownZero |= ~LowBits & Mask; 2052 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 2053 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2054 break; 2055 } 2056 } 2057 2058 // Since the result is less than or equal to either operand, any leading 2059 // zero bits in either operand must also exist in the result. 2060 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 2061 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 2062 Depth+1); 2063 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 2064 Depth+1); 2065 2066 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2067 KnownZero2.countLeadingOnes()); 2068 KnownOne.clearAllBits(); 2069 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2070 return; 2071 } 2072 case ISD::FrameIndex: 2073 case ISD::TargetFrameIndex: 2074 if (unsigned Align = InferPtrAlignment(Op)) { 2075 // The low bits are known zero if the pointer is aligned. 2076 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2077 return; 2078 } 2079 break; 2080 2081 default: 2082 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2083 break; 2084 // Fallthrough 2085 case ISD::INTRINSIC_WO_CHAIN: 2086 case ISD::INTRINSIC_W_CHAIN: 2087 case ISD::INTRINSIC_VOID: 2088 // Allow the target to implement this method for its nodes. 2089 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2090 Depth); 2091 return; 2092 } 2093} 2094 2095/// ComputeNumSignBits - Return the number of times the sign bit of the 2096/// register is replicated into the other bits. We know that at least 1 bit 2097/// is always equal to the sign bit (itself), but other cases can give us 2098/// information. For example, immediately after an "SRA X, 2", we know that 2099/// the top 3 bits are all equal to each other, so we return 3. 2100unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2101 EVT VT = Op.getValueType(); 2102 assert(VT.isInteger() && "Invalid VT!"); 2103 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2104 unsigned Tmp, Tmp2; 2105 unsigned FirstAnswer = 1; 2106 2107 if (Depth == 6) 2108 return 1; // Limit search depth. 2109 2110 switch (Op.getOpcode()) { 2111 default: break; 2112 case ISD::AssertSext: 2113 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2114 return VTBits-Tmp+1; 2115 case ISD::AssertZext: 2116 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2117 return VTBits-Tmp; 2118 2119 case ISD::Constant: { 2120 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2121 return Val.getNumSignBits(); 2122 } 2123 2124 case ISD::SIGN_EXTEND: 2125 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2126 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2127 2128 case ISD::SIGN_EXTEND_INREG: 2129 // Max of the input and what this extends. 2130 Tmp = 2131 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2132 Tmp = VTBits-Tmp+1; 2133 2134 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2135 return std::max(Tmp, Tmp2); 2136 2137 case ISD::SRA: 2138 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2139 // SRA X, C -> adds C sign bits. 2140 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2141 Tmp += C->getZExtValue(); 2142 if (Tmp > VTBits) Tmp = VTBits; 2143 } 2144 return Tmp; 2145 case ISD::SHL: 2146 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2147 // shl destroys sign bits. 2148 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2149 if (C->getZExtValue() >= VTBits || // Bad shift. 2150 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2151 return Tmp - C->getZExtValue(); 2152 } 2153 break; 2154 case ISD::AND: 2155 case ISD::OR: 2156 case ISD::XOR: // NOT is handled here. 2157 // Logical binary ops preserve the number of sign bits at the worst. 2158 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2159 if (Tmp != 1) { 2160 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2161 FirstAnswer = std::min(Tmp, Tmp2); 2162 // We computed what we know about the sign bits as our first 2163 // answer. Now proceed to the generic code that uses 2164 // ComputeMaskedBits, and pick whichever answer is better. 2165 } 2166 break; 2167 2168 case ISD::SELECT: 2169 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2170 if (Tmp == 1) return 1; // Early out. 2171 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2172 return std::min(Tmp, Tmp2); 2173 2174 case ISD::SADDO: 2175 case ISD::UADDO: 2176 case ISD::SSUBO: 2177 case ISD::USUBO: 2178 case ISD::SMULO: 2179 case ISD::UMULO: 2180 if (Op.getResNo() != 1) 2181 break; 2182 // The boolean result conforms to getBooleanContents. Fall through. 2183 case ISD::SETCC: 2184 // If setcc returns 0/-1, all bits are sign bits. 2185 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2186 TargetLowering::ZeroOrNegativeOneBooleanContent) 2187 return VTBits; 2188 break; 2189 case ISD::ROTL: 2190 case ISD::ROTR: 2191 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2192 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2193 2194 // Handle rotate right by N like a rotate left by 32-N. 2195 if (Op.getOpcode() == ISD::ROTR) 2196 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2197 2198 // If we aren't rotating out all of the known-in sign bits, return the 2199 // number that are left. This handles rotl(sext(x), 1) for example. 2200 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2201 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2202 } 2203 break; 2204 case ISD::ADD: 2205 // Add can have at most one carry bit. Thus we know that the output 2206 // is, at worst, one more bit than the inputs. 2207 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2208 if (Tmp == 1) return 1; // Early out. 2209 2210 // Special case decrementing a value (ADD X, -1): 2211 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2212 if (CRHS->isAllOnesValue()) { 2213 APInt KnownZero, KnownOne; 2214 APInt Mask = APInt::getAllOnesValue(VTBits); 2215 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2216 2217 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2218 // sign bits set. 2219 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2220 return VTBits; 2221 2222 // If we are subtracting one from a positive number, there is no carry 2223 // out of the result. 2224 if (KnownZero.isNegative()) 2225 return Tmp; 2226 } 2227 2228 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2229 if (Tmp2 == 1) return 1; 2230 return std::min(Tmp, Tmp2)-1; 2231 break; 2232 2233 case ISD::SUB: 2234 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2235 if (Tmp2 == 1) return 1; 2236 2237 // Handle NEG. 2238 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2239 if (CLHS->isNullValue()) { 2240 APInt KnownZero, KnownOne; 2241 APInt Mask = APInt::getAllOnesValue(VTBits); 2242 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2243 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2244 // sign bits set. 2245 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2246 return VTBits; 2247 2248 // If the input is known to be positive (the sign bit is known clear), 2249 // the output of the NEG has the same number of sign bits as the input. 2250 if (KnownZero.isNegative()) 2251 return Tmp2; 2252 2253 // Otherwise, we treat this like a SUB. 2254 } 2255 2256 // Sub can have at most one carry bit. Thus we know that the output 2257 // is, at worst, one more bit than the inputs. 2258 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2259 if (Tmp == 1) return 1; // Early out. 2260 return std::min(Tmp, Tmp2)-1; 2261 break; 2262 case ISD::TRUNCATE: 2263 // FIXME: it's tricky to do anything useful for this, but it is an important 2264 // case for targets like X86. 2265 break; 2266 } 2267 2268 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2269 if (Op.getOpcode() == ISD::LOAD) { 2270 LoadSDNode *LD = cast<LoadSDNode>(Op); 2271 unsigned ExtType = LD->getExtensionType(); 2272 switch (ExtType) { 2273 default: break; 2274 case ISD::SEXTLOAD: // '17' bits known 2275 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2276 return VTBits-Tmp+1; 2277 case ISD::ZEXTLOAD: // '16' bits known 2278 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2279 return VTBits-Tmp; 2280 } 2281 } 2282 2283 // Allow the target to implement this method for its nodes. 2284 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2285 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2286 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2287 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2288 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2289 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2290 } 2291 2292 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2293 // use this information. 2294 APInt KnownZero, KnownOne; 2295 APInt Mask = APInt::getAllOnesValue(VTBits); 2296 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2297 2298 if (KnownZero.isNegative()) { // sign bit is 0 2299 Mask = KnownZero; 2300 } else if (KnownOne.isNegative()) { // sign bit is 1; 2301 Mask = KnownOne; 2302 } else { 2303 // Nothing known. 2304 return FirstAnswer; 2305 } 2306 2307 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2308 // the number of identical bits in the top of the input value. 2309 Mask = ~Mask; 2310 Mask <<= Mask.getBitWidth()-VTBits; 2311 // Return # leading zeros. We use 'min' here in case Val was zero before 2312 // shifting. We don't want to return '64' as for an i32 "0". 2313 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2314} 2315 2316/// isBaseWithConstantOffset - Return true if the specified operand is an 2317/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2318/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2319/// semantics as an ADD. This handles the equivalence: 2320/// X|Cst == X+Cst iff X&Cst = 0. 2321bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2322 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2323 !isa<ConstantSDNode>(Op.getOperand(1))) 2324 return false; 2325 2326 if (Op.getOpcode() == ISD::OR && 2327 !MaskedValueIsZero(Op.getOperand(0), 2328 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2329 return false; 2330 2331 return true; 2332} 2333 2334 2335bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2336 // If we're told that NaNs won't happen, assume they won't. 2337 if (NoNaNsFPMath) 2338 return true; 2339 2340 // If the value is a constant, we can obviously see if it is a NaN or not. 2341 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2342 return !C->getValueAPF().isNaN(); 2343 2344 // TODO: Recognize more cases here. 2345 2346 return false; 2347} 2348 2349bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2350 // If the value is a constant, we can obviously see if it is a zero or not. 2351 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2352 return !C->isZero(); 2353 2354 // TODO: Recognize more cases here. 2355 switch (Op.getOpcode()) { 2356 default: break; 2357 case ISD::OR: 2358 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2359 return !C->isNullValue(); 2360 break; 2361 } 2362 2363 return false; 2364} 2365 2366bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2367 // Check the obvious case. 2368 if (A == B) return true; 2369 2370 // For for negative and positive zero. 2371 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2372 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2373 if (CA->isZero() && CB->isZero()) return true; 2374 2375 // Otherwise they may not be equal. 2376 return false; 2377} 2378 2379/// getNode - Gets or creates the specified node. 2380/// 2381SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2382 FoldingSetNodeID ID; 2383 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2384 void *IP = 0; 2385 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2386 return SDValue(E, 0); 2387 2388 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2389 CSEMap.InsertNode(N, IP); 2390 2391 AllNodes.push_back(N); 2392#ifndef NDEBUG 2393 VerifySDNode(N); 2394#endif 2395 return SDValue(N, 0); 2396} 2397 2398SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2399 EVT VT, SDValue Operand) { 2400 // Constant fold unary operations with an integer constant operand. 2401 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2402 const APInt &Val = C->getAPIntValue(); 2403 switch (Opcode) { 2404 default: break; 2405 case ISD::SIGN_EXTEND: 2406 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2407 case ISD::ANY_EXTEND: 2408 case ISD::ZERO_EXTEND: 2409 case ISD::TRUNCATE: 2410 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2411 case ISD::UINT_TO_FP: 2412 case ISD::SINT_TO_FP: { 2413 // No compile time operations on ppcf128. 2414 if (VT == MVT::ppcf128) break; 2415 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2416 (void)apf.convertFromAPInt(Val, 2417 Opcode==ISD::SINT_TO_FP, 2418 APFloat::rmNearestTiesToEven); 2419 return getConstantFP(apf, VT); 2420 } 2421 case ISD::BITCAST: 2422 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2423 return getConstantFP(Val.bitsToFloat(), VT); 2424 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2425 return getConstantFP(Val.bitsToDouble(), VT); 2426 break; 2427 case ISD::BSWAP: 2428 return getConstant(Val.byteSwap(), VT); 2429 case ISD::CTPOP: 2430 return getConstant(Val.countPopulation(), VT); 2431 case ISD::CTLZ: 2432 return getConstant(Val.countLeadingZeros(), VT); 2433 case ISD::CTTZ: 2434 return getConstant(Val.countTrailingZeros(), VT); 2435 } 2436 } 2437 2438 // Constant fold unary operations with a floating point constant operand. 2439 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2440 APFloat V = C->getValueAPF(); // make copy 2441 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2442 switch (Opcode) { 2443 case ISD::FNEG: 2444 V.changeSign(); 2445 return getConstantFP(V, VT); 2446 case ISD::FABS: 2447 V.clearSign(); 2448 return getConstantFP(V, VT); 2449 case ISD::FP_ROUND: 2450 case ISD::FP_EXTEND: { 2451 bool ignored; 2452 // This can return overflow, underflow, or inexact; we don't care. 2453 // FIXME need to be more flexible about rounding mode. 2454 (void)V.convert(*EVTToAPFloatSemantics(VT), 2455 APFloat::rmNearestTiesToEven, &ignored); 2456 return getConstantFP(V, VT); 2457 } 2458 case ISD::FP_TO_SINT: 2459 case ISD::FP_TO_UINT: { 2460 integerPart x[2]; 2461 bool ignored; 2462 assert(integerPartWidth >= 64); 2463 // FIXME need to be more flexible about rounding mode. 2464 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2465 Opcode==ISD::FP_TO_SINT, 2466 APFloat::rmTowardZero, &ignored); 2467 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2468 break; 2469 APInt api(VT.getSizeInBits(), x); 2470 return getConstant(api, VT); 2471 } 2472 case ISD::BITCAST: 2473 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2474 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2475 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2476 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2477 break; 2478 } 2479 } 2480 } 2481 2482 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2483 switch (Opcode) { 2484 case ISD::TokenFactor: 2485 case ISD::MERGE_VALUES: 2486 case ISD::CONCAT_VECTORS: 2487 return Operand; // Factor, merge or concat of one node? No need. 2488 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2489 case ISD::FP_EXTEND: 2490 assert(VT.isFloatingPoint() && 2491 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2492 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2493 assert((!VT.isVector() || 2494 VT.getVectorNumElements() == 2495 Operand.getValueType().getVectorNumElements()) && 2496 "Vector element count mismatch!"); 2497 if (Operand.getOpcode() == ISD::UNDEF) 2498 return getUNDEF(VT); 2499 break; 2500 case ISD::SIGN_EXTEND: 2501 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2502 "Invalid SIGN_EXTEND!"); 2503 if (Operand.getValueType() == VT) return Operand; // noop extension 2504 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2505 "Invalid sext node, dst < src!"); 2506 assert((!VT.isVector() || 2507 VT.getVectorNumElements() == 2508 Operand.getValueType().getVectorNumElements()) && 2509 "Vector element count mismatch!"); 2510 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2511 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2512 else if (OpOpcode == ISD::UNDEF) 2513 // sext(undef) = 0, because the top bits will all be the same. 2514 return getConstant(0, VT); 2515 break; 2516 case ISD::ZERO_EXTEND: 2517 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2518 "Invalid ZERO_EXTEND!"); 2519 if (Operand.getValueType() == VT) return Operand; // noop extension 2520 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2521 "Invalid zext node, dst < src!"); 2522 assert((!VT.isVector() || 2523 VT.getVectorNumElements() == 2524 Operand.getValueType().getVectorNumElements()) && 2525 "Vector element count mismatch!"); 2526 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2527 return getNode(ISD::ZERO_EXTEND, DL, VT, 2528 Operand.getNode()->getOperand(0)); 2529 else if (OpOpcode == ISD::UNDEF) 2530 // zext(undef) = 0, because the top bits will be zero. 2531 return getConstant(0, VT); 2532 break; 2533 case ISD::ANY_EXTEND: 2534 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2535 "Invalid ANY_EXTEND!"); 2536 if (Operand.getValueType() == VT) return Operand; // noop extension 2537 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2538 "Invalid anyext node, dst < src!"); 2539 assert((!VT.isVector() || 2540 VT.getVectorNumElements() == 2541 Operand.getValueType().getVectorNumElements()) && 2542 "Vector element count mismatch!"); 2543 2544 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2545 OpOpcode == ISD::ANY_EXTEND) 2546 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2547 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2548 else if (OpOpcode == ISD::UNDEF) 2549 return getUNDEF(VT); 2550 2551 // (ext (trunx x)) -> x 2552 if (OpOpcode == ISD::TRUNCATE) { 2553 SDValue OpOp = Operand.getNode()->getOperand(0); 2554 if (OpOp.getValueType() == VT) 2555 return OpOp; 2556 } 2557 break; 2558 case ISD::TRUNCATE: 2559 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2560 "Invalid TRUNCATE!"); 2561 if (Operand.getValueType() == VT) return Operand; // noop truncate 2562 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2563 "Invalid truncate node, src < dst!"); 2564 assert((!VT.isVector() || 2565 VT.getVectorNumElements() == 2566 Operand.getValueType().getVectorNumElements()) && 2567 "Vector element count mismatch!"); 2568 if (OpOpcode == ISD::TRUNCATE) 2569 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2570 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2571 OpOpcode == ISD::ANY_EXTEND) { 2572 // If the source is smaller than the dest, we still need an extend. 2573 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2574 .bitsLT(VT.getScalarType())) 2575 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2576 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2577 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2578 else 2579 return Operand.getNode()->getOperand(0); 2580 } 2581 break; 2582 case ISD::BITCAST: 2583 // Basic sanity checking. 2584 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2585 && "Cannot BITCAST between types of different sizes!"); 2586 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2587 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2588 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2589 if (OpOpcode == ISD::UNDEF) 2590 return getUNDEF(VT); 2591 break; 2592 case ISD::SCALAR_TO_VECTOR: 2593 assert(VT.isVector() && !Operand.getValueType().isVector() && 2594 (VT.getVectorElementType() == Operand.getValueType() || 2595 (VT.getVectorElementType().isInteger() && 2596 Operand.getValueType().isInteger() && 2597 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2598 "Illegal SCALAR_TO_VECTOR node!"); 2599 if (OpOpcode == ISD::UNDEF) 2600 return getUNDEF(VT); 2601 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2602 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2603 isa<ConstantSDNode>(Operand.getOperand(1)) && 2604 Operand.getConstantOperandVal(1) == 0 && 2605 Operand.getOperand(0).getValueType() == VT) 2606 return Operand.getOperand(0); 2607 break; 2608 case ISD::FNEG: 2609 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2610 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2611 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2612 Operand.getNode()->getOperand(0)); 2613 if (OpOpcode == ISD::FNEG) // --X -> X 2614 return Operand.getNode()->getOperand(0); 2615 break; 2616 case ISD::FABS: 2617 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2618 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2619 break; 2620 } 2621 2622 SDNode *N; 2623 SDVTList VTs = getVTList(VT); 2624 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2625 FoldingSetNodeID ID; 2626 SDValue Ops[1] = { Operand }; 2627 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2628 void *IP = 0; 2629 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2630 return SDValue(E, 0); 2631 2632 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2633 CSEMap.InsertNode(N, IP); 2634 } else { 2635 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2636 } 2637 2638 AllNodes.push_back(N); 2639#ifndef NDEBUG 2640 VerifySDNode(N); 2641#endif 2642 return SDValue(N, 0); 2643} 2644 2645SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2646 EVT VT, 2647 ConstantSDNode *Cst1, 2648 ConstantSDNode *Cst2) { 2649 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2650 2651 switch (Opcode) { 2652 case ISD::ADD: return getConstant(C1 + C2, VT); 2653 case ISD::SUB: return getConstant(C1 - C2, VT); 2654 case ISD::MUL: return getConstant(C1 * C2, VT); 2655 case ISD::UDIV: 2656 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2657 break; 2658 case ISD::UREM: 2659 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2660 break; 2661 case ISD::SDIV: 2662 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2663 break; 2664 case ISD::SREM: 2665 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2666 break; 2667 case ISD::AND: return getConstant(C1 & C2, VT); 2668 case ISD::OR: return getConstant(C1 | C2, VT); 2669 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2670 case ISD::SHL: return getConstant(C1 << C2, VT); 2671 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2672 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2673 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2674 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2675 default: break; 2676 } 2677 2678 return SDValue(); 2679} 2680 2681SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2682 SDValue N1, SDValue N2) { 2683 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2684 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2685 switch (Opcode) { 2686 default: break; 2687 case ISD::TokenFactor: 2688 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2689 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2690 // Fold trivial token factors. 2691 if (N1.getOpcode() == ISD::EntryToken) return N2; 2692 if (N2.getOpcode() == ISD::EntryToken) return N1; 2693 if (N1 == N2) return N1; 2694 break; 2695 case ISD::CONCAT_VECTORS: 2696 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2697 // one big BUILD_VECTOR. 2698 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2699 N2.getOpcode() == ISD::BUILD_VECTOR) { 2700 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2701 N1.getNode()->op_end()); 2702 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2703 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2704 } 2705 break; 2706 case ISD::AND: 2707 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2708 assert(N1.getValueType() == N2.getValueType() && 2709 N1.getValueType() == VT && "Binary operator types must match!"); 2710 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2711 // worth handling here. 2712 if (N2C && N2C->isNullValue()) 2713 return N2; 2714 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2715 return N1; 2716 break; 2717 case ISD::OR: 2718 case ISD::XOR: 2719 case ISD::ADD: 2720 case ISD::SUB: 2721 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2722 assert(N1.getValueType() == N2.getValueType() && 2723 N1.getValueType() == VT && "Binary operator types must match!"); 2724 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2725 // it's worth handling here. 2726 if (N2C && N2C->isNullValue()) 2727 return N1; 2728 break; 2729 case ISD::UDIV: 2730 case ISD::UREM: 2731 case ISD::MULHU: 2732 case ISD::MULHS: 2733 case ISD::MUL: 2734 case ISD::SDIV: 2735 case ISD::SREM: 2736 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2737 assert(N1.getValueType() == N2.getValueType() && 2738 N1.getValueType() == VT && "Binary operator types must match!"); 2739 break; 2740 case ISD::FADD: 2741 case ISD::FSUB: 2742 case ISD::FMUL: 2743 case ISD::FDIV: 2744 case ISD::FREM: 2745 if (UnsafeFPMath) { 2746 if (Opcode == ISD::FADD) { 2747 // 0+x --> x 2748 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2749 if (CFP->getValueAPF().isZero()) 2750 return N2; 2751 // x+0 --> x 2752 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2753 if (CFP->getValueAPF().isZero()) 2754 return N1; 2755 } else if (Opcode == ISD::FSUB) { 2756 // x-0 --> x 2757 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2758 if (CFP->getValueAPF().isZero()) 2759 return N1; 2760 } 2761 } 2762 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2763 assert(N1.getValueType() == N2.getValueType() && 2764 N1.getValueType() == VT && "Binary operator types must match!"); 2765 break; 2766 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2767 assert(N1.getValueType() == VT && 2768 N1.getValueType().isFloatingPoint() && 2769 N2.getValueType().isFloatingPoint() && 2770 "Invalid FCOPYSIGN!"); 2771 break; 2772 case ISD::SHL: 2773 case ISD::SRA: 2774 case ISD::SRL: 2775 case ISD::ROTL: 2776 case ISD::ROTR: 2777 assert(VT == N1.getValueType() && 2778 "Shift operators return type must be the same as their first arg"); 2779 assert(VT.isInteger() && N2.getValueType().isInteger() && 2780 "Shifts only work on integers"); 2781 // Verify that the shift amount VT is bit enough to hold valid shift 2782 // amounts. This catches things like trying to shift an i1024 value by an 2783 // i8, which is easy to fall into in generic code that uses 2784 // TLI.getShiftAmount(). 2785 assert(N2.getValueType().getSizeInBits() >= 2786 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2787 "Invalid use of small shift amount with oversized value!"); 2788 2789 // Always fold shifts of i1 values so the code generator doesn't need to 2790 // handle them. Since we know the size of the shift has to be less than the 2791 // size of the value, the shift/rotate count is guaranteed to be zero. 2792 if (VT == MVT::i1) 2793 return N1; 2794 if (N2C && N2C->isNullValue()) 2795 return N1; 2796 break; 2797 case ISD::FP_ROUND_INREG: { 2798 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2799 assert(VT == N1.getValueType() && "Not an inreg round!"); 2800 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2801 "Cannot FP_ROUND_INREG integer types"); 2802 assert(EVT.isVector() == VT.isVector() && 2803 "FP_ROUND_INREG type should be vector iff the operand " 2804 "type is vector!"); 2805 assert((!EVT.isVector() || 2806 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2807 "Vector element counts must match in FP_ROUND_INREG"); 2808 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2809 (void)EVT; 2810 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2811 break; 2812 } 2813 case ISD::FP_ROUND: 2814 assert(VT.isFloatingPoint() && 2815 N1.getValueType().isFloatingPoint() && 2816 VT.bitsLE(N1.getValueType()) && 2817 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2818 if (N1.getValueType() == VT) return N1; // noop conversion. 2819 break; 2820 case ISD::AssertSext: 2821 case ISD::AssertZext: { 2822 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2823 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2824 assert(VT.isInteger() && EVT.isInteger() && 2825 "Cannot *_EXTEND_INREG FP types"); 2826 assert(!EVT.isVector() && 2827 "AssertSExt/AssertZExt type should be the vector element type " 2828 "rather than the vector type!"); 2829 assert(EVT.bitsLE(VT) && "Not extending!"); 2830 if (VT == EVT) return N1; // noop assertion. 2831 break; 2832 } 2833 case ISD::SIGN_EXTEND_INREG: { 2834 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2835 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2836 assert(VT.isInteger() && EVT.isInteger() && 2837 "Cannot *_EXTEND_INREG FP types"); 2838 assert(EVT.isVector() == VT.isVector() && 2839 "SIGN_EXTEND_INREG type should be vector iff the operand " 2840 "type is vector!"); 2841 assert((!EVT.isVector() || 2842 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2843 "Vector element counts must match in SIGN_EXTEND_INREG"); 2844 assert(EVT.bitsLE(VT) && "Not extending!"); 2845 if (EVT == VT) return N1; // Not actually extending 2846 2847 if (N1C) { 2848 APInt Val = N1C->getAPIntValue(); 2849 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2850 Val <<= Val.getBitWidth()-FromBits; 2851 Val = Val.ashr(Val.getBitWidth()-FromBits); 2852 return getConstant(Val, VT); 2853 } 2854 break; 2855 } 2856 case ISD::EXTRACT_VECTOR_ELT: 2857 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2858 if (N1.getOpcode() == ISD::UNDEF) 2859 return getUNDEF(VT); 2860 2861 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2862 // expanding copies of large vectors from registers. 2863 if (N2C && 2864 N1.getOpcode() == ISD::CONCAT_VECTORS && 2865 N1.getNumOperands() > 0) { 2866 unsigned Factor = 2867 N1.getOperand(0).getValueType().getVectorNumElements(); 2868 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2869 N1.getOperand(N2C->getZExtValue() / Factor), 2870 getConstant(N2C->getZExtValue() % Factor, 2871 N2.getValueType())); 2872 } 2873 2874 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2875 // expanding large vector constants. 2876 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2877 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2878 EVT VEltTy = N1.getValueType().getVectorElementType(); 2879 if (Elt.getValueType() != VEltTy) { 2880 // If the vector element type is not legal, the BUILD_VECTOR operands 2881 // are promoted and implicitly truncated. Make that explicit here. 2882 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2883 } 2884 if (VT != VEltTy) { 2885 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2886 // result is implicitly extended. 2887 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2888 } 2889 return Elt; 2890 } 2891 2892 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2893 // operations are lowered to scalars. 2894 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2895 // If the indices are the same, return the inserted element else 2896 // if the indices are known different, extract the element from 2897 // the original vector. 2898 SDValue N1Op2 = N1.getOperand(2); 2899 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2900 2901 if (N1Op2C && N2C) { 2902 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2903 if (VT == N1.getOperand(1).getValueType()) 2904 return N1.getOperand(1); 2905 else 2906 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2907 } 2908 2909 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2910 } 2911 } 2912 break; 2913 case ISD::EXTRACT_ELEMENT: 2914 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2915 assert(!N1.getValueType().isVector() && !VT.isVector() && 2916 (N1.getValueType().isInteger() == VT.isInteger()) && 2917 N1.getValueType() != VT && 2918 "Wrong types for EXTRACT_ELEMENT!"); 2919 2920 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2921 // 64-bit integers into 32-bit parts. Instead of building the extract of 2922 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2923 if (N1.getOpcode() == ISD::BUILD_PAIR) 2924 return N1.getOperand(N2C->getZExtValue()); 2925 2926 // EXTRACT_ELEMENT of a constant int is also very common. 2927 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2928 unsigned ElementSize = VT.getSizeInBits(); 2929 unsigned Shift = ElementSize * N2C->getZExtValue(); 2930 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2931 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2932 } 2933 break; 2934 case ISD::EXTRACT_SUBVECTOR: { 2935 SDValue Index = N2; 2936 if (VT.isSimple() && N1.getValueType().isSimple()) { 2937 assert(VT.isVector() && N1.getValueType().isVector() && 2938 "Extract subvector VTs must be a vectors!"); 2939 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2940 "Extract subvector VTs must have the same element type!"); 2941 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2942 "Extract subvector must be from larger vector to smaller vector!"); 2943 2944 if (isa<ConstantSDNode>(Index.getNode())) { 2945 assert((VT.getVectorNumElements() + 2946 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2947 <= N1.getValueType().getVectorNumElements()) 2948 && "Extract subvector overflow!"); 2949 } 2950 2951 // Trivial extraction. 2952 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2953 return N1; 2954 } 2955 break; 2956 } 2957 } 2958 2959 if (N1C) { 2960 if (N2C) { 2961 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2962 if (SV.getNode()) return SV; 2963 } else { // Cannonicalize constant to RHS if commutative 2964 if (isCommutativeBinOp(Opcode)) { 2965 std::swap(N1C, N2C); 2966 std::swap(N1, N2); 2967 } 2968 } 2969 } 2970 2971 // Constant fold FP operations. 2972 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2973 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2974 if (N1CFP) { 2975 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2976 // Cannonicalize constant to RHS if commutative 2977 std::swap(N1CFP, N2CFP); 2978 std::swap(N1, N2); 2979 } else if (N2CFP && VT != MVT::ppcf128) { 2980 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2981 APFloat::opStatus s; 2982 switch (Opcode) { 2983 case ISD::FADD: 2984 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2985 if (s != APFloat::opInvalidOp) 2986 return getConstantFP(V1, VT); 2987 break; 2988 case ISD::FSUB: 2989 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2990 if (s!=APFloat::opInvalidOp) 2991 return getConstantFP(V1, VT); 2992 break; 2993 case ISD::FMUL: 2994 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2995 if (s!=APFloat::opInvalidOp) 2996 return getConstantFP(V1, VT); 2997 break; 2998 case ISD::FDIV: 2999 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3000 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3001 return getConstantFP(V1, VT); 3002 break; 3003 case ISD::FREM : 3004 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3005 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3006 return getConstantFP(V1, VT); 3007 break; 3008 case ISD::FCOPYSIGN: 3009 V1.copySign(V2); 3010 return getConstantFP(V1, VT); 3011 default: break; 3012 } 3013 } 3014 } 3015 3016 // Canonicalize an UNDEF to the RHS, even over a constant. 3017 if (N1.getOpcode() == ISD::UNDEF) { 3018 if (isCommutativeBinOp(Opcode)) { 3019 std::swap(N1, N2); 3020 } else { 3021 switch (Opcode) { 3022 case ISD::FP_ROUND_INREG: 3023 case ISD::SIGN_EXTEND_INREG: 3024 case ISD::SUB: 3025 case ISD::FSUB: 3026 case ISD::FDIV: 3027 case ISD::FREM: 3028 case ISD::SRA: 3029 return N1; // fold op(undef, arg2) -> undef 3030 case ISD::UDIV: 3031 case ISD::SDIV: 3032 case ISD::UREM: 3033 case ISD::SREM: 3034 case ISD::SRL: 3035 case ISD::SHL: 3036 if (!VT.isVector()) 3037 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3038 // For vectors, we can't easily build an all zero vector, just return 3039 // the LHS. 3040 return N2; 3041 } 3042 } 3043 } 3044 3045 // Fold a bunch of operators when the RHS is undef. 3046 if (N2.getOpcode() == ISD::UNDEF) { 3047 switch (Opcode) { 3048 case ISD::XOR: 3049 if (N1.getOpcode() == ISD::UNDEF) 3050 // Handle undef ^ undef -> 0 special case. This is a common 3051 // idiom (misuse). 3052 return getConstant(0, VT); 3053 // fallthrough 3054 case ISD::ADD: 3055 case ISD::ADDC: 3056 case ISD::ADDE: 3057 case ISD::SUB: 3058 case ISD::UDIV: 3059 case ISD::SDIV: 3060 case ISD::UREM: 3061 case ISD::SREM: 3062 return N2; // fold op(arg1, undef) -> undef 3063 case ISD::FADD: 3064 case ISD::FSUB: 3065 case ISD::FMUL: 3066 case ISD::FDIV: 3067 case ISD::FREM: 3068 if (UnsafeFPMath) 3069 return N2; 3070 break; 3071 case ISD::MUL: 3072 case ISD::AND: 3073 case ISD::SRL: 3074 case ISD::SHL: 3075 if (!VT.isVector()) 3076 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3077 // For vectors, we can't easily build an all zero vector, just return 3078 // the LHS. 3079 return N1; 3080 case ISD::OR: 3081 if (!VT.isVector()) 3082 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3083 // For vectors, we can't easily build an all one vector, just return 3084 // the LHS. 3085 return N1; 3086 case ISD::SRA: 3087 return N1; 3088 } 3089 } 3090 3091 // Memoize this node if possible. 3092 SDNode *N; 3093 SDVTList VTs = getVTList(VT); 3094 if (VT != MVT::Glue) { 3095 SDValue Ops[] = { N1, N2 }; 3096 FoldingSetNodeID ID; 3097 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3098 void *IP = 0; 3099 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3100 return SDValue(E, 0); 3101 3102 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3103 CSEMap.InsertNode(N, IP); 3104 } else { 3105 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3106 } 3107 3108 AllNodes.push_back(N); 3109#ifndef NDEBUG 3110 VerifySDNode(N); 3111#endif 3112 return SDValue(N, 0); 3113} 3114 3115SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3116 SDValue N1, SDValue N2, SDValue N3) { 3117 // Perform various simplifications. 3118 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3119 switch (Opcode) { 3120 case ISD::CONCAT_VECTORS: 3121 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3122 // one big BUILD_VECTOR. 3123 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3124 N2.getOpcode() == ISD::BUILD_VECTOR && 3125 N3.getOpcode() == ISD::BUILD_VECTOR) { 3126 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3127 N1.getNode()->op_end()); 3128 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3129 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3130 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3131 } 3132 break; 3133 case ISD::SETCC: { 3134 // Use FoldSetCC to simplify SETCC's. 3135 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3136 if (Simp.getNode()) return Simp; 3137 break; 3138 } 3139 case ISD::SELECT: 3140 if (N1C) { 3141 if (N1C->getZExtValue()) 3142 return N2; // select true, X, Y -> X 3143 else 3144 return N3; // select false, X, Y -> Y 3145 } 3146 3147 if (N2 == N3) return N2; // select C, X, X -> X 3148 break; 3149 case ISD::VECTOR_SHUFFLE: 3150 llvm_unreachable("should use getVectorShuffle constructor!"); 3151 break; 3152 case ISD::INSERT_SUBVECTOR: { 3153 SDValue Index = N3; 3154 if (VT.isSimple() && N1.getValueType().isSimple() 3155 && N2.getValueType().isSimple()) { 3156 assert(VT.isVector() && N1.getValueType().isVector() && 3157 N2.getValueType().isVector() && 3158 "Insert subvector VTs must be a vectors"); 3159 assert(VT == N1.getValueType() && 3160 "Dest and insert subvector source types must match!"); 3161 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3162 "Insert subvector must be from smaller vector to larger vector!"); 3163 if (isa<ConstantSDNode>(Index.getNode())) { 3164 assert((N2.getValueType().getVectorNumElements() + 3165 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3166 <= VT.getVectorNumElements()) 3167 && "Insert subvector overflow!"); 3168 } 3169 3170 // Trivial insertion. 3171 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3172 return N2; 3173 } 3174 break; 3175 } 3176 case ISD::BITCAST: 3177 // Fold bit_convert nodes from a type to themselves. 3178 if (N1.getValueType() == VT) 3179 return N1; 3180 break; 3181 } 3182 3183 // Memoize node if it doesn't produce a flag. 3184 SDNode *N; 3185 SDVTList VTs = getVTList(VT); 3186 if (VT != MVT::Glue) { 3187 SDValue Ops[] = { N1, N2, N3 }; 3188 FoldingSetNodeID ID; 3189 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3190 void *IP = 0; 3191 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3192 return SDValue(E, 0); 3193 3194 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3195 CSEMap.InsertNode(N, IP); 3196 } else { 3197 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3198 } 3199 3200 AllNodes.push_back(N); 3201#ifndef NDEBUG 3202 VerifySDNode(N); 3203#endif 3204 return SDValue(N, 0); 3205} 3206 3207SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3208 SDValue N1, SDValue N2, SDValue N3, 3209 SDValue N4) { 3210 SDValue Ops[] = { N1, N2, N3, N4 }; 3211 return getNode(Opcode, DL, VT, Ops, 4); 3212} 3213 3214SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3215 SDValue N1, SDValue N2, SDValue N3, 3216 SDValue N4, SDValue N5) { 3217 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3218 return getNode(Opcode, DL, VT, Ops, 5); 3219} 3220 3221/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3222/// the incoming stack arguments to be loaded from the stack. 3223SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3224 SmallVector<SDValue, 8> ArgChains; 3225 3226 // Include the original chain at the beginning of the list. When this is 3227 // used by target LowerCall hooks, this helps legalize find the 3228 // CALLSEQ_BEGIN node. 3229 ArgChains.push_back(Chain); 3230 3231 // Add a chain value for each stack argument. 3232 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3233 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3234 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3235 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3236 if (FI->getIndex() < 0) 3237 ArgChains.push_back(SDValue(L, 1)); 3238 3239 // Build a tokenfactor for all the chains. 3240 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3241 &ArgChains[0], ArgChains.size()); 3242} 3243 3244/// SplatByte - Distribute ByteVal over NumBits bits. 3245static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3246 APInt Val = APInt(NumBits, ByteVal); 3247 unsigned Shift = 8; 3248 for (unsigned i = NumBits; i > 8; i >>= 1) { 3249 Val = (Val << Shift) | Val; 3250 Shift <<= 1; 3251 } 3252 return Val; 3253} 3254 3255/// getMemsetValue - Vectorized representation of the memset value 3256/// operand. 3257static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3258 DebugLoc dl) { 3259 assert(Value.getOpcode() != ISD::UNDEF); 3260 3261 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3262 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3263 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3264 if (VT.isInteger()) 3265 return DAG.getConstant(Val, VT); 3266 return DAG.getConstantFP(APFloat(Val), VT); 3267 } 3268 3269 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3270 if (NumBits > 8) { 3271 // Use a multiplication with 0x010101... to extend the input to the 3272 // required length. 3273 APInt Magic = SplatByte(NumBits, 0x01); 3274 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3275 } 3276 3277 return Value; 3278} 3279 3280/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3281/// used when a memcpy is turned into a memset when the source is a constant 3282/// string ptr. 3283static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3284 const TargetLowering &TLI, 3285 std::string &Str, unsigned Offset) { 3286 // Handle vector with all elements zero. 3287 if (Str.empty()) { 3288 if (VT.isInteger()) 3289 return DAG.getConstant(0, VT); 3290 else if (VT == MVT::f32 || VT == MVT::f64) 3291 return DAG.getConstantFP(0.0, VT); 3292 else if (VT.isVector()) { 3293 unsigned NumElts = VT.getVectorNumElements(); 3294 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3295 return DAG.getNode(ISD::BITCAST, dl, VT, 3296 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3297 EltVT, NumElts))); 3298 } else 3299 llvm_unreachable("Expected type!"); 3300 } 3301 3302 assert(!VT.isVector() && "Can't handle vector type here!"); 3303 unsigned NumBits = VT.getSizeInBits(); 3304 unsigned MSB = NumBits / 8; 3305 uint64_t Val = 0; 3306 if (TLI.isLittleEndian()) 3307 Offset = Offset + MSB - 1; 3308 for (unsigned i = 0; i != MSB; ++i) { 3309 Val = (Val << 8) | (unsigned char)Str[Offset]; 3310 Offset += TLI.isLittleEndian() ? -1 : 1; 3311 } 3312 return DAG.getConstant(Val, VT); 3313} 3314 3315/// getMemBasePlusOffset - Returns base and offset node for the 3316/// 3317static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3318 SelectionDAG &DAG) { 3319 EVT VT = Base.getValueType(); 3320 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3321 VT, Base, DAG.getConstant(Offset, VT)); 3322} 3323 3324/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3325/// 3326static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3327 unsigned SrcDelta = 0; 3328 GlobalAddressSDNode *G = NULL; 3329 if (Src.getOpcode() == ISD::GlobalAddress) 3330 G = cast<GlobalAddressSDNode>(Src); 3331 else if (Src.getOpcode() == ISD::ADD && 3332 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3333 Src.getOperand(1).getOpcode() == ISD::Constant) { 3334 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3335 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3336 } 3337 if (!G) 3338 return false; 3339 3340 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3341 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3342 return true; 3343 3344 return false; 3345} 3346 3347/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3348/// to replace the memset / memcpy. Return true if the number of memory ops 3349/// is below the threshold. It returns the types of the sequence of 3350/// memory ops to perform memset / memcpy by reference. 3351static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3352 unsigned Limit, uint64_t Size, 3353 unsigned DstAlign, unsigned SrcAlign, 3354 bool IsZeroVal, 3355 bool MemcpyStrSrc, 3356 SelectionDAG &DAG, 3357 const TargetLowering &TLI) { 3358 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3359 "Expecting memcpy / memset source to meet alignment requirement!"); 3360 // If 'SrcAlign' is zero, that means the memory operation does not need to 3361 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3362 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3363 // is the specified alignment of the memory operation. If it is zero, that 3364 // means it's possible to change the alignment of the destination. 3365 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3366 // not need to be loaded. 3367 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3368 IsZeroVal, MemcpyStrSrc, 3369 DAG.getMachineFunction()); 3370 3371 if (VT == MVT::Other) { 3372 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3373 TLI.allowsUnalignedMemoryAccesses(VT)) { 3374 VT = TLI.getPointerTy(); 3375 } else { 3376 switch (DstAlign & 7) { 3377 case 0: VT = MVT::i64; break; 3378 case 4: VT = MVT::i32; break; 3379 case 2: VT = MVT::i16; break; 3380 default: VT = MVT::i8; break; 3381 } 3382 } 3383 3384 MVT LVT = MVT::i64; 3385 while (!TLI.isTypeLegal(LVT)) 3386 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3387 assert(LVT.isInteger()); 3388 3389 if (VT.bitsGT(LVT)) 3390 VT = LVT; 3391 } 3392 3393 unsigned NumMemOps = 0; 3394 while (Size != 0) { 3395 unsigned VTSize = VT.getSizeInBits() / 8; 3396 while (VTSize > Size) { 3397 // For now, only use non-vector load / store's for the left-over pieces. 3398 if (VT.isVector() || VT.isFloatingPoint()) { 3399 VT = MVT::i64; 3400 while (!TLI.isTypeLegal(VT)) 3401 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3402 VTSize = VT.getSizeInBits() / 8; 3403 } else { 3404 // This can result in a type that is not legal on the target, e.g. 3405 // 1 or 2 bytes on PPC. 3406 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3407 VTSize >>= 1; 3408 } 3409 } 3410 3411 if (++NumMemOps > Limit) 3412 return false; 3413 MemOps.push_back(VT); 3414 Size -= VTSize; 3415 } 3416 3417 return true; 3418} 3419 3420static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3421 SDValue Chain, SDValue Dst, 3422 SDValue Src, uint64_t Size, 3423 unsigned Align, bool isVol, 3424 bool AlwaysInline, 3425 MachinePointerInfo DstPtrInfo, 3426 MachinePointerInfo SrcPtrInfo) { 3427 // Turn a memcpy of undef to nop. 3428 if (Src.getOpcode() == ISD::UNDEF) 3429 return Chain; 3430 3431 // Expand memcpy to a series of load and store ops if the size operand falls 3432 // below a certain threshold. 3433 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3434 // rather than maybe a humongous number of loads and stores. 3435 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3436 std::vector<EVT> MemOps; 3437 bool DstAlignCanChange = false; 3438 MachineFunction &MF = DAG.getMachineFunction(); 3439 MachineFrameInfo *MFI = MF.getFrameInfo(); 3440 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3441 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3442 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3443 DstAlignCanChange = true; 3444 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3445 if (Align > SrcAlign) 3446 SrcAlign = Align; 3447 std::string Str; 3448 bool CopyFromStr = isMemSrcFromString(Src, Str); 3449 bool isZeroStr = CopyFromStr && Str.empty(); 3450 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3451 3452 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3453 (DstAlignCanChange ? 0 : Align), 3454 (isZeroStr ? 0 : SrcAlign), 3455 true, CopyFromStr, DAG, TLI)) 3456 return SDValue(); 3457 3458 if (DstAlignCanChange) { 3459 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3460 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3461 if (NewAlign > Align) { 3462 // Give the stack frame object a larger alignment if needed. 3463 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3464 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3465 Align = NewAlign; 3466 } 3467 } 3468 3469 SmallVector<SDValue, 8> OutChains; 3470 unsigned NumMemOps = MemOps.size(); 3471 uint64_t SrcOff = 0, DstOff = 0; 3472 for (unsigned i = 0; i != NumMemOps; ++i) { 3473 EVT VT = MemOps[i]; 3474 unsigned VTSize = VT.getSizeInBits() / 8; 3475 SDValue Value, Store; 3476 3477 if (CopyFromStr && 3478 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3479 // It's unlikely a store of a vector immediate can be done in a single 3480 // instruction. It would require a load from a constantpool first. 3481 // We only handle zero vectors here. 3482 // FIXME: Handle other cases where store of vector immediate is done in 3483 // a single instruction. 3484 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3485 Store = DAG.getStore(Chain, dl, Value, 3486 getMemBasePlusOffset(Dst, DstOff, DAG), 3487 DstPtrInfo.getWithOffset(DstOff), isVol, 3488 false, Align); 3489 } else { 3490 // The type might not be legal for the target. This should only happen 3491 // if the type is smaller than a legal type, as on PPC, so the right 3492 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3493 // to Load/Store if NVT==VT. 3494 // FIXME does the case above also need this? 3495 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3496 assert(NVT.bitsGE(VT)); 3497 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3498 getMemBasePlusOffset(Src, SrcOff, DAG), 3499 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3500 MinAlign(SrcAlign, SrcOff)); 3501 Store = DAG.getTruncStore(Chain, dl, Value, 3502 getMemBasePlusOffset(Dst, DstOff, DAG), 3503 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3504 false, Align); 3505 } 3506 OutChains.push_back(Store); 3507 SrcOff += VTSize; 3508 DstOff += VTSize; 3509 } 3510 3511 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3512 &OutChains[0], OutChains.size()); 3513} 3514 3515static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3516 SDValue Chain, SDValue Dst, 3517 SDValue Src, uint64_t Size, 3518 unsigned Align, bool isVol, 3519 bool AlwaysInline, 3520 MachinePointerInfo DstPtrInfo, 3521 MachinePointerInfo SrcPtrInfo) { 3522 // Turn a memmove of undef to nop. 3523 if (Src.getOpcode() == ISD::UNDEF) 3524 return Chain; 3525 3526 // Expand memmove to a series of load and store ops if the size operand falls 3527 // below a certain threshold. 3528 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3529 std::vector<EVT> MemOps; 3530 bool DstAlignCanChange = false; 3531 MachineFunction &MF = DAG.getMachineFunction(); 3532 MachineFrameInfo *MFI = MF.getFrameInfo(); 3533 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3534 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3535 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3536 DstAlignCanChange = true; 3537 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3538 if (Align > SrcAlign) 3539 SrcAlign = Align; 3540 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3541 3542 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3543 (DstAlignCanChange ? 0 : Align), 3544 SrcAlign, true, false, DAG, TLI)) 3545 return SDValue(); 3546 3547 if (DstAlignCanChange) { 3548 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3549 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3550 if (NewAlign > Align) { 3551 // Give the stack frame object a larger alignment if needed. 3552 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3553 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3554 Align = NewAlign; 3555 } 3556 } 3557 3558 uint64_t SrcOff = 0, DstOff = 0; 3559 SmallVector<SDValue, 8> LoadValues; 3560 SmallVector<SDValue, 8> LoadChains; 3561 SmallVector<SDValue, 8> OutChains; 3562 unsigned NumMemOps = MemOps.size(); 3563 for (unsigned i = 0; i < NumMemOps; i++) { 3564 EVT VT = MemOps[i]; 3565 unsigned VTSize = VT.getSizeInBits() / 8; 3566 SDValue Value, Store; 3567 3568 Value = DAG.getLoad(VT, dl, Chain, 3569 getMemBasePlusOffset(Src, SrcOff, DAG), 3570 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3571 false, SrcAlign); 3572 LoadValues.push_back(Value); 3573 LoadChains.push_back(Value.getValue(1)); 3574 SrcOff += VTSize; 3575 } 3576 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3577 &LoadChains[0], LoadChains.size()); 3578 OutChains.clear(); 3579 for (unsigned i = 0; i < NumMemOps; i++) { 3580 EVT VT = MemOps[i]; 3581 unsigned VTSize = VT.getSizeInBits() / 8; 3582 SDValue Value, Store; 3583 3584 Store = DAG.getStore(Chain, dl, LoadValues[i], 3585 getMemBasePlusOffset(Dst, DstOff, DAG), 3586 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3587 OutChains.push_back(Store); 3588 DstOff += VTSize; 3589 } 3590 3591 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3592 &OutChains[0], OutChains.size()); 3593} 3594 3595static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3596 SDValue Chain, SDValue Dst, 3597 SDValue Src, uint64_t Size, 3598 unsigned Align, bool isVol, 3599 MachinePointerInfo DstPtrInfo) { 3600 // Turn a memset of undef to nop. 3601 if (Src.getOpcode() == ISD::UNDEF) 3602 return Chain; 3603 3604 // Expand memset to a series of load/store ops if the size operand 3605 // falls below a certain threshold. 3606 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3607 std::vector<EVT> MemOps; 3608 bool DstAlignCanChange = false; 3609 MachineFunction &MF = DAG.getMachineFunction(); 3610 MachineFrameInfo *MFI = MF.getFrameInfo(); 3611 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3612 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3613 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3614 DstAlignCanChange = true; 3615 bool IsZeroVal = 3616 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3617 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3618 Size, (DstAlignCanChange ? 0 : Align), 0, 3619 IsZeroVal, false, DAG, TLI)) 3620 return SDValue(); 3621 3622 if (DstAlignCanChange) { 3623 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3624 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3625 if (NewAlign > Align) { 3626 // Give the stack frame object a larger alignment if needed. 3627 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3628 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3629 Align = NewAlign; 3630 } 3631 } 3632 3633 SmallVector<SDValue, 8> OutChains; 3634 uint64_t DstOff = 0; 3635 unsigned NumMemOps = MemOps.size(); 3636 3637 // Find the largest store and generate the bit pattern for it. 3638 EVT LargestVT = MemOps[0]; 3639 for (unsigned i = 1; i < NumMemOps; i++) 3640 if (MemOps[i].bitsGT(LargestVT)) 3641 LargestVT = MemOps[i]; 3642 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3643 3644 for (unsigned i = 0; i < NumMemOps; i++) { 3645 EVT VT = MemOps[i]; 3646 3647 // If this store is smaller than the largest store see whether we can get 3648 // the smaller value for free with a truncate. 3649 SDValue Value = MemSetValue; 3650 if (VT.bitsLT(LargestVT)) { 3651 if (!LargestVT.isVector() && !VT.isVector() && 3652 TLI.isTruncateFree(LargestVT, VT)) 3653 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3654 else 3655 Value = getMemsetValue(Src, VT, DAG, dl); 3656 } 3657 assert(Value.getValueType() == VT && "Value with wrong type."); 3658 SDValue Store = DAG.getStore(Chain, dl, Value, 3659 getMemBasePlusOffset(Dst, DstOff, DAG), 3660 DstPtrInfo.getWithOffset(DstOff), 3661 isVol, false, Align); 3662 OutChains.push_back(Store); 3663 DstOff += VT.getSizeInBits() / 8; 3664 } 3665 3666 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3667 &OutChains[0], OutChains.size()); 3668} 3669 3670SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3671 SDValue Src, SDValue Size, 3672 unsigned Align, bool isVol, bool AlwaysInline, 3673 MachinePointerInfo DstPtrInfo, 3674 MachinePointerInfo SrcPtrInfo) { 3675 3676 // Check to see if we should lower the memcpy to loads and stores first. 3677 // For cases within the target-specified limits, this is the best choice. 3678 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3679 if (ConstantSize) { 3680 // Memcpy with size zero? Just return the original chain. 3681 if (ConstantSize->isNullValue()) 3682 return Chain; 3683 3684 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3685 ConstantSize->getZExtValue(),Align, 3686 isVol, false, DstPtrInfo, SrcPtrInfo); 3687 if (Result.getNode()) 3688 return Result; 3689 } 3690 3691 // Then check to see if we should lower the memcpy with target-specific 3692 // code. If the target chooses to do this, this is the next best. 3693 SDValue Result = 3694 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3695 isVol, AlwaysInline, 3696 DstPtrInfo, SrcPtrInfo); 3697 if (Result.getNode()) 3698 return Result; 3699 3700 // If we really need inline code and the target declined to provide it, 3701 // use a (potentially long) sequence of loads and stores. 3702 if (AlwaysInline) { 3703 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3704 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3705 ConstantSize->getZExtValue(), Align, isVol, 3706 true, DstPtrInfo, SrcPtrInfo); 3707 } 3708 3709 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3710 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3711 // respect volatile, so they may do things like read or write memory 3712 // beyond the given memory regions. But fixing this isn't easy, and most 3713 // people don't care. 3714 3715 // Emit a library call. 3716 TargetLowering::ArgListTy Args; 3717 TargetLowering::ArgListEntry Entry; 3718 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3719 Entry.Node = Dst; Args.push_back(Entry); 3720 Entry.Node = Src; Args.push_back(Entry); 3721 Entry.Node = Size; Args.push_back(Entry); 3722 // FIXME: pass in DebugLoc 3723 std::pair<SDValue,SDValue> CallResult = 3724 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3725 false, false, false, false, 0, 3726 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3727 /*isReturnValueUsed=*/false, 3728 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3729 TLI.getPointerTy()), 3730 Args, *this, dl); 3731 return CallResult.second; 3732} 3733 3734SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3735 SDValue Src, SDValue Size, 3736 unsigned Align, bool isVol, 3737 MachinePointerInfo DstPtrInfo, 3738 MachinePointerInfo SrcPtrInfo) { 3739 3740 // Check to see if we should lower the memmove to loads and stores first. 3741 // For cases within the target-specified limits, this is the best choice. 3742 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3743 if (ConstantSize) { 3744 // Memmove with size zero? Just return the original chain. 3745 if (ConstantSize->isNullValue()) 3746 return Chain; 3747 3748 SDValue Result = 3749 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3750 ConstantSize->getZExtValue(), Align, isVol, 3751 false, DstPtrInfo, SrcPtrInfo); 3752 if (Result.getNode()) 3753 return Result; 3754 } 3755 3756 // Then check to see if we should lower the memmove with target-specific 3757 // code. If the target chooses to do this, this is the next best. 3758 SDValue Result = 3759 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3760 DstPtrInfo, SrcPtrInfo); 3761 if (Result.getNode()) 3762 return Result; 3763 3764 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3765 // not be safe. See memcpy above for more details. 3766 3767 // Emit a library call. 3768 TargetLowering::ArgListTy Args; 3769 TargetLowering::ArgListEntry Entry; 3770 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3771 Entry.Node = Dst; Args.push_back(Entry); 3772 Entry.Node = Src; Args.push_back(Entry); 3773 Entry.Node = Size; Args.push_back(Entry); 3774 // FIXME: pass in DebugLoc 3775 std::pair<SDValue,SDValue> CallResult = 3776 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3777 false, false, false, false, 0, 3778 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3779 /*isReturnValueUsed=*/false, 3780 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3781 TLI.getPointerTy()), 3782 Args, *this, dl); 3783 return CallResult.second; 3784} 3785 3786SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3787 SDValue Src, SDValue Size, 3788 unsigned Align, bool isVol, 3789 MachinePointerInfo DstPtrInfo) { 3790 3791 // Check to see if we should lower the memset to stores first. 3792 // For cases within the target-specified limits, this is the best choice. 3793 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3794 if (ConstantSize) { 3795 // Memset with size zero? Just return the original chain. 3796 if (ConstantSize->isNullValue()) 3797 return Chain; 3798 3799 SDValue Result = 3800 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3801 Align, isVol, DstPtrInfo); 3802 3803 if (Result.getNode()) 3804 return Result; 3805 } 3806 3807 // Then check to see if we should lower the memset with target-specific 3808 // code. If the target chooses to do this, this is the next best. 3809 SDValue Result = 3810 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3811 DstPtrInfo); 3812 if (Result.getNode()) 3813 return Result; 3814 3815 // Emit a library call. 3816 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3817 TargetLowering::ArgListTy Args; 3818 TargetLowering::ArgListEntry Entry; 3819 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3820 Args.push_back(Entry); 3821 // Extend or truncate the argument to be an i32 value for the call. 3822 if (Src.getValueType().bitsGT(MVT::i32)) 3823 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3824 else 3825 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3826 Entry.Node = Src; 3827 Entry.Ty = Type::getInt32Ty(*getContext()); 3828 Entry.isSExt = true; 3829 Args.push_back(Entry); 3830 Entry.Node = Size; 3831 Entry.Ty = IntPtrTy; 3832 Entry.isSExt = false; 3833 Args.push_back(Entry); 3834 // FIXME: pass in DebugLoc 3835 std::pair<SDValue,SDValue> CallResult = 3836 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3837 false, false, false, false, 0, 3838 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3839 /*isReturnValueUsed=*/false, 3840 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3841 TLI.getPointerTy()), 3842 Args, *this, dl); 3843 return CallResult.second; 3844} 3845 3846SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3847 SDValue Chain, SDValue Ptr, SDValue Cmp, 3848 SDValue Swp, MachinePointerInfo PtrInfo, 3849 unsigned Alignment, 3850 AtomicOrdering Ordering, 3851 SynchronizationScope SynchScope) { 3852 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3853 Alignment = getEVTAlignment(MemVT); 3854 3855 MachineFunction &MF = getMachineFunction(); 3856 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3857 3858 // For now, atomics are considered to be volatile always. 3859 // FIXME: Volatile isn't really correct; we should keep track of atomic 3860 // orderings in the memoperand. 3861 Flags |= MachineMemOperand::MOVolatile; 3862 3863 MachineMemOperand *MMO = 3864 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3865 3866 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3867 Ordering, SynchScope); 3868} 3869 3870SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3871 SDValue Chain, 3872 SDValue Ptr, SDValue Cmp, 3873 SDValue Swp, MachineMemOperand *MMO, 3874 AtomicOrdering Ordering, 3875 SynchronizationScope SynchScope) { 3876 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3877 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3878 3879 EVT VT = Cmp.getValueType(); 3880 3881 SDVTList VTs = getVTList(VT, MVT::Other); 3882 FoldingSetNodeID ID; 3883 ID.AddInteger(MemVT.getRawBits()); 3884 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3885 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3886 void* IP = 0; 3887 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3888 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3889 return SDValue(E, 0); 3890 } 3891 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3892 Ptr, Cmp, Swp, MMO, Ordering, 3893 SynchScope); 3894 CSEMap.InsertNode(N, IP); 3895 AllNodes.push_back(N); 3896 return SDValue(N, 0); 3897} 3898 3899SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3900 SDValue Chain, 3901 SDValue Ptr, SDValue Val, 3902 const Value* PtrVal, 3903 unsigned Alignment, 3904 AtomicOrdering Ordering, 3905 SynchronizationScope SynchScope) { 3906 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3907 Alignment = getEVTAlignment(MemVT); 3908 3909 MachineFunction &MF = getMachineFunction(); 3910 // A monotonic store does not load; a release store "loads" in the sense 3911 // that other stores cannot be sunk past it. 3912 // (An atomicrmw obviously both loads and stores.) 3913 unsigned Flags = MachineMemOperand::MOStore; 3914 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic) 3915 Flags |= MachineMemOperand::MOLoad; 3916 3917 // For now, atomics are considered to be volatile always. 3918 // FIXME: Volatile isn't really correct; we should keep track of atomic 3919 // orderings in the memoperand. 3920 Flags |= MachineMemOperand::MOVolatile; 3921 3922 MachineMemOperand *MMO = 3923 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3924 MemVT.getStoreSize(), Alignment); 3925 3926 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 3927 Ordering, SynchScope); 3928} 3929 3930SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3931 SDValue Chain, 3932 SDValue Ptr, SDValue Val, 3933 MachineMemOperand *MMO, 3934 AtomicOrdering Ordering, 3935 SynchronizationScope SynchScope) { 3936 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3937 Opcode == ISD::ATOMIC_LOAD_SUB || 3938 Opcode == ISD::ATOMIC_LOAD_AND || 3939 Opcode == ISD::ATOMIC_LOAD_OR || 3940 Opcode == ISD::ATOMIC_LOAD_XOR || 3941 Opcode == ISD::ATOMIC_LOAD_NAND || 3942 Opcode == ISD::ATOMIC_LOAD_MIN || 3943 Opcode == ISD::ATOMIC_LOAD_MAX || 3944 Opcode == ISD::ATOMIC_LOAD_UMIN || 3945 Opcode == ISD::ATOMIC_LOAD_UMAX || 3946 Opcode == ISD::ATOMIC_SWAP || 3947 Opcode == ISD::ATOMIC_STORE) && 3948 "Invalid Atomic Op"); 3949 3950 EVT VT = Val.getValueType(); 3951 3952 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 3953 getVTList(VT, MVT::Other); 3954 FoldingSetNodeID ID; 3955 ID.AddInteger(MemVT.getRawBits()); 3956 SDValue Ops[] = {Chain, Ptr, Val}; 3957 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3958 void* IP = 0; 3959 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3960 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3961 return SDValue(E, 0); 3962 } 3963 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3964 Ptr, Val, MMO, 3965 Ordering, SynchScope); 3966 CSEMap.InsertNode(N, IP); 3967 AllNodes.push_back(N); 3968 return SDValue(N, 0); 3969} 3970 3971SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3972 EVT VT, SDValue Chain, 3973 SDValue Ptr, 3974 const Value* PtrVal, 3975 unsigned Alignment, 3976 AtomicOrdering Ordering, 3977 SynchronizationScope SynchScope) { 3978 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3979 Alignment = getEVTAlignment(MemVT); 3980 3981 MachineFunction &MF = getMachineFunction(); 3982 // A monotonic load does not store; an acquire load "stores" in the sense 3983 // that other loads cannot be hoisted past it. 3984 unsigned Flags = MachineMemOperand::MOLoad; 3985 if (Ordering > Monotonic) 3986 Flags |= MachineMemOperand::MOStore; 3987 3988 // For now, atomics are considered to be volatile always. 3989 // FIXME: Volatile isn't really correct; we should keep track of atomic 3990 // orderings in the memoperand. 3991 Flags |= MachineMemOperand::MOVolatile; 3992 3993 MachineMemOperand *MMO = 3994 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3995 MemVT.getStoreSize(), Alignment); 3996 3997 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 3998 Ordering, SynchScope); 3999} 4000 4001SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4002 EVT VT, SDValue Chain, 4003 SDValue Ptr, 4004 MachineMemOperand *MMO, 4005 AtomicOrdering Ordering, 4006 SynchronizationScope SynchScope) { 4007 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4008 4009 SDVTList VTs = getVTList(VT, MVT::Other); 4010 FoldingSetNodeID ID; 4011 ID.AddInteger(MemVT.getRawBits()); 4012 SDValue Ops[] = {Chain, Ptr}; 4013 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4014 void* IP = 0; 4015 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4016 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4017 return SDValue(E, 0); 4018 } 4019 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4020 Ptr, MMO, Ordering, SynchScope); 4021 CSEMap.InsertNode(N, IP); 4022 AllNodes.push_back(N); 4023 return SDValue(N, 0); 4024} 4025 4026/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4027SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4028 DebugLoc dl) { 4029 if (NumOps == 1) 4030 return Ops[0]; 4031 4032 SmallVector<EVT, 4> VTs; 4033 VTs.reserve(NumOps); 4034 for (unsigned i = 0; i < NumOps; ++i) 4035 VTs.push_back(Ops[i].getValueType()); 4036 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4037 Ops, NumOps); 4038} 4039 4040SDValue 4041SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4042 const EVT *VTs, unsigned NumVTs, 4043 const SDValue *Ops, unsigned NumOps, 4044 EVT MemVT, MachinePointerInfo PtrInfo, 4045 unsigned Align, bool Vol, 4046 bool ReadMem, bool WriteMem) { 4047 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4048 MemVT, PtrInfo, Align, Vol, 4049 ReadMem, WriteMem); 4050} 4051 4052SDValue 4053SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4054 const SDValue *Ops, unsigned NumOps, 4055 EVT MemVT, MachinePointerInfo PtrInfo, 4056 unsigned Align, bool Vol, 4057 bool ReadMem, bool WriteMem) { 4058 if (Align == 0) // Ensure that codegen never sees alignment 0 4059 Align = getEVTAlignment(MemVT); 4060 4061 MachineFunction &MF = getMachineFunction(); 4062 unsigned Flags = 0; 4063 if (WriteMem) 4064 Flags |= MachineMemOperand::MOStore; 4065 if (ReadMem) 4066 Flags |= MachineMemOperand::MOLoad; 4067 if (Vol) 4068 Flags |= MachineMemOperand::MOVolatile; 4069 MachineMemOperand *MMO = 4070 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4071 4072 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4073} 4074 4075SDValue 4076SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4077 const SDValue *Ops, unsigned NumOps, 4078 EVT MemVT, MachineMemOperand *MMO) { 4079 assert((Opcode == ISD::INTRINSIC_VOID || 4080 Opcode == ISD::INTRINSIC_W_CHAIN || 4081 Opcode == ISD::PREFETCH || 4082 (Opcode <= INT_MAX && 4083 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4084 "Opcode is not a memory-accessing opcode!"); 4085 4086 // Memoize the node unless it returns a flag. 4087 MemIntrinsicSDNode *N; 4088 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4089 FoldingSetNodeID ID; 4090 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4091 void *IP = 0; 4092 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4093 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4094 return SDValue(E, 0); 4095 } 4096 4097 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4098 MemVT, MMO); 4099 CSEMap.InsertNode(N, IP); 4100 } else { 4101 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4102 MemVT, MMO); 4103 } 4104 AllNodes.push_back(N); 4105 return SDValue(N, 0); 4106} 4107 4108/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4109/// MachinePointerInfo record from it. This is particularly useful because the 4110/// code generator has many cases where it doesn't bother passing in a 4111/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4112static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4113 // If this is FI+Offset, we can model it. 4114 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4115 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4116 4117 // If this is (FI+Offset1)+Offset2, we can model it. 4118 if (Ptr.getOpcode() != ISD::ADD || 4119 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4120 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4121 return MachinePointerInfo(); 4122 4123 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4124 return MachinePointerInfo::getFixedStack(FI, Offset+ 4125 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4126} 4127 4128/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4129/// MachinePointerInfo record from it. This is particularly useful because the 4130/// code generator has many cases where it doesn't bother passing in a 4131/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4132static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4133 // If the 'Offset' value isn't a constant, we can't handle this. 4134 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4135 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4136 if (OffsetOp.getOpcode() == ISD::UNDEF) 4137 return InferPointerInfo(Ptr); 4138 return MachinePointerInfo(); 4139} 4140 4141 4142SDValue 4143SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4144 EVT VT, DebugLoc dl, SDValue Chain, 4145 SDValue Ptr, SDValue Offset, 4146 MachinePointerInfo PtrInfo, EVT MemVT, 4147 bool isVolatile, bool isNonTemporal, 4148 unsigned Alignment, const MDNode *TBAAInfo) { 4149 assert(Chain.getValueType() == MVT::Other && 4150 "Invalid chain type"); 4151 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4152 Alignment = getEVTAlignment(VT); 4153 4154 unsigned Flags = MachineMemOperand::MOLoad; 4155 if (isVolatile) 4156 Flags |= MachineMemOperand::MOVolatile; 4157 if (isNonTemporal) 4158 Flags |= MachineMemOperand::MONonTemporal; 4159 4160 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4161 // clients. 4162 if (PtrInfo.V == 0) 4163 PtrInfo = InferPointerInfo(Ptr, Offset); 4164 4165 MachineFunction &MF = getMachineFunction(); 4166 MachineMemOperand *MMO = 4167 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4168 TBAAInfo); 4169 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4170} 4171 4172SDValue 4173SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4174 EVT VT, DebugLoc dl, SDValue Chain, 4175 SDValue Ptr, SDValue Offset, EVT MemVT, 4176 MachineMemOperand *MMO) { 4177 if (VT == MemVT) { 4178 ExtType = ISD::NON_EXTLOAD; 4179 } else if (ExtType == ISD::NON_EXTLOAD) { 4180 assert(VT == MemVT && "Non-extending load from different memory type!"); 4181 } else { 4182 // Extending load. 4183 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4184 "Should only be an extending load, not truncating!"); 4185 assert(VT.isInteger() == MemVT.isInteger() && 4186 "Cannot convert from FP to Int or Int -> FP!"); 4187 assert(VT.isVector() == MemVT.isVector() && 4188 "Cannot use trunc store to convert to or from a vector!"); 4189 assert((!VT.isVector() || 4190 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4191 "Cannot use trunc store to change the number of vector elements!"); 4192 } 4193 4194 bool Indexed = AM != ISD::UNINDEXED; 4195 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4196 "Unindexed load with an offset!"); 4197 4198 SDVTList VTs = Indexed ? 4199 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4200 SDValue Ops[] = { Chain, Ptr, Offset }; 4201 FoldingSetNodeID ID; 4202 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4203 ID.AddInteger(MemVT.getRawBits()); 4204 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4205 MMO->isNonTemporal())); 4206 void *IP = 0; 4207 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4208 cast<LoadSDNode>(E)->refineAlignment(MMO); 4209 return SDValue(E, 0); 4210 } 4211 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4212 MemVT, MMO); 4213 CSEMap.InsertNode(N, IP); 4214 AllNodes.push_back(N); 4215 return SDValue(N, 0); 4216} 4217 4218SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4219 SDValue Chain, SDValue Ptr, 4220 MachinePointerInfo PtrInfo, 4221 bool isVolatile, bool isNonTemporal, 4222 unsigned Alignment, const MDNode *TBAAInfo) { 4223 SDValue Undef = getUNDEF(Ptr.getValueType()); 4224 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4225 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 4226} 4227 4228SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4229 SDValue Chain, SDValue Ptr, 4230 MachinePointerInfo PtrInfo, EVT MemVT, 4231 bool isVolatile, bool isNonTemporal, 4232 unsigned Alignment, const MDNode *TBAAInfo) { 4233 SDValue Undef = getUNDEF(Ptr.getValueType()); 4234 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4235 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment, 4236 TBAAInfo); 4237} 4238 4239 4240SDValue 4241SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4242 SDValue Offset, ISD::MemIndexedMode AM) { 4243 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4244 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4245 "Load is already a indexed load!"); 4246 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4247 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4248 LD->getMemoryVT(), 4249 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4250} 4251 4252SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4253 SDValue Ptr, MachinePointerInfo PtrInfo, 4254 bool isVolatile, bool isNonTemporal, 4255 unsigned Alignment, const MDNode *TBAAInfo) { 4256 assert(Chain.getValueType() == MVT::Other && 4257 "Invalid chain type"); 4258 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4259 Alignment = getEVTAlignment(Val.getValueType()); 4260 4261 unsigned Flags = MachineMemOperand::MOStore; 4262 if (isVolatile) 4263 Flags |= MachineMemOperand::MOVolatile; 4264 if (isNonTemporal) 4265 Flags |= MachineMemOperand::MONonTemporal; 4266 4267 if (PtrInfo.V == 0) 4268 PtrInfo = InferPointerInfo(Ptr); 4269 4270 MachineFunction &MF = getMachineFunction(); 4271 MachineMemOperand *MMO = 4272 MF.getMachineMemOperand(PtrInfo, Flags, 4273 Val.getValueType().getStoreSize(), Alignment, 4274 TBAAInfo); 4275 4276 return getStore(Chain, dl, Val, Ptr, MMO); 4277} 4278 4279SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4280 SDValue Ptr, MachineMemOperand *MMO) { 4281 assert(Chain.getValueType() == MVT::Other && 4282 "Invalid chain type"); 4283 EVT VT = Val.getValueType(); 4284 SDVTList VTs = getVTList(MVT::Other); 4285 SDValue Undef = getUNDEF(Ptr.getValueType()); 4286 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4287 FoldingSetNodeID ID; 4288 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4289 ID.AddInteger(VT.getRawBits()); 4290 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4291 MMO->isNonTemporal())); 4292 void *IP = 0; 4293 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4294 cast<StoreSDNode>(E)->refineAlignment(MMO); 4295 return SDValue(E, 0); 4296 } 4297 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4298 false, VT, MMO); 4299 CSEMap.InsertNode(N, IP); 4300 AllNodes.push_back(N); 4301 return SDValue(N, 0); 4302} 4303 4304SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4305 SDValue Ptr, MachinePointerInfo PtrInfo, 4306 EVT SVT,bool isVolatile, bool isNonTemporal, 4307 unsigned Alignment, 4308 const MDNode *TBAAInfo) { 4309 assert(Chain.getValueType() == MVT::Other && 4310 "Invalid chain type"); 4311 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4312 Alignment = getEVTAlignment(SVT); 4313 4314 unsigned Flags = MachineMemOperand::MOStore; 4315 if (isVolatile) 4316 Flags |= MachineMemOperand::MOVolatile; 4317 if (isNonTemporal) 4318 Flags |= MachineMemOperand::MONonTemporal; 4319 4320 if (PtrInfo.V == 0) 4321 PtrInfo = InferPointerInfo(Ptr); 4322 4323 MachineFunction &MF = getMachineFunction(); 4324 MachineMemOperand *MMO = 4325 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4326 TBAAInfo); 4327 4328 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4329} 4330 4331SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4332 SDValue Ptr, EVT SVT, 4333 MachineMemOperand *MMO) { 4334 EVT VT = Val.getValueType(); 4335 4336 assert(Chain.getValueType() == MVT::Other && 4337 "Invalid chain type"); 4338 if (VT == SVT) 4339 return getStore(Chain, dl, Val, Ptr, MMO); 4340 4341 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4342 "Should only be a truncating store, not extending!"); 4343 assert(VT.isInteger() == SVT.isInteger() && 4344 "Can't do FP-INT conversion!"); 4345 assert(VT.isVector() == SVT.isVector() && 4346 "Cannot use trunc store to convert to or from a vector!"); 4347 assert((!VT.isVector() || 4348 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4349 "Cannot use trunc store to change the number of vector elements!"); 4350 4351 SDVTList VTs = getVTList(MVT::Other); 4352 SDValue Undef = getUNDEF(Ptr.getValueType()); 4353 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4354 FoldingSetNodeID ID; 4355 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4356 ID.AddInteger(SVT.getRawBits()); 4357 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4358 MMO->isNonTemporal())); 4359 void *IP = 0; 4360 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4361 cast<StoreSDNode>(E)->refineAlignment(MMO); 4362 return SDValue(E, 0); 4363 } 4364 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4365 true, SVT, MMO); 4366 CSEMap.InsertNode(N, IP); 4367 AllNodes.push_back(N); 4368 return SDValue(N, 0); 4369} 4370 4371SDValue 4372SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4373 SDValue Offset, ISD::MemIndexedMode AM) { 4374 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4375 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4376 "Store is already a indexed store!"); 4377 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4378 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4379 FoldingSetNodeID ID; 4380 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4381 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4382 ID.AddInteger(ST->getRawSubclassData()); 4383 void *IP = 0; 4384 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4385 return SDValue(E, 0); 4386 4387 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4388 ST->isTruncatingStore(), 4389 ST->getMemoryVT(), 4390 ST->getMemOperand()); 4391 CSEMap.InsertNode(N, IP); 4392 AllNodes.push_back(N); 4393 return SDValue(N, 0); 4394} 4395 4396SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4397 SDValue Chain, SDValue Ptr, 4398 SDValue SV, 4399 unsigned Align) { 4400 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4401 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4402} 4403 4404SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4405 const SDUse *Ops, unsigned NumOps) { 4406 switch (NumOps) { 4407 case 0: return getNode(Opcode, DL, VT); 4408 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4409 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4410 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4411 default: break; 4412 } 4413 4414 // Copy from an SDUse array into an SDValue array for use with 4415 // the regular getNode logic. 4416 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4417 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4418} 4419 4420SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4421 const SDValue *Ops, unsigned NumOps) { 4422 switch (NumOps) { 4423 case 0: return getNode(Opcode, DL, VT); 4424 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4425 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4426 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4427 default: break; 4428 } 4429 4430 switch (Opcode) { 4431 default: break; 4432 case ISD::SELECT_CC: { 4433 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4434 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4435 "LHS and RHS of condition must have same type!"); 4436 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4437 "True and False arms of SelectCC must have same type!"); 4438 assert(Ops[2].getValueType() == VT && 4439 "select_cc node must be of same type as true and false value!"); 4440 break; 4441 } 4442 case ISD::BR_CC: { 4443 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4444 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4445 "LHS/RHS of comparison should match types!"); 4446 break; 4447 } 4448 } 4449 4450 // Memoize nodes. 4451 SDNode *N; 4452 SDVTList VTs = getVTList(VT); 4453 4454 if (VT != MVT::Glue) { 4455 FoldingSetNodeID ID; 4456 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4457 void *IP = 0; 4458 4459 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4460 return SDValue(E, 0); 4461 4462 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4463 CSEMap.InsertNode(N, IP); 4464 } else { 4465 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4466 } 4467 4468 AllNodes.push_back(N); 4469#ifndef NDEBUG 4470 VerifySDNode(N); 4471#endif 4472 return SDValue(N, 0); 4473} 4474 4475SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4476 const std::vector<EVT> &ResultTys, 4477 const SDValue *Ops, unsigned NumOps) { 4478 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4479 Ops, NumOps); 4480} 4481 4482SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4483 const EVT *VTs, unsigned NumVTs, 4484 const SDValue *Ops, unsigned NumOps) { 4485 if (NumVTs == 1) 4486 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4487 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4488} 4489 4490SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4491 const SDValue *Ops, unsigned NumOps) { 4492 if (VTList.NumVTs == 1) 4493 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4494 4495#if 0 4496 switch (Opcode) { 4497 // FIXME: figure out how to safely handle things like 4498 // int foo(int x) { return 1 << (x & 255); } 4499 // int bar() { return foo(256); } 4500 case ISD::SRA_PARTS: 4501 case ISD::SRL_PARTS: 4502 case ISD::SHL_PARTS: 4503 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4504 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4505 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4506 else if (N3.getOpcode() == ISD::AND) 4507 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4508 // If the and is only masking out bits that cannot effect the shift, 4509 // eliminate the and. 4510 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4511 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4512 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4513 } 4514 break; 4515 } 4516#endif 4517 4518 // Memoize the node unless it returns a flag. 4519 SDNode *N; 4520 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4521 FoldingSetNodeID ID; 4522 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4523 void *IP = 0; 4524 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4525 return SDValue(E, 0); 4526 4527 if (NumOps == 1) { 4528 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4529 } else if (NumOps == 2) { 4530 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4531 } else if (NumOps == 3) { 4532 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4533 Ops[2]); 4534 } else { 4535 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4536 } 4537 CSEMap.InsertNode(N, IP); 4538 } else { 4539 if (NumOps == 1) { 4540 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4541 } else if (NumOps == 2) { 4542 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4543 } else if (NumOps == 3) { 4544 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4545 Ops[2]); 4546 } else { 4547 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4548 } 4549 } 4550 AllNodes.push_back(N); 4551#ifndef NDEBUG 4552 VerifySDNode(N); 4553#endif 4554 return SDValue(N, 0); 4555} 4556 4557SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4558 return getNode(Opcode, DL, VTList, 0, 0); 4559} 4560 4561SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4562 SDValue N1) { 4563 SDValue Ops[] = { N1 }; 4564 return getNode(Opcode, DL, VTList, Ops, 1); 4565} 4566 4567SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4568 SDValue N1, SDValue N2) { 4569 SDValue Ops[] = { N1, N2 }; 4570 return getNode(Opcode, DL, VTList, Ops, 2); 4571} 4572 4573SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4574 SDValue N1, SDValue N2, SDValue N3) { 4575 SDValue Ops[] = { N1, N2, N3 }; 4576 return getNode(Opcode, DL, VTList, Ops, 3); 4577} 4578 4579SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4580 SDValue N1, SDValue N2, SDValue N3, 4581 SDValue N4) { 4582 SDValue Ops[] = { N1, N2, N3, N4 }; 4583 return getNode(Opcode, DL, VTList, Ops, 4); 4584} 4585 4586SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4587 SDValue N1, SDValue N2, SDValue N3, 4588 SDValue N4, SDValue N5) { 4589 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4590 return getNode(Opcode, DL, VTList, Ops, 5); 4591} 4592 4593SDVTList SelectionDAG::getVTList(EVT VT) { 4594 return makeVTList(SDNode::getValueTypeList(VT), 1); 4595} 4596 4597SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4598 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4599 E = VTList.rend(); I != E; ++I) 4600 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4601 return *I; 4602 4603 EVT *Array = Allocator.Allocate<EVT>(2); 4604 Array[0] = VT1; 4605 Array[1] = VT2; 4606 SDVTList Result = makeVTList(Array, 2); 4607 VTList.push_back(Result); 4608 return Result; 4609} 4610 4611SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4612 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4613 E = VTList.rend(); I != E; ++I) 4614 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4615 I->VTs[2] == VT3) 4616 return *I; 4617 4618 EVT *Array = Allocator.Allocate<EVT>(3); 4619 Array[0] = VT1; 4620 Array[1] = VT2; 4621 Array[2] = VT3; 4622 SDVTList Result = makeVTList(Array, 3); 4623 VTList.push_back(Result); 4624 return Result; 4625} 4626 4627SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4628 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4629 E = VTList.rend(); I != E; ++I) 4630 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4631 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4632 return *I; 4633 4634 EVT *Array = Allocator.Allocate<EVT>(4); 4635 Array[0] = VT1; 4636 Array[1] = VT2; 4637 Array[2] = VT3; 4638 Array[3] = VT4; 4639 SDVTList Result = makeVTList(Array, 4); 4640 VTList.push_back(Result); 4641 return Result; 4642} 4643 4644SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4645 switch (NumVTs) { 4646 case 0: llvm_unreachable("Cannot have nodes without results!"); 4647 case 1: return getVTList(VTs[0]); 4648 case 2: return getVTList(VTs[0], VTs[1]); 4649 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4650 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4651 default: break; 4652 } 4653 4654 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4655 E = VTList.rend(); I != E; ++I) { 4656 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4657 continue; 4658 4659 bool NoMatch = false; 4660 for (unsigned i = 2; i != NumVTs; ++i) 4661 if (VTs[i] != I->VTs[i]) { 4662 NoMatch = true; 4663 break; 4664 } 4665 if (!NoMatch) 4666 return *I; 4667 } 4668 4669 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4670 std::copy(VTs, VTs+NumVTs, Array); 4671 SDVTList Result = makeVTList(Array, NumVTs); 4672 VTList.push_back(Result); 4673 return Result; 4674} 4675 4676 4677/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4678/// specified operands. If the resultant node already exists in the DAG, 4679/// this does not modify the specified node, instead it returns the node that 4680/// already exists. If the resultant node does not exist in the DAG, the 4681/// input node is returned. As a degenerate case, if you specify the same 4682/// input operands as the node already has, the input node is returned. 4683SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4684 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4685 4686 // Check to see if there is no change. 4687 if (Op == N->getOperand(0)) return N; 4688 4689 // See if the modified node already exists. 4690 void *InsertPos = 0; 4691 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4692 return Existing; 4693 4694 // Nope it doesn't. Remove the node from its current place in the maps. 4695 if (InsertPos) 4696 if (!RemoveNodeFromCSEMaps(N)) 4697 InsertPos = 0; 4698 4699 // Now we update the operands. 4700 N->OperandList[0].set(Op); 4701 4702 // If this gets put into a CSE map, add it. 4703 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4704 return N; 4705} 4706 4707SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4708 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4709 4710 // Check to see if there is no change. 4711 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4712 return N; // No operands changed, just return the input node. 4713 4714 // See if the modified node already exists. 4715 void *InsertPos = 0; 4716 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4717 return Existing; 4718 4719 // Nope it doesn't. Remove the node from its current place in the maps. 4720 if (InsertPos) 4721 if (!RemoveNodeFromCSEMaps(N)) 4722 InsertPos = 0; 4723 4724 // Now we update the operands. 4725 if (N->OperandList[0] != Op1) 4726 N->OperandList[0].set(Op1); 4727 if (N->OperandList[1] != Op2) 4728 N->OperandList[1].set(Op2); 4729 4730 // If this gets put into a CSE map, add it. 4731 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4732 return N; 4733} 4734 4735SDNode *SelectionDAG:: 4736UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4737 SDValue Ops[] = { Op1, Op2, Op3 }; 4738 return UpdateNodeOperands(N, Ops, 3); 4739} 4740 4741SDNode *SelectionDAG:: 4742UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4743 SDValue Op3, SDValue Op4) { 4744 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4745 return UpdateNodeOperands(N, Ops, 4); 4746} 4747 4748SDNode *SelectionDAG:: 4749UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4750 SDValue Op3, SDValue Op4, SDValue Op5) { 4751 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4752 return UpdateNodeOperands(N, Ops, 5); 4753} 4754 4755SDNode *SelectionDAG:: 4756UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4757 assert(N->getNumOperands() == NumOps && 4758 "Update with wrong number of operands"); 4759 4760 // Check to see if there is no change. 4761 bool AnyChange = false; 4762 for (unsigned i = 0; i != NumOps; ++i) { 4763 if (Ops[i] != N->getOperand(i)) { 4764 AnyChange = true; 4765 break; 4766 } 4767 } 4768 4769 // No operands changed, just return the input node. 4770 if (!AnyChange) return N; 4771 4772 // See if the modified node already exists. 4773 void *InsertPos = 0; 4774 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4775 return Existing; 4776 4777 // Nope it doesn't. Remove the node from its current place in the maps. 4778 if (InsertPos) 4779 if (!RemoveNodeFromCSEMaps(N)) 4780 InsertPos = 0; 4781 4782 // Now we update the operands. 4783 for (unsigned i = 0; i != NumOps; ++i) 4784 if (N->OperandList[i] != Ops[i]) 4785 N->OperandList[i].set(Ops[i]); 4786 4787 // If this gets put into a CSE map, add it. 4788 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4789 return N; 4790} 4791 4792/// DropOperands - Release the operands and set this node to have 4793/// zero operands. 4794void SDNode::DropOperands() { 4795 // Unlike the code in MorphNodeTo that does this, we don't need to 4796 // watch for dead nodes here. 4797 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4798 SDUse &Use = *I++; 4799 Use.set(SDValue()); 4800 } 4801} 4802 4803/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4804/// machine opcode. 4805/// 4806SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4807 EVT VT) { 4808 SDVTList VTs = getVTList(VT); 4809 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4810} 4811 4812SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4813 EVT VT, SDValue Op1) { 4814 SDVTList VTs = getVTList(VT); 4815 SDValue Ops[] = { Op1 }; 4816 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4817} 4818 4819SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4820 EVT VT, SDValue Op1, 4821 SDValue Op2) { 4822 SDVTList VTs = getVTList(VT); 4823 SDValue Ops[] = { Op1, Op2 }; 4824 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4825} 4826 4827SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4828 EVT VT, SDValue Op1, 4829 SDValue Op2, SDValue Op3) { 4830 SDVTList VTs = getVTList(VT); 4831 SDValue Ops[] = { Op1, Op2, Op3 }; 4832 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4833} 4834 4835SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4836 EVT VT, const SDValue *Ops, 4837 unsigned NumOps) { 4838 SDVTList VTs = getVTList(VT); 4839 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4840} 4841 4842SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4843 EVT VT1, EVT VT2, const SDValue *Ops, 4844 unsigned NumOps) { 4845 SDVTList VTs = getVTList(VT1, VT2); 4846 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4847} 4848 4849SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4850 EVT VT1, EVT VT2) { 4851 SDVTList VTs = getVTList(VT1, VT2); 4852 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4853} 4854 4855SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4856 EVT VT1, EVT VT2, EVT VT3, 4857 const SDValue *Ops, unsigned NumOps) { 4858 SDVTList VTs = getVTList(VT1, VT2, VT3); 4859 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4860} 4861 4862SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4863 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4864 const SDValue *Ops, unsigned NumOps) { 4865 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4866 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4867} 4868 4869SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4870 EVT VT1, EVT VT2, 4871 SDValue Op1) { 4872 SDVTList VTs = getVTList(VT1, VT2); 4873 SDValue Ops[] = { Op1 }; 4874 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4875} 4876 4877SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4878 EVT VT1, EVT VT2, 4879 SDValue Op1, SDValue Op2) { 4880 SDVTList VTs = getVTList(VT1, VT2); 4881 SDValue Ops[] = { Op1, Op2 }; 4882 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4883} 4884 4885SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4886 EVT VT1, EVT VT2, 4887 SDValue Op1, SDValue Op2, 4888 SDValue Op3) { 4889 SDVTList VTs = getVTList(VT1, VT2); 4890 SDValue Ops[] = { Op1, Op2, Op3 }; 4891 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4892} 4893 4894SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4895 EVT VT1, EVT VT2, EVT VT3, 4896 SDValue Op1, SDValue Op2, 4897 SDValue Op3) { 4898 SDVTList VTs = getVTList(VT1, VT2, VT3); 4899 SDValue Ops[] = { Op1, Op2, Op3 }; 4900 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4901} 4902 4903SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4904 SDVTList VTs, const SDValue *Ops, 4905 unsigned NumOps) { 4906 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4907 // Reset the NodeID to -1. 4908 N->setNodeId(-1); 4909 return N; 4910} 4911 4912/// MorphNodeTo - This *mutates* the specified node to have the specified 4913/// return type, opcode, and operands. 4914/// 4915/// Note that MorphNodeTo returns the resultant node. If there is already a 4916/// node of the specified opcode and operands, it returns that node instead of 4917/// the current one. Note that the DebugLoc need not be the same. 4918/// 4919/// Using MorphNodeTo is faster than creating a new node and swapping it in 4920/// with ReplaceAllUsesWith both because it often avoids allocating a new 4921/// node, and because it doesn't require CSE recalculation for any of 4922/// the node's users. 4923/// 4924SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4925 SDVTList VTs, const SDValue *Ops, 4926 unsigned NumOps) { 4927 // If an identical node already exists, use it. 4928 void *IP = 0; 4929 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4930 FoldingSetNodeID ID; 4931 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4932 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4933 return ON; 4934 } 4935 4936 if (!RemoveNodeFromCSEMaps(N)) 4937 IP = 0; 4938 4939 // Start the morphing. 4940 N->NodeType = Opc; 4941 N->ValueList = VTs.VTs; 4942 N->NumValues = VTs.NumVTs; 4943 4944 // Clear the operands list, updating used nodes to remove this from their 4945 // use list. Keep track of any operands that become dead as a result. 4946 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4947 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4948 SDUse &Use = *I++; 4949 SDNode *Used = Use.getNode(); 4950 Use.set(SDValue()); 4951 if (Used->use_empty()) 4952 DeadNodeSet.insert(Used); 4953 } 4954 4955 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4956 // Initialize the memory references information. 4957 MN->setMemRefs(0, 0); 4958 // If NumOps is larger than the # of operands we can have in a 4959 // MachineSDNode, reallocate the operand list. 4960 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4961 if (MN->OperandsNeedDelete) 4962 delete[] MN->OperandList; 4963 if (NumOps > array_lengthof(MN->LocalOperands)) 4964 // We're creating a final node that will live unmorphed for the 4965 // remainder of the current SelectionDAG iteration, so we can allocate 4966 // the operands directly out of a pool with no recycling metadata. 4967 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4968 Ops, NumOps); 4969 else 4970 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4971 MN->OperandsNeedDelete = false; 4972 } else 4973 MN->InitOperands(MN->OperandList, Ops, NumOps); 4974 } else { 4975 // If NumOps is larger than the # of operands we currently have, reallocate 4976 // the operand list. 4977 if (NumOps > N->NumOperands) { 4978 if (N->OperandsNeedDelete) 4979 delete[] N->OperandList; 4980 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4981 N->OperandsNeedDelete = true; 4982 } else 4983 N->InitOperands(N->OperandList, Ops, NumOps); 4984 } 4985 4986 // Delete any nodes that are still dead after adding the uses for the 4987 // new operands. 4988 if (!DeadNodeSet.empty()) { 4989 SmallVector<SDNode *, 16> DeadNodes; 4990 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4991 E = DeadNodeSet.end(); I != E; ++I) 4992 if ((*I)->use_empty()) 4993 DeadNodes.push_back(*I); 4994 RemoveDeadNodes(DeadNodes); 4995 } 4996 4997 if (IP) 4998 CSEMap.InsertNode(N, IP); // Memoize the new node. 4999 return N; 5000} 5001 5002 5003/// getMachineNode - These are used for target selectors to create a new node 5004/// with specified return type(s), MachineInstr opcode, and operands. 5005/// 5006/// Note that getMachineNode returns the resultant node. If there is already a 5007/// node of the specified opcode and operands, it returns that node instead of 5008/// the current one. 5009MachineSDNode * 5010SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5011 SDVTList VTs = getVTList(VT); 5012 return getMachineNode(Opcode, dl, VTs, 0, 0); 5013} 5014 5015MachineSDNode * 5016SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5017 SDVTList VTs = getVTList(VT); 5018 SDValue Ops[] = { Op1 }; 5019 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5020} 5021 5022MachineSDNode * 5023SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5024 SDValue Op1, SDValue Op2) { 5025 SDVTList VTs = getVTList(VT); 5026 SDValue Ops[] = { Op1, Op2 }; 5027 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5028} 5029 5030MachineSDNode * 5031SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5032 SDValue Op1, SDValue Op2, SDValue Op3) { 5033 SDVTList VTs = getVTList(VT); 5034 SDValue Ops[] = { Op1, Op2, Op3 }; 5035 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5036} 5037 5038MachineSDNode * 5039SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5040 const SDValue *Ops, unsigned NumOps) { 5041 SDVTList VTs = getVTList(VT); 5042 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5043} 5044 5045MachineSDNode * 5046SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5047 SDVTList VTs = getVTList(VT1, VT2); 5048 return getMachineNode(Opcode, dl, VTs, 0, 0); 5049} 5050 5051MachineSDNode * 5052SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5053 EVT VT1, EVT VT2, SDValue Op1) { 5054 SDVTList VTs = getVTList(VT1, VT2); 5055 SDValue Ops[] = { Op1 }; 5056 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5057} 5058 5059MachineSDNode * 5060SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5061 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5062 SDVTList VTs = getVTList(VT1, VT2); 5063 SDValue Ops[] = { Op1, Op2 }; 5064 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5065} 5066 5067MachineSDNode * 5068SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5069 EVT VT1, EVT VT2, SDValue Op1, 5070 SDValue Op2, SDValue Op3) { 5071 SDVTList VTs = getVTList(VT1, VT2); 5072 SDValue Ops[] = { Op1, Op2, Op3 }; 5073 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5074} 5075 5076MachineSDNode * 5077SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5078 EVT VT1, EVT VT2, 5079 const SDValue *Ops, unsigned NumOps) { 5080 SDVTList VTs = getVTList(VT1, VT2); 5081 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5082} 5083 5084MachineSDNode * 5085SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5086 EVT VT1, EVT VT2, EVT VT3, 5087 SDValue Op1, SDValue Op2) { 5088 SDVTList VTs = getVTList(VT1, VT2, VT3); 5089 SDValue Ops[] = { Op1, Op2 }; 5090 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5091} 5092 5093MachineSDNode * 5094SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5095 EVT VT1, EVT VT2, EVT VT3, 5096 SDValue Op1, SDValue Op2, SDValue Op3) { 5097 SDVTList VTs = getVTList(VT1, VT2, VT3); 5098 SDValue Ops[] = { Op1, Op2, Op3 }; 5099 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5100} 5101 5102MachineSDNode * 5103SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5104 EVT VT1, EVT VT2, EVT VT3, 5105 const SDValue *Ops, unsigned NumOps) { 5106 SDVTList VTs = getVTList(VT1, VT2, VT3); 5107 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5108} 5109 5110MachineSDNode * 5111SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5112 EVT VT2, EVT VT3, EVT VT4, 5113 const SDValue *Ops, unsigned NumOps) { 5114 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5115 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5116} 5117 5118MachineSDNode * 5119SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5120 const std::vector<EVT> &ResultTys, 5121 const SDValue *Ops, unsigned NumOps) { 5122 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5123 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5124} 5125 5126MachineSDNode * 5127SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5128 const SDValue *Ops, unsigned NumOps) { 5129 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5130 MachineSDNode *N; 5131 void *IP = 0; 5132 5133 if (DoCSE) { 5134 FoldingSetNodeID ID; 5135 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5136 IP = 0; 5137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5138 return cast<MachineSDNode>(E); 5139 } 5140 5141 // Allocate a new MachineSDNode. 5142 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5143 5144 // Initialize the operands list. 5145 if (NumOps > array_lengthof(N->LocalOperands)) 5146 // We're creating a final node that will live unmorphed for the 5147 // remainder of the current SelectionDAG iteration, so we can allocate 5148 // the operands directly out of a pool with no recycling metadata. 5149 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5150 Ops, NumOps); 5151 else 5152 N->InitOperands(N->LocalOperands, Ops, NumOps); 5153 N->OperandsNeedDelete = false; 5154 5155 if (DoCSE) 5156 CSEMap.InsertNode(N, IP); 5157 5158 AllNodes.push_back(N); 5159#ifndef NDEBUG 5160 VerifyMachineNode(N); 5161#endif 5162 return N; 5163} 5164 5165/// getTargetExtractSubreg - A convenience function for creating 5166/// TargetOpcode::EXTRACT_SUBREG nodes. 5167SDValue 5168SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5169 SDValue Operand) { 5170 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5171 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5172 VT, Operand, SRIdxVal); 5173 return SDValue(Subreg, 0); 5174} 5175 5176/// getTargetInsertSubreg - A convenience function for creating 5177/// TargetOpcode::INSERT_SUBREG nodes. 5178SDValue 5179SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5180 SDValue Operand, SDValue Subreg) { 5181 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5182 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5183 VT, Operand, Subreg, SRIdxVal); 5184 return SDValue(Result, 0); 5185} 5186 5187/// getNodeIfExists - Get the specified node if it's already available, or 5188/// else return NULL. 5189SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5190 const SDValue *Ops, unsigned NumOps) { 5191 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5192 FoldingSetNodeID ID; 5193 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5194 void *IP = 0; 5195 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5196 return E; 5197 } 5198 return NULL; 5199} 5200 5201/// getDbgValue - Creates a SDDbgValue node. 5202/// 5203SDDbgValue * 5204SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5205 DebugLoc DL, unsigned O) { 5206 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5207} 5208 5209SDDbgValue * 5210SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5211 DebugLoc DL, unsigned O) { 5212 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5213} 5214 5215SDDbgValue * 5216SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5217 DebugLoc DL, unsigned O) { 5218 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5219} 5220 5221namespace { 5222 5223/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5224/// pointed to by a use iterator is deleted, increment the use iterator 5225/// so that it doesn't dangle. 5226/// 5227/// This class also manages a "downlink" DAGUpdateListener, to forward 5228/// messages to ReplaceAllUsesWith's callers. 5229/// 5230class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5231 SelectionDAG::DAGUpdateListener *DownLink; 5232 SDNode::use_iterator &UI; 5233 SDNode::use_iterator &UE; 5234 5235 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5236 // Increment the iterator as needed. 5237 while (UI != UE && N == *UI) 5238 ++UI; 5239 5240 // Then forward the message. 5241 if (DownLink) DownLink->NodeDeleted(N, E); 5242 } 5243 5244 virtual void NodeUpdated(SDNode *N) { 5245 // Just forward the message. 5246 if (DownLink) DownLink->NodeUpdated(N); 5247 } 5248 5249public: 5250 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5251 SDNode::use_iterator &ui, 5252 SDNode::use_iterator &ue) 5253 : DownLink(dl), UI(ui), UE(ue) {} 5254}; 5255 5256} 5257 5258/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5259/// This can cause recursive merging of nodes in the DAG. 5260/// 5261/// This version assumes From has a single result value. 5262/// 5263void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5264 DAGUpdateListener *UpdateListener) { 5265 SDNode *From = FromN.getNode(); 5266 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5267 "Cannot replace with this method!"); 5268 assert(From != To.getNode() && "Cannot replace uses of with self"); 5269 5270 // Iterate over all the existing uses of From. New uses will be added 5271 // to the beginning of the use list, which we avoid visiting. 5272 // This specifically avoids visiting uses of From that arise while the 5273 // replacement is happening, because any such uses would be the result 5274 // of CSE: If an existing node looks like From after one of its operands 5275 // is replaced by To, we don't want to replace of all its users with To 5276 // too. See PR3018 for more info. 5277 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5278 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5279 while (UI != UE) { 5280 SDNode *User = *UI; 5281 5282 // This node is about to morph, remove its old self from the CSE maps. 5283 RemoveNodeFromCSEMaps(User); 5284 5285 // A user can appear in a use list multiple times, and when this 5286 // happens the uses are usually next to each other in the list. 5287 // To help reduce the number of CSE recomputations, process all 5288 // the uses of this user that we can find this way. 5289 do { 5290 SDUse &Use = UI.getUse(); 5291 ++UI; 5292 Use.set(To); 5293 } while (UI != UE && *UI == User); 5294 5295 // Now that we have modified User, add it back to the CSE maps. If it 5296 // already exists there, recursively merge the results together. 5297 AddModifiedNodeToCSEMaps(User, &Listener); 5298 } 5299 5300 // If we just RAUW'd the root, take note. 5301 if (FromN == getRoot()) 5302 setRoot(To); 5303} 5304 5305/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5306/// This can cause recursive merging of nodes in the DAG. 5307/// 5308/// This version assumes that for each value of From, there is a 5309/// corresponding value in To in the same position with the same type. 5310/// 5311void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5312 DAGUpdateListener *UpdateListener) { 5313#ifndef NDEBUG 5314 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5315 assert((!From->hasAnyUseOfValue(i) || 5316 From->getValueType(i) == To->getValueType(i)) && 5317 "Cannot use this version of ReplaceAllUsesWith!"); 5318#endif 5319 5320 // Handle the trivial case. 5321 if (From == To) 5322 return; 5323 5324 // Iterate over just the existing users of From. See the comments in 5325 // the ReplaceAllUsesWith above. 5326 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5327 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5328 while (UI != UE) { 5329 SDNode *User = *UI; 5330 5331 // This node is about to morph, remove its old self from the CSE maps. 5332 RemoveNodeFromCSEMaps(User); 5333 5334 // A user can appear in a use list multiple times, and when this 5335 // happens the uses are usually next to each other in the list. 5336 // To help reduce the number of CSE recomputations, process all 5337 // the uses of this user that we can find this way. 5338 do { 5339 SDUse &Use = UI.getUse(); 5340 ++UI; 5341 Use.setNode(To); 5342 } while (UI != UE && *UI == User); 5343 5344 // Now that we have modified User, add it back to the CSE maps. If it 5345 // already exists there, recursively merge the results together. 5346 AddModifiedNodeToCSEMaps(User, &Listener); 5347 } 5348 5349 // If we just RAUW'd the root, take note. 5350 if (From == getRoot().getNode()) 5351 setRoot(SDValue(To, getRoot().getResNo())); 5352} 5353 5354/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5355/// This can cause recursive merging of nodes in the DAG. 5356/// 5357/// This version can replace From with any result values. To must match the 5358/// number and types of values returned by From. 5359void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5360 const SDValue *To, 5361 DAGUpdateListener *UpdateListener) { 5362 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5363 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5364 5365 // Iterate over just the existing users of From. See the comments in 5366 // the ReplaceAllUsesWith above. 5367 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5368 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5369 while (UI != UE) { 5370 SDNode *User = *UI; 5371 5372 // This node is about to morph, remove its old self from the CSE maps. 5373 RemoveNodeFromCSEMaps(User); 5374 5375 // A user can appear in a use list multiple times, and when this 5376 // happens the uses are usually next to each other in the list. 5377 // To help reduce the number of CSE recomputations, process all 5378 // the uses of this user that we can find this way. 5379 do { 5380 SDUse &Use = UI.getUse(); 5381 const SDValue &ToOp = To[Use.getResNo()]; 5382 ++UI; 5383 Use.set(ToOp); 5384 } while (UI != UE && *UI == User); 5385 5386 // Now that we have modified User, add it back to the CSE maps. If it 5387 // already exists there, recursively merge the results together. 5388 AddModifiedNodeToCSEMaps(User, &Listener); 5389 } 5390 5391 // If we just RAUW'd the root, take note. 5392 if (From == getRoot().getNode()) 5393 setRoot(SDValue(To[getRoot().getResNo()])); 5394} 5395 5396/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5397/// uses of other values produced by From.getNode() alone. The Deleted 5398/// vector is handled the same way as for ReplaceAllUsesWith. 5399void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5400 DAGUpdateListener *UpdateListener){ 5401 // Handle the really simple, really trivial case efficiently. 5402 if (From == To) return; 5403 5404 // Handle the simple, trivial, case efficiently. 5405 if (From.getNode()->getNumValues() == 1) { 5406 ReplaceAllUsesWith(From, To, UpdateListener); 5407 return; 5408 } 5409 5410 // Iterate over just the existing users of From. See the comments in 5411 // the ReplaceAllUsesWith above. 5412 SDNode::use_iterator UI = From.getNode()->use_begin(), 5413 UE = From.getNode()->use_end(); 5414 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5415 while (UI != UE) { 5416 SDNode *User = *UI; 5417 bool UserRemovedFromCSEMaps = false; 5418 5419 // A user can appear in a use list multiple times, and when this 5420 // happens the uses are usually next to each other in the list. 5421 // To help reduce the number of CSE recomputations, process all 5422 // the uses of this user that we can find this way. 5423 do { 5424 SDUse &Use = UI.getUse(); 5425 5426 // Skip uses of different values from the same node. 5427 if (Use.getResNo() != From.getResNo()) { 5428 ++UI; 5429 continue; 5430 } 5431 5432 // If this node hasn't been modified yet, it's still in the CSE maps, 5433 // so remove its old self from the CSE maps. 5434 if (!UserRemovedFromCSEMaps) { 5435 RemoveNodeFromCSEMaps(User); 5436 UserRemovedFromCSEMaps = true; 5437 } 5438 5439 ++UI; 5440 Use.set(To); 5441 } while (UI != UE && *UI == User); 5442 5443 // We are iterating over all uses of the From node, so if a use 5444 // doesn't use the specific value, no changes are made. 5445 if (!UserRemovedFromCSEMaps) 5446 continue; 5447 5448 // Now that we have modified User, add it back to the CSE maps. If it 5449 // already exists there, recursively merge the results together. 5450 AddModifiedNodeToCSEMaps(User, &Listener); 5451 } 5452 5453 // If we just RAUW'd the root, take note. 5454 if (From == getRoot()) 5455 setRoot(To); 5456} 5457 5458namespace { 5459 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5460 /// to record information about a use. 5461 struct UseMemo { 5462 SDNode *User; 5463 unsigned Index; 5464 SDUse *Use; 5465 }; 5466 5467 /// operator< - Sort Memos by User. 5468 bool operator<(const UseMemo &L, const UseMemo &R) { 5469 return (intptr_t)L.User < (intptr_t)R.User; 5470 } 5471} 5472 5473/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5474/// uses of other values produced by From.getNode() alone. The same value 5475/// may appear in both the From and To list. The Deleted vector is 5476/// handled the same way as for ReplaceAllUsesWith. 5477void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5478 const SDValue *To, 5479 unsigned Num, 5480 DAGUpdateListener *UpdateListener){ 5481 // Handle the simple, trivial case efficiently. 5482 if (Num == 1) 5483 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5484 5485 // Read up all the uses and make records of them. This helps 5486 // processing new uses that are introduced during the 5487 // replacement process. 5488 SmallVector<UseMemo, 4> Uses; 5489 for (unsigned i = 0; i != Num; ++i) { 5490 unsigned FromResNo = From[i].getResNo(); 5491 SDNode *FromNode = From[i].getNode(); 5492 for (SDNode::use_iterator UI = FromNode->use_begin(), 5493 E = FromNode->use_end(); UI != E; ++UI) { 5494 SDUse &Use = UI.getUse(); 5495 if (Use.getResNo() == FromResNo) { 5496 UseMemo Memo = { *UI, i, &Use }; 5497 Uses.push_back(Memo); 5498 } 5499 } 5500 } 5501 5502 // Sort the uses, so that all the uses from a given User are together. 5503 std::sort(Uses.begin(), Uses.end()); 5504 5505 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5506 UseIndex != UseIndexEnd; ) { 5507 // We know that this user uses some value of From. If it is the right 5508 // value, update it. 5509 SDNode *User = Uses[UseIndex].User; 5510 5511 // This node is about to morph, remove its old self from the CSE maps. 5512 RemoveNodeFromCSEMaps(User); 5513 5514 // The Uses array is sorted, so all the uses for a given User 5515 // are next to each other in the list. 5516 // To help reduce the number of CSE recomputations, process all 5517 // the uses of this user that we can find this way. 5518 do { 5519 unsigned i = Uses[UseIndex].Index; 5520 SDUse &Use = *Uses[UseIndex].Use; 5521 ++UseIndex; 5522 5523 Use.set(To[i]); 5524 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5525 5526 // Now that we have modified User, add it back to the CSE maps. If it 5527 // already exists there, recursively merge the results together. 5528 AddModifiedNodeToCSEMaps(User, UpdateListener); 5529 } 5530} 5531 5532/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5533/// based on their topological order. It returns the maximum id and a vector 5534/// of the SDNodes* in assigned order by reference. 5535unsigned SelectionDAG::AssignTopologicalOrder() { 5536 5537 unsigned DAGSize = 0; 5538 5539 // SortedPos tracks the progress of the algorithm. Nodes before it are 5540 // sorted, nodes after it are unsorted. When the algorithm completes 5541 // it is at the end of the list. 5542 allnodes_iterator SortedPos = allnodes_begin(); 5543 5544 // Visit all the nodes. Move nodes with no operands to the front of 5545 // the list immediately. Annotate nodes that do have operands with their 5546 // operand count. Before we do this, the Node Id fields of the nodes 5547 // may contain arbitrary values. After, the Node Id fields for nodes 5548 // before SortedPos will contain the topological sort index, and the 5549 // Node Id fields for nodes At SortedPos and after will contain the 5550 // count of outstanding operands. 5551 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5552 SDNode *N = I++; 5553 checkForCycles(N); 5554 unsigned Degree = N->getNumOperands(); 5555 if (Degree == 0) { 5556 // A node with no uses, add it to the result array immediately. 5557 N->setNodeId(DAGSize++); 5558 allnodes_iterator Q = N; 5559 if (Q != SortedPos) 5560 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5561 assert(SortedPos != AllNodes.end() && "Overran node list"); 5562 ++SortedPos; 5563 } else { 5564 // Temporarily use the Node Id as scratch space for the degree count. 5565 N->setNodeId(Degree); 5566 } 5567 } 5568 5569 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5570 // such that by the time the end is reached all nodes will be sorted. 5571 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5572 SDNode *N = I; 5573 checkForCycles(N); 5574 // N is in sorted position, so all its uses have one less operand 5575 // that needs to be sorted. 5576 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5577 UI != UE; ++UI) { 5578 SDNode *P = *UI; 5579 unsigned Degree = P->getNodeId(); 5580 assert(Degree != 0 && "Invalid node degree"); 5581 --Degree; 5582 if (Degree == 0) { 5583 // All of P's operands are sorted, so P may sorted now. 5584 P->setNodeId(DAGSize++); 5585 if (P != SortedPos) 5586 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5587 assert(SortedPos != AllNodes.end() && "Overran node list"); 5588 ++SortedPos; 5589 } else { 5590 // Update P's outstanding operand count. 5591 P->setNodeId(Degree); 5592 } 5593 } 5594 if (I == SortedPos) { 5595#ifndef NDEBUG 5596 SDNode *S = ++I; 5597 dbgs() << "Overran sorted position:\n"; 5598 S->dumprFull(); 5599#endif 5600 llvm_unreachable(0); 5601 } 5602 } 5603 5604 assert(SortedPos == AllNodes.end() && 5605 "Topological sort incomplete!"); 5606 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5607 "First node in topological sort is not the entry token!"); 5608 assert(AllNodes.front().getNodeId() == 0 && 5609 "First node in topological sort has non-zero id!"); 5610 assert(AllNodes.front().getNumOperands() == 0 && 5611 "First node in topological sort has operands!"); 5612 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5613 "Last node in topologic sort has unexpected id!"); 5614 assert(AllNodes.back().use_empty() && 5615 "Last node in topologic sort has users!"); 5616 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5617 return DAGSize; 5618} 5619 5620/// AssignOrdering - Assign an order to the SDNode. 5621void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5622 assert(SD && "Trying to assign an order to a null node!"); 5623 Ordering->add(SD, Order); 5624} 5625 5626/// GetOrdering - Get the order for the SDNode. 5627unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5628 assert(SD && "Trying to get the order of a null node!"); 5629 return Ordering->getOrder(SD); 5630} 5631 5632/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5633/// value is produced by SD. 5634void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5635 DbgInfo->add(DB, SD, isParameter); 5636 if (SD) 5637 SD->setHasDebugValue(true); 5638} 5639 5640/// TransferDbgValues - Transfer SDDbgValues. 5641void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5642 if (From == To || !From.getNode()->getHasDebugValue()) 5643 return; 5644 SDNode *FromNode = From.getNode(); 5645 SDNode *ToNode = To.getNode(); 5646 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5647 SmallVector<SDDbgValue *, 2> ClonedDVs; 5648 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5649 I != E; ++I) { 5650 SDDbgValue *Dbg = *I; 5651 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5652 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5653 Dbg->getOffset(), Dbg->getDebugLoc(), 5654 Dbg->getOrder()); 5655 ClonedDVs.push_back(Clone); 5656 } 5657 } 5658 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5659 E = ClonedDVs.end(); I != E; ++I) 5660 AddDbgValue(*I, ToNode, false); 5661} 5662 5663//===----------------------------------------------------------------------===// 5664// SDNode Class 5665//===----------------------------------------------------------------------===// 5666 5667HandleSDNode::~HandleSDNode() { 5668 DropOperands(); 5669} 5670 5671GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5672 const GlobalValue *GA, 5673 EVT VT, int64_t o, unsigned char TF) 5674 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5675 TheGlobal = GA; 5676} 5677 5678MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5679 MachineMemOperand *mmo) 5680 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5681 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5682 MMO->isNonTemporal()); 5683 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5684 assert(isNonTemporal() == MMO->isNonTemporal() && 5685 "Non-temporal encoding error!"); 5686 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5687} 5688 5689MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5690 const SDValue *Ops, unsigned NumOps, EVT memvt, 5691 MachineMemOperand *mmo) 5692 : SDNode(Opc, dl, VTs, Ops, NumOps), 5693 MemoryVT(memvt), MMO(mmo) { 5694 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5695 MMO->isNonTemporal()); 5696 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5697 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5698} 5699 5700/// Profile - Gather unique data for the node. 5701/// 5702void SDNode::Profile(FoldingSetNodeID &ID) const { 5703 AddNodeIDNode(ID, this); 5704} 5705 5706namespace { 5707 struct EVTArray { 5708 std::vector<EVT> VTs; 5709 5710 EVTArray() { 5711 VTs.reserve(MVT::LAST_VALUETYPE); 5712 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5713 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5714 } 5715 }; 5716} 5717 5718static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5719static ManagedStatic<EVTArray> SimpleVTArray; 5720static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5721 5722/// getValueTypeList - Return a pointer to the specified value type. 5723/// 5724const EVT *SDNode::getValueTypeList(EVT VT) { 5725 if (VT.isExtended()) { 5726 sys::SmartScopedLock<true> Lock(*VTMutex); 5727 return &(*EVTs->insert(VT).first); 5728 } else { 5729 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5730 "Value type out of range!"); 5731 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5732 } 5733} 5734 5735/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5736/// indicated value. This method ignores uses of other values defined by this 5737/// operation. 5738bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5739 assert(Value < getNumValues() && "Bad value!"); 5740 5741 // TODO: Only iterate over uses of a given value of the node 5742 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5743 if (UI.getUse().getResNo() == Value) { 5744 if (NUses == 0) 5745 return false; 5746 --NUses; 5747 } 5748 } 5749 5750 // Found exactly the right number of uses? 5751 return NUses == 0; 5752} 5753 5754 5755/// hasAnyUseOfValue - Return true if there are any use of the indicated 5756/// value. This method ignores uses of other values defined by this operation. 5757bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5758 assert(Value < getNumValues() && "Bad value!"); 5759 5760 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5761 if (UI.getUse().getResNo() == Value) 5762 return true; 5763 5764 return false; 5765} 5766 5767 5768/// isOnlyUserOf - Return true if this node is the only use of N. 5769/// 5770bool SDNode::isOnlyUserOf(SDNode *N) const { 5771 bool Seen = false; 5772 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5773 SDNode *User = *I; 5774 if (User == this) 5775 Seen = true; 5776 else 5777 return false; 5778 } 5779 5780 return Seen; 5781} 5782 5783/// isOperand - Return true if this node is an operand of N. 5784/// 5785bool SDValue::isOperandOf(SDNode *N) const { 5786 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5787 if (*this == N->getOperand(i)) 5788 return true; 5789 return false; 5790} 5791 5792bool SDNode::isOperandOf(SDNode *N) const { 5793 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5794 if (this == N->OperandList[i].getNode()) 5795 return true; 5796 return false; 5797} 5798 5799/// reachesChainWithoutSideEffects - Return true if this operand (which must 5800/// be a chain) reaches the specified operand without crossing any 5801/// side-effecting instructions on any chain path. In practice, this looks 5802/// through token factors and non-volatile loads. In order to remain efficient, 5803/// this only looks a couple of nodes in, it does not do an exhaustive search. 5804bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5805 unsigned Depth) const { 5806 if (*this == Dest) return true; 5807 5808 // Don't search too deeply, we just want to be able to see through 5809 // TokenFactor's etc. 5810 if (Depth == 0) return false; 5811 5812 // If this is a token factor, all inputs to the TF happen in parallel. If any 5813 // of the operands of the TF does not reach dest, then we cannot do the xform. 5814 if (getOpcode() == ISD::TokenFactor) { 5815 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5816 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5817 return false; 5818 return true; 5819 } 5820 5821 // Loads don't have side effects, look through them. 5822 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5823 if (!Ld->isVolatile()) 5824 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5825 } 5826 return false; 5827} 5828 5829/// hasPredecessor - Return true if N is a predecessor of this node. 5830/// N is either an operand of this node, or can be reached by recursively 5831/// traversing up the operands. 5832/// NOTE: This is an expensive method. Use it carefully. 5833bool SDNode::hasPredecessor(const SDNode *N) const { 5834 SmallPtrSet<const SDNode *, 32> Visited; 5835 SmallVector<const SDNode *, 16> Worklist; 5836 return hasPredecessorHelper(N, Visited, Worklist); 5837} 5838 5839bool SDNode::hasPredecessorHelper(const SDNode *N, 5840 SmallPtrSet<const SDNode *, 32> &Visited, 5841 SmallVector<const SDNode *, 16> &Worklist) const { 5842 if (Visited.empty()) { 5843 Worklist.push_back(this); 5844 } else { 5845 // Take a look in the visited set. If we've already encountered this node 5846 // we needn't search further. 5847 if (Visited.count(N)) 5848 return true; 5849 } 5850 5851 // Haven't visited N yet. Continue the search. 5852 while (!Worklist.empty()) { 5853 const SDNode *M = Worklist.pop_back_val(); 5854 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5855 SDNode *Op = M->getOperand(i).getNode(); 5856 if (Visited.insert(Op)) 5857 Worklist.push_back(Op); 5858 if (Op == N) 5859 return true; 5860 } 5861 } 5862 5863 return false; 5864} 5865 5866uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5867 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5868 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5869} 5870 5871std::string SDNode::getOperationName(const SelectionDAG *G) const { 5872 switch (getOpcode()) { 5873 default: 5874 if (getOpcode() < ISD::BUILTIN_OP_END) 5875 return "<<Unknown DAG Node>>"; 5876 if (isMachineOpcode()) { 5877 if (G) 5878 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5879 if (getMachineOpcode() < TII->getNumOpcodes()) 5880 return TII->get(getMachineOpcode()).getName(); 5881 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5882 } 5883 if (G) { 5884 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5885 const char *Name = TLI.getTargetNodeName(getOpcode()); 5886 if (Name) return Name; 5887 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5888 } 5889 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5890 5891#ifndef NDEBUG 5892 case ISD::DELETED_NODE: 5893 return "<<Deleted Node!>>"; 5894#endif 5895 case ISD::PREFETCH: return "Prefetch"; 5896 case ISD::MEMBARRIER: return "MemBarrier"; 5897 case ISD::ATOMIC_FENCE: return "AtomicFence"; 5898 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5899 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5900 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5901 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5902 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5903 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5904 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5905 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5906 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5907 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5908 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5909 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5910 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 5911 case ISD::ATOMIC_STORE: return "AtomicStore"; 5912 case ISD::PCMARKER: return "PCMarker"; 5913 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5914 case ISD::SRCVALUE: return "SrcValue"; 5915 case ISD::MDNODE_SDNODE: return "MDNode"; 5916 case ISD::EntryToken: return "EntryToken"; 5917 case ISD::TokenFactor: return "TokenFactor"; 5918 case ISD::AssertSext: return "AssertSext"; 5919 case ISD::AssertZext: return "AssertZext"; 5920 5921 case ISD::BasicBlock: return "BasicBlock"; 5922 case ISD::VALUETYPE: return "ValueType"; 5923 case ISD::Register: return "Register"; 5924 5925 case ISD::Constant: return "Constant"; 5926 case ISD::ConstantFP: return "ConstantFP"; 5927 case ISD::GlobalAddress: return "GlobalAddress"; 5928 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5929 case ISD::FrameIndex: return "FrameIndex"; 5930 case ISD::JumpTable: return "JumpTable"; 5931 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5932 case ISD::RETURNADDR: return "RETURNADDR"; 5933 case ISD::FRAMEADDR: return "FRAMEADDR"; 5934 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5935 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5936 case ISD::LSDAADDR: return "LSDAADDR"; 5937 case ISD::EHSELECTION: return "EHSELECTION"; 5938 case ISD::EH_RETURN: return "EH_RETURN"; 5939 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5940 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5941 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP"; 5942 case ISD::ConstantPool: return "ConstantPool"; 5943 case ISD::ExternalSymbol: return "ExternalSymbol"; 5944 case ISD::BlockAddress: return "BlockAddress"; 5945 case ISD::INTRINSIC_WO_CHAIN: 5946 case ISD::INTRINSIC_VOID: 5947 case ISD::INTRINSIC_W_CHAIN: { 5948 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5949 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5950 if (IID < Intrinsic::num_intrinsics) 5951 return Intrinsic::getName((Intrinsic::ID)IID); 5952 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5953 return TII->getName(IID); 5954 llvm_unreachable("Invalid intrinsic ID"); 5955 } 5956 5957 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5958 case ISD::TargetConstant: return "TargetConstant"; 5959 case ISD::TargetConstantFP:return "TargetConstantFP"; 5960 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5961 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5962 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5963 case ISD::TargetJumpTable: return "TargetJumpTable"; 5964 case ISD::TargetConstantPool: return "TargetConstantPool"; 5965 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5966 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5967 5968 case ISD::CopyToReg: return "CopyToReg"; 5969 case ISD::CopyFromReg: return "CopyFromReg"; 5970 case ISD::UNDEF: return "undef"; 5971 case ISD::MERGE_VALUES: return "merge_values"; 5972 case ISD::INLINEASM: return "inlineasm"; 5973 case ISD::EH_LABEL: return "eh_label"; 5974 case ISD::HANDLENODE: return "handlenode"; 5975 5976 // Unary operators 5977 case ISD::FABS: return "fabs"; 5978 case ISD::FNEG: return "fneg"; 5979 case ISD::FSQRT: return "fsqrt"; 5980 case ISD::FSIN: return "fsin"; 5981 case ISD::FCOS: return "fcos"; 5982 case ISD::FTRUNC: return "ftrunc"; 5983 case ISD::FFLOOR: return "ffloor"; 5984 case ISD::FCEIL: return "fceil"; 5985 case ISD::FRINT: return "frint"; 5986 case ISD::FNEARBYINT: return "fnearbyint"; 5987 case ISD::FEXP: return "fexp"; 5988 case ISD::FEXP2: return "fexp2"; 5989 case ISD::FLOG: return "flog"; 5990 case ISD::FLOG2: return "flog2"; 5991 case ISD::FLOG10: return "flog10"; 5992 5993 // Binary operators 5994 case ISD::ADD: return "add"; 5995 case ISD::SUB: return "sub"; 5996 case ISD::MUL: return "mul"; 5997 case ISD::MULHU: return "mulhu"; 5998 case ISD::MULHS: return "mulhs"; 5999 case ISD::SDIV: return "sdiv"; 6000 case ISD::UDIV: return "udiv"; 6001 case ISD::SREM: return "srem"; 6002 case ISD::UREM: return "urem"; 6003 case ISD::SMUL_LOHI: return "smul_lohi"; 6004 case ISD::UMUL_LOHI: return "umul_lohi"; 6005 case ISD::SDIVREM: return "sdivrem"; 6006 case ISD::UDIVREM: return "udivrem"; 6007 case ISD::AND: return "and"; 6008 case ISD::OR: return "or"; 6009 case ISD::XOR: return "xor"; 6010 case ISD::SHL: return "shl"; 6011 case ISD::SRA: return "sra"; 6012 case ISD::SRL: return "srl"; 6013 case ISD::ROTL: return "rotl"; 6014 case ISD::ROTR: return "rotr"; 6015 case ISD::FADD: return "fadd"; 6016 case ISD::FSUB: return "fsub"; 6017 case ISD::FMUL: return "fmul"; 6018 case ISD::FDIV: return "fdiv"; 6019 case ISD::FMA: return "fma"; 6020 case ISD::FREM: return "frem"; 6021 case ISD::FCOPYSIGN: return "fcopysign"; 6022 case ISD::FGETSIGN: return "fgetsign"; 6023 case ISD::FPOW: return "fpow"; 6024 6025 case ISD::FPOWI: return "fpowi"; 6026 case ISD::SETCC: return "setcc"; 6027 case ISD::SELECT: return "select"; 6028 case ISD::VSELECT: return "vselect"; 6029 case ISD::SELECT_CC: return "select_cc"; 6030 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 6031 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 6032 case ISD::CONCAT_VECTORS: return "concat_vectors"; 6033 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 6034 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 6035 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 6036 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 6037 case ISD::CARRY_FALSE: return "carry_false"; 6038 case ISD::ADDC: return "addc"; 6039 case ISD::ADDE: return "adde"; 6040 case ISD::SADDO: return "saddo"; 6041 case ISD::UADDO: return "uaddo"; 6042 case ISD::SSUBO: return "ssubo"; 6043 case ISD::USUBO: return "usubo"; 6044 case ISD::SMULO: return "smulo"; 6045 case ISD::UMULO: return "umulo"; 6046 case ISD::SUBC: return "subc"; 6047 case ISD::SUBE: return "sube"; 6048 case ISD::SHL_PARTS: return "shl_parts"; 6049 case ISD::SRA_PARTS: return "sra_parts"; 6050 case ISD::SRL_PARTS: return "srl_parts"; 6051 6052 // Conversion operators. 6053 case ISD::SIGN_EXTEND: return "sign_extend"; 6054 case ISD::ZERO_EXTEND: return "zero_extend"; 6055 case ISD::ANY_EXTEND: return "any_extend"; 6056 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 6057 case ISD::TRUNCATE: return "truncate"; 6058 case ISD::FP_ROUND: return "fp_round"; 6059 case ISD::FLT_ROUNDS_: return "flt_rounds"; 6060 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 6061 case ISD::FP_EXTEND: return "fp_extend"; 6062 6063 case ISD::SINT_TO_FP: return "sint_to_fp"; 6064 case ISD::UINT_TO_FP: return "uint_to_fp"; 6065 case ISD::FP_TO_SINT: return "fp_to_sint"; 6066 case ISD::FP_TO_UINT: return "fp_to_uint"; 6067 case ISD::BITCAST: return "bitcast"; 6068 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 6069 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 6070 6071 case ISD::CONVERT_RNDSAT: { 6072 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 6073 default: llvm_unreachable("Unknown cvt code!"); 6074 case ISD::CVT_FF: return "cvt_ff"; 6075 case ISD::CVT_FS: return "cvt_fs"; 6076 case ISD::CVT_FU: return "cvt_fu"; 6077 case ISD::CVT_SF: return "cvt_sf"; 6078 case ISD::CVT_UF: return "cvt_uf"; 6079 case ISD::CVT_SS: return "cvt_ss"; 6080 case ISD::CVT_SU: return "cvt_su"; 6081 case ISD::CVT_US: return "cvt_us"; 6082 case ISD::CVT_UU: return "cvt_uu"; 6083 } 6084 } 6085 6086 // Control flow instructions 6087 case ISD::BR: return "br"; 6088 case ISD::BRIND: return "brind"; 6089 case ISD::BR_JT: return "br_jt"; 6090 case ISD::BRCOND: return "brcond"; 6091 case ISD::BR_CC: return "br_cc"; 6092 case ISD::CALLSEQ_START: return "callseq_start"; 6093 case ISD::CALLSEQ_END: return "callseq_end"; 6094 6095 // Other operators 6096 case ISD::LOAD: return "load"; 6097 case ISD::STORE: return "store"; 6098 case ISD::VAARG: return "vaarg"; 6099 case ISD::VACOPY: return "vacopy"; 6100 case ISD::VAEND: return "vaend"; 6101 case ISD::VASTART: return "vastart"; 6102 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 6103 case ISD::EXTRACT_ELEMENT: return "extract_element"; 6104 case ISD::BUILD_PAIR: return "build_pair"; 6105 case ISD::STACKSAVE: return "stacksave"; 6106 case ISD::STACKRESTORE: return "stackrestore"; 6107 case ISD::TRAP: return "trap"; 6108 6109 // Bit manipulation 6110 case ISD::BSWAP: return "bswap"; 6111 case ISD::CTPOP: return "ctpop"; 6112 case ISD::CTTZ: return "cttz"; 6113 case ISD::CTLZ: return "ctlz"; 6114 6115 // Trampolines 6116 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 6117 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 6118 6119 case ISD::CONDCODE: 6120 switch (cast<CondCodeSDNode>(this)->get()) { 6121 default: llvm_unreachable("Unknown setcc condition!"); 6122 case ISD::SETOEQ: return "setoeq"; 6123 case ISD::SETOGT: return "setogt"; 6124 case ISD::SETOGE: return "setoge"; 6125 case ISD::SETOLT: return "setolt"; 6126 case ISD::SETOLE: return "setole"; 6127 case ISD::SETONE: return "setone"; 6128 6129 case ISD::SETO: return "seto"; 6130 case ISD::SETUO: return "setuo"; 6131 case ISD::SETUEQ: return "setue"; 6132 case ISD::SETUGT: return "setugt"; 6133 case ISD::SETUGE: return "setuge"; 6134 case ISD::SETULT: return "setult"; 6135 case ISD::SETULE: return "setule"; 6136 case ISD::SETUNE: return "setune"; 6137 6138 case ISD::SETEQ: return "seteq"; 6139 case ISD::SETGT: return "setgt"; 6140 case ISD::SETGE: return "setge"; 6141 case ISD::SETLT: return "setlt"; 6142 case ISD::SETLE: return "setle"; 6143 case ISD::SETNE: return "setne"; 6144 } 6145 } 6146} 6147 6148const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 6149 switch (AM) { 6150 default: 6151 return ""; 6152 case ISD::PRE_INC: 6153 return "<pre-inc>"; 6154 case ISD::PRE_DEC: 6155 return "<pre-dec>"; 6156 case ISD::POST_INC: 6157 return "<post-inc>"; 6158 case ISD::POST_DEC: 6159 return "<post-dec>"; 6160 } 6161} 6162 6163std::string ISD::ArgFlagsTy::getArgFlagsString() { 6164 std::string S = "< "; 6165 6166 if (isZExt()) 6167 S += "zext "; 6168 if (isSExt()) 6169 S += "sext "; 6170 if (isInReg()) 6171 S += "inreg "; 6172 if (isSRet()) 6173 S += "sret "; 6174 if (isByVal()) 6175 S += "byval "; 6176 if (isNest()) 6177 S += "nest "; 6178 if (getByValAlign()) 6179 S += "byval-align:" + utostr(getByValAlign()) + " "; 6180 if (getOrigAlign()) 6181 S += "orig-align:" + utostr(getOrigAlign()) + " "; 6182 if (getByValSize()) 6183 S += "byval-size:" + utostr(getByValSize()) + " "; 6184 return S + ">"; 6185} 6186 6187void SDNode::dump() const { dump(0); } 6188void SDNode::dump(const SelectionDAG *G) const { 6189 print(dbgs(), G); 6190 dbgs() << '\n'; 6191} 6192 6193void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 6194 OS << (void*)this << ": "; 6195 6196 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 6197 if (i) OS << ","; 6198 if (getValueType(i) == MVT::Other) 6199 OS << "ch"; 6200 else 6201 OS << getValueType(i).getEVTString(); 6202 } 6203 OS << " = " << getOperationName(G); 6204} 6205 6206void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 6207 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 6208 if (!MN->memoperands_empty()) { 6209 OS << "<"; 6210 OS << "Mem:"; 6211 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 6212 e = MN->memoperands_end(); i != e; ++i) { 6213 OS << **i; 6214 if (llvm::next(i) != e) 6215 OS << " "; 6216 } 6217 OS << ">"; 6218 } 6219 } else if (const ShuffleVectorSDNode *SVN = 6220 dyn_cast<ShuffleVectorSDNode>(this)) { 6221 OS << "<"; 6222 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 6223 int Idx = SVN->getMaskElt(i); 6224 if (i) OS << ","; 6225 if (Idx < 0) 6226 OS << "u"; 6227 else 6228 OS << Idx; 6229 } 6230 OS << ">"; 6231 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 6232 OS << '<' << CSDN->getAPIntValue() << '>'; 6233 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 6234 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 6235 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 6236 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 6237 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 6238 else { 6239 OS << "<APFloat("; 6240 CSDN->getValueAPF().bitcastToAPInt().dump(); 6241 OS << ")>"; 6242 } 6243 } else if (const GlobalAddressSDNode *GADN = 6244 dyn_cast<GlobalAddressSDNode>(this)) { 6245 int64_t offset = GADN->getOffset(); 6246 OS << '<'; 6247 WriteAsOperand(OS, GADN->getGlobal()); 6248 OS << '>'; 6249 if (offset > 0) 6250 OS << " + " << offset; 6251 else 6252 OS << " " << offset; 6253 if (unsigned int TF = GADN->getTargetFlags()) 6254 OS << " [TF=" << TF << ']'; 6255 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 6256 OS << "<" << FIDN->getIndex() << ">"; 6257 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 6258 OS << "<" << JTDN->getIndex() << ">"; 6259 if (unsigned int TF = JTDN->getTargetFlags()) 6260 OS << " [TF=" << TF << ']'; 6261 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 6262 int offset = CP->getOffset(); 6263 if (CP->isMachineConstantPoolEntry()) 6264 OS << "<" << *CP->getMachineCPVal() << ">"; 6265 else 6266 OS << "<" << *CP->getConstVal() << ">"; 6267 if (offset > 0) 6268 OS << " + " << offset; 6269 else 6270 OS << " " << offset; 6271 if (unsigned int TF = CP->getTargetFlags()) 6272 OS << " [TF=" << TF << ']'; 6273 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 6274 OS << "<"; 6275 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 6276 if (LBB) 6277 OS << LBB->getName() << " "; 6278 OS << (const void*)BBDN->getBasicBlock() << ">"; 6279 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 6280 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0); 6281 } else if (const ExternalSymbolSDNode *ES = 6282 dyn_cast<ExternalSymbolSDNode>(this)) { 6283 OS << "'" << ES->getSymbol() << "'"; 6284 if (unsigned int TF = ES->getTargetFlags()) 6285 OS << " [TF=" << TF << ']'; 6286 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 6287 if (M->getValue()) 6288 OS << "<" << M->getValue() << ">"; 6289 else 6290 OS << "<null>"; 6291 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 6292 if (MD->getMD()) 6293 OS << "<" << MD->getMD() << ">"; 6294 else 6295 OS << "<null>"; 6296 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6297 OS << ":" << N->getVT().getEVTString(); 6298 } 6299 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6300 OS << "<" << *LD->getMemOperand(); 6301 6302 bool doExt = true; 6303 switch (LD->getExtensionType()) { 6304 default: doExt = false; break; 6305 case ISD::EXTLOAD: OS << ", anyext"; break; 6306 case ISD::SEXTLOAD: OS << ", sext"; break; 6307 case ISD::ZEXTLOAD: OS << ", zext"; break; 6308 } 6309 if (doExt) 6310 OS << " from " << LD->getMemoryVT().getEVTString(); 6311 6312 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6313 if (*AM) 6314 OS << ", " << AM; 6315 6316 OS << ">"; 6317 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6318 OS << "<" << *ST->getMemOperand(); 6319 6320 if (ST->isTruncatingStore()) 6321 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6322 6323 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6324 if (*AM) 6325 OS << ", " << AM; 6326 6327 OS << ">"; 6328 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6329 OS << "<" << *M->getMemOperand() << ">"; 6330 } else if (const BlockAddressSDNode *BA = 6331 dyn_cast<BlockAddressSDNode>(this)) { 6332 OS << "<"; 6333 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6334 OS << ", "; 6335 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6336 OS << ">"; 6337 if (unsigned int TF = BA->getTargetFlags()) 6338 OS << " [TF=" << TF << ']'; 6339 } 6340 6341 if (G) 6342 if (unsigned Order = G->GetOrdering(this)) 6343 OS << " [ORD=" << Order << ']'; 6344 6345 if (getNodeId() != -1) 6346 OS << " [ID=" << getNodeId() << ']'; 6347 6348 DebugLoc dl = getDebugLoc(); 6349 if (G && !dl.isUnknown()) { 6350 DIScope 6351 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6352 OS << " dbg:"; 6353 // Omit the directory, since it's usually long and uninteresting. 6354 if (Scope.Verify()) 6355 OS << Scope.getFilename(); 6356 else 6357 OS << "<unknown>"; 6358 OS << ':' << dl.getLine(); 6359 if (dl.getCol() != 0) 6360 OS << ':' << dl.getCol(); 6361 } 6362} 6363 6364void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6365 print_types(OS, G); 6366 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6367 if (i) OS << ", "; else OS << " "; 6368 OS << (void*)getOperand(i).getNode(); 6369 if (unsigned RN = getOperand(i).getResNo()) 6370 OS << ":" << RN; 6371 } 6372 print_details(OS, G); 6373} 6374 6375static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6376 const SelectionDAG *G, unsigned depth, 6377 unsigned indent) { 6378 if (depth == 0) 6379 return; 6380 6381 OS.indent(indent); 6382 6383 N->print(OS, G); 6384 6385 if (depth < 1) 6386 return; 6387 6388 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6389 // Don't follow chain operands. 6390 if (N->getOperand(i).getValueType() == MVT::Other) 6391 continue; 6392 OS << '\n'; 6393 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6394 } 6395} 6396 6397void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6398 unsigned depth) const { 6399 printrWithDepthHelper(OS, this, G, depth, 0); 6400} 6401 6402void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6403 // Don't print impossibly deep things. 6404 printrWithDepth(OS, G, 10); 6405} 6406 6407void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6408 printrWithDepth(dbgs(), G, depth); 6409} 6410 6411void SDNode::dumprFull(const SelectionDAG *G) const { 6412 // Don't print impossibly deep things. 6413 dumprWithDepth(G, 10); 6414} 6415 6416static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6417 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6418 if (N->getOperand(i).getNode()->hasOneUse()) 6419 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6420 else 6421 dbgs() << "\n" << std::string(indent+2, ' ') 6422 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6423 6424 6425 dbgs() << "\n"; 6426 dbgs().indent(indent); 6427 N->dump(G); 6428} 6429 6430SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6431 assert(N->getNumValues() == 1 && 6432 "Can't unroll a vector with multiple results!"); 6433 6434 EVT VT = N->getValueType(0); 6435 unsigned NE = VT.getVectorNumElements(); 6436 EVT EltVT = VT.getVectorElementType(); 6437 DebugLoc dl = N->getDebugLoc(); 6438 6439 SmallVector<SDValue, 8> Scalars; 6440 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6441 6442 // If ResNE is 0, fully unroll the vector op. 6443 if (ResNE == 0) 6444 ResNE = NE; 6445 else if (NE > ResNE) 6446 NE = ResNE; 6447 6448 unsigned i; 6449 for (i= 0; i != NE; ++i) { 6450 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6451 SDValue Operand = N->getOperand(j); 6452 EVT OperandVT = Operand.getValueType(); 6453 if (OperandVT.isVector()) { 6454 // A vector operand; extract a single element. 6455 EVT OperandEltVT = OperandVT.getVectorElementType(); 6456 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6457 OperandEltVT, 6458 Operand, 6459 getConstant(i, TLI.getPointerTy())); 6460 } else { 6461 // A scalar operand; just use it as is. 6462 Operands[j] = Operand; 6463 } 6464 } 6465 6466 switch (N->getOpcode()) { 6467 default: 6468 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6469 &Operands[0], Operands.size())); 6470 break; 6471 case ISD::VSELECT: 6472 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6473 &Operands[0], Operands.size())); 6474 break; 6475 case ISD::SHL: 6476 case ISD::SRA: 6477 case ISD::SRL: 6478 case ISD::ROTL: 6479 case ISD::ROTR: 6480 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6481 getShiftAmountOperand(Operands[0].getValueType(), 6482 Operands[1]))); 6483 break; 6484 case ISD::SIGN_EXTEND_INREG: 6485 case ISD::FP_ROUND_INREG: { 6486 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6487 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6488 Operands[0], 6489 getValueType(ExtVT))); 6490 } 6491 } 6492 } 6493 6494 for (; i < ResNE; ++i) 6495 Scalars.push_back(getUNDEF(EltVT)); 6496 6497 return getNode(ISD::BUILD_VECTOR, dl, 6498 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6499 &Scalars[0], Scalars.size()); 6500} 6501 6502 6503/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6504/// location that is 'Dist' units away from the location that the 'Base' load 6505/// is loading from. 6506bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6507 unsigned Bytes, int Dist) const { 6508 if (LD->getChain() != Base->getChain()) 6509 return false; 6510 EVT VT = LD->getValueType(0); 6511 if (VT.getSizeInBits() / 8 != Bytes) 6512 return false; 6513 6514 SDValue Loc = LD->getOperand(1); 6515 SDValue BaseLoc = Base->getOperand(1); 6516 if (Loc.getOpcode() == ISD::FrameIndex) { 6517 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6518 return false; 6519 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6520 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6521 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6522 int FS = MFI->getObjectSize(FI); 6523 int BFS = MFI->getObjectSize(BFI); 6524 if (FS != BFS || FS != (int)Bytes) return false; 6525 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6526 } 6527 6528 // Handle X+C 6529 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6530 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6531 return true; 6532 6533 const GlobalValue *GV1 = NULL; 6534 const GlobalValue *GV2 = NULL; 6535 int64_t Offset1 = 0; 6536 int64_t Offset2 = 0; 6537 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6538 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6539 if (isGA1 && isGA2 && GV1 == GV2) 6540 return Offset1 == (Offset2 + Dist*Bytes); 6541 return false; 6542} 6543 6544 6545/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6546/// it cannot be inferred. 6547unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6548 // If this is a GlobalAddress + cst, return the alignment. 6549 const GlobalValue *GV; 6550 int64_t GVOffset = 0; 6551 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6552 // If GV has specified alignment, then use it. Otherwise, use the preferred 6553 // alignment. 6554 unsigned Align = GV->getAlignment(); 6555 if (!Align) { 6556 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6557 if (GVar->hasInitializer()) { 6558 const TargetData *TD = TLI.getTargetData(); 6559 Align = TD->getPreferredAlignment(GVar); 6560 } 6561 } 6562 if (!Align) 6563 Align = TLI.getTargetData()->getABITypeAlignment(GV->getType()); 6564 } 6565 return MinAlign(Align, GVOffset); 6566 } 6567 6568 // If this is a direct reference to a stack slot, use information about the 6569 // stack slot's alignment. 6570 int FrameIdx = 1 << 31; 6571 int64_t FrameOffset = 0; 6572 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6573 FrameIdx = FI->getIndex(); 6574 } else if (isBaseWithConstantOffset(Ptr) && 6575 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6576 // Handle FI+Cst 6577 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6578 FrameOffset = Ptr.getConstantOperandVal(1); 6579 } 6580 6581 if (FrameIdx != (1 << 31)) { 6582 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6583 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6584 FrameOffset); 6585 return FIInfoAlign; 6586 } 6587 6588 return 0; 6589} 6590 6591void SelectionDAG::dump() const { 6592 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6593 6594 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6595 I != E; ++I) { 6596 const SDNode *N = I; 6597 if (!N->hasOneUse() && N != getRoot().getNode()) 6598 DumpNodes(N, 2, this); 6599 } 6600 6601 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6602 6603 dbgs() << "\n\n"; 6604} 6605 6606void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6607 print_types(OS, G); 6608 print_details(OS, G); 6609} 6610 6611typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6612static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6613 const SelectionDAG *G, VisitedSDNodeSet &once) { 6614 if (!once.insert(N)) // If we've been here before, return now. 6615 return; 6616 6617 // Dump the current SDNode, but don't end the line yet. 6618 OS.indent(indent); 6619 N->printr(OS, G); 6620 6621 // Having printed this SDNode, walk the children: 6622 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6623 const SDNode *child = N->getOperand(i).getNode(); 6624 6625 if (i) OS << ","; 6626 OS << " "; 6627 6628 if (child->getNumOperands() == 0) { 6629 // This child has no grandchildren; print it inline right here. 6630 child->printr(OS, G); 6631 once.insert(child); 6632 } else { // Just the address. FIXME: also print the child's opcode. 6633 OS << (void*)child; 6634 if (unsigned RN = N->getOperand(i).getResNo()) 6635 OS << ":" << RN; 6636 } 6637 } 6638 6639 OS << "\n"; 6640 6641 // Dump children that have grandchildren on their own line(s). 6642 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6643 const SDNode *child = N->getOperand(i).getNode(); 6644 DumpNodesr(OS, child, indent+2, G, once); 6645 } 6646} 6647 6648void SDNode::dumpr() const { 6649 VisitedSDNodeSet once; 6650 DumpNodesr(dbgs(), this, 0, 0, once); 6651} 6652 6653void SDNode::dumpr(const SelectionDAG *G) const { 6654 VisitedSDNodeSet once; 6655 DumpNodesr(dbgs(), this, 0, G, once); 6656} 6657 6658 6659// getAddressSpace - Return the address space this GlobalAddress belongs to. 6660unsigned GlobalAddressSDNode::getAddressSpace() const { 6661 return getGlobal()->getType()->getAddressSpace(); 6662} 6663 6664 6665Type *ConstantPoolSDNode::getType() const { 6666 if (isMachineConstantPoolEntry()) 6667 return Val.MachineCPVal->getType(); 6668 return Val.ConstVal->getType(); 6669} 6670 6671bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6672 APInt &SplatUndef, 6673 unsigned &SplatBitSize, 6674 bool &HasAnyUndefs, 6675 unsigned MinSplatBits, 6676 bool isBigEndian) { 6677 EVT VT = getValueType(0); 6678 assert(VT.isVector() && "Expected a vector type"); 6679 unsigned sz = VT.getSizeInBits(); 6680 if (MinSplatBits > sz) 6681 return false; 6682 6683 SplatValue = APInt(sz, 0); 6684 SplatUndef = APInt(sz, 0); 6685 6686 // Get the bits. Bits with undefined values (when the corresponding element 6687 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6688 // in SplatValue. If any of the values are not constant, give up and return 6689 // false. 6690 unsigned int nOps = getNumOperands(); 6691 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6692 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6693 6694 for (unsigned j = 0; j < nOps; ++j) { 6695 unsigned i = isBigEndian ? nOps-1-j : j; 6696 SDValue OpVal = getOperand(i); 6697 unsigned BitPos = j * EltBitSize; 6698 6699 if (OpVal.getOpcode() == ISD::UNDEF) 6700 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6701 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6702 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6703 zextOrTrunc(sz) << BitPos; 6704 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6705 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6706 else 6707 return false; 6708 } 6709 6710 // The build_vector is all constants or undefs. Find the smallest element 6711 // size that splats the vector. 6712 6713 HasAnyUndefs = (SplatUndef != 0); 6714 while (sz > 8) { 6715 6716 unsigned HalfSize = sz / 2; 6717 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6718 APInt LowValue = SplatValue.trunc(HalfSize); 6719 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6720 APInt LowUndef = SplatUndef.trunc(HalfSize); 6721 6722 // If the two halves do not match (ignoring undef bits), stop here. 6723 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6724 MinSplatBits > HalfSize) 6725 break; 6726 6727 SplatValue = HighValue | LowValue; 6728 SplatUndef = HighUndef & LowUndef; 6729 6730 sz = HalfSize; 6731 } 6732 6733 SplatBitSize = sz; 6734 return true; 6735} 6736 6737bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6738 // Find the first non-undef value in the shuffle mask. 6739 unsigned i, e; 6740 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6741 /* search */; 6742 6743 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6744 6745 // Make sure all remaining elements are either undef or the same as the first 6746 // non-undef value. 6747 for (int Idx = Mask[i]; i != e; ++i) 6748 if (Mask[i] >= 0 && Mask[i] != Idx) 6749 return false; 6750 return true; 6751} 6752 6753#ifdef XDEBUG 6754static void checkForCyclesHelper(const SDNode *N, 6755 SmallPtrSet<const SDNode*, 32> &Visited, 6756 SmallPtrSet<const SDNode*, 32> &Checked) { 6757 // If this node has already been checked, don't check it again. 6758 if (Checked.count(N)) 6759 return; 6760 6761 // If a node has already been visited on this depth-first walk, reject it as 6762 // a cycle. 6763 if (!Visited.insert(N)) { 6764 dbgs() << "Offending node:\n"; 6765 N->dumprFull(); 6766 errs() << "Detected cycle in SelectionDAG\n"; 6767 abort(); 6768 } 6769 6770 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6771 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6772 6773 Checked.insert(N); 6774 Visited.erase(N); 6775} 6776#endif 6777 6778void llvm::checkForCycles(const llvm::SDNode *N) { 6779#ifdef XDEBUG 6780 assert(N && "Checking nonexistant SDNode"); 6781 SmallPtrSet<const SDNode*, 32> visited; 6782 SmallPtrSet<const SDNode*, 32> checked; 6783 checkForCyclesHelper(N, visited, checked); 6784#endif 6785} 6786 6787void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6788 checkForCycles(DAG->getRoot().getNode()); 6789} 6790