SelectionDAG.cpp revision 31441b7e95e0840e1ae144e5db6f791d6a36bc60
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/ValueTracking.h" 19#include "llvm/Function.h" 20#include "llvm/GlobalAlias.h" 21#include "llvm/GlobalVariable.h" 22#include "llvm/Intrinsics.h" 23#include "llvm/DerivedTypes.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CallingConv.h" 26#include "llvm/CodeGen/MachineBasicBlock.h" 27#include "llvm/CodeGen/MachineConstantPool.h" 28#include "llvm/CodeGen/MachineFrameInfo.h" 29#include "llvm/CodeGen/MachineModuleInfo.h" 30#include "llvm/CodeGen/PseudoSourceValue.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetFrameInfo.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/System/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BIT_CONVERT) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BIT_CONVERT) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 for (unsigned i = 1; i < NumElems; ++i) { 201 SDValue V = N->getOperand(i); 202 if (V.getOpcode() != ISD::UNDEF) 203 return false; 204 } 205 return true; 206} 207 208/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 209/// when given the operation for (X op Y). 210ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 211 // To perform this operation, we just need to swap the L and G bits of the 212 // operation. 213 unsigned OldL = (Operation >> 2) & 1; 214 unsigned OldG = (Operation >> 1) & 1; 215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 216 (OldL << 1) | // New G bit 217 (OldG << 2)); // New L bit. 218} 219 220/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 221/// 'op' is a valid SetCC operation. 222ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 223 unsigned Operation = Op; 224 if (isInteger) 225 Operation ^= 7; // Flip L, G, E bits, but not U. 226 else 227 Operation ^= 15; // Flip all of the condition bits. 228 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 232 return ISD::CondCode(Operation); 233} 234 235 236/// isSignedOp - For an integer comparison, return 1 if the comparison is a 237/// signed operation and 2 if the result is an unsigned comparison. Return zero 238/// if the operation does not depend on the sign of the input (setne and seteq). 239static int isSignedOp(ISD::CondCode Opcode) { 240 switch (Opcode) { 241 default: llvm_unreachable("Illegal integer setcc operation!"); 242 case ISD::SETEQ: 243 case ISD::SETNE: return 0; 244 case ISD::SETLT: 245 case ISD::SETLE: 246 case ISD::SETGT: 247 case ISD::SETGE: return 1; 248 case ISD::SETULT: 249 case ISD::SETULE: 250 case ISD::SETUGT: 251 case ISD::SETUGE: return 2; 252 } 253} 254 255/// getSetCCOrOperation - Return the result of a logical OR between different 256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 257/// returns SETCC_INVALID if it is not possible to represent the resultant 258/// comparison. 259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 260 bool isInteger) { 261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 262 // Cannot fold a signed integer setcc with an unsigned integer setcc. 263 return ISD::SETCC_INVALID; 264 265 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 266 267 // If the N and U bits get set then the resultant comparison DOES suddenly 268 // care about orderedness, and is true when ordered. 269 if (Op > ISD::SETTRUE2) 270 Op &= ~16; // Clear the U bit if the N bit is set. 271 272 // Canonicalize illegal integer setcc's. 273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 274 Op = ISD::SETNE; 275 276 return ISD::CondCode(Op); 277} 278 279/// getSetCCAndOperation - Return the result of a logical AND between different 280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 281/// function returns zero if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed setcc with an unsigned setcc. 287 return ISD::SETCC_INVALID; 288 289 // Combine all of the condition bits. 290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 291 292 // Canonicalize illegal integer setcc's. 293 if (isInteger) { 294 switch (Result) { 295 default: break; 296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 297 case ISD::SETOEQ: // SETEQ & SETU[LG]E 298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 301 } 302 } 303 304 return Result; 305} 306 307const TargetMachine &SelectionDAG::getTarget() const { 308 return MF->getTarget(); 309} 310 311//===----------------------------------------------------------------------===// 312// SDNode Profile Support 313//===----------------------------------------------------------------------===// 314 315/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 316/// 317static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 318 ID.AddInteger(OpC); 319} 320 321/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 322/// solely with their pointer. 323static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 324 ID.AddPointer(VTList.VTs); 325} 326 327/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 328/// 329static void AddNodeIDOperands(FoldingSetNodeID &ID, 330 const SDValue *Ops, unsigned NumOps) { 331 for (; NumOps; --NumOps, ++Ops) { 332 ID.AddPointer(Ops->getNode()); 333 ID.AddInteger(Ops->getResNo()); 334 } 335} 336 337/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 338/// 339static void AddNodeIDOperands(FoldingSetNodeID &ID, 340 const SDUse *Ops, unsigned NumOps) { 341 for (; NumOps; --NumOps, ++Ops) { 342 ID.AddPointer(Ops->getNode()); 343 ID.AddInteger(Ops->getResNo()); 344 } 345} 346 347static void AddNodeIDNode(FoldingSetNodeID &ID, 348 unsigned short OpC, SDVTList VTList, 349 const SDValue *OpList, unsigned N) { 350 AddNodeIDOpcode(ID, OpC); 351 AddNodeIDValueTypes(ID, VTList); 352 AddNodeIDOperands(ID, OpList, N); 353} 354 355/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 356/// the NodeID data. 357static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 358 switch (N->getOpcode()) { 359 case ISD::TargetExternalSymbol: 360 case ISD::ExternalSymbol: 361 llvm_unreachable("Should only be used on nodes with operands"); 362 default: break; // Normal nodes don't need extra info. 363 case ISD::TargetConstant: 364 case ISD::Constant: 365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 366 break; 367 case ISD::TargetConstantFP: 368 case ISD::ConstantFP: { 369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 370 break; 371 } 372 case ISD::TargetGlobalAddress: 373 case ISD::GlobalAddress: 374 case ISD::TargetGlobalTLSAddress: 375 case ISD::GlobalTLSAddress: { 376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 377 ID.AddPointer(GA->getGlobal()); 378 ID.AddInteger(GA->getOffset()); 379 ID.AddInteger(GA->getTargetFlags()); 380 break; 381 } 382 case ISD::BasicBlock: 383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 384 break; 385 case ISD::Register: 386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 387 break; 388 389 case ISD::SRCVALUE: 390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 391 break; 392 case ISD::FrameIndex: 393 case ISD::TargetFrameIndex: 394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 395 break; 396 case ISD::JumpTable: 397 case ISD::TargetJumpTable: 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 400 break; 401 case ISD::ConstantPool: 402 case ISD::TargetConstantPool: { 403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 404 ID.AddInteger(CP->getAlignment()); 405 ID.AddInteger(CP->getOffset()); 406 if (CP->isMachineConstantPoolEntry()) 407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 408 else 409 ID.AddPointer(CP->getConstVal()); 410 ID.AddInteger(CP->getTargetFlags()); 411 break; 412 } 413 case ISD::LOAD: { 414 const LoadSDNode *LD = cast<LoadSDNode>(N); 415 ID.AddInteger(LD->getMemoryVT().getRawBits()); 416 ID.AddInteger(LD->getRawSubclassData()); 417 break; 418 } 419 case ISD::STORE: { 420 const StoreSDNode *ST = cast<StoreSDNode>(N); 421 ID.AddInteger(ST->getMemoryVT().getRawBits()); 422 ID.AddInteger(ST->getRawSubclassData()); 423 break; 424 } 425 case ISD::ATOMIC_CMP_SWAP: 426 case ISD::ATOMIC_SWAP: 427 case ISD::ATOMIC_LOAD_ADD: 428 case ISD::ATOMIC_LOAD_SUB: 429 case ISD::ATOMIC_LOAD_AND: 430 case ISD::ATOMIC_LOAD_OR: 431 case ISD::ATOMIC_LOAD_XOR: 432 case ISD::ATOMIC_LOAD_NAND: 433 case ISD::ATOMIC_LOAD_MIN: 434 case ISD::ATOMIC_LOAD_MAX: 435 case ISD::ATOMIC_LOAD_UMIN: 436 case ISD::ATOMIC_LOAD_UMAX: { 437 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 438 ID.AddInteger(AT->getMemoryVT().getRawBits()); 439 ID.AddInteger(AT->getRawSubclassData()); 440 break; 441 } 442 case ISD::VECTOR_SHUFFLE: { 443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 445 i != e; ++i) 446 ID.AddInteger(SVN->getMaskElt(i)); 447 break; 448 } 449 case ISD::TargetBlockAddress: 450 case ISD::BlockAddress: { 451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 453 break; 454 } 455 } // end switch (N->getOpcode()) 456} 457 458/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 459/// data. 460static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 461 AddNodeIDOpcode(ID, N->getOpcode()); 462 // Add the return value info. 463 AddNodeIDValueTypes(ID, N->getVTList()); 464 // Add the operand info. 465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 466 467 // Handle SDNode leafs with special info. 468 AddNodeIDCustom(ID, N); 469} 470 471/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 472/// the CSE map that carries volatility, temporalness, indexing mode, and 473/// extension/truncation information. 474/// 475static inline unsigned 476encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 477 bool isNonTemporal) { 478 assert((ConvType & 3) == ConvType && 479 "ConvType may not require more than 2 bits!"); 480 assert((AM & 7) == AM && 481 "AM may not require more than 3 bits!"); 482 return ConvType | 483 (AM << 2) | 484 (isVolatile << 5) | 485 (isNonTemporal << 6); 486} 487 488//===----------------------------------------------------------------------===// 489// SelectionDAG Class 490//===----------------------------------------------------------------------===// 491 492/// doNotCSE - Return true if CSE should not be performed for this node. 493static bool doNotCSE(SDNode *N) { 494 if (N->getValueType(0) == MVT::Flag) 495 return true; // Never CSE anything that produces a flag. 496 497 switch (N->getOpcode()) { 498 default: break; 499 case ISD::HANDLENODE: 500 case ISD::EH_LABEL: 501 return true; // Never CSE these nodes. 502 } 503 504 // Check that remaining values produced are not flags. 505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 506 if (N->getValueType(i) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 return false; 510} 511 512/// RemoveDeadNodes - This method deletes all unreachable nodes in the 513/// SelectionDAG. 514void SelectionDAG::RemoveDeadNodes() { 515 // Create a dummy node (which is not added to allnodes), that adds a reference 516 // to the root node, preventing it from being deleted. 517 HandleSDNode Dummy(getRoot()); 518 519 SmallVector<SDNode*, 128> DeadNodes; 520 521 // Add all obviously-dead nodes to the DeadNodes worklist. 522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 523 if (I->use_empty()) 524 DeadNodes.push_back(I); 525 526 RemoveDeadNodes(DeadNodes); 527 528 // If the root changed (e.g. it was a dead load, update the root). 529 setRoot(Dummy.getValue()); 530} 531 532/// RemoveDeadNodes - This method deletes the unreachable nodes in the 533/// given list, and any nodes that become unreachable as a result. 534void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 535 DAGUpdateListener *UpdateListener) { 536 537 // Process the worklist, deleting the nodes and adding their uses to the 538 // worklist. 539 while (!DeadNodes.empty()) { 540 SDNode *N = DeadNodes.pop_back_val(); 541 542 if (UpdateListener) 543 UpdateListener->NodeDeleted(N, 0); 544 545 // Take the node out of the appropriate CSE map. 546 RemoveNodeFromCSEMaps(N); 547 548 // Next, brutally remove the operand list. This is safe to do, as there are 549 // no cycles in the graph. 550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 551 SDUse &Use = *I++; 552 SDNode *Operand = Use.getNode(); 553 Use.set(SDValue()); 554 555 // Now that we removed this operand, see if there are no uses of it left. 556 if (Operand->use_empty()) 557 DeadNodes.push_back(Operand); 558 } 559 560 DeallocateNode(N); 561 } 562} 563 564void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 565 SmallVector<SDNode*, 16> DeadNodes(1, N); 566 RemoveDeadNodes(DeadNodes, UpdateListener); 567} 568 569void SelectionDAG::DeleteNode(SDNode *N) { 570 // First take this out of the appropriate CSE map. 571 RemoveNodeFromCSEMaps(N); 572 573 // Finally, remove uses due to operands of this node, remove from the 574 // AllNodes list, and delete the node. 575 DeleteNodeNotInCSEMaps(N); 576} 577 578void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 579 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 580 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 581 582 // Drop all of the operands and decrement used node's use counts. 583 N->DropOperands(); 584 585 DeallocateNode(N); 586} 587 588void SelectionDAG::DeallocateNode(SDNode *N) { 589 if (N->OperandsNeedDelete) 590 delete[] N->OperandList; 591 592 // Set the opcode to DELETED_NODE to help catch bugs when node 593 // memory is reallocated. 594 N->NodeType = ISD::DELETED_NODE; 595 596 NodeAllocator.Deallocate(AllNodes.remove(N)); 597 598 // Remove the ordering of this node. 599 Ordering->remove(N); 600 601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 604 DbgVals[i]->setIsInvalidated(); 605} 606 607/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 608/// correspond to it. This is useful when we're about to delete or repurpose 609/// the node. We don't want future request for structurally identical nodes 610/// to return N anymore. 611bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 612 bool Erased = false; 613 switch (N->getOpcode()) { 614 case ISD::EntryToken: 615 llvm_unreachable("EntryToken should not be in CSEMaps!"); 616 return false; 617 case ISD::HANDLENODE: return false; // noop. 618 case ISD::CONDCODE: 619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 620 "Cond code doesn't exist!"); 621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 623 break; 624 case ISD::ExternalSymbol: 625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 626 break; 627 case ISD::TargetExternalSymbol: { 628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 629 Erased = TargetExternalSymbols.erase( 630 std::pair<std::string,unsigned char>(ESN->getSymbol(), 631 ESN->getTargetFlags())); 632 break; 633 } 634 case ISD::VALUETYPE: { 635 EVT VT = cast<VTSDNode>(N)->getVT(); 636 if (VT.isExtended()) { 637 Erased = ExtendedValueTypeNodes.erase(VT); 638 } else { 639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 641 } 642 break; 643 } 644 default: 645 // Remove it from the CSE Map. 646 Erased = CSEMap.RemoveNode(N); 647 break; 648 } 649#ifndef NDEBUG 650 // Verify that the node was actually in one of the CSE maps, unless it has a 651 // flag result (which cannot be CSE'd) or is one of the special cases that are 652 // not subject to CSE. 653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 654 !N->isMachineOpcode() && !doNotCSE(N)) { 655 N->dump(this); 656 dbgs() << "\n"; 657 llvm_unreachable("Node is not in map!"); 658 } 659#endif 660 return Erased; 661} 662 663/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 664/// maps and modified in place. Add it back to the CSE maps, unless an identical 665/// node already exists, in which case transfer all its users to the existing 666/// node. This transfer can potentially trigger recursive merging. 667/// 668void 669SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 670 DAGUpdateListener *UpdateListener) { 671 // For node types that aren't CSE'd, just act as if no identical node 672 // already exists. 673 if (!doNotCSE(N)) { 674 SDNode *Existing = CSEMap.GetOrInsertNode(N); 675 if (Existing != N) { 676 // If there was already an existing matching node, use ReplaceAllUsesWith 677 // to replace the dead one with the existing one. This can cause 678 // recursive merging of other unrelated nodes down the line. 679 ReplaceAllUsesWith(N, Existing, UpdateListener); 680 681 // N is now dead. Inform the listener if it exists and delete it. 682 if (UpdateListener) 683 UpdateListener->NodeDeleted(N, Existing); 684 DeleteNodeNotInCSEMaps(N); 685 return; 686 } 687 } 688 689 // If the node doesn't already exist, we updated it. Inform a listener if 690 // it exists. 691 if (UpdateListener) 692 UpdateListener->NodeUpdated(N); 693} 694 695/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 696/// were replaced with those specified. If this node is never memoized, 697/// return null, otherwise return a pointer to the slot it would take. If a 698/// node already exists with these operands, the slot will be non-null. 699SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 700 void *&InsertPos) { 701 if (doNotCSE(N)) 702 return 0; 703 704 SDValue Ops[] = { Op }; 705 FoldingSetNodeID ID; 706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 707 AddNodeIDCustom(ID, N); 708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 709 return Node; 710} 711 712/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 713/// were replaced with those specified. If this node is never memoized, 714/// return null, otherwise return a pointer to the slot it would take. If a 715/// node already exists with these operands, the slot will be non-null. 716SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 717 SDValue Op1, SDValue Op2, 718 void *&InsertPos) { 719 if (doNotCSE(N)) 720 return 0; 721 722 SDValue Ops[] = { Op1, Op2 }; 723 FoldingSetNodeID ID; 724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 725 AddNodeIDCustom(ID, N); 726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 727 return Node; 728} 729 730 731/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 732/// were replaced with those specified. If this node is never memoized, 733/// return null, otherwise return a pointer to the slot it would take. If a 734/// node already exists with these operands, the slot will be non-null. 735SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 736 const SDValue *Ops,unsigned NumOps, 737 void *&InsertPos) { 738 if (doNotCSE(N)) 739 return 0; 740 741 FoldingSetNodeID ID; 742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 743 AddNodeIDCustom(ID, N); 744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 745 return Node; 746} 747 748/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 749void SelectionDAG::VerifyNode(SDNode *N) { 750 switch (N->getOpcode()) { 751 default: 752 break; 753 case ISD::BUILD_PAIR: { 754 EVT VT = N->getValueType(0); 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 757 "Wrong return type!"); 758 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 760 "Mismatched operand types!"); 761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 762 "Wrong operand type!"); 763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 764 "Wrong return type size"); 765 break; 766 } 767 case ISD::BUILD_VECTOR: { 768 assert(N->getNumValues() == 1 && "Too many results!"); 769 assert(N->getValueType(0).isVector() && "Wrong return type!"); 770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 771 "Wrong number of operands!"); 772 EVT EltVT = N->getValueType(0).getVectorElementType(); 773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 774 assert((I->getValueType() == EltVT || 775 (EltVT.isInteger() && I->getValueType().isInteger() && 776 EltVT.bitsLE(I->getValueType()))) && 777 "Wrong operand type!"); 778 break; 779 } 780 } 781} 782 783/// getEVTAlignment - Compute the default alignment value for the 784/// given type. 785/// 786unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 787 const Type *Ty = VT == MVT::iPTR ? 788 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 789 VT.getTypeForEVT(*getContext()); 790 791 return TLI.getTargetData()->getABITypeAlignment(Ty); 792} 793 794// EntryNode could meaningfully have debug info if we can find it... 795SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 796 : TLI(tli), FLI(fli), DW(0), 797 EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(), 798 getVTList(MVT::Other)), 799 Root(getEntryNode()), Ordering(0) { 800 AllNodes.push_back(&EntryNode); 801 Ordering = new SDNodeOrdering(); 802 DbgInfo = new SDDbgInfo(); 803} 804 805void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 806 DwarfWriter *dw) { 807 MF = &mf; 808 MMI = mmi; 809 DW = dw; 810 Context = &mf.getFunction()->getContext(); 811} 812 813SelectionDAG::~SelectionDAG() { 814 allnodes_clear(); 815 delete Ordering; 816 DbgInfo->clear(); 817 delete DbgInfo; 818} 819 820void SelectionDAG::allnodes_clear() { 821 assert(&*AllNodes.begin() == &EntryNode); 822 AllNodes.remove(AllNodes.begin()); 823 while (!AllNodes.empty()) 824 DeallocateNode(AllNodes.begin()); 825} 826 827void SelectionDAG::clear() { 828 allnodes_clear(); 829 OperandAllocator.Reset(); 830 CSEMap.clear(); 831 832 ExtendedValueTypeNodes.clear(); 833 ExternalSymbols.clear(); 834 TargetExternalSymbols.clear(); 835 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 836 static_cast<CondCodeSDNode*>(0)); 837 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 838 static_cast<SDNode*>(0)); 839 840 EntryNode.UseList = 0; 841 AllNodes.push_back(&EntryNode); 842 Root = getEntryNode(); 843 delete Ordering; 844 Ordering = new SDNodeOrdering(); 845 DbgInfo->clear(); 846 delete DbgInfo; 847 DbgInfo = new SDDbgInfo(); 848} 849 850SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 851 return VT.bitsGT(Op.getValueType()) ? 852 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 853 getNode(ISD::TRUNCATE, DL, VT, Op); 854} 855 856SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 857 return VT.bitsGT(Op.getValueType()) ? 858 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 859 getNode(ISD::TRUNCATE, DL, VT, Op); 860} 861 862SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 863 assert(!VT.isVector() && 864 "getZeroExtendInReg should use the vector element type instead of " 865 "the vector type!"); 866 if (Op.getValueType() == VT) return Op; 867 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 868 APInt Imm = APInt::getLowBitsSet(BitWidth, 869 VT.getSizeInBits()); 870 return getNode(ISD::AND, DL, Op.getValueType(), Op, 871 getConstant(Imm, Op.getValueType())); 872} 873 874/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 875/// 876SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 877 EVT EltVT = VT.getScalarType(); 878 SDValue NegOne = 879 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 880 return getNode(ISD::XOR, DL, VT, Val, NegOne); 881} 882 883SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 884 EVT EltVT = VT.getScalarType(); 885 assert((EltVT.getSizeInBits() >= 64 || 886 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 887 "getConstant with a uint64_t value that doesn't fit in the type!"); 888 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 889} 890 891SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 892 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 893} 894 895SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 896 assert(VT.isInteger() && "Cannot create FP integer constant!"); 897 898 EVT EltVT = VT.getScalarType(); 899 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 900 "APInt size does not match type size!"); 901 902 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 903 FoldingSetNodeID ID; 904 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 905 ID.AddPointer(&Val); 906 void *IP = 0; 907 SDNode *N = NULL; 908 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 909 if (!VT.isVector()) 910 return SDValue(N, 0); 911 912 if (!N) { 913 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 914 CSEMap.InsertNode(N, IP); 915 AllNodes.push_back(N); 916 } 917 918 SDValue Result(N, 0); 919 if (VT.isVector()) { 920 SmallVector<SDValue, 8> Ops; 921 Ops.assign(VT.getVectorNumElements(), Result); 922 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 923 VT, &Ops[0], Ops.size()); 924 } 925 return Result; 926} 927 928SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 929 return getConstant(Val, TLI.getPointerTy(), isTarget); 930} 931 932 933SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 934 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 935} 936 937SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 938 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 939 940 EVT EltVT = VT.getScalarType(); 941 942 // Do the map lookup using the actual bit pattern for the floating point 943 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 944 // we don't have issues with SNANs. 945 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 946 FoldingSetNodeID ID; 947 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 948 ID.AddPointer(&V); 949 void *IP = 0; 950 SDNode *N = NULL; 951 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 952 if (!VT.isVector()) 953 return SDValue(N, 0); 954 955 if (!N) { 956 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 957 CSEMap.InsertNode(N, IP); 958 AllNodes.push_back(N); 959 } 960 961 SDValue Result(N, 0); 962 if (VT.isVector()) { 963 SmallVector<SDValue, 8> Ops; 964 Ops.assign(VT.getVectorNumElements(), Result); 965 // FIXME DebugLoc info might be appropriate here 966 Result = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), 967 VT, &Ops[0], Ops.size()); 968 } 969 return Result; 970} 971 972SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 973 EVT EltVT = VT.getScalarType(); 974 if (EltVT==MVT::f32) 975 return getConstantFP(APFloat((float)Val), VT, isTarget); 976 else 977 return getConstantFP(APFloat(Val), VT, isTarget); 978} 979 980SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 981 EVT VT, int64_t Offset, 982 bool isTargetGA, 983 unsigned char TargetFlags) { 984 assert((TargetFlags == 0 || isTargetGA) && 985 "Cannot set target flags on target-independent globals"); 986 987 // Truncate (with sign-extension) the offset value to the pointer size. 988 EVT PTy = TLI.getPointerTy(); 989 unsigned BitWidth = PTy.getSizeInBits(); 990 if (BitWidth < 64) 991 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 992 993 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 994 if (!GVar) { 995 // If GV is an alias then use the aliasee for determining thread-localness. 996 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 997 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 998 } 999 1000 unsigned Opc; 1001 if (GVar && GVar->isThreadLocal()) 1002 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1003 else 1004 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1005 1006 FoldingSetNodeID ID; 1007 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1008 ID.AddPointer(GV); 1009 ID.AddInteger(Offset); 1010 ID.AddInteger(TargetFlags); 1011 void *IP = 0; 1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1013 return SDValue(E, 0); 1014 1015 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1016 Offset, TargetFlags); 1017 CSEMap.InsertNode(N, IP); 1018 AllNodes.push_back(N); 1019 return SDValue(N, 0); 1020} 1021 1022SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1023 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1024 FoldingSetNodeID ID; 1025 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1026 ID.AddInteger(FI); 1027 void *IP = 0; 1028 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1029 return SDValue(E, 0); 1030 1031 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1032 CSEMap.InsertNode(N, IP); 1033 AllNodes.push_back(N); 1034 return SDValue(N, 0); 1035} 1036 1037SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1038 unsigned char TargetFlags) { 1039 assert((TargetFlags == 0 || isTarget) && 1040 "Cannot set target flags on target-independent jump tables"); 1041 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1042 FoldingSetNodeID ID; 1043 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1044 ID.AddInteger(JTI); 1045 ID.AddInteger(TargetFlags); 1046 void *IP = 0; 1047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1048 return SDValue(E, 0); 1049 1050 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1051 TargetFlags); 1052 CSEMap.InsertNode(N, IP); 1053 AllNodes.push_back(N); 1054 return SDValue(N, 0); 1055} 1056 1057SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1058 unsigned Alignment, int Offset, 1059 bool isTarget, 1060 unsigned char TargetFlags) { 1061 assert((TargetFlags == 0 || isTarget) && 1062 "Cannot set target flags on target-independent globals"); 1063 if (Alignment == 0) 1064 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1065 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1066 FoldingSetNodeID ID; 1067 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1068 ID.AddInteger(Alignment); 1069 ID.AddInteger(Offset); 1070 ID.AddPointer(C); 1071 ID.AddInteger(TargetFlags); 1072 void *IP = 0; 1073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1074 return SDValue(E, 0); 1075 1076 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1077 Alignment, TargetFlags); 1078 CSEMap.InsertNode(N, IP); 1079 AllNodes.push_back(N); 1080 return SDValue(N, 0); 1081} 1082 1083 1084SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1085 unsigned Alignment, int Offset, 1086 bool isTarget, 1087 unsigned char TargetFlags) { 1088 assert((TargetFlags == 0 || isTarget) && 1089 "Cannot set target flags on target-independent globals"); 1090 if (Alignment == 0) 1091 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1092 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1093 FoldingSetNodeID ID; 1094 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1095 ID.AddInteger(Alignment); 1096 ID.AddInteger(Offset); 1097 C->AddSelectionDAGCSEId(ID); 1098 ID.AddInteger(TargetFlags); 1099 void *IP = 0; 1100 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1101 return SDValue(E, 0); 1102 1103 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1104 Alignment, TargetFlags); 1105 CSEMap.InsertNode(N, IP); 1106 AllNodes.push_back(N); 1107 return SDValue(N, 0); 1108} 1109 1110SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1111 FoldingSetNodeID ID; 1112 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1113 ID.AddPointer(MBB); 1114 void *IP = 0; 1115 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1116 return SDValue(E, 0); 1117 1118 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1119 CSEMap.InsertNode(N, IP); 1120 AllNodes.push_back(N); 1121 return SDValue(N, 0); 1122} 1123 1124SDValue SelectionDAG::getValueType(EVT VT) { 1125 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1126 ValueTypeNodes.size()) 1127 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1128 1129 SDNode *&N = VT.isExtended() ? 1130 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1131 1132 if (N) return SDValue(N, 0); 1133 N = new (NodeAllocator) VTSDNode(VT); 1134 AllNodes.push_back(N); 1135 return SDValue(N, 0); 1136} 1137 1138SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1139 SDNode *&N = ExternalSymbols[Sym]; 1140 if (N) return SDValue(N, 0); 1141 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1142 AllNodes.push_back(N); 1143 return SDValue(N, 0); 1144} 1145 1146SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1147 unsigned char TargetFlags) { 1148 SDNode *&N = 1149 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1150 TargetFlags)]; 1151 if (N) return SDValue(N, 0); 1152 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1153 AllNodes.push_back(N); 1154 return SDValue(N, 0); 1155} 1156 1157SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1158 if ((unsigned)Cond >= CondCodeNodes.size()) 1159 CondCodeNodes.resize(Cond+1); 1160 1161 if (CondCodeNodes[Cond] == 0) { 1162 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1163 CondCodeNodes[Cond] = N; 1164 AllNodes.push_back(N); 1165 } 1166 1167 return SDValue(CondCodeNodes[Cond], 0); 1168} 1169 1170// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1171// the shuffle mask M that point at N1 to point at N2, and indices that point 1172// N2 to point at N1. 1173static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1174 std::swap(N1, N2); 1175 int NElts = M.size(); 1176 for (int i = 0; i != NElts; ++i) { 1177 if (M[i] >= NElts) 1178 M[i] -= NElts; 1179 else if (M[i] >= 0) 1180 M[i] += NElts; 1181 } 1182} 1183 1184SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1185 SDValue N2, const int *Mask) { 1186 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1187 assert(VT.isVector() && N1.getValueType().isVector() && 1188 "Vector Shuffle VTs must be a vectors"); 1189 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1190 && "Vector Shuffle VTs must have same element type"); 1191 1192 // Canonicalize shuffle undef, undef -> undef 1193 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1194 return getUNDEF(VT); 1195 1196 // Validate that all indices in Mask are within the range of the elements 1197 // input to the shuffle. 1198 unsigned NElts = VT.getVectorNumElements(); 1199 SmallVector<int, 8> MaskVec; 1200 for (unsigned i = 0; i != NElts; ++i) { 1201 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1202 MaskVec.push_back(Mask[i]); 1203 } 1204 1205 // Canonicalize shuffle v, v -> v, undef 1206 if (N1 == N2) { 1207 N2 = getUNDEF(VT); 1208 for (unsigned i = 0; i != NElts; ++i) 1209 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1210 } 1211 1212 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1213 if (N1.getOpcode() == ISD::UNDEF) 1214 commuteShuffle(N1, N2, MaskVec); 1215 1216 // Canonicalize all index into lhs, -> shuffle lhs, undef 1217 // Canonicalize all index into rhs, -> shuffle rhs, undef 1218 bool AllLHS = true, AllRHS = true; 1219 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1220 for (unsigned i = 0; i != NElts; ++i) { 1221 if (MaskVec[i] >= (int)NElts) { 1222 if (N2Undef) 1223 MaskVec[i] = -1; 1224 else 1225 AllLHS = false; 1226 } else if (MaskVec[i] >= 0) { 1227 AllRHS = false; 1228 } 1229 } 1230 if (AllLHS && AllRHS) 1231 return getUNDEF(VT); 1232 if (AllLHS && !N2Undef) 1233 N2 = getUNDEF(VT); 1234 if (AllRHS) { 1235 N1 = getUNDEF(VT); 1236 commuteShuffle(N1, N2, MaskVec); 1237 } 1238 1239 // If Identity shuffle, or all shuffle in to undef, return that node. 1240 bool AllUndef = true; 1241 bool Identity = true; 1242 for (unsigned i = 0; i != NElts; ++i) { 1243 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1244 if (MaskVec[i] >= 0) AllUndef = false; 1245 } 1246 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1247 return N1; 1248 if (AllUndef) 1249 return getUNDEF(VT); 1250 1251 FoldingSetNodeID ID; 1252 SDValue Ops[2] = { N1, N2 }; 1253 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1254 for (unsigned i = 0; i != NElts; ++i) 1255 ID.AddInteger(MaskVec[i]); 1256 1257 void* IP = 0; 1258 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1259 return SDValue(E, 0); 1260 1261 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1262 // SDNode doesn't have access to it. This memory will be "leaked" when 1263 // the node is deallocated, but recovered when the NodeAllocator is released. 1264 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1265 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1266 1267 ShuffleVectorSDNode *N = 1268 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1269 CSEMap.InsertNode(N, IP); 1270 AllNodes.push_back(N); 1271 return SDValue(N, 0); 1272} 1273 1274SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1275 SDValue Val, SDValue DTy, 1276 SDValue STy, SDValue Rnd, SDValue Sat, 1277 ISD::CvtCode Code) { 1278 // If the src and dest types are the same and the conversion is between 1279 // integer types of the same sign or two floats, no conversion is necessary. 1280 if (DTy == STy && 1281 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1282 return Val; 1283 1284 FoldingSetNodeID ID; 1285 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1286 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1287 void* IP = 0; 1288 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1289 return SDValue(E, 0); 1290 1291 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1292 Code); 1293 CSEMap.InsertNode(N, IP); 1294 AllNodes.push_back(N); 1295 return SDValue(N, 0); 1296} 1297 1298SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1299 FoldingSetNodeID ID; 1300 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1301 ID.AddInteger(RegNo); 1302 void *IP = 0; 1303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1304 return SDValue(E, 0); 1305 1306 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1307 CSEMap.InsertNode(N, IP); 1308 AllNodes.push_back(N); 1309 return SDValue(N, 0); 1310} 1311 1312SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1313 FoldingSetNodeID ID; 1314 SDValue Ops[] = { Root }; 1315 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1316 ID.AddPointer(Label); 1317 void *IP = 0; 1318 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1319 return SDValue(E, 0); 1320 1321 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1322 CSEMap.InsertNode(N, IP); 1323 AllNodes.push_back(N); 1324 return SDValue(N, 0); 1325} 1326 1327 1328SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1329 bool isTarget, 1330 unsigned char TargetFlags) { 1331 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1332 1333 FoldingSetNodeID ID; 1334 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1335 ID.AddPointer(BA); 1336 ID.AddInteger(TargetFlags); 1337 void *IP = 0; 1338 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1339 return SDValue(E, 0); 1340 1341 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1342 CSEMap.InsertNode(N, IP); 1343 AllNodes.push_back(N); 1344 return SDValue(N, 0); 1345} 1346 1347SDValue SelectionDAG::getSrcValue(const Value *V) { 1348 assert((!V || V->getType()->isPointerTy()) && 1349 "SrcValue is not a pointer?"); 1350 1351 FoldingSetNodeID ID; 1352 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1353 ID.AddPointer(V); 1354 1355 void *IP = 0; 1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1357 return SDValue(E, 0); 1358 1359 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1360 CSEMap.InsertNode(N, IP); 1361 AllNodes.push_back(N); 1362 return SDValue(N, 0); 1363} 1364 1365/// getShiftAmountOperand - Return the specified value casted to 1366/// the target's desired shift amount type. 1367SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1368 EVT OpTy = Op.getValueType(); 1369 MVT ShTy = TLI.getShiftAmountTy(); 1370 if (OpTy == ShTy || OpTy.isVector()) return Op; 1371 1372 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1373 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1374} 1375 1376/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1377/// specified value type. 1378SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1379 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1380 unsigned ByteSize = VT.getStoreSize(); 1381 const Type *Ty = VT.getTypeForEVT(*getContext()); 1382 unsigned StackAlign = 1383 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1384 1385 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1386 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1387} 1388 1389/// CreateStackTemporary - Create a stack temporary suitable for holding 1390/// either of the specified value types. 1391SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1392 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1393 VT2.getStoreSizeInBits())/8; 1394 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1395 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1396 const TargetData *TD = TLI.getTargetData(); 1397 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1398 TD->getPrefTypeAlignment(Ty2)); 1399 1400 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1401 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1402 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1403} 1404 1405SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1406 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1407 // These setcc operations always fold. 1408 switch (Cond) { 1409 default: break; 1410 case ISD::SETFALSE: 1411 case ISD::SETFALSE2: return getConstant(0, VT); 1412 case ISD::SETTRUE: 1413 case ISD::SETTRUE2: return getConstant(1, VT); 1414 1415 case ISD::SETOEQ: 1416 case ISD::SETOGT: 1417 case ISD::SETOGE: 1418 case ISD::SETOLT: 1419 case ISD::SETOLE: 1420 case ISD::SETONE: 1421 case ISD::SETO: 1422 case ISD::SETUO: 1423 case ISD::SETUEQ: 1424 case ISD::SETUNE: 1425 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1426 break; 1427 } 1428 1429 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1430 const APInt &C2 = N2C->getAPIntValue(); 1431 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1432 const APInt &C1 = N1C->getAPIntValue(); 1433 1434 switch (Cond) { 1435 default: llvm_unreachable("Unknown integer setcc!"); 1436 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1437 case ISD::SETNE: return getConstant(C1 != C2, VT); 1438 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1439 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1440 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1441 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1442 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1443 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1444 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1445 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1446 } 1447 } 1448 } 1449 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1450 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1451 // No compile time operations on this type yet. 1452 if (N1C->getValueType(0) == MVT::ppcf128) 1453 return SDValue(); 1454 1455 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1456 switch (Cond) { 1457 default: break; 1458 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1459 return getUNDEF(VT); 1460 // fall through 1461 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1462 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1463 return getUNDEF(VT); 1464 // fall through 1465 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1466 R==APFloat::cmpLessThan, VT); 1467 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1468 return getUNDEF(VT); 1469 // fall through 1470 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1471 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1472 return getUNDEF(VT); 1473 // fall through 1474 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1475 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1476 return getUNDEF(VT); 1477 // fall through 1478 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1479 R==APFloat::cmpEqual, VT); 1480 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1481 return getUNDEF(VT); 1482 // fall through 1483 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1484 R==APFloat::cmpEqual, VT); 1485 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1486 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1487 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1488 R==APFloat::cmpEqual, VT); 1489 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1490 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1491 R==APFloat::cmpLessThan, VT); 1492 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1493 R==APFloat::cmpUnordered, VT); 1494 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1495 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1496 } 1497 } else { 1498 // Ensure that the constant occurs on the RHS. 1499 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1500 } 1501 } 1502 1503 // Could not fold it. 1504 return SDValue(); 1505} 1506 1507/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1508/// use this predicate to simplify operations downstream. 1509bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1510 // This predicate is not safe for vector operations. 1511 if (Op.getValueType().isVector()) 1512 return false; 1513 1514 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1515 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1516} 1517 1518/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1519/// this predicate to simplify operations downstream. Mask is known to be zero 1520/// for bits that V cannot have. 1521bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1522 unsigned Depth) const { 1523 APInt KnownZero, KnownOne; 1524 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1525 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1526 return (KnownZero & Mask) == Mask; 1527} 1528 1529/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1530/// known to be either zero or one and return them in the KnownZero/KnownOne 1531/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1532/// processing. 1533void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1534 APInt &KnownZero, APInt &KnownOne, 1535 unsigned Depth) const { 1536 unsigned BitWidth = Mask.getBitWidth(); 1537 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1538 "Mask size mismatches value type size!"); 1539 1540 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1541 if (Depth == 6 || Mask == 0) 1542 return; // Limit search depth. 1543 1544 APInt KnownZero2, KnownOne2; 1545 1546 switch (Op.getOpcode()) { 1547 case ISD::Constant: 1548 // We know all of the bits for a constant! 1549 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1550 KnownZero = ~KnownOne & Mask; 1551 return; 1552 case ISD::AND: 1553 // If either the LHS or the RHS are Zero, the result is zero. 1554 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1555 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1556 KnownZero2, KnownOne2, Depth+1); 1557 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1558 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1559 1560 // Output known-1 bits are only known if set in both the LHS & RHS. 1561 KnownOne &= KnownOne2; 1562 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1563 KnownZero |= KnownZero2; 1564 return; 1565 case ISD::OR: 1566 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1567 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1568 KnownZero2, KnownOne2, Depth+1); 1569 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1570 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1571 1572 // Output known-0 bits are only known if clear in both the LHS & RHS. 1573 KnownZero &= KnownZero2; 1574 // Output known-1 are known to be set if set in either the LHS | RHS. 1575 KnownOne |= KnownOne2; 1576 return; 1577 case ISD::XOR: { 1578 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1579 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1580 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1581 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1582 1583 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1584 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1585 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1586 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1587 KnownZero = KnownZeroOut; 1588 return; 1589 } 1590 case ISD::MUL: { 1591 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1592 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1593 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1594 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1595 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1596 1597 // If low bits are zero in either operand, output low known-0 bits. 1598 // Also compute a conserative estimate for high known-0 bits. 1599 // More trickiness is possible, but this is sufficient for the 1600 // interesting case of alignment computation. 1601 KnownOne.clear(); 1602 unsigned TrailZ = KnownZero.countTrailingOnes() + 1603 KnownZero2.countTrailingOnes(); 1604 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1605 KnownZero2.countLeadingOnes(), 1606 BitWidth) - BitWidth; 1607 1608 TrailZ = std::min(TrailZ, BitWidth); 1609 LeadZ = std::min(LeadZ, BitWidth); 1610 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1611 APInt::getHighBitsSet(BitWidth, LeadZ); 1612 KnownZero &= Mask; 1613 return; 1614 } 1615 case ISD::UDIV: { 1616 // For the purposes of computing leading zeros we can conservatively 1617 // treat a udiv as a logical right shift by the power of 2 known to 1618 // be less than the denominator. 1619 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1620 ComputeMaskedBits(Op.getOperand(0), 1621 AllOnes, KnownZero2, KnownOne2, Depth+1); 1622 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1623 1624 KnownOne2.clear(); 1625 KnownZero2.clear(); 1626 ComputeMaskedBits(Op.getOperand(1), 1627 AllOnes, KnownZero2, KnownOne2, Depth+1); 1628 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1629 if (RHSUnknownLeadingOnes != BitWidth) 1630 LeadZ = std::min(BitWidth, 1631 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1632 1633 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1634 return; 1635 } 1636 case ISD::SELECT: 1637 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1638 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1639 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1640 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1641 1642 // Only known if known in both the LHS and RHS. 1643 KnownOne &= KnownOne2; 1644 KnownZero &= KnownZero2; 1645 return; 1646 case ISD::SELECT_CC: 1647 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1648 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1649 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1650 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1651 1652 // Only known if known in both the LHS and RHS. 1653 KnownOne &= KnownOne2; 1654 KnownZero &= KnownZero2; 1655 return; 1656 case ISD::SADDO: 1657 case ISD::UADDO: 1658 case ISD::SSUBO: 1659 case ISD::USUBO: 1660 case ISD::SMULO: 1661 case ISD::UMULO: 1662 if (Op.getResNo() != 1) 1663 return; 1664 // The boolean result conforms to getBooleanContents. Fall through. 1665 case ISD::SETCC: 1666 // If we know the result of a setcc has the top bits zero, use this info. 1667 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1668 BitWidth > 1) 1669 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1670 return; 1671 case ISD::SHL: 1672 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1673 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1674 unsigned ShAmt = SA->getZExtValue(); 1675 1676 // If the shift count is an invalid immediate, don't do anything. 1677 if (ShAmt >= BitWidth) 1678 return; 1679 1680 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1681 KnownZero, KnownOne, Depth+1); 1682 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1683 KnownZero <<= ShAmt; 1684 KnownOne <<= ShAmt; 1685 // low bits known zero. 1686 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1687 } 1688 return; 1689 case ISD::SRL: 1690 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1691 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1692 unsigned ShAmt = SA->getZExtValue(); 1693 1694 // If the shift count is an invalid immediate, don't do anything. 1695 if (ShAmt >= BitWidth) 1696 return; 1697 1698 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1699 KnownZero, KnownOne, Depth+1); 1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1701 KnownZero = KnownZero.lshr(ShAmt); 1702 KnownOne = KnownOne.lshr(ShAmt); 1703 1704 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1705 KnownZero |= HighBits; // High bits known zero. 1706 } 1707 return; 1708 case ISD::SRA: 1709 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1710 unsigned ShAmt = SA->getZExtValue(); 1711 1712 // If the shift count is an invalid immediate, don't do anything. 1713 if (ShAmt >= BitWidth) 1714 return; 1715 1716 APInt InDemandedMask = (Mask << ShAmt); 1717 // If any of the demanded bits are produced by the sign extension, we also 1718 // demand the input sign bit. 1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1720 if (HighBits.getBoolValue()) 1721 InDemandedMask |= APInt::getSignBit(BitWidth); 1722 1723 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1724 Depth+1); 1725 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1726 KnownZero = KnownZero.lshr(ShAmt); 1727 KnownOne = KnownOne.lshr(ShAmt); 1728 1729 // Handle the sign bits. 1730 APInt SignBit = APInt::getSignBit(BitWidth); 1731 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1732 1733 if (KnownZero.intersects(SignBit)) { 1734 KnownZero |= HighBits; // New bits are known zero. 1735 } else if (KnownOne.intersects(SignBit)) { 1736 KnownOne |= HighBits; // New bits are known one. 1737 } 1738 } 1739 return; 1740 case ISD::SIGN_EXTEND_INREG: { 1741 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1742 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1743 1744 // Sign extension. Compute the demanded bits in the result that are not 1745 // present in the input. 1746 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1747 1748 APInt InSignBit = APInt::getSignBit(EBits); 1749 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1750 1751 // If the sign extended bits are demanded, we know that the sign 1752 // bit is demanded. 1753 InSignBit.zext(BitWidth); 1754 if (NewBits.getBoolValue()) 1755 InputDemandedBits |= InSignBit; 1756 1757 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1758 KnownZero, KnownOne, Depth+1); 1759 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1760 1761 // If the sign bit of the input is known set or clear, then we know the 1762 // top bits of the result. 1763 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1764 KnownZero |= NewBits; 1765 KnownOne &= ~NewBits; 1766 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1767 KnownOne |= NewBits; 1768 KnownZero &= ~NewBits; 1769 } else { // Input sign bit unknown 1770 KnownZero &= ~NewBits; 1771 KnownOne &= ~NewBits; 1772 } 1773 return; 1774 } 1775 case ISD::CTTZ: 1776 case ISD::CTLZ: 1777 case ISD::CTPOP: { 1778 unsigned LowBits = Log2_32(BitWidth)+1; 1779 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1780 KnownOne.clear(); 1781 return; 1782 } 1783 case ISD::LOAD: { 1784 if (ISD::isZEXTLoad(Op.getNode())) { 1785 LoadSDNode *LD = cast<LoadSDNode>(Op); 1786 EVT VT = LD->getMemoryVT(); 1787 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1788 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1789 } 1790 return; 1791 } 1792 case ISD::ZERO_EXTEND: { 1793 EVT InVT = Op.getOperand(0).getValueType(); 1794 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1795 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1796 APInt InMask = Mask; 1797 InMask.trunc(InBits); 1798 KnownZero.trunc(InBits); 1799 KnownOne.trunc(InBits); 1800 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1801 KnownZero.zext(BitWidth); 1802 KnownOne.zext(BitWidth); 1803 KnownZero |= NewBits; 1804 return; 1805 } 1806 case ISD::SIGN_EXTEND: { 1807 EVT InVT = Op.getOperand(0).getValueType(); 1808 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1809 APInt InSignBit = APInt::getSignBit(InBits); 1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1811 APInt InMask = Mask; 1812 InMask.trunc(InBits); 1813 1814 // If any of the sign extended bits are demanded, we know that the sign 1815 // bit is demanded. Temporarily set this bit in the mask for our callee. 1816 if (NewBits.getBoolValue()) 1817 InMask |= InSignBit; 1818 1819 KnownZero.trunc(InBits); 1820 KnownOne.trunc(InBits); 1821 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1822 1823 // Note if the sign bit is known to be zero or one. 1824 bool SignBitKnownZero = KnownZero.isNegative(); 1825 bool SignBitKnownOne = KnownOne.isNegative(); 1826 assert(!(SignBitKnownZero && SignBitKnownOne) && 1827 "Sign bit can't be known to be both zero and one!"); 1828 1829 // If the sign bit wasn't actually demanded by our caller, we don't 1830 // want it set in the KnownZero and KnownOne result values. Reset the 1831 // mask and reapply it to the result values. 1832 InMask = Mask; 1833 InMask.trunc(InBits); 1834 KnownZero &= InMask; 1835 KnownOne &= InMask; 1836 1837 KnownZero.zext(BitWidth); 1838 KnownOne.zext(BitWidth); 1839 1840 // If the sign bit is known zero or one, the top bits match. 1841 if (SignBitKnownZero) 1842 KnownZero |= NewBits; 1843 else if (SignBitKnownOne) 1844 KnownOne |= NewBits; 1845 return; 1846 } 1847 case ISD::ANY_EXTEND: { 1848 EVT InVT = Op.getOperand(0).getValueType(); 1849 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1850 APInt InMask = Mask; 1851 InMask.trunc(InBits); 1852 KnownZero.trunc(InBits); 1853 KnownOne.trunc(InBits); 1854 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1855 KnownZero.zext(BitWidth); 1856 KnownOne.zext(BitWidth); 1857 return; 1858 } 1859 case ISD::TRUNCATE: { 1860 EVT InVT = Op.getOperand(0).getValueType(); 1861 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1862 APInt InMask = Mask; 1863 InMask.zext(InBits); 1864 KnownZero.zext(InBits); 1865 KnownOne.zext(InBits); 1866 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1867 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1868 KnownZero.trunc(BitWidth); 1869 KnownOne.trunc(BitWidth); 1870 break; 1871 } 1872 case ISD::AssertZext: { 1873 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1874 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1875 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1876 KnownOne, Depth+1); 1877 KnownZero |= (~InMask) & Mask; 1878 return; 1879 } 1880 case ISD::FGETSIGN: 1881 // All bits are zero except the low bit. 1882 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1883 return; 1884 1885 case ISD::SUB: { 1886 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1887 // We know that the top bits of C-X are clear if X contains less bits 1888 // than C (i.e. no wrap-around can happen). For example, 20-X is 1889 // positive if we can prove that X is >= 0 and < 16. 1890 if (CLHS->getAPIntValue().isNonNegative()) { 1891 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1892 // NLZ can't be BitWidth with no sign bit 1893 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1894 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1895 Depth+1); 1896 1897 // If all of the MaskV bits are known to be zero, then we know the 1898 // output top bits are zero, because we now know that the output is 1899 // from [0-C]. 1900 if ((KnownZero2 & MaskV) == MaskV) { 1901 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1902 // Top bits known zero. 1903 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1904 } 1905 } 1906 } 1907 } 1908 // fall through 1909 case ISD::ADD: { 1910 // Output known-0 bits are known if clear or set in both the low clear bits 1911 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1912 // low 3 bits clear. 1913 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1914 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1915 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1916 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1917 1918 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1919 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1920 KnownZeroOut = std::min(KnownZeroOut, 1921 KnownZero2.countTrailingOnes()); 1922 1923 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1924 return; 1925 } 1926 case ISD::SREM: 1927 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1928 const APInt &RA = Rem->getAPIntValue().abs(); 1929 if (RA.isPowerOf2()) { 1930 APInt LowBits = RA - 1; 1931 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1932 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1933 1934 // The low bits of the first operand are unchanged by the srem. 1935 KnownZero = KnownZero2 & LowBits; 1936 KnownOne = KnownOne2 & LowBits; 1937 1938 // If the first operand is non-negative or has all low bits zero, then 1939 // the upper bits are all zero. 1940 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1941 KnownZero |= ~LowBits; 1942 1943 // If the first operand is negative and not all low bits are zero, then 1944 // the upper bits are all one. 1945 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1946 KnownOne |= ~LowBits; 1947 1948 KnownZero &= Mask; 1949 KnownOne &= Mask; 1950 1951 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1952 } 1953 } 1954 return; 1955 case ISD::UREM: { 1956 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1957 const APInt &RA = Rem->getAPIntValue(); 1958 if (RA.isPowerOf2()) { 1959 APInt LowBits = (RA - 1); 1960 APInt Mask2 = LowBits & Mask; 1961 KnownZero |= ~LowBits & Mask; 1962 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1963 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1964 break; 1965 } 1966 } 1967 1968 // Since the result is less than or equal to either operand, any leading 1969 // zero bits in either operand must also exist in the result. 1970 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1971 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1972 Depth+1); 1973 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1974 Depth+1); 1975 1976 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1977 KnownZero2.countLeadingOnes()); 1978 KnownOne.clear(); 1979 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1980 return; 1981 } 1982 default: 1983 // Allow the target to implement this method for its nodes. 1984 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1985 case ISD::INTRINSIC_WO_CHAIN: 1986 case ISD::INTRINSIC_W_CHAIN: 1987 case ISD::INTRINSIC_VOID: 1988 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1989 Depth); 1990 } 1991 return; 1992 } 1993} 1994 1995/// ComputeNumSignBits - Return the number of times the sign bit of the 1996/// register is replicated into the other bits. We know that at least 1 bit 1997/// is always equal to the sign bit (itself), but other cases can give us 1998/// information. For example, immediately after an "SRA X, 2", we know that 1999/// the top 3 bits are all equal to each other, so we return 3. 2000unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2001 EVT VT = Op.getValueType(); 2002 assert(VT.isInteger() && "Invalid VT!"); 2003 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2004 unsigned Tmp, Tmp2; 2005 unsigned FirstAnswer = 1; 2006 2007 if (Depth == 6) 2008 return 1; // Limit search depth. 2009 2010 switch (Op.getOpcode()) { 2011 default: break; 2012 case ISD::AssertSext: 2013 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2014 return VTBits-Tmp+1; 2015 case ISD::AssertZext: 2016 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2017 return VTBits-Tmp; 2018 2019 case ISD::Constant: { 2020 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2021 // If negative, return # leading ones. 2022 if (Val.isNegative()) 2023 return Val.countLeadingOnes(); 2024 2025 // Return # leading zeros. 2026 return Val.countLeadingZeros(); 2027 } 2028 2029 case ISD::SIGN_EXTEND: 2030 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2031 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2032 2033 case ISD::SIGN_EXTEND_INREG: 2034 // Max of the input and what this extends. 2035 Tmp = 2036 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2037 Tmp = VTBits-Tmp+1; 2038 2039 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2040 return std::max(Tmp, Tmp2); 2041 2042 case ISD::SRA: 2043 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2044 // SRA X, C -> adds C sign bits. 2045 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2046 Tmp += C->getZExtValue(); 2047 if (Tmp > VTBits) Tmp = VTBits; 2048 } 2049 return Tmp; 2050 case ISD::SHL: 2051 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2052 // shl destroys sign bits. 2053 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2054 if (C->getZExtValue() >= VTBits || // Bad shift. 2055 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2056 return Tmp - C->getZExtValue(); 2057 } 2058 break; 2059 case ISD::AND: 2060 case ISD::OR: 2061 case ISD::XOR: // NOT is handled here. 2062 // Logical binary ops preserve the number of sign bits at the worst. 2063 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2064 if (Tmp != 1) { 2065 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2066 FirstAnswer = std::min(Tmp, Tmp2); 2067 // We computed what we know about the sign bits as our first 2068 // answer. Now proceed to the generic code that uses 2069 // ComputeMaskedBits, and pick whichever answer is better. 2070 } 2071 break; 2072 2073 case ISD::SELECT: 2074 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2075 if (Tmp == 1) return 1; // Early out. 2076 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2077 return std::min(Tmp, Tmp2); 2078 2079 case ISD::SADDO: 2080 case ISD::UADDO: 2081 case ISD::SSUBO: 2082 case ISD::USUBO: 2083 case ISD::SMULO: 2084 case ISD::UMULO: 2085 if (Op.getResNo() != 1) 2086 break; 2087 // The boolean result conforms to getBooleanContents. Fall through. 2088 case ISD::SETCC: 2089 // If setcc returns 0/-1, all bits are sign bits. 2090 if (TLI.getBooleanContents() == 2091 TargetLowering::ZeroOrNegativeOneBooleanContent) 2092 return VTBits; 2093 break; 2094 case ISD::ROTL: 2095 case ISD::ROTR: 2096 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2097 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2098 2099 // Handle rotate right by N like a rotate left by 32-N. 2100 if (Op.getOpcode() == ISD::ROTR) 2101 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2102 2103 // If we aren't rotating out all of the known-in sign bits, return the 2104 // number that are left. This handles rotl(sext(x), 1) for example. 2105 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2106 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2107 } 2108 break; 2109 case ISD::ADD: 2110 // Add can have at most one carry bit. Thus we know that the output 2111 // is, at worst, one more bit than the inputs. 2112 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2113 if (Tmp == 1) return 1; // Early out. 2114 2115 // Special case decrementing a value (ADD X, -1): 2116 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2117 if (CRHS->isAllOnesValue()) { 2118 APInt KnownZero, KnownOne; 2119 APInt Mask = APInt::getAllOnesValue(VTBits); 2120 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2121 2122 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2123 // sign bits set. 2124 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2125 return VTBits; 2126 2127 // If we are subtracting one from a positive number, there is no carry 2128 // out of the result. 2129 if (KnownZero.isNegative()) 2130 return Tmp; 2131 } 2132 2133 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2134 if (Tmp2 == 1) return 1; 2135 return std::min(Tmp, Tmp2)-1; 2136 break; 2137 2138 case ISD::SUB: 2139 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2140 if (Tmp2 == 1) return 1; 2141 2142 // Handle NEG. 2143 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2144 if (CLHS->isNullValue()) { 2145 APInt KnownZero, KnownOne; 2146 APInt Mask = APInt::getAllOnesValue(VTBits); 2147 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2148 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2149 // sign bits set. 2150 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2151 return VTBits; 2152 2153 // If the input is known to be positive (the sign bit is known clear), 2154 // the output of the NEG has the same number of sign bits as the input. 2155 if (KnownZero.isNegative()) 2156 return Tmp2; 2157 2158 // Otherwise, we treat this like a SUB. 2159 } 2160 2161 // Sub can have at most one carry bit. Thus we know that the output 2162 // is, at worst, one more bit than the inputs. 2163 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2164 if (Tmp == 1) return 1; // Early out. 2165 return std::min(Tmp, Tmp2)-1; 2166 break; 2167 case ISD::TRUNCATE: 2168 // FIXME: it's tricky to do anything useful for this, but it is an important 2169 // case for targets like X86. 2170 break; 2171 } 2172 2173 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2174 if (Op.getOpcode() == ISD::LOAD) { 2175 LoadSDNode *LD = cast<LoadSDNode>(Op); 2176 unsigned ExtType = LD->getExtensionType(); 2177 switch (ExtType) { 2178 default: break; 2179 case ISD::SEXTLOAD: // '17' bits known 2180 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2181 return VTBits-Tmp+1; 2182 case ISD::ZEXTLOAD: // '16' bits known 2183 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2184 return VTBits-Tmp; 2185 } 2186 } 2187 2188 // Allow the target to implement this method for its nodes. 2189 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2190 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2191 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2192 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2193 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2194 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2195 } 2196 2197 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2198 // use this information. 2199 APInt KnownZero, KnownOne; 2200 APInt Mask = APInt::getAllOnesValue(VTBits); 2201 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2202 2203 if (KnownZero.isNegative()) { // sign bit is 0 2204 Mask = KnownZero; 2205 } else if (KnownOne.isNegative()) { // sign bit is 1; 2206 Mask = KnownOne; 2207 } else { 2208 // Nothing known. 2209 return FirstAnswer; 2210 } 2211 2212 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2213 // the number of identical bits in the top of the input value. 2214 Mask = ~Mask; 2215 Mask <<= Mask.getBitWidth()-VTBits; 2216 // Return # leading zeros. We use 'min' here in case Val was zero before 2217 // shifting. We don't want to return '64' as for an i32 "0". 2218 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2219} 2220 2221bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2222 // If we're told that NaNs won't happen, assume they won't. 2223 if (FiniteOnlyFPMath()) 2224 return true; 2225 2226 // If the value is a constant, we can obviously see if it is a NaN or not. 2227 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2228 return !C->getValueAPF().isNaN(); 2229 2230 // TODO: Recognize more cases here. 2231 2232 return false; 2233} 2234 2235bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2236 // If the value is a constant, we can obviously see if it is a zero or not. 2237 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2238 return !C->isZero(); 2239 2240 // TODO: Recognize more cases here. 2241 2242 return false; 2243} 2244 2245bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2246 // Check the obvious case. 2247 if (A == B) return true; 2248 2249 // For for negative and positive zero. 2250 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2251 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2252 if (CA->isZero() && CB->isZero()) return true; 2253 2254 // Otherwise they may not be equal. 2255 return false; 2256} 2257 2258bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2259 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2260 if (!GA) return false; 2261 if (GA->getOffset() != 0) return false; 2262 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2263 if (!GV) return false; 2264 MachineModuleInfo *MMI = getMachineModuleInfo(); 2265 return MMI && MMI->hasDebugInfo(); 2266} 2267 2268 2269/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2270/// element of the result of the vector shuffle. 2271SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2272 unsigned i) { 2273 EVT VT = N->getValueType(0); 2274 DebugLoc dl = N->getDebugLoc(); 2275 if (N->getMaskElt(i) < 0) 2276 return getUNDEF(VT.getVectorElementType()); 2277 unsigned Index = N->getMaskElt(i); 2278 unsigned NumElems = VT.getVectorNumElements(); 2279 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2280 Index %= NumElems; 2281 2282 if (V.getOpcode() == ISD::BIT_CONVERT) { 2283 V = V.getOperand(0); 2284 EVT VVT = V.getValueType(); 2285 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2286 return SDValue(); 2287 } 2288 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2289 return (Index == 0) ? V.getOperand(0) 2290 : getUNDEF(VT.getVectorElementType()); 2291 if (V.getOpcode() == ISD::BUILD_VECTOR) 2292 return V.getOperand(Index); 2293 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2294 return getShuffleScalarElt(SVN, Index); 2295 return SDValue(); 2296} 2297 2298 2299/// getNode - Gets or creates the specified node. 2300/// 2301SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2302 FoldingSetNodeID ID; 2303 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2304 void *IP = 0; 2305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2306 return SDValue(E, 0); 2307 2308 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2309 CSEMap.InsertNode(N, IP); 2310 2311 AllNodes.push_back(N); 2312#ifndef NDEBUG 2313 VerifyNode(N); 2314#endif 2315 return SDValue(N, 0); 2316} 2317 2318SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2319 EVT VT, SDValue Operand) { 2320 // Constant fold unary operations with an integer constant operand. 2321 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2322 const APInt &Val = C->getAPIntValue(); 2323 switch (Opcode) { 2324 default: break; 2325 case ISD::SIGN_EXTEND: 2326 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2327 case ISD::ANY_EXTEND: 2328 case ISD::ZERO_EXTEND: 2329 case ISD::TRUNCATE: 2330 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2331 case ISD::UINT_TO_FP: 2332 case ISD::SINT_TO_FP: { 2333 const uint64_t zero[] = {0, 0}; 2334 // No compile time operations on ppcf128. 2335 if (VT == MVT::ppcf128) break; 2336 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2337 (void)apf.convertFromAPInt(Val, 2338 Opcode==ISD::SINT_TO_FP, 2339 APFloat::rmNearestTiesToEven); 2340 return getConstantFP(apf, VT); 2341 } 2342 case ISD::BIT_CONVERT: 2343 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2344 return getConstantFP(Val.bitsToFloat(), VT); 2345 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2346 return getConstantFP(Val.bitsToDouble(), VT); 2347 break; 2348 case ISD::BSWAP: 2349 return getConstant(Val.byteSwap(), VT); 2350 case ISD::CTPOP: 2351 return getConstant(Val.countPopulation(), VT); 2352 case ISD::CTLZ: 2353 return getConstant(Val.countLeadingZeros(), VT); 2354 case ISD::CTTZ: 2355 return getConstant(Val.countTrailingZeros(), VT); 2356 } 2357 } 2358 2359 // Constant fold unary operations with a floating point constant operand. 2360 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2361 APFloat V = C->getValueAPF(); // make copy 2362 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2363 switch (Opcode) { 2364 case ISD::FNEG: 2365 V.changeSign(); 2366 return getConstantFP(V, VT); 2367 case ISD::FABS: 2368 V.clearSign(); 2369 return getConstantFP(V, VT); 2370 case ISD::FP_ROUND: 2371 case ISD::FP_EXTEND: { 2372 bool ignored; 2373 // This can return overflow, underflow, or inexact; we don't care. 2374 // FIXME need to be more flexible about rounding mode. 2375 (void)V.convert(*EVTToAPFloatSemantics(VT), 2376 APFloat::rmNearestTiesToEven, &ignored); 2377 return getConstantFP(V, VT); 2378 } 2379 case ISD::FP_TO_SINT: 2380 case ISD::FP_TO_UINT: { 2381 integerPart x[2]; 2382 bool ignored; 2383 assert(integerPartWidth >= 64); 2384 // FIXME need to be more flexible about rounding mode. 2385 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2386 Opcode==ISD::FP_TO_SINT, 2387 APFloat::rmTowardZero, &ignored); 2388 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2389 break; 2390 APInt api(VT.getSizeInBits(), 2, x); 2391 return getConstant(api, VT); 2392 } 2393 case ISD::BIT_CONVERT: 2394 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2395 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2396 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2397 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2398 break; 2399 } 2400 } 2401 } 2402 2403 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2404 switch (Opcode) { 2405 case ISD::TokenFactor: 2406 case ISD::MERGE_VALUES: 2407 case ISD::CONCAT_VECTORS: 2408 return Operand; // Factor, merge or concat of one node? No need. 2409 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2410 case ISD::FP_EXTEND: 2411 assert(VT.isFloatingPoint() && 2412 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2413 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2414 assert((!VT.isVector() || 2415 VT.getVectorNumElements() == 2416 Operand.getValueType().getVectorNumElements()) && 2417 "Vector element count mismatch!"); 2418 if (Operand.getOpcode() == ISD::UNDEF) 2419 return getUNDEF(VT); 2420 break; 2421 case ISD::SIGN_EXTEND: 2422 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2423 "Invalid SIGN_EXTEND!"); 2424 if (Operand.getValueType() == VT) return Operand; // noop extension 2425 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2426 "Invalid sext node, dst < src!"); 2427 assert((!VT.isVector() || 2428 VT.getVectorNumElements() == 2429 Operand.getValueType().getVectorNumElements()) && 2430 "Vector element count mismatch!"); 2431 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2432 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2433 break; 2434 case ISD::ZERO_EXTEND: 2435 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2436 "Invalid ZERO_EXTEND!"); 2437 if (Operand.getValueType() == VT) return Operand; // noop extension 2438 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2439 "Invalid zext node, dst < src!"); 2440 assert((!VT.isVector() || 2441 VT.getVectorNumElements() == 2442 Operand.getValueType().getVectorNumElements()) && 2443 "Vector element count mismatch!"); 2444 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2445 return getNode(ISD::ZERO_EXTEND, DL, VT, 2446 Operand.getNode()->getOperand(0)); 2447 break; 2448 case ISD::ANY_EXTEND: 2449 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2450 "Invalid ANY_EXTEND!"); 2451 if (Operand.getValueType() == VT) return Operand; // noop extension 2452 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2453 "Invalid anyext node, dst < src!"); 2454 assert((!VT.isVector() || 2455 VT.getVectorNumElements() == 2456 Operand.getValueType().getVectorNumElements()) && 2457 "Vector element count mismatch!"); 2458 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2459 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2460 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2461 break; 2462 case ISD::TRUNCATE: 2463 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2464 "Invalid TRUNCATE!"); 2465 if (Operand.getValueType() == VT) return Operand; // noop truncate 2466 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2467 "Invalid truncate node, src < dst!"); 2468 assert((!VT.isVector() || 2469 VT.getVectorNumElements() == 2470 Operand.getValueType().getVectorNumElements()) && 2471 "Vector element count mismatch!"); 2472 if (OpOpcode == ISD::TRUNCATE) 2473 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2474 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2475 OpOpcode == ISD::ANY_EXTEND) { 2476 // If the source is smaller than the dest, we still need an extend. 2477 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2478 .bitsLT(VT.getScalarType())) 2479 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2480 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2481 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2482 else 2483 return Operand.getNode()->getOperand(0); 2484 } 2485 break; 2486 case ISD::BIT_CONVERT: 2487 // Basic sanity checking. 2488 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2489 && "Cannot BIT_CONVERT between types of different sizes!"); 2490 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2491 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2492 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2493 if (OpOpcode == ISD::UNDEF) 2494 return getUNDEF(VT); 2495 break; 2496 case ISD::SCALAR_TO_VECTOR: 2497 assert(VT.isVector() && !Operand.getValueType().isVector() && 2498 (VT.getVectorElementType() == Operand.getValueType() || 2499 (VT.getVectorElementType().isInteger() && 2500 Operand.getValueType().isInteger() && 2501 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2502 "Illegal SCALAR_TO_VECTOR node!"); 2503 if (OpOpcode == ISD::UNDEF) 2504 return getUNDEF(VT); 2505 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2506 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2507 isa<ConstantSDNode>(Operand.getOperand(1)) && 2508 Operand.getConstantOperandVal(1) == 0 && 2509 Operand.getOperand(0).getValueType() == VT) 2510 return Operand.getOperand(0); 2511 break; 2512 case ISD::FNEG: 2513 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2514 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2515 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2516 Operand.getNode()->getOperand(0)); 2517 if (OpOpcode == ISD::FNEG) // --X -> X 2518 return Operand.getNode()->getOperand(0); 2519 break; 2520 case ISD::FABS: 2521 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2522 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2523 break; 2524 } 2525 2526 SDNode *N; 2527 SDVTList VTs = getVTList(VT); 2528 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2529 FoldingSetNodeID ID; 2530 SDValue Ops[1] = { Operand }; 2531 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2532 void *IP = 0; 2533 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2534 return SDValue(E, 0); 2535 2536 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2537 CSEMap.InsertNode(N, IP); 2538 } else { 2539 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2540 } 2541 2542 AllNodes.push_back(N); 2543#ifndef NDEBUG 2544 VerifyNode(N); 2545#endif 2546 return SDValue(N, 0); 2547} 2548 2549SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2550 EVT VT, 2551 ConstantSDNode *Cst1, 2552 ConstantSDNode *Cst2) { 2553 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2554 2555 switch (Opcode) { 2556 case ISD::ADD: return getConstant(C1 + C2, VT); 2557 case ISD::SUB: return getConstant(C1 - C2, VT); 2558 case ISD::MUL: return getConstant(C1 * C2, VT); 2559 case ISD::UDIV: 2560 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2561 break; 2562 case ISD::UREM: 2563 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2564 break; 2565 case ISD::SDIV: 2566 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2567 break; 2568 case ISD::SREM: 2569 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2570 break; 2571 case ISD::AND: return getConstant(C1 & C2, VT); 2572 case ISD::OR: return getConstant(C1 | C2, VT); 2573 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2574 case ISD::SHL: return getConstant(C1 << C2, VT); 2575 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2576 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2577 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2578 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2579 default: break; 2580 } 2581 2582 return SDValue(); 2583} 2584 2585SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2586 SDValue N1, SDValue N2) { 2587 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2588 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2589 switch (Opcode) { 2590 default: break; 2591 case ISD::TokenFactor: 2592 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2593 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2594 // Fold trivial token factors. 2595 if (N1.getOpcode() == ISD::EntryToken) return N2; 2596 if (N2.getOpcode() == ISD::EntryToken) return N1; 2597 if (N1 == N2) return N1; 2598 break; 2599 case ISD::CONCAT_VECTORS: 2600 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2601 // one big BUILD_VECTOR. 2602 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2603 N2.getOpcode() == ISD::BUILD_VECTOR) { 2604 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2605 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2606 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2607 } 2608 break; 2609 case ISD::AND: 2610 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2611 N1.getValueType() == VT && "Binary operator types must match!"); 2612 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2613 // worth handling here. 2614 if (N2C && N2C->isNullValue()) 2615 return N2; 2616 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2617 return N1; 2618 break; 2619 case ISD::OR: 2620 case ISD::XOR: 2621 case ISD::ADD: 2622 case ISD::SUB: 2623 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2624 N1.getValueType() == VT && "Binary operator types must match!"); 2625 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2626 // it's worth handling here. 2627 if (N2C && N2C->isNullValue()) 2628 return N1; 2629 break; 2630 case ISD::UDIV: 2631 case ISD::UREM: 2632 case ISD::MULHU: 2633 case ISD::MULHS: 2634 case ISD::MUL: 2635 case ISD::SDIV: 2636 case ISD::SREM: 2637 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2638 // fall through 2639 case ISD::FADD: 2640 case ISD::FSUB: 2641 case ISD::FMUL: 2642 case ISD::FDIV: 2643 case ISD::FREM: 2644 if (UnsafeFPMath) { 2645 if (Opcode == ISD::FADD) { 2646 // 0+x --> x 2647 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2648 if (CFP->getValueAPF().isZero()) 2649 return N2; 2650 // x+0 --> x 2651 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2652 if (CFP->getValueAPF().isZero()) 2653 return N1; 2654 } else if (Opcode == ISD::FSUB) { 2655 // x-0 --> x 2656 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2657 if (CFP->getValueAPF().isZero()) 2658 return N1; 2659 } 2660 } 2661 assert(N1.getValueType() == N2.getValueType() && 2662 N1.getValueType() == VT && "Binary operator types must match!"); 2663 break; 2664 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2665 assert(N1.getValueType() == VT && 2666 N1.getValueType().isFloatingPoint() && 2667 N2.getValueType().isFloatingPoint() && 2668 "Invalid FCOPYSIGN!"); 2669 break; 2670 case ISD::SHL: 2671 case ISD::SRA: 2672 case ISD::SRL: 2673 case ISD::ROTL: 2674 case ISD::ROTR: 2675 assert(VT == N1.getValueType() && 2676 "Shift operators return type must be the same as their first arg"); 2677 assert(VT.isInteger() && N2.getValueType().isInteger() && 2678 "Shifts only work on integers"); 2679 2680 // Always fold shifts of i1 values so the code generator doesn't need to 2681 // handle them. Since we know the size of the shift has to be less than the 2682 // size of the value, the shift/rotate count is guaranteed to be zero. 2683 if (VT == MVT::i1) 2684 return N1; 2685 if (N2C && N2C->isNullValue()) 2686 return N1; 2687 break; 2688 case ISD::FP_ROUND_INREG: { 2689 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2690 assert(VT == N1.getValueType() && "Not an inreg round!"); 2691 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2692 "Cannot FP_ROUND_INREG integer types"); 2693 assert(EVT.isVector() == VT.isVector() && 2694 "FP_ROUND_INREG type should be vector iff the operand " 2695 "type is vector!"); 2696 assert((!EVT.isVector() || 2697 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2698 "Vector element counts must match in FP_ROUND_INREG"); 2699 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2700 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2701 break; 2702 } 2703 case ISD::FP_ROUND: 2704 assert(VT.isFloatingPoint() && 2705 N1.getValueType().isFloatingPoint() && 2706 VT.bitsLE(N1.getValueType()) && 2707 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2708 if (N1.getValueType() == VT) return N1; // noop conversion. 2709 break; 2710 case ISD::AssertSext: 2711 case ISD::AssertZext: { 2712 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2713 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2714 assert(VT.isInteger() && EVT.isInteger() && 2715 "Cannot *_EXTEND_INREG FP types"); 2716 assert(!EVT.isVector() && 2717 "AssertSExt/AssertZExt type should be the vector element type " 2718 "rather than the vector type!"); 2719 assert(EVT.bitsLE(VT) && "Not extending!"); 2720 if (VT == EVT) return N1; // noop assertion. 2721 break; 2722 } 2723 case ISD::SIGN_EXTEND_INREG: { 2724 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2725 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2726 assert(VT.isInteger() && EVT.isInteger() && 2727 "Cannot *_EXTEND_INREG FP types"); 2728 assert(EVT.isVector() == VT.isVector() && 2729 "SIGN_EXTEND_INREG type should be vector iff the operand " 2730 "type is vector!"); 2731 assert((!EVT.isVector() || 2732 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2733 "Vector element counts must match in SIGN_EXTEND_INREG"); 2734 assert(EVT.bitsLE(VT) && "Not extending!"); 2735 if (EVT == VT) return N1; // Not actually extending 2736 2737 if (N1C) { 2738 APInt Val = N1C->getAPIntValue(); 2739 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2740 Val <<= Val.getBitWidth()-FromBits; 2741 Val = Val.ashr(Val.getBitWidth()-FromBits); 2742 return getConstant(Val, VT); 2743 } 2744 break; 2745 } 2746 case ISD::EXTRACT_VECTOR_ELT: 2747 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2748 if (N1.getOpcode() == ISD::UNDEF) 2749 return getUNDEF(VT); 2750 2751 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2752 // expanding copies of large vectors from registers. 2753 if (N2C && 2754 N1.getOpcode() == ISD::CONCAT_VECTORS && 2755 N1.getNumOperands() > 0) { 2756 unsigned Factor = 2757 N1.getOperand(0).getValueType().getVectorNumElements(); 2758 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2759 N1.getOperand(N2C->getZExtValue() / Factor), 2760 getConstant(N2C->getZExtValue() % Factor, 2761 N2.getValueType())); 2762 } 2763 2764 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2765 // expanding large vector constants. 2766 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2767 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2768 EVT VEltTy = N1.getValueType().getVectorElementType(); 2769 if (Elt.getValueType() != VEltTy) { 2770 // If the vector element type is not legal, the BUILD_VECTOR operands 2771 // are promoted and implicitly truncated. Make that explicit here. 2772 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2773 } 2774 if (VT != VEltTy) { 2775 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2776 // result is implicitly extended. 2777 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2778 } 2779 return Elt; 2780 } 2781 2782 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2783 // operations are lowered to scalars. 2784 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2785 // If the indices are the same, return the inserted element else 2786 // if the indices are known different, extract the element from 2787 // the original vector. 2788 if (N1.getOperand(2) == N2) { 2789 if (VT == N1.getOperand(1).getValueType()) 2790 return N1.getOperand(1); 2791 else 2792 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2793 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2794 isa<ConstantSDNode>(N2)) 2795 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2796 } 2797 break; 2798 case ISD::EXTRACT_ELEMENT: 2799 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2800 assert(!N1.getValueType().isVector() && !VT.isVector() && 2801 (N1.getValueType().isInteger() == VT.isInteger()) && 2802 "Wrong types for EXTRACT_ELEMENT!"); 2803 2804 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2805 // 64-bit integers into 32-bit parts. Instead of building the extract of 2806 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2807 if (N1.getOpcode() == ISD::BUILD_PAIR) 2808 return N1.getOperand(N2C->getZExtValue()); 2809 2810 // EXTRACT_ELEMENT of a constant int is also very common. 2811 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2812 unsigned ElementSize = VT.getSizeInBits(); 2813 unsigned Shift = ElementSize * N2C->getZExtValue(); 2814 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2815 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2816 } 2817 break; 2818 case ISD::EXTRACT_SUBVECTOR: 2819 if (N1.getValueType() == VT) // Trivial extraction. 2820 return N1; 2821 break; 2822 } 2823 2824 if (N1C) { 2825 if (N2C) { 2826 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2827 if (SV.getNode()) return SV; 2828 } else { // Cannonicalize constant to RHS if commutative 2829 if (isCommutativeBinOp(Opcode)) { 2830 std::swap(N1C, N2C); 2831 std::swap(N1, N2); 2832 } 2833 } 2834 } 2835 2836 // Constant fold FP operations. 2837 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2838 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2839 if (N1CFP) { 2840 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2841 // Cannonicalize constant to RHS if commutative 2842 std::swap(N1CFP, N2CFP); 2843 std::swap(N1, N2); 2844 } else if (N2CFP && VT != MVT::ppcf128) { 2845 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2846 APFloat::opStatus s; 2847 switch (Opcode) { 2848 case ISD::FADD: 2849 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2850 if (s != APFloat::opInvalidOp) 2851 return getConstantFP(V1, VT); 2852 break; 2853 case ISD::FSUB: 2854 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2855 if (s!=APFloat::opInvalidOp) 2856 return getConstantFP(V1, VT); 2857 break; 2858 case ISD::FMUL: 2859 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2860 if (s!=APFloat::opInvalidOp) 2861 return getConstantFP(V1, VT); 2862 break; 2863 case ISD::FDIV: 2864 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2865 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2866 return getConstantFP(V1, VT); 2867 break; 2868 case ISD::FREM : 2869 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2870 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2871 return getConstantFP(V1, VT); 2872 break; 2873 case ISD::FCOPYSIGN: 2874 V1.copySign(V2); 2875 return getConstantFP(V1, VT); 2876 default: break; 2877 } 2878 } 2879 } 2880 2881 // Canonicalize an UNDEF to the RHS, even over a constant. 2882 if (N1.getOpcode() == ISD::UNDEF) { 2883 if (isCommutativeBinOp(Opcode)) { 2884 std::swap(N1, N2); 2885 } else { 2886 switch (Opcode) { 2887 case ISD::FP_ROUND_INREG: 2888 case ISD::SIGN_EXTEND_INREG: 2889 case ISD::SUB: 2890 case ISD::FSUB: 2891 case ISD::FDIV: 2892 case ISD::FREM: 2893 case ISD::SRA: 2894 return N1; // fold op(undef, arg2) -> undef 2895 case ISD::UDIV: 2896 case ISD::SDIV: 2897 case ISD::UREM: 2898 case ISD::SREM: 2899 case ISD::SRL: 2900 case ISD::SHL: 2901 if (!VT.isVector()) 2902 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2903 // For vectors, we can't easily build an all zero vector, just return 2904 // the LHS. 2905 return N2; 2906 } 2907 } 2908 } 2909 2910 // Fold a bunch of operators when the RHS is undef. 2911 if (N2.getOpcode() == ISD::UNDEF) { 2912 switch (Opcode) { 2913 case ISD::XOR: 2914 if (N1.getOpcode() == ISD::UNDEF) 2915 // Handle undef ^ undef -> 0 special case. This is a common 2916 // idiom (misuse). 2917 return getConstant(0, VT); 2918 // fallthrough 2919 case ISD::ADD: 2920 case ISD::ADDC: 2921 case ISD::ADDE: 2922 case ISD::SUB: 2923 case ISD::UDIV: 2924 case ISD::SDIV: 2925 case ISD::UREM: 2926 case ISD::SREM: 2927 return N2; // fold op(arg1, undef) -> undef 2928 case ISD::FADD: 2929 case ISD::FSUB: 2930 case ISD::FMUL: 2931 case ISD::FDIV: 2932 case ISD::FREM: 2933 if (UnsafeFPMath) 2934 return N2; 2935 break; 2936 case ISD::MUL: 2937 case ISD::AND: 2938 case ISD::SRL: 2939 case ISD::SHL: 2940 if (!VT.isVector()) 2941 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2942 // For vectors, we can't easily build an all zero vector, just return 2943 // the LHS. 2944 return N1; 2945 case ISD::OR: 2946 if (!VT.isVector()) 2947 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2948 // For vectors, we can't easily build an all one vector, just return 2949 // the LHS. 2950 return N1; 2951 case ISD::SRA: 2952 return N1; 2953 } 2954 } 2955 2956 // Memoize this node if possible. 2957 SDNode *N; 2958 SDVTList VTs = getVTList(VT); 2959 if (VT != MVT::Flag) { 2960 SDValue Ops[] = { N1, N2 }; 2961 FoldingSetNodeID ID; 2962 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2963 void *IP = 0; 2964 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2965 return SDValue(E, 0); 2966 2967 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2968 CSEMap.InsertNode(N, IP); 2969 } else { 2970 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2971 } 2972 2973 AllNodes.push_back(N); 2974#ifndef NDEBUG 2975 VerifyNode(N); 2976#endif 2977 return SDValue(N, 0); 2978} 2979 2980SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2981 SDValue N1, SDValue N2, SDValue N3) { 2982 // Perform various simplifications. 2983 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2984 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2985 switch (Opcode) { 2986 case ISD::CONCAT_VECTORS: 2987 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2988 // one big BUILD_VECTOR. 2989 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2990 N2.getOpcode() == ISD::BUILD_VECTOR && 2991 N3.getOpcode() == ISD::BUILD_VECTOR) { 2992 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2993 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2994 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2995 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2996 } 2997 break; 2998 case ISD::SETCC: { 2999 // Use FoldSetCC to simplify SETCC's. 3000 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3001 if (Simp.getNode()) return Simp; 3002 break; 3003 } 3004 case ISD::SELECT: 3005 if (N1C) { 3006 if (N1C->getZExtValue()) 3007 return N2; // select true, X, Y -> X 3008 else 3009 return N3; // select false, X, Y -> Y 3010 } 3011 3012 if (N2 == N3) return N2; // select C, X, X -> X 3013 break; 3014 case ISD::BRCOND: 3015 if (N2C) { 3016 if (N2C->getZExtValue()) // Unconditional branch 3017 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3018 else 3019 return N1; // Never-taken branch 3020 } 3021 break; 3022 case ISD::VECTOR_SHUFFLE: 3023 llvm_unreachable("should use getVectorShuffle constructor!"); 3024 break; 3025 case ISD::BIT_CONVERT: 3026 // Fold bit_convert nodes from a type to themselves. 3027 if (N1.getValueType() == VT) 3028 return N1; 3029 break; 3030 } 3031 3032 // Memoize node if it doesn't produce a flag. 3033 SDNode *N; 3034 SDVTList VTs = getVTList(VT); 3035 if (VT != MVT::Flag) { 3036 SDValue Ops[] = { N1, N2, N3 }; 3037 FoldingSetNodeID ID; 3038 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3039 void *IP = 0; 3040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3041 return SDValue(E, 0); 3042 3043 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3044 CSEMap.InsertNode(N, IP); 3045 } else { 3046 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3047 } 3048 3049 AllNodes.push_back(N); 3050#ifndef NDEBUG 3051 VerifyNode(N); 3052#endif 3053 return SDValue(N, 0); 3054} 3055 3056SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3057 SDValue N1, SDValue N2, SDValue N3, 3058 SDValue N4) { 3059 SDValue Ops[] = { N1, N2, N3, N4 }; 3060 return getNode(Opcode, DL, VT, Ops, 4); 3061} 3062 3063SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3064 SDValue N1, SDValue N2, SDValue N3, 3065 SDValue N4, SDValue N5) { 3066 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3067 return getNode(Opcode, DL, VT, Ops, 5); 3068} 3069 3070/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3071/// the incoming stack arguments to be loaded from the stack. 3072SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3073 SmallVector<SDValue, 8> ArgChains; 3074 3075 // Include the original chain at the beginning of the list. When this is 3076 // used by target LowerCall hooks, this helps legalize find the 3077 // CALLSEQ_BEGIN node. 3078 ArgChains.push_back(Chain); 3079 3080 // Add a chain value for each stack argument. 3081 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3082 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3083 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3084 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3085 if (FI->getIndex() < 0) 3086 ArgChains.push_back(SDValue(L, 1)); 3087 3088 // Build a tokenfactor for all the chains. 3089 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3090 &ArgChains[0], ArgChains.size()); 3091} 3092 3093/// getMemsetValue - Vectorized representation of the memset value 3094/// operand. 3095static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3096 DebugLoc dl) { 3097 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3098 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3099 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3100 unsigned Shift = 8; 3101 for (unsigned i = NumBits; i > 8; i >>= 1) { 3102 Val = (Val << Shift) | Val; 3103 Shift <<= 1; 3104 } 3105 if (VT.isInteger()) 3106 return DAG.getConstant(Val, VT); 3107 return DAG.getConstantFP(APFloat(Val), VT); 3108 } 3109 3110 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3111 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3112 unsigned Shift = 8; 3113 for (unsigned i = NumBits; i > 8; i >>= 1) { 3114 Value = DAG.getNode(ISD::OR, dl, VT, 3115 DAG.getNode(ISD::SHL, dl, VT, Value, 3116 DAG.getConstant(Shift, 3117 TLI.getShiftAmountTy())), 3118 Value); 3119 Shift <<= 1; 3120 } 3121 3122 return Value; 3123} 3124 3125/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3126/// used when a memcpy is turned into a memset when the source is a constant 3127/// string ptr. 3128static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3129 const TargetLowering &TLI, 3130 std::string &Str, unsigned Offset) { 3131 // Handle vector with all elements zero. 3132 if (Str.empty()) { 3133 if (VT.isInteger()) 3134 return DAG.getConstant(0, VT); 3135 unsigned NumElts = VT.getVectorNumElements(); 3136 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3137 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3138 DAG.getConstant(0, 3139 EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts))); 3140 } 3141 3142 assert(!VT.isVector() && "Can't handle vector type here!"); 3143 unsigned NumBits = VT.getSizeInBits(); 3144 unsigned MSB = NumBits / 8; 3145 uint64_t Val = 0; 3146 if (TLI.isLittleEndian()) 3147 Offset = Offset + MSB - 1; 3148 for (unsigned i = 0; i != MSB; ++i) { 3149 Val = (Val << 8) | (unsigned char)Str[Offset]; 3150 Offset += TLI.isLittleEndian() ? -1 : 1; 3151 } 3152 return DAG.getConstant(Val, VT); 3153} 3154 3155/// getMemBasePlusOffset - Returns base and offset node for the 3156/// 3157static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3158 SelectionDAG &DAG) { 3159 EVT VT = Base.getValueType(); 3160 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3161 VT, Base, DAG.getConstant(Offset, VT)); 3162} 3163 3164/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3165/// 3166static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3167 unsigned SrcDelta = 0; 3168 GlobalAddressSDNode *G = NULL; 3169 if (Src.getOpcode() == ISD::GlobalAddress) 3170 G = cast<GlobalAddressSDNode>(Src); 3171 else if (Src.getOpcode() == ISD::ADD && 3172 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3173 Src.getOperand(1).getOpcode() == ISD::Constant) { 3174 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3175 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3176 } 3177 if (!G) 3178 return false; 3179 3180 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3181 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3182 return true; 3183 3184 return false; 3185} 3186 3187/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3188/// to replace the memset / memcpy is below the threshold. It also returns the 3189/// types of the sequence of memory ops to perform memset / memcpy. 3190static 3191bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps, 3192 SDValue Dst, SDValue Src, 3193 unsigned Limit, uint64_t Size, unsigned &Align, 3194 std::string &Str, bool &isSrcStr, 3195 SelectionDAG &DAG, 3196 const TargetLowering &TLI) { 3197 isSrcStr = isMemSrcFromString(Src, Str); 3198 bool isSrcConst = isa<ConstantSDNode>(Src); 3199 EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); 3200 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(VT); 3201 if (VT != MVT::Other) { 3202 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3203 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3204 // If source is a string constant, this will require an unaligned load. 3205 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3206 if (Dst.getOpcode() != ISD::FrameIndex) { 3207 // Can't change destination alignment. It requires a unaligned store. 3208 if (AllowUnalign) 3209 VT = MVT::Other; 3210 } else { 3211 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3212 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3213 if (MFI->isFixedObjectIndex(FI)) { 3214 // Can't change destination alignment. It requires a unaligned store. 3215 if (AllowUnalign) 3216 VT = MVT::Other; 3217 } else { 3218 // Give the stack frame object a larger alignment if needed. 3219 if (MFI->getObjectAlignment(FI) < NewAlign) 3220 MFI->setObjectAlignment(FI, NewAlign); 3221 Align = NewAlign; 3222 } 3223 } 3224 } 3225 } 3226 3227 if (VT == MVT::Other) { 3228 if (TLI.allowsUnalignedMemoryAccesses(MVT::i64)) { 3229 VT = MVT::i64; 3230 } else { 3231 switch (Align & 7) { 3232 case 0: VT = MVT::i64; break; 3233 case 4: VT = MVT::i32; break; 3234 case 2: VT = MVT::i16; break; 3235 default: VT = MVT::i8; break; 3236 } 3237 } 3238 3239 MVT LVT = MVT::i64; 3240 while (!TLI.isTypeLegal(LVT)) 3241 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3242 assert(LVT.isInteger()); 3243 3244 if (VT.bitsGT(LVT)) 3245 VT = LVT; 3246 } 3247 3248 unsigned NumMemOps = 0; 3249 while (Size != 0) { 3250 unsigned VTSize = VT.getSizeInBits() / 8; 3251 while (VTSize > Size) { 3252 // For now, only use non-vector load / store's for the left-over pieces. 3253 if (VT.isVector()) { 3254 VT = MVT::i64; 3255 while (!TLI.isTypeLegal(VT)) 3256 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3257 VTSize = VT.getSizeInBits() / 8; 3258 } else { 3259 // This can result in a type that is not legal on the target, e.g. 3260 // 1 or 2 bytes on PPC. 3261 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3262 VTSize >>= 1; 3263 } 3264 } 3265 3266 if (++NumMemOps > Limit) 3267 return false; 3268 MemOps.push_back(VT); 3269 Size -= VTSize; 3270 } 3271 3272 return true; 3273} 3274 3275static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3276 SDValue Chain, SDValue Dst, 3277 SDValue Src, uint64_t Size, 3278 unsigned Align, bool AlwaysInline, 3279 const Value *DstSV, uint64_t DstSVOff, 3280 const Value *SrcSV, uint64_t SrcSVOff){ 3281 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3282 3283 // Expand memcpy to a series of load and store ops if the size operand falls 3284 // below a certain threshold. 3285 std::vector<EVT> MemOps; 3286 uint64_t Limit = -1ULL; 3287 if (!AlwaysInline) 3288 Limit = TLI.getMaxStoresPerMemcpy(); 3289 unsigned DstAlign = Align; // Destination alignment can change. 3290 std::string Str; 3291 bool CopyFromStr; 3292 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3293 Str, CopyFromStr, DAG, TLI)) 3294 return SDValue(); 3295 3296 3297 bool isZeroStr = CopyFromStr && Str.empty(); 3298 SmallVector<SDValue, 8> OutChains; 3299 unsigned NumMemOps = MemOps.size(); 3300 uint64_t SrcOff = 0, DstOff = 0; 3301 for (unsigned i = 0; i != NumMemOps; ++i) { 3302 EVT VT = MemOps[i]; 3303 unsigned VTSize = VT.getSizeInBits() / 8; 3304 SDValue Value, Store; 3305 3306 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3307 // It's unlikely a store of a vector immediate can be done in a single 3308 // instruction. It would require a load from a constantpool first. 3309 // We also handle store a vector with all zero's. 3310 // FIXME: Handle other cases where store of vector immediate is done in 3311 // a single instruction. 3312 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3313 Store = DAG.getStore(Chain, dl, Value, 3314 getMemBasePlusOffset(Dst, DstOff, DAG), 3315 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3316 } else { 3317 // The type might not be legal for the target. This should only happen 3318 // if the type is smaller than a legal type, as on PPC, so the right 3319 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3320 // to Load/Store if NVT==VT. 3321 // FIXME does the case above also need this? 3322 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3323 assert(NVT.bitsGE(VT)); 3324 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3325 getMemBasePlusOffset(Src, SrcOff, DAG), 3326 SrcSV, SrcSVOff + SrcOff, VT, false, false, Align); 3327 Store = DAG.getTruncStore(Chain, dl, Value, 3328 getMemBasePlusOffset(Dst, DstOff, DAG), 3329 DstSV, DstSVOff + DstOff, VT, false, false, 3330 DstAlign); 3331 } 3332 OutChains.push_back(Store); 3333 SrcOff += VTSize; 3334 DstOff += VTSize; 3335 } 3336 3337 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3338 &OutChains[0], OutChains.size()); 3339} 3340 3341static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3342 SDValue Chain, SDValue Dst, 3343 SDValue Src, uint64_t Size, 3344 unsigned Align, bool AlwaysInline, 3345 const Value *DstSV, uint64_t DstSVOff, 3346 const Value *SrcSV, uint64_t SrcSVOff){ 3347 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3348 3349 // Expand memmove to a series of load and store ops if the size operand falls 3350 // below a certain threshold. 3351 std::vector<EVT> MemOps; 3352 uint64_t Limit = -1ULL; 3353 if (!AlwaysInline) 3354 Limit = TLI.getMaxStoresPerMemmove(); 3355 unsigned DstAlign = Align; // Destination alignment can change. 3356 std::string Str; 3357 bool CopyFromStr; 3358 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3359 Str, CopyFromStr, DAG, TLI)) 3360 return SDValue(); 3361 3362 uint64_t SrcOff = 0, DstOff = 0; 3363 3364 SmallVector<SDValue, 8> LoadValues; 3365 SmallVector<SDValue, 8> LoadChains; 3366 SmallVector<SDValue, 8> OutChains; 3367 unsigned NumMemOps = MemOps.size(); 3368 for (unsigned i = 0; i < NumMemOps; i++) { 3369 EVT VT = MemOps[i]; 3370 unsigned VTSize = VT.getSizeInBits() / 8; 3371 SDValue Value, Store; 3372 3373 Value = DAG.getLoad(VT, dl, Chain, 3374 getMemBasePlusOffset(Src, SrcOff, DAG), 3375 SrcSV, SrcSVOff + SrcOff, false, false, Align); 3376 LoadValues.push_back(Value); 3377 LoadChains.push_back(Value.getValue(1)); 3378 SrcOff += VTSize; 3379 } 3380 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3381 &LoadChains[0], LoadChains.size()); 3382 OutChains.clear(); 3383 for (unsigned i = 0; i < NumMemOps; i++) { 3384 EVT VT = MemOps[i]; 3385 unsigned VTSize = VT.getSizeInBits() / 8; 3386 SDValue Value, Store; 3387 3388 Store = DAG.getStore(Chain, dl, LoadValues[i], 3389 getMemBasePlusOffset(Dst, DstOff, DAG), 3390 DstSV, DstSVOff + DstOff, false, false, DstAlign); 3391 OutChains.push_back(Store); 3392 DstOff += VTSize; 3393 } 3394 3395 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3396 &OutChains[0], OutChains.size()); 3397} 3398 3399static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3400 SDValue Chain, SDValue Dst, 3401 SDValue Src, uint64_t Size, 3402 unsigned Align, 3403 const Value *DstSV, uint64_t DstSVOff) { 3404 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3405 3406 // Expand memset to a series of load/store ops if the size operand 3407 // falls below a certain threshold. 3408 std::vector<EVT> MemOps; 3409 std::string Str; 3410 bool CopyFromStr; 3411 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3412 Size, Align, Str, CopyFromStr, DAG, TLI)) 3413 return SDValue(); 3414 3415 SmallVector<SDValue, 8> OutChains; 3416 uint64_t DstOff = 0; 3417 3418 unsigned NumMemOps = MemOps.size(); 3419 for (unsigned i = 0; i < NumMemOps; i++) { 3420 EVT VT = MemOps[i]; 3421 unsigned VTSize = VT.getSizeInBits() / 8; 3422 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3423 SDValue Store = DAG.getStore(Chain, dl, Value, 3424 getMemBasePlusOffset(Dst, DstOff, DAG), 3425 DstSV, DstSVOff + DstOff, false, false, 0); 3426 OutChains.push_back(Store); 3427 DstOff += VTSize; 3428 } 3429 3430 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3431 &OutChains[0], OutChains.size()); 3432} 3433 3434SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3435 SDValue Src, SDValue Size, 3436 unsigned Align, bool AlwaysInline, 3437 const Value *DstSV, uint64_t DstSVOff, 3438 const Value *SrcSV, uint64_t SrcSVOff) { 3439 3440 // Check to see if we should lower the memcpy to loads and stores first. 3441 // For cases within the target-specified limits, this is the best choice. 3442 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3443 if (ConstantSize) { 3444 // Memcpy with size zero? Just return the original chain. 3445 if (ConstantSize->isNullValue()) 3446 return Chain; 3447 3448 SDValue Result = 3449 getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3450 ConstantSize->getZExtValue(), 3451 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3452 if (Result.getNode()) 3453 return Result; 3454 } 3455 3456 // Then check to see if we should lower the memcpy with target-specific 3457 // code. If the target chooses to do this, this is the next best. 3458 SDValue Result = 3459 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3460 AlwaysInline, 3461 DstSV, DstSVOff, SrcSV, SrcSVOff); 3462 if (Result.getNode()) 3463 return Result; 3464 3465 // If we really need inline code and the target declined to provide it, 3466 // use a (potentially long) sequence of loads and stores. 3467 if (AlwaysInline) { 3468 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3469 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3470 ConstantSize->getZExtValue(), Align, true, 3471 DstSV, DstSVOff, SrcSV, SrcSVOff); 3472 } 3473 3474 // Emit a library call. 3475 TargetLowering::ArgListTy Args; 3476 TargetLowering::ArgListEntry Entry; 3477 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3478 Entry.Node = Dst; Args.push_back(Entry); 3479 Entry.Node = Src; Args.push_back(Entry); 3480 Entry.Node = Size; Args.push_back(Entry); 3481 // FIXME: pass in DebugLoc 3482 std::pair<SDValue,SDValue> CallResult = 3483 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3484 false, false, false, false, 0, 3485 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3486 /*isReturnValueUsed=*/false, 3487 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3488 TLI.getPointerTy()), 3489 Args, *this, dl); 3490 return CallResult.second; 3491} 3492 3493SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3494 SDValue Src, SDValue Size, 3495 unsigned Align, 3496 const Value *DstSV, uint64_t DstSVOff, 3497 const Value *SrcSV, uint64_t SrcSVOff) { 3498 3499 // Check to see if we should lower the memmove to loads and stores first. 3500 // For cases within the target-specified limits, this is the best choice. 3501 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3502 if (ConstantSize) { 3503 // Memmove with size zero? Just return the original chain. 3504 if (ConstantSize->isNullValue()) 3505 return Chain; 3506 3507 SDValue Result = 3508 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3509 ConstantSize->getZExtValue(), 3510 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3511 if (Result.getNode()) 3512 return Result; 3513 } 3514 3515 // Then check to see if we should lower the memmove with target-specific 3516 // code. If the target chooses to do this, this is the next best. 3517 SDValue Result = 3518 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, 3519 DstSV, DstSVOff, SrcSV, SrcSVOff); 3520 if (Result.getNode()) 3521 return Result; 3522 3523 // Emit a library call. 3524 TargetLowering::ArgListTy Args; 3525 TargetLowering::ArgListEntry Entry; 3526 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3527 Entry.Node = Dst; Args.push_back(Entry); 3528 Entry.Node = Src; Args.push_back(Entry); 3529 Entry.Node = Size; Args.push_back(Entry); 3530 // FIXME: pass in DebugLoc 3531 std::pair<SDValue,SDValue> CallResult = 3532 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3533 false, false, false, false, 0, 3534 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3535 /*isReturnValueUsed=*/false, 3536 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3537 TLI.getPointerTy()), 3538 Args, *this, dl); 3539 return CallResult.second; 3540} 3541 3542SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3543 SDValue Src, SDValue Size, 3544 unsigned Align, 3545 const Value *DstSV, uint64_t DstSVOff) { 3546 3547 // Check to see if we should lower the memset to stores first. 3548 // For cases within the target-specified limits, this is the best choice. 3549 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3550 if (ConstantSize) { 3551 // Memset with size zero? Just return the original chain. 3552 if (ConstantSize->isNullValue()) 3553 return Chain; 3554 3555 SDValue Result = 3556 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3557 Align, DstSV, DstSVOff); 3558 if (Result.getNode()) 3559 return Result; 3560 } 3561 3562 // Then check to see if we should lower the memset with target-specific 3563 // code. If the target chooses to do this, this is the next best. 3564 SDValue Result = 3565 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, 3566 DstSV, DstSVOff); 3567 if (Result.getNode()) 3568 return Result; 3569 3570 // Emit a library call. 3571 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3572 TargetLowering::ArgListTy Args; 3573 TargetLowering::ArgListEntry Entry; 3574 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3575 Args.push_back(Entry); 3576 // Extend or truncate the argument to be an i32 value for the call. 3577 if (Src.getValueType().bitsGT(MVT::i32)) 3578 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3579 else 3580 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3581 Entry.Node = Src; 3582 Entry.Ty = Type::getInt32Ty(*getContext()); 3583 Entry.isSExt = true; 3584 Args.push_back(Entry); 3585 Entry.Node = Size; 3586 Entry.Ty = IntPtrTy; 3587 Entry.isSExt = false; 3588 Args.push_back(Entry); 3589 // FIXME: pass in DebugLoc 3590 std::pair<SDValue,SDValue> CallResult = 3591 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3592 false, false, false, false, 0, 3593 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3594 /*isReturnValueUsed=*/false, 3595 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3596 TLI.getPointerTy()), 3597 Args, *this, dl); 3598 return CallResult.second; 3599} 3600 3601SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3602 SDValue Chain, 3603 SDValue Ptr, SDValue Cmp, 3604 SDValue Swp, const Value* PtrVal, 3605 unsigned Alignment) { 3606 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3607 Alignment = getEVTAlignment(MemVT); 3608 3609 // Check if the memory reference references a frame index 3610 if (!PtrVal) 3611 if (const FrameIndexSDNode *FI = 3612 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3613 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3614 3615 MachineFunction &MF = getMachineFunction(); 3616 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3617 3618 // For now, atomics are considered to be volatile always. 3619 Flags |= MachineMemOperand::MOVolatile; 3620 3621 MachineMemOperand *MMO = 3622 MF.getMachineMemOperand(PtrVal, Flags, 0, 3623 MemVT.getStoreSize(), Alignment); 3624 3625 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3626} 3627 3628SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3629 SDValue Chain, 3630 SDValue Ptr, SDValue Cmp, 3631 SDValue Swp, MachineMemOperand *MMO) { 3632 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3633 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3634 3635 EVT VT = Cmp.getValueType(); 3636 3637 SDVTList VTs = getVTList(VT, MVT::Other); 3638 FoldingSetNodeID ID; 3639 ID.AddInteger(MemVT.getRawBits()); 3640 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3641 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3642 void* IP = 0; 3643 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3644 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3645 return SDValue(E, 0); 3646 } 3647 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3648 Ptr, Cmp, Swp, MMO); 3649 CSEMap.InsertNode(N, IP); 3650 AllNodes.push_back(N); 3651 return SDValue(N, 0); 3652} 3653 3654SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3655 SDValue Chain, 3656 SDValue Ptr, SDValue Val, 3657 const Value* PtrVal, 3658 unsigned Alignment) { 3659 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3660 Alignment = getEVTAlignment(MemVT); 3661 3662 // Check if the memory reference references a frame index 3663 if (!PtrVal) 3664 if (const FrameIndexSDNode *FI = 3665 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3666 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3667 3668 MachineFunction &MF = getMachineFunction(); 3669 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3670 3671 // For now, atomics are considered to be volatile always. 3672 Flags |= MachineMemOperand::MOVolatile; 3673 3674 MachineMemOperand *MMO = 3675 MF.getMachineMemOperand(PtrVal, Flags, 0, 3676 MemVT.getStoreSize(), Alignment); 3677 3678 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3679} 3680 3681SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3682 SDValue Chain, 3683 SDValue Ptr, SDValue Val, 3684 MachineMemOperand *MMO) { 3685 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3686 Opcode == ISD::ATOMIC_LOAD_SUB || 3687 Opcode == ISD::ATOMIC_LOAD_AND || 3688 Opcode == ISD::ATOMIC_LOAD_OR || 3689 Opcode == ISD::ATOMIC_LOAD_XOR || 3690 Opcode == ISD::ATOMIC_LOAD_NAND || 3691 Opcode == ISD::ATOMIC_LOAD_MIN || 3692 Opcode == ISD::ATOMIC_LOAD_MAX || 3693 Opcode == ISD::ATOMIC_LOAD_UMIN || 3694 Opcode == ISD::ATOMIC_LOAD_UMAX || 3695 Opcode == ISD::ATOMIC_SWAP) && 3696 "Invalid Atomic Op"); 3697 3698 EVT VT = Val.getValueType(); 3699 3700 SDVTList VTs = getVTList(VT, MVT::Other); 3701 FoldingSetNodeID ID; 3702 ID.AddInteger(MemVT.getRawBits()); 3703 SDValue Ops[] = {Chain, Ptr, Val}; 3704 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3705 void* IP = 0; 3706 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3707 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3708 return SDValue(E, 0); 3709 } 3710 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3711 Ptr, Val, MMO); 3712 CSEMap.InsertNode(N, IP); 3713 AllNodes.push_back(N); 3714 return SDValue(N, 0); 3715} 3716 3717/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3718/// Allowed to return something different (and simpler) if Simplify is true. 3719SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3720 DebugLoc dl) { 3721 if (NumOps == 1) 3722 return Ops[0]; 3723 3724 SmallVector<EVT, 4> VTs; 3725 VTs.reserve(NumOps); 3726 for (unsigned i = 0; i < NumOps; ++i) 3727 VTs.push_back(Ops[i].getValueType()); 3728 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3729 Ops, NumOps); 3730} 3731 3732SDValue 3733SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3734 const EVT *VTs, unsigned NumVTs, 3735 const SDValue *Ops, unsigned NumOps, 3736 EVT MemVT, const Value *srcValue, int SVOff, 3737 unsigned Align, bool Vol, 3738 bool ReadMem, bool WriteMem) { 3739 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3740 MemVT, srcValue, SVOff, Align, Vol, 3741 ReadMem, WriteMem); 3742} 3743 3744SDValue 3745SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3746 const SDValue *Ops, unsigned NumOps, 3747 EVT MemVT, const Value *srcValue, int SVOff, 3748 unsigned Align, bool Vol, 3749 bool ReadMem, bool WriteMem) { 3750 if (Align == 0) // Ensure that codegen never sees alignment 0 3751 Align = getEVTAlignment(MemVT); 3752 3753 MachineFunction &MF = getMachineFunction(); 3754 unsigned Flags = 0; 3755 if (WriteMem) 3756 Flags |= MachineMemOperand::MOStore; 3757 if (ReadMem) 3758 Flags |= MachineMemOperand::MOLoad; 3759 if (Vol) 3760 Flags |= MachineMemOperand::MOVolatile; 3761 MachineMemOperand *MMO = 3762 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3763 MemVT.getStoreSize(), Align); 3764 3765 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3766} 3767 3768SDValue 3769SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3770 const SDValue *Ops, unsigned NumOps, 3771 EVT MemVT, MachineMemOperand *MMO) { 3772 assert((Opcode == ISD::INTRINSIC_VOID || 3773 Opcode == ISD::INTRINSIC_W_CHAIN || 3774 (Opcode <= INT_MAX && 3775 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3776 "Opcode is not a memory-accessing opcode!"); 3777 3778 // Memoize the node unless it returns a flag. 3779 MemIntrinsicSDNode *N; 3780 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3781 FoldingSetNodeID ID; 3782 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3783 void *IP = 0; 3784 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3785 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3786 return SDValue(E, 0); 3787 } 3788 3789 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3790 MemVT, MMO); 3791 CSEMap.InsertNode(N, IP); 3792 } else { 3793 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3794 MemVT, MMO); 3795 } 3796 AllNodes.push_back(N); 3797 return SDValue(N, 0); 3798} 3799 3800SDValue 3801SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3802 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3803 SDValue Ptr, SDValue Offset, 3804 const Value *SV, int SVOffset, EVT MemVT, 3805 bool isVolatile, bool isNonTemporal, 3806 unsigned Alignment) { 3807 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3808 Alignment = getEVTAlignment(VT); 3809 3810 // Check if the memory reference references a frame index 3811 if (!SV) 3812 if (const FrameIndexSDNode *FI = 3813 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3814 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3815 3816 MachineFunction &MF = getMachineFunction(); 3817 unsigned Flags = MachineMemOperand::MOLoad; 3818 if (isVolatile) 3819 Flags |= MachineMemOperand::MOVolatile; 3820 if (isNonTemporal) 3821 Flags |= MachineMemOperand::MONonTemporal; 3822 MachineMemOperand *MMO = 3823 MF.getMachineMemOperand(SV, Flags, SVOffset, 3824 MemVT.getStoreSize(), Alignment); 3825 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3826} 3827 3828SDValue 3829SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3830 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3831 SDValue Ptr, SDValue Offset, EVT MemVT, 3832 MachineMemOperand *MMO) { 3833 if (VT == MemVT) { 3834 ExtType = ISD::NON_EXTLOAD; 3835 } else if (ExtType == ISD::NON_EXTLOAD) { 3836 assert(VT == MemVT && "Non-extending load from different memory type!"); 3837 } else { 3838 // Extending load. 3839 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3840 "Should only be an extending load, not truncating!"); 3841 assert(VT.isInteger() == MemVT.isInteger() && 3842 "Cannot convert from FP to Int or Int -> FP!"); 3843 assert(VT.isVector() == MemVT.isVector() && 3844 "Cannot use trunc store to convert to or from a vector!"); 3845 assert((!VT.isVector() || 3846 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3847 "Cannot use trunc store to change the number of vector elements!"); 3848 } 3849 3850 bool Indexed = AM != ISD::UNINDEXED; 3851 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3852 "Unindexed load with an offset!"); 3853 3854 SDVTList VTs = Indexed ? 3855 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3856 SDValue Ops[] = { Chain, Ptr, Offset }; 3857 FoldingSetNodeID ID; 3858 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3859 ID.AddInteger(MemVT.getRawBits()); 3860 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3861 MMO->isNonTemporal())); 3862 void *IP = 0; 3863 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3864 cast<LoadSDNode>(E)->refineAlignment(MMO); 3865 return SDValue(E, 0); 3866 } 3867 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3868 MemVT, MMO); 3869 CSEMap.InsertNode(N, IP); 3870 AllNodes.push_back(N); 3871 return SDValue(N, 0); 3872} 3873 3874SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3875 SDValue Chain, SDValue Ptr, 3876 const Value *SV, int SVOffset, 3877 bool isVolatile, bool isNonTemporal, 3878 unsigned Alignment) { 3879 SDValue Undef = getUNDEF(Ptr.getValueType()); 3880 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3881 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3882} 3883 3884SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3885 SDValue Chain, SDValue Ptr, 3886 const Value *SV, 3887 int SVOffset, EVT MemVT, 3888 bool isVolatile, bool isNonTemporal, 3889 unsigned Alignment) { 3890 SDValue Undef = getUNDEF(Ptr.getValueType()); 3891 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3892 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3893} 3894 3895SDValue 3896SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3897 SDValue Offset, ISD::MemIndexedMode AM) { 3898 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3899 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3900 "Load is already a indexed load!"); 3901 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3902 LD->getChain(), Base, Offset, LD->getSrcValue(), 3903 LD->getSrcValueOffset(), LD->getMemoryVT(), 3904 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3905} 3906 3907SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3908 SDValue Ptr, const Value *SV, int SVOffset, 3909 bool isVolatile, bool isNonTemporal, 3910 unsigned Alignment) { 3911 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3912 Alignment = getEVTAlignment(Val.getValueType()); 3913 3914 // Check if the memory reference references a frame index 3915 if (!SV) 3916 if (const FrameIndexSDNode *FI = 3917 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3918 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3919 3920 MachineFunction &MF = getMachineFunction(); 3921 unsigned Flags = MachineMemOperand::MOStore; 3922 if (isVolatile) 3923 Flags |= MachineMemOperand::MOVolatile; 3924 if (isNonTemporal) 3925 Flags |= MachineMemOperand::MONonTemporal; 3926 MachineMemOperand *MMO = 3927 MF.getMachineMemOperand(SV, Flags, SVOffset, 3928 Val.getValueType().getStoreSize(), Alignment); 3929 3930 return getStore(Chain, dl, Val, Ptr, MMO); 3931} 3932 3933SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3934 SDValue Ptr, MachineMemOperand *MMO) { 3935 EVT VT = Val.getValueType(); 3936 SDVTList VTs = getVTList(MVT::Other); 3937 SDValue Undef = getUNDEF(Ptr.getValueType()); 3938 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3939 FoldingSetNodeID ID; 3940 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3941 ID.AddInteger(VT.getRawBits()); 3942 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 3943 MMO->isNonTemporal())); 3944 void *IP = 0; 3945 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3946 cast<StoreSDNode>(E)->refineAlignment(MMO); 3947 return SDValue(E, 0); 3948 } 3949 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 3950 false, VT, MMO); 3951 CSEMap.InsertNode(N, IP); 3952 AllNodes.push_back(N); 3953 return SDValue(N, 0); 3954} 3955 3956SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3957 SDValue Ptr, const Value *SV, 3958 int SVOffset, EVT SVT, 3959 bool isVolatile, bool isNonTemporal, 3960 unsigned Alignment) { 3961 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3962 Alignment = getEVTAlignment(SVT); 3963 3964 // Check if the memory reference references a frame index 3965 if (!SV) 3966 if (const FrameIndexSDNode *FI = 3967 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3968 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3969 3970 MachineFunction &MF = getMachineFunction(); 3971 unsigned Flags = MachineMemOperand::MOStore; 3972 if (isVolatile) 3973 Flags |= MachineMemOperand::MOVolatile; 3974 if (isNonTemporal) 3975 Flags |= MachineMemOperand::MONonTemporal; 3976 MachineMemOperand *MMO = 3977 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 3978 3979 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 3980} 3981 3982SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3983 SDValue Ptr, EVT SVT, 3984 MachineMemOperand *MMO) { 3985 EVT VT = Val.getValueType(); 3986 3987 if (VT == SVT) 3988 return getStore(Chain, dl, Val, Ptr, MMO); 3989 3990 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 3991 "Should only be a truncating store, not extending!"); 3992 assert(VT.isInteger() == SVT.isInteger() && 3993 "Can't do FP-INT conversion!"); 3994 assert(VT.isVector() == SVT.isVector() && 3995 "Cannot use trunc store to convert to or from a vector!"); 3996 assert((!VT.isVector() || 3997 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 3998 "Cannot use trunc store to change the number of vector elements!"); 3999 4000 SDVTList VTs = getVTList(MVT::Other); 4001 SDValue Undef = getUNDEF(Ptr.getValueType()); 4002 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4003 FoldingSetNodeID ID; 4004 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4005 ID.AddInteger(SVT.getRawBits()); 4006 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4007 MMO->isNonTemporal())); 4008 void *IP = 0; 4009 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4010 cast<StoreSDNode>(E)->refineAlignment(MMO); 4011 return SDValue(E, 0); 4012 } 4013 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4014 true, SVT, MMO); 4015 CSEMap.InsertNode(N, IP); 4016 AllNodes.push_back(N); 4017 return SDValue(N, 0); 4018} 4019 4020SDValue 4021SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4022 SDValue Offset, ISD::MemIndexedMode AM) { 4023 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4024 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4025 "Store is already a indexed store!"); 4026 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4027 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4028 FoldingSetNodeID ID; 4029 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4030 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4031 ID.AddInteger(ST->getRawSubclassData()); 4032 void *IP = 0; 4033 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4034 return SDValue(E, 0); 4035 4036 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4037 ST->isTruncatingStore(), 4038 ST->getMemoryVT(), 4039 ST->getMemOperand()); 4040 CSEMap.InsertNode(N, IP); 4041 AllNodes.push_back(N); 4042 return SDValue(N, 0); 4043} 4044 4045SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4046 SDValue Chain, SDValue Ptr, 4047 SDValue SV) { 4048 SDValue Ops[] = { Chain, Ptr, SV }; 4049 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4050} 4051 4052SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4053 const SDUse *Ops, unsigned NumOps) { 4054 switch (NumOps) { 4055 case 0: return getNode(Opcode, DL, VT); 4056 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4057 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4058 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4059 default: break; 4060 } 4061 4062 // Copy from an SDUse array into an SDValue array for use with 4063 // the regular getNode logic. 4064 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4065 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4066} 4067 4068SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4069 const SDValue *Ops, unsigned NumOps) { 4070 switch (NumOps) { 4071 case 0: return getNode(Opcode, DL, VT); 4072 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4073 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4074 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4075 default: break; 4076 } 4077 4078 switch (Opcode) { 4079 default: break; 4080 case ISD::SELECT_CC: { 4081 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4082 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4083 "LHS and RHS of condition must have same type!"); 4084 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4085 "True and False arms of SelectCC must have same type!"); 4086 assert(Ops[2].getValueType() == VT && 4087 "select_cc node must be of same type as true and false value!"); 4088 break; 4089 } 4090 case ISD::BR_CC: { 4091 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4092 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4093 "LHS/RHS of comparison should match types!"); 4094 break; 4095 } 4096 } 4097 4098 // Memoize nodes. 4099 SDNode *N; 4100 SDVTList VTs = getVTList(VT); 4101 4102 if (VT != MVT::Flag) { 4103 FoldingSetNodeID ID; 4104 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4105 void *IP = 0; 4106 4107 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4108 return SDValue(E, 0); 4109 4110 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4111 CSEMap.InsertNode(N, IP); 4112 } else { 4113 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4114 } 4115 4116 AllNodes.push_back(N); 4117#ifndef NDEBUG 4118 VerifyNode(N); 4119#endif 4120 return SDValue(N, 0); 4121} 4122 4123SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4124 const std::vector<EVT> &ResultTys, 4125 const SDValue *Ops, unsigned NumOps) { 4126 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4127 Ops, NumOps); 4128} 4129 4130SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4131 const EVT *VTs, unsigned NumVTs, 4132 const SDValue *Ops, unsigned NumOps) { 4133 if (NumVTs == 1) 4134 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4135 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4136} 4137 4138SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4139 const SDValue *Ops, unsigned NumOps) { 4140 if (VTList.NumVTs == 1) 4141 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4142 4143#if 0 4144 switch (Opcode) { 4145 // FIXME: figure out how to safely handle things like 4146 // int foo(int x) { return 1 << (x & 255); } 4147 // int bar() { return foo(256); } 4148 case ISD::SRA_PARTS: 4149 case ISD::SRL_PARTS: 4150 case ISD::SHL_PARTS: 4151 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4152 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4153 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4154 else if (N3.getOpcode() == ISD::AND) 4155 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4156 // If the and is only masking out bits that cannot effect the shift, 4157 // eliminate the and. 4158 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4159 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4160 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4161 } 4162 break; 4163 } 4164#endif 4165 4166 // Memoize the node unless it returns a flag. 4167 SDNode *N; 4168 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4169 FoldingSetNodeID ID; 4170 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4171 void *IP = 0; 4172 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4173 return SDValue(E, 0); 4174 4175 if (NumOps == 1) { 4176 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4177 } else if (NumOps == 2) { 4178 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4179 } else if (NumOps == 3) { 4180 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4181 Ops[2]); 4182 } else { 4183 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4184 } 4185 CSEMap.InsertNode(N, IP); 4186 } else { 4187 if (NumOps == 1) { 4188 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4189 } else if (NumOps == 2) { 4190 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4191 } else if (NumOps == 3) { 4192 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4193 Ops[2]); 4194 } else { 4195 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4196 } 4197 } 4198 AllNodes.push_back(N); 4199#ifndef NDEBUG 4200 VerifyNode(N); 4201#endif 4202 return SDValue(N, 0); 4203} 4204 4205SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4206 return getNode(Opcode, DL, VTList, 0, 0); 4207} 4208 4209SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4210 SDValue N1) { 4211 SDValue Ops[] = { N1 }; 4212 return getNode(Opcode, DL, VTList, Ops, 1); 4213} 4214 4215SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4216 SDValue N1, SDValue N2) { 4217 SDValue Ops[] = { N1, N2 }; 4218 return getNode(Opcode, DL, VTList, Ops, 2); 4219} 4220 4221SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4222 SDValue N1, SDValue N2, SDValue N3) { 4223 SDValue Ops[] = { N1, N2, N3 }; 4224 return getNode(Opcode, DL, VTList, Ops, 3); 4225} 4226 4227SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4228 SDValue N1, SDValue N2, SDValue N3, 4229 SDValue N4) { 4230 SDValue Ops[] = { N1, N2, N3, N4 }; 4231 return getNode(Opcode, DL, VTList, Ops, 4); 4232} 4233 4234SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4235 SDValue N1, SDValue N2, SDValue N3, 4236 SDValue N4, SDValue N5) { 4237 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4238 return getNode(Opcode, DL, VTList, Ops, 5); 4239} 4240 4241SDVTList SelectionDAG::getVTList(EVT VT) { 4242 return makeVTList(SDNode::getValueTypeList(VT), 1); 4243} 4244 4245SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4246 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4247 E = VTList.rend(); I != E; ++I) 4248 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4249 return *I; 4250 4251 EVT *Array = Allocator.Allocate<EVT>(2); 4252 Array[0] = VT1; 4253 Array[1] = VT2; 4254 SDVTList Result = makeVTList(Array, 2); 4255 VTList.push_back(Result); 4256 return Result; 4257} 4258 4259SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4260 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4261 E = VTList.rend(); I != E; ++I) 4262 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4263 I->VTs[2] == VT3) 4264 return *I; 4265 4266 EVT *Array = Allocator.Allocate<EVT>(3); 4267 Array[0] = VT1; 4268 Array[1] = VT2; 4269 Array[2] = VT3; 4270 SDVTList Result = makeVTList(Array, 3); 4271 VTList.push_back(Result); 4272 return Result; 4273} 4274 4275SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4276 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4277 E = VTList.rend(); I != E; ++I) 4278 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4279 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4280 return *I; 4281 4282 EVT *Array = Allocator.Allocate<EVT>(4); 4283 Array[0] = VT1; 4284 Array[1] = VT2; 4285 Array[2] = VT3; 4286 Array[3] = VT4; 4287 SDVTList Result = makeVTList(Array, 4); 4288 VTList.push_back(Result); 4289 return Result; 4290} 4291 4292SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4293 switch (NumVTs) { 4294 case 0: llvm_unreachable("Cannot have nodes without results!"); 4295 case 1: return getVTList(VTs[0]); 4296 case 2: return getVTList(VTs[0], VTs[1]); 4297 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4298 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4299 default: break; 4300 } 4301 4302 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4303 E = VTList.rend(); I != E; ++I) { 4304 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4305 continue; 4306 4307 bool NoMatch = false; 4308 for (unsigned i = 2; i != NumVTs; ++i) 4309 if (VTs[i] != I->VTs[i]) { 4310 NoMatch = true; 4311 break; 4312 } 4313 if (!NoMatch) 4314 return *I; 4315 } 4316 4317 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4318 std::copy(VTs, VTs+NumVTs, Array); 4319 SDVTList Result = makeVTList(Array, NumVTs); 4320 VTList.push_back(Result); 4321 return Result; 4322} 4323 4324 4325/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4326/// specified operands. If the resultant node already exists in the DAG, 4327/// this does not modify the specified node, instead it returns the node that 4328/// already exists. If the resultant node does not exist in the DAG, the 4329/// input node is returned. As a degenerate case, if you specify the same 4330/// input operands as the node already has, the input node is returned. 4331SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4332 SDNode *N = InN.getNode(); 4333 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4334 4335 // Check to see if there is no change. 4336 if (Op == N->getOperand(0)) return InN; 4337 4338 // See if the modified node already exists. 4339 void *InsertPos = 0; 4340 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4341 return SDValue(Existing, InN.getResNo()); 4342 4343 // Nope it doesn't. Remove the node from its current place in the maps. 4344 if (InsertPos) 4345 if (!RemoveNodeFromCSEMaps(N)) 4346 InsertPos = 0; 4347 4348 // Now we update the operands. 4349 N->OperandList[0].set(Op); 4350 4351 // If this gets put into a CSE map, add it. 4352 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4353 return InN; 4354} 4355 4356SDValue SelectionDAG:: 4357UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4358 SDNode *N = InN.getNode(); 4359 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4360 4361 // Check to see if there is no change. 4362 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4363 return InN; // No operands changed, just return the input node. 4364 4365 // See if the modified node already exists. 4366 void *InsertPos = 0; 4367 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4368 return SDValue(Existing, InN.getResNo()); 4369 4370 // Nope it doesn't. Remove the node from its current place in the maps. 4371 if (InsertPos) 4372 if (!RemoveNodeFromCSEMaps(N)) 4373 InsertPos = 0; 4374 4375 // Now we update the operands. 4376 if (N->OperandList[0] != Op1) 4377 N->OperandList[0].set(Op1); 4378 if (N->OperandList[1] != Op2) 4379 N->OperandList[1].set(Op2); 4380 4381 // If this gets put into a CSE map, add it. 4382 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4383 return InN; 4384} 4385 4386SDValue SelectionDAG:: 4387UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4388 SDValue Ops[] = { Op1, Op2, Op3 }; 4389 return UpdateNodeOperands(N, Ops, 3); 4390} 4391 4392SDValue SelectionDAG:: 4393UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4394 SDValue Op3, SDValue Op4) { 4395 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4396 return UpdateNodeOperands(N, Ops, 4); 4397} 4398 4399SDValue SelectionDAG:: 4400UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4401 SDValue Op3, SDValue Op4, SDValue Op5) { 4402 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4403 return UpdateNodeOperands(N, Ops, 5); 4404} 4405 4406SDValue SelectionDAG:: 4407UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4408 SDNode *N = InN.getNode(); 4409 assert(N->getNumOperands() == NumOps && 4410 "Update with wrong number of operands"); 4411 4412 // Check to see if there is no change. 4413 bool AnyChange = false; 4414 for (unsigned i = 0; i != NumOps; ++i) { 4415 if (Ops[i] != N->getOperand(i)) { 4416 AnyChange = true; 4417 break; 4418 } 4419 } 4420 4421 // No operands changed, just return the input node. 4422 if (!AnyChange) return InN; 4423 4424 // See if the modified node already exists. 4425 void *InsertPos = 0; 4426 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4427 return SDValue(Existing, InN.getResNo()); 4428 4429 // Nope it doesn't. Remove the node from its current place in the maps. 4430 if (InsertPos) 4431 if (!RemoveNodeFromCSEMaps(N)) 4432 InsertPos = 0; 4433 4434 // Now we update the operands. 4435 for (unsigned i = 0; i != NumOps; ++i) 4436 if (N->OperandList[i] != Ops[i]) 4437 N->OperandList[i].set(Ops[i]); 4438 4439 // If this gets put into a CSE map, add it. 4440 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4441 return InN; 4442} 4443 4444/// DropOperands - Release the operands and set this node to have 4445/// zero operands. 4446void SDNode::DropOperands() { 4447 // Unlike the code in MorphNodeTo that does this, we don't need to 4448 // watch for dead nodes here. 4449 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4450 SDUse &Use = *I++; 4451 Use.set(SDValue()); 4452 } 4453} 4454 4455/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4456/// machine opcode. 4457/// 4458SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4459 EVT VT) { 4460 SDVTList VTs = getVTList(VT); 4461 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4462} 4463 4464SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4465 EVT VT, SDValue Op1) { 4466 SDVTList VTs = getVTList(VT); 4467 SDValue Ops[] = { Op1 }; 4468 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4469} 4470 4471SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4472 EVT VT, SDValue Op1, 4473 SDValue Op2) { 4474 SDVTList VTs = getVTList(VT); 4475 SDValue Ops[] = { Op1, Op2 }; 4476 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4477} 4478 4479SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4480 EVT VT, SDValue Op1, 4481 SDValue Op2, SDValue Op3) { 4482 SDVTList VTs = getVTList(VT); 4483 SDValue Ops[] = { Op1, Op2, Op3 }; 4484 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4485} 4486 4487SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4488 EVT VT, const SDValue *Ops, 4489 unsigned NumOps) { 4490 SDVTList VTs = getVTList(VT); 4491 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4492} 4493 4494SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4495 EVT VT1, EVT VT2, const SDValue *Ops, 4496 unsigned NumOps) { 4497 SDVTList VTs = getVTList(VT1, VT2); 4498 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4499} 4500 4501SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4502 EVT VT1, EVT VT2) { 4503 SDVTList VTs = getVTList(VT1, VT2); 4504 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4505} 4506 4507SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4508 EVT VT1, EVT VT2, EVT VT3, 4509 const SDValue *Ops, unsigned NumOps) { 4510 SDVTList VTs = getVTList(VT1, VT2, VT3); 4511 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4512} 4513 4514SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4515 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4516 const SDValue *Ops, unsigned NumOps) { 4517 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4518 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4519} 4520 4521SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4522 EVT VT1, EVT VT2, 4523 SDValue Op1) { 4524 SDVTList VTs = getVTList(VT1, VT2); 4525 SDValue Ops[] = { Op1 }; 4526 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4527} 4528 4529SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4530 EVT VT1, EVT VT2, 4531 SDValue Op1, SDValue Op2) { 4532 SDVTList VTs = getVTList(VT1, VT2); 4533 SDValue Ops[] = { Op1, Op2 }; 4534 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4535} 4536 4537SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4538 EVT VT1, EVT VT2, 4539 SDValue Op1, SDValue Op2, 4540 SDValue Op3) { 4541 SDVTList VTs = getVTList(VT1, VT2); 4542 SDValue Ops[] = { Op1, Op2, Op3 }; 4543 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4544} 4545 4546SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4547 EVT VT1, EVT VT2, EVT VT3, 4548 SDValue Op1, SDValue Op2, 4549 SDValue Op3) { 4550 SDVTList VTs = getVTList(VT1, VT2, VT3); 4551 SDValue Ops[] = { Op1, Op2, Op3 }; 4552 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4553} 4554 4555SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4556 SDVTList VTs, const SDValue *Ops, 4557 unsigned NumOps) { 4558 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4559 // Reset the NodeID to -1. 4560 N->setNodeId(-1); 4561 return N; 4562} 4563 4564/// MorphNodeTo - This *mutates* the specified node to have the specified 4565/// return type, opcode, and operands. 4566/// 4567/// Note that MorphNodeTo returns the resultant node. If there is already a 4568/// node of the specified opcode and operands, it returns that node instead of 4569/// the current one. Note that the DebugLoc need not be the same. 4570/// 4571/// Using MorphNodeTo is faster than creating a new node and swapping it in 4572/// with ReplaceAllUsesWith both because it often avoids allocating a new 4573/// node, and because it doesn't require CSE recalculation for any of 4574/// the node's users. 4575/// 4576SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4577 SDVTList VTs, const SDValue *Ops, 4578 unsigned NumOps) { 4579 // If an identical node already exists, use it. 4580 void *IP = 0; 4581 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4582 FoldingSetNodeID ID; 4583 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4584 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4585 return ON; 4586 } 4587 4588 if (!RemoveNodeFromCSEMaps(N)) 4589 IP = 0; 4590 4591 // Start the morphing. 4592 N->NodeType = Opc; 4593 N->ValueList = VTs.VTs; 4594 N->NumValues = VTs.NumVTs; 4595 4596 // Clear the operands list, updating used nodes to remove this from their 4597 // use list. Keep track of any operands that become dead as a result. 4598 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4599 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4600 SDUse &Use = *I++; 4601 SDNode *Used = Use.getNode(); 4602 Use.set(SDValue()); 4603 if (Used->use_empty()) 4604 DeadNodeSet.insert(Used); 4605 } 4606 4607 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4608 // Initialize the memory references information. 4609 MN->setMemRefs(0, 0); 4610 // If NumOps is larger than the # of operands we can have in a 4611 // MachineSDNode, reallocate the operand list. 4612 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4613 if (MN->OperandsNeedDelete) 4614 delete[] MN->OperandList; 4615 if (NumOps > array_lengthof(MN->LocalOperands)) 4616 // We're creating a final node that will live unmorphed for the 4617 // remainder of the current SelectionDAG iteration, so we can allocate 4618 // the operands directly out of a pool with no recycling metadata. 4619 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4620 Ops, NumOps); 4621 else 4622 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4623 MN->OperandsNeedDelete = false; 4624 } else 4625 MN->InitOperands(MN->OperandList, Ops, NumOps); 4626 } else { 4627 // If NumOps is larger than the # of operands we currently have, reallocate 4628 // the operand list. 4629 if (NumOps > N->NumOperands) { 4630 if (N->OperandsNeedDelete) 4631 delete[] N->OperandList; 4632 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4633 N->OperandsNeedDelete = true; 4634 } else 4635 N->InitOperands(N->OperandList, Ops, NumOps); 4636 } 4637 4638 // Delete any nodes that are still dead after adding the uses for the 4639 // new operands. 4640 if (!DeadNodeSet.empty()) { 4641 SmallVector<SDNode *, 16> DeadNodes; 4642 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4643 E = DeadNodeSet.end(); I != E; ++I) 4644 if ((*I)->use_empty()) 4645 DeadNodes.push_back(*I); 4646 RemoveDeadNodes(DeadNodes); 4647 } 4648 4649 if (IP) 4650 CSEMap.InsertNode(N, IP); // Memoize the new node. 4651 return N; 4652} 4653 4654 4655/// getMachineNode - These are used for target selectors to create a new node 4656/// with specified return type(s), MachineInstr opcode, and operands. 4657/// 4658/// Note that getMachineNode returns the resultant node. If there is already a 4659/// node of the specified opcode and operands, it returns that node instead of 4660/// the current one. 4661MachineSDNode * 4662SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4663 SDVTList VTs = getVTList(VT); 4664 return getMachineNode(Opcode, dl, VTs, 0, 0); 4665} 4666 4667MachineSDNode * 4668SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4669 SDVTList VTs = getVTList(VT); 4670 SDValue Ops[] = { Op1 }; 4671 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4672} 4673 4674MachineSDNode * 4675SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4676 SDValue Op1, SDValue Op2) { 4677 SDVTList VTs = getVTList(VT); 4678 SDValue Ops[] = { Op1, Op2 }; 4679 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4680} 4681 4682MachineSDNode * 4683SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4684 SDValue Op1, SDValue Op2, SDValue Op3) { 4685 SDVTList VTs = getVTList(VT); 4686 SDValue Ops[] = { Op1, Op2, Op3 }; 4687 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4688} 4689 4690MachineSDNode * 4691SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4692 const SDValue *Ops, unsigned NumOps) { 4693 SDVTList VTs = getVTList(VT); 4694 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4695} 4696 4697MachineSDNode * 4698SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4699 SDVTList VTs = getVTList(VT1, VT2); 4700 return getMachineNode(Opcode, dl, VTs, 0, 0); 4701} 4702 4703MachineSDNode * 4704SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4705 EVT VT1, EVT VT2, SDValue Op1) { 4706 SDVTList VTs = getVTList(VT1, VT2); 4707 SDValue Ops[] = { Op1 }; 4708 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4709} 4710 4711MachineSDNode * 4712SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4713 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4714 SDVTList VTs = getVTList(VT1, VT2); 4715 SDValue Ops[] = { Op1, Op2 }; 4716 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4717} 4718 4719MachineSDNode * 4720SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4721 EVT VT1, EVT VT2, SDValue Op1, 4722 SDValue Op2, SDValue Op3) { 4723 SDVTList VTs = getVTList(VT1, VT2); 4724 SDValue Ops[] = { Op1, Op2, Op3 }; 4725 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4726} 4727 4728MachineSDNode * 4729SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4730 EVT VT1, EVT VT2, 4731 const SDValue *Ops, unsigned NumOps) { 4732 SDVTList VTs = getVTList(VT1, VT2); 4733 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4734} 4735 4736MachineSDNode * 4737SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4738 EVT VT1, EVT VT2, EVT VT3, 4739 SDValue Op1, SDValue Op2) { 4740 SDVTList VTs = getVTList(VT1, VT2, VT3); 4741 SDValue Ops[] = { Op1, Op2 }; 4742 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4743} 4744 4745MachineSDNode * 4746SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4747 EVT VT1, EVT VT2, EVT VT3, 4748 SDValue Op1, SDValue Op2, SDValue Op3) { 4749 SDVTList VTs = getVTList(VT1, VT2, VT3); 4750 SDValue Ops[] = { Op1, Op2, Op3 }; 4751 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4752} 4753 4754MachineSDNode * 4755SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4756 EVT VT1, EVT VT2, EVT VT3, 4757 const SDValue *Ops, unsigned NumOps) { 4758 SDVTList VTs = getVTList(VT1, VT2, VT3); 4759 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4760} 4761 4762MachineSDNode * 4763SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4764 EVT VT2, EVT VT3, EVT VT4, 4765 const SDValue *Ops, unsigned NumOps) { 4766 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4767 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4768} 4769 4770MachineSDNode * 4771SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4772 const std::vector<EVT> &ResultTys, 4773 const SDValue *Ops, unsigned NumOps) { 4774 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4775 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4776} 4777 4778MachineSDNode * 4779SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4780 const SDValue *Ops, unsigned NumOps) { 4781 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4782 MachineSDNode *N; 4783 void *IP; 4784 4785 if (DoCSE) { 4786 FoldingSetNodeID ID; 4787 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4788 IP = 0; 4789 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4790 return cast<MachineSDNode>(E); 4791 } 4792 4793 // Allocate a new MachineSDNode. 4794 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4795 4796 // Initialize the operands list. 4797 if (NumOps > array_lengthof(N->LocalOperands)) 4798 // We're creating a final node that will live unmorphed for the 4799 // remainder of the current SelectionDAG iteration, so we can allocate 4800 // the operands directly out of a pool with no recycling metadata. 4801 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4802 Ops, NumOps); 4803 else 4804 N->InitOperands(N->LocalOperands, Ops, NumOps); 4805 N->OperandsNeedDelete = false; 4806 4807 if (DoCSE) 4808 CSEMap.InsertNode(N, IP); 4809 4810 AllNodes.push_back(N); 4811#ifndef NDEBUG 4812 VerifyNode(N); 4813#endif 4814 return N; 4815} 4816 4817/// getTargetExtractSubreg - A convenience function for creating 4818/// TargetOpcode::EXTRACT_SUBREG nodes. 4819SDValue 4820SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4821 SDValue Operand) { 4822 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4823 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4824 VT, Operand, SRIdxVal); 4825 return SDValue(Subreg, 0); 4826} 4827 4828/// getTargetInsertSubreg - A convenience function for creating 4829/// TargetOpcode::INSERT_SUBREG nodes. 4830SDValue 4831SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4832 SDValue Operand, SDValue Subreg) { 4833 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4834 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4835 VT, Operand, Subreg, SRIdxVal); 4836 return SDValue(Result, 0); 4837} 4838 4839/// getNodeIfExists - Get the specified node if it's already available, or 4840/// else return NULL. 4841SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4842 const SDValue *Ops, unsigned NumOps) { 4843 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4844 FoldingSetNodeID ID; 4845 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4846 void *IP = 0; 4847 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4848 return E; 4849 } 4850 return NULL; 4851} 4852 4853/// getDbgValue - Creates a SDDbgValue node. 4854/// 4855SDDbgValue * 4856SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4857 DebugLoc DL, unsigned O) { 4858 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4859} 4860 4861SDDbgValue * 4862SelectionDAG::getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off, 4863 DebugLoc DL, unsigned O) { 4864 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4865} 4866 4867SDDbgValue * 4868SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4869 DebugLoc DL, unsigned O) { 4870 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4871} 4872 4873namespace { 4874 4875/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4876/// pointed to by a use iterator is deleted, increment the use iterator 4877/// so that it doesn't dangle. 4878/// 4879/// This class also manages a "downlink" DAGUpdateListener, to forward 4880/// messages to ReplaceAllUsesWith's callers. 4881/// 4882class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4883 SelectionDAG::DAGUpdateListener *DownLink; 4884 SDNode::use_iterator &UI; 4885 SDNode::use_iterator &UE; 4886 4887 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4888 // Increment the iterator as needed. 4889 while (UI != UE && N == *UI) 4890 ++UI; 4891 4892 // Then forward the message. 4893 if (DownLink) DownLink->NodeDeleted(N, E); 4894 } 4895 4896 virtual void NodeUpdated(SDNode *N) { 4897 // Just forward the message. 4898 if (DownLink) DownLink->NodeUpdated(N); 4899 } 4900 4901public: 4902 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4903 SDNode::use_iterator &ui, 4904 SDNode::use_iterator &ue) 4905 : DownLink(dl), UI(ui), UE(ue) {} 4906}; 4907 4908} 4909 4910/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4911/// This can cause recursive merging of nodes in the DAG. 4912/// 4913/// This version assumes From has a single result value. 4914/// 4915void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4916 DAGUpdateListener *UpdateListener) { 4917 SDNode *From = FromN.getNode(); 4918 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4919 "Cannot replace with this method!"); 4920 assert(From != To.getNode() && "Cannot replace uses of with self"); 4921 4922 // Iterate over all the existing uses of From. New uses will be added 4923 // to the beginning of the use list, which we avoid visiting. 4924 // This specifically avoids visiting uses of From that arise while the 4925 // replacement is happening, because any such uses would be the result 4926 // of CSE: If an existing node looks like From after one of its operands 4927 // is replaced by To, we don't want to replace of all its users with To 4928 // too. See PR3018 for more info. 4929 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4930 RAUWUpdateListener Listener(UpdateListener, UI, UE); 4931 while (UI != UE) { 4932 SDNode *User = *UI; 4933 4934 // This node is about to morph, remove its old self from the CSE maps. 4935 RemoveNodeFromCSEMaps(User); 4936 4937 // A user can appear in a use list multiple times, and when this 4938 // happens the uses are usually next to each other in the list. 4939 // To help reduce the number of CSE recomputations, process all 4940 // the uses of this user that we can find this way. 4941 do { 4942 SDUse &Use = UI.getUse(); 4943 ++UI; 4944 Use.set(To); 4945 } while (UI != UE && *UI == User); 4946 4947 // Now that we have modified User, add it back to the CSE maps. If it 4948 // already exists there, recursively merge the results together. 4949 AddModifiedNodeToCSEMaps(User, &Listener); 4950 } 4951} 4952 4953/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4954/// This can cause recursive merging of nodes in the DAG. 4955/// 4956/// This version assumes that for each value of From, there is a 4957/// corresponding value in To in the same position with the same type. 4958/// 4959void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4960 DAGUpdateListener *UpdateListener) { 4961#ifndef NDEBUG 4962 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 4963 assert((!From->hasAnyUseOfValue(i) || 4964 From->getValueType(i) == To->getValueType(i)) && 4965 "Cannot use this version of ReplaceAllUsesWith!"); 4966#endif 4967 4968 // Handle the trivial case. 4969 if (From == To) 4970 return; 4971 4972 // Iterate over just the existing users of From. See the comments in 4973 // the ReplaceAllUsesWith above. 4974 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4975 RAUWUpdateListener Listener(UpdateListener, UI, UE); 4976 while (UI != UE) { 4977 SDNode *User = *UI; 4978 4979 // This node is about to morph, remove its old self from the CSE maps. 4980 RemoveNodeFromCSEMaps(User); 4981 4982 // A user can appear in a use list multiple times, and when this 4983 // happens the uses are usually next to each other in the list. 4984 // To help reduce the number of CSE recomputations, process all 4985 // the uses of this user that we can find this way. 4986 do { 4987 SDUse &Use = UI.getUse(); 4988 ++UI; 4989 Use.setNode(To); 4990 } while (UI != UE && *UI == User); 4991 4992 // Now that we have modified User, add it back to the CSE maps. If it 4993 // already exists there, recursively merge the results together. 4994 AddModifiedNodeToCSEMaps(User, &Listener); 4995 } 4996} 4997 4998/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4999/// This can cause recursive merging of nodes in the DAG. 5000/// 5001/// This version can replace From with any result values. To must match the 5002/// number and types of values returned by From. 5003void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5004 const SDValue *To, 5005 DAGUpdateListener *UpdateListener) { 5006 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5007 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5008 5009 // Iterate over just the existing users of From. See the comments in 5010 // the ReplaceAllUsesWith above. 5011 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5012 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5013 while (UI != UE) { 5014 SDNode *User = *UI; 5015 5016 // This node is about to morph, remove its old self from the CSE maps. 5017 RemoveNodeFromCSEMaps(User); 5018 5019 // A user can appear in a use list multiple times, and when this 5020 // happens the uses are usually next to each other in the list. 5021 // To help reduce the number of CSE recomputations, process all 5022 // the uses of this user that we can find this way. 5023 do { 5024 SDUse &Use = UI.getUse(); 5025 const SDValue &ToOp = To[Use.getResNo()]; 5026 ++UI; 5027 Use.set(ToOp); 5028 } while (UI != UE && *UI == User); 5029 5030 // Now that we have modified User, add it back to the CSE maps. If it 5031 // already exists there, recursively merge the results together. 5032 AddModifiedNodeToCSEMaps(User, &Listener); 5033 } 5034} 5035 5036/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5037/// uses of other values produced by From.getNode() alone. The Deleted 5038/// vector is handled the same way as for ReplaceAllUsesWith. 5039void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5040 DAGUpdateListener *UpdateListener){ 5041 // Handle the really simple, really trivial case efficiently. 5042 if (From == To) return; 5043 5044 // Handle the simple, trivial, case efficiently. 5045 if (From.getNode()->getNumValues() == 1) { 5046 ReplaceAllUsesWith(From, To, UpdateListener); 5047 return; 5048 } 5049 5050 // Iterate over just the existing users of From. See the comments in 5051 // the ReplaceAllUsesWith above. 5052 SDNode::use_iterator UI = From.getNode()->use_begin(), 5053 UE = From.getNode()->use_end(); 5054 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5055 while (UI != UE) { 5056 SDNode *User = *UI; 5057 bool UserRemovedFromCSEMaps = false; 5058 5059 // A user can appear in a use list multiple times, and when this 5060 // happens the uses are usually next to each other in the list. 5061 // To help reduce the number of CSE recomputations, process all 5062 // the uses of this user that we can find this way. 5063 do { 5064 SDUse &Use = UI.getUse(); 5065 5066 // Skip uses of different values from the same node. 5067 if (Use.getResNo() != From.getResNo()) { 5068 ++UI; 5069 continue; 5070 } 5071 5072 // If this node hasn't been modified yet, it's still in the CSE maps, 5073 // so remove its old self from the CSE maps. 5074 if (!UserRemovedFromCSEMaps) { 5075 RemoveNodeFromCSEMaps(User); 5076 UserRemovedFromCSEMaps = true; 5077 } 5078 5079 ++UI; 5080 Use.set(To); 5081 } while (UI != UE && *UI == User); 5082 5083 // We are iterating over all uses of the From node, so if a use 5084 // doesn't use the specific value, no changes are made. 5085 if (!UserRemovedFromCSEMaps) 5086 continue; 5087 5088 // Now that we have modified User, add it back to the CSE maps. If it 5089 // already exists there, recursively merge the results together. 5090 AddModifiedNodeToCSEMaps(User, &Listener); 5091 } 5092} 5093 5094namespace { 5095 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5096 /// to record information about a use. 5097 struct UseMemo { 5098 SDNode *User; 5099 unsigned Index; 5100 SDUse *Use; 5101 }; 5102 5103 /// operator< - Sort Memos by User. 5104 bool operator<(const UseMemo &L, const UseMemo &R) { 5105 return (intptr_t)L.User < (intptr_t)R.User; 5106 } 5107} 5108 5109/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5110/// uses of other values produced by From.getNode() alone. The same value 5111/// may appear in both the From and To list. The Deleted vector is 5112/// handled the same way as for ReplaceAllUsesWith. 5113void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5114 const SDValue *To, 5115 unsigned Num, 5116 DAGUpdateListener *UpdateListener){ 5117 // Handle the simple, trivial case efficiently. 5118 if (Num == 1) 5119 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5120 5121 // Read up all the uses and make records of them. This helps 5122 // processing new uses that are introduced during the 5123 // replacement process. 5124 SmallVector<UseMemo, 4> Uses; 5125 for (unsigned i = 0; i != Num; ++i) { 5126 unsigned FromResNo = From[i].getResNo(); 5127 SDNode *FromNode = From[i].getNode(); 5128 for (SDNode::use_iterator UI = FromNode->use_begin(), 5129 E = FromNode->use_end(); UI != E; ++UI) { 5130 SDUse &Use = UI.getUse(); 5131 if (Use.getResNo() == FromResNo) { 5132 UseMemo Memo = { *UI, i, &Use }; 5133 Uses.push_back(Memo); 5134 } 5135 } 5136 } 5137 5138 // Sort the uses, so that all the uses from a given User are together. 5139 std::sort(Uses.begin(), Uses.end()); 5140 5141 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5142 UseIndex != UseIndexEnd; ) { 5143 // We know that this user uses some value of From. If it is the right 5144 // value, update it. 5145 SDNode *User = Uses[UseIndex].User; 5146 5147 // This node is about to morph, remove its old self from the CSE maps. 5148 RemoveNodeFromCSEMaps(User); 5149 5150 // The Uses array is sorted, so all the uses for a given User 5151 // are next to each other in the list. 5152 // To help reduce the number of CSE recomputations, process all 5153 // the uses of this user that we can find this way. 5154 do { 5155 unsigned i = Uses[UseIndex].Index; 5156 SDUse &Use = *Uses[UseIndex].Use; 5157 ++UseIndex; 5158 5159 Use.set(To[i]); 5160 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5161 5162 // Now that we have modified User, add it back to the CSE maps. If it 5163 // already exists there, recursively merge the results together. 5164 AddModifiedNodeToCSEMaps(User, UpdateListener); 5165 } 5166} 5167 5168/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5169/// based on their topological order. It returns the maximum id and a vector 5170/// of the SDNodes* in assigned order by reference. 5171unsigned SelectionDAG::AssignTopologicalOrder() { 5172 5173 unsigned DAGSize = 0; 5174 5175 // SortedPos tracks the progress of the algorithm. Nodes before it are 5176 // sorted, nodes after it are unsorted. When the algorithm completes 5177 // it is at the end of the list. 5178 allnodes_iterator SortedPos = allnodes_begin(); 5179 5180 // Visit all the nodes. Move nodes with no operands to the front of 5181 // the list immediately. Annotate nodes that do have operands with their 5182 // operand count. Before we do this, the Node Id fields of the nodes 5183 // may contain arbitrary values. After, the Node Id fields for nodes 5184 // before SortedPos will contain the topological sort index, and the 5185 // Node Id fields for nodes At SortedPos and after will contain the 5186 // count of outstanding operands. 5187 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5188 SDNode *N = I++; 5189 checkForCycles(N); 5190 unsigned Degree = N->getNumOperands(); 5191 if (Degree == 0) { 5192 // A node with no uses, add it to the result array immediately. 5193 N->setNodeId(DAGSize++); 5194 allnodes_iterator Q = N; 5195 if (Q != SortedPos) 5196 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5197 assert(SortedPos != AllNodes.end() && "Overran node list"); 5198 ++SortedPos; 5199 } else { 5200 // Temporarily use the Node Id as scratch space for the degree count. 5201 N->setNodeId(Degree); 5202 } 5203 } 5204 5205 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5206 // such that by the time the end is reached all nodes will be sorted. 5207 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5208 SDNode *N = I; 5209 checkForCycles(N); 5210 // N is in sorted position, so all its uses have one less operand 5211 // that needs to be sorted. 5212 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5213 UI != UE; ++UI) { 5214 SDNode *P = *UI; 5215 unsigned Degree = P->getNodeId(); 5216 assert(Degree != 0 && "Invalid node degree"); 5217 --Degree; 5218 if (Degree == 0) { 5219 // All of P's operands are sorted, so P may sorted now. 5220 P->setNodeId(DAGSize++); 5221 if (P != SortedPos) 5222 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5223 assert(SortedPos != AllNodes.end() && "Overran node list"); 5224 ++SortedPos; 5225 } else { 5226 // Update P's outstanding operand count. 5227 P->setNodeId(Degree); 5228 } 5229 } 5230 if (I == SortedPos) { 5231#ifndef NDEBUG 5232 SDNode *S = ++I; 5233 dbgs() << "Overran sorted position:\n"; 5234 S->dumprFull(); 5235#endif 5236 llvm_unreachable(0); 5237 } 5238 } 5239 5240 assert(SortedPos == AllNodes.end() && 5241 "Topological sort incomplete!"); 5242 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5243 "First node in topological sort is not the entry token!"); 5244 assert(AllNodes.front().getNodeId() == 0 && 5245 "First node in topological sort has non-zero id!"); 5246 assert(AllNodes.front().getNumOperands() == 0 && 5247 "First node in topological sort has operands!"); 5248 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5249 "Last node in topologic sort has unexpected id!"); 5250 assert(AllNodes.back().use_empty() && 5251 "Last node in topologic sort has users!"); 5252 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5253 return DAGSize; 5254} 5255 5256/// AssignOrdering - Assign an order to the SDNode. 5257void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5258 assert(SD && "Trying to assign an order to a null node!"); 5259 Ordering->add(SD, Order); 5260} 5261 5262/// GetOrdering - Get the order for the SDNode. 5263unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5264 assert(SD && "Trying to get the order of a null node!"); 5265 return Ordering->getOrder(SD); 5266} 5267 5268/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5269/// value is produced by SD. 5270void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) { 5271 DbgInfo->add(DB, SD); 5272 if (SD) 5273 SD->setHasDebugValue(true); 5274} 5275 5276//===----------------------------------------------------------------------===// 5277// SDNode Class 5278//===----------------------------------------------------------------------===// 5279 5280HandleSDNode::~HandleSDNode() { 5281 DropOperands(); 5282} 5283 5284GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5285 EVT VT, int64_t o, unsigned char TF) 5286 : SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)), 5287 Offset(o), TargetFlags(TF) { 5288 TheGlobal = const_cast<GlobalValue*>(GA); 5289} 5290 5291MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5292 MachineMemOperand *mmo) 5293 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5294 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5295 MMO->isNonTemporal()); 5296 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5297 assert(isNonTemporal() == MMO->isNonTemporal() && 5298 "Non-temporal encoding error!"); 5299 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5300} 5301 5302MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5303 const SDValue *Ops, unsigned NumOps, EVT memvt, 5304 MachineMemOperand *mmo) 5305 : SDNode(Opc, dl, VTs, Ops, NumOps), 5306 MemoryVT(memvt), MMO(mmo) { 5307 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5308 MMO->isNonTemporal()); 5309 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5310 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5311} 5312 5313/// Profile - Gather unique data for the node. 5314/// 5315void SDNode::Profile(FoldingSetNodeID &ID) const { 5316 AddNodeIDNode(ID, this); 5317} 5318 5319namespace { 5320 struct EVTArray { 5321 std::vector<EVT> VTs; 5322 5323 EVTArray() { 5324 VTs.reserve(MVT::LAST_VALUETYPE); 5325 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5326 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5327 } 5328 }; 5329} 5330 5331static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5332static ManagedStatic<EVTArray> SimpleVTArray; 5333static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5334 5335/// getValueTypeList - Return a pointer to the specified value type. 5336/// 5337const EVT *SDNode::getValueTypeList(EVT VT) { 5338 if (VT.isExtended()) { 5339 sys::SmartScopedLock<true> Lock(*VTMutex); 5340 return &(*EVTs->insert(VT).first); 5341 } else { 5342 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5343 } 5344} 5345 5346/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5347/// indicated value. This method ignores uses of other values defined by this 5348/// operation. 5349bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5350 assert(Value < getNumValues() && "Bad value!"); 5351 5352 // TODO: Only iterate over uses of a given value of the node 5353 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5354 if (UI.getUse().getResNo() == Value) { 5355 if (NUses == 0) 5356 return false; 5357 --NUses; 5358 } 5359 } 5360 5361 // Found exactly the right number of uses? 5362 return NUses == 0; 5363} 5364 5365 5366/// hasAnyUseOfValue - Return true if there are any use of the indicated 5367/// value. This method ignores uses of other values defined by this operation. 5368bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5369 assert(Value < getNumValues() && "Bad value!"); 5370 5371 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5372 if (UI.getUse().getResNo() == Value) 5373 return true; 5374 5375 return false; 5376} 5377 5378 5379/// isOnlyUserOf - Return true if this node is the only use of N. 5380/// 5381bool SDNode::isOnlyUserOf(SDNode *N) const { 5382 bool Seen = false; 5383 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5384 SDNode *User = *I; 5385 if (User == this) 5386 Seen = true; 5387 else 5388 return false; 5389 } 5390 5391 return Seen; 5392} 5393 5394/// isOperand - Return true if this node is an operand of N. 5395/// 5396bool SDValue::isOperandOf(SDNode *N) const { 5397 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5398 if (*this == N->getOperand(i)) 5399 return true; 5400 return false; 5401} 5402 5403bool SDNode::isOperandOf(SDNode *N) const { 5404 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5405 if (this == N->OperandList[i].getNode()) 5406 return true; 5407 return false; 5408} 5409 5410/// reachesChainWithoutSideEffects - Return true if this operand (which must 5411/// be a chain) reaches the specified operand without crossing any 5412/// side-effecting instructions. In practice, this looks through token 5413/// factors and non-volatile loads. In order to remain efficient, this only 5414/// looks a couple of nodes in, it does not do an exhaustive search. 5415bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5416 unsigned Depth) const { 5417 if (*this == Dest) return true; 5418 5419 // Don't search too deeply, we just want to be able to see through 5420 // TokenFactor's etc. 5421 if (Depth == 0) return false; 5422 5423 // If this is a token factor, all inputs to the TF happen in parallel. If any 5424 // of the operands of the TF reach dest, then we can do the xform. 5425 if (getOpcode() == ISD::TokenFactor) { 5426 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5427 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5428 return true; 5429 return false; 5430 } 5431 5432 // Loads don't have side effects, look through them. 5433 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5434 if (!Ld->isVolatile()) 5435 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5436 } 5437 return false; 5438} 5439 5440/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5441/// is either an operand of N or it can be reached by traversing up the operands. 5442/// NOTE: this is an expensive method. Use it carefully. 5443bool SDNode::isPredecessorOf(SDNode *N) const { 5444 SmallPtrSet<SDNode *, 32> Visited; 5445 SmallVector<SDNode *, 16> Worklist; 5446 Worklist.push_back(N); 5447 5448 do { 5449 N = Worklist.pop_back_val(); 5450 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5451 SDNode *Op = N->getOperand(i).getNode(); 5452 if (Op == this) 5453 return true; 5454 if (Visited.insert(Op)) 5455 Worklist.push_back(Op); 5456 } 5457 } while (!Worklist.empty()); 5458 5459 return false; 5460} 5461 5462uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5463 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5464 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5465} 5466 5467std::string SDNode::getOperationName(const SelectionDAG *G) const { 5468 switch (getOpcode()) { 5469 default: 5470 if (getOpcode() < ISD::BUILTIN_OP_END) 5471 return "<<Unknown DAG Node>>"; 5472 if (isMachineOpcode()) { 5473 if (G) 5474 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5475 if (getMachineOpcode() < TII->getNumOpcodes()) 5476 return TII->get(getMachineOpcode()).getName(); 5477 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5478 } 5479 if (G) { 5480 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5481 const char *Name = TLI.getTargetNodeName(getOpcode()); 5482 if (Name) return Name; 5483 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5484 } 5485 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5486 5487#ifndef NDEBUG 5488 case ISD::DELETED_NODE: 5489 return "<<Deleted Node!>>"; 5490#endif 5491 case ISD::PREFETCH: return "Prefetch"; 5492 case ISD::MEMBARRIER: return "MemBarrier"; 5493 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5494 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5495 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5496 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5497 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5498 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5499 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5500 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5501 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5502 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5503 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5504 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5505 case ISD::PCMARKER: return "PCMarker"; 5506 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5507 case ISD::SRCVALUE: return "SrcValue"; 5508 case ISD::EntryToken: return "EntryToken"; 5509 case ISD::TokenFactor: return "TokenFactor"; 5510 case ISD::AssertSext: return "AssertSext"; 5511 case ISD::AssertZext: return "AssertZext"; 5512 5513 case ISD::BasicBlock: return "BasicBlock"; 5514 case ISD::VALUETYPE: return "ValueType"; 5515 case ISD::Register: return "Register"; 5516 5517 case ISD::Constant: return "Constant"; 5518 case ISD::ConstantFP: return "ConstantFP"; 5519 case ISD::GlobalAddress: return "GlobalAddress"; 5520 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5521 case ISD::FrameIndex: return "FrameIndex"; 5522 case ISD::JumpTable: return "JumpTable"; 5523 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5524 case ISD::RETURNADDR: return "RETURNADDR"; 5525 case ISD::FRAMEADDR: return "FRAMEADDR"; 5526 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5527 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5528 case ISD::LSDAADDR: return "LSDAADDR"; 5529 case ISD::EHSELECTION: return "EHSELECTION"; 5530 case ISD::EH_RETURN: return "EH_RETURN"; 5531 case ISD::ConstantPool: return "ConstantPool"; 5532 case ISD::ExternalSymbol: return "ExternalSymbol"; 5533 case ISD::BlockAddress: return "BlockAddress"; 5534 case ISD::INTRINSIC_WO_CHAIN: 5535 case ISD::INTRINSIC_VOID: 5536 case ISD::INTRINSIC_W_CHAIN: { 5537 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5538 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5539 if (IID < Intrinsic::num_intrinsics) 5540 return Intrinsic::getName((Intrinsic::ID)IID); 5541 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5542 return TII->getName(IID); 5543 llvm_unreachable("Invalid intrinsic ID"); 5544 } 5545 5546 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5547 case ISD::TargetConstant: return "TargetConstant"; 5548 case ISD::TargetConstantFP:return "TargetConstantFP"; 5549 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5550 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5551 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5552 case ISD::TargetJumpTable: return "TargetJumpTable"; 5553 case ISD::TargetConstantPool: return "TargetConstantPool"; 5554 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5555 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5556 5557 case ISD::CopyToReg: return "CopyToReg"; 5558 case ISD::CopyFromReg: return "CopyFromReg"; 5559 case ISD::UNDEF: return "undef"; 5560 case ISD::MERGE_VALUES: return "merge_values"; 5561 case ISD::INLINEASM: return "inlineasm"; 5562 case ISD::EH_LABEL: return "eh_label"; 5563 case ISD::HANDLENODE: return "handlenode"; 5564 5565 // Unary operators 5566 case ISD::FABS: return "fabs"; 5567 case ISD::FNEG: return "fneg"; 5568 case ISD::FSQRT: return "fsqrt"; 5569 case ISD::FSIN: return "fsin"; 5570 case ISD::FCOS: return "fcos"; 5571 case ISD::FPOWI: return "fpowi"; 5572 case ISD::FPOW: return "fpow"; 5573 case ISD::FTRUNC: return "ftrunc"; 5574 case ISD::FFLOOR: return "ffloor"; 5575 case ISD::FCEIL: return "fceil"; 5576 case ISD::FRINT: return "frint"; 5577 case ISD::FNEARBYINT: return "fnearbyint"; 5578 5579 // Binary operators 5580 case ISD::ADD: return "add"; 5581 case ISD::SUB: return "sub"; 5582 case ISD::MUL: return "mul"; 5583 case ISD::MULHU: return "mulhu"; 5584 case ISD::MULHS: return "mulhs"; 5585 case ISD::SDIV: return "sdiv"; 5586 case ISD::UDIV: return "udiv"; 5587 case ISD::SREM: return "srem"; 5588 case ISD::UREM: return "urem"; 5589 case ISD::SMUL_LOHI: return "smul_lohi"; 5590 case ISD::UMUL_LOHI: return "umul_lohi"; 5591 case ISD::SDIVREM: return "sdivrem"; 5592 case ISD::UDIVREM: return "udivrem"; 5593 case ISD::AND: return "and"; 5594 case ISD::OR: return "or"; 5595 case ISD::XOR: return "xor"; 5596 case ISD::SHL: return "shl"; 5597 case ISD::SRA: return "sra"; 5598 case ISD::SRL: return "srl"; 5599 case ISD::ROTL: return "rotl"; 5600 case ISD::ROTR: return "rotr"; 5601 case ISD::FADD: return "fadd"; 5602 case ISD::FSUB: return "fsub"; 5603 case ISD::FMUL: return "fmul"; 5604 case ISD::FDIV: return "fdiv"; 5605 case ISD::FREM: return "frem"; 5606 case ISD::FCOPYSIGN: return "fcopysign"; 5607 case ISD::FGETSIGN: return "fgetsign"; 5608 5609 case ISD::SETCC: return "setcc"; 5610 case ISD::VSETCC: return "vsetcc"; 5611 case ISD::SELECT: return "select"; 5612 case ISD::SELECT_CC: return "select_cc"; 5613 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5614 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5615 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5616 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5617 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5618 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5619 case ISD::CARRY_FALSE: return "carry_false"; 5620 case ISD::ADDC: return "addc"; 5621 case ISD::ADDE: return "adde"; 5622 case ISD::SADDO: return "saddo"; 5623 case ISD::UADDO: return "uaddo"; 5624 case ISD::SSUBO: return "ssubo"; 5625 case ISD::USUBO: return "usubo"; 5626 case ISD::SMULO: return "smulo"; 5627 case ISD::UMULO: return "umulo"; 5628 case ISD::SUBC: return "subc"; 5629 case ISD::SUBE: return "sube"; 5630 case ISD::SHL_PARTS: return "shl_parts"; 5631 case ISD::SRA_PARTS: return "sra_parts"; 5632 case ISD::SRL_PARTS: return "srl_parts"; 5633 5634 // Conversion operators. 5635 case ISD::SIGN_EXTEND: return "sign_extend"; 5636 case ISD::ZERO_EXTEND: return "zero_extend"; 5637 case ISD::ANY_EXTEND: return "any_extend"; 5638 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5639 case ISD::TRUNCATE: return "truncate"; 5640 case ISD::FP_ROUND: return "fp_round"; 5641 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5642 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5643 case ISD::FP_EXTEND: return "fp_extend"; 5644 5645 case ISD::SINT_TO_FP: return "sint_to_fp"; 5646 case ISD::UINT_TO_FP: return "uint_to_fp"; 5647 case ISD::FP_TO_SINT: return "fp_to_sint"; 5648 case ISD::FP_TO_UINT: return "fp_to_uint"; 5649 case ISD::BIT_CONVERT: return "bit_convert"; 5650 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5651 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5652 5653 case ISD::CONVERT_RNDSAT: { 5654 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5655 default: llvm_unreachable("Unknown cvt code!"); 5656 case ISD::CVT_FF: return "cvt_ff"; 5657 case ISD::CVT_FS: return "cvt_fs"; 5658 case ISD::CVT_FU: return "cvt_fu"; 5659 case ISD::CVT_SF: return "cvt_sf"; 5660 case ISD::CVT_UF: return "cvt_uf"; 5661 case ISD::CVT_SS: return "cvt_ss"; 5662 case ISD::CVT_SU: return "cvt_su"; 5663 case ISD::CVT_US: return "cvt_us"; 5664 case ISD::CVT_UU: return "cvt_uu"; 5665 } 5666 } 5667 5668 // Control flow instructions 5669 case ISD::BR: return "br"; 5670 case ISD::BRIND: return "brind"; 5671 case ISD::BR_JT: return "br_jt"; 5672 case ISD::BRCOND: return "brcond"; 5673 case ISD::BR_CC: return "br_cc"; 5674 case ISD::CALLSEQ_START: return "callseq_start"; 5675 case ISD::CALLSEQ_END: return "callseq_end"; 5676 5677 // Other operators 5678 case ISD::LOAD: return "load"; 5679 case ISD::STORE: return "store"; 5680 case ISD::VAARG: return "vaarg"; 5681 case ISD::VACOPY: return "vacopy"; 5682 case ISD::VAEND: return "vaend"; 5683 case ISD::VASTART: return "vastart"; 5684 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5685 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5686 case ISD::BUILD_PAIR: return "build_pair"; 5687 case ISD::STACKSAVE: return "stacksave"; 5688 case ISD::STACKRESTORE: return "stackrestore"; 5689 case ISD::TRAP: return "trap"; 5690 5691 // Bit manipulation 5692 case ISD::BSWAP: return "bswap"; 5693 case ISD::CTPOP: return "ctpop"; 5694 case ISD::CTTZ: return "cttz"; 5695 case ISD::CTLZ: return "ctlz"; 5696 5697 // Trampolines 5698 case ISD::TRAMPOLINE: return "trampoline"; 5699 5700 case ISD::CONDCODE: 5701 switch (cast<CondCodeSDNode>(this)->get()) { 5702 default: llvm_unreachable("Unknown setcc condition!"); 5703 case ISD::SETOEQ: return "setoeq"; 5704 case ISD::SETOGT: return "setogt"; 5705 case ISD::SETOGE: return "setoge"; 5706 case ISD::SETOLT: return "setolt"; 5707 case ISD::SETOLE: return "setole"; 5708 case ISD::SETONE: return "setone"; 5709 5710 case ISD::SETO: return "seto"; 5711 case ISD::SETUO: return "setuo"; 5712 case ISD::SETUEQ: return "setue"; 5713 case ISD::SETUGT: return "setugt"; 5714 case ISD::SETUGE: return "setuge"; 5715 case ISD::SETULT: return "setult"; 5716 case ISD::SETULE: return "setule"; 5717 case ISD::SETUNE: return "setune"; 5718 5719 case ISD::SETEQ: return "seteq"; 5720 case ISD::SETGT: return "setgt"; 5721 case ISD::SETGE: return "setge"; 5722 case ISD::SETLT: return "setlt"; 5723 case ISD::SETLE: return "setle"; 5724 case ISD::SETNE: return "setne"; 5725 } 5726 } 5727} 5728 5729const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5730 switch (AM) { 5731 default: 5732 return ""; 5733 case ISD::PRE_INC: 5734 return "<pre-inc>"; 5735 case ISD::PRE_DEC: 5736 return "<pre-dec>"; 5737 case ISD::POST_INC: 5738 return "<post-inc>"; 5739 case ISD::POST_DEC: 5740 return "<post-dec>"; 5741 } 5742} 5743 5744std::string ISD::ArgFlagsTy::getArgFlagsString() { 5745 std::string S = "< "; 5746 5747 if (isZExt()) 5748 S += "zext "; 5749 if (isSExt()) 5750 S += "sext "; 5751 if (isInReg()) 5752 S += "inreg "; 5753 if (isSRet()) 5754 S += "sret "; 5755 if (isByVal()) 5756 S += "byval "; 5757 if (isNest()) 5758 S += "nest "; 5759 if (getByValAlign()) 5760 S += "byval-align:" + utostr(getByValAlign()) + " "; 5761 if (getOrigAlign()) 5762 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5763 if (getByValSize()) 5764 S += "byval-size:" + utostr(getByValSize()) + " "; 5765 return S + ">"; 5766} 5767 5768void SDNode::dump() const { dump(0); } 5769void SDNode::dump(const SelectionDAG *G) const { 5770 print(dbgs(), G); 5771} 5772 5773void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5774 OS << (void*)this << ": "; 5775 5776 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5777 if (i) OS << ","; 5778 if (getValueType(i) == MVT::Other) 5779 OS << "ch"; 5780 else 5781 OS << getValueType(i).getEVTString(); 5782 } 5783 OS << " = " << getOperationName(G); 5784} 5785 5786void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5787 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5788 if (!MN->memoperands_empty()) { 5789 OS << "<"; 5790 OS << "Mem:"; 5791 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5792 e = MN->memoperands_end(); i != e; ++i) { 5793 OS << **i; 5794 if (next(i) != e) 5795 OS << " "; 5796 } 5797 OS << ">"; 5798 } 5799 } else if (const ShuffleVectorSDNode *SVN = 5800 dyn_cast<ShuffleVectorSDNode>(this)) { 5801 OS << "<"; 5802 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5803 int Idx = SVN->getMaskElt(i); 5804 if (i) OS << ","; 5805 if (Idx < 0) 5806 OS << "u"; 5807 else 5808 OS << Idx; 5809 } 5810 OS << ">"; 5811 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5812 OS << '<' << CSDN->getAPIntValue() << '>'; 5813 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5814 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5815 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5816 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5817 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5818 else { 5819 OS << "<APFloat("; 5820 CSDN->getValueAPF().bitcastToAPInt().dump(); 5821 OS << ")>"; 5822 } 5823 } else if (const GlobalAddressSDNode *GADN = 5824 dyn_cast<GlobalAddressSDNode>(this)) { 5825 int64_t offset = GADN->getOffset(); 5826 OS << '<'; 5827 WriteAsOperand(OS, GADN->getGlobal()); 5828 OS << '>'; 5829 if (offset > 0) 5830 OS << " + " << offset; 5831 else 5832 OS << " " << offset; 5833 if (unsigned int TF = GADN->getTargetFlags()) 5834 OS << " [TF=" << TF << ']'; 5835 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5836 OS << "<" << FIDN->getIndex() << ">"; 5837 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5838 OS << "<" << JTDN->getIndex() << ">"; 5839 if (unsigned int TF = JTDN->getTargetFlags()) 5840 OS << " [TF=" << TF << ']'; 5841 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5842 int offset = CP->getOffset(); 5843 if (CP->isMachineConstantPoolEntry()) 5844 OS << "<" << *CP->getMachineCPVal() << ">"; 5845 else 5846 OS << "<" << *CP->getConstVal() << ">"; 5847 if (offset > 0) 5848 OS << " + " << offset; 5849 else 5850 OS << " " << offset; 5851 if (unsigned int TF = CP->getTargetFlags()) 5852 OS << " [TF=" << TF << ']'; 5853 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5854 OS << "<"; 5855 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5856 if (LBB) 5857 OS << LBB->getName() << " "; 5858 OS << (const void*)BBDN->getBasicBlock() << ">"; 5859 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5860 if (G && R->getReg() && 5861 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5862 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5863 } else { 5864 OS << " %reg" << R->getReg(); 5865 } 5866 } else if (const ExternalSymbolSDNode *ES = 5867 dyn_cast<ExternalSymbolSDNode>(this)) { 5868 OS << "'" << ES->getSymbol() << "'"; 5869 if (unsigned int TF = ES->getTargetFlags()) 5870 OS << " [TF=" << TF << ']'; 5871 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5872 if (M->getValue()) 5873 OS << "<" << M->getValue() << ">"; 5874 else 5875 OS << "<null>"; 5876 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5877 OS << ":" << N->getVT().getEVTString(); 5878 } 5879 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5880 OS << "<" << *LD->getMemOperand(); 5881 5882 bool doExt = true; 5883 switch (LD->getExtensionType()) { 5884 default: doExt = false; break; 5885 case ISD::EXTLOAD: OS << ", anyext"; break; 5886 case ISD::SEXTLOAD: OS << ", sext"; break; 5887 case ISD::ZEXTLOAD: OS << ", zext"; break; 5888 } 5889 if (doExt) 5890 OS << " from " << LD->getMemoryVT().getEVTString(); 5891 5892 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5893 if (*AM) 5894 OS << ", " << AM; 5895 5896 OS << ">"; 5897 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5898 OS << "<" << *ST->getMemOperand(); 5899 5900 if (ST->isTruncatingStore()) 5901 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5902 5903 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5904 if (*AM) 5905 OS << ", " << AM; 5906 5907 OS << ">"; 5908 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5909 OS << "<" << *M->getMemOperand() << ">"; 5910 } else if (const BlockAddressSDNode *BA = 5911 dyn_cast<BlockAddressSDNode>(this)) { 5912 OS << "<"; 5913 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5914 OS << ", "; 5915 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5916 OS << ">"; 5917 if (unsigned int TF = BA->getTargetFlags()) 5918 OS << " [TF=" << TF << ']'; 5919 } 5920 5921 if (G) 5922 if (unsigned Order = G->GetOrdering(this)) 5923 OS << " [ORD=" << Order << ']'; 5924 5925 if (getNodeId() != -1) 5926 OS << " [ID=" << getNodeId() << ']'; 5927} 5928 5929void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5930 print_types(OS, G); 5931 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5932 if (i) OS << ", "; else OS << " "; 5933 OS << (void*)getOperand(i).getNode(); 5934 if (unsigned RN = getOperand(i).getResNo()) 5935 OS << ":" << RN; 5936 } 5937 print_details(OS, G); 5938} 5939 5940static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 5941 const SelectionDAG *G, unsigned depth, 5942 unsigned indent) 5943{ 5944 if (depth == 0) 5945 return; 5946 5947 OS.indent(indent); 5948 5949 N->print(OS, G); 5950 5951 if (depth < 1) 5952 return; 5953 5954 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5955 OS << '\n'; 5956 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 5957 } 5958} 5959 5960void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 5961 unsigned depth) const { 5962 printrWithDepthHelper(OS, this, G, depth, 0); 5963} 5964 5965void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 5966 // Don't print impossibly deep things. 5967 printrWithDepth(OS, G, 100); 5968} 5969 5970void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 5971 printrWithDepth(dbgs(), G, depth); 5972} 5973 5974void SDNode::dumprFull(const SelectionDAG *G) const { 5975 // Don't print impossibly deep things. 5976 dumprWithDepth(G, 100); 5977} 5978 5979static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5980 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5981 if (N->getOperand(i).getNode()->hasOneUse()) 5982 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5983 else 5984 dbgs() << "\n" << std::string(indent+2, ' ') 5985 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5986 5987 5988 dbgs() << "\n"; 5989 dbgs().indent(indent); 5990 N->dump(G); 5991} 5992 5993SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 5994 assert(N->getNumValues() == 1 && 5995 "Can't unroll a vector with multiple results!"); 5996 5997 EVT VT = N->getValueType(0); 5998 unsigned NE = VT.getVectorNumElements(); 5999 EVT EltVT = VT.getVectorElementType(); 6000 DebugLoc dl = N->getDebugLoc(); 6001 6002 SmallVector<SDValue, 8> Scalars; 6003 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6004 6005 // If ResNE is 0, fully unroll the vector op. 6006 if (ResNE == 0) 6007 ResNE = NE; 6008 else if (NE > ResNE) 6009 NE = ResNE; 6010 6011 unsigned i; 6012 for (i= 0; i != NE; ++i) { 6013 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 6014 SDValue Operand = N->getOperand(j); 6015 EVT OperandVT = Operand.getValueType(); 6016 if (OperandVT.isVector()) { 6017 // A vector operand; extract a single element. 6018 EVT OperandEltVT = OperandVT.getVectorElementType(); 6019 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6020 OperandEltVT, 6021 Operand, 6022 getConstant(i, MVT::i32)); 6023 } else { 6024 // A scalar operand; just use it as is. 6025 Operands[j] = Operand; 6026 } 6027 } 6028 6029 switch (N->getOpcode()) { 6030 default: 6031 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6032 &Operands[0], Operands.size())); 6033 break; 6034 case ISD::SHL: 6035 case ISD::SRA: 6036 case ISD::SRL: 6037 case ISD::ROTL: 6038 case ISD::ROTR: 6039 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6040 getShiftAmountOperand(Operands[1]))); 6041 break; 6042 case ISD::SIGN_EXTEND_INREG: 6043 case ISD::FP_ROUND_INREG: { 6044 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6045 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6046 Operands[0], 6047 getValueType(ExtVT))); 6048 } 6049 } 6050 } 6051 6052 for (; i < ResNE; ++i) 6053 Scalars.push_back(getUNDEF(EltVT)); 6054 6055 return getNode(ISD::BUILD_VECTOR, dl, 6056 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6057 &Scalars[0], Scalars.size()); 6058} 6059 6060 6061/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6062/// location that is 'Dist' units away from the location that the 'Base' load 6063/// is loading from. 6064bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6065 unsigned Bytes, int Dist) const { 6066 if (LD->getChain() != Base->getChain()) 6067 return false; 6068 EVT VT = LD->getValueType(0); 6069 if (VT.getSizeInBits() / 8 != Bytes) 6070 return false; 6071 6072 SDValue Loc = LD->getOperand(1); 6073 SDValue BaseLoc = Base->getOperand(1); 6074 if (Loc.getOpcode() == ISD::FrameIndex) { 6075 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6076 return false; 6077 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6078 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6079 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6080 int FS = MFI->getObjectSize(FI); 6081 int BFS = MFI->getObjectSize(BFI); 6082 if (FS != BFS || FS != (int)Bytes) return false; 6083 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6084 } 6085 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6086 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6087 if (V && (V->getSExtValue() == Dist*Bytes)) 6088 return true; 6089 } 6090 6091 GlobalValue *GV1 = NULL; 6092 GlobalValue *GV2 = NULL; 6093 int64_t Offset1 = 0; 6094 int64_t Offset2 = 0; 6095 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6096 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6097 if (isGA1 && isGA2 && GV1 == GV2) 6098 return Offset1 == (Offset2 + Dist*Bytes); 6099 return false; 6100} 6101 6102 6103/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6104/// it cannot be inferred. 6105unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6106 // If this is a GlobalAddress + cst, return the alignment. 6107 GlobalValue *GV; 6108 int64_t GVOffset = 0; 6109 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) 6110 return MinAlign(GV->getAlignment(), GVOffset); 6111 6112 // If this is a direct reference to a stack slot, use information about the 6113 // stack slot's alignment. 6114 int FrameIdx = 1 << 31; 6115 int64_t FrameOffset = 0; 6116 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6117 FrameIdx = FI->getIndex(); 6118 } else if (Ptr.getOpcode() == ISD::ADD && 6119 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6120 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6121 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6122 FrameOffset = Ptr.getConstantOperandVal(1); 6123 } 6124 6125 if (FrameIdx != (1 << 31)) { 6126 // FIXME: Handle FI+CST. 6127 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6128 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6129 FrameOffset); 6130 if (MFI.isFixedObjectIndex(FrameIdx)) { 6131 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6132 6133 // The alignment of the frame index can be determined from its offset from 6134 // the incoming frame position. If the frame object is at offset 32 and 6135 // the stack is guaranteed to be 16-byte aligned, then we know that the 6136 // object is 16-byte aligned. 6137 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6138 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6139 6140 // Finally, the frame object itself may have a known alignment. Factor 6141 // the alignment + offset into a new alignment. For example, if we know 6142 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6143 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6144 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6145 return std::max(Align, FIInfoAlign); 6146 } 6147 return FIInfoAlign; 6148 } 6149 6150 return 0; 6151} 6152 6153void SelectionDAG::dump() const { 6154 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6155 6156 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6157 I != E; ++I) { 6158 const SDNode *N = I; 6159 if (!N->hasOneUse() && N != getRoot().getNode()) 6160 DumpNodes(N, 2, this); 6161 } 6162 6163 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6164 6165 dbgs() << "\n\n"; 6166} 6167 6168void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6169 print_types(OS, G); 6170 print_details(OS, G); 6171} 6172 6173typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6174static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6175 const SelectionDAG *G, VisitedSDNodeSet &once) { 6176 if (!once.insert(N)) // If we've been here before, return now. 6177 return; 6178 6179 // Dump the current SDNode, but don't end the line yet. 6180 OS << std::string(indent, ' '); 6181 N->printr(OS, G); 6182 6183 // Having printed this SDNode, walk the children: 6184 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6185 const SDNode *child = N->getOperand(i).getNode(); 6186 6187 if (i) OS << ","; 6188 OS << " "; 6189 6190 if (child->getNumOperands() == 0) { 6191 // This child has no grandchildren; print it inline right here. 6192 child->printr(OS, G); 6193 once.insert(child); 6194 } else { // Just the address. FIXME: also print the child's opcode. 6195 OS << (void*)child; 6196 if (unsigned RN = N->getOperand(i).getResNo()) 6197 OS << ":" << RN; 6198 } 6199 } 6200 6201 OS << "\n"; 6202 6203 // Dump children that have grandchildren on their own line(s). 6204 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6205 const SDNode *child = N->getOperand(i).getNode(); 6206 DumpNodesr(OS, child, indent+2, G, once); 6207 } 6208} 6209 6210void SDNode::dumpr() const { 6211 VisitedSDNodeSet once; 6212 DumpNodesr(dbgs(), this, 0, 0, once); 6213} 6214 6215void SDNode::dumpr(const SelectionDAG *G) const { 6216 VisitedSDNodeSet once; 6217 DumpNodesr(dbgs(), this, 0, G, once); 6218} 6219 6220 6221// getAddressSpace - Return the address space this GlobalAddress belongs to. 6222unsigned GlobalAddressSDNode::getAddressSpace() const { 6223 return getGlobal()->getType()->getAddressSpace(); 6224} 6225 6226 6227const Type *ConstantPoolSDNode::getType() const { 6228 if (isMachineConstantPoolEntry()) 6229 return Val.MachineCPVal->getType(); 6230 return Val.ConstVal->getType(); 6231} 6232 6233bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6234 APInt &SplatUndef, 6235 unsigned &SplatBitSize, 6236 bool &HasAnyUndefs, 6237 unsigned MinSplatBits, 6238 bool isBigEndian) { 6239 EVT VT = getValueType(0); 6240 assert(VT.isVector() && "Expected a vector type"); 6241 unsigned sz = VT.getSizeInBits(); 6242 if (MinSplatBits > sz) 6243 return false; 6244 6245 SplatValue = APInt(sz, 0); 6246 SplatUndef = APInt(sz, 0); 6247 6248 // Get the bits. Bits with undefined values (when the corresponding element 6249 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6250 // in SplatValue. If any of the values are not constant, give up and return 6251 // false. 6252 unsigned int nOps = getNumOperands(); 6253 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6254 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6255 6256 for (unsigned j = 0; j < nOps; ++j) { 6257 unsigned i = isBigEndian ? nOps-1-j : j; 6258 SDValue OpVal = getOperand(i); 6259 unsigned BitPos = j * EltBitSize; 6260 6261 if (OpVal.getOpcode() == ISD::UNDEF) 6262 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6263 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6264 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6265 zextOrTrunc(sz) << BitPos); 6266 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6267 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6268 else 6269 return false; 6270 } 6271 6272 // The build_vector is all constants or undefs. Find the smallest element 6273 // size that splats the vector. 6274 6275 HasAnyUndefs = (SplatUndef != 0); 6276 while (sz > 8) { 6277 6278 unsigned HalfSize = sz / 2; 6279 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6280 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6281 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6282 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6283 6284 // If the two halves do not match (ignoring undef bits), stop here. 6285 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6286 MinSplatBits > HalfSize) 6287 break; 6288 6289 SplatValue = HighValue | LowValue; 6290 SplatUndef = HighUndef & LowUndef; 6291 6292 sz = HalfSize; 6293 } 6294 6295 SplatBitSize = sz; 6296 return true; 6297} 6298 6299bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6300 // Find the first non-undef value in the shuffle mask. 6301 unsigned i, e; 6302 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6303 /* search */; 6304 6305 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6306 6307 // Make sure all remaining elements are either undef or the same as the first 6308 // non-undef value. 6309 for (int Idx = Mask[i]; i != e; ++i) 6310 if (Mask[i] >= 0 && Mask[i] != Idx) 6311 return false; 6312 return true; 6313} 6314 6315#ifdef XDEBUG 6316static void checkForCyclesHelper(const SDNode *N, 6317 SmallPtrSet<const SDNode*, 32> &Visited, 6318 SmallPtrSet<const SDNode*, 32> &Checked) { 6319 // If this node has already been checked, don't check it again. 6320 if (Checked.count(N)) 6321 return; 6322 6323 // If a node has already been visited on this depth-first walk, reject it as 6324 // a cycle. 6325 if (!Visited.insert(N)) { 6326 dbgs() << "Offending node:\n"; 6327 N->dumprFull(); 6328 errs() << "Detected cycle in SelectionDAG\n"; 6329 abort(); 6330 } 6331 6332 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6333 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6334 6335 Checked.insert(N); 6336 Visited.erase(N); 6337} 6338#endif 6339 6340void llvm::checkForCycles(const llvm::SDNode *N) { 6341#ifdef XDEBUG 6342 assert(N && "Checking nonexistant SDNode"); 6343 SmallPtrSet<const SDNode*, 32> visited; 6344 SmallPtrSet<const SDNode*, 32> checked; 6345 checkForCyclesHelper(N, visited, checked); 6346#endif 6347} 6348 6349void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6350 checkForCycles(DAG->getRoot().getNode()); 6351} 6352