SelectionDAG.cpp revision 36b56886974eae4f9c5ebc96befd3e7bfe5de338
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeDbgValue.h" 16#include "llvm/ADT/SetVector.h" 17#include "llvm/ADT/SmallPtrSet.h" 18#include "llvm/ADT/SmallSet.h" 19#include "llvm/ADT/SmallVector.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/Analysis/ValueTracking.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/IR/CallingConv.h" 27#include "llvm/IR/Constants.h" 28#include "llvm/IR/DataLayout.h" 29#include "llvm/IR/DebugInfo.h" 30#include "llvm/IR/DerivedTypes.h" 31#include "llvm/IR/Function.h" 32#include "llvm/IR/GlobalAlias.h" 33#include "llvm/IR/GlobalVariable.h" 34#include "llvm/IR/Intrinsics.h" 35#include "llvm/Support/CommandLine.h" 36#include "llvm/Support/Debug.h" 37#include "llvm/Support/ErrorHandling.h" 38#include "llvm/Support/ManagedStatic.h" 39#include "llvm/Support/MathExtras.h" 40#include "llvm/Support/Mutex.h" 41#include "llvm/Support/raw_ostream.h" 42#include "llvm/Target/TargetInstrInfo.h" 43#include "llvm/Target/TargetIntrinsicInfo.h" 44#include "llvm/Target/TargetLowering.h" 45#include "llvm/Target/TargetMachine.h" 46#include "llvm/Target/TargetOptions.h" 47#include "llvm/Target/TargetRegisterInfo.h" 48#include "llvm/Target/TargetSelectionDAGInfo.h" 49#include <algorithm> 50#include <cmath> 51using namespace llvm; 52 53/// makeVTList - Return an instance of the SDVTList struct initialized with the 54/// specified members. 55static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 56 SDVTList Res = {VTs, NumVTs}; 57 return Res; 58} 59 60// Default null implementations of the callbacks. 61void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 62void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 63 64//===----------------------------------------------------------------------===// 65// ConstantFPSDNode Class 66//===----------------------------------------------------------------------===// 67 68/// isExactlyValue - We don't rely on operator== working on double values, as 69/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 70/// As such, this method can be used to do an exact bit-for-bit comparison of 71/// two floating point values. 72bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 73 return getValueAPF().bitwiseIsEqual(V); 74} 75 76bool ConstantFPSDNode::isValueValidForType(EVT VT, 77 const APFloat& Val) { 78 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 79 80 // convert modifies in place, so make a copy. 81 APFloat Val2 = APFloat(Val); 82 bool losesInfo; 83 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT), 84 APFloat::rmNearestTiesToEven, 85 &losesInfo); 86 return !losesInfo; 87} 88 89//===----------------------------------------------------------------------===// 90// ISD Namespace 91//===----------------------------------------------------------------------===// 92 93/// isBuildVectorAllOnes - Return true if the specified node is a 94/// BUILD_VECTOR where all of the elements are ~0 or undef. 95bool ISD::isBuildVectorAllOnes(const SDNode *N) { 96 // Look through a bit convert. 97 if (N->getOpcode() == ISD::BITCAST) 98 N = N->getOperand(0).getNode(); 99 100 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 101 102 unsigned i = 0, e = N->getNumOperands(); 103 104 // Skip over all of the undef values. 105 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 106 ++i; 107 108 // Do not accept an all-undef vector. 109 if (i == e) return false; 110 111 // Do not accept build_vectors that aren't all constants or which have non-~0 112 // elements. We have to be a bit careful here, as the type of the constant 113 // may not be the same as the type of the vector elements due to type 114 // legalization (the elements are promoted to a legal type for the target and 115 // a vector of a type may be legal when the base element type is not). 116 // We only want to check enough bits to cover the vector elements, because 117 // we care if the resultant vector is all ones, not whether the individual 118 // constants are. 119 SDValue NotZero = N->getOperand(i); 120 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 121 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) { 122 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 123 return false; 124 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) { 125 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 126 return false; 127 } else 128 return false; 129 130 // Okay, we have at least one ~0 value, check to see if the rest match or are 131 // undefs. Even with the above element type twiddling, this should be OK, as 132 // the same type legalization should have applied to all the elements. 133 for (++i; i != e; ++i) 134 if (N->getOperand(i) != NotZero && 135 N->getOperand(i).getOpcode() != ISD::UNDEF) 136 return false; 137 return true; 138} 139 140 141/// isBuildVectorAllZeros - Return true if the specified node is a 142/// BUILD_VECTOR where all of the elements are 0 or undef. 143bool ISD::isBuildVectorAllZeros(const SDNode *N) { 144 // Look through a bit convert. 145 if (N->getOpcode() == ISD::BITCAST) 146 N = N->getOperand(0).getNode(); 147 148 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 149 150 unsigned i = 0, e = N->getNumOperands(); 151 152 // Skip over all of the undef values. 153 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 154 ++i; 155 156 // Do not accept an all-undef vector. 157 if (i == e) return false; 158 159 // Do not accept build_vectors that aren't all constants or which have non-0 160 // elements. 161 SDValue Zero = N->getOperand(i); 162 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) { 163 if (!CN->isNullValue()) 164 return false; 165 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) { 166 if (!CFPN->getValueAPF().isPosZero()) 167 return false; 168 } else 169 return false; 170 171 // Okay, we have at least one 0 value, check to see if the rest match or are 172 // undefs. 173 for (++i; i != e; ++i) 174 if (N->getOperand(i) != Zero && 175 N->getOperand(i).getOpcode() != ISD::UNDEF) 176 return false; 177 return true; 178} 179 180/// \brief Return true if the specified node is a BUILD_VECTOR node of 181/// all ConstantSDNode or undef. 182bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) { 183 if (N->getOpcode() != ISD::BUILD_VECTOR) 184 return false; 185 186 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 187 SDValue Op = N->getOperand(i); 188 if (Op.getOpcode() == ISD::UNDEF) 189 continue; 190 if (!isa<ConstantSDNode>(Op)) 191 return false; 192 } 193 return true; 194} 195 196/// isScalarToVector - Return true if the specified node is a 197/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 198/// element is not an undef. 199bool ISD::isScalarToVector(const SDNode *N) { 200 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 201 return true; 202 203 if (N->getOpcode() != ISD::BUILD_VECTOR) 204 return false; 205 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 206 return false; 207 unsigned NumElems = N->getNumOperands(); 208 if (NumElems == 1) 209 return false; 210 for (unsigned i = 1; i < NumElems; ++i) { 211 SDValue V = N->getOperand(i); 212 if (V.getOpcode() != ISD::UNDEF) 213 return false; 214 } 215 return true; 216} 217 218/// allOperandsUndef - Return true if the node has at least one operand 219/// and all operands of the specified node are ISD::UNDEF. 220bool ISD::allOperandsUndef(const SDNode *N) { 221 // Return false if the node has no operands. 222 // This is "logically inconsistent" with the definition of "all" but 223 // is probably the desired behavior. 224 if (N->getNumOperands() == 0) 225 return false; 226 227 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 228 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 229 return false; 230 231 return true; 232} 233 234ISD::NodeType ISD::getExtForLoadExtType(ISD::LoadExtType ExtType) { 235 switch (ExtType) { 236 case ISD::EXTLOAD: 237 return ISD::ANY_EXTEND; 238 case ISD::SEXTLOAD: 239 return ISD::SIGN_EXTEND; 240 case ISD::ZEXTLOAD: 241 return ISD::ZERO_EXTEND; 242 default: 243 break; 244 } 245 246 llvm_unreachable("Invalid LoadExtType"); 247} 248 249/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 250/// when given the operation for (X op Y). 251ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 252 // To perform this operation, we just need to swap the L and G bits of the 253 // operation. 254 unsigned OldL = (Operation >> 2) & 1; 255 unsigned OldG = (Operation >> 1) & 1; 256 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 257 (OldL << 1) | // New G bit 258 (OldG << 2)); // New L bit. 259} 260 261/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 262/// 'op' is a valid SetCC operation. 263ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 264 unsigned Operation = Op; 265 if (isInteger) 266 Operation ^= 7; // Flip L, G, E bits, but not U. 267 else 268 Operation ^= 15; // Flip all of the condition bits. 269 270 if (Operation > ISD::SETTRUE2) 271 Operation &= ~8; // Don't let N and U bits get set. 272 273 return ISD::CondCode(Operation); 274} 275 276 277/// isSignedOp - For an integer comparison, return 1 if the comparison is a 278/// signed operation and 2 if the result is an unsigned comparison. Return zero 279/// if the operation does not depend on the sign of the input (setne and seteq). 280static int isSignedOp(ISD::CondCode Opcode) { 281 switch (Opcode) { 282 default: llvm_unreachable("Illegal integer setcc operation!"); 283 case ISD::SETEQ: 284 case ISD::SETNE: return 0; 285 case ISD::SETLT: 286 case ISD::SETLE: 287 case ISD::SETGT: 288 case ISD::SETGE: return 1; 289 case ISD::SETULT: 290 case ISD::SETULE: 291 case ISD::SETUGT: 292 case ISD::SETUGE: return 2; 293 } 294} 295 296/// getSetCCOrOperation - Return the result of a logical OR between different 297/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 298/// returns SETCC_INVALID if it is not possible to represent the resultant 299/// comparison. 300ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 301 bool isInteger) { 302 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 303 // Cannot fold a signed integer setcc with an unsigned integer setcc. 304 return ISD::SETCC_INVALID; 305 306 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 307 308 // If the N and U bits get set then the resultant comparison DOES suddenly 309 // care about orderedness, and is true when ordered. 310 if (Op > ISD::SETTRUE2) 311 Op &= ~16; // Clear the U bit if the N bit is set. 312 313 // Canonicalize illegal integer setcc's. 314 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 315 Op = ISD::SETNE; 316 317 return ISD::CondCode(Op); 318} 319 320/// getSetCCAndOperation - Return the result of a logical AND between different 321/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 322/// function returns zero if it is not possible to represent the resultant 323/// comparison. 324ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 325 bool isInteger) { 326 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 327 // Cannot fold a signed setcc with an unsigned setcc. 328 return ISD::SETCC_INVALID; 329 330 // Combine all of the condition bits. 331 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 332 333 // Canonicalize illegal integer setcc's. 334 if (isInteger) { 335 switch (Result) { 336 default: break; 337 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 338 case ISD::SETOEQ: // SETEQ & SETU[LG]E 339 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 340 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 341 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 342 } 343 } 344 345 return Result; 346} 347 348//===----------------------------------------------------------------------===// 349// SDNode Profile Support 350//===----------------------------------------------------------------------===// 351 352/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 353/// 354static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 355 ID.AddInteger(OpC); 356} 357 358/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 359/// solely with their pointer. 360static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 361 ID.AddPointer(VTList.VTs); 362} 363 364/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 365/// 366static void AddNodeIDOperands(FoldingSetNodeID &ID, 367 const SDValue *Ops, unsigned NumOps) { 368 for (; NumOps; --NumOps, ++Ops) { 369 ID.AddPointer(Ops->getNode()); 370 ID.AddInteger(Ops->getResNo()); 371 } 372} 373 374/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 375/// 376static void AddNodeIDOperands(FoldingSetNodeID &ID, 377 const SDUse *Ops, unsigned NumOps) { 378 for (; NumOps; --NumOps, ++Ops) { 379 ID.AddPointer(Ops->getNode()); 380 ID.AddInteger(Ops->getResNo()); 381 } 382} 383 384static void AddNodeIDNode(FoldingSetNodeID &ID, 385 unsigned short OpC, SDVTList VTList, 386 const SDValue *OpList, unsigned N) { 387 AddNodeIDOpcode(ID, OpC); 388 AddNodeIDValueTypes(ID, VTList); 389 AddNodeIDOperands(ID, OpList, N); 390} 391 392/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 393/// the NodeID data. 394static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 395 switch (N->getOpcode()) { 396 case ISD::TargetExternalSymbol: 397 case ISD::ExternalSymbol: 398 llvm_unreachable("Should only be used on nodes with operands"); 399 default: break; // Normal nodes don't need extra info. 400 case ISD::TargetConstant: 401 case ISD::Constant: { 402 const ConstantSDNode *C = cast<ConstantSDNode>(N); 403 ID.AddPointer(C->getConstantIntValue()); 404 ID.AddBoolean(C->isOpaque()); 405 break; 406 } 407 case ISD::TargetConstantFP: 408 case ISD::ConstantFP: { 409 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 410 break; 411 } 412 case ISD::TargetGlobalAddress: 413 case ISD::GlobalAddress: 414 case ISD::TargetGlobalTLSAddress: 415 case ISD::GlobalTLSAddress: { 416 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 417 ID.AddPointer(GA->getGlobal()); 418 ID.AddInteger(GA->getOffset()); 419 ID.AddInteger(GA->getTargetFlags()); 420 ID.AddInteger(GA->getAddressSpace()); 421 break; 422 } 423 case ISD::BasicBlock: 424 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 425 break; 426 case ISD::Register: 427 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 428 break; 429 case ISD::RegisterMask: 430 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 431 break; 432 case ISD::SRCVALUE: 433 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 434 break; 435 case ISD::FrameIndex: 436 case ISD::TargetFrameIndex: 437 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 438 break; 439 case ISD::JumpTable: 440 case ISD::TargetJumpTable: 441 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 442 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 443 break; 444 case ISD::ConstantPool: 445 case ISD::TargetConstantPool: { 446 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 447 ID.AddInteger(CP->getAlignment()); 448 ID.AddInteger(CP->getOffset()); 449 if (CP->isMachineConstantPoolEntry()) 450 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 451 else 452 ID.AddPointer(CP->getConstVal()); 453 ID.AddInteger(CP->getTargetFlags()); 454 break; 455 } 456 case ISD::TargetIndex: { 457 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 458 ID.AddInteger(TI->getIndex()); 459 ID.AddInteger(TI->getOffset()); 460 ID.AddInteger(TI->getTargetFlags()); 461 break; 462 } 463 case ISD::LOAD: { 464 const LoadSDNode *LD = cast<LoadSDNode>(N); 465 ID.AddInteger(LD->getMemoryVT().getRawBits()); 466 ID.AddInteger(LD->getRawSubclassData()); 467 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 468 break; 469 } 470 case ISD::STORE: { 471 const StoreSDNode *ST = cast<StoreSDNode>(N); 472 ID.AddInteger(ST->getMemoryVT().getRawBits()); 473 ID.AddInteger(ST->getRawSubclassData()); 474 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 475 break; 476 } 477 case ISD::ATOMIC_CMP_SWAP: 478 case ISD::ATOMIC_SWAP: 479 case ISD::ATOMIC_LOAD_ADD: 480 case ISD::ATOMIC_LOAD_SUB: 481 case ISD::ATOMIC_LOAD_AND: 482 case ISD::ATOMIC_LOAD_OR: 483 case ISD::ATOMIC_LOAD_XOR: 484 case ISD::ATOMIC_LOAD_NAND: 485 case ISD::ATOMIC_LOAD_MIN: 486 case ISD::ATOMIC_LOAD_MAX: 487 case ISD::ATOMIC_LOAD_UMIN: 488 case ISD::ATOMIC_LOAD_UMAX: 489 case ISD::ATOMIC_LOAD: 490 case ISD::ATOMIC_STORE: { 491 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 492 ID.AddInteger(AT->getMemoryVT().getRawBits()); 493 ID.AddInteger(AT->getRawSubclassData()); 494 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 495 break; 496 } 497 case ISD::PREFETCH: { 498 const MemSDNode *PF = cast<MemSDNode>(N); 499 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 500 break; 501 } 502 case ISD::VECTOR_SHUFFLE: { 503 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 504 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 505 i != e; ++i) 506 ID.AddInteger(SVN->getMaskElt(i)); 507 break; 508 } 509 case ISD::TargetBlockAddress: 510 case ISD::BlockAddress: { 511 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N); 512 ID.AddPointer(BA->getBlockAddress()); 513 ID.AddInteger(BA->getOffset()); 514 ID.AddInteger(BA->getTargetFlags()); 515 break; 516 } 517 } // end switch (N->getOpcode()) 518 519 // Target specific memory nodes could also have address spaces to check. 520 if (N->isTargetMemoryOpcode()) 521 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 522} 523 524/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 525/// data. 526static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 527 AddNodeIDOpcode(ID, N->getOpcode()); 528 // Add the return value info. 529 AddNodeIDValueTypes(ID, N->getVTList()); 530 // Add the operand info. 531 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 532 533 // Handle SDNode leafs with special info. 534 AddNodeIDCustom(ID, N); 535} 536 537/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 538/// the CSE map that carries volatility, temporalness, indexing mode, and 539/// extension/truncation information. 540/// 541static inline unsigned 542encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 543 bool isNonTemporal, bool isInvariant) { 544 assert((ConvType & 3) == ConvType && 545 "ConvType may not require more than 2 bits!"); 546 assert((AM & 7) == AM && 547 "AM may not require more than 3 bits!"); 548 return ConvType | 549 (AM << 2) | 550 (isVolatile << 5) | 551 (isNonTemporal << 6) | 552 (isInvariant << 7); 553} 554 555//===----------------------------------------------------------------------===// 556// SelectionDAG Class 557//===----------------------------------------------------------------------===// 558 559/// doNotCSE - Return true if CSE should not be performed for this node. 560static bool doNotCSE(SDNode *N) { 561 if (N->getValueType(0) == MVT::Glue) 562 return true; // Never CSE anything that produces a flag. 563 564 switch (N->getOpcode()) { 565 default: break; 566 case ISD::HANDLENODE: 567 case ISD::EH_LABEL: 568 return true; // Never CSE these nodes. 569 } 570 571 // Check that remaining values produced are not flags. 572 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 573 if (N->getValueType(i) == MVT::Glue) 574 return true; // Never CSE anything that produces a flag. 575 576 return false; 577} 578 579/// RemoveDeadNodes - This method deletes all unreachable nodes in the 580/// SelectionDAG. 581void SelectionDAG::RemoveDeadNodes() { 582 // Create a dummy node (which is not added to allnodes), that adds a reference 583 // to the root node, preventing it from being deleted. 584 HandleSDNode Dummy(getRoot()); 585 586 SmallVector<SDNode*, 128> DeadNodes; 587 588 // Add all obviously-dead nodes to the DeadNodes worklist. 589 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 590 if (I->use_empty()) 591 DeadNodes.push_back(I); 592 593 RemoveDeadNodes(DeadNodes); 594 595 // If the root changed (e.g. it was a dead load, update the root). 596 setRoot(Dummy.getValue()); 597} 598 599/// RemoveDeadNodes - This method deletes the unreachable nodes in the 600/// given list, and any nodes that become unreachable as a result. 601void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 602 603 // Process the worklist, deleting the nodes and adding their uses to the 604 // worklist. 605 while (!DeadNodes.empty()) { 606 SDNode *N = DeadNodes.pop_back_val(); 607 608 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 609 DUL->NodeDeleted(N, 0); 610 611 // Take the node out of the appropriate CSE map. 612 RemoveNodeFromCSEMaps(N); 613 614 // Next, brutally remove the operand list. This is safe to do, as there are 615 // no cycles in the graph. 616 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 617 SDUse &Use = *I++; 618 SDNode *Operand = Use.getNode(); 619 Use.set(SDValue()); 620 621 // Now that we removed this operand, see if there are no uses of it left. 622 if (Operand->use_empty()) 623 DeadNodes.push_back(Operand); 624 } 625 626 DeallocateNode(N); 627 } 628} 629 630void SelectionDAG::RemoveDeadNode(SDNode *N){ 631 SmallVector<SDNode*, 16> DeadNodes(1, N); 632 633 // Create a dummy node that adds a reference to the root node, preventing 634 // it from being deleted. (This matters if the root is an operand of the 635 // dead node.) 636 HandleSDNode Dummy(getRoot()); 637 638 RemoveDeadNodes(DeadNodes); 639} 640 641void SelectionDAG::DeleteNode(SDNode *N) { 642 // First take this out of the appropriate CSE map. 643 RemoveNodeFromCSEMaps(N); 644 645 // Finally, remove uses due to operands of this node, remove from the 646 // AllNodes list, and delete the node. 647 DeleteNodeNotInCSEMaps(N); 648} 649 650void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 651 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 652 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 653 654 // Drop all of the operands and decrement used node's use counts. 655 N->DropOperands(); 656 657 DeallocateNode(N); 658} 659 660void SelectionDAG::DeallocateNode(SDNode *N) { 661 if (N->OperandsNeedDelete) 662 delete[] N->OperandList; 663 664 // Set the opcode to DELETED_NODE to help catch bugs when node 665 // memory is reallocated. 666 N->NodeType = ISD::DELETED_NODE; 667 668 NodeAllocator.Deallocate(AllNodes.remove(N)); 669 670 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 671 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 672 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 673 DbgVals[i]->setIsInvalidated(); 674} 675 676/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 677/// correspond to it. This is useful when we're about to delete or repurpose 678/// the node. We don't want future request for structurally identical nodes 679/// to return N anymore. 680bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 681 bool Erased = false; 682 switch (N->getOpcode()) { 683 case ISD::HANDLENODE: return false; // noop. 684 case ISD::CONDCODE: 685 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 686 "Cond code doesn't exist!"); 687 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 688 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 689 break; 690 case ISD::ExternalSymbol: 691 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 692 break; 693 case ISD::TargetExternalSymbol: { 694 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 695 Erased = TargetExternalSymbols.erase( 696 std::pair<std::string,unsigned char>(ESN->getSymbol(), 697 ESN->getTargetFlags())); 698 break; 699 } 700 case ISD::VALUETYPE: { 701 EVT VT = cast<VTSDNode>(N)->getVT(); 702 if (VT.isExtended()) { 703 Erased = ExtendedValueTypeNodes.erase(VT); 704 } else { 705 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 706 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 707 } 708 break; 709 } 710 default: 711 // Remove it from the CSE Map. 712 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 713 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 714 Erased = CSEMap.RemoveNode(N); 715 break; 716 } 717#ifndef NDEBUG 718 // Verify that the node was actually in one of the CSE maps, unless it has a 719 // flag result (which cannot be CSE'd) or is one of the special cases that are 720 // not subject to CSE. 721 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 722 !N->isMachineOpcode() && !doNotCSE(N)) { 723 N->dump(this); 724 dbgs() << "\n"; 725 llvm_unreachable("Node is not in map!"); 726 } 727#endif 728 return Erased; 729} 730 731/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 732/// maps and modified in place. Add it back to the CSE maps, unless an identical 733/// node already exists, in which case transfer all its users to the existing 734/// node. This transfer can potentially trigger recursive merging. 735/// 736void 737SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 738 // For node types that aren't CSE'd, just act as if no identical node 739 // already exists. 740 if (!doNotCSE(N)) { 741 SDNode *Existing = CSEMap.GetOrInsertNode(N); 742 if (Existing != N) { 743 // If there was already an existing matching node, use ReplaceAllUsesWith 744 // to replace the dead one with the existing one. This can cause 745 // recursive merging of other unrelated nodes down the line. 746 ReplaceAllUsesWith(N, Existing); 747 748 // N is now dead. Inform the listeners and delete it. 749 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 750 DUL->NodeDeleted(N, Existing); 751 DeleteNodeNotInCSEMaps(N); 752 return; 753 } 754 } 755 756 // If the node doesn't already exist, we updated it. Inform listeners. 757 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 758 DUL->NodeUpdated(N); 759} 760 761/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 762/// were replaced with those specified. If this node is never memoized, 763/// return null, otherwise return a pointer to the slot it would take. If a 764/// node already exists with these operands, the slot will be non-null. 765SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 766 void *&InsertPos) { 767 if (doNotCSE(N)) 768 return 0; 769 770 SDValue Ops[] = { Op }; 771 FoldingSetNodeID ID; 772 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 773 AddNodeIDCustom(ID, N); 774 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 775 return Node; 776} 777 778/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 779/// were replaced with those specified. If this node is never memoized, 780/// return null, otherwise return a pointer to the slot it would take. If a 781/// node already exists with these operands, the slot will be non-null. 782SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 783 SDValue Op1, SDValue Op2, 784 void *&InsertPos) { 785 if (doNotCSE(N)) 786 return 0; 787 788 SDValue Ops[] = { Op1, Op2 }; 789 FoldingSetNodeID ID; 790 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 791 AddNodeIDCustom(ID, N); 792 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 793 return Node; 794} 795 796 797/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 798/// were replaced with those specified. If this node is never memoized, 799/// return null, otherwise return a pointer to the slot it would take. If a 800/// node already exists with these operands, the slot will be non-null. 801SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 802 const SDValue *Ops,unsigned NumOps, 803 void *&InsertPos) { 804 if (doNotCSE(N)) 805 return 0; 806 807 FoldingSetNodeID ID; 808 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 809 AddNodeIDCustom(ID, N); 810 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 811 return Node; 812} 813 814#ifndef NDEBUG 815/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 816static void VerifyNodeCommon(SDNode *N) { 817 switch (N->getOpcode()) { 818 default: 819 break; 820 case ISD::BUILD_PAIR: { 821 EVT VT = N->getValueType(0); 822 assert(N->getNumValues() == 1 && "Too many results!"); 823 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 824 "Wrong return type!"); 825 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 826 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 827 "Mismatched operand types!"); 828 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 829 "Wrong operand type!"); 830 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 831 "Wrong return type size"); 832 break; 833 } 834 case ISD::BUILD_VECTOR: { 835 assert(N->getNumValues() == 1 && "Too many results!"); 836 assert(N->getValueType(0).isVector() && "Wrong return type!"); 837 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 838 "Wrong number of operands!"); 839 EVT EltVT = N->getValueType(0).getVectorElementType(); 840 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 841 assert((I->getValueType() == EltVT || 842 (EltVT.isInteger() && I->getValueType().isInteger() && 843 EltVT.bitsLE(I->getValueType()))) && 844 "Wrong operand type!"); 845 assert(I->getValueType() == N->getOperand(0).getValueType() && 846 "Operands must all have the same type"); 847 } 848 break; 849 } 850 } 851} 852 853/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 854static void VerifySDNode(SDNode *N) { 855 // The SDNode allocators cannot be used to allocate nodes with fields that are 856 // not present in an SDNode! 857 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 858 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 859 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 860 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 861 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 862 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 863 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 864 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 865 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 866 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 867 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 868 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 869 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 870 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 871 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 872 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 873 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 874 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 875 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 876 877 VerifyNodeCommon(N); 878} 879 880/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 881/// invalid. 882static void VerifyMachineNode(SDNode *N) { 883 // The MachineNode allocators cannot be used to allocate nodes with fields 884 // that are not present in a MachineNode! 885 // Currently there are no such nodes. 886 887 VerifyNodeCommon(N); 888} 889#endif // NDEBUG 890 891/// getEVTAlignment - Compute the default alignment value for the 892/// given type. 893/// 894unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 895 Type *Ty = VT == MVT::iPTR ? 896 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 897 VT.getTypeForEVT(*getContext()); 898 899 return TM.getTargetLowering()->getDataLayout()->getABITypeAlignment(Ty); 900} 901 902// EntryNode could meaningfully have debug info if we can find it... 903SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 904 : TM(tm), TSI(*tm.getSelectionDAGInfo()), TLI(0), OptLevel(OL), 905 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)), 906 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false), 907 UpdateListeners(0) { 908 AllNodes.push_back(&EntryNode); 909 DbgInfo = new SDDbgInfo(); 910} 911 912void SelectionDAG::init(MachineFunction &mf, const TargetLowering *tli) { 913 MF = &mf; 914 TLI = tli; 915 Context = &mf.getFunction()->getContext(); 916} 917 918SelectionDAG::~SelectionDAG() { 919 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 920 allnodes_clear(); 921 delete DbgInfo; 922} 923 924void SelectionDAG::allnodes_clear() { 925 assert(&*AllNodes.begin() == &EntryNode); 926 AllNodes.remove(AllNodes.begin()); 927 while (!AllNodes.empty()) 928 DeallocateNode(AllNodes.begin()); 929} 930 931void SelectionDAG::clear() { 932 allnodes_clear(); 933 OperandAllocator.Reset(); 934 CSEMap.clear(); 935 936 ExtendedValueTypeNodes.clear(); 937 ExternalSymbols.clear(); 938 TargetExternalSymbols.clear(); 939 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 940 static_cast<CondCodeSDNode*>(0)); 941 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 942 static_cast<SDNode*>(0)); 943 944 EntryNode.UseList = 0; 945 AllNodes.push_back(&EntryNode); 946 Root = getEntryNode(); 947 DbgInfo->clear(); 948} 949 950SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 951 return VT.bitsGT(Op.getValueType()) ? 952 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 953 getNode(ISD::TRUNCATE, DL, VT, Op); 954} 955 956SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 957 return VT.bitsGT(Op.getValueType()) ? 958 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 959 getNode(ISD::TRUNCATE, DL, VT, Op); 960} 961 962SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 963 return VT.bitsGT(Op.getValueType()) ? 964 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 965 getNode(ISD::TRUNCATE, DL, VT, Op); 966} 967 968SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) { 969 assert(!VT.isVector() && 970 "getZeroExtendInReg should use the vector element type instead of " 971 "the vector type!"); 972 if (Op.getValueType() == VT) return Op; 973 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 974 APInt Imm = APInt::getLowBitsSet(BitWidth, 975 VT.getSizeInBits()); 976 return getNode(ISD::AND, DL, Op.getValueType(), Op, 977 getConstant(Imm, Op.getValueType())); 978} 979 980/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 981/// 982SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) { 983 EVT EltVT = VT.getScalarType(); 984 SDValue NegOne = 985 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 986 return getNode(ISD::XOR, DL, VT, Val, NegOne); 987} 988 989SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT, bool isO) { 990 EVT EltVT = VT.getScalarType(); 991 assert((EltVT.getSizeInBits() >= 64 || 992 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 993 "getConstant with a uint64_t value that doesn't fit in the type!"); 994 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT, isO); 995} 996 997SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT, bool isO) 998{ 999 return getConstant(*ConstantInt::get(*Context, Val), VT, isT, isO); 1000} 1001 1002SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT, 1003 bool isO) { 1004 assert(VT.isInteger() && "Cannot create FP integer constant!"); 1005 1006 EVT EltVT = VT.getScalarType(); 1007 const ConstantInt *Elt = &Val; 1008 1009 const TargetLowering *TLI = TM.getTargetLowering(); 1010 1011 // In some cases the vector type is legal but the element type is illegal and 1012 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 1013 // inserted value (the type does not need to match the vector element type). 1014 // Any extra bits introduced will be truncated away. 1015 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) == 1016 TargetLowering::TypePromoteInteger) { 1017 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT); 1018 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 1019 Elt = ConstantInt::get(*getContext(), NewVal); 1020 } 1021 // In other cases the element type is illegal and needs to be expanded, for 1022 // example v2i64 on MIPS32. In this case, find the nearest legal type, split 1023 // the value into n parts and use a vector type with n-times the elements. 1024 // Then bitcast to the type requested. 1025 // Legalizing constants too early makes the DAGCombiner's job harder so we 1026 // only legalize if the DAG tells us we must produce legal types. 1027 else if (NewNodesMustHaveLegalTypes && VT.isVector() && 1028 TLI->getTypeAction(*getContext(), EltVT) == 1029 TargetLowering::TypeExpandInteger) { 1030 APInt NewVal = Elt->getValue(); 1031 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT); 1032 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits(); 1033 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits; 1034 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts); 1035 1036 // Check the temporary vector is the correct size. If this fails then 1037 // getTypeToTransformTo() probably returned a type whose size (in bits) 1038 // isn't a power-of-2 factor of the requested type size. 1039 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits()); 1040 1041 SmallVector<SDValue, 2> EltParts; 1042 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) { 1043 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits) 1044 .trunc(ViaEltSizeInBits), 1045 ViaEltVT, isT, isO)); 1046 } 1047 1048 // EltParts is currently in little endian order. If we actually want 1049 // big-endian order then reverse it now. 1050 if (TLI->isBigEndian()) 1051 std::reverse(EltParts.begin(), EltParts.end()); 1052 1053 // The elements must be reversed when the element order is different 1054 // to the endianness of the elements (because the BITCAST is itself a 1055 // vector shuffle in this situation). However, we do not need any code to 1056 // perform this reversal because getConstant() is producing a vector 1057 // splat. 1058 // This situation occurs in MIPS MSA. 1059 1060 SmallVector<SDValue, 8> Ops; 1061 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i) 1062 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end()); 1063 1064 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT, 1065 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT, 1066 &Ops[0], Ops.size())); 1067 return Result; 1068 } 1069 1070 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 1071 "APInt size does not match type size!"); 1072 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 1073 FoldingSetNodeID ID; 1074 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1075 ID.AddPointer(Elt); 1076 ID.AddBoolean(isO); 1077 void *IP = 0; 1078 SDNode *N = NULL; 1079 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1080 if (!VT.isVector()) 1081 return SDValue(N, 0); 1082 1083 if (!N) { 1084 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, EltVT); 1085 CSEMap.InsertNode(N, IP); 1086 AllNodes.push_back(N); 1087 } 1088 1089 SDValue Result(N, 0); 1090 if (VT.isVector()) { 1091 SmallVector<SDValue, 8> Ops; 1092 Ops.assign(VT.getVectorNumElements(), Result); 1093 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size()); 1094 } 1095 return Result; 1096} 1097 1098SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1099 return getConstant(Val, TM.getTargetLowering()->getPointerTy(), isTarget); 1100} 1101 1102 1103SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1104 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1105} 1106 1107SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1108 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1109 1110 EVT EltVT = VT.getScalarType(); 1111 1112 // Do the map lookup using the actual bit pattern for the floating point 1113 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1114 // we don't have issues with SNANs. 1115 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1116 FoldingSetNodeID ID; 1117 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1118 ID.AddPointer(&V); 1119 void *IP = 0; 1120 SDNode *N = NULL; 1121 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1122 if (!VT.isVector()) 1123 return SDValue(N, 0); 1124 1125 if (!N) { 1126 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1127 CSEMap.InsertNode(N, IP); 1128 AllNodes.push_back(N); 1129 } 1130 1131 SDValue Result(N, 0); 1132 if (VT.isVector()) { 1133 SmallVector<SDValue, 8> Ops; 1134 Ops.assign(VT.getVectorNumElements(), Result); 1135 // FIXME SDLoc info might be appropriate here 1136 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size()); 1137 } 1138 return Result; 1139} 1140 1141SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1142 EVT EltVT = VT.getScalarType(); 1143 if (EltVT==MVT::f32) 1144 return getConstantFP(APFloat((float)Val), VT, isTarget); 1145 else if (EltVT==MVT::f64) 1146 return getConstantFP(APFloat(Val), VT, isTarget); 1147 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 || 1148 EltVT==MVT::f16) { 1149 bool ignored; 1150 APFloat apf = APFloat(Val); 1151 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1152 &ignored); 1153 return getConstantFP(apf, VT, isTarget); 1154 } else 1155 llvm_unreachable("Unsupported type in getConstantFP"); 1156} 1157 1158SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL, 1159 EVT VT, int64_t Offset, 1160 bool isTargetGA, 1161 unsigned char TargetFlags) { 1162 assert((TargetFlags == 0 || isTargetGA) && 1163 "Cannot set target flags on target-independent globals"); 1164 const TargetLowering *TLI = TM.getTargetLowering(); 1165 1166 // Truncate (with sign-extension) the offset value to the pointer size. 1167 unsigned BitWidth = TLI->getPointerTypeSizeInBits(GV->getType()); 1168 if (BitWidth < 64) 1169 Offset = SignExtend64(Offset, BitWidth); 1170 1171 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1172 if (!GVar) { 1173 // If GV is an alias then use the aliasee for determining thread-localness. 1174 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1175 GVar = dyn_cast_or_null<GlobalVariable>(GA->getAliasedGlobal()); 1176 } 1177 1178 unsigned Opc; 1179 if (GVar && GVar->isThreadLocal()) 1180 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1181 else 1182 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1183 1184 FoldingSetNodeID ID; 1185 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1186 ID.AddPointer(GV); 1187 ID.AddInteger(Offset); 1188 ID.AddInteger(TargetFlags); 1189 ID.AddInteger(GV->getType()->getAddressSpace()); 1190 void *IP = 0; 1191 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1192 return SDValue(E, 0); 1193 1194 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(), 1195 DL.getDebugLoc(), GV, VT, 1196 Offset, TargetFlags); 1197 CSEMap.InsertNode(N, IP); 1198 AllNodes.push_back(N); 1199 return SDValue(N, 0); 1200} 1201 1202SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1203 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1204 FoldingSetNodeID ID; 1205 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1206 ID.AddInteger(FI); 1207 void *IP = 0; 1208 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1209 return SDValue(E, 0); 1210 1211 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1212 CSEMap.InsertNode(N, IP); 1213 AllNodes.push_back(N); 1214 return SDValue(N, 0); 1215} 1216 1217SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1218 unsigned char TargetFlags) { 1219 assert((TargetFlags == 0 || isTarget) && 1220 "Cannot set target flags on target-independent jump tables"); 1221 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1222 FoldingSetNodeID ID; 1223 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1224 ID.AddInteger(JTI); 1225 ID.AddInteger(TargetFlags); 1226 void *IP = 0; 1227 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1228 return SDValue(E, 0); 1229 1230 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1231 TargetFlags); 1232 CSEMap.InsertNode(N, IP); 1233 AllNodes.push_back(N); 1234 return SDValue(N, 0); 1235} 1236 1237SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1238 unsigned Alignment, int Offset, 1239 bool isTarget, 1240 unsigned char TargetFlags) { 1241 assert((TargetFlags == 0 || isTarget) && 1242 "Cannot set target flags on target-independent globals"); 1243 if (Alignment == 0) 1244 Alignment = 1245 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType()); 1246 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1247 FoldingSetNodeID ID; 1248 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1249 ID.AddInteger(Alignment); 1250 ID.AddInteger(Offset); 1251 ID.AddPointer(C); 1252 ID.AddInteger(TargetFlags); 1253 void *IP = 0; 1254 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1255 return SDValue(E, 0); 1256 1257 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1258 Alignment, TargetFlags); 1259 CSEMap.InsertNode(N, IP); 1260 AllNodes.push_back(N); 1261 return SDValue(N, 0); 1262} 1263 1264 1265SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1266 unsigned Alignment, int Offset, 1267 bool isTarget, 1268 unsigned char TargetFlags) { 1269 assert((TargetFlags == 0 || isTarget) && 1270 "Cannot set target flags on target-independent globals"); 1271 if (Alignment == 0) 1272 Alignment = 1273 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType()); 1274 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1275 FoldingSetNodeID ID; 1276 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1277 ID.AddInteger(Alignment); 1278 ID.AddInteger(Offset); 1279 C->addSelectionDAGCSEId(ID); 1280 ID.AddInteger(TargetFlags); 1281 void *IP = 0; 1282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1283 return SDValue(E, 0); 1284 1285 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1286 Alignment, TargetFlags); 1287 CSEMap.InsertNode(N, IP); 1288 AllNodes.push_back(N); 1289 return SDValue(N, 0); 1290} 1291 1292SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1293 unsigned char TargetFlags) { 1294 FoldingSetNodeID ID; 1295 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1296 ID.AddInteger(Index); 1297 ID.AddInteger(Offset); 1298 ID.AddInteger(TargetFlags); 1299 void *IP = 0; 1300 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1301 return SDValue(E, 0); 1302 1303 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1304 TargetFlags); 1305 CSEMap.InsertNode(N, IP); 1306 AllNodes.push_back(N); 1307 return SDValue(N, 0); 1308} 1309 1310SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1311 FoldingSetNodeID ID; 1312 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1313 ID.AddPointer(MBB); 1314 void *IP = 0; 1315 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1316 return SDValue(E, 0); 1317 1318 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1319 CSEMap.InsertNode(N, IP); 1320 AllNodes.push_back(N); 1321 return SDValue(N, 0); 1322} 1323 1324SDValue SelectionDAG::getValueType(EVT VT) { 1325 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1326 ValueTypeNodes.size()) 1327 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1328 1329 SDNode *&N = VT.isExtended() ? 1330 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1331 1332 if (N) return SDValue(N, 0); 1333 N = new (NodeAllocator) VTSDNode(VT); 1334 AllNodes.push_back(N); 1335 return SDValue(N, 0); 1336} 1337 1338SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1339 SDNode *&N = ExternalSymbols[Sym]; 1340 if (N) return SDValue(N, 0); 1341 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1342 AllNodes.push_back(N); 1343 return SDValue(N, 0); 1344} 1345 1346SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1347 unsigned char TargetFlags) { 1348 SDNode *&N = 1349 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1350 TargetFlags)]; 1351 if (N) return SDValue(N, 0); 1352 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1353 AllNodes.push_back(N); 1354 return SDValue(N, 0); 1355} 1356 1357SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1358 if ((unsigned)Cond >= CondCodeNodes.size()) 1359 CondCodeNodes.resize(Cond+1); 1360 1361 if (CondCodeNodes[Cond] == 0) { 1362 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1363 CondCodeNodes[Cond] = N; 1364 AllNodes.push_back(N); 1365 } 1366 1367 return SDValue(CondCodeNodes[Cond], 0); 1368} 1369 1370// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1371// the shuffle mask M that point at N1 to point at N2, and indices that point 1372// N2 to point at N1. 1373static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1374 std::swap(N1, N2); 1375 int NElts = M.size(); 1376 for (int i = 0; i != NElts; ++i) { 1377 if (M[i] >= NElts) 1378 M[i] -= NElts; 1379 else if (M[i] >= 0) 1380 M[i] += NElts; 1381 } 1382} 1383 1384SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, 1385 SDValue N2, const int *Mask) { 1386 assert(VT == N1.getValueType() && VT == N2.getValueType() && 1387 "Invalid VECTOR_SHUFFLE"); 1388 1389 // Canonicalize shuffle undef, undef -> undef 1390 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1391 return getUNDEF(VT); 1392 1393 // Validate that all indices in Mask are within the range of the elements 1394 // input to the shuffle. 1395 unsigned NElts = VT.getVectorNumElements(); 1396 SmallVector<int, 8> MaskVec; 1397 for (unsigned i = 0; i != NElts; ++i) { 1398 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1399 MaskVec.push_back(Mask[i]); 1400 } 1401 1402 // Canonicalize shuffle v, v -> v, undef 1403 if (N1 == N2) { 1404 N2 = getUNDEF(VT); 1405 for (unsigned i = 0; i != NElts; ++i) 1406 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1407 } 1408 1409 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1410 if (N1.getOpcode() == ISD::UNDEF) 1411 commuteShuffle(N1, N2, MaskVec); 1412 1413 // Canonicalize all index into lhs, -> shuffle lhs, undef 1414 // Canonicalize all index into rhs, -> shuffle rhs, undef 1415 bool AllLHS = true, AllRHS = true; 1416 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1417 for (unsigned i = 0; i != NElts; ++i) { 1418 if (MaskVec[i] >= (int)NElts) { 1419 if (N2Undef) 1420 MaskVec[i] = -1; 1421 else 1422 AllLHS = false; 1423 } else if (MaskVec[i] >= 0) { 1424 AllRHS = false; 1425 } 1426 } 1427 if (AllLHS && AllRHS) 1428 return getUNDEF(VT); 1429 if (AllLHS && !N2Undef) 1430 N2 = getUNDEF(VT); 1431 if (AllRHS) { 1432 N1 = getUNDEF(VT); 1433 commuteShuffle(N1, N2, MaskVec); 1434 } 1435 1436 // If Identity shuffle return that node. 1437 bool Identity = true; 1438 for (unsigned i = 0; i != NElts; ++i) { 1439 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1440 } 1441 if (Identity && NElts) 1442 return N1; 1443 1444 FoldingSetNodeID ID; 1445 SDValue Ops[2] = { N1, N2 }; 1446 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1447 for (unsigned i = 0; i != NElts; ++i) 1448 ID.AddInteger(MaskVec[i]); 1449 1450 void* IP = 0; 1451 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1452 return SDValue(E, 0); 1453 1454 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1455 // SDNode doesn't have access to it. This memory will be "leaked" when 1456 // the node is deallocated, but recovered when the NodeAllocator is released. 1457 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1458 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1459 1460 ShuffleVectorSDNode *N = 1461 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(), 1462 dl.getDebugLoc(), N1, N2, 1463 MaskAlloc); 1464 CSEMap.InsertNode(N, IP); 1465 AllNodes.push_back(N); 1466 return SDValue(N, 0); 1467} 1468 1469SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl, 1470 SDValue Val, SDValue DTy, 1471 SDValue STy, SDValue Rnd, SDValue Sat, 1472 ISD::CvtCode Code) { 1473 // If the src and dest types are the same and the conversion is between 1474 // integer types of the same sign or two floats, no conversion is necessary. 1475 if (DTy == STy && 1476 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1477 return Val; 1478 1479 FoldingSetNodeID ID; 1480 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1481 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1482 void* IP = 0; 1483 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1484 return SDValue(E, 0); 1485 1486 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(), 1487 dl.getDebugLoc(), 1488 Ops, 5, Code); 1489 CSEMap.InsertNode(N, IP); 1490 AllNodes.push_back(N); 1491 return SDValue(N, 0); 1492} 1493 1494SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1495 FoldingSetNodeID ID; 1496 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1497 ID.AddInteger(RegNo); 1498 void *IP = 0; 1499 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1500 return SDValue(E, 0); 1501 1502 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1503 CSEMap.InsertNode(N, IP); 1504 AllNodes.push_back(N); 1505 return SDValue(N, 0); 1506} 1507 1508SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1509 FoldingSetNodeID ID; 1510 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1511 ID.AddPointer(RegMask); 1512 void *IP = 0; 1513 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1514 return SDValue(E, 0); 1515 1516 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1517 CSEMap.InsertNode(N, IP); 1518 AllNodes.push_back(N); 1519 return SDValue(N, 0); 1520} 1521 1522SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) { 1523 FoldingSetNodeID ID; 1524 SDValue Ops[] = { Root }; 1525 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1526 ID.AddPointer(Label); 1527 void *IP = 0; 1528 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1529 return SDValue(E, 0); 1530 1531 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(), 1532 dl.getDebugLoc(), Root, Label); 1533 CSEMap.InsertNode(N, IP); 1534 AllNodes.push_back(N); 1535 return SDValue(N, 0); 1536} 1537 1538 1539SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1540 int64_t Offset, 1541 bool isTarget, 1542 unsigned char TargetFlags) { 1543 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1544 1545 FoldingSetNodeID ID; 1546 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1547 ID.AddPointer(BA); 1548 ID.AddInteger(Offset); 1549 ID.AddInteger(TargetFlags); 1550 void *IP = 0; 1551 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1552 return SDValue(E, 0); 1553 1554 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset, 1555 TargetFlags); 1556 CSEMap.InsertNode(N, IP); 1557 AllNodes.push_back(N); 1558 return SDValue(N, 0); 1559} 1560 1561SDValue SelectionDAG::getSrcValue(const Value *V) { 1562 assert((!V || V->getType()->isPointerTy()) && 1563 "SrcValue is not a pointer?"); 1564 1565 FoldingSetNodeID ID; 1566 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1567 ID.AddPointer(V); 1568 1569 void *IP = 0; 1570 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1571 return SDValue(E, 0); 1572 1573 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1574 CSEMap.InsertNode(N, IP); 1575 AllNodes.push_back(N); 1576 return SDValue(N, 0); 1577} 1578 1579/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1580SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1581 FoldingSetNodeID ID; 1582 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1583 ID.AddPointer(MD); 1584 1585 void *IP = 0; 1586 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1587 return SDValue(E, 0); 1588 1589 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1590 CSEMap.InsertNode(N, IP); 1591 AllNodes.push_back(N); 1592 return SDValue(N, 0); 1593} 1594 1595/// getAddrSpaceCast - Return an AddrSpaceCastSDNode. 1596SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr, 1597 unsigned SrcAS, unsigned DestAS) { 1598 SDValue Ops[] = {Ptr}; 1599 FoldingSetNodeID ID; 1600 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), &Ops[0], 1); 1601 ID.AddInteger(SrcAS); 1602 ID.AddInteger(DestAS); 1603 1604 void *IP = 0; 1605 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1606 return SDValue(E, 0); 1607 1608 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(), 1609 dl.getDebugLoc(), 1610 VT, Ptr, SrcAS, DestAS); 1611 CSEMap.InsertNode(N, IP); 1612 AllNodes.push_back(N); 1613 return SDValue(N, 0); 1614} 1615 1616/// getShiftAmountOperand - Return the specified value casted to 1617/// the target's desired shift amount type. 1618SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1619 EVT OpTy = Op.getValueType(); 1620 EVT ShTy = TM.getTargetLowering()->getShiftAmountTy(LHSTy); 1621 if (OpTy == ShTy || OpTy.isVector()) return Op; 1622 1623 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1624 return getNode(Opcode, SDLoc(Op), ShTy, Op); 1625} 1626 1627/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1628/// specified value type. 1629SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1630 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1631 unsigned ByteSize = VT.getStoreSize(); 1632 Type *Ty = VT.getTypeForEVT(*getContext()); 1633 const TargetLowering *TLI = TM.getTargetLowering(); 1634 unsigned StackAlign = 1635 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign); 1636 1637 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1638 return getFrameIndex(FrameIdx, TLI->getPointerTy()); 1639} 1640 1641/// CreateStackTemporary - Create a stack temporary suitable for holding 1642/// either of the specified value types. 1643SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1644 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1645 VT2.getStoreSizeInBits())/8; 1646 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1647 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1648 const TargetLowering *TLI = TM.getTargetLowering(); 1649 const DataLayout *TD = TLI->getDataLayout(); 1650 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1651 TD->getPrefTypeAlignment(Ty2)); 1652 1653 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1654 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1655 return getFrameIndex(FrameIdx, TLI->getPointerTy()); 1656} 1657 1658SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1659 SDValue N2, ISD::CondCode Cond, SDLoc dl) { 1660 // These setcc operations always fold. 1661 switch (Cond) { 1662 default: break; 1663 case ISD::SETFALSE: 1664 case ISD::SETFALSE2: return getConstant(0, VT); 1665 case ISD::SETTRUE: 1666 case ISD::SETTRUE2: { 1667 const TargetLowering *TLI = TM.getTargetLowering(); 1668 TargetLowering::BooleanContent Cnt = TLI->getBooleanContents(VT.isVector()); 1669 return getConstant( 1670 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT); 1671 } 1672 1673 case ISD::SETOEQ: 1674 case ISD::SETOGT: 1675 case ISD::SETOGE: 1676 case ISD::SETOLT: 1677 case ISD::SETOLE: 1678 case ISD::SETONE: 1679 case ISD::SETO: 1680 case ISD::SETUO: 1681 case ISD::SETUEQ: 1682 case ISD::SETUNE: 1683 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1684 break; 1685 } 1686 1687 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1688 const APInt &C2 = N2C->getAPIntValue(); 1689 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1690 const APInt &C1 = N1C->getAPIntValue(); 1691 1692 switch (Cond) { 1693 default: llvm_unreachable("Unknown integer setcc!"); 1694 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1695 case ISD::SETNE: return getConstant(C1 != C2, VT); 1696 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1697 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1698 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1699 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1700 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1701 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1702 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1703 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1704 } 1705 } 1706 } 1707 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1708 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1709 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1710 switch (Cond) { 1711 default: break; 1712 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1713 return getUNDEF(VT); 1714 // fall through 1715 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1716 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1717 return getUNDEF(VT); 1718 // fall through 1719 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1720 R==APFloat::cmpLessThan, VT); 1721 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1722 return getUNDEF(VT); 1723 // fall through 1724 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1725 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1726 return getUNDEF(VT); 1727 // fall through 1728 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1729 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1730 return getUNDEF(VT); 1731 // fall through 1732 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1733 R==APFloat::cmpEqual, VT); 1734 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1735 return getUNDEF(VT); 1736 // fall through 1737 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1738 R==APFloat::cmpEqual, VT); 1739 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1740 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1741 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1742 R==APFloat::cmpEqual, VT); 1743 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1744 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1745 R==APFloat::cmpLessThan, VT); 1746 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1747 R==APFloat::cmpUnordered, VT); 1748 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1749 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1750 } 1751 } else { 1752 // Ensure that the constant occurs on the RHS. 1753 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond); 1754 MVT CompVT = N1.getValueType().getSimpleVT(); 1755 if (!TM.getTargetLowering()->isCondCodeLegal(SwappedCond, CompVT)) 1756 return SDValue(); 1757 1758 return getSetCC(dl, VT, N2, N1, SwappedCond); 1759 } 1760 } 1761 1762 // Could not fold it. 1763 return SDValue(); 1764} 1765 1766/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1767/// use this predicate to simplify operations downstream. 1768bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1769 // This predicate is not safe for vector operations. 1770 if (Op.getValueType().isVector()) 1771 return false; 1772 1773 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1774 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1775} 1776 1777/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1778/// this predicate to simplify operations downstream. Mask is known to be zero 1779/// for bits that V cannot have. 1780bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1781 unsigned Depth) const { 1782 APInt KnownZero, KnownOne; 1783 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1784 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1785 return (KnownZero & Mask) == Mask; 1786} 1787 1788/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1789/// known to be either zero or one and return them in the KnownZero/KnownOne 1790/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1791/// processing. 1792void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1793 APInt &KnownOne, unsigned Depth) const { 1794 const TargetLowering *TLI = TM.getTargetLowering(); 1795 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1796 1797 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1798 if (Depth == 6) 1799 return; // Limit search depth. 1800 1801 APInt KnownZero2, KnownOne2; 1802 1803 switch (Op.getOpcode()) { 1804 case ISD::Constant: 1805 // We know all of the bits for a constant! 1806 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1807 KnownZero = ~KnownOne; 1808 return; 1809 case ISD::AND: 1810 // If either the LHS or the RHS are Zero, the result is zero. 1811 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1812 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1813 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1814 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1815 1816 // Output known-1 bits are only known if set in both the LHS & RHS. 1817 KnownOne &= KnownOne2; 1818 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1819 KnownZero |= KnownZero2; 1820 return; 1821 case ISD::OR: 1822 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1823 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1824 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1825 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1826 1827 // Output known-0 bits are only known if clear in both the LHS & RHS. 1828 KnownZero &= KnownZero2; 1829 // Output known-1 are known to be set if set in either the LHS | RHS. 1830 KnownOne |= KnownOne2; 1831 return; 1832 case ISD::XOR: { 1833 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1834 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1835 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1836 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1837 1838 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1839 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1840 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1841 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1842 KnownZero = KnownZeroOut; 1843 return; 1844 } 1845 case ISD::MUL: { 1846 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1847 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1848 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1849 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1850 1851 // If low bits are zero in either operand, output low known-0 bits. 1852 // Also compute a conserative estimate for high known-0 bits. 1853 // More trickiness is possible, but this is sufficient for the 1854 // interesting case of alignment computation. 1855 KnownOne.clearAllBits(); 1856 unsigned TrailZ = KnownZero.countTrailingOnes() + 1857 KnownZero2.countTrailingOnes(); 1858 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1859 KnownZero2.countLeadingOnes(), 1860 BitWidth) - BitWidth; 1861 1862 TrailZ = std::min(TrailZ, BitWidth); 1863 LeadZ = std::min(LeadZ, BitWidth); 1864 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1865 APInt::getHighBitsSet(BitWidth, LeadZ); 1866 return; 1867 } 1868 case ISD::UDIV: { 1869 // For the purposes of computing leading zeros we can conservatively 1870 // treat a udiv as a logical right shift by the power of 2 known to 1871 // be less than the denominator. 1872 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1873 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1874 1875 KnownOne2.clearAllBits(); 1876 KnownZero2.clearAllBits(); 1877 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1878 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1879 if (RHSUnknownLeadingOnes != BitWidth) 1880 LeadZ = std::min(BitWidth, 1881 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1882 1883 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1884 return; 1885 } 1886 case ISD::SELECT: 1887 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1888 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1889 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1890 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1891 1892 // Only known if known in both the LHS and RHS. 1893 KnownOne &= KnownOne2; 1894 KnownZero &= KnownZero2; 1895 return; 1896 case ISD::SELECT_CC: 1897 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1898 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1899 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1900 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1901 1902 // Only known if known in both the LHS and RHS. 1903 KnownOne &= KnownOne2; 1904 KnownZero &= KnownZero2; 1905 return; 1906 case ISD::SADDO: 1907 case ISD::UADDO: 1908 case ISD::SSUBO: 1909 case ISD::USUBO: 1910 case ISD::SMULO: 1911 case ISD::UMULO: 1912 if (Op.getResNo() != 1) 1913 return; 1914 // The boolean result conforms to getBooleanContents. Fall through. 1915 case ISD::SETCC: 1916 // If we know the result of a setcc has the top bits zero, use this info. 1917 if (TLI->getBooleanContents(Op.getValueType().isVector()) == 1918 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1919 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1920 return; 1921 case ISD::SHL: 1922 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1923 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1924 unsigned ShAmt = SA->getZExtValue(); 1925 1926 // If the shift count is an invalid immediate, don't do anything. 1927 if (ShAmt >= BitWidth) 1928 return; 1929 1930 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1931 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1932 KnownZero <<= ShAmt; 1933 KnownOne <<= ShAmt; 1934 // low bits known zero. 1935 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1936 } 1937 return; 1938 case ISD::SRL: 1939 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1940 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1941 unsigned ShAmt = SA->getZExtValue(); 1942 1943 // If the shift count is an invalid immediate, don't do anything. 1944 if (ShAmt >= BitWidth) 1945 return; 1946 1947 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1948 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1949 KnownZero = KnownZero.lshr(ShAmt); 1950 KnownOne = KnownOne.lshr(ShAmt); 1951 1952 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1953 KnownZero |= HighBits; // High bits known zero. 1954 } 1955 return; 1956 case ISD::SRA: 1957 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1958 unsigned ShAmt = SA->getZExtValue(); 1959 1960 // If the shift count is an invalid immediate, don't do anything. 1961 if (ShAmt >= BitWidth) 1962 return; 1963 1964 // If any of the demanded bits are produced by the sign extension, we also 1965 // demand the input sign bit. 1966 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1967 1968 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1969 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1970 KnownZero = KnownZero.lshr(ShAmt); 1971 KnownOne = KnownOne.lshr(ShAmt); 1972 1973 // Handle the sign bits. 1974 APInt SignBit = APInt::getSignBit(BitWidth); 1975 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1976 1977 if (KnownZero.intersects(SignBit)) { 1978 KnownZero |= HighBits; // New bits are known zero. 1979 } else if (KnownOne.intersects(SignBit)) { 1980 KnownOne |= HighBits; // New bits are known one. 1981 } 1982 } 1983 return; 1984 case ISD::SIGN_EXTEND_INREG: { 1985 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1986 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1987 1988 // Sign extension. Compute the demanded bits in the result that are not 1989 // present in the input. 1990 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1991 1992 APInt InSignBit = APInt::getSignBit(EBits); 1993 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1994 1995 // If the sign extended bits are demanded, we know that the sign 1996 // bit is demanded. 1997 InSignBit = InSignBit.zext(BitWidth); 1998 if (NewBits.getBoolValue()) 1999 InputDemandedBits |= InSignBit; 2000 2001 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2002 KnownOne &= InputDemandedBits; 2003 KnownZero &= InputDemandedBits; 2004 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 2005 2006 // If the sign bit of the input is known set or clear, then we know the 2007 // top bits of the result. 2008 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 2009 KnownZero |= NewBits; 2010 KnownOne &= ~NewBits; 2011 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 2012 KnownOne |= NewBits; 2013 KnownZero &= ~NewBits; 2014 } else { // Input sign bit unknown 2015 KnownZero &= ~NewBits; 2016 KnownOne &= ~NewBits; 2017 } 2018 return; 2019 } 2020 case ISD::CTTZ: 2021 case ISD::CTTZ_ZERO_UNDEF: 2022 case ISD::CTLZ: 2023 case ISD::CTLZ_ZERO_UNDEF: 2024 case ISD::CTPOP: { 2025 unsigned LowBits = Log2_32(BitWidth)+1; 2026 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 2027 KnownOne.clearAllBits(); 2028 return; 2029 } 2030 case ISD::LOAD: { 2031 LoadSDNode *LD = cast<LoadSDNode>(Op); 2032 // If this is a ZEXTLoad and we are looking at the loaded value. 2033 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) { 2034 EVT VT = LD->getMemoryVT(); 2035 unsigned MemBits = VT.getScalarType().getSizeInBits(); 2036 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 2037 } else if (const MDNode *Ranges = LD->getRanges()) { 2038 computeMaskedBitsLoad(*Ranges, KnownZero); 2039 } 2040 return; 2041 } 2042 case ISD::ZERO_EXTEND: { 2043 EVT InVT = Op.getOperand(0).getValueType(); 2044 unsigned InBits = InVT.getScalarType().getSizeInBits(); 2045 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 2046 KnownZero = KnownZero.trunc(InBits); 2047 KnownOne = KnownOne.trunc(InBits); 2048 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2049 KnownZero = KnownZero.zext(BitWidth); 2050 KnownOne = KnownOne.zext(BitWidth); 2051 KnownZero |= NewBits; 2052 return; 2053 } 2054 case ISD::SIGN_EXTEND: { 2055 EVT InVT = Op.getOperand(0).getValueType(); 2056 unsigned InBits = InVT.getScalarType().getSizeInBits(); 2057 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 2058 2059 KnownZero = KnownZero.trunc(InBits); 2060 KnownOne = KnownOne.trunc(InBits); 2061 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2062 2063 // Note if the sign bit is known to be zero or one. 2064 bool SignBitKnownZero = KnownZero.isNegative(); 2065 bool SignBitKnownOne = KnownOne.isNegative(); 2066 assert(!(SignBitKnownZero && SignBitKnownOne) && 2067 "Sign bit can't be known to be both zero and one!"); 2068 2069 KnownZero = KnownZero.zext(BitWidth); 2070 KnownOne = KnownOne.zext(BitWidth); 2071 2072 // If the sign bit is known zero or one, the top bits match. 2073 if (SignBitKnownZero) 2074 KnownZero |= NewBits; 2075 else if (SignBitKnownOne) 2076 KnownOne |= NewBits; 2077 return; 2078 } 2079 case ISD::ANY_EXTEND: { 2080 EVT InVT = Op.getOperand(0).getValueType(); 2081 unsigned InBits = InVT.getScalarType().getSizeInBits(); 2082 KnownZero = KnownZero.trunc(InBits); 2083 KnownOne = KnownOne.trunc(InBits); 2084 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2085 KnownZero = KnownZero.zext(BitWidth); 2086 KnownOne = KnownOne.zext(BitWidth); 2087 return; 2088 } 2089 case ISD::TRUNCATE: { 2090 EVT InVT = Op.getOperand(0).getValueType(); 2091 unsigned InBits = InVT.getScalarType().getSizeInBits(); 2092 KnownZero = KnownZero.zext(InBits); 2093 KnownOne = KnownOne.zext(InBits); 2094 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2095 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 2096 KnownZero = KnownZero.trunc(BitWidth); 2097 KnownOne = KnownOne.trunc(BitWidth); 2098 break; 2099 } 2100 case ISD::AssertZext: { 2101 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 2102 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 2103 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2104 KnownZero |= (~InMask); 2105 KnownOne &= (~KnownZero); 2106 return; 2107 } 2108 case ISD::FGETSIGN: 2109 // All bits are zero except the low bit. 2110 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 2111 return; 2112 2113 case ISD::SUB: { 2114 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2115 // We know that the top bits of C-X are clear if X contains less bits 2116 // than C (i.e. no wrap-around can happen). For example, 20-X is 2117 // positive if we can prove that X is >= 0 and < 16. 2118 if (CLHS->getAPIntValue().isNonNegative()) { 2119 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2120 // NLZ can't be BitWidth with no sign bit 2121 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2122 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2123 2124 // If all of the MaskV bits are known to be zero, then we know the 2125 // output top bits are zero, because we now know that the output is 2126 // from [0-C]. 2127 if ((KnownZero2 & MaskV) == MaskV) { 2128 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2129 // Top bits known zero. 2130 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2131 } 2132 } 2133 } 2134 } 2135 // fall through 2136 case ISD::ADD: 2137 case ISD::ADDE: { 2138 // Output known-0 bits are known if clear or set in both the low clear bits 2139 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2140 // low 3 bits clear. 2141 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2142 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2143 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2144 2145 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2146 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2147 KnownZeroOut = std::min(KnownZeroOut, 2148 KnownZero2.countTrailingOnes()); 2149 2150 if (Op.getOpcode() == ISD::ADD) { 2151 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2152 return; 2153 } 2154 2155 // With ADDE, a carry bit may be added in, so we can only use this 2156 // information if we know (at least) that the low two bits are clear. We 2157 // then return to the caller that the low bit is unknown but that other bits 2158 // are known zero. 2159 if (KnownZeroOut >= 2) // ADDE 2160 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2161 return; 2162 } 2163 case ISD::SREM: 2164 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2165 const APInt &RA = Rem->getAPIntValue().abs(); 2166 if (RA.isPowerOf2()) { 2167 APInt LowBits = RA - 1; 2168 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2169 2170 // The low bits of the first operand are unchanged by the srem. 2171 KnownZero = KnownZero2 & LowBits; 2172 KnownOne = KnownOne2 & LowBits; 2173 2174 // If the first operand is non-negative or has all low bits zero, then 2175 // the upper bits are all zero. 2176 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2177 KnownZero |= ~LowBits; 2178 2179 // If the first operand is negative and not all low bits are zero, then 2180 // the upper bits are all one. 2181 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2182 KnownOne |= ~LowBits; 2183 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2184 } 2185 } 2186 return; 2187 case ISD::UREM: { 2188 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2189 const APInt &RA = Rem->getAPIntValue(); 2190 if (RA.isPowerOf2()) { 2191 APInt LowBits = (RA - 1); 2192 KnownZero |= ~LowBits; 2193 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2194 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2195 break; 2196 } 2197 } 2198 2199 // Since the result is less than or equal to either operand, any leading 2200 // zero bits in either operand must also exist in the result. 2201 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2202 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2203 2204 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2205 KnownZero2.countLeadingOnes()); 2206 KnownOne.clearAllBits(); 2207 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2208 return; 2209 } 2210 case ISD::FrameIndex: 2211 case ISD::TargetFrameIndex: 2212 if (unsigned Align = InferPtrAlignment(Op)) { 2213 // The low bits are known zero if the pointer is aligned. 2214 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2215 return; 2216 } 2217 break; 2218 2219 default: 2220 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2221 break; 2222 // Fallthrough 2223 case ISD::INTRINSIC_WO_CHAIN: 2224 case ISD::INTRINSIC_W_CHAIN: 2225 case ISD::INTRINSIC_VOID: 2226 // Allow the target to implement this method for its nodes. 2227 TLI->computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2228 return; 2229 } 2230} 2231 2232/// ComputeNumSignBits - Return the number of times the sign bit of the 2233/// register is replicated into the other bits. We know that at least 1 bit 2234/// is always equal to the sign bit (itself), but other cases can give us 2235/// information. For example, immediately after an "SRA X, 2", we know that 2236/// the top 3 bits are all equal to each other, so we return 3. 2237unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2238 const TargetLowering *TLI = TM.getTargetLowering(); 2239 EVT VT = Op.getValueType(); 2240 assert(VT.isInteger() && "Invalid VT!"); 2241 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2242 unsigned Tmp, Tmp2; 2243 unsigned FirstAnswer = 1; 2244 2245 if (Depth == 6) 2246 return 1; // Limit search depth. 2247 2248 switch (Op.getOpcode()) { 2249 default: break; 2250 case ISD::AssertSext: 2251 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2252 return VTBits-Tmp+1; 2253 case ISD::AssertZext: 2254 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2255 return VTBits-Tmp; 2256 2257 case ISD::Constant: { 2258 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2259 return Val.getNumSignBits(); 2260 } 2261 2262 case ISD::SIGN_EXTEND: 2263 Tmp = 2264 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2265 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2266 2267 case ISD::SIGN_EXTEND_INREG: 2268 // Max of the input and what this extends. 2269 Tmp = 2270 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2271 Tmp = VTBits-Tmp+1; 2272 2273 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2274 return std::max(Tmp, Tmp2); 2275 2276 case ISD::SRA: 2277 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2278 // SRA X, C -> adds C sign bits. 2279 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2280 Tmp += C->getZExtValue(); 2281 if (Tmp > VTBits) Tmp = VTBits; 2282 } 2283 return Tmp; 2284 case ISD::SHL: 2285 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2286 // shl destroys sign bits. 2287 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2288 if (C->getZExtValue() >= VTBits || // Bad shift. 2289 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2290 return Tmp - C->getZExtValue(); 2291 } 2292 break; 2293 case ISD::AND: 2294 case ISD::OR: 2295 case ISD::XOR: // NOT is handled here. 2296 // Logical binary ops preserve the number of sign bits at the worst. 2297 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2298 if (Tmp != 1) { 2299 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2300 FirstAnswer = std::min(Tmp, Tmp2); 2301 // We computed what we know about the sign bits as our first 2302 // answer. Now proceed to the generic code that uses 2303 // ComputeMaskedBits, and pick whichever answer is better. 2304 } 2305 break; 2306 2307 case ISD::SELECT: 2308 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2309 if (Tmp == 1) return 1; // Early out. 2310 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2311 return std::min(Tmp, Tmp2); 2312 2313 case ISD::SADDO: 2314 case ISD::UADDO: 2315 case ISD::SSUBO: 2316 case ISD::USUBO: 2317 case ISD::SMULO: 2318 case ISD::UMULO: 2319 if (Op.getResNo() != 1) 2320 break; 2321 // The boolean result conforms to getBooleanContents. Fall through. 2322 case ISD::SETCC: 2323 // If setcc returns 0/-1, all bits are sign bits. 2324 if (TLI->getBooleanContents(Op.getValueType().isVector()) == 2325 TargetLowering::ZeroOrNegativeOneBooleanContent) 2326 return VTBits; 2327 break; 2328 case ISD::ROTL: 2329 case ISD::ROTR: 2330 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2331 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2332 2333 // Handle rotate right by N like a rotate left by 32-N. 2334 if (Op.getOpcode() == ISD::ROTR) 2335 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2336 2337 // If we aren't rotating out all of the known-in sign bits, return the 2338 // number that are left. This handles rotl(sext(x), 1) for example. 2339 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2340 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2341 } 2342 break; 2343 case ISD::ADD: 2344 // Add can have at most one carry bit. Thus we know that the output 2345 // is, at worst, one more bit than the inputs. 2346 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2347 if (Tmp == 1) return 1; // Early out. 2348 2349 // Special case decrementing a value (ADD X, -1): 2350 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2351 if (CRHS->isAllOnesValue()) { 2352 APInt KnownZero, KnownOne; 2353 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2354 2355 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2356 // sign bits set. 2357 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2358 return VTBits; 2359 2360 // If we are subtracting one from a positive number, there is no carry 2361 // out of the result. 2362 if (KnownZero.isNegative()) 2363 return Tmp; 2364 } 2365 2366 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2367 if (Tmp2 == 1) return 1; 2368 return std::min(Tmp, Tmp2)-1; 2369 2370 case ISD::SUB: 2371 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2372 if (Tmp2 == 1) return 1; 2373 2374 // Handle NEG. 2375 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2376 if (CLHS->isNullValue()) { 2377 APInt KnownZero, KnownOne; 2378 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2379 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2380 // sign bits set. 2381 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2382 return VTBits; 2383 2384 // If the input is known to be positive (the sign bit is known clear), 2385 // the output of the NEG has the same number of sign bits as the input. 2386 if (KnownZero.isNegative()) 2387 return Tmp2; 2388 2389 // Otherwise, we treat this like a SUB. 2390 } 2391 2392 // Sub can have at most one carry bit. Thus we know that the output 2393 // is, at worst, one more bit than the inputs. 2394 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2395 if (Tmp == 1) return 1; // Early out. 2396 return std::min(Tmp, Tmp2)-1; 2397 case ISD::TRUNCATE: 2398 // FIXME: it's tricky to do anything useful for this, but it is an important 2399 // case for targets like X86. 2400 break; 2401 } 2402 2403 // If we are looking at the loaded value of the SDNode. 2404 if (Op.getResNo() == 0) { 2405 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2406 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2407 unsigned ExtType = LD->getExtensionType(); 2408 switch (ExtType) { 2409 default: break; 2410 case ISD::SEXTLOAD: // '17' bits known 2411 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2412 return VTBits-Tmp+1; 2413 case ISD::ZEXTLOAD: // '16' bits known 2414 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2415 return VTBits-Tmp; 2416 } 2417 } 2418 } 2419 2420 // Allow the target to implement this method for its nodes. 2421 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2422 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2423 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2424 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2425 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, Depth); 2426 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2427 } 2428 2429 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2430 // use this information. 2431 APInt KnownZero, KnownOne; 2432 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2433 2434 APInt Mask; 2435 if (KnownZero.isNegative()) { // sign bit is 0 2436 Mask = KnownZero; 2437 } else if (KnownOne.isNegative()) { // sign bit is 1; 2438 Mask = KnownOne; 2439 } else { 2440 // Nothing known. 2441 return FirstAnswer; 2442 } 2443 2444 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2445 // the number of identical bits in the top of the input value. 2446 Mask = ~Mask; 2447 Mask <<= Mask.getBitWidth()-VTBits; 2448 // Return # leading zeros. We use 'min' here in case Val was zero before 2449 // shifting. We don't want to return '64' as for an i32 "0". 2450 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2451} 2452 2453/// isBaseWithConstantOffset - Return true if the specified operand is an 2454/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2455/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2456/// semantics as an ADD. This handles the equivalence: 2457/// X|Cst == X+Cst iff X&Cst = 0. 2458bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2459 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2460 !isa<ConstantSDNode>(Op.getOperand(1))) 2461 return false; 2462 2463 if (Op.getOpcode() == ISD::OR && 2464 !MaskedValueIsZero(Op.getOperand(0), 2465 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2466 return false; 2467 2468 return true; 2469} 2470 2471 2472bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2473 // If we're told that NaNs won't happen, assume they won't. 2474 if (getTarget().Options.NoNaNsFPMath) 2475 return true; 2476 2477 // If the value is a constant, we can obviously see if it is a NaN or not. 2478 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2479 return !C->getValueAPF().isNaN(); 2480 2481 // TODO: Recognize more cases here. 2482 2483 return false; 2484} 2485 2486bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2487 // If the value is a constant, we can obviously see if it is a zero or not. 2488 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2489 return !C->isZero(); 2490 2491 // TODO: Recognize more cases here. 2492 switch (Op.getOpcode()) { 2493 default: break; 2494 case ISD::OR: 2495 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2496 return !C->isNullValue(); 2497 break; 2498 } 2499 2500 return false; 2501} 2502 2503bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2504 // Check the obvious case. 2505 if (A == B) return true; 2506 2507 // For for negative and positive zero. 2508 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2509 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2510 if (CA->isZero() && CB->isZero()) return true; 2511 2512 // Otherwise they may not be equal. 2513 return false; 2514} 2515 2516/// getNode - Gets or creates the specified node. 2517/// 2518SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) { 2519 FoldingSetNodeID ID; 2520 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2521 void *IP = 0; 2522 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2523 return SDValue(E, 0); 2524 2525 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), 2526 DL.getDebugLoc(), getVTList(VT)); 2527 CSEMap.InsertNode(N, IP); 2528 2529 AllNodes.push_back(N); 2530#ifndef NDEBUG 2531 VerifySDNode(N); 2532#endif 2533 return SDValue(N, 0); 2534} 2535 2536SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 2537 EVT VT, SDValue Operand) { 2538 // Constant fold unary operations with an integer constant operand. Even 2539 // opaque constant will be folded, because the folding of unary operations 2540 // doesn't create new constants with different values. Nevertheless, the 2541 // opaque flag is preserved during folding to prevent future folding with 2542 // other constants. 2543 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2544 const APInt &Val = C->getAPIntValue(); 2545 switch (Opcode) { 2546 default: break; 2547 case ISD::SIGN_EXTEND: 2548 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT, 2549 C->isTargetOpcode(), C->isOpaque()); 2550 case ISD::ANY_EXTEND: 2551 case ISD::ZERO_EXTEND: 2552 case ISD::TRUNCATE: 2553 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT, 2554 C->isTargetOpcode(), C->isOpaque()); 2555 case ISD::UINT_TO_FP: 2556 case ISD::SINT_TO_FP: { 2557 APFloat apf(EVTToAPFloatSemantics(VT), 2558 APInt::getNullValue(VT.getSizeInBits())); 2559 (void)apf.convertFromAPInt(Val, 2560 Opcode==ISD::SINT_TO_FP, 2561 APFloat::rmNearestTiesToEven); 2562 return getConstantFP(apf, VT); 2563 } 2564 case ISD::BITCAST: 2565 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2566 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT); 2567 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2568 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT); 2569 break; 2570 case ISD::BSWAP: 2571 return getConstant(Val.byteSwap(), VT, C->isTargetOpcode(), 2572 C->isOpaque()); 2573 case ISD::CTPOP: 2574 return getConstant(Val.countPopulation(), VT, C->isTargetOpcode(), 2575 C->isOpaque()); 2576 case ISD::CTLZ: 2577 case ISD::CTLZ_ZERO_UNDEF: 2578 return getConstant(Val.countLeadingZeros(), VT, C->isTargetOpcode(), 2579 C->isOpaque()); 2580 case ISD::CTTZ: 2581 case ISD::CTTZ_ZERO_UNDEF: 2582 return getConstant(Val.countTrailingZeros(), VT, C->isTargetOpcode(), 2583 C->isOpaque()); 2584 } 2585 } 2586 2587 // Constant fold unary operations with a floating point constant operand. 2588 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2589 APFloat V = C->getValueAPF(); // make copy 2590 switch (Opcode) { 2591 case ISD::FNEG: 2592 V.changeSign(); 2593 return getConstantFP(V, VT); 2594 case ISD::FABS: 2595 V.clearSign(); 2596 return getConstantFP(V, VT); 2597 case ISD::FCEIL: { 2598 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2599 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2600 return getConstantFP(V, VT); 2601 break; 2602 } 2603 case ISD::FTRUNC: { 2604 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2605 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2606 return getConstantFP(V, VT); 2607 break; 2608 } 2609 case ISD::FFLOOR: { 2610 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2611 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2612 return getConstantFP(V, VT); 2613 break; 2614 } 2615 case ISD::FP_EXTEND: { 2616 bool ignored; 2617 // This can return overflow, underflow, or inexact; we don't care. 2618 // FIXME need to be more flexible about rounding mode. 2619 (void)V.convert(EVTToAPFloatSemantics(VT), 2620 APFloat::rmNearestTiesToEven, &ignored); 2621 return getConstantFP(V, VT); 2622 } 2623 case ISD::FP_TO_SINT: 2624 case ISD::FP_TO_UINT: { 2625 integerPart x[2]; 2626 bool ignored; 2627 assert(integerPartWidth >= 64); 2628 // FIXME need to be more flexible about rounding mode. 2629 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2630 Opcode==ISD::FP_TO_SINT, 2631 APFloat::rmTowardZero, &ignored); 2632 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2633 break; 2634 APInt api(VT.getSizeInBits(), x); 2635 return getConstant(api, VT); 2636 } 2637 case ISD::BITCAST: 2638 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2639 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2640 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2641 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2642 break; 2643 } 2644 } 2645 2646 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2647 switch (Opcode) { 2648 case ISD::TokenFactor: 2649 case ISD::MERGE_VALUES: 2650 case ISD::CONCAT_VECTORS: 2651 return Operand; // Factor, merge or concat of one node? No need. 2652 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2653 case ISD::FP_EXTEND: 2654 assert(VT.isFloatingPoint() && 2655 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2656 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2657 assert((!VT.isVector() || 2658 VT.getVectorNumElements() == 2659 Operand.getValueType().getVectorNumElements()) && 2660 "Vector element count mismatch!"); 2661 if (Operand.getOpcode() == ISD::UNDEF) 2662 return getUNDEF(VT); 2663 break; 2664 case ISD::SIGN_EXTEND: 2665 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2666 "Invalid SIGN_EXTEND!"); 2667 if (Operand.getValueType() == VT) return Operand; // noop extension 2668 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2669 "Invalid sext node, dst < src!"); 2670 assert((!VT.isVector() || 2671 VT.getVectorNumElements() == 2672 Operand.getValueType().getVectorNumElements()) && 2673 "Vector element count mismatch!"); 2674 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2675 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2676 else if (OpOpcode == ISD::UNDEF) 2677 // sext(undef) = 0, because the top bits will all be the same. 2678 return getConstant(0, VT); 2679 break; 2680 case ISD::ZERO_EXTEND: 2681 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2682 "Invalid ZERO_EXTEND!"); 2683 if (Operand.getValueType() == VT) return Operand; // noop extension 2684 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2685 "Invalid zext node, dst < src!"); 2686 assert((!VT.isVector() || 2687 VT.getVectorNumElements() == 2688 Operand.getValueType().getVectorNumElements()) && 2689 "Vector element count mismatch!"); 2690 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2691 return getNode(ISD::ZERO_EXTEND, DL, VT, 2692 Operand.getNode()->getOperand(0)); 2693 else if (OpOpcode == ISD::UNDEF) 2694 // zext(undef) = 0, because the top bits will be zero. 2695 return getConstant(0, VT); 2696 break; 2697 case ISD::ANY_EXTEND: 2698 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2699 "Invalid ANY_EXTEND!"); 2700 if (Operand.getValueType() == VT) return Operand; // noop extension 2701 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2702 "Invalid anyext node, dst < src!"); 2703 assert((!VT.isVector() || 2704 VT.getVectorNumElements() == 2705 Operand.getValueType().getVectorNumElements()) && 2706 "Vector element count mismatch!"); 2707 2708 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2709 OpOpcode == ISD::ANY_EXTEND) 2710 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2711 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2712 else if (OpOpcode == ISD::UNDEF) 2713 return getUNDEF(VT); 2714 2715 // (ext (trunx x)) -> x 2716 if (OpOpcode == ISD::TRUNCATE) { 2717 SDValue OpOp = Operand.getNode()->getOperand(0); 2718 if (OpOp.getValueType() == VT) 2719 return OpOp; 2720 } 2721 break; 2722 case ISD::TRUNCATE: 2723 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2724 "Invalid TRUNCATE!"); 2725 if (Operand.getValueType() == VT) return Operand; // noop truncate 2726 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2727 "Invalid truncate node, src < dst!"); 2728 assert((!VT.isVector() || 2729 VT.getVectorNumElements() == 2730 Operand.getValueType().getVectorNumElements()) && 2731 "Vector element count mismatch!"); 2732 if (OpOpcode == ISD::TRUNCATE) 2733 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2734 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2735 OpOpcode == ISD::ANY_EXTEND) { 2736 // If the source is smaller than the dest, we still need an extend. 2737 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2738 .bitsLT(VT.getScalarType())) 2739 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2740 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2741 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2742 return Operand.getNode()->getOperand(0); 2743 } 2744 if (OpOpcode == ISD::UNDEF) 2745 return getUNDEF(VT); 2746 break; 2747 case ISD::BITCAST: 2748 // Basic sanity checking. 2749 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2750 && "Cannot BITCAST between types of different sizes!"); 2751 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2752 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2753 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2754 if (OpOpcode == ISD::UNDEF) 2755 return getUNDEF(VT); 2756 break; 2757 case ISD::SCALAR_TO_VECTOR: 2758 assert(VT.isVector() && !Operand.getValueType().isVector() && 2759 (VT.getVectorElementType() == Operand.getValueType() || 2760 (VT.getVectorElementType().isInteger() && 2761 Operand.getValueType().isInteger() && 2762 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2763 "Illegal SCALAR_TO_VECTOR node!"); 2764 if (OpOpcode == ISD::UNDEF) 2765 return getUNDEF(VT); 2766 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2767 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2768 isa<ConstantSDNode>(Operand.getOperand(1)) && 2769 Operand.getConstantOperandVal(1) == 0 && 2770 Operand.getOperand(0).getValueType() == VT) 2771 return Operand.getOperand(0); 2772 break; 2773 case ISD::FNEG: 2774 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2775 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2776 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2777 Operand.getNode()->getOperand(0)); 2778 if (OpOpcode == ISD::FNEG) // --X -> X 2779 return Operand.getNode()->getOperand(0); 2780 break; 2781 case ISD::FABS: 2782 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2783 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2784 break; 2785 } 2786 2787 SDNode *N; 2788 SDVTList VTs = getVTList(VT); 2789 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2790 FoldingSetNodeID ID; 2791 SDValue Ops[1] = { Operand }; 2792 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2793 void *IP = 0; 2794 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2795 return SDValue(E, 0); 2796 2797 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 2798 DL.getDebugLoc(), VTs, Operand); 2799 CSEMap.InsertNode(N, IP); 2800 } else { 2801 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 2802 DL.getDebugLoc(), VTs, Operand); 2803 } 2804 2805 AllNodes.push_back(N); 2806#ifndef NDEBUG 2807 VerifySDNode(N); 2808#endif 2809 return SDValue(N, 0); 2810} 2811 2812SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT, 2813 SDNode *Cst1, SDNode *Cst2) { 2814 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs; 2815 SmallVector<SDValue, 4> Outputs; 2816 EVT SVT = VT.getScalarType(); 2817 2818 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1); 2819 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2); 2820 if (Scalar1 && Scalar2 && (Scalar1->isOpaque() || Scalar2->isOpaque())) 2821 return SDValue(); 2822 2823 if (Scalar1 && Scalar2) 2824 // Scalar instruction. 2825 Inputs.push_back(std::make_pair(Scalar1, Scalar2)); 2826 else { 2827 // For vectors extract each constant element into Inputs so we can constant 2828 // fold them individually. 2829 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1); 2830 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2); 2831 if (!BV1 || !BV2) 2832 return SDValue(); 2833 2834 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!"); 2835 2836 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) { 2837 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I)); 2838 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I)); 2839 if (!V1 || !V2) // Not a constant, bail. 2840 return SDValue(); 2841 2842 if (V1->isOpaque() || V2->isOpaque()) 2843 return SDValue(); 2844 2845 // Avoid BUILD_VECTOR nodes that perform implicit truncation. 2846 // FIXME: This is valid and could be handled by truncating the APInts. 2847 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT) 2848 return SDValue(); 2849 2850 Inputs.push_back(std::make_pair(V1, V2)); 2851 } 2852 } 2853 2854 // We have a number of constant values, constant fold them element by element. 2855 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) { 2856 const APInt &C1 = Inputs[I].first->getAPIntValue(); 2857 const APInt &C2 = Inputs[I].second->getAPIntValue(); 2858 2859 switch (Opcode) { 2860 case ISD::ADD: 2861 Outputs.push_back(getConstant(C1 + C2, SVT)); 2862 break; 2863 case ISD::SUB: 2864 Outputs.push_back(getConstant(C1 - C2, SVT)); 2865 break; 2866 case ISD::MUL: 2867 Outputs.push_back(getConstant(C1 * C2, SVT)); 2868 break; 2869 case ISD::UDIV: 2870 if (!C2.getBoolValue()) 2871 return SDValue(); 2872 Outputs.push_back(getConstant(C1.udiv(C2), SVT)); 2873 break; 2874 case ISD::UREM: 2875 if (!C2.getBoolValue()) 2876 return SDValue(); 2877 Outputs.push_back(getConstant(C1.urem(C2), SVT)); 2878 break; 2879 case ISD::SDIV: 2880 if (!C2.getBoolValue()) 2881 return SDValue(); 2882 Outputs.push_back(getConstant(C1.sdiv(C2), SVT)); 2883 break; 2884 case ISD::SREM: 2885 if (!C2.getBoolValue()) 2886 return SDValue(); 2887 Outputs.push_back(getConstant(C1.srem(C2), SVT)); 2888 break; 2889 case ISD::AND: 2890 Outputs.push_back(getConstant(C1 & C2, SVT)); 2891 break; 2892 case ISD::OR: 2893 Outputs.push_back(getConstant(C1 | C2, SVT)); 2894 break; 2895 case ISD::XOR: 2896 Outputs.push_back(getConstant(C1 ^ C2, SVT)); 2897 break; 2898 case ISD::SHL: 2899 Outputs.push_back(getConstant(C1 << C2, SVT)); 2900 break; 2901 case ISD::SRL: 2902 Outputs.push_back(getConstant(C1.lshr(C2), SVT)); 2903 break; 2904 case ISD::SRA: 2905 Outputs.push_back(getConstant(C1.ashr(C2), SVT)); 2906 break; 2907 case ISD::ROTL: 2908 Outputs.push_back(getConstant(C1.rotl(C2), SVT)); 2909 break; 2910 case ISD::ROTR: 2911 Outputs.push_back(getConstant(C1.rotr(C2), SVT)); 2912 break; 2913 default: 2914 return SDValue(); 2915 } 2916 } 2917 2918 // Handle the scalar case first. 2919 if (Scalar1 && Scalar2) 2920 return Outputs.back(); 2921 2922 // Otherwise build a big vector out of the scalar elements we generated. 2923 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs.data(), 2924 Outputs.size()); 2925} 2926 2927SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, 2928 SDValue N2) { 2929 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2930 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2931 switch (Opcode) { 2932 default: break; 2933 case ISD::TokenFactor: 2934 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2935 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2936 // Fold trivial token factors. 2937 if (N1.getOpcode() == ISD::EntryToken) return N2; 2938 if (N2.getOpcode() == ISD::EntryToken) return N1; 2939 if (N1 == N2) return N1; 2940 break; 2941 case ISD::CONCAT_VECTORS: 2942 // Concat of UNDEFs is UNDEF. 2943 if (N1.getOpcode() == ISD::UNDEF && 2944 N2.getOpcode() == ISD::UNDEF) 2945 return getUNDEF(VT); 2946 2947 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2948 // one big BUILD_VECTOR. 2949 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2950 N2.getOpcode() == ISD::BUILD_VECTOR) { 2951 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2952 N1.getNode()->op_end()); 2953 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2954 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2955 } 2956 break; 2957 case ISD::AND: 2958 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2959 assert(N1.getValueType() == N2.getValueType() && 2960 N1.getValueType() == VT && "Binary operator types must match!"); 2961 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2962 // worth handling here. 2963 if (N2C && N2C->isNullValue()) 2964 return N2; 2965 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2966 return N1; 2967 break; 2968 case ISD::OR: 2969 case ISD::XOR: 2970 case ISD::ADD: 2971 case ISD::SUB: 2972 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2973 assert(N1.getValueType() == N2.getValueType() && 2974 N1.getValueType() == VT && "Binary operator types must match!"); 2975 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2976 // it's worth handling here. 2977 if (N2C && N2C->isNullValue()) 2978 return N1; 2979 break; 2980 case ISD::UDIV: 2981 case ISD::UREM: 2982 case ISD::MULHU: 2983 case ISD::MULHS: 2984 case ISD::MUL: 2985 case ISD::SDIV: 2986 case ISD::SREM: 2987 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2988 assert(N1.getValueType() == N2.getValueType() && 2989 N1.getValueType() == VT && "Binary operator types must match!"); 2990 break; 2991 case ISD::FADD: 2992 case ISD::FSUB: 2993 case ISD::FMUL: 2994 case ISD::FDIV: 2995 case ISD::FREM: 2996 if (getTarget().Options.UnsafeFPMath) { 2997 if (Opcode == ISD::FADD) { 2998 // 0+x --> x 2999 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 3000 if (CFP->getValueAPF().isZero()) 3001 return N2; 3002 // x+0 --> x 3003 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 3004 if (CFP->getValueAPF().isZero()) 3005 return N1; 3006 } else if (Opcode == ISD::FSUB) { 3007 // x-0 --> x 3008 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 3009 if (CFP->getValueAPF().isZero()) 3010 return N1; 3011 } else if (Opcode == ISD::FMUL) { 3012 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1); 3013 SDValue V = N2; 3014 3015 // If the first operand isn't the constant, try the second 3016 if (!CFP) { 3017 CFP = dyn_cast<ConstantFPSDNode>(N2); 3018 V = N1; 3019 } 3020 3021 if (CFP) { 3022 // 0*x --> 0 3023 if (CFP->isZero()) 3024 return SDValue(CFP,0); 3025 // 1*x --> x 3026 if (CFP->isExactlyValue(1.0)) 3027 return V; 3028 } 3029 } 3030 } 3031 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 3032 assert(N1.getValueType() == N2.getValueType() && 3033 N1.getValueType() == VT && "Binary operator types must match!"); 3034 break; 3035 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 3036 assert(N1.getValueType() == VT && 3037 N1.getValueType().isFloatingPoint() && 3038 N2.getValueType().isFloatingPoint() && 3039 "Invalid FCOPYSIGN!"); 3040 break; 3041 case ISD::SHL: 3042 case ISD::SRA: 3043 case ISD::SRL: 3044 case ISD::ROTL: 3045 case ISD::ROTR: 3046 assert(VT == N1.getValueType() && 3047 "Shift operators return type must be the same as their first arg"); 3048 assert(VT.isInteger() && N2.getValueType().isInteger() && 3049 "Shifts only work on integers"); 3050 assert((!VT.isVector() || VT == N2.getValueType()) && 3051 "Vector shift amounts must be in the same as their first arg"); 3052 // Verify that the shift amount VT is bit enough to hold valid shift 3053 // amounts. This catches things like trying to shift an i1024 value by an 3054 // i8, which is easy to fall into in generic code that uses 3055 // TLI.getShiftAmount(). 3056 assert(N2.getValueType().getSizeInBits() >= 3057 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 3058 "Invalid use of small shift amount with oversized value!"); 3059 3060 // Always fold shifts of i1 values so the code generator doesn't need to 3061 // handle them. Since we know the size of the shift has to be less than the 3062 // size of the value, the shift/rotate count is guaranteed to be zero. 3063 if (VT == MVT::i1) 3064 return N1; 3065 if (N2C && N2C->isNullValue()) 3066 return N1; 3067 break; 3068 case ISD::FP_ROUND_INREG: { 3069 EVT EVT = cast<VTSDNode>(N2)->getVT(); 3070 assert(VT == N1.getValueType() && "Not an inreg round!"); 3071 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 3072 "Cannot FP_ROUND_INREG integer types"); 3073 assert(EVT.isVector() == VT.isVector() && 3074 "FP_ROUND_INREG type should be vector iff the operand " 3075 "type is vector!"); 3076 assert((!EVT.isVector() || 3077 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 3078 "Vector element counts must match in FP_ROUND_INREG"); 3079 assert(EVT.bitsLE(VT) && "Not rounding down!"); 3080 (void)EVT; 3081 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 3082 break; 3083 } 3084 case ISD::FP_ROUND: 3085 assert(VT.isFloatingPoint() && 3086 N1.getValueType().isFloatingPoint() && 3087 VT.bitsLE(N1.getValueType()) && 3088 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 3089 if (N1.getValueType() == VT) return N1; // noop conversion. 3090 break; 3091 case ISD::AssertSext: 3092 case ISD::AssertZext: { 3093 EVT EVT = cast<VTSDNode>(N2)->getVT(); 3094 assert(VT == N1.getValueType() && "Not an inreg extend!"); 3095 assert(VT.isInteger() && EVT.isInteger() && 3096 "Cannot *_EXTEND_INREG FP types"); 3097 assert(!EVT.isVector() && 3098 "AssertSExt/AssertZExt type should be the vector element type " 3099 "rather than the vector type!"); 3100 assert(EVT.bitsLE(VT) && "Not extending!"); 3101 if (VT == EVT) return N1; // noop assertion. 3102 break; 3103 } 3104 case ISD::SIGN_EXTEND_INREG: { 3105 EVT EVT = cast<VTSDNode>(N2)->getVT(); 3106 assert(VT == N1.getValueType() && "Not an inreg extend!"); 3107 assert(VT.isInteger() && EVT.isInteger() && 3108 "Cannot *_EXTEND_INREG FP types"); 3109 assert(EVT.isVector() == VT.isVector() && 3110 "SIGN_EXTEND_INREG type should be vector iff the operand " 3111 "type is vector!"); 3112 assert((!EVT.isVector() || 3113 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 3114 "Vector element counts must match in SIGN_EXTEND_INREG"); 3115 assert(EVT.bitsLE(VT) && "Not extending!"); 3116 if (EVT == VT) return N1; // Not actually extending 3117 3118 if (N1C) { 3119 APInt Val = N1C->getAPIntValue(); 3120 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 3121 Val <<= Val.getBitWidth()-FromBits; 3122 Val = Val.ashr(Val.getBitWidth()-FromBits); 3123 return getConstant(Val, VT); 3124 } 3125 break; 3126 } 3127 case ISD::EXTRACT_VECTOR_ELT: 3128 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 3129 if (N1.getOpcode() == ISD::UNDEF) 3130 return getUNDEF(VT); 3131 3132 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 3133 // expanding copies of large vectors from registers. 3134 if (N2C && 3135 N1.getOpcode() == ISD::CONCAT_VECTORS && 3136 N1.getNumOperands() > 0) { 3137 unsigned Factor = 3138 N1.getOperand(0).getValueType().getVectorNumElements(); 3139 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 3140 N1.getOperand(N2C->getZExtValue() / Factor), 3141 getConstant(N2C->getZExtValue() % Factor, 3142 N2.getValueType())); 3143 } 3144 3145 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 3146 // expanding large vector constants. 3147 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 3148 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 3149 3150 if (VT != Elt.getValueType()) 3151 // If the vector element type is not legal, the BUILD_VECTOR operands 3152 // are promoted and implicitly truncated, and the result implicitly 3153 // extended. Make that explicit here. 3154 Elt = getAnyExtOrTrunc(Elt, DL, VT); 3155 3156 return Elt; 3157 } 3158 3159 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 3160 // operations are lowered to scalars. 3161 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 3162 // If the indices are the same, return the inserted element else 3163 // if the indices are known different, extract the element from 3164 // the original vector. 3165 SDValue N1Op2 = N1.getOperand(2); 3166 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 3167 3168 if (N1Op2C && N2C) { 3169 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 3170 if (VT == N1.getOperand(1).getValueType()) 3171 return N1.getOperand(1); 3172 else 3173 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 3174 } 3175 3176 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 3177 } 3178 } 3179 break; 3180 case ISD::EXTRACT_ELEMENT: 3181 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 3182 assert(!N1.getValueType().isVector() && !VT.isVector() && 3183 (N1.getValueType().isInteger() == VT.isInteger()) && 3184 N1.getValueType() != VT && 3185 "Wrong types for EXTRACT_ELEMENT!"); 3186 3187 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 3188 // 64-bit integers into 32-bit parts. Instead of building the extract of 3189 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 3190 if (N1.getOpcode() == ISD::BUILD_PAIR) 3191 return N1.getOperand(N2C->getZExtValue()); 3192 3193 // EXTRACT_ELEMENT of a constant int is also very common. 3194 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 3195 unsigned ElementSize = VT.getSizeInBits(); 3196 unsigned Shift = ElementSize * N2C->getZExtValue(); 3197 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 3198 return getConstant(ShiftedVal.trunc(ElementSize), VT); 3199 } 3200 break; 3201 case ISD::EXTRACT_SUBVECTOR: { 3202 SDValue Index = N2; 3203 if (VT.isSimple() && N1.getValueType().isSimple()) { 3204 assert(VT.isVector() && N1.getValueType().isVector() && 3205 "Extract subvector VTs must be a vectors!"); 3206 assert(VT.getVectorElementType() == 3207 N1.getValueType().getVectorElementType() && 3208 "Extract subvector VTs must have the same element type!"); 3209 assert(VT.getSimpleVT() <= N1.getSimpleValueType() && 3210 "Extract subvector must be from larger vector to smaller vector!"); 3211 3212 if (isa<ConstantSDNode>(Index.getNode())) { 3213 assert((VT.getVectorNumElements() + 3214 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3215 <= N1.getValueType().getVectorNumElements()) 3216 && "Extract subvector overflow!"); 3217 } 3218 3219 // Trivial extraction. 3220 if (VT.getSimpleVT() == N1.getSimpleValueType()) 3221 return N1; 3222 } 3223 break; 3224 } 3225 } 3226 3227 // Perform trivial constant folding. 3228 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()); 3229 if (SV.getNode()) return SV; 3230 3231 // Canonicalize constant to RHS if commutative. 3232 if (N1C && !N2C && isCommutativeBinOp(Opcode)) { 3233 std::swap(N1C, N2C); 3234 std::swap(N1, N2); 3235 } 3236 3237 // Constant fold FP operations. 3238 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3239 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3240 if (N1CFP) { 3241 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3242 // Canonicalize constant to RHS if commutative. 3243 std::swap(N1CFP, N2CFP); 3244 std::swap(N1, N2); 3245 } else if (N2CFP) { 3246 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3247 APFloat::opStatus s; 3248 switch (Opcode) { 3249 case ISD::FADD: 3250 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3251 if (s != APFloat::opInvalidOp) 3252 return getConstantFP(V1, VT); 3253 break; 3254 case ISD::FSUB: 3255 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3256 if (s!=APFloat::opInvalidOp) 3257 return getConstantFP(V1, VT); 3258 break; 3259 case ISD::FMUL: 3260 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3261 if (s!=APFloat::opInvalidOp) 3262 return getConstantFP(V1, VT); 3263 break; 3264 case ISD::FDIV: 3265 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3266 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3267 return getConstantFP(V1, VT); 3268 break; 3269 case ISD::FREM : 3270 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3271 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3272 return getConstantFP(V1, VT); 3273 break; 3274 case ISD::FCOPYSIGN: 3275 V1.copySign(V2); 3276 return getConstantFP(V1, VT); 3277 default: break; 3278 } 3279 } 3280 3281 if (Opcode == ISD::FP_ROUND) { 3282 APFloat V = N1CFP->getValueAPF(); // make copy 3283 bool ignored; 3284 // This can return overflow, underflow, or inexact; we don't care. 3285 // FIXME need to be more flexible about rounding mode. 3286 (void)V.convert(EVTToAPFloatSemantics(VT), 3287 APFloat::rmNearestTiesToEven, &ignored); 3288 return getConstantFP(V, VT); 3289 } 3290 } 3291 3292 // Canonicalize an UNDEF to the RHS, even over a constant. 3293 if (N1.getOpcode() == ISD::UNDEF) { 3294 if (isCommutativeBinOp(Opcode)) { 3295 std::swap(N1, N2); 3296 } else { 3297 switch (Opcode) { 3298 case ISD::FP_ROUND_INREG: 3299 case ISD::SIGN_EXTEND_INREG: 3300 case ISD::SUB: 3301 case ISD::FSUB: 3302 case ISD::FDIV: 3303 case ISD::FREM: 3304 case ISD::SRA: 3305 return N1; // fold op(undef, arg2) -> undef 3306 case ISD::UDIV: 3307 case ISD::SDIV: 3308 case ISD::UREM: 3309 case ISD::SREM: 3310 case ISD::SRL: 3311 case ISD::SHL: 3312 if (!VT.isVector()) 3313 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3314 // For vectors, we can't easily build an all zero vector, just return 3315 // the LHS. 3316 return N2; 3317 } 3318 } 3319 } 3320 3321 // Fold a bunch of operators when the RHS is undef. 3322 if (N2.getOpcode() == ISD::UNDEF) { 3323 switch (Opcode) { 3324 case ISD::XOR: 3325 if (N1.getOpcode() == ISD::UNDEF) 3326 // Handle undef ^ undef -> 0 special case. This is a common 3327 // idiom (misuse). 3328 return getConstant(0, VT); 3329 // fallthrough 3330 case ISD::ADD: 3331 case ISD::ADDC: 3332 case ISD::ADDE: 3333 case ISD::SUB: 3334 case ISD::UDIV: 3335 case ISD::SDIV: 3336 case ISD::UREM: 3337 case ISD::SREM: 3338 return N2; // fold op(arg1, undef) -> undef 3339 case ISD::FADD: 3340 case ISD::FSUB: 3341 case ISD::FMUL: 3342 case ISD::FDIV: 3343 case ISD::FREM: 3344 if (getTarget().Options.UnsafeFPMath) 3345 return N2; 3346 break; 3347 case ISD::MUL: 3348 case ISD::AND: 3349 case ISD::SRL: 3350 case ISD::SHL: 3351 if (!VT.isVector()) 3352 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3353 // For vectors, we can't easily build an all zero vector, just return 3354 // the LHS. 3355 return N1; 3356 case ISD::OR: 3357 if (!VT.isVector()) 3358 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3359 // For vectors, we can't easily build an all one vector, just return 3360 // the LHS. 3361 return N1; 3362 case ISD::SRA: 3363 return N1; 3364 } 3365 } 3366 3367 // Memoize this node if possible. 3368 SDNode *N; 3369 SDVTList VTs = getVTList(VT); 3370 if (VT != MVT::Glue) { 3371 SDValue Ops[] = { N1, N2 }; 3372 FoldingSetNodeID ID; 3373 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3374 void *IP = 0; 3375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3376 return SDValue(E, 0); 3377 3378 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 3379 DL.getDebugLoc(), VTs, N1, N2); 3380 CSEMap.InsertNode(N, IP); 3381 } else { 3382 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 3383 DL.getDebugLoc(), VTs, N1, N2); 3384 } 3385 3386 AllNodes.push_back(N); 3387#ifndef NDEBUG 3388 VerifySDNode(N); 3389#endif 3390 return SDValue(N, 0); 3391} 3392 3393SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3394 SDValue N1, SDValue N2, SDValue N3) { 3395 // Perform various simplifications. 3396 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3397 switch (Opcode) { 3398 case ISD::FMA: { 3399 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1); 3400 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2); 3401 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3); 3402 if (N1CFP && N2CFP && N3CFP) { 3403 APFloat V1 = N1CFP->getValueAPF(); 3404 const APFloat &V2 = N2CFP->getValueAPF(); 3405 const APFloat &V3 = N3CFP->getValueAPF(); 3406 APFloat::opStatus s = 3407 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven); 3408 if (s != APFloat::opInvalidOp) 3409 return getConstantFP(V1, VT); 3410 } 3411 break; 3412 } 3413 case ISD::CONCAT_VECTORS: 3414 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3415 // one big BUILD_VECTOR. 3416 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3417 N2.getOpcode() == ISD::BUILD_VECTOR && 3418 N3.getOpcode() == ISD::BUILD_VECTOR) { 3419 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3420 N1.getNode()->op_end()); 3421 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3422 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3423 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3424 } 3425 break; 3426 case ISD::SETCC: { 3427 // Use FoldSetCC to simplify SETCC's. 3428 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3429 if (Simp.getNode()) return Simp; 3430 break; 3431 } 3432 case ISD::SELECT: 3433 if (N1C) { 3434 if (N1C->getZExtValue()) 3435 return N2; // select true, X, Y -> X 3436 return N3; // select false, X, Y -> Y 3437 } 3438 3439 if (N2 == N3) return N2; // select C, X, X -> X 3440 break; 3441 case ISD::VECTOR_SHUFFLE: 3442 llvm_unreachable("should use getVectorShuffle constructor!"); 3443 case ISD::INSERT_SUBVECTOR: { 3444 SDValue Index = N3; 3445 if (VT.isSimple() && N1.getValueType().isSimple() 3446 && N2.getValueType().isSimple()) { 3447 assert(VT.isVector() && N1.getValueType().isVector() && 3448 N2.getValueType().isVector() && 3449 "Insert subvector VTs must be a vectors"); 3450 assert(VT == N1.getValueType() && 3451 "Dest and insert subvector source types must match!"); 3452 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() && 3453 "Insert subvector must be from smaller vector to larger vector!"); 3454 if (isa<ConstantSDNode>(Index.getNode())) { 3455 assert((N2.getValueType().getVectorNumElements() + 3456 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3457 <= VT.getVectorNumElements()) 3458 && "Insert subvector overflow!"); 3459 } 3460 3461 // Trivial insertion. 3462 if (VT.getSimpleVT() == N2.getSimpleValueType()) 3463 return N2; 3464 } 3465 break; 3466 } 3467 case ISD::BITCAST: 3468 // Fold bit_convert nodes from a type to themselves. 3469 if (N1.getValueType() == VT) 3470 return N1; 3471 break; 3472 } 3473 3474 // Memoize node if it doesn't produce a flag. 3475 SDNode *N; 3476 SDVTList VTs = getVTList(VT); 3477 if (VT != MVT::Glue) { 3478 SDValue Ops[] = { N1, N2, N3 }; 3479 FoldingSetNodeID ID; 3480 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3481 void *IP = 0; 3482 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3483 return SDValue(E, 0); 3484 3485 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 3486 DL.getDebugLoc(), VTs, N1, N2, N3); 3487 CSEMap.InsertNode(N, IP); 3488 } else { 3489 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 3490 DL.getDebugLoc(), VTs, N1, N2, N3); 3491 } 3492 3493 AllNodes.push_back(N); 3494#ifndef NDEBUG 3495 VerifySDNode(N); 3496#endif 3497 return SDValue(N, 0); 3498} 3499 3500SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3501 SDValue N1, SDValue N2, SDValue N3, 3502 SDValue N4) { 3503 SDValue Ops[] = { N1, N2, N3, N4 }; 3504 return getNode(Opcode, DL, VT, Ops, 4); 3505} 3506 3507SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3508 SDValue N1, SDValue N2, SDValue N3, 3509 SDValue N4, SDValue N5) { 3510 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3511 return getNode(Opcode, DL, VT, Ops, 5); 3512} 3513 3514/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3515/// the incoming stack arguments to be loaded from the stack. 3516SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3517 SmallVector<SDValue, 8> ArgChains; 3518 3519 // Include the original chain at the beginning of the list. When this is 3520 // used by target LowerCall hooks, this helps legalize find the 3521 // CALLSEQ_BEGIN node. 3522 ArgChains.push_back(Chain); 3523 3524 // Add a chain value for each stack argument. 3525 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3526 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3527 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3528 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3529 if (FI->getIndex() < 0) 3530 ArgChains.push_back(SDValue(L, 1)); 3531 3532 // Build a tokenfactor for all the chains. 3533 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, 3534 &ArgChains[0], ArgChains.size()); 3535} 3536 3537/// getMemsetValue - Vectorized representation of the memset value 3538/// operand. 3539static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3540 SDLoc dl) { 3541 assert(Value.getOpcode() != ISD::UNDEF); 3542 3543 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3544 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3545 assert(C->getAPIntValue().getBitWidth() == 8); 3546 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue()); 3547 if (VT.isInteger()) 3548 return DAG.getConstant(Val, VT); 3549 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT); 3550 } 3551 3552 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3553 if (NumBits > 8) { 3554 // Use a multiplication with 0x010101... to extend the input to the 3555 // required length. 3556 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01)); 3557 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3558 } 3559 3560 return Value; 3561} 3562 3563/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3564/// used when a memcpy is turned into a memset when the source is a constant 3565/// string ptr. 3566static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG, 3567 const TargetLowering &TLI, StringRef Str) { 3568 // Handle vector with all elements zero. 3569 if (Str.empty()) { 3570 if (VT.isInteger()) 3571 return DAG.getConstant(0, VT); 3572 else if (VT == MVT::f32 || VT == MVT::f64) 3573 return DAG.getConstantFP(0.0, VT); 3574 else if (VT.isVector()) { 3575 unsigned NumElts = VT.getVectorNumElements(); 3576 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3577 return DAG.getNode(ISD::BITCAST, dl, VT, 3578 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3579 EltVT, NumElts))); 3580 } else 3581 llvm_unreachable("Expected type!"); 3582 } 3583 3584 assert(!VT.isVector() && "Can't handle vector type here!"); 3585 unsigned NumVTBits = VT.getSizeInBits(); 3586 unsigned NumVTBytes = NumVTBits / 8; 3587 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3588 3589 APInt Val(NumVTBits, 0); 3590 if (TLI.isLittleEndian()) { 3591 for (unsigned i = 0; i != NumBytes; ++i) 3592 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3593 } else { 3594 for (unsigned i = 0; i != NumBytes; ++i) 3595 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3596 } 3597 3598 // If the "cost" of materializing the integer immediate is less than the cost 3599 // of a load, then it is cost effective to turn the load into the immediate. 3600 Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3601 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty)) 3602 return DAG.getConstant(Val, VT); 3603 return SDValue(0, 0); 3604} 3605 3606/// getMemBasePlusOffset - Returns base and offset node for the 3607/// 3608static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl, 3609 SelectionDAG &DAG) { 3610 EVT VT = Base.getValueType(); 3611 return DAG.getNode(ISD::ADD, dl, 3612 VT, Base, DAG.getConstant(Offset, VT)); 3613} 3614 3615/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3616/// 3617static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3618 unsigned SrcDelta = 0; 3619 GlobalAddressSDNode *G = NULL; 3620 if (Src.getOpcode() == ISD::GlobalAddress) 3621 G = cast<GlobalAddressSDNode>(Src); 3622 else if (Src.getOpcode() == ISD::ADD && 3623 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3624 Src.getOperand(1).getOpcode() == ISD::Constant) { 3625 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3626 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3627 } 3628 if (!G) 3629 return false; 3630 3631 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3632} 3633 3634/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3635/// to replace the memset / memcpy. Return true if the number of memory ops 3636/// is below the threshold. It returns the types of the sequence of 3637/// memory ops to perform memset / memcpy by reference. 3638static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3639 unsigned Limit, uint64_t Size, 3640 unsigned DstAlign, unsigned SrcAlign, 3641 bool IsMemset, 3642 bool ZeroMemset, 3643 bool MemcpyStrSrc, 3644 bool AllowOverlap, 3645 SelectionDAG &DAG, 3646 const TargetLowering &TLI) { 3647 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3648 "Expecting memcpy / memset source to meet alignment requirement!"); 3649 // If 'SrcAlign' is zero, that means the memory operation does not need to 3650 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3651 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3652 // is the specified alignment of the memory operation. If it is zero, that 3653 // means it's possible to change the alignment of the destination. 3654 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3655 // not need to be loaded. 3656 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3657 IsMemset, ZeroMemset, MemcpyStrSrc, 3658 DAG.getMachineFunction()); 3659 3660 if (VT == MVT::Other) { 3661 unsigned AS = 0; 3662 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) || 3663 TLI.allowsUnalignedMemoryAccesses(VT, AS)) { 3664 VT = TLI.getPointerTy(); 3665 } else { 3666 switch (DstAlign & 7) { 3667 case 0: VT = MVT::i64; break; 3668 case 4: VT = MVT::i32; break; 3669 case 2: VT = MVT::i16; break; 3670 default: VT = MVT::i8; break; 3671 } 3672 } 3673 3674 MVT LVT = MVT::i64; 3675 while (!TLI.isTypeLegal(LVT)) 3676 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3677 assert(LVT.isInteger()); 3678 3679 if (VT.bitsGT(LVT)) 3680 VT = LVT; 3681 } 3682 3683 unsigned NumMemOps = 0; 3684 while (Size != 0) { 3685 unsigned VTSize = VT.getSizeInBits() / 8; 3686 while (VTSize > Size) { 3687 // For now, only use non-vector load / store's for the left-over pieces. 3688 EVT NewVT = VT; 3689 unsigned NewVTSize; 3690 3691 bool Found = false; 3692 if (VT.isVector() || VT.isFloatingPoint()) { 3693 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; 3694 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) && 3695 TLI.isSafeMemOpType(NewVT.getSimpleVT())) 3696 Found = true; 3697 else if (NewVT == MVT::i64 && 3698 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) && 3699 TLI.isSafeMemOpType(MVT::f64)) { 3700 // i64 is usually not legal on 32-bit targets, but f64 may be. 3701 NewVT = MVT::f64; 3702 Found = true; 3703 } 3704 } 3705 3706 if (!Found) { 3707 do { 3708 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); 3709 if (NewVT == MVT::i8) 3710 break; 3711 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT())); 3712 } 3713 NewVTSize = NewVT.getSizeInBits() / 8; 3714 3715 // If the new VT cannot cover all of the remaining bits, then consider 3716 // issuing a (or a pair of) unaligned and overlapping load / store. 3717 // FIXME: Only does this for 64-bit or more since we don't have proper 3718 // cost model for unaligned load / store. 3719 bool Fast; 3720 unsigned AS = 0; 3721 if (NumMemOps && AllowOverlap && 3722 VTSize >= 8 && NewVTSize < Size && 3723 TLI.allowsUnalignedMemoryAccesses(VT, AS, &Fast) && Fast) 3724 VTSize = Size; 3725 else { 3726 VT = NewVT; 3727 VTSize = NewVTSize; 3728 } 3729 } 3730 3731 if (++NumMemOps > Limit) 3732 return false; 3733 3734 MemOps.push_back(VT); 3735 Size -= VTSize; 3736 } 3737 3738 return true; 3739} 3740 3741static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl, 3742 SDValue Chain, SDValue Dst, 3743 SDValue Src, uint64_t Size, 3744 unsigned Align, bool isVol, 3745 bool AlwaysInline, 3746 MachinePointerInfo DstPtrInfo, 3747 MachinePointerInfo SrcPtrInfo) { 3748 // Turn a memcpy of undef to nop. 3749 if (Src.getOpcode() == ISD::UNDEF) 3750 return Chain; 3751 3752 // Expand memcpy to a series of load and store ops if the size operand falls 3753 // below a certain threshold. 3754 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3755 // rather than maybe a humongous number of loads and stores. 3756 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3757 std::vector<EVT> MemOps; 3758 bool DstAlignCanChange = false; 3759 MachineFunction &MF = DAG.getMachineFunction(); 3760 MachineFrameInfo *MFI = MF.getFrameInfo(); 3761 bool OptSize = 3762 MF.getFunction()->getAttributes(). 3763 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3764 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3765 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3766 DstAlignCanChange = true; 3767 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3768 if (Align > SrcAlign) 3769 SrcAlign = Align; 3770 StringRef Str; 3771 bool CopyFromStr = isMemSrcFromString(Src, Str); 3772 bool isZeroStr = CopyFromStr && Str.empty(); 3773 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3774 3775 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3776 (DstAlignCanChange ? 0 : Align), 3777 (isZeroStr ? 0 : SrcAlign), 3778 false, false, CopyFromStr, true, DAG, TLI)) 3779 return SDValue(); 3780 3781 if (DstAlignCanChange) { 3782 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3783 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3784 3785 // Don't promote to an alignment that would require dynamic stack 3786 // realignment. 3787 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 3788 if (!TRI->needsStackRealignment(MF)) 3789 while (NewAlign > Align && 3790 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign)) 3791 NewAlign /= 2; 3792 3793 if (NewAlign > Align) { 3794 // Give the stack frame object a larger alignment if needed. 3795 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3796 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3797 Align = NewAlign; 3798 } 3799 } 3800 3801 SmallVector<SDValue, 8> OutChains; 3802 unsigned NumMemOps = MemOps.size(); 3803 uint64_t SrcOff = 0, DstOff = 0; 3804 for (unsigned i = 0; i != NumMemOps; ++i) { 3805 EVT VT = MemOps[i]; 3806 unsigned VTSize = VT.getSizeInBits() / 8; 3807 SDValue Value, Store; 3808 3809 if (VTSize > Size) { 3810 // Issuing an unaligned load / store pair that overlaps with the previous 3811 // pair. Adjust the offset accordingly. 3812 assert(i == NumMemOps-1 && i != 0); 3813 SrcOff -= VTSize - Size; 3814 DstOff -= VTSize - Size; 3815 } 3816 3817 if (CopyFromStr && 3818 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3819 // It's unlikely a store of a vector immediate can be done in a single 3820 // instruction. It would require a load from a constantpool first. 3821 // We only handle zero vectors here. 3822 // FIXME: Handle other cases where store of vector immediate is done in 3823 // a single instruction. 3824 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3825 if (Value.getNode()) 3826 Store = DAG.getStore(Chain, dl, Value, 3827 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3828 DstPtrInfo.getWithOffset(DstOff), isVol, 3829 false, Align); 3830 } 3831 3832 if (!Store.getNode()) { 3833 // The type might not be legal for the target. This should only happen 3834 // if the type is smaller than a legal type, as on PPC, so the right 3835 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3836 // to Load/Store if NVT==VT. 3837 // FIXME does the case above also need this? 3838 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3839 assert(NVT.bitsGE(VT)); 3840 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3841 getMemBasePlusOffset(Src, SrcOff, dl, DAG), 3842 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3843 MinAlign(SrcAlign, SrcOff)); 3844 Store = DAG.getTruncStore(Chain, dl, Value, 3845 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3846 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3847 false, Align); 3848 } 3849 OutChains.push_back(Store); 3850 SrcOff += VTSize; 3851 DstOff += VTSize; 3852 Size -= VTSize; 3853 } 3854 3855 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3856 &OutChains[0], OutChains.size()); 3857} 3858 3859static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl, 3860 SDValue Chain, SDValue Dst, 3861 SDValue Src, uint64_t Size, 3862 unsigned Align, bool isVol, 3863 bool AlwaysInline, 3864 MachinePointerInfo DstPtrInfo, 3865 MachinePointerInfo SrcPtrInfo) { 3866 // Turn a memmove of undef to nop. 3867 if (Src.getOpcode() == ISD::UNDEF) 3868 return Chain; 3869 3870 // Expand memmove to a series of load and store ops if the size operand falls 3871 // below a certain threshold. 3872 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3873 std::vector<EVT> MemOps; 3874 bool DstAlignCanChange = false; 3875 MachineFunction &MF = DAG.getMachineFunction(); 3876 MachineFrameInfo *MFI = MF.getFrameInfo(); 3877 bool OptSize = MF.getFunction()->getAttributes(). 3878 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3879 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3880 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3881 DstAlignCanChange = true; 3882 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3883 if (Align > SrcAlign) 3884 SrcAlign = Align; 3885 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3886 3887 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3888 (DstAlignCanChange ? 0 : Align), SrcAlign, 3889 false, false, false, false, DAG, TLI)) 3890 return SDValue(); 3891 3892 if (DstAlignCanChange) { 3893 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3894 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3895 if (NewAlign > Align) { 3896 // Give the stack frame object a larger alignment if needed. 3897 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3898 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3899 Align = NewAlign; 3900 } 3901 } 3902 3903 uint64_t SrcOff = 0, DstOff = 0; 3904 SmallVector<SDValue, 8> LoadValues; 3905 SmallVector<SDValue, 8> LoadChains; 3906 SmallVector<SDValue, 8> OutChains; 3907 unsigned NumMemOps = MemOps.size(); 3908 for (unsigned i = 0; i < NumMemOps; i++) { 3909 EVT VT = MemOps[i]; 3910 unsigned VTSize = VT.getSizeInBits() / 8; 3911 SDValue Value; 3912 3913 Value = DAG.getLoad(VT, dl, Chain, 3914 getMemBasePlusOffset(Src, SrcOff, dl, DAG), 3915 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3916 false, false, SrcAlign); 3917 LoadValues.push_back(Value); 3918 LoadChains.push_back(Value.getValue(1)); 3919 SrcOff += VTSize; 3920 } 3921 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3922 &LoadChains[0], LoadChains.size()); 3923 OutChains.clear(); 3924 for (unsigned i = 0; i < NumMemOps; i++) { 3925 EVT VT = MemOps[i]; 3926 unsigned VTSize = VT.getSizeInBits() / 8; 3927 SDValue Store; 3928 3929 Store = DAG.getStore(Chain, dl, LoadValues[i], 3930 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3931 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3932 OutChains.push_back(Store); 3933 DstOff += VTSize; 3934 } 3935 3936 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3937 &OutChains[0], OutChains.size()); 3938} 3939 3940/// \brief Lower the call to 'memset' intrinsic function into a series of store 3941/// operations. 3942/// 3943/// \param DAG Selection DAG where lowered code is placed. 3944/// \param dl Link to corresponding IR location. 3945/// \param Chain Control flow dependency. 3946/// \param Dst Pointer to destination memory location. 3947/// \param Src Value of byte to write into the memory. 3948/// \param Size Number of bytes to write. 3949/// \param Align Alignment of the destination in bytes. 3950/// \param isVol True if destination is volatile. 3951/// \param DstPtrInfo IR information on the memory pointer. 3952/// \returns New head in the control flow, if lowering was successful, empty 3953/// SDValue otherwise. 3954/// 3955/// The function tries to replace 'llvm.memset' intrinsic with several store 3956/// operations and value calculation code. This is usually profitable for small 3957/// memory size. 3958static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl, 3959 SDValue Chain, SDValue Dst, 3960 SDValue Src, uint64_t Size, 3961 unsigned Align, bool isVol, 3962 MachinePointerInfo DstPtrInfo) { 3963 // Turn a memset of undef to nop. 3964 if (Src.getOpcode() == ISD::UNDEF) 3965 return Chain; 3966 3967 // Expand memset to a series of load/store ops if the size operand 3968 // falls below a certain threshold. 3969 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3970 std::vector<EVT> MemOps; 3971 bool DstAlignCanChange = false; 3972 MachineFunction &MF = DAG.getMachineFunction(); 3973 MachineFrameInfo *MFI = MF.getFrameInfo(); 3974 bool OptSize = MF.getFunction()->getAttributes(). 3975 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3976 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3977 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3978 DstAlignCanChange = true; 3979 bool IsZeroVal = 3980 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3981 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3982 Size, (DstAlignCanChange ? 0 : Align), 0, 3983 true, IsZeroVal, false, true, DAG, TLI)) 3984 return SDValue(); 3985 3986 if (DstAlignCanChange) { 3987 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3988 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3989 if (NewAlign > Align) { 3990 // Give the stack frame object a larger alignment if needed. 3991 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3992 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3993 Align = NewAlign; 3994 } 3995 } 3996 3997 SmallVector<SDValue, 8> OutChains; 3998 uint64_t DstOff = 0; 3999 unsigned NumMemOps = MemOps.size(); 4000 4001 // Find the largest store and generate the bit pattern for it. 4002 EVT LargestVT = MemOps[0]; 4003 for (unsigned i = 1; i < NumMemOps; i++) 4004 if (MemOps[i].bitsGT(LargestVT)) 4005 LargestVT = MemOps[i]; 4006 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 4007 4008 for (unsigned i = 0; i < NumMemOps; i++) { 4009 EVT VT = MemOps[i]; 4010 unsigned VTSize = VT.getSizeInBits() / 8; 4011 if (VTSize > Size) { 4012 // Issuing an unaligned load / store pair that overlaps with the previous 4013 // pair. Adjust the offset accordingly. 4014 assert(i == NumMemOps-1 && i != 0); 4015 DstOff -= VTSize - Size; 4016 } 4017 4018 // If this store is smaller than the largest store see whether we can get 4019 // the smaller value for free with a truncate. 4020 SDValue Value = MemSetValue; 4021 if (VT.bitsLT(LargestVT)) { 4022 if (!LargestVT.isVector() && !VT.isVector() && 4023 TLI.isTruncateFree(LargestVT, VT)) 4024 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 4025 else 4026 Value = getMemsetValue(Src, VT, DAG, dl); 4027 } 4028 assert(Value.getValueType() == VT && "Value with wrong type."); 4029 SDValue Store = DAG.getStore(Chain, dl, Value, 4030 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 4031 DstPtrInfo.getWithOffset(DstOff), 4032 isVol, false, Align); 4033 OutChains.push_back(Store); 4034 DstOff += VT.getSizeInBits() / 8; 4035 Size -= VTSize; 4036 } 4037 4038 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 4039 &OutChains[0], OutChains.size()); 4040} 4041 4042SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst, 4043 SDValue Src, SDValue Size, 4044 unsigned Align, bool isVol, bool AlwaysInline, 4045 MachinePointerInfo DstPtrInfo, 4046 MachinePointerInfo SrcPtrInfo) { 4047 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 4048 4049 // Check to see if we should lower the memcpy to loads and stores first. 4050 // For cases within the target-specified limits, this is the best choice. 4051 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 4052 if (ConstantSize) { 4053 // Memcpy with size zero? Just return the original chain. 4054 if (ConstantSize->isNullValue()) 4055 return Chain; 4056 4057 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 4058 ConstantSize->getZExtValue(),Align, 4059 isVol, false, DstPtrInfo, SrcPtrInfo); 4060 if (Result.getNode()) 4061 return Result; 4062 } 4063 4064 // Then check to see if we should lower the memcpy with target-specific 4065 // code. If the target chooses to do this, this is the next best. 4066 SDValue Result = 4067 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 4068 isVol, AlwaysInline, 4069 DstPtrInfo, SrcPtrInfo); 4070 if (Result.getNode()) 4071 return Result; 4072 4073 // If we really need inline code and the target declined to provide it, 4074 // use a (potentially long) sequence of loads and stores. 4075 if (AlwaysInline) { 4076 assert(ConstantSize && "AlwaysInline requires a constant size!"); 4077 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 4078 ConstantSize->getZExtValue(), Align, isVol, 4079 true, DstPtrInfo, SrcPtrInfo); 4080 } 4081 4082 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 4083 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 4084 // respect volatile, so they may do things like read or write memory 4085 // beyond the given memory regions. But fixing this isn't easy, and most 4086 // people don't care. 4087 4088 const TargetLowering *TLI = TM.getTargetLowering(); 4089 4090 // Emit a library call. 4091 TargetLowering::ArgListTy Args; 4092 TargetLowering::ArgListEntry Entry; 4093 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext()); 4094 Entry.Node = Dst; Args.push_back(Entry); 4095 Entry.Node = Src; Args.push_back(Entry); 4096 Entry.Node = Size; Args.push_back(Entry); 4097 // FIXME: pass in SDLoc 4098 TargetLowering:: 4099 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4100 false, false, false, false, 0, 4101 TLI->getLibcallCallingConv(RTLIB::MEMCPY), 4102 /*isTailCall=*/false, 4103 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 4104 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY), 4105 TLI->getPointerTy()), 4106 Args, *this, dl); 4107 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 4108 4109 return CallResult.second; 4110} 4111 4112SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst, 4113 SDValue Src, SDValue Size, 4114 unsigned Align, bool isVol, 4115 MachinePointerInfo DstPtrInfo, 4116 MachinePointerInfo SrcPtrInfo) { 4117 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 4118 4119 // Check to see if we should lower the memmove to loads and stores first. 4120 // For cases within the target-specified limits, this is the best choice. 4121 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 4122 if (ConstantSize) { 4123 // Memmove with size zero? Just return the original chain. 4124 if (ConstantSize->isNullValue()) 4125 return Chain; 4126 4127 SDValue Result = 4128 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 4129 ConstantSize->getZExtValue(), Align, isVol, 4130 false, DstPtrInfo, SrcPtrInfo); 4131 if (Result.getNode()) 4132 return Result; 4133 } 4134 4135 // Then check to see if we should lower the memmove with target-specific 4136 // code. If the target chooses to do this, this is the next best. 4137 SDValue Result = 4138 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4139 DstPtrInfo, SrcPtrInfo); 4140 if (Result.getNode()) 4141 return Result; 4142 4143 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 4144 // not be safe. See memcpy above for more details. 4145 4146 const TargetLowering *TLI = TM.getTargetLowering(); 4147 4148 // Emit a library call. 4149 TargetLowering::ArgListTy Args; 4150 TargetLowering::ArgListEntry Entry; 4151 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext()); 4152 Entry.Node = Dst; Args.push_back(Entry); 4153 Entry.Node = Src; Args.push_back(Entry); 4154 Entry.Node = Size; Args.push_back(Entry); 4155 // FIXME: pass in SDLoc 4156 TargetLowering:: 4157 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4158 false, false, false, false, 0, 4159 TLI->getLibcallCallingConv(RTLIB::MEMMOVE), 4160 /*isTailCall=*/false, 4161 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 4162 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE), 4163 TLI->getPointerTy()), 4164 Args, *this, dl); 4165 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 4166 4167 return CallResult.second; 4168} 4169 4170SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst, 4171 SDValue Src, SDValue Size, 4172 unsigned Align, bool isVol, 4173 MachinePointerInfo DstPtrInfo) { 4174 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 4175 4176 // Check to see if we should lower the memset to stores first. 4177 // For cases within the target-specified limits, this is the best choice. 4178 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 4179 if (ConstantSize) { 4180 // Memset with size zero? Just return the original chain. 4181 if (ConstantSize->isNullValue()) 4182 return Chain; 4183 4184 SDValue Result = 4185 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 4186 Align, isVol, DstPtrInfo); 4187 4188 if (Result.getNode()) 4189 return Result; 4190 } 4191 4192 // Then check to see if we should lower the memset with target-specific 4193 // code. If the target chooses to do this, this is the next best. 4194 SDValue Result = 4195 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4196 DstPtrInfo); 4197 if (Result.getNode()) 4198 return Result; 4199 4200 // Emit a library call. 4201 const TargetLowering *TLI = TM.getTargetLowering(); 4202 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext()); 4203 TargetLowering::ArgListTy Args; 4204 TargetLowering::ArgListEntry Entry; 4205 Entry.Node = Dst; Entry.Ty = IntPtrTy; 4206 Args.push_back(Entry); 4207 // Extend or truncate the argument to be an i32 value for the call. 4208 if (Src.getValueType().bitsGT(MVT::i32)) 4209 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 4210 else 4211 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 4212 Entry.Node = Src; 4213 Entry.Ty = Type::getInt32Ty(*getContext()); 4214 Entry.isSExt = true; 4215 Args.push_back(Entry); 4216 Entry.Node = Size; 4217 Entry.Ty = IntPtrTy; 4218 Entry.isSExt = false; 4219 Args.push_back(Entry); 4220 // FIXME: pass in SDLoc 4221 TargetLowering:: 4222 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4223 false, false, false, false, 0, 4224 TLI->getLibcallCallingConv(RTLIB::MEMSET), 4225 /*isTailCall=*/false, 4226 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 4227 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET), 4228 TLI->getPointerTy()), 4229 Args, *this, dl); 4230 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 4231 4232 return CallResult.second; 4233} 4234 4235SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4236 SDVTList VTList, SDValue *Ops, unsigned NumOps, 4237 MachineMemOperand *MMO, 4238 AtomicOrdering SuccessOrdering, 4239 AtomicOrdering FailureOrdering, 4240 SynchronizationScope SynchScope) { 4241 FoldingSetNodeID ID; 4242 ID.AddInteger(MemVT.getRawBits()); 4243 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4244 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4245 void* IP = 0; 4246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4247 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4248 return SDValue(E, 0); 4249 } 4250 4251 // Allocate the operands array for the node out of the BumpPtrAllocator, since 4252 // SDNode doesn't have access to it. This memory will be "leaked" when 4253 // the node is deallocated, but recovered when the allocator is released. 4254 // If the number of operands is less than 5 we use AtomicSDNode's internal 4255 // storage. 4256 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps) : 0; 4257 4258 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(), 4259 dl.getDebugLoc(), VTList, MemVT, 4260 Ops, DynOps, NumOps, MMO, 4261 SuccessOrdering, FailureOrdering, 4262 SynchScope); 4263 CSEMap.InsertNode(N, IP); 4264 AllNodes.push_back(N); 4265 return SDValue(N, 0); 4266} 4267 4268SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4269 SDVTList VTList, SDValue *Ops, unsigned NumOps, 4270 MachineMemOperand *MMO, 4271 AtomicOrdering Ordering, 4272 SynchronizationScope SynchScope) { 4273 return getAtomic(Opcode, dl, MemVT, VTList, Ops, NumOps, MMO, Ordering, 4274 Ordering, SynchScope); 4275} 4276 4277SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4278 SDValue Chain, SDValue Ptr, SDValue Cmp, 4279 SDValue Swp, MachinePointerInfo PtrInfo, 4280 unsigned Alignment, 4281 AtomicOrdering SuccessOrdering, 4282 AtomicOrdering FailureOrdering, 4283 SynchronizationScope SynchScope) { 4284 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4285 Alignment = getEVTAlignment(MemVT); 4286 4287 MachineFunction &MF = getMachineFunction(); 4288 4289 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE. 4290 // For now, atomics are considered to be volatile always. 4291 // FIXME: Volatile isn't really correct; we should keep track of atomic 4292 // orderings in the memoperand. 4293 unsigned Flags = MachineMemOperand::MOVolatile; 4294 if (Opcode != ISD::ATOMIC_STORE) 4295 Flags |= MachineMemOperand::MOLoad; 4296 if (Opcode != ISD::ATOMIC_LOAD) 4297 Flags |= MachineMemOperand::MOStore; 4298 4299 MachineMemOperand *MMO = 4300 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 4301 4302 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 4303 SuccessOrdering, FailureOrdering, SynchScope); 4304} 4305 4306SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4307 SDValue Chain, 4308 SDValue Ptr, SDValue Cmp, 4309 SDValue Swp, MachineMemOperand *MMO, 4310 AtomicOrdering SuccessOrdering, 4311 AtomicOrdering FailureOrdering, 4312 SynchronizationScope SynchScope) { 4313 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 4314 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 4315 4316 EVT VT = Cmp.getValueType(); 4317 4318 SDVTList VTs = getVTList(VT, MVT::Other); 4319 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 4320 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 4, MMO, SuccessOrdering, 4321 FailureOrdering, SynchScope); 4322} 4323 4324SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4325 SDValue Chain, 4326 SDValue Ptr, SDValue Val, 4327 const Value* PtrVal, 4328 unsigned Alignment, 4329 AtomicOrdering Ordering, 4330 SynchronizationScope SynchScope) { 4331 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4332 Alignment = getEVTAlignment(MemVT); 4333 4334 MachineFunction &MF = getMachineFunction(); 4335 // An atomic store does not load. An atomic load does not store. 4336 // (An atomicrmw obviously both loads and stores.) 4337 // For now, atomics are considered to be volatile always, and they are 4338 // chained as such. 4339 // FIXME: Volatile isn't really correct; we should keep track of atomic 4340 // orderings in the memoperand. 4341 unsigned Flags = MachineMemOperand::MOVolatile; 4342 if (Opcode != ISD::ATOMIC_STORE) 4343 Flags |= MachineMemOperand::MOLoad; 4344 if (Opcode != ISD::ATOMIC_LOAD) 4345 Flags |= MachineMemOperand::MOStore; 4346 4347 MachineMemOperand *MMO = 4348 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4349 MemVT.getStoreSize(), Alignment); 4350 4351 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4352 Ordering, SynchScope); 4353} 4354 4355SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4356 SDValue Chain, 4357 SDValue Ptr, SDValue Val, 4358 MachineMemOperand *MMO, 4359 AtomicOrdering Ordering, 4360 SynchronizationScope SynchScope) { 4361 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4362 Opcode == ISD::ATOMIC_LOAD_SUB || 4363 Opcode == ISD::ATOMIC_LOAD_AND || 4364 Opcode == ISD::ATOMIC_LOAD_OR || 4365 Opcode == ISD::ATOMIC_LOAD_XOR || 4366 Opcode == ISD::ATOMIC_LOAD_NAND || 4367 Opcode == ISD::ATOMIC_LOAD_MIN || 4368 Opcode == ISD::ATOMIC_LOAD_MAX || 4369 Opcode == ISD::ATOMIC_LOAD_UMIN || 4370 Opcode == ISD::ATOMIC_LOAD_UMAX || 4371 Opcode == ISD::ATOMIC_SWAP || 4372 Opcode == ISD::ATOMIC_STORE) && 4373 "Invalid Atomic Op"); 4374 4375 EVT VT = Val.getValueType(); 4376 4377 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4378 getVTList(VT, MVT::Other); 4379 SDValue Ops[] = {Chain, Ptr, Val}; 4380 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 3, MMO, Ordering, SynchScope); 4381} 4382 4383SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4384 EVT VT, SDValue Chain, 4385 SDValue Ptr, 4386 const Value* PtrVal, 4387 unsigned Alignment, 4388 AtomicOrdering Ordering, 4389 SynchronizationScope SynchScope) { 4390 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4391 Alignment = getEVTAlignment(MemVT); 4392 4393 MachineFunction &MF = getMachineFunction(); 4394 // An atomic store does not load. An atomic load does not store. 4395 // (An atomicrmw obviously both loads and stores.) 4396 // For now, atomics are considered to be volatile always, and they are 4397 // chained as such. 4398 // FIXME: Volatile isn't really correct; we should keep track of atomic 4399 // orderings in the memoperand. 4400 unsigned Flags = MachineMemOperand::MOVolatile; 4401 if (Opcode != ISD::ATOMIC_STORE) 4402 Flags |= MachineMemOperand::MOLoad; 4403 if (Opcode != ISD::ATOMIC_LOAD) 4404 Flags |= MachineMemOperand::MOStore; 4405 4406 MachineMemOperand *MMO = 4407 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4408 MemVT.getStoreSize(), Alignment); 4409 4410 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4411 Ordering, SynchScope); 4412} 4413 4414SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4415 EVT VT, SDValue Chain, 4416 SDValue Ptr, 4417 MachineMemOperand *MMO, 4418 AtomicOrdering Ordering, 4419 SynchronizationScope SynchScope) { 4420 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4421 4422 SDVTList VTs = getVTList(VT, MVT::Other); 4423 SDValue Ops[] = {Chain, Ptr}; 4424 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 2, MMO, Ordering, SynchScope); 4425} 4426 4427/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4428SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4429 SDLoc dl) { 4430 if (NumOps == 1) 4431 return Ops[0]; 4432 4433 SmallVector<EVT, 4> VTs; 4434 VTs.reserve(NumOps); 4435 for (unsigned i = 0; i < NumOps; ++i) 4436 VTs.push_back(Ops[i].getValueType()); 4437 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4438 Ops, NumOps); 4439} 4440 4441SDValue 4442SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, 4443 const EVT *VTs, unsigned NumVTs, 4444 const SDValue *Ops, unsigned NumOps, 4445 EVT MemVT, MachinePointerInfo PtrInfo, 4446 unsigned Align, bool Vol, 4447 bool ReadMem, bool WriteMem) { 4448 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4449 MemVT, PtrInfo, Align, Vol, 4450 ReadMem, WriteMem); 4451} 4452 4453SDValue 4454SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 4455 const SDValue *Ops, unsigned NumOps, 4456 EVT MemVT, MachinePointerInfo PtrInfo, 4457 unsigned Align, bool Vol, 4458 bool ReadMem, bool WriteMem) { 4459 if (Align == 0) // Ensure that codegen never sees alignment 0 4460 Align = getEVTAlignment(MemVT); 4461 4462 MachineFunction &MF = getMachineFunction(); 4463 unsigned Flags = 0; 4464 if (WriteMem) 4465 Flags |= MachineMemOperand::MOStore; 4466 if (ReadMem) 4467 Flags |= MachineMemOperand::MOLoad; 4468 if (Vol) 4469 Flags |= MachineMemOperand::MOVolatile; 4470 MachineMemOperand *MMO = 4471 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4472 4473 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4474} 4475 4476SDValue 4477SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 4478 const SDValue *Ops, unsigned NumOps, 4479 EVT MemVT, MachineMemOperand *MMO) { 4480 assert((Opcode == ISD::INTRINSIC_VOID || 4481 Opcode == ISD::INTRINSIC_W_CHAIN || 4482 Opcode == ISD::PREFETCH || 4483 Opcode == ISD::LIFETIME_START || 4484 Opcode == ISD::LIFETIME_END || 4485 (Opcode <= INT_MAX && 4486 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4487 "Opcode is not a memory-accessing opcode!"); 4488 4489 // Memoize the node unless it returns a flag. 4490 MemIntrinsicSDNode *N; 4491 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4492 FoldingSetNodeID ID; 4493 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4494 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4495 void *IP = 0; 4496 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4497 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4498 return SDValue(E, 0); 4499 } 4500 4501 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(), 4502 dl.getDebugLoc(), VTList, Ops, 4503 NumOps, MemVT, MMO); 4504 CSEMap.InsertNode(N, IP); 4505 } else { 4506 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(), 4507 dl.getDebugLoc(), VTList, Ops, 4508 NumOps, MemVT, MMO); 4509 } 4510 AllNodes.push_back(N); 4511 return SDValue(N, 0); 4512} 4513 4514/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4515/// MachinePointerInfo record from it. This is particularly useful because the 4516/// code generator has many cases where it doesn't bother passing in a 4517/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4518static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4519 // If this is FI+Offset, we can model it. 4520 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4521 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4522 4523 // If this is (FI+Offset1)+Offset2, we can model it. 4524 if (Ptr.getOpcode() != ISD::ADD || 4525 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4526 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4527 return MachinePointerInfo(); 4528 4529 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4530 return MachinePointerInfo::getFixedStack(FI, Offset+ 4531 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4532} 4533 4534/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4535/// MachinePointerInfo record from it. This is particularly useful because the 4536/// code generator has many cases where it doesn't bother passing in a 4537/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4538static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4539 // If the 'Offset' value isn't a constant, we can't handle this. 4540 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4541 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4542 if (OffsetOp.getOpcode() == ISD::UNDEF) 4543 return InferPointerInfo(Ptr); 4544 return MachinePointerInfo(); 4545} 4546 4547 4548SDValue 4549SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4550 EVT VT, SDLoc dl, SDValue Chain, 4551 SDValue Ptr, SDValue Offset, 4552 MachinePointerInfo PtrInfo, EVT MemVT, 4553 bool isVolatile, bool isNonTemporal, bool isInvariant, 4554 unsigned Alignment, const MDNode *TBAAInfo, 4555 const MDNode *Ranges) { 4556 assert(Chain.getValueType() == MVT::Other && 4557 "Invalid chain type"); 4558 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4559 Alignment = getEVTAlignment(VT); 4560 4561 unsigned Flags = MachineMemOperand::MOLoad; 4562 if (isVolatile) 4563 Flags |= MachineMemOperand::MOVolatile; 4564 if (isNonTemporal) 4565 Flags |= MachineMemOperand::MONonTemporal; 4566 if (isInvariant) 4567 Flags |= MachineMemOperand::MOInvariant; 4568 4569 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4570 // clients. 4571 if (PtrInfo.V == 0) 4572 PtrInfo = InferPointerInfo(Ptr, Offset); 4573 4574 MachineFunction &MF = getMachineFunction(); 4575 MachineMemOperand *MMO = 4576 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4577 TBAAInfo, Ranges); 4578 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4579} 4580 4581SDValue 4582SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4583 EVT VT, SDLoc dl, SDValue Chain, 4584 SDValue Ptr, SDValue Offset, EVT MemVT, 4585 MachineMemOperand *MMO) { 4586 if (VT == MemVT) { 4587 ExtType = ISD::NON_EXTLOAD; 4588 } else if (ExtType == ISD::NON_EXTLOAD) { 4589 assert(VT == MemVT && "Non-extending load from different memory type!"); 4590 } else { 4591 // Extending load. 4592 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4593 "Should only be an extending load, not truncating!"); 4594 assert(VT.isInteger() == MemVT.isInteger() && 4595 "Cannot convert from FP to Int or Int -> FP!"); 4596 assert(VT.isVector() == MemVT.isVector() && 4597 "Cannot use trunc store to convert to or from a vector!"); 4598 assert((!VT.isVector() || 4599 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4600 "Cannot use trunc store to change the number of vector elements!"); 4601 } 4602 4603 bool Indexed = AM != ISD::UNINDEXED; 4604 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4605 "Unindexed load with an offset!"); 4606 4607 SDVTList VTs = Indexed ? 4608 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4609 SDValue Ops[] = { Chain, Ptr, Offset }; 4610 FoldingSetNodeID ID; 4611 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4612 ID.AddInteger(MemVT.getRawBits()); 4613 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4614 MMO->isNonTemporal(), 4615 MMO->isInvariant())); 4616 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4617 void *IP = 0; 4618 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4619 cast<LoadSDNode>(E)->refineAlignment(MMO); 4620 return SDValue(E, 0); 4621 } 4622 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(), 4623 dl.getDebugLoc(), VTs, AM, ExtType, 4624 MemVT, MMO); 4625 CSEMap.InsertNode(N, IP); 4626 AllNodes.push_back(N); 4627 return SDValue(N, 0); 4628} 4629 4630SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl, 4631 SDValue Chain, SDValue Ptr, 4632 MachinePointerInfo PtrInfo, 4633 bool isVolatile, bool isNonTemporal, 4634 bool isInvariant, unsigned Alignment, 4635 const MDNode *TBAAInfo, 4636 const MDNode *Ranges) { 4637 SDValue Undef = getUNDEF(Ptr.getValueType()); 4638 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4639 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4640 TBAAInfo, Ranges); 4641} 4642 4643SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl, 4644 SDValue Chain, SDValue Ptr, 4645 MachineMemOperand *MMO) { 4646 SDValue Undef = getUNDEF(Ptr.getValueType()); 4647 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4648 VT, MMO); 4649} 4650 4651SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 4652 SDValue Chain, SDValue Ptr, 4653 MachinePointerInfo PtrInfo, EVT MemVT, 4654 bool isVolatile, bool isNonTemporal, 4655 unsigned Alignment, const MDNode *TBAAInfo) { 4656 SDValue Undef = getUNDEF(Ptr.getValueType()); 4657 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4658 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4659 TBAAInfo); 4660} 4661 4662 4663SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 4664 SDValue Chain, SDValue Ptr, EVT MemVT, 4665 MachineMemOperand *MMO) { 4666 SDValue Undef = getUNDEF(Ptr.getValueType()); 4667 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4668 MemVT, MMO); 4669} 4670 4671SDValue 4672SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base, 4673 SDValue Offset, ISD::MemIndexedMode AM) { 4674 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4675 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4676 "Load is already a indexed load!"); 4677 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4678 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4679 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4680 false, LD->getAlignment()); 4681} 4682 4683SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val, 4684 SDValue Ptr, MachinePointerInfo PtrInfo, 4685 bool isVolatile, bool isNonTemporal, 4686 unsigned Alignment, const MDNode *TBAAInfo) { 4687 assert(Chain.getValueType() == MVT::Other && 4688 "Invalid chain type"); 4689 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4690 Alignment = getEVTAlignment(Val.getValueType()); 4691 4692 unsigned Flags = MachineMemOperand::MOStore; 4693 if (isVolatile) 4694 Flags |= MachineMemOperand::MOVolatile; 4695 if (isNonTemporal) 4696 Flags |= MachineMemOperand::MONonTemporal; 4697 4698 if (PtrInfo.V == 0) 4699 PtrInfo = InferPointerInfo(Ptr); 4700 4701 MachineFunction &MF = getMachineFunction(); 4702 MachineMemOperand *MMO = 4703 MF.getMachineMemOperand(PtrInfo, Flags, 4704 Val.getValueType().getStoreSize(), Alignment, 4705 TBAAInfo); 4706 4707 return getStore(Chain, dl, Val, Ptr, MMO); 4708} 4709 4710SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val, 4711 SDValue Ptr, MachineMemOperand *MMO) { 4712 assert(Chain.getValueType() == MVT::Other && 4713 "Invalid chain type"); 4714 EVT VT = Val.getValueType(); 4715 SDVTList VTs = getVTList(MVT::Other); 4716 SDValue Undef = getUNDEF(Ptr.getValueType()); 4717 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4718 FoldingSetNodeID ID; 4719 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4720 ID.AddInteger(VT.getRawBits()); 4721 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4722 MMO->isNonTemporal(), MMO->isInvariant())); 4723 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4724 void *IP = 0; 4725 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4726 cast<StoreSDNode>(E)->refineAlignment(MMO); 4727 return SDValue(E, 0); 4728 } 4729 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4730 dl.getDebugLoc(), VTs, 4731 ISD::UNINDEXED, false, VT, MMO); 4732 CSEMap.InsertNode(N, IP); 4733 AllNodes.push_back(N); 4734 return SDValue(N, 0); 4735} 4736 4737SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, 4738 SDValue Ptr, MachinePointerInfo PtrInfo, 4739 EVT SVT,bool isVolatile, bool isNonTemporal, 4740 unsigned Alignment, 4741 const MDNode *TBAAInfo) { 4742 assert(Chain.getValueType() == MVT::Other && 4743 "Invalid chain type"); 4744 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4745 Alignment = getEVTAlignment(SVT); 4746 4747 unsigned Flags = MachineMemOperand::MOStore; 4748 if (isVolatile) 4749 Flags |= MachineMemOperand::MOVolatile; 4750 if (isNonTemporal) 4751 Flags |= MachineMemOperand::MONonTemporal; 4752 4753 if (PtrInfo.V == 0) 4754 PtrInfo = InferPointerInfo(Ptr); 4755 4756 MachineFunction &MF = getMachineFunction(); 4757 MachineMemOperand *MMO = 4758 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4759 TBAAInfo); 4760 4761 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4762} 4763 4764SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, 4765 SDValue Ptr, EVT SVT, 4766 MachineMemOperand *MMO) { 4767 EVT VT = Val.getValueType(); 4768 4769 assert(Chain.getValueType() == MVT::Other && 4770 "Invalid chain type"); 4771 if (VT == SVT) 4772 return getStore(Chain, dl, Val, Ptr, MMO); 4773 4774 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4775 "Should only be a truncating store, not extending!"); 4776 assert(VT.isInteger() == SVT.isInteger() && 4777 "Can't do FP-INT conversion!"); 4778 assert(VT.isVector() == SVT.isVector() && 4779 "Cannot use trunc store to convert to or from a vector!"); 4780 assert((!VT.isVector() || 4781 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4782 "Cannot use trunc store to change the number of vector elements!"); 4783 4784 SDVTList VTs = getVTList(MVT::Other); 4785 SDValue Undef = getUNDEF(Ptr.getValueType()); 4786 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4787 FoldingSetNodeID ID; 4788 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4789 ID.AddInteger(SVT.getRawBits()); 4790 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4791 MMO->isNonTemporal(), MMO->isInvariant())); 4792 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4793 void *IP = 0; 4794 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4795 cast<StoreSDNode>(E)->refineAlignment(MMO); 4796 return SDValue(E, 0); 4797 } 4798 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4799 dl.getDebugLoc(), VTs, 4800 ISD::UNINDEXED, true, SVT, MMO); 4801 CSEMap.InsertNode(N, IP); 4802 AllNodes.push_back(N); 4803 return SDValue(N, 0); 4804} 4805 4806SDValue 4807SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base, 4808 SDValue Offset, ISD::MemIndexedMode AM) { 4809 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4810 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4811 "Store is already a indexed store!"); 4812 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4813 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4814 FoldingSetNodeID ID; 4815 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4816 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4817 ID.AddInteger(ST->getRawSubclassData()); 4818 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4819 void *IP = 0; 4820 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4821 return SDValue(E, 0); 4822 4823 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4824 dl.getDebugLoc(), VTs, AM, 4825 ST->isTruncatingStore(), 4826 ST->getMemoryVT(), 4827 ST->getMemOperand()); 4828 CSEMap.InsertNode(N, IP); 4829 AllNodes.push_back(N); 4830 return SDValue(N, 0); 4831} 4832 4833SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl, 4834 SDValue Chain, SDValue Ptr, 4835 SDValue SV, 4836 unsigned Align) { 4837 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4838 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4839} 4840 4841SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 4842 const SDUse *Ops, unsigned NumOps) { 4843 switch (NumOps) { 4844 case 0: return getNode(Opcode, DL, VT); 4845 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4846 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4847 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4848 default: break; 4849 } 4850 4851 // Copy from an SDUse array into an SDValue array for use with 4852 // the regular getNode logic. 4853 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4854 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4855} 4856 4857SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 4858 const SDValue *Ops, unsigned NumOps) { 4859 switch (NumOps) { 4860 case 0: return getNode(Opcode, DL, VT); 4861 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4862 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4863 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4864 default: break; 4865 } 4866 4867 switch (Opcode) { 4868 default: break; 4869 case ISD::SELECT_CC: { 4870 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4871 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4872 "LHS and RHS of condition must have same type!"); 4873 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4874 "True and False arms of SelectCC must have same type!"); 4875 assert(Ops[2].getValueType() == VT && 4876 "select_cc node must be of same type as true and false value!"); 4877 break; 4878 } 4879 case ISD::BR_CC: { 4880 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4881 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4882 "LHS/RHS of comparison should match types!"); 4883 break; 4884 } 4885 } 4886 4887 // Memoize nodes. 4888 SDNode *N; 4889 SDVTList VTs = getVTList(VT); 4890 4891 if (VT != MVT::Glue) { 4892 FoldingSetNodeID ID; 4893 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4894 void *IP = 0; 4895 4896 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4897 return SDValue(E, 0); 4898 4899 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4900 VTs, Ops, NumOps); 4901 CSEMap.InsertNode(N, IP); 4902 } else { 4903 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4904 VTs, Ops, NumOps); 4905 } 4906 4907 AllNodes.push_back(N); 4908#ifndef NDEBUG 4909 VerifySDNode(N); 4910#endif 4911 return SDValue(N, 0); 4912} 4913 4914SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 4915 ArrayRef<EVT> ResultTys, 4916 const SDValue *Ops, unsigned NumOps) { 4917 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4918 Ops, NumOps); 4919} 4920 4921SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 4922 const EVT *VTs, unsigned NumVTs, 4923 const SDValue *Ops, unsigned NumOps) { 4924 if (NumVTs == 1) 4925 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4926 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4927} 4928 4929SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4930 const SDValue *Ops, unsigned NumOps) { 4931 if (VTList.NumVTs == 1) 4932 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4933 4934#if 0 4935 switch (Opcode) { 4936 // FIXME: figure out how to safely handle things like 4937 // int foo(int x) { return 1 << (x & 255); } 4938 // int bar() { return foo(256); } 4939 case ISD::SRA_PARTS: 4940 case ISD::SRL_PARTS: 4941 case ISD::SHL_PARTS: 4942 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4943 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4944 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4945 else if (N3.getOpcode() == ISD::AND) 4946 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4947 // If the and is only masking out bits that cannot effect the shift, 4948 // eliminate the and. 4949 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4950 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4951 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4952 } 4953 break; 4954 } 4955#endif 4956 4957 // Memoize the node unless it returns a flag. 4958 SDNode *N; 4959 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4960 FoldingSetNodeID ID; 4961 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4962 void *IP = 0; 4963 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4964 return SDValue(E, 0); 4965 4966 if (NumOps == 1) { 4967 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 4968 DL.getDebugLoc(), VTList, Ops[0]); 4969 } else if (NumOps == 2) { 4970 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 4971 DL.getDebugLoc(), VTList, Ops[0], 4972 Ops[1]); 4973 } else if (NumOps == 3) { 4974 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 4975 DL.getDebugLoc(), VTList, Ops[0], 4976 Ops[1], Ops[2]); 4977 } else { 4978 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4979 VTList, Ops, NumOps); 4980 } 4981 CSEMap.InsertNode(N, IP); 4982 } else { 4983 if (NumOps == 1) { 4984 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 4985 DL.getDebugLoc(), VTList, Ops[0]); 4986 } else if (NumOps == 2) { 4987 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 4988 DL.getDebugLoc(), VTList, Ops[0], 4989 Ops[1]); 4990 } else if (NumOps == 3) { 4991 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 4992 DL.getDebugLoc(), VTList, Ops[0], 4993 Ops[1], Ops[2]); 4994 } else { 4995 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4996 VTList, Ops, NumOps); 4997 } 4998 } 4999 AllNodes.push_back(N); 5000#ifndef NDEBUG 5001 VerifySDNode(N); 5002#endif 5003 return SDValue(N, 0); 5004} 5005 5006SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) { 5007 return getNode(Opcode, DL, VTList, 0, 0); 5008} 5009 5010SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 5011 SDValue N1) { 5012 SDValue Ops[] = { N1 }; 5013 return getNode(Opcode, DL, VTList, Ops, 1); 5014} 5015 5016SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 5017 SDValue N1, SDValue N2) { 5018 SDValue Ops[] = { N1, N2 }; 5019 return getNode(Opcode, DL, VTList, Ops, 2); 5020} 5021 5022SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 5023 SDValue N1, SDValue N2, SDValue N3) { 5024 SDValue Ops[] = { N1, N2, N3 }; 5025 return getNode(Opcode, DL, VTList, Ops, 3); 5026} 5027 5028SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 5029 SDValue N1, SDValue N2, SDValue N3, 5030 SDValue N4) { 5031 SDValue Ops[] = { N1, N2, N3, N4 }; 5032 return getNode(Opcode, DL, VTList, Ops, 4); 5033} 5034 5035SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 5036 SDValue N1, SDValue N2, SDValue N3, 5037 SDValue N4, SDValue N5) { 5038 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 5039 return getNode(Opcode, DL, VTList, Ops, 5); 5040} 5041 5042SDVTList SelectionDAG::getVTList(EVT VT) { 5043 return makeVTList(SDNode::getValueTypeList(VT), 1); 5044} 5045 5046SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 5047 FoldingSetNodeID ID; 5048 ID.AddInteger(2U); 5049 ID.AddInteger(VT1.getRawBits()); 5050 ID.AddInteger(VT2.getRawBits()); 5051 5052 void *IP = 0; 5053 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP); 5054 if (Result == NULL) { 5055 EVT *Array = Allocator.Allocate<EVT>(2); 5056 Array[0] = VT1; 5057 Array[1] = VT2; 5058 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2); 5059 VTListMap.InsertNode(Result, IP); 5060 } 5061 return Result->getSDVTList(); 5062} 5063 5064SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 5065 FoldingSetNodeID ID; 5066 ID.AddInteger(3U); 5067 ID.AddInteger(VT1.getRawBits()); 5068 ID.AddInteger(VT2.getRawBits()); 5069 ID.AddInteger(VT3.getRawBits()); 5070 5071 void *IP = 0; 5072 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP); 5073 if (Result == NULL) { 5074 EVT *Array = Allocator.Allocate<EVT>(3); 5075 Array[0] = VT1; 5076 Array[1] = VT2; 5077 Array[2] = VT3; 5078 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3); 5079 VTListMap.InsertNode(Result, IP); 5080 } 5081 return Result->getSDVTList(); 5082} 5083 5084SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 5085 FoldingSetNodeID ID; 5086 ID.AddInteger(4U); 5087 ID.AddInteger(VT1.getRawBits()); 5088 ID.AddInteger(VT2.getRawBits()); 5089 ID.AddInteger(VT3.getRawBits()); 5090 ID.AddInteger(VT4.getRawBits()); 5091 5092 void *IP = 0; 5093 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP); 5094 if (Result == NULL) { 5095 EVT *Array = Allocator.Allocate<EVT>(4); 5096 Array[0] = VT1; 5097 Array[1] = VT2; 5098 Array[2] = VT3; 5099 Array[3] = VT4; 5100 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4); 5101 VTListMap.InsertNode(Result, IP); 5102 } 5103 return Result->getSDVTList(); 5104} 5105 5106SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 5107 FoldingSetNodeID ID; 5108 ID.AddInteger(NumVTs); 5109 for (unsigned index = 0; index < NumVTs; index++) { 5110 ID.AddInteger(VTs[index].getRawBits()); 5111 } 5112 5113 void *IP = 0; 5114 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP); 5115 if (Result == NULL) { 5116 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 5117 std::copy(VTs, VTs + NumVTs, Array); 5118 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs); 5119 VTListMap.InsertNode(Result, IP); 5120 } 5121 return Result->getSDVTList(); 5122} 5123 5124 5125/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 5126/// specified operands. If the resultant node already exists in the DAG, 5127/// this does not modify the specified node, instead it returns the node that 5128/// already exists. If the resultant node does not exist in the DAG, the 5129/// input node is returned. As a degenerate case, if you specify the same 5130/// input operands as the node already has, the input node is returned. 5131SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 5132 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 5133 5134 // Check to see if there is no change. 5135 if (Op == N->getOperand(0)) return N; 5136 5137 // See if the modified node already exists. 5138 void *InsertPos = 0; 5139 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 5140 return Existing; 5141 5142 // Nope it doesn't. Remove the node from its current place in the maps. 5143 if (InsertPos) 5144 if (!RemoveNodeFromCSEMaps(N)) 5145 InsertPos = 0; 5146 5147 // Now we update the operands. 5148 N->OperandList[0].set(Op); 5149 5150 // If this gets put into a CSE map, add it. 5151 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5152 return N; 5153} 5154 5155SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 5156 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 5157 5158 // Check to see if there is no change. 5159 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 5160 return N; // No operands changed, just return the input node. 5161 5162 // See if the modified node already exists. 5163 void *InsertPos = 0; 5164 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 5165 return Existing; 5166 5167 // Nope it doesn't. Remove the node from its current place in the maps. 5168 if (InsertPos) 5169 if (!RemoveNodeFromCSEMaps(N)) 5170 InsertPos = 0; 5171 5172 // Now we update the operands. 5173 if (N->OperandList[0] != Op1) 5174 N->OperandList[0].set(Op1); 5175 if (N->OperandList[1] != Op2) 5176 N->OperandList[1].set(Op2); 5177 5178 // If this gets put into a CSE map, add it. 5179 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5180 return N; 5181} 5182 5183SDNode *SelectionDAG:: 5184UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 5185 SDValue Ops[] = { Op1, Op2, Op3 }; 5186 return UpdateNodeOperands(N, Ops, 3); 5187} 5188 5189SDNode *SelectionDAG:: 5190UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 5191 SDValue Op3, SDValue Op4) { 5192 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 5193 return UpdateNodeOperands(N, Ops, 4); 5194} 5195 5196SDNode *SelectionDAG:: 5197UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 5198 SDValue Op3, SDValue Op4, SDValue Op5) { 5199 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 5200 return UpdateNodeOperands(N, Ops, 5); 5201} 5202 5203SDNode *SelectionDAG:: 5204UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 5205 assert(N->getNumOperands() == NumOps && 5206 "Update with wrong number of operands"); 5207 5208 // Check to see if there is no change. 5209 bool AnyChange = false; 5210 for (unsigned i = 0; i != NumOps; ++i) { 5211 if (Ops[i] != N->getOperand(i)) { 5212 AnyChange = true; 5213 break; 5214 } 5215 } 5216 5217 // No operands changed, just return the input node. 5218 if (!AnyChange) return N; 5219 5220 // See if the modified node already exists. 5221 void *InsertPos = 0; 5222 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 5223 return Existing; 5224 5225 // Nope it doesn't. Remove the node from its current place in the maps. 5226 if (InsertPos) 5227 if (!RemoveNodeFromCSEMaps(N)) 5228 InsertPos = 0; 5229 5230 // Now we update the operands. 5231 for (unsigned i = 0; i != NumOps; ++i) 5232 if (N->OperandList[i] != Ops[i]) 5233 N->OperandList[i].set(Ops[i]); 5234 5235 // If this gets put into a CSE map, add it. 5236 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5237 return N; 5238} 5239 5240/// DropOperands - Release the operands and set this node to have 5241/// zero operands. 5242void SDNode::DropOperands() { 5243 // Unlike the code in MorphNodeTo that does this, we don't need to 5244 // watch for dead nodes here. 5245 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 5246 SDUse &Use = *I++; 5247 Use.set(SDValue()); 5248 } 5249} 5250 5251/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 5252/// machine opcode. 5253/// 5254SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5255 EVT VT) { 5256 SDVTList VTs = getVTList(VT); 5257 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 5258} 5259 5260SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5261 EVT VT, SDValue Op1) { 5262 SDVTList VTs = getVTList(VT); 5263 SDValue Ops[] = { Op1 }; 5264 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5265} 5266 5267SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5268 EVT VT, SDValue Op1, 5269 SDValue Op2) { 5270 SDVTList VTs = getVTList(VT); 5271 SDValue Ops[] = { Op1, Op2 }; 5272 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5273} 5274 5275SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5276 EVT VT, SDValue Op1, 5277 SDValue Op2, SDValue Op3) { 5278 SDVTList VTs = getVTList(VT); 5279 SDValue Ops[] = { Op1, Op2, Op3 }; 5280 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5281} 5282 5283SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5284 EVT VT, const SDValue *Ops, 5285 unsigned NumOps) { 5286 SDVTList VTs = getVTList(VT); 5287 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5288} 5289 5290SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5291 EVT VT1, EVT VT2, const SDValue *Ops, 5292 unsigned NumOps) { 5293 SDVTList VTs = getVTList(VT1, VT2); 5294 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5295} 5296 5297SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5298 EVT VT1, EVT VT2) { 5299 SDVTList VTs = getVTList(VT1, VT2); 5300 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 5301} 5302 5303SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5304 EVT VT1, EVT VT2, EVT VT3, 5305 const SDValue *Ops, unsigned NumOps) { 5306 SDVTList VTs = getVTList(VT1, VT2, VT3); 5307 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5308} 5309 5310SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5311 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 5312 const SDValue *Ops, unsigned NumOps) { 5313 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5314 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5315} 5316 5317SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5318 EVT VT1, EVT VT2, 5319 SDValue Op1) { 5320 SDVTList VTs = getVTList(VT1, VT2); 5321 SDValue Ops[] = { Op1 }; 5322 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5323} 5324 5325SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5326 EVT VT1, EVT VT2, 5327 SDValue Op1, SDValue Op2) { 5328 SDVTList VTs = getVTList(VT1, VT2); 5329 SDValue Ops[] = { Op1, Op2 }; 5330 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5331} 5332 5333SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5334 EVT VT1, EVT VT2, 5335 SDValue Op1, SDValue Op2, 5336 SDValue Op3) { 5337 SDVTList VTs = getVTList(VT1, VT2); 5338 SDValue Ops[] = { Op1, Op2, Op3 }; 5339 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5340} 5341 5342SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5343 EVT VT1, EVT VT2, EVT VT3, 5344 SDValue Op1, SDValue Op2, 5345 SDValue Op3) { 5346 SDVTList VTs = getVTList(VT1, VT2, VT3); 5347 SDValue Ops[] = { Op1, Op2, Op3 }; 5348 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5349} 5350 5351SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5352 SDVTList VTs, const SDValue *Ops, 5353 unsigned NumOps) { 5354 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 5355 // Reset the NodeID to -1. 5356 N->setNodeId(-1); 5357 return N; 5358} 5359 5360/// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away 5361/// the line number information on the merged node since it is not possible to 5362/// preserve the information that operation is associated with multiple lines. 5363/// This will make the debugger working better at -O0, were there is a higher 5364/// probability having other instructions associated with that line. 5365/// 5366/// For IROrder, we keep the smaller of the two 5367SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) { 5368 DebugLoc NLoc = N->getDebugLoc(); 5369 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && 5370 (OLoc.getDebugLoc() != NLoc)) { 5371 N->setDebugLoc(DebugLoc()); 5372 } 5373 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder()); 5374 N->setIROrder(Order); 5375 return N; 5376} 5377 5378/// MorphNodeTo - This *mutates* the specified node to have the specified 5379/// return type, opcode, and operands. 5380/// 5381/// Note that MorphNodeTo returns the resultant node. If there is already a 5382/// node of the specified opcode and operands, it returns that node instead of 5383/// the current one. Note that the SDLoc need not be the same. 5384/// 5385/// Using MorphNodeTo is faster than creating a new node and swapping it in 5386/// with ReplaceAllUsesWith both because it often avoids allocating a new 5387/// node, and because it doesn't require CSE recalculation for any of 5388/// the node's users. 5389/// 5390SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5391 SDVTList VTs, const SDValue *Ops, 5392 unsigned NumOps) { 5393 // If an identical node already exists, use it. 5394 void *IP = 0; 5395 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5396 FoldingSetNodeID ID; 5397 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5398 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5399 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N)); 5400 } 5401 5402 if (!RemoveNodeFromCSEMaps(N)) 5403 IP = 0; 5404 5405 // Start the morphing. 5406 N->NodeType = Opc; 5407 N->ValueList = VTs.VTs; 5408 N->NumValues = VTs.NumVTs; 5409 5410 // Clear the operands list, updating used nodes to remove this from their 5411 // use list. Keep track of any operands that become dead as a result. 5412 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5413 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5414 SDUse &Use = *I++; 5415 SDNode *Used = Use.getNode(); 5416 Use.set(SDValue()); 5417 if (Used->use_empty()) 5418 DeadNodeSet.insert(Used); 5419 } 5420 5421 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5422 // Initialize the memory references information. 5423 MN->setMemRefs(0, 0); 5424 // If NumOps is larger than the # of operands we can have in a 5425 // MachineSDNode, reallocate the operand list. 5426 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5427 if (MN->OperandsNeedDelete) 5428 delete[] MN->OperandList; 5429 if (NumOps > array_lengthof(MN->LocalOperands)) 5430 // We're creating a final node that will live unmorphed for the 5431 // remainder of the current SelectionDAG iteration, so we can allocate 5432 // the operands directly out of a pool with no recycling metadata. 5433 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5434 Ops, NumOps); 5435 else 5436 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5437 MN->OperandsNeedDelete = false; 5438 } else 5439 MN->InitOperands(MN->OperandList, Ops, NumOps); 5440 } else { 5441 // If NumOps is larger than the # of operands we currently have, reallocate 5442 // the operand list. 5443 if (NumOps > N->NumOperands) { 5444 if (N->OperandsNeedDelete) 5445 delete[] N->OperandList; 5446 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5447 N->OperandsNeedDelete = true; 5448 } else 5449 N->InitOperands(N->OperandList, Ops, NumOps); 5450 } 5451 5452 // Delete any nodes that are still dead after adding the uses for the 5453 // new operands. 5454 if (!DeadNodeSet.empty()) { 5455 SmallVector<SDNode *, 16> DeadNodes; 5456 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5457 E = DeadNodeSet.end(); I != E; ++I) 5458 if ((*I)->use_empty()) 5459 DeadNodes.push_back(*I); 5460 RemoveDeadNodes(DeadNodes); 5461 } 5462 5463 if (IP) 5464 CSEMap.InsertNode(N, IP); // Memoize the new node. 5465 return N; 5466} 5467 5468 5469/// getMachineNode - These are used for target selectors to create a new node 5470/// with specified return type(s), MachineInstr opcode, and operands. 5471/// 5472/// Note that getMachineNode returns the resultant node. If there is already a 5473/// node of the specified opcode and operands, it returns that node instead of 5474/// the current one. 5475MachineSDNode * 5476SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) { 5477 SDVTList VTs = getVTList(VT); 5478 return getMachineNode(Opcode, dl, VTs, None); 5479} 5480 5481MachineSDNode * 5482SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) { 5483 SDVTList VTs = getVTList(VT); 5484 SDValue Ops[] = { Op1 }; 5485 return getMachineNode(Opcode, dl, VTs, Ops); 5486} 5487 5488MachineSDNode * 5489SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5490 SDValue Op1, SDValue Op2) { 5491 SDVTList VTs = getVTList(VT); 5492 SDValue Ops[] = { Op1, Op2 }; 5493 return getMachineNode(Opcode, dl, VTs, Ops); 5494} 5495 5496MachineSDNode * 5497SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5498 SDValue Op1, SDValue Op2, SDValue Op3) { 5499 SDVTList VTs = getVTList(VT); 5500 SDValue Ops[] = { Op1, Op2, Op3 }; 5501 return getMachineNode(Opcode, dl, VTs, Ops); 5502} 5503 5504MachineSDNode * 5505SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5506 ArrayRef<SDValue> Ops) { 5507 SDVTList VTs = getVTList(VT); 5508 return getMachineNode(Opcode, dl, VTs, Ops); 5509} 5510 5511MachineSDNode * 5512SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) { 5513 SDVTList VTs = getVTList(VT1, VT2); 5514 return getMachineNode(Opcode, dl, VTs, None); 5515} 5516 5517MachineSDNode * 5518SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5519 EVT VT1, EVT VT2, SDValue Op1) { 5520 SDVTList VTs = getVTList(VT1, VT2); 5521 SDValue Ops[] = { Op1 }; 5522 return getMachineNode(Opcode, dl, VTs, Ops); 5523} 5524 5525MachineSDNode * 5526SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5527 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5528 SDVTList VTs = getVTList(VT1, VT2); 5529 SDValue Ops[] = { Op1, Op2 }; 5530 return getMachineNode(Opcode, dl, VTs, Ops); 5531} 5532 5533MachineSDNode * 5534SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5535 EVT VT1, EVT VT2, SDValue Op1, 5536 SDValue Op2, SDValue Op3) { 5537 SDVTList VTs = getVTList(VT1, VT2); 5538 SDValue Ops[] = { Op1, Op2, Op3 }; 5539 return getMachineNode(Opcode, dl, VTs, Ops); 5540} 5541 5542MachineSDNode * 5543SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5544 EVT VT1, EVT VT2, 5545 ArrayRef<SDValue> Ops) { 5546 SDVTList VTs = getVTList(VT1, VT2); 5547 return getMachineNode(Opcode, dl, VTs, Ops); 5548} 5549 5550MachineSDNode * 5551SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5552 EVT VT1, EVT VT2, EVT VT3, 5553 SDValue Op1, SDValue Op2) { 5554 SDVTList VTs = getVTList(VT1, VT2, VT3); 5555 SDValue Ops[] = { Op1, Op2 }; 5556 return getMachineNode(Opcode, dl, VTs, Ops); 5557} 5558 5559MachineSDNode * 5560SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5561 EVT VT1, EVT VT2, EVT VT3, 5562 SDValue Op1, SDValue Op2, SDValue Op3) { 5563 SDVTList VTs = getVTList(VT1, VT2, VT3); 5564 SDValue Ops[] = { Op1, Op2, Op3 }; 5565 return getMachineNode(Opcode, dl, VTs, Ops); 5566} 5567 5568MachineSDNode * 5569SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5570 EVT VT1, EVT VT2, EVT VT3, 5571 ArrayRef<SDValue> Ops) { 5572 SDVTList VTs = getVTList(VT1, VT2, VT3); 5573 return getMachineNode(Opcode, dl, VTs, Ops); 5574} 5575 5576MachineSDNode * 5577SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, 5578 EVT VT2, EVT VT3, EVT VT4, 5579 ArrayRef<SDValue> Ops) { 5580 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5581 return getMachineNode(Opcode, dl, VTs, Ops); 5582} 5583 5584MachineSDNode * 5585SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5586 ArrayRef<EVT> ResultTys, 5587 ArrayRef<SDValue> Ops) { 5588 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5589 return getMachineNode(Opcode, dl, VTs, Ops); 5590} 5591 5592MachineSDNode * 5593SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 5594 ArrayRef<SDValue> OpsArray) { 5595 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5596 MachineSDNode *N; 5597 void *IP = 0; 5598 const SDValue *Ops = OpsArray.data(); 5599 unsigned NumOps = OpsArray.size(); 5600 5601 if (DoCSE) { 5602 FoldingSetNodeID ID; 5603 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5604 IP = 0; 5605 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5606 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL)); 5607 } 5608 } 5609 5610 // Allocate a new MachineSDNode. 5611 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(), 5612 DL.getDebugLoc(), VTs); 5613 5614 // Initialize the operands list. 5615 if (NumOps > array_lengthof(N->LocalOperands)) 5616 // We're creating a final node that will live unmorphed for the 5617 // remainder of the current SelectionDAG iteration, so we can allocate 5618 // the operands directly out of a pool with no recycling metadata. 5619 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5620 Ops, NumOps); 5621 else 5622 N->InitOperands(N->LocalOperands, Ops, NumOps); 5623 N->OperandsNeedDelete = false; 5624 5625 if (DoCSE) 5626 CSEMap.InsertNode(N, IP); 5627 5628 AllNodes.push_back(N); 5629#ifndef NDEBUG 5630 VerifyMachineNode(N); 5631#endif 5632 return N; 5633} 5634 5635/// getTargetExtractSubreg - A convenience function for creating 5636/// TargetOpcode::EXTRACT_SUBREG nodes. 5637SDValue 5638SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, 5639 SDValue Operand) { 5640 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5641 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5642 VT, Operand, SRIdxVal); 5643 return SDValue(Subreg, 0); 5644} 5645 5646/// getTargetInsertSubreg - A convenience function for creating 5647/// TargetOpcode::INSERT_SUBREG nodes. 5648SDValue 5649SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, 5650 SDValue Operand, SDValue Subreg) { 5651 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5652 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5653 VT, Operand, Subreg, SRIdxVal); 5654 return SDValue(Result, 0); 5655} 5656 5657/// getNodeIfExists - Get the specified node if it's already available, or 5658/// else return NULL. 5659SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5660 const SDValue *Ops, unsigned NumOps) { 5661 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5662 FoldingSetNodeID ID; 5663 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5664 void *IP = 0; 5665 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5666 return E; 5667 } 5668 return NULL; 5669} 5670 5671/// getDbgValue - Creates a SDDbgValue node. 5672/// 5673SDDbgValue * 5674SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5675 DebugLoc DL, unsigned O) { 5676 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5677} 5678 5679SDDbgValue * 5680SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5681 DebugLoc DL, unsigned O) { 5682 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5683} 5684 5685SDDbgValue * 5686SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5687 DebugLoc DL, unsigned O) { 5688 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5689} 5690 5691namespace { 5692 5693/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5694/// pointed to by a use iterator is deleted, increment the use iterator 5695/// so that it doesn't dangle. 5696/// 5697class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5698 SDNode::use_iterator &UI; 5699 SDNode::use_iterator &UE; 5700 5701 void NodeDeleted(SDNode *N, SDNode *E) override { 5702 // Increment the iterator as needed. 5703 while (UI != UE && N == *UI) 5704 ++UI; 5705 } 5706 5707public: 5708 RAUWUpdateListener(SelectionDAG &d, 5709 SDNode::use_iterator &ui, 5710 SDNode::use_iterator &ue) 5711 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5712}; 5713 5714} 5715 5716/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5717/// This can cause recursive merging of nodes in the DAG. 5718/// 5719/// This version assumes From has a single result value. 5720/// 5721void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5722 SDNode *From = FromN.getNode(); 5723 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5724 "Cannot replace with this method!"); 5725 assert(From != To.getNode() && "Cannot replace uses of with self"); 5726 5727 // Iterate over all the existing uses of From. New uses will be added 5728 // to the beginning of the use list, which we avoid visiting. 5729 // This specifically avoids visiting uses of From that arise while the 5730 // replacement is happening, because any such uses would be the result 5731 // of CSE: If an existing node looks like From after one of its operands 5732 // is replaced by To, we don't want to replace of all its users with To 5733 // too. See PR3018 for more info. 5734 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5735 RAUWUpdateListener Listener(*this, UI, UE); 5736 while (UI != UE) { 5737 SDNode *User = *UI; 5738 5739 // This node is about to morph, remove its old self from the CSE maps. 5740 RemoveNodeFromCSEMaps(User); 5741 5742 // A user can appear in a use list multiple times, and when this 5743 // happens the uses are usually next to each other in the list. 5744 // To help reduce the number of CSE recomputations, process all 5745 // the uses of this user that we can find this way. 5746 do { 5747 SDUse &Use = UI.getUse(); 5748 ++UI; 5749 Use.set(To); 5750 } while (UI != UE && *UI == User); 5751 5752 // Now that we have modified User, add it back to the CSE maps. If it 5753 // already exists there, recursively merge the results together. 5754 AddModifiedNodeToCSEMaps(User); 5755 } 5756 5757 // If we just RAUW'd the root, take note. 5758 if (FromN == getRoot()) 5759 setRoot(To); 5760} 5761 5762/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5763/// This can cause recursive merging of nodes in the DAG. 5764/// 5765/// This version assumes that for each value of From, there is a 5766/// corresponding value in To in the same position with the same type. 5767/// 5768void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5769#ifndef NDEBUG 5770 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5771 assert((!From->hasAnyUseOfValue(i) || 5772 From->getValueType(i) == To->getValueType(i)) && 5773 "Cannot use this version of ReplaceAllUsesWith!"); 5774#endif 5775 5776 // Handle the trivial case. 5777 if (From == To) 5778 return; 5779 5780 // Iterate over just the existing users of From. See the comments in 5781 // the ReplaceAllUsesWith above. 5782 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5783 RAUWUpdateListener Listener(*this, UI, UE); 5784 while (UI != UE) { 5785 SDNode *User = *UI; 5786 5787 // This node is about to morph, remove its old self from the CSE maps. 5788 RemoveNodeFromCSEMaps(User); 5789 5790 // A user can appear in a use list multiple times, and when this 5791 // happens the uses are usually next to each other in the list. 5792 // To help reduce the number of CSE recomputations, process all 5793 // the uses of this user that we can find this way. 5794 do { 5795 SDUse &Use = UI.getUse(); 5796 ++UI; 5797 Use.setNode(To); 5798 } while (UI != UE && *UI == User); 5799 5800 // Now that we have modified User, add it back to the CSE maps. If it 5801 // already exists there, recursively merge the results together. 5802 AddModifiedNodeToCSEMaps(User); 5803 } 5804 5805 // If we just RAUW'd the root, take note. 5806 if (From == getRoot().getNode()) 5807 setRoot(SDValue(To, getRoot().getResNo())); 5808} 5809 5810/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5811/// This can cause recursive merging of nodes in the DAG. 5812/// 5813/// This version can replace From with any result values. To must match the 5814/// number and types of values returned by From. 5815void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5816 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5817 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5818 5819 // Iterate over just the existing users of From. See the comments in 5820 // the ReplaceAllUsesWith above. 5821 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5822 RAUWUpdateListener Listener(*this, UI, UE); 5823 while (UI != UE) { 5824 SDNode *User = *UI; 5825 5826 // This node is about to morph, remove its old self from the CSE maps. 5827 RemoveNodeFromCSEMaps(User); 5828 5829 // A user can appear in a use list multiple times, and when this 5830 // happens the uses are usually next to each other in the list. 5831 // To help reduce the number of CSE recomputations, process all 5832 // the uses of this user that we can find this way. 5833 do { 5834 SDUse &Use = UI.getUse(); 5835 const SDValue &ToOp = To[Use.getResNo()]; 5836 ++UI; 5837 Use.set(ToOp); 5838 } while (UI != UE && *UI == User); 5839 5840 // Now that we have modified User, add it back to the CSE maps. If it 5841 // already exists there, recursively merge the results together. 5842 AddModifiedNodeToCSEMaps(User); 5843 } 5844 5845 // If we just RAUW'd the root, take note. 5846 if (From == getRoot().getNode()) 5847 setRoot(SDValue(To[getRoot().getResNo()])); 5848} 5849 5850/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5851/// uses of other values produced by From.getNode() alone. The Deleted 5852/// vector is handled the same way as for ReplaceAllUsesWith. 5853void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5854 // Handle the really simple, really trivial case efficiently. 5855 if (From == To) return; 5856 5857 // Handle the simple, trivial, case efficiently. 5858 if (From.getNode()->getNumValues() == 1) { 5859 ReplaceAllUsesWith(From, To); 5860 return; 5861 } 5862 5863 // Iterate over just the existing users of From. See the comments in 5864 // the ReplaceAllUsesWith above. 5865 SDNode::use_iterator UI = From.getNode()->use_begin(), 5866 UE = From.getNode()->use_end(); 5867 RAUWUpdateListener Listener(*this, UI, UE); 5868 while (UI != UE) { 5869 SDNode *User = *UI; 5870 bool UserRemovedFromCSEMaps = false; 5871 5872 // A user can appear in a use list multiple times, and when this 5873 // happens the uses are usually next to each other in the list. 5874 // To help reduce the number of CSE recomputations, process all 5875 // the uses of this user that we can find this way. 5876 do { 5877 SDUse &Use = UI.getUse(); 5878 5879 // Skip uses of different values from the same node. 5880 if (Use.getResNo() != From.getResNo()) { 5881 ++UI; 5882 continue; 5883 } 5884 5885 // If this node hasn't been modified yet, it's still in the CSE maps, 5886 // so remove its old self from the CSE maps. 5887 if (!UserRemovedFromCSEMaps) { 5888 RemoveNodeFromCSEMaps(User); 5889 UserRemovedFromCSEMaps = true; 5890 } 5891 5892 ++UI; 5893 Use.set(To); 5894 } while (UI != UE && *UI == User); 5895 5896 // We are iterating over all uses of the From node, so if a use 5897 // doesn't use the specific value, no changes are made. 5898 if (!UserRemovedFromCSEMaps) 5899 continue; 5900 5901 // Now that we have modified User, add it back to the CSE maps. If it 5902 // already exists there, recursively merge the results together. 5903 AddModifiedNodeToCSEMaps(User); 5904 } 5905 5906 // If we just RAUW'd the root, take note. 5907 if (From == getRoot()) 5908 setRoot(To); 5909} 5910 5911namespace { 5912 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5913 /// to record information about a use. 5914 struct UseMemo { 5915 SDNode *User; 5916 unsigned Index; 5917 SDUse *Use; 5918 }; 5919 5920 /// operator< - Sort Memos by User. 5921 bool operator<(const UseMemo &L, const UseMemo &R) { 5922 return (intptr_t)L.User < (intptr_t)R.User; 5923 } 5924} 5925 5926/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5927/// uses of other values produced by From.getNode() alone. The same value 5928/// may appear in both the From and To list. The Deleted vector is 5929/// handled the same way as for ReplaceAllUsesWith. 5930void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5931 const SDValue *To, 5932 unsigned Num){ 5933 // Handle the simple, trivial case efficiently. 5934 if (Num == 1) 5935 return ReplaceAllUsesOfValueWith(*From, *To); 5936 5937 // Read up all the uses and make records of them. This helps 5938 // processing new uses that are introduced during the 5939 // replacement process. 5940 SmallVector<UseMemo, 4> Uses; 5941 for (unsigned i = 0; i != Num; ++i) { 5942 unsigned FromResNo = From[i].getResNo(); 5943 SDNode *FromNode = From[i].getNode(); 5944 for (SDNode::use_iterator UI = FromNode->use_begin(), 5945 E = FromNode->use_end(); UI != E; ++UI) { 5946 SDUse &Use = UI.getUse(); 5947 if (Use.getResNo() == FromResNo) { 5948 UseMemo Memo = { *UI, i, &Use }; 5949 Uses.push_back(Memo); 5950 } 5951 } 5952 } 5953 5954 // Sort the uses, so that all the uses from a given User are together. 5955 std::sort(Uses.begin(), Uses.end()); 5956 5957 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5958 UseIndex != UseIndexEnd; ) { 5959 // We know that this user uses some value of From. If it is the right 5960 // value, update it. 5961 SDNode *User = Uses[UseIndex].User; 5962 5963 // This node is about to morph, remove its old self from the CSE maps. 5964 RemoveNodeFromCSEMaps(User); 5965 5966 // The Uses array is sorted, so all the uses for a given User 5967 // are next to each other in the list. 5968 // To help reduce the number of CSE recomputations, process all 5969 // the uses of this user that we can find this way. 5970 do { 5971 unsigned i = Uses[UseIndex].Index; 5972 SDUse &Use = *Uses[UseIndex].Use; 5973 ++UseIndex; 5974 5975 Use.set(To[i]); 5976 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5977 5978 // Now that we have modified User, add it back to the CSE maps. If it 5979 // already exists there, recursively merge the results together. 5980 AddModifiedNodeToCSEMaps(User); 5981 } 5982} 5983 5984/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5985/// based on their topological order. It returns the maximum id and a vector 5986/// of the SDNodes* in assigned order by reference. 5987unsigned SelectionDAG::AssignTopologicalOrder() { 5988 5989 unsigned DAGSize = 0; 5990 5991 // SortedPos tracks the progress of the algorithm. Nodes before it are 5992 // sorted, nodes after it are unsorted. When the algorithm completes 5993 // it is at the end of the list. 5994 allnodes_iterator SortedPos = allnodes_begin(); 5995 5996 // Visit all the nodes. Move nodes with no operands to the front of 5997 // the list immediately. Annotate nodes that do have operands with their 5998 // operand count. Before we do this, the Node Id fields of the nodes 5999 // may contain arbitrary values. After, the Node Id fields for nodes 6000 // before SortedPos will contain the topological sort index, and the 6001 // Node Id fields for nodes At SortedPos and after will contain the 6002 // count of outstanding operands. 6003 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 6004 SDNode *N = I++; 6005 checkForCycles(N); 6006 unsigned Degree = N->getNumOperands(); 6007 if (Degree == 0) { 6008 // A node with no uses, add it to the result array immediately. 6009 N->setNodeId(DAGSize++); 6010 allnodes_iterator Q = N; 6011 if (Q != SortedPos) 6012 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 6013 assert(SortedPos != AllNodes.end() && "Overran node list"); 6014 ++SortedPos; 6015 } else { 6016 // Temporarily use the Node Id as scratch space for the degree count. 6017 N->setNodeId(Degree); 6018 } 6019 } 6020 6021 // Visit all the nodes. As we iterate, move nodes into sorted order, 6022 // such that by the time the end is reached all nodes will be sorted. 6023 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 6024 SDNode *N = I; 6025 checkForCycles(N); 6026 // N is in sorted position, so all its uses have one less operand 6027 // that needs to be sorted. 6028 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 6029 UI != UE; ++UI) { 6030 SDNode *P = *UI; 6031 unsigned Degree = P->getNodeId(); 6032 assert(Degree != 0 && "Invalid node degree"); 6033 --Degree; 6034 if (Degree == 0) { 6035 // All of P's operands are sorted, so P may sorted now. 6036 P->setNodeId(DAGSize++); 6037 if (P != SortedPos) 6038 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 6039 assert(SortedPos != AllNodes.end() && "Overran node list"); 6040 ++SortedPos; 6041 } else { 6042 // Update P's outstanding operand count. 6043 P->setNodeId(Degree); 6044 } 6045 } 6046 if (I == SortedPos) { 6047#ifndef NDEBUG 6048 SDNode *S = ++I; 6049 dbgs() << "Overran sorted position:\n"; 6050 S->dumprFull(); 6051#endif 6052 llvm_unreachable(0); 6053 } 6054 } 6055 6056 assert(SortedPos == AllNodes.end() && 6057 "Topological sort incomplete!"); 6058 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 6059 "First node in topological sort is not the entry token!"); 6060 assert(AllNodes.front().getNodeId() == 0 && 6061 "First node in topological sort has non-zero id!"); 6062 assert(AllNodes.front().getNumOperands() == 0 && 6063 "First node in topological sort has operands!"); 6064 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 6065 "Last node in topologic sort has unexpected id!"); 6066 assert(AllNodes.back().use_empty() && 6067 "Last node in topologic sort has users!"); 6068 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 6069 return DAGSize; 6070} 6071 6072/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 6073/// value is produced by SD. 6074void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 6075 DbgInfo->add(DB, SD, isParameter); 6076 if (SD) 6077 SD->setHasDebugValue(true); 6078} 6079 6080/// TransferDbgValues - Transfer SDDbgValues. 6081void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 6082 if (From == To || !From.getNode()->getHasDebugValue()) 6083 return; 6084 SDNode *FromNode = From.getNode(); 6085 SDNode *ToNode = To.getNode(); 6086 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 6087 SmallVector<SDDbgValue *, 2> ClonedDVs; 6088 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 6089 I != E; ++I) { 6090 SDDbgValue *Dbg = *I; 6091 if (Dbg->getKind() == SDDbgValue::SDNODE) { 6092 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 6093 Dbg->getOffset(), Dbg->getDebugLoc(), 6094 Dbg->getOrder()); 6095 ClonedDVs.push_back(Clone); 6096 } 6097 } 6098 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(), 6099 E = ClonedDVs.end(); I != E; ++I) 6100 AddDbgValue(*I, ToNode, false); 6101} 6102 6103//===----------------------------------------------------------------------===// 6104// SDNode Class 6105//===----------------------------------------------------------------------===// 6106 6107HandleSDNode::~HandleSDNode() { 6108 DropOperands(); 6109} 6110 6111GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order, 6112 DebugLoc DL, const GlobalValue *GA, 6113 EVT VT, int64_t o, unsigned char TF) 6114 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 6115 TheGlobal = GA; 6116} 6117 6118AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT, 6119 SDValue X, unsigned SrcAS, 6120 unsigned DestAS) 6121 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X), 6122 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {} 6123 6124MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, 6125 EVT memvt, MachineMemOperand *mmo) 6126 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) { 6127 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 6128 MMO->isNonTemporal(), MMO->isInvariant()); 6129 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 6130 assert(isNonTemporal() == MMO->isNonTemporal() && 6131 "Non-temporal encoding error!"); 6132 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 6133} 6134 6135MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, 6136 const SDValue *Ops, unsigned NumOps, EVT memvt, 6137 MachineMemOperand *mmo) 6138 : SDNode(Opc, Order, dl, VTs, Ops, NumOps), 6139 MemoryVT(memvt), MMO(mmo) { 6140 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 6141 MMO->isNonTemporal(), MMO->isInvariant()); 6142 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 6143 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 6144} 6145 6146/// Profile - Gather unique data for the node. 6147/// 6148void SDNode::Profile(FoldingSetNodeID &ID) const { 6149 AddNodeIDNode(ID, this); 6150} 6151 6152namespace { 6153 struct EVTArray { 6154 std::vector<EVT> VTs; 6155 6156 EVTArray() { 6157 VTs.reserve(MVT::LAST_VALUETYPE); 6158 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 6159 VTs.push_back(MVT((MVT::SimpleValueType)i)); 6160 } 6161 }; 6162} 6163 6164static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 6165static ManagedStatic<EVTArray> SimpleVTArray; 6166static ManagedStatic<sys::SmartMutex<true> > VTMutex; 6167 6168/// getValueTypeList - Return a pointer to the specified value type. 6169/// 6170const EVT *SDNode::getValueTypeList(EVT VT) { 6171 if (VT.isExtended()) { 6172 sys::SmartScopedLock<true> Lock(*VTMutex); 6173 return &(*EVTs->insert(VT).first); 6174 } else { 6175 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 6176 "Value type out of range!"); 6177 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 6178 } 6179} 6180 6181/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 6182/// indicated value. This method ignores uses of other values defined by this 6183/// operation. 6184bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 6185 assert(Value < getNumValues() && "Bad value!"); 6186 6187 // TODO: Only iterate over uses of a given value of the node 6188 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 6189 if (UI.getUse().getResNo() == Value) { 6190 if (NUses == 0) 6191 return false; 6192 --NUses; 6193 } 6194 } 6195 6196 // Found exactly the right number of uses? 6197 return NUses == 0; 6198} 6199 6200 6201/// hasAnyUseOfValue - Return true if there are any use of the indicated 6202/// value. This method ignores uses of other values defined by this operation. 6203bool SDNode::hasAnyUseOfValue(unsigned Value) const { 6204 assert(Value < getNumValues() && "Bad value!"); 6205 6206 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 6207 if (UI.getUse().getResNo() == Value) 6208 return true; 6209 6210 return false; 6211} 6212 6213 6214/// isOnlyUserOf - Return true if this node is the only use of N. 6215/// 6216bool SDNode::isOnlyUserOf(SDNode *N) const { 6217 bool Seen = false; 6218 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 6219 SDNode *User = *I; 6220 if (User == this) 6221 Seen = true; 6222 else 6223 return false; 6224 } 6225 6226 return Seen; 6227} 6228 6229/// isOperand - Return true if this node is an operand of N. 6230/// 6231bool SDValue::isOperandOf(SDNode *N) const { 6232 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6233 if (*this == N->getOperand(i)) 6234 return true; 6235 return false; 6236} 6237 6238bool SDNode::isOperandOf(SDNode *N) const { 6239 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 6240 if (this == N->OperandList[i].getNode()) 6241 return true; 6242 return false; 6243} 6244 6245/// reachesChainWithoutSideEffects - Return true if this operand (which must 6246/// be a chain) reaches the specified operand without crossing any 6247/// side-effecting instructions on any chain path. In practice, this looks 6248/// through token factors and non-volatile loads. In order to remain efficient, 6249/// this only looks a couple of nodes in, it does not do an exhaustive search. 6250bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 6251 unsigned Depth) const { 6252 if (*this == Dest) return true; 6253 6254 // Don't search too deeply, we just want to be able to see through 6255 // TokenFactor's etc. 6256 if (Depth == 0) return false; 6257 6258 // If this is a token factor, all inputs to the TF happen in parallel. If any 6259 // of the operands of the TF does not reach dest, then we cannot do the xform. 6260 if (getOpcode() == ISD::TokenFactor) { 6261 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 6262 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 6263 return false; 6264 return true; 6265 } 6266 6267 // Loads don't have side effects, look through them. 6268 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 6269 if (!Ld->isVolatile()) 6270 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 6271 } 6272 return false; 6273} 6274 6275/// hasPredecessor - Return true if N is a predecessor of this node. 6276/// N is either an operand of this node, or can be reached by recursively 6277/// traversing up the operands. 6278/// NOTE: This is an expensive method. Use it carefully. 6279bool SDNode::hasPredecessor(const SDNode *N) const { 6280 SmallPtrSet<const SDNode *, 32> Visited; 6281 SmallVector<const SDNode *, 16> Worklist; 6282 return hasPredecessorHelper(N, Visited, Worklist); 6283} 6284 6285bool 6286SDNode::hasPredecessorHelper(const SDNode *N, 6287 SmallPtrSet<const SDNode *, 32> &Visited, 6288 SmallVectorImpl<const SDNode *> &Worklist) const { 6289 if (Visited.empty()) { 6290 Worklist.push_back(this); 6291 } else { 6292 // Take a look in the visited set. If we've already encountered this node 6293 // we needn't search further. 6294 if (Visited.count(N)) 6295 return true; 6296 } 6297 6298 // Haven't visited N yet. Continue the search. 6299 while (!Worklist.empty()) { 6300 const SDNode *M = Worklist.pop_back_val(); 6301 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 6302 SDNode *Op = M->getOperand(i).getNode(); 6303 if (Visited.insert(Op)) 6304 Worklist.push_back(Op); 6305 if (Op == N) 6306 return true; 6307 } 6308 } 6309 6310 return false; 6311} 6312 6313uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 6314 assert(Num < NumOperands && "Invalid child # of SDNode!"); 6315 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 6316} 6317 6318SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6319 assert(N->getNumValues() == 1 && 6320 "Can't unroll a vector with multiple results!"); 6321 6322 EVT VT = N->getValueType(0); 6323 unsigned NE = VT.getVectorNumElements(); 6324 EVT EltVT = VT.getVectorElementType(); 6325 SDLoc dl(N); 6326 6327 SmallVector<SDValue, 8> Scalars; 6328 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6329 6330 // If ResNE is 0, fully unroll the vector op. 6331 if (ResNE == 0) 6332 ResNE = NE; 6333 else if (NE > ResNE) 6334 NE = ResNE; 6335 6336 unsigned i; 6337 for (i= 0; i != NE; ++i) { 6338 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6339 SDValue Operand = N->getOperand(j); 6340 EVT OperandVT = Operand.getValueType(); 6341 if (OperandVT.isVector()) { 6342 // A vector operand; extract a single element. 6343 const TargetLowering *TLI = TM.getTargetLowering(); 6344 EVT OperandEltVT = OperandVT.getVectorElementType(); 6345 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6346 OperandEltVT, 6347 Operand, 6348 getConstant(i, TLI->getVectorIdxTy())); 6349 } else { 6350 // A scalar operand; just use it as is. 6351 Operands[j] = Operand; 6352 } 6353 } 6354 6355 switch (N->getOpcode()) { 6356 default: 6357 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6358 &Operands[0], Operands.size())); 6359 break; 6360 case ISD::VSELECT: 6361 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6362 &Operands[0], Operands.size())); 6363 break; 6364 case ISD::SHL: 6365 case ISD::SRA: 6366 case ISD::SRL: 6367 case ISD::ROTL: 6368 case ISD::ROTR: 6369 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6370 getShiftAmountOperand(Operands[0].getValueType(), 6371 Operands[1]))); 6372 break; 6373 case ISD::SIGN_EXTEND_INREG: 6374 case ISD::FP_ROUND_INREG: { 6375 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6376 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6377 Operands[0], 6378 getValueType(ExtVT))); 6379 } 6380 } 6381 } 6382 6383 for (; i < ResNE; ++i) 6384 Scalars.push_back(getUNDEF(EltVT)); 6385 6386 return getNode(ISD::BUILD_VECTOR, dl, 6387 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6388 &Scalars[0], Scalars.size()); 6389} 6390 6391 6392/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6393/// location that is 'Dist' units away from the location that the 'Base' load 6394/// is loading from. 6395bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6396 unsigned Bytes, int Dist) const { 6397 if (LD->getChain() != Base->getChain()) 6398 return false; 6399 EVT VT = LD->getValueType(0); 6400 if (VT.getSizeInBits() / 8 != Bytes) 6401 return false; 6402 6403 SDValue Loc = LD->getOperand(1); 6404 SDValue BaseLoc = Base->getOperand(1); 6405 if (Loc.getOpcode() == ISD::FrameIndex) { 6406 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6407 return false; 6408 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6409 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6410 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6411 int FS = MFI->getObjectSize(FI); 6412 int BFS = MFI->getObjectSize(BFI); 6413 if (FS != BFS || FS != (int)Bytes) return false; 6414 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6415 } 6416 6417 // Handle X+C 6418 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6419 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6420 return true; 6421 6422 const GlobalValue *GV1 = NULL; 6423 const GlobalValue *GV2 = NULL; 6424 int64_t Offset1 = 0; 6425 int64_t Offset2 = 0; 6426 const TargetLowering *TLI = TM.getTargetLowering(); 6427 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6428 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6429 if (isGA1 && isGA2 && GV1 == GV2) 6430 return Offset1 == (Offset2 + Dist*Bytes); 6431 return false; 6432} 6433 6434 6435/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6436/// it cannot be inferred. 6437unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6438 // If this is a GlobalAddress + cst, return the alignment. 6439 const GlobalValue *GV; 6440 int64_t GVOffset = 0; 6441 const TargetLowering *TLI = TM.getTargetLowering(); 6442 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6443 unsigned PtrWidth = TLI->getPointerTypeSizeInBits(GV->getType()); 6444 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6445 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6446 TLI->getDataLayout()); 6447 unsigned AlignBits = KnownZero.countTrailingOnes(); 6448 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6449 if (Align) 6450 return MinAlign(Align, GVOffset); 6451 } 6452 6453 // If this is a direct reference to a stack slot, use information about the 6454 // stack slot's alignment. 6455 int FrameIdx = 1 << 31; 6456 int64_t FrameOffset = 0; 6457 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6458 FrameIdx = FI->getIndex(); 6459 } else if (isBaseWithConstantOffset(Ptr) && 6460 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6461 // Handle FI+Cst 6462 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6463 FrameOffset = Ptr.getConstantOperandVal(1); 6464 } 6465 6466 if (FrameIdx != (1 << 31)) { 6467 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6468 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6469 FrameOffset); 6470 return FIInfoAlign; 6471 } 6472 6473 return 0; 6474} 6475 6476/// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type 6477/// which is split (or expanded) into two not necessarily identical pieces. 6478std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const { 6479 // Currently all types are split in half. 6480 EVT LoVT, HiVT; 6481 if (!VT.isVector()) { 6482 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT); 6483 } else { 6484 unsigned NumElements = VT.getVectorNumElements(); 6485 assert(!(NumElements & 1) && "Splitting vector, but not in half!"); 6486 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(), 6487 NumElements/2); 6488 } 6489 return std::make_pair(LoVT, HiVT); 6490} 6491 6492/// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the 6493/// low/high part. 6494std::pair<SDValue, SDValue> 6495SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT, 6496 const EVT &HiVT) { 6497 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <= 6498 N.getValueType().getVectorNumElements() && 6499 "More vector elements requested than available!"); 6500 SDValue Lo, Hi; 6501 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N, 6502 getConstant(0, TLI->getVectorIdxTy())); 6503 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N, 6504 getConstant(LoVT.getVectorNumElements(), TLI->getVectorIdxTy())); 6505 return std::make_pair(Lo, Hi); 6506} 6507 6508// getAddressSpace - Return the address space this GlobalAddress belongs to. 6509unsigned GlobalAddressSDNode::getAddressSpace() const { 6510 return getGlobal()->getType()->getAddressSpace(); 6511} 6512 6513 6514Type *ConstantPoolSDNode::getType() const { 6515 if (isMachineConstantPoolEntry()) 6516 return Val.MachineCPVal->getType(); 6517 return Val.ConstVal->getType(); 6518} 6519 6520bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6521 APInt &SplatUndef, 6522 unsigned &SplatBitSize, 6523 bool &HasAnyUndefs, 6524 unsigned MinSplatBits, 6525 bool isBigEndian) const { 6526 EVT VT = getValueType(0); 6527 assert(VT.isVector() && "Expected a vector type"); 6528 unsigned sz = VT.getSizeInBits(); 6529 if (MinSplatBits > sz) 6530 return false; 6531 6532 SplatValue = APInt(sz, 0); 6533 SplatUndef = APInt(sz, 0); 6534 6535 // Get the bits. Bits with undefined values (when the corresponding element 6536 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6537 // in SplatValue. If any of the values are not constant, give up and return 6538 // false. 6539 unsigned int nOps = getNumOperands(); 6540 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6541 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6542 6543 for (unsigned j = 0; j < nOps; ++j) { 6544 unsigned i = isBigEndian ? nOps-1-j : j; 6545 SDValue OpVal = getOperand(i); 6546 unsigned BitPos = j * EltBitSize; 6547 6548 if (OpVal.getOpcode() == ISD::UNDEF) 6549 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6550 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6551 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6552 zextOrTrunc(sz) << BitPos; 6553 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6554 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6555 else 6556 return false; 6557 } 6558 6559 // The build_vector is all constants or undefs. Find the smallest element 6560 // size that splats the vector. 6561 6562 HasAnyUndefs = (SplatUndef != 0); 6563 while (sz > 8) { 6564 6565 unsigned HalfSize = sz / 2; 6566 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6567 APInt LowValue = SplatValue.trunc(HalfSize); 6568 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6569 APInt LowUndef = SplatUndef.trunc(HalfSize); 6570 6571 // If the two halves do not match (ignoring undef bits), stop here. 6572 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6573 MinSplatBits > HalfSize) 6574 break; 6575 6576 SplatValue = HighValue | LowValue; 6577 SplatUndef = HighUndef & LowUndef; 6578 6579 sz = HalfSize; 6580 } 6581 6582 SplatBitSize = sz; 6583 return true; 6584} 6585 6586ConstantSDNode *BuildVectorSDNode::getConstantSplatValue() const { 6587 SDValue Op0 = getOperand(0); 6588 if (Op0.getOpcode() != ISD::Constant) 6589 return nullptr; 6590 6591 for (unsigned i = 1, e = getNumOperands(); i != e; ++i) 6592 if (getOperand(i) != Op0) 6593 return nullptr; 6594 6595 return cast<ConstantSDNode>(Op0); 6596} 6597 6598bool BuildVectorSDNode::isConstant() const { 6599 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6600 unsigned Opc = getOperand(i).getOpcode(); 6601 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP) 6602 return false; 6603 } 6604 return true; 6605} 6606 6607bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6608 // Find the first non-undef value in the shuffle mask. 6609 unsigned i, e; 6610 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6611 /* search */; 6612 6613 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6614 6615 // Make sure all remaining elements are either undef or the same as the first 6616 // non-undef value. 6617 for (int Idx = Mask[i]; i != e; ++i) 6618 if (Mask[i] >= 0 && Mask[i] != Idx) 6619 return false; 6620 return true; 6621} 6622 6623#ifdef XDEBUG 6624static void checkForCyclesHelper(const SDNode *N, 6625 SmallPtrSet<const SDNode*, 32> &Visited, 6626 SmallPtrSet<const SDNode*, 32> &Checked) { 6627 // If this node has already been checked, don't check it again. 6628 if (Checked.count(N)) 6629 return; 6630 6631 // If a node has already been visited on this depth-first walk, reject it as 6632 // a cycle. 6633 if (!Visited.insert(N)) { 6634 dbgs() << "Offending node:\n"; 6635 N->dumprFull(); 6636 errs() << "Detected cycle in SelectionDAG\n"; 6637 abort(); 6638 } 6639 6640 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6641 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6642 6643 Checked.insert(N); 6644 Visited.erase(N); 6645} 6646#endif 6647 6648void llvm::checkForCycles(const llvm::SDNode *N) { 6649#ifdef XDEBUG 6650 assert(N && "Checking nonexistent SDNode"); 6651 SmallPtrSet<const SDNode*, 32> visited; 6652 SmallPtrSet<const SDNode*, 32> checked; 6653 checkForCyclesHelper(N, visited, checked); 6654#endif 6655} 6656 6657void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6658 checkForCycles(DAG->getRoot().getNode()); 6659} 6660