SelectionDAG.cpp revision 509e84fa7146175c86dec5ef2167290f294dc89e
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Support/MathExtras.h" 28#include "llvm/Target/TargetRegisterInfo.h" 29#include "llvm/Target/TargetData.h" 30#include "llvm/Target/TargetLowering.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/ADT/SetVector.h" 34#include "llvm/ADT/SmallPtrSet.h" 35#include "llvm/ADT/SmallSet.h" 36#include "llvm/ADT/SmallVector.h" 37#include "llvm/ADT/StringExtras.h" 38#include <algorithm> 39#include <cmath> 40using namespace llvm; 41 42/// makeVTList - Return an instance of the SDVTList struct initialized with the 43/// specified members. 44static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 45 SDVTList Res = {VTs, NumVTs}; 46 return Res; 47} 48 49static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 50 switch (VT.getSimpleVT()) { 51 default: assert(0 && "Unknown FP format"); 52 case MVT::f32: return &APFloat::IEEEsingle; 53 case MVT::f64: return &APFloat::IEEEdouble; 54 case MVT::f80: return &APFloat::x87DoubleExtended; 55 case MVT::f128: return &APFloat::IEEEquad; 56 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 57 } 58} 59 60SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 61 62//===----------------------------------------------------------------------===// 63// ConstantFPSDNode Class 64//===----------------------------------------------------------------------===// 65 66/// isExactlyValue - We don't rely on operator== working on double values, as 67/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 68/// As such, this method can be used to do an exact bit-for-bit comparison of 69/// two floating point values. 70bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 71 return Value.bitwiseIsEqual(V); 72} 73 74bool ConstantFPSDNode::isValueValidForType(MVT VT, 75 const APFloat& Val) { 76 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 77 78 // PPC long double cannot be converted to any other type. 79 if (VT == MVT::ppcf128 || 80 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 81 return false; 82 83 // convert modifies in place, so make a copy. 84 APFloat Val2 = APFloat(Val); 85 return Val2.convert(*MVTToAPFloatSemantics(VT), 86 APFloat::rmNearestTiesToEven) == APFloat::opOK; 87} 88 89//===----------------------------------------------------------------------===// 90// ISD Namespace 91//===----------------------------------------------------------------------===// 92 93/// isBuildVectorAllOnes - Return true if the specified node is a 94/// BUILD_VECTOR where all of the elements are ~0 or undef. 95bool ISD::isBuildVectorAllOnes(const SDNode *N) { 96 // Look through a bit convert. 97 if (N->getOpcode() == ISD::BIT_CONVERT) 98 N = N->getOperand(0).Val; 99 100 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 101 102 unsigned i = 0, e = N->getNumOperands(); 103 104 // Skip over all of the undef values. 105 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 106 ++i; 107 108 // Do not accept an all-undef vector. 109 if (i == e) return false; 110 111 // Do not accept build_vectors that aren't all constants or which have non-~0 112 // elements. 113 SDValue NotZero = N->getOperand(i); 114 if (isa<ConstantSDNode>(NotZero)) { 115 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 116 return false; 117 } else if (isa<ConstantFPSDNode>(NotZero)) { 118 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 119 convertToAPInt().isAllOnesValue()) 120 return false; 121 } else 122 return false; 123 124 // Okay, we have at least one ~0 value, check to see if the rest match or are 125 // undefs. 126 for (++i; i != e; ++i) 127 if (N->getOperand(i) != NotZero && 128 N->getOperand(i).getOpcode() != ISD::UNDEF) 129 return false; 130 return true; 131} 132 133 134/// isBuildVectorAllZeros - Return true if the specified node is a 135/// BUILD_VECTOR where all of the elements are 0 or undef. 136bool ISD::isBuildVectorAllZeros(const SDNode *N) { 137 // Look through a bit convert. 138 if (N->getOpcode() == ISD::BIT_CONVERT) 139 N = N->getOperand(0).Val; 140 141 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 142 143 unsigned i = 0, e = N->getNumOperands(); 144 145 // Skip over all of the undef values. 146 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 147 ++i; 148 149 // Do not accept an all-undef vector. 150 if (i == e) return false; 151 152 // Do not accept build_vectors that aren't all constants or which have non-~0 153 // elements. 154 SDValue Zero = N->getOperand(i); 155 if (isa<ConstantSDNode>(Zero)) { 156 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 157 return false; 158 } else if (isa<ConstantFPSDNode>(Zero)) { 159 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 160 return false; 161 } else 162 return false; 163 164 // Okay, we have at least one ~0 value, check to see if the rest match or are 165 // undefs. 166 for (++i; i != e; ++i) 167 if (N->getOperand(i) != Zero && 168 N->getOperand(i).getOpcode() != ISD::UNDEF) 169 return false; 170 return true; 171} 172 173/// isScalarToVector - Return true if the specified node is a 174/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 175/// element is not an undef. 176bool ISD::isScalarToVector(const SDNode *N) { 177 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 178 return true; 179 180 if (N->getOpcode() != ISD::BUILD_VECTOR) 181 return false; 182 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 183 return false; 184 unsigned NumElems = N->getNumOperands(); 185 for (unsigned i = 1; i < NumElems; ++i) { 186 SDValue V = N->getOperand(i); 187 if (V.getOpcode() != ISD::UNDEF) 188 return false; 189 } 190 return true; 191} 192 193 194/// isDebugLabel - Return true if the specified node represents a debug 195/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 196bool ISD::isDebugLabel(const SDNode *N) { 197 SDValue Zero; 198 if (N->getOpcode() == ISD::DBG_LABEL) 199 return true; 200 if (N->isMachineOpcode() && 201 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 202 return true; 203 return false; 204} 205 206/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 207/// when given the operation for (X op Y). 208ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 209 // To perform this operation, we just need to swap the L and G bits of the 210 // operation. 211 unsigned OldL = (Operation >> 2) & 1; 212 unsigned OldG = (Operation >> 1) & 1; 213 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 214 (OldL << 1) | // New G bit 215 (OldG << 2)); // New L bit. 216} 217 218/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 219/// 'op' is a valid SetCC operation. 220ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 221 unsigned Operation = Op; 222 if (isInteger) 223 Operation ^= 7; // Flip L, G, E bits, but not U. 224 else 225 Operation ^= 15; // Flip all of the condition bits. 226 if (Operation > ISD::SETTRUE2) 227 Operation &= ~8; // Don't let N and U bits get set. 228 return ISD::CondCode(Operation); 229} 230 231 232/// isSignedOp - For an integer comparison, return 1 if the comparison is a 233/// signed operation and 2 if the result is an unsigned comparison. Return zero 234/// if the operation does not depend on the sign of the input (setne and seteq). 235static int isSignedOp(ISD::CondCode Opcode) { 236 switch (Opcode) { 237 default: assert(0 && "Illegal integer setcc operation!"); 238 case ISD::SETEQ: 239 case ISD::SETNE: return 0; 240 case ISD::SETLT: 241 case ISD::SETLE: 242 case ISD::SETGT: 243 case ISD::SETGE: return 1; 244 case ISD::SETULT: 245 case ISD::SETULE: 246 case ISD::SETUGT: 247 case ISD::SETUGE: return 2; 248 } 249} 250 251/// getSetCCOrOperation - Return the result of a logical OR between different 252/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 253/// returns SETCC_INVALID if it is not possible to represent the resultant 254/// comparison. 255ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 256 bool isInteger) { 257 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 258 // Cannot fold a signed integer setcc with an unsigned integer setcc. 259 return ISD::SETCC_INVALID; 260 261 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 262 263 // If the N and U bits get set then the resultant comparison DOES suddenly 264 // care about orderedness, and is true when ordered. 265 if (Op > ISD::SETTRUE2) 266 Op &= ~16; // Clear the U bit if the N bit is set. 267 268 // Canonicalize illegal integer setcc's. 269 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 270 Op = ISD::SETNE; 271 272 return ISD::CondCode(Op); 273} 274 275/// getSetCCAndOperation - Return the result of a logical AND between different 276/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 277/// function returns zero if it is not possible to represent the resultant 278/// comparison. 279ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 280 bool isInteger) { 281 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 282 // Cannot fold a signed setcc with an unsigned setcc. 283 return ISD::SETCC_INVALID; 284 285 // Combine all of the condition bits. 286 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 287 288 // Canonicalize illegal integer setcc's. 289 if (isInteger) { 290 switch (Result) { 291 default: break; 292 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 293 case ISD::SETOEQ: // SETEQ & SETU[LG]E 294 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 295 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 296 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 297 } 298 } 299 300 return Result; 301} 302 303const TargetMachine &SelectionDAG::getTarget() const { 304 return TLI.getTargetMachine(); 305} 306 307//===----------------------------------------------------------------------===// 308// SDNode Profile Support 309//===----------------------------------------------------------------------===// 310 311/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 312/// 313static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 314 ID.AddInteger(OpC); 315} 316 317/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 318/// solely with their pointer. 319static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 320 ID.AddPointer(VTList.VTs); 321} 322 323/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 324/// 325static void AddNodeIDOperands(FoldingSetNodeID &ID, 326 const SDValue *Ops, unsigned NumOps) { 327 for (; NumOps; --NumOps, ++Ops) { 328 ID.AddPointer(Ops->Val); 329 ID.AddInteger(Ops->ResNo); 330 } 331} 332 333/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 334/// 335static void AddNodeIDOperands(FoldingSetNodeID &ID, 336 const SDUse *Ops, unsigned NumOps) { 337 for (; NumOps; --NumOps, ++Ops) { 338 ID.AddPointer(Ops->getVal()); 339 ID.AddInteger(Ops->getSDValue().ResNo); 340 } 341} 342 343static void AddNodeIDNode(FoldingSetNodeID &ID, 344 unsigned short OpC, SDVTList VTList, 345 const SDValue *OpList, unsigned N) { 346 AddNodeIDOpcode(ID, OpC); 347 AddNodeIDValueTypes(ID, VTList); 348 AddNodeIDOperands(ID, OpList, N); 349} 350 351 352/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 353/// data. 354static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 355 AddNodeIDOpcode(ID, N->getOpcode()); 356 // Add the return value info. 357 AddNodeIDValueTypes(ID, N->getVTList()); 358 // Add the operand info. 359 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 360 361 // Handle SDNode leafs with special info. 362 switch (N->getOpcode()) { 363 default: break; // Normal nodes don't need extra info. 364 case ISD::ARG_FLAGS: 365 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 366 break; 367 case ISD::TargetConstant: 368 case ISD::Constant: 369 ID.Add(cast<ConstantSDNode>(N)->getAPIntValue()); 370 break; 371 case ISD::TargetConstantFP: 372 case ISD::ConstantFP: { 373 ID.Add(cast<ConstantFPSDNode>(N)->getValueAPF()); 374 break; 375 } 376 case ISD::TargetGlobalAddress: 377 case ISD::GlobalAddress: 378 case ISD::TargetGlobalTLSAddress: 379 case ISD::GlobalTLSAddress: { 380 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 381 ID.AddPointer(GA->getGlobal()); 382 ID.AddInteger(GA->getOffset()); 383 break; 384 } 385 case ISD::BasicBlock: 386 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 387 break; 388 case ISD::Register: 389 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 390 break; 391 case ISD::DBG_STOPPOINT: { 392 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 393 ID.AddInteger(DSP->getLine()); 394 ID.AddInteger(DSP->getColumn()); 395 ID.AddPointer(DSP->getCompileUnit()); 396 break; 397 } 398 case ISD::SRCVALUE: 399 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 400 break; 401 case ISD::MEMOPERAND: { 402 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 403 MO.Profile(ID); 404 break; 405 } 406 case ISD::FrameIndex: 407 case ISD::TargetFrameIndex: 408 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 409 break; 410 case ISD::JumpTable: 411 case ISD::TargetJumpTable: 412 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 413 break; 414 case ISD::ConstantPool: 415 case ISD::TargetConstantPool: { 416 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 417 ID.AddInteger(CP->getAlignment()); 418 ID.AddInteger(CP->getOffset()); 419 if (CP->isMachineConstantPoolEntry()) 420 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 421 else 422 ID.AddPointer(CP->getConstVal()); 423 break; 424 } 425 case ISD::LOAD: { 426 const LoadSDNode *LD = cast<LoadSDNode>(N); 427 ID.AddInteger(LD->getAddressingMode()); 428 ID.AddInteger(LD->getExtensionType()); 429 ID.AddInteger(LD->getMemoryVT().getRawBits()); 430 ID.AddInteger(LD->getRawFlags()); 431 break; 432 } 433 case ISD::STORE: { 434 const StoreSDNode *ST = cast<StoreSDNode>(N); 435 ID.AddInteger(ST->getAddressingMode()); 436 ID.AddInteger(ST->isTruncatingStore()); 437 ID.AddInteger(ST->getMemoryVT().getRawBits()); 438 ID.AddInteger(ST->getRawFlags()); 439 break; 440 } 441 case ISD::ATOMIC_CMP_SWAP: 442 case ISD::ATOMIC_LOAD_ADD: 443 case ISD::ATOMIC_SWAP: 444 case ISD::ATOMIC_LOAD_SUB: 445 case ISD::ATOMIC_LOAD_AND: 446 case ISD::ATOMIC_LOAD_OR: 447 case ISD::ATOMIC_LOAD_XOR: 448 case ISD::ATOMIC_LOAD_NAND: 449 case ISD::ATOMIC_LOAD_MIN: 450 case ISD::ATOMIC_LOAD_MAX: 451 case ISD::ATOMIC_LOAD_UMIN: 452 case ISD::ATOMIC_LOAD_UMAX: { 453 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 454 ID.AddInteger(AT->getRawFlags()); 455 break; 456 } 457 } // end switch (N->getOpcode()) 458} 459 460/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 461/// the CSE map that carries both alignment and volatility information. 462/// 463static unsigned encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 464 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 465} 466 467//===----------------------------------------------------------------------===// 468// SelectionDAG Class 469//===----------------------------------------------------------------------===// 470 471/// RemoveDeadNodes - This method deletes all unreachable nodes in the 472/// SelectionDAG. 473void SelectionDAG::RemoveDeadNodes() { 474 // Create a dummy node (which is not added to allnodes), that adds a reference 475 // to the root node, preventing it from being deleted. 476 HandleSDNode Dummy(getRoot()); 477 478 SmallVector<SDNode*, 128> DeadNodes; 479 480 // Add all obviously-dead nodes to the DeadNodes worklist. 481 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 482 if (I->use_empty()) 483 DeadNodes.push_back(I); 484 485 RemoveDeadNodes(DeadNodes); 486 487 // If the root changed (e.g. it was a dead load, update the root). 488 setRoot(Dummy.getValue()); 489} 490 491/// RemoveDeadNodes - This method deletes the unreachable nodes in the 492/// given list, and any nodes that become unreachable as a result. 493void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 494 DAGUpdateListener *UpdateListener) { 495 496 // Process the worklist, deleting the nodes and adding their uses to the 497 // worklist. 498 while (!DeadNodes.empty()) { 499 SDNode *N = DeadNodes.back(); 500 DeadNodes.pop_back(); 501 502 if (UpdateListener) 503 UpdateListener->NodeDeleted(N, 0); 504 505 // Take the node out of the appropriate CSE map. 506 RemoveNodeFromCSEMaps(N); 507 508 // Next, brutally remove the operand list. This is safe to do, as there are 509 // no cycles in the graph. 510 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 511 SDNode *Operand = I->getVal(); 512 Operand->removeUser(std::distance(N->op_begin(), I), N); 513 514 // Now that we removed this operand, see if there are no uses of it left. 515 if (Operand->use_empty()) 516 DeadNodes.push_back(Operand); 517 } 518 if (N->OperandsNeedDelete) { 519 delete[] N->OperandList; 520 } 521 N->OperandList = 0; 522 N->NumOperands = 0; 523 524 // Finally, remove N itself. 525 AllNodes.remove(N); 526 } 527} 528 529void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 530 SmallVector<SDNode*, 16> DeadNodes(1, N); 531 RemoveDeadNodes(DeadNodes, UpdateListener); 532} 533 534void SelectionDAG::DeleteNode(SDNode *N) { 535 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 536 537 // First take this out of the appropriate CSE map. 538 RemoveNodeFromCSEMaps(N); 539 540 // Finally, remove uses due to operands of this node, remove from the 541 // AllNodes list, and delete the node. 542 DeleteNodeNotInCSEMaps(N); 543} 544 545void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 546 547 // Drop all of the operands and decrement used nodes use counts. 548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 549 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 550 if (N->OperandsNeedDelete) { 551 delete[] N->OperandList; 552 } 553 N->OperandList = 0; 554 N->NumOperands = 0; 555 556 AllNodes.remove(N); 557} 558 559/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 560/// correspond to it. This is useful when we're about to delete or repurpose 561/// the node. We don't want future request for structurally identical nodes 562/// to return N anymore. 563void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 564 bool Erased = false; 565 switch (N->getOpcode()) { 566 case ISD::HANDLENODE: return; // noop. 567 case ISD::CONDCODE: 568 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 569 "Cond code doesn't exist!"); 570 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 571 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 572 break; 573 case ISD::ExternalSymbol: 574 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 575 break; 576 case ISD::TargetExternalSymbol: 577 Erased = 578 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 579 break; 580 case ISD::VALUETYPE: { 581 MVT VT = cast<VTSDNode>(N)->getVT(); 582 if (VT.isExtended()) { 583 Erased = ExtendedValueTypeNodes.erase(VT); 584 } else { 585 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 586 ValueTypeNodes[VT.getSimpleVT()] = 0; 587 } 588 break; 589 } 590 default: 591 // Remove it from the CSE Map. 592 Erased = CSEMap.RemoveNode(N); 593 break; 594 } 595#ifndef NDEBUG 596 // Verify that the node was actually in one of the CSE maps, unless it has a 597 // flag result (which cannot be CSE'd) or is one of the special cases that are 598 // not subject to CSE. 599 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 600 !N->isTargetOpcode() && 601 N->getOpcode() != ISD::DBG_LABEL && 602 N->getOpcode() != ISD::DBG_STOPPOINT && 603 N->getOpcode() != ISD::EH_LABEL && 604 N->getOpcode() != ISD::DECLARE) { 605 N->dump(this); 606 cerr << "\n"; 607 assert(0 && "Node is not in map!"); 608 } 609#endif 610} 611 612/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 613/// has been taken out and modified in some way. If the specified node already 614/// exists in the CSE maps, do not modify the maps, but return the existing node 615/// instead. If it doesn't exist, add it and return null. 616/// 617SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 618 assert(N->getNumOperands() && "This is a leaf node!"); 619 620 if (N->getValueType(0) == MVT::Flag) 621 return 0; // Never CSE anything that produces a flag. 622 623 switch (N->getOpcode()) { 624 default: break; 625 case ISD::HANDLENODE: 626 case ISD::DBG_LABEL: 627 case ISD::DBG_STOPPOINT: 628 case ISD::EH_LABEL: 629 case ISD::DECLARE: 630 return 0; // Never add these nodes. 631 } 632 633 // Check that remaining values produced are not flags. 634 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 635 if (N->getValueType(i) == MVT::Flag) 636 return 0; // Never CSE anything that produces a flag. 637 638 SDNode *New = CSEMap.GetOrInsertNode(N); 639 if (New != N) return New; // Node already existed. 640 return 0; 641} 642 643/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 644/// were replaced with those specified. If this node is never memoized, 645/// return null, otherwise return a pointer to the slot it would take. If a 646/// node already exists with these operands, the slot will be non-null. 647SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 648 void *&InsertPos) { 649 if (N->getValueType(0) == MVT::Flag) 650 return 0; // Never CSE anything that produces a flag. 651 652 switch (N->getOpcode()) { 653 default: break; 654 case ISD::HANDLENODE: 655 case ISD::DBG_LABEL: 656 case ISD::DBG_STOPPOINT: 657 case ISD::EH_LABEL: 658 return 0; // Never add these nodes. 659 } 660 661 // Check that remaining values produced are not flags. 662 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 663 if (N->getValueType(i) == MVT::Flag) 664 return 0; // Never CSE anything that produces a flag. 665 666 SDValue Ops[] = { Op }; 667 FoldingSetNodeID ID; 668 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 669 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 670} 671 672/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 673/// were replaced with those specified. If this node is never memoized, 674/// return null, otherwise return a pointer to the slot it would take. If a 675/// node already exists with these operands, the slot will be non-null. 676SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 677 SDValue Op1, SDValue Op2, 678 void *&InsertPos) { 679 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 680 681 // Check that remaining values produced are not flags. 682 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 683 if (N->getValueType(i) == MVT::Flag) 684 return 0; // Never CSE anything that produces a flag. 685 686 SDValue Ops[] = { Op1, Op2 }; 687 FoldingSetNodeID ID; 688 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 689 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 690} 691 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 698 const SDValue *Ops,unsigned NumOps, 699 void *&InsertPos) { 700 if (N->getValueType(0) == MVT::Flag) 701 return 0; // Never CSE anything that produces a flag. 702 703 switch (N->getOpcode()) { 704 default: break; 705 case ISD::HANDLENODE: 706 case ISD::DBG_LABEL: 707 case ISD::DBG_STOPPOINT: 708 case ISD::EH_LABEL: 709 case ISD::DECLARE: 710 return 0; // Never add these nodes. 711 } 712 713 // Check that remaining values produced are not flags. 714 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 715 if (N->getValueType(i) == MVT::Flag) 716 return 0; // Never CSE anything that produces a flag. 717 718 FoldingSetNodeID ID; 719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 720 721 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 722 ID.AddInteger(LD->getAddressingMode()); 723 ID.AddInteger(LD->getExtensionType()); 724 ID.AddInteger(LD->getMemoryVT().getRawBits()); 725 ID.AddInteger(LD->getRawFlags()); 726 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { 727 ID.AddInteger(ST->getAddressingMode()); 728 ID.AddInteger(ST->isTruncatingStore()); 729 ID.AddInteger(ST->getMemoryVT().getRawBits()); 730 ID.AddInteger(ST->getRawFlags()); 731 } 732 733 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 734} 735 736/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 737void SelectionDAG::VerifyNode(SDNode *N) { 738 switch (N->getOpcode()) { 739 default: 740 break; 741 case ISD::BUILD_VECTOR: { 742 assert(N->getNumValues() == 1 && "Too many results for BUILD_VECTOR!"); 743 assert(N->getValueType(0).isVector() && "Wrong BUILD_VECTOR return type!"); 744 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 745 "Wrong number of BUILD_VECTOR operands!"); 746 MVT EltVT = N->getValueType(0).getVectorElementType(); 747 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 748 assert(I->getSDValue().getValueType() == EltVT && 749 "Wrong BUILD_VECTOR operand type!"); 750 break; 751 } 752 } 753} 754 755/// getMVTAlignment - Compute the default alignment value for the 756/// given type. 757/// 758unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 759 const Type *Ty = VT == MVT::iPTR ? 760 PointerType::get(Type::Int8Ty, 0) : 761 VT.getTypeForMVT(); 762 763 return TLI.getTargetData()->getABITypeAlignment(Ty); 764} 765 766SelectionDAG::~SelectionDAG() { 767 while (!AllNodes.empty()) { 768 SDNode *N = AllNodes.remove(AllNodes.begin()); 769 N->SetNextInBucket(0); 770 if (N->OperandsNeedDelete) { 771 delete [] N->OperandList; 772 } 773 N->OperandList = 0; 774 N->NumOperands = 0; 775 } 776} 777 778SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 779 if (Op.getValueType() == VT) return Op; 780 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 781 VT.getSizeInBits()); 782 return getNode(ISD::AND, Op.getValueType(), Op, 783 getConstant(Imm, Op.getValueType())); 784} 785 786SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 787 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 788 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 789} 790 791SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 792 assert(VT.isInteger() && "Cannot create FP integer constant!"); 793 794 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 795 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 796 "APInt size does not match type size!"); 797 798 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 799 FoldingSetNodeID ID; 800 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 801 ID.Add(Val); 802 void *IP = 0; 803 SDNode *N = NULL; 804 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 805 if (!VT.isVector()) 806 return SDValue(N, 0); 807 if (!N) { 808 N = NodeAllocator.Allocate<ConstantSDNode>(); 809 new (N) ConstantSDNode(isT, Val, EltVT); 810 CSEMap.InsertNode(N, IP); 811 AllNodes.push_back(N); 812 } 813 814 SDValue Result(N, 0); 815 if (VT.isVector()) { 816 SmallVector<SDValue, 8> Ops; 817 Ops.assign(VT.getVectorNumElements(), Result); 818 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 819 } 820 return Result; 821} 822 823SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 824 return getConstant(Val, TLI.getPointerTy(), isTarget); 825} 826 827 828SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 829 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 830 831 MVT EltVT = 832 VT.isVector() ? VT.getVectorElementType() : VT; 833 834 // Do the map lookup using the actual bit pattern for the floating point 835 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 836 // we don't have issues with SNANs. 837 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 838 FoldingSetNodeID ID; 839 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 840 ID.Add(V); 841 void *IP = 0; 842 SDNode *N = NULL; 843 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 844 if (!VT.isVector()) 845 return SDValue(N, 0); 846 if (!N) { 847 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 848 new (N) ConstantFPSDNode(isTarget, V, EltVT); 849 CSEMap.InsertNode(N, IP); 850 AllNodes.push_back(N); 851 } 852 853 SDValue Result(N, 0); 854 if (VT.isVector()) { 855 SmallVector<SDValue, 8> Ops; 856 Ops.assign(VT.getVectorNumElements(), Result); 857 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 858 } 859 return Result; 860} 861 862SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 863 MVT EltVT = 864 VT.isVector() ? VT.getVectorElementType() : VT; 865 if (EltVT==MVT::f32) 866 return getConstantFP(APFloat((float)Val), VT, isTarget); 867 else 868 return getConstantFP(APFloat(Val), VT, isTarget); 869} 870 871SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 872 MVT VT, int Offset, 873 bool isTargetGA) { 874 unsigned Opc; 875 876 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 877 if (!GVar) { 878 // If GV is an alias then use the aliasee for determining thread-localness. 879 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 880 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal()); 881 } 882 883 if (GVar && GVar->isThreadLocal()) 884 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 885 else 886 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 887 888 FoldingSetNodeID ID; 889 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 890 ID.AddPointer(GV); 891 ID.AddInteger(Offset); 892 void *IP = 0; 893 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 894 return SDValue(E, 0); 895 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 896 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 897 CSEMap.InsertNode(N, IP); 898 AllNodes.push_back(N); 899 return SDValue(N, 0); 900} 901 902SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 903 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 904 FoldingSetNodeID ID; 905 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 906 ID.AddInteger(FI); 907 void *IP = 0; 908 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 909 return SDValue(E, 0); 910 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 911 new (N) FrameIndexSDNode(FI, VT, isTarget); 912 CSEMap.InsertNode(N, IP); 913 AllNodes.push_back(N); 914 return SDValue(N, 0); 915} 916 917SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 918 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 919 FoldingSetNodeID ID; 920 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 921 ID.AddInteger(JTI); 922 void *IP = 0; 923 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 924 return SDValue(E, 0); 925 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 926 new (N) JumpTableSDNode(JTI, VT, isTarget); 927 CSEMap.InsertNode(N, IP); 928 AllNodes.push_back(N); 929 return SDValue(N, 0); 930} 931 932SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 933 unsigned Alignment, int Offset, 934 bool isTarget) { 935 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 936 FoldingSetNodeID ID; 937 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 938 ID.AddInteger(Alignment); 939 ID.AddInteger(Offset); 940 ID.AddPointer(C); 941 void *IP = 0; 942 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 943 return SDValue(E, 0); 944 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 945 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 946 CSEMap.InsertNode(N, IP); 947 AllNodes.push_back(N); 948 return SDValue(N, 0); 949} 950 951 952SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 953 unsigned Alignment, int Offset, 954 bool isTarget) { 955 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 956 FoldingSetNodeID ID; 957 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 958 ID.AddInteger(Alignment); 959 ID.AddInteger(Offset); 960 C->AddSelectionDAGCSEId(ID); 961 void *IP = 0; 962 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 963 return SDValue(E, 0); 964 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 965 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 966 CSEMap.InsertNode(N, IP); 967 AllNodes.push_back(N); 968 return SDValue(N, 0); 969} 970 971 972SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 973 FoldingSetNodeID ID; 974 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 975 ID.AddPointer(MBB); 976 void *IP = 0; 977 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 978 return SDValue(E, 0); 979 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 980 new (N) BasicBlockSDNode(MBB); 981 CSEMap.InsertNode(N, IP); 982 AllNodes.push_back(N); 983 return SDValue(N, 0); 984} 985 986SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 987 FoldingSetNodeID ID; 988 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 989 ID.AddInteger(Flags.getRawBits()); 990 void *IP = 0; 991 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 992 return SDValue(E, 0); 993 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 994 new (N) ARG_FLAGSSDNode(Flags); 995 CSEMap.InsertNode(N, IP); 996 AllNodes.push_back(N); 997 return SDValue(N, 0); 998} 999 1000SDValue SelectionDAG::getValueType(MVT VT) { 1001 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1002 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1003 1004 SDNode *&N = VT.isExtended() ? 1005 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1006 1007 if (N) return SDValue(N, 0); 1008 N = NodeAllocator.Allocate<VTSDNode>(); 1009 new (N) VTSDNode(VT); 1010 AllNodes.push_back(N); 1011 return SDValue(N, 0); 1012} 1013 1014SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1015 SDNode *&N = ExternalSymbols[Sym]; 1016 if (N) return SDValue(N, 0); 1017 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1018 new (N) ExternalSymbolSDNode(false, Sym, VT); 1019 AllNodes.push_back(N); 1020 return SDValue(N, 0); 1021} 1022 1023SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1024 SDNode *&N = TargetExternalSymbols[Sym]; 1025 if (N) return SDValue(N, 0); 1026 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1027 new (N) ExternalSymbolSDNode(true, Sym, VT); 1028 AllNodes.push_back(N); 1029 return SDValue(N, 0); 1030} 1031 1032SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1033 if ((unsigned)Cond >= CondCodeNodes.size()) 1034 CondCodeNodes.resize(Cond+1); 1035 1036 if (CondCodeNodes[Cond] == 0) { 1037 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1038 new (N) CondCodeSDNode(Cond); 1039 CondCodeNodes[Cond] = N; 1040 AllNodes.push_back(N); 1041 } 1042 return SDValue(CondCodeNodes[Cond], 0); 1043} 1044 1045SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1046 FoldingSetNodeID ID; 1047 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1048 ID.AddInteger(RegNo); 1049 void *IP = 0; 1050 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1051 return SDValue(E, 0); 1052 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1053 new (N) RegisterSDNode(RegNo, VT); 1054 CSEMap.InsertNode(N, IP); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1060 unsigned Line, unsigned Col, 1061 const CompileUnitDesc *CU) { 1062 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1063 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1064 AllNodes.push_back(N); 1065 return SDValue(N, 0); 1066} 1067 1068SDValue SelectionDAG::getLabel(unsigned Opcode, 1069 SDValue Root, 1070 unsigned LabelID) { 1071 FoldingSetNodeID ID; 1072 SDValue Ops[] = { Root }; 1073 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1074 ID.AddInteger(LabelID); 1075 void *IP = 0; 1076 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1077 return SDValue(E, 0); 1078 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1079 new (N) LabelSDNode(Opcode, Root, LabelID); 1080 CSEMap.InsertNode(N, IP); 1081 AllNodes.push_back(N); 1082 return SDValue(N, 0); 1083} 1084 1085SDValue SelectionDAG::getSrcValue(const Value *V) { 1086 assert((!V || isa<PointerType>(V->getType())) && 1087 "SrcValue is not a pointer?"); 1088 1089 FoldingSetNodeID ID; 1090 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1091 ID.AddPointer(V); 1092 1093 void *IP = 0; 1094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1095 return SDValue(E, 0); 1096 1097 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1098 new (N) SrcValueSDNode(V); 1099 CSEMap.InsertNode(N, IP); 1100 AllNodes.push_back(N); 1101 return SDValue(N, 0); 1102} 1103 1104SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1105 const Value *v = MO.getValue(); 1106 assert((!v || isa<PointerType>(v->getType())) && 1107 "SrcValue is not a pointer?"); 1108 1109 FoldingSetNodeID ID; 1110 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1111 MO.Profile(ID); 1112 1113 void *IP = 0; 1114 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1115 return SDValue(E, 0); 1116 1117 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1118 new (N) MemOperandSDNode(MO); 1119 CSEMap.InsertNode(N, IP); 1120 AllNodes.push_back(N); 1121 return SDValue(N, 0); 1122} 1123 1124/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1125/// specified value type. 1126SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1127 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1128 unsigned ByteSize = VT.getSizeInBits()/8; 1129 const Type *Ty = VT.getTypeForMVT(); 1130 unsigned StackAlign = 1131 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1132 1133 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1134 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1135} 1136 1137SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1138 SDValue N2, ISD::CondCode Cond) { 1139 // These setcc operations always fold. 1140 switch (Cond) { 1141 default: break; 1142 case ISD::SETFALSE: 1143 case ISD::SETFALSE2: return getConstant(0, VT); 1144 case ISD::SETTRUE: 1145 case ISD::SETTRUE2: return getConstant(1, VT); 1146 1147 case ISD::SETOEQ: 1148 case ISD::SETOGT: 1149 case ISD::SETOGE: 1150 case ISD::SETOLT: 1151 case ISD::SETOLE: 1152 case ISD::SETONE: 1153 case ISD::SETO: 1154 case ISD::SETUO: 1155 case ISD::SETUEQ: 1156 case ISD::SETUNE: 1157 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1158 break; 1159 } 1160 1161 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 1162 const APInt &C2 = N2C->getAPIntValue(); 1163 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1164 const APInt &C1 = N1C->getAPIntValue(); 1165 1166 switch (Cond) { 1167 default: assert(0 && "Unknown integer setcc!"); 1168 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1169 case ISD::SETNE: return getConstant(C1 != C2, VT); 1170 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1171 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1172 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1173 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1174 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1175 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1176 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1177 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1178 } 1179 } 1180 } 1181 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) { 1182 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 1183 // No compile time operations on this type yet. 1184 if (N1C->getValueType(0) == MVT::ppcf128) 1185 return SDValue(); 1186 1187 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1188 switch (Cond) { 1189 default: break; 1190 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1191 return getNode(ISD::UNDEF, VT); 1192 // fall through 1193 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1194 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1195 return getNode(ISD::UNDEF, VT); 1196 // fall through 1197 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1198 R==APFloat::cmpLessThan, VT); 1199 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1200 return getNode(ISD::UNDEF, VT); 1201 // fall through 1202 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1203 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1204 return getNode(ISD::UNDEF, VT); 1205 // fall through 1206 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1207 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1208 return getNode(ISD::UNDEF, VT); 1209 // fall through 1210 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1211 R==APFloat::cmpEqual, VT); 1212 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1213 return getNode(ISD::UNDEF, VT); 1214 // fall through 1215 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1216 R==APFloat::cmpEqual, VT); 1217 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1218 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1219 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1220 R==APFloat::cmpEqual, VT); 1221 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1222 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1223 R==APFloat::cmpLessThan, VT); 1224 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1225 R==APFloat::cmpUnordered, VT); 1226 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1227 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1228 } 1229 } else { 1230 // Ensure that the constant occurs on the RHS. 1231 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1232 } 1233 } 1234 1235 // Could not fold it. 1236 return SDValue(); 1237} 1238 1239/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1240/// use this predicate to simplify operations downstream. 1241bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1242 unsigned BitWidth = Op.getValueSizeInBits(); 1243 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1244} 1245 1246/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1247/// this predicate to simplify operations downstream. Mask is known to be zero 1248/// for bits that V cannot have. 1249bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1250 unsigned Depth) const { 1251 APInt KnownZero, KnownOne; 1252 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1253 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1254 return (KnownZero & Mask) == Mask; 1255} 1256 1257/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1258/// known to be either zero or one and return them in the KnownZero/KnownOne 1259/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1260/// processing. 1261void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1262 APInt &KnownZero, APInt &KnownOne, 1263 unsigned Depth) const { 1264 unsigned BitWidth = Mask.getBitWidth(); 1265 assert(BitWidth == Op.getValueType().getSizeInBits() && 1266 "Mask size mismatches value type size!"); 1267 1268 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1269 if (Depth == 6 || Mask == 0) 1270 return; // Limit search depth. 1271 1272 APInt KnownZero2, KnownOne2; 1273 1274 switch (Op.getOpcode()) { 1275 case ISD::Constant: 1276 // We know all of the bits for a constant! 1277 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1278 KnownZero = ~KnownOne & Mask; 1279 return; 1280 case ISD::AND: 1281 // If either the LHS or the RHS are Zero, the result is zero. 1282 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1283 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1284 KnownZero2, KnownOne2, Depth+1); 1285 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1286 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1287 1288 // Output known-1 bits are only known if set in both the LHS & RHS. 1289 KnownOne &= KnownOne2; 1290 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1291 KnownZero |= KnownZero2; 1292 return; 1293 case ISD::OR: 1294 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1295 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1296 KnownZero2, KnownOne2, Depth+1); 1297 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1298 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1299 1300 // Output known-0 bits are only known if clear in both the LHS & RHS. 1301 KnownZero &= KnownZero2; 1302 // Output known-1 are known to be set if set in either the LHS | RHS. 1303 KnownOne |= KnownOne2; 1304 return; 1305 case ISD::XOR: { 1306 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1307 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1308 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1309 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1310 1311 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1312 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1313 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1314 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1315 KnownZero = KnownZeroOut; 1316 return; 1317 } 1318 case ISD::MUL: { 1319 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1320 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1321 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1322 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1323 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1324 1325 // If low bits are zero in either operand, output low known-0 bits. 1326 // Also compute a conserative estimate for high known-0 bits. 1327 // More trickiness is possible, but this is sufficient for the 1328 // interesting case of alignment computation. 1329 KnownOne.clear(); 1330 unsigned TrailZ = KnownZero.countTrailingOnes() + 1331 KnownZero2.countTrailingOnes(); 1332 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1333 KnownZero2.countLeadingOnes(), 1334 BitWidth) - BitWidth; 1335 1336 TrailZ = std::min(TrailZ, BitWidth); 1337 LeadZ = std::min(LeadZ, BitWidth); 1338 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1339 APInt::getHighBitsSet(BitWidth, LeadZ); 1340 KnownZero &= Mask; 1341 return; 1342 } 1343 case ISD::UDIV: { 1344 // For the purposes of computing leading zeros we can conservatively 1345 // treat a udiv as a logical right shift by the power of 2 known to 1346 // be less than the denominator. 1347 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1348 ComputeMaskedBits(Op.getOperand(0), 1349 AllOnes, KnownZero2, KnownOne2, Depth+1); 1350 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1351 1352 KnownOne2.clear(); 1353 KnownZero2.clear(); 1354 ComputeMaskedBits(Op.getOperand(1), 1355 AllOnes, KnownZero2, KnownOne2, Depth+1); 1356 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1357 if (RHSUnknownLeadingOnes != BitWidth) 1358 LeadZ = std::min(BitWidth, 1359 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1360 1361 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1362 return; 1363 } 1364 case ISD::SELECT: 1365 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1366 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1367 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1368 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1369 1370 // Only known if known in both the LHS and RHS. 1371 KnownOne &= KnownOne2; 1372 KnownZero &= KnownZero2; 1373 return; 1374 case ISD::SELECT_CC: 1375 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1376 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1377 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1378 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1379 1380 // Only known if known in both the LHS and RHS. 1381 KnownOne &= KnownOne2; 1382 KnownZero &= KnownZero2; 1383 return; 1384 case ISD::SETCC: 1385 // If we know the result of a setcc has the top bits zero, use this info. 1386 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult && 1387 BitWidth > 1) 1388 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1389 return; 1390 case ISD::SHL: 1391 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1392 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1393 unsigned ShAmt = SA->getValue(); 1394 1395 // If the shift count is an invalid immediate, don't do anything. 1396 if (ShAmt >= BitWidth) 1397 return; 1398 1399 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1400 KnownZero, KnownOne, Depth+1); 1401 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1402 KnownZero <<= ShAmt; 1403 KnownOne <<= ShAmt; 1404 // low bits known zero. 1405 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1406 } 1407 return; 1408 case ISD::SRL: 1409 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1410 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1411 unsigned ShAmt = SA->getValue(); 1412 1413 // If the shift count is an invalid immediate, don't do anything. 1414 if (ShAmt >= BitWidth) 1415 return; 1416 1417 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1418 KnownZero, KnownOne, Depth+1); 1419 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1420 KnownZero = KnownZero.lshr(ShAmt); 1421 KnownOne = KnownOne.lshr(ShAmt); 1422 1423 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1424 KnownZero |= HighBits; // High bits known zero. 1425 } 1426 return; 1427 case ISD::SRA: 1428 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1429 unsigned ShAmt = SA->getValue(); 1430 1431 // If the shift count is an invalid immediate, don't do anything. 1432 if (ShAmt >= BitWidth) 1433 return; 1434 1435 APInt InDemandedMask = (Mask << ShAmt); 1436 // If any of the demanded bits are produced by the sign extension, we also 1437 // demand the input sign bit. 1438 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1439 if (HighBits.getBoolValue()) 1440 InDemandedMask |= APInt::getSignBit(BitWidth); 1441 1442 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1443 Depth+1); 1444 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1445 KnownZero = KnownZero.lshr(ShAmt); 1446 KnownOne = KnownOne.lshr(ShAmt); 1447 1448 // Handle the sign bits. 1449 APInt SignBit = APInt::getSignBit(BitWidth); 1450 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1451 1452 if (KnownZero.intersects(SignBit)) { 1453 KnownZero |= HighBits; // New bits are known zero. 1454 } else if (KnownOne.intersects(SignBit)) { 1455 KnownOne |= HighBits; // New bits are known one. 1456 } 1457 } 1458 return; 1459 case ISD::SIGN_EXTEND_INREG: { 1460 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1461 unsigned EBits = EVT.getSizeInBits(); 1462 1463 // Sign extension. Compute the demanded bits in the result that are not 1464 // present in the input. 1465 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1466 1467 APInt InSignBit = APInt::getSignBit(EBits); 1468 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1469 1470 // If the sign extended bits are demanded, we know that the sign 1471 // bit is demanded. 1472 InSignBit.zext(BitWidth); 1473 if (NewBits.getBoolValue()) 1474 InputDemandedBits |= InSignBit; 1475 1476 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1477 KnownZero, KnownOne, Depth+1); 1478 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1479 1480 // If the sign bit of the input is known set or clear, then we know the 1481 // top bits of the result. 1482 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1483 KnownZero |= NewBits; 1484 KnownOne &= ~NewBits; 1485 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1486 KnownOne |= NewBits; 1487 KnownZero &= ~NewBits; 1488 } else { // Input sign bit unknown 1489 KnownZero &= ~NewBits; 1490 KnownOne &= ~NewBits; 1491 } 1492 return; 1493 } 1494 case ISD::CTTZ: 1495 case ISD::CTLZ: 1496 case ISD::CTPOP: { 1497 unsigned LowBits = Log2_32(BitWidth)+1; 1498 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1499 KnownOne.clear(); 1500 return; 1501 } 1502 case ISD::LOAD: { 1503 if (ISD::isZEXTLoad(Op.Val)) { 1504 LoadSDNode *LD = cast<LoadSDNode>(Op); 1505 MVT VT = LD->getMemoryVT(); 1506 unsigned MemBits = VT.getSizeInBits(); 1507 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1508 } 1509 return; 1510 } 1511 case ISD::ZERO_EXTEND: { 1512 MVT InVT = Op.getOperand(0).getValueType(); 1513 unsigned InBits = InVT.getSizeInBits(); 1514 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1515 APInt InMask = Mask; 1516 InMask.trunc(InBits); 1517 KnownZero.trunc(InBits); 1518 KnownOne.trunc(InBits); 1519 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1520 KnownZero.zext(BitWidth); 1521 KnownOne.zext(BitWidth); 1522 KnownZero |= NewBits; 1523 return; 1524 } 1525 case ISD::SIGN_EXTEND: { 1526 MVT InVT = Op.getOperand(0).getValueType(); 1527 unsigned InBits = InVT.getSizeInBits(); 1528 APInt InSignBit = APInt::getSignBit(InBits); 1529 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1530 APInt InMask = Mask; 1531 InMask.trunc(InBits); 1532 1533 // If any of the sign extended bits are demanded, we know that the sign 1534 // bit is demanded. Temporarily set this bit in the mask for our callee. 1535 if (NewBits.getBoolValue()) 1536 InMask |= InSignBit; 1537 1538 KnownZero.trunc(InBits); 1539 KnownOne.trunc(InBits); 1540 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1541 1542 // Note if the sign bit is known to be zero or one. 1543 bool SignBitKnownZero = KnownZero.isNegative(); 1544 bool SignBitKnownOne = KnownOne.isNegative(); 1545 assert(!(SignBitKnownZero && SignBitKnownOne) && 1546 "Sign bit can't be known to be both zero and one!"); 1547 1548 // If the sign bit wasn't actually demanded by our caller, we don't 1549 // want it set in the KnownZero and KnownOne result values. Reset the 1550 // mask and reapply it to the result values. 1551 InMask = Mask; 1552 InMask.trunc(InBits); 1553 KnownZero &= InMask; 1554 KnownOne &= InMask; 1555 1556 KnownZero.zext(BitWidth); 1557 KnownOne.zext(BitWidth); 1558 1559 // If the sign bit is known zero or one, the top bits match. 1560 if (SignBitKnownZero) 1561 KnownZero |= NewBits; 1562 else if (SignBitKnownOne) 1563 KnownOne |= NewBits; 1564 return; 1565 } 1566 case ISD::ANY_EXTEND: { 1567 MVT InVT = Op.getOperand(0).getValueType(); 1568 unsigned InBits = InVT.getSizeInBits(); 1569 APInt InMask = Mask; 1570 InMask.trunc(InBits); 1571 KnownZero.trunc(InBits); 1572 KnownOne.trunc(InBits); 1573 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1574 KnownZero.zext(BitWidth); 1575 KnownOne.zext(BitWidth); 1576 return; 1577 } 1578 case ISD::TRUNCATE: { 1579 MVT InVT = Op.getOperand(0).getValueType(); 1580 unsigned InBits = InVT.getSizeInBits(); 1581 APInt InMask = Mask; 1582 InMask.zext(InBits); 1583 KnownZero.zext(InBits); 1584 KnownOne.zext(InBits); 1585 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1586 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1587 KnownZero.trunc(BitWidth); 1588 KnownOne.trunc(BitWidth); 1589 break; 1590 } 1591 case ISD::AssertZext: { 1592 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1593 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1594 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1595 KnownOne, Depth+1); 1596 KnownZero |= (~InMask) & Mask; 1597 return; 1598 } 1599 case ISD::FGETSIGN: 1600 // All bits are zero except the low bit. 1601 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1602 return; 1603 1604 case ISD::SUB: { 1605 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1606 // We know that the top bits of C-X are clear if X contains less bits 1607 // than C (i.e. no wrap-around can happen). For example, 20-X is 1608 // positive if we can prove that X is >= 0 and < 16. 1609 if (CLHS->getAPIntValue().isNonNegative()) { 1610 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1611 // NLZ can't be BitWidth with no sign bit 1612 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1613 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1614 Depth+1); 1615 1616 // If all of the MaskV bits are known to be zero, then we know the 1617 // output top bits are zero, because we now know that the output is 1618 // from [0-C]. 1619 if ((KnownZero2 & MaskV) == MaskV) { 1620 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1621 // Top bits known zero. 1622 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1623 } 1624 } 1625 } 1626 } 1627 // fall through 1628 case ISD::ADD: { 1629 // Output known-0 bits are known if clear or set in both the low clear bits 1630 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1631 // low 3 bits clear. 1632 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1633 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1634 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1635 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1636 1637 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1638 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1639 KnownZeroOut = std::min(KnownZeroOut, 1640 KnownZero2.countTrailingOnes()); 1641 1642 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1643 return; 1644 } 1645 case ISD::SREM: 1646 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1647 const APInt &RA = Rem->getAPIntValue(); 1648 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1649 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1650 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1651 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1652 1653 // If the sign bit of the first operand is zero, the sign bit of 1654 // the result is zero. If the first operand has no one bits below 1655 // the second operand's single 1 bit, its sign will be zero. 1656 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1657 KnownZero2 |= ~LowBits; 1658 1659 KnownZero |= KnownZero2 & Mask; 1660 1661 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1662 } 1663 } 1664 return; 1665 case ISD::UREM: { 1666 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1667 const APInt &RA = Rem->getAPIntValue(); 1668 if (RA.isPowerOf2()) { 1669 APInt LowBits = (RA - 1); 1670 APInt Mask2 = LowBits & Mask; 1671 KnownZero |= ~LowBits & Mask; 1672 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1673 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1674 break; 1675 } 1676 } 1677 1678 // Since the result is less than or equal to either operand, any leading 1679 // zero bits in either operand must also exist in the result. 1680 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1681 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1682 Depth+1); 1683 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1684 Depth+1); 1685 1686 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1687 KnownZero2.countLeadingOnes()); 1688 KnownOne.clear(); 1689 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1690 return; 1691 } 1692 default: 1693 // Allow the target to implement this method for its nodes. 1694 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1695 case ISD::INTRINSIC_WO_CHAIN: 1696 case ISD::INTRINSIC_W_CHAIN: 1697 case ISD::INTRINSIC_VOID: 1698 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1699 } 1700 return; 1701 } 1702} 1703 1704/// ComputeNumSignBits - Return the number of times the sign bit of the 1705/// register is replicated into the other bits. We know that at least 1 bit 1706/// is always equal to the sign bit (itself), but other cases can give us 1707/// information. For example, immediately after an "SRA X, 2", we know that 1708/// the top 3 bits are all equal to each other, so we return 3. 1709unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1710 MVT VT = Op.getValueType(); 1711 assert(VT.isInteger() && "Invalid VT!"); 1712 unsigned VTBits = VT.getSizeInBits(); 1713 unsigned Tmp, Tmp2; 1714 unsigned FirstAnswer = 1; 1715 1716 if (Depth == 6) 1717 return 1; // Limit search depth. 1718 1719 switch (Op.getOpcode()) { 1720 default: break; 1721 case ISD::AssertSext: 1722 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1723 return VTBits-Tmp+1; 1724 case ISD::AssertZext: 1725 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1726 return VTBits-Tmp; 1727 1728 case ISD::Constant: { 1729 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1730 // If negative, return # leading ones. 1731 if (Val.isNegative()) 1732 return Val.countLeadingOnes(); 1733 1734 // Return # leading zeros. 1735 return Val.countLeadingZeros(); 1736 } 1737 1738 case ISD::SIGN_EXTEND: 1739 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1740 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1741 1742 case ISD::SIGN_EXTEND_INREG: 1743 // Max of the input and what this extends. 1744 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1745 Tmp = VTBits-Tmp+1; 1746 1747 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1748 return std::max(Tmp, Tmp2); 1749 1750 case ISD::SRA: 1751 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1752 // SRA X, C -> adds C sign bits. 1753 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1754 Tmp += C->getValue(); 1755 if (Tmp > VTBits) Tmp = VTBits; 1756 } 1757 return Tmp; 1758 case ISD::SHL: 1759 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1760 // shl destroys sign bits. 1761 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1762 if (C->getValue() >= VTBits || // Bad shift. 1763 C->getValue() >= Tmp) break; // Shifted all sign bits out. 1764 return Tmp - C->getValue(); 1765 } 1766 break; 1767 case ISD::AND: 1768 case ISD::OR: 1769 case ISD::XOR: // NOT is handled here. 1770 // Logical binary ops preserve the number of sign bits at the worst. 1771 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1772 if (Tmp != 1) { 1773 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1774 FirstAnswer = std::min(Tmp, Tmp2); 1775 // We computed what we know about the sign bits as our first 1776 // answer. Now proceed to the generic code that uses 1777 // ComputeMaskedBits, and pick whichever answer is better. 1778 } 1779 break; 1780 1781 case ISD::SELECT: 1782 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1783 if (Tmp == 1) return 1; // Early out. 1784 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1785 return std::min(Tmp, Tmp2); 1786 1787 case ISD::SETCC: 1788 // If setcc returns 0/-1, all bits are sign bits. 1789 if (TLI.getSetCCResultContents() == 1790 TargetLowering::ZeroOrNegativeOneSetCCResult) 1791 return VTBits; 1792 break; 1793 case ISD::ROTL: 1794 case ISD::ROTR: 1795 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1796 unsigned RotAmt = C->getValue() & (VTBits-1); 1797 1798 // Handle rotate right by N like a rotate left by 32-N. 1799 if (Op.getOpcode() == ISD::ROTR) 1800 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1801 1802 // If we aren't rotating out all of the known-in sign bits, return the 1803 // number that are left. This handles rotl(sext(x), 1) for example. 1804 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1805 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1806 } 1807 break; 1808 case ISD::ADD: 1809 // Add can have at most one carry bit. Thus we know that the output 1810 // is, at worst, one more bit than the inputs. 1811 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1812 if (Tmp == 1) return 1; // Early out. 1813 1814 // Special case decrementing a value (ADD X, -1): 1815 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1816 if (CRHS->isAllOnesValue()) { 1817 APInt KnownZero, KnownOne; 1818 APInt Mask = APInt::getAllOnesValue(VTBits); 1819 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1820 1821 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1822 // sign bits set. 1823 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1824 return VTBits; 1825 1826 // If we are subtracting one from a positive number, there is no carry 1827 // out of the result. 1828 if (KnownZero.isNegative()) 1829 return Tmp; 1830 } 1831 1832 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1833 if (Tmp2 == 1) return 1; 1834 return std::min(Tmp, Tmp2)-1; 1835 break; 1836 1837 case ISD::SUB: 1838 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1839 if (Tmp2 == 1) return 1; 1840 1841 // Handle NEG. 1842 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1843 if (CLHS->isNullValue()) { 1844 APInt KnownZero, KnownOne; 1845 APInt Mask = APInt::getAllOnesValue(VTBits); 1846 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1847 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1848 // sign bits set. 1849 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1850 return VTBits; 1851 1852 // If the input is known to be positive (the sign bit is known clear), 1853 // the output of the NEG has the same number of sign bits as the input. 1854 if (KnownZero.isNegative()) 1855 return Tmp2; 1856 1857 // Otherwise, we treat this like a SUB. 1858 } 1859 1860 // Sub can have at most one carry bit. Thus we know that the output 1861 // is, at worst, one more bit than the inputs. 1862 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1863 if (Tmp == 1) return 1; // Early out. 1864 return std::min(Tmp, Tmp2)-1; 1865 break; 1866 case ISD::TRUNCATE: 1867 // FIXME: it's tricky to do anything useful for this, but it is an important 1868 // case for targets like X86. 1869 break; 1870 } 1871 1872 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1873 if (Op.getOpcode() == ISD::LOAD) { 1874 LoadSDNode *LD = cast<LoadSDNode>(Op); 1875 unsigned ExtType = LD->getExtensionType(); 1876 switch (ExtType) { 1877 default: break; 1878 case ISD::SEXTLOAD: // '17' bits known 1879 Tmp = LD->getMemoryVT().getSizeInBits(); 1880 return VTBits-Tmp+1; 1881 case ISD::ZEXTLOAD: // '16' bits known 1882 Tmp = LD->getMemoryVT().getSizeInBits(); 1883 return VTBits-Tmp; 1884 } 1885 } 1886 1887 // Allow the target to implement this method for its nodes. 1888 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 1889 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 1890 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 1891 Op.getOpcode() == ISD::INTRINSIC_VOID) { 1892 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 1893 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 1894 } 1895 1896 // Finally, if we can prove that the top bits of the result are 0's or 1's, 1897 // use this information. 1898 APInt KnownZero, KnownOne; 1899 APInt Mask = APInt::getAllOnesValue(VTBits); 1900 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1901 1902 if (KnownZero.isNegative()) { // sign bit is 0 1903 Mask = KnownZero; 1904 } else if (KnownOne.isNegative()) { // sign bit is 1; 1905 Mask = KnownOne; 1906 } else { 1907 // Nothing known. 1908 return FirstAnswer; 1909 } 1910 1911 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 1912 // the number of identical bits in the top of the input value. 1913 Mask = ~Mask; 1914 Mask <<= Mask.getBitWidth()-VTBits; 1915 // Return # leading zeros. We use 'min' here in case Val was zero before 1916 // shifting. We don't want to return '64' as for an i32 "0". 1917 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 1918} 1919 1920 1921bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 1922 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 1923 if (!GA) return false; 1924 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 1925 if (!GV) return false; 1926 MachineModuleInfo *MMI = getMachineModuleInfo(); 1927 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV); 1928} 1929 1930 1931/// getShuffleScalarElt - Returns the scalar element that will make up the ith 1932/// element of the result of the vector shuffle. 1933SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 1934 MVT VT = N->getValueType(0); 1935 SDValue PermMask = N->getOperand(2); 1936 SDValue Idx = PermMask.getOperand(i); 1937 if (Idx.getOpcode() == ISD::UNDEF) 1938 return getNode(ISD::UNDEF, VT.getVectorElementType()); 1939 unsigned Index = cast<ConstantSDNode>(Idx)->getValue(); 1940 unsigned NumElems = PermMask.getNumOperands(); 1941 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 1942 Index %= NumElems; 1943 1944 if (V.getOpcode() == ISD::BIT_CONVERT) { 1945 V = V.getOperand(0); 1946 if (V.getValueType().getVectorNumElements() != NumElems) 1947 return SDValue(); 1948 } 1949 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 1950 return (Index == 0) ? V.getOperand(0) 1951 : getNode(ISD::UNDEF, VT.getVectorElementType()); 1952 if (V.getOpcode() == ISD::BUILD_VECTOR) 1953 return V.getOperand(Index); 1954 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 1955 return getShuffleScalarElt(V.Val, Index); 1956 return SDValue(); 1957} 1958 1959 1960/// getNode - Gets or creates the specified node. 1961/// 1962SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 1963 FoldingSetNodeID ID; 1964 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 1965 void *IP = 0; 1966 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1967 return SDValue(E, 0); 1968 SDNode *N = NodeAllocator.Allocate<SDNode>(); 1969 new (N) SDNode(Opcode, SDNode::getSDVTList(VT)); 1970 CSEMap.InsertNode(N, IP); 1971 1972 AllNodes.push_back(N); 1973#ifndef NDEBUG 1974 VerifyNode(N); 1975#endif 1976 return SDValue(N, 0); 1977} 1978 1979SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 1980 // Constant fold unary operations with an integer constant operand. 1981 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 1982 const APInt &Val = C->getAPIntValue(); 1983 unsigned BitWidth = VT.getSizeInBits(); 1984 switch (Opcode) { 1985 default: break; 1986 case ISD::SIGN_EXTEND: 1987 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 1988 case ISD::ANY_EXTEND: 1989 case ISD::ZERO_EXTEND: 1990 case ISD::TRUNCATE: 1991 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 1992 case ISD::UINT_TO_FP: 1993 case ISD::SINT_TO_FP: { 1994 const uint64_t zero[] = {0, 0}; 1995 // No compile time operations on this type. 1996 if (VT==MVT::ppcf128) 1997 break; 1998 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 1999 (void)apf.convertFromAPInt(Val, 2000 Opcode==ISD::SINT_TO_FP, 2001 APFloat::rmNearestTiesToEven); 2002 return getConstantFP(apf, VT); 2003 } 2004 case ISD::BIT_CONVERT: 2005 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2006 return getConstantFP(Val.bitsToFloat(), VT); 2007 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2008 return getConstantFP(Val.bitsToDouble(), VT); 2009 break; 2010 case ISD::BSWAP: 2011 return getConstant(Val.byteSwap(), VT); 2012 case ISD::CTPOP: 2013 return getConstant(Val.countPopulation(), VT); 2014 case ISD::CTLZ: 2015 return getConstant(Val.countLeadingZeros(), VT); 2016 case ISD::CTTZ: 2017 return getConstant(Val.countTrailingZeros(), VT); 2018 } 2019 } 2020 2021 // Constant fold unary operations with a floating point constant operand. 2022 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) { 2023 APFloat V = C->getValueAPF(); // make copy 2024 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2025 switch (Opcode) { 2026 case ISD::FNEG: 2027 V.changeSign(); 2028 return getConstantFP(V, VT); 2029 case ISD::FABS: 2030 V.clearSign(); 2031 return getConstantFP(V, VT); 2032 case ISD::FP_ROUND: 2033 case ISD::FP_EXTEND: 2034 // This can return overflow, underflow, or inexact; we don't care. 2035 // FIXME need to be more flexible about rounding mode. 2036 (void)V.convert(*MVTToAPFloatSemantics(VT), 2037 APFloat::rmNearestTiesToEven); 2038 return getConstantFP(V, VT); 2039 case ISD::FP_TO_SINT: 2040 case ISD::FP_TO_UINT: { 2041 integerPart x; 2042 assert(integerPartWidth >= 64); 2043 // FIXME need to be more flexible about rounding mode. 2044 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2045 Opcode==ISD::FP_TO_SINT, 2046 APFloat::rmTowardZero); 2047 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2048 break; 2049 return getConstant(x, VT); 2050 } 2051 case ISD::BIT_CONVERT: 2052 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2053 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT); 2054 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2055 return getConstant(V.convertToAPInt().getZExtValue(), VT); 2056 break; 2057 } 2058 } 2059 } 2060 2061 unsigned OpOpcode = Operand.Val->getOpcode(); 2062 switch (Opcode) { 2063 case ISD::TokenFactor: 2064 case ISD::CONCAT_VECTORS: 2065 return Operand; // Factor or concat of one node? No need. 2066 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2067 case ISD::FP_EXTEND: 2068 assert(VT.isFloatingPoint() && 2069 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2070 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2071 if (Operand.getOpcode() == ISD::UNDEF) 2072 return getNode(ISD::UNDEF, VT); 2073 break; 2074 case ISD::SIGN_EXTEND: 2075 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2076 "Invalid SIGN_EXTEND!"); 2077 if (Operand.getValueType() == VT) return Operand; // noop extension 2078 assert(Operand.getValueType().bitsLT(VT) 2079 && "Invalid sext node, dst < src!"); 2080 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2081 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2082 break; 2083 case ISD::ZERO_EXTEND: 2084 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2085 "Invalid ZERO_EXTEND!"); 2086 if (Operand.getValueType() == VT) return Operand; // noop extension 2087 assert(Operand.getValueType().bitsLT(VT) 2088 && "Invalid zext node, dst < src!"); 2089 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2090 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 2091 break; 2092 case ISD::ANY_EXTEND: 2093 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2094 "Invalid ANY_EXTEND!"); 2095 if (Operand.getValueType() == VT) return Operand; // noop extension 2096 assert(Operand.getValueType().bitsLT(VT) 2097 && "Invalid anyext node, dst < src!"); 2098 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2099 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2100 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2101 break; 2102 case ISD::TRUNCATE: 2103 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2104 "Invalid TRUNCATE!"); 2105 if (Operand.getValueType() == VT) return Operand; // noop truncate 2106 assert(Operand.getValueType().bitsGT(VT) 2107 && "Invalid truncate node, src < dst!"); 2108 if (OpOpcode == ISD::TRUNCATE) 2109 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2110 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2111 OpOpcode == ISD::ANY_EXTEND) { 2112 // If the source is smaller than the dest, we still need an extend. 2113 if (Operand.Val->getOperand(0).getValueType().bitsLT(VT)) 2114 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2115 else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT)) 2116 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2117 else 2118 return Operand.Val->getOperand(0); 2119 } 2120 break; 2121 case ISD::BIT_CONVERT: 2122 // Basic sanity checking. 2123 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2124 && "Cannot BIT_CONVERT between types of different sizes!"); 2125 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2126 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2127 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2128 if (OpOpcode == ISD::UNDEF) 2129 return getNode(ISD::UNDEF, VT); 2130 break; 2131 case ISD::SCALAR_TO_VECTOR: 2132 assert(VT.isVector() && !Operand.getValueType().isVector() && 2133 VT.getVectorElementType() == Operand.getValueType() && 2134 "Illegal SCALAR_TO_VECTOR node!"); 2135 if (OpOpcode == ISD::UNDEF) 2136 return getNode(ISD::UNDEF, VT); 2137 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2138 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2139 isa<ConstantSDNode>(Operand.getOperand(1)) && 2140 Operand.getConstantOperandVal(1) == 0 && 2141 Operand.getOperand(0).getValueType() == VT) 2142 return Operand.getOperand(0); 2143 break; 2144 case ISD::FNEG: 2145 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2146 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), 2147 Operand.Val->getOperand(0)); 2148 if (OpOpcode == ISD::FNEG) // --X -> X 2149 return Operand.Val->getOperand(0); 2150 break; 2151 case ISD::FABS: 2152 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2153 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 2154 break; 2155 } 2156 2157 SDNode *N; 2158 SDVTList VTs = getVTList(VT); 2159 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2160 FoldingSetNodeID ID; 2161 SDValue Ops[1] = { Operand }; 2162 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2163 void *IP = 0; 2164 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2165 return SDValue(E, 0); 2166 N = NodeAllocator.Allocate<UnarySDNode>(); 2167 new (N) UnarySDNode(Opcode, VTs, Operand); 2168 CSEMap.InsertNode(N, IP); 2169 } else { 2170 N = NodeAllocator.Allocate<UnarySDNode>(); 2171 new (N) UnarySDNode(Opcode, VTs, Operand); 2172 } 2173 2174 AllNodes.push_back(N); 2175#ifndef NDEBUG 2176 VerifyNode(N); 2177#endif 2178 return SDValue(N, 0); 2179} 2180 2181SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2182 SDValue N1, SDValue N2) { 2183 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2184 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2185 switch (Opcode) { 2186 default: break; 2187 case ISD::TokenFactor: 2188 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2189 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2190 // Fold trivial token factors. 2191 if (N1.getOpcode() == ISD::EntryToken) return N2; 2192 if (N2.getOpcode() == ISD::EntryToken) return N1; 2193 break; 2194 case ISD::CONCAT_VECTORS: 2195 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2196 // one big BUILD_VECTOR. 2197 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2198 N2.getOpcode() == ISD::BUILD_VECTOR) { 2199 SmallVector<SDValue, 16> Elts(N1.Val->op_begin(), N1.Val->op_end()); 2200 Elts.insert(Elts.end(), N2.Val->op_begin(), N2.Val->op_end()); 2201 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2202 } 2203 break; 2204 case ISD::AND: 2205 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2206 N1.getValueType() == VT && "Binary operator types must match!"); 2207 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2208 // worth handling here. 2209 if (N2C && N2C->isNullValue()) 2210 return N2; 2211 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2212 return N1; 2213 break; 2214 case ISD::OR: 2215 case ISD::XOR: 2216 case ISD::ADD: 2217 case ISD::SUB: 2218 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2219 N1.getValueType() == VT && "Binary operator types must match!"); 2220 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2221 // it's worth handling here. 2222 if (N2C && N2C->isNullValue()) 2223 return N1; 2224 break; 2225 case ISD::UDIV: 2226 case ISD::UREM: 2227 case ISD::MULHU: 2228 case ISD::MULHS: 2229 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2230 // fall through 2231 case ISD::MUL: 2232 case ISD::SDIV: 2233 case ISD::SREM: 2234 case ISD::FADD: 2235 case ISD::FSUB: 2236 case ISD::FMUL: 2237 case ISD::FDIV: 2238 case ISD::FREM: 2239 assert(N1.getValueType() == N2.getValueType() && 2240 N1.getValueType() == VT && "Binary operator types must match!"); 2241 break; 2242 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2243 assert(N1.getValueType() == VT && 2244 N1.getValueType().isFloatingPoint() && 2245 N2.getValueType().isFloatingPoint() && 2246 "Invalid FCOPYSIGN!"); 2247 break; 2248 case ISD::SHL: 2249 case ISD::SRA: 2250 case ISD::SRL: 2251 case ISD::ROTL: 2252 case ISD::ROTR: 2253 assert(VT == N1.getValueType() && 2254 "Shift operators return type must be the same as their first arg"); 2255 assert(VT.isInteger() && N2.getValueType().isInteger() && 2256 "Shifts only work on integers"); 2257 2258 // Always fold shifts of i1 values so the code generator doesn't need to 2259 // handle them. Since we know the size of the shift has to be less than the 2260 // size of the value, the shift/rotate count is guaranteed to be zero. 2261 if (VT == MVT::i1) 2262 return N1; 2263 break; 2264 case ISD::FP_ROUND_INREG: { 2265 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2266 assert(VT == N1.getValueType() && "Not an inreg round!"); 2267 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2268 "Cannot FP_ROUND_INREG integer types"); 2269 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2270 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2271 break; 2272 } 2273 case ISD::FP_ROUND: 2274 assert(VT.isFloatingPoint() && 2275 N1.getValueType().isFloatingPoint() && 2276 VT.bitsLE(N1.getValueType()) && 2277 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2278 if (N1.getValueType() == VT) return N1; // noop conversion. 2279 break; 2280 case ISD::AssertSext: 2281 case ISD::AssertZext: { 2282 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2283 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2284 assert(VT.isInteger() && EVT.isInteger() && 2285 "Cannot *_EXTEND_INREG FP types"); 2286 assert(EVT.bitsLE(VT) && "Not extending!"); 2287 if (VT == EVT) return N1; // noop assertion. 2288 break; 2289 } 2290 case ISD::SIGN_EXTEND_INREG: { 2291 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2292 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2293 assert(VT.isInteger() && EVT.isInteger() && 2294 "Cannot *_EXTEND_INREG FP types"); 2295 assert(EVT.bitsLE(VT) && "Not extending!"); 2296 if (EVT == VT) return N1; // Not actually extending 2297 2298 if (N1C) { 2299 APInt Val = N1C->getAPIntValue(); 2300 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2301 Val <<= Val.getBitWidth()-FromBits; 2302 Val = Val.ashr(Val.getBitWidth()-FromBits); 2303 return getConstant(Val, VT); 2304 } 2305 break; 2306 } 2307 case ISD::EXTRACT_VECTOR_ELT: 2308 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2309 if (N1.getOpcode() == ISD::UNDEF) 2310 return getNode(ISD::UNDEF, VT); 2311 2312 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2313 // expanding copies of large vectors from registers. 2314 if (N2C && 2315 N1.getOpcode() == ISD::CONCAT_VECTORS && 2316 N1.getNumOperands() > 0) { 2317 unsigned Factor = 2318 N1.getOperand(0).getValueType().getVectorNumElements(); 2319 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2320 N1.getOperand(N2C->getValue() / Factor), 2321 getConstant(N2C->getValue() % Factor, N2.getValueType())); 2322 } 2323 2324 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2325 // expanding large vector constants. 2326 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2327 return N1.getOperand(N2C->getValue()); 2328 2329 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2330 // operations are lowered to scalars. 2331 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2332 if (N1.getOperand(2) == N2) 2333 return N1.getOperand(1); 2334 else 2335 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2336 } 2337 break; 2338 case ISD::EXTRACT_ELEMENT: 2339 assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2340 assert(!N1.getValueType().isVector() && !VT.isVector() && 2341 (N1.getValueType().isInteger() == VT.isInteger()) && 2342 "Wrong types for EXTRACT_ELEMENT!"); 2343 2344 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2345 // 64-bit integers into 32-bit parts. Instead of building the extract of 2346 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2347 if (N1.getOpcode() == ISD::BUILD_PAIR) 2348 return N1.getOperand(N2C->getValue()); 2349 2350 // EXTRACT_ELEMENT of a constant int is also very common. 2351 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2352 unsigned ElementSize = VT.getSizeInBits(); 2353 unsigned Shift = ElementSize * N2C->getValue(); 2354 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2355 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2356 } 2357 break; 2358 case ISD::EXTRACT_SUBVECTOR: 2359 if (N1.getValueType() == VT) // Trivial extraction. 2360 return N1; 2361 break; 2362 } 2363 2364 if (N1C) { 2365 if (N2C) { 2366 const APInt &C1 = N1C->getAPIntValue(), &C2 = N2C->getAPIntValue(); 2367 switch (Opcode) { 2368 case ISD::ADD: return getConstant(C1 + C2, VT); 2369 case ISD::SUB: return getConstant(C1 - C2, VT); 2370 case ISD::MUL: return getConstant(C1 * C2, VT); 2371 case ISD::UDIV: 2372 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2373 break; 2374 case ISD::UREM : 2375 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2376 break; 2377 case ISD::SDIV : 2378 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2379 break; 2380 case ISD::SREM : 2381 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2382 break; 2383 case ISD::AND : return getConstant(C1 & C2, VT); 2384 case ISD::OR : return getConstant(C1 | C2, VT); 2385 case ISD::XOR : return getConstant(C1 ^ C2, VT); 2386 case ISD::SHL : return getConstant(C1 << C2, VT); 2387 case ISD::SRL : return getConstant(C1.lshr(C2), VT); 2388 case ISD::SRA : return getConstant(C1.ashr(C2), VT); 2389 case ISD::ROTL : return getConstant(C1.rotl(C2), VT); 2390 case ISD::ROTR : return getConstant(C1.rotr(C2), VT); 2391 default: break; 2392 } 2393 } else { // Cannonicalize constant to RHS if commutative 2394 if (isCommutativeBinOp(Opcode)) { 2395 std::swap(N1C, N2C); 2396 std::swap(N1, N2); 2397 } 2398 } 2399 } 2400 2401 // Constant fold FP operations. 2402 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 2403 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 2404 if (N1CFP) { 2405 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2406 // Cannonicalize constant to RHS if commutative 2407 std::swap(N1CFP, N2CFP); 2408 std::swap(N1, N2); 2409 } else if (N2CFP && VT != MVT::ppcf128) { 2410 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2411 APFloat::opStatus s; 2412 switch (Opcode) { 2413 case ISD::FADD: 2414 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2415 if (s != APFloat::opInvalidOp) 2416 return getConstantFP(V1, VT); 2417 break; 2418 case ISD::FSUB: 2419 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2420 if (s!=APFloat::opInvalidOp) 2421 return getConstantFP(V1, VT); 2422 break; 2423 case ISD::FMUL: 2424 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2425 if (s!=APFloat::opInvalidOp) 2426 return getConstantFP(V1, VT); 2427 break; 2428 case ISD::FDIV: 2429 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2430 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2431 return getConstantFP(V1, VT); 2432 break; 2433 case ISD::FREM : 2434 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2435 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2436 return getConstantFP(V1, VT); 2437 break; 2438 case ISD::FCOPYSIGN: 2439 V1.copySign(V2); 2440 return getConstantFP(V1, VT); 2441 default: break; 2442 } 2443 } 2444 } 2445 2446 // Canonicalize an UNDEF to the RHS, even over a constant. 2447 if (N1.getOpcode() == ISD::UNDEF) { 2448 if (isCommutativeBinOp(Opcode)) { 2449 std::swap(N1, N2); 2450 } else { 2451 switch (Opcode) { 2452 case ISD::FP_ROUND_INREG: 2453 case ISD::SIGN_EXTEND_INREG: 2454 case ISD::SUB: 2455 case ISD::FSUB: 2456 case ISD::FDIV: 2457 case ISD::FREM: 2458 case ISD::SRA: 2459 return N1; // fold op(undef, arg2) -> undef 2460 case ISD::UDIV: 2461 case ISD::SDIV: 2462 case ISD::UREM: 2463 case ISD::SREM: 2464 case ISD::SRL: 2465 case ISD::SHL: 2466 if (!VT.isVector()) 2467 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2468 // For vectors, we can't easily build an all zero vector, just return 2469 // the LHS. 2470 return N2; 2471 } 2472 } 2473 } 2474 2475 // Fold a bunch of operators when the RHS is undef. 2476 if (N2.getOpcode() == ISD::UNDEF) { 2477 switch (Opcode) { 2478 case ISD::XOR: 2479 if (N1.getOpcode() == ISD::UNDEF) 2480 // Handle undef ^ undef -> 0 special case. This is a common 2481 // idiom (misuse). 2482 return getConstant(0, VT); 2483 // fallthrough 2484 case ISD::ADD: 2485 case ISD::ADDC: 2486 case ISD::ADDE: 2487 case ISD::SUB: 2488 case ISD::FADD: 2489 case ISD::FSUB: 2490 case ISD::FMUL: 2491 case ISD::FDIV: 2492 case ISD::FREM: 2493 case ISD::UDIV: 2494 case ISD::SDIV: 2495 case ISD::UREM: 2496 case ISD::SREM: 2497 return N2; // fold op(arg1, undef) -> undef 2498 case ISD::MUL: 2499 case ISD::AND: 2500 case ISD::SRL: 2501 case ISD::SHL: 2502 if (!VT.isVector()) 2503 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2504 // For vectors, we can't easily build an all zero vector, just return 2505 // the LHS. 2506 return N1; 2507 case ISD::OR: 2508 if (!VT.isVector()) 2509 return getConstant(VT.getIntegerVTBitMask(), VT); 2510 // For vectors, we can't easily build an all one vector, just return 2511 // the LHS. 2512 return N1; 2513 case ISD::SRA: 2514 return N1; 2515 } 2516 } 2517 2518 // Memoize this node if possible. 2519 SDNode *N; 2520 SDVTList VTs = getVTList(VT); 2521 if (VT != MVT::Flag) { 2522 SDValue Ops[] = { N1, N2 }; 2523 FoldingSetNodeID ID; 2524 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2525 void *IP = 0; 2526 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2527 return SDValue(E, 0); 2528 N = NodeAllocator.Allocate<BinarySDNode>(); 2529 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2530 CSEMap.InsertNode(N, IP); 2531 } else { 2532 N = NodeAllocator.Allocate<BinarySDNode>(); 2533 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2534 } 2535 2536 AllNodes.push_back(N); 2537#ifndef NDEBUG 2538 VerifyNode(N); 2539#endif 2540 return SDValue(N, 0); 2541} 2542 2543SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2544 SDValue N1, SDValue N2, SDValue N3) { 2545 // Perform various simplifications. 2546 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2547 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2548 switch (Opcode) { 2549 case ISD::CONCAT_VECTORS: 2550 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2551 // one big BUILD_VECTOR. 2552 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2553 N2.getOpcode() == ISD::BUILD_VECTOR && 2554 N3.getOpcode() == ISD::BUILD_VECTOR) { 2555 SmallVector<SDValue, 16> Elts(N1.Val->op_begin(), N1.Val->op_end()); 2556 Elts.insert(Elts.end(), N2.Val->op_begin(), N2.Val->op_end()); 2557 Elts.insert(Elts.end(), N3.Val->op_begin(), N3.Val->op_end()); 2558 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2559 } 2560 break; 2561 case ISD::SETCC: { 2562 // Use FoldSetCC to simplify SETCC's. 2563 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2564 if (Simp.Val) return Simp; 2565 break; 2566 } 2567 case ISD::SELECT: 2568 if (N1C) { 2569 if (N1C->getValue()) 2570 return N2; // select true, X, Y -> X 2571 else 2572 return N3; // select false, X, Y -> Y 2573 } 2574 2575 if (N2 == N3) return N2; // select C, X, X -> X 2576 break; 2577 case ISD::BRCOND: 2578 if (N2C) { 2579 if (N2C->getValue()) // Unconditional branch 2580 return getNode(ISD::BR, MVT::Other, N1, N3); 2581 else 2582 return N1; // Never-taken branch 2583 } 2584 break; 2585 case ISD::VECTOR_SHUFFLE: 2586 assert(VT == N1.getValueType() && VT == N2.getValueType() && 2587 VT.isVector() && N3.getValueType().isVector() && 2588 N3.getOpcode() == ISD::BUILD_VECTOR && 2589 VT.getVectorNumElements() == N3.getNumOperands() && 2590 "Illegal VECTOR_SHUFFLE node!"); 2591 break; 2592 case ISD::BIT_CONVERT: 2593 // Fold bit_convert nodes from a type to themselves. 2594 if (N1.getValueType() == VT) 2595 return N1; 2596 break; 2597 } 2598 2599 // Memoize node if it doesn't produce a flag. 2600 SDNode *N; 2601 SDVTList VTs = getVTList(VT); 2602 if (VT != MVT::Flag) { 2603 SDValue Ops[] = { N1, N2, N3 }; 2604 FoldingSetNodeID ID; 2605 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2606 void *IP = 0; 2607 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2608 return SDValue(E, 0); 2609 N = NodeAllocator.Allocate<TernarySDNode>(); 2610 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2611 CSEMap.InsertNode(N, IP); 2612 } else { 2613 N = NodeAllocator.Allocate<TernarySDNode>(); 2614 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2615 } 2616 AllNodes.push_back(N); 2617#ifndef NDEBUG 2618 VerifyNode(N); 2619#endif 2620 return SDValue(N, 0); 2621} 2622 2623SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2624 SDValue N1, SDValue N2, SDValue N3, 2625 SDValue N4) { 2626 SDValue Ops[] = { N1, N2, N3, N4 }; 2627 return getNode(Opcode, VT, Ops, 4); 2628} 2629 2630SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2631 SDValue N1, SDValue N2, SDValue N3, 2632 SDValue N4, SDValue N5) { 2633 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2634 return getNode(Opcode, VT, Ops, 5); 2635} 2636 2637/// getMemsetValue - Vectorized representation of the memset value 2638/// operand. 2639static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2640 unsigned NumBits = VT.isVector() ? 2641 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2642 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2643 APInt Val = APInt(NumBits, C->getValue() & 255); 2644 unsigned Shift = 8; 2645 for (unsigned i = NumBits; i > 8; i >>= 1) { 2646 Val = (Val << Shift) | Val; 2647 Shift <<= 1; 2648 } 2649 if (VT.isInteger()) 2650 return DAG.getConstant(Val, VT); 2651 return DAG.getConstantFP(APFloat(Val), VT); 2652 } 2653 2654 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2655 unsigned Shift = 8; 2656 for (unsigned i = NumBits; i > 8; i >>= 1) { 2657 Value = DAG.getNode(ISD::OR, VT, 2658 DAG.getNode(ISD::SHL, VT, Value, 2659 DAG.getConstant(Shift, MVT::i8)), Value); 2660 Shift <<= 1; 2661 } 2662 2663 return Value; 2664} 2665 2666/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2667/// used when a memcpy is turned into a memset when the source is a constant 2668/// string ptr. 2669static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2670 const TargetLowering &TLI, 2671 std::string &Str, unsigned Offset) { 2672 // Handle vector with all elements zero. 2673 if (Str.empty()) { 2674 if (VT.isInteger()) 2675 return DAG.getConstant(0, VT); 2676 unsigned NumElts = VT.getVectorNumElements(); 2677 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2678 return DAG.getNode(ISD::BIT_CONVERT, VT, 2679 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2680 } 2681 2682 assert(!VT.isVector() && "Can't handle vector type here!"); 2683 unsigned NumBits = VT.getSizeInBits(); 2684 unsigned MSB = NumBits / 8; 2685 uint64_t Val = 0; 2686 if (TLI.isLittleEndian()) 2687 Offset = Offset + MSB - 1; 2688 for (unsigned i = 0; i != MSB; ++i) { 2689 Val = (Val << 8) | (unsigned char)Str[Offset]; 2690 Offset += TLI.isLittleEndian() ? -1 : 1; 2691 } 2692 return DAG.getConstant(Val, VT); 2693} 2694 2695/// getMemBasePlusOffset - Returns base and offset node for the 2696/// 2697static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2698 SelectionDAG &DAG) { 2699 MVT VT = Base.getValueType(); 2700 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2701} 2702 2703/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2704/// 2705static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2706 unsigned SrcDelta = 0; 2707 GlobalAddressSDNode *G = NULL; 2708 if (Src.getOpcode() == ISD::GlobalAddress) 2709 G = cast<GlobalAddressSDNode>(Src); 2710 else if (Src.getOpcode() == ISD::ADD && 2711 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2712 Src.getOperand(1).getOpcode() == ISD::Constant) { 2713 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2714 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue(); 2715 } 2716 if (!G) 2717 return false; 2718 2719 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2720 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2721 return true; 2722 2723 return false; 2724} 2725 2726/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2727/// to replace the memset / memcpy is below the threshold. It also returns the 2728/// types of the sequence of memory ops to perform memset / memcpy. 2729static 2730bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2731 SDValue Dst, SDValue Src, 2732 unsigned Limit, uint64_t Size, unsigned &Align, 2733 std::string &Str, bool &isSrcStr, 2734 SelectionDAG &DAG, 2735 const TargetLowering &TLI) { 2736 isSrcStr = isMemSrcFromString(Src, Str); 2737 bool isSrcConst = isa<ConstantSDNode>(Src); 2738 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2739 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2740 if (VT != MVT::iAny) { 2741 unsigned NewAlign = (unsigned) 2742 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2743 // If source is a string constant, this will require an unaligned load. 2744 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2745 if (Dst.getOpcode() != ISD::FrameIndex) { 2746 // Can't change destination alignment. It requires a unaligned store. 2747 if (AllowUnalign) 2748 VT = MVT::iAny; 2749 } else { 2750 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2751 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2752 if (MFI->isFixedObjectIndex(FI)) { 2753 // Can't change destination alignment. It requires a unaligned store. 2754 if (AllowUnalign) 2755 VT = MVT::iAny; 2756 } else { 2757 // Give the stack frame object a larger alignment if needed. 2758 if (MFI->getObjectAlignment(FI) < NewAlign) 2759 MFI->setObjectAlignment(FI, NewAlign); 2760 Align = NewAlign; 2761 } 2762 } 2763 } 2764 } 2765 2766 if (VT == MVT::iAny) { 2767 if (AllowUnalign) { 2768 VT = MVT::i64; 2769 } else { 2770 switch (Align & 7) { 2771 case 0: VT = MVT::i64; break; 2772 case 4: VT = MVT::i32; break; 2773 case 2: VT = MVT::i16; break; 2774 default: VT = MVT::i8; break; 2775 } 2776 } 2777 2778 MVT LVT = MVT::i64; 2779 while (!TLI.isTypeLegal(LVT)) 2780 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2781 assert(LVT.isInteger()); 2782 2783 if (VT.bitsGT(LVT)) 2784 VT = LVT; 2785 } 2786 2787 unsigned NumMemOps = 0; 2788 while (Size != 0) { 2789 unsigned VTSize = VT.getSizeInBits() / 8; 2790 while (VTSize > Size) { 2791 // For now, only use non-vector load / store's for the left-over pieces. 2792 if (VT.isVector()) { 2793 VT = MVT::i64; 2794 while (!TLI.isTypeLegal(VT)) 2795 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2796 VTSize = VT.getSizeInBits() / 8; 2797 } else { 2798 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2799 VTSize >>= 1; 2800 } 2801 } 2802 2803 if (++NumMemOps > Limit) 2804 return false; 2805 MemOps.push_back(VT); 2806 Size -= VTSize; 2807 } 2808 2809 return true; 2810} 2811 2812static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 2813 SDValue Chain, SDValue Dst, 2814 SDValue Src, uint64_t Size, 2815 unsigned Align, bool AlwaysInline, 2816 const Value *DstSV, uint64_t DstSVOff, 2817 const Value *SrcSV, uint64_t SrcSVOff){ 2818 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2819 2820 // Expand memcpy to a series of load and store ops if the size operand falls 2821 // below a certain threshold. 2822 std::vector<MVT> MemOps; 2823 uint64_t Limit = -1; 2824 if (!AlwaysInline) 2825 Limit = TLI.getMaxStoresPerMemcpy(); 2826 unsigned DstAlign = Align; // Destination alignment can change. 2827 std::string Str; 2828 bool CopyFromStr; 2829 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2830 Str, CopyFromStr, DAG, TLI)) 2831 return SDValue(); 2832 2833 2834 bool isZeroStr = CopyFromStr && Str.empty(); 2835 SmallVector<SDValue, 8> OutChains; 2836 unsigned NumMemOps = MemOps.size(); 2837 uint64_t SrcOff = 0, DstOff = 0; 2838 for (unsigned i = 0; i < NumMemOps; i++) { 2839 MVT VT = MemOps[i]; 2840 unsigned VTSize = VT.getSizeInBits() / 8; 2841 SDValue Value, Store; 2842 2843 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 2844 // It's unlikely a store of a vector immediate can be done in a single 2845 // instruction. It would require a load from a constantpool first. 2846 // We also handle store a vector with all zero's. 2847 // FIXME: Handle other cases where store of vector immediate is done in 2848 // a single instruction. 2849 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 2850 Store = DAG.getStore(Chain, Value, 2851 getMemBasePlusOffset(Dst, DstOff, DAG), 2852 DstSV, DstSVOff + DstOff, false, DstAlign); 2853 } else { 2854 Value = DAG.getLoad(VT, Chain, 2855 getMemBasePlusOffset(Src, SrcOff, DAG), 2856 SrcSV, SrcSVOff + SrcOff, false, Align); 2857 Store = DAG.getStore(Chain, Value, 2858 getMemBasePlusOffset(Dst, DstOff, DAG), 2859 DstSV, DstSVOff + DstOff, false, DstAlign); 2860 } 2861 OutChains.push_back(Store); 2862 SrcOff += VTSize; 2863 DstOff += VTSize; 2864 } 2865 2866 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2867 &OutChains[0], OutChains.size()); 2868} 2869 2870static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 2871 SDValue Chain, SDValue Dst, 2872 SDValue Src, uint64_t Size, 2873 unsigned Align, bool AlwaysInline, 2874 const Value *DstSV, uint64_t DstSVOff, 2875 const Value *SrcSV, uint64_t SrcSVOff){ 2876 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2877 2878 // Expand memmove to a series of load and store ops if the size operand falls 2879 // below a certain threshold. 2880 std::vector<MVT> MemOps; 2881 uint64_t Limit = -1; 2882 if (!AlwaysInline) 2883 Limit = TLI.getMaxStoresPerMemmove(); 2884 unsigned DstAlign = Align; // Destination alignment can change. 2885 std::string Str; 2886 bool CopyFromStr; 2887 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2888 Str, CopyFromStr, DAG, TLI)) 2889 return SDValue(); 2890 2891 uint64_t SrcOff = 0, DstOff = 0; 2892 2893 SmallVector<SDValue, 8> LoadValues; 2894 SmallVector<SDValue, 8> LoadChains; 2895 SmallVector<SDValue, 8> OutChains; 2896 unsigned NumMemOps = MemOps.size(); 2897 for (unsigned i = 0; i < NumMemOps; i++) { 2898 MVT VT = MemOps[i]; 2899 unsigned VTSize = VT.getSizeInBits() / 8; 2900 SDValue Value, Store; 2901 2902 Value = DAG.getLoad(VT, Chain, 2903 getMemBasePlusOffset(Src, SrcOff, DAG), 2904 SrcSV, SrcSVOff + SrcOff, false, Align); 2905 LoadValues.push_back(Value); 2906 LoadChains.push_back(Value.getValue(1)); 2907 SrcOff += VTSize; 2908 } 2909 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 2910 &LoadChains[0], LoadChains.size()); 2911 OutChains.clear(); 2912 for (unsigned i = 0; i < NumMemOps; i++) { 2913 MVT VT = MemOps[i]; 2914 unsigned VTSize = VT.getSizeInBits() / 8; 2915 SDValue Value, Store; 2916 2917 Store = DAG.getStore(Chain, LoadValues[i], 2918 getMemBasePlusOffset(Dst, DstOff, DAG), 2919 DstSV, DstSVOff + DstOff, false, DstAlign); 2920 OutChains.push_back(Store); 2921 DstOff += VTSize; 2922 } 2923 2924 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2925 &OutChains[0], OutChains.size()); 2926} 2927 2928static SDValue getMemsetStores(SelectionDAG &DAG, 2929 SDValue Chain, SDValue Dst, 2930 SDValue Src, uint64_t Size, 2931 unsigned Align, 2932 const Value *DstSV, uint64_t DstSVOff) { 2933 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2934 2935 // Expand memset to a series of load/store ops if the size operand 2936 // falls below a certain threshold. 2937 std::vector<MVT> MemOps; 2938 std::string Str; 2939 bool CopyFromStr; 2940 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 2941 Size, Align, Str, CopyFromStr, DAG, TLI)) 2942 return SDValue(); 2943 2944 SmallVector<SDValue, 8> OutChains; 2945 uint64_t DstOff = 0; 2946 2947 unsigned NumMemOps = MemOps.size(); 2948 for (unsigned i = 0; i < NumMemOps; i++) { 2949 MVT VT = MemOps[i]; 2950 unsigned VTSize = VT.getSizeInBits() / 8; 2951 SDValue Value = getMemsetValue(Src, VT, DAG); 2952 SDValue Store = DAG.getStore(Chain, Value, 2953 getMemBasePlusOffset(Dst, DstOff, DAG), 2954 DstSV, DstSVOff + DstOff); 2955 OutChains.push_back(Store); 2956 DstOff += VTSize; 2957 } 2958 2959 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2960 &OutChains[0], OutChains.size()); 2961} 2962 2963SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 2964 SDValue Src, SDValue Size, 2965 unsigned Align, bool AlwaysInline, 2966 const Value *DstSV, uint64_t DstSVOff, 2967 const Value *SrcSV, uint64_t SrcSVOff) { 2968 2969 // Check to see if we should lower the memcpy to loads and stores first. 2970 // For cases within the target-specified limits, this is the best choice. 2971 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2972 if (ConstantSize) { 2973 // Memcpy with size zero? Just return the original chain. 2974 if (ConstantSize->isNullValue()) 2975 return Chain; 2976 2977 SDValue Result = 2978 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 2979 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 2980 if (Result.Val) 2981 return Result; 2982 } 2983 2984 // Then check to see if we should lower the memcpy with target-specific 2985 // code. If the target chooses to do this, this is the next best. 2986 SDValue Result = 2987 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 2988 AlwaysInline, 2989 DstSV, DstSVOff, SrcSV, SrcSVOff); 2990 if (Result.Val) 2991 return Result; 2992 2993 // If we really need inline code and the target declined to provide it, 2994 // use a (potentially long) sequence of loads and stores. 2995 if (AlwaysInline) { 2996 assert(ConstantSize && "AlwaysInline requires a constant size!"); 2997 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 2998 ConstantSize->getValue(), Align, true, 2999 DstSV, DstSVOff, SrcSV, SrcSVOff); 3000 } 3001 3002 // Emit a library call. 3003 TargetLowering::ArgListTy Args; 3004 TargetLowering::ArgListEntry Entry; 3005 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3006 Entry.Node = Dst; Args.push_back(Entry); 3007 Entry.Node = Src; Args.push_back(Entry); 3008 Entry.Node = Size; Args.push_back(Entry); 3009 std::pair<SDValue,SDValue> CallResult = 3010 TLI.LowerCallTo(Chain, Type::VoidTy, 3011 false, false, false, CallingConv::C, false, 3012 getExternalSymbol("memcpy", TLI.getPointerTy()), 3013 Args, *this); 3014 return CallResult.second; 3015} 3016 3017SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3018 SDValue Src, SDValue Size, 3019 unsigned Align, 3020 const Value *DstSV, uint64_t DstSVOff, 3021 const Value *SrcSV, uint64_t SrcSVOff) { 3022 3023 // Check to see if we should lower the memmove to loads and stores first. 3024 // For cases within the target-specified limits, this is the best choice. 3025 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3026 if (ConstantSize) { 3027 // Memmove with size zero? Just return the original chain. 3028 if (ConstantSize->isNullValue()) 3029 return Chain; 3030 3031 SDValue Result = 3032 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 3033 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3034 if (Result.Val) 3035 return Result; 3036 } 3037 3038 // Then check to see if we should lower the memmove with target-specific 3039 // code. If the target chooses to do this, this is the next best. 3040 SDValue Result = 3041 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3042 DstSV, DstSVOff, SrcSV, SrcSVOff); 3043 if (Result.Val) 3044 return Result; 3045 3046 // Emit a library call. 3047 TargetLowering::ArgListTy Args; 3048 TargetLowering::ArgListEntry Entry; 3049 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3050 Entry.Node = Dst; Args.push_back(Entry); 3051 Entry.Node = Src; Args.push_back(Entry); 3052 Entry.Node = Size; Args.push_back(Entry); 3053 std::pair<SDValue,SDValue> CallResult = 3054 TLI.LowerCallTo(Chain, Type::VoidTy, 3055 false, false, false, CallingConv::C, false, 3056 getExternalSymbol("memmove", TLI.getPointerTy()), 3057 Args, *this); 3058 return CallResult.second; 3059} 3060 3061SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3062 SDValue Src, SDValue Size, 3063 unsigned Align, 3064 const Value *DstSV, uint64_t DstSVOff) { 3065 3066 // Check to see if we should lower the memset to stores first. 3067 // For cases within the target-specified limits, this is the best choice. 3068 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3069 if (ConstantSize) { 3070 // Memset with size zero? Just return the original chain. 3071 if (ConstantSize->isNullValue()) 3072 return Chain; 3073 3074 SDValue Result = 3075 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align, 3076 DstSV, DstSVOff); 3077 if (Result.Val) 3078 return Result; 3079 } 3080 3081 // Then check to see if we should lower the memset with target-specific 3082 // code. If the target chooses to do this, this is the next best. 3083 SDValue Result = 3084 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3085 DstSV, DstSVOff); 3086 if (Result.Val) 3087 return Result; 3088 3089 // Emit a library call. 3090 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3091 TargetLowering::ArgListTy Args; 3092 TargetLowering::ArgListEntry Entry; 3093 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3094 Args.push_back(Entry); 3095 // Extend or truncate the argument to be an i32 value for the call. 3096 if (Src.getValueType().bitsGT(MVT::i32)) 3097 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3098 else 3099 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3100 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3101 Args.push_back(Entry); 3102 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3103 Args.push_back(Entry); 3104 std::pair<SDValue,SDValue> CallResult = 3105 TLI.LowerCallTo(Chain, Type::VoidTy, 3106 false, false, false, CallingConv::C, false, 3107 getExternalSymbol("memset", TLI.getPointerTy()), 3108 Args, *this); 3109 return CallResult.second; 3110} 3111 3112SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain, 3113 SDValue Ptr, SDValue Cmp, 3114 SDValue Swp, const Value* PtrVal, 3115 unsigned Alignment) { 3116 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3117 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3118 3119 MVT VT = Cmp.getValueType(); 3120 3121 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3122 Alignment = getMVTAlignment(VT); 3123 3124 SDVTList VTs = getVTList(VT, MVT::Other); 3125 FoldingSetNodeID ID; 3126 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3127 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3128 void* IP = 0; 3129 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3130 return SDValue(E, 0); 3131 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3132 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3133 CSEMap.InsertNode(N, IP); 3134 AllNodes.push_back(N); 3135 return SDValue(N, 0); 3136} 3137 3138SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain, 3139 SDValue Ptr, SDValue Val, 3140 const Value* PtrVal, 3141 unsigned Alignment) { 3142 assert(( Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB 3143 || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND 3144 || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR 3145 || Opcode == ISD::ATOMIC_LOAD_NAND 3146 || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX 3147 || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX) 3148 && "Invalid Atomic Op"); 3149 3150 MVT VT = Val.getValueType(); 3151 3152 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3153 Alignment = getMVTAlignment(VT); 3154 3155 SDVTList VTs = getVTList(VT, MVT::Other); 3156 FoldingSetNodeID ID; 3157 SDValue Ops[] = {Chain, Ptr, Val}; 3158 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3159 void* IP = 0; 3160 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3161 return SDValue(E, 0); 3162 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3163 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment); 3164 CSEMap.InsertNode(N, IP); 3165 AllNodes.push_back(N); 3166 return SDValue(N, 0); 3167} 3168 3169/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3170/// Allowed to return something different (and simpler) if Simplify is true. 3171SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3172 bool Simplify) { 3173 if (Simplify && NumOps == 1) 3174 return Ops[0]; 3175 3176 SmallVector<MVT, 4> VTs; 3177 VTs.reserve(NumOps); 3178 for (unsigned i = 0; i < NumOps; ++i) 3179 VTs.push_back(Ops[i].getValueType()); 3180 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3181} 3182 3183SDValue 3184SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3185 MVT VT, SDValue Chain, 3186 SDValue Ptr, SDValue Offset, 3187 const Value *SV, int SVOffset, MVT EVT, 3188 bool isVolatile, unsigned Alignment) { 3189 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3190 Alignment = getMVTAlignment(VT); 3191 3192 if (VT == EVT) { 3193 ExtType = ISD::NON_EXTLOAD; 3194 } else if (ExtType == ISD::NON_EXTLOAD) { 3195 assert(VT == EVT && "Non-extending load from different memory type!"); 3196 } else { 3197 // Extending load. 3198 if (VT.isVector()) 3199 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3200 "Invalid vector extload!"); 3201 else 3202 assert(EVT.bitsLT(VT) && 3203 "Should only be an extending load, not truncating!"); 3204 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3205 "Cannot sign/zero extend a FP/Vector load!"); 3206 assert(VT.isInteger() == EVT.isInteger() && 3207 "Cannot convert from FP to Int or Int -> FP!"); 3208 } 3209 3210 bool Indexed = AM != ISD::UNINDEXED; 3211 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3212 "Unindexed load with an offset!"); 3213 3214 SDVTList VTs = Indexed ? 3215 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3216 SDValue Ops[] = { Chain, Ptr, Offset }; 3217 FoldingSetNodeID ID; 3218 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3219 ID.AddInteger(AM); 3220 ID.AddInteger(ExtType); 3221 ID.AddInteger(EVT.getRawBits()); 3222 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3223 void *IP = 0; 3224 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3225 return SDValue(E, 0); 3226 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3227 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3228 Alignment, isVolatile); 3229 CSEMap.InsertNode(N, IP); 3230 AllNodes.push_back(N); 3231 return SDValue(N, 0); 3232} 3233 3234SDValue SelectionDAG::getLoad(MVT VT, 3235 SDValue Chain, SDValue Ptr, 3236 const Value *SV, int SVOffset, 3237 bool isVolatile, unsigned Alignment) { 3238 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3239 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3240 SV, SVOffset, VT, isVolatile, Alignment); 3241} 3242 3243SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3244 SDValue Chain, SDValue Ptr, 3245 const Value *SV, 3246 int SVOffset, MVT EVT, 3247 bool isVolatile, unsigned Alignment) { 3248 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3249 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3250 SV, SVOffset, EVT, isVolatile, Alignment); 3251} 3252 3253SDValue 3254SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3255 SDValue Offset, ISD::MemIndexedMode AM) { 3256 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3257 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3258 "Load is already a indexed load!"); 3259 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3260 LD->getChain(), Base, Offset, LD->getSrcValue(), 3261 LD->getSrcValueOffset(), LD->getMemoryVT(), 3262 LD->isVolatile(), LD->getAlignment()); 3263} 3264 3265SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3266 SDValue Ptr, const Value *SV, int SVOffset, 3267 bool isVolatile, unsigned Alignment) { 3268 MVT VT = Val.getValueType(); 3269 3270 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3271 Alignment = getMVTAlignment(VT); 3272 3273 SDVTList VTs = getVTList(MVT::Other); 3274 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3275 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3276 FoldingSetNodeID ID; 3277 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3278 ID.AddInteger(ISD::UNINDEXED); 3279 ID.AddInteger(false); 3280 ID.AddInteger(VT.getRawBits()); 3281 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3282 void *IP = 0; 3283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3284 return SDValue(E, 0); 3285 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3286 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3287 VT, SV, SVOffset, Alignment, isVolatile); 3288 CSEMap.InsertNode(N, IP); 3289 AllNodes.push_back(N); 3290 return SDValue(N, 0); 3291} 3292 3293SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3294 SDValue Ptr, const Value *SV, 3295 int SVOffset, MVT SVT, 3296 bool isVolatile, unsigned Alignment) { 3297 MVT VT = Val.getValueType(); 3298 3299 if (VT == SVT) 3300 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3301 3302 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3303 assert(VT.isInteger() == SVT.isInteger() && 3304 "Can't do FP-INT conversion!"); 3305 3306 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3307 Alignment = getMVTAlignment(VT); 3308 3309 SDVTList VTs = getVTList(MVT::Other); 3310 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3311 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3312 FoldingSetNodeID ID; 3313 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3314 ID.AddInteger(ISD::UNINDEXED); 3315 ID.AddInteger(1); 3316 ID.AddInteger(SVT.getRawBits()); 3317 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3318 void *IP = 0; 3319 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3320 return SDValue(E, 0); 3321 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3322 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3323 SVT, SV, SVOffset, Alignment, isVolatile); 3324 CSEMap.InsertNode(N, IP); 3325 AllNodes.push_back(N); 3326 return SDValue(N, 0); 3327} 3328 3329SDValue 3330SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3331 SDValue Offset, ISD::MemIndexedMode AM) { 3332 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3333 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3334 "Store is already a indexed store!"); 3335 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3336 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3337 FoldingSetNodeID ID; 3338 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3339 ID.AddInteger(AM); 3340 ID.AddInteger(ST->isTruncatingStore()); 3341 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3342 ID.AddInteger(ST->getRawFlags()); 3343 void *IP = 0; 3344 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3345 return SDValue(E, 0); 3346 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3347 new (N) StoreSDNode(Ops, VTs, AM, 3348 ST->isTruncatingStore(), ST->getMemoryVT(), 3349 ST->getSrcValue(), ST->getSrcValueOffset(), 3350 ST->getAlignment(), ST->isVolatile()); 3351 CSEMap.InsertNode(N, IP); 3352 AllNodes.push_back(N); 3353 return SDValue(N, 0); 3354} 3355 3356SDValue SelectionDAG::getVAArg(MVT VT, 3357 SDValue Chain, SDValue Ptr, 3358 SDValue SV) { 3359 SDValue Ops[] = { Chain, Ptr, SV }; 3360 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3361} 3362 3363SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3364 const SDUse *Ops, unsigned NumOps) { 3365 switch (NumOps) { 3366 case 0: return getNode(Opcode, VT); 3367 case 1: return getNode(Opcode, VT, Ops[0]); 3368 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3369 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3370 default: break; 3371 } 3372 3373 // Copy from an SDUse array into an SDValue array for use with 3374 // the regular getNode logic. 3375 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3376 return getNode(Opcode, VT, &NewOps[0], NumOps); 3377} 3378 3379SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3380 const SDValue *Ops, unsigned NumOps) { 3381 switch (NumOps) { 3382 case 0: return getNode(Opcode, VT); 3383 case 1: return getNode(Opcode, VT, Ops[0]); 3384 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3385 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3386 default: break; 3387 } 3388 3389 switch (Opcode) { 3390 default: break; 3391 case ISD::SELECT_CC: { 3392 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3393 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3394 "LHS and RHS of condition must have same type!"); 3395 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3396 "True and False arms of SelectCC must have same type!"); 3397 assert(Ops[2].getValueType() == VT && 3398 "select_cc node must be of same type as true and false value!"); 3399 break; 3400 } 3401 case ISD::BR_CC: { 3402 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3403 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3404 "LHS/RHS of comparison should match types!"); 3405 break; 3406 } 3407 } 3408 3409 // Memoize nodes. 3410 SDNode *N; 3411 SDVTList VTs = getVTList(VT); 3412 if (VT != MVT::Flag) { 3413 FoldingSetNodeID ID; 3414 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3415 void *IP = 0; 3416 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3417 return SDValue(E, 0); 3418 N = NodeAllocator.Allocate<SDNode>(); 3419 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3420 CSEMap.InsertNode(N, IP); 3421 } else { 3422 N = NodeAllocator.Allocate<SDNode>(); 3423 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3424 } 3425 AllNodes.push_back(N); 3426#ifndef NDEBUG 3427 VerifyNode(N); 3428#endif 3429 return SDValue(N, 0); 3430} 3431 3432SDValue SelectionDAG::getNode(unsigned Opcode, 3433 const std::vector<MVT> &ResultTys, 3434 const SDValue *Ops, unsigned NumOps) { 3435 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3436 Ops, NumOps); 3437} 3438 3439SDValue SelectionDAG::getNode(unsigned Opcode, 3440 const MVT *VTs, unsigned NumVTs, 3441 const SDValue *Ops, unsigned NumOps) { 3442 if (NumVTs == 1) 3443 return getNode(Opcode, VTs[0], Ops, NumOps); 3444 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3445} 3446 3447SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3448 const SDValue *Ops, unsigned NumOps) { 3449 if (VTList.NumVTs == 1) 3450 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3451 3452 switch (Opcode) { 3453 // FIXME: figure out how to safely handle things like 3454 // int foo(int x) { return 1 << (x & 255); } 3455 // int bar() { return foo(256); } 3456#if 0 3457 case ISD::SRA_PARTS: 3458 case ISD::SRL_PARTS: 3459 case ISD::SHL_PARTS: 3460 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3461 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3462 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3463 else if (N3.getOpcode() == ISD::AND) 3464 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3465 // If the and is only masking out bits that cannot effect the shift, 3466 // eliminate the and. 3467 unsigned NumBits = VT.getSizeInBits()*2; 3468 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3469 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3470 } 3471 break; 3472#endif 3473 } 3474 3475 // Memoize the node unless it returns a flag. 3476 SDNode *N; 3477 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3478 FoldingSetNodeID ID; 3479 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3480 void *IP = 0; 3481 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3482 return SDValue(E, 0); 3483 if (NumOps == 1) { 3484 N = NodeAllocator.Allocate<UnarySDNode>(); 3485 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3486 } else if (NumOps == 2) { 3487 N = NodeAllocator.Allocate<BinarySDNode>(); 3488 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3489 } else if (NumOps == 3) { 3490 N = NodeAllocator.Allocate<TernarySDNode>(); 3491 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3492 } else { 3493 N = NodeAllocator.Allocate<SDNode>(); 3494 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3495 } 3496 CSEMap.InsertNode(N, IP); 3497 } else { 3498 if (NumOps == 1) { 3499 N = NodeAllocator.Allocate<UnarySDNode>(); 3500 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3501 } else if (NumOps == 2) { 3502 N = NodeAllocator.Allocate<BinarySDNode>(); 3503 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3504 } else if (NumOps == 3) { 3505 N = NodeAllocator.Allocate<TernarySDNode>(); 3506 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3507 } else { 3508 N = NodeAllocator.Allocate<SDNode>(); 3509 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3510 } 3511 } 3512 AllNodes.push_back(N); 3513#ifndef NDEBUG 3514 VerifyNode(N); 3515#endif 3516 return SDValue(N, 0); 3517} 3518 3519SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3520 return getNode(Opcode, VTList, 0, 0); 3521} 3522 3523SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3524 SDValue N1) { 3525 SDValue Ops[] = { N1 }; 3526 return getNode(Opcode, VTList, Ops, 1); 3527} 3528 3529SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3530 SDValue N1, SDValue N2) { 3531 SDValue Ops[] = { N1, N2 }; 3532 return getNode(Opcode, VTList, Ops, 2); 3533} 3534 3535SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3536 SDValue N1, SDValue N2, SDValue N3) { 3537 SDValue Ops[] = { N1, N2, N3 }; 3538 return getNode(Opcode, VTList, Ops, 3); 3539} 3540 3541SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3542 SDValue N1, SDValue N2, SDValue N3, 3543 SDValue N4) { 3544 SDValue Ops[] = { N1, N2, N3, N4 }; 3545 return getNode(Opcode, VTList, Ops, 4); 3546} 3547 3548SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3549 SDValue N1, SDValue N2, SDValue N3, 3550 SDValue N4, SDValue N5) { 3551 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3552 return getNode(Opcode, VTList, Ops, 5); 3553} 3554 3555SDVTList SelectionDAG::getVTList(MVT VT) { 3556 return makeVTList(SDNode::getValueTypeList(VT), 1); 3557} 3558 3559SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3560 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3561 E = VTList.rend(); I != E; ++I) 3562 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 3563 return *I; 3564 3565 MVT *Array = Allocator.Allocate<MVT>(2); 3566 Array[0] = VT1; 3567 Array[1] = VT2; 3568 SDVTList Result = makeVTList(Array, 2); 3569 VTList.push_back(Result); 3570 return Result; 3571} 3572 3573SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 3574 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3575 E = VTList.rend(); I != E; ++I) 3576 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3577 I->VTs[2] == VT3) 3578 return *I; 3579 3580 MVT *Array = Allocator.Allocate<MVT>(3); 3581 Array[0] = VT1; 3582 Array[1] = VT2; 3583 Array[2] = VT3; 3584 SDVTList Result = makeVTList(Array, 3); 3585 VTList.push_back(Result); 3586 return Result; 3587} 3588 3589SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3590 switch (NumVTs) { 3591 case 0: assert(0 && "Cannot have nodes without results!"); 3592 case 1: return getVTList(VTs[0]); 3593 case 2: return getVTList(VTs[0], VTs[1]); 3594 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3595 default: break; 3596 } 3597 3598 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3599 E = VTList.rend(); I != E; ++I) { 3600 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 3601 continue; 3602 3603 bool NoMatch = false; 3604 for (unsigned i = 2; i != NumVTs; ++i) 3605 if (VTs[i] != I->VTs[i]) { 3606 NoMatch = true; 3607 break; 3608 } 3609 if (!NoMatch) 3610 return *I; 3611 } 3612 3613 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 3614 std::copy(VTs, VTs+NumVTs, Array); 3615 SDVTList Result = makeVTList(Array, NumVTs); 3616 VTList.push_back(Result); 3617 return Result; 3618} 3619 3620 3621/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3622/// specified operands. If the resultant node already exists in the DAG, 3623/// this does not modify the specified node, instead it returns the node that 3624/// already exists. If the resultant node does not exist in the DAG, the 3625/// input node is returned. As a degenerate case, if you specify the same 3626/// input operands as the node already has, the input node is returned. 3627SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 3628 SDNode *N = InN.Val; 3629 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3630 3631 // Check to see if there is no change. 3632 if (Op == N->getOperand(0)) return InN; 3633 3634 // See if the modified node already exists. 3635 void *InsertPos = 0; 3636 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3637 return SDValue(Existing, InN.ResNo); 3638 3639 // Nope it doesn't. Remove the node from its current place in the maps. 3640 if (InsertPos) 3641 RemoveNodeFromCSEMaps(N); 3642 3643 // Now we update the operands. 3644 N->OperandList[0].getVal()->removeUser(0, N); 3645 N->OperandList[0] = Op; 3646 N->OperandList[0].setUser(N); 3647 Op.Val->addUser(0, N); 3648 3649 // If this gets put into a CSE map, add it. 3650 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3651 return InN; 3652} 3653 3654SDValue SelectionDAG:: 3655UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 3656 SDNode *N = InN.Val; 3657 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3658 3659 // Check to see if there is no change. 3660 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3661 return InN; // No operands changed, just return the input node. 3662 3663 // See if the modified node already exists. 3664 void *InsertPos = 0; 3665 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3666 return SDValue(Existing, InN.ResNo); 3667 3668 // Nope it doesn't. Remove the node from its current place in the maps. 3669 if (InsertPos) 3670 RemoveNodeFromCSEMaps(N); 3671 3672 // Now we update the operands. 3673 if (N->OperandList[0] != Op1) { 3674 N->OperandList[0].getVal()->removeUser(0, N); 3675 N->OperandList[0] = Op1; 3676 N->OperandList[0].setUser(N); 3677 Op1.Val->addUser(0, N); 3678 } 3679 if (N->OperandList[1] != Op2) { 3680 N->OperandList[1].getVal()->removeUser(1, N); 3681 N->OperandList[1] = Op2; 3682 N->OperandList[1].setUser(N); 3683 Op2.Val->addUser(1, N); 3684 } 3685 3686 // If this gets put into a CSE map, add it. 3687 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3688 return InN; 3689} 3690 3691SDValue SelectionDAG:: 3692UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 3693 SDValue Ops[] = { Op1, Op2, Op3 }; 3694 return UpdateNodeOperands(N, Ops, 3); 3695} 3696 3697SDValue SelectionDAG:: 3698UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3699 SDValue Op3, SDValue Op4) { 3700 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 3701 return UpdateNodeOperands(N, Ops, 4); 3702} 3703 3704SDValue SelectionDAG:: 3705UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3706 SDValue Op3, SDValue Op4, SDValue Op5) { 3707 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3708 return UpdateNodeOperands(N, Ops, 5); 3709} 3710 3711SDValue SelectionDAG:: 3712UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 3713 SDNode *N = InN.Val; 3714 assert(N->getNumOperands() == NumOps && 3715 "Update with wrong number of operands"); 3716 3717 // Check to see if there is no change. 3718 bool AnyChange = false; 3719 for (unsigned i = 0; i != NumOps; ++i) { 3720 if (Ops[i] != N->getOperand(i)) { 3721 AnyChange = true; 3722 break; 3723 } 3724 } 3725 3726 // No operands changed, just return the input node. 3727 if (!AnyChange) return InN; 3728 3729 // See if the modified node already exists. 3730 void *InsertPos = 0; 3731 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3732 return SDValue(Existing, InN.ResNo); 3733 3734 // Nope it doesn't. Remove the node from its current place in the maps. 3735 if (InsertPos) 3736 RemoveNodeFromCSEMaps(N); 3737 3738 // Now we update the operands. 3739 for (unsigned i = 0; i != NumOps; ++i) { 3740 if (N->OperandList[i] != Ops[i]) { 3741 N->OperandList[i].getVal()->removeUser(i, N); 3742 N->OperandList[i] = Ops[i]; 3743 N->OperandList[i].setUser(N); 3744 Ops[i].Val->addUser(i, N); 3745 } 3746 } 3747 3748 // If this gets put into a CSE map, add it. 3749 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3750 return InN; 3751} 3752 3753/// DropOperands - Release the operands and set this node to have 3754/// zero operands. 3755void SDNode::DropOperands() { 3756 // Unlike the code in MorphNodeTo that does this, we don't need to 3757 // watch for dead nodes here. 3758 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 3759 I->getVal()->removeUser(std::distance(op_begin(), I), this); 3760 3761 NumOperands = 0; 3762} 3763 3764/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 3765/// machine opcode. 3766/// 3767SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3768 MVT VT) { 3769 SDVTList VTs = getVTList(VT); 3770 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 3771} 3772 3773SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3774 MVT VT, SDValue Op1) { 3775 SDVTList VTs = getVTList(VT); 3776 SDValue Ops[] = { Op1 }; 3777 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 3778} 3779 3780SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3781 MVT VT, SDValue Op1, 3782 SDValue Op2) { 3783 SDVTList VTs = getVTList(VT); 3784 SDValue Ops[] = { Op1, Op2 }; 3785 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 3786} 3787 3788SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3789 MVT VT, SDValue Op1, 3790 SDValue Op2, SDValue Op3) { 3791 SDVTList VTs = getVTList(VT); 3792 SDValue Ops[] = { Op1, Op2, Op3 }; 3793 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 3794} 3795 3796SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3797 MVT VT, const SDValue *Ops, 3798 unsigned NumOps) { 3799 SDVTList VTs = getVTList(VT); 3800 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3801} 3802 3803SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3804 MVT VT1, MVT VT2, const SDValue *Ops, 3805 unsigned NumOps) { 3806 SDVTList VTs = getVTList(VT1, VT2); 3807 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3808} 3809 3810SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3811 MVT VT1, MVT VT2) { 3812 SDVTList VTs = getVTList(VT1, VT2); 3813 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 3814} 3815 3816SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3817 MVT VT1, MVT VT2, MVT VT3, 3818 const SDValue *Ops, unsigned NumOps) { 3819 SDVTList VTs = getVTList(VT1, VT2, VT3); 3820 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3821} 3822 3823SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3824 MVT VT1, MVT VT2, 3825 SDValue Op1) { 3826 SDVTList VTs = getVTList(VT1, VT2); 3827 SDValue Ops[] = { Op1 }; 3828 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 3829} 3830 3831SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3832 MVT VT1, MVT VT2, 3833 SDValue Op1, SDValue Op2) { 3834 SDVTList VTs = getVTList(VT1, VT2); 3835 SDValue Ops[] = { Op1, Op2 }; 3836 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 3837} 3838 3839SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3840 MVT VT1, MVT VT2, 3841 SDValue Op1, SDValue Op2, 3842 SDValue Op3) { 3843 SDVTList VTs = getVTList(VT1, VT2); 3844 SDValue Ops[] = { Op1, Op2, Op3 }; 3845 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 3846} 3847 3848SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3849 SDVTList VTs, const SDValue *Ops, 3850 unsigned NumOps) { 3851 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 3852} 3853 3854SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3855 MVT VT) { 3856 SDVTList VTs = getVTList(VT); 3857 return MorphNodeTo(N, Opc, VTs, 0, 0); 3858} 3859 3860SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3861 MVT VT, SDValue Op1) { 3862 SDVTList VTs = getVTList(VT); 3863 SDValue Ops[] = { Op1 }; 3864 return MorphNodeTo(N, Opc, VTs, Ops, 1); 3865} 3866 3867SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3868 MVT VT, SDValue Op1, 3869 SDValue Op2) { 3870 SDVTList VTs = getVTList(VT); 3871 SDValue Ops[] = { Op1, Op2 }; 3872 return MorphNodeTo(N, Opc, VTs, Ops, 2); 3873} 3874 3875SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3876 MVT VT, SDValue Op1, 3877 SDValue Op2, SDValue Op3) { 3878 SDVTList VTs = getVTList(VT); 3879 SDValue Ops[] = { Op1, Op2, Op3 }; 3880 return MorphNodeTo(N, Opc, VTs, Ops, 3); 3881} 3882 3883SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3884 MVT VT, const SDValue *Ops, 3885 unsigned NumOps) { 3886 SDVTList VTs = getVTList(VT); 3887 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 3888} 3889 3890SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3891 MVT VT1, MVT VT2, const SDValue *Ops, 3892 unsigned NumOps) { 3893 SDVTList VTs = getVTList(VT1, VT2); 3894 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 3895} 3896 3897SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3898 MVT VT1, MVT VT2) { 3899 SDVTList VTs = getVTList(VT1, VT2); 3900 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 3901} 3902 3903SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3904 MVT VT1, MVT VT2, MVT VT3, 3905 const SDValue *Ops, unsigned NumOps) { 3906 SDVTList VTs = getVTList(VT1, VT2, VT3); 3907 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 3908} 3909 3910SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3911 MVT VT1, MVT VT2, 3912 SDValue Op1) { 3913 SDVTList VTs = getVTList(VT1, VT2); 3914 SDValue Ops[] = { Op1 }; 3915 return MorphNodeTo(N, Opc, VTs, Ops, 1); 3916} 3917 3918SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3919 MVT VT1, MVT VT2, 3920 SDValue Op1, SDValue Op2) { 3921 SDVTList VTs = getVTList(VT1, VT2); 3922 SDValue Ops[] = { Op1, Op2 }; 3923 return MorphNodeTo(N, Opc, VTs, Ops, 2); 3924} 3925 3926SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3927 MVT VT1, MVT VT2, 3928 SDValue Op1, SDValue Op2, 3929 SDValue Op3) { 3930 SDVTList VTs = getVTList(VT1, VT2); 3931 SDValue Ops[] = { Op1, Op2, Op3 }; 3932 return MorphNodeTo(N, Opc, VTs, Ops, 3); 3933} 3934 3935/// MorphNodeTo - These *mutate* the specified node to have the specified 3936/// return type, opcode, and operands. 3937/// 3938/// Note that MorphNodeTo returns the resultant node. If there is already a 3939/// node of the specified opcode and operands, it returns that node instead of 3940/// the current one. 3941/// 3942/// Using MorphNodeTo is faster than creating a new node and swapping it in 3943/// with ReplaceAllUsesWith both because it often avoids allocating a new 3944/// node, and because it doesn't require CSE recalulation for any of 3945/// the node's users. 3946/// 3947SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3948 SDVTList VTs, const SDValue *Ops, 3949 unsigned NumOps) { 3950 // If an identical node already exists, use it. 3951 void *IP = 0; 3952 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 3953 FoldingSetNodeID ID; 3954 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 3955 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3956 return ON; 3957 } 3958 3959 RemoveNodeFromCSEMaps(N); 3960 3961 // Start the morphing. 3962 N->NodeType = Opc; 3963 N->ValueList = VTs.VTs; 3964 N->NumValues = VTs.NumVTs; 3965 3966 // Clear the operands list, updating used nodes to remove this from their 3967 // use list. Keep track of any operands that become dead as a result. 3968 SmallPtrSet<SDNode*, 16> DeadNodeSet; 3969 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end(); 3970 I != E; ++I) { 3971 SDNode *Used = I->getVal(); 3972 Used->removeUser(std::distance(B, I), N); 3973 if (Used->use_empty()) 3974 DeadNodeSet.insert(Used); 3975 } 3976 3977 // If NumOps is larger than the # of operands we currently have, reallocate 3978 // the operand list. 3979 if (NumOps > N->NumOperands) { 3980 if (N->OperandsNeedDelete) 3981 delete[] N->OperandList; 3982 if (N->isMachineOpcode()) { 3983 // We're creating a final node that will live unmorphed for the 3984 // remainder of this SelectionDAG's duration, so we can allocate the 3985 // operands directly out of the pool with no recycling metadata. 3986 N->OperandList = Allocator.Allocate<SDUse>(NumOps); 3987 N->OperandsNeedDelete = false; 3988 } else { 3989 N->OperandList = new SDUse[NumOps]; 3990 N->OperandsNeedDelete = true; 3991 } 3992 } 3993 3994 // Assign the new operands. 3995 N->NumOperands = NumOps; 3996 for (unsigned i = 0, e = NumOps; i != e; ++i) { 3997 N->OperandList[i] = Ops[i]; 3998 N->OperandList[i].setUser(N); 3999 SDNode *ToUse = N->OperandList[i].getVal(); 4000 ToUse->addUser(i, N); 4001 } 4002 4003 // Delete any nodes that are still dead after adding the uses for the 4004 // new operands. 4005 SmallVector<SDNode *, 16> DeadNodes; 4006 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4007 E = DeadNodeSet.end(); I != E; ++I) 4008 if ((*I)->use_empty()) 4009 DeadNodes.push_back(*I); 4010 RemoveDeadNodes(DeadNodes); 4011 4012 if (IP) 4013 CSEMap.InsertNode(N, IP); // Memoize the new node. 4014 return N; 4015} 4016 4017 4018/// getTargetNode - These are used for target selectors to create a new node 4019/// with specified return type(s), target opcode, and operands. 4020/// 4021/// Note that getTargetNode returns the resultant node. If there is already a 4022/// node of the specified opcode and operands, it returns that node instead of 4023/// the current one. 4024SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4025 return getNode(~Opcode, VT).Val; 4026} 4027SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4028 return getNode(~Opcode, VT, Op1).Val; 4029} 4030SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4031 SDValue Op1, SDValue Op2) { 4032 return getNode(~Opcode, VT, Op1, Op2).Val; 4033} 4034SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4035 SDValue Op1, SDValue Op2, 4036 SDValue Op3) { 4037 return getNode(~Opcode, VT, Op1, Op2, Op3).Val; 4038} 4039SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4040 const SDValue *Ops, unsigned NumOps) { 4041 return getNode(~Opcode, VT, Ops, NumOps).Val; 4042} 4043SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4044 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4045 SDValue Op; 4046 return getNode(~Opcode, VTs, 2, &Op, 0).Val; 4047} 4048SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4049 MVT VT2, SDValue Op1) { 4050 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4051 return getNode(~Opcode, VTs, 2, &Op1, 1).Val; 4052} 4053SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4054 MVT VT2, SDValue Op1, 4055 SDValue Op2) { 4056 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4057 SDValue Ops[] = { Op1, Op2 }; 4058 return getNode(~Opcode, VTs, 2, Ops, 2).Val; 4059} 4060SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4061 MVT VT2, SDValue Op1, 4062 SDValue Op2, SDValue Op3) { 4063 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4064 SDValue Ops[] = { Op1, Op2, Op3 }; 4065 return getNode(~Opcode, VTs, 2, Ops, 3).Val; 4066} 4067SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4068 const SDValue *Ops, unsigned NumOps) { 4069 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4070 return getNode(~Opcode, VTs, 2, Ops, NumOps).Val; 4071} 4072SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4073 SDValue Op1, SDValue Op2) { 4074 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4075 SDValue Ops[] = { Op1, Op2 }; 4076 return getNode(~Opcode, VTs, 3, Ops, 2).Val; 4077} 4078SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4079 SDValue Op1, SDValue Op2, 4080 SDValue Op3) { 4081 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4082 SDValue Ops[] = { Op1, Op2, Op3 }; 4083 return getNode(~Opcode, VTs, 3, Ops, 3).Val; 4084} 4085SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4086 const SDValue *Ops, unsigned NumOps) { 4087 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4088 return getNode(~Opcode, VTs, 3, Ops, NumOps).Val; 4089} 4090SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4091 MVT VT2, MVT VT3, MVT VT4, 4092 const SDValue *Ops, unsigned NumOps) { 4093 std::vector<MVT> VTList; 4094 VTList.push_back(VT1); 4095 VTList.push_back(VT2); 4096 VTList.push_back(VT3); 4097 VTList.push_back(VT4); 4098 const MVT *VTs = getNodeValueTypes(VTList); 4099 return getNode(~Opcode, VTs, 4, Ops, NumOps).Val; 4100} 4101SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4102 const std::vector<MVT> &ResultTys, 4103 const SDValue *Ops, unsigned NumOps) { 4104 const MVT *VTs = getNodeValueTypes(ResultTys); 4105 return getNode(~Opcode, VTs, ResultTys.size(), 4106 Ops, NumOps).Val; 4107} 4108 4109/// getNodeIfExists - Get the specified node if it's already available, or 4110/// else return NULL. 4111SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4112 const SDValue *Ops, unsigned NumOps) { 4113 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4114 FoldingSetNodeID ID; 4115 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4116 void *IP = 0; 4117 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4118 return E; 4119 } 4120 return NULL; 4121} 4122 4123 4124/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4125/// This can cause recursive merging of nodes in the DAG. 4126/// 4127/// This version assumes From has a single result value. 4128/// 4129void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4130 DAGUpdateListener *UpdateListener) { 4131 SDNode *From = FromN.Val; 4132 assert(From->getNumValues() == 1 && FromN.ResNo == 0 && 4133 "Cannot replace with this method!"); 4134 assert(From != To.Val && "Cannot replace uses of with self"); 4135 4136 while (!From->use_empty()) { 4137 SDNode::use_iterator UI = From->use_begin(); 4138 SDNode *U = *UI; 4139 4140 // This node is about to morph, remove its old self from the CSE maps. 4141 RemoveNodeFromCSEMaps(U); 4142 int operandNum = 0; 4143 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4144 I != E; ++I, ++operandNum) 4145 if (I->getVal() == From) { 4146 From->removeUser(operandNum, U); 4147 *I = To; 4148 I->setUser(U); 4149 To.Val->addUser(operandNum, U); 4150 } 4151 4152 // Now that we have modified U, add it back to the CSE maps. If it already 4153 // exists there, recursively merge the results together. 4154 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4155 ReplaceAllUsesWith(U, Existing, UpdateListener); 4156 // U is now dead. Inform the listener if it exists and delete it. 4157 if (UpdateListener) 4158 UpdateListener->NodeDeleted(U, Existing); 4159 DeleteNodeNotInCSEMaps(U); 4160 } else { 4161 // If the node doesn't already exist, we updated it. Inform a listener if 4162 // it exists. 4163 if (UpdateListener) 4164 UpdateListener->NodeUpdated(U); 4165 } 4166 } 4167} 4168 4169/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4170/// This can cause recursive merging of nodes in the DAG. 4171/// 4172/// This version assumes From/To have matching types and numbers of result 4173/// values. 4174/// 4175void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4176 DAGUpdateListener *UpdateListener) { 4177 assert(From->getVTList().VTs == To->getVTList().VTs && 4178 From->getNumValues() == To->getNumValues() && 4179 "Cannot use this version of ReplaceAllUsesWith!"); 4180 4181 // Handle the trivial case. 4182 if (From == To) 4183 return; 4184 4185 while (!From->use_empty()) { 4186 SDNode::use_iterator UI = From->use_begin(); 4187 SDNode *U = *UI; 4188 4189 // This node is about to morph, remove its old self from the CSE maps. 4190 RemoveNodeFromCSEMaps(U); 4191 int operandNum = 0; 4192 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4193 I != E; ++I, ++operandNum) 4194 if (I->getVal() == From) { 4195 From->removeUser(operandNum, U); 4196 I->getVal() = To; 4197 To->addUser(operandNum, U); 4198 } 4199 4200 // Now that we have modified U, add it back to the CSE maps. If it already 4201 // exists there, recursively merge the results together. 4202 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4203 ReplaceAllUsesWith(U, Existing, UpdateListener); 4204 // U is now dead. Inform the listener if it exists and delete it. 4205 if (UpdateListener) 4206 UpdateListener->NodeDeleted(U, Existing); 4207 DeleteNodeNotInCSEMaps(U); 4208 } else { 4209 // If the node doesn't already exist, we updated it. Inform a listener if 4210 // it exists. 4211 if (UpdateListener) 4212 UpdateListener->NodeUpdated(U); 4213 } 4214 } 4215} 4216 4217/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4218/// This can cause recursive merging of nodes in the DAG. 4219/// 4220/// This version can replace From with any result values. To must match the 4221/// number and types of values returned by From. 4222void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4223 const SDValue *To, 4224 DAGUpdateListener *UpdateListener) { 4225 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4226 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4227 4228 while (!From->use_empty()) { 4229 SDNode::use_iterator UI = From->use_begin(); 4230 SDNode *U = *UI; 4231 4232 // This node is about to morph, remove its old self from the CSE maps. 4233 RemoveNodeFromCSEMaps(U); 4234 int operandNum = 0; 4235 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4236 I != E; ++I, ++operandNum) 4237 if (I->getVal() == From) { 4238 const SDValue &ToOp = To[I->getSDValue().ResNo]; 4239 From->removeUser(operandNum, U); 4240 *I = ToOp; 4241 I->setUser(U); 4242 ToOp.Val->addUser(operandNum, U); 4243 } 4244 4245 // Now that we have modified U, add it back to the CSE maps. If it already 4246 // exists there, recursively merge the results together. 4247 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4248 ReplaceAllUsesWith(U, Existing, UpdateListener); 4249 // U is now dead. Inform the listener if it exists and delete it. 4250 if (UpdateListener) 4251 UpdateListener->NodeDeleted(U, Existing); 4252 DeleteNodeNotInCSEMaps(U); 4253 } else { 4254 // If the node doesn't already exist, we updated it. Inform a listener if 4255 // it exists. 4256 if (UpdateListener) 4257 UpdateListener->NodeUpdated(U); 4258 } 4259 } 4260} 4261 4262/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4263/// uses of other values produced by From.Val alone. The Deleted vector is 4264/// handled the same way as for ReplaceAllUsesWith. 4265void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4266 DAGUpdateListener *UpdateListener){ 4267 // Handle the really simple, really trivial case efficiently. 4268 if (From == To) return; 4269 4270 // Handle the simple, trivial, case efficiently. 4271 if (From.Val->getNumValues() == 1) { 4272 ReplaceAllUsesWith(From, To, UpdateListener); 4273 return; 4274 } 4275 4276 // Get all of the users of From.Val. We want these in a nice, 4277 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4278 SmallSetVector<SDNode*, 16> Users(From.Val->use_begin(), From.Val->use_end()); 4279 4280 while (!Users.empty()) { 4281 // We know that this user uses some value of From. If it is the right 4282 // value, update it. 4283 SDNode *User = Users.back(); 4284 Users.pop_back(); 4285 4286 // Scan for an operand that matches From. 4287 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4288 for (; Op != E; ++Op) 4289 if (*Op == From) break; 4290 4291 // If there are no matches, the user must use some other result of From. 4292 if (Op == E) continue; 4293 4294 // Okay, we know this user needs to be updated. Remove its old self 4295 // from the CSE maps. 4296 RemoveNodeFromCSEMaps(User); 4297 4298 // Update all operands that match "From" in case there are multiple uses. 4299 for (; Op != E; ++Op) { 4300 if (*Op == From) { 4301 From.Val->removeUser(Op-User->op_begin(), User); 4302 *Op = To; 4303 Op->setUser(User); 4304 To.Val->addUser(Op-User->op_begin(), User); 4305 } 4306 } 4307 4308 // Now that we have modified User, add it back to the CSE maps. If it 4309 // already exists there, recursively merge the results together. 4310 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4311 if (!Existing) { 4312 if (UpdateListener) UpdateListener->NodeUpdated(User); 4313 continue; // Continue on to next user. 4314 } 4315 4316 // If there was already an existing matching node, use ReplaceAllUsesWith 4317 // to replace the dead one with the existing one. This can cause 4318 // recursive merging of other unrelated nodes down the line. 4319 ReplaceAllUsesWith(User, Existing, UpdateListener); 4320 4321 // User is now dead. Notify a listener if present. 4322 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4323 DeleteNodeNotInCSEMaps(User); 4324 } 4325} 4326 4327/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4328/// uses of other values produced by From.Val alone. The same value may 4329/// appear in both the From and To list. The Deleted vector is 4330/// handled the same way as for ReplaceAllUsesWith. 4331void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4332 const SDValue *To, 4333 unsigned Num, 4334 DAGUpdateListener *UpdateListener){ 4335 // Handle the simple, trivial case efficiently. 4336 if (Num == 1) 4337 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4338 4339 SmallVector<std::pair<SDNode *, unsigned>, 16> Users; 4340 for (unsigned i = 0; i != Num; ++i) 4341 for (SDNode::use_iterator UI = From[i].Val->use_begin(), 4342 E = From[i].Val->use_end(); UI != E; ++UI) 4343 Users.push_back(std::make_pair(*UI, i)); 4344 4345 while (!Users.empty()) { 4346 // We know that this user uses some value of From. If it is the right 4347 // value, update it. 4348 SDNode *User = Users.back().first; 4349 unsigned i = Users.back().second; 4350 Users.pop_back(); 4351 4352 // Scan for an operand that matches From. 4353 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4354 for (; Op != E; ++Op) 4355 if (*Op == From[i]) break; 4356 4357 // If there are no matches, the user must use some other result of From. 4358 if (Op == E) continue; 4359 4360 // Okay, we know this user needs to be updated. Remove its old self 4361 // from the CSE maps. 4362 RemoveNodeFromCSEMaps(User); 4363 4364 // Update all operands that match "From" in case there are multiple uses. 4365 for (; Op != E; ++Op) { 4366 if (*Op == From[i]) { 4367 From[i].Val->removeUser(Op-User->op_begin(), User); 4368 *Op = To[i]; 4369 Op->setUser(User); 4370 To[i].Val->addUser(Op-User->op_begin(), User); 4371 } 4372 } 4373 4374 // Now that we have modified User, add it back to the CSE maps. If it 4375 // already exists there, recursively merge the results together. 4376 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4377 if (!Existing) { 4378 if (UpdateListener) UpdateListener->NodeUpdated(User); 4379 continue; // Continue on to next user. 4380 } 4381 4382 // If there was already an existing matching node, use ReplaceAllUsesWith 4383 // to replace the dead one with the existing one. This can cause 4384 // recursive merging of other unrelated nodes down the line. 4385 ReplaceAllUsesWith(User, Existing, UpdateListener); 4386 4387 // User is now dead. Notify a listener if present. 4388 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4389 DeleteNodeNotInCSEMaps(User); 4390 } 4391} 4392 4393/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4394/// based on their topological order. It returns the maximum id and a vector 4395/// of the SDNodes* in assigned order by reference. 4396unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) { 4397 unsigned DAGSize = AllNodes.size(); 4398 std::vector<unsigned> InDegree(DAGSize); 4399 std::vector<SDNode*> Sources; 4400 4401 // Use a two pass approach to avoid using a std::map which is slow. 4402 unsigned Id = 0; 4403 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){ 4404 SDNode *N = I; 4405 N->setNodeId(Id++); 4406 unsigned Degree = N->use_size(); 4407 InDegree[N->getNodeId()] = Degree; 4408 if (Degree == 0) 4409 Sources.push_back(N); 4410 } 4411 4412 TopOrder.clear(); 4413 TopOrder.reserve(DAGSize); 4414 while (!Sources.empty()) { 4415 SDNode *N = Sources.back(); 4416 Sources.pop_back(); 4417 TopOrder.push_back(N); 4418 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 4419 SDNode *P = I->getVal(); 4420 unsigned Degree = --InDegree[P->getNodeId()]; 4421 if (Degree == 0) 4422 Sources.push_back(P); 4423 } 4424 } 4425 4426 // Second pass, assign the actual topological order as node ids. 4427 Id = 0; 4428 for (std::vector<SDNode*>::iterator TI = TopOrder.begin(),TE = TopOrder.end(); 4429 TI != TE; ++TI) 4430 (*TI)->setNodeId(Id++); 4431 4432 return Id; 4433} 4434 4435 4436 4437//===----------------------------------------------------------------------===// 4438// SDNode Class 4439//===----------------------------------------------------------------------===// 4440 4441// Out-of-line virtual method to give class a home. 4442void SDNode::ANCHOR() {} 4443void UnarySDNode::ANCHOR() {} 4444void BinarySDNode::ANCHOR() {} 4445void TernarySDNode::ANCHOR() {} 4446void HandleSDNode::ANCHOR() {} 4447void ConstantSDNode::ANCHOR() {} 4448void ConstantFPSDNode::ANCHOR() {} 4449void GlobalAddressSDNode::ANCHOR() {} 4450void FrameIndexSDNode::ANCHOR() {} 4451void JumpTableSDNode::ANCHOR() {} 4452void ConstantPoolSDNode::ANCHOR() {} 4453void BasicBlockSDNode::ANCHOR() {} 4454void SrcValueSDNode::ANCHOR() {} 4455void MemOperandSDNode::ANCHOR() {} 4456void RegisterSDNode::ANCHOR() {} 4457void DbgStopPointSDNode::ANCHOR() {} 4458void LabelSDNode::ANCHOR() {} 4459void ExternalSymbolSDNode::ANCHOR() {} 4460void CondCodeSDNode::ANCHOR() {} 4461void ARG_FLAGSSDNode::ANCHOR() {} 4462void VTSDNode::ANCHOR() {} 4463void MemSDNode::ANCHOR() {} 4464void LoadSDNode::ANCHOR() {} 4465void StoreSDNode::ANCHOR() {} 4466void AtomicSDNode::ANCHOR() {} 4467 4468HandleSDNode::~HandleSDNode() { 4469 DropOperands(); 4470} 4471 4472GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4473 MVT VT, int o) 4474 : SDNode(isa<GlobalVariable>(GA) && 4475 cast<GlobalVariable>(GA)->isThreadLocal() ? 4476 // Thread Local 4477 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4478 // Non Thread Local 4479 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4480 getSDVTList(VT)), Offset(o) { 4481 TheGlobal = const_cast<GlobalValue*>(GA); 4482} 4483 4484MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 4485 const Value *srcValue, int SVO, 4486 unsigned alignment, bool vol) 4487 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4488 Flags(encodeMemSDNodeFlags(vol, alignment)) { 4489 4490 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4491 assert(getAlignment() == alignment && "Alignment representation error!"); 4492 assert(isVolatile() == vol && "Volatile representation error!"); 4493} 4494 4495/// getMemOperand - Return a MachineMemOperand object describing the memory 4496/// reference performed by this memory reference. 4497MachineMemOperand MemSDNode::getMemOperand() const { 4498 int Flags; 4499 if (isa<LoadSDNode>(this)) 4500 Flags = MachineMemOperand::MOLoad; 4501 else if (isa<StoreSDNode>(this)) 4502 Flags = MachineMemOperand::MOStore; 4503 else { 4504 assert(isa<AtomicSDNode>(this) && "Unknown MemSDNode opcode!"); 4505 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4506 } 4507 4508 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4509 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4510 4511 // Check if the memory reference references a frame index 4512 const FrameIndexSDNode *FI = 4513 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val); 4514 if (!getSrcValue() && FI) 4515 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4516 Flags, 0, Size, getAlignment()); 4517 else 4518 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4519 Size, getAlignment()); 4520} 4521 4522/// Profile - Gather unique data for the node. 4523/// 4524void SDNode::Profile(FoldingSetNodeID &ID) const { 4525 AddNodeIDNode(ID, this); 4526} 4527 4528/// getValueTypeList - Return a pointer to the specified value type. 4529/// 4530const MVT *SDNode::getValueTypeList(MVT VT) { 4531 if (VT.isExtended()) { 4532 static std::set<MVT, MVT::compareRawBits> EVTs; 4533 return &(*EVTs.insert(VT).first); 4534 } else { 4535 static MVT VTs[MVT::LAST_VALUETYPE]; 4536 VTs[VT.getSimpleVT()] = VT; 4537 return &VTs[VT.getSimpleVT()]; 4538 } 4539} 4540 4541/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4542/// indicated value. This method ignores uses of other values defined by this 4543/// operation. 4544bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4545 assert(Value < getNumValues() && "Bad value!"); 4546 4547 // TODO: Only iterate over uses of a given value of the node 4548 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4549 if (UI.getUse().getSDValue().ResNo == Value) { 4550 if (NUses == 0) 4551 return false; 4552 --NUses; 4553 } 4554 } 4555 4556 // Found exactly the right number of uses? 4557 return NUses == 0; 4558} 4559 4560 4561/// hasAnyUseOfValue - Return true if there are any use of the indicated 4562/// value. This method ignores uses of other values defined by this operation. 4563bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4564 assert(Value < getNumValues() && "Bad value!"); 4565 4566 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 4567 if (UI.getUse().getSDValue().ResNo == Value) 4568 return true; 4569 4570 return false; 4571} 4572 4573 4574/// isOnlyUserOf - Return true if this node is the only use of N. 4575/// 4576bool SDNode::isOnlyUserOf(SDNode *N) const { 4577 bool Seen = false; 4578 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4579 SDNode *User = *I; 4580 if (User == this) 4581 Seen = true; 4582 else 4583 return false; 4584 } 4585 4586 return Seen; 4587} 4588 4589/// isOperand - Return true if this node is an operand of N. 4590/// 4591bool SDValue::isOperandOf(SDNode *N) const { 4592 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4593 if (*this == N->getOperand(i)) 4594 return true; 4595 return false; 4596} 4597 4598bool SDNode::isOperandOf(SDNode *N) const { 4599 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4600 if (this == N->OperandList[i].getVal()) 4601 return true; 4602 return false; 4603} 4604 4605/// reachesChainWithoutSideEffects - Return true if this operand (which must 4606/// be a chain) reaches the specified operand without crossing any 4607/// side-effecting instructions. In practice, this looks through token 4608/// factors and non-volatile loads. In order to remain efficient, this only 4609/// looks a couple of nodes in, it does not do an exhaustive search. 4610bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 4611 unsigned Depth) const { 4612 if (*this == Dest) return true; 4613 4614 // Don't search too deeply, we just want to be able to see through 4615 // TokenFactor's etc. 4616 if (Depth == 0) return false; 4617 4618 // If this is a token factor, all inputs to the TF happen in parallel. If any 4619 // of the operands of the TF reach dest, then we can do the xform. 4620 if (getOpcode() == ISD::TokenFactor) { 4621 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4622 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4623 return true; 4624 return false; 4625 } 4626 4627 // Loads don't have side effects, look through them. 4628 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4629 if (!Ld->isVolatile()) 4630 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4631 } 4632 return false; 4633} 4634 4635 4636static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4637 SmallPtrSet<SDNode *, 32> &Visited) { 4638 if (found || !Visited.insert(N)) 4639 return; 4640 4641 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4642 SDNode *Op = N->getOperand(i).Val; 4643 if (Op == P) { 4644 found = true; 4645 return; 4646 } 4647 findPredecessor(Op, P, found, Visited); 4648 } 4649} 4650 4651/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4652/// is either an operand of N or it can be reached by recursively traversing 4653/// up the operands. 4654/// NOTE: this is an expensive method. Use it carefully. 4655bool SDNode::isPredecessorOf(SDNode *N) const { 4656 SmallPtrSet<SDNode *, 32> Visited; 4657 bool found = false; 4658 findPredecessor(N, this, found, Visited); 4659 return found; 4660} 4661 4662uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4663 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4664 return cast<ConstantSDNode>(OperandList[Num])->getValue(); 4665} 4666 4667std::string SDNode::getOperationName(const SelectionDAG *G) const { 4668 switch (getOpcode()) { 4669 default: 4670 if (getOpcode() < ISD::BUILTIN_OP_END) 4671 return "<<Unknown DAG Node>>"; 4672 if (isMachineOpcode()) { 4673 if (G) 4674 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4675 if (getMachineOpcode() < TII->getNumOpcodes()) 4676 return TII->get(getMachineOpcode()).getName(); 4677 return "<<Unknown Machine Node>>"; 4678 } 4679 if (G) { 4680 TargetLowering &TLI = G->getTargetLoweringInfo(); 4681 const char *Name = TLI.getTargetNodeName(getOpcode()); 4682 if (Name) return Name; 4683 return "<<Unknown Target Node>>"; 4684 } 4685 return "<<Unknown Node>>"; 4686 4687#ifndef NDEBUG 4688 case ISD::DELETED_NODE: 4689 return "<<Deleted Node!>>"; 4690#endif 4691 case ISD::PREFETCH: return "Prefetch"; 4692 case ISD::MEMBARRIER: return "MemBarrier"; 4693 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 4694 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 4695 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 4696 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 4697 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 4698 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 4699 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 4700 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 4701 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 4702 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 4703 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 4704 case ISD::ATOMIC_SWAP: return "AtomicSWAP"; 4705 case ISD::PCMARKER: return "PCMarker"; 4706 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 4707 case ISD::SRCVALUE: return "SrcValue"; 4708 case ISD::MEMOPERAND: return "MemOperand"; 4709 case ISD::EntryToken: return "EntryToken"; 4710 case ISD::TokenFactor: return "TokenFactor"; 4711 case ISD::AssertSext: return "AssertSext"; 4712 case ISD::AssertZext: return "AssertZext"; 4713 4714 case ISD::BasicBlock: return "BasicBlock"; 4715 case ISD::ARG_FLAGS: return "ArgFlags"; 4716 case ISD::VALUETYPE: return "ValueType"; 4717 case ISD::Register: return "Register"; 4718 4719 case ISD::Constant: return "Constant"; 4720 case ISD::ConstantFP: return "ConstantFP"; 4721 case ISD::GlobalAddress: return "GlobalAddress"; 4722 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 4723 case ISD::FrameIndex: return "FrameIndex"; 4724 case ISD::JumpTable: return "JumpTable"; 4725 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 4726 case ISD::RETURNADDR: return "RETURNADDR"; 4727 case ISD::FRAMEADDR: return "FRAMEADDR"; 4728 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 4729 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 4730 case ISD::EHSELECTION: return "EHSELECTION"; 4731 case ISD::EH_RETURN: return "EH_RETURN"; 4732 case ISD::ConstantPool: return "ConstantPool"; 4733 case ISD::ExternalSymbol: return "ExternalSymbol"; 4734 case ISD::INTRINSIC_WO_CHAIN: { 4735 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getValue(); 4736 return Intrinsic::getName((Intrinsic::ID)IID); 4737 } 4738 case ISD::INTRINSIC_VOID: 4739 case ISD::INTRINSIC_W_CHAIN: { 4740 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getValue(); 4741 return Intrinsic::getName((Intrinsic::ID)IID); 4742 } 4743 4744 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 4745 case ISD::TargetConstant: return "TargetConstant"; 4746 case ISD::TargetConstantFP:return "TargetConstantFP"; 4747 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 4748 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 4749 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 4750 case ISD::TargetJumpTable: return "TargetJumpTable"; 4751 case ISD::TargetConstantPool: return "TargetConstantPool"; 4752 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 4753 4754 case ISD::CopyToReg: return "CopyToReg"; 4755 case ISD::CopyFromReg: return "CopyFromReg"; 4756 case ISD::UNDEF: return "undef"; 4757 case ISD::MERGE_VALUES: return "merge_values"; 4758 case ISD::INLINEASM: return "inlineasm"; 4759 case ISD::DBG_LABEL: return "dbg_label"; 4760 case ISD::EH_LABEL: return "eh_label"; 4761 case ISD::DECLARE: return "declare"; 4762 case ISD::HANDLENODE: return "handlenode"; 4763 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 4764 case ISD::CALL: return "call"; 4765 4766 // Unary operators 4767 case ISD::FABS: return "fabs"; 4768 case ISD::FNEG: return "fneg"; 4769 case ISD::FSQRT: return "fsqrt"; 4770 case ISD::FSIN: return "fsin"; 4771 case ISD::FCOS: return "fcos"; 4772 case ISD::FPOWI: return "fpowi"; 4773 case ISD::FPOW: return "fpow"; 4774 case ISD::FTRUNC: return "ftrunc"; 4775 case ISD::FFLOOR: return "ffloor"; 4776 case ISD::FCEIL: return "fceil"; 4777 case ISD::FRINT: return "frint"; 4778 case ISD::FNEARBYINT: return "fnearbyint"; 4779 4780 // Binary operators 4781 case ISD::ADD: return "add"; 4782 case ISD::SUB: return "sub"; 4783 case ISD::MUL: return "mul"; 4784 case ISD::MULHU: return "mulhu"; 4785 case ISD::MULHS: return "mulhs"; 4786 case ISD::SDIV: return "sdiv"; 4787 case ISD::UDIV: return "udiv"; 4788 case ISD::SREM: return "srem"; 4789 case ISD::UREM: return "urem"; 4790 case ISD::SMUL_LOHI: return "smul_lohi"; 4791 case ISD::UMUL_LOHI: return "umul_lohi"; 4792 case ISD::SDIVREM: return "sdivrem"; 4793 case ISD::UDIVREM: return "divrem"; 4794 case ISD::AND: return "and"; 4795 case ISD::OR: return "or"; 4796 case ISD::XOR: return "xor"; 4797 case ISD::SHL: return "shl"; 4798 case ISD::SRA: return "sra"; 4799 case ISD::SRL: return "srl"; 4800 case ISD::ROTL: return "rotl"; 4801 case ISD::ROTR: return "rotr"; 4802 case ISD::FADD: return "fadd"; 4803 case ISD::FSUB: return "fsub"; 4804 case ISD::FMUL: return "fmul"; 4805 case ISD::FDIV: return "fdiv"; 4806 case ISD::FREM: return "frem"; 4807 case ISD::FCOPYSIGN: return "fcopysign"; 4808 case ISD::FGETSIGN: return "fgetsign"; 4809 4810 case ISD::SETCC: return "setcc"; 4811 case ISD::VSETCC: return "vsetcc"; 4812 case ISD::SELECT: return "select"; 4813 case ISD::SELECT_CC: return "select_cc"; 4814 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 4815 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 4816 case ISD::CONCAT_VECTORS: return "concat_vectors"; 4817 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 4818 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 4819 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 4820 case ISD::CARRY_FALSE: return "carry_false"; 4821 case ISD::ADDC: return "addc"; 4822 case ISD::ADDE: return "adde"; 4823 case ISD::SUBC: return "subc"; 4824 case ISD::SUBE: return "sube"; 4825 case ISD::SHL_PARTS: return "shl_parts"; 4826 case ISD::SRA_PARTS: return "sra_parts"; 4827 case ISD::SRL_PARTS: return "srl_parts"; 4828 4829 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 4830 case ISD::INSERT_SUBREG: return "insert_subreg"; 4831 4832 // Conversion operators. 4833 case ISD::SIGN_EXTEND: return "sign_extend"; 4834 case ISD::ZERO_EXTEND: return "zero_extend"; 4835 case ISD::ANY_EXTEND: return "any_extend"; 4836 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 4837 case ISD::TRUNCATE: return "truncate"; 4838 case ISD::FP_ROUND: return "fp_round"; 4839 case ISD::FLT_ROUNDS_: return "flt_rounds"; 4840 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 4841 case ISD::FP_EXTEND: return "fp_extend"; 4842 4843 case ISD::SINT_TO_FP: return "sint_to_fp"; 4844 case ISD::UINT_TO_FP: return "uint_to_fp"; 4845 case ISD::FP_TO_SINT: return "fp_to_sint"; 4846 case ISD::FP_TO_UINT: return "fp_to_uint"; 4847 case ISD::BIT_CONVERT: return "bit_convert"; 4848 4849 // Control flow instructions 4850 case ISD::BR: return "br"; 4851 case ISD::BRIND: return "brind"; 4852 case ISD::BR_JT: return "br_jt"; 4853 case ISD::BRCOND: return "brcond"; 4854 case ISD::BR_CC: return "br_cc"; 4855 case ISD::RET: return "ret"; 4856 case ISD::CALLSEQ_START: return "callseq_start"; 4857 case ISD::CALLSEQ_END: return "callseq_end"; 4858 4859 // Other operators 4860 case ISD::LOAD: return "load"; 4861 case ISD::STORE: return "store"; 4862 case ISD::VAARG: return "vaarg"; 4863 case ISD::VACOPY: return "vacopy"; 4864 case ISD::VAEND: return "vaend"; 4865 case ISD::VASTART: return "vastart"; 4866 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 4867 case ISD::EXTRACT_ELEMENT: return "extract_element"; 4868 case ISD::BUILD_PAIR: return "build_pair"; 4869 case ISD::STACKSAVE: return "stacksave"; 4870 case ISD::STACKRESTORE: return "stackrestore"; 4871 case ISD::TRAP: return "trap"; 4872 4873 // Bit manipulation 4874 case ISD::BSWAP: return "bswap"; 4875 case ISD::CTPOP: return "ctpop"; 4876 case ISD::CTTZ: return "cttz"; 4877 case ISD::CTLZ: return "ctlz"; 4878 4879 // Debug info 4880 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 4881 case ISD::DEBUG_LOC: return "debug_loc"; 4882 4883 // Trampolines 4884 case ISD::TRAMPOLINE: return "trampoline"; 4885 4886 case ISD::CONDCODE: 4887 switch (cast<CondCodeSDNode>(this)->get()) { 4888 default: assert(0 && "Unknown setcc condition!"); 4889 case ISD::SETOEQ: return "setoeq"; 4890 case ISD::SETOGT: return "setogt"; 4891 case ISD::SETOGE: return "setoge"; 4892 case ISD::SETOLT: return "setolt"; 4893 case ISD::SETOLE: return "setole"; 4894 case ISD::SETONE: return "setone"; 4895 4896 case ISD::SETO: return "seto"; 4897 case ISD::SETUO: return "setuo"; 4898 case ISD::SETUEQ: return "setue"; 4899 case ISD::SETUGT: return "setugt"; 4900 case ISD::SETUGE: return "setuge"; 4901 case ISD::SETULT: return "setult"; 4902 case ISD::SETULE: return "setule"; 4903 case ISD::SETUNE: return "setune"; 4904 4905 case ISD::SETEQ: return "seteq"; 4906 case ISD::SETGT: return "setgt"; 4907 case ISD::SETGE: return "setge"; 4908 case ISD::SETLT: return "setlt"; 4909 case ISD::SETLE: return "setle"; 4910 case ISD::SETNE: return "setne"; 4911 } 4912 } 4913} 4914 4915const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 4916 switch (AM) { 4917 default: 4918 return ""; 4919 case ISD::PRE_INC: 4920 return "<pre-inc>"; 4921 case ISD::PRE_DEC: 4922 return "<pre-dec>"; 4923 case ISD::POST_INC: 4924 return "<post-inc>"; 4925 case ISD::POST_DEC: 4926 return "<post-dec>"; 4927 } 4928} 4929 4930std::string ISD::ArgFlagsTy::getArgFlagsString() { 4931 std::string S = "< "; 4932 4933 if (isZExt()) 4934 S += "zext "; 4935 if (isSExt()) 4936 S += "sext "; 4937 if (isInReg()) 4938 S += "inreg "; 4939 if (isSRet()) 4940 S += "sret "; 4941 if (isByVal()) 4942 S += "byval "; 4943 if (isNest()) 4944 S += "nest "; 4945 if (getByValAlign()) 4946 S += "byval-align:" + utostr(getByValAlign()) + " "; 4947 if (getOrigAlign()) 4948 S += "orig-align:" + utostr(getOrigAlign()) + " "; 4949 if (getByValSize()) 4950 S += "byval-size:" + utostr(getByValSize()) + " "; 4951 return S + ">"; 4952} 4953 4954void SDNode::dump() const { dump(0); } 4955void SDNode::dump(const SelectionDAG *G) const { 4956 cerr << (void*)this << ": "; 4957 4958 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 4959 if (i) cerr << ","; 4960 if (getValueType(i) == MVT::Other) 4961 cerr << "ch"; 4962 else 4963 cerr << getValueType(i).getMVTString(); 4964 } 4965 cerr << " = " << getOperationName(G); 4966 4967 cerr << " "; 4968 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 4969 if (i) cerr << ", "; 4970 cerr << (void*)getOperand(i).Val; 4971 if (unsigned RN = getOperand(i).ResNo) 4972 cerr << ":" << RN; 4973 } 4974 4975 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 4976 SDNode *Mask = getOperand(2).Val; 4977 cerr << "<"; 4978 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 4979 if (i) cerr << ","; 4980 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 4981 cerr << "u"; 4982 else 4983 cerr << cast<ConstantSDNode>(Mask->getOperand(i))->getValue(); 4984 } 4985 cerr << ">"; 4986 } 4987 4988 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 4989 cerr << '<' << CSDN->getAPIntValue() << '>'; 4990 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 4991 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 4992 cerr << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 4993 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 4994 cerr << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 4995 else { 4996 cerr << "<APFloat("; 4997 CSDN->getValueAPF().convertToAPInt().dump(); 4998 cerr << ")>"; 4999 } 5000 } else if (const GlobalAddressSDNode *GADN = 5001 dyn_cast<GlobalAddressSDNode>(this)) { 5002 int offset = GADN->getOffset(); 5003 cerr << '<'; 5004 WriteAsOperand(*cerr.stream(), GADN->getGlobal()); 5005 cerr << '>'; 5006 if (offset > 0) 5007 cerr << " + " << offset; 5008 else 5009 cerr << " " << offset; 5010 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5011 cerr << "<" << FIDN->getIndex() << ">"; 5012 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5013 cerr << "<" << JTDN->getIndex() << ">"; 5014 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5015 int offset = CP->getOffset(); 5016 if (CP->isMachineConstantPoolEntry()) 5017 cerr << "<" << *CP->getMachineCPVal() << ">"; 5018 else 5019 cerr << "<" << *CP->getConstVal() << ">"; 5020 if (offset > 0) 5021 cerr << " + " << offset; 5022 else 5023 cerr << " " << offset; 5024 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5025 cerr << "<"; 5026 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5027 if (LBB) 5028 cerr << LBB->getName() << " "; 5029 cerr << (const void*)BBDN->getBasicBlock() << ">"; 5030 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5031 if (G && R->getReg() && 5032 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5033 cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5034 } else { 5035 cerr << " #" << R->getReg(); 5036 } 5037 } else if (const ExternalSymbolSDNode *ES = 5038 dyn_cast<ExternalSymbolSDNode>(this)) { 5039 cerr << "'" << ES->getSymbol() << "'"; 5040 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5041 if (M->getValue()) 5042 cerr << "<" << M->getValue() << ">"; 5043 else 5044 cerr << "<null>"; 5045 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5046 if (M->MO.getValue()) 5047 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5048 else 5049 cerr << "<null:" << M->MO.getOffset() << ">"; 5050 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5051 cerr << N->getArgFlags().getArgFlagsString(); 5052 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5053 cerr << ":" << N->getVT().getMVTString(); 5054 } 5055 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5056 const Value *SrcValue = LD->getSrcValue(); 5057 int SrcOffset = LD->getSrcValueOffset(); 5058 cerr << " <"; 5059 if (SrcValue) 5060 cerr << SrcValue; 5061 else 5062 cerr << "null"; 5063 cerr << ":" << SrcOffset << ">"; 5064 5065 bool doExt = true; 5066 switch (LD->getExtensionType()) { 5067 default: doExt = false; break; 5068 case ISD::EXTLOAD: 5069 cerr << " <anyext "; 5070 break; 5071 case ISD::SEXTLOAD: 5072 cerr << " <sext "; 5073 break; 5074 case ISD::ZEXTLOAD: 5075 cerr << " <zext "; 5076 break; 5077 } 5078 if (doExt) 5079 cerr << LD->getMemoryVT().getMVTString() << ">"; 5080 5081 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5082 if (*AM) 5083 cerr << " " << AM; 5084 if (LD->isVolatile()) 5085 cerr << " <volatile>"; 5086 cerr << " alignment=" << LD->getAlignment(); 5087 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5088 const Value *SrcValue = ST->getSrcValue(); 5089 int SrcOffset = ST->getSrcValueOffset(); 5090 cerr << " <"; 5091 if (SrcValue) 5092 cerr << SrcValue; 5093 else 5094 cerr << "null"; 5095 cerr << ":" << SrcOffset << ">"; 5096 5097 if (ST->isTruncatingStore()) 5098 cerr << " <trunc " 5099 << ST->getMemoryVT().getMVTString() << ">"; 5100 5101 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5102 if (*AM) 5103 cerr << " " << AM; 5104 if (ST->isVolatile()) 5105 cerr << " <volatile>"; 5106 cerr << " alignment=" << ST->getAlignment(); 5107 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5108 const Value *SrcValue = AT->getSrcValue(); 5109 int SrcOffset = AT->getSrcValueOffset(); 5110 cerr << " <"; 5111 if (SrcValue) 5112 cerr << SrcValue; 5113 else 5114 cerr << "null"; 5115 cerr << ":" << SrcOffset << ">"; 5116 if (AT->isVolatile()) 5117 cerr << " <volatile>"; 5118 cerr << " alignment=" << AT->getAlignment(); 5119 } 5120} 5121 5122static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5123 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5124 if (N->getOperand(i).Val->hasOneUse()) 5125 DumpNodes(N->getOperand(i).Val, indent+2, G); 5126 else 5127 cerr << "\n" << std::string(indent+2, ' ') 5128 << (void*)N->getOperand(i).Val << ": <multiple use>"; 5129 5130 5131 cerr << "\n" << std::string(indent, ' '); 5132 N->dump(G); 5133} 5134 5135void SelectionDAG::dump() const { 5136 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5137 5138 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5139 I != E; ++I) { 5140 const SDNode *N = I; 5141 if (!N->hasOneUse() && N != getRoot().Val) 5142 DumpNodes(N, 2, this); 5143 } 5144 5145 if (getRoot().Val) DumpNodes(getRoot().Val, 2, this); 5146 5147 cerr << "\n\n"; 5148} 5149 5150const Type *ConstantPoolSDNode::getType() const { 5151 if (isMachineConstantPoolEntry()) 5152 return Val.MachineCPVal->getType(); 5153 return Val.ConstVal->getType(); 5154} 5155