SelectionDAG.cpp revision 50d2b1ac029d63500ea9b9347561b1454fa6ed6a
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/ValueTracking.h" 19#include "llvm/Function.h" 20#include "llvm/GlobalAlias.h" 21#include "llvm/GlobalVariable.h" 22#include "llvm/Intrinsics.h" 23#include "llvm/DerivedTypes.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CallingConv.h" 26#include "llvm/CodeGen/MachineBasicBlock.h" 27#include "llvm/CodeGen/MachineConstantPool.h" 28#include "llvm/CodeGen/MachineFrameInfo.h" 29#include "llvm/CodeGen/MachineModuleInfo.h" 30#include "llvm/CodeGen/PseudoSourceValue.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetFrameInfo.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/System/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BIT_CONVERT) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BIT_CONVERT) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 for (unsigned i = 1; i < NumElems; ++i) { 201 SDValue V = N->getOperand(i); 202 if (V.getOpcode() != ISD::UNDEF) 203 return false; 204 } 205 return true; 206} 207 208/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 209/// when given the operation for (X op Y). 210ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 211 // To perform this operation, we just need to swap the L and G bits of the 212 // operation. 213 unsigned OldL = (Operation >> 2) & 1; 214 unsigned OldG = (Operation >> 1) & 1; 215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 216 (OldL << 1) | // New G bit 217 (OldG << 2)); // New L bit. 218} 219 220/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 221/// 'op' is a valid SetCC operation. 222ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 223 unsigned Operation = Op; 224 if (isInteger) 225 Operation ^= 7; // Flip L, G, E bits, but not U. 226 else 227 Operation ^= 15; // Flip all of the condition bits. 228 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 232 return ISD::CondCode(Operation); 233} 234 235 236/// isSignedOp - For an integer comparison, return 1 if the comparison is a 237/// signed operation and 2 if the result is an unsigned comparison. Return zero 238/// if the operation does not depend on the sign of the input (setne and seteq). 239static int isSignedOp(ISD::CondCode Opcode) { 240 switch (Opcode) { 241 default: llvm_unreachable("Illegal integer setcc operation!"); 242 case ISD::SETEQ: 243 case ISD::SETNE: return 0; 244 case ISD::SETLT: 245 case ISD::SETLE: 246 case ISD::SETGT: 247 case ISD::SETGE: return 1; 248 case ISD::SETULT: 249 case ISD::SETULE: 250 case ISD::SETUGT: 251 case ISD::SETUGE: return 2; 252 } 253} 254 255/// getSetCCOrOperation - Return the result of a logical OR between different 256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 257/// returns SETCC_INVALID if it is not possible to represent the resultant 258/// comparison. 259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 260 bool isInteger) { 261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 262 // Cannot fold a signed integer setcc with an unsigned integer setcc. 263 return ISD::SETCC_INVALID; 264 265 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 266 267 // If the N and U bits get set then the resultant comparison DOES suddenly 268 // care about orderedness, and is true when ordered. 269 if (Op > ISD::SETTRUE2) 270 Op &= ~16; // Clear the U bit if the N bit is set. 271 272 // Canonicalize illegal integer setcc's. 273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 274 Op = ISD::SETNE; 275 276 return ISD::CondCode(Op); 277} 278 279/// getSetCCAndOperation - Return the result of a logical AND between different 280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 281/// function returns zero if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed setcc with an unsigned setcc. 287 return ISD::SETCC_INVALID; 288 289 // Combine all of the condition bits. 290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 291 292 // Canonicalize illegal integer setcc's. 293 if (isInteger) { 294 switch (Result) { 295 default: break; 296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 297 case ISD::SETOEQ: // SETEQ & SETU[LG]E 298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 301 } 302 } 303 304 return Result; 305} 306 307//===----------------------------------------------------------------------===// 308// SDNode Profile Support 309//===----------------------------------------------------------------------===// 310 311/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 312/// 313static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 314 ID.AddInteger(OpC); 315} 316 317/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 318/// solely with their pointer. 319static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 320 ID.AddPointer(VTList.VTs); 321} 322 323/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 324/// 325static void AddNodeIDOperands(FoldingSetNodeID &ID, 326 const SDValue *Ops, unsigned NumOps) { 327 for (; NumOps; --NumOps, ++Ops) { 328 ID.AddPointer(Ops->getNode()); 329 ID.AddInteger(Ops->getResNo()); 330 } 331} 332 333/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 334/// 335static void AddNodeIDOperands(FoldingSetNodeID &ID, 336 const SDUse *Ops, unsigned NumOps) { 337 for (; NumOps; --NumOps, ++Ops) { 338 ID.AddPointer(Ops->getNode()); 339 ID.AddInteger(Ops->getResNo()); 340 } 341} 342 343static void AddNodeIDNode(FoldingSetNodeID &ID, 344 unsigned short OpC, SDVTList VTList, 345 const SDValue *OpList, unsigned N) { 346 AddNodeIDOpcode(ID, OpC); 347 AddNodeIDValueTypes(ID, VTList); 348 AddNodeIDOperands(ID, OpList, N); 349} 350 351/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 352/// the NodeID data. 353static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 354 switch (N->getOpcode()) { 355 case ISD::TargetExternalSymbol: 356 case ISD::ExternalSymbol: 357 llvm_unreachable("Should only be used on nodes with operands"); 358 default: break; // Normal nodes don't need extra info. 359 case ISD::TargetConstant: 360 case ISD::Constant: 361 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 362 break; 363 case ISD::TargetConstantFP: 364 case ISD::ConstantFP: { 365 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 366 break; 367 } 368 case ISD::TargetGlobalAddress: 369 case ISD::GlobalAddress: 370 case ISD::TargetGlobalTLSAddress: 371 case ISD::GlobalTLSAddress: { 372 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 373 ID.AddPointer(GA->getGlobal()); 374 ID.AddInteger(GA->getOffset()); 375 ID.AddInteger(GA->getTargetFlags()); 376 break; 377 } 378 case ISD::BasicBlock: 379 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 380 break; 381 case ISD::Register: 382 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 383 break; 384 385 case ISD::SRCVALUE: 386 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 387 break; 388 case ISD::FrameIndex: 389 case ISD::TargetFrameIndex: 390 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 391 break; 392 case ISD::JumpTable: 393 case ISD::TargetJumpTable: 394 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 395 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 396 break; 397 case ISD::ConstantPool: 398 case ISD::TargetConstantPool: { 399 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 400 ID.AddInteger(CP->getAlignment()); 401 ID.AddInteger(CP->getOffset()); 402 if (CP->isMachineConstantPoolEntry()) 403 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 404 else 405 ID.AddPointer(CP->getConstVal()); 406 ID.AddInteger(CP->getTargetFlags()); 407 break; 408 } 409 case ISD::LOAD: { 410 const LoadSDNode *LD = cast<LoadSDNode>(N); 411 ID.AddInteger(LD->getMemoryVT().getRawBits()); 412 ID.AddInteger(LD->getRawSubclassData()); 413 break; 414 } 415 case ISD::STORE: { 416 const StoreSDNode *ST = cast<StoreSDNode>(N); 417 ID.AddInteger(ST->getMemoryVT().getRawBits()); 418 ID.AddInteger(ST->getRawSubclassData()); 419 break; 420 } 421 case ISD::ATOMIC_CMP_SWAP: 422 case ISD::ATOMIC_SWAP: 423 case ISD::ATOMIC_LOAD_ADD: 424 case ISD::ATOMIC_LOAD_SUB: 425 case ISD::ATOMIC_LOAD_AND: 426 case ISD::ATOMIC_LOAD_OR: 427 case ISD::ATOMIC_LOAD_XOR: 428 case ISD::ATOMIC_LOAD_NAND: 429 case ISD::ATOMIC_LOAD_MIN: 430 case ISD::ATOMIC_LOAD_MAX: 431 case ISD::ATOMIC_LOAD_UMIN: 432 case ISD::ATOMIC_LOAD_UMAX: { 433 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 434 ID.AddInteger(AT->getMemoryVT().getRawBits()); 435 ID.AddInteger(AT->getRawSubclassData()); 436 break; 437 } 438 case ISD::VECTOR_SHUFFLE: { 439 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 440 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 441 i != e; ++i) 442 ID.AddInteger(SVN->getMaskElt(i)); 443 break; 444 } 445 case ISD::TargetBlockAddress: 446 case ISD::BlockAddress: { 447 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 448 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 449 break; 450 } 451 } // end switch (N->getOpcode()) 452} 453 454/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 455/// data. 456static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 457 AddNodeIDOpcode(ID, N->getOpcode()); 458 // Add the return value info. 459 AddNodeIDValueTypes(ID, N->getVTList()); 460 // Add the operand info. 461 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 462 463 // Handle SDNode leafs with special info. 464 AddNodeIDCustom(ID, N); 465} 466 467/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 468/// the CSE map that carries volatility, temporalness, indexing mode, and 469/// extension/truncation information. 470/// 471static inline unsigned 472encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 473 bool isNonTemporal) { 474 assert((ConvType & 3) == ConvType && 475 "ConvType may not require more than 2 bits!"); 476 assert((AM & 7) == AM && 477 "AM may not require more than 3 bits!"); 478 return ConvType | 479 (AM << 2) | 480 (isVolatile << 5) | 481 (isNonTemporal << 6); 482} 483 484//===----------------------------------------------------------------------===// 485// SelectionDAG Class 486//===----------------------------------------------------------------------===// 487 488/// doNotCSE - Return true if CSE should not be performed for this node. 489static bool doNotCSE(SDNode *N) { 490 if (N->getValueType(0) == MVT::Flag) 491 return true; // Never CSE anything that produces a flag. 492 493 switch (N->getOpcode()) { 494 default: break; 495 case ISD::HANDLENODE: 496 case ISD::EH_LABEL: 497 return true; // Never CSE these nodes. 498 } 499 500 // Check that remaining values produced are not flags. 501 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 502 if (N->getValueType(i) == MVT::Flag) 503 return true; // Never CSE anything that produces a flag. 504 505 return false; 506} 507 508/// RemoveDeadNodes - This method deletes all unreachable nodes in the 509/// SelectionDAG. 510void SelectionDAG::RemoveDeadNodes() { 511 // Create a dummy node (which is not added to allnodes), that adds a reference 512 // to the root node, preventing it from being deleted. 513 HandleSDNode Dummy(getRoot()); 514 515 SmallVector<SDNode*, 128> DeadNodes; 516 517 // Add all obviously-dead nodes to the DeadNodes worklist. 518 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 519 if (I->use_empty()) 520 DeadNodes.push_back(I); 521 522 RemoveDeadNodes(DeadNodes); 523 524 // If the root changed (e.g. it was a dead load, update the root). 525 setRoot(Dummy.getValue()); 526} 527 528/// RemoveDeadNodes - This method deletes the unreachable nodes in the 529/// given list, and any nodes that become unreachable as a result. 530void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 531 DAGUpdateListener *UpdateListener) { 532 533 // Process the worklist, deleting the nodes and adding their uses to the 534 // worklist. 535 while (!DeadNodes.empty()) { 536 SDNode *N = DeadNodes.pop_back_val(); 537 538 if (UpdateListener) 539 UpdateListener->NodeDeleted(N, 0); 540 541 // Take the node out of the appropriate CSE map. 542 RemoveNodeFromCSEMaps(N); 543 544 // Next, brutally remove the operand list. This is safe to do, as there are 545 // no cycles in the graph. 546 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 547 SDUse &Use = *I++; 548 SDNode *Operand = Use.getNode(); 549 Use.set(SDValue()); 550 551 // Now that we removed this operand, see if there are no uses of it left. 552 if (Operand->use_empty()) 553 DeadNodes.push_back(Operand); 554 } 555 556 DeallocateNode(N); 557 } 558} 559 560void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 561 SmallVector<SDNode*, 16> DeadNodes(1, N); 562 RemoveDeadNodes(DeadNodes, UpdateListener); 563} 564 565void SelectionDAG::DeleteNode(SDNode *N) { 566 // First take this out of the appropriate CSE map. 567 RemoveNodeFromCSEMaps(N); 568 569 // Finally, remove uses due to operands of this node, remove from the 570 // AllNodes list, and delete the node. 571 DeleteNodeNotInCSEMaps(N); 572} 573 574void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 575 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 576 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 577 578 // Drop all of the operands and decrement used node's use counts. 579 N->DropOperands(); 580 581 DeallocateNode(N); 582} 583 584void SelectionDAG::DeallocateNode(SDNode *N) { 585 if (N->OperandsNeedDelete) 586 delete[] N->OperandList; 587 588 // Set the opcode to DELETED_NODE to help catch bugs when node 589 // memory is reallocated. 590 N->NodeType = ISD::DELETED_NODE; 591 592 NodeAllocator.Deallocate(AllNodes.remove(N)); 593 594 // Remove the ordering of this node. 595 Ordering->remove(N); 596 597 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 598 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 599 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 600 DbgVals[i]->setIsInvalidated(); 601} 602 603/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 604/// correspond to it. This is useful when we're about to delete or repurpose 605/// the node. We don't want future request for structurally identical nodes 606/// to return N anymore. 607bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 608 bool Erased = false; 609 switch (N->getOpcode()) { 610 case ISD::EntryToken: 611 llvm_unreachable("EntryToken should not be in CSEMaps!"); 612 return false; 613 case ISD::HANDLENODE: return false; // noop. 614 case ISD::CONDCODE: 615 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 616 "Cond code doesn't exist!"); 617 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 618 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 619 break; 620 case ISD::ExternalSymbol: 621 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 622 break; 623 case ISD::TargetExternalSymbol: { 624 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 625 Erased = TargetExternalSymbols.erase( 626 std::pair<std::string,unsigned char>(ESN->getSymbol(), 627 ESN->getTargetFlags())); 628 break; 629 } 630 case ISD::VALUETYPE: { 631 EVT VT = cast<VTSDNode>(N)->getVT(); 632 if (VT.isExtended()) { 633 Erased = ExtendedValueTypeNodes.erase(VT); 634 } else { 635 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 636 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 637 } 638 break; 639 } 640 default: 641 // Remove it from the CSE Map. 642 Erased = CSEMap.RemoveNode(N); 643 break; 644 } 645#ifndef NDEBUG 646 // Verify that the node was actually in one of the CSE maps, unless it has a 647 // flag result (which cannot be CSE'd) or is one of the special cases that are 648 // not subject to CSE. 649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 650 !N->isMachineOpcode() && !doNotCSE(N)) { 651 N->dump(this); 652 dbgs() << "\n"; 653 llvm_unreachable("Node is not in map!"); 654 } 655#endif 656 return Erased; 657} 658 659/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 660/// maps and modified in place. Add it back to the CSE maps, unless an identical 661/// node already exists, in which case transfer all its users to the existing 662/// node. This transfer can potentially trigger recursive merging. 663/// 664void 665SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 666 DAGUpdateListener *UpdateListener) { 667 // For node types that aren't CSE'd, just act as if no identical node 668 // already exists. 669 if (!doNotCSE(N)) { 670 SDNode *Existing = CSEMap.GetOrInsertNode(N); 671 if (Existing != N) { 672 // If there was already an existing matching node, use ReplaceAllUsesWith 673 // to replace the dead one with the existing one. This can cause 674 // recursive merging of other unrelated nodes down the line. 675 ReplaceAllUsesWith(N, Existing, UpdateListener); 676 677 // N is now dead. Inform the listener if it exists and delete it. 678 if (UpdateListener) 679 UpdateListener->NodeDeleted(N, Existing); 680 DeleteNodeNotInCSEMaps(N); 681 return; 682 } 683 } 684 685 // If the node doesn't already exist, we updated it. Inform a listener if 686 // it exists. 687 if (UpdateListener) 688 UpdateListener->NodeUpdated(N); 689} 690 691/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 692/// were replaced with those specified. If this node is never memoized, 693/// return null, otherwise return a pointer to the slot it would take. If a 694/// node already exists with these operands, the slot will be non-null. 695SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 696 void *&InsertPos) { 697 if (doNotCSE(N)) 698 return 0; 699 700 SDValue Ops[] = { Op }; 701 FoldingSetNodeID ID; 702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 703 AddNodeIDCustom(ID, N); 704 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 705 return Node; 706} 707 708/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 709/// were replaced with those specified. If this node is never memoized, 710/// return null, otherwise return a pointer to the slot it would take. If a 711/// node already exists with these operands, the slot will be non-null. 712SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 713 SDValue Op1, SDValue Op2, 714 void *&InsertPos) { 715 if (doNotCSE(N)) 716 return 0; 717 718 SDValue Ops[] = { Op1, Op2 }; 719 FoldingSetNodeID ID; 720 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 721 AddNodeIDCustom(ID, N); 722 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 723 return Node; 724} 725 726 727/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 728/// were replaced with those specified. If this node is never memoized, 729/// return null, otherwise return a pointer to the slot it would take. If a 730/// node already exists with these operands, the slot will be non-null. 731SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 732 const SDValue *Ops,unsigned NumOps, 733 void *&InsertPos) { 734 if (doNotCSE(N)) 735 return 0; 736 737 FoldingSetNodeID ID; 738 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 739 AddNodeIDCustom(ID, N); 740 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 741 return Node; 742} 743 744/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 745void SelectionDAG::VerifyNode(SDNode *N) { 746 switch (N->getOpcode()) { 747 default: 748 break; 749 case ISD::BUILD_PAIR: { 750 EVT VT = N->getValueType(0); 751 assert(N->getNumValues() == 1 && "Too many results!"); 752 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 753 "Wrong return type!"); 754 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 755 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 756 "Mismatched operand types!"); 757 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 758 "Wrong operand type!"); 759 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 760 "Wrong return type size"); 761 break; 762 } 763 case ISD::BUILD_VECTOR: { 764 assert(N->getNumValues() == 1 && "Too many results!"); 765 assert(N->getValueType(0).isVector() && "Wrong return type!"); 766 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 767 "Wrong number of operands!"); 768 EVT EltVT = N->getValueType(0).getVectorElementType(); 769 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 770 assert((I->getValueType() == EltVT || 771 (EltVT.isInteger() && I->getValueType().isInteger() && 772 EltVT.bitsLE(I->getValueType()))) && 773 "Wrong operand type!"); 774 break; 775 } 776 } 777} 778 779/// getEVTAlignment - Compute the default alignment value for the 780/// given type. 781/// 782unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 783 const Type *Ty = VT == MVT::iPTR ? 784 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 785 VT.getTypeForEVT(*getContext()); 786 787 return TLI.getTargetData()->getABITypeAlignment(Ty); 788} 789 790// EntryNode could meaningfully have debug info if we can find it... 791SelectionDAG::SelectionDAG(const TargetMachine &tm, FunctionLoweringInfo &fli) 792 : TM(tm), TLI(*tm.getTargetLowering()), FLI(fli), 793 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 794 Root(getEntryNode()), Ordering(0) { 795 AllNodes.push_back(&EntryNode); 796 Ordering = new SDNodeOrdering(); 797 DbgInfo = new SDDbgInfo(); 798} 799 800void SelectionDAG::init(MachineFunction &mf) { 801 MF = &mf; 802 Context = &mf.getFunction()->getContext(); 803} 804 805SelectionDAG::~SelectionDAG() { 806 allnodes_clear(); 807 delete Ordering; 808 DbgInfo->clear(); 809 delete DbgInfo; 810} 811 812void SelectionDAG::allnodes_clear() { 813 assert(&*AllNodes.begin() == &EntryNode); 814 AllNodes.remove(AllNodes.begin()); 815 while (!AllNodes.empty()) 816 DeallocateNode(AllNodes.begin()); 817} 818 819void SelectionDAG::clear() { 820 allnodes_clear(); 821 OperandAllocator.Reset(); 822 CSEMap.clear(); 823 824 ExtendedValueTypeNodes.clear(); 825 ExternalSymbols.clear(); 826 TargetExternalSymbols.clear(); 827 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 828 static_cast<CondCodeSDNode*>(0)); 829 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 830 static_cast<SDNode*>(0)); 831 832 EntryNode.UseList = 0; 833 AllNodes.push_back(&EntryNode); 834 Root = getEntryNode(); 835 delete Ordering; 836 Ordering = new SDNodeOrdering(); 837 DbgInfo->clear(); 838 delete DbgInfo; 839 DbgInfo = new SDDbgInfo(); 840} 841 842SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 843 return VT.bitsGT(Op.getValueType()) ? 844 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 845 getNode(ISD::TRUNCATE, DL, VT, Op); 846} 847 848SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 849 return VT.bitsGT(Op.getValueType()) ? 850 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 851 getNode(ISD::TRUNCATE, DL, VT, Op); 852} 853 854SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 855 assert(!VT.isVector() && 856 "getZeroExtendInReg should use the vector element type instead of " 857 "the vector type!"); 858 if (Op.getValueType() == VT) return Op; 859 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 860 APInt Imm = APInt::getLowBitsSet(BitWidth, 861 VT.getSizeInBits()); 862 return getNode(ISD::AND, DL, Op.getValueType(), Op, 863 getConstant(Imm, Op.getValueType())); 864} 865 866/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 867/// 868SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 869 EVT EltVT = VT.getScalarType(); 870 SDValue NegOne = 871 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 872 return getNode(ISD::XOR, DL, VT, Val, NegOne); 873} 874 875SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 876 EVT EltVT = VT.getScalarType(); 877 assert((EltVT.getSizeInBits() >= 64 || 878 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 879 "getConstant with a uint64_t value that doesn't fit in the type!"); 880 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 881} 882 883SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 884 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 885} 886 887SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 888 assert(VT.isInteger() && "Cannot create FP integer constant!"); 889 890 EVT EltVT = VT.getScalarType(); 891 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 892 "APInt size does not match type size!"); 893 894 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 895 FoldingSetNodeID ID; 896 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 897 ID.AddPointer(&Val); 898 void *IP = 0; 899 SDNode *N = NULL; 900 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 901 if (!VT.isVector()) 902 return SDValue(N, 0); 903 904 if (!N) { 905 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 906 CSEMap.InsertNode(N, IP); 907 AllNodes.push_back(N); 908 } 909 910 SDValue Result(N, 0); 911 if (VT.isVector()) { 912 SmallVector<SDValue, 8> Ops; 913 Ops.assign(VT.getVectorNumElements(), Result); 914 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 915 } 916 return Result; 917} 918 919SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 920 return getConstant(Val, TLI.getPointerTy(), isTarget); 921} 922 923 924SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 925 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 926} 927 928SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 929 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 930 931 EVT EltVT = VT.getScalarType(); 932 933 // Do the map lookup using the actual bit pattern for the floating point 934 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 935 // we don't have issues with SNANs. 936 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 937 FoldingSetNodeID ID; 938 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 939 ID.AddPointer(&V); 940 void *IP = 0; 941 SDNode *N = NULL; 942 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 943 if (!VT.isVector()) 944 return SDValue(N, 0); 945 946 if (!N) { 947 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 948 CSEMap.InsertNode(N, IP); 949 AllNodes.push_back(N); 950 } 951 952 SDValue Result(N, 0); 953 if (VT.isVector()) { 954 SmallVector<SDValue, 8> Ops; 955 Ops.assign(VT.getVectorNumElements(), Result); 956 // FIXME DebugLoc info might be appropriate here 957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 958 } 959 return Result; 960} 961 962SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 963 EVT EltVT = VT.getScalarType(); 964 if (EltVT==MVT::f32) 965 return getConstantFP(APFloat((float)Val), VT, isTarget); 966 else 967 return getConstantFP(APFloat(Val), VT, isTarget); 968} 969 970SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 971 EVT VT, int64_t Offset, 972 bool isTargetGA, 973 unsigned char TargetFlags) { 974 assert((TargetFlags == 0 || isTargetGA) && 975 "Cannot set target flags on target-independent globals"); 976 977 // Truncate (with sign-extension) the offset value to the pointer size. 978 EVT PTy = TLI.getPointerTy(); 979 unsigned BitWidth = PTy.getSizeInBits(); 980 if (BitWidth < 64) 981 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 982 983 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 984 if (!GVar) { 985 // If GV is an alias then use the aliasee for determining thread-localness. 986 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 987 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 988 } 989 990 unsigned Opc; 991 if (GVar && GVar->isThreadLocal()) 992 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 993 else 994 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 995 996 FoldingSetNodeID ID; 997 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 998 ID.AddPointer(GV); 999 ID.AddInteger(Offset); 1000 ID.AddInteger(TargetFlags); 1001 void *IP = 0; 1002 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1003 return SDValue(E, 0); 1004 1005 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1006 Offset, TargetFlags); 1007 CSEMap.InsertNode(N, IP); 1008 AllNodes.push_back(N); 1009 return SDValue(N, 0); 1010} 1011 1012SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1013 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1014 FoldingSetNodeID ID; 1015 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1016 ID.AddInteger(FI); 1017 void *IP = 0; 1018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1019 return SDValue(E, 0); 1020 1021 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1022 CSEMap.InsertNode(N, IP); 1023 AllNodes.push_back(N); 1024 return SDValue(N, 0); 1025} 1026 1027SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1028 unsigned char TargetFlags) { 1029 assert((TargetFlags == 0 || isTarget) && 1030 "Cannot set target flags on target-independent jump tables"); 1031 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1032 FoldingSetNodeID ID; 1033 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1034 ID.AddInteger(JTI); 1035 ID.AddInteger(TargetFlags); 1036 void *IP = 0; 1037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1038 return SDValue(E, 0); 1039 1040 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1041 TargetFlags); 1042 CSEMap.InsertNode(N, IP); 1043 AllNodes.push_back(N); 1044 return SDValue(N, 0); 1045} 1046 1047SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1048 unsigned Alignment, int Offset, 1049 bool isTarget, 1050 unsigned char TargetFlags) { 1051 assert((TargetFlags == 0 || isTarget) && 1052 "Cannot set target flags on target-independent globals"); 1053 if (Alignment == 0) 1054 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1055 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1056 FoldingSetNodeID ID; 1057 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1058 ID.AddInteger(Alignment); 1059 ID.AddInteger(Offset); 1060 ID.AddPointer(C); 1061 ID.AddInteger(TargetFlags); 1062 void *IP = 0; 1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1064 return SDValue(E, 0); 1065 1066 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1067 Alignment, TargetFlags); 1068 CSEMap.InsertNode(N, IP); 1069 AllNodes.push_back(N); 1070 return SDValue(N, 0); 1071} 1072 1073 1074SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1075 unsigned Alignment, int Offset, 1076 bool isTarget, 1077 unsigned char TargetFlags) { 1078 assert((TargetFlags == 0 || isTarget) && 1079 "Cannot set target flags on target-independent globals"); 1080 if (Alignment == 0) 1081 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1082 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1083 FoldingSetNodeID ID; 1084 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1085 ID.AddInteger(Alignment); 1086 ID.AddInteger(Offset); 1087 C->AddSelectionDAGCSEId(ID); 1088 ID.AddInteger(TargetFlags); 1089 void *IP = 0; 1090 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1091 return SDValue(E, 0); 1092 1093 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1094 Alignment, TargetFlags); 1095 CSEMap.InsertNode(N, IP); 1096 AllNodes.push_back(N); 1097 return SDValue(N, 0); 1098} 1099 1100SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1101 FoldingSetNodeID ID; 1102 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1103 ID.AddPointer(MBB); 1104 void *IP = 0; 1105 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1106 return SDValue(E, 0); 1107 1108 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1109 CSEMap.InsertNode(N, IP); 1110 AllNodes.push_back(N); 1111 return SDValue(N, 0); 1112} 1113 1114SDValue SelectionDAG::getValueType(EVT VT) { 1115 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1116 ValueTypeNodes.size()) 1117 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1118 1119 SDNode *&N = VT.isExtended() ? 1120 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1121 1122 if (N) return SDValue(N, 0); 1123 N = new (NodeAllocator) VTSDNode(VT); 1124 AllNodes.push_back(N); 1125 return SDValue(N, 0); 1126} 1127 1128SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1129 SDNode *&N = ExternalSymbols[Sym]; 1130 if (N) return SDValue(N, 0); 1131 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1132 AllNodes.push_back(N); 1133 return SDValue(N, 0); 1134} 1135 1136SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1137 unsigned char TargetFlags) { 1138 SDNode *&N = 1139 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1140 TargetFlags)]; 1141 if (N) return SDValue(N, 0); 1142 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1148 if ((unsigned)Cond >= CondCodeNodes.size()) 1149 CondCodeNodes.resize(Cond+1); 1150 1151 if (CondCodeNodes[Cond] == 0) { 1152 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1153 CondCodeNodes[Cond] = N; 1154 AllNodes.push_back(N); 1155 } 1156 1157 return SDValue(CondCodeNodes[Cond], 0); 1158} 1159 1160// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1161// the shuffle mask M that point at N1 to point at N2, and indices that point 1162// N2 to point at N1. 1163static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1164 std::swap(N1, N2); 1165 int NElts = M.size(); 1166 for (int i = 0; i != NElts; ++i) { 1167 if (M[i] >= NElts) 1168 M[i] -= NElts; 1169 else if (M[i] >= 0) 1170 M[i] += NElts; 1171 } 1172} 1173 1174SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1175 SDValue N2, const int *Mask) { 1176 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1177 assert(VT.isVector() && N1.getValueType().isVector() && 1178 "Vector Shuffle VTs must be a vectors"); 1179 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1180 && "Vector Shuffle VTs must have same element type"); 1181 1182 // Canonicalize shuffle undef, undef -> undef 1183 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1184 return getUNDEF(VT); 1185 1186 // Validate that all indices in Mask are within the range of the elements 1187 // input to the shuffle. 1188 unsigned NElts = VT.getVectorNumElements(); 1189 SmallVector<int, 8> MaskVec; 1190 for (unsigned i = 0; i != NElts; ++i) { 1191 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1192 MaskVec.push_back(Mask[i]); 1193 } 1194 1195 // Canonicalize shuffle v, v -> v, undef 1196 if (N1 == N2) { 1197 N2 = getUNDEF(VT); 1198 for (unsigned i = 0; i != NElts; ++i) 1199 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1200 } 1201 1202 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1203 if (N1.getOpcode() == ISD::UNDEF) 1204 commuteShuffle(N1, N2, MaskVec); 1205 1206 // Canonicalize all index into lhs, -> shuffle lhs, undef 1207 // Canonicalize all index into rhs, -> shuffle rhs, undef 1208 bool AllLHS = true, AllRHS = true; 1209 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1210 for (unsigned i = 0; i != NElts; ++i) { 1211 if (MaskVec[i] >= (int)NElts) { 1212 if (N2Undef) 1213 MaskVec[i] = -1; 1214 else 1215 AllLHS = false; 1216 } else if (MaskVec[i] >= 0) { 1217 AllRHS = false; 1218 } 1219 } 1220 if (AllLHS && AllRHS) 1221 return getUNDEF(VT); 1222 if (AllLHS && !N2Undef) 1223 N2 = getUNDEF(VT); 1224 if (AllRHS) { 1225 N1 = getUNDEF(VT); 1226 commuteShuffle(N1, N2, MaskVec); 1227 } 1228 1229 // If Identity shuffle, or all shuffle in to undef, return that node. 1230 bool AllUndef = true; 1231 bool Identity = true; 1232 for (unsigned i = 0; i != NElts; ++i) { 1233 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1234 if (MaskVec[i] >= 0) AllUndef = false; 1235 } 1236 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1237 return N1; 1238 if (AllUndef) 1239 return getUNDEF(VT); 1240 1241 FoldingSetNodeID ID; 1242 SDValue Ops[2] = { N1, N2 }; 1243 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1244 for (unsigned i = 0; i != NElts; ++i) 1245 ID.AddInteger(MaskVec[i]); 1246 1247 void* IP = 0; 1248 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1249 return SDValue(E, 0); 1250 1251 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1252 // SDNode doesn't have access to it. This memory will be "leaked" when 1253 // the node is deallocated, but recovered when the NodeAllocator is released. 1254 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1255 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1256 1257 ShuffleVectorSDNode *N = 1258 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1259 CSEMap.InsertNode(N, IP); 1260 AllNodes.push_back(N); 1261 return SDValue(N, 0); 1262} 1263 1264SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1265 SDValue Val, SDValue DTy, 1266 SDValue STy, SDValue Rnd, SDValue Sat, 1267 ISD::CvtCode Code) { 1268 // If the src and dest types are the same and the conversion is between 1269 // integer types of the same sign or two floats, no conversion is necessary. 1270 if (DTy == STy && 1271 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1272 return Val; 1273 1274 FoldingSetNodeID ID; 1275 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1276 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1277 void* IP = 0; 1278 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1279 return SDValue(E, 0); 1280 1281 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1282 Code); 1283 CSEMap.InsertNode(N, IP); 1284 AllNodes.push_back(N); 1285 return SDValue(N, 0); 1286} 1287 1288SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1289 FoldingSetNodeID ID; 1290 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1291 ID.AddInteger(RegNo); 1292 void *IP = 0; 1293 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1294 return SDValue(E, 0); 1295 1296 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1297 CSEMap.InsertNode(N, IP); 1298 AllNodes.push_back(N); 1299 return SDValue(N, 0); 1300} 1301 1302SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1303 FoldingSetNodeID ID; 1304 SDValue Ops[] = { Root }; 1305 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1306 ID.AddPointer(Label); 1307 void *IP = 0; 1308 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1309 return SDValue(E, 0); 1310 1311 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1312 CSEMap.InsertNode(N, IP); 1313 AllNodes.push_back(N); 1314 return SDValue(N, 0); 1315} 1316 1317 1318SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1319 bool isTarget, 1320 unsigned char TargetFlags) { 1321 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1322 1323 FoldingSetNodeID ID; 1324 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1325 ID.AddPointer(BA); 1326 ID.AddInteger(TargetFlags); 1327 void *IP = 0; 1328 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1329 return SDValue(E, 0); 1330 1331 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1332 CSEMap.InsertNode(N, IP); 1333 AllNodes.push_back(N); 1334 return SDValue(N, 0); 1335} 1336 1337SDValue SelectionDAG::getSrcValue(const Value *V) { 1338 assert((!V || V->getType()->isPointerTy()) && 1339 "SrcValue is not a pointer?"); 1340 1341 FoldingSetNodeID ID; 1342 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1343 ID.AddPointer(V); 1344 1345 void *IP = 0; 1346 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1347 return SDValue(E, 0); 1348 1349 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1350 CSEMap.InsertNode(N, IP); 1351 AllNodes.push_back(N); 1352 return SDValue(N, 0); 1353} 1354 1355/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1356SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1357 FoldingSetNodeID ID; 1358 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1359 ID.AddPointer(MD); 1360 1361 void *IP = 0; 1362 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1363 return SDValue(E, 0); 1364 1365 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1366 CSEMap.InsertNode(N, IP); 1367 AllNodes.push_back(N); 1368 return SDValue(N, 0); 1369} 1370 1371 1372/// getShiftAmountOperand - Return the specified value casted to 1373/// the target's desired shift amount type. 1374SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1375 EVT OpTy = Op.getValueType(); 1376 MVT ShTy = TLI.getShiftAmountTy(); 1377 if (OpTy == ShTy || OpTy.isVector()) return Op; 1378 1379 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1380 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1381} 1382 1383/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1384/// specified value type. 1385SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1386 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1387 unsigned ByteSize = VT.getStoreSize(); 1388 const Type *Ty = VT.getTypeForEVT(*getContext()); 1389 unsigned StackAlign = 1390 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1391 1392 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1393 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1394} 1395 1396/// CreateStackTemporary - Create a stack temporary suitable for holding 1397/// either of the specified value types. 1398SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1399 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1400 VT2.getStoreSizeInBits())/8; 1401 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1402 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1403 const TargetData *TD = TLI.getTargetData(); 1404 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1405 TD->getPrefTypeAlignment(Ty2)); 1406 1407 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1408 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1409 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1410} 1411 1412SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1413 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1414 // These setcc operations always fold. 1415 switch (Cond) { 1416 default: break; 1417 case ISD::SETFALSE: 1418 case ISD::SETFALSE2: return getConstant(0, VT); 1419 case ISD::SETTRUE: 1420 case ISD::SETTRUE2: return getConstant(1, VT); 1421 1422 case ISD::SETOEQ: 1423 case ISD::SETOGT: 1424 case ISD::SETOGE: 1425 case ISD::SETOLT: 1426 case ISD::SETOLE: 1427 case ISD::SETONE: 1428 case ISD::SETO: 1429 case ISD::SETUO: 1430 case ISD::SETUEQ: 1431 case ISD::SETUNE: 1432 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1433 break; 1434 } 1435 1436 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1437 const APInt &C2 = N2C->getAPIntValue(); 1438 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1439 const APInt &C1 = N1C->getAPIntValue(); 1440 1441 switch (Cond) { 1442 default: llvm_unreachable("Unknown integer setcc!"); 1443 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1444 case ISD::SETNE: return getConstant(C1 != C2, VT); 1445 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1446 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1447 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1448 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1449 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1450 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1451 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1452 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1453 } 1454 } 1455 } 1456 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1457 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1458 // No compile time operations on this type yet. 1459 if (N1C->getValueType(0) == MVT::ppcf128) 1460 return SDValue(); 1461 1462 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1463 switch (Cond) { 1464 default: break; 1465 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1466 return getUNDEF(VT); 1467 // fall through 1468 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1469 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1470 return getUNDEF(VT); 1471 // fall through 1472 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1473 R==APFloat::cmpLessThan, VT); 1474 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1475 return getUNDEF(VT); 1476 // fall through 1477 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1478 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1479 return getUNDEF(VT); 1480 // fall through 1481 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1482 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1483 return getUNDEF(VT); 1484 // fall through 1485 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1486 R==APFloat::cmpEqual, VT); 1487 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1488 return getUNDEF(VT); 1489 // fall through 1490 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1491 R==APFloat::cmpEqual, VT); 1492 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1493 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1494 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1495 R==APFloat::cmpEqual, VT); 1496 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1497 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1498 R==APFloat::cmpLessThan, VT); 1499 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1500 R==APFloat::cmpUnordered, VT); 1501 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1502 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1503 } 1504 } else { 1505 // Ensure that the constant occurs on the RHS. 1506 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1507 } 1508 } 1509 1510 // Could not fold it. 1511 return SDValue(); 1512} 1513 1514/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1515/// use this predicate to simplify operations downstream. 1516bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1517 // This predicate is not safe for vector operations. 1518 if (Op.getValueType().isVector()) 1519 return false; 1520 1521 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1522 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1523} 1524 1525/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1526/// this predicate to simplify operations downstream. Mask is known to be zero 1527/// for bits that V cannot have. 1528bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1529 unsigned Depth) const { 1530 APInt KnownZero, KnownOne; 1531 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1532 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1533 return (KnownZero & Mask) == Mask; 1534} 1535 1536/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1537/// known to be either zero or one and return them in the KnownZero/KnownOne 1538/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1539/// processing. 1540void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1541 APInt &KnownZero, APInt &KnownOne, 1542 unsigned Depth) const { 1543 unsigned BitWidth = Mask.getBitWidth(); 1544 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1545 "Mask size mismatches value type size!"); 1546 1547 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1548 if (Depth == 6 || Mask == 0) 1549 return; // Limit search depth. 1550 1551 APInt KnownZero2, KnownOne2; 1552 1553 switch (Op.getOpcode()) { 1554 case ISD::Constant: 1555 // We know all of the bits for a constant! 1556 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1557 KnownZero = ~KnownOne & Mask; 1558 return; 1559 case ISD::AND: 1560 // If either the LHS or the RHS are Zero, the result is zero. 1561 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1562 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1563 KnownZero2, KnownOne2, Depth+1); 1564 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1566 1567 // Output known-1 bits are only known if set in both the LHS & RHS. 1568 KnownOne &= KnownOne2; 1569 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1570 KnownZero |= KnownZero2; 1571 return; 1572 case ISD::OR: 1573 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1574 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1575 KnownZero2, KnownOne2, Depth+1); 1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1577 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1578 1579 // Output known-0 bits are only known if clear in both the LHS & RHS. 1580 KnownZero &= KnownZero2; 1581 // Output known-1 are known to be set if set in either the LHS | RHS. 1582 KnownOne |= KnownOne2; 1583 return; 1584 case ISD::XOR: { 1585 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1586 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1587 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1588 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1589 1590 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1591 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1592 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1593 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1594 KnownZero = KnownZeroOut; 1595 return; 1596 } 1597 case ISD::MUL: { 1598 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1599 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1600 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1601 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1602 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1603 1604 // If low bits are zero in either operand, output low known-0 bits. 1605 // Also compute a conserative estimate for high known-0 bits. 1606 // More trickiness is possible, but this is sufficient for the 1607 // interesting case of alignment computation. 1608 KnownOne.clear(); 1609 unsigned TrailZ = KnownZero.countTrailingOnes() + 1610 KnownZero2.countTrailingOnes(); 1611 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1612 KnownZero2.countLeadingOnes(), 1613 BitWidth) - BitWidth; 1614 1615 TrailZ = std::min(TrailZ, BitWidth); 1616 LeadZ = std::min(LeadZ, BitWidth); 1617 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1618 APInt::getHighBitsSet(BitWidth, LeadZ); 1619 KnownZero &= Mask; 1620 return; 1621 } 1622 case ISD::UDIV: { 1623 // For the purposes of computing leading zeros we can conservatively 1624 // treat a udiv as a logical right shift by the power of 2 known to 1625 // be less than the denominator. 1626 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1627 ComputeMaskedBits(Op.getOperand(0), 1628 AllOnes, KnownZero2, KnownOne2, Depth+1); 1629 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1630 1631 KnownOne2.clear(); 1632 KnownZero2.clear(); 1633 ComputeMaskedBits(Op.getOperand(1), 1634 AllOnes, KnownZero2, KnownOne2, Depth+1); 1635 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1636 if (RHSUnknownLeadingOnes != BitWidth) 1637 LeadZ = std::min(BitWidth, 1638 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1639 1640 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1641 return; 1642 } 1643 case ISD::SELECT: 1644 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1645 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1646 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1647 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1648 1649 // Only known if known in both the LHS and RHS. 1650 KnownOne &= KnownOne2; 1651 KnownZero &= KnownZero2; 1652 return; 1653 case ISD::SELECT_CC: 1654 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1655 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1657 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1658 1659 // Only known if known in both the LHS and RHS. 1660 KnownOne &= KnownOne2; 1661 KnownZero &= KnownZero2; 1662 return; 1663 case ISD::SADDO: 1664 case ISD::UADDO: 1665 case ISD::SSUBO: 1666 case ISD::USUBO: 1667 case ISD::SMULO: 1668 case ISD::UMULO: 1669 if (Op.getResNo() != 1) 1670 return; 1671 // The boolean result conforms to getBooleanContents. Fall through. 1672 case ISD::SETCC: 1673 // If we know the result of a setcc has the top bits zero, use this info. 1674 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1675 BitWidth > 1) 1676 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1677 return; 1678 case ISD::SHL: 1679 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1680 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1681 unsigned ShAmt = SA->getZExtValue(); 1682 1683 // If the shift count is an invalid immediate, don't do anything. 1684 if (ShAmt >= BitWidth) 1685 return; 1686 1687 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1688 KnownZero, KnownOne, Depth+1); 1689 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1690 KnownZero <<= ShAmt; 1691 KnownOne <<= ShAmt; 1692 // low bits known zero. 1693 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1694 } 1695 return; 1696 case ISD::SRL: 1697 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1698 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1699 unsigned ShAmt = SA->getZExtValue(); 1700 1701 // If the shift count is an invalid immediate, don't do anything. 1702 if (ShAmt >= BitWidth) 1703 return; 1704 1705 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1706 KnownZero, KnownOne, Depth+1); 1707 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1708 KnownZero = KnownZero.lshr(ShAmt); 1709 KnownOne = KnownOne.lshr(ShAmt); 1710 1711 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1712 KnownZero |= HighBits; // High bits known zero. 1713 } 1714 return; 1715 case ISD::SRA: 1716 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1717 unsigned ShAmt = SA->getZExtValue(); 1718 1719 // If the shift count is an invalid immediate, don't do anything. 1720 if (ShAmt >= BitWidth) 1721 return; 1722 1723 APInt InDemandedMask = (Mask << ShAmt); 1724 // If any of the demanded bits are produced by the sign extension, we also 1725 // demand the input sign bit. 1726 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1727 if (HighBits.getBoolValue()) 1728 InDemandedMask |= APInt::getSignBit(BitWidth); 1729 1730 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1731 Depth+1); 1732 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1733 KnownZero = KnownZero.lshr(ShAmt); 1734 KnownOne = KnownOne.lshr(ShAmt); 1735 1736 // Handle the sign bits. 1737 APInt SignBit = APInt::getSignBit(BitWidth); 1738 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1739 1740 if (KnownZero.intersects(SignBit)) { 1741 KnownZero |= HighBits; // New bits are known zero. 1742 } else if (KnownOne.intersects(SignBit)) { 1743 KnownOne |= HighBits; // New bits are known one. 1744 } 1745 } 1746 return; 1747 case ISD::SIGN_EXTEND_INREG: { 1748 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1749 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1750 1751 // Sign extension. Compute the demanded bits in the result that are not 1752 // present in the input. 1753 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1754 1755 APInt InSignBit = APInt::getSignBit(EBits); 1756 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1757 1758 // If the sign extended bits are demanded, we know that the sign 1759 // bit is demanded. 1760 InSignBit.zext(BitWidth); 1761 if (NewBits.getBoolValue()) 1762 InputDemandedBits |= InSignBit; 1763 1764 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1765 KnownZero, KnownOne, Depth+1); 1766 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1767 1768 // If the sign bit of the input is known set or clear, then we know the 1769 // top bits of the result. 1770 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1771 KnownZero |= NewBits; 1772 KnownOne &= ~NewBits; 1773 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1774 KnownOne |= NewBits; 1775 KnownZero &= ~NewBits; 1776 } else { // Input sign bit unknown 1777 KnownZero &= ~NewBits; 1778 KnownOne &= ~NewBits; 1779 } 1780 return; 1781 } 1782 case ISD::CTTZ: 1783 case ISD::CTLZ: 1784 case ISD::CTPOP: { 1785 unsigned LowBits = Log2_32(BitWidth)+1; 1786 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1787 KnownOne.clear(); 1788 return; 1789 } 1790 case ISD::LOAD: { 1791 if (ISD::isZEXTLoad(Op.getNode())) { 1792 LoadSDNode *LD = cast<LoadSDNode>(Op); 1793 EVT VT = LD->getMemoryVT(); 1794 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1795 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1796 } 1797 return; 1798 } 1799 case ISD::ZERO_EXTEND: { 1800 EVT InVT = Op.getOperand(0).getValueType(); 1801 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1802 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1803 APInt InMask = Mask; 1804 InMask.trunc(InBits); 1805 KnownZero.trunc(InBits); 1806 KnownOne.trunc(InBits); 1807 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1808 KnownZero.zext(BitWidth); 1809 KnownOne.zext(BitWidth); 1810 KnownZero |= NewBits; 1811 return; 1812 } 1813 case ISD::SIGN_EXTEND: { 1814 EVT InVT = Op.getOperand(0).getValueType(); 1815 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1816 APInt InSignBit = APInt::getSignBit(InBits); 1817 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1818 APInt InMask = Mask; 1819 InMask.trunc(InBits); 1820 1821 // If any of the sign extended bits are demanded, we know that the sign 1822 // bit is demanded. Temporarily set this bit in the mask for our callee. 1823 if (NewBits.getBoolValue()) 1824 InMask |= InSignBit; 1825 1826 KnownZero.trunc(InBits); 1827 KnownOne.trunc(InBits); 1828 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1829 1830 // Note if the sign bit is known to be zero or one. 1831 bool SignBitKnownZero = KnownZero.isNegative(); 1832 bool SignBitKnownOne = KnownOne.isNegative(); 1833 assert(!(SignBitKnownZero && SignBitKnownOne) && 1834 "Sign bit can't be known to be both zero and one!"); 1835 1836 // If the sign bit wasn't actually demanded by our caller, we don't 1837 // want it set in the KnownZero and KnownOne result values. Reset the 1838 // mask and reapply it to the result values. 1839 InMask = Mask; 1840 InMask.trunc(InBits); 1841 KnownZero &= InMask; 1842 KnownOne &= InMask; 1843 1844 KnownZero.zext(BitWidth); 1845 KnownOne.zext(BitWidth); 1846 1847 // If the sign bit is known zero or one, the top bits match. 1848 if (SignBitKnownZero) 1849 KnownZero |= NewBits; 1850 else if (SignBitKnownOne) 1851 KnownOne |= NewBits; 1852 return; 1853 } 1854 case ISD::ANY_EXTEND: { 1855 EVT InVT = Op.getOperand(0).getValueType(); 1856 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1857 APInt InMask = Mask; 1858 InMask.trunc(InBits); 1859 KnownZero.trunc(InBits); 1860 KnownOne.trunc(InBits); 1861 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1862 KnownZero.zext(BitWidth); 1863 KnownOne.zext(BitWidth); 1864 return; 1865 } 1866 case ISD::TRUNCATE: { 1867 EVT InVT = Op.getOperand(0).getValueType(); 1868 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1869 APInt InMask = Mask; 1870 InMask.zext(InBits); 1871 KnownZero.zext(InBits); 1872 KnownOne.zext(InBits); 1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1874 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1875 KnownZero.trunc(BitWidth); 1876 KnownOne.trunc(BitWidth); 1877 break; 1878 } 1879 case ISD::AssertZext: { 1880 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1881 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1882 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1883 KnownOne, Depth+1); 1884 KnownZero |= (~InMask) & Mask; 1885 return; 1886 } 1887 case ISD::FGETSIGN: 1888 // All bits are zero except the low bit. 1889 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1890 return; 1891 1892 case ISD::SUB: { 1893 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1894 // We know that the top bits of C-X are clear if X contains less bits 1895 // than C (i.e. no wrap-around can happen). For example, 20-X is 1896 // positive if we can prove that X is >= 0 and < 16. 1897 if (CLHS->getAPIntValue().isNonNegative()) { 1898 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1899 // NLZ can't be BitWidth with no sign bit 1900 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1901 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1902 Depth+1); 1903 1904 // If all of the MaskV bits are known to be zero, then we know the 1905 // output top bits are zero, because we now know that the output is 1906 // from [0-C]. 1907 if ((KnownZero2 & MaskV) == MaskV) { 1908 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1909 // Top bits known zero. 1910 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1911 } 1912 } 1913 } 1914 } 1915 // fall through 1916 case ISD::ADD: { 1917 // Output known-0 bits are known if clear or set in both the low clear bits 1918 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1919 // low 3 bits clear. 1920 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1921 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1922 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1923 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1924 1925 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1926 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1927 KnownZeroOut = std::min(KnownZeroOut, 1928 KnownZero2.countTrailingOnes()); 1929 1930 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1931 return; 1932 } 1933 case ISD::SREM: 1934 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1935 const APInt &RA = Rem->getAPIntValue().abs(); 1936 if (RA.isPowerOf2()) { 1937 APInt LowBits = RA - 1; 1938 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1939 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1940 1941 // The low bits of the first operand are unchanged by the srem. 1942 KnownZero = KnownZero2 & LowBits; 1943 KnownOne = KnownOne2 & LowBits; 1944 1945 // If the first operand is non-negative or has all low bits zero, then 1946 // the upper bits are all zero. 1947 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1948 KnownZero |= ~LowBits; 1949 1950 // If the first operand is negative and not all low bits are zero, then 1951 // the upper bits are all one. 1952 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1953 KnownOne |= ~LowBits; 1954 1955 KnownZero &= Mask; 1956 KnownOne &= Mask; 1957 1958 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1959 } 1960 } 1961 return; 1962 case ISD::UREM: { 1963 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1964 const APInt &RA = Rem->getAPIntValue(); 1965 if (RA.isPowerOf2()) { 1966 APInt LowBits = (RA - 1); 1967 APInt Mask2 = LowBits & Mask; 1968 KnownZero |= ~LowBits & Mask; 1969 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1970 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1971 break; 1972 } 1973 } 1974 1975 // Since the result is less than or equal to either operand, any leading 1976 // zero bits in either operand must also exist in the result. 1977 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1978 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1979 Depth+1); 1980 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1981 Depth+1); 1982 1983 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1984 KnownZero2.countLeadingOnes()); 1985 KnownOne.clear(); 1986 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1987 return; 1988 } 1989 default: 1990 // Allow the target to implement this method for its nodes. 1991 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1992 case ISD::INTRINSIC_WO_CHAIN: 1993 case ISD::INTRINSIC_W_CHAIN: 1994 case ISD::INTRINSIC_VOID: 1995 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1996 Depth); 1997 } 1998 return; 1999 } 2000} 2001 2002/// ComputeNumSignBits - Return the number of times the sign bit of the 2003/// register is replicated into the other bits. We know that at least 1 bit 2004/// is always equal to the sign bit (itself), but other cases can give us 2005/// information. For example, immediately after an "SRA X, 2", we know that 2006/// the top 3 bits are all equal to each other, so we return 3. 2007unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2008 EVT VT = Op.getValueType(); 2009 assert(VT.isInteger() && "Invalid VT!"); 2010 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2011 unsigned Tmp, Tmp2; 2012 unsigned FirstAnswer = 1; 2013 2014 if (Depth == 6) 2015 return 1; // Limit search depth. 2016 2017 switch (Op.getOpcode()) { 2018 default: break; 2019 case ISD::AssertSext: 2020 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2021 return VTBits-Tmp+1; 2022 case ISD::AssertZext: 2023 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2024 return VTBits-Tmp; 2025 2026 case ISD::Constant: { 2027 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2028 // If negative, return # leading ones. 2029 if (Val.isNegative()) 2030 return Val.countLeadingOnes(); 2031 2032 // Return # leading zeros. 2033 return Val.countLeadingZeros(); 2034 } 2035 2036 case ISD::SIGN_EXTEND: 2037 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2038 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2039 2040 case ISD::SIGN_EXTEND_INREG: 2041 // Max of the input and what this extends. 2042 Tmp = 2043 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2044 Tmp = VTBits-Tmp+1; 2045 2046 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2047 return std::max(Tmp, Tmp2); 2048 2049 case ISD::SRA: 2050 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2051 // SRA X, C -> adds C sign bits. 2052 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2053 Tmp += C->getZExtValue(); 2054 if (Tmp > VTBits) Tmp = VTBits; 2055 } 2056 return Tmp; 2057 case ISD::SHL: 2058 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2059 // shl destroys sign bits. 2060 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2061 if (C->getZExtValue() >= VTBits || // Bad shift. 2062 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2063 return Tmp - C->getZExtValue(); 2064 } 2065 break; 2066 case ISD::AND: 2067 case ISD::OR: 2068 case ISD::XOR: // NOT is handled here. 2069 // Logical binary ops preserve the number of sign bits at the worst. 2070 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2071 if (Tmp != 1) { 2072 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2073 FirstAnswer = std::min(Tmp, Tmp2); 2074 // We computed what we know about the sign bits as our first 2075 // answer. Now proceed to the generic code that uses 2076 // ComputeMaskedBits, and pick whichever answer is better. 2077 } 2078 break; 2079 2080 case ISD::SELECT: 2081 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2082 if (Tmp == 1) return 1; // Early out. 2083 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2084 return std::min(Tmp, Tmp2); 2085 2086 case ISD::SADDO: 2087 case ISD::UADDO: 2088 case ISD::SSUBO: 2089 case ISD::USUBO: 2090 case ISD::SMULO: 2091 case ISD::UMULO: 2092 if (Op.getResNo() != 1) 2093 break; 2094 // The boolean result conforms to getBooleanContents. Fall through. 2095 case ISD::SETCC: 2096 // If setcc returns 0/-1, all bits are sign bits. 2097 if (TLI.getBooleanContents() == 2098 TargetLowering::ZeroOrNegativeOneBooleanContent) 2099 return VTBits; 2100 break; 2101 case ISD::ROTL: 2102 case ISD::ROTR: 2103 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2104 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2105 2106 // Handle rotate right by N like a rotate left by 32-N. 2107 if (Op.getOpcode() == ISD::ROTR) 2108 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2109 2110 // If we aren't rotating out all of the known-in sign bits, return the 2111 // number that are left. This handles rotl(sext(x), 1) for example. 2112 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2113 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2114 } 2115 break; 2116 case ISD::ADD: 2117 // Add can have at most one carry bit. Thus we know that the output 2118 // is, at worst, one more bit than the inputs. 2119 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2120 if (Tmp == 1) return 1; // Early out. 2121 2122 // Special case decrementing a value (ADD X, -1): 2123 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2124 if (CRHS->isAllOnesValue()) { 2125 APInt KnownZero, KnownOne; 2126 APInt Mask = APInt::getAllOnesValue(VTBits); 2127 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2128 2129 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2130 // sign bits set. 2131 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2132 return VTBits; 2133 2134 // If we are subtracting one from a positive number, there is no carry 2135 // out of the result. 2136 if (KnownZero.isNegative()) 2137 return Tmp; 2138 } 2139 2140 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2141 if (Tmp2 == 1) return 1; 2142 return std::min(Tmp, Tmp2)-1; 2143 break; 2144 2145 case ISD::SUB: 2146 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2147 if (Tmp2 == 1) return 1; 2148 2149 // Handle NEG. 2150 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2151 if (CLHS->isNullValue()) { 2152 APInt KnownZero, KnownOne; 2153 APInt Mask = APInt::getAllOnesValue(VTBits); 2154 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2155 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2156 // sign bits set. 2157 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2158 return VTBits; 2159 2160 // If the input is known to be positive (the sign bit is known clear), 2161 // the output of the NEG has the same number of sign bits as the input. 2162 if (KnownZero.isNegative()) 2163 return Tmp2; 2164 2165 // Otherwise, we treat this like a SUB. 2166 } 2167 2168 // Sub can have at most one carry bit. Thus we know that the output 2169 // is, at worst, one more bit than the inputs. 2170 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2171 if (Tmp == 1) return 1; // Early out. 2172 return std::min(Tmp, Tmp2)-1; 2173 break; 2174 case ISD::TRUNCATE: 2175 // FIXME: it's tricky to do anything useful for this, but it is an important 2176 // case for targets like X86. 2177 break; 2178 } 2179 2180 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2181 if (Op.getOpcode() == ISD::LOAD) { 2182 LoadSDNode *LD = cast<LoadSDNode>(Op); 2183 unsigned ExtType = LD->getExtensionType(); 2184 switch (ExtType) { 2185 default: break; 2186 case ISD::SEXTLOAD: // '17' bits known 2187 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2188 return VTBits-Tmp+1; 2189 case ISD::ZEXTLOAD: // '16' bits known 2190 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2191 return VTBits-Tmp; 2192 } 2193 } 2194 2195 // Allow the target to implement this method for its nodes. 2196 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2197 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2198 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2199 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2200 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2201 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2202 } 2203 2204 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2205 // use this information. 2206 APInt KnownZero, KnownOne; 2207 APInt Mask = APInt::getAllOnesValue(VTBits); 2208 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2209 2210 if (KnownZero.isNegative()) { // sign bit is 0 2211 Mask = KnownZero; 2212 } else if (KnownOne.isNegative()) { // sign bit is 1; 2213 Mask = KnownOne; 2214 } else { 2215 // Nothing known. 2216 return FirstAnswer; 2217 } 2218 2219 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2220 // the number of identical bits in the top of the input value. 2221 Mask = ~Mask; 2222 Mask <<= Mask.getBitWidth()-VTBits; 2223 // Return # leading zeros. We use 'min' here in case Val was zero before 2224 // shifting. We don't want to return '64' as for an i32 "0". 2225 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2226} 2227 2228bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2229 // If we're told that NaNs won't happen, assume they won't. 2230 if (FiniteOnlyFPMath()) 2231 return true; 2232 2233 // If the value is a constant, we can obviously see if it is a NaN or not. 2234 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2235 return !C->getValueAPF().isNaN(); 2236 2237 // TODO: Recognize more cases here. 2238 2239 return false; 2240} 2241 2242bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2243 // If the value is a constant, we can obviously see if it is a zero or not. 2244 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2245 return !C->isZero(); 2246 2247 // TODO: Recognize more cases here. 2248 2249 return false; 2250} 2251 2252bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2253 // Check the obvious case. 2254 if (A == B) return true; 2255 2256 // For for negative and positive zero. 2257 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2258 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2259 if (CA->isZero() && CB->isZero()) return true; 2260 2261 // Otherwise they may not be equal. 2262 return false; 2263} 2264 2265bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2266 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2267 if (!GA) return false; 2268 if (GA->getOffset() != 0) return false; 2269 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2270 if (!GV) return false; 2271 return MF->getMMI().hasDebugInfo(); 2272} 2273 2274 2275/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2276/// element of the result of the vector shuffle. 2277SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2278 unsigned i) { 2279 EVT VT = N->getValueType(0); 2280 DebugLoc dl = N->getDebugLoc(); 2281 if (N->getMaskElt(i) < 0) 2282 return getUNDEF(VT.getVectorElementType()); 2283 unsigned Index = N->getMaskElt(i); 2284 unsigned NumElems = VT.getVectorNumElements(); 2285 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2286 Index %= NumElems; 2287 2288 if (V.getOpcode() == ISD::BIT_CONVERT) { 2289 V = V.getOperand(0); 2290 EVT VVT = V.getValueType(); 2291 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2292 return SDValue(); 2293 } 2294 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2295 return (Index == 0) ? V.getOperand(0) 2296 : getUNDEF(VT.getVectorElementType()); 2297 if (V.getOpcode() == ISD::BUILD_VECTOR) 2298 return V.getOperand(Index); 2299 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2300 return getShuffleScalarElt(SVN, Index); 2301 return SDValue(); 2302} 2303 2304 2305/// getNode - Gets or creates the specified node. 2306/// 2307SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2308 FoldingSetNodeID ID; 2309 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2310 void *IP = 0; 2311 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2312 return SDValue(E, 0); 2313 2314 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2315 CSEMap.InsertNode(N, IP); 2316 2317 AllNodes.push_back(N); 2318#ifndef NDEBUG 2319 VerifyNode(N); 2320#endif 2321 return SDValue(N, 0); 2322} 2323 2324SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2325 EVT VT, SDValue Operand) { 2326 // Constant fold unary operations with an integer constant operand. 2327 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2328 const APInt &Val = C->getAPIntValue(); 2329 switch (Opcode) { 2330 default: break; 2331 case ISD::SIGN_EXTEND: 2332 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2333 case ISD::ANY_EXTEND: 2334 case ISD::ZERO_EXTEND: 2335 case ISD::TRUNCATE: 2336 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2337 case ISD::UINT_TO_FP: 2338 case ISD::SINT_TO_FP: { 2339 const uint64_t zero[] = {0, 0}; 2340 // No compile time operations on ppcf128. 2341 if (VT == MVT::ppcf128) break; 2342 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2343 (void)apf.convertFromAPInt(Val, 2344 Opcode==ISD::SINT_TO_FP, 2345 APFloat::rmNearestTiesToEven); 2346 return getConstantFP(apf, VT); 2347 } 2348 case ISD::BIT_CONVERT: 2349 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2350 return getConstantFP(Val.bitsToFloat(), VT); 2351 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2352 return getConstantFP(Val.bitsToDouble(), VT); 2353 break; 2354 case ISD::BSWAP: 2355 return getConstant(Val.byteSwap(), VT); 2356 case ISD::CTPOP: 2357 return getConstant(Val.countPopulation(), VT); 2358 case ISD::CTLZ: 2359 return getConstant(Val.countLeadingZeros(), VT); 2360 case ISD::CTTZ: 2361 return getConstant(Val.countTrailingZeros(), VT); 2362 } 2363 } 2364 2365 // Constant fold unary operations with a floating point constant operand. 2366 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2367 APFloat V = C->getValueAPF(); // make copy 2368 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2369 switch (Opcode) { 2370 case ISD::FNEG: 2371 V.changeSign(); 2372 return getConstantFP(V, VT); 2373 case ISD::FABS: 2374 V.clearSign(); 2375 return getConstantFP(V, VT); 2376 case ISD::FP_ROUND: 2377 case ISD::FP_EXTEND: { 2378 bool ignored; 2379 // This can return overflow, underflow, or inexact; we don't care. 2380 // FIXME need to be more flexible about rounding mode. 2381 (void)V.convert(*EVTToAPFloatSemantics(VT), 2382 APFloat::rmNearestTiesToEven, &ignored); 2383 return getConstantFP(V, VT); 2384 } 2385 case ISD::FP_TO_SINT: 2386 case ISD::FP_TO_UINT: { 2387 integerPart x[2]; 2388 bool ignored; 2389 assert(integerPartWidth >= 64); 2390 // FIXME need to be more flexible about rounding mode. 2391 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2392 Opcode==ISD::FP_TO_SINT, 2393 APFloat::rmTowardZero, &ignored); 2394 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2395 break; 2396 APInt api(VT.getSizeInBits(), 2, x); 2397 return getConstant(api, VT); 2398 } 2399 case ISD::BIT_CONVERT: 2400 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2401 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2402 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2403 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2404 break; 2405 } 2406 } 2407 } 2408 2409 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2410 switch (Opcode) { 2411 case ISD::TokenFactor: 2412 case ISD::MERGE_VALUES: 2413 case ISD::CONCAT_VECTORS: 2414 return Operand; // Factor, merge or concat of one node? No need. 2415 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2416 case ISD::FP_EXTEND: 2417 assert(VT.isFloatingPoint() && 2418 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2419 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2420 assert((!VT.isVector() || 2421 VT.getVectorNumElements() == 2422 Operand.getValueType().getVectorNumElements()) && 2423 "Vector element count mismatch!"); 2424 if (Operand.getOpcode() == ISD::UNDEF) 2425 return getUNDEF(VT); 2426 break; 2427 case ISD::SIGN_EXTEND: 2428 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2429 "Invalid SIGN_EXTEND!"); 2430 if (Operand.getValueType() == VT) return Operand; // noop extension 2431 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2432 "Invalid sext node, dst < src!"); 2433 assert((!VT.isVector() || 2434 VT.getVectorNumElements() == 2435 Operand.getValueType().getVectorNumElements()) && 2436 "Vector element count mismatch!"); 2437 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2438 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2439 break; 2440 case ISD::ZERO_EXTEND: 2441 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2442 "Invalid ZERO_EXTEND!"); 2443 if (Operand.getValueType() == VT) return Operand; // noop extension 2444 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2445 "Invalid zext node, dst < src!"); 2446 assert((!VT.isVector() || 2447 VT.getVectorNumElements() == 2448 Operand.getValueType().getVectorNumElements()) && 2449 "Vector element count mismatch!"); 2450 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2451 return getNode(ISD::ZERO_EXTEND, DL, VT, 2452 Operand.getNode()->getOperand(0)); 2453 break; 2454 case ISD::ANY_EXTEND: 2455 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2456 "Invalid ANY_EXTEND!"); 2457 if (Operand.getValueType() == VT) return Operand; // noop extension 2458 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2459 "Invalid anyext node, dst < src!"); 2460 assert((!VT.isVector() || 2461 VT.getVectorNumElements() == 2462 Operand.getValueType().getVectorNumElements()) && 2463 "Vector element count mismatch!"); 2464 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2465 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2466 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2467 break; 2468 case ISD::TRUNCATE: 2469 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2470 "Invalid TRUNCATE!"); 2471 if (Operand.getValueType() == VT) return Operand; // noop truncate 2472 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2473 "Invalid truncate node, src < dst!"); 2474 assert((!VT.isVector() || 2475 VT.getVectorNumElements() == 2476 Operand.getValueType().getVectorNumElements()) && 2477 "Vector element count mismatch!"); 2478 if (OpOpcode == ISD::TRUNCATE) 2479 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2480 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2481 OpOpcode == ISD::ANY_EXTEND) { 2482 // If the source is smaller than the dest, we still need an extend. 2483 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2484 .bitsLT(VT.getScalarType())) 2485 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2486 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2487 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2488 else 2489 return Operand.getNode()->getOperand(0); 2490 } 2491 break; 2492 case ISD::BIT_CONVERT: 2493 // Basic sanity checking. 2494 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2495 && "Cannot BIT_CONVERT between types of different sizes!"); 2496 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2497 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2498 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2499 if (OpOpcode == ISD::UNDEF) 2500 return getUNDEF(VT); 2501 break; 2502 case ISD::SCALAR_TO_VECTOR: 2503 assert(VT.isVector() && !Operand.getValueType().isVector() && 2504 (VT.getVectorElementType() == Operand.getValueType() || 2505 (VT.getVectorElementType().isInteger() && 2506 Operand.getValueType().isInteger() && 2507 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2508 "Illegal SCALAR_TO_VECTOR node!"); 2509 if (OpOpcode == ISD::UNDEF) 2510 return getUNDEF(VT); 2511 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2512 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2513 isa<ConstantSDNode>(Operand.getOperand(1)) && 2514 Operand.getConstantOperandVal(1) == 0 && 2515 Operand.getOperand(0).getValueType() == VT) 2516 return Operand.getOperand(0); 2517 break; 2518 case ISD::FNEG: 2519 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2520 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2521 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2522 Operand.getNode()->getOperand(0)); 2523 if (OpOpcode == ISD::FNEG) // --X -> X 2524 return Operand.getNode()->getOperand(0); 2525 break; 2526 case ISD::FABS: 2527 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2528 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2529 break; 2530 } 2531 2532 SDNode *N; 2533 SDVTList VTs = getVTList(VT); 2534 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2535 FoldingSetNodeID ID; 2536 SDValue Ops[1] = { Operand }; 2537 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2538 void *IP = 0; 2539 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2540 return SDValue(E, 0); 2541 2542 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2543 CSEMap.InsertNode(N, IP); 2544 } else { 2545 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2546 } 2547 2548 AllNodes.push_back(N); 2549#ifndef NDEBUG 2550 VerifyNode(N); 2551#endif 2552 return SDValue(N, 0); 2553} 2554 2555SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2556 EVT VT, 2557 ConstantSDNode *Cst1, 2558 ConstantSDNode *Cst2) { 2559 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2560 2561 switch (Opcode) { 2562 case ISD::ADD: return getConstant(C1 + C2, VT); 2563 case ISD::SUB: return getConstant(C1 - C2, VT); 2564 case ISD::MUL: return getConstant(C1 * C2, VT); 2565 case ISD::UDIV: 2566 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2567 break; 2568 case ISD::UREM: 2569 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2570 break; 2571 case ISD::SDIV: 2572 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2573 break; 2574 case ISD::SREM: 2575 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2576 break; 2577 case ISD::AND: return getConstant(C1 & C2, VT); 2578 case ISD::OR: return getConstant(C1 | C2, VT); 2579 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2580 case ISD::SHL: return getConstant(C1 << C2, VT); 2581 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2582 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2583 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2584 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2585 default: break; 2586 } 2587 2588 return SDValue(); 2589} 2590 2591SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2592 SDValue N1, SDValue N2) { 2593 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2594 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2595 switch (Opcode) { 2596 default: break; 2597 case ISD::TokenFactor: 2598 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2599 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2600 // Fold trivial token factors. 2601 if (N1.getOpcode() == ISD::EntryToken) return N2; 2602 if (N2.getOpcode() == ISD::EntryToken) return N1; 2603 if (N1 == N2) return N1; 2604 break; 2605 case ISD::CONCAT_VECTORS: 2606 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2607 // one big BUILD_VECTOR. 2608 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2609 N2.getOpcode() == ISD::BUILD_VECTOR) { 2610 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2611 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2612 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2613 } 2614 break; 2615 case ISD::AND: 2616 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2617 N1.getValueType() == VT && "Binary operator types must match!"); 2618 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2619 // worth handling here. 2620 if (N2C && N2C->isNullValue()) 2621 return N2; 2622 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2623 return N1; 2624 break; 2625 case ISD::OR: 2626 case ISD::XOR: 2627 case ISD::ADD: 2628 case ISD::SUB: 2629 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2630 N1.getValueType() == VT && "Binary operator types must match!"); 2631 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2632 // it's worth handling here. 2633 if (N2C && N2C->isNullValue()) 2634 return N1; 2635 break; 2636 case ISD::UDIV: 2637 case ISD::UREM: 2638 case ISD::MULHU: 2639 case ISD::MULHS: 2640 case ISD::MUL: 2641 case ISD::SDIV: 2642 case ISD::SREM: 2643 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2644 // fall through 2645 case ISD::FADD: 2646 case ISD::FSUB: 2647 case ISD::FMUL: 2648 case ISD::FDIV: 2649 case ISD::FREM: 2650 if (UnsafeFPMath) { 2651 if (Opcode == ISD::FADD) { 2652 // 0+x --> x 2653 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2654 if (CFP->getValueAPF().isZero()) 2655 return N2; 2656 // x+0 --> x 2657 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2658 if (CFP->getValueAPF().isZero()) 2659 return N1; 2660 } else if (Opcode == ISD::FSUB) { 2661 // x-0 --> x 2662 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2663 if (CFP->getValueAPF().isZero()) 2664 return N1; 2665 } 2666 } 2667 assert(N1.getValueType() == N2.getValueType() && 2668 N1.getValueType() == VT && "Binary operator types must match!"); 2669 break; 2670 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2671 assert(N1.getValueType() == VT && 2672 N1.getValueType().isFloatingPoint() && 2673 N2.getValueType().isFloatingPoint() && 2674 "Invalid FCOPYSIGN!"); 2675 break; 2676 case ISD::SHL: 2677 case ISD::SRA: 2678 case ISD::SRL: 2679 case ISD::ROTL: 2680 case ISD::ROTR: 2681 assert(VT == N1.getValueType() && 2682 "Shift operators return type must be the same as their first arg"); 2683 assert(VT.isInteger() && N2.getValueType().isInteger() && 2684 "Shifts only work on integers"); 2685 2686 // Always fold shifts of i1 values so the code generator doesn't need to 2687 // handle them. Since we know the size of the shift has to be less than the 2688 // size of the value, the shift/rotate count is guaranteed to be zero. 2689 if (VT == MVT::i1) 2690 return N1; 2691 if (N2C && N2C->isNullValue()) 2692 return N1; 2693 break; 2694 case ISD::FP_ROUND_INREG: { 2695 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2696 assert(VT == N1.getValueType() && "Not an inreg round!"); 2697 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2698 "Cannot FP_ROUND_INREG integer types"); 2699 assert(EVT.isVector() == VT.isVector() && 2700 "FP_ROUND_INREG type should be vector iff the operand " 2701 "type is vector!"); 2702 assert((!EVT.isVector() || 2703 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2704 "Vector element counts must match in FP_ROUND_INREG"); 2705 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2706 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2707 break; 2708 } 2709 case ISD::FP_ROUND: 2710 assert(VT.isFloatingPoint() && 2711 N1.getValueType().isFloatingPoint() && 2712 VT.bitsLE(N1.getValueType()) && 2713 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2714 if (N1.getValueType() == VT) return N1; // noop conversion. 2715 break; 2716 case ISD::AssertSext: 2717 case ISD::AssertZext: { 2718 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2719 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2720 assert(VT.isInteger() && EVT.isInteger() && 2721 "Cannot *_EXTEND_INREG FP types"); 2722 assert(!EVT.isVector() && 2723 "AssertSExt/AssertZExt type should be the vector element type " 2724 "rather than the vector type!"); 2725 assert(EVT.bitsLE(VT) && "Not extending!"); 2726 if (VT == EVT) return N1; // noop assertion. 2727 break; 2728 } 2729 case ISD::SIGN_EXTEND_INREG: { 2730 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2731 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2732 assert(VT.isInteger() && EVT.isInteger() && 2733 "Cannot *_EXTEND_INREG FP types"); 2734 assert(EVT.isVector() == VT.isVector() && 2735 "SIGN_EXTEND_INREG type should be vector iff the operand " 2736 "type is vector!"); 2737 assert((!EVT.isVector() || 2738 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2739 "Vector element counts must match in SIGN_EXTEND_INREG"); 2740 assert(EVT.bitsLE(VT) && "Not extending!"); 2741 if (EVT == VT) return N1; // Not actually extending 2742 2743 if (N1C) { 2744 APInt Val = N1C->getAPIntValue(); 2745 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2746 Val <<= Val.getBitWidth()-FromBits; 2747 Val = Val.ashr(Val.getBitWidth()-FromBits); 2748 return getConstant(Val, VT); 2749 } 2750 break; 2751 } 2752 case ISD::EXTRACT_VECTOR_ELT: 2753 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2754 if (N1.getOpcode() == ISD::UNDEF) 2755 return getUNDEF(VT); 2756 2757 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2758 // expanding copies of large vectors from registers. 2759 if (N2C && 2760 N1.getOpcode() == ISD::CONCAT_VECTORS && 2761 N1.getNumOperands() > 0) { 2762 unsigned Factor = 2763 N1.getOperand(0).getValueType().getVectorNumElements(); 2764 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2765 N1.getOperand(N2C->getZExtValue() / Factor), 2766 getConstant(N2C->getZExtValue() % Factor, 2767 N2.getValueType())); 2768 } 2769 2770 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2771 // expanding large vector constants. 2772 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2773 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2774 EVT VEltTy = N1.getValueType().getVectorElementType(); 2775 if (Elt.getValueType() != VEltTy) { 2776 // If the vector element type is not legal, the BUILD_VECTOR operands 2777 // are promoted and implicitly truncated. Make that explicit here. 2778 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2779 } 2780 if (VT != VEltTy) { 2781 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2782 // result is implicitly extended. 2783 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2784 } 2785 return Elt; 2786 } 2787 2788 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2789 // operations are lowered to scalars. 2790 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2791 // If the indices are the same, return the inserted element else 2792 // if the indices are known different, extract the element from 2793 // the original vector. 2794 if (N1.getOperand(2) == N2) { 2795 if (VT == N1.getOperand(1).getValueType()) 2796 return N1.getOperand(1); 2797 else 2798 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2799 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2800 isa<ConstantSDNode>(N2)) 2801 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2802 } 2803 break; 2804 case ISD::EXTRACT_ELEMENT: 2805 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2806 assert(!N1.getValueType().isVector() && !VT.isVector() && 2807 (N1.getValueType().isInteger() == VT.isInteger()) && 2808 "Wrong types for EXTRACT_ELEMENT!"); 2809 2810 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2811 // 64-bit integers into 32-bit parts. Instead of building the extract of 2812 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2813 if (N1.getOpcode() == ISD::BUILD_PAIR) 2814 return N1.getOperand(N2C->getZExtValue()); 2815 2816 // EXTRACT_ELEMENT of a constant int is also very common. 2817 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2818 unsigned ElementSize = VT.getSizeInBits(); 2819 unsigned Shift = ElementSize * N2C->getZExtValue(); 2820 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2821 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2822 } 2823 break; 2824 case ISD::EXTRACT_SUBVECTOR: 2825 if (N1.getValueType() == VT) // Trivial extraction. 2826 return N1; 2827 break; 2828 } 2829 2830 if (N1C) { 2831 if (N2C) { 2832 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2833 if (SV.getNode()) return SV; 2834 } else { // Cannonicalize constant to RHS if commutative 2835 if (isCommutativeBinOp(Opcode)) { 2836 std::swap(N1C, N2C); 2837 std::swap(N1, N2); 2838 } 2839 } 2840 } 2841 2842 // Constant fold FP operations. 2843 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2844 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2845 if (N1CFP) { 2846 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2847 // Cannonicalize constant to RHS if commutative 2848 std::swap(N1CFP, N2CFP); 2849 std::swap(N1, N2); 2850 } else if (N2CFP && VT != MVT::ppcf128) { 2851 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2852 APFloat::opStatus s; 2853 switch (Opcode) { 2854 case ISD::FADD: 2855 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2856 if (s != APFloat::opInvalidOp) 2857 return getConstantFP(V1, VT); 2858 break; 2859 case ISD::FSUB: 2860 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2861 if (s!=APFloat::opInvalidOp) 2862 return getConstantFP(V1, VT); 2863 break; 2864 case ISD::FMUL: 2865 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2866 if (s!=APFloat::opInvalidOp) 2867 return getConstantFP(V1, VT); 2868 break; 2869 case ISD::FDIV: 2870 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2871 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2872 return getConstantFP(V1, VT); 2873 break; 2874 case ISD::FREM : 2875 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2876 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2877 return getConstantFP(V1, VT); 2878 break; 2879 case ISD::FCOPYSIGN: 2880 V1.copySign(V2); 2881 return getConstantFP(V1, VT); 2882 default: break; 2883 } 2884 } 2885 } 2886 2887 // Canonicalize an UNDEF to the RHS, even over a constant. 2888 if (N1.getOpcode() == ISD::UNDEF) { 2889 if (isCommutativeBinOp(Opcode)) { 2890 std::swap(N1, N2); 2891 } else { 2892 switch (Opcode) { 2893 case ISD::FP_ROUND_INREG: 2894 case ISD::SIGN_EXTEND_INREG: 2895 case ISD::SUB: 2896 case ISD::FSUB: 2897 case ISD::FDIV: 2898 case ISD::FREM: 2899 case ISD::SRA: 2900 return N1; // fold op(undef, arg2) -> undef 2901 case ISD::UDIV: 2902 case ISD::SDIV: 2903 case ISD::UREM: 2904 case ISD::SREM: 2905 case ISD::SRL: 2906 case ISD::SHL: 2907 if (!VT.isVector()) 2908 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2909 // For vectors, we can't easily build an all zero vector, just return 2910 // the LHS. 2911 return N2; 2912 } 2913 } 2914 } 2915 2916 // Fold a bunch of operators when the RHS is undef. 2917 if (N2.getOpcode() == ISD::UNDEF) { 2918 switch (Opcode) { 2919 case ISD::XOR: 2920 if (N1.getOpcode() == ISD::UNDEF) 2921 // Handle undef ^ undef -> 0 special case. This is a common 2922 // idiom (misuse). 2923 return getConstant(0, VT); 2924 // fallthrough 2925 case ISD::ADD: 2926 case ISD::ADDC: 2927 case ISD::ADDE: 2928 case ISD::SUB: 2929 case ISD::UDIV: 2930 case ISD::SDIV: 2931 case ISD::UREM: 2932 case ISD::SREM: 2933 return N2; // fold op(arg1, undef) -> undef 2934 case ISD::FADD: 2935 case ISD::FSUB: 2936 case ISD::FMUL: 2937 case ISD::FDIV: 2938 case ISD::FREM: 2939 if (UnsafeFPMath) 2940 return N2; 2941 break; 2942 case ISD::MUL: 2943 case ISD::AND: 2944 case ISD::SRL: 2945 case ISD::SHL: 2946 if (!VT.isVector()) 2947 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2948 // For vectors, we can't easily build an all zero vector, just return 2949 // the LHS. 2950 return N1; 2951 case ISD::OR: 2952 if (!VT.isVector()) 2953 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2954 // For vectors, we can't easily build an all one vector, just return 2955 // the LHS. 2956 return N1; 2957 case ISD::SRA: 2958 return N1; 2959 } 2960 } 2961 2962 // Memoize this node if possible. 2963 SDNode *N; 2964 SDVTList VTs = getVTList(VT); 2965 if (VT != MVT::Flag) { 2966 SDValue Ops[] = { N1, N2 }; 2967 FoldingSetNodeID ID; 2968 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2969 void *IP = 0; 2970 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2971 return SDValue(E, 0); 2972 2973 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2974 CSEMap.InsertNode(N, IP); 2975 } else { 2976 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2977 } 2978 2979 AllNodes.push_back(N); 2980#ifndef NDEBUG 2981 VerifyNode(N); 2982#endif 2983 return SDValue(N, 0); 2984} 2985 2986SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2987 SDValue N1, SDValue N2, SDValue N3) { 2988 // Perform various simplifications. 2989 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2990 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2991 switch (Opcode) { 2992 case ISD::CONCAT_VECTORS: 2993 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2994 // one big BUILD_VECTOR. 2995 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2996 N2.getOpcode() == ISD::BUILD_VECTOR && 2997 N3.getOpcode() == ISD::BUILD_VECTOR) { 2998 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2999 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 3000 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 3001 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3002 } 3003 break; 3004 case ISD::SETCC: { 3005 // Use FoldSetCC to simplify SETCC's. 3006 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3007 if (Simp.getNode()) return Simp; 3008 break; 3009 } 3010 case ISD::SELECT: 3011 if (N1C) { 3012 if (N1C->getZExtValue()) 3013 return N2; // select true, X, Y -> X 3014 else 3015 return N3; // select false, X, Y -> Y 3016 } 3017 3018 if (N2 == N3) return N2; // select C, X, X -> X 3019 break; 3020 case ISD::BRCOND: 3021 if (N2C) { 3022 if (N2C->getZExtValue()) // Unconditional branch 3023 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3024 else 3025 return N1; // Never-taken branch 3026 } 3027 break; 3028 case ISD::VECTOR_SHUFFLE: 3029 llvm_unreachable("should use getVectorShuffle constructor!"); 3030 break; 3031 case ISD::BIT_CONVERT: 3032 // Fold bit_convert nodes from a type to themselves. 3033 if (N1.getValueType() == VT) 3034 return N1; 3035 break; 3036 } 3037 3038 // Memoize node if it doesn't produce a flag. 3039 SDNode *N; 3040 SDVTList VTs = getVTList(VT); 3041 if (VT != MVT::Flag) { 3042 SDValue Ops[] = { N1, N2, N3 }; 3043 FoldingSetNodeID ID; 3044 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3045 void *IP = 0; 3046 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3047 return SDValue(E, 0); 3048 3049 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3050 CSEMap.InsertNode(N, IP); 3051 } else { 3052 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3053 } 3054 3055 AllNodes.push_back(N); 3056#ifndef NDEBUG 3057 VerifyNode(N); 3058#endif 3059 return SDValue(N, 0); 3060} 3061 3062SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3063 SDValue N1, SDValue N2, SDValue N3, 3064 SDValue N4) { 3065 SDValue Ops[] = { N1, N2, N3, N4 }; 3066 return getNode(Opcode, DL, VT, Ops, 4); 3067} 3068 3069SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3070 SDValue N1, SDValue N2, SDValue N3, 3071 SDValue N4, SDValue N5) { 3072 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3073 return getNode(Opcode, DL, VT, Ops, 5); 3074} 3075 3076/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3077/// the incoming stack arguments to be loaded from the stack. 3078SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3079 SmallVector<SDValue, 8> ArgChains; 3080 3081 // Include the original chain at the beginning of the list. When this is 3082 // used by target LowerCall hooks, this helps legalize find the 3083 // CALLSEQ_BEGIN node. 3084 ArgChains.push_back(Chain); 3085 3086 // Add a chain value for each stack argument. 3087 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3088 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3089 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3090 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3091 if (FI->getIndex() < 0) 3092 ArgChains.push_back(SDValue(L, 1)); 3093 3094 // Build a tokenfactor for all the chains. 3095 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3096 &ArgChains[0], ArgChains.size()); 3097} 3098 3099/// getMemsetValue - Vectorized representation of the memset value 3100/// operand. 3101static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3102 DebugLoc dl) { 3103 assert(Value.getOpcode() != ISD::UNDEF); 3104 3105 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3106 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3107 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3108 unsigned Shift = 8; 3109 for (unsigned i = NumBits; i > 8; i >>= 1) { 3110 Val = (Val << Shift) | Val; 3111 Shift <<= 1; 3112 } 3113 if (VT.isInteger()) 3114 return DAG.getConstant(Val, VT); 3115 return DAG.getConstantFP(APFloat(Val), VT); 3116 } 3117 3118 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3119 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3120 unsigned Shift = 8; 3121 for (unsigned i = NumBits; i > 8; i >>= 1) { 3122 Value = DAG.getNode(ISD::OR, dl, VT, 3123 DAG.getNode(ISD::SHL, dl, VT, Value, 3124 DAG.getConstant(Shift, 3125 TLI.getShiftAmountTy())), 3126 Value); 3127 Shift <<= 1; 3128 } 3129 3130 return Value; 3131} 3132 3133/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3134/// used when a memcpy is turned into a memset when the source is a constant 3135/// string ptr. 3136static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3137 const TargetLowering &TLI, 3138 std::string &Str, unsigned Offset) { 3139 // Handle vector with all elements zero. 3140 if (Str.empty()) { 3141 if (VT.isInteger()) 3142 return DAG.getConstant(0, VT); 3143 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3144 VT.getSimpleVT().SimpleTy == MVT::f64) 3145 return DAG.getConstantFP(0.0, VT); 3146 else if (VT.isVector()) { 3147 unsigned NumElts = VT.getVectorNumElements(); 3148 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3149 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3150 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3151 EltVT, NumElts))); 3152 } else 3153 llvm_unreachable("Expected type!"); 3154 } 3155 3156 assert(!VT.isVector() && "Can't handle vector type here!"); 3157 unsigned NumBits = VT.getSizeInBits(); 3158 unsigned MSB = NumBits / 8; 3159 uint64_t Val = 0; 3160 if (TLI.isLittleEndian()) 3161 Offset = Offset + MSB - 1; 3162 for (unsigned i = 0; i != MSB; ++i) { 3163 Val = (Val << 8) | (unsigned char)Str[Offset]; 3164 Offset += TLI.isLittleEndian() ? -1 : 1; 3165 } 3166 return DAG.getConstant(Val, VT); 3167} 3168 3169/// getMemBasePlusOffset - Returns base and offset node for the 3170/// 3171static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3172 SelectionDAG &DAG) { 3173 EVT VT = Base.getValueType(); 3174 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3175 VT, Base, DAG.getConstant(Offset, VT)); 3176} 3177 3178/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3179/// 3180static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3181 unsigned SrcDelta = 0; 3182 GlobalAddressSDNode *G = NULL; 3183 if (Src.getOpcode() == ISD::GlobalAddress) 3184 G = cast<GlobalAddressSDNode>(Src); 3185 else if (Src.getOpcode() == ISD::ADD && 3186 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3187 Src.getOperand(1).getOpcode() == ISD::Constant) { 3188 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3189 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3190 } 3191 if (!G) 3192 return false; 3193 3194 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3195 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3196 return true; 3197 3198 return false; 3199} 3200 3201/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3202/// to replace the memset / memcpy. Return true if the number of memory ops 3203/// is below the threshold. It returns the types of the sequence of 3204/// memory ops to perform memset / memcpy by reference. 3205static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3206 unsigned Limit, uint64_t Size, 3207 unsigned DstAlign, unsigned SrcAlign, 3208 bool NonScalarIntSafe, 3209 bool MemcpyStrSrc, 3210 SelectionDAG &DAG, 3211 const TargetLowering &TLI) { 3212 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3213 "Expecting memcpy / memset source to meet alignment requirement!"); 3214 // If 'SrcAlign' is zero, that means the memory operation does not need load 3215 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3216 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3217 // specified alignment of the memory operation. If it is zero, that means 3218 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3219 // indicates whether the memcpy source is constant so it does not need to be 3220 // loaded. 3221 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3222 NonScalarIntSafe, MemcpyStrSrc, 3223 DAG.getMachineFunction()); 3224 3225 if (VT == MVT::Other) { 3226 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3227 TLI.allowsUnalignedMemoryAccesses(VT)) { 3228 VT = TLI.getPointerTy(); 3229 } else { 3230 switch (DstAlign & 7) { 3231 case 0: VT = MVT::i64; break; 3232 case 4: VT = MVT::i32; break; 3233 case 2: VT = MVT::i16; break; 3234 default: VT = MVT::i8; break; 3235 } 3236 } 3237 3238 MVT LVT = MVT::i64; 3239 while (!TLI.isTypeLegal(LVT)) 3240 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3241 assert(LVT.isInteger()); 3242 3243 if (VT.bitsGT(LVT)) 3244 VT = LVT; 3245 } 3246 3247 unsigned NumMemOps = 0; 3248 while (Size != 0) { 3249 unsigned VTSize = VT.getSizeInBits() / 8; 3250 while (VTSize > Size) { 3251 // For now, only use non-vector load / store's for the left-over pieces. 3252 if (VT.isVector() || VT.isFloatingPoint()) { 3253 VT = MVT::i64; 3254 while (!TLI.isTypeLegal(VT)) 3255 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3256 VTSize = VT.getSizeInBits() / 8; 3257 } else { 3258 // This can result in a type that is not legal on the target, e.g. 3259 // 1 or 2 bytes on PPC. 3260 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3261 VTSize >>= 1; 3262 } 3263 } 3264 3265 if (++NumMemOps > Limit) 3266 return false; 3267 MemOps.push_back(VT); 3268 Size -= VTSize; 3269 } 3270 3271 return true; 3272} 3273 3274static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3275 SDValue Chain, SDValue Dst, 3276 SDValue Src, uint64_t Size, 3277 unsigned Align, bool isVol, 3278 bool AlwaysInline, 3279 const Value *DstSV, uint64_t DstSVOff, 3280 const Value *SrcSV, uint64_t SrcSVOff) { 3281 // Turn a memcpy of undef to nop. 3282 if (Src.getOpcode() == ISD::UNDEF) 3283 return Chain; 3284 3285 // Expand memcpy to a series of load and store ops if the size operand falls 3286 // below a certain threshold. 3287 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3288 std::vector<EVT> MemOps; 3289 bool DstAlignCanChange = false; 3290 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3291 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3292 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3293 DstAlignCanChange = true; 3294 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3295 if (Align > SrcAlign) 3296 SrcAlign = Align; 3297 std::string Str; 3298 bool CopyFromStr = isMemSrcFromString(Src, Str); 3299 bool isZeroStr = CopyFromStr && Str.empty(); 3300 uint64_t Limit = -1ULL; 3301 if (!AlwaysInline) 3302 Limit = TLI.getMaxStoresPerMemcpy(); 3303 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3304 (DstAlignCanChange ? 0 : Align), 3305 (isZeroStr ? 0 : SrcAlign), 3306 true, CopyFromStr, DAG, TLI)) 3307 return SDValue(); 3308 3309 if (DstAlignCanChange) { 3310 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3311 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3312 if (NewAlign > Align) { 3313 // Give the stack frame object a larger alignment if needed. 3314 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3315 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3316 Align = NewAlign; 3317 } 3318 } 3319 3320 SmallVector<SDValue, 8> OutChains; 3321 unsigned NumMemOps = MemOps.size(); 3322 uint64_t SrcOff = 0, DstOff = 0; 3323 for (unsigned i = 0; i != NumMemOps; ++i) { 3324 EVT VT = MemOps[i]; 3325 unsigned VTSize = VT.getSizeInBits() / 8; 3326 SDValue Value, Store; 3327 3328 if (CopyFromStr && 3329 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3330 // It's unlikely a store of a vector immediate can be done in a single 3331 // instruction. It would require a load from a constantpool first. 3332 // We only handle zero vectors here. 3333 // FIXME: Handle other cases where store of vector immediate is done in 3334 // a single instruction. 3335 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3336 Store = DAG.getStore(Chain, dl, Value, 3337 getMemBasePlusOffset(Dst, DstOff, DAG), 3338 DstSV, DstSVOff + DstOff, isVol, false, Align); 3339 } else { 3340 // The type might not be legal for the target. This should only happen 3341 // if the type is smaller than a legal type, as on PPC, so the right 3342 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3343 // to Load/Store if NVT==VT. 3344 // FIXME does the case above also need this? 3345 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3346 assert(NVT.bitsGE(VT)); 3347 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3348 getMemBasePlusOffset(Src, SrcOff, DAG), 3349 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3350 MinAlign(SrcAlign, SrcOff)); 3351 Store = DAG.getTruncStore(Chain, dl, Value, 3352 getMemBasePlusOffset(Dst, DstOff, DAG), 3353 DstSV, DstSVOff + DstOff, VT, isVol, false, 3354 Align); 3355 } 3356 OutChains.push_back(Store); 3357 SrcOff += VTSize; 3358 DstOff += VTSize; 3359 } 3360 3361 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3362 &OutChains[0], OutChains.size()); 3363} 3364 3365static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3366 SDValue Chain, SDValue Dst, 3367 SDValue Src, uint64_t Size, 3368 unsigned Align, bool isVol, 3369 bool AlwaysInline, 3370 const Value *DstSV, uint64_t DstSVOff, 3371 const Value *SrcSV, uint64_t SrcSVOff) { 3372 // Turn a memmove of undef to nop. 3373 if (Src.getOpcode() == ISD::UNDEF) 3374 return Chain; 3375 3376 // Expand memmove to a series of load and store ops if the size operand falls 3377 // below a certain threshold. 3378 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3379 std::vector<EVT> MemOps; 3380 uint64_t Limit = -1ULL; 3381 if (!AlwaysInline) 3382 Limit = TLI.getMaxStoresPerMemmove(); 3383 bool DstAlignCanChange = false; 3384 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3385 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3386 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3387 DstAlignCanChange = true; 3388 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3389 if (Align > SrcAlign) 3390 SrcAlign = Align; 3391 3392 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3393 (DstAlignCanChange ? 0 : Align), 3394 SrcAlign, true, false, DAG, TLI)) 3395 return SDValue(); 3396 3397 if (DstAlignCanChange) { 3398 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3399 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3400 if (NewAlign > Align) { 3401 // Give the stack frame object a larger alignment if needed. 3402 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3403 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3404 Align = NewAlign; 3405 } 3406 } 3407 3408 uint64_t SrcOff = 0, DstOff = 0; 3409 SmallVector<SDValue, 8> LoadValues; 3410 SmallVector<SDValue, 8> LoadChains; 3411 SmallVector<SDValue, 8> OutChains; 3412 unsigned NumMemOps = MemOps.size(); 3413 for (unsigned i = 0; i < NumMemOps; i++) { 3414 EVT VT = MemOps[i]; 3415 unsigned VTSize = VT.getSizeInBits() / 8; 3416 SDValue Value, Store; 3417 3418 Value = DAG.getLoad(VT, dl, Chain, 3419 getMemBasePlusOffset(Src, SrcOff, DAG), 3420 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3421 LoadValues.push_back(Value); 3422 LoadChains.push_back(Value.getValue(1)); 3423 SrcOff += VTSize; 3424 } 3425 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3426 &LoadChains[0], LoadChains.size()); 3427 OutChains.clear(); 3428 for (unsigned i = 0; i < NumMemOps; i++) { 3429 EVT VT = MemOps[i]; 3430 unsigned VTSize = VT.getSizeInBits() / 8; 3431 SDValue Value, Store; 3432 3433 Store = DAG.getStore(Chain, dl, LoadValues[i], 3434 getMemBasePlusOffset(Dst, DstOff, DAG), 3435 DstSV, DstSVOff + DstOff, isVol, false, Align); 3436 OutChains.push_back(Store); 3437 DstOff += VTSize; 3438 } 3439 3440 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3441 &OutChains[0], OutChains.size()); 3442} 3443 3444static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3445 SDValue Chain, SDValue Dst, 3446 SDValue Src, uint64_t Size, 3447 unsigned Align, bool isVol, 3448 const Value *DstSV, uint64_t DstSVOff) { 3449 // Turn a memset of undef to nop. 3450 if (Src.getOpcode() == ISD::UNDEF) 3451 return Chain; 3452 3453 // Expand memset to a series of load/store ops if the size operand 3454 // falls below a certain threshold. 3455 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3456 std::vector<EVT> MemOps; 3457 bool DstAlignCanChange = false; 3458 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3459 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3460 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3461 DstAlignCanChange = true; 3462 bool NonScalarIntSafe = 3463 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3464 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3465 Size, (DstAlignCanChange ? 0 : Align), 0, 3466 NonScalarIntSafe, false, DAG, TLI)) 3467 return SDValue(); 3468 3469 if (DstAlignCanChange) { 3470 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3471 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3472 if (NewAlign > Align) { 3473 // Give the stack frame object a larger alignment if needed. 3474 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3475 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3476 Align = NewAlign; 3477 } 3478 } 3479 3480 SmallVector<SDValue, 8> OutChains; 3481 uint64_t DstOff = 0; 3482 unsigned NumMemOps = MemOps.size(); 3483 for (unsigned i = 0; i < NumMemOps; i++) { 3484 EVT VT = MemOps[i]; 3485 unsigned VTSize = VT.getSizeInBits() / 8; 3486 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3487 SDValue Store = DAG.getStore(Chain, dl, Value, 3488 getMemBasePlusOffset(Dst, DstOff, DAG), 3489 DstSV, DstSVOff + DstOff, isVol, false, 0); 3490 OutChains.push_back(Store); 3491 DstOff += VTSize; 3492 } 3493 3494 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3495 &OutChains[0], OutChains.size()); 3496} 3497 3498SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3499 SDValue Src, SDValue Size, 3500 unsigned Align, bool isVol, bool AlwaysInline, 3501 const Value *DstSV, uint64_t DstSVOff, 3502 const Value *SrcSV, uint64_t SrcSVOff) { 3503 3504 // Check to see if we should lower the memcpy to loads and stores first. 3505 // For cases within the target-specified limits, this is the best choice. 3506 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3507 if (ConstantSize) { 3508 // Memcpy with size zero? Just return the original chain. 3509 if (ConstantSize->isNullValue()) 3510 return Chain; 3511 3512 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3513 ConstantSize->getZExtValue(),Align, 3514 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3515 if (Result.getNode()) 3516 return Result; 3517 } 3518 3519 // Then check to see if we should lower the memcpy with target-specific 3520 // code. If the target chooses to do this, this is the next best. 3521 SDValue Result = 3522 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3523 isVol, AlwaysInline, 3524 DstSV, DstSVOff, SrcSV, SrcSVOff); 3525 if (Result.getNode()) 3526 return Result; 3527 3528 // If we really need inline code and the target declined to provide it, 3529 // use a (potentially long) sequence of loads and stores. 3530 if (AlwaysInline) { 3531 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3532 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3533 ConstantSize->getZExtValue(), Align, isVol, 3534 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3535 } 3536 3537 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3538 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3539 // respect volatile, so they may do things like read or write memory 3540 // beyond the given memory regions. But fixing this isn't easy, and most 3541 // people don't care. 3542 3543 // Emit a library call. 3544 TargetLowering::ArgListTy Args; 3545 TargetLowering::ArgListEntry Entry; 3546 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3547 Entry.Node = Dst; Args.push_back(Entry); 3548 Entry.Node = Src; Args.push_back(Entry); 3549 Entry.Node = Size; Args.push_back(Entry); 3550 // FIXME: pass in DebugLoc 3551 std::pair<SDValue,SDValue> CallResult = 3552 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3553 false, false, false, false, 0, 3554 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3555 /*isReturnValueUsed=*/false, 3556 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3557 TLI.getPointerTy()), 3558 Args, *this, dl); 3559 return CallResult.second; 3560} 3561 3562SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3563 SDValue Src, SDValue Size, 3564 unsigned Align, bool isVol, 3565 const Value *DstSV, uint64_t DstSVOff, 3566 const Value *SrcSV, uint64_t SrcSVOff) { 3567 3568 // Check to see if we should lower the memmove to loads and stores first. 3569 // For cases within the target-specified limits, this is the best choice. 3570 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3571 if (ConstantSize) { 3572 // Memmove with size zero? Just return the original chain. 3573 if (ConstantSize->isNullValue()) 3574 return Chain; 3575 3576 SDValue Result = 3577 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3578 ConstantSize->getZExtValue(), Align, isVol, 3579 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3580 if (Result.getNode()) 3581 return Result; 3582 } 3583 3584 // Then check to see if we should lower the memmove with target-specific 3585 // code. If the target chooses to do this, this is the next best. 3586 SDValue Result = 3587 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3588 DstSV, DstSVOff, SrcSV, SrcSVOff); 3589 if (Result.getNode()) 3590 return Result; 3591 3592 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3593 // not be safe. See memcpy above for more details. 3594 3595 // Emit a library call. 3596 TargetLowering::ArgListTy Args; 3597 TargetLowering::ArgListEntry Entry; 3598 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3599 Entry.Node = Dst; Args.push_back(Entry); 3600 Entry.Node = Src; Args.push_back(Entry); 3601 Entry.Node = Size; Args.push_back(Entry); 3602 // FIXME: pass in DebugLoc 3603 std::pair<SDValue,SDValue> CallResult = 3604 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3605 false, false, false, false, 0, 3606 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3607 /*isReturnValueUsed=*/false, 3608 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3609 TLI.getPointerTy()), 3610 Args, *this, dl); 3611 return CallResult.second; 3612} 3613 3614SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3615 SDValue Src, SDValue Size, 3616 unsigned Align, bool isVol, 3617 const Value *DstSV, uint64_t DstSVOff) { 3618 3619 // Check to see if we should lower the memset to stores first. 3620 // For cases within the target-specified limits, this is the best choice. 3621 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3622 if (ConstantSize) { 3623 // Memset with size zero? Just return the original chain. 3624 if (ConstantSize->isNullValue()) 3625 return Chain; 3626 3627 SDValue Result = 3628 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3629 Align, isVol, DstSV, DstSVOff); 3630 3631 if (Result.getNode()) 3632 return Result; 3633 } 3634 3635 // Then check to see if we should lower the memset with target-specific 3636 // code. If the target chooses to do this, this is the next best. 3637 SDValue Result = 3638 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3639 DstSV, DstSVOff); 3640 if (Result.getNode()) 3641 return Result; 3642 3643 // Emit a library call. 3644 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3645 TargetLowering::ArgListTy Args; 3646 TargetLowering::ArgListEntry Entry; 3647 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3648 Args.push_back(Entry); 3649 // Extend or truncate the argument to be an i32 value for the call. 3650 if (Src.getValueType().bitsGT(MVT::i32)) 3651 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3652 else 3653 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3654 Entry.Node = Src; 3655 Entry.Ty = Type::getInt32Ty(*getContext()); 3656 Entry.isSExt = true; 3657 Args.push_back(Entry); 3658 Entry.Node = Size; 3659 Entry.Ty = IntPtrTy; 3660 Entry.isSExt = false; 3661 Args.push_back(Entry); 3662 // FIXME: pass in DebugLoc 3663 std::pair<SDValue,SDValue> CallResult = 3664 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3665 false, false, false, false, 0, 3666 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3667 /*isReturnValueUsed=*/false, 3668 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3669 TLI.getPointerTy()), 3670 Args, *this, dl); 3671 return CallResult.second; 3672} 3673 3674SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3675 SDValue Chain, 3676 SDValue Ptr, SDValue Cmp, 3677 SDValue Swp, const Value* PtrVal, 3678 unsigned Alignment) { 3679 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3680 Alignment = getEVTAlignment(MemVT); 3681 3682 // Check if the memory reference references a frame index 3683 if (!PtrVal) 3684 if (const FrameIndexSDNode *FI = 3685 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3686 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3687 3688 MachineFunction &MF = getMachineFunction(); 3689 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3690 3691 // For now, atomics are considered to be volatile always. 3692 Flags |= MachineMemOperand::MOVolatile; 3693 3694 MachineMemOperand *MMO = 3695 MF.getMachineMemOperand(PtrVal, Flags, 0, 3696 MemVT.getStoreSize(), Alignment); 3697 3698 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3699} 3700 3701SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3702 SDValue Chain, 3703 SDValue Ptr, SDValue Cmp, 3704 SDValue Swp, MachineMemOperand *MMO) { 3705 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3706 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3707 3708 EVT VT = Cmp.getValueType(); 3709 3710 SDVTList VTs = getVTList(VT, MVT::Other); 3711 FoldingSetNodeID ID; 3712 ID.AddInteger(MemVT.getRawBits()); 3713 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3714 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3715 void* IP = 0; 3716 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3717 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3718 return SDValue(E, 0); 3719 } 3720 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3721 Ptr, Cmp, Swp, MMO); 3722 CSEMap.InsertNode(N, IP); 3723 AllNodes.push_back(N); 3724 return SDValue(N, 0); 3725} 3726 3727SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3728 SDValue Chain, 3729 SDValue Ptr, SDValue Val, 3730 const Value* PtrVal, 3731 unsigned Alignment) { 3732 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3733 Alignment = getEVTAlignment(MemVT); 3734 3735 // Check if the memory reference references a frame index 3736 if (!PtrVal) 3737 if (const FrameIndexSDNode *FI = 3738 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3739 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3740 3741 MachineFunction &MF = getMachineFunction(); 3742 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3743 3744 // For now, atomics are considered to be volatile always. 3745 Flags |= MachineMemOperand::MOVolatile; 3746 3747 MachineMemOperand *MMO = 3748 MF.getMachineMemOperand(PtrVal, Flags, 0, 3749 MemVT.getStoreSize(), Alignment); 3750 3751 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3752} 3753 3754SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3755 SDValue Chain, 3756 SDValue Ptr, SDValue Val, 3757 MachineMemOperand *MMO) { 3758 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3759 Opcode == ISD::ATOMIC_LOAD_SUB || 3760 Opcode == ISD::ATOMIC_LOAD_AND || 3761 Opcode == ISD::ATOMIC_LOAD_OR || 3762 Opcode == ISD::ATOMIC_LOAD_XOR || 3763 Opcode == ISD::ATOMIC_LOAD_NAND || 3764 Opcode == ISD::ATOMIC_LOAD_MIN || 3765 Opcode == ISD::ATOMIC_LOAD_MAX || 3766 Opcode == ISD::ATOMIC_LOAD_UMIN || 3767 Opcode == ISD::ATOMIC_LOAD_UMAX || 3768 Opcode == ISD::ATOMIC_SWAP) && 3769 "Invalid Atomic Op"); 3770 3771 EVT VT = Val.getValueType(); 3772 3773 SDVTList VTs = getVTList(VT, MVT::Other); 3774 FoldingSetNodeID ID; 3775 ID.AddInteger(MemVT.getRawBits()); 3776 SDValue Ops[] = {Chain, Ptr, Val}; 3777 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3778 void* IP = 0; 3779 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3780 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3781 return SDValue(E, 0); 3782 } 3783 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3784 Ptr, Val, MMO); 3785 CSEMap.InsertNode(N, IP); 3786 AllNodes.push_back(N); 3787 return SDValue(N, 0); 3788} 3789 3790/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3791/// Allowed to return something different (and simpler) if Simplify is true. 3792SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3793 DebugLoc dl) { 3794 if (NumOps == 1) 3795 return Ops[0]; 3796 3797 SmallVector<EVT, 4> VTs; 3798 VTs.reserve(NumOps); 3799 for (unsigned i = 0; i < NumOps; ++i) 3800 VTs.push_back(Ops[i].getValueType()); 3801 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3802 Ops, NumOps); 3803} 3804 3805SDValue 3806SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3807 const EVT *VTs, unsigned NumVTs, 3808 const SDValue *Ops, unsigned NumOps, 3809 EVT MemVT, const Value *srcValue, int SVOff, 3810 unsigned Align, bool Vol, 3811 bool ReadMem, bool WriteMem) { 3812 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3813 MemVT, srcValue, SVOff, Align, Vol, 3814 ReadMem, WriteMem); 3815} 3816 3817SDValue 3818SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3819 const SDValue *Ops, unsigned NumOps, 3820 EVT MemVT, const Value *srcValue, int SVOff, 3821 unsigned Align, bool Vol, 3822 bool ReadMem, bool WriteMem) { 3823 if (Align == 0) // Ensure that codegen never sees alignment 0 3824 Align = getEVTAlignment(MemVT); 3825 3826 MachineFunction &MF = getMachineFunction(); 3827 unsigned Flags = 0; 3828 if (WriteMem) 3829 Flags |= MachineMemOperand::MOStore; 3830 if (ReadMem) 3831 Flags |= MachineMemOperand::MOLoad; 3832 if (Vol) 3833 Flags |= MachineMemOperand::MOVolatile; 3834 MachineMemOperand *MMO = 3835 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3836 MemVT.getStoreSize(), Align); 3837 3838 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3839} 3840 3841SDValue 3842SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3843 const SDValue *Ops, unsigned NumOps, 3844 EVT MemVT, MachineMemOperand *MMO) { 3845 assert((Opcode == ISD::INTRINSIC_VOID || 3846 Opcode == ISD::INTRINSIC_W_CHAIN || 3847 (Opcode <= INT_MAX && 3848 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3849 "Opcode is not a memory-accessing opcode!"); 3850 3851 // Memoize the node unless it returns a flag. 3852 MemIntrinsicSDNode *N; 3853 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3854 FoldingSetNodeID ID; 3855 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3856 void *IP = 0; 3857 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3858 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3859 return SDValue(E, 0); 3860 } 3861 3862 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3863 MemVT, MMO); 3864 CSEMap.InsertNode(N, IP); 3865 } else { 3866 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3867 MemVT, MMO); 3868 } 3869 AllNodes.push_back(N); 3870 return SDValue(N, 0); 3871} 3872 3873SDValue 3874SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3875 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3876 SDValue Ptr, SDValue Offset, 3877 const Value *SV, int SVOffset, EVT MemVT, 3878 bool isVolatile, bool isNonTemporal, 3879 unsigned Alignment) { 3880 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3881 Alignment = getEVTAlignment(VT); 3882 3883 // Check if the memory reference references a frame index 3884 if (!SV) 3885 if (const FrameIndexSDNode *FI = 3886 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3887 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3888 3889 MachineFunction &MF = getMachineFunction(); 3890 unsigned Flags = MachineMemOperand::MOLoad; 3891 if (isVolatile) 3892 Flags |= MachineMemOperand::MOVolatile; 3893 if (isNonTemporal) 3894 Flags |= MachineMemOperand::MONonTemporal; 3895 MachineMemOperand *MMO = 3896 MF.getMachineMemOperand(SV, Flags, SVOffset, 3897 MemVT.getStoreSize(), Alignment); 3898 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3899} 3900 3901SDValue 3902SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3903 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3904 SDValue Ptr, SDValue Offset, EVT MemVT, 3905 MachineMemOperand *MMO) { 3906 if (VT == MemVT) { 3907 ExtType = ISD::NON_EXTLOAD; 3908 } else if (ExtType == ISD::NON_EXTLOAD) { 3909 assert(VT == MemVT && "Non-extending load from different memory type!"); 3910 } else { 3911 // Extending load. 3912 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3913 "Should only be an extending load, not truncating!"); 3914 assert(VT.isInteger() == MemVT.isInteger() && 3915 "Cannot convert from FP to Int or Int -> FP!"); 3916 assert(VT.isVector() == MemVT.isVector() && 3917 "Cannot use trunc store to convert to or from a vector!"); 3918 assert((!VT.isVector() || 3919 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3920 "Cannot use trunc store to change the number of vector elements!"); 3921 } 3922 3923 bool Indexed = AM != ISD::UNINDEXED; 3924 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3925 "Unindexed load with an offset!"); 3926 3927 SDVTList VTs = Indexed ? 3928 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3929 SDValue Ops[] = { Chain, Ptr, Offset }; 3930 FoldingSetNodeID ID; 3931 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3932 ID.AddInteger(MemVT.getRawBits()); 3933 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3934 MMO->isNonTemporal())); 3935 void *IP = 0; 3936 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3937 cast<LoadSDNode>(E)->refineAlignment(MMO); 3938 return SDValue(E, 0); 3939 } 3940 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3941 MemVT, MMO); 3942 CSEMap.InsertNode(N, IP); 3943 AllNodes.push_back(N); 3944 return SDValue(N, 0); 3945} 3946 3947SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3948 SDValue Chain, SDValue Ptr, 3949 const Value *SV, int SVOffset, 3950 bool isVolatile, bool isNonTemporal, 3951 unsigned Alignment) { 3952 SDValue Undef = getUNDEF(Ptr.getValueType()); 3953 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3954 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3955} 3956 3957SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3958 SDValue Chain, SDValue Ptr, 3959 const Value *SV, 3960 int SVOffset, EVT MemVT, 3961 bool isVolatile, bool isNonTemporal, 3962 unsigned Alignment) { 3963 SDValue Undef = getUNDEF(Ptr.getValueType()); 3964 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3965 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3966} 3967 3968SDValue 3969SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3970 SDValue Offset, ISD::MemIndexedMode AM) { 3971 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3972 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3973 "Load is already a indexed load!"); 3974 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3975 LD->getChain(), Base, Offset, LD->getSrcValue(), 3976 LD->getSrcValueOffset(), LD->getMemoryVT(), 3977 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3978} 3979 3980SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3981 SDValue Ptr, const Value *SV, int SVOffset, 3982 bool isVolatile, bool isNonTemporal, 3983 unsigned Alignment) { 3984 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3985 Alignment = getEVTAlignment(Val.getValueType()); 3986 3987 // Check if the memory reference references a frame index 3988 if (!SV) 3989 if (const FrameIndexSDNode *FI = 3990 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3991 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3992 3993 MachineFunction &MF = getMachineFunction(); 3994 unsigned Flags = MachineMemOperand::MOStore; 3995 if (isVolatile) 3996 Flags |= MachineMemOperand::MOVolatile; 3997 if (isNonTemporal) 3998 Flags |= MachineMemOperand::MONonTemporal; 3999 MachineMemOperand *MMO = 4000 MF.getMachineMemOperand(SV, Flags, SVOffset, 4001 Val.getValueType().getStoreSize(), Alignment); 4002 4003 return getStore(Chain, dl, Val, Ptr, MMO); 4004} 4005 4006SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4007 SDValue Ptr, MachineMemOperand *MMO) { 4008 EVT VT = Val.getValueType(); 4009 SDVTList VTs = getVTList(MVT::Other); 4010 SDValue Undef = getUNDEF(Ptr.getValueType()); 4011 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4012 FoldingSetNodeID ID; 4013 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4014 ID.AddInteger(VT.getRawBits()); 4015 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4016 MMO->isNonTemporal())); 4017 void *IP = 0; 4018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4019 cast<StoreSDNode>(E)->refineAlignment(MMO); 4020 return SDValue(E, 0); 4021 } 4022 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4023 false, VT, MMO); 4024 CSEMap.InsertNode(N, IP); 4025 AllNodes.push_back(N); 4026 return SDValue(N, 0); 4027} 4028 4029SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4030 SDValue Ptr, const Value *SV, 4031 int SVOffset, EVT SVT, 4032 bool isVolatile, bool isNonTemporal, 4033 unsigned Alignment) { 4034 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4035 Alignment = getEVTAlignment(SVT); 4036 4037 // Check if the memory reference references a frame index 4038 if (!SV) 4039 if (const FrameIndexSDNode *FI = 4040 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4041 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4042 4043 MachineFunction &MF = getMachineFunction(); 4044 unsigned Flags = MachineMemOperand::MOStore; 4045 if (isVolatile) 4046 Flags |= MachineMemOperand::MOVolatile; 4047 if (isNonTemporal) 4048 Flags |= MachineMemOperand::MONonTemporal; 4049 MachineMemOperand *MMO = 4050 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4051 4052 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4053} 4054 4055SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4056 SDValue Ptr, EVT SVT, 4057 MachineMemOperand *MMO) { 4058 EVT VT = Val.getValueType(); 4059 4060 if (VT == SVT) 4061 return getStore(Chain, dl, Val, Ptr, MMO); 4062 4063 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4064 "Should only be a truncating store, not extending!"); 4065 assert(VT.isInteger() == SVT.isInteger() && 4066 "Can't do FP-INT conversion!"); 4067 assert(VT.isVector() == SVT.isVector() && 4068 "Cannot use trunc store to convert to or from a vector!"); 4069 assert((!VT.isVector() || 4070 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4071 "Cannot use trunc store to change the number of vector elements!"); 4072 4073 SDVTList VTs = getVTList(MVT::Other); 4074 SDValue Undef = getUNDEF(Ptr.getValueType()); 4075 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4076 FoldingSetNodeID ID; 4077 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4078 ID.AddInteger(SVT.getRawBits()); 4079 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4080 MMO->isNonTemporal())); 4081 void *IP = 0; 4082 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4083 cast<StoreSDNode>(E)->refineAlignment(MMO); 4084 return SDValue(E, 0); 4085 } 4086 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4087 true, SVT, MMO); 4088 CSEMap.InsertNode(N, IP); 4089 AllNodes.push_back(N); 4090 return SDValue(N, 0); 4091} 4092 4093SDValue 4094SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4095 SDValue Offset, ISD::MemIndexedMode AM) { 4096 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4097 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4098 "Store is already a indexed store!"); 4099 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4100 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4101 FoldingSetNodeID ID; 4102 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4103 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4104 ID.AddInteger(ST->getRawSubclassData()); 4105 void *IP = 0; 4106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4107 return SDValue(E, 0); 4108 4109 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4110 ST->isTruncatingStore(), 4111 ST->getMemoryVT(), 4112 ST->getMemOperand()); 4113 CSEMap.InsertNode(N, IP); 4114 AllNodes.push_back(N); 4115 return SDValue(N, 0); 4116} 4117 4118SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4119 SDValue Chain, SDValue Ptr, 4120 SDValue SV) { 4121 SDValue Ops[] = { Chain, Ptr, SV }; 4122 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4123} 4124 4125SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4126 const SDUse *Ops, unsigned NumOps) { 4127 switch (NumOps) { 4128 case 0: return getNode(Opcode, DL, VT); 4129 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4130 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4131 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4132 default: break; 4133 } 4134 4135 // Copy from an SDUse array into an SDValue array for use with 4136 // the regular getNode logic. 4137 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4138 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4139} 4140 4141SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4142 const SDValue *Ops, unsigned NumOps) { 4143 switch (NumOps) { 4144 case 0: return getNode(Opcode, DL, VT); 4145 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4146 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4147 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4148 default: break; 4149 } 4150 4151 switch (Opcode) { 4152 default: break; 4153 case ISD::SELECT_CC: { 4154 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4155 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4156 "LHS and RHS of condition must have same type!"); 4157 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4158 "True and False arms of SelectCC must have same type!"); 4159 assert(Ops[2].getValueType() == VT && 4160 "select_cc node must be of same type as true and false value!"); 4161 break; 4162 } 4163 case ISD::BR_CC: { 4164 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4165 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4166 "LHS/RHS of comparison should match types!"); 4167 break; 4168 } 4169 } 4170 4171 // Memoize nodes. 4172 SDNode *N; 4173 SDVTList VTs = getVTList(VT); 4174 4175 if (VT != MVT::Flag) { 4176 FoldingSetNodeID ID; 4177 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4178 void *IP = 0; 4179 4180 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4181 return SDValue(E, 0); 4182 4183 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4184 CSEMap.InsertNode(N, IP); 4185 } else { 4186 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4187 } 4188 4189 AllNodes.push_back(N); 4190#ifndef NDEBUG 4191 VerifyNode(N); 4192#endif 4193 return SDValue(N, 0); 4194} 4195 4196SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4197 const std::vector<EVT> &ResultTys, 4198 const SDValue *Ops, unsigned NumOps) { 4199 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4200 Ops, NumOps); 4201} 4202 4203SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4204 const EVT *VTs, unsigned NumVTs, 4205 const SDValue *Ops, unsigned NumOps) { 4206 if (NumVTs == 1) 4207 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4208 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4209} 4210 4211SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4212 const SDValue *Ops, unsigned NumOps) { 4213 if (VTList.NumVTs == 1) 4214 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4215 4216#if 0 4217 switch (Opcode) { 4218 // FIXME: figure out how to safely handle things like 4219 // int foo(int x) { return 1 << (x & 255); } 4220 // int bar() { return foo(256); } 4221 case ISD::SRA_PARTS: 4222 case ISD::SRL_PARTS: 4223 case ISD::SHL_PARTS: 4224 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4225 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4226 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4227 else if (N3.getOpcode() == ISD::AND) 4228 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4229 // If the and is only masking out bits that cannot effect the shift, 4230 // eliminate the and. 4231 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4232 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4233 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4234 } 4235 break; 4236 } 4237#endif 4238 4239 // Memoize the node unless it returns a flag. 4240 SDNode *N; 4241 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4242 FoldingSetNodeID ID; 4243 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4244 void *IP = 0; 4245 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4246 return SDValue(E, 0); 4247 4248 if (NumOps == 1) { 4249 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4250 } else if (NumOps == 2) { 4251 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4252 } else if (NumOps == 3) { 4253 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4254 Ops[2]); 4255 } else { 4256 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4257 } 4258 CSEMap.InsertNode(N, IP); 4259 } else { 4260 if (NumOps == 1) { 4261 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4262 } else if (NumOps == 2) { 4263 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4264 } else if (NumOps == 3) { 4265 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4266 Ops[2]); 4267 } else { 4268 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4269 } 4270 } 4271 AllNodes.push_back(N); 4272#ifndef NDEBUG 4273 VerifyNode(N); 4274#endif 4275 return SDValue(N, 0); 4276} 4277 4278SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4279 return getNode(Opcode, DL, VTList, 0, 0); 4280} 4281 4282SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4283 SDValue N1) { 4284 SDValue Ops[] = { N1 }; 4285 return getNode(Opcode, DL, VTList, Ops, 1); 4286} 4287 4288SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4289 SDValue N1, SDValue N2) { 4290 SDValue Ops[] = { N1, N2 }; 4291 return getNode(Opcode, DL, VTList, Ops, 2); 4292} 4293 4294SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4295 SDValue N1, SDValue N2, SDValue N3) { 4296 SDValue Ops[] = { N1, N2, N3 }; 4297 return getNode(Opcode, DL, VTList, Ops, 3); 4298} 4299 4300SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4301 SDValue N1, SDValue N2, SDValue N3, 4302 SDValue N4) { 4303 SDValue Ops[] = { N1, N2, N3, N4 }; 4304 return getNode(Opcode, DL, VTList, Ops, 4); 4305} 4306 4307SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4308 SDValue N1, SDValue N2, SDValue N3, 4309 SDValue N4, SDValue N5) { 4310 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4311 return getNode(Opcode, DL, VTList, Ops, 5); 4312} 4313 4314SDVTList SelectionDAG::getVTList(EVT VT) { 4315 return makeVTList(SDNode::getValueTypeList(VT), 1); 4316} 4317 4318SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4319 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4320 E = VTList.rend(); I != E; ++I) 4321 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4322 return *I; 4323 4324 EVT *Array = Allocator.Allocate<EVT>(2); 4325 Array[0] = VT1; 4326 Array[1] = VT2; 4327 SDVTList Result = makeVTList(Array, 2); 4328 VTList.push_back(Result); 4329 return Result; 4330} 4331 4332SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4333 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4334 E = VTList.rend(); I != E; ++I) 4335 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4336 I->VTs[2] == VT3) 4337 return *I; 4338 4339 EVT *Array = Allocator.Allocate<EVT>(3); 4340 Array[0] = VT1; 4341 Array[1] = VT2; 4342 Array[2] = VT3; 4343 SDVTList Result = makeVTList(Array, 3); 4344 VTList.push_back(Result); 4345 return Result; 4346} 4347 4348SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4349 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4350 E = VTList.rend(); I != E; ++I) 4351 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4352 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4353 return *I; 4354 4355 EVT *Array = Allocator.Allocate<EVT>(4); 4356 Array[0] = VT1; 4357 Array[1] = VT2; 4358 Array[2] = VT3; 4359 Array[3] = VT4; 4360 SDVTList Result = makeVTList(Array, 4); 4361 VTList.push_back(Result); 4362 return Result; 4363} 4364 4365SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4366 switch (NumVTs) { 4367 case 0: llvm_unreachable("Cannot have nodes without results!"); 4368 case 1: return getVTList(VTs[0]); 4369 case 2: return getVTList(VTs[0], VTs[1]); 4370 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4371 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4372 default: break; 4373 } 4374 4375 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4376 E = VTList.rend(); I != E; ++I) { 4377 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4378 continue; 4379 4380 bool NoMatch = false; 4381 for (unsigned i = 2; i != NumVTs; ++i) 4382 if (VTs[i] != I->VTs[i]) { 4383 NoMatch = true; 4384 break; 4385 } 4386 if (!NoMatch) 4387 return *I; 4388 } 4389 4390 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4391 std::copy(VTs, VTs+NumVTs, Array); 4392 SDVTList Result = makeVTList(Array, NumVTs); 4393 VTList.push_back(Result); 4394 return Result; 4395} 4396 4397 4398/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4399/// specified operands. If the resultant node already exists in the DAG, 4400/// this does not modify the specified node, instead it returns the node that 4401/// already exists. If the resultant node does not exist in the DAG, the 4402/// input node is returned. As a degenerate case, if you specify the same 4403/// input operands as the node already has, the input node is returned. 4404SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4405 SDNode *N = InN.getNode(); 4406 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4407 4408 // Check to see if there is no change. 4409 if (Op == N->getOperand(0)) return InN; 4410 4411 // See if the modified node already exists. 4412 void *InsertPos = 0; 4413 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4414 return SDValue(Existing, InN.getResNo()); 4415 4416 // Nope it doesn't. Remove the node from its current place in the maps. 4417 if (InsertPos) 4418 if (!RemoveNodeFromCSEMaps(N)) 4419 InsertPos = 0; 4420 4421 // Now we update the operands. 4422 N->OperandList[0].set(Op); 4423 4424 // If this gets put into a CSE map, add it. 4425 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4426 return InN; 4427} 4428 4429SDValue SelectionDAG:: 4430UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4431 SDNode *N = InN.getNode(); 4432 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4433 4434 // Check to see if there is no change. 4435 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4436 return InN; // No operands changed, just return the input node. 4437 4438 // See if the modified node already exists. 4439 void *InsertPos = 0; 4440 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4441 return SDValue(Existing, InN.getResNo()); 4442 4443 // Nope it doesn't. Remove the node from its current place in the maps. 4444 if (InsertPos) 4445 if (!RemoveNodeFromCSEMaps(N)) 4446 InsertPos = 0; 4447 4448 // Now we update the operands. 4449 if (N->OperandList[0] != Op1) 4450 N->OperandList[0].set(Op1); 4451 if (N->OperandList[1] != Op2) 4452 N->OperandList[1].set(Op2); 4453 4454 // If this gets put into a CSE map, add it. 4455 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4456 return InN; 4457} 4458 4459SDValue SelectionDAG:: 4460UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4461 SDValue Ops[] = { Op1, Op2, Op3 }; 4462 return UpdateNodeOperands(N, Ops, 3); 4463} 4464 4465SDValue SelectionDAG:: 4466UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4467 SDValue Op3, SDValue Op4) { 4468 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4469 return UpdateNodeOperands(N, Ops, 4); 4470} 4471 4472SDValue SelectionDAG:: 4473UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4474 SDValue Op3, SDValue Op4, SDValue Op5) { 4475 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4476 return UpdateNodeOperands(N, Ops, 5); 4477} 4478 4479SDValue SelectionDAG:: 4480UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4481 SDNode *N = InN.getNode(); 4482 assert(N->getNumOperands() == NumOps && 4483 "Update with wrong number of operands"); 4484 4485 // Check to see if there is no change. 4486 bool AnyChange = false; 4487 for (unsigned i = 0; i != NumOps; ++i) { 4488 if (Ops[i] != N->getOperand(i)) { 4489 AnyChange = true; 4490 break; 4491 } 4492 } 4493 4494 // No operands changed, just return the input node. 4495 if (!AnyChange) return InN; 4496 4497 // See if the modified node already exists. 4498 void *InsertPos = 0; 4499 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4500 return SDValue(Existing, InN.getResNo()); 4501 4502 // Nope it doesn't. Remove the node from its current place in the maps. 4503 if (InsertPos) 4504 if (!RemoveNodeFromCSEMaps(N)) 4505 InsertPos = 0; 4506 4507 // Now we update the operands. 4508 for (unsigned i = 0; i != NumOps; ++i) 4509 if (N->OperandList[i] != Ops[i]) 4510 N->OperandList[i].set(Ops[i]); 4511 4512 // If this gets put into a CSE map, add it. 4513 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4514 return InN; 4515} 4516 4517/// DropOperands - Release the operands and set this node to have 4518/// zero operands. 4519void SDNode::DropOperands() { 4520 // Unlike the code in MorphNodeTo that does this, we don't need to 4521 // watch for dead nodes here. 4522 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4523 SDUse &Use = *I++; 4524 Use.set(SDValue()); 4525 } 4526} 4527 4528/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4529/// machine opcode. 4530/// 4531SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4532 EVT VT) { 4533 SDVTList VTs = getVTList(VT); 4534 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4535} 4536 4537SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4538 EVT VT, SDValue Op1) { 4539 SDVTList VTs = getVTList(VT); 4540 SDValue Ops[] = { Op1 }; 4541 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4542} 4543 4544SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4545 EVT VT, SDValue Op1, 4546 SDValue Op2) { 4547 SDVTList VTs = getVTList(VT); 4548 SDValue Ops[] = { Op1, Op2 }; 4549 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4550} 4551 4552SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4553 EVT VT, SDValue Op1, 4554 SDValue Op2, SDValue Op3) { 4555 SDVTList VTs = getVTList(VT); 4556 SDValue Ops[] = { Op1, Op2, Op3 }; 4557 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4558} 4559 4560SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4561 EVT VT, const SDValue *Ops, 4562 unsigned NumOps) { 4563 SDVTList VTs = getVTList(VT); 4564 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4565} 4566 4567SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4568 EVT VT1, EVT VT2, const SDValue *Ops, 4569 unsigned NumOps) { 4570 SDVTList VTs = getVTList(VT1, VT2); 4571 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4572} 4573 4574SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4575 EVT VT1, EVT VT2) { 4576 SDVTList VTs = getVTList(VT1, VT2); 4577 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4578} 4579 4580SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4581 EVT VT1, EVT VT2, EVT VT3, 4582 const SDValue *Ops, unsigned NumOps) { 4583 SDVTList VTs = getVTList(VT1, VT2, VT3); 4584 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4585} 4586 4587SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4588 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4589 const SDValue *Ops, unsigned NumOps) { 4590 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4591 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4592} 4593 4594SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4595 EVT VT1, EVT VT2, 4596 SDValue Op1) { 4597 SDVTList VTs = getVTList(VT1, VT2); 4598 SDValue Ops[] = { Op1 }; 4599 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4600} 4601 4602SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4603 EVT VT1, EVT VT2, 4604 SDValue Op1, SDValue Op2) { 4605 SDVTList VTs = getVTList(VT1, VT2); 4606 SDValue Ops[] = { Op1, Op2 }; 4607 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4608} 4609 4610SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4611 EVT VT1, EVT VT2, 4612 SDValue Op1, SDValue Op2, 4613 SDValue Op3) { 4614 SDVTList VTs = getVTList(VT1, VT2); 4615 SDValue Ops[] = { Op1, Op2, Op3 }; 4616 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4617} 4618 4619SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4620 EVT VT1, EVT VT2, EVT VT3, 4621 SDValue Op1, SDValue Op2, 4622 SDValue Op3) { 4623 SDVTList VTs = getVTList(VT1, VT2, VT3); 4624 SDValue Ops[] = { Op1, Op2, Op3 }; 4625 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4626} 4627 4628SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4629 SDVTList VTs, const SDValue *Ops, 4630 unsigned NumOps) { 4631 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4632 // Reset the NodeID to -1. 4633 N->setNodeId(-1); 4634 return N; 4635} 4636 4637/// MorphNodeTo - This *mutates* the specified node to have the specified 4638/// return type, opcode, and operands. 4639/// 4640/// Note that MorphNodeTo returns the resultant node. If there is already a 4641/// node of the specified opcode and operands, it returns that node instead of 4642/// the current one. Note that the DebugLoc need not be the same. 4643/// 4644/// Using MorphNodeTo is faster than creating a new node and swapping it in 4645/// with ReplaceAllUsesWith both because it often avoids allocating a new 4646/// node, and because it doesn't require CSE recalculation for any of 4647/// the node's users. 4648/// 4649SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4650 SDVTList VTs, const SDValue *Ops, 4651 unsigned NumOps) { 4652 // If an identical node already exists, use it. 4653 void *IP = 0; 4654 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4655 FoldingSetNodeID ID; 4656 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4657 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4658 return ON; 4659 } 4660 4661 if (!RemoveNodeFromCSEMaps(N)) 4662 IP = 0; 4663 4664 // Start the morphing. 4665 N->NodeType = Opc; 4666 N->ValueList = VTs.VTs; 4667 N->NumValues = VTs.NumVTs; 4668 4669 // Clear the operands list, updating used nodes to remove this from their 4670 // use list. Keep track of any operands that become dead as a result. 4671 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4672 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4673 SDUse &Use = *I++; 4674 SDNode *Used = Use.getNode(); 4675 Use.set(SDValue()); 4676 if (Used->use_empty()) 4677 DeadNodeSet.insert(Used); 4678 } 4679 4680 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4681 // Initialize the memory references information. 4682 MN->setMemRefs(0, 0); 4683 // If NumOps is larger than the # of operands we can have in a 4684 // MachineSDNode, reallocate the operand list. 4685 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4686 if (MN->OperandsNeedDelete) 4687 delete[] MN->OperandList; 4688 if (NumOps > array_lengthof(MN->LocalOperands)) 4689 // We're creating a final node that will live unmorphed for the 4690 // remainder of the current SelectionDAG iteration, so we can allocate 4691 // the operands directly out of a pool with no recycling metadata. 4692 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4693 Ops, NumOps); 4694 else 4695 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4696 MN->OperandsNeedDelete = false; 4697 } else 4698 MN->InitOperands(MN->OperandList, Ops, NumOps); 4699 } else { 4700 // If NumOps is larger than the # of operands we currently have, reallocate 4701 // the operand list. 4702 if (NumOps > N->NumOperands) { 4703 if (N->OperandsNeedDelete) 4704 delete[] N->OperandList; 4705 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4706 N->OperandsNeedDelete = true; 4707 } else 4708 N->InitOperands(N->OperandList, Ops, NumOps); 4709 } 4710 4711 // Delete any nodes that are still dead after adding the uses for the 4712 // new operands. 4713 if (!DeadNodeSet.empty()) { 4714 SmallVector<SDNode *, 16> DeadNodes; 4715 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4716 E = DeadNodeSet.end(); I != E; ++I) 4717 if ((*I)->use_empty()) 4718 DeadNodes.push_back(*I); 4719 RemoveDeadNodes(DeadNodes); 4720 } 4721 4722 if (IP) 4723 CSEMap.InsertNode(N, IP); // Memoize the new node. 4724 return N; 4725} 4726 4727 4728/// getMachineNode - These are used for target selectors to create a new node 4729/// with specified return type(s), MachineInstr opcode, and operands. 4730/// 4731/// Note that getMachineNode returns the resultant node. If there is already a 4732/// node of the specified opcode and operands, it returns that node instead of 4733/// the current one. 4734MachineSDNode * 4735SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4736 SDVTList VTs = getVTList(VT); 4737 return getMachineNode(Opcode, dl, VTs, 0, 0); 4738} 4739 4740MachineSDNode * 4741SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4742 SDVTList VTs = getVTList(VT); 4743 SDValue Ops[] = { Op1 }; 4744 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4745} 4746 4747MachineSDNode * 4748SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4749 SDValue Op1, SDValue Op2) { 4750 SDVTList VTs = getVTList(VT); 4751 SDValue Ops[] = { Op1, Op2 }; 4752 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4753} 4754 4755MachineSDNode * 4756SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4757 SDValue Op1, SDValue Op2, SDValue Op3) { 4758 SDVTList VTs = getVTList(VT); 4759 SDValue Ops[] = { Op1, Op2, Op3 }; 4760 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4761} 4762 4763MachineSDNode * 4764SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4765 const SDValue *Ops, unsigned NumOps) { 4766 SDVTList VTs = getVTList(VT); 4767 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4768} 4769 4770MachineSDNode * 4771SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4772 SDVTList VTs = getVTList(VT1, VT2); 4773 return getMachineNode(Opcode, dl, VTs, 0, 0); 4774} 4775 4776MachineSDNode * 4777SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4778 EVT VT1, EVT VT2, SDValue Op1) { 4779 SDVTList VTs = getVTList(VT1, VT2); 4780 SDValue Ops[] = { Op1 }; 4781 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4782} 4783 4784MachineSDNode * 4785SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4786 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4787 SDVTList VTs = getVTList(VT1, VT2); 4788 SDValue Ops[] = { Op1, Op2 }; 4789 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4790} 4791 4792MachineSDNode * 4793SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4794 EVT VT1, EVT VT2, SDValue Op1, 4795 SDValue Op2, SDValue Op3) { 4796 SDVTList VTs = getVTList(VT1, VT2); 4797 SDValue Ops[] = { Op1, Op2, Op3 }; 4798 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4799} 4800 4801MachineSDNode * 4802SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4803 EVT VT1, EVT VT2, 4804 const SDValue *Ops, unsigned NumOps) { 4805 SDVTList VTs = getVTList(VT1, VT2); 4806 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4807} 4808 4809MachineSDNode * 4810SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4811 EVT VT1, EVT VT2, EVT VT3, 4812 SDValue Op1, SDValue Op2) { 4813 SDVTList VTs = getVTList(VT1, VT2, VT3); 4814 SDValue Ops[] = { Op1, Op2 }; 4815 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4816} 4817 4818MachineSDNode * 4819SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4820 EVT VT1, EVT VT2, EVT VT3, 4821 SDValue Op1, SDValue Op2, SDValue Op3) { 4822 SDVTList VTs = getVTList(VT1, VT2, VT3); 4823 SDValue Ops[] = { Op1, Op2, Op3 }; 4824 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4825} 4826 4827MachineSDNode * 4828SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4829 EVT VT1, EVT VT2, EVT VT3, 4830 const SDValue *Ops, unsigned NumOps) { 4831 SDVTList VTs = getVTList(VT1, VT2, VT3); 4832 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4833} 4834 4835MachineSDNode * 4836SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4837 EVT VT2, EVT VT3, EVT VT4, 4838 const SDValue *Ops, unsigned NumOps) { 4839 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4840 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4841} 4842 4843MachineSDNode * 4844SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4845 const std::vector<EVT> &ResultTys, 4846 const SDValue *Ops, unsigned NumOps) { 4847 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4848 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4849} 4850 4851MachineSDNode * 4852SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4853 const SDValue *Ops, unsigned NumOps) { 4854 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4855 MachineSDNode *N; 4856 void *IP; 4857 4858 if (DoCSE) { 4859 FoldingSetNodeID ID; 4860 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4861 IP = 0; 4862 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4863 return cast<MachineSDNode>(E); 4864 } 4865 4866 // Allocate a new MachineSDNode. 4867 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4868 4869 // Initialize the operands list. 4870 if (NumOps > array_lengthof(N->LocalOperands)) 4871 // We're creating a final node that will live unmorphed for the 4872 // remainder of the current SelectionDAG iteration, so we can allocate 4873 // the operands directly out of a pool with no recycling metadata. 4874 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4875 Ops, NumOps); 4876 else 4877 N->InitOperands(N->LocalOperands, Ops, NumOps); 4878 N->OperandsNeedDelete = false; 4879 4880 if (DoCSE) 4881 CSEMap.InsertNode(N, IP); 4882 4883 AllNodes.push_back(N); 4884#ifndef NDEBUG 4885 VerifyNode(N); 4886#endif 4887 return N; 4888} 4889 4890/// getTargetExtractSubreg - A convenience function for creating 4891/// TargetOpcode::EXTRACT_SUBREG nodes. 4892SDValue 4893SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4894 SDValue Operand) { 4895 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4896 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4897 VT, Operand, SRIdxVal); 4898 return SDValue(Subreg, 0); 4899} 4900 4901/// getTargetInsertSubreg - A convenience function for creating 4902/// TargetOpcode::INSERT_SUBREG nodes. 4903SDValue 4904SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4905 SDValue Operand, SDValue Subreg) { 4906 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4907 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4908 VT, Operand, Subreg, SRIdxVal); 4909 return SDValue(Result, 0); 4910} 4911 4912/// getNodeIfExists - Get the specified node if it's already available, or 4913/// else return NULL. 4914SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4915 const SDValue *Ops, unsigned NumOps) { 4916 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4917 FoldingSetNodeID ID; 4918 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4919 void *IP = 0; 4920 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4921 return E; 4922 } 4923 return NULL; 4924} 4925 4926/// getDbgValue - Creates a SDDbgValue node. 4927/// 4928SDDbgValue * 4929SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4930 DebugLoc DL, unsigned O) { 4931 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4932} 4933 4934SDDbgValue * 4935SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4936 DebugLoc DL, unsigned O) { 4937 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4938} 4939 4940SDDbgValue * 4941SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4942 DebugLoc DL, unsigned O) { 4943 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4944} 4945 4946namespace { 4947 4948/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4949/// pointed to by a use iterator is deleted, increment the use iterator 4950/// so that it doesn't dangle. 4951/// 4952/// This class also manages a "downlink" DAGUpdateListener, to forward 4953/// messages to ReplaceAllUsesWith's callers. 4954/// 4955class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4956 SelectionDAG::DAGUpdateListener *DownLink; 4957 SDNode::use_iterator &UI; 4958 SDNode::use_iterator &UE; 4959 4960 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4961 // Increment the iterator as needed. 4962 while (UI != UE && N == *UI) 4963 ++UI; 4964 4965 // Then forward the message. 4966 if (DownLink) DownLink->NodeDeleted(N, E); 4967 } 4968 4969 virtual void NodeUpdated(SDNode *N) { 4970 // Just forward the message. 4971 if (DownLink) DownLink->NodeUpdated(N); 4972 } 4973 4974public: 4975 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4976 SDNode::use_iterator &ui, 4977 SDNode::use_iterator &ue) 4978 : DownLink(dl), UI(ui), UE(ue) {} 4979}; 4980 4981} 4982 4983/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4984/// This can cause recursive merging of nodes in the DAG. 4985/// 4986/// This version assumes From has a single result value. 4987/// 4988void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4989 DAGUpdateListener *UpdateListener) { 4990 SDNode *From = FromN.getNode(); 4991 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4992 "Cannot replace with this method!"); 4993 assert(From != To.getNode() && "Cannot replace uses of with self"); 4994 4995 // Iterate over all the existing uses of From. New uses will be added 4996 // to the beginning of the use list, which we avoid visiting. 4997 // This specifically avoids visiting uses of From that arise while the 4998 // replacement is happening, because any such uses would be the result 4999 // of CSE: If an existing node looks like From after one of its operands 5000 // is replaced by To, we don't want to replace of all its users with To 5001 // too. See PR3018 for more info. 5002 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5003 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5004 while (UI != UE) { 5005 SDNode *User = *UI; 5006 5007 // This node is about to morph, remove its old self from the CSE maps. 5008 RemoveNodeFromCSEMaps(User); 5009 5010 // A user can appear in a use list multiple times, and when this 5011 // happens the uses are usually next to each other in the list. 5012 // To help reduce the number of CSE recomputations, process all 5013 // the uses of this user that we can find this way. 5014 do { 5015 SDUse &Use = UI.getUse(); 5016 ++UI; 5017 Use.set(To); 5018 } while (UI != UE && *UI == User); 5019 5020 // Now that we have modified User, add it back to the CSE maps. If it 5021 // already exists there, recursively merge the results together. 5022 AddModifiedNodeToCSEMaps(User, &Listener); 5023 } 5024} 5025 5026/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5027/// This can cause recursive merging of nodes in the DAG. 5028/// 5029/// This version assumes that for each value of From, there is a 5030/// corresponding value in To in the same position with the same type. 5031/// 5032void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5033 DAGUpdateListener *UpdateListener) { 5034#ifndef NDEBUG 5035 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5036 assert((!From->hasAnyUseOfValue(i) || 5037 From->getValueType(i) == To->getValueType(i)) && 5038 "Cannot use this version of ReplaceAllUsesWith!"); 5039#endif 5040 5041 // Handle the trivial case. 5042 if (From == To) 5043 return; 5044 5045 // Iterate over just the existing users of From. See the comments in 5046 // the ReplaceAllUsesWith above. 5047 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5048 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5049 while (UI != UE) { 5050 SDNode *User = *UI; 5051 5052 // This node is about to morph, remove its old self from the CSE maps. 5053 RemoveNodeFromCSEMaps(User); 5054 5055 // A user can appear in a use list multiple times, and when this 5056 // happens the uses are usually next to each other in the list. 5057 // To help reduce the number of CSE recomputations, process all 5058 // the uses of this user that we can find this way. 5059 do { 5060 SDUse &Use = UI.getUse(); 5061 ++UI; 5062 Use.setNode(To); 5063 } while (UI != UE && *UI == User); 5064 5065 // Now that we have modified User, add it back to the CSE maps. If it 5066 // already exists there, recursively merge the results together. 5067 AddModifiedNodeToCSEMaps(User, &Listener); 5068 } 5069} 5070 5071/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5072/// This can cause recursive merging of nodes in the DAG. 5073/// 5074/// This version can replace From with any result values. To must match the 5075/// number and types of values returned by From. 5076void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5077 const SDValue *To, 5078 DAGUpdateListener *UpdateListener) { 5079 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5080 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5081 5082 // Iterate over just the existing users of From. See the comments in 5083 // the ReplaceAllUsesWith above. 5084 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5085 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5086 while (UI != UE) { 5087 SDNode *User = *UI; 5088 5089 // This node is about to morph, remove its old self from the CSE maps. 5090 RemoveNodeFromCSEMaps(User); 5091 5092 // A user can appear in a use list multiple times, and when this 5093 // happens the uses are usually next to each other in the list. 5094 // To help reduce the number of CSE recomputations, process all 5095 // the uses of this user that we can find this way. 5096 do { 5097 SDUse &Use = UI.getUse(); 5098 const SDValue &ToOp = To[Use.getResNo()]; 5099 ++UI; 5100 Use.set(ToOp); 5101 } while (UI != UE && *UI == User); 5102 5103 // Now that we have modified User, add it back to the CSE maps. If it 5104 // already exists there, recursively merge the results together. 5105 AddModifiedNodeToCSEMaps(User, &Listener); 5106 } 5107} 5108 5109/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5110/// uses of other values produced by From.getNode() alone. The Deleted 5111/// vector is handled the same way as for ReplaceAllUsesWith. 5112void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5113 DAGUpdateListener *UpdateListener){ 5114 // Handle the really simple, really trivial case efficiently. 5115 if (From == To) return; 5116 5117 // Handle the simple, trivial, case efficiently. 5118 if (From.getNode()->getNumValues() == 1) { 5119 ReplaceAllUsesWith(From, To, UpdateListener); 5120 return; 5121 } 5122 5123 // Iterate over just the existing users of From. See the comments in 5124 // the ReplaceAllUsesWith above. 5125 SDNode::use_iterator UI = From.getNode()->use_begin(), 5126 UE = From.getNode()->use_end(); 5127 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5128 while (UI != UE) { 5129 SDNode *User = *UI; 5130 bool UserRemovedFromCSEMaps = false; 5131 5132 // A user can appear in a use list multiple times, and when this 5133 // happens the uses are usually next to each other in the list. 5134 // To help reduce the number of CSE recomputations, process all 5135 // the uses of this user that we can find this way. 5136 do { 5137 SDUse &Use = UI.getUse(); 5138 5139 // Skip uses of different values from the same node. 5140 if (Use.getResNo() != From.getResNo()) { 5141 ++UI; 5142 continue; 5143 } 5144 5145 // If this node hasn't been modified yet, it's still in the CSE maps, 5146 // so remove its old self from the CSE maps. 5147 if (!UserRemovedFromCSEMaps) { 5148 RemoveNodeFromCSEMaps(User); 5149 UserRemovedFromCSEMaps = true; 5150 } 5151 5152 ++UI; 5153 Use.set(To); 5154 } while (UI != UE && *UI == User); 5155 5156 // We are iterating over all uses of the From node, so if a use 5157 // doesn't use the specific value, no changes are made. 5158 if (!UserRemovedFromCSEMaps) 5159 continue; 5160 5161 // Now that we have modified User, add it back to the CSE maps. If it 5162 // already exists there, recursively merge the results together. 5163 AddModifiedNodeToCSEMaps(User, &Listener); 5164 } 5165} 5166 5167namespace { 5168 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5169 /// to record information about a use. 5170 struct UseMemo { 5171 SDNode *User; 5172 unsigned Index; 5173 SDUse *Use; 5174 }; 5175 5176 /// operator< - Sort Memos by User. 5177 bool operator<(const UseMemo &L, const UseMemo &R) { 5178 return (intptr_t)L.User < (intptr_t)R.User; 5179 } 5180} 5181 5182/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5183/// uses of other values produced by From.getNode() alone. The same value 5184/// may appear in both the From and To list. The Deleted vector is 5185/// handled the same way as for ReplaceAllUsesWith. 5186void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5187 const SDValue *To, 5188 unsigned Num, 5189 DAGUpdateListener *UpdateListener){ 5190 // Handle the simple, trivial case efficiently. 5191 if (Num == 1) 5192 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5193 5194 // Read up all the uses and make records of them. This helps 5195 // processing new uses that are introduced during the 5196 // replacement process. 5197 SmallVector<UseMemo, 4> Uses; 5198 for (unsigned i = 0; i != Num; ++i) { 5199 unsigned FromResNo = From[i].getResNo(); 5200 SDNode *FromNode = From[i].getNode(); 5201 for (SDNode::use_iterator UI = FromNode->use_begin(), 5202 E = FromNode->use_end(); UI != E; ++UI) { 5203 SDUse &Use = UI.getUse(); 5204 if (Use.getResNo() == FromResNo) { 5205 UseMemo Memo = { *UI, i, &Use }; 5206 Uses.push_back(Memo); 5207 } 5208 } 5209 } 5210 5211 // Sort the uses, so that all the uses from a given User are together. 5212 std::sort(Uses.begin(), Uses.end()); 5213 5214 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5215 UseIndex != UseIndexEnd; ) { 5216 // We know that this user uses some value of From. If it is the right 5217 // value, update it. 5218 SDNode *User = Uses[UseIndex].User; 5219 5220 // This node is about to morph, remove its old self from the CSE maps. 5221 RemoveNodeFromCSEMaps(User); 5222 5223 // The Uses array is sorted, so all the uses for a given User 5224 // are next to each other in the list. 5225 // To help reduce the number of CSE recomputations, process all 5226 // the uses of this user that we can find this way. 5227 do { 5228 unsigned i = Uses[UseIndex].Index; 5229 SDUse &Use = *Uses[UseIndex].Use; 5230 ++UseIndex; 5231 5232 Use.set(To[i]); 5233 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5234 5235 // Now that we have modified User, add it back to the CSE maps. If it 5236 // already exists there, recursively merge the results together. 5237 AddModifiedNodeToCSEMaps(User, UpdateListener); 5238 } 5239} 5240 5241/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5242/// based on their topological order. It returns the maximum id and a vector 5243/// of the SDNodes* in assigned order by reference. 5244unsigned SelectionDAG::AssignTopologicalOrder() { 5245 5246 unsigned DAGSize = 0; 5247 5248 // SortedPos tracks the progress of the algorithm. Nodes before it are 5249 // sorted, nodes after it are unsorted. When the algorithm completes 5250 // it is at the end of the list. 5251 allnodes_iterator SortedPos = allnodes_begin(); 5252 5253 // Visit all the nodes. Move nodes with no operands to the front of 5254 // the list immediately. Annotate nodes that do have operands with their 5255 // operand count. Before we do this, the Node Id fields of the nodes 5256 // may contain arbitrary values. After, the Node Id fields for nodes 5257 // before SortedPos will contain the topological sort index, and the 5258 // Node Id fields for nodes At SortedPos and after will contain the 5259 // count of outstanding operands. 5260 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5261 SDNode *N = I++; 5262 checkForCycles(N); 5263 unsigned Degree = N->getNumOperands(); 5264 if (Degree == 0) { 5265 // A node with no uses, add it to the result array immediately. 5266 N->setNodeId(DAGSize++); 5267 allnodes_iterator Q = N; 5268 if (Q != SortedPos) 5269 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5270 assert(SortedPos != AllNodes.end() && "Overran node list"); 5271 ++SortedPos; 5272 } else { 5273 // Temporarily use the Node Id as scratch space for the degree count. 5274 N->setNodeId(Degree); 5275 } 5276 } 5277 5278 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5279 // such that by the time the end is reached all nodes will be sorted. 5280 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5281 SDNode *N = I; 5282 checkForCycles(N); 5283 // N is in sorted position, so all its uses have one less operand 5284 // that needs to be sorted. 5285 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5286 UI != UE; ++UI) { 5287 SDNode *P = *UI; 5288 unsigned Degree = P->getNodeId(); 5289 assert(Degree != 0 && "Invalid node degree"); 5290 --Degree; 5291 if (Degree == 0) { 5292 // All of P's operands are sorted, so P may sorted now. 5293 P->setNodeId(DAGSize++); 5294 if (P != SortedPos) 5295 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5296 assert(SortedPos != AllNodes.end() && "Overran node list"); 5297 ++SortedPos; 5298 } else { 5299 // Update P's outstanding operand count. 5300 P->setNodeId(Degree); 5301 } 5302 } 5303 if (I == SortedPos) { 5304#ifndef NDEBUG 5305 SDNode *S = ++I; 5306 dbgs() << "Overran sorted position:\n"; 5307 S->dumprFull(); 5308#endif 5309 llvm_unreachable(0); 5310 } 5311 } 5312 5313 assert(SortedPos == AllNodes.end() && 5314 "Topological sort incomplete!"); 5315 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5316 "First node in topological sort is not the entry token!"); 5317 assert(AllNodes.front().getNodeId() == 0 && 5318 "First node in topological sort has non-zero id!"); 5319 assert(AllNodes.front().getNumOperands() == 0 && 5320 "First node in topological sort has operands!"); 5321 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5322 "Last node in topologic sort has unexpected id!"); 5323 assert(AllNodes.back().use_empty() && 5324 "Last node in topologic sort has users!"); 5325 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5326 return DAGSize; 5327} 5328 5329/// AssignOrdering - Assign an order to the SDNode. 5330void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5331 assert(SD && "Trying to assign an order to a null node!"); 5332 Ordering->add(SD, Order); 5333} 5334 5335/// GetOrdering - Get the order for the SDNode. 5336unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5337 assert(SD && "Trying to get the order of a null node!"); 5338 return Ordering->getOrder(SD); 5339} 5340 5341/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5342/// value is produced by SD. 5343void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) { 5344 DbgInfo->add(DB, SD); 5345 if (SD) 5346 SD->setHasDebugValue(true); 5347} 5348 5349//===----------------------------------------------------------------------===// 5350// SDNode Class 5351//===----------------------------------------------------------------------===// 5352 5353HandleSDNode::~HandleSDNode() { 5354 DropOperands(); 5355} 5356 5357GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5358 EVT VT, int64_t o, unsigned char TF) 5359 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5360 TheGlobal = GA; 5361} 5362 5363MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5364 MachineMemOperand *mmo) 5365 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5366 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5367 MMO->isNonTemporal()); 5368 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5369 assert(isNonTemporal() == MMO->isNonTemporal() && 5370 "Non-temporal encoding error!"); 5371 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5372} 5373 5374MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5375 const SDValue *Ops, unsigned NumOps, EVT memvt, 5376 MachineMemOperand *mmo) 5377 : SDNode(Opc, dl, VTs, Ops, NumOps), 5378 MemoryVT(memvt), MMO(mmo) { 5379 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5380 MMO->isNonTemporal()); 5381 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5382 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5383} 5384 5385/// Profile - Gather unique data for the node. 5386/// 5387void SDNode::Profile(FoldingSetNodeID &ID) const { 5388 AddNodeIDNode(ID, this); 5389} 5390 5391namespace { 5392 struct EVTArray { 5393 std::vector<EVT> VTs; 5394 5395 EVTArray() { 5396 VTs.reserve(MVT::LAST_VALUETYPE); 5397 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5398 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5399 } 5400 }; 5401} 5402 5403static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5404static ManagedStatic<EVTArray> SimpleVTArray; 5405static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5406 5407/// getValueTypeList - Return a pointer to the specified value type. 5408/// 5409const EVT *SDNode::getValueTypeList(EVT VT) { 5410 if (VT.isExtended()) { 5411 sys::SmartScopedLock<true> Lock(*VTMutex); 5412 return &(*EVTs->insert(VT).first); 5413 } else { 5414 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5415 } 5416} 5417 5418/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5419/// indicated value. This method ignores uses of other values defined by this 5420/// operation. 5421bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5422 assert(Value < getNumValues() && "Bad value!"); 5423 5424 // TODO: Only iterate over uses of a given value of the node 5425 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5426 if (UI.getUse().getResNo() == Value) { 5427 if (NUses == 0) 5428 return false; 5429 --NUses; 5430 } 5431 } 5432 5433 // Found exactly the right number of uses? 5434 return NUses == 0; 5435} 5436 5437 5438/// hasAnyUseOfValue - Return true if there are any use of the indicated 5439/// value. This method ignores uses of other values defined by this operation. 5440bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5441 assert(Value < getNumValues() && "Bad value!"); 5442 5443 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5444 if (UI.getUse().getResNo() == Value) 5445 return true; 5446 5447 return false; 5448} 5449 5450 5451/// isOnlyUserOf - Return true if this node is the only use of N. 5452/// 5453bool SDNode::isOnlyUserOf(SDNode *N) const { 5454 bool Seen = false; 5455 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5456 SDNode *User = *I; 5457 if (User == this) 5458 Seen = true; 5459 else 5460 return false; 5461 } 5462 5463 return Seen; 5464} 5465 5466/// isOperand - Return true if this node is an operand of N. 5467/// 5468bool SDValue::isOperandOf(SDNode *N) const { 5469 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5470 if (*this == N->getOperand(i)) 5471 return true; 5472 return false; 5473} 5474 5475bool SDNode::isOperandOf(SDNode *N) const { 5476 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5477 if (this == N->OperandList[i].getNode()) 5478 return true; 5479 return false; 5480} 5481 5482/// reachesChainWithoutSideEffects - Return true if this operand (which must 5483/// be a chain) reaches the specified operand without crossing any 5484/// side-effecting instructions. In practice, this looks through token 5485/// factors and non-volatile loads. In order to remain efficient, this only 5486/// looks a couple of nodes in, it does not do an exhaustive search. 5487bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5488 unsigned Depth) const { 5489 if (*this == Dest) return true; 5490 5491 // Don't search too deeply, we just want to be able to see through 5492 // TokenFactor's etc. 5493 if (Depth == 0) return false; 5494 5495 // If this is a token factor, all inputs to the TF happen in parallel. If any 5496 // of the operands of the TF reach dest, then we can do the xform. 5497 if (getOpcode() == ISD::TokenFactor) { 5498 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5499 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5500 return true; 5501 return false; 5502 } 5503 5504 // Loads don't have side effects, look through them. 5505 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5506 if (!Ld->isVolatile()) 5507 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5508 } 5509 return false; 5510} 5511 5512/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5513/// is either an operand of N or it can be reached by traversing up the operands. 5514/// NOTE: this is an expensive method. Use it carefully. 5515bool SDNode::isPredecessorOf(SDNode *N) const { 5516 SmallPtrSet<SDNode *, 32> Visited; 5517 SmallVector<SDNode *, 16> Worklist; 5518 Worklist.push_back(N); 5519 5520 do { 5521 N = Worklist.pop_back_val(); 5522 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5523 SDNode *Op = N->getOperand(i).getNode(); 5524 if (Op == this) 5525 return true; 5526 if (Visited.insert(Op)) 5527 Worklist.push_back(Op); 5528 } 5529 } while (!Worklist.empty()); 5530 5531 return false; 5532} 5533 5534uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5535 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5536 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5537} 5538 5539std::string SDNode::getOperationName(const SelectionDAG *G) const { 5540 switch (getOpcode()) { 5541 default: 5542 if (getOpcode() < ISD::BUILTIN_OP_END) 5543 return "<<Unknown DAG Node>>"; 5544 if (isMachineOpcode()) { 5545 if (G) 5546 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5547 if (getMachineOpcode() < TII->getNumOpcodes()) 5548 return TII->get(getMachineOpcode()).getName(); 5549 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5550 } 5551 if (G) { 5552 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5553 const char *Name = TLI.getTargetNodeName(getOpcode()); 5554 if (Name) return Name; 5555 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5556 } 5557 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5558 5559#ifndef NDEBUG 5560 case ISD::DELETED_NODE: 5561 return "<<Deleted Node!>>"; 5562#endif 5563 case ISD::PREFETCH: return "Prefetch"; 5564 case ISD::MEMBARRIER: return "MemBarrier"; 5565 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5566 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5567 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5568 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5569 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5570 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5571 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5572 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5573 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5574 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5575 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5576 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5577 case ISD::PCMARKER: return "PCMarker"; 5578 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5579 case ISD::SRCVALUE: return "SrcValue"; 5580 case ISD::MDNODE_SDNODE: return "MDNode"; 5581 case ISD::EntryToken: return "EntryToken"; 5582 case ISD::TokenFactor: return "TokenFactor"; 5583 case ISD::AssertSext: return "AssertSext"; 5584 case ISD::AssertZext: return "AssertZext"; 5585 5586 case ISD::BasicBlock: return "BasicBlock"; 5587 case ISD::VALUETYPE: return "ValueType"; 5588 case ISD::Register: return "Register"; 5589 5590 case ISD::Constant: return "Constant"; 5591 case ISD::ConstantFP: return "ConstantFP"; 5592 case ISD::GlobalAddress: return "GlobalAddress"; 5593 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5594 case ISD::FrameIndex: return "FrameIndex"; 5595 case ISD::JumpTable: return "JumpTable"; 5596 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5597 case ISD::RETURNADDR: return "RETURNADDR"; 5598 case ISD::FRAMEADDR: return "FRAMEADDR"; 5599 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5600 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5601 case ISD::LSDAADDR: return "LSDAADDR"; 5602 case ISD::EHSELECTION: return "EHSELECTION"; 5603 case ISD::EH_RETURN: return "EH_RETURN"; 5604 case ISD::ConstantPool: return "ConstantPool"; 5605 case ISD::ExternalSymbol: return "ExternalSymbol"; 5606 case ISD::BlockAddress: return "BlockAddress"; 5607 case ISD::INTRINSIC_WO_CHAIN: 5608 case ISD::INTRINSIC_VOID: 5609 case ISD::INTRINSIC_W_CHAIN: { 5610 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5611 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5612 if (IID < Intrinsic::num_intrinsics) 5613 return Intrinsic::getName((Intrinsic::ID)IID); 5614 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5615 return TII->getName(IID); 5616 llvm_unreachable("Invalid intrinsic ID"); 5617 } 5618 5619 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5620 case ISD::TargetConstant: return "TargetConstant"; 5621 case ISD::TargetConstantFP:return "TargetConstantFP"; 5622 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5623 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5624 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5625 case ISD::TargetJumpTable: return "TargetJumpTable"; 5626 case ISD::TargetConstantPool: return "TargetConstantPool"; 5627 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5628 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5629 5630 case ISD::CopyToReg: return "CopyToReg"; 5631 case ISD::CopyFromReg: return "CopyFromReg"; 5632 case ISD::UNDEF: return "undef"; 5633 case ISD::MERGE_VALUES: return "merge_values"; 5634 case ISD::INLINEASM: return "inlineasm"; 5635 case ISD::EH_LABEL: return "eh_label"; 5636 case ISD::HANDLENODE: return "handlenode"; 5637 5638 // Unary operators 5639 case ISD::FABS: return "fabs"; 5640 case ISD::FNEG: return "fneg"; 5641 case ISD::FSQRT: return "fsqrt"; 5642 case ISD::FSIN: return "fsin"; 5643 case ISD::FCOS: return "fcos"; 5644 case ISD::FPOWI: return "fpowi"; 5645 case ISD::FPOW: return "fpow"; 5646 case ISD::FTRUNC: return "ftrunc"; 5647 case ISD::FFLOOR: return "ffloor"; 5648 case ISD::FCEIL: return "fceil"; 5649 case ISD::FRINT: return "frint"; 5650 case ISD::FNEARBYINT: return "fnearbyint"; 5651 5652 // Binary operators 5653 case ISD::ADD: return "add"; 5654 case ISD::SUB: return "sub"; 5655 case ISD::MUL: return "mul"; 5656 case ISD::MULHU: return "mulhu"; 5657 case ISD::MULHS: return "mulhs"; 5658 case ISD::SDIV: return "sdiv"; 5659 case ISD::UDIV: return "udiv"; 5660 case ISD::SREM: return "srem"; 5661 case ISD::UREM: return "urem"; 5662 case ISD::SMUL_LOHI: return "smul_lohi"; 5663 case ISD::UMUL_LOHI: return "umul_lohi"; 5664 case ISD::SDIVREM: return "sdivrem"; 5665 case ISD::UDIVREM: return "udivrem"; 5666 case ISD::AND: return "and"; 5667 case ISD::OR: return "or"; 5668 case ISD::XOR: return "xor"; 5669 case ISD::SHL: return "shl"; 5670 case ISD::SRA: return "sra"; 5671 case ISD::SRL: return "srl"; 5672 case ISD::ROTL: return "rotl"; 5673 case ISD::ROTR: return "rotr"; 5674 case ISD::FADD: return "fadd"; 5675 case ISD::FSUB: return "fsub"; 5676 case ISD::FMUL: return "fmul"; 5677 case ISD::FDIV: return "fdiv"; 5678 case ISD::FREM: return "frem"; 5679 case ISD::FCOPYSIGN: return "fcopysign"; 5680 case ISD::FGETSIGN: return "fgetsign"; 5681 5682 case ISD::SETCC: return "setcc"; 5683 case ISD::VSETCC: return "vsetcc"; 5684 case ISD::SELECT: return "select"; 5685 case ISD::SELECT_CC: return "select_cc"; 5686 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5687 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5688 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5689 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5690 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5691 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5692 case ISD::CARRY_FALSE: return "carry_false"; 5693 case ISD::ADDC: return "addc"; 5694 case ISD::ADDE: return "adde"; 5695 case ISD::SADDO: return "saddo"; 5696 case ISD::UADDO: return "uaddo"; 5697 case ISD::SSUBO: return "ssubo"; 5698 case ISD::USUBO: return "usubo"; 5699 case ISD::SMULO: return "smulo"; 5700 case ISD::UMULO: return "umulo"; 5701 case ISD::SUBC: return "subc"; 5702 case ISD::SUBE: return "sube"; 5703 case ISD::SHL_PARTS: return "shl_parts"; 5704 case ISD::SRA_PARTS: return "sra_parts"; 5705 case ISD::SRL_PARTS: return "srl_parts"; 5706 5707 // Conversion operators. 5708 case ISD::SIGN_EXTEND: return "sign_extend"; 5709 case ISD::ZERO_EXTEND: return "zero_extend"; 5710 case ISD::ANY_EXTEND: return "any_extend"; 5711 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5712 case ISD::TRUNCATE: return "truncate"; 5713 case ISD::FP_ROUND: return "fp_round"; 5714 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5715 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5716 case ISD::FP_EXTEND: return "fp_extend"; 5717 5718 case ISD::SINT_TO_FP: return "sint_to_fp"; 5719 case ISD::UINT_TO_FP: return "uint_to_fp"; 5720 case ISD::FP_TO_SINT: return "fp_to_sint"; 5721 case ISD::FP_TO_UINT: return "fp_to_uint"; 5722 case ISD::BIT_CONVERT: return "bit_convert"; 5723 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5724 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5725 5726 case ISD::CONVERT_RNDSAT: { 5727 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5728 default: llvm_unreachable("Unknown cvt code!"); 5729 case ISD::CVT_FF: return "cvt_ff"; 5730 case ISD::CVT_FS: return "cvt_fs"; 5731 case ISD::CVT_FU: return "cvt_fu"; 5732 case ISD::CVT_SF: return "cvt_sf"; 5733 case ISD::CVT_UF: return "cvt_uf"; 5734 case ISD::CVT_SS: return "cvt_ss"; 5735 case ISD::CVT_SU: return "cvt_su"; 5736 case ISD::CVT_US: return "cvt_us"; 5737 case ISD::CVT_UU: return "cvt_uu"; 5738 } 5739 } 5740 5741 // Control flow instructions 5742 case ISD::BR: return "br"; 5743 case ISD::BRIND: return "brind"; 5744 case ISD::BR_JT: return "br_jt"; 5745 case ISD::BRCOND: return "brcond"; 5746 case ISD::BR_CC: return "br_cc"; 5747 case ISD::CALLSEQ_START: return "callseq_start"; 5748 case ISD::CALLSEQ_END: return "callseq_end"; 5749 5750 // Other operators 5751 case ISD::LOAD: return "load"; 5752 case ISD::STORE: return "store"; 5753 case ISD::VAARG: return "vaarg"; 5754 case ISD::VACOPY: return "vacopy"; 5755 case ISD::VAEND: return "vaend"; 5756 case ISD::VASTART: return "vastart"; 5757 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5758 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5759 case ISD::BUILD_PAIR: return "build_pair"; 5760 case ISD::STACKSAVE: return "stacksave"; 5761 case ISD::STACKRESTORE: return "stackrestore"; 5762 case ISD::TRAP: return "trap"; 5763 5764 // Bit manipulation 5765 case ISD::BSWAP: return "bswap"; 5766 case ISD::CTPOP: return "ctpop"; 5767 case ISD::CTTZ: return "cttz"; 5768 case ISD::CTLZ: return "ctlz"; 5769 5770 // Trampolines 5771 case ISD::TRAMPOLINE: return "trampoline"; 5772 5773 case ISD::CONDCODE: 5774 switch (cast<CondCodeSDNode>(this)->get()) { 5775 default: llvm_unreachable("Unknown setcc condition!"); 5776 case ISD::SETOEQ: return "setoeq"; 5777 case ISD::SETOGT: return "setogt"; 5778 case ISD::SETOGE: return "setoge"; 5779 case ISD::SETOLT: return "setolt"; 5780 case ISD::SETOLE: return "setole"; 5781 case ISD::SETONE: return "setone"; 5782 5783 case ISD::SETO: return "seto"; 5784 case ISD::SETUO: return "setuo"; 5785 case ISD::SETUEQ: return "setue"; 5786 case ISD::SETUGT: return "setugt"; 5787 case ISD::SETUGE: return "setuge"; 5788 case ISD::SETULT: return "setult"; 5789 case ISD::SETULE: return "setule"; 5790 case ISD::SETUNE: return "setune"; 5791 5792 case ISD::SETEQ: return "seteq"; 5793 case ISD::SETGT: return "setgt"; 5794 case ISD::SETGE: return "setge"; 5795 case ISD::SETLT: return "setlt"; 5796 case ISD::SETLE: return "setle"; 5797 case ISD::SETNE: return "setne"; 5798 } 5799 } 5800} 5801 5802const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5803 switch (AM) { 5804 default: 5805 return ""; 5806 case ISD::PRE_INC: 5807 return "<pre-inc>"; 5808 case ISD::PRE_DEC: 5809 return "<pre-dec>"; 5810 case ISD::POST_INC: 5811 return "<post-inc>"; 5812 case ISD::POST_DEC: 5813 return "<post-dec>"; 5814 } 5815} 5816 5817std::string ISD::ArgFlagsTy::getArgFlagsString() { 5818 std::string S = "< "; 5819 5820 if (isZExt()) 5821 S += "zext "; 5822 if (isSExt()) 5823 S += "sext "; 5824 if (isInReg()) 5825 S += "inreg "; 5826 if (isSRet()) 5827 S += "sret "; 5828 if (isByVal()) 5829 S += "byval "; 5830 if (isNest()) 5831 S += "nest "; 5832 if (getByValAlign()) 5833 S += "byval-align:" + utostr(getByValAlign()) + " "; 5834 if (getOrigAlign()) 5835 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5836 if (getByValSize()) 5837 S += "byval-size:" + utostr(getByValSize()) + " "; 5838 return S + ">"; 5839} 5840 5841void SDNode::dump() const { dump(0); } 5842void SDNode::dump(const SelectionDAG *G) const { 5843 print(dbgs(), G); 5844} 5845 5846void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5847 OS << (void*)this << ": "; 5848 5849 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5850 if (i) OS << ","; 5851 if (getValueType(i) == MVT::Other) 5852 OS << "ch"; 5853 else 5854 OS << getValueType(i).getEVTString(); 5855 } 5856 OS << " = " << getOperationName(G); 5857} 5858 5859void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5860 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5861 if (!MN->memoperands_empty()) { 5862 OS << "<"; 5863 OS << "Mem:"; 5864 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5865 e = MN->memoperands_end(); i != e; ++i) { 5866 OS << **i; 5867 if (next(i) != e) 5868 OS << " "; 5869 } 5870 OS << ">"; 5871 } 5872 } else if (const ShuffleVectorSDNode *SVN = 5873 dyn_cast<ShuffleVectorSDNode>(this)) { 5874 OS << "<"; 5875 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5876 int Idx = SVN->getMaskElt(i); 5877 if (i) OS << ","; 5878 if (Idx < 0) 5879 OS << "u"; 5880 else 5881 OS << Idx; 5882 } 5883 OS << ">"; 5884 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5885 OS << '<' << CSDN->getAPIntValue() << '>'; 5886 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5887 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5888 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5889 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5890 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5891 else { 5892 OS << "<APFloat("; 5893 CSDN->getValueAPF().bitcastToAPInt().dump(); 5894 OS << ")>"; 5895 } 5896 } else if (const GlobalAddressSDNode *GADN = 5897 dyn_cast<GlobalAddressSDNode>(this)) { 5898 int64_t offset = GADN->getOffset(); 5899 OS << '<'; 5900 WriteAsOperand(OS, GADN->getGlobal()); 5901 OS << '>'; 5902 if (offset > 0) 5903 OS << " + " << offset; 5904 else 5905 OS << " " << offset; 5906 if (unsigned int TF = GADN->getTargetFlags()) 5907 OS << " [TF=" << TF << ']'; 5908 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5909 OS << "<" << FIDN->getIndex() << ">"; 5910 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5911 OS << "<" << JTDN->getIndex() << ">"; 5912 if (unsigned int TF = JTDN->getTargetFlags()) 5913 OS << " [TF=" << TF << ']'; 5914 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5915 int offset = CP->getOffset(); 5916 if (CP->isMachineConstantPoolEntry()) 5917 OS << "<" << *CP->getMachineCPVal() << ">"; 5918 else 5919 OS << "<" << *CP->getConstVal() << ">"; 5920 if (offset > 0) 5921 OS << " + " << offset; 5922 else 5923 OS << " " << offset; 5924 if (unsigned int TF = CP->getTargetFlags()) 5925 OS << " [TF=" << TF << ']'; 5926 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5927 OS << "<"; 5928 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5929 if (LBB) 5930 OS << LBB->getName() << " "; 5931 OS << (const void*)BBDN->getBasicBlock() << ">"; 5932 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5933 if (G && R->getReg() && 5934 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5935 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5936 } else { 5937 OS << " %reg" << R->getReg(); 5938 } 5939 } else if (const ExternalSymbolSDNode *ES = 5940 dyn_cast<ExternalSymbolSDNode>(this)) { 5941 OS << "'" << ES->getSymbol() << "'"; 5942 if (unsigned int TF = ES->getTargetFlags()) 5943 OS << " [TF=" << TF << ']'; 5944 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5945 if (M->getValue()) 5946 OS << "<" << M->getValue() << ">"; 5947 else 5948 OS << "<null>"; 5949 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5950 if (MD->getMD()) 5951 OS << "<" << MD->getMD() << ">"; 5952 else 5953 OS << "<null>"; 5954 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5955 OS << ":" << N->getVT().getEVTString(); 5956 } 5957 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5958 OS << "<" << *LD->getMemOperand(); 5959 5960 bool doExt = true; 5961 switch (LD->getExtensionType()) { 5962 default: doExt = false; break; 5963 case ISD::EXTLOAD: OS << ", anyext"; break; 5964 case ISD::SEXTLOAD: OS << ", sext"; break; 5965 case ISD::ZEXTLOAD: OS << ", zext"; break; 5966 } 5967 if (doExt) 5968 OS << " from " << LD->getMemoryVT().getEVTString(); 5969 5970 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5971 if (*AM) 5972 OS << ", " << AM; 5973 5974 OS << ">"; 5975 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5976 OS << "<" << *ST->getMemOperand(); 5977 5978 if (ST->isTruncatingStore()) 5979 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5980 5981 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5982 if (*AM) 5983 OS << ", " << AM; 5984 5985 OS << ">"; 5986 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5987 OS << "<" << *M->getMemOperand() << ">"; 5988 } else if (const BlockAddressSDNode *BA = 5989 dyn_cast<BlockAddressSDNode>(this)) { 5990 OS << "<"; 5991 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5992 OS << ", "; 5993 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5994 OS << ">"; 5995 if (unsigned int TF = BA->getTargetFlags()) 5996 OS << " [TF=" << TF << ']'; 5997 } 5998 5999 if (G) 6000 if (unsigned Order = G->GetOrdering(this)) 6001 OS << " [ORD=" << Order << ']'; 6002 6003 if (getNodeId() != -1) 6004 OS << " [ID=" << getNodeId() << ']'; 6005} 6006 6007void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6008 print_types(OS, G); 6009 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6010 if (i) OS << ", "; else OS << " "; 6011 OS << (void*)getOperand(i).getNode(); 6012 if (unsigned RN = getOperand(i).getResNo()) 6013 OS << ":" << RN; 6014 } 6015 print_details(OS, G); 6016} 6017 6018static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6019 const SelectionDAG *G, unsigned depth, 6020 unsigned indent) 6021{ 6022 if (depth == 0) 6023 return; 6024 6025 OS.indent(indent); 6026 6027 N->print(OS, G); 6028 6029 if (depth < 1) 6030 return; 6031 6032 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6033 OS << '\n'; 6034 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6035 } 6036} 6037 6038void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6039 unsigned depth) const { 6040 printrWithDepthHelper(OS, this, G, depth, 0); 6041} 6042 6043void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6044 // Don't print impossibly deep things. 6045 printrWithDepth(OS, G, 100); 6046} 6047 6048void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6049 printrWithDepth(dbgs(), G, depth); 6050} 6051 6052void SDNode::dumprFull(const SelectionDAG *G) const { 6053 // Don't print impossibly deep things. 6054 dumprWithDepth(G, 100); 6055} 6056 6057static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6058 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6059 if (N->getOperand(i).getNode()->hasOneUse()) 6060 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6061 else 6062 dbgs() << "\n" << std::string(indent+2, ' ') 6063 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6064 6065 6066 dbgs() << "\n"; 6067 dbgs().indent(indent); 6068 N->dump(G); 6069} 6070 6071SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6072 assert(N->getNumValues() == 1 && 6073 "Can't unroll a vector with multiple results!"); 6074 6075 EVT VT = N->getValueType(0); 6076 unsigned NE = VT.getVectorNumElements(); 6077 EVT EltVT = VT.getVectorElementType(); 6078 DebugLoc dl = N->getDebugLoc(); 6079 6080 SmallVector<SDValue, 8> Scalars; 6081 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6082 6083 // If ResNE is 0, fully unroll the vector op. 6084 if (ResNE == 0) 6085 ResNE = NE; 6086 else if (NE > ResNE) 6087 NE = ResNE; 6088 6089 unsigned i; 6090 for (i= 0; i != NE; ++i) { 6091 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 6092 SDValue Operand = N->getOperand(j); 6093 EVT OperandVT = Operand.getValueType(); 6094 if (OperandVT.isVector()) { 6095 // A vector operand; extract a single element. 6096 EVT OperandEltVT = OperandVT.getVectorElementType(); 6097 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6098 OperandEltVT, 6099 Operand, 6100 getConstant(i, MVT::i32)); 6101 } else { 6102 // A scalar operand; just use it as is. 6103 Operands[j] = Operand; 6104 } 6105 } 6106 6107 switch (N->getOpcode()) { 6108 default: 6109 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6110 &Operands[0], Operands.size())); 6111 break; 6112 case ISD::SHL: 6113 case ISD::SRA: 6114 case ISD::SRL: 6115 case ISD::ROTL: 6116 case ISD::ROTR: 6117 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6118 getShiftAmountOperand(Operands[1]))); 6119 break; 6120 case ISD::SIGN_EXTEND_INREG: 6121 case ISD::FP_ROUND_INREG: { 6122 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6123 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6124 Operands[0], 6125 getValueType(ExtVT))); 6126 } 6127 } 6128 } 6129 6130 for (; i < ResNE; ++i) 6131 Scalars.push_back(getUNDEF(EltVT)); 6132 6133 return getNode(ISD::BUILD_VECTOR, dl, 6134 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6135 &Scalars[0], Scalars.size()); 6136} 6137 6138 6139/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6140/// location that is 'Dist' units away from the location that the 'Base' load 6141/// is loading from. 6142bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6143 unsigned Bytes, int Dist) const { 6144 if (LD->getChain() != Base->getChain()) 6145 return false; 6146 EVT VT = LD->getValueType(0); 6147 if (VT.getSizeInBits() / 8 != Bytes) 6148 return false; 6149 6150 SDValue Loc = LD->getOperand(1); 6151 SDValue BaseLoc = Base->getOperand(1); 6152 if (Loc.getOpcode() == ISD::FrameIndex) { 6153 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6154 return false; 6155 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6156 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6157 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6158 int FS = MFI->getObjectSize(FI); 6159 int BFS = MFI->getObjectSize(BFI); 6160 if (FS != BFS || FS != (int)Bytes) return false; 6161 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6162 } 6163 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6164 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6165 if (V && (V->getSExtValue() == Dist*Bytes)) 6166 return true; 6167 } 6168 6169 const GlobalValue *GV1 = NULL; 6170 const GlobalValue *GV2 = NULL; 6171 int64_t Offset1 = 0; 6172 int64_t Offset2 = 0; 6173 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6174 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6175 if (isGA1 && isGA2 && GV1 == GV2) 6176 return Offset1 == (Offset2 + Dist*Bytes); 6177 return false; 6178} 6179 6180 6181/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6182/// it cannot be inferred. 6183unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6184 // If this is a GlobalAddress + cst, return the alignment. 6185 const GlobalValue *GV; 6186 int64_t GVOffset = 0; 6187 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6188 // If GV has specified alignment, then use it. Otherwise, use the preferred 6189 // alignment. 6190 unsigned Align = GV->getAlignment(); 6191 if (!Align) { 6192 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6193 if (GVar->hasInitializer()) { 6194 const TargetData *TD = TLI.getTargetData(); 6195 Align = TD->getPreferredAlignment(GVar); 6196 } 6197 } 6198 } 6199 return MinAlign(Align, GVOffset); 6200 } 6201 6202 // If this is a direct reference to a stack slot, use information about the 6203 // stack slot's alignment. 6204 int FrameIdx = 1 << 31; 6205 int64_t FrameOffset = 0; 6206 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6207 FrameIdx = FI->getIndex(); 6208 } else if (Ptr.getOpcode() == ISD::ADD && 6209 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6210 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6211 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6212 FrameOffset = Ptr.getConstantOperandVal(1); 6213 } 6214 6215 if (FrameIdx != (1 << 31)) { 6216 // FIXME: Handle FI+CST. 6217 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6218 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6219 FrameOffset); 6220 if (MFI.isFixedObjectIndex(FrameIdx)) { 6221 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6222 6223 // The alignment of the frame index can be determined from its offset from 6224 // the incoming frame position. If the frame object is at offset 32 and 6225 // the stack is guaranteed to be 16-byte aligned, then we know that the 6226 // object is 16-byte aligned. 6227 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6228 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6229 6230 // Finally, the frame object itself may have a known alignment. Factor 6231 // the alignment + offset into a new alignment. For example, if we know 6232 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6233 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6234 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6235 return std::max(Align, FIInfoAlign); 6236 } 6237 return FIInfoAlign; 6238 } 6239 6240 return 0; 6241} 6242 6243void SelectionDAG::dump() const { 6244 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6245 6246 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6247 I != E; ++I) { 6248 const SDNode *N = I; 6249 if (!N->hasOneUse() && N != getRoot().getNode()) 6250 DumpNodes(N, 2, this); 6251 } 6252 6253 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6254 6255 dbgs() << "\n\n"; 6256} 6257 6258void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6259 print_types(OS, G); 6260 print_details(OS, G); 6261} 6262 6263typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6264static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6265 const SelectionDAG *G, VisitedSDNodeSet &once) { 6266 if (!once.insert(N)) // If we've been here before, return now. 6267 return; 6268 6269 // Dump the current SDNode, but don't end the line yet. 6270 OS << std::string(indent, ' '); 6271 N->printr(OS, G); 6272 6273 // Having printed this SDNode, walk the children: 6274 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6275 const SDNode *child = N->getOperand(i).getNode(); 6276 6277 if (i) OS << ","; 6278 OS << " "; 6279 6280 if (child->getNumOperands() == 0) { 6281 // This child has no grandchildren; print it inline right here. 6282 child->printr(OS, G); 6283 once.insert(child); 6284 } else { // Just the address. FIXME: also print the child's opcode. 6285 OS << (void*)child; 6286 if (unsigned RN = N->getOperand(i).getResNo()) 6287 OS << ":" << RN; 6288 } 6289 } 6290 6291 OS << "\n"; 6292 6293 // Dump children that have grandchildren on their own line(s). 6294 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6295 const SDNode *child = N->getOperand(i).getNode(); 6296 DumpNodesr(OS, child, indent+2, G, once); 6297 } 6298} 6299 6300void SDNode::dumpr() const { 6301 VisitedSDNodeSet once; 6302 DumpNodesr(dbgs(), this, 0, 0, once); 6303} 6304 6305void SDNode::dumpr(const SelectionDAG *G) const { 6306 VisitedSDNodeSet once; 6307 DumpNodesr(dbgs(), this, 0, G, once); 6308} 6309 6310 6311// getAddressSpace - Return the address space this GlobalAddress belongs to. 6312unsigned GlobalAddressSDNode::getAddressSpace() const { 6313 return getGlobal()->getType()->getAddressSpace(); 6314} 6315 6316 6317const Type *ConstantPoolSDNode::getType() const { 6318 if (isMachineConstantPoolEntry()) 6319 return Val.MachineCPVal->getType(); 6320 return Val.ConstVal->getType(); 6321} 6322 6323bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6324 APInt &SplatUndef, 6325 unsigned &SplatBitSize, 6326 bool &HasAnyUndefs, 6327 unsigned MinSplatBits, 6328 bool isBigEndian) { 6329 EVT VT = getValueType(0); 6330 assert(VT.isVector() && "Expected a vector type"); 6331 unsigned sz = VT.getSizeInBits(); 6332 if (MinSplatBits > sz) 6333 return false; 6334 6335 SplatValue = APInt(sz, 0); 6336 SplatUndef = APInt(sz, 0); 6337 6338 // Get the bits. Bits with undefined values (when the corresponding element 6339 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6340 // in SplatValue. If any of the values are not constant, give up and return 6341 // false. 6342 unsigned int nOps = getNumOperands(); 6343 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6344 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6345 6346 for (unsigned j = 0; j < nOps; ++j) { 6347 unsigned i = isBigEndian ? nOps-1-j : j; 6348 SDValue OpVal = getOperand(i); 6349 unsigned BitPos = j * EltBitSize; 6350 6351 if (OpVal.getOpcode() == ISD::UNDEF) 6352 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6353 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6354 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6355 zextOrTrunc(sz) << BitPos; 6356 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6357 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6358 else 6359 return false; 6360 } 6361 6362 // The build_vector is all constants or undefs. Find the smallest element 6363 // size that splats the vector. 6364 6365 HasAnyUndefs = (SplatUndef != 0); 6366 while (sz > 8) { 6367 6368 unsigned HalfSize = sz / 2; 6369 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6370 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6371 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6372 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6373 6374 // If the two halves do not match (ignoring undef bits), stop here. 6375 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6376 MinSplatBits > HalfSize) 6377 break; 6378 6379 SplatValue = HighValue | LowValue; 6380 SplatUndef = HighUndef & LowUndef; 6381 6382 sz = HalfSize; 6383 } 6384 6385 SplatBitSize = sz; 6386 return true; 6387} 6388 6389bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6390 // Find the first non-undef value in the shuffle mask. 6391 unsigned i, e; 6392 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6393 /* search */; 6394 6395 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6396 6397 // Make sure all remaining elements are either undef or the same as the first 6398 // non-undef value. 6399 for (int Idx = Mask[i]; i != e; ++i) 6400 if (Mask[i] >= 0 && Mask[i] != Idx) 6401 return false; 6402 return true; 6403} 6404 6405#ifdef XDEBUG 6406static void checkForCyclesHelper(const SDNode *N, 6407 SmallPtrSet<const SDNode*, 32> &Visited, 6408 SmallPtrSet<const SDNode*, 32> &Checked) { 6409 // If this node has already been checked, don't check it again. 6410 if (Checked.count(N)) 6411 return; 6412 6413 // If a node has already been visited on this depth-first walk, reject it as 6414 // a cycle. 6415 if (!Visited.insert(N)) { 6416 dbgs() << "Offending node:\n"; 6417 N->dumprFull(); 6418 errs() << "Detected cycle in SelectionDAG\n"; 6419 abort(); 6420 } 6421 6422 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6423 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6424 6425 Checked.insert(N); 6426 Visited.erase(N); 6427} 6428#endif 6429 6430void llvm::checkForCycles(const llvm::SDNode *N) { 6431#ifdef XDEBUG 6432 assert(N && "Checking nonexistant SDNode"); 6433 SmallPtrSet<const SDNode*, 32> visited; 6434 SmallPtrSet<const SDNode*, 32> checked; 6435 checkForCyclesHelper(N, visited, checked); 6436#endif 6437} 6438 6439void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6440 checkForCycles(DAG->getRoot().getNode()); 6441} 6442