SelectionDAG.cpp revision 512063dd0f91a76b9dd904dfff72a52b4d09e89f
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/ValueTracking.h" 19#include "llvm/Function.h" 20#include "llvm/GlobalAlias.h" 21#include "llvm/GlobalVariable.h" 22#include "llvm/Intrinsics.h" 23#include "llvm/DerivedTypes.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CallingConv.h" 26#include "llvm/CodeGen/MachineBasicBlock.h" 27#include "llvm/CodeGen/MachineConstantPool.h" 28#include "llvm/CodeGen/MachineFrameInfo.h" 29#include "llvm/CodeGen/MachineModuleInfo.h" 30#include "llvm/CodeGen/PseudoSourceValue.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetFrameInfo.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/System/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BIT_CONVERT) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BIT_CONVERT) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 for (unsigned i = 1; i < NumElems; ++i) { 201 SDValue V = N->getOperand(i); 202 if (V.getOpcode() != ISD::UNDEF) 203 return false; 204 } 205 return true; 206} 207 208/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 209/// when given the operation for (X op Y). 210ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 211 // To perform this operation, we just need to swap the L and G bits of the 212 // operation. 213 unsigned OldL = (Operation >> 2) & 1; 214 unsigned OldG = (Operation >> 1) & 1; 215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 216 (OldL << 1) | // New G bit 217 (OldG << 2)); // New L bit. 218} 219 220/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 221/// 'op' is a valid SetCC operation. 222ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 223 unsigned Operation = Op; 224 if (isInteger) 225 Operation ^= 7; // Flip L, G, E bits, but not U. 226 else 227 Operation ^= 15; // Flip all of the condition bits. 228 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 232 return ISD::CondCode(Operation); 233} 234 235 236/// isSignedOp - For an integer comparison, return 1 if the comparison is a 237/// signed operation and 2 if the result is an unsigned comparison. Return zero 238/// if the operation does not depend on the sign of the input (setne and seteq). 239static int isSignedOp(ISD::CondCode Opcode) { 240 switch (Opcode) { 241 default: llvm_unreachable("Illegal integer setcc operation!"); 242 case ISD::SETEQ: 243 case ISD::SETNE: return 0; 244 case ISD::SETLT: 245 case ISD::SETLE: 246 case ISD::SETGT: 247 case ISD::SETGE: return 1; 248 case ISD::SETULT: 249 case ISD::SETULE: 250 case ISD::SETUGT: 251 case ISD::SETUGE: return 2; 252 } 253} 254 255/// getSetCCOrOperation - Return the result of a logical OR between different 256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 257/// returns SETCC_INVALID if it is not possible to represent the resultant 258/// comparison. 259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 260 bool isInteger) { 261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 262 // Cannot fold a signed integer setcc with an unsigned integer setcc. 263 return ISD::SETCC_INVALID; 264 265 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 266 267 // If the N and U bits get set then the resultant comparison DOES suddenly 268 // care about orderedness, and is true when ordered. 269 if (Op > ISD::SETTRUE2) 270 Op &= ~16; // Clear the U bit if the N bit is set. 271 272 // Canonicalize illegal integer setcc's. 273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 274 Op = ISD::SETNE; 275 276 return ISD::CondCode(Op); 277} 278 279/// getSetCCAndOperation - Return the result of a logical AND between different 280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 281/// function returns zero if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed setcc with an unsigned setcc. 287 return ISD::SETCC_INVALID; 288 289 // Combine all of the condition bits. 290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 291 292 // Canonicalize illegal integer setcc's. 293 if (isInteger) { 294 switch (Result) { 295 default: break; 296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 297 case ISD::SETOEQ: // SETEQ & SETU[LG]E 298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 301 } 302 } 303 304 return Result; 305} 306 307const TargetMachine &SelectionDAG::getTarget() const { 308 return MF->getTarget(); 309} 310 311//===----------------------------------------------------------------------===// 312// SDNode Profile Support 313//===----------------------------------------------------------------------===// 314 315/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 316/// 317static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 318 ID.AddInteger(OpC); 319} 320 321/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 322/// solely with their pointer. 323static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 324 ID.AddPointer(VTList.VTs); 325} 326 327/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 328/// 329static void AddNodeIDOperands(FoldingSetNodeID &ID, 330 const SDValue *Ops, unsigned NumOps) { 331 for (; NumOps; --NumOps, ++Ops) { 332 ID.AddPointer(Ops->getNode()); 333 ID.AddInteger(Ops->getResNo()); 334 } 335} 336 337/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 338/// 339static void AddNodeIDOperands(FoldingSetNodeID &ID, 340 const SDUse *Ops, unsigned NumOps) { 341 for (; NumOps; --NumOps, ++Ops) { 342 ID.AddPointer(Ops->getNode()); 343 ID.AddInteger(Ops->getResNo()); 344 } 345} 346 347static void AddNodeIDNode(FoldingSetNodeID &ID, 348 unsigned short OpC, SDVTList VTList, 349 const SDValue *OpList, unsigned N) { 350 AddNodeIDOpcode(ID, OpC); 351 AddNodeIDValueTypes(ID, VTList); 352 AddNodeIDOperands(ID, OpList, N); 353} 354 355/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 356/// the NodeID data. 357static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 358 switch (N->getOpcode()) { 359 case ISD::TargetExternalSymbol: 360 case ISD::ExternalSymbol: 361 llvm_unreachable("Should only be used on nodes with operands"); 362 default: break; // Normal nodes don't need extra info. 363 case ISD::TargetConstant: 364 case ISD::Constant: 365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 366 break; 367 case ISD::TargetConstantFP: 368 case ISD::ConstantFP: { 369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 370 break; 371 } 372 case ISD::TargetGlobalAddress: 373 case ISD::GlobalAddress: 374 case ISD::TargetGlobalTLSAddress: 375 case ISD::GlobalTLSAddress: { 376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 377 ID.AddPointer(GA->getGlobal()); 378 ID.AddInteger(GA->getOffset()); 379 ID.AddInteger(GA->getTargetFlags()); 380 break; 381 } 382 case ISD::BasicBlock: 383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 384 break; 385 case ISD::Register: 386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 387 break; 388 389 case ISD::SRCVALUE: 390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 391 break; 392 case ISD::FrameIndex: 393 case ISD::TargetFrameIndex: 394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 395 break; 396 case ISD::JumpTable: 397 case ISD::TargetJumpTable: 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 400 break; 401 case ISD::ConstantPool: 402 case ISD::TargetConstantPool: { 403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 404 ID.AddInteger(CP->getAlignment()); 405 ID.AddInteger(CP->getOffset()); 406 if (CP->isMachineConstantPoolEntry()) 407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 408 else 409 ID.AddPointer(CP->getConstVal()); 410 ID.AddInteger(CP->getTargetFlags()); 411 break; 412 } 413 case ISD::LOAD: { 414 const LoadSDNode *LD = cast<LoadSDNode>(N); 415 ID.AddInteger(LD->getMemoryVT().getRawBits()); 416 ID.AddInteger(LD->getRawSubclassData()); 417 break; 418 } 419 case ISD::STORE: { 420 const StoreSDNode *ST = cast<StoreSDNode>(N); 421 ID.AddInteger(ST->getMemoryVT().getRawBits()); 422 ID.AddInteger(ST->getRawSubclassData()); 423 break; 424 } 425 case ISD::ATOMIC_CMP_SWAP: 426 case ISD::ATOMIC_SWAP: 427 case ISD::ATOMIC_LOAD_ADD: 428 case ISD::ATOMIC_LOAD_SUB: 429 case ISD::ATOMIC_LOAD_AND: 430 case ISD::ATOMIC_LOAD_OR: 431 case ISD::ATOMIC_LOAD_XOR: 432 case ISD::ATOMIC_LOAD_NAND: 433 case ISD::ATOMIC_LOAD_MIN: 434 case ISD::ATOMIC_LOAD_MAX: 435 case ISD::ATOMIC_LOAD_UMIN: 436 case ISD::ATOMIC_LOAD_UMAX: { 437 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 438 ID.AddInteger(AT->getMemoryVT().getRawBits()); 439 ID.AddInteger(AT->getRawSubclassData()); 440 break; 441 } 442 case ISD::VECTOR_SHUFFLE: { 443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 445 i != e; ++i) 446 ID.AddInteger(SVN->getMaskElt(i)); 447 break; 448 } 449 case ISD::TargetBlockAddress: 450 case ISD::BlockAddress: { 451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 453 break; 454 } 455 } // end switch (N->getOpcode()) 456} 457 458/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 459/// data. 460static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 461 AddNodeIDOpcode(ID, N->getOpcode()); 462 // Add the return value info. 463 AddNodeIDValueTypes(ID, N->getVTList()); 464 // Add the operand info. 465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 466 467 // Handle SDNode leafs with special info. 468 AddNodeIDCustom(ID, N); 469} 470 471/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 472/// the CSE map that carries volatility, temporalness, indexing mode, and 473/// extension/truncation information. 474/// 475static inline unsigned 476encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 477 bool isNonTemporal) { 478 assert((ConvType & 3) == ConvType && 479 "ConvType may not require more than 2 bits!"); 480 assert((AM & 7) == AM && 481 "AM may not require more than 3 bits!"); 482 return ConvType | 483 (AM << 2) | 484 (isVolatile << 5) | 485 (isNonTemporal << 6); 486} 487 488//===----------------------------------------------------------------------===// 489// SelectionDAG Class 490//===----------------------------------------------------------------------===// 491 492/// doNotCSE - Return true if CSE should not be performed for this node. 493static bool doNotCSE(SDNode *N) { 494 if (N->getValueType(0) == MVT::Flag) 495 return true; // Never CSE anything that produces a flag. 496 497 switch (N->getOpcode()) { 498 default: break; 499 case ISD::HANDLENODE: 500 case ISD::EH_LABEL: 501 return true; // Never CSE these nodes. 502 } 503 504 // Check that remaining values produced are not flags. 505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 506 if (N->getValueType(i) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 return false; 510} 511 512/// RemoveDeadNodes - This method deletes all unreachable nodes in the 513/// SelectionDAG. 514void SelectionDAG::RemoveDeadNodes() { 515 // Create a dummy node (which is not added to allnodes), that adds a reference 516 // to the root node, preventing it from being deleted. 517 HandleSDNode Dummy(getRoot()); 518 519 SmallVector<SDNode*, 128> DeadNodes; 520 521 // Add all obviously-dead nodes to the DeadNodes worklist. 522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 523 if (I->use_empty()) 524 DeadNodes.push_back(I); 525 526 RemoveDeadNodes(DeadNodes); 527 528 // If the root changed (e.g. it was a dead load, update the root). 529 setRoot(Dummy.getValue()); 530} 531 532/// RemoveDeadNodes - This method deletes the unreachable nodes in the 533/// given list, and any nodes that become unreachable as a result. 534void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 535 DAGUpdateListener *UpdateListener) { 536 537 // Process the worklist, deleting the nodes and adding their uses to the 538 // worklist. 539 while (!DeadNodes.empty()) { 540 SDNode *N = DeadNodes.pop_back_val(); 541 542 if (UpdateListener) 543 UpdateListener->NodeDeleted(N, 0); 544 545 // Take the node out of the appropriate CSE map. 546 RemoveNodeFromCSEMaps(N); 547 548 // Next, brutally remove the operand list. This is safe to do, as there are 549 // no cycles in the graph. 550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 551 SDUse &Use = *I++; 552 SDNode *Operand = Use.getNode(); 553 Use.set(SDValue()); 554 555 // Now that we removed this operand, see if there are no uses of it left. 556 if (Operand->use_empty()) 557 DeadNodes.push_back(Operand); 558 } 559 560 DeallocateNode(N); 561 } 562} 563 564void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 565 SmallVector<SDNode*, 16> DeadNodes(1, N); 566 RemoveDeadNodes(DeadNodes, UpdateListener); 567} 568 569void SelectionDAG::DeleteNode(SDNode *N) { 570 // First take this out of the appropriate CSE map. 571 RemoveNodeFromCSEMaps(N); 572 573 // Finally, remove uses due to operands of this node, remove from the 574 // AllNodes list, and delete the node. 575 DeleteNodeNotInCSEMaps(N); 576} 577 578void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 579 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 580 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 581 582 // Drop all of the operands and decrement used node's use counts. 583 N->DropOperands(); 584 585 DeallocateNode(N); 586} 587 588void SelectionDAG::DeallocateNode(SDNode *N) { 589 if (N->OperandsNeedDelete) 590 delete[] N->OperandList; 591 592 // Set the opcode to DELETED_NODE to help catch bugs when node 593 // memory is reallocated. 594 N->NodeType = ISD::DELETED_NODE; 595 596 NodeAllocator.Deallocate(AllNodes.remove(N)); 597 598 // Remove the ordering of this node. 599 Ordering->remove(N); 600 601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 604 DbgVals[i]->setIsInvalidated(); 605} 606 607/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 608/// correspond to it. This is useful when we're about to delete or repurpose 609/// the node. We don't want future request for structurally identical nodes 610/// to return N anymore. 611bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 612 bool Erased = false; 613 switch (N->getOpcode()) { 614 case ISD::EntryToken: 615 llvm_unreachable("EntryToken should not be in CSEMaps!"); 616 return false; 617 case ISD::HANDLENODE: return false; // noop. 618 case ISD::CONDCODE: 619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 620 "Cond code doesn't exist!"); 621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 623 break; 624 case ISD::ExternalSymbol: 625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 626 break; 627 case ISD::TargetExternalSymbol: { 628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 629 Erased = TargetExternalSymbols.erase( 630 std::pair<std::string,unsigned char>(ESN->getSymbol(), 631 ESN->getTargetFlags())); 632 break; 633 } 634 case ISD::VALUETYPE: { 635 EVT VT = cast<VTSDNode>(N)->getVT(); 636 if (VT.isExtended()) { 637 Erased = ExtendedValueTypeNodes.erase(VT); 638 } else { 639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 641 } 642 break; 643 } 644 default: 645 // Remove it from the CSE Map. 646 Erased = CSEMap.RemoveNode(N); 647 break; 648 } 649#ifndef NDEBUG 650 // Verify that the node was actually in one of the CSE maps, unless it has a 651 // flag result (which cannot be CSE'd) or is one of the special cases that are 652 // not subject to CSE. 653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 654 !N->isMachineOpcode() && !doNotCSE(N)) { 655 N->dump(this); 656 dbgs() << "\n"; 657 llvm_unreachable("Node is not in map!"); 658 } 659#endif 660 return Erased; 661} 662 663/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 664/// maps and modified in place. Add it back to the CSE maps, unless an identical 665/// node already exists, in which case transfer all its users to the existing 666/// node. This transfer can potentially trigger recursive merging. 667/// 668void 669SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 670 DAGUpdateListener *UpdateListener) { 671 // For node types that aren't CSE'd, just act as if no identical node 672 // already exists. 673 if (!doNotCSE(N)) { 674 SDNode *Existing = CSEMap.GetOrInsertNode(N); 675 if (Existing != N) { 676 // If there was already an existing matching node, use ReplaceAllUsesWith 677 // to replace the dead one with the existing one. This can cause 678 // recursive merging of other unrelated nodes down the line. 679 ReplaceAllUsesWith(N, Existing, UpdateListener); 680 681 // N is now dead. Inform the listener if it exists and delete it. 682 if (UpdateListener) 683 UpdateListener->NodeDeleted(N, Existing); 684 DeleteNodeNotInCSEMaps(N); 685 return; 686 } 687 } 688 689 // If the node doesn't already exist, we updated it. Inform a listener if 690 // it exists. 691 if (UpdateListener) 692 UpdateListener->NodeUpdated(N); 693} 694 695/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 696/// were replaced with those specified. If this node is never memoized, 697/// return null, otherwise return a pointer to the slot it would take. If a 698/// node already exists with these operands, the slot will be non-null. 699SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 700 void *&InsertPos) { 701 if (doNotCSE(N)) 702 return 0; 703 704 SDValue Ops[] = { Op }; 705 FoldingSetNodeID ID; 706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 707 AddNodeIDCustom(ID, N); 708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 709 return Node; 710} 711 712/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 713/// were replaced with those specified. If this node is never memoized, 714/// return null, otherwise return a pointer to the slot it would take. If a 715/// node already exists with these operands, the slot will be non-null. 716SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 717 SDValue Op1, SDValue Op2, 718 void *&InsertPos) { 719 if (doNotCSE(N)) 720 return 0; 721 722 SDValue Ops[] = { Op1, Op2 }; 723 FoldingSetNodeID ID; 724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 725 AddNodeIDCustom(ID, N); 726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 727 return Node; 728} 729 730 731/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 732/// were replaced with those specified. If this node is never memoized, 733/// return null, otherwise return a pointer to the slot it would take. If a 734/// node already exists with these operands, the slot will be non-null. 735SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 736 const SDValue *Ops,unsigned NumOps, 737 void *&InsertPos) { 738 if (doNotCSE(N)) 739 return 0; 740 741 FoldingSetNodeID ID; 742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 743 AddNodeIDCustom(ID, N); 744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 745 return Node; 746} 747 748/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 749void SelectionDAG::VerifyNode(SDNode *N) { 750 switch (N->getOpcode()) { 751 default: 752 break; 753 case ISD::BUILD_PAIR: { 754 EVT VT = N->getValueType(0); 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 757 "Wrong return type!"); 758 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 760 "Mismatched operand types!"); 761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 762 "Wrong operand type!"); 763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 764 "Wrong return type size"); 765 break; 766 } 767 case ISD::BUILD_VECTOR: { 768 assert(N->getNumValues() == 1 && "Too many results!"); 769 assert(N->getValueType(0).isVector() && "Wrong return type!"); 770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 771 "Wrong number of operands!"); 772 EVT EltVT = N->getValueType(0).getVectorElementType(); 773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 774 assert((I->getValueType() == EltVT || 775 (EltVT.isInteger() && I->getValueType().isInteger() && 776 EltVT.bitsLE(I->getValueType()))) && 777 "Wrong operand type!"); 778 break; 779 } 780 } 781} 782 783/// getEVTAlignment - Compute the default alignment value for the 784/// given type. 785/// 786unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 787 const Type *Ty = VT == MVT::iPTR ? 788 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 789 VT.getTypeForEVT(*getContext()); 790 791 return TLI.getTargetData()->getABITypeAlignment(Ty); 792} 793 794// EntryNode could meaningfully have debug info if we can find it... 795SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 796 : TLI(tli), FLI(fli), 797 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 798 Root(getEntryNode()), Ordering(0) { 799 AllNodes.push_back(&EntryNode); 800 Ordering = new SDNodeOrdering(); 801 DbgInfo = new SDDbgInfo(); 802} 803 804void SelectionDAG::init(MachineFunction &mf) { 805 MF = &mf; 806 Context = &mf.getFunction()->getContext(); 807} 808 809SelectionDAG::~SelectionDAG() { 810 allnodes_clear(); 811 delete Ordering; 812 DbgInfo->clear(); 813 delete DbgInfo; 814} 815 816void SelectionDAG::allnodes_clear() { 817 assert(&*AllNodes.begin() == &EntryNode); 818 AllNodes.remove(AllNodes.begin()); 819 while (!AllNodes.empty()) 820 DeallocateNode(AllNodes.begin()); 821} 822 823void SelectionDAG::clear() { 824 allnodes_clear(); 825 OperandAllocator.Reset(); 826 CSEMap.clear(); 827 828 ExtendedValueTypeNodes.clear(); 829 ExternalSymbols.clear(); 830 TargetExternalSymbols.clear(); 831 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 832 static_cast<CondCodeSDNode*>(0)); 833 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 834 static_cast<SDNode*>(0)); 835 836 EntryNode.UseList = 0; 837 AllNodes.push_back(&EntryNode); 838 Root = getEntryNode(); 839 delete Ordering; 840 Ordering = new SDNodeOrdering(); 841 DbgInfo->clear(); 842 delete DbgInfo; 843 DbgInfo = new SDDbgInfo(); 844} 845 846SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 847 return VT.bitsGT(Op.getValueType()) ? 848 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 849 getNode(ISD::TRUNCATE, DL, VT, Op); 850} 851 852SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 853 return VT.bitsGT(Op.getValueType()) ? 854 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 855 getNode(ISD::TRUNCATE, DL, VT, Op); 856} 857 858SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 859 assert(!VT.isVector() && 860 "getZeroExtendInReg should use the vector element type instead of " 861 "the vector type!"); 862 if (Op.getValueType() == VT) return Op; 863 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 864 APInt Imm = APInt::getLowBitsSet(BitWidth, 865 VT.getSizeInBits()); 866 return getNode(ISD::AND, DL, Op.getValueType(), Op, 867 getConstant(Imm, Op.getValueType())); 868} 869 870/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 871/// 872SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 873 EVT EltVT = VT.getScalarType(); 874 SDValue NegOne = 875 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 876 return getNode(ISD::XOR, DL, VT, Val, NegOne); 877} 878 879SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 880 EVT EltVT = VT.getScalarType(); 881 assert((EltVT.getSizeInBits() >= 64 || 882 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 883 "getConstant with a uint64_t value that doesn't fit in the type!"); 884 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 885} 886 887SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 888 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 889} 890 891SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 892 assert(VT.isInteger() && "Cannot create FP integer constant!"); 893 894 EVT EltVT = VT.getScalarType(); 895 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 896 "APInt size does not match type size!"); 897 898 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 899 FoldingSetNodeID ID; 900 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 901 ID.AddPointer(&Val); 902 void *IP = 0; 903 SDNode *N = NULL; 904 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 905 if (!VT.isVector()) 906 return SDValue(N, 0); 907 908 if (!N) { 909 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 910 CSEMap.InsertNode(N, IP); 911 AllNodes.push_back(N); 912 } 913 914 SDValue Result(N, 0); 915 if (VT.isVector()) { 916 SmallVector<SDValue, 8> Ops; 917 Ops.assign(VT.getVectorNumElements(), Result); 918 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 919 } 920 return Result; 921} 922 923SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 924 return getConstant(Val, TLI.getPointerTy(), isTarget); 925} 926 927 928SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 929 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 930} 931 932SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 933 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 934 935 EVT EltVT = VT.getScalarType(); 936 937 // Do the map lookup using the actual bit pattern for the floating point 938 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 939 // we don't have issues with SNANs. 940 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 941 FoldingSetNodeID ID; 942 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 943 ID.AddPointer(&V); 944 void *IP = 0; 945 SDNode *N = NULL; 946 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 947 if (!VT.isVector()) 948 return SDValue(N, 0); 949 950 if (!N) { 951 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 952 CSEMap.InsertNode(N, IP); 953 AllNodes.push_back(N); 954 } 955 956 SDValue Result(N, 0); 957 if (VT.isVector()) { 958 SmallVector<SDValue, 8> Ops; 959 Ops.assign(VT.getVectorNumElements(), Result); 960 // FIXME DebugLoc info might be appropriate here 961 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 962 } 963 return Result; 964} 965 966SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 967 EVT EltVT = VT.getScalarType(); 968 if (EltVT==MVT::f32) 969 return getConstantFP(APFloat((float)Val), VT, isTarget); 970 else 971 return getConstantFP(APFloat(Val), VT, isTarget); 972} 973 974SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 975 EVT VT, int64_t Offset, 976 bool isTargetGA, 977 unsigned char TargetFlags) { 978 assert((TargetFlags == 0 || isTargetGA) && 979 "Cannot set target flags on target-independent globals"); 980 981 // Truncate (with sign-extension) the offset value to the pointer size. 982 EVT PTy = TLI.getPointerTy(); 983 unsigned BitWidth = PTy.getSizeInBits(); 984 if (BitWidth < 64) 985 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 986 987 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 988 if (!GVar) { 989 // If GV is an alias then use the aliasee for determining thread-localness. 990 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 991 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 992 } 993 994 unsigned Opc; 995 if (GVar && GVar->isThreadLocal()) 996 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 997 else 998 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 999 1000 FoldingSetNodeID ID; 1001 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1002 ID.AddPointer(GV); 1003 ID.AddInteger(Offset); 1004 ID.AddInteger(TargetFlags); 1005 void *IP = 0; 1006 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1007 return SDValue(E, 0); 1008 1009 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1010 Offset, TargetFlags); 1011 CSEMap.InsertNode(N, IP); 1012 AllNodes.push_back(N); 1013 return SDValue(N, 0); 1014} 1015 1016SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1017 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1018 FoldingSetNodeID ID; 1019 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1020 ID.AddInteger(FI); 1021 void *IP = 0; 1022 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1023 return SDValue(E, 0); 1024 1025 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1026 CSEMap.InsertNode(N, IP); 1027 AllNodes.push_back(N); 1028 return SDValue(N, 0); 1029} 1030 1031SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1032 unsigned char TargetFlags) { 1033 assert((TargetFlags == 0 || isTarget) && 1034 "Cannot set target flags on target-independent jump tables"); 1035 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1036 FoldingSetNodeID ID; 1037 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1038 ID.AddInteger(JTI); 1039 ID.AddInteger(TargetFlags); 1040 void *IP = 0; 1041 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1042 return SDValue(E, 0); 1043 1044 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1045 TargetFlags); 1046 CSEMap.InsertNode(N, IP); 1047 AllNodes.push_back(N); 1048 return SDValue(N, 0); 1049} 1050 1051SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1052 unsigned Alignment, int Offset, 1053 bool isTarget, 1054 unsigned char TargetFlags) { 1055 assert((TargetFlags == 0 || isTarget) && 1056 "Cannot set target flags on target-independent globals"); 1057 if (Alignment == 0) 1058 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1059 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1060 FoldingSetNodeID ID; 1061 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1062 ID.AddInteger(Alignment); 1063 ID.AddInteger(Offset); 1064 ID.AddPointer(C); 1065 ID.AddInteger(TargetFlags); 1066 void *IP = 0; 1067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1068 return SDValue(E, 0); 1069 1070 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1071 Alignment, TargetFlags); 1072 CSEMap.InsertNode(N, IP); 1073 AllNodes.push_back(N); 1074 return SDValue(N, 0); 1075} 1076 1077 1078SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1079 unsigned Alignment, int Offset, 1080 bool isTarget, 1081 unsigned char TargetFlags) { 1082 assert((TargetFlags == 0 || isTarget) && 1083 "Cannot set target flags on target-independent globals"); 1084 if (Alignment == 0) 1085 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1086 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1087 FoldingSetNodeID ID; 1088 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1089 ID.AddInteger(Alignment); 1090 ID.AddInteger(Offset); 1091 C->AddSelectionDAGCSEId(ID); 1092 ID.AddInteger(TargetFlags); 1093 void *IP = 0; 1094 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1095 return SDValue(E, 0); 1096 1097 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1098 Alignment, TargetFlags); 1099 CSEMap.InsertNode(N, IP); 1100 AllNodes.push_back(N); 1101 return SDValue(N, 0); 1102} 1103 1104SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1105 FoldingSetNodeID ID; 1106 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1107 ID.AddPointer(MBB); 1108 void *IP = 0; 1109 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1110 return SDValue(E, 0); 1111 1112 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1113 CSEMap.InsertNode(N, IP); 1114 AllNodes.push_back(N); 1115 return SDValue(N, 0); 1116} 1117 1118SDValue SelectionDAG::getValueType(EVT VT) { 1119 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1120 ValueTypeNodes.size()) 1121 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1122 1123 SDNode *&N = VT.isExtended() ? 1124 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1125 1126 if (N) return SDValue(N, 0); 1127 N = new (NodeAllocator) VTSDNode(VT); 1128 AllNodes.push_back(N); 1129 return SDValue(N, 0); 1130} 1131 1132SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1133 SDNode *&N = ExternalSymbols[Sym]; 1134 if (N) return SDValue(N, 0); 1135 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1136 AllNodes.push_back(N); 1137 return SDValue(N, 0); 1138} 1139 1140SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1141 unsigned char TargetFlags) { 1142 SDNode *&N = 1143 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1144 TargetFlags)]; 1145 if (N) return SDValue(N, 0); 1146 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1147 AllNodes.push_back(N); 1148 return SDValue(N, 0); 1149} 1150 1151SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1152 if ((unsigned)Cond >= CondCodeNodes.size()) 1153 CondCodeNodes.resize(Cond+1); 1154 1155 if (CondCodeNodes[Cond] == 0) { 1156 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1157 CondCodeNodes[Cond] = N; 1158 AllNodes.push_back(N); 1159 } 1160 1161 return SDValue(CondCodeNodes[Cond], 0); 1162} 1163 1164// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1165// the shuffle mask M that point at N1 to point at N2, and indices that point 1166// N2 to point at N1. 1167static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1168 std::swap(N1, N2); 1169 int NElts = M.size(); 1170 for (int i = 0; i != NElts; ++i) { 1171 if (M[i] >= NElts) 1172 M[i] -= NElts; 1173 else if (M[i] >= 0) 1174 M[i] += NElts; 1175 } 1176} 1177 1178SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1179 SDValue N2, const int *Mask) { 1180 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1181 assert(VT.isVector() && N1.getValueType().isVector() && 1182 "Vector Shuffle VTs must be a vectors"); 1183 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1184 && "Vector Shuffle VTs must have same element type"); 1185 1186 // Canonicalize shuffle undef, undef -> undef 1187 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1188 return getUNDEF(VT); 1189 1190 // Validate that all indices in Mask are within the range of the elements 1191 // input to the shuffle. 1192 unsigned NElts = VT.getVectorNumElements(); 1193 SmallVector<int, 8> MaskVec; 1194 for (unsigned i = 0; i != NElts; ++i) { 1195 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1196 MaskVec.push_back(Mask[i]); 1197 } 1198 1199 // Canonicalize shuffle v, v -> v, undef 1200 if (N1 == N2) { 1201 N2 = getUNDEF(VT); 1202 for (unsigned i = 0; i != NElts; ++i) 1203 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1204 } 1205 1206 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1207 if (N1.getOpcode() == ISD::UNDEF) 1208 commuteShuffle(N1, N2, MaskVec); 1209 1210 // Canonicalize all index into lhs, -> shuffle lhs, undef 1211 // Canonicalize all index into rhs, -> shuffle rhs, undef 1212 bool AllLHS = true, AllRHS = true; 1213 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1214 for (unsigned i = 0; i != NElts; ++i) { 1215 if (MaskVec[i] >= (int)NElts) { 1216 if (N2Undef) 1217 MaskVec[i] = -1; 1218 else 1219 AllLHS = false; 1220 } else if (MaskVec[i] >= 0) { 1221 AllRHS = false; 1222 } 1223 } 1224 if (AllLHS && AllRHS) 1225 return getUNDEF(VT); 1226 if (AllLHS && !N2Undef) 1227 N2 = getUNDEF(VT); 1228 if (AllRHS) { 1229 N1 = getUNDEF(VT); 1230 commuteShuffle(N1, N2, MaskVec); 1231 } 1232 1233 // If Identity shuffle, or all shuffle in to undef, return that node. 1234 bool AllUndef = true; 1235 bool Identity = true; 1236 for (unsigned i = 0; i != NElts; ++i) { 1237 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1238 if (MaskVec[i] >= 0) AllUndef = false; 1239 } 1240 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1241 return N1; 1242 if (AllUndef) 1243 return getUNDEF(VT); 1244 1245 FoldingSetNodeID ID; 1246 SDValue Ops[2] = { N1, N2 }; 1247 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1248 for (unsigned i = 0; i != NElts; ++i) 1249 ID.AddInteger(MaskVec[i]); 1250 1251 void* IP = 0; 1252 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1253 return SDValue(E, 0); 1254 1255 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1256 // SDNode doesn't have access to it. This memory will be "leaked" when 1257 // the node is deallocated, but recovered when the NodeAllocator is released. 1258 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1259 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1260 1261 ShuffleVectorSDNode *N = 1262 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1263 CSEMap.InsertNode(N, IP); 1264 AllNodes.push_back(N); 1265 return SDValue(N, 0); 1266} 1267 1268SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1269 SDValue Val, SDValue DTy, 1270 SDValue STy, SDValue Rnd, SDValue Sat, 1271 ISD::CvtCode Code) { 1272 // If the src and dest types are the same and the conversion is between 1273 // integer types of the same sign or two floats, no conversion is necessary. 1274 if (DTy == STy && 1275 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1276 return Val; 1277 1278 FoldingSetNodeID ID; 1279 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1280 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1281 void* IP = 0; 1282 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1283 return SDValue(E, 0); 1284 1285 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1286 Code); 1287 CSEMap.InsertNode(N, IP); 1288 AllNodes.push_back(N); 1289 return SDValue(N, 0); 1290} 1291 1292SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1293 FoldingSetNodeID ID; 1294 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1295 ID.AddInteger(RegNo); 1296 void *IP = 0; 1297 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1298 return SDValue(E, 0); 1299 1300 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1301 CSEMap.InsertNode(N, IP); 1302 AllNodes.push_back(N); 1303 return SDValue(N, 0); 1304} 1305 1306SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1307 FoldingSetNodeID ID; 1308 SDValue Ops[] = { Root }; 1309 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1310 ID.AddPointer(Label); 1311 void *IP = 0; 1312 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1313 return SDValue(E, 0); 1314 1315 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1316 CSEMap.InsertNode(N, IP); 1317 AllNodes.push_back(N); 1318 return SDValue(N, 0); 1319} 1320 1321 1322SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1323 bool isTarget, 1324 unsigned char TargetFlags) { 1325 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1326 1327 FoldingSetNodeID ID; 1328 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1329 ID.AddPointer(BA); 1330 ID.AddInteger(TargetFlags); 1331 void *IP = 0; 1332 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1333 return SDValue(E, 0); 1334 1335 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1336 CSEMap.InsertNode(N, IP); 1337 AllNodes.push_back(N); 1338 return SDValue(N, 0); 1339} 1340 1341SDValue SelectionDAG::getSrcValue(const Value *V) { 1342 assert((!V || V->getType()->isPointerTy()) && 1343 "SrcValue is not a pointer?"); 1344 1345 FoldingSetNodeID ID; 1346 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1347 ID.AddPointer(V); 1348 1349 void *IP = 0; 1350 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1351 return SDValue(E, 0); 1352 1353 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1354 CSEMap.InsertNode(N, IP); 1355 AllNodes.push_back(N); 1356 return SDValue(N, 0); 1357} 1358 1359/// getShiftAmountOperand - Return the specified value casted to 1360/// the target's desired shift amount type. 1361SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1362 EVT OpTy = Op.getValueType(); 1363 MVT ShTy = TLI.getShiftAmountTy(); 1364 if (OpTy == ShTy || OpTy.isVector()) return Op; 1365 1366 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1367 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1368} 1369 1370/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1371/// specified value type. 1372SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1373 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1374 unsigned ByteSize = VT.getStoreSize(); 1375 const Type *Ty = VT.getTypeForEVT(*getContext()); 1376 unsigned StackAlign = 1377 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1378 1379 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1380 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1381} 1382 1383/// CreateStackTemporary - Create a stack temporary suitable for holding 1384/// either of the specified value types. 1385SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1386 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1387 VT2.getStoreSizeInBits())/8; 1388 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1389 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1390 const TargetData *TD = TLI.getTargetData(); 1391 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1392 TD->getPrefTypeAlignment(Ty2)); 1393 1394 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1395 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1396 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1397} 1398 1399SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1400 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1401 // These setcc operations always fold. 1402 switch (Cond) { 1403 default: break; 1404 case ISD::SETFALSE: 1405 case ISD::SETFALSE2: return getConstant(0, VT); 1406 case ISD::SETTRUE: 1407 case ISD::SETTRUE2: return getConstant(1, VT); 1408 1409 case ISD::SETOEQ: 1410 case ISD::SETOGT: 1411 case ISD::SETOGE: 1412 case ISD::SETOLT: 1413 case ISD::SETOLE: 1414 case ISD::SETONE: 1415 case ISD::SETO: 1416 case ISD::SETUO: 1417 case ISD::SETUEQ: 1418 case ISD::SETUNE: 1419 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1420 break; 1421 } 1422 1423 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1424 const APInt &C2 = N2C->getAPIntValue(); 1425 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1426 const APInt &C1 = N1C->getAPIntValue(); 1427 1428 switch (Cond) { 1429 default: llvm_unreachable("Unknown integer setcc!"); 1430 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1431 case ISD::SETNE: return getConstant(C1 != C2, VT); 1432 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1433 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1434 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1435 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1436 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1437 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1438 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1439 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1440 } 1441 } 1442 } 1443 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1444 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1445 // No compile time operations on this type yet. 1446 if (N1C->getValueType(0) == MVT::ppcf128) 1447 return SDValue(); 1448 1449 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1450 switch (Cond) { 1451 default: break; 1452 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1453 return getUNDEF(VT); 1454 // fall through 1455 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1456 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1457 return getUNDEF(VT); 1458 // fall through 1459 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1460 R==APFloat::cmpLessThan, VT); 1461 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1462 return getUNDEF(VT); 1463 // fall through 1464 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1465 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1466 return getUNDEF(VT); 1467 // fall through 1468 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1469 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1470 return getUNDEF(VT); 1471 // fall through 1472 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1473 R==APFloat::cmpEqual, VT); 1474 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1475 return getUNDEF(VT); 1476 // fall through 1477 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1478 R==APFloat::cmpEqual, VT); 1479 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1480 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1481 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1482 R==APFloat::cmpEqual, VT); 1483 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1484 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1485 R==APFloat::cmpLessThan, VT); 1486 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1487 R==APFloat::cmpUnordered, VT); 1488 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1489 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1490 } 1491 } else { 1492 // Ensure that the constant occurs on the RHS. 1493 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1494 } 1495 } 1496 1497 // Could not fold it. 1498 return SDValue(); 1499} 1500 1501/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1502/// use this predicate to simplify operations downstream. 1503bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1504 // This predicate is not safe for vector operations. 1505 if (Op.getValueType().isVector()) 1506 return false; 1507 1508 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1509 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1510} 1511 1512/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1513/// this predicate to simplify operations downstream. Mask is known to be zero 1514/// for bits that V cannot have. 1515bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1516 unsigned Depth) const { 1517 APInt KnownZero, KnownOne; 1518 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1519 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1520 return (KnownZero & Mask) == Mask; 1521} 1522 1523/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1524/// known to be either zero or one and return them in the KnownZero/KnownOne 1525/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1526/// processing. 1527void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1528 APInt &KnownZero, APInt &KnownOne, 1529 unsigned Depth) const { 1530 unsigned BitWidth = Mask.getBitWidth(); 1531 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1532 "Mask size mismatches value type size!"); 1533 1534 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1535 if (Depth == 6 || Mask == 0) 1536 return; // Limit search depth. 1537 1538 APInt KnownZero2, KnownOne2; 1539 1540 switch (Op.getOpcode()) { 1541 case ISD::Constant: 1542 // We know all of the bits for a constant! 1543 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1544 KnownZero = ~KnownOne & Mask; 1545 return; 1546 case ISD::AND: 1547 // If either the LHS or the RHS are Zero, the result is zero. 1548 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1549 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1550 KnownZero2, KnownOne2, Depth+1); 1551 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1552 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1553 1554 // Output known-1 bits are only known if set in both the LHS & RHS. 1555 KnownOne &= KnownOne2; 1556 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1557 KnownZero |= KnownZero2; 1558 return; 1559 case ISD::OR: 1560 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1561 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1562 KnownZero2, KnownOne2, Depth+1); 1563 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1564 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1565 1566 // Output known-0 bits are only known if clear in both the LHS & RHS. 1567 KnownZero &= KnownZero2; 1568 // Output known-1 are known to be set if set in either the LHS | RHS. 1569 KnownOne |= KnownOne2; 1570 return; 1571 case ISD::XOR: { 1572 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1573 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1574 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1575 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1576 1577 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1578 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1579 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1580 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1581 KnownZero = KnownZeroOut; 1582 return; 1583 } 1584 case ISD::MUL: { 1585 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1586 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1587 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1588 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1589 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1590 1591 // If low bits are zero in either operand, output low known-0 bits. 1592 // Also compute a conserative estimate for high known-0 bits. 1593 // More trickiness is possible, but this is sufficient for the 1594 // interesting case of alignment computation. 1595 KnownOne.clear(); 1596 unsigned TrailZ = KnownZero.countTrailingOnes() + 1597 KnownZero2.countTrailingOnes(); 1598 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1599 KnownZero2.countLeadingOnes(), 1600 BitWidth) - BitWidth; 1601 1602 TrailZ = std::min(TrailZ, BitWidth); 1603 LeadZ = std::min(LeadZ, BitWidth); 1604 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1605 APInt::getHighBitsSet(BitWidth, LeadZ); 1606 KnownZero &= Mask; 1607 return; 1608 } 1609 case ISD::UDIV: { 1610 // For the purposes of computing leading zeros we can conservatively 1611 // treat a udiv as a logical right shift by the power of 2 known to 1612 // be less than the denominator. 1613 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1614 ComputeMaskedBits(Op.getOperand(0), 1615 AllOnes, KnownZero2, KnownOne2, Depth+1); 1616 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1617 1618 KnownOne2.clear(); 1619 KnownZero2.clear(); 1620 ComputeMaskedBits(Op.getOperand(1), 1621 AllOnes, KnownZero2, KnownOne2, Depth+1); 1622 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1623 if (RHSUnknownLeadingOnes != BitWidth) 1624 LeadZ = std::min(BitWidth, 1625 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1626 1627 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1628 return; 1629 } 1630 case ISD::SELECT: 1631 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1632 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1633 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1634 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1635 1636 // Only known if known in both the LHS and RHS. 1637 KnownOne &= KnownOne2; 1638 KnownZero &= KnownZero2; 1639 return; 1640 case ISD::SELECT_CC: 1641 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1642 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1643 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1644 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1645 1646 // Only known if known in both the LHS and RHS. 1647 KnownOne &= KnownOne2; 1648 KnownZero &= KnownZero2; 1649 return; 1650 case ISD::SADDO: 1651 case ISD::UADDO: 1652 case ISD::SSUBO: 1653 case ISD::USUBO: 1654 case ISD::SMULO: 1655 case ISD::UMULO: 1656 if (Op.getResNo() != 1) 1657 return; 1658 // The boolean result conforms to getBooleanContents. Fall through. 1659 case ISD::SETCC: 1660 // If we know the result of a setcc has the top bits zero, use this info. 1661 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1662 BitWidth > 1) 1663 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1664 return; 1665 case ISD::SHL: 1666 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1667 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1668 unsigned ShAmt = SA->getZExtValue(); 1669 1670 // If the shift count is an invalid immediate, don't do anything. 1671 if (ShAmt >= BitWidth) 1672 return; 1673 1674 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1675 KnownZero, KnownOne, Depth+1); 1676 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1677 KnownZero <<= ShAmt; 1678 KnownOne <<= ShAmt; 1679 // low bits known zero. 1680 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1681 } 1682 return; 1683 case ISD::SRL: 1684 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1685 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1686 unsigned ShAmt = SA->getZExtValue(); 1687 1688 // If the shift count is an invalid immediate, don't do anything. 1689 if (ShAmt >= BitWidth) 1690 return; 1691 1692 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1693 KnownZero, KnownOne, Depth+1); 1694 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1695 KnownZero = KnownZero.lshr(ShAmt); 1696 KnownOne = KnownOne.lshr(ShAmt); 1697 1698 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1699 KnownZero |= HighBits; // High bits known zero. 1700 } 1701 return; 1702 case ISD::SRA: 1703 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1704 unsigned ShAmt = SA->getZExtValue(); 1705 1706 // If the shift count is an invalid immediate, don't do anything. 1707 if (ShAmt >= BitWidth) 1708 return; 1709 1710 APInt InDemandedMask = (Mask << ShAmt); 1711 // If any of the demanded bits are produced by the sign extension, we also 1712 // demand the input sign bit. 1713 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1714 if (HighBits.getBoolValue()) 1715 InDemandedMask |= APInt::getSignBit(BitWidth); 1716 1717 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1718 Depth+1); 1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1720 KnownZero = KnownZero.lshr(ShAmt); 1721 KnownOne = KnownOne.lshr(ShAmt); 1722 1723 // Handle the sign bits. 1724 APInt SignBit = APInt::getSignBit(BitWidth); 1725 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1726 1727 if (KnownZero.intersects(SignBit)) { 1728 KnownZero |= HighBits; // New bits are known zero. 1729 } else if (KnownOne.intersects(SignBit)) { 1730 KnownOne |= HighBits; // New bits are known one. 1731 } 1732 } 1733 return; 1734 case ISD::SIGN_EXTEND_INREG: { 1735 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1736 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1737 1738 // Sign extension. Compute the demanded bits in the result that are not 1739 // present in the input. 1740 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1741 1742 APInt InSignBit = APInt::getSignBit(EBits); 1743 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1744 1745 // If the sign extended bits are demanded, we know that the sign 1746 // bit is demanded. 1747 InSignBit.zext(BitWidth); 1748 if (NewBits.getBoolValue()) 1749 InputDemandedBits |= InSignBit; 1750 1751 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1752 KnownZero, KnownOne, Depth+1); 1753 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1754 1755 // If the sign bit of the input is known set or clear, then we know the 1756 // top bits of the result. 1757 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1758 KnownZero |= NewBits; 1759 KnownOne &= ~NewBits; 1760 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1761 KnownOne |= NewBits; 1762 KnownZero &= ~NewBits; 1763 } else { // Input sign bit unknown 1764 KnownZero &= ~NewBits; 1765 KnownOne &= ~NewBits; 1766 } 1767 return; 1768 } 1769 case ISD::CTTZ: 1770 case ISD::CTLZ: 1771 case ISD::CTPOP: { 1772 unsigned LowBits = Log2_32(BitWidth)+1; 1773 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1774 KnownOne.clear(); 1775 return; 1776 } 1777 case ISD::LOAD: { 1778 if (ISD::isZEXTLoad(Op.getNode())) { 1779 LoadSDNode *LD = cast<LoadSDNode>(Op); 1780 EVT VT = LD->getMemoryVT(); 1781 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1782 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1783 } 1784 return; 1785 } 1786 case ISD::ZERO_EXTEND: { 1787 EVT InVT = Op.getOperand(0).getValueType(); 1788 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1789 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1790 APInt InMask = Mask; 1791 InMask.trunc(InBits); 1792 KnownZero.trunc(InBits); 1793 KnownOne.trunc(InBits); 1794 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1795 KnownZero.zext(BitWidth); 1796 KnownOne.zext(BitWidth); 1797 KnownZero |= NewBits; 1798 return; 1799 } 1800 case ISD::SIGN_EXTEND: { 1801 EVT InVT = Op.getOperand(0).getValueType(); 1802 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1803 APInt InSignBit = APInt::getSignBit(InBits); 1804 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1805 APInt InMask = Mask; 1806 InMask.trunc(InBits); 1807 1808 // If any of the sign extended bits are demanded, we know that the sign 1809 // bit is demanded. Temporarily set this bit in the mask for our callee. 1810 if (NewBits.getBoolValue()) 1811 InMask |= InSignBit; 1812 1813 KnownZero.trunc(InBits); 1814 KnownOne.trunc(InBits); 1815 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1816 1817 // Note if the sign bit is known to be zero or one. 1818 bool SignBitKnownZero = KnownZero.isNegative(); 1819 bool SignBitKnownOne = KnownOne.isNegative(); 1820 assert(!(SignBitKnownZero && SignBitKnownOne) && 1821 "Sign bit can't be known to be both zero and one!"); 1822 1823 // If the sign bit wasn't actually demanded by our caller, we don't 1824 // want it set in the KnownZero and KnownOne result values. Reset the 1825 // mask and reapply it to the result values. 1826 InMask = Mask; 1827 InMask.trunc(InBits); 1828 KnownZero &= InMask; 1829 KnownOne &= InMask; 1830 1831 KnownZero.zext(BitWidth); 1832 KnownOne.zext(BitWidth); 1833 1834 // If the sign bit is known zero or one, the top bits match. 1835 if (SignBitKnownZero) 1836 KnownZero |= NewBits; 1837 else if (SignBitKnownOne) 1838 KnownOne |= NewBits; 1839 return; 1840 } 1841 case ISD::ANY_EXTEND: { 1842 EVT InVT = Op.getOperand(0).getValueType(); 1843 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1844 APInt InMask = Mask; 1845 InMask.trunc(InBits); 1846 KnownZero.trunc(InBits); 1847 KnownOne.trunc(InBits); 1848 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1849 KnownZero.zext(BitWidth); 1850 KnownOne.zext(BitWidth); 1851 return; 1852 } 1853 case ISD::TRUNCATE: { 1854 EVT InVT = Op.getOperand(0).getValueType(); 1855 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1856 APInt InMask = Mask; 1857 InMask.zext(InBits); 1858 KnownZero.zext(InBits); 1859 KnownOne.zext(InBits); 1860 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1861 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1862 KnownZero.trunc(BitWidth); 1863 KnownOne.trunc(BitWidth); 1864 break; 1865 } 1866 case ISD::AssertZext: { 1867 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1868 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1869 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1870 KnownOne, Depth+1); 1871 KnownZero |= (~InMask) & Mask; 1872 return; 1873 } 1874 case ISD::FGETSIGN: 1875 // All bits are zero except the low bit. 1876 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1877 return; 1878 1879 case ISD::SUB: { 1880 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1881 // We know that the top bits of C-X are clear if X contains less bits 1882 // than C (i.e. no wrap-around can happen). For example, 20-X is 1883 // positive if we can prove that X is >= 0 and < 16. 1884 if (CLHS->getAPIntValue().isNonNegative()) { 1885 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1886 // NLZ can't be BitWidth with no sign bit 1887 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1888 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1889 Depth+1); 1890 1891 // If all of the MaskV bits are known to be zero, then we know the 1892 // output top bits are zero, because we now know that the output is 1893 // from [0-C]. 1894 if ((KnownZero2 & MaskV) == MaskV) { 1895 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1896 // Top bits known zero. 1897 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1898 } 1899 } 1900 } 1901 } 1902 // fall through 1903 case ISD::ADD: { 1904 // Output known-0 bits are known if clear or set in both the low clear bits 1905 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1906 // low 3 bits clear. 1907 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1908 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1909 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1910 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1911 1912 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1913 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1914 KnownZeroOut = std::min(KnownZeroOut, 1915 KnownZero2.countTrailingOnes()); 1916 1917 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1918 return; 1919 } 1920 case ISD::SREM: 1921 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1922 const APInt &RA = Rem->getAPIntValue().abs(); 1923 if (RA.isPowerOf2()) { 1924 APInt LowBits = RA - 1; 1925 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1926 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1927 1928 // The low bits of the first operand are unchanged by the srem. 1929 KnownZero = KnownZero2 & LowBits; 1930 KnownOne = KnownOne2 & LowBits; 1931 1932 // If the first operand is non-negative or has all low bits zero, then 1933 // the upper bits are all zero. 1934 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1935 KnownZero |= ~LowBits; 1936 1937 // If the first operand is negative and not all low bits are zero, then 1938 // the upper bits are all one. 1939 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1940 KnownOne |= ~LowBits; 1941 1942 KnownZero &= Mask; 1943 KnownOne &= Mask; 1944 1945 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1946 } 1947 } 1948 return; 1949 case ISD::UREM: { 1950 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1951 const APInt &RA = Rem->getAPIntValue(); 1952 if (RA.isPowerOf2()) { 1953 APInt LowBits = (RA - 1); 1954 APInt Mask2 = LowBits & Mask; 1955 KnownZero |= ~LowBits & Mask; 1956 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1957 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1958 break; 1959 } 1960 } 1961 1962 // Since the result is less than or equal to either operand, any leading 1963 // zero bits in either operand must also exist in the result. 1964 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1965 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1966 Depth+1); 1967 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1968 Depth+1); 1969 1970 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1971 KnownZero2.countLeadingOnes()); 1972 KnownOne.clear(); 1973 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1974 return; 1975 } 1976 default: 1977 // Allow the target to implement this method for its nodes. 1978 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1979 case ISD::INTRINSIC_WO_CHAIN: 1980 case ISD::INTRINSIC_W_CHAIN: 1981 case ISD::INTRINSIC_VOID: 1982 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1983 Depth); 1984 } 1985 return; 1986 } 1987} 1988 1989/// ComputeNumSignBits - Return the number of times the sign bit of the 1990/// register is replicated into the other bits. We know that at least 1 bit 1991/// is always equal to the sign bit (itself), but other cases can give us 1992/// information. For example, immediately after an "SRA X, 2", we know that 1993/// the top 3 bits are all equal to each other, so we return 3. 1994unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1995 EVT VT = Op.getValueType(); 1996 assert(VT.isInteger() && "Invalid VT!"); 1997 unsigned VTBits = VT.getScalarType().getSizeInBits(); 1998 unsigned Tmp, Tmp2; 1999 unsigned FirstAnswer = 1; 2000 2001 if (Depth == 6) 2002 return 1; // Limit search depth. 2003 2004 switch (Op.getOpcode()) { 2005 default: break; 2006 case ISD::AssertSext: 2007 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2008 return VTBits-Tmp+1; 2009 case ISD::AssertZext: 2010 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2011 return VTBits-Tmp; 2012 2013 case ISD::Constant: { 2014 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2015 // If negative, return # leading ones. 2016 if (Val.isNegative()) 2017 return Val.countLeadingOnes(); 2018 2019 // Return # leading zeros. 2020 return Val.countLeadingZeros(); 2021 } 2022 2023 case ISD::SIGN_EXTEND: 2024 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2025 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2026 2027 case ISD::SIGN_EXTEND_INREG: 2028 // Max of the input and what this extends. 2029 Tmp = 2030 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2031 Tmp = VTBits-Tmp+1; 2032 2033 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2034 return std::max(Tmp, Tmp2); 2035 2036 case ISD::SRA: 2037 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2038 // SRA X, C -> adds C sign bits. 2039 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2040 Tmp += C->getZExtValue(); 2041 if (Tmp > VTBits) Tmp = VTBits; 2042 } 2043 return Tmp; 2044 case ISD::SHL: 2045 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2046 // shl destroys sign bits. 2047 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2048 if (C->getZExtValue() >= VTBits || // Bad shift. 2049 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2050 return Tmp - C->getZExtValue(); 2051 } 2052 break; 2053 case ISD::AND: 2054 case ISD::OR: 2055 case ISD::XOR: // NOT is handled here. 2056 // Logical binary ops preserve the number of sign bits at the worst. 2057 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2058 if (Tmp != 1) { 2059 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2060 FirstAnswer = std::min(Tmp, Tmp2); 2061 // We computed what we know about the sign bits as our first 2062 // answer. Now proceed to the generic code that uses 2063 // ComputeMaskedBits, and pick whichever answer is better. 2064 } 2065 break; 2066 2067 case ISD::SELECT: 2068 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2069 if (Tmp == 1) return 1; // Early out. 2070 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2071 return std::min(Tmp, Tmp2); 2072 2073 case ISD::SADDO: 2074 case ISD::UADDO: 2075 case ISD::SSUBO: 2076 case ISD::USUBO: 2077 case ISD::SMULO: 2078 case ISD::UMULO: 2079 if (Op.getResNo() != 1) 2080 break; 2081 // The boolean result conforms to getBooleanContents. Fall through. 2082 case ISD::SETCC: 2083 // If setcc returns 0/-1, all bits are sign bits. 2084 if (TLI.getBooleanContents() == 2085 TargetLowering::ZeroOrNegativeOneBooleanContent) 2086 return VTBits; 2087 break; 2088 case ISD::ROTL: 2089 case ISD::ROTR: 2090 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2091 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2092 2093 // Handle rotate right by N like a rotate left by 32-N. 2094 if (Op.getOpcode() == ISD::ROTR) 2095 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2096 2097 // If we aren't rotating out all of the known-in sign bits, return the 2098 // number that are left. This handles rotl(sext(x), 1) for example. 2099 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2100 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2101 } 2102 break; 2103 case ISD::ADD: 2104 // Add can have at most one carry bit. Thus we know that the output 2105 // is, at worst, one more bit than the inputs. 2106 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2107 if (Tmp == 1) return 1; // Early out. 2108 2109 // Special case decrementing a value (ADD X, -1): 2110 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2111 if (CRHS->isAllOnesValue()) { 2112 APInt KnownZero, KnownOne; 2113 APInt Mask = APInt::getAllOnesValue(VTBits); 2114 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2115 2116 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2117 // sign bits set. 2118 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2119 return VTBits; 2120 2121 // If we are subtracting one from a positive number, there is no carry 2122 // out of the result. 2123 if (KnownZero.isNegative()) 2124 return Tmp; 2125 } 2126 2127 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2128 if (Tmp2 == 1) return 1; 2129 return std::min(Tmp, Tmp2)-1; 2130 break; 2131 2132 case ISD::SUB: 2133 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2134 if (Tmp2 == 1) return 1; 2135 2136 // Handle NEG. 2137 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2138 if (CLHS->isNullValue()) { 2139 APInt KnownZero, KnownOne; 2140 APInt Mask = APInt::getAllOnesValue(VTBits); 2141 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2142 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2143 // sign bits set. 2144 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2145 return VTBits; 2146 2147 // If the input is known to be positive (the sign bit is known clear), 2148 // the output of the NEG has the same number of sign bits as the input. 2149 if (KnownZero.isNegative()) 2150 return Tmp2; 2151 2152 // Otherwise, we treat this like a SUB. 2153 } 2154 2155 // Sub can have at most one carry bit. Thus we know that the output 2156 // is, at worst, one more bit than the inputs. 2157 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2158 if (Tmp == 1) return 1; // Early out. 2159 return std::min(Tmp, Tmp2)-1; 2160 break; 2161 case ISD::TRUNCATE: 2162 // FIXME: it's tricky to do anything useful for this, but it is an important 2163 // case for targets like X86. 2164 break; 2165 } 2166 2167 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2168 if (Op.getOpcode() == ISD::LOAD) { 2169 LoadSDNode *LD = cast<LoadSDNode>(Op); 2170 unsigned ExtType = LD->getExtensionType(); 2171 switch (ExtType) { 2172 default: break; 2173 case ISD::SEXTLOAD: // '17' bits known 2174 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2175 return VTBits-Tmp+1; 2176 case ISD::ZEXTLOAD: // '16' bits known 2177 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2178 return VTBits-Tmp; 2179 } 2180 } 2181 2182 // Allow the target to implement this method for its nodes. 2183 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2184 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2185 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2186 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2187 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2188 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2189 } 2190 2191 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2192 // use this information. 2193 APInt KnownZero, KnownOne; 2194 APInt Mask = APInt::getAllOnesValue(VTBits); 2195 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2196 2197 if (KnownZero.isNegative()) { // sign bit is 0 2198 Mask = KnownZero; 2199 } else if (KnownOne.isNegative()) { // sign bit is 1; 2200 Mask = KnownOne; 2201 } else { 2202 // Nothing known. 2203 return FirstAnswer; 2204 } 2205 2206 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2207 // the number of identical bits in the top of the input value. 2208 Mask = ~Mask; 2209 Mask <<= Mask.getBitWidth()-VTBits; 2210 // Return # leading zeros. We use 'min' here in case Val was zero before 2211 // shifting. We don't want to return '64' as for an i32 "0". 2212 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2213} 2214 2215bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2216 // If we're told that NaNs won't happen, assume they won't. 2217 if (FiniteOnlyFPMath()) 2218 return true; 2219 2220 // If the value is a constant, we can obviously see if it is a NaN or not. 2221 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2222 return !C->getValueAPF().isNaN(); 2223 2224 // TODO: Recognize more cases here. 2225 2226 return false; 2227} 2228 2229bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2230 // If the value is a constant, we can obviously see if it is a zero or not. 2231 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2232 return !C->isZero(); 2233 2234 // TODO: Recognize more cases here. 2235 2236 return false; 2237} 2238 2239bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2240 // Check the obvious case. 2241 if (A == B) return true; 2242 2243 // For for negative and positive zero. 2244 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2245 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2246 if (CA->isZero() && CB->isZero()) return true; 2247 2248 // Otherwise they may not be equal. 2249 return false; 2250} 2251 2252bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2253 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2254 if (!GA) return false; 2255 if (GA->getOffset() != 0) return false; 2256 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2257 if (!GV) return false; 2258 return MF->getMMI().hasDebugInfo(); 2259} 2260 2261 2262/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2263/// element of the result of the vector shuffle. 2264SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2265 unsigned i) { 2266 EVT VT = N->getValueType(0); 2267 DebugLoc dl = N->getDebugLoc(); 2268 if (N->getMaskElt(i) < 0) 2269 return getUNDEF(VT.getVectorElementType()); 2270 unsigned Index = N->getMaskElt(i); 2271 unsigned NumElems = VT.getVectorNumElements(); 2272 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2273 Index %= NumElems; 2274 2275 if (V.getOpcode() == ISD::BIT_CONVERT) { 2276 V = V.getOperand(0); 2277 EVT VVT = V.getValueType(); 2278 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2279 return SDValue(); 2280 } 2281 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2282 return (Index == 0) ? V.getOperand(0) 2283 : getUNDEF(VT.getVectorElementType()); 2284 if (V.getOpcode() == ISD::BUILD_VECTOR) 2285 return V.getOperand(Index); 2286 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2287 return getShuffleScalarElt(SVN, Index); 2288 return SDValue(); 2289} 2290 2291 2292/// getNode - Gets or creates the specified node. 2293/// 2294SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2295 FoldingSetNodeID ID; 2296 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2297 void *IP = 0; 2298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2299 return SDValue(E, 0); 2300 2301 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2302 CSEMap.InsertNode(N, IP); 2303 2304 AllNodes.push_back(N); 2305#ifndef NDEBUG 2306 VerifyNode(N); 2307#endif 2308 return SDValue(N, 0); 2309} 2310 2311SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2312 EVT VT, SDValue Operand) { 2313 // Constant fold unary operations with an integer constant operand. 2314 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2315 const APInt &Val = C->getAPIntValue(); 2316 switch (Opcode) { 2317 default: break; 2318 case ISD::SIGN_EXTEND: 2319 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2320 case ISD::ANY_EXTEND: 2321 case ISD::ZERO_EXTEND: 2322 case ISD::TRUNCATE: 2323 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2324 case ISD::UINT_TO_FP: 2325 case ISD::SINT_TO_FP: { 2326 const uint64_t zero[] = {0, 0}; 2327 // No compile time operations on ppcf128. 2328 if (VT == MVT::ppcf128) break; 2329 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2330 (void)apf.convertFromAPInt(Val, 2331 Opcode==ISD::SINT_TO_FP, 2332 APFloat::rmNearestTiesToEven); 2333 return getConstantFP(apf, VT); 2334 } 2335 case ISD::BIT_CONVERT: 2336 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2337 return getConstantFP(Val.bitsToFloat(), VT); 2338 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2339 return getConstantFP(Val.bitsToDouble(), VT); 2340 break; 2341 case ISD::BSWAP: 2342 return getConstant(Val.byteSwap(), VT); 2343 case ISD::CTPOP: 2344 return getConstant(Val.countPopulation(), VT); 2345 case ISD::CTLZ: 2346 return getConstant(Val.countLeadingZeros(), VT); 2347 case ISD::CTTZ: 2348 return getConstant(Val.countTrailingZeros(), VT); 2349 } 2350 } 2351 2352 // Constant fold unary operations with a floating point constant operand. 2353 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2354 APFloat V = C->getValueAPF(); // make copy 2355 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2356 switch (Opcode) { 2357 case ISD::FNEG: 2358 V.changeSign(); 2359 return getConstantFP(V, VT); 2360 case ISD::FABS: 2361 V.clearSign(); 2362 return getConstantFP(V, VT); 2363 case ISD::FP_ROUND: 2364 case ISD::FP_EXTEND: { 2365 bool ignored; 2366 // This can return overflow, underflow, or inexact; we don't care. 2367 // FIXME need to be more flexible about rounding mode. 2368 (void)V.convert(*EVTToAPFloatSemantics(VT), 2369 APFloat::rmNearestTiesToEven, &ignored); 2370 return getConstantFP(V, VT); 2371 } 2372 case ISD::FP_TO_SINT: 2373 case ISD::FP_TO_UINT: { 2374 integerPart x[2]; 2375 bool ignored; 2376 assert(integerPartWidth >= 64); 2377 // FIXME need to be more flexible about rounding mode. 2378 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2379 Opcode==ISD::FP_TO_SINT, 2380 APFloat::rmTowardZero, &ignored); 2381 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2382 break; 2383 APInt api(VT.getSizeInBits(), 2, x); 2384 return getConstant(api, VT); 2385 } 2386 case ISD::BIT_CONVERT: 2387 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2388 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2389 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2390 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2391 break; 2392 } 2393 } 2394 } 2395 2396 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2397 switch (Opcode) { 2398 case ISD::TokenFactor: 2399 case ISD::MERGE_VALUES: 2400 case ISD::CONCAT_VECTORS: 2401 return Operand; // Factor, merge or concat of one node? No need. 2402 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2403 case ISD::FP_EXTEND: 2404 assert(VT.isFloatingPoint() && 2405 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2406 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2407 assert((!VT.isVector() || 2408 VT.getVectorNumElements() == 2409 Operand.getValueType().getVectorNumElements()) && 2410 "Vector element count mismatch!"); 2411 if (Operand.getOpcode() == ISD::UNDEF) 2412 return getUNDEF(VT); 2413 break; 2414 case ISD::SIGN_EXTEND: 2415 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2416 "Invalid SIGN_EXTEND!"); 2417 if (Operand.getValueType() == VT) return Operand; // noop extension 2418 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2419 "Invalid sext node, dst < src!"); 2420 assert((!VT.isVector() || 2421 VT.getVectorNumElements() == 2422 Operand.getValueType().getVectorNumElements()) && 2423 "Vector element count mismatch!"); 2424 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2425 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2426 break; 2427 case ISD::ZERO_EXTEND: 2428 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2429 "Invalid ZERO_EXTEND!"); 2430 if (Operand.getValueType() == VT) return Operand; // noop extension 2431 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2432 "Invalid zext node, dst < src!"); 2433 assert((!VT.isVector() || 2434 VT.getVectorNumElements() == 2435 Operand.getValueType().getVectorNumElements()) && 2436 "Vector element count mismatch!"); 2437 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2438 return getNode(ISD::ZERO_EXTEND, DL, VT, 2439 Operand.getNode()->getOperand(0)); 2440 break; 2441 case ISD::ANY_EXTEND: 2442 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2443 "Invalid ANY_EXTEND!"); 2444 if (Operand.getValueType() == VT) return Operand; // noop extension 2445 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2446 "Invalid anyext node, dst < src!"); 2447 assert((!VT.isVector() || 2448 VT.getVectorNumElements() == 2449 Operand.getValueType().getVectorNumElements()) && 2450 "Vector element count mismatch!"); 2451 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2452 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2453 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2454 break; 2455 case ISD::TRUNCATE: 2456 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2457 "Invalid TRUNCATE!"); 2458 if (Operand.getValueType() == VT) return Operand; // noop truncate 2459 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2460 "Invalid truncate node, src < dst!"); 2461 assert((!VT.isVector() || 2462 VT.getVectorNumElements() == 2463 Operand.getValueType().getVectorNumElements()) && 2464 "Vector element count mismatch!"); 2465 if (OpOpcode == ISD::TRUNCATE) 2466 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2467 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2468 OpOpcode == ISD::ANY_EXTEND) { 2469 // If the source is smaller than the dest, we still need an extend. 2470 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2471 .bitsLT(VT.getScalarType())) 2472 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2473 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2474 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2475 else 2476 return Operand.getNode()->getOperand(0); 2477 } 2478 break; 2479 case ISD::BIT_CONVERT: 2480 // Basic sanity checking. 2481 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2482 && "Cannot BIT_CONVERT between types of different sizes!"); 2483 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2484 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2485 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2486 if (OpOpcode == ISD::UNDEF) 2487 return getUNDEF(VT); 2488 break; 2489 case ISD::SCALAR_TO_VECTOR: 2490 assert(VT.isVector() && !Operand.getValueType().isVector() && 2491 (VT.getVectorElementType() == Operand.getValueType() || 2492 (VT.getVectorElementType().isInteger() && 2493 Operand.getValueType().isInteger() && 2494 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2495 "Illegal SCALAR_TO_VECTOR node!"); 2496 if (OpOpcode == ISD::UNDEF) 2497 return getUNDEF(VT); 2498 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2499 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2500 isa<ConstantSDNode>(Operand.getOperand(1)) && 2501 Operand.getConstantOperandVal(1) == 0 && 2502 Operand.getOperand(0).getValueType() == VT) 2503 return Operand.getOperand(0); 2504 break; 2505 case ISD::FNEG: 2506 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2507 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2508 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2509 Operand.getNode()->getOperand(0)); 2510 if (OpOpcode == ISD::FNEG) // --X -> X 2511 return Operand.getNode()->getOperand(0); 2512 break; 2513 case ISD::FABS: 2514 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2515 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2516 break; 2517 } 2518 2519 SDNode *N; 2520 SDVTList VTs = getVTList(VT); 2521 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2522 FoldingSetNodeID ID; 2523 SDValue Ops[1] = { Operand }; 2524 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2525 void *IP = 0; 2526 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2527 return SDValue(E, 0); 2528 2529 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2530 CSEMap.InsertNode(N, IP); 2531 } else { 2532 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2533 } 2534 2535 AllNodes.push_back(N); 2536#ifndef NDEBUG 2537 VerifyNode(N); 2538#endif 2539 return SDValue(N, 0); 2540} 2541 2542SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2543 EVT VT, 2544 ConstantSDNode *Cst1, 2545 ConstantSDNode *Cst2) { 2546 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2547 2548 switch (Opcode) { 2549 case ISD::ADD: return getConstant(C1 + C2, VT); 2550 case ISD::SUB: return getConstant(C1 - C2, VT); 2551 case ISD::MUL: return getConstant(C1 * C2, VT); 2552 case ISD::UDIV: 2553 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2554 break; 2555 case ISD::UREM: 2556 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2557 break; 2558 case ISD::SDIV: 2559 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2560 break; 2561 case ISD::SREM: 2562 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2563 break; 2564 case ISD::AND: return getConstant(C1 & C2, VT); 2565 case ISD::OR: return getConstant(C1 | C2, VT); 2566 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2567 case ISD::SHL: return getConstant(C1 << C2, VT); 2568 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2569 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2570 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2571 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2572 default: break; 2573 } 2574 2575 return SDValue(); 2576} 2577 2578SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2579 SDValue N1, SDValue N2) { 2580 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2581 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2582 switch (Opcode) { 2583 default: break; 2584 case ISD::TokenFactor: 2585 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2586 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2587 // Fold trivial token factors. 2588 if (N1.getOpcode() == ISD::EntryToken) return N2; 2589 if (N2.getOpcode() == ISD::EntryToken) return N1; 2590 if (N1 == N2) return N1; 2591 break; 2592 case ISD::CONCAT_VECTORS: 2593 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2594 // one big BUILD_VECTOR. 2595 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2596 N2.getOpcode() == ISD::BUILD_VECTOR) { 2597 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2598 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2599 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2600 } 2601 break; 2602 case ISD::AND: 2603 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2604 N1.getValueType() == VT && "Binary operator types must match!"); 2605 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2606 // worth handling here. 2607 if (N2C && N2C->isNullValue()) 2608 return N2; 2609 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2610 return N1; 2611 break; 2612 case ISD::OR: 2613 case ISD::XOR: 2614 case ISD::ADD: 2615 case ISD::SUB: 2616 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2617 N1.getValueType() == VT && "Binary operator types must match!"); 2618 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2619 // it's worth handling here. 2620 if (N2C && N2C->isNullValue()) 2621 return N1; 2622 break; 2623 case ISD::UDIV: 2624 case ISD::UREM: 2625 case ISD::MULHU: 2626 case ISD::MULHS: 2627 case ISD::MUL: 2628 case ISD::SDIV: 2629 case ISD::SREM: 2630 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2631 // fall through 2632 case ISD::FADD: 2633 case ISD::FSUB: 2634 case ISD::FMUL: 2635 case ISD::FDIV: 2636 case ISD::FREM: 2637 if (UnsafeFPMath) { 2638 if (Opcode == ISD::FADD) { 2639 // 0+x --> x 2640 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2641 if (CFP->getValueAPF().isZero()) 2642 return N2; 2643 // x+0 --> x 2644 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2645 if (CFP->getValueAPF().isZero()) 2646 return N1; 2647 } else if (Opcode == ISD::FSUB) { 2648 // x-0 --> x 2649 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2650 if (CFP->getValueAPF().isZero()) 2651 return N1; 2652 } 2653 } 2654 assert(N1.getValueType() == N2.getValueType() && 2655 N1.getValueType() == VT && "Binary operator types must match!"); 2656 break; 2657 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2658 assert(N1.getValueType() == VT && 2659 N1.getValueType().isFloatingPoint() && 2660 N2.getValueType().isFloatingPoint() && 2661 "Invalid FCOPYSIGN!"); 2662 break; 2663 case ISD::SHL: 2664 case ISD::SRA: 2665 case ISD::SRL: 2666 case ISD::ROTL: 2667 case ISD::ROTR: 2668 assert(VT == N1.getValueType() && 2669 "Shift operators return type must be the same as their first arg"); 2670 assert(VT.isInteger() && N2.getValueType().isInteger() && 2671 "Shifts only work on integers"); 2672 2673 // Always fold shifts of i1 values so the code generator doesn't need to 2674 // handle them. Since we know the size of the shift has to be less than the 2675 // size of the value, the shift/rotate count is guaranteed to be zero. 2676 if (VT == MVT::i1) 2677 return N1; 2678 if (N2C && N2C->isNullValue()) 2679 return N1; 2680 break; 2681 case ISD::FP_ROUND_INREG: { 2682 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2683 assert(VT == N1.getValueType() && "Not an inreg round!"); 2684 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2685 "Cannot FP_ROUND_INREG integer types"); 2686 assert(EVT.isVector() == VT.isVector() && 2687 "FP_ROUND_INREG type should be vector iff the operand " 2688 "type is vector!"); 2689 assert((!EVT.isVector() || 2690 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2691 "Vector element counts must match in FP_ROUND_INREG"); 2692 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2693 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2694 break; 2695 } 2696 case ISD::FP_ROUND: 2697 assert(VT.isFloatingPoint() && 2698 N1.getValueType().isFloatingPoint() && 2699 VT.bitsLE(N1.getValueType()) && 2700 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2701 if (N1.getValueType() == VT) return N1; // noop conversion. 2702 break; 2703 case ISD::AssertSext: 2704 case ISD::AssertZext: { 2705 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2706 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2707 assert(VT.isInteger() && EVT.isInteger() && 2708 "Cannot *_EXTEND_INREG FP types"); 2709 assert(!EVT.isVector() && 2710 "AssertSExt/AssertZExt type should be the vector element type " 2711 "rather than the vector type!"); 2712 assert(EVT.bitsLE(VT) && "Not extending!"); 2713 if (VT == EVT) return N1; // noop assertion. 2714 break; 2715 } 2716 case ISD::SIGN_EXTEND_INREG: { 2717 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2718 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2719 assert(VT.isInteger() && EVT.isInteger() && 2720 "Cannot *_EXTEND_INREG FP types"); 2721 assert(EVT.isVector() == VT.isVector() && 2722 "SIGN_EXTEND_INREG type should be vector iff the operand " 2723 "type is vector!"); 2724 assert((!EVT.isVector() || 2725 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2726 "Vector element counts must match in SIGN_EXTEND_INREG"); 2727 assert(EVT.bitsLE(VT) && "Not extending!"); 2728 if (EVT == VT) return N1; // Not actually extending 2729 2730 if (N1C) { 2731 APInt Val = N1C->getAPIntValue(); 2732 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2733 Val <<= Val.getBitWidth()-FromBits; 2734 Val = Val.ashr(Val.getBitWidth()-FromBits); 2735 return getConstant(Val, VT); 2736 } 2737 break; 2738 } 2739 case ISD::EXTRACT_VECTOR_ELT: 2740 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2741 if (N1.getOpcode() == ISD::UNDEF) 2742 return getUNDEF(VT); 2743 2744 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2745 // expanding copies of large vectors from registers. 2746 if (N2C && 2747 N1.getOpcode() == ISD::CONCAT_VECTORS && 2748 N1.getNumOperands() > 0) { 2749 unsigned Factor = 2750 N1.getOperand(0).getValueType().getVectorNumElements(); 2751 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2752 N1.getOperand(N2C->getZExtValue() / Factor), 2753 getConstant(N2C->getZExtValue() % Factor, 2754 N2.getValueType())); 2755 } 2756 2757 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2758 // expanding large vector constants. 2759 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2760 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2761 EVT VEltTy = N1.getValueType().getVectorElementType(); 2762 if (Elt.getValueType() != VEltTy) { 2763 // If the vector element type is not legal, the BUILD_VECTOR operands 2764 // are promoted and implicitly truncated. Make that explicit here. 2765 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2766 } 2767 if (VT != VEltTy) { 2768 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2769 // result is implicitly extended. 2770 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2771 } 2772 return Elt; 2773 } 2774 2775 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2776 // operations are lowered to scalars. 2777 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2778 // If the indices are the same, return the inserted element else 2779 // if the indices are known different, extract the element from 2780 // the original vector. 2781 if (N1.getOperand(2) == N2) { 2782 if (VT == N1.getOperand(1).getValueType()) 2783 return N1.getOperand(1); 2784 else 2785 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2786 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2787 isa<ConstantSDNode>(N2)) 2788 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2789 } 2790 break; 2791 case ISD::EXTRACT_ELEMENT: 2792 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2793 assert(!N1.getValueType().isVector() && !VT.isVector() && 2794 (N1.getValueType().isInteger() == VT.isInteger()) && 2795 "Wrong types for EXTRACT_ELEMENT!"); 2796 2797 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2798 // 64-bit integers into 32-bit parts. Instead of building the extract of 2799 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2800 if (N1.getOpcode() == ISD::BUILD_PAIR) 2801 return N1.getOperand(N2C->getZExtValue()); 2802 2803 // EXTRACT_ELEMENT of a constant int is also very common. 2804 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2805 unsigned ElementSize = VT.getSizeInBits(); 2806 unsigned Shift = ElementSize * N2C->getZExtValue(); 2807 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2808 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2809 } 2810 break; 2811 case ISD::EXTRACT_SUBVECTOR: 2812 if (N1.getValueType() == VT) // Trivial extraction. 2813 return N1; 2814 break; 2815 } 2816 2817 if (N1C) { 2818 if (N2C) { 2819 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2820 if (SV.getNode()) return SV; 2821 } else { // Cannonicalize constant to RHS if commutative 2822 if (isCommutativeBinOp(Opcode)) { 2823 std::swap(N1C, N2C); 2824 std::swap(N1, N2); 2825 } 2826 } 2827 } 2828 2829 // Constant fold FP operations. 2830 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2831 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2832 if (N1CFP) { 2833 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2834 // Cannonicalize constant to RHS if commutative 2835 std::swap(N1CFP, N2CFP); 2836 std::swap(N1, N2); 2837 } else if (N2CFP && VT != MVT::ppcf128) { 2838 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2839 APFloat::opStatus s; 2840 switch (Opcode) { 2841 case ISD::FADD: 2842 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2843 if (s != APFloat::opInvalidOp) 2844 return getConstantFP(V1, VT); 2845 break; 2846 case ISD::FSUB: 2847 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2848 if (s!=APFloat::opInvalidOp) 2849 return getConstantFP(V1, VT); 2850 break; 2851 case ISD::FMUL: 2852 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2853 if (s!=APFloat::opInvalidOp) 2854 return getConstantFP(V1, VT); 2855 break; 2856 case ISD::FDIV: 2857 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2858 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2859 return getConstantFP(V1, VT); 2860 break; 2861 case ISD::FREM : 2862 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2863 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2864 return getConstantFP(V1, VT); 2865 break; 2866 case ISD::FCOPYSIGN: 2867 V1.copySign(V2); 2868 return getConstantFP(V1, VT); 2869 default: break; 2870 } 2871 } 2872 } 2873 2874 // Canonicalize an UNDEF to the RHS, even over a constant. 2875 if (N1.getOpcode() == ISD::UNDEF) { 2876 if (isCommutativeBinOp(Opcode)) { 2877 std::swap(N1, N2); 2878 } else { 2879 switch (Opcode) { 2880 case ISD::FP_ROUND_INREG: 2881 case ISD::SIGN_EXTEND_INREG: 2882 case ISD::SUB: 2883 case ISD::FSUB: 2884 case ISD::FDIV: 2885 case ISD::FREM: 2886 case ISD::SRA: 2887 return N1; // fold op(undef, arg2) -> undef 2888 case ISD::UDIV: 2889 case ISD::SDIV: 2890 case ISD::UREM: 2891 case ISD::SREM: 2892 case ISD::SRL: 2893 case ISD::SHL: 2894 if (!VT.isVector()) 2895 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2896 // For vectors, we can't easily build an all zero vector, just return 2897 // the LHS. 2898 return N2; 2899 } 2900 } 2901 } 2902 2903 // Fold a bunch of operators when the RHS is undef. 2904 if (N2.getOpcode() == ISD::UNDEF) { 2905 switch (Opcode) { 2906 case ISD::XOR: 2907 if (N1.getOpcode() == ISD::UNDEF) 2908 // Handle undef ^ undef -> 0 special case. This is a common 2909 // idiom (misuse). 2910 return getConstant(0, VT); 2911 // fallthrough 2912 case ISD::ADD: 2913 case ISD::ADDC: 2914 case ISD::ADDE: 2915 case ISD::SUB: 2916 case ISD::UDIV: 2917 case ISD::SDIV: 2918 case ISD::UREM: 2919 case ISD::SREM: 2920 return N2; // fold op(arg1, undef) -> undef 2921 case ISD::FADD: 2922 case ISD::FSUB: 2923 case ISD::FMUL: 2924 case ISD::FDIV: 2925 case ISD::FREM: 2926 if (UnsafeFPMath) 2927 return N2; 2928 break; 2929 case ISD::MUL: 2930 case ISD::AND: 2931 case ISD::SRL: 2932 case ISD::SHL: 2933 if (!VT.isVector()) 2934 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2935 // For vectors, we can't easily build an all zero vector, just return 2936 // the LHS. 2937 return N1; 2938 case ISD::OR: 2939 if (!VT.isVector()) 2940 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2941 // For vectors, we can't easily build an all one vector, just return 2942 // the LHS. 2943 return N1; 2944 case ISD::SRA: 2945 return N1; 2946 } 2947 } 2948 2949 // Memoize this node if possible. 2950 SDNode *N; 2951 SDVTList VTs = getVTList(VT); 2952 if (VT != MVT::Flag) { 2953 SDValue Ops[] = { N1, N2 }; 2954 FoldingSetNodeID ID; 2955 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2956 void *IP = 0; 2957 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2958 return SDValue(E, 0); 2959 2960 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2961 CSEMap.InsertNode(N, IP); 2962 } else { 2963 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2964 } 2965 2966 AllNodes.push_back(N); 2967#ifndef NDEBUG 2968 VerifyNode(N); 2969#endif 2970 return SDValue(N, 0); 2971} 2972 2973SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2974 SDValue N1, SDValue N2, SDValue N3) { 2975 // Perform various simplifications. 2976 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2977 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2978 switch (Opcode) { 2979 case ISD::CONCAT_VECTORS: 2980 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2981 // one big BUILD_VECTOR. 2982 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2983 N2.getOpcode() == ISD::BUILD_VECTOR && 2984 N3.getOpcode() == ISD::BUILD_VECTOR) { 2985 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2986 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2987 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2988 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2989 } 2990 break; 2991 case ISD::SETCC: { 2992 // Use FoldSetCC to simplify SETCC's. 2993 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2994 if (Simp.getNode()) return Simp; 2995 break; 2996 } 2997 case ISD::SELECT: 2998 if (N1C) { 2999 if (N1C->getZExtValue()) 3000 return N2; // select true, X, Y -> X 3001 else 3002 return N3; // select false, X, Y -> Y 3003 } 3004 3005 if (N2 == N3) return N2; // select C, X, X -> X 3006 break; 3007 case ISD::BRCOND: 3008 if (N2C) { 3009 if (N2C->getZExtValue()) // Unconditional branch 3010 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3011 else 3012 return N1; // Never-taken branch 3013 } 3014 break; 3015 case ISD::VECTOR_SHUFFLE: 3016 llvm_unreachable("should use getVectorShuffle constructor!"); 3017 break; 3018 case ISD::BIT_CONVERT: 3019 // Fold bit_convert nodes from a type to themselves. 3020 if (N1.getValueType() == VT) 3021 return N1; 3022 break; 3023 } 3024 3025 // Memoize node if it doesn't produce a flag. 3026 SDNode *N; 3027 SDVTList VTs = getVTList(VT); 3028 if (VT != MVT::Flag) { 3029 SDValue Ops[] = { N1, N2, N3 }; 3030 FoldingSetNodeID ID; 3031 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3032 void *IP = 0; 3033 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3034 return SDValue(E, 0); 3035 3036 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3037 CSEMap.InsertNode(N, IP); 3038 } else { 3039 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3040 } 3041 3042 AllNodes.push_back(N); 3043#ifndef NDEBUG 3044 VerifyNode(N); 3045#endif 3046 return SDValue(N, 0); 3047} 3048 3049SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3050 SDValue N1, SDValue N2, SDValue N3, 3051 SDValue N4) { 3052 SDValue Ops[] = { N1, N2, N3, N4 }; 3053 return getNode(Opcode, DL, VT, Ops, 4); 3054} 3055 3056SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3057 SDValue N1, SDValue N2, SDValue N3, 3058 SDValue N4, SDValue N5) { 3059 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3060 return getNode(Opcode, DL, VT, Ops, 5); 3061} 3062 3063/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3064/// the incoming stack arguments to be loaded from the stack. 3065SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3066 SmallVector<SDValue, 8> ArgChains; 3067 3068 // Include the original chain at the beginning of the list. When this is 3069 // used by target LowerCall hooks, this helps legalize find the 3070 // CALLSEQ_BEGIN node. 3071 ArgChains.push_back(Chain); 3072 3073 // Add a chain value for each stack argument. 3074 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3075 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3076 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3077 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3078 if (FI->getIndex() < 0) 3079 ArgChains.push_back(SDValue(L, 1)); 3080 3081 // Build a tokenfactor for all the chains. 3082 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3083 &ArgChains[0], ArgChains.size()); 3084} 3085 3086/// getMemsetValue - Vectorized representation of the memset value 3087/// operand. 3088static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3089 DebugLoc dl) { 3090 assert(Value.getOpcode() != ISD::UNDEF); 3091 3092 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3093 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3094 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3095 unsigned Shift = 8; 3096 for (unsigned i = NumBits; i > 8; i >>= 1) { 3097 Val = (Val << Shift) | Val; 3098 Shift <<= 1; 3099 } 3100 if (VT.isInteger()) 3101 return DAG.getConstant(Val, VT); 3102 return DAG.getConstantFP(APFloat(Val), VT); 3103 } 3104 3105 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3106 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3107 unsigned Shift = 8; 3108 for (unsigned i = NumBits; i > 8; i >>= 1) { 3109 Value = DAG.getNode(ISD::OR, dl, VT, 3110 DAG.getNode(ISD::SHL, dl, VT, Value, 3111 DAG.getConstant(Shift, 3112 TLI.getShiftAmountTy())), 3113 Value); 3114 Shift <<= 1; 3115 } 3116 3117 return Value; 3118} 3119 3120/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3121/// used when a memcpy is turned into a memset when the source is a constant 3122/// string ptr. 3123static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3124 const TargetLowering &TLI, 3125 std::string &Str, unsigned Offset) { 3126 // Handle vector with all elements zero. 3127 if (Str.empty()) { 3128 if (VT.isInteger()) 3129 return DAG.getConstant(0, VT); 3130 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3131 VT.getSimpleVT().SimpleTy == MVT::f64) 3132 return DAG.getConstantFP(0.0, VT); 3133 else if (VT.isVector()) { 3134 unsigned NumElts = VT.getVectorNumElements(); 3135 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3136 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3137 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3138 EltVT, NumElts))); 3139 } else 3140 llvm_unreachable("Expected type!"); 3141 } 3142 3143 assert(!VT.isVector() && "Can't handle vector type here!"); 3144 unsigned NumBits = VT.getSizeInBits(); 3145 unsigned MSB = NumBits / 8; 3146 uint64_t Val = 0; 3147 if (TLI.isLittleEndian()) 3148 Offset = Offset + MSB - 1; 3149 for (unsigned i = 0; i != MSB; ++i) { 3150 Val = (Val << 8) | (unsigned char)Str[Offset]; 3151 Offset += TLI.isLittleEndian() ? -1 : 1; 3152 } 3153 return DAG.getConstant(Val, VT); 3154} 3155 3156/// getMemBasePlusOffset - Returns base and offset node for the 3157/// 3158static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3159 SelectionDAG &DAG) { 3160 EVT VT = Base.getValueType(); 3161 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3162 VT, Base, DAG.getConstant(Offset, VT)); 3163} 3164 3165/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3166/// 3167static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3168 unsigned SrcDelta = 0; 3169 GlobalAddressSDNode *G = NULL; 3170 if (Src.getOpcode() == ISD::GlobalAddress) 3171 G = cast<GlobalAddressSDNode>(Src); 3172 else if (Src.getOpcode() == ISD::ADD && 3173 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3174 Src.getOperand(1).getOpcode() == ISD::Constant) { 3175 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3176 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3177 } 3178 if (!G) 3179 return false; 3180 3181 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3182 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3183 return true; 3184 3185 return false; 3186} 3187 3188/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3189/// to replace the memset / memcpy. Return true if the number of memory ops 3190/// is below the threshold. It returns the types of the sequence of 3191/// memory ops to perform memset / memcpy by reference. 3192static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3193 unsigned Limit, uint64_t Size, 3194 unsigned DstAlign, unsigned SrcAlign, 3195 bool NonScalarIntSafe, 3196 SelectionDAG &DAG, 3197 const TargetLowering &TLI) { 3198 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3199 "Expecting memcpy / memset source to meet alignment requirement!"); 3200 // If 'SrcAlign' is zero, that means the memory operation does not need load 3201 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3202 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3203 // specified alignment of the memory operation. If it is zero, that means 3204 // it's possible to change the alignment of the destination. 3205 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3206 NonScalarIntSafe, DAG); 3207 3208 if (VT == MVT::Other) { 3209 VT = TLI.getPointerTy(); 3210 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3211 if (DstAlign >= TLI.getTargetData()->getABITypeAlignment(Ty) || 3212 TLI.allowsUnalignedMemoryAccesses(VT)) { 3213 VT = MVT::i64; 3214 } else { 3215 switch (DstAlign & 7) { 3216 case 0: VT = MVT::i64; break; 3217 case 4: VT = MVT::i32; break; 3218 case 2: VT = MVT::i16; break; 3219 default: VT = MVT::i8; break; 3220 } 3221 } 3222 3223 MVT LVT = MVT::i64; 3224 while (!TLI.isTypeLegal(LVT)) 3225 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3226 assert(LVT.isInteger()); 3227 3228 if (VT.bitsGT(LVT)) 3229 VT = LVT; 3230 } 3231 3232 unsigned NumMemOps = 0; 3233 while (Size != 0) { 3234 unsigned VTSize = VT.getSizeInBits() / 8; 3235 while (VTSize > Size) { 3236 // For now, only use non-vector load / store's for the left-over pieces. 3237 if (VT.isVector() || VT.isFloatingPoint()) { 3238 VT = MVT::i64; 3239 while (!TLI.isTypeLegal(VT)) 3240 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3241 VTSize = VT.getSizeInBits() / 8; 3242 } else { 3243 // This can result in a type that is not legal on the target, e.g. 3244 // 1 or 2 bytes on PPC. 3245 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3246 VTSize >>= 1; 3247 } 3248 } 3249 3250 if (++NumMemOps > Limit) 3251 return false; 3252 MemOps.push_back(VT); 3253 Size -= VTSize; 3254 } 3255 3256 return true; 3257} 3258 3259static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3260 SDValue Chain, SDValue Dst, 3261 SDValue Src, uint64_t Size, 3262 unsigned Align, bool isVol, 3263 bool AlwaysInline, 3264 const Value *DstSV, uint64_t DstSVOff, 3265 const Value *SrcSV, uint64_t SrcSVOff) { 3266 // Turn a memcpy of undef to nop. 3267 if (Src.getOpcode() == ISD::UNDEF) 3268 return Chain; 3269 3270 // Expand memcpy to a series of load and store ops if the size operand falls 3271 // below a certain threshold. 3272 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3273 std::vector<EVT> MemOps; 3274 uint64_t Limit = -1ULL; 3275 if (!AlwaysInline) 3276 Limit = TLI.getMaxStoresPerMemcpy(); 3277 bool DstAlignCanChange = false; 3278 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3279 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3280 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3281 DstAlignCanChange = true; 3282 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3283 if (Align > SrcAlign) 3284 SrcAlign = Align; 3285 std::string Str; 3286 bool CopyFromStr = isMemSrcFromString(Src, Str); 3287 bool isZeroStr = CopyFromStr && Str.empty(); 3288 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3289 (DstAlignCanChange ? 0 : Align), 3290 (isZeroStr ? 0 : SrcAlign), true, DAG, TLI)) 3291 return SDValue(); 3292 3293 if (DstAlignCanChange) { 3294 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3295 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3296 if (NewAlign > Align) { 3297 // Give the stack frame object a larger alignment if needed. 3298 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3299 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3300 Align = NewAlign; 3301 } 3302 } 3303 3304 SmallVector<SDValue, 8> OutChains; 3305 unsigned NumMemOps = MemOps.size(); 3306 uint64_t SrcOff = 0, DstOff = 0; 3307 for (unsigned i = 0; i != NumMemOps; ++i) { 3308 EVT VT = MemOps[i]; 3309 unsigned VTSize = VT.getSizeInBits() / 8; 3310 SDValue Value, Store; 3311 3312 if (CopyFromStr && 3313 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3314 // It's unlikely a store of a vector immediate can be done in a single 3315 // instruction. It would require a load from a constantpool first. 3316 // We only handle zero vectors here. 3317 // FIXME: Handle other cases where store of vector immediate is done in 3318 // a single instruction. 3319 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3320 Store = DAG.getStore(Chain, dl, Value, 3321 getMemBasePlusOffset(Dst, DstOff, DAG), 3322 DstSV, DstSVOff + DstOff, isVol, false, Align); 3323 } else { 3324 // The type might not be legal for the target. This should only happen 3325 // if the type is smaller than a legal type, as on PPC, so the right 3326 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3327 // to Load/Store if NVT==VT. 3328 // FIXME does the case above also need this? 3329 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3330 assert(NVT.bitsGE(VT)); 3331 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3332 getMemBasePlusOffset(Src, SrcOff, DAG), 3333 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3334 MinAlign(SrcAlign, SrcOff)); 3335 Store = DAG.getTruncStore(Chain, dl, Value, 3336 getMemBasePlusOffset(Dst, DstOff, DAG), 3337 DstSV, DstSVOff + DstOff, VT, isVol, false, 3338 Align); 3339 } 3340 OutChains.push_back(Store); 3341 SrcOff += VTSize; 3342 DstOff += VTSize; 3343 } 3344 3345 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3346 &OutChains[0], OutChains.size()); 3347} 3348 3349static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3350 SDValue Chain, SDValue Dst, 3351 SDValue Src, uint64_t Size, 3352 unsigned Align, bool isVol, 3353 bool AlwaysInline, 3354 const Value *DstSV, uint64_t DstSVOff, 3355 const Value *SrcSV, uint64_t SrcSVOff) { 3356 // Turn a memmove of undef to nop. 3357 if (Src.getOpcode() == ISD::UNDEF) 3358 return Chain; 3359 3360 // Expand memmove to a series of load and store ops if the size operand falls 3361 // below a certain threshold. 3362 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3363 std::vector<EVT> MemOps; 3364 uint64_t Limit = -1ULL; 3365 if (!AlwaysInline) 3366 Limit = TLI.getMaxStoresPerMemmove(); 3367 bool DstAlignCanChange = false; 3368 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3369 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3370 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3371 DstAlignCanChange = true; 3372 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3373 if (Align > SrcAlign) 3374 SrcAlign = Align; 3375 3376 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3377 (DstAlignCanChange ? 0 : Align), 3378 SrcAlign, true, DAG, TLI)) 3379 return SDValue(); 3380 3381 if (DstAlignCanChange) { 3382 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3383 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3384 if (NewAlign > Align) { 3385 // Give the stack frame object a larger alignment if needed. 3386 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3387 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3388 Align = NewAlign; 3389 } 3390 } 3391 3392 uint64_t SrcOff = 0, DstOff = 0; 3393 SmallVector<SDValue, 8> LoadValues; 3394 SmallVector<SDValue, 8> LoadChains; 3395 SmallVector<SDValue, 8> OutChains; 3396 unsigned NumMemOps = MemOps.size(); 3397 for (unsigned i = 0; i < NumMemOps; i++) { 3398 EVT VT = MemOps[i]; 3399 unsigned VTSize = VT.getSizeInBits() / 8; 3400 SDValue Value, Store; 3401 3402 Value = DAG.getLoad(VT, dl, Chain, 3403 getMemBasePlusOffset(Src, SrcOff, DAG), 3404 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3405 LoadValues.push_back(Value); 3406 LoadChains.push_back(Value.getValue(1)); 3407 SrcOff += VTSize; 3408 } 3409 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3410 &LoadChains[0], LoadChains.size()); 3411 OutChains.clear(); 3412 for (unsigned i = 0; i < NumMemOps; i++) { 3413 EVT VT = MemOps[i]; 3414 unsigned VTSize = VT.getSizeInBits() / 8; 3415 SDValue Value, Store; 3416 3417 Store = DAG.getStore(Chain, dl, LoadValues[i], 3418 getMemBasePlusOffset(Dst, DstOff, DAG), 3419 DstSV, DstSVOff + DstOff, isVol, false, Align); 3420 OutChains.push_back(Store); 3421 DstOff += VTSize; 3422 } 3423 3424 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3425 &OutChains[0], OutChains.size()); 3426} 3427 3428static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3429 SDValue Chain, SDValue Dst, 3430 SDValue Src, uint64_t Size, 3431 unsigned Align, bool isVol, 3432 const Value *DstSV, uint64_t DstSVOff) { 3433 // Turn a memset of undef to nop. 3434 if (Src.getOpcode() == ISD::UNDEF) 3435 return Chain; 3436 3437 // Expand memset to a series of load/store ops if the size operand 3438 // falls below a certain threshold. 3439 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3440 std::vector<EVT> MemOps; 3441 bool DstAlignCanChange = false; 3442 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3443 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3444 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3445 DstAlignCanChange = true; 3446 bool NonScalarIntSafe = 3447 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3448 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3449 Size, (DstAlignCanChange ? 0 : Align), 0, 3450 NonScalarIntSafe, DAG, TLI)) 3451 return SDValue(); 3452 3453 if (DstAlignCanChange) { 3454 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3455 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3456 if (NewAlign > Align) { 3457 // Give the stack frame object a larger alignment if needed. 3458 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3459 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3460 Align = NewAlign; 3461 } 3462 } 3463 3464 SmallVector<SDValue, 8> OutChains; 3465 uint64_t DstOff = 0; 3466 unsigned NumMemOps = MemOps.size(); 3467 for (unsigned i = 0; i < NumMemOps; i++) { 3468 EVT VT = MemOps[i]; 3469 unsigned VTSize = VT.getSizeInBits() / 8; 3470 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3471 SDValue Store = DAG.getStore(Chain, dl, Value, 3472 getMemBasePlusOffset(Dst, DstOff, DAG), 3473 DstSV, DstSVOff + DstOff, isVol, false, 0); 3474 OutChains.push_back(Store); 3475 DstOff += VTSize; 3476 } 3477 3478 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3479 &OutChains[0], OutChains.size()); 3480} 3481 3482SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3483 SDValue Src, SDValue Size, 3484 unsigned Align, bool isVol, bool AlwaysInline, 3485 const Value *DstSV, uint64_t DstSVOff, 3486 const Value *SrcSV, uint64_t SrcSVOff) { 3487 3488 // Check to see if we should lower the memcpy to loads and stores first. 3489 // For cases within the target-specified limits, this is the best choice. 3490 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3491 if (ConstantSize) { 3492 // Memcpy with size zero? Just return the original chain. 3493 if (ConstantSize->isNullValue()) 3494 return Chain; 3495 3496 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3497 ConstantSize->getZExtValue(),Align, 3498 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3499 if (Result.getNode()) 3500 return Result; 3501 } 3502 3503 // Then check to see if we should lower the memcpy with target-specific 3504 // code. If the target chooses to do this, this is the next best. 3505 SDValue Result = 3506 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3507 isVol, AlwaysInline, 3508 DstSV, DstSVOff, SrcSV, SrcSVOff); 3509 if (Result.getNode()) 3510 return Result; 3511 3512 // If we really need inline code and the target declined to provide it, 3513 // use a (potentially long) sequence of loads and stores. 3514 if (AlwaysInline) { 3515 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3516 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3517 ConstantSize->getZExtValue(), Align, isVol, 3518 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3519 } 3520 3521 // Emit a library call. 3522 assert(!isVol && "library memcpy does not support volatile"); 3523 TargetLowering::ArgListTy Args; 3524 TargetLowering::ArgListEntry Entry; 3525 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3526 Entry.Node = Dst; Args.push_back(Entry); 3527 Entry.Node = Src; Args.push_back(Entry); 3528 Entry.Node = Size; Args.push_back(Entry); 3529 // FIXME: pass in DebugLoc 3530 std::pair<SDValue,SDValue> CallResult = 3531 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3532 false, false, false, false, 0, 3533 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3534 /*isReturnValueUsed=*/false, 3535 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3536 TLI.getPointerTy()), 3537 Args, *this, dl); 3538 return CallResult.second; 3539} 3540 3541SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3542 SDValue Src, SDValue Size, 3543 unsigned Align, bool isVol, 3544 const Value *DstSV, uint64_t DstSVOff, 3545 const Value *SrcSV, uint64_t SrcSVOff) { 3546 3547 // Check to see if we should lower the memmove to loads and stores first. 3548 // For cases within the target-specified limits, this is the best choice. 3549 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3550 if (ConstantSize) { 3551 // Memmove with size zero? Just return the original chain. 3552 if (ConstantSize->isNullValue()) 3553 return Chain; 3554 3555 SDValue Result = 3556 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3557 ConstantSize->getZExtValue(), Align, isVol, 3558 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3559 if (Result.getNode()) 3560 return Result; 3561 } 3562 3563 // Then check to see if we should lower the memmove with target-specific 3564 // code. If the target chooses to do this, this is the next best. 3565 SDValue Result = 3566 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3567 DstSV, DstSVOff, SrcSV, SrcSVOff); 3568 if (Result.getNode()) 3569 return Result; 3570 3571 // Emit a library call. 3572 assert(!isVol && "library memmove does not support volatile"); 3573 TargetLowering::ArgListTy Args; 3574 TargetLowering::ArgListEntry Entry; 3575 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3576 Entry.Node = Dst; Args.push_back(Entry); 3577 Entry.Node = Src; Args.push_back(Entry); 3578 Entry.Node = Size; Args.push_back(Entry); 3579 // FIXME: pass in DebugLoc 3580 std::pair<SDValue,SDValue> CallResult = 3581 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3582 false, false, false, false, 0, 3583 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3584 /*isReturnValueUsed=*/false, 3585 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3586 TLI.getPointerTy()), 3587 Args, *this, dl); 3588 return CallResult.second; 3589} 3590 3591SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3592 SDValue Src, SDValue Size, 3593 unsigned Align, bool isVol, 3594 const Value *DstSV, uint64_t DstSVOff) { 3595 3596 // Check to see if we should lower the memset to stores first. 3597 // For cases within the target-specified limits, this is the best choice. 3598 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3599 if (ConstantSize) { 3600 // Memset with size zero? Just return the original chain. 3601 if (ConstantSize->isNullValue()) 3602 return Chain; 3603 3604 SDValue Result = 3605 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3606 Align, isVol, DstSV, DstSVOff); 3607 3608 if (Result.getNode()) 3609 return Result; 3610 } 3611 3612 // Then check to see if we should lower the memset with target-specific 3613 // code. If the target chooses to do this, this is the next best. 3614 SDValue Result = 3615 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3616 DstSV, DstSVOff); 3617 if (Result.getNode()) 3618 return Result; 3619 3620 // Emit a library call. 3621 assert(!isVol && "library memset does not support volatile"); 3622 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3623 TargetLowering::ArgListTy Args; 3624 TargetLowering::ArgListEntry Entry; 3625 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3626 Args.push_back(Entry); 3627 // Extend or truncate the argument to be an i32 value for the call. 3628 if (Src.getValueType().bitsGT(MVT::i32)) 3629 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3630 else 3631 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3632 Entry.Node = Src; 3633 Entry.Ty = Type::getInt32Ty(*getContext()); 3634 Entry.isSExt = true; 3635 Args.push_back(Entry); 3636 Entry.Node = Size; 3637 Entry.Ty = IntPtrTy; 3638 Entry.isSExt = false; 3639 Args.push_back(Entry); 3640 // FIXME: pass in DebugLoc 3641 std::pair<SDValue,SDValue> CallResult = 3642 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3643 false, false, false, false, 0, 3644 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3645 /*isReturnValueUsed=*/false, 3646 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3647 TLI.getPointerTy()), 3648 Args, *this, dl); 3649 return CallResult.second; 3650} 3651 3652SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3653 SDValue Chain, 3654 SDValue Ptr, SDValue Cmp, 3655 SDValue Swp, const Value* PtrVal, 3656 unsigned Alignment) { 3657 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3658 Alignment = getEVTAlignment(MemVT); 3659 3660 // Check if the memory reference references a frame index 3661 if (!PtrVal) 3662 if (const FrameIndexSDNode *FI = 3663 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3664 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3665 3666 MachineFunction &MF = getMachineFunction(); 3667 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3668 3669 // For now, atomics are considered to be volatile always. 3670 Flags |= MachineMemOperand::MOVolatile; 3671 3672 MachineMemOperand *MMO = 3673 MF.getMachineMemOperand(PtrVal, Flags, 0, 3674 MemVT.getStoreSize(), Alignment); 3675 3676 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3677} 3678 3679SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3680 SDValue Chain, 3681 SDValue Ptr, SDValue Cmp, 3682 SDValue Swp, MachineMemOperand *MMO) { 3683 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3684 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3685 3686 EVT VT = Cmp.getValueType(); 3687 3688 SDVTList VTs = getVTList(VT, MVT::Other); 3689 FoldingSetNodeID ID; 3690 ID.AddInteger(MemVT.getRawBits()); 3691 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3692 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3693 void* IP = 0; 3694 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3695 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3696 return SDValue(E, 0); 3697 } 3698 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3699 Ptr, Cmp, Swp, MMO); 3700 CSEMap.InsertNode(N, IP); 3701 AllNodes.push_back(N); 3702 return SDValue(N, 0); 3703} 3704 3705SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3706 SDValue Chain, 3707 SDValue Ptr, SDValue Val, 3708 const Value* PtrVal, 3709 unsigned Alignment) { 3710 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3711 Alignment = getEVTAlignment(MemVT); 3712 3713 // Check if the memory reference references a frame index 3714 if (!PtrVal) 3715 if (const FrameIndexSDNode *FI = 3716 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3717 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3718 3719 MachineFunction &MF = getMachineFunction(); 3720 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3721 3722 // For now, atomics are considered to be volatile always. 3723 Flags |= MachineMemOperand::MOVolatile; 3724 3725 MachineMemOperand *MMO = 3726 MF.getMachineMemOperand(PtrVal, Flags, 0, 3727 MemVT.getStoreSize(), Alignment); 3728 3729 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3730} 3731 3732SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3733 SDValue Chain, 3734 SDValue Ptr, SDValue Val, 3735 MachineMemOperand *MMO) { 3736 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3737 Opcode == ISD::ATOMIC_LOAD_SUB || 3738 Opcode == ISD::ATOMIC_LOAD_AND || 3739 Opcode == ISD::ATOMIC_LOAD_OR || 3740 Opcode == ISD::ATOMIC_LOAD_XOR || 3741 Opcode == ISD::ATOMIC_LOAD_NAND || 3742 Opcode == ISD::ATOMIC_LOAD_MIN || 3743 Opcode == ISD::ATOMIC_LOAD_MAX || 3744 Opcode == ISD::ATOMIC_LOAD_UMIN || 3745 Opcode == ISD::ATOMIC_LOAD_UMAX || 3746 Opcode == ISD::ATOMIC_SWAP) && 3747 "Invalid Atomic Op"); 3748 3749 EVT VT = Val.getValueType(); 3750 3751 SDVTList VTs = getVTList(VT, MVT::Other); 3752 FoldingSetNodeID ID; 3753 ID.AddInteger(MemVT.getRawBits()); 3754 SDValue Ops[] = {Chain, Ptr, Val}; 3755 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3756 void* IP = 0; 3757 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3758 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3759 return SDValue(E, 0); 3760 } 3761 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3762 Ptr, Val, MMO); 3763 CSEMap.InsertNode(N, IP); 3764 AllNodes.push_back(N); 3765 return SDValue(N, 0); 3766} 3767 3768/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3769/// Allowed to return something different (and simpler) if Simplify is true. 3770SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3771 DebugLoc dl) { 3772 if (NumOps == 1) 3773 return Ops[0]; 3774 3775 SmallVector<EVT, 4> VTs; 3776 VTs.reserve(NumOps); 3777 for (unsigned i = 0; i < NumOps; ++i) 3778 VTs.push_back(Ops[i].getValueType()); 3779 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3780 Ops, NumOps); 3781} 3782 3783SDValue 3784SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3785 const EVT *VTs, unsigned NumVTs, 3786 const SDValue *Ops, unsigned NumOps, 3787 EVT MemVT, const Value *srcValue, int SVOff, 3788 unsigned Align, bool Vol, 3789 bool ReadMem, bool WriteMem) { 3790 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3791 MemVT, srcValue, SVOff, Align, Vol, 3792 ReadMem, WriteMem); 3793} 3794 3795SDValue 3796SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3797 const SDValue *Ops, unsigned NumOps, 3798 EVT MemVT, const Value *srcValue, int SVOff, 3799 unsigned Align, bool Vol, 3800 bool ReadMem, bool WriteMem) { 3801 if (Align == 0) // Ensure that codegen never sees alignment 0 3802 Align = getEVTAlignment(MemVT); 3803 3804 MachineFunction &MF = getMachineFunction(); 3805 unsigned Flags = 0; 3806 if (WriteMem) 3807 Flags |= MachineMemOperand::MOStore; 3808 if (ReadMem) 3809 Flags |= MachineMemOperand::MOLoad; 3810 if (Vol) 3811 Flags |= MachineMemOperand::MOVolatile; 3812 MachineMemOperand *MMO = 3813 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3814 MemVT.getStoreSize(), Align); 3815 3816 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3817} 3818 3819SDValue 3820SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3821 const SDValue *Ops, unsigned NumOps, 3822 EVT MemVT, MachineMemOperand *MMO) { 3823 assert((Opcode == ISD::INTRINSIC_VOID || 3824 Opcode == ISD::INTRINSIC_W_CHAIN || 3825 (Opcode <= INT_MAX && 3826 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3827 "Opcode is not a memory-accessing opcode!"); 3828 3829 // Memoize the node unless it returns a flag. 3830 MemIntrinsicSDNode *N; 3831 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3832 FoldingSetNodeID ID; 3833 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3834 void *IP = 0; 3835 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3836 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3837 return SDValue(E, 0); 3838 } 3839 3840 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3841 MemVT, MMO); 3842 CSEMap.InsertNode(N, IP); 3843 } else { 3844 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3845 MemVT, MMO); 3846 } 3847 AllNodes.push_back(N); 3848 return SDValue(N, 0); 3849} 3850 3851SDValue 3852SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3853 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3854 SDValue Ptr, SDValue Offset, 3855 const Value *SV, int SVOffset, EVT MemVT, 3856 bool isVolatile, bool isNonTemporal, 3857 unsigned Alignment) { 3858 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3859 Alignment = getEVTAlignment(VT); 3860 3861 // Check if the memory reference references a frame index 3862 if (!SV) 3863 if (const FrameIndexSDNode *FI = 3864 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3865 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3866 3867 MachineFunction &MF = getMachineFunction(); 3868 unsigned Flags = MachineMemOperand::MOLoad; 3869 if (isVolatile) 3870 Flags |= MachineMemOperand::MOVolatile; 3871 if (isNonTemporal) 3872 Flags |= MachineMemOperand::MONonTemporal; 3873 MachineMemOperand *MMO = 3874 MF.getMachineMemOperand(SV, Flags, SVOffset, 3875 MemVT.getStoreSize(), Alignment); 3876 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3877} 3878 3879SDValue 3880SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3881 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3882 SDValue Ptr, SDValue Offset, EVT MemVT, 3883 MachineMemOperand *MMO) { 3884 if (VT == MemVT) { 3885 ExtType = ISD::NON_EXTLOAD; 3886 } else if (ExtType == ISD::NON_EXTLOAD) { 3887 assert(VT == MemVT && "Non-extending load from different memory type!"); 3888 } else { 3889 // Extending load. 3890 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3891 "Should only be an extending load, not truncating!"); 3892 assert(VT.isInteger() == MemVT.isInteger() && 3893 "Cannot convert from FP to Int or Int -> FP!"); 3894 assert(VT.isVector() == MemVT.isVector() && 3895 "Cannot use trunc store to convert to or from a vector!"); 3896 assert((!VT.isVector() || 3897 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3898 "Cannot use trunc store to change the number of vector elements!"); 3899 } 3900 3901 bool Indexed = AM != ISD::UNINDEXED; 3902 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3903 "Unindexed load with an offset!"); 3904 3905 SDVTList VTs = Indexed ? 3906 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3907 SDValue Ops[] = { Chain, Ptr, Offset }; 3908 FoldingSetNodeID ID; 3909 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3910 ID.AddInteger(MemVT.getRawBits()); 3911 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3912 MMO->isNonTemporal())); 3913 void *IP = 0; 3914 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3915 cast<LoadSDNode>(E)->refineAlignment(MMO); 3916 return SDValue(E, 0); 3917 } 3918 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3919 MemVT, MMO); 3920 CSEMap.InsertNode(N, IP); 3921 AllNodes.push_back(N); 3922 return SDValue(N, 0); 3923} 3924 3925SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3926 SDValue Chain, SDValue Ptr, 3927 const Value *SV, int SVOffset, 3928 bool isVolatile, bool isNonTemporal, 3929 unsigned Alignment) { 3930 SDValue Undef = getUNDEF(Ptr.getValueType()); 3931 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3932 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3933} 3934 3935SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3936 SDValue Chain, SDValue Ptr, 3937 const Value *SV, 3938 int SVOffset, EVT MemVT, 3939 bool isVolatile, bool isNonTemporal, 3940 unsigned Alignment) { 3941 SDValue Undef = getUNDEF(Ptr.getValueType()); 3942 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3943 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3944} 3945 3946SDValue 3947SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3948 SDValue Offset, ISD::MemIndexedMode AM) { 3949 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3950 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3951 "Load is already a indexed load!"); 3952 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3953 LD->getChain(), Base, Offset, LD->getSrcValue(), 3954 LD->getSrcValueOffset(), LD->getMemoryVT(), 3955 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3956} 3957 3958SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3959 SDValue Ptr, const Value *SV, int SVOffset, 3960 bool isVolatile, bool isNonTemporal, 3961 unsigned Alignment) { 3962 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3963 Alignment = getEVTAlignment(Val.getValueType()); 3964 3965 // Check if the memory reference references a frame index 3966 if (!SV) 3967 if (const FrameIndexSDNode *FI = 3968 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3969 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3970 3971 MachineFunction &MF = getMachineFunction(); 3972 unsigned Flags = MachineMemOperand::MOStore; 3973 if (isVolatile) 3974 Flags |= MachineMemOperand::MOVolatile; 3975 if (isNonTemporal) 3976 Flags |= MachineMemOperand::MONonTemporal; 3977 MachineMemOperand *MMO = 3978 MF.getMachineMemOperand(SV, Flags, SVOffset, 3979 Val.getValueType().getStoreSize(), Alignment); 3980 3981 return getStore(Chain, dl, Val, Ptr, MMO); 3982} 3983 3984SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3985 SDValue Ptr, MachineMemOperand *MMO) { 3986 EVT VT = Val.getValueType(); 3987 SDVTList VTs = getVTList(MVT::Other); 3988 SDValue Undef = getUNDEF(Ptr.getValueType()); 3989 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3990 FoldingSetNodeID ID; 3991 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3992 ID.AddInteger(VT.getRawBits()); 3993 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 3994 MMO->isNonTemporal())); 3995 void *IP = 0; 3996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3997 cast<StoreSDNode>(E)->refineAlignment(MMO); 3998 return SDValue(E, 0); 3999 } 4000 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4001 false, VT, MMO); 4002 CSEMap.InsertNode(N, IP); 4003 AllNodes.push_back(N); 4004 return SDValue(N, 0); 4005} 4006 4007SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4008 SDValue Ptr, const Value *SV, 4009 int SVOffset, EVT SVT, 4010 bool isVolatile, bool isNonTemporal, 4011 unsigned Alignment) { 4012 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4013 Alignment = getEVTAlignment(SVT); 4014 4015 // Check if the memory reference references a frame index 4016 if (!SV) 4017 if (const FrameIndexSDNode *FI = 4018 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4019 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4020 4021 MachineFunction &MF = getMachineFunction(); 4022 unsigned Flags = MachineMemOperand::MOStore; 4023 if (isVolatile) 4024 Flags |= MachineMemOperand::MOVolatile; 4025 if (isNonTemporal) 4026 Flags |= MachineMemOperand::MONonTemporal; 4027 MachineMemOperand *MMO = 4028 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4029 4030 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4031} 4032 4033SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4034 SDValue Ptr, EVT SVT, 4035 MachineMemOperand *MMO) { 4036 EVT VT = Val.getValueType(); 4037 4038 if (VT == SVT) 4039 return getStore(Chain, dl, Val, Ptr, MMO); 4040 4041 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4042 "Should only be a truncating store, not extending!"); 4043 assert(VT.isInteger() == SVT.isInteger() && 4044 "Can't do FP-INT conversion!"); 4045 assert(VT.isVector() == SVT.isVector() && 4046 "Cannot use trunc store to convert to or from a vector!"); 4047 assert((!VT.isVector() || 4048 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4049 "Cannot use trunc store to change the number of vector elements!"); 4050 4051 SDVTList VTs = getVTList(MVT::Other); 4052 SDValue Undef = getUNDEF(Ptr.getValueType()); 4053 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4054 FoldingSetNodeID ID; 4055 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4056 ID.AddInteger(SVT.getRawBits()); 4057 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4058 MMO->isNonTemporal())); 4059 void *IP = 0; 4060 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4061 cast<StoreSDNode>(E)->refineAlignment(MMO); 4062 return SDValue(E, 0); 4063 } 4064 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4065 true, SVT, MMO); 4066 CSEMap.InsertNode(N, IP); 4067 AllNodes.push_back(N); 4068 return SDValue(N, 0); 4069} 4070 4071SDValue 4072SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4073 SDValue Offset, ISD::MemIndexedMode AM) { 4074 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4075 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4076 "Store is already a indexed store!"); 4077 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4078 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4079 FoldingSetNodeID ID; 4080 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4081 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4082 ID.AddInteger(ST->getRawSubclassData()); 4083 void *IP = 0; 4084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4085 return SDValue(E, 0); 4086 4087 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4088 ST->isTruncatingStore(), 4089 ST->getMemoryVT(), 4090 ST->getMemOperand()); 4091 CSEMap.InsertNode(N, IP); 4092 AllNodes.push_back(N); 4093 return SDValue(N, 0); 4094} 4095 4096SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4097 SDValue Chain, SDValue Ptr, 4098 SDValue SV) { 4099 SDValue Ops[] = { Chain, Ptr, SV }; 4100 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4101} 4102 4103SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4104 const SDUse *Ops, unsigned NumOps) { 4105 switch (NumOps) { 4106 case 0: return getNode(Opcode, DL, VT); 4107 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4108 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4109 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4110 default: break; 4111 } 4112 4113 // Copy from an SDUse array into an SDValue array for use with 4114 // the regular getNode logic. 4115 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4116 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4117} 4118 4119SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4120 const SDValue *Ops, unsigned NumOps) { 4121 switch (NumOps) { 4122 case 0: return getNode(Opcode, DL, VT); 4123 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4124 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4125 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4126 default: break; 4127 } 4128 4129 switch (Opcode) { 4130 default: break; 4131 case ISD::SELECT_CC: { 4132 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4133 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4134 "LHS and RHS of condition must have same type!"); 4135 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4136 "True and False arms of SelectCC must have same type!"); 4137 assert(Ops[2].getValueType() == VT && 4138 "select_cc node must be of same type as true and false value!"); 4139 break; 4140 } 4141 case ISD::BR_CC: { 4142 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4143 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4144 "LHS/RHS of comparison should match types!"); 4145 break; 4146 } 4147 } 4148 4149 // Memoize nodes. 4150 SDNode *N; 4151 SDVTList VTs = getVTList(VT); 4152 4153 if (VT != MVT::Flag) { 4154 FoldingSetNodeID ID; 4155 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4156 void *IP = 0; 4157 4158 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4159 return SDValue(E, 0); 4160 4161 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4162 CSEMap.InsertNode(N, IP); 4163 } else { 4164 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4165 } 4166 4167 AllNodes.push_back(N); 4168#ifndef NDEBUG 4169 VerifyNode(N); 4170#endif 4171 return SDValue(N, 0); 4172} 4173 4174SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4175 const std::vector<EVT> &ResultTys, 4176 const SDValue *Ops, unsigned NumOps) { 4177 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4178 Ops, NumOps); 4179} 4180 4181SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4182 const EVT *VTs, unsigned NumVTs, 4183 const SDValue *Ops, unsigned NumOps) { 4184 if (NumVTs == 1) 4185 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4186 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4187} 4188 4189SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4190 const SDValue *Ops, unsigned NumOps) { 4191 if (VTList.NumVTs == 1) 4192 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4193 4194#if 0 4195 switch (Opcode) { 4196 // FIXME: figure out how to safely handle things like 4197 // int foo(int x) { return 1 << (x & 255); } 4198 // int bar() { return foo(256); } 4199 case ISD::SRA_PARTS: 4200 case ISD::SRL_PARTS: 4201 case ISD::SHL_PARTS: 4202 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4203 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4204 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4205 else if (N3.getOpcode() == ISD::AND) 4206 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4207 // If the and is only masking out bits that cannot effect the shift, 4208 // eliminate the and. 4209 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4210 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4211 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4212 } 4213 break; 4214 } 4215#endif 4216 4217 // Memoize the node unless it returns a flag. 4218 SDNode *N; 4219 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4220 FoldingSetNodeID ID; 4221 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4222 void *IP = 0; 4223 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4224 return SDValue(E, 0); 4225 4226 if (NumOps == 1) { 4227 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4228 } else if (NumOps == 2) { 4229 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4230 } else if (NumOps == 3) { 4231 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4232 Ops[2]); 4233 } else { 4234 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4235 } 4236 CSEMap.InsertNode(N, IP); 4237 } else { 4238 if (NumOps == 1) { 4239 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4240 } else if (NumOps == 2) { 4241 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4242 } else if (NumOps == 3) { 4243 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4244 Ops[2]); 4245 } else { 4246 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4247 } 4248 } 4249 AllNodes.push_back(N); 4250#ifndef NDEBUG 4251 VerifyNode(N); 4252#endif 4253 return SDValue(N, 0); 4254} 4255 4256SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4257 return getNode(Opcode, DL, VTList, 0, 0); 4258} 4259 4260SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4261 SDValue N1) { 4262 SDValue Ops[] = { N1 }; 4263 return getNode(Opcode, DL, VTList, Ops, 1); 4264} 4265 4266SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4267 SDValue N1, SDValue N2) { 4268 SDValue Ops[] = { N1, N2 }; 4269 return getNode(Opcode, DL, VTList, Ops, 2); 4270} 4271 4272SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4273 SDValue N1, SDValue N2, SDValue N3) { 4274 SDValue Ops[] = { N1, N2, N3 }; 4275 return getNode(Opcode, DL, VTList, Ops, 3); 4276} 4277 4278SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4279 SDValue N1, SDValue N2, SDValue N3, 4280 SDValue N4) { 4281 SDValue Ops[] = { N1, N2, N3, N4 }; 4282 return getNode(Opcode, DL, VTList, Ops, 4); 4283} 4284 4285SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4286 SDValue N1, SDValue N2, SDValue N3, 4287 SDValue N4, SDValue N5) { 4288 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4289 return getNode(Opcode, DL, VTList, Ops, 5); 4290} 4291 4292SDVTList SelectionDAG::getVTList(EVT VT) { 4293 return makeVTList(SDNode::getValueTypeList(VT), 1); 4294} 4295 4296SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4297 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4298 E = VTList.rend(); I != E; ++I) 4299 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4300 return *I; 4301 4302 EVT *Array = Allocator.Allocate<EVT>(2); 4303 Array[0] = VT1; 4304 Array[1] = VT2; 4305 SDVTList Result = makeVTList(Array, 2); 4306 VTList.push_back(Result); 4307 return Result; 4308} 4309 4310SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4311 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4312 E = VTList.rend(); I != E; ++I) 4313 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4314 I->VTs[2] == VT3) 4315 return *I; 4316 4317 EVT *Array = Allocator.Allocate<EVT>(3); 4318 Array[0] = VT1; 4319 Array[1] = VT2; 4320 Array[2] = VT3; 4321 SDVTList Result = makeVTList(Array, 3); 4322 VTList.push_back(Result); 4323 return Result; 4324} 4325 4326SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4327 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4328 E = VTList.rend(); I != E; ++I) 4329 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4330 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4331 return *I; 4332 4333 EVT *Array = Allocator.Allocate<EVT>(4); 4334 Array[0] = VT1; 4335 Array[1] = VT2; 4336 Array[2] = VT3; 4337 Array[3] = VT4; 4338 SDVTList Result = makeVTList(Array, 4); 4339 VTList.push_back(Result); 4340 return Result; 4341} 4342 4343SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4344 switch (NumVTs) { 4345 case 0: llvm_unreachable("Cannot have nodes without results!"); 4346 case 1: return getVTList(VTs[0]); 4347 case 2: return getVTList(VTs[0], VTs[1]); 4348 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4349 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4350 default: break; 4351 } 4352 4353 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4354 E = VTList.rend(); I != E; ++I) { 4355 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4356 continue; 4357 4358 bool NoMatch = false; 4359 for (unsigned i = 2; i != NumVTs; ++i) 4360 if (VTs[i] != I->VTs[i]) { 4361 NoMatch = true; 4362 break; 4363 } 4364 if (!NoMatch) 4365 return *I; 4366 } 4367 4368 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4369 std::copy(VTs, VTs+NumVTs, Array); 4370 SDVTList Result = makeVTList(Array, NumVTs); 4371 VTList.push_back(Result); 4372 return Result; 4373} 4374 4375 4376/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4377/// specified operands. If the resultant node already exists in the DAG, 4378/// this does not modify the specified node, instead it returns the node that 4379/// already exists. If the resultant node does not exist in the DAG, the 4380/// input node is returned. As a degenerate case, if you specify the same 4381/// input operands as the node already has, the input node is returned. 4382SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4383 SDNode *N = InN.getNode(); 4384 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4385 4386 // Check to see if there is no change. 4387 if (Op == N->getOperand(0)) return InN; 4388 4389 // See if the modified node already exists. 4390 void *InsertPos = 0; 4391 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4392 return SDValue(Existing, InN.getResNo()); 4393 4394 // Nope it doesn't. Remove the node from its current place in the maps. 4395 if (InsertPos) 4396 if (!RemoveNodeFromCSEMaps(N)) 4397 InsertPos = 0; 4398 4399 // Now we update the operands. 4400 N->OperandList[0].set(Op); 4401 4402 // If this gets put into a CSE map, add it. 4403 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4404 return InN; 4405} 4406 4407SDValue SelectionDAG:: 4408UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4409 SDNode *N = InN.getNode(); 4410 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4411 4412 // Check to see if there is no change. 4413 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4414 return InN; // No operands changed, just return the input node. 4415 4416 // See if the modified node already exists. 4417 void *InsertPos = 0; 4418 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4419 return SDValue(Existing, InN.getResNo()); 4420 4421 // Nope it doesn't. Remove the node from its current place in the maps. 4422 if (InsertPos) 4423 if (!RemoveNodeFromCSEMaps(N)) 4424 InsertPos = 0; 4425 4426 // Now we update the operands. 4427 if (N->OperandList[0] != Op1) 4428 N->OperandList[0].set(Op1); 4429 if (N->OperandList[1] != Op2) 4430 N->OperandList[1].set(Op2); 4431 4432 // If this gets put into a CSE map, add it. 4433 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4434 return InN; 4435} 4436 4437SDValue SelectionDAG:: 4438UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4439 SDValue Ops[] = { Op1, Op2, Op3 }; 4440 return UpdateNodeOperands(N, Ops, 3); 4441} 4442 4443SDValue SelectionDAG:: 4444UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4445 SDValue Op3, SDValue Op4) { 4446 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4447 return UpdateNodeOperands(N, Ops, 4); 4448} 4449 4450SDValue SelectionDAG:: 4451UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4452 SDValue Op3, SDValue Op4, SDValue Op5) { 4453 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4454 return UpdateNodeOperands(N, Ops, 5); 4455} 4456 4457SDValue SelectionDAG:: 4458UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4459 SDNode *N = InN.getNode(); 4460 assert(N->getNumOperands() == NumOps && 4461 "Update with wrong number of operands"); 4462 4463 // Check to see if there is no change. 4464 bool AnyChange = false; 4465 for (unsigned i = 0; i != NumOps; ++i) { 4466 if (Ops[i] != N->getOperand(i)) { 4467 AnyChange = true; 4468 break; 4469 } 4470 } 4471 4472 // No operands changed, just return the input node. 4473 if (!AnyChange) return InN; 4474 4475 // See if the modified node already exists. 4476 void *InsertPos = 0; 4477 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4478 return SDValue(Existing, InN.getResNo()); 4479 4480 // Nope it doesn't. Remove the node from its current place in the maps. 4481 if (InsertPos) 4482 if (!RemoveNodeFromCSEMaps(N)) 4483 InsertPos = 0; 4484 4485 // Now we update the operands. 4486 for (unsigned i = 0; i != NumOps; ++i) 4487 if (N->OperandList[i] != Ops[i]) 4488 N->OperandList[i].set(Ops[i]); 4489 4490 // If this gets put into a CSE map, add it. 4491 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4492 return InN; 4493} 4494 4495/// DropOperands - Release the operands and set this node to have 4496/// zero operands. 4497void SDNode::DropOperands() { 4498 // Unlike the code in MorphNodeTo that does this, we don't need to 4499 // watch for dead nodes here. 4500 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4501 SDUse &Use = *I++; 4502 Use.set(SDValue()); 4503 } 4504} 4505 4506/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4507/// machine opcode. 4508/// 4509SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4510 EVT VT) { 4511 SDVTList VTs = getVTList(VT); 4512 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4513} 4514 4515SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4516 EVT VT, SDValue Op1) { 4517 SDVTList VTs = getVTList(VT); 4518 SDValue Ops[] = { Op1 }; 4519 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4520} 4521 4522SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4523 EVT VT, SDValue Op1, 4524 SDValue Op2) { 4525 SDVTList VTs = getVTList(VT); 4526 SDValue Ops[] = { Op1, Op2 }; 4527 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4528} 4529 4530SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4531 EVT VT, SDValue Op1, 4532 SDValue Op2, SDValue Op3) { 4533 SDVTList VTs = getVTList(VT); 4534 SDValue Ops[] = { Op1, Op2, Op3 }; 4535 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4536} 4537 4538SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4539 EVT VT, const SDValue *Ops, 4540 unsigned NumOps) { 4541 SDVTList VTs = getVTList(VT); 4542 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4543} 4544 4545SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4546 EVT VT1, EVT VT2, const SDValue *Ops, 4547 unsigned NumOps) { 4548 SDVTList VTs = getVTList(VT1, VT2); 4549 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4550} 4551 4552SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4553 EVT VT1, EVT VT2) { 4554 SDVTList VTs = getVTList(VT1, VT2); 4555 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4556} 4557 4558SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4559 EVT VT1, EVT VT2, EVT VT3, 4560 const SDValue *Ops, unsigned NumOps) { 4561 SDVTList VTs = getVTList(VT1, VT2, VT3); 4562 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4563} 4564 4565SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4566 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4567 const SDValue *Ops, unsigned NumOps) { 4568 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4569 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4570} 4571 4572SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4573 EVT VT1, EVT VT2, 4574 SDValue Op1) { 4575 SDVTList VTs = getVTList(VT1, VT2); 4576 SDValue Ops[] = { Op1 }; 4577 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4578} 4579 4580SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4581 EVT VT1, EVT VT2, 4582 SDValue Op1, SDValue Op2) { 4583 SDVTList VTs = getVTList(VT1, VT2); 4584 SDValue Ops[] = { Op1, Op2 }; 4585 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4586} 4587 4588SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4589 EVT VT1, EVT VT2, 4590 SDValue Op1, SDValue Op2, 4591 SDValue Op3) { 4592 SDVTList VTs = getVTList(VT1, VT2); 4593 SDValue Ops[] = { Op1, Op2, Op3 }; 4594 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4595} 4596 4597SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4598 EVT VT1, EVT VT2, EVT VT3, 4599 SDValue Op1, SDValue Op2, 4600 SDValue Op3) { 4601 SDVTList VTs = getVTList(VT1, VT2, VT3); 4602 SDValue Ops[] = { Op1, Op2, Op3 }; 4603 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4604} 4605 4606SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4607 SDVTList VTs, const SDValue *Ops, 4608 unsigned NumOps) { 4609 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4610 // Reset the NodeID to -1. 4611 N->setNodeId(-1); 4612 return N; 4613} 4614 4615/// MorphNodeTo - This *mutates* the specified node to have the specified 4616/// return type, opcode, and operands. 4617/// 4618/// Note that MorphNodeTo returns the resultant node. If there is already a 4619/// node of the specified opcode and operands, it returns that node instead of 4620/// the current one. Note that the DebugLoc need not be the same. 4621/// 4622/// Using MorphNodeTo is faster than creating a new node and swapping it in 4623/// with ReplaceAllUsesWith both because it often avoids allocating a new 4624/// node, and because it doesn't require CSE recalculation for any of 4625/// the node's users. 4626/// 4627SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4628 SDVTList VTs, const SDValue *Ops, 4629 unsigned NumOps) { 4630 // If an identical node already exists, use it. 4631 void *IP = 0; 4632 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4633 FoldingSetNodeID ID; 4634 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4635 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4636 return ON; 4637 } 4638 4639 if (!RemoveNodeFromCSEMaps(N)) 4640 IP = 0; 4641 4642 // Start the morphing. 4643 N->NodeType = Opc; 4644 N->ValueList = VTs.VTs; 4645 N->NumValues = VTs.NumVTs; 4646 4647 // Clear the operands list, updating used nodes to remove this from their 4648 // use list. Keep track of any operands that become dead as a result. 4649 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4650 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4651 SDUse &Use = *I++; 4652 SDNode *Used = Use.getNode(); 4653 Use.set(SDValue()); 4654 if (Used->use_empty()) 4655 DeadNodeSet.insert(Used); 4656 } 4657 4658 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4659 // Initialize the memory references information. 4660 MN->setMemRefs(0, 0); 4661 // If NumOps is larger than the # of operands we can have in a 4662 // MachineSDNode, reallocate the operand list. 4663 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4664 if (MN->OperandsNeedDelete) 4665 delete[] MN->OperandList; 4666 if (NumOps > array_lengthof(MN->LocalOperands)) 4667 // We're creating a final node that will live unmorphed for the 4668 // remainder of the current SelectionDAG iteration, so we can allocate 4669 // the operands directly out of a pool with no recycling metadata. 4670 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4671 Ops, NumOps); 4672 else 4673 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4674 MN->OperandsNeedDelete = false; 4675 } else 4676 MN->InitOperands(MN->OperandList, Ops, NumOps); 4677 } else { 4678 // If NumOps is larger than the # of operands we currently have, reallocate 4679 // the operand list. 4680 if (NumOps > N->NumOperands) { 4681 if (N->OperandsNeedDelete) 4682 delete[] N->OperandList; 4683 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4684 N->OperandsNeedDelete = true; 4685 } else 4686 N->InitOperands(N->OperandList, Ops, NumOps); 4687 } 4688 4689 // Delete any nodes that are still dead after adding the uses for the 4690 // new operands. 4691 if (!DeadNodeSet.empty()) { 4692 SmallVector<SDNode *, 16> DeadNodes; 4693 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4694 E = DeadNodeSet.end(); I != E; ++I) 4695 if ((*I)->use_empty()) 4696 DeadNodes.push_back(*I); 4697 RemoveDeadNodes(DeadNodes); 4698 } 4699 4700 if (IP) 4701 CSEMap.InsertNode(N, IP); // Memoize the new node. 4702 return N; 4703} 4704 4705 4706/// getMachineNode - These are used for target selectors to create a new node 4707/// with specified return type(s), MachineInstr opcode, and operands. 4708/// 4709/// Note that getMachineNode returns the resultant node. If there is already a 4710/// node of the specified opcode and operands, it returns that node instead of 4711/// the current one. 4712MachineSDNode * 4713SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4714 SDVTList VTs = getVTList(VT); 4715 return getMachineNode(Opcode, dl, VTs, 0, 0); 4716} 4717 4718MachineSDNode * 4719SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4720 SDVTList VTs = getVTList(VT); 4721 SDValue Ops[] = { Op1 }; 4722 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4723} 4724 4725MachineSDNode * 4726SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4727 SDValue Op1, SDValue Op2) { 4728 SDVTList VTs = getVTList(VT); 4729 SDValue Ops[] = { Op1, Op2 }; 4730 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4731} 4732 4733MachineSDNode * 4734SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4735 SDValue Op1, SDValue Op2, SDValue Op3) { 4736 SDVTList VTs = getVTList(VT); 4737 SDValue Ops[] = { Op1, Op2, Op3 }; 4738 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4739} 4740 4741MachineSDNode * 4742SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4743 const SDValue *Ops, unsigned NumOps) { 4744 SDVTList VTs = getVTList(VT); 4745 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4746} 4747 4748MachineSDNode * 4749SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4750 SDVTList VTs = getVTList(VT1, VT2); 4751 return getMachineNode(Opcode, dl, VTs, 0, 0); 4752} 4753 4754MachineSDNode * 4755SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4756 EVT VT1, EVT VT2, SDValue Op1) { 4757 SDVTList VTs = getVTList(VT1, VT2); 4758 SDValue Ops[] = { Op1 }; 4759 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4760} 4761 4762MachineSDNode * 4763SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4764 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4765 SDVTList VTs = getVTList(VT1, VT2); 4766 SDValue Ops[] = { Op1, Op2 }; 4767 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4768} 4769 4770MachineSDNode * 4771SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4772 EVT VT1, EVT VT2, SDValue Op1, 4773 SDValue Op2, SDValue Op3) { 4774 SDVTList VTs = getVTList(VT1, VT2); 4775 SDValue Ops[] = { Op1, Op2, Op3 }; 4776 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4777} 4778 4779MachineSDNode * 4780SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4781 EVT VT1, EVT VT2, 4782 const SDValue *Ops, unsigned NumOps) { 4783 SDVTList VTs = getVTList(VT1, VT2); 4784 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4785} 4786 4787MachineSDNode * 4788SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4789 EVT VT1, EVT VT2, EVT VT3, 4790 SDValue Op1, SDValue Op2) { 4791 SDVTList VTs = getVTList(VT1, VT2, VT3); 4792 SDValue Ops[] = { Op1, Op2 }; 4793 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4794} 4795 4796MachineSDNode * 4797SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4798 EVT VT1, EVT VT2, EVT VT3, 4799 SDValue Op1, SDValue Op2, SDValue Op3) { 4800 SDVTList VTs = getVTList(VT1, VT2, VT3); 4801 SDValue Ops[] = { Op1, Op2, Op3 }; 4802 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4803} 4804 4805MachineSDNode * 4806SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4807 EVT VT1, EVT VT2, EVT VT3, 4808 const SDValue *Ops, unsigned NumOps) { 4809 SDVTList VTs = getVTList(VT1, VT2, VT3); 4810 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4811} 4812 4813MachineSDNode * 4814SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4815 EVT VT2, EVT VT3, EVT VT4, 4816 const SDValue *Ops, unsigned NumOps) { 4817 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4818 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4819} 4820 4821MachineSDNode * 4822SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4823 const std::vector<EVT> &ResultTys, 4824 const SDValue *Ops, unsigned NumOps) { 4825 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4826 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4827} 4828 4829MachineSDNode * 4830SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4831 const SDValue *Ops, unsigned NumOps) { 4832 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4833 MachineSDNode *N; 4834 void *IP; 4835 4836 if (DoCSE) { 4837 FoldingSetNodeID ID; 4838 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4839 IP = 0; 4840 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4841 return cast<MachineSDNode>(E); 4842 } 4843 4844 // Allocate a new MachineSDNode. 4845 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4846 4847 // Initialize the operands list. 4848 if (NumOps > array_lengthof(N->LocalOperands)) 4849 // We're creating a final node that will live unmorphed for the 4850 // remainder of the current SelectionDAG iteration, so we can allocate 4851 // the operands directly out of a pool with no recycling metadata. 4852 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4853 Ops, NumOps); 4854 else 4855 N->InitOperands(N->LocalOperands, Ops, NumOps); 4856 N->OperandsNeedDelete = false; 4857 4858 if (DoCSE) 4859 CSEMap.InsertNode(N, IP); 4860 4861 AllNodes.push_back(N); 4862#ifndef NDEBUG 4863 VerifyNode(N); 4864#endif 4865 return N; 4866} 4867 4868/// getTargetExtractSubreg - A convenience function for creating 4869/// TargetOpcode::EXTRACT_SUBREG nodes. 4870SDValue 4871SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4872 SDValue Operand) { 4873 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4874 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4875 VT, Operand, SRIdxVal); 4876 return SDValue(Subreg, 0); 4877} 4878 4879/// getTargetInsertSubreg - A convenience function for creating 4880/// TargetOpcode::INSERT_SUBREG nodes. 4881SDValue 4882SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4883 SDValue Operand, SDValue Subreg) { 4884 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4885 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4886 VT, Operand, Subreg, SRIdxVal); 4887 return SDValue(Result, 0); 4888} 4889 4890/// getNodeIfExists - Get the specified node if it's already available, or 4891/// else return NULL. 4892SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4893 const SDValue *Ops, unsigned NumOps) { 4894 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4895 FoldingSetNodeID ID; 4896 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4897 void *IP = 0; 4898 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4899 return E; 4900 } 4901 return NULL; 4902} 4903 4904/// getDbgValue - Creates a SDDbgValue node. 4905/// 4906SDDbgValue * 4907SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4908 DebugLoc DL, unsigned O) { 4909 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4910} 4911 4912SDDbgValue * 4913SelectionDAG::getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off, 4914 DebugLoc DL, unsigned O) { 4915 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4916} 4917 4918SDDbgValue * 4919SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4920 DebugLoc DL, unsigned O) { 4921 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4922} 4923 4924namespace { 4925 4926/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4927/// pointed to by a use iterator is deleted, increment the use iterator 4928/// so that it doesn't dangle. 4929/// 4930/// This class also manages a "downlink" DAGUpdateListener, to forward 4931/// messages to ReplaceAllUsesWith's callers. 4932/// 4933class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4934 SelectionDAG::DAGUpdateListener *DownLink; 4935 SDNode::use_iterator &UI; 4936 SDNode::use_iterator &UE; 4937 4938 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4939 // Increment the iterator as needed. 4940 while (UI != UE && N == *UI) 4941 ++UI; 4942 4943 // Then forward the message. 4944 if (DownLink) DownLink->NodeDeleted(N, E); 4945 } 4946 4947 virtual void NodeUpdated(SDNode *N) { 4948 // Just forward the message. 4949 if (DownLink) DownLink->NodeUpdated(N); 4950 } 4951 4952public: 4953 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4954 SDNode::use_iterator &ui, 4955 SDNode::use_iterator &ue) 4956 : DownLink(dl), UI(ui), UE(ue) {} 4957}; 4958 4959} 4960 4961/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4962/// This can cause recursive merging of nodes in the DAG. 4963/// 4964/// This version assumes From has a single result value. 4965/// 4966void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4967 DAGUpdateListener *UpdateListener) { 4968 SDNode *From = FromN.getNode(); 4969 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4970 "Cannot replace with this method!"); 4971 assert(From != To.getNode() && "Cannot replace uses of with self"); 4972 4973 // Iterate over all the existing uses of From. New uses will be added 4974 // to the beginning of the use list, which we avoid visiting. 4975 // This specifically avoids visiting uses of From that arise while the 4976 // replacement is happening, because any such uses would be the result 4977 // of CSE: If an existing node looks like From after one of its operands 4978 // is replaced by To, we don't want to replace of all its users with To 4979 // too. See PR3018 for more info. 4980 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4981 RAUWUpdateListener Listener(UpdateListener, UI, UE); 4982 while (UI != UE) { 4983 SDNode *User = *UI; 4984 4985 // This node is about to morph, remove its old self from the CSE maps. 4986 RemoveNodeFromCSEMaps(User); 4987 4988 // A user can appear in a use list multiple times, and when this 4989 // happens the uses are usually next to each other in the list. 4990 // To help reduce the number of CSE recomputations, process all 4991 // the uses of this user that we can find this way. 4992 do { 4993 SDUse &Use = UI.getUse(); 4994 ++UI; 4995 Use.set(To); 4996 } while (UI != UE && *UI == User); 4997 4998 // Now that we have modified User, add it back to the CSE maps. If it 4999 // already exists there, recursively merge the results together. 5000 AddModifiedNodeToCSEMaps(User, &Listener); 5001 } 5002} 5003 5004/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5005/// This can cause recursive merging of nodes in the DAG. 5006/// 5007/// This version assumes that for each value of From, there is a 5008/// corresponding value in To in the same position with the same type. 5009/// 5010void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5011 DAGUpdateListener *UpdateListener) { 5012#ifndef NDEBUG 5013 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5014 assert((!From->hasAnyUseOfValue(i) || 5015 From->getValueType(i) == To->getValueType(i)) && 5016 "Cannot use this version of ReplaceAllUsesWith!"); 5017#endif 5018 5019 // Handle the trivial case. 5020 if (From == To) 5021 return; 5022 5023 // Iterate over just the existing users of From. See the comments in 5024 // the ReplaceAllUsesWith above. 5025 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5026 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5027 while (UI != UE) { 5028 SDNode *User = *UI; 5029 5030 // This node is about to morph, remove its old self from the CSE maps. 5031 RemoveNodeFromCSEMaps(User); 5032 5033 // A user can appear in a use list multiple times, and when this 5034 // happens the uses are usually next to each other in the list. 5035 // To help reduce the number of CSE recomputations, process all 5036 // the uses of this user that we can find this way. 5037 do { 5038 SDUse &Use = UI.getUse(); 5039 ++UI; 5040 Use.setNode(To); 5041 } while (UI != UE && *UI == User); 5042 5043 // Now that we have modified User, add it back to the CSE maps. If it 5044 // already exists there, recursively merge the results together. 5045 AddModifiedNodeToCSEMaps(User, &Listener); 5046 } 5047} 5048 5049/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5050/// This can cause recursive merging of nodes in the DAG. 5051/// 5052/// This version can replace From with any result values. To must match the 5053/// number and types of values returned by From. 5054void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5055 const SDValue *To, 5056 DAGUpdateListener *UpdateListener) { 5057 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5058 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5059 5060 // Iterate over just the existing users of From. See the comments in 5061 // the ReplaceAllUsesWith above. 5062 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5063 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5064 while (UI != UE) { 5065 SDNode *User = *UI; 5066 5067 // This node is about to morph, remove its old self from the CSE maps. 5068 RemoveNodeFromCSEMaps(User); 5069 5070 // A user can appear in a use list multiple times, and when this 5071 // happens the uses are usually next to each other in the list. 5072 // To help reduce the number of CSE recomputations, process all 5073 // the uses of this user that we can find this way. 5074 do { 5075 SDUse &Use = UI.getUse(); 5076 const SDValue &ToOp = To[Use.getResNo()]; 5077 ++UI; 5078 Use.set(ToOp); 5079 } while (UI != UE && *UI == User); 5080 5081 // Now that we have modified User, add it back to the CSE maps. If it 5082 // already exists there, recursively merge the results together. 5083 AddModifiedNodeToCSEMaps(User, &Listener); 5084 } 5085} 5086 5087/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5088/// uses of other values produced by From.getNode() alone. The Deleted 5089/// vector is handled the same way as for ReplaceAllUsesWith. 5090void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5091 DAGUpdateListener *UpdateListener){ 5092 // Handle the really simple, really trivial case efficiently. 5093 if (From == To) return; 5094 5095 // Handle the simple, trivial, case efficiently. 5096 if (From.getNode()->getNumValues() == 1) { 5097 ReplaceAllUsesWith(From, To, UpdateListener); 5098 return; 5099 } 5100 5101 // Iterate over just the existing users of From. See the comments in 5102 // the ReplaceAllUsesWith above. 5103 SDNode::use_iterator UI = From.getNode()->use_begin(), 5104 UE = From.getNode()->use_end(); 5105 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5106 while (UI != UE) { 5107 SDNode *User = *UI; 5108 bool UserRemovedFromCSEMaps = false; 5109 5110 // A user can appear in a use list multiple times, and when this 5111 // happens the uses are usually next to each other in the list. 5112 // To help reduce the number of CSE recomputations, process all 5113 // the uses of this user that we can find this way. 5114 do { 5115 SDUse &Use = UI.getUse(); 5116 5117 // Skip uses of different values from the same node. 5118 if (Use.getResNo() != From.getResNo()) { 5119 ++UI; 5120 continue; 5121 } 5122 5123 // If this node hasn't been modified yet, it's still in the CSE maps, 5124 // so remove its old self from the CSE maps. 5125 if (!UserRemovedFromCSEMaps) { 5126 RemoveNodeFromCSEMaps(User); 5127 UserRemovedFromCSEMaps = true; 5128 } 5129 5130 ++UI; 5131 Use.set(To); 5132 } while (UI != UE && *UI == User); 5133 5134 // We are iterating over all uses of the From node, so if a use 5135 // doesn't use the specific value, no changes are made. 5136 if (!UserRemovedFromCSEMaps) 5137 continue; 5138 5139 // Now that we have modified User, add it back to the CSE maps. If it 5140 // already exists there, recursively merge the results together. 5141 AddModifiedNodeToCSEMaps(User, &Listener); 5142 } 5143} 5144 5145namespace { 5146 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5147 /// to record information about a use. 5148 struct UseMemo { 5149 SDNode *User; 5150 unsigned Index; 5151 SDUse *Use; 5152 }; 5153 5154 /// operator< - Sort Memos by User. 5155 bool operator<(const UseMemo &L, const UseMemo &R) { 5156 return (intptr_t)L.User < (intptr_t)R.User; 5157 } 5158} 5159 5160/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5161/// uses of other values produced by From.getNode() alone. The same value 5162/// may appear in both the From and To list. The Deleted vector is 5163/// handled the same way as for ReplaceAllUsesWith. 5164void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5165 const SDValue *To, 5166 unsigned Num, 5167 DAGUpdateListener *UpdateListener){ 5168 // Handle the simple, trivial case efficiently. 5169 if (Num == 1) 5170 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5171 5172 // Read up all the uses and make records of them. This helps 5173 // processing new uses that are introduced during the 5174 // replacement process. 5175 SmallVector<UseMemo, 4> Uses; 5176 for (unsigned i = 0; i != Num; ++i) { 5177 unsigned FromResNo = From[i].getResNo(); 5178 SDNode *FromNode = From[i].getNode(); 5179 for (SDNode::use_iterator UI = FromNode->use_begin(), 5180 E = FromNode->use_end(); UI != E; ++UI) { 5181 SDUse &Use = UI.getUse(); 5182 if (Use.getResNo() == FromResNo) { 5183 UseMemo Memo = { *UI, i, &Use }; 5184 Uses.push_back(Memo); 5185 } 5186 } 5187 } 5188 5189 // Sort the uses, so that all the uses from a given User are together. 5190 std::sort(Uses.begin(), Uses.end()); 5191 5192 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5193 UseIndex != UseIndexEnd; ) { 5194 // We know that this user uses some value of From. If it is the right 5195 // value, update it. 5196 SDNode *User = Uses[UseIndex].User; 5197 5198 // This node is about to morph, remove its old self from the CSE maps. 5199 RemoveNodeFromCSEMaps(User); 5200 5201 // The Uses array is sorted, so all the uses for a given User 5202 // are next to each other in the list. 5203 // To help reduce the number of CSE recomputations, process all 5204 // the uses of this user that we can find this way. 5205 do { 5206 unsigned i = Uses[UseIndex].Index; 5207 SDUse &Use = *Uses[UseIndex].Use; 5208 ++UseIndex; 5209 5210 Use.set(To[i]); 5211 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5212 5213 // Now that we have modified User, add it back to the CSE maps. If it 5214 // already exists there, recursively merge the results together. 5215 AddModifiedNodeToCSEMaps(User, UpdateListener); 5216 } 5217} 5218 5219/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5220/// based on their topological order. It returns the maximum id and a vector 5221/// of the SDNodes* in assigned order by reference. 5222unsigned SelectionDAG::AssignTopologicalOrder() { 5223 5224 unsigned DAGSize = 0; 5225 5226 // SortedPos tracks the progress of the algorithm. Nodes before it are 5227 // sorted, nodes after it are unsorted. When the algorithm completes 5228 // it is at the end of the list. 5229 allnodes_iterator SortedPos = allnodes_begin(); 5230 5231 // Visit all the nodes. Move nodes with no operands to the front of 5232 // the list immediately. Annotate nodes that do have operands with their 5233 // operand count. Before we do this, the Node Id fields of the nodes 5234 // may contain arbitrary values. After, the Node Id fields for nodes 5235 // before SortedPos will contain the topological sort index, and the 5236 // Node Id fields for nodes At SortedPos and after will contain the 5237 // count of outstanding operands. 5238 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5239 SDNode *N = I++; 5240 checkForCycles(N); 5241 unsigned Degree = N->getNumOperands(); 5242 if (Degree == 0) { 5243 // A node with no uses, add it to the result array immediately. 5244 N->setNodeId(DAGSize++); 5245 allnodes_iterator Q = N; 5246 if (Q != SortedPos) 5247 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5248 assert(SortedPos != AllNodes.end() && "Overran node list"); 5249 ++SortedPos; 5250 } else { 5251 // Temporarily use the Node Id as scratch space for the degree count. 5252 N->setNodeId(Degree); 5253 } 5254 } 5255 5256 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5257 // such that by the time the end is reached all nodes will be sorted. 5258 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5259 SDNode *N = I; 5260 checkForCycles(N); 5261 // N is in sorted position, so all its uses have one less operand 5262 // that needs to be sorted. 5263 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5264 UI != UE; ++UI) { 5265 SDNode *P = *UI; 5266 unsigned Degree = P->getNodeId(); 5267 assert(Degree != 0 && "Invalid node degree"); 5268 --Degree; 5269 if (Degree == 0) { 5270 // All of P's operands are sorted, so P may sorted now. 5271 P->setNodeId(DAGSize++); 5272 if (P != SortedPos) 5273 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5274 assert(SortedPos != AllNodes.end() && "Overran node list"); 5275 ++SortedPos; 5276 } else { 5277 // Update P's outstanding operand count. 5278 P->setNodeId(Degree); 5279 } 5280 } 5281 if (I == SortedPos) { 5282#ifndef NDEBUG 5283 SDNode *S = ++I; 5284 dbgs() << "Overran sorted position:\n"; 5285 S->dumprFull(); 5286#endif 5287 llvm_unreachable(0); 5288 } 5289 } 5290 5291 assert(SortedPos == AllNodes.end() && 5292 "Topological sort incomplete!"); 5293 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5294 "First node in topological sort is not the entry token!"); 5295 assert(AllNodes.front().getNodeId() == 0 && 5296 "First node in topological sort has non-zero id!"); 5297 assert(AllNodes.front().getNumOperands() == 0 && 5298 "First node in topological sort has operands!"); 5299 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5300 "Last node in topologic sort has unexpected id!"); 5301 assert(AllNodes.back().use_empty() && 5302 "Last node in topologic sort has users!"); 5303 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5304 return DAGSize; 5305} 5306 5307/// AssignOrdering - Assign an order to the SDNode. 5308void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5309 assert(SD && "Trying to assign an order to a null node!"); 5310 Ordering->add(SD, Order); 5311} 5312 5313/// GetOrdering - Get the order for the SDNode. 5314unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5315 assert(SD && "Trying to get the order of a null node!"); 5316 return Ordering->getOrder(SD); 5317} 5318 5319/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5320/// value is produced by SD. 5321void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) { 5322 DbgInfo->add(DB, SD); 5323 if (SD) 5324 SD->setHasDebugValue(true); 5325} 5326 5327//===----------------------------------------------------------------------===// 5328// SDNode Class 5329//===----------------------------------------------------------------------===// 5330 5331HandleSDNode::~HandleSDNode() { 5332 DropOperands(); 5333} 5334 5335GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5336 EVT VT, int64_t o, unsigned char TF) 5337 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5338 TheGlobal = const_cast<GlobalValue*>(GA); 5339} 5340 5341MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5342 MachineMemOperand *mmo) 5343 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5344 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5345 MMO->isNonTemporal()); 5346 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5347 assert(isNonTemporal() == MMO->isNonTemporal() && 5348 "Non-temporal encoding error!"); 5349 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5350} 5351 5352MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5353 const SDValue *Ops, unsigned NumOps, EVT memvt, 5354 MachineMemOperand *mmo) 5355 : SDNode(Opc, dl, VTs, Ops, NumOps), 5356 MemoryVT(memvt), MMO(mmo) { 5357 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5358 MMO->isNonTemporal()); 5359 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5360 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5361} 5362 5363/// Profile - Gather unique data for the node. 5364/// 5365void SDNode::Profile(FoldingSetNodeID &ID) const { 5366 AddNodeIDNode(ID, this); 5367} 5368 5369namespace { 5370 struct EVTArray { 5371 std::vector<EVT> VTs; 5372 5373 EVTArray() { 5374 VTs.reserve(MVT::LAST_VALUETYPE); 5375 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5376 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5377 } 5378 }; 5379} 5380 5381static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5382static ManagedStatic<EVTArray> SimpleVTArray; 5383static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5384 5385/// getValueTypeList - Return a pointer to the specified value type. 5386/// 5387const EVT *SDNode::getValueTypeList(EVT VT) { 5388 if (VT.isExtended()) { 5389 sys::SmartScopedLock<true> Lock(*VTMutex); 5390 return &(*EVTs->insert(VT).first); 5391 } else { 5392 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5393 } 5394} 5395 5396/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5397/// indicated value. This method ignores uses of other values defined by this 5398/// operation. 5399bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5400 assert(Value < getNumValues() && "Bad value!"); 5401 5402 // TODO: Only iterate over uses of a given value of the node 5403 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5404 if (UI.getUse().getResNo() == Value) { 5405 if (NUses == 0) 5406 return false; 5407 --NUses; 5408 } 5409 } 5410 5411 // Found exactly the right number of uses? 5412 return NUses == 0; 5413} 5414 5415 5416/// hasAnyUseOfValue - Return true if there are any use of the indicated 5417/// value. This method ignores uses of other values defined by this operation. 5418bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5419 assert(Value < getNumValues() && "Bad value!"); 5420 5421 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5422 if (UI.getUse().getResNo() == Value) 5423 return true; 5424 5425 return false; 5426} 5427 5428 5429/// isOnlyUserOf - Return true if this node is the only use of N. 5430/// 5431bool SDNode::isOnlyUserOf(SDNode *N) const { 5432 bool Seen = false; 5433 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5434 SDNode *User = *I; 5435 if (User == this) 5436 Seen = true; 5437 else 5438 return false; 5439 } 5440 5441 return Seen; 5442} 5443 5444/// isOperand - Return true if this node is an operand of N. 5445/// 5446bool SDValue::isOperandOf(SDNode *N) const { 5447 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5448 if (*this == N->getOperand(i)) 5449 return true; 5450 return false; 5451} 5452 5453bool SDNode::isOperandOf(SDNode *N) const { 5454 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5455 if (this == N->OperandList[i].getNode()) 5456 return true; 5457 return false; 5458} 5459 5460/// reachesChainWithoutSideEffects - Return true if this operand (which must 5461/// be a chain) reaches the specified operand without crossing any 5462/// side-effecting instructions. In practice, this looks through token 5463/// factors and non-volatile loads. In order to remain efficient, this only 5464/// looks a couple of nodes in, it does not do an exhaustive search. 5465bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5466 unsigned Depth) const { 5467 if (*this == Dest) return true; 5468 5469 // Don't search too deeply, we just want to be able to see through 5470 // TokenFactor's etc. 5471 if (Depth == 0) return false; 5472 5473 // If this is a token factor, all inputs to the TF happen in parallel. If any 5474 // of the operands of the TF reach dest, then we can do the xform. 5475 if (getOpcode() == ISD::TokenFactor) { 5476 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5477 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5478 return true; 5479 return false; 5480 } 5481 5482 // Loads don't have side effects, look through them. 5483 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5484 if (!Ld->isVolatile()) 5485 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5486 } 5487 return false; 5488} 5489 5490/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5491/// is either an operand of N or it can be reached by traversing up the operands. 5492/// NOTE: this is an expensive method. Use it carefully. 5493bool SDNode::isPredecessorOf(SDNode *N) const { 5494 SmallPtrSet<SDNode *, 32> Visited; 5495 SmallVector<SDNode *, 16> Worklist; 5496 Worklist.push_back(N); 5497 5498 do { 5499 N = Worklist.pop_back_val(); 5500 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5501 SDNode *Op = N->getOperand(i).getNode(); 5502 if (Op == this) 5503 return true; 5504 if (Visited.insert(Op)) 5505 Worklist.push_back(Op); 5506 } 5507 } while (!Worklist.empty()); 5508 5509 return false; 5510} 5511 5512uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5513 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5514 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5515} 5516 5517std::string SDNode::getOperationName(const SelectionDAG *G) const { 5518 switch (getOpcode()) { 5519 default: 5520 if (getOpcode() < ISD::BUILTIN_OP_END) 5521 return "<<Unknown DAG Node>>"; 5522 if (isMachineOpcode()) { 5523 if (G) 5524 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5525 if (getMachineOpcode() < TII->getNumOpcodes()) 5526 return TII->get(getMachineOpcode()).getName(); 5527 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5528 } 5529 if (G) { 5530 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5531 const char *Name = TLI.getTargetNodeName(getOpcode()); 5532 if (Name) return Name; 5533 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5534 } 5535 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5536 5537#ifndef NDEBUG 5538 case ISD::DELETED_NODE: 5539 return "<<Deleted Node!>>"; 5540#endif 5541 case ISD::PREFETCH: return "Prefetch"; 5542 case ISD::MEMBARRIER: return "MemBarrier"; 5543 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5544 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5545 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5546 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5547 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5548 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5549 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5550 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5551 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5552 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5553 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5554 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5555 case ISD::PCMARKER: return "PCMarker"; 5556 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5557 case ISD::SRCVALUE: return "SrcValue"; 5558 case ISD::EntryToken: return "EntryToken"; 5559 case ISD::TokenFactor: return "TokenFactor"; 5560 case ISD::AssertSext: return "AssertSext"; 5561 case ISD::AssertZext: return "AssertZext"; 5562 5563 case ISD::BasicBlock: return "BasicBlock"; 5564 case ISD::VALUETYPE: return "ValueType"; 5565 case ISD::Register: return "Register"; 5566 5567 case ISD::Constant: return "Constant"; 5568 case ISD::ConstantFP: return "ConstantFP"; 5569 case ISD::GlobalAddress: return "GlobalAddress"; 5570 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5571 case ISD::FrameIndex: return "FrameIndex"; 5572 case ISD::JumpTable: return "JumpTable"; 5573 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5574 case ISD::RETURNADDR: return "RETURNADDR"; 5575 case ISD::FRAMEADDR: return "FRAMEADDR"; 5576 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5577 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5578 case ISD::LSDAADDR: return "LSDAADDR"; 5579 case ISD::EHSELECTION: return "EHSELECTION"; 5580 case ISD::EH_RETURN: return "EH_RETURN"; 5581 case ISD::ConstantPool: return "ConstantPool"; 5582 case ISD::ExternalSymbol: return "ExternalSymbol"; 5583 case ISD::BlockAddress: return "BlockAddress"; 5584 case ISD::INTRINSIC_WO_CHAIN: 5585 case ISD::INTRINSIC_VOID: 5586 case ISD::INTRINSIC_W_CHAIN: { 5587 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5588 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5589 if (IID < Intrinsic::num_intrinsics) 5590 return Intrinsic::getName((Intrinsic::ID)IID); 5591 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5592 return TII->getName(IID); 5593 llvm_unreachable("Invalid intrinsic ID"); 5594 } 5595 5596 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5597 case ISD::TargetConstant: return "TargetConstant"; 5598 case ISD::TargetConstantFP:return "TargetConstantFP"; 5599 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5600 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5601 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5602 case ISD::TargetJumpTable: return "TargetJumpTable"; 5603 case ISD::TargetConstantPool: return "TargetConstantPool"; 5604 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5605 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5606 5607 case ISD::CopyToReg: return "CopyToReg"; 5608 case ISD::CopyFromReg: return "CopyFromReg"; 5609 case ISD::UNDEF: return "undef"; 5610 case ISD::MERGE_VALUES: return "merge_values"; 5611 case ISD::INLINEASM: return "inlineasm"; 5612 case ISD::EH_LABEL: return "eh_label"; 5613 case ISD::HANDLENODE: return "handlenode"; 5614 5615 // Unary operators 5616 case ISD::FABS: return "fabs"; 5617 case ISD::FNEG: return "fneg"; 5618 case ISD::FSQRT: return "fsqrt"; 5619 case ISD::FSIN: return "fsin"; 5620 case ISD::FCOS: return "fcos"; 5621 case ISD::FPOWI: return "fpowi"; 5622 case ISD::FPOW: return "fpow"; 5623 case ISD::FTRUNC: return "ftrunc"; 5624 case ISD::FFLOOR: return "ffloor"; 5625 case ISD::FCEIL: return "fceil"; 5626 case ISD::FRINT: return "frint"; 5627 case ISD::FNEARBYINT: return "fnearbyint"; 5628 5629 // Binary operators 5630 case ISD::ADD: return "add"; 5631 case ISD::SUB: return "sub"; 5632 case ISD::MUL: return "mul"; 5633 case ISD::MULHU: return "mulhu"; 5634 case ISD::MULHS: return "mulhs"; 5635 case ISD::SDIV: return "sdiv"; 5636 case ISD::UDIV: return "udiv"; 5637 case ISD::SREM: return "srem"; 5638 case ISD::UREM: return "urem"; 5639 case ISD::SMUL_LOHI: return "smul_lohi"; 5640 case ISD::UMUL_LOHI: return "umul_lohi"; 5641 case ISD::SDIVREM: return "sdivrem"; 5642 case ISD::UDIVREM: return "udivrem"; 5643 case ISD::AND: return "and"; 5644 case ISD::OR: return "or"; 5645 case ISD::XOR: return "xor"; 5646 case ISD::SHL: return "shl"; 5647 case ISD::SRA: return "sra"; 5648 case ISD::SRL: return "srl"; 5649 case ISD::ROTL: return "rotl"; 5650 case ISD::ROTR: return "rotr"; 5651 case ISD::FADD: return "fadd"; 5652 case ISD::FSUB: return "fsub"; 5653 case ISD::FMUL: return "fmul"; 5654 case ISD::FDIV: return "fdiv"; 5655 case ISD::FREM: return "frem"; 5656 case ISD::FCOPYSIGN: return "fcopysign"; 5657 case ISD::FGETSIGN: return "fgetsign"; 5658 5659 case ISD::SETCC: return "setcc"; 5660 case ISD::VSETCC: return "vsetcc"; 5661 case ISD::SELECT: return "select"; 5662 case ISD::SELECT_CC: return "select_cc"; 5663 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5664 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5665 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5666 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5667 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5668 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5669 case ISD::CARRY_FALSE: return "carry_false"; 5670 case ISD::ADDC: return "addc"; 5671 case ISD::ADDE: return "adde"; 5672 case ISD::SADDO: return "saddo"; 5673 case ISD::UADDO: return "uaddo"; 5674 case ISD::SSUBO: return "ssubo"; 5675 case ISD::USUBO: return "usubo"; 5676 case ISD::SMULO: return "smulo"; 5677 case ISD::UMULO: return "umulo"; 5678 case ISD::SUBC: return "subc"; 5679 case ISD::SUBE: return "sube"; 5680 case ISD::SHL_PARTS: return "shl_parts"; 5681 case ISD::SRA_PARTS: return "sra_parts"; 5682 case ISD::SRL_PARTS: return "srl_parts"; 5683 5684 // Conversion operators. 5685 case ISD::SIGN_EXTEND: return "sign_extend"; 5686 case ISD::ZERO_EXTEND: return "zero_extend"; 5687 case ISD::ANY_EXTEND: return "any_extend"; 5688 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5689 case ISD::TRUNCATE: return "truncate"; 5690 case ISD::FP_ROUND: return "fp_round"; 5691 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5692 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5693 case ISD::FP_EXTEND: return "fp_extend"; 5694 5695 case ISD::SINT_TO_FP: return "sint_to_fp"; 5696 case ISD::UINT_TO_FP: return "uint_to_fp"; 5697 case ISD::FP_TO_SINT: return "fp_to_sint"; 5698 case ISD::FP_TO_UINT: return "fp_to_uint"; 5699 case ISD::BIT_CONVERT: return "bit_convert"; 5700 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5701 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5702 5703 case ISD::CONVERT_RNDSAT: { 5704 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5705 default: llvm_unreachable("Unknown cvt code!"); 5706 case ISD::CVT_FF: return "cvt_ff"; 5707 case ISD::CVT_FS: return "cvt_fs"; 5708 case ISD::CVT_FU: return "cvt_fu"; 5709 case ISD::CVT_SF: return "cvt_sf"; 5710 case ISD::CVT_UF: return "cvt_uf"; 5711 case ISD::CVT_SS: return "cvt_ss"; 5712 case ISD::CVT_SU: return "cvt_su"; 5713 case ISD::CVT_US: return "cvt_us"; 5714 case ISD::CVT_UU: return "cvt_uu"; 5715 } 5716 } 5717 5718 // Control flow instructions 5719 case ISD::BR: return "br"; 5720 case ISD::BRIND: return "brind"; 5721 case ISD::BR_JT: return "br_jt"; 5722 case ISD::BRCOND: return "brcond"; 5723 case ISD::BR_CC: return "br_cc"; 5724 case ISD::CALLSEQ_START: return "callseq_start"; 5725 case ISD::CALLSEQ_END: return "callseq_end"; 5726 5727 // Other operators 5728 case ISD::LOAD: return "load"; 5729 case ISD::STORE: return "store"; 5730 case ISD::VAARG: return "vaarg"; 5731 case ISD::VACOPY: return "vacopy"; 5732 case ISD::VAEND: return "vaend"; 5733 case ISD::VASTART: return "vastart"; 5734 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5735 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5736 case ISD::BUILD_PAIR: return "build_pair"; 5737 case ISD::STACKSAVE: return "stacksave"; 5738 case ISD::STACKRESTORE: return "stackrestore"; 5739 case ISD::TRAP: return "trap"; 5740 5741 // Bit manipulation 5742 case ISD::BSWAP: return "bswap"; 5743 case ISD::CTPOP: return "ctpop"; 5744 case ISD::CTTZ: return "cttz"; 5745 case ISD::CTLZ: return "ctlz"; 5746 5747 // Trampolines 5748 case ISD::TRAMPOLINE: return "trampoline"; 5749 5750 case ISD::CONDCODE: 5751 switch (cast<CondCodeSDNode>(this)->get()) { 5752 default: llvm_unreachable("Unknown setcc condition!"); 5753 case ISD::SETOEQ: return "setoeq"; 5754 case ISD::SETOGT: return "setogt"; 5755 case ISD::SETOGE: return "setoge"; 5756 case ISD::SETOLT: return "setolt"; 5757 case ISD::SETOLE: return "setole"; 5758 case ISD::SETONE: return "setone"; 5759 5760 case ISD::SETO: return "seto"; 5761 case ISD::SETUO: return "setuo"; 5762 case ISD::SETUEQ: return "setue"; 5763 case ISD::SETUGT: return "setugt"; 5764 case ISD::SETUGE: return "setuge"; 5765 case ISD::SETULT: return "setult"; 5766 case ISD::SETULE: return "setule"; 5767 case ISD::SETUNE: return "setune"; 5768 5769 case ISD::SETEQ: return "seteq"; 5770 case ISD::SETGT: return "setgt"; 5771 case ISD::SETGE: return "setge"; 5772 case ISD::SETLT: return "setlt"; 5773 case ISD::SETLE: return "setle"; 5774 case ISD::SETNE: return "setne"; 5775 } 5776 } 5777} 5778 5779const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5780 switch (AM) { 5781 default: 5782 return ""; 5783 case ISD::PRE_INC: 5784 return "<pre-inc>"; 5785 case ISD::PRE_DEC: 5786 return "<pre-dec>"; 5787 case ISD::POST_INC: 5788 return "<post-inc>"; 5789 case ISD::POST_DEC: 5790 return "<post-dec>"; 5791 } 5792} 5793 5794std::string ISD::ArgFlagsTy::getArgFlagsString() { 5795 std::string S = "< "; 5796 5797 if (isZExt()) 5798 S += "zext "; 5799 if (isSExt()) 5800 S += "sext "; 5801 if (isInReg()) 5802 S += "inreg "; 5803 if (isSRet()) 5804 S += "sret "; 5805 if (isByVal()) 5806 S += "byval "; 5807 if (isNest()) 5808 S += "nest "; 5809 if (getByValAlign()) 5810 S += "byval-align:" + utostr(getByValAlign()) + " "; 5811 if (getOrigAlign()) 5812 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5813 if (getByValSize()) 5814 S += "byval-size:" + utostr(getByValSize()) + " "; 5815 return S + ">"; 5816} 5817 5818void SDNode::dump() const { dump(0); } 5819void SDNode::dump(const SelectionDAG *G) const { 5820 print(dbgs(), G); 5821} 5822 5823void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5824 OS << (void*)this << ": "; 5825 5826 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5827 if (i) OS << ","; 5828 if (getValueType(i) == MVT::Other) 5829 OS << "ch"; 5830 else 5831 OS << getValueType(i).getEVTString(); 5832 } 5833 OS << " = " << getOperationName(G); 5834} 5835 5836void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5837 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5838 if (!MN->memoperands_empty()) { 5839 OS << "<"; 5840 OS << "Mem:"; 5841 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5842 e = MN->memoperands_end(); i != e; ++i) { 5843 OS << **i; 5844 if (next(i) != e) 5845 OS << " "; 5846 } 5847 OS << ">"; 5848 } 5849 } else if (const ShuffleVectorSDNode *SVN = 5850 dyn_cast<ShuffleVectorSDNode>(this)) { 5851 OS << "<"; 5852 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5853 int Idx = SVN->getMaskElt(i); 5854 if (i) OS << ","; 5855 if (Idx < 0) 5856 OS << "u"; 5857 else 5858 OS << Idx; 5859 } 5860 OS << ">"; 5861 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5862 OS << '<' << CSDN->getAPIntValue() << '>'; 5863 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5864 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5865 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5866 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5867 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5868 else { 5869 OS << "<APFloat("; 5870 CSDN->getValueAPF().bitcastToAPInt().dump(); 5871 OS << ")>"; 5872 } 5873 } else if (const GlobalAddressSDNode *GADN = 5874 dyn_cast<GlobalAddressSDNode>(this)) { 5875 int64_t offset = GADN->getOffset(); 5876 OS << '<'; 5877 WriteAsOperand(OS, GADN->getGlobal()); 5878 OS << '>'; 5879 if (offset > 0) 5880 OS << " + " << offset; 5881 else 5882 OS << " " << offset; 5883 if (unsigned int TF = GADN->getTargetFlags()) 5884 OS << " [TF=" << TF << ']'; 5885 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5886 OS << "<" << FIDN->getIndex() << ">"; 5887 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5888 OS << "<" << JTDN->getIndex() << ">"; 5889 if (unsigned int TF = JTDN->getTargetFlags()) 5890 OS << " [TF=" << TF << ']'; 5891 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5892 int offset = CP->getOffset(); 5893 if (CP->isMachineConstantPoolEntry()) 5894 OS << "<" << *CP->getMachineCPVal() << ">"; 5895 else 5896 OS << "<" << *CP->getConstVal() << ">"; 5897 if (offset > 0) 5898 OS << " + " << offset; 5899 else 5900 OS << " " << offset; 5901 if (unsigned int TF = CP->getTargetFlags()) 5902 OS << " [TF=" << TF << ']'; 5903 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5904 OS << "<"; 5905 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5906 if (LBB) 5907 OS << LBB->getName() << " "; 5908 OS << (const void*)BBDN->getBasicBlock() << ">"; 5909 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5910 if (G && R->getReg() && 5911 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5912 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5913 } else { 5914 OS << " %reg" << R->getReg(); 5915 } 5916 } else if (const ExternalSymbolSDNode *ES = 5917 dyn_cast<ExternalSymbolSDNode>(this)) { 5918 OS << "'" << ES->getSymbol() << "'"; 5919 if (unsigned int TF = ES->getTargetFlags()) 5920 OS << " [TF=" << TF << ']'; 5921 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5922 if (M->getValue()) 5923 OS << "<" << M->getValue() << ">"; 5924 else 5925 OS << "<null>"; 5926 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5927 OS << ":" << N->getVT().getEVTString(); 5928 } 5929 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5930 OS << "<" << *LD->getMemOperand(); 5931 5932 bool doExt = true; 5933 switch (LD->getExtensionType()) { 5934 default: doExt = false; break; 5935 case ISD::EXTLOAD: OS << ", anyext"; break; 5936 case ISD::SEXTLOAD: OS << ", sext"; break; 5937 case ISD::ZEXTLOAD: OS << ", zext"; break; 5938 } 5939 if (doExt) 5940 OS << " from " << LD->getMemoryVT().getEVTString(); 5941 5942 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5943 if (*AM) 5944 OS << ", " << AM; 5945 5946 OS << ">"; 5947 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5948 OS << "<" << *ST->getMemOperand(); 5949 5950 if (ST->isTruncatingStore()) 5951 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5952 5953 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5954 if (*AM) 5955 OS << ", " << AM; 5956 5957 OS << ">"; 5958 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5959 OS << "<" << *M->getMemOperand() << ">"; 5960 } else if (const BlockAddressSDNode *BA = 5961 dyn_cast<BlockAddressSDNode>(this)) { 5962 OS << "<"; 5963 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5964 OS << ", "; 5965 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5966 OS << ">"; 5967 if (unsigned int TF = BA->getTargetFlags()) 5968 OS << " [TF=" << TF << ']'; 5969 } 5970 5971 if (G) 5972 if (unsigned Order = G->GetOrdering(this)) 5973 OS << " [ORD=" << Order << ']'; 5974 5975 if (getNodeId() != -1) 5976 OS << " [ID=" << getNodeId() << ']'; 5977} 5978 5979void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5980 print_types(OS, G); 5981 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5982 if (i) OS << ", "; else OS << " "; 5983 OS << (void*)getOperand(i).getNode(); 5984 if (unsigned RN = getOperand(i).getResNo()) 5985 OS << ":" << RN; 5986 } 5987 print_details(OS, G); 5988} 5989 5990static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 5991 const SelectionDAG *G, unsigned depth, 5992 unsigned indent) 5993{ 5994 if (depth == 0) 5995 return; 5996 5997 OS.indent(indent); 5998 5999 N->print(OS, G); 6000 6001 if (depth < 1) 6002 return; 6003 6004 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6005 OS << '\n'; 6006 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6007 } 6008} 6009 6010void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6011 unsigned depth) const { 6012 printrWithDepthHelper(OS, this, G, depth, 0); 6013} 6014 6015void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6016 // Don't print impossibly deep things. 6017 printrWithDepth(OS, G, 100); 6018} 6019 6020void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6021 printrWithDepth(dbgs(), G, depth); 6022} 6023 6024void SDNode::dumprFull(const SelectionDAG *G) const { 6025 // Don't print impossibly deep things. 6026 dumprWithDepth(G, 100); 6027} 6028 6029static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6030 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6031 if (N->getOperand(i).getNode()->hasOneUse()) 6032 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6033 else 6034 dbgs() << "\n" << std::string(indent+2, ' ') 6035 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6036 6037 6038 dbgs() << "\n"; 6039 dbgs().indent(indent); 6040 N->dump(G); 6041} 6042 6043SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6044 assert(N->getNumValues() == 1 && 6045 "Can't unroll a vector with multiple results!"); 6046 6047 EVT VT = N->getValueType(0); 6048 unsigned NE = VT.getVectorNumElements(); 6049 EVT EltVT = VT.getVectorElementType(); 6050 DebugLoc dl = N->getDebugLoc(); 6051 6052 SmallVector<SDValue, 8> Scalars; 6053 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6054 6055 // If ResNE is 0, fully unroll the vector op. 6056 if (ResNE == 0) 6057 ResNE = NE; 6058 else if (NE > ResNE) 6059 NE = ResNE; 6060 6061 unsigned i; 6062 for (i= 0; i != NE; ++i) { 6063 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 6064 SDValue Operand = N->getOperand(j); 6065 EVT OperandVT = Operand.getValueType(); 6066 if (OperandVT.isVector()) { 6067 // A vector operand; extract a single element. 6068 EVT OperandEltVT = OperandVT.getVectorElementType(); 6069 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6070 OperandEltVT, 6071 Operand, 6072 getConstant(i, MVT::i32)); 6073 } else { 6074 // A scalar operand; just use it as is. 6075 Operands[j] = Operand; 6076 } 6077 } 6078 6079 switch (N->getOpcode()) { 6080 default: 6081 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6082 &Operands[0], Operands.size())); 6083 break; 6084 case ISD::SHL: 6085 case ISD::SRA: 6086 case ISD::SRL: 6087 case ISD::ROTL: 6088 case ISD::ROTR: 6089 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6090 getShiftAmountOperand(Operands[1]))); 6091 break; 6092 case ISD::SIGN_EXTEND_INREG: 6093 case ISD::FP_ROUND_INREG: { 6094 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6095 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6096 Operands[0], 6097 getValueType(ExtVT))); 6098 } 6099 } 6100 } 6101 6102 for (; i < ResNE; ++i) 6103 Scalars.push_back(getUNDEF(EltVT)); 6104 6105 return getNode(ISD::BUILD_VECTOR, dl, 6106 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6107 &Scalars[0], Scalars.size()); 6108} 6109 6110 6111/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6112/// location that is 'Dist' units away from the location that the 'Base' load 6113/// is loading from. 6114bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6115 unsigned Bytes, int Dist) const { 6116 if (LD->getChain() != Base->getChain()) 6117 return false; 6118 EVT VT = LD->getValueType(0); 6119 if (VT.getSizeInBits() / 8 != Bytes) 6120 return false; 6121 6122 SDValue Loc = LD->getOperand(1); 6123 SDValue BaseLoc = Base->getOperand(1); 6124 if (Loc.getOpcode() == ISD::FrameIndex) { 6125 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6126 return false; 6127 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6128 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6129 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6130 int FS = MFI->getObjectSize(FI); 6131 int BFS = MFI->getObjectSize(BFI); 6132 if (FS != BFS || FS != (int)Bytes) return false; 6133 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6134 } 6135 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6136 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6137 if (V && (V->getSExtValue() == Dist*Bytes)) 6138 return true; 6139 } 6140 6141 GlobalValue *GV1 = NULL; 6142 GlobalValue *GV2 = NULL; 6143 int64_t Offset1 = 0; 6144 int64_t Offset2 = 0; 6145 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6146 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6147 if (isGA1 && isGA2 && GV1 == GV2) 6148 return Offset1 == (Offset2 + Dist*Bytes); 6149 return false; 6150} 6151 6152 6153/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6154/// it cannot be inferred. 6155unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6156 // If this is a GlobalAddress + cst, return the alignment. 6157 GlobalValue *GV; 6158 int64_t GVOffset = 0; 6159 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6160 // If GV has specified alignment, then use it. Otherwise, use the preferred 6161 // alignment. 6162 unsigned Align = GV->getAlignment(); 6163 if (!Align) { 6164 if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6165 if (GVar->hasInitializer()) { 6166 const TargetData *TD = TLI.getTargetData(); 6167 Align = TD->getPreferredAlignment(GVar); 6168 } 6169 } 6170 } 6171 return MinAlign(Align, GVOffset); 6172 } 6173 6174 // If this is a direct reference to a stack slot, use information about the 6175 // stack slot's alignment. 6176 int FrameIdx = 1 << 31; 6177 int64_t FrameOffset = 0; 6178 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6179 FrameIdx = FI->getIndex(); 6180 } else if (Ptr.getOpcode() == ISD::ADD && 6181 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6182 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6183 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6184 FrameOffset = Ptr.getConstantOperandVal(1); 6185 } 6186 6187 if (FrameIdx != (1 << 31)) { 6188 // FIXME: Handle FI+CST. 6189 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6190 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6191 FrameOffset); 6192 if (MFI.isFixedObjectIndex(FrameIdx)) { 6193 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6194 6195 // The alignment of the frame index can be determined from its offset from 6196 // the incoming frame position. If the frame object is at offset 32 and 6197 // the stack is guaranteed to be 16-byte aligned, then we know that the 6198 // object is 16-byte aligned. 6199 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6200 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6201 6202 // Finally, the frame object itself may have a known alignment. Factor 6203 // the alignment + offset into a new alignment. For example, if we know 6204 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6205 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6206 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6207 return std::max(Align, FIInfoAlign); 6208 } 6209 return FIInfoAlign; 6210 } 6211 6212 return 0; 6213} 6214 6215void SelectionDAG::dump() const { 6216 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6217 6218 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6219 I != E; ++I) { 6220 const SDNode *N = I; 6221 if (!N->hasOneUse() && N != getRoot().getNode()) 6222 DumpNodes(N, 2, this); 6223 } 6224 6225 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6226 6227 dbgs() << "\n\n"; 6228} 6229 6230void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6231 print_types(OS, G); 6232 print_details(OS, G); 6233} 6234 6235typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6236static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6237 const SelectionDAG *G, VisitedSDNodeSet &once) { 6238 if (!once.insert(N)) // If we've been here before, return now. 6239 return; 6240 6241 // Dump the current SDNode, but don't end the line yet. 6242 OS << std::string(indent, ' '); 6243 N->printr(OS, G); 6244 6245 // Having printed this SDNode, walk the children: 6246 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6247 const SDNode *child = N->getOperand(i).getNode(); 6248 6249 if (i) OS << ","; 6250 OS << " "; 6251 6252 if (child->getNumOperands() == 0) { 6253 // This child has no grandchildren; print it inline right here. 6254 child->printr(OS, G); 6255 once.insert(child); 6256 } else { // Just the address. FIXME: also print the child's opcode. 6257 OS << (void*)child; 6258 if (unsigned RN = N->getOperand(i).getResNo()) 6259 OS << ":" << RN; 6260 } 6261 } 6262 6263 OS << "\n"; 6264 6265 // Dump children that have grandchildren on their own line(s). 6266 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6267 const SDNode *child = N->getOperand(i).getNode(); 6268 DumpNodesr(OS, child, indent+2, G, once); 6269 } 6270} 6271 6272void SDNode::dumpr() const { 6273 VisitedSDNodeSet once; 6274 DumpNodesr(dbgs(), this, 0, 0, once); 6275} 6276 6277void SDNode::dumpr(const SelectionDAG *G) const { 6278 VisitedSDNodeSet once; 6279 DumpNodesr(dbgs(), this, 0, G, once); 6280} 6281 6282 6283// getAddressSpace - Return the address space this GlobalAddress belongs to. 6284unsigned GlobalAddressSDNode::getAddressSpace() const { 6285 return getGlobal()->getType()->getAddressSpace(); 6286} 6287 6288 6289const Type *ConstantPoolSDNode::getType() const { 6290 if (isMachineConstantPoolEntry()) 6291 return Val.MachineCPVal->getType(); 6292 return Val.ConstVal->getType(); 6293} 6294 6295bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6296 APInt &SplatUndef, 6297 unsigned &SplatBitSize, 6298 bool &HasAnyUndefs, 6299 unsigned MinSplatBits, 6300 bool isBigEndian) { 6301 EVT VT = getValueType(0); 6302 assert(VT.isVector() && "Expected a vector type"); 6303 unsigned sz = VT.getSizeInBits(); 6304 if (MinSplatBits > sz) 6305 return false; 6306 6307 SplatValue = APInt(sz, 0); 6308 SplatUndef = APInt(sz, 0); 6309 6310 // Get the bits. Bits with undefined values (when the corresponding element 6311 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6312 // in SplatValue. If any of the values are not constant, give up and return 6313 // false. 6314 unsigned int nOps = getNumOperands(); 6315 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6316 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6317 6318 for (unsigned j = 0; j < nOps; ++j) { 6319 unsigned i = isBigEndian ? nOps-1-j : j; 6320 SDValue OpVal = getOperand(i); 6321 unsigned BitPos = j * EltBitSize; 6322 6323 if (OpVal.getOpcode() == ISD::UNDEF) 6324 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6325 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6326 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6327 zextOrTrunc(sz) << BitPos); 6328 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6329 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6330 else 6331 return false; 6332 } 6333 6334 // The build_vector is all constants or undefs. Find the smallest element 6335 // size that splats the vector. 6336 6337 HasAnyUndefs = (SplatUndef != 0); 6338 while (sz > 8) { 6339 6340 unsigned HalfSize = sz / 2; 6341 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6342 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6343 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6344 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6345 6346 // If the two halves do not match (ignoring undef bits), stop here. 6347 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6348 MinSplatBits > HalfSize) 6349 break; 6350 6351 SplatValue = HighValue | LowValue; 6352 SplatUndef = HighUndef & LowUndef; 6353 6354 sz = HalfSize; 6355 } 6356 6357 SplatBitSize = sz; 6358 return true; 6359} 6360 6361bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6362 // Find the first non-undef value in the shuffle mask. 6363 unsigned i, e; 6364 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6365 /* search */; 6366 6367 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6368 6369 // Make sure all remaining elements are either undef or the same as the first 6370 // non-undef value. 6371 for (int Idx = Mask[i]; i != e; ++i) 6372 if (Mask[i] >= 0 && Mask[i] != Idx) 6373 return false; 6374 return true; 6375} 6376 6377#ifdef XDEBUG 6378static void checkForCyclesHelper(const SDNode *N, 6379 SmallPtrSet<const SDNode*, 32> &Visited, 6380 SmallPtrSet<const SDNode*, 32> &Checked) { 6381 // If this node has already been checked, don't check it again. 6382 if (Checked.count(N)) 6383 return; 6384 6385 // If a node has already been visited on this depth-first walk, reject it as 6386 // a cycle. 6387 if (!Visited.insert(N)) { 6388 dbgs() << "Offending node:\n"; 6389 N->dumprFull(); 6390 errs() << "Detected cycle in SelectionDAG\n"; 6391 abort(); 6392 } 6393 6394 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6395 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6396 6397 Checked.insert(N); 6398 Visited.erase(N); 6399} 6400#endif 6401 6402void llvm::checkForCycles(const llvm::SDNode *N) { 6403#ifdef XDEBUG 6404 assert(N && "Checking nonexistant SDNode"); 6405 SmallPtrSet<const SDNode*, 32> visited; 6406 SmallPtrSet<const SDNode*, 32> checked; 6407 checkForCyclesHelper(N, visited, checked); 6408#endif 6409} 6410 6411void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6412 checkForCycles(DAG->getRoot().getNode()); 6413} 6414