SelectionDAG.cpp revision 58dcd200b7f0ea01160b6159e0363cc96b1b83d9
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeDbgValue.h" 16#include "SDNodeOrdering.h" 17#include "llvm/ADT/SetVector.h" 18#include "llvm/ADT/SmallPtrSet.h" 19#include "llvm/ADT/SmallSet.h" 20#include "llvm/ADT/SmallVector.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/Analysis/TargetTransformInfo.h" 23#include "llvm/Analysis/ValueTracking.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CodeGen/MachineBasicBlock.h" 26#include "llvm/CodeGen/MachineConstantPool.h" 27#include "llvm/CodeGen/MachineFrameInfo.h" 28#include "llvm/CodeGen/MachineModuleInfo.h" 29#include "llvm/DebugInfo.h" 30#include "llvm/IR/CallingConv.h" 31#include "llvm/IR/Constants.h" 32#include "llvm/IR/DataLayout.h" 33#include "llvm/IR/DerivedTypes.h" 34#include "llvm/IR/Function.h" 35#include "llvm/IR/GlobalAlias.h" 36#include "llvm/IR/GlobalVariable.h" 37#include "llvm/IR/Intrinsics.h" 38#include "llvm/Support/CommandLine.h" 39#include "llvm/Support/Debug.h" 40#include "llvm/Support/ErrorHandling.h" 41#include "llvm/Support/ManagedStatic.h" 42#include "llvm/Support/MathExtras.h" 43#include "llvm/Support/Mutex.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Target/TargetInstrInfo.h" 46#include "llvm/Target/TargetIntrinsicInfo.h" 47#include "llvm/Target/TargetLowering.h" 48#include "llvm/Target/TargetMachine.h" 49#include "llvm/Target/TargetOptions.h" 50#include "llvm/Target/TargetRegisterInfo.h" 51#include "llvm/Target/TargetSelectionDAGInfo.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63// Default null implementations of the callbacks. 64void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 65void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 66 67//===----------------------------------------------------------------------===// 68// ConstantFPSDNode Class 69//===----------------------------------------------------------------------===// 70 71/// isExactlyValue - We don't rely on operator== working on double values, as 72/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 73/// As such, this method can be used to do an exact bit-for-bit comparison of 74/// two floating point values. 75bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 76 return getValueAPF().bitwiseIsEqual(V); 77} 78 79bool ConstantFPSDNode::isValueValidForType(EVT VT, 80 const APFloat& Val) { 81 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 82 83 // convert modifies in place, so make a copy. 84 APFloat Val2 = APFloat(Val); 85 bool losesInfo; 86 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT), 87 APFloat::rmNearestTiesToEven, 88 &losesInfo); 89 return !losesInfo; 90} 91 92//===----------------------------------------------------------------------===// 93// ISD Namespace 94//===----------------------------------------------------------------------===// 95 96/// isBuildVectorAllOnes - Return true if the specified node is a 97/// BUILD_VECTOR where all of the elements are ~0 or undef. 98bool ISD::isBuildVectorAllOnes(const SDNode *N) { 99 // Look through a bit convert. 100 if (N->getOpcode() == ISD::BITCAST) 101 N = N->getOperand(0).getNode(); 102 103 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 104 105 unsigned i = 0, e = N->getNumOperands(); 106 107 // Skip over all of the undef values. 108 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 109 ++i; 110 111 // Do not accept an all-undef vector. 112 if (i == e) return false; 113 114 // Do not accept build_vectors that aren't all constants or which have non-~0 115 // elements. We have to be a bit careful here, as the type of the constant 116 // may not be the same as the type of the vector elements due to type 117 // legalization (the elements are promoted to a legal type for the target and 118 // a vector of a type may be legal when the base element type is not). 119 // We only want to check enough bits to cover the vector elements, because 120 // we care if the resultant vector is all ones, not whether the individual 121 // constants are. 122 SDValue NotZero = N->getOperand(i); 123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 124 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) { 125 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 126 return false; 127 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) { 128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 129 return false; 130 } else 131 return false; 132 133 // Okay, we have at least one ~0 value, check to see if the rest match or are 134 // undefs. Even with the above element type twiddling, this should be OK, as 135 // the same type legalization should have applied to all the elements. 136 for (++i; i != e; ++i) 137 if (N->getOperand(i) != NotZero && 138 N->getOperand(i).getOpcode() != ISD::UNDEF) 139 return false; 140 return true; 141} 142 143 144/// isBuildVectorAllZeros - Return true if the specified node is a 145/// BUILD_VECTOR where all of the elements are 0 or undef. 146bool ISD::isBuildVectorAllZeros(const SDNode *N) { 147 // Look through a bit convert. 148 if (N->getOpcode() == ISD::BITCAST) 149 N = N->getOperand(0).getNode(); 150 151 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 152 153 unsigned i = 0, e = N->getNumOperands(); 154 155 // Skip over all of the undef values. 156 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 157 ++i; 158 159 // Do not accept an all-undef vector. 160 if (i == e) return false; 161 162 // Do not accept build_vectors that aren't all constants or which have non-0 163 // elements. 164 SDValue Zero = N->getOperand(i); 165 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) { 166 if (!CN->isNullValue()) 167 return false; 168 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) { 169 if (!CFPN->getValueAPF().isPosZero()) 170 return false; 171 } else 172 return false; 173 174 // Okay, we have at least one 0 value, check to see if the rest match or are 175 // undefs. 176 for (++i; i != e; ++i) 177 if (N->getOperand(i) != Zero && 178 N->getOperand(i).getOpcode() != ISD::UNDEF) 179 return false; 180 return true; 181} 182 183/// isScalarToVector - Return true if the specified node is a 184/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 185/// element is not an undef. 186bool ISD::isScalarToVector(const SDNode *N) { 187 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 188 return true; 189 190 if (N->getOpcode() != ISD::BUILD_VECTOR) 191 return false; 192 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 193 return false; 194 unsigned NumElems = N->getNumOperands(); 195 if (NumElems == 1) 196 return false; 197 for (unsigned i = 1; i < NumElems; ++i) { 198 SDValue V = N->getOperand(i); 199 if (V.getOpcode() != ISD::UNDEF) 200 return false; 201 } 202 return true; 203} 204 205/// allOperandsUndef - Return true if the node has at least one operand 206/// and all operands of the specified node are ISD::UNDEF. 207bool ISD::allOperandsUndef(const SDNode *N) { 208 // Return false if the node has no operands. 209 // This is "logically inconsistent" with the definition of "all" but 210 // is probably the desired behavior. 211 if (N->getNumOperands() == 0) 212 return false; 213 214 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 215 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 216 return false; 217 218 return true; 219} 220 221/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 222/// when given the operation for (X op Y). 223ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 224 // To perform this operation, we just need to swap the L and G bits of the 225 // operation. 226 unsigned OldL = (Operation >> 2) & 1; 227 unsigned OldG = (Operation >> 1) & 1; 228 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 229 (OldL << 1) | // New G bit 230 (OldG << 2)); // New L bit. 231} 232 233/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 234/// 'op' is a valid SetCC operation. 235ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 236 unsigned Operation = Op; 237 if (isInteger) 238 Operation ^= 7; // Flip L, G, E bits, but not U. 239 else 240 Operation ^= 15; // Flip all of the condition bits. 241 242 if (Operation > ISD::SETTRUE2) 243 Operation &= ~8; // Don't let N and U bits get set. 244 245 return ISD::CondCode(Operation); 246} 247 248 249/// isSignedOp - For an integer comparison, return 1 if the comparison is a 250/// signed operation and 2 if the result is an unsigned comparison. Return zero 251/// if the operation does not depend on the sign of the input (setne and seteq). 252static int isSignedOp(ISD::CondCode Opcode) { 253 switch (Opcode) { 254 default: llvm_unreachable("Illegal integer setcc operation!"); 255 case ISD::SETEQ: 256 case ISD::SETNE: return 0; 257 case ISD::SETLT: 258 case ISD::SETLE: 259 case ISD::SETGT: 260 case ISD::SETGE: return 1; 261 case ISD::SETULT: 262 case ISD::SETULE: 263 case ISD::SETUGT: 264 case ISD::SETUGE: return 2; 265 } 266} 267 268/// getSetCCOrOperation - Return the result of a logical OR between different 269/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 270/// returns SETCC_INVALID if it is not possible to represent the resultant 271/// comparison. 272ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 273 bool isInteger) { 274 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 275 // Cannot fold a signed integer setcc with an unsigned integer setcc. 276 return ISD::SETCC_INVALID; 277 278 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 279 280 // If the N and U bits get set then the resultant comparison DOES suddenly 281 // care about orderedness, and is true when ordered. 282 if (Op > ISD::SETTRUE2) 283 Op &= ~16; // Clear the U bit if the N bit is set. 284 285 // Canonicalize illegal integer setcc's. 286 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 287 Op = ISD::SETNE; 288 289 return ISD::CondCode(Op); 290} 291 292/// getSetCCAndOperation - Return the result of a logical AND between different 293/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 294/// function returns zero if it is not possible to represent the resultant 295/// comparison. 296ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 297 bool isInteger) { 298 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 299 // Cannot fold a signed setcc with an unsigned setcc. 300 return ISD::SETCC_INVALID; 301 302 // Combine all of the condition bits. 303 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 304 305 // Canonicalize illegal integer setcc's. 306 if (isInteger) { 307 switch (Result) { 308 default: break; 309 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 310 case ISD::SETOEQ: // SETEQ & SETU[LG]E 311 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 312 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 313 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 314 } 315 } 316 317 return Result; 318} 319 320//===----------------------------------------------------------------------===// 321// SDNode Profile Support 322//===----------------------------------------------------------------------===// 323 324/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 325/// 326static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 327 ID.AddInteger(OpC); 328} 329 330/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 331/// solely with their pointer. 332static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 333 ID.AddPointer(VTList.VTs); 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDValue *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 347/// 348static void AddNodeIDOperands(FoldingSetNodeID &ID, 349 const SDUse *Ops, unsigned NumOps) { 350 for (; NumOps; --NumOps, ++Ops) { 351 ID.AddPointer(Ops->getNode()); 352 ID.AddInteger(Ops->getResNo()); 353 } 354} 355 356static void AddNodeIDNode(FoldingSetNodeID &ID, 357 unsigned short OpC, SDVTList VTList, 358 const SDValue *OpList, unsigned N) { 359 AddNodeIDOpcode(ID, OpC); 360 AddNodeIDValueTypes(ID, VTList); 361 AddNodeIDOperands(ID, OpList, N); 362} 363 364/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 365/// the NodeID data. 366static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 367 switch (N->getOpcode()) { 368 case ISD::TargetExternalSymbol: 369 case ISD::ExternalSymbol: 370 llvm_unreachable("Should only be used on nodes with operands"); 371 default: break; // Normal nodes don't need extra info. 372 case ISD::TargetConstant: 373 case ISD::Constant: 374 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 375 break; 376 case ISD::TargetConstantFP: 377 case ISD::ConstantFP: { 378 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 379 break; 380 } 381 case ISD::TargetGlobalAddress: 382 case ISD::GlobalAddress: 383 case ISD::TargetGlobalTLSAddress: 384 case ISD::GlobalTLSAddress: { 385 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 386 ID.AddPointer(GA->getGlobal()); 387 ID.AddInteger(GA->getOffset()); 388 ID.AddInteger(GA->getTargetFlags()); 389 ID.AddInteger(GA->getAddressSpace()); 390 break; 391 } 392 case ISD::BasicBlock: 393 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 394 break; 395 case ISD::Register: 396 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 397 break; 398 case ISD::RegisterMask: 399 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 400 break; 401 case ISD::SRCVALUE: 402 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 403 break; 404 case ISD::FrameIndex: 405 case ISD::TargetFrameIndex: 406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 407 break; 408 case ISD::JumpTable: 409 case ISD::TargetJumpTable: 410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 411 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 412 break; 413 case ISD::ConstantPool: 414 case ISD::TargetConstantPool: { 415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 416 ID.AddInteger(CP->getAlignment()); 417 ID.AddInteger(CP->getOffset()); 418 if (CP->isMachineConstantPoolEntry()) 419 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 420 else 421 ID.AddPointer(CP->getConstVal()); 422 ID.AddInteger(CP->getTargetFlags()); 423 break; 424 } 425 case ISD::TargetIndex: { 426 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 427 ID.AddInteger(TI->getIndex()); 428 ID.AddInteger(TI->getOffset()); 429 ID.AddInteger(TI->getTargetFlags()); 430 break; 431 } 432 case ISD::LOAD: { 433 const LoadSDNode *LD = cast<LoadSDNode>(N); 434 ID.AddInteger(LD->getMemoryVT().getRawBits()); 435 ID.AddInteger(LD->getRawSubclassData()); 436 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 437 break; 438 } 439 case ISD::STORE: { 440 const StoreSDNode *ST = cast<StoreSDNode>(N); 441 ID.AddInteger(ST->getMemoryVT().getRawBits()); 442 ID.AddInteger(ST->getRawSubclassData()); 443 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 444 break; 445 } 446 case ISD::ATOMIC_CMP_SWAP: 447 case ISD::ATOMIC_SWAP: 448 case ISD::ATOMIC_LOAD_ADD: 449 case ISD::ATOMIC_LOAD_SUB: 450 case ISD::ATOMIC_LOAD_AND: 451 case ISD::ATOMIC_LOAD_OR: 452 case ISD::ATOMIC_LOAD_XOR: 453 case ISD::ATOMIC_LOAD_NAND: 454 case ISD::ATOMIC_LOAD_MIN: 455 case ISD::ATOMIC_LOAD_MAX: 456 case ISD::ATOMIC_LOAD_UMIN: 457 case ISD::ATOMIC_LOAD_UMAX: 458 case ISD::ATOMIC_LOAD: 459 case ISD::ATOMIC_STORE: { 460 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 461 ID.AddInteger(AT->getMemoryVT().getRawBits()); 462 ID.AddInteger(AT->getRawSubclassData()); 463 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 464 break; 465 } 466 case ISD::PREFETCH: { 467 const MemSDNode *PF = cast<MemSDNode>(N); 468 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 469 break; 470 } 471 case ISD::VECTOR_SHUFFLE: { 472 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 473 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 474 i != e; ++i) 475 ID.AddInteger(SVN->getMaskElt(i)); 476 break; 477 } 478 case ISD::TargetBlockAddress: 479 case ISD::BlockAddress: { 480 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N); 481 ID.AddPointer(BA->getBlockAddress()); 482 ID.AddInteger(BA->getOffset()); 483 ID.AddInteger(BA->getTargetFlags()); 484 break; 485 } 486 } // end switch (N->getOpcode()) 487 488 // Target specific memory nodes could also have address spaces to check. 489 if (N->isTargetMemoryOpcode()) 490 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 491} 492 493/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 494/// data. 495static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 496 AddNodeIDOpcode(ID, N->getOpcode()); 497 // Add the return value info. 498 AddNodeIDValueTypes(ID, N->getVTList()); 499 // Add the operand info. 500 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 501 502 // Handle SDNode leafs with special info. 503 AddNodeIDCustom(ID, N); 504} 505 506/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 507/// the CSE map that carries volatility, temporalness, indexing mode, and 508/// extension/truncation information. 509/// 510static inline unsigned 511encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 512 bool isNonTemporal, bool isInvariant) { 513 assert((ConvType & 3) == ConvType && 514 "ConvType may not require more than 2 bits!"); 515 assert((AM & 7) == AM && 516 "AM may not require more than 3 bits!"); 517 return ConvType | 518 (AM << 2) | 519 (isVolatile << 5) | 520 (isNonTemporal << 6) | 521 (isInvariant << 7); 522} 523 524//===----------------------------------------------------------------------===// 525// SelectionDAG Class 526//===----------------------------------------------------------------------===// 527 528/// doNotCSE - Return true if CSE should not be performed for this node. 529static bool doNotCSE(SDNode *N) { 530 if (N->getValueType(0) == MVT::Glue) 531 return true; // Never CSE anything that produces a flag. 532 533 switch (N->getOpcode()) { 534 default: break; 535 case ISD::HANDLENODE: 536 case ISD::EH_LABEL: 537 return true; // Never CSE these nodes. 538 } 539 540 // Check that remaining values produced are not flags. 541 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 542 if (N->getValueType(i) == MVT::Glue) 543 return true; // Never CSE anything that produces a flag. 544 545 return false; 546} 547 548/// RemoveDeadNodes - This method deletes all unreachable nodes in the 549/// SelectionDAG. 550void SelectionDAG::RemoveDeadNodes() { 551 // Create a dummy node (which is not added to allnodes), that adds a reference 552 // to the root node, preventing it from being deleted. 553 HandleSDNode Dummy(getRoot()); 554 555 SmallVector<SDNode*, 128> DeadNodes; 556 557 // Add all obviously-dead nodes to the DeadNodes worklist. 558 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 559 if (I->use_empty()) 560 DeadNodes.push_back(I); 561 562 RemoveDeadNodes(DeadNodes); 563 564 // If the root changed (e.g. it was a dead load, update the root). 565 setRoot(Dummy.getValue()); 566} 567 568/// RemoveDeadNodes - This method deletes the unreachable nodes in the 569/// given list, and any nodes that become unreachable as a result. 570void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 571 572 // Process the worklist, deleting the nodes and adding their uses to the 573 // worklist. 574 while (!DeadNodes.empty()) { 575 SDNode *N = DeadNodes.pop_back_val(); 576 577 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 578 DUL->NodeDeleted(N, 0); 579 580 // Take the node out of the appropriate CSE map. 581 RemoveNodeFromCSEMaps(N); 582 583 // Next, brutally remove the operand list. This is safe to do, as there are 584 // no cycles in the graph. 585 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 586 SDUse &Use = *I++; 587 SDNode *Operand = Use.getNode(); 588 Use.set(SDValue()); 589 590 // Now that we removed this operand, see if there are no uses of it left. 591 if (Operand->use_empty()) 592 DeadNodes.push_back(Operand); 593 } 594 595 DeallocateNode(N); 596 } 597} 598 599void SelectionDAG::RemoveDeadNode(SDNode *N){ 600 SmallVector<SDNode*, 16> DeadNodes(1, N); 601 602 // Create a dummy node that adds a reference to the root node, preventing 603 // it from being deleted. (This matters if the root is an operand of the 604 // dead node.) 605 HandleSDNode Dummy(getRoot()); 606 607 RemoveDeadNodes(DeadNodes); 608} 609 610void SelectionDAG::DeleteNode(SDNode *N) { 611 // First take this out of the appropriate CSE map. 612 RemoveNodeFromCSEMaps(N); 613 614 // Finally, remove uses due to operands of this node, remove from the 615 // AllNodes list, and delete the node. 616 DeleteNodeNotInCSEMaps(N); 617} 618 619void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 620 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 621 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 622 623 // Drop all of the operands and decrement used node's use counts. 624 N->DropOperands(); 625 626 DeallocateNode(N); 627} 628 629void SelectionDAG::DeallocateNode(SDNode *N) { 630 if (N->OperandsNeedDelete) 631 delete[] N->OperandList; 632 633 // Set the opcode to DELETED_NODE to help catch bugs when node 634 // memory is reallocated. 635 N->NodeType = ISD::DELETED_NODE; 636 637 NodeAllocator.Deallocate(AllNodes.remove(N)); 638 639 // Remove the ordering of this node. 640 Ordering->remove(N); 641 642 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 643 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 644 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 645 DbgVals[i]->setIsInvalidated(); 646} 647 648/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 649/// correspond to it. This is useful when we're about to delete or repurpose 650/// the node. We don't want future request for structurally identical nodes 651/// to return N anymore. 652bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 653 bool Erased = false; 654 switch (N->getOpcode()) { 655 case ISD::HANDLENODE: return false; // noop. 656 case ISD::CONDCODE: 657 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 658 "Cond code doesn't exist!"); 659 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 660 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 661 break; 662 case ISD::ExternalSymbol: 663 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 664 break; 665 case ISD::TargetExternalSymbol: { 666 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 667 Erased = TargetExternalSymbols.erase( 668 std::pair<std::string,unsigned char>(ESN->getSymbol(), 669 ESN->getTargetFlags())); 670 break; 671 } 672 case ISD::VALUETYPE: { 673 EVT VT = cast<VTSDNode>(N)->getVT(); 674 if (VT.isExtended()) { 675 Erased = ExtendedValueTypeNodes.erase(VT); 676 } else { 677 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 678 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 679 } 680 break; 681 } 682 default: 683 // Remove it from the CSE Map. 684 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 685 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 686 Erased = CSEMap.RemoveNode(N); 687 break; 688 } 689#ifndef NDEBUG 690 // Verify that the node was actually in one of the CSE maps, unless it has a 691 // flag result (which cannot be CSE'd) or is one of the special cases that are 692 // not subject to CSE. 693 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 694 !N->isMachineOpcode() && !doNotCSE(N)) { 695 N->dump(this); 696 dbgs() << "\n"; 697 llvm_unreachable("Node is not in map!"); 698 } 699#endif 700 return Erased; 701} 702 703/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 704/// maps and modified in place. Add it back to the CSE maps, unless an identical 705/// node already exists, in which case transfer all its users to the existing 706/// node. This transfer can potentially trigger recursive merging. 707/// 708void 709SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 710 // For node types that aren't CSE'd, just act as if no identical node 711 // already exists. 712 if (!doNotCSE(N)) { 713 SDNode *Existing = CSEMap.GetOrInsertNode(N); 714 if (Existing != N) { 715 // If there was already an existing matching node, use ReplaceAllUsesWith 716 // to replace the dead one with the existing one. This can cause 717 // recursive merging of other unrelated nodes down the line. 718 ReplaceAllUsesWith(N, Existing); 719 720 // N is now dead. Inform the listeners and delete it. 721 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 722 DUL->NodeDeleted(N, Existing); 723 DeleteNodeNotInCSEMaps(N); 724 return; 725 } 726 } 727 728 // If the node doesn't already exist, we updated it. Inform listeners. 729 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 730 DUL->NodeUpdated(N); 731} 732 733/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 734/// were replaced with those specified. If this node is never memoized, 735/// return null, otherwise return a pointer to the slot it would take. If a 736/// node already exists with these operands, the slot will be non-null. 737SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 738 void *&InsertPos) { 739 if (doNotCSE(N)) 740 return 0; 741 742 SDValue Ops[] = { Op }; 743 FoldingSetNodeID ID; 744 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 745 AddNodeIDCustom(ID, N); 746 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 747 return Node; 748} 749 750/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 751/// were replaced with those specified. If this node is never memoized, 752/// return null, otherwise return a pointer to the slot it would take. If a 753/// node already exists with these operands, the slot will be non-null. 754SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 755 SDValue Op1, SDValue Op2, 756 void *&InsertPos) { 757 if (doNotCSE(N)) 758 return 0; 759 760 SDValue Ops[] = { Op1, Op2 }; 761 FoldingSetNodeID ID; 762 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 763 AddNodeIDCustom(ID, N); 764 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 765 return Node; 766} 767 768 769/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 770/// were replaced with those specified. If this node is never memoized, 771/// return null, otherwise return a pointer to the slot it would take. If a 772/// node already exists with these operands, the slot will be non-null. 773SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 774 const SDValue *Ops,unsigned NumOps, 775 void *&InsertPos) { 776 if (doNotCSE(N)) 777 return 0; 778 779 FoldingSetNodeID ID; 780 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 781 AddNodeIDCustom(ID, N); 782 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 783 return Node; 784} 785 786#ifndef NDEBUG 787/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 788static void VerifyNodeCommon(SDNode *N) { 789 switch (N->getOpcode()) { 790 default: 791 break; 792 case ISD::BUILD_PAIR: { 793 EVT VT = N->getValueType(0); 794 assert(N->getNumValues() == 1 && "Too many results!"); 795 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 796 "Wrong return type!"); 797 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 798 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 799 "Mismatched operand types!"); 800 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 801 "Wrong operand type!"); 802 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 803 "Wrong return type size"); 804 break; 805 } 806 case ISD::BUILD_VECTOR: { 807 assert(N->getNumValues() == 1 && "Too many results!"); 808 assert(N->getValueType(0).isVector() && "Wrong return type!"); 809 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 810 "Wrong number of operands!"); 811 EVT EltVT = N->getValueType(0).getVectorElementType(); 812 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 813 assert((I->getValueType() == EltVT || 814 (EltVT.isInteger() && I->getValueType().isInteger() && 815 EltVT.bitsLE(I->getValueType()))) && 816 "Wrong operand type!"); 817 assert(I->getValueType() == N->getOperand(0).getValueType() && 818 "Operands must all have the same type"); 819 } 820 break; 821 } 822 } 823} 824 825/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 826static void VerifySDNode(SDNode *N) { 827 // The SDNode allocators cannot be used to allocate nodes with fields that are 828 // not present in an SDNode! 829 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 830 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 831 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 832 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 833 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 834 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 835 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 836 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 837 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 838 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 839 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 840 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 841 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 842 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 843 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 844 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 845 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 846 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 847 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 848 849 VerifyNodeCommon(N); 850} 851 852/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 853/// invalid. 854static void VerifyMachineNode(SDNode *N) { 855 // The MachineNode allocators cannot be used to allocate nodes with fields 856 // that are not present in a MachineNode! 857 // Currently there are no such nodes. 858 859 VerifyNodeCommon(N); 860} 861#endif // NDEBUG 862 863/// getEVTAlignment - Compute the default alignment value for the 864/// given type. 865/// 866unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 867 Type *Ty = VT == MVT::iPTR ? 868 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 869 VT.getTypeForEVT(*getContext()); 870 871 return TLI.getDataLayout()->getABITypeAlignment(Ty); 872} 873 874// EntryNode could meaningfully have debug info if we can find it... 875SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 876 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 877 TTI(0), OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), 878 getVTList(MVT::Other)), 879 Root(getEntryNode()), Ordering(0), UpdateListeners(0) { 880 AllNodes.push_back(&EntryNode); 881 Ordering = new SDNodeOrdering(); 882 DbgInfo = new SDDbgInfo(); 883} 884 885void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) { 886 MF = &mf; 887 TTI = tti; 888 Context = &mf.getFunction()->getContext(); 889} 890 891SelectionDAG::~SelectionDAG() { 892 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 893 allnodes_clear(); 894 delete Ordering; 895 delete DbgInfo; 896} 897 898void SelectionDAG::allnodes_clear() { 899 assert(&*AllNodes.begin() == &EntryNode); 900 AllNodes.remove(AllNodes.begin()); 901 while (!AllNodes.empty()) 902 DeallocateNode(AllNodes.begin()); 903} 904 905void SelectionDAG::clear() { 906 allnodes_clear(); 907 OperandAllocator.Reset(); 908 CSEMap.clear(); 909 910 ExtendedValueTypeNodes.clear(); 911 ExternalSymbols.clear(); 912 TargetExternalSymbols.clear(); 913 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 914 static_cast<CondCodeSDNode*>(0)); 915 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 916 static_cast<SDNode*>(0)); 917 918 EntryNode.UseList = 0; 919 AllNodes.push_back(&EntryNode); 920 Root = getEntryNode(); 921 Ordering->clear(); 922 DbgInfo->clear(); 923} 924 925SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 926 return VT.bitsGT(Op.getValueType()) ? 927 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 928 getNode(ISD::TRUNCATE, DL, VT, Op); 929} 930 931SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 932 return VT.bitsGT(Op.getValueType()) ? 933 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 934 getNode(ISD::TRUNCATE, DL, VT, Op); 935} 936 937SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 938 return VT.bitsGT(Op.getValueType()) ? 939 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 940 getNode(ISD::TRUNCATE, DL, VT, Op); 941} 942 943SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 944 assert(!VT.isVector() && 945 "getZeroExtendInReg should use the vector element type instead of " 946 "the vector type!"); 947 if (Op.getValueType() == VT) return Op; 948 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 949 APInt Imm = APInt::getLowBitsSet(BitWidth, 950 VT.getSizeInBits()); 951 return getNode(ISD::AND, DL, Op.getValueType(), Op, 952 getConstant(Imm, Op.getValueType())); 953} 954 955/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 956/// 957SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 958 EVT EltVT = VT.getScalarType(); 959 SDValue NegOne = 960 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 961 return getNode(ISD::XOR, DL, VT, Val, NegOne); 962} 963 964SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 965 EVT EltVT = VT.getScalarType(); 966 assert((EltVT.getSizeInBits() >= 64 || 967 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 968 "getConstant with a uint64_t value that doesn't fit in the type!"); 969 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 970} 971 972SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 973 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 974} 975 976SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 977 assert(VT.isInteger() && "Cannot create FP integer constant!"); 978 979 EVT EltVT = VT.getScalarType(); 980 const ConstantInt *Elt = &Val; 981 982 // In some cases the vector type is legal but the element type is illegal and 983 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 984 // inserted value (the type does not need to match the vector element type). 985 // Any extra bits introduced will be truncated away. 986 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 987 TargetLowering::TypePromoteInteger) { 988 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 989 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 990 Elt = ConstantInt::get(*getContext(), NewVal); 991 } 992 993 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 994 "APInt size does not match type size!"); 995 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 996 FoldingSetNodeID ID; 997 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 998 ID.AddPointer(Elt); 999 void *IP = 0; 1000 SDNode *N = NULL; 1001 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1002 if (!VT.isVector()) 1003 return SDValue(N, 0); 1004 1005 if (!N) { 1006 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1007 CSEMap.InsertNode(N, IP); 1008 AllNodes.push_back(N); 1009 } 1010 1011 SDValue Result(N, 0); 1012 if (VT.isVector()) { 1013 SmallVector<SDValue, 8> Ops; 1014 Ops.assign(VT.getVectorNumElements(), Result); 1015 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1016 } 1017 return Result; 1018} 1019 1020SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1021 return getConstant(Val, TLI.getPointerTy(), isTarget); 1022} 1023 1024 1025SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1026 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1027} 1028 1029SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1030 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1031 1032 EVT EltVT = VT.getScalarType(); 1033 1034 // Do the map lookup using the actual bit pattern for the floating point 1035 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1036 // we don't have issues with SNANs. 1037 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1038 FoldingSetNodeID ID; 1039 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1040 ID.AddPointer(&V); 1041 void *IP = 0; 1042 SDNode *N = NULL; 1043 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1044 if (!VT.isVector()) 1045 return SDValue(N, 0); 1046 1047 if (!N) { 1048 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1049 CSEMap.InsertNode(N, IP); 1050 AllNodes.push_back(N); 1051 } 1052 1053 SDValue Result(N, 0); 1054 if (VT.isVector()) { 1055 SmallVector<SDValue, 8> Ops; 1056 Ops.assign(VT.getVectorNumElements(), Result); 1057 // FIXME DebugLoc info might be appropriate here 1058 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1059 } 1060 return Result; 1061} 1062 1063SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1064 EVT EltVT = VT.getScalarType(); 1065 if (EltVT==MVT::f32) 1066 return getConstantFP(APFloat((float)Val), VT, isTarget); 1067 else if (EltVT==MVT::f64) 1068 return getConstantFP(APFloat(Val), VT, isTarget); 1069 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 || 1070 EltVT==MVT::f16) { 1071 bool ignored; 1072 APFloat apf = APFloat(Val); 1073 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1074 &ignored); 1075 return getConstantFP(apf, VT, isTarget); 1076 } else 1077 llvm_unreachable("Unsupported type in getConstantFP"); 1078} 1079 1080SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1081 EVT VT, int64_t Offset, 1082 bool isTargetGA, 1083 unsigned char TargetFlags) { 1084 assert((TargetFlags == 0 || isTargetGA) && 1085 "Cannot set target flags on target-independent globals"); 1086 1087 // Truncate (with sign-extension) the offset value to the pointer size. 1088 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 1089 if (BitWidth < 64) 1090 Offset = SignExtend64(Offset, BitWidth); 1091 1092 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1093 if (!GVar) { 1094 // If GV is an alias then use the aliasee for determining thread-localness. 1095 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1096 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1097 } 1098 1099 unsigned Opc; 1100 if (GVar && GVar->isThreadLocal()) 1101 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1102 else 1103 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1104 1105 FoldingSetNodeID ID; 1106 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1107 ID.AddPointer(GV); 1108 ID.AddInteger(Offset); 1109 ID.AddInteger(TargetFlags); 1110 ID.AddInteger(GV->getType()->getAddressSpace()); 1111 void *IP = 0; 1112 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1113 return SDValue(E, 0); 1114 1115 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1116 Offset, TargetFlags); 1117 CSEMap.InsertNode(N, IP); 1118 AllNodes.push_back(N); 1119 return SDValue(N, 0); 1120} 1121 1122SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1123 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1124 FoldingSetNodeID ID; 1125 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1126 ID.AddInteger(FI); 1127 void *IP = 0; 1128 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1129 return SDValue(E, 0); 1130 1131 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1132 CSEMap.InsertNode(N, IP); 1133 AllNodes.push_back(N); 1134 return SDValue(N, 0); 1135} 1136 1137SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1138 unsigned char TargetFlags) { 1139 assert((TargetFlags == 0 || isTarget) && 1140 "Cannot set target flags on target-independent jump tables"); 1141 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1142 FoldingSetNodeID ID; 1143 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1144 ID.AddInteger(JTI); 1145 ID.AddInteger(TargetFlags); 1146 void *IP = 0; 1147 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1148 return SDValue(E, 0); 1149 1150 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1151 TargetFlags); 1152 CSEMap.InsertNode(N, IP); 1153 AllNodes.push_back(N); 1154 return SDValue(N, 0); 1155} 1156 1157SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1158 unsigned Alignment, int Offset, 1159 bool isTarget, 1160 unsigned char TargetFlags) { 1161 assert((TargetFlags == 0 || isTarget) && 1162 "Cannot set target flags on target-independent globals"); 1163 if (Alignment == 0) 1164 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1165 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1166 FoldingSetNodeID ID; 1167 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1168 ID.AddInteger(Alignment); 1169 ID.AddInteger(Offset); 1170 ID.AddPointer(C); 1171 ID.AddInteger(TargetFlags); 1172 void *IP = 0; 1173 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1174 return SDValue(E, 0); 1175 1176 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1177 Alignment, TargetFlags); 1178 CSEMap.InsertNode(N, IP); 1179 AllNodes.push_back(N); 1180 return SDValue(N, 0); 1181} 1182 1183 1184SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1185 unsigned Alignment, int Offset, 1186 bool isTarget, 1187 unsigned char TargetFlags) { 1188 assert((TargetFlags == 0 || isTarget) && 1189 "Cannot set target flags on target-independent globals"); 1190 if (Alignment == 0) 1191 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1192 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1193 FoldingSetNodeID ID; 1194 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1195 ID.AddInteger(Alignment); 1196 ID.AddInteger(Offset); 1197 C->addSelectionDAGCSEId(ID); 1198 ID.AddInteger(TargetFlags); 1199 void *IP = 0; 1200 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1201 return SDValue(E, 0); 1202 1203 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1204 Alignment, TargetFlags); 1205 CSEMap.InsertNode(N, IP); 1206 AllNodes.push_back(N); 1207 return SDValue(N, 0); 1208} 1209 1210SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1211 unsigned char TargetFlags) { 1212 FoldingSetNodeID ID; 1213 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1214 ID.AddInteger(Index); 1215 ID.AddInteger(Offset); 1216 ID.AddInteger(TargetFlags); 1217 void *IP = 0; 1218 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1219 return SDValue(E, 0); 1220 1221 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1222 TargetFlags); 1223 CSEMap.InsertNode(N, IP); 1224 AllNodes.push_back(N); 1225 return SDValue(N, 0); 1226} 1227 1228SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1229 FoldingSetNodeID ID; 1230 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1231 ID.AddPointer(MBB); 1232 void *IP = 0; 1233 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1234 return SDValue(E, 0); 1235 1236 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1237 CSEMap.InsertNode(N, IP); 1238 AllNodes.push_back(N); 1239 return SDValue(N, 0); 1240} 1241 1242SDValue SelectionDAG::getValueType(EVT VT) { 1243 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1244 ValueTypeNodes.size()) 1245 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1246 1247 SDNode *&N = VT.isExtended() ? 1248 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1249 1250 if (N) return SDValue(N, 0); 1251 N = new (NodeAllocator) VTSDNode(VT); 1252 AllNodes.push_back(N); 1253 return SDValue(N, 0); 1254} 1255 1256SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1257 SDNode *&N = ExternalSymbols[Sym]; 1258 if (N) return SDValue(N, 0); 1259 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1260 AllNodes.push_back(N); 1261 return SDValue(N, 0); 1262} 1263 1264SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1265 unsigned char TargetFlags) { 1266 SDNode *&N = 1267 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1268 TargetFlags)]; 1269 if (N) return SDValue(N, 0); 1270 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1271 AllNodes.push_back(N); 1272 return SDValue(N, 0); 1273} 1274 1275SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1276 if ((unsigned)Cond >= CondCodeNodes.size()) 1277 CondCodeNodes.resize(Cond+1); 1278 1279 if (CondCodeNodes[Cond] == 0) { 1280 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1281 CondCodeNodes[Cond] = N; 1282 AllNodes.push_back(N); 1283 } 1284 1285 return SDValue(CondCodeNodes[Cond], 0); 1286} 1287 1288// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1289// the shuffle mask M that point at N1 to point at N2, and indices that point 1290// N2 to point at N1. 1291static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1292 std::swap(N1, N2); 1293 int NElts = M.size(); 1294 for (int i = 0; i != NElts; ++i) { 1295 if (M[i] >= NElts) 1296 M[i] -= NElts; 1297 else if (M[i] >= 0) 1298 M[i] += NElts; 1299 } 1300} 1301 1302SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1303 SDValue N2, const int *Mask) { 1304 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1305 assert(VT.isVector() && N1.getValueType().isVector() && 1306 "Vector Shuffle VTs must be a vectors"); 1307 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1308 && "Vector Shuffle VTs must have same element type"); 1309 1310 // Canonicalize shuffle undef, undef -> undef 1311 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1312 return getUNDEF(VT); 1313 1314 // Validate that all indices in Mask are within the range of the elements 1315 // input to the shuffle. 1316 unsigned NElts = VT.getVectorNumElements(); 1317 SmallVector<int, 8> MaskVec; 1318 for (unsigned i = 0; i != NElts; ++i) { 1319 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1320 MaskVec.push_back(Mask[i]); 1321 } 1322 1323 // Canonicalize shuffle v, v -> v, undef 1324 if (N1 == N2) { 1325 N2 = getUNDEF(VT); 1326 for (unsigned i = 0; i != NElts; ++i) 1327 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1328 } 1329 1330 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1331 if (N1.getOpcode() == ISD::UNDEF) 1332 commuteShuffle(N1, N2, MaskVec); 1333 1334 // Canonicalize all index into lhs, -> shuffle lhs, undef 1335 // Canonicalize all index into rhs, -> shuffle rhs, undef 1336 bool AllLHS = true, AllRHS = true; 1337 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1338 for (unsigned i = 0; i != NElts; ++i) { 1339 if (MaskVec[i] >= (int)NElts) { 1340 if (N2Undef) 1341 MaskVec[i] = -1; 1342 else 1343 AllLHS = false; 1344 } else if (MaskVec[i] >= 0) { 1345 AllRHS = false; 1346 } 1347 } 1348 if (AllLHS && AllRHS) 1349 return getUNDEF(VT); 1350 if (AllLHS && !N2Undef) 1351 N2 = getUNDEF(VT); 1352 if (AllRHS) { 1353 N1 = getUNDEF(VT); 1354 commuteShuffle(N1, N2, MaskVec); 1355 } 1356 1357 // If Identity shuffle, or all shuffle in to undef, return that node. 1358 bool AllUndef = true; 1359 bool Identity = true; 1360 for (unsigned i = 0; i != NElts; ++i) { 1361 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1362 if (MaskVec[i] >= 0) AllUndef = false; 1363 } 1364 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1365 return N1; 1366 if (AllUndef) 1367 return getUNDEF(VT); 1368 1369 FoldingSetNodeID ID; 1370 SDValue Ops[2] = { N1, N2 }; 1371 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1372 for (unsigned i = 0; i != NElts; ++i) 1373 ID.AddInteger(MaskVec[i]); 1374 1375 void* IP = 0; 1376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1377 return SDValue(E, 0); 1378 1379 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1380 // SDNode doesn't have access to it. This memory will be "leaked" when 1381 // the node is deallocated, but recovered when the NodeAllocator is released. 1382 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1383 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1384 1385 ShuffleVectorSDNode *N = 1386 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1387 CSEMap.InsertNode(N, IP); 1388 AllNodes.push_back(N); 1389 return SDValue(N, 0); 1390} 1391 1392SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1393 SDValue Val, SDValue DTy, 1394 SDValue STy, SDValue Rnd, SDValue Sat, 1395 ISD::CvtCode Code) { 1396 // If the src and dest types are the same and the conversion is between 1397 // integer types of the same sign or two floats, no conversion is necessary. 1398 if (DTy == STy && 1399 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1400 return Val; 1401 1402 FoldingSetNodeID ID; 1403 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1404 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1405 void* IP = 0; 1406 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1407 return SDValue(E, 0); 1408 1409 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1410 Code); 1411 CSEMap.InsertNode(N, IP); 1412 AllNodes.push_back(N); 1413 return SDValue(N, 0); 1414} 1415 1416SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1417 FoldingSetNodeID ID; 1418 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1419 ID.AddInteger(RegNo); 1420 void *IP = 0; 1421 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1422 return SDValue(E, 0); 1423 1424 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1425 CSEMap.InsertNode(N, IP); 1426 AllNodes.push_back(N); 1427 return SDValue(N, 0); 1428} 1429 1430SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1431 FoldingSetNodeID ID; 1432 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1433 ID.AddPointer(RegMask); 1434 void *IP = 0; 1435 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1436 return SDValue(E, 0); 1437 1438 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1439 CSEMap.InsertNode(N, IP); 1440 AllNodes.push_back(N); 1441 return SDValue(N, 0); 1442} 1443 1444SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1445 FoldingSetNodeID ID; 1446 SDValue Ops[] = { Root }; 1447 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1448 ID.AddPointer(Label); 1449 void *IP = 0; 1450 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1451 return SDValue(E, 0); 1452 1453 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1454 CSEMap.InsertNode(N, IP); 1455 AllNodes.push_back(N); 1456 return SDValue(N, 0); 1457} 1458 1459 1460SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1461 int64_t Offset, 1462 bool isTarget, 1463 unsigned char TargetFlags) { 1464 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1465 1466 FoldingSetNodeID ID; 1467 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1468 ID.AddPointer(BA); 1469 ID.AddInteger(Offset); 1470 ID.AddInteger(TargetFlags); 1471 void *IP = 0; 1472 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1473 return SDValue(E, 0); 1474 1475 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset, 1476 TargetFlags); 1477 CSEMap.InsertNode(N, IP); 1478 AllNodes.push_back(N); 1479 return SDValue(N, 0); 1480} 1481 1482SDValue SelectionDAG::getSrcValue(const Value *V) { 1483 assert((!V || V->getType()->isPointerTy()) && 1484 "SrcValue is not a pointer?"); 1485 1486 FoldingSetNodeID ID; 1487 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1488 ID.AddPointer(V); 1489 1490 void *IP = 0; 1491 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1492 return SDValue(E, 0); 1493 1494 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1495 CSEMap.InsertNode(N, IP); 1496 AllNodes.push_back(N); 1497 return SDValue(N, 0); 1498} 1499 1500/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1501SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1502 FoldingSetNodeID ID; 1503 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1504 ID.AddPointer(MD); 1505 1506 void *IP = 0; 1507 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1508 return SDValue(E, 0); 1509 1510 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1511 CSEMap.InsertNode(N, IP); 1512 AllNodes.push_back(N); 1513 return SDValue(N, 0); 1514} 1515 1516 1517/// getShiftAmountOperand - Return the specified value casted to 1518/// the target's desired shift amount type. 1519SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1520 EVT OpTy = Op.getValueType(); 1521 EVT ShTy = TLI.getShiftAmountTy(LHSTy); 1522 if (OpTy == ShTy || OpTy.isVector()) return Op; 1523 1524 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1525 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1526} 1527 1528/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1529/// specified value type. 1530SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1531 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1532 unsigned ByteSize = VT.getStoreSize(); 1533 Type *Ty = VT.getTypeForEVT(*getContext()); 1534 unsigned StackAlign = 1535 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign); 1536 1537 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1538 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1539} 1540 1541/// CreateStackTemporary - Create a stack temporary suitable for holding 1542/// either of the specified value types. 1543SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1544 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1545 VT2.getStoreSizeInBits())/8; 1546 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1547 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1548 const DataLayout *TD = TLI.getDataLayout(); 1549 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1550 TD->getPrefTypeAlignment(Ty2)); 1551 1552 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1553 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1554 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1555} 1556 1557SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1558 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1559 // These setcc operations always fold. 1560 switch (Cond) { 1561 default: break; 1562 case ISD::SETFALSE: 1563 case ISD::SETFALSE2: return getConstant(0, VT); 1564 case ISD::SETTRUE: 1565 case ISD::SETTRUE2: return getConstant(1, VT); 1566 1567 case ISD::SETOEQ: 1568 case ISD::SETOGT: 1569 case ISD::SETOGE: 1570 case ISD::SETOLT: 1571 case ISD::SETOLE: 1572 case ISD::SETONE: 1573 case ISD::SETO: 1574 case ISD::SETUO: 1575 case ISD::SETUEQ: 1576 case ISD::SETUNE: 1577 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1578 break; 1579 } 1580 1581 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1582 const APInt &C2 = N2C->getAPIntValue(); 1583 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1584 const APInt &C1 = N1C->getAPIntValue(); 1585 1586 switch (Cond) { 1587 default: llvm_unreachable("Unknown integer setcc!"); 1588 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1589 case ISD::SETNE: return getConstant(C1 != C2, VT); 1590 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1591 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1592 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1593 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1594 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1595 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1596 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1597 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1598 } 1599 } 1600 } 1601 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1602 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1603 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1604 switch (Cond) { 1605 default: break; 1606 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1607 return getUNDEF(VT); 1608 // fall through 1609 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1610 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1611 return getUNDEF(VT); 1612 // fall through 1613 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1614 R==APFloat::cmpLessThan, VT); 1615 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1616 return getUNDEF(VT); 1617 // fall through 1618 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1619 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1620 return getUNDEF(VT); 1621 // fall through 1622 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1623 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1624 return getUNDEF(VT); 1625 // fall through 1626 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1627 R==APFloat::cmpEqual, VT); 1628 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1629 return getUNDEF(VT); 1630 // fall through 1631 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1632 R==APFloat::cmpEqual, VT); 1633 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1634 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1635 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1636 R==APFloat::cmpEqual, VT); 1637 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1638 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1639 R==APFloat::cmpLessThan, VT); 1640 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1641 R==APFloat::cmpUnordered, VT); 1642 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1643 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1644 } 1645 } else { 1646 // Ensure that the constant occurs on the RHS. 1647 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1648 } 1649 } 1650 1651 // Could not fold it. 1652 return SDValue(); 1653} 1654 1655/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1656/// use this predicate to simplify operations downstream. 1657bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1658 // This predicate is not safe for vector operations. 1659 if (Op.getValueType().isVector()) 1660 return false; 1661 1662 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1663 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1664} 1665 1666/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1667/// this predicate to simplify operations downstream. Mask is known to be zero 1668/// for bits that V cannot have. 1669bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1670 unsigned Depth) const { 1671 APInt KnownZero, KnownOne; 1672 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1674 return (KnownZero & Mask) == Mask; 1675} 1676 1677/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1678/// known to be either zero or one and return them in the KnownZero/KnownOne 1679/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1680/// processing. 1681void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1682 APInt &KnownOne, unsigned Depth) const { 1683 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1684 1685 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1686 if (Depth == 6) 1687 return; // Limit search depth. 1688 1689 APInt KnownZero2, KnownOne2; 1690 1691 switch (Op.getOpcode()) { 1692 case ISD::Constant: 1693 // We know all of the bits for a constant! 1694 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1695 KnownZero = ~KnownOne; 1696 return; 1697 case ISD::AND: 1698 // If either the LHS or the RHS are Zero, the result is zero. 1699 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1700 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1701 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1702 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1703 1704 // Output known-1 bits are only known if set in both the LHS & RHS. 1705 KnownOne &= KnownOne2; 1706 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1707 KnownZero |= KnownZero2; 1708 return; 1709 case ISD::OR: 1710 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1711 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1712 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1713 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1714 1715 // Output known-0 bits are only known if clear in both the LHS & RHS. 1716 KnownZero &= KnownZero2; 1717 // Output known-1 are known to be set if set in either the LHS | RHS. 1718 KnownOne |= KnownOne2; 1719 return; 1720 case ISD::XOR: { 1721 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1722 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1723 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1724 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1725 1726 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1727 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1728 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1729 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1730 KnownZero = KnownZeroOut; 1731 return; 1732 } 1733 case ISD::MUL: { 1734 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1735 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1738 1739 // If low bits are zero in either operand, output low known-0 bits. 1740 // Also compute a conserative estimate for high known-0 bits. 1741 // More trickiness is possible, but this is sufficient for the 1742 // interesting case of alignment computation. 1743 KnownOne.clearAllBits(); 1744 unsigned TrailZ = KnownZero.countTrailingOnes() + 1745 KnownZero2.countTrailingOnes(); 1746 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1747 KnownZero2.countLeadingOnes(), 1748 BitWidth) - BitWidth; 1749 1750 TrailZ = std::min(TrailZ, BitWidth); 1751 LeadZ = std::min(LeadZ, BitWidth); 1752 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1753 APInt::getHighBitsSet(BitWidth, LeadZ); 1754 return; 1755 } 1756 case ISD::UDIV: { 1757 // For the purposes of computing leading zeros we can conservatively 1758 // treat a udiv as a logical right shift by the power of 2 known to 1759 // be less than the denominator. 1760 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1761 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1762 1763 KnownOne2.clearAllBits(); 1764 KnownZero2.clearAllBits(); 1765 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1766 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1767 if (RHSUnknownLeadingOnes != BitWidth) 1768 LeadZ = std::min(BitWidth, 1769 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1770 1771 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1772 return; 1773 } 1774 case ISD::SELECT: 1775 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1776 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1778 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1779 1780 // Only known if known in both the LHS and RHS. 1781 KnownOne &= KnownOne2; 1782 KnownZero &= KnownZero2; 1783 return; 1784 case ISD::SELECT_CC: 1785 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1786 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1787 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1788 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1789 1790 // Only known if known in both the LHS and RHS. 1791 KnownOne &= KnownOne2; 1792 KnownZero &= KnownZero2; 1793 return; 1794 case ISD::SADDO: 1795 case ISD::UADDO: 1796 case ISD::SSUBO: 1797 case ISD::USUBO: 1798 case ISD::SMULO: 1799 case ISD::UMULO: 1800 if (Op.getResNo() != 1) 1801 return; 1802 // The boolean result conforms to getBooleanContents. Fall through. 1803 case ISD::SETCC: 1804 // If we know the result of a setcc has the top bits zero, use this info. 1805 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1806 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1807 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1808 return; 1809 case ISD::SHL: 1810 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1811 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1812 unsigned ShAmt = SA->getZExtValue(); 1813 1814 // If the shift count is an invalid immediate, don't do anything. 1815 if (ShAmt >= BitWidth) 1816 return; 1817 1818 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1819 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1820 KnownZero <<= ShAmt; 1821 KnownOne <<= ShAmt; 1822 // low bits known zero. 1823 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1824 } 1825 return; 1826 case ISD::SRL: 1827 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1828 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1829 unsigned ShAmt = SA->getZExtValue(); 1830 1831 // If the shift count is an invalid immediate, don't do anything. 1832 if (ShAmt >= BitWidth) 1833 return; 1834 1835 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1836 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1837 KnownZero = KnownZero.lshr(ShAmt); 1838 KnownOne = KnownOne.lshr(ShAmt); 1839 1840 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1841 KnownZero |= HighBits; // High bits known zero. 1842 } 1843 return; 1844 case ISD::SRA: 1845 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1846 unsigned ShAmt = SA->getZExtValue(); 1847 1848 // If the shift count is an invalid immediate, don't do anything. 1849 if (ShAmt >= BitWidth) 1850 return; 1851 1852 // If any of the demanded bits are produced by the sign extension, we also 1853 // demand the input sign bit. 1854 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1855 1856 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1857 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1858 KnownZero = KnownZero.lshr(ShAmt); 1859 KnownOne = KnownOne.lshr(ShAmt); 1860 1861 // Handle the sign bits. 1862 APInt SignBit = APInt::getSignBit(BitWidth); 1863 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1864 1865 if (KnownZero.intersects(SignBit)) { 1866 KnownZero |= HighBits; // New bits are known zero. 1867 } else if (KnownOne.intersects(SignBit)) { 1868 KnownOne |= HighBits; // New bits are known one. 1869 } 1870 } 1871 return; 1872 case ISD::SIGN_EXTEND_INREG: { 1873 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1874 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1875 1876 // Sign extension. Compute the demanded bits in the result that are not 1877 // present in the input. 1878 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1879 1880 APInt InSignBit = APInt::getSignBit(EBits); 1881 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1882 1883 // If the sign extended bits are demanded, we know that the sign 1884 // bit is demanded. 1885 InSignBit = InSignBit.zext(BitWidth); 1886 if (NewBits.getBoolValue()) 1887 InputDemandedBits |= InSignBit; 1888 1889 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1890 KnownOne &= InputDemandedBits; 1891 KnownZero &= InputDemandedBits; 1892 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1893 1894 // If the sign bit of the input is known set or clear, then we know the 1895 // top bits of the result. 1896 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1897 KnownZero |= NewBits; 1898 KnownOne &= ~NewBits; 1899 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1900 KnownOne |= NewBits; 1901 KnownZero &= ~NewBits; 1902 } else { // Input sign bit unknown 1903 KnownZero &= ~NewBits; 1904 KnownOne &= ~NewBits; 1905 } 1906 return; 1907 } 1908 case ISD::CTTZ: 1909 case ISD::CTTZ_ZERO_UNDEF: 1910 case ISD::CTLZ: 1911 case ISD::CTLZ_ZERO_UNDEF: 1912 case ISD::CTPOP: { 1913 unsigned LowBits = Log2_32(BitWidth)+1; 1914 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1915 KnownOne.clearAllBits(); 1916 return; 1917 } 1918 case ISD::LOAD: { 1919 LoadSDNode *LD = cast<LoadSDNode>(Op); 1920 // If this is a ZEXTLoad and we are looking at the loaded value. 1921 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) { 1922 EVT VT = LD->getMemoryVT(); 1923 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1924 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1925 } else if (const MDNode *Ranges = LD->getRanges()) { 1926 computeMaskedBitsLoad(*Ranges, KnownZero); 1927 } 1928 return; 1929 } 1930 case ISD::ZERO_EXTEND: { 1931 EVT InVT = Op.getOperand(0).getValueType(); 1932 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1933 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1934 KnownZero = KnownZero.trunc(InBits); 1935 KnownOne = KnownOne.trunc(InBits); 1936 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1937 KnownZero = KnownZero.zext(BitWidth); 1938 KnownOne = KnownOne.zext(BitWidth); 1939 KnownZero |= NewBits; 1940 return; 1941 } 1942 case ISD::SIGN_EXTEND: { 1943 EVT InVT = Op.getOperand(0).getValueType(); 1944 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1945 APInt InSignBit = APInt::getSignBit(InBits); 1946 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1947 1948 KnownZero = KnownZero.trunc(InBits); 1949 KnownOne = KnownOne.trunc(InBits); 1950 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1951 1952 // Note if the sign bit is known to be zero or one. 1953 bool SignBitKnownZero = KnownZero.isNegative(); 1954 bool SignBitKnownOne = KnownOne.isNegative(); 1955 assert(!(SignBitKnownZero && SignBitKnownOne) && 1956 "Sign bit can't be known to be both zero and one!"); 1957 1958 KnownZero = KnownZero.zext(BitWidth); 1959 KnownOne = KnownOne.zext(BitWidth); 1960 1961 // If the sign bit is known zero or one, the top bits match. 1962 if (SignBitKnownZero) 1963 KnownZero |= NewBits; 1964 else if (SignBitKnownOne) 1965 KnownOne |= NewBits; 1966 return; 1967 } 1968 case ISD::ANY_EXTEND: { 1969 EVT InVT = Op.getOperand(0).getValueType(); 1970 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1971 KnownZero = KnownZero.trunc(InBits); 1972 KnownOne = KnownOne.trunc(InBits); 1973 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1974 KnownZero = KnownZero.zext(BitWidth); 1975 KnownOne = KnownOne.zext(BitWidth); 1976 return; 1977 } 1978 case ISD::TRUNCATE: { 1979 EVT InVT = Op.getOperand(0).getValueType(); 1980 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1981 KnownZero = KnownZero.zext(InBits); 1982 KnownOne = KnownOne.zext(InBits); 1983 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1984 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1985 KnownZero = KnownZero.trunc(BitWidth); 1986 KnownOne = KnownOne.trunc(BitWidth); 1987 break; 1988 } 1989 case ISD::AssertZext: { 1990 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1991 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1992 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1993 KnownZero |= (~InMask); 1994 KnownOne &= (~KnownZero); 1995 return; 1996 } 1997 case ISD::FGETSIGN: 1998 // All bits are zero except the low bit. 1999 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 2000 return; 2001 2002 case ISD::SUB: { 2003 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2004 // We know that the top bits of C-X are clear if X contains less bits 2005 // than C (i.e. no wrap-around can happen). For example, 20-X is 2006 // positive if we can prove that X is >= 0 and < 16. 2007 if (CLHS->getAPIntValue().isNonNegative()) { 2008 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2009 // NLZ can't be BitWidth with no sign bit 2010 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2011 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2012 2013 // If all of the MaskV bits are known to be zero, then we know the 2014 // output top bits are zero, because we now know that the output is 2015 // from [0-C]. 2016 if ((KnownZero2 & MaskV) == MaskV) { 2017 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2018 // Top bits known zero. 2019 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2020 } 2021 } 2022 } 2023 } 2024 // fall through 2025 case ISD::ADD: 2026 case ISD::ADDE: { 2027 // Output known-0 bits are known if clear or set in both the low clear bits 2028 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2029 // low 3 bits clear. 2030 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2031 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2032 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2033 2034 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2035 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2036 KnownZeroOut = std::min(KnownZeroOut, 2037 KnownZero2.countTrailingOnes()); 2038 2039 if (Op.getOpcode() == ISD::ADD) { 2040 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2041 return; 2042 } 2043 2044 // With ADDE, a carry bit may be added in, so we can only use this 2045 // information if we know (at least) that the low two bits are clear. We 2046 // then return to the caller that the low bit is unknown but that other bits 2047 // are known zero. 2048 if (KnownZeroOut >= 2) // ADDE 2049 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2050 return; 2051 } 2052 case ISD::SREM: 2053 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2054 const APInt &RA = Rem->getAPIntValue().abs(); 2055 if (RA.isPowerOf2()) { 2056 APInt LowBits = RA - 1; 2057 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2058 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2059 2060 // The low bits of the first operand are unchanged by the srem. 2061 KnownZero = KnownZero2 & LowBits; 2062 KnownOne = KnownOne2 & LowBits; 2063 2064 // If the first operand is non-negative or has all low bits zero, then 2065 // the upper bits are all zero. 2066 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2067 KnownZero |= ~LowBits; 2068 2069 // If the first operand is negative and not all low bits are zero, then 2070 // the upper bits are all one. 2071 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2072 KnownOne |= ~LowBits; 2073 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2074 } 2075 } 2076 return; 2077 case ISD::UREM: { 2078 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2079 const APInt &RA = Rem->getAPIntValue(); 2080 if (RA.isPowerOf2()) { 2081 APInt LowBits = (RA - 1); 2082 KnownZero |= ~LowBits; 2083 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2084 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2085 break; 2086 } 2087 } 2088 2089 // Since the result is less than or equal to either operand, any leading 2090 // zero bits in either operand must also exist in the result. 2091 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2092 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2093 2094 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2095 KnownZero2.countLeadingOnes()); 2096 KnownOne.clearAllBits(); 2097 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2098 return; 2099 } 2100 case ISD::FrameIndex: 2101 case ISD::TargetFrameIndex: 2102 if (unsigned Align = InferPtrAlignment(Op)) { 2103 // The low bits are known zero if the pointer is aligned. 2104 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2105 return; 2106 } 2107 break; 2108 2109 default: 2110 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2111 break; 2112 // Fallthrough 2113 case ISD::INTRINSIC_WO_CHAIN: 2114 case ISD::INTRINSIC_W_CHAIN: 2115 case ISD::INTRINSIC_VOID: 2116 // Allow the target to implement this method for its nodes. 2117 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2118 return; 2119 } 2120} 2121 2122/// ComputeNumSignBits - Return the number of times the sign bit of the 2123/// register is replicated into the other bits. We know that at least 1 bit 2124/// is always equal to the sign bit (itself), but other cases can give us 2125/// information. For example, immediately after an "SRA X, 2", we know that 2126/// the top 3 bits are all equal to each other, so we return 3. 2127unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2128 EVT VT = Op.getValueType(); 2129 assert(VT.isInteger() && "Invalid VT!"); 2130 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2131 unsigned Tmp, Tmp2; 2132 unsigned FirstAnswer = 1; 2133 2134 if (Depth == 6) 2135 return 1; // Limit search depth. 2136 2137 switch (Op.getOpcode()) { 2138 default: break; 2139 case ISD::AssertSext: 2140 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2141 return VTBits-Tmp+1; 2142 case ISD::AssertZext: 2143 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2144 return VTBits-Tmp; 2145 2146 case ISD::Constant: { 2147 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2148 return Val.getNumSignBits(); 2149 } 2150 2151 case ISD::SIGN_EXTEND: 2152 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2153 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2154 2155 case ISD::SIGN_EXTEND_INREG: 2156 // Max of the input and what this extends. 2157 Tmp = 2158 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2159 Tmp = VTBits-Tmp+1; 2160 2161 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2162 return std::max(Tmp, Tmp2); 2163 2164 case ISD::SRA: 2165 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2166 // SRA X, C -> adds C sign bits. 2167 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2168 Tmp += C->getZExtValue(); 2169 if (Tmp > VTBits) Tmp = VTBits; 2170 } 2171 return Tmp; 2172 case ISD::SHL: 2173 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2174 // shl destroys sign bits. 2175 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2176 if (C->getZExtValue() >= VTBits || // Bad shift. 2177 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2178 return Tmp - C->getZExtValue(); 2179 } 2180 break; 2181 case ISD::AND: 2182 case ISD::OR: 2183 case ISD::XOR: // NOT is handled here. 2184 // Logical binary ops preserve the number of sign bits at the worst. 2185 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2186 if (Tmp != 1) { 2187 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2188 FirstAnswer = std::min(Tmp, Tmp2); 2189 // We computed what we know about the sign bits as our first 2190 // answer. Now proceed to the generic code that uses 2191 // ComputeMaskedBits, and pick whichever answer is better. 2192 } 2193 break; 2194 2195 case ISD::SELECT: 2196 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2197 if (Tmp == 1) return 1; // Early out. 2198 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2199 return std::min(Tmp, Tmp2); 2200 2201 case ISD::SADDO: 2202 case ISD::UADDO: 2203 case ISD::SSUBO: 2204 case ISD::USUBO: 2205 case ISD::SMULO: 2206 case ISD::UMULO: 2207 if (Op.getResNo() != 1) 2208 break; 2209 // The boolean result conforms to getBooleanContents. Fall through. 2210 case ISD::SETCC: 2211 // If setcc returns 0/-1, all bits are sign bits. 2212 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2213 TargetLowering::ZeroOrNegativeOneBooleanContent) 2214 return VTBits; 2215 break; 2216 case ISD::ROTL: 2217 case ISD::ROTR: 2218 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2219 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2220 2221 // Handle rotate right by N like a rotate left by 32-N. 2222 if (Op.getOpcode() == ISD::ROTR) 2223 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2224 2225 // If we aren't rotating out all of the known-in sign bits, return the 2226 // number that are left. This handles rotl(sext(x), 1) for example. 2227 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2228 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2229 } 2230 break; 2231 case ISD::ADD: 2232 // Add can have at most one carry bit. Thus we know that the output 2233 // is, at worst, one more bit than the inputs. 2234 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2235 if (Tmp == 1) return 1; // Early out. 2236 2237 // Special case decrementing a value (ADD X, -1): 2238 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2239 if (CRHS->isAllOnesValue()) { 2240 APInt KnownZero, KnownOne; 2241 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2242 2243 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2244 // sign bits set. 2245 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2246 return VTBits; 2247 2248 // If we are subtracting one from a positive number, there is no carry 2249 // out of the result. 2250 if (KnownZero.isNegative()) 2251 return Tmp; 2252 } 2253 2254 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2255 if (Tmp2 == 1) return 1; 2256 return std::min(Tmp, Tmp2)-1; 2257 2258 case ISD::SUB: 2259 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2260 if (Tmp2 == 1) return 1; 2261 2262 // Handle NEG. 2263 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2264 if (CLHS->isNullValue()) { 2265 APInt KnownZero, KnownOne; 2266 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2267 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2268 // sign bits set. 2269 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2270 return VTBits; 2271 2272 // If the input is known to be positive (the sign bit is known clear), 2273 // the output of the NEG has the same number of sign bits as the input. 2274 if (KnownZero.isNegative()) 2275 return Tmp2; 2276 2277 // Otherwise, we treat this like a SUB. 2278 } 2279 2280 // Sub can have at most one carry bit. Thus we know that the output 2281 // is, at worst, one more bit than the inputs. 2282 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2283 if (Tmp == 1) return 1; // Early out. 2284 return std::min(Tmp, Tmp2)-1; 2285 case ISD::TRUNCATE: 2286 // FIXME: it's tricky to do anything useful for this, but it is an important 2287 // case for targets like X86. 2288 break; 2289 } 2290 2291 // If we are looking at the loaded value of the SDNode. 2292 if (Op.getResNo() == 0) { 2293 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2294 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2295 unsigned ExtType = LD->getExtensionType(); 2296 switch (ExtType) { 2297 default: break; 2298 case ISD::SEXTLOAD: // '17' bits known 2299 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2300 return VTBits-Tmp+1; 2301 case ISD::ZEXTLOAD: // '16' bits known 2302 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2303 return VTBits-Tmp; 2304 } 2305 } 2306 } 2307 2308 // Allow the target to implement this method for its nodes. 2309 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2310 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2311 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2312 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2313 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2314 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2315 } 2316 2317 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2318 // use this information. 2319 APInt KnownZero, KnownOne; 2320 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2321 2322 APInt Mask; 2323 if (KnownZero.isNegative()) { // sign bit is 0 2324 Mask = KnownZero; 2325 } else if (KnownOne.isNegative()) { // sign bit is 1; 2326 Mask = KnownOne; 2327 } else { 2328 // Nothing known. 2329 return FirstAnswer; 2330 } 2331 2332 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2333 // the number of identical bits in the top of the input value. 2334 Mask = ~Mask; 2335 Mask <<= Mask.getBitWidth()-VTBits; 2336 // Return # leading zeros. We use 'min' here in case Val was zero before 2337 // shifting. We don't want to return '64' as for an i32 "0". 2338 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2339} 2340 2341/// isBaseWithConstantOffset - Return true if the specified operand is an 2342/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2343/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2344/// semantics as an ADD. This handles the equivalence: 2345/// X|Cst == X+Cst iff X&Cst = 0. 2346bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2347 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2348 !isa<ConstantSDNode>(Op.getOperand(1))) 2349 return false; 2350 2351 if (Op.getOpcode() == ISD::OR && 2352 !MaskedValueIsZero(Op.getOperand(0), 2353 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2354 return false; 2355 2356 return true; 2357} 2358 2359 2360bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2361 // If we're told that NaNs won't happen, assume they won't. 2362 if (getTarget().Options.NoNaNsFPMath) 2363 return true; 2364 2365 // If the value is a constant, we can obviously see if it is a NaN or not. 2366 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2367 return !C->getValueAPF().isNaN(); 2368 2369 // TODO: Recognize more cases here. 2370 2371 return false; 2372} 2373 2374bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2375 // If the value is a constant, we can obviously see if it is a zero or not. 2376 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2377 return !C->isZero(); 2378 2379 // TODO: Recognize more cases here. 2380 switch (Op.getOpcode()) { 2381 default: break; 2382 case ISD::OR: 2383 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2384 return !C->isNullValue(); 2385 break; 2386 } 2387 2388 return false; 2389} 2390 2391bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2392 // Check the obvious case. 2393 if (A == B) return true; 2394 2395 // For for negative and positive zero. 2396 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2397 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2398 if (CA->isZero() && CB->isZero()) return true; 2399 2400 // Otherwise they may not be equal. 2401 return false; 2402} 2403 2404/// getNode - Gets or creates the specified node. 2405/// 2406SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2407 FoldingSetNodeID ID; 2408 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2409 void *IP = 0; 2410 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2411 return SDValue(E, 0); 2412 2413 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2414 CSEMap.InsertNode(N, IP); 2415 2416 AllNodes.push_back(N); 2417#ifndef NDEBUG 2418 VerifySDNode(N); 2419#endif 2420 return SDValue(N, 0); 2421} 2422 2423SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2424 EVT VT, SDValue Operand) { 2425 // Constant fold unary operations with an integer constant operand. 2426 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2427 const APInt &Val = C->getAPIntValue(); 2428 switch (Opcode) { 2429 default: break; 2430 case ISD::SIGN_EXTEND: 2431 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2432 case ISD::ANY_EXTEND: 2433 case ISD::ZERO_EXTEND: 2434 case ISD::TRUNCATE: 2435 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2436 case ISD::UINT_TO_FP: 2437 case ISD::SINT_TO_FP: { 2438 APFloat apf(EVTToAPFloatSemantics(VT), 2439 APInt::getNullValue(VT.getSizeInBits())); 2440 (void)apf.convertFromAPInt(Val, 2441 Opcode==ISD::SINT_TO_FP, 2442 APFloat::rmNearestTiesToEven); 2443 return getConstantFP(apf, VT); 2444 } 2445 case ISD::BITCAST: 2446 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2447 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT); 2448 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2449 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT); 2450 break; 2451 case ISD::BSWAP: 2452 return getConstant(Val.byteSwap(), VT); 2453 case ISD::CTPOP: 2454 return getConstant(Val.countPopulation(), VT); 2455 case ISD::CTLZ: 2456 case ISD::CTLZ_ZERO_UNDEF: 2457 return getConstant(Val.countLeadingZeros(), VT); 2458 case ISD::CTTZ: 2459 case ISD::CTTZ_ZERO_UNDEF: 2460 return getConstant(Val.countTrailingZeros(), VT); 2461 } 2462 } 2463 2464 // Constant fold unary operations with a floating point constant operand. 2465 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2466 APFloat V = C->getValueAPF(); // make copy 2467 switch (Opcode) { 2468 case ISD::FNEG: 2469 V.changeSign(); 2470 return getConstantFP(V, VT); 2471 case ISD::FABS: 2472 V.clearSign(); 2473 return getConstantFP(V, VT); 2474 case ISD::FCEIL: { 2475 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2476 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2477 return getConstantFP(V, VT); 2478 break; 2479 } 2480 case ISD::FTRUNC: { 2481 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2482 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2483 return getConstantFP(V, VT); 2484 break; 2485 } 2486 case ISD::FFLOOR: { 2487 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2488 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2489 return getConstantFP(V, VT); 2490 break; 2491 } 2492 case ISD::FP_EXTEND: { 2493 bool ignored; 2494 // This can return overflow, underflow, or inexact; we don't care. 2495 // FIXME need to be more flexible about rounding mode. 2496 (void)V.convert(EVTToAPFloatSemantics(VT), 2497 APFloat::rmNearestTiesToEven, &ignored); 2498 return getConstantFP(V, VT); 2499 } 2500 case ISD::FP_TO_SINT: 2501 case ISD::FP_TO_UINT: { 2502 integerPart x[2]; 2503 bool ignored; 2504 assert(integerPartWidth >= 64); 2505 // FIXME need to be more flexible about rounding mode. 2506 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2507 Opcode==ISD::FP_TO_SINT, 2508 APFloat::rmTowardZero, &ignored); 2509 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2510 break; 2511 APInt api(VT.getSizeInBits(), x); 2512 return getConstant(api, VT); 2513 } 2514 case ISD::BITCAST: 2515 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2516 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2517 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2518 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2519 break; 2520 } 2521 } 2522 2523 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2524 switch (Opcode) { 2525 case ISD::TokenFactor: 2526 case ISD::MERGE_VALUES: 2527 case ISD::CONCAT_VECTORS: 2528 return Operand; // Factor, merge or concat of one node? No need. 2529 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2530 case ISD::FP_EXTEND: 2531 assert(VT.isFloatingPoint() && 2532 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2533 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2534 assert((!VT.isVector() || 2535 VT.getVectorNumElements() == 2536 Operand.getValueType().getVectorNumElements()) && 2537 "Vector element count mismatch!"); 2538 if (Operand.getOpcode() == ISD::UNDEF) 2539 return getUNDEF(VT); 2540 break; 2541 case ISD::SIGN_EXTEND: 2542 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2543 "Invalid SIGN_EXTEND!"); 2544 if (Operand.getValueType() == VT) return Operand; // noop extension 2545 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2546 "Invalid sext node, dst < src!"); 2547 assert((!VT.isVector() || 2548 VT.getVectorNumElements() == 2549 Operand.getValueType().getVectorNumElements()) && 2550 "Vector element count mismatch!"); 2551 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2552 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2553 else if (OpOpcode == ISD::UNDEF) 2554 // sext(undef) = 0, because the top bits will all be the same. 2555 return getConstant(0, VT); 2556 break; 2557 case ISD::ZERO_EXTEND: 2558 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2559 "Invalid ZERO_EXTEND!"); 2560 if (Operand.getValueType() == VT) return Operand; // noop extension 2561 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2562 "Invalid zext node, dst < src!"); 2563 assert((!VT.isVector() || 2564 VT.getVectorNumElements() == 2565 Operand.getValueType().getVectorNumElements()) && 2566 "Vector element count mismatch!"); 2567 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2568 return getNode(ISD::ZERO_EXTEND, DL, VT, 2569 Operand.getNode()->getOperand(0)); 2570 else if (OpOpcode == ISD::UNDEF) 2571 // zext(undef) = 0, because the top bits will be zero. 2572 return getConstant(0, VT); 2573 break; 2574 case ISD::ANY_EXTEND: 2575 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2576 "Invalid ANY_EXTEND!"); 2577 if (Operand.getValueType() == VT) return Operand; // noop extension 2578 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2579 "Invalid anyext node, dst < src!"); 2580 assert((!VT.isVector() || 2581 VT.getVectorNumElements() == 2582 Operand.getValueType().getVectorNumElements()) && 2583 "Vector element count mismatch!"); 2584 2585 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2586 OpOpcode == ISD::ANY_EXTEND) 2587 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2588 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2589 else if (OpOpcode == ISD::UNDEF) 2590 return getUNDEF(VT); 2591 2592 // (ext (trunx x)) -> x 2593 if (OpOpcode == ISD::TRUNCATE) { 2594 SDValue OpOp = Operand.getNode()->getOperand(0); 2595 if (OpOp.getValueType() == VT) 2596 return OpOp; 2597 } 2598 break; 2599 case ISD::TRUNCATE: 2600 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2601 "Invalid TRUNCATE!"); 2602 if (Operand.getValueType() == VT) return Operand; // noop truncate 2603 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2604 "Invalid truncate node, src < dst!"); 2605 assert((!VT.isVector() || 2606 VT.getVectorNumElements() == 2607 Operand.getValueType().getVectorNumElements()) && 2608 "Vector element count mismatch!"); 2609 if (OpOpcode == ISD::TRUNCATE) 2610 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2611 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2612 OpOpcode == ISD::ANY_EXTEND) { 2613 // If the source is smaller than the dest, we still need an extend. 2614 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2615 .bitsLT(VT.getScalarType())) 2616 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2617 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2618 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2619 return Operand.getNode()->getOperand(0); 2620 } 2621 if (OpOpcode == ISD::UNDEF) 2622 return getUNDEF(VT); 2623 break; 2624 case ISD::BITCAST: 2625 // Basic sanity checking. 2626 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2627 && "Cannot BITCAST between types of different sizes!"); 2628 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2629 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2630 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2631 if (OpOpcode == ISD::UNDEF) 2632 return getUNDEF(VT); 2633 break; 2634 case ISD::SCALAR_TO_VECTOR: 2635 assert(VT.isVector() && !Operand.getValueType().isVector() && 2636 (VT.getVectorElementType() == Operand.getValueType() || 2637 (VT.getVectorElementType().isInteger() && 2638 Operand.getValueType().isInteger() && 2639 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2640 "Illegal SCALAR_TO_VECTOR node!"); 2641 if (OpOpcode == ISD::UNDEF) 2642 return getUNDEF(VT); 2643 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2644 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2645 isa<ConstantSDNode>(Operand.getOperand(1)) && 2646 Operand.getConstantOperandVal(1) == 0 && 2647 Operand.getOperand(0).getValueType() == VT) 2648 return Operand.getOperand(0); 2649 break; 2650 case ISD::FNEG: 2651 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2652 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2653 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2654 Operand.getNode()->getOperand(0)); 2655 if (OpOpcode == ISD::FNEG) // --X -> X 2656 return Operand.getNode()->getOperand(0); 2657 break; 2658 case ISD::FABS: 2659 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2660 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2661 break; 2662 } 2663 2664 SDNode *N; 2665 SDVTList VTs = getVTList(VT); 2666 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2667 FoldingSetNodeID ID; 2668 SDValue Ops[1] = { Operand }; 2669 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2670 void *IP = 0; 2671 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2672 return SDValue(E, 0); 2673 2674 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2675 CSEMap.InsertNode(N, IP); 2676 } else { 2677 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2678 } 2679 2680 AllNodes.push_back(N); 2681#ifndef NDEBUG 2682 VerifySDNode(N); 2683#endif 2684 return SDValue(N, 0); 2685} 2686 2687SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT, 2688 SDNode *Cst1, SDNode *Cst2) { 2689 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs; 2690 SmallVector<SDValue, 4> Outputs; 2691 EVT SVT = VT.getScalarType(); 2692 2693 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1); 2694 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2); 2695 if (Scalar1 && Scalar2) { 2696 // Scalar instruction. 2697 Inputs.push_back(std::make_pair(Scalar1, Scalar2)); 2698 } else { 2699 // For vectors extract each constant element into Inputs so we can constant 2700 // fold them individually. 2701 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1); 2702 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2); 2703 if (!BV1 || !BV2) 2704 return SDValue(); 2705 2706 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!"); 2707 2708 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) { 2709 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I)); 2710 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I)); 2711 if (!V1 || !V2) // Not a constant, bail. 2712 return SDValue(); 2713 2714 // Avoid BUILD_VECTOR nodes that perform implicit truncation. 2715 // FIXME: This is valid and could be handled by truncating the APInts. 2716 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT) 2717 return SDValue(); 2718 2719 Inputs.push_back(std::make_pair(V1, V2)); 2720 } 2721 } 2722 2723 // We have a number of constant values, constant fold them element by element. 2724 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) { 2725 const APInt &C1 = Inputs[I].first->getAPIntValue(); 2726 const APInt &C2 = Inputs[I].second->getAPIntValue(); 2727 2728 switch (Opcode) { 2729 case ISD::ADD: 2730 Outputs.push_back(getConstant(C1 + C2, SVT)); 2731 break; 2732 case ISD::SUB: 2733 Outputs.push_back(getConstant(C1 - C2, SVT)); 2734 break; 2735 case ISD::MUL: 2736 Outputs.push_back(getConstant(C1 * C2, SVT)); 2737 break; 2738 case ISD::UDIV: 2739 if (!C2.getBoolValue()) 2740 return SDValue(); 2741 Outputs.push_back(getConstant(C1.udiv(C2), SVT)); 2742 break; 2743 case ISD::UREM: 2744 if (!C2.getBoolValue()) 2745 return SDValue(); 2746 Outputs.push_back(getConstant(C1.urem(C2), SVT)); 2747 break; 2748 case ISD::SDIV: 2749 if (!C2.getBoolValue()) 2750 return SDValue(); 2751 Outputs.push_back(getConstant(C1.sdiv(C2), SVT)); 2752 break; 2753 case ISD::SREM: 2754 if (!C2.getBoolValue()) 2755 return SDValue(); 2756 Outputs.push_back(getConstant(C1.srem(C2), SVT)); 2757 break; 2758 case ISD::AND: 2759 Outputs.push_back(getConstant(C1 & C2, SVT)); 2760 break; 2761 case ISD::OR: 2762 Outputs.push_back(getConstant(C1 | C2, SVT)); 2763 break; 2764 case ISD::XOR: 2765 Outputs.push_back(getConstant(C1 ^ C2, SVT)); 2766 break; 2767 case ISD::SHL: 2768 Outputs.push_back(getConstant(C1 << C2, SVT)); 2769 break; 2770 case ISD::SRL: 2771 Outputs.push_back(getConstant(C1.lshr(C2), SVT)); 2772 break; 2773 case ISD::SRA: 2774 Outputs.push_back(getConstant(C1.ashr(C2), SVT)); 2775 break; 2776 case ISD::ROTL: 2777 Outputs.push_back(getConstant(C1.rotl(C2), SVT)); 2778 break; 2779 case ISD::ROTR: 2780 Outputs.push_back(getConstant(C1.rotr(C2), SVT)); 2781 break; 2782 default: 2783 return SDValue(); 2784 } 2785 } 2786 2787 // Handle the scalar case first. 2788 if (Scalar1 && Scalar2) 2789 return Outputs.back(); 2790 2791 // Otherwise build a big vector out of the scalar elements we generated. 2792 return getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, Outputs.data(), 2793 Outputs.size()); 2794} 2795 2796SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, 2797 SDValue N2) { 2798 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2799 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2800 switch (Opcode) { 2801 default: break; 2802 case ISD::TokenFactor: 2803 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2804 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2805 // Fold trivial token factors. 2806 if (N1.getOpcode() == ISD::EntryToken) return N2; 2807 if (N2.getOpcode() == ISD::EntryToken) return N1; 2808 if (N1 == N2) return N1; 2809 break; 2810 case ISD::CONCAT_VECTORS: 2811 // Concat of UNDEFs is UNDEF. 2812 if (N1.getOpcode() == ISD::UNDEF && 2813 N2.getOpcode() == ISD::UNDEF) 2814 return getUNDEF(VT); 2815 2816 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2817 // one big BUILD_VECTOR. 2818 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2819 N2.getOpcode() == ISD::BUILD_VECTOR) { 2820 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2821 N1.getNode()->op_end()); 2822 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2823 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2824 } 2825 break; 2826 case ISD::AND: 2827 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2828 assert(N1.getValueType() == N2.getValueType() && 2829 N1.getValueType() == VT && "Binary operator types must match!"); 2830 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2831 // worth handling here. 2832 if (N2C && N2C->isNullValue()) 2833 return N2; 2834 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2835 return N1; 2836 break; 2837 case ISD::OR: 2838 case ISD::XOR: 2839 case ISD::ADD: 2840 case ISD::SUB: 2841 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2842 assert(N1.getValueType() == N2.getValueType() && 2843 N1.getValueType() == VT && "Binary operator types must match!"); 2844 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2845 // it's worth handling here. 2846 if (N2C && N2C->isNullValue()) 2847 return N1; 2848 break; 2849 case ISD::UDIV: 2850 case ISD::UREM: 2851 case ISD::MULHU: 2852 case ISD::MULHS: 2853 case ISD::MUL: 2854 case ISD::SDIV: 2855 case ISD::SREM: 2856 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2857 assert(N1.getValueType() == N2.getValueType() && 2858 N1.getValueType() == VT && "Binary operator types must match!"); 2859 break; 2860 case ISD::FADD: 2861 case ISD::FSUB: 2862 case ISD::FMUL: 2863 case ISD::FDIV: 2864 case ISD::FREM: 2865 if (getTarget().Options.UnsafeFPMath) { 2866 if (Opcode == ISD::FADD) { 2867 // 0+x --> x 2868 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2869 if (CFP->getValueAPF().isZero()) 2870 return N2; 2871 // x+0 --> x 2872 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2873 if (CFP->getValueAPF().isZero()) 2874 return N1; 2875 } else if (Opcode == ISD::FSUB) { 2876 // x-0 --> x 2877 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2878 if (CFP->getValueAPF().isZero()) 2879 return N1; 2880 } else if (Opcode == ISD::FMUL) { 2881 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1); 2882 SDValue V = N2; 2883 2884 // If the first operand isn't the constant, try the second 2885 if (!CFP) { 2886 CFP = dyn_cast<ConstantFPSDNode>(N2); 2887 V = N1; 2888 } 2889 2890 if (CFP) { 2891 // 0*x --> 0 2892 if (CFP->isZero()) 2893 return SDValue(CFP,0); 2894 // 1*x --> x 2895 if (CFP->isExactlyValue(1.0)) 2896 return V; 2897 } 2898 } 2899 } 2900 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2901 assert(N1.getValueType() == N2.getValueType() && 2902 N1.getValueType() == VT && "Binary operator types must match!"); 2903 break; 2904 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2905 assert(N1.getValueType() == VT && 2906 N1.getValueType().isFloatingPoint() && 2907 N2.getValueType().isFloatingPoint() && 2908 "Invalid FCOPYSIGN!"); 2909 break; 2910 case ISD::SHL: 2911 case ISD::SRA: 2912 case ISD::SRL: 2913 case ISD::ROTL: 2914 case ISD::ROTR: 2915 assert(VT == N1.getValueType() && 2916 "Shift operators return type must be the same as their first arg"); 2917 assert(VT.isInteger() && N2.getValueType().isInteger() && 2918 "Shifts only work on integers"); 2919 assert((!VT.isVector() || VT == N2.getValueType()) && 2920 "Vector shift amounts must be in the same as their first arg"); 2921 // Verify that the shift amount VT is bit enough to hold valid shift 2922 // amounts. This catches things like trying to shift an i1024 value by an 2923 // i8, which is easy to fall into in generic code that uses 2924 // TLI.getShiftAmount(). 2925 assert(N2.getValueType().getSizeInBits() >= 2926 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2927 "Invalid use of small shift amount with oversized value!"); 2928 2929 // Always fold shifts of i1 values so the code generator doesn't need to 2930 // handle them. Since we know the size of the shift has to be less than the 2931 // size of the value, the shift/rotate count is guaranteed to be zero. 2932 if (VT == MVT::i1) 2933 return N1; 2934 if (N2C && N2C->isNullValue()) 2935 return N1; 2936 break; 2937 case ISD::FP_ROUND_INREG: { 2938 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2939 assert(VT == N1.getValueType() && "Not an inreg round!"); 2940 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2941 "Cannot FP_ROUND_INREG integer types"); 2942 assert(EVT.isVector() == VT.isVector() && 2943 "FP_ROUND_INREG type should be vector iff the operand " 2944 "type is vector!"); 2945 assert((!EVT.isVector() || 2946 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2947 "Vector element counts must match in FP_ROUND_INREG"); 2948 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2949 (void)EVT; 2950 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2951 break; 2952 } 2953 case ISD::FP_ROUND: 2954 assert(VT.isFloatingPoint() && 2955 N1.getValueType().isFloatingPoint() && 2956 VT.bitsLE(N1.getValueType()) && 2957 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2958 if (N1.getValueType() == VT) return N1; // noop conversion. 2959 break; 2960 case ISD::AssertSext: 2961 case ISD::AssertZext: { 2962 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2963 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2964 assert(VT.isInteger() && EVT.isInteger() && 2965 "Cannot *_EXTEND_INREG FP types"); 2966 assert(!EVT.isVector() && 2967 "AssertSExt/AssertZExt type should be the vector element type " 2968 "rather than the vector type!"); 2969 assert(EVT.bitsLE(VT) && "Not extending!"); 2970 if (VT == EVT) return N1; // noop assertion. 2971 break; 2972 } 2973 case ISD::SIGN_EXTEND_INREG: { 2974 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2975 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2976 assert(VT.isInteger() && EVT.isInteger() && 2977 "Cannot *_EXTEND_INREG FP types"); 2978 assert(EVT.isVector() == VT.isVector() && 2979 "SIGN_EXTEND_INREG type should be vector iff the operand " 2980 "type is vector!"); 2981 assert((!EVT.isVector() || 2982 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2983 "Vector element counts must match in SIGN_EXTEND_INREG"); 2984 assert(EVT.bitsLE(VT) && "Not extending!"); 2985 if (EVT == VT) return N1; // Not actually extending 2986 2987 if (N1C) { 2988 APInt Val = N1C->getAPIntValue(); 2989 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2990 Val <<= Val.getBitWidth()-FromBits; 2991 Val = Val.ashr(Val.getBitWidth()-FromBits); 2992 return getConstant(Val, VT); 2993 } 2994 break; 2995 } 2996 case ISD::EXTRACT_VECTOR_ELT: 2997 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2998 if (N1.getOpcode() == ISD::UNDEF) 2999 return getUNDEF(VT); 3000 3001 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 3002 // expanding copies of large vectors from registers. 3003 if (N2C && 3004 N1.getOpcode() == ISD::CONCAT_VECTORS && 3005 N1.getNumOperands() > 0) { 3006 unsigned Factor = 3007 N1.getOperand(0).getValueType().getVectorNumElements(); 3008 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 3009 N1.getOperand(N2C->getZExtValue() / Factor), 3010 getConstant(N2C->getZExtValue() % Factor, 3011 N2.getValueType())); 3012 } 3013 3014 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 3015 // expanding large vector constants. 3016 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 3017 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 3018 3019 if (VT != Elt.getValueType()) 3020 // If the vector element type is not legal, the BUILD_VECTOR operands 3021 // are promoted and implicitly truncated, and the result implicitly 3022 // extended. Make that explicit here. 3023 Elt = getAnyExtOrTrunc(Elt, DL, VT); 3024 3025 return Elt; 3026 } 3027 3028 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 3029 // operations are lowered to scalars. 3030 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 3031 // If the indices are the same, return the inserted element else 3032 // if the indices are known different, extract the element from 3033 // the original vector. 3034 SDValue N1Op2 = N1.getOperand(2); 3035 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 3036 3037 if (N1Op2C && N2C) { 3038 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 3039 if (VT == N1.getOperand(1).getValueType()) 3040 return N1.getOperand(1); 3041 else 3042 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 3043 } 3044 3045 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 3046 } 3047 } 3048 break; 3049 case ISD::EXTRACT_ELEMENT: 3050 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 3051 assert(!N1.getValueType().isVector() && !VT.isVector() && 3052 (N1.getValueType().isInteger() == VT.isInteger()) && 3053 N1.getValueType() != VT && 3054 "Wrong types for EXTRACT_ELEMENT!"); 3055 3056 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 3057 // 64-bit integers into 32-bit parts. Instead of building the extract of 3058 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 3059 if (N1.getOpcode() == ISD::BUILD_PAIR) 3060 return N1.getOperand(N2C->getZExtValue()); 3061 3062 // EXTRACT_ELEMENT of a constant int is also very common. 3063 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 3064 unsigned ElementSize = VT.getSizeInBits(); 3065 unsigned Shift = ElementSize * N2C->getZExtValue(); 3066 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 3067 return getConstant(ShiftedVal.trunc(ElementSize), VT); 3068 } 3069 break; 3070 case ISD::EXTRACT_SUBVECTOR: { 3071 SDValue Index = N2; 3072 if (VT.isSimple() && N1.getValueType().isSimple()) { 3073 assert(VT.isVector() && N1.getValueType().isVector() && 3074 "Extract subvector VTs must be a vectors!"); 3075 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 3076 "Extract subvector VTs must have the same element type!"); 3077 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 3078 "Extract subvector must be from larger vector to smaller vector!"); 3079 3080 if (isa<ConstantSDNode>(Index.getNode())) { 3081 assert((VT.getVectorNumElements() + 3082 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3083 <= N1.getValueType().getVectorNumElements()) 3084 && "Extract subvector overflow!"); 3085 } 3086 3087 // Trivial extraction. 3088 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 3089 return N1; 3090 } 3091 break; 3092 } 3093 } 3094 3095 // Perform trivial constant folding. 3096 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()); 3097 if (SV.getNode()) return SV; 3098 3099 // Canonicalize constant to RHS if commutative. 3100 if (N1C && !N2C && isCommutativeBinOp(Opcode)) { 3101 std::swap(N1C, N2C); 3102 std::swap(N1, N2); 3103 } 3104 3105 // Constant fold FP operations. 3106 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3107 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3108 if (N1CFP) { 3109 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3110 // Canonicalize constant to RHS if commutative. 3111 std::swap(N1CFP, N2CFP); 3112 std::swap(N1, N2); 3113 } else if (N2CFP) { 3114 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3115 APFloat::opStatus s; 3116 switch (Opcode) { 3117 case ISD::FADD: 3118 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3119 if (s != APFloat::opInvalidOp) 3120 return getConstantFP(V1, VT); 3121 break; 3122 case ISD::FSUB: 3123 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3124 if (s!=APFloat::opInvalidOp) 3125 return getConstantFP(V1, VT); 3126 break; 3127 case ISD::FMUL: 3128 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3129 if (s!=APFloat::opInvalidOp) 3130 return getConstantFP(V1, VT); 3131 break; 3132 case ISD::FDIV: 3133 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3134 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3135 return getConstantFP(V1, VT); 3136 break; 3137 case ISD::FREM : 3138 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3139 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3140 return getConstantFP(V1, VT); 3141 break; 3142 case ISD::FCOPYSIGN: 3143 V1.copySign(V2); 3144 return getConstantFP(V1, VT); 3145 default: break; 3146 } 3147 } 3148 3149 if (Opcode == ISD::FP_ROUND) { 3150 APFloat V = N1CFP->getValueAPF(); // make copy 3151 bool ignored; 3152 // This can return overflow, underflow, or inexact; we don't care. 3153 // FIXME need to be more flexible about rounding mode. 3154 (void)V.convert(EVTToAPFloatSemantics(VT), 3155 APFloat::rmNearestTiesToEven, &ignored); 3156 return getConstantFP(V, VT); 3157 } 3158 } 3159 3160 // Canonicalize an UNDEF to the RHS, even over a constant. 3161 if (N1.getOpcode() == ISD::UNDEF) { 3162 if (isCommutativeBinOp(Opcode)) { 3163 std::swap(N1, N2); 3164 } else { 3165 switch (Opcode) { 3166 case ISD::FP_ROUND_INREG: 3167 case ISD::SIGN_EXTEND_INREG: 3168 case ISD::SUB: 3169 case ISD::FSUB: 3170 case ISD::FDIV: 3171 case ISD::FREM: 3172 case ISD::SRA: 3173 return N1; // fold op(undef, arg2) -> undef 3174 case ISD::UDIV: 3175 case ISD::SDIV: 3176 case ISD::UREM: 3177 case ISD::SREM: 3178 case ISD::SRL: 3179 case ISD::SHL: 3180 if (!VT.isVector()) 3181 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3182 // For vectors, we can't easily build an all zero vector, just return 3183 // the LHS. 3184 return N2; 3185 } 3186 } 3187 } 3188 3189 // Fold a bunch of operators when the RHS is undef. 3190 if (N2.getOpcode() == ISD::UNDEF) { 3191 switch (Opcode) { 3192 case ISD::XOR: 3193 if (N1.getOpcode() == ISD::UNDEF) 3194 // Handle undef ^ undef -> 0 special case. This is a common 3195 // idiom (misuse). 3196 return getConstant(0, VT); 3197 // fallthrough 3198 case ISD::ADD: 3199 case ISD::ADDC: 3200 case ISD::ADDE: 3201 case ISD::SUB: 3202 case ISD::UDIV: 3203 case ISD::SDIV: 3204 case ISD::UREM: 3205 case ISD::SREM: 3206 return N2; // fold op(arg1, undef) -> undef 3207 case ISD::FADD: 3208 case ISD::FSUB: 3209 case ISD::FMUL: 3210 case ISD::FDIV: 3211 case ISD::FREM: 3212 if (getTarget().Options.UnsafeFPMath) 3213 return N2; 3214 break; 3215 case ISD::MUL: 3216 case ISD::AND: 3217 case ISD::SRL: 3218 case ISD::SHL: 3219 if (!VT.isVector()) 3220 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3221 // For vectors, we can't easily build an all zero vector, just return 3222 // the LHS. 3223 return N1; 3224 case ISD::OR: 3225 if (!VT.isVector()) 3226 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3227 // For vectors, we can't easily build an all one vector, just return 3228 // the LHS. 3229 return N1; 3230 case ISD::SRA: 3231 return N1; 3232 } 3233 } 3234 3235 // Memoize this node if possible. 3236 SDNode *N; 3237 SDVTList VTs = getVTList(VT); 3238 if (VT != MVT::Glue) { 3239 SDValue Ops[] = { N1, N2 }; 3240 FoldingSetNodeID ID; 3241 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3242 void *IP = 0; 3243 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3244 return SDValue(E, 0); 3245 3246 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3247 CSEMap.InsertNode(N, IP); 3248 } else { 3249 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3250 } 3251 3252 AllNodes.push_back(N); 3253#ifndef NDEBUG 3254 VerifySDNode(N); 3255#endif 3256 return SDValue(N, 0); 3257} 3258 3259SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3260 SDValue N1, SDValue N2, SDValue N3) { 3261 // Perform various simplifications. 3262 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3263 switch (Opcode) { 3264 case ISD::FMA: { 3265 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1); 3266 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2); 3267 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3); 3268 if (N1CFP && N2CFP && N3CFP) { 3269 APFloat V1 = N1CFP->getValueAPF(); 3270 const APFloat &V2 = N2CFP->getValueAPF(); 3271 const APFloat &V3 = N3CFP->getValueAPF(); 3272 APFloat::opStatus s = 3273 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven); 3274 if (s != APFloat::opInvalidOp) 3275 return getConstantFP(V1, VT); 3276 } 3277 break; 3278 } 3279 case ISD::CONCAT_VECTORS: 3280 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3281 // one big BUILD_VECTOR. 3282 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3283 N2.getOpcode() == ISD::BUILD_VECTOR && 3284 N3.getOpcode() == ISD::BUILD_VECTOR) { 3285 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3286 N1.getNode()->op_end()); 3287 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3288 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3289 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3290 } 3291 break; 3292 case ISD::SETCC: { 3293 // Use FoldSetCC to simplify SETCC's. 3294 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3295 if (Simp.getNode()) return Simp; 3296 break; 3297 } 3298 case ISD::SELECT: 3299 if (N1C) { 3300 if (N1C->getZExtValue()) 3301 return N2; // select true, X, Y -> X 3302 return N3; // select false, X, Y -> Y 3303 } 3304 3305 if (N2 == N3) return N2; // select C, X, X -> X 3306 break; 3307 case ISD::VECTOR_SHUFFLE: 3308 llvm_unreachable("should use getVectorShuffle constructor!"); 3309 case ISD::INSERT_SUBVECTOR: { 3310 SDValue Index = N3; 3311 if (VT.isSimple() && N1.getValueType().isSimple() 3312 && N2.getValueType().isSimple()) { 3313 assert(VT.isVector() && N1.getValueType().isVector() && 3314 N2.getValueType().isVector() && 3315 "Insert subvector VTs must be a vectors"); 3316 assert(VT == N1.getValueType() && 3317 "Dest and insert subvector source types must match!"); 3318 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3319 "Insert subvector must be from smaller vector to larger vector!"); 3320 if (isa<ConstantSDNode>(Index.getNode())) { 3321 assert((N2.getValueType().getVectorNumElements() + 3322 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3323 <= VT.getVectorNumElements()) 3324 && "Insert subvector overflow!"); 3325 } 3326 3327 // Trivial insertion. 3328 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3329 return N2; 3330 } 3331 break; 3332 } 3333 case ISD::BITCAST: 3334 // Fold bit_convert nodes from a type to themselves. 3335 if (N1.getValueType() == VT) 3336 return N1; 3337 break; 3338 } 3339 3340 // Memoize node if it doesn't produce a flag. 3341 SDNode *N; 3342 SDVTList VTs = getVTList(VT); 3343 if (VT != MVT::Glue) { 3344 SDValue Ops[] = { N1, N2, N3 }; 3345 FoldingSetNodeID ID; 3346 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3347 void *IP = 0; 3348 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3349 return SDValue(E, 0); 3350 3351 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3352 CSEMap.InsertNode(N, IP); 3353 } else { 3354 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3355 } 3356 3357 AllNodes.push_back(N); 3358#ifndef NDEBUG 3359 VerifySDNode(N); 3360#endif 3361 return SDValue(N, 0); 3362} 3363 3364SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3365 SDValue N1, SDValue N2, SDValue N3, 3366 SDValue N4) { 3367 SDValue Ops[] = { N1, N2, N3, N4 }; 3368 return getNode(Opcode, DL, VT, Ops, 4); 3369} 3370 3371SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3372 SDValue N1, SDValue N2, SDValue N3, 3373 SDValue N4, SDValue N5) { 3374 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3375 return getNode(Opcode, DL, VT, Ops, 5); 3376} 3377 3378/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3379/// the incoming stack arguments to be loaded from the stack. 3380SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3381 SmallVector<SDValue, 8> ArgChains; 3382 3383 // Include the original chain at the beginning of the list. When this is 3384 // used by target LowerCall hooks, this helps legalize find the 3385 // CALLSEQ_BEGIN node. 3386 ArgChains.push_back(Chain); 3387 3388 // Add a chain value for each stack argument. 3389 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3390 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3391 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3392 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3393 if (FI->getIndex() < 0) 3394 ArgChains.push_back(SDValue(L, 1)); 3395 3396 // Build a tokenfactor for all the chains. 3397 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3398 &ArgChains[0], ArgChains.size()); 3399} 3400 3401/// getMemsetValue - Vectorized representation of the memset value 3402/// operand. 3403static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3404 DebugLoc dl) { 3405 assert(Value.getOpcode() != ISD::UNDEF); 3406 3407 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3408 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3409 assert(C->getAPIntValue().getBitWidth() == 8); 3410 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue()); 3411 if (VT.isInteger()) 3412 return DAG.getConstant(Val, VT); 3413 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT); 3414 } 3415 3416 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3417 if (NumBits > 8) { 3418 // Use a multiplication with 0x010101... to extend the input to the 3419 // required length. 3420 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01)); 3421 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3422 } 3423 3424 return Value; 3425} 3426 3427/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3428/// used when a memcpy is turned into a memset when the source is a constant 3429/// string ptr. 3430static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3431 const TargetLowering &TLI, StringRef Str) { 3432 // Handle vector with all elements zero. 3433 if (Str.empty()) { 3434 if (VT.isInteger()) 3435 return DAG.getConstant(0, VT); 3436 else if (VT == MVT::f32 || VT == MVT::f64) 3437 return DAG.getConstantFP(0.0, VT); 3438 else if (VT.isVector()) { 3439 unsigned NumElts = VT.getVectorNumElements(); 3440 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3441 return DAG.getNode(ISD::BITCAST, dl, VT, 3442 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3443 EltVT, NumElts))); 3444 } else 3445 llvm_unreachable("Expected type!"); 3446 } 3447 3448 assert(!VT.isVector() && "Can't handle vector type here!"); 3449 unsigned NumVTBits = VT.getSizeInBits(); 3450 unsigned NumVTBytes = NumVTBits / 8; 3451 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3452 3453 APInt Val(NumVTBits, 0); 3454 if (TLI.isLittleEndian()) { 3455 for (unsigned i = 0; i != NumBytes; ++i) 3456 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3457 } else { 3458 for (unsigned i = 0; i != NumBytes; ++i) 3459 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3460 } 3461 3462 // If the "cost" of materializing the integer immediate is 1 or free, then 3463 // it is cost effective to turn the load into the immediate. 3464 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo(); 3465 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2) 3466 return DAG.getConstant(Val, VT); 3467 return SDValue(0, 0); 3468} 3469 3470/// getMemBasePlusOffset - Returns base and offset node for the 3471/// 3472static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3473 SelectionDAG &DAG) { 3474 EVT VT = Base.getValueType(); 3475 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3476 VT, Base, DAG.getConstant(Offset, VT)); 3477} 3478 3479/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3480/// 3481static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3482 unsigned SrcDelta = 0; 3483 GlobalAddressSDNode *G = NULL; 3484 if (Src.getOpcode() == ISD::GlobalAddress) 3485 G = cast<GlobalAddressSDNode>(Src); 3486 else if (Src.getOpcode() == ISD::ADD && 3487 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3488 Src.getOperand(1).getOpcode() == ISD::Constant) { 3489 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3490 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3491 } 3492 if (!G) 3493 return false; 3494 3495 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3496} 3497 3498/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3499/// to replace the memset / memcpy. Return true if the number of memory ops 3500/// is below the threshold. It returns the types of the sequence of 3501/// memory ops to perform memset / memcpy by reference. 3502static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3503 unsigned Limit, uint64_t Size, 3504 unsigned DstAlign, unsigned SrcAlign, 3505 bool IsMemset, 3506 bool ZeroMemset, 3507 bool MemcpyStrSrc, 3508 bool AllowOverlap, 3509 SelectionDAG &DAG, 3510 const TargetLowering &TLI) { 3511 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3512 "Expecting memcpy / memset source to meet alignment requirement!"); 3513 // If 'SrcAlign' is zero, that means the memory operation does not need to 3514 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3515 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3516 // is the specified alignment of the memory operation. If it is zero, that 3517 // means it's possible to change the alignment of the destination. 3518 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3519 // not need to be loaded. 3520 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3521 IsMemset, ZeroMemset, MemcpyStrSrc, 3522 DAG.getMachineFunction()); 3523 3524 if (VT == MVT::Other) { 3525 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() || 3526 TLI.allowsUnalignedMemoryAccesses(VT)) { 3527 VT = TLI.getPointerTy(); 3528 } else { 3529 switch (DstAlign & 7) { 3530 case 0: VT = MVT::i64; break; 3531 case 4: VT = MVT::i32; break; 3532 case 2: VT = MVT::i16; break; 3533 default: VT = MVT::i8; break; 3534 } 3535 } 3536 3537 MVT LVT = MVT::i64; 3538 while (!TLI.isTypeLegal(LVT)) 3539 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3540 assert(LVT.isInteger()); 3541 3542 if (VT.bitsGT(LVT)) 3543 VT = LVT; 3544 } 3545 3546 unsigned NumMemOps = 0; 3547 while (Size != 0) { 3548 unsigned VTSize = VT.getSizeInBits() / 8; 3549 while (VTSize > Size) { 3550 // For now, only use non-vector load / store's for the left-over pieces. 3551 EVT NewVT = VT; 3552 unsigned NewVTSize; 3553 3554 bool Found = false; 3555 if (VT.isVector() || VT.isFloatingPoint()) { 3556 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; 3557 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) && 3558 TLI.isSafeMemOpType(NewVT.getSimpleVT())) 3559 Found = true; 3560 else if (NewVT == MVT::i64 && 3561 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) && 3562 TLI.isSafeMemOpType(MVT::f64)) { 3563 // i64 is usually not legal on 32-bit targets, but f64 may be. 3564 NewVT = MVT::f64; 3565 Found = true; 3566 } 3567 } 3568 3569 if (!Found) { 3570 do { 3571 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); 3572 if (NewVT == MVT::i8) 3573 break; 3574 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT())); 3575 } 3576 NewVTSize = NewVT.getSizeInBits() / 8; 3577 3578 // If the new VT cannot cover all of the remaining bits, then consider 3579 // issuing a (or a pair of) unaligned and overlapping load / store. 3580 // FIXME: Only does this for 64-bit or more since we don't have proper 3581 // cost model for unaligned load / store. 3582 bool Fast; 3583 if (NumMemOps && AllowOverlap && 3584 VTSize >= 8 && NewVTSize < Size && 3585 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast) 3586 VTSize = Size; 3587 else { 3588 VT = NewVT; 3589 VTSize = NewVTSize; 3590 } 3591 } 3592 3593 if (++NumMemOps > Limit) 3594 return false; 3595 3596 MemOps.push_back(VT); 3597 Size -= VTSize; 3598 } 3599 3600 return true; 3601} 3602 3603static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3604 SDValue Chain, SDValue Dst, 3605 SDValue Src, uint64_t Size, 3606 unsigned Align, bool isVol, 3607 bool AlwaysInline, 3608 MachinePointerInfo DstPtrInfo, 3609 MachinePointerInfo SrcPtrInfo) { 3610 // Turn a memcpy of undef to nop. 3611 if (Src.getOpcode() == ISD::UNDEF) 3612 return Chain; 3613 3614 // Expand memcpy to a series of load and store ops if the size operand falls 3615 // below a certain threshold. 3616 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3617 // rather than maybe a humongous number of loads and stores. 3618 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3619 std::vector<EVT> MemOps; 3620 bool DstAlignCanChange = false; 3621 MachineFunction &MF = DAG.getMachineFunction(); 3622 MachineFrameInfo *MFI = MF.getFrameInfo(); 3623 bool OptSize = 3624 MF.getFunction()->getAttributes(). 3625 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3626 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3627 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3628 DstAlignCanChange = true; 3629 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3630 if (Align > SrcAlign) 3631 SrcAlign = Align; 3632 StringRef Str; 3633 bool CopyFromStr = isMemSrcFromString(Src, Str); 3634 bool isZeroStr = CopyFromStr && Str.empty(); 3635 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3636 3637 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3638 (DstAlignCanChange ? 0 : Align), 3639 (isZeroStr ? 0 : SrcAlign), 3640 false, false, CopyFromStr, true, DAG, TLI)) 3641 return SDValue(); 3642 3643 if (DstAlignCanChange) { 3644 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3645 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3646 3647 // Don't promote to an alignment that would require dynamic stack 3648 // realignment. 3649 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 3650 if (!TRI->needsStackRealignment(MF)) 3651 while (NewAlign > Align && 3652 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign)) 3653 NewAlign /= 2; 3654 3655 if (NewAlign > Align) { 3656 // Give the stack frame object a larger alignment if needed. 3657 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3658 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3659 Align = NewAlign; 3660 } 3661 } 3662 3663 SmallVector<SDValue, 8> OutChains; 3664 unsigned NumMemOps = MemOps.size(); 3665 uint64_t SrcOff = 0, DstOff = 0; 3666 for (unsigned i = 0; i != NumMemOps; ++i) { 3667 EVT VT = MemOps[i]; 3668 unsigned VTSize = VT.getSizeInBits() / 8; 3669 SDValue Value, Store; 3670 3671 if (VTSize > Size) { 3672 // Issuing an unaligned load / store pair that overlaps with the previous 3673 // pair. Adjust the offset accordingly. 3674 assert(i == NumMemOps-1 && i != 0); 3675 SrcOff -= VTSize - Size; 3676 DstOff -= VTSize - Size; 3677 } 3678 3679 if (CopyFromStr && 3680 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3681 // It's unlikely a store of a vector immediate can be done in a single 3682 // instruction. It would require a load from a constantpool first. 3683 // We only handle zero vectors here. 3684 // FIXME: Handle other cases where store of vector immediate is done in 3685 // a single instruction. 3686 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3687 if (Value.getNode()) 3688 Store = DAG.getStore(Chain, dl, Value, 3689 getMemBasePlusOffset(Dst, DstOff, DAG), 3690 DstPtrInfo.getWithOffset(DstOff), isVol, 3691 false, Align); 3692 } 3693 3694 if (!Store.getNode()) { 3695 // The type might not be legal for the target. This should only happen 3696 // if the type is smaller than a legal type, as on PPC, so the right 3697 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3698 // to Load/Store if NVT==VT. 3699 // FIXME does the case above also need this? 3700 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3701 assert(NVT.bitsGE(VT)); 3702 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3703 getMemBasePlusOffset(Src, SrcOff, DAG), 3704 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3705 MinAlign(SrcAlign, SrcOff)); 3706 Store = DAG.getTruncStore(Chain, dl, Value, 3707 getMemBasePlusOffset(Dst, DstOff, DAG), 3708 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3709 false, Align); 3710 } 3711 OutChains.push_back(Store); 3712 SrcOff += VTSize; 3713 DstOff += VTSize; 3714 Size -= VTSize; 3715 } 3716 3717 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3718 &OutChains[0], OutChains.size()); 3719} 3720 3721static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3722 SDValue Chain, SDValue Dst, 3723 SDValue Src, uint64_t Size, 3724 unsigned Align, bool isVol, 3725 bool AlwaysInline, 3726 MachinePointerInfo DstPtrInfo, 3727 MachinePointerInfo SrcPtrInfo) { 3728 // Turn a memmove of undef to nop. 3729 if (Src.getOpcode() == ISD::UNDEF) 3730 return Chain; 3731 3732 // Expand memmove to a series of load and store ops if the size operand falls 3733 // below a certain threshold. 3734 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3735 std::vector<EVT> MemOps; 3736 bool DstAlignCanChange = false; 3737 MachineFunction &MF = DAG.getMachineFunction(); 3738 MachineFrameInfo *MFI = MF.getFrameInfo(); 3739 bool OptSize = MF.getFunction()->getAttributes(). 3740 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3741 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3742 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3743 DstAlignCanChange = true; 3744 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3745 if (Align > SrcAlign) 3746 SrcAlign = Align; 3747 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3748 3749 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3750 (DstAlignCanChange ? 0 : Align), SrcAlign, 3751 false, false, false, false, DAG, TLI)) 3752 return SDValue(); 3753 3754 if (DstAlignCanChange) { 3755 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3756 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3757 if (NewAlign > Align) { 3758 // Give the stack frame object a larger alignment if needed. 3759 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3760 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3761 Align = NewAlign; 3762 } 3763 } 3764 3765 uint64_t SrcOff = 0, DstOff = 0; 3766 SmallVector<SDValue, 8> LoadValues; 3767 SmallVector<SDValue, 8> LoadChains; 3768 SmallVector<SDValue, 8> OutChains; 3769 unsigned NumMemOps = MemOps.size(); 3770 for (unsigned i = 0; i < NumMemOps; i++) { 3771 EVT VT = MemOps[i]; 3772 unsigned VTSize = VT.getSizeInBits() / 8; 3773 SDValue Value, Store; 3774 3775 Value = DAG.getLoad(VT, dl, Chain, 3776 getMemBasePlusOffset(Src, SrcOff, DAG), 3777 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3778 false, false, SrcAlign); 3779 LoadValues.push_back(Value); 3780 LoadChains.push_back(Value.getValue(1)); 3781 SrcOff += VTSize; 3782 } 3783 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3784 &LoadChains[0], LoadChains.size()); 3785 OutChains.clear(); 3786 for (unsigned i = 0; i < NumMemOps; i++) { 3787 EVT VT = MemOps[i]; 3788 unsigned VTSize = VT.getSizeInBits() / 8; 3789 SDValue Value, Store; 3790 3791 Store = DAG.getStore(Chain, dl, LoadValues[i], 3792 getMemBasePlusOffset(Dst, DstOff, DAG), 3793 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3794 OutChains.push_back(Store); 3795 DstOff += VTSize; 3796 } 3797 3798 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3799 &OutChains[0], OutChains.size()); 3800} 3801 3802static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3803 SDValue Chain, SDValue Dst, 3804 SDValue Src, uint64_t Size, 3805 unsigned Align, bool isVol, 3806 MachinePointerInfo DstPtrInfo) { 3807 // Turn a memset of undef to nop. 3808 if (Src.getOpcode() == ISD::UNDEF) 3809 return Chain; 3810 3811 // Expand memset to a series of load/store ops if the size operand 3812 // falls below a certain threshold. 3813 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3814 std::vector<EVT> MemOps; 3815 bool DstAlignCanChange = false; 3816 MachineFunction &MF = DAG.getMachineFunction(); 3817 MachineFrameInfo *MFI = MF.getFrameInfo(); 3818 bool OptSize = MF.getFunction()->getAttributes(). 3819 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3820 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3821 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3822 DstAlignCanChange = true; 3823 bool IsZeroVal = 3824 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3825 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3826 Size, (DstAlignCanChange ? 0 : Align), 0, 3827 true, IsZeroVal, false, true, DAG, TLI)) 3828 return SDValue(); 3829 3830 if (DstAlignCanChange) { 3831 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3832 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3833 if (NewAlign > Align) { 3834 // Give the stack frame object a larger alignment if needed. 3835 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3836 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3837 Align = NewAlign; 3838 } 3839 } 3840 3841 SmallVector<SDValue, 8> OutChains; 3842 uint64_t DstOff = 0; 3843 unsigned NumMemOps = MemOps.size(); 3844 3845 // Find the largest store and generate the bit pattern for it. 3846 EVT LargestVT = MemOps[0]; 3847 for (unsigned i = 1; i < NumMemOps; i++) 3848 if (MemOps[i].bitsGT(LargestVT)) 3849 LargestVT = MemOps[i]; 3850 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3851 3852 for (unsigned i = 0; i < NumMemOps; i++) { 3853 EVT VT = MemOps[i]; 3854 unsigned VTSize = VT.getSizeInBits() / 8; 3855 if (VTSize > Size) { 3856 // Issuing an unaligned load / store pair that overlaps with the previous 3857 // pair. Adjust the offset accordingly. 3858 assert(i == NumMemOps-1 && i != 0); 3859 DstOff -= VTSize - Size; 3860 } 3861 3862 // If this store is smaller than the largest store see whether we can get 3863 // the smaller value for free with a truncate. 3864 SDValue Value = MemSetValue; 3865 if (VT.bitsLT(LargestVT)) { 3866 if (!LargestVT.isVector() && !VT.isVector() && 3867 TLI.isTruncateFree(LargestVT, VT)) 3868 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3869 else 3870 Value = getMemsetValue(Src, VT, DAG, dl); 3871 } 3872 assert(Value.getValueType() == VT && "Value with wrong type."); 3873 SDValue Store = DAG.getStore(Chain, dl, Value, 3874 getMemBasePlusOffset(Dst, DstOff, DAG), 3875 DstPtrInfo.getWithOffset(DstOff), 3876 isVol, false, Align); 3877 OutChains.push_back(Store); 3878 DstOff += VT.getSizeInBits() / 8; 3879 Size -= VTSize; 3880 } 3881 3882 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3883 &OutChains[0], OutChains.size()); 3884} 3885 3886SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3887 SDValue Src, SDValue Size, 3888 unsigned Align, bool isVol, bool AlwaysInline, 3889 MachinePointerInfo DstPtrInfo, 3890 MachinePointerInfo SrcPtrInfo) { 3891 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 3892 3893 // Check to see if we should lower the memcpy to loads and stores first. 3894 // For cases within the target-specified limits, this is the best choice. 3895 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3896 if (ConstantSize) { 3897 // Memcpy with size zero? Just return the original chain. 3898 if (ConstantSize->isNullValue()) 3899 return Chain; 3900 3901 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3902 ConstantSize->getZExtValue(),Align, 3903 isVol, false, DstPtrInfo, SrcPtrInfo); 3904 if (Result.getNode()) 3905 return Result; 3906 } 3907 3908 // Then check to see if we should lower the memcpy with target-specific 3909 // code. If the target chooses to do this, this is the next best. 3910 SDValue Result = 3911 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3912 isVol, AlwaysInline, 3913 DstPtrInfo, SrcPtrInfo); 3914 if (Result.getNode()) 3915 return Result; 3916 3917 // If we really need inline code and the target declined to provide it, 3918 // use a (potentially long) sequence of loads and stores. 3919 if (AlwaysInline) { 3920 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3921 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3922 ConstantSize->getZExtValue(), Align, isVol, 3923 true, DstPtrInfo, SrcPtrInfo); 3924 } 3925 3926 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3927 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3928 // respect volatile, so they may do things like read or write memory 3929 // beyond the given memory regions. But fixing this isn't easy, and most 3930 // people don't care. 3931 3932 // Emit a library call. 3933 TargetLowering::ArgListTy Args; 3934 TargetLowering::ArgListEntry Entry; 3935 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3936 Entry.Node = Dst; Args.push_back(Entry); 3937 Entry.Node = Src; Args.push_back(Entry); 3938 Entry.Node = Size; Args.push_back(Entry); 3939 // FIXME: pass in DebugLoc 3940 TargetLowering:: 3941 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3942 false, false, false, false, 0, 3943 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3944 /*isTailCall=*/false, 3945 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3946 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3947 TLI.getPointerTy()), 3948 Args, *this, dl); 3949 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3950 3951 return CallResult.second; 3952} 3953 3954SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3955 SDValue Src, SDValue Size, 3956 unsigned Align, bool isVol, 3957 MachinePointerInfo DstPtrInfo, 3958 MachinePointerInfo SrcPtrInfo) { 3959 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 3960 3961 // Check to see if we should lower the memmove to loads and stores first. 3962 // For cases within the target-specified limits, this is the best choice. 3963 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3964 if (ConstantSize) { 3965 // Memmove with size zero? Just return the original chain. 3966 if (ConstantSize->isNullValue()) 3967 return Chain; 3968 3969 SDValue Result = 3970 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3971 ConstantSize->getZExtValue(), Align, isVol, 3972 false, DstPtrInfo, SrcPtrInfo); 3973 if (Result.getNode()) 3974 return Result; 3975 } 3976 3977 // Then check to see if we should lower the memmove with target-specific 3978 // code. If the target chooses to do this, this is the next best. 3979 SDValue Result = 3980 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3981 DstPtrInfo, SrcPtrInfo); 3982 if (Result.getNode()) 3983 return Result; 3984 3985 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3986 // not be safe. See memcpy above for more details. 3987 3988 // Emit a library call. 3989 TargetLowering::ArgListTy Args; 3990 TargetLowering::ArgListEntry Entry; 3991 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3992 Entry.Node = Dst; Args.push_back(Entry); 3993 Entry.Node = Src; Args.push_back(Entry); 3994 Entry.Node = Size; Args.push_back(Entry); 3995 // FIXME: pass in DebugLoc 3996 TargetLowering:: 3997 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3998 false, false, false, false, 0, 3999 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 4000 /*isTailCall=*/false, 4001 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 4002 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 4003 TLI.getPointerTy()), 4004 Args, *this, dl); 4005 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 4006 4007 return CallResult.second; 4008} 4009 4010SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 4011 SDValue Src, SDValue Size, 4012 unsigned Align, bool isVol, 4013 MachinePointerInfo DstPtrInfo) { 4014 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 4015 4016 // Check to see if we should lower the memset to stores first. 4017 // For cases within the target-specified limits, this is the best choice. 4018 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 4019 if (ConstantSize) { 4020 // Memset with size zero? Just return the original chain. 4021 if (ConstantSize->isNullValue()) 4022 return Chain; 4023 4024 SDValue Result = 4025 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 4026 Align, isVol, DstPtrInfo); 4027 4028 if (Result.getNode()) 4029 return Result; 4030 } 4031 4032 // Then check to see if we should lower the memset with target-specific 4033 // code. If the target chooses to do this, this is the next best. 4034 SDValue Result = 4035 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4036 DstPtrInfo); 4037 if (Result.getNode()) 4038 return Result; 4039 4040 // Emit a library call. 4041 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext()); 4042 TargetLowering::ArgListTy Args; 4043 TargetLowering::ArgListEntry Entry; 4044 Entry.Node = Dst; Entry.Ty = IntPtrTy; 4045 Args.push_back(Entry); 4046 // Extend or truncate the argument to be an i32 value for the call. 4047 if (Src.getValueType().bitsGT(MVT::i32)) 4048 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 4049 else 4050 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 4051 Entry.Node = Src; 4052 Entry.Ty = Type::getInt32Ty(*getContext()); 4053 Entry.isSExt = true; 4054 Args.push_back(Entry); 4055 Entry.Node = Size; 4056 Entry.Ty = IntPtrTy; 4057 Entry.isSExt = false; 4058 Args.push_back(Entry); 4059 // FIXME: pass in DebugLoc 4060 TargetLowering:: 4061 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4062 false, false, false, false, 0, 4063 TLI.getLibcallCallingConv(RTLIB::MEMSET), 4064 /*isTailCall=*/false, 4065 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 4066 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 4067 TLI.getPointerTy()), 4068 Args, *this, dl); 4069 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 4070 4071 return CallResult.second; 4072} 4073 4074SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4075 SDValue Chain, SDValue Ptr, SDValue Cmp, 4076 SDValue Swp, MachinePointerInfo PtrInfo, 4077 unsigned Alignment, 4078 AtomicOrdering Ordering, 4079 SynchronizationScope SynchScope) { 4080 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4081 Alignment = getEVTAlignment(MemVT); 4082 4083 MachineFunction &MF = getMachineFunction(); 4084 4085 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE. 4086 // For now, atomics are considered to be volatile always. 4087 // FIXME: Volatile isn't really correct; we should keep track of atomic 4088 // orderings in the memoperand. 4089 unsigned Flags = MachineMemOperand::MOVolatile; 4090 if (Opcode != ISD::ATOMIC_STORE) 4091 Flags |= MachineMemOperand::MOLoad; 4092 if (Opcode != ISD::ATOMIC_LOAD) 4093 Flags |= MachineMemOperand::MOStore; 4094 4095 MachineMemOperand *MMO = 4096 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 4097 4098 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 4099 Ordering, SynchScope); 4100} 4101 4102SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4103 SDValue Chain, 4104 SDValue Ptr, SDValue Cmp, 4105 SDValue Swp, MachineMemOperand *MMO, 4106 AtomicOrdering Ordering, 4107 SynchronizationScope SynchScope) { 4108 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 4109 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 4110 4111 EVT VT = Cmp.getValueType(); 4112 4113 SDVTList VTs = getVTList(VT, MVT::Other); 4114 FoldingSetNodeID ID; 4115 ID.AddInteger(MemVT.getRawBits()); 4116 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 4117 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 4118 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4119 void* IP = 0; 4120 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4121 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4122 return SDValue(E, 0); 4123 } 4124 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4125 Ptr, Cmp, Swp, MMO, Ordering, 4126 SynchScope); 4127 CSEMap.InsertNode(N, IP); 4128 AllNodes.push_back(N); 4129 return SDValue(N, 0); 4130} 4131 4132SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4133 SDValue Chain, 4134 SDValue Ptr, SDValue Val, 4135 const Value* PtrVal, 4136 unsigned Alignment, 4137 AtomicOrdering Ordering, 4138 SynchronizationScope SynchScope) { 4139 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4140 Alignment = getEVTAlignment(MemVT); 4141 4142 MachineFunction &MF = getMachineFunction(); 4143 // An atomic store does not load. An atomic load does not store. 4144 // (An atomicrmw obviously both loads and stores.) 4145 // For now, atomics are considered to be volatile always, and they are 4146 // chained as such. 4147 // FIXME: Volatile isn't really correct; we should keep track of atomic 4148 // orderings in the memoperand. 4149 unsigned Flags = MachineMemOperand::MOVolatile; 4150 if (Opcode != ISD::ATOMIC_STORE) 4151 Flags |= MachineMemOperand::MOLoad; 4152 if (Opcode != ISD::ATOMIC_LOAD) 4153 Flags |= MachineMemOperand::MOStore; 4154 4155 MachineMemOperand *MMO = 4156 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4157 MemVT.getStoreSize(), Alignment); 4158 4159 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4160 Ordering, SynchScope); 4161} 4162 4163SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4164 SDValue Chain, 4165 SDValue Ptr, SDValue Val, 4166 MachineMemOperand *MMO, 4167 AtomicOrdering Ordering, 4168 SynchronizationScope SynchScope) { 4169 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4170 Opcode == ISD::ATOMIC_LOAD_SUB || 4171 Opcode == ISD::ATOMIC_LOAD_AND || 4172 Opcode == ISD::ATOMIC_LOAD_OR || 4173 Opcode == ISD::ATOMIC_LOAD_XOR || 4174 Opcode == ISD::ATOMIC_LOAD_NAND || 4175 Opcode == ISD::ATOMIC_LOAD_MIN || 4176 Opcode == ISD::ATOMIC_LOAD_MAX || 4177 Opcode == ISD::ATOMIC_LOAD_UMIN || 4178 Opcode == ISD::ATOMIC_LOAD_UMAX || 4179 Opcode == ISD::ATOMIC_SWAP || 4180 Opcode == ISD::ATOMIC_STORE) && 4181 "Invalid Atomic Op"); 4182 4183 EVT VT = Val.getValueType(); 4184 4185 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4186 getVTList(VT, MVT::Other); 4187 FoldingSetNodeID ID; 4188 ID.AddInteger(MemVT.getRawBits()); 4189 SDValue Ops[] = {Chain, Ptr, Val}; 4190 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 4191 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4192 void* IP = 0; 4193 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4194 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4195 return SDValue(E, 0); 4196 } 4197 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4198 Ptr, Val, MMO, 4199 Ordering, SynchScope); 4200 CSEMap.InsertNode(N, IP); 4201 AllNodes.push_back(N); 4202 return SDValue(N, 0); 4203} 4204 4205SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4206 EVT VT, SDValue Chain, 4207 SDValue Ptr, 4208 const Value* PtrVal, 4209 unsigned Alignment, 4210 AtomicOrdering Ordering, 4211 SynchronizationScope SynchScope) { 4212 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4213 Alignment = getEVTAlignment(MemVT); 4214 4215 MachineFunction &MF = getMachineFunction(); 4216 // An atomic store does not load. An atomic load does not store. 4217 // (An atomicrmw obviously both loads and stores.) 4218 // For now, atomics are considered to be volatile always, and they are 4219 // chained as such. 4220 // FIXME: Volatile isn't really correct; we should keep track of atomic 4221 // orderings in the memoperand. 4222 unsigned Flags = MachineMemOperand::MOVolatile; 4223 if (Opcode != ISD::ATOMIC_STORE) 4224 Flags |= MachineMemOperand::MOLoad; 4225 if (Opcode != ISD::ATOMIC_LOAD) 4226 Flags |= MachineMemOperand::MOStore; 4227 4228 MachineMemOperand *MMO = 4229 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4230 MemVT.getStoreSize(), Alignment); 4231 4232 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4233 Ordering, SynchScope); 4234} 4235 4236SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4237 EVT VT, SDValue Chain, 4238 SDValue Ptr, 4239 MachineMemOperand *MMO, 4240 AtomicOrdering Ordering, 4241 SynchronizationScope SynchScope) { 4242 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4243 4244 SDVTList VTs = getVTList(VT, MVT::Other); 4245 FoldingSetNodeID ID; 4246 ID.AddInteger(MemVT.getRawBits()); 4247 SDValue Ops[] = {Chain, Ptr}; 4248 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4249 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4250 void* IP = 0; 4251 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4252 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4253 return SDValue(E, 0); 4254 } 4255 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4256 Ptr, MMO, Ordering, SynchScope); 4257 CSEMap.InsertNode(N, IP); 4258 AllNodes.push_back(N); 4259 return SDValue(N, 0); 4260} 4261 4262/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4263SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4264 DebugLoc dl) { 4265 if (NumOps == 1) 4266 return Ops[0]; 4267 4268 SmallVector<EVT, 4> VTs; 4269 VTs.reserve(NumOps); 4270 for (unsigned i = 0; i < NumOps; ++i) 4271 VTs.push_back(Ops[i].getValueType()); 4272 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4273 Ops, NumOps); 4274} 4275 4276SDValue 4277SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4278 const EVT *VTs, unsigned NumVTs, 4279 const SDValue *Ops, unsigned NumOps, 4280 EVT MemVT, MachinePointerInfo PtrInfo, 4281 unsigned Align, bool Vol, 4282 bool ReadMem, bool WriteMem) { 4283 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4284 MemVT, PtrInfo, Align, Vol, 4285 ReadMem, WriteMem); 4286} 4287 4288SDValue 4289SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4290 const SDValue *Ops, unsigned NumOps, 4291 EVT MemVT, MachinePointerInfo PtrInfo, 4292 unsigned Align, bool Vol, 4293 bool ReadMem, bool WriteMem) { 4294 if (Align == 0) // Ensure that codegen never sees alignment 0 4295 Align = getEVTAlignment(MemVT); 4296 4297 MachineFunction &MF = getMachineFunction(); 4298 unsigned Flags = 0; 4299 if (WriteMem) 4300 Flags |= MachineMemOperand::MOStore; 4301 if (ReadMem) 4302 Flags |= MachineMemOperand::MOLoad; 4303 if (Vol) 4304 Flags |= MachineMemOperand::MOVolatile; 4305 MachineMemOperand *MMO = 4306 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4307 4308 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4309} 4310 4311SDValue 4312SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4313 const SDValue *Ops, unsigned NumOps, 4314 EVT MemVT, MachineMemOperand *MMO) { 4315 assert((Opcode == ISD::INTRINSIC_VOID || 4316 Opcode == ISD::INTRINSIC_W_CHAIN || 4317 Opcode == ISD::PREFETCH || 4318 Opcode == ISD::LIFETIME_START || 4319 Opcode == ISD::LIFETIME_END || 4320 (Opcode <= INT_MAX && 4321 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4322 "Opcode is not a memory-accessing opcode!"); 4323 4324 // Memoize the node unless it returns a flag. 4325 MemIntrinsicSDNode *N; 4326 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4327 FoldingSetNodeID ID; 4328 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4329 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4330 void *IP = 0; 4331 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4332 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4333 return SDValue(E, 0); 4334 } 4335 4336 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4337 MemVT, MMO); 4338 CSEMap.InsertNode(N, IP); 4339 } else { 4340 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4341 MemVT, MMO); 4342 } 4343 AllNodes.push_back(N); 4344 return SDValue(N, 0); 4345} 4346 4347/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4348/// MachinePointerInfo record from it. This is particularly useful because the 4349/// code generator has many cases where it doesn't bother passing in a 4350/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4351static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4352 // If this is FI+Offset, we can model it. 4353 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4354 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4355 4356 // If this is (FI+Offset1)+Offset2, we can model it. 4357 if (Ptr.getOpcode() != ISD::ADD || 4358 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4359 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4360 return MachinePointerInfo(); 4361 4362 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4363 return MachinePointerInfo::getFixedStack(FI, Offset+ 4364 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4365} 4366 4367/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4368/// MachinePointerInfo record from it. This is particularly useful because the 4369/// code generator has many cases where it doesn't bother passing in a 4370/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4371static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4372 // If the 'Offset' value isn't a constant, we can't handle this. 4373 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4374 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4375 if (OffsetOp.getOpcode() == ISD::UNDEF) 4376 return InferPointerInfo(Ptr); 4377 return MachinePointerInfo(); 4378} 4379 4380 4381SDValue 4382SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4383 EVT VT, DebugLoc dl, SDValue Chain, 4384 SDValue Ptr, SDValue Offset, 4385 MachinePointerInfo PtrInfo, EVT MemVT, 4386 bool isVolatile, bool isNonTemporal, bool isInvariant, 4387 unsigned Alignment, const MDNode *TBAAInfo, 4388 const MDNode *Ranges) { 4389 assert(Chain.getValueType() == MVT::Other && 4390 "Invalid chain type"); 4391 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4392 Alignment = getEVTAlignment(VT); 4393 4394 unsigned Flags = MachineMemOperand::MOLoad; 4395 if (isVolatile) 4396 Flags |= MachineMemOperand::MOVolatile; 4397 if (isNonTemporal) 4398 Flags |= MachineMemOperand::MONonTemporal; 4399 if (isInvariant) 4400 Flags |= MachineMemOperand::MOInvariant; 4401 4402 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4403 // clients. 4404 if (PtrInfo.V == 0) 4405 PtrInfo = InferPointerInfo(Ptr, Offset); 4406 4407 MachineFunction &MF = getMachineFunction(); 4408 MachineMemOperand *MMO = 4409 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4410 TBAAInfo, Ranges); 4411 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4412} 4413 4414SDValue 4415SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4416 EVT VT, DebugLoc dl, SDValue Chain, 4417 SDValue Ptr, SDValue Offset, EVT MemVT, 4418 MachineMemOperand *MMO) { 4419 if (VT == MemVT) { 4420 ExtType = ISD::NON_EXTLOAD; 4421 } else if (ExtType == ISD::NON_EXTLOAD) { 4422 assert(VT == MemVT && "Non-extending load from different memory type!"); 4423 } else { 4424 // Extending load. 4425 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4426 "Should only be an extending load, not truncating!"); 4427 assert(VT.isInteger() == MemVT.isInteger() && 4428 "Cannot convert from FP to Int or Int -> FP!"); 4429 assert(VT.isVector() == MemVT.isVector() && 4430 "Cannot use trunc store to convert to or from a vector!"); 4431 assert((!VT.isVector() || 4432 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4433 "Cannot use trunc store to change the number of vector elements!"); 4434 } 4435 4436 bool Indexed = AM != ISD::UNINDEXED; 4437 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4438 "Unindexed load with an offset!"); 4439 4440 SDVTList VTs = Indexed ? 4441 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4442 SDValue Ops[] = { Chain, Ptr, Offset }; 4443 FoldingSetNodeID ID; 4444 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4445 ID.AddInteger(MemVT.getRawBits()); 4446 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4447 MMO->isNonTemporal(), 4448 MMO->isInvariant())); 4449 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4450 void *IP = 0; 4451 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4452 cast<LoadSDNode>(E)->refineAlignment(MMO); 4453 return SDValue(E, 0); 4454 } 4455 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4456 MemVT, MMO); 4457 CSEMap.InsertNode(N, IP); 4458 AllNodes.push_back(N); 4459 return SDValue(N, 0); 4460} 4461 4462SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4463 SDValue Chain, SDValue Ptr, 4464 MachinePointerInfo PtrInfo, 4465 bool isVolatile, bool isNonTemporal, 4466 bool isInvariant, unsigned Alignment, 4467 const MDNode *TBAAInfo, 4468 const MDNode *Ranges) { 4469 SDValue Undef = getUNDEF(Ptr.getValueType()); 4470 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4471 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4472 TBAAInfo, Ranges); 4473} 4474 4475SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4476 SDValue Chain, SDValue Ptr, 4477 MachinePointerInfo PtrInfo, EVT MemVT, 4478 bool isVolatile, bool isNonTemporal, 4479 unsigned Alignment, const MDNode *TBAAInfo) { 4480 SDValue Undef = getUNDEF(Ptr.getValueType()); 4481 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4482 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4483 TBAAInfo); 4484} 4485 4486 4487SDValue 4488SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4489 SDValue Offset, ISD::MemIndexedMode AM) { 4490 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4491 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4492 "Load is already a indexed load!"); 4493 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4494 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4495 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4496 false, LD->getAlignment()); 4497} 4498 4499SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4500 SDValue Ptr, MachinePointerInfo PtrInfo, 4501 bool isVolatile, bool isNonTemporal, 4502 unsigned Alignment, const MDNode *TBAAInfo) { 4503 assert(Chain.getValueType() == MVT::Other && 4504 "Invalid chain type"); 4505 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4506 Alignment = getEVTAlignment(Val.getValueType()); 4507 4508 unsigned Flags = MachineMemOperand::MOStore; 4509 if (isVolatile) 4510 Flags |= MachineMemOperand::MOVolatile; 4511 if (isNonTemporal) 4512 Flags |= MachineMemOperand::MONonTemporal; 4513 4514 if (PtrInfo.V == 0) 4515 PtrInfo = InferPointerInfo(Ptr); 4516 4517 MachineFunction &MF = getMachineFunction(); 4518 MachineMemOperand *MMO = 4519 MF.getMachineMemOperand(PtrInfo, Flags, 4520 Val.getValueType().getStoreSize(), Alignment, 4521 TBAAInfo); 4522 4523 return getStore(Chain, dl, Val, Ptr, MMO); 4524} 4525 4526SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4527 SDValue Ptr, MachineMemOperand *MMO) { 4528 assert(Chain.getValueType() == MVT::Other && 4529 "Invalid chain type"); 4530 EVT VT = Val.getValueType(); 4531 SDVTList VTs = getVTList(MVT::Other); 4532 SDValue Undef = getUNDEF(Ptr.getValueType()); 4533 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4534 FoldingSetNodeID ID; 4535 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4536 ID.AddInteger(VT.getRawBits()); 4537 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4538 MMO->isNonTemporal(), MMO->isInvariant())); 4539 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4540 void *IP = 0; 4541 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4542 cast<StoreSDNode>(E)->refineAlignment(MMO); 4543 return SDValue(E, 0); 4544 } 4545 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4546 false, VT, MMO); 4547 CSEMap.InsertNode(N, IP); 4548 AllNodes.push_back(N); 4549 return SDValue(N, 0); 4550} 4551 4552SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4553 SDValue Ptr, MachinePointerInfo PtrInfo, 4554 EVT SVT,bool isVolatile, bool isNonTemporal, 4555 unsigned Alignment, 4556 const MDNode *TBAAInfo) { 4557 assert(Chain.getValueType() == MVT::Other && 4558 "Invalid chain type"); 4559 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4560 Alignment = getEVTAlignment(SVT); 4561 4562 unsigned Flags = MachineMemOperand::MOStore; 4563 if (isVolatile) 4564 Flags |= MachineMemOperand::MOVolatile; 4565 if (isNonTemporal) 4566 Flags |= MachineMemOperand::MONonTemporal; 4567 4568 if (PtrInfo.V == 0) 4569 PtrInfo = InferPointerInfo(Ptr); 4570 4571 MachineFunction &MF = getMachineFunction(); 4572 MachineMemOperand *MMO = 4573 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4574 TBAAInfo); 4575 4576 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4577} 4578 4579SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4580 SDValue Ptr, EVT SVT, 4581 MachineMemOperand *MMO) { 4582 EVT VT = Val.getValueType(); 4583 4584 assert(Chain.getValueType() == MVT::Other && 4585 "Invalid chain type"); 4586 if (VT == SVT) 4587 return getStore(Chain, dl, Val, Ptr, MMO); 4588 4589 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4590 "Should only be a truncating store, not extending!"); 4591 assert(VT.isInteger() == SVT.isInteger() && 4592 "Can't do FP-INT conversion!"); 4593 assert(VT.isVector() == SVT.isVector() && 4594 "Cannot use trunc store to convert to or from a vector!"); 4595 assert((!VT.isVector() || 4596 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4597 "Cannot use trunc store to change the number of vector elements!"); 4598 4599 SDVTList VTs = getVTList(MVT::Other); 4600 SDValue Undef = getUNDEF(Ptr.getValueType()); 4601 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4602 FoldingSetNodeID ID; 4603 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4604 ID.AddInteger(SVT.getRawBits()); 4605 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4606 MMO->isNonTemporal(), MMO->isInvariant())); 4607 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4608 void *IP = 0; 4609 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4610 cast<StoreSDNode>(E)->refineAlignment(MMO); 4611 return SDValue(E, 0); 4612 } 4613 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4614 true, SVT, MMO); 4615 CSEMap.InsertNode(N, IP); 4616 AllNodes.push_back(N); 4617 return SDValue(N, 0); 4618} 4619 4620SDValue 4621SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4622 SDValue Offset, ISD::MemIndexedMode AM) { 4623 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4624 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4625 "Store is already a indexed store!"); 4626 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4627 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4628 FoldingSetNodeID ID; 4629 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4630 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4631 ID.AddInteger(ST->getRawSubclassData()); 4632 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4633 void *IP = 0; 4634 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4635 return SDValue(E, 0); 4636 4637 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4638 ST->isTruncatingStore(), 4639 ST->getMemoryVT(), 4640 ST->getMemOperand()); 4641 CSEMap.InsertNode(N, IP); 4642 AllNodes.push_back(N); 4643 return SDValue(N, 0); 4644} 4645 4646SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4647 SDValue Chain, SDValue Ptr, 4648 SDValue SV, 4649 unsigned Align) { 4650 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4651 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4652} 4653 4654SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4655 const SDUse *Ops, unsigned NumOps) { 4656 switch (NumOps) { 4657 case 0: return getNode(Opcode, DL, VT); 4658 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4659 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4660 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4661 default: break; 4662 } 4663 4664 // Copy from an SDUse array into an SDValue array for use with 4665 // the regular getNode logic. 4666 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4667 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4668} 4669 4670SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4671 const SDValue *Ops, unsigned NumOps) { 4672 switch (NumOps) { 4673 case 0: return getNode(Opcode, DL, VT); 4674 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4675 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4676 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4677 default: break; 4678 } 4679 4680 switch (Opcode) { 4681 default: break; 4682 case ISD::SELECT_CC: { 4683 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4684 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4685 "LHS and RHS of condition must have same type!"); 4686 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4687 "True and False arms of SelectCC must have same type!"); 4688 assert(Ops[2].getValueType() == VT && 4689 "select_cc node must be of same type as true and false value!"); 4690 break; 4691 } 4692 case ISD::BR_CC: { 4693 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4694 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4695 "LHS/RHS of comparison should match types!"); 4696 break; 4697 } 4698 } 4699 4700 // Memoize nodes. 4701 SDNode *N; 4702 SDVTList VTs = getVTList(VT); 4703 4704 if (VT != MVT::Glue) { 4705 FoldingSetNodeID ID; 4706 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4707 void *IP = 0; 4708 4709 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4710 return SDValue(E, 0); 4711 4712 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4713 CSEMap.InsertNode(N, IP); 4714 } else { 4715 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4716 } 4717 4718 AllNodes.push_back(N); 4719#ifndef NDEBUG 4720 VerifySDNode(N); 4721#endif 4722 return SDValue(N, 0); 4723} 4724 4725SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4726 ArrayRef<EVT> ResultTys, 4727 const SDValue *Ops, unsigned NumOps) { 4728 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4729 Ops, NumOps); 4730} 4731 4732SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4733 const EVT *VTs, unsigned NumVTs, 4734 const SDValue *Ops, unsigned NumOps) { 4735 if (NumVTs == 1) 4736 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4737 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4738} 4739 4740SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4741 const SDValue *Ops, unsigned NumOps) { 4742 if (VTList.NumVTs == 1) 4743 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4744 4745#if 0 4746 switch (Opcode) { 4747 // FIXME: figure out how to safely handle things like 4748 // int foo(int x) { return 1 << (x & 255); } 4749 // int bar() { return foo(256); } 4750 case ISD::SRA_PARTS: 4751 case ISD::SRL_PARTS: 4752 case ISD::SHL_PARTS: 4753 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4754 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4755 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4756 else if (N3.getOpcode() == ISD::AND) 4757 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4758 // If the and is only masking out bits that cannot effect the shift, 4759 // eliminate the and. 4760 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4761 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4762 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4763 } 4764 break; 4765 } 4766#endif 4767 4768 // Memoize the node unless it returns a flag. 4769 SDNode *N; 4770 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4771 FoldingSetNodeID ID; 4772 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4773 void *IP = 0; 4774 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4775 return SDValue(E, 0); 4776 4777 if (NumOps == 1) { 4778 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4779 } else if (NumOps == 2) { 4780 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4781 } else if (NumOps == 3) { 4782 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4783 Ops[2]); 4784 } else { 4785 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4786 } 4787 CSEMap.InsertNode(N, IP); 4788 } else { 4789 if (NumOps == 1) { 4790 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4791 } else if (NumOps == 2) { 4792 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4793 } else if (NumOps == 3) { 4794 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4795 Ops[2]); 4796 } else { 4797 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4798 } 4799 } 4800 AllNodes.push_back(N); 4801#ifndef NDEBUG 4802 VerifySDNode(N); 4803#endif 4804 return SDValue(N, 0); 4805} 4806 4807SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4808 return getNode(Opcode, DL, VTList, 0, 0); 4809} 4810 4811SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4812 SDValue N1) { 4813 SDValue Ops[] = { N1 }; 4814 return getNode(Opcode, DL, VTList, Ops, 1); 4815} 4816 4817SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4818 SDValue N1, SDValue N2) { 4819 SDValue Ops[] = { N1, N2 }; 4820 return getNode(Opcode, DL, VTList, Ops, 2); 4821} 4822 4823SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4824 SDValue N1, SDValue N2, SDValue N3) { 4825 SDValue Ops[] = { N1, N2, N3 }; 4826 return getNode(Opcode, DL, VTList, Ops, 3); 4827} 4828 4829SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4830 SDValue N1, SDValue N2, SDValue N3, 4831 SDValue N4) { 4832 SDValue Ops[] = { N1, N2, N3, N4 }; 4833 return getNode(Opcode, DL, VTList, Ops, 4); 4834} 4835 4836SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4837 SDValue N1, SDValue N2, SDValue N3, 4838 SDValue N4, SDValue N5) { 4839 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4840 return getNode(Opcode, DL, VTList, Ops, 5); 4841} 4842 4843SDVTList SelectionDAG::getVTList(EVT VT) { 4844 return makeVTList(SDNode::getValueTypeList(VT), 1); 4845} 4846 4847SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4848 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4849 E = VTList.rend(); I != E; ++I) 4850 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4851 return *I; 4852 4853 EVT *Array = Allocator.Allocate<EVT>(2); 4854 Array[0] = VT1; 4855 Array[1] = VT2; 4856 SDVTList Result = makeVTList(Array, 2); 4857 VTList.push_back(Result); 4858 return Result; 4859} 4860 4861SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4862 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4863 E = VTList.rend(); I != E; ++I) 4864 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4865 I->VTs[2] == VT3) 4866 return *I; 4867 4868 EVT *Array = Allocator.Allocate<EVT>(3); 4869 Array[0] = VT1; 4870 Array[1] = VT2; 4871 Array[2] = VT3; 4872 SDVTList Result = makeVTList(Array, 3); 4873 VTList.push_back(Result); 4874 return Result; 4875} 4876 4877SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4878 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4879 E = VTList.rend(); I != E; ++I) 4880 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4881 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4882 return *I; 4883 4884 EVT *Array = Allocator.Allocate<EVT>(4); 4885 Array[0] = VT1; 4886 Array[1] = VT2; 4887 Array[2] = VT3; 4888 Array[3] = VT4; 4889 SDVTList Result = makeVTList(Array, 4); 4890 VTList.push_back(Result); 4891 return Result; 4892} 4893 4894SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4895 switch (NumVTs) { 4896 case 0: llvm_unreachable("Cannot have nodes without results!"); 4897 case 1: return getVTList(VTs[0]); 4898 case 2: return getVTList(VTs[0], VTs[1]); 4899 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4900 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4901 default: break; 4902 } 4903 4904 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4905 E = VTList.rend(); I != E; ++I) { 4906 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4907 continue; 4908 4909 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4910 return *I; 4911 } 4912 4913 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4914 std::copy(VTs, VTs+NumVTs, Array); 4915 SDVTList Result = makeVTList(Array, NumVTs); 4916 VTList.push_back(Result); 4917 return Result; 4918} 4919 4920 4921/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4922/// specified operands. If the resultant node already exists in the DAG, 4923/// this does not modify the specified node, instead it returns the node that 4924/// already exists. If the resultant node does not exist in the DAG, the 4925/// input node is returned. As a degenerate case, if you specify the same 4926/// input operands as the node already has, the input node is returned. 4927SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4928 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4929 4930 // Check to see if there is no change. 4931 if (Op == N->getOperand(0)) return N; 4932 4933 // See if the modified node already exists. 4934 void *InsertPos = 0; 4935 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4936 return Existing; 4937 4938 // Nope it doesn't. Remove the node from its current place in the maps. 4939 if (InsertPos) 4940 if (!RemoveNodeFromCSEMaps(N)) 4941 InsertPos = 0; 4942 4943 // Now we update the operands. 4944 N->OperandList[0].set(Op); 4945 4946 // If this gets put into a CSE map, add it. 4947 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4948 return N; 4949} 4950 4951SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4952 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4953 4954 // Check to see if there is no change. 4955 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4956 return N; // No operands changed, just return the input node. 4957 4958 // See if the modified node already exists. 4959 void *InsertPos = 0; 4960 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4961 return Existing; 4962 4963 // Nope it doesn't. Remove the node from its current place in the maps. 4964 if (InsertPos) 4965 if (!RemoveNodeFromCSEMaps(N)) 4966 InsertPos = 0; 4967 4968 // Now we update the operands. 4969 if (N->OperandList[0] != Op1) 4970 N->OperandList[0].set(Op1); 4971 if (N->OperandList[1] != Op2) 4972 N->OperandList[1].set(Op2); 4973 4974 // If this gets put into a CSE map, add it. 4975 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4976 return N; 4977} 4978 4979SDNode *SelectionDAG:: 4980UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4981 SDValue Ops[] = { Op1, Op2, Op3 }; 4982 return UpdateNodeOperands(N, Ops, 3); 4983} 4984 4985SDNode *SelectionDAG:: 4986UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4987 SDValue Op3, SDValue Op4) { 4988 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4989 return UpdateNodeOperands(N, Ops, 4); 4990} 4991 4992SDNode *SelectionDAG:: 4993UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4994 SDValue Op3, SDValue Op4, SDValue Op5) { 4995 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4996 return UpdateNodeOperands(N, Ops, 5); 4997} 4998 4999SDNode *SelectionDAG:: 5000UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 5001 assert(N->getNumOperands() == NumOps && 5002 "Update with wrong number of operands"); 5003 5004 // Check to see if there is no change. 5005 bool AnyChange = false; 5006 for (unsigned i = 0; i != NumOps; ++i) { 5007 if (Ops[i] != N->getOperand(i)) { 5008 AnyChange = true; 5009 break; 5010 } 5011 } 5012 5013 // No operands changed, just return the input node. 5014 if (!AnyChange) return N; 5015 5016 // See if the modified node already exists. 5017 void *InsertPos = 0; 5018 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 5019 return Existing; 5020 5021 // Nope it doesn't. Remove the node from its current place in the maps. 5022 if (InsertPos) 5023 if (!RemoveNodeFromCSEMaps(N)) 5024 InsertPos = 0; 5025 5026 // Now we update the operands. 5027 for (unsigned i = 0; i != NumOps; ++i) 5028 if (N->OperandList[i] != Ops[i]) 5029 N->OperandList[i].set(Ops[i]); 5030 5031 // If this gets put into a CSE map, add it. 5032 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5033 return N; 5034} 5035 5036/// DropOperands - Release the operands and set this node to have 5037/// zero operands. 5038void SDNode::DropOperands() { 5039 // Unlike the code in MorphNodeTo that does this, we don't need to 5040 // watch for dead nodes here. 5041 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 5042 SDUse &Use = *I++; 5043 Use.set(SDValue()); 5044 } 5045} 5046 5047/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 5048/// machine opcode. 5049/// 5050SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5051 EVT VT) { 5052 SDVTList VTs = getVTList(VT); 5053 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 5054} 5055 5056SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5057 EVT VT, SDValue Op1) { 5058 SDVTList VTs = getVTList(VT); 5059 SDValue Ops[] = { Op1 }; 5060 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5061} 5062 5063SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5064 EVT VT, SDValue Op1, 5065 SDValue Op2) { 5066 SDVTList VTs = getVTList(VT); 5067 SDValue Ops[] = { Op1, Op2 }; 5068 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5069} 5070 5071SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5072 EVT VT, SDValue Op1, 5073 SDValue Op2, SDValue Op3) { 5074 SDVTList VTs = getVTList(VT); 5075 SDValue Ops[] = { Op1, Op2, Op3 }; 5076 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5077} 5078 5079SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5080 EVT VT, const SDValue *Ops, 5081 unsigned NumOps) { 5082 SDVTList VTs = getVTList(VT); 5083 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5084} 5085 5086SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5087 EVT VT1, EVT VT2, const SDValue *Ops, 5088 unsigned NumOps) { 5089 SDVTList VTs = getVTList(VT1, VT2); 5090 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5091} 5092 5093SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5094 EVT VT1, EVT VT2) { 5095 SDVTList VTs = getVTList(VT1, VT2); 5096 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 5097} 5098 5099SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5100 EVT VT1, EVT VT2, EVT VT3, 5101 const SDValue *Ops, unsigned NumOps) { 5102 SDVTList VTs = getVTList(VT1, VT2, VT3); 5103 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5104} 5105 5106SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5107 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 5108 const SDValue *Ops, unsigned NumOps) { 5109 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5110 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5111} 5112 5113SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5114 EVT VT1, EVT VT2, 5115 SDValue Op1) { 5116 SDVTList VTs = getVTList(VT1, VT2); 5117 SDValue Ops[] = { Op1 }; 5118 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5119} 5120 5121SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5122 EVT VT1, EVT VT2, 5123 SDValue Op1, SDValue Op2) { 5124 SDVTList VTs = getVTList(VT1, VT2); 5125 SDValue Ops[] = { Op1, Op2 }; 5126 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5127} 5128 5129SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5130 EVT VT1, EVT VT2, 5131 SDValue Op1, SDValue Op2, 5132 SDValue Op3) { 5133 SDVTList VTs = getVTList(VT1, VT2); 5134 SDValue Ops[] = { Op1, Op2, Op3 }; 5135 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5136} 5137 5138SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5139 EVT VT1, EVT VT2, EVT VT3, 5140 SDValue Op1, SDValue Op2, 5141 SDValue Op3) { 5142 SDVTList VTs = getVTList(VT1, VT2, VT3); 5143 SDValue Ops[] = { Op1, Op2, Op3 }; 5144 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5145} 5146 5147SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5148 SDVTList VTs, const SDValue *Ops, 5149 unsigned NumOps) { 5150 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 5151 // Reset the NodeID to -1. 5152 N->setNodeId(-1); 5153 return N; 5154} 5155 5156/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 5157/// the line number information on the merged node since it is not possible to 5158/// preserve the information that operation is associated with multiple lines. 5159/// This will make the debugger working better at -O0, were there is a higher 5160/// probability having other instructions associated with that line. 5161/// 5162SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 5163 DebugLoc NLoc = N->getDebugLoc(); 5164 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 5165 N->setDebugLoc(DebugLoc()); 5166 } 5167 return N; 5168} 5169 5170/// MorphNodeTo - This *mutates* the specified node to have the specified 5171/// return type, opcode, and operands. 5172/// 5173/// Note that MorphNodeTo returns the resultant node. If there is already a 5174/// node of the specified opcode and operands, it returns that node instead of 5175/// the current one. Note that the DebugLoc need not be the same. 5176/// 5177/// Using MorphNodeTo is faster than creating a new node and swapping it in 5178/// with ReplaceAllUsesWith both because it often avoids allocating a new 5179/// node, and because it doesn't require CSE recalculation for any of 5180/// the node's users. 5181/// 5182SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5183 SDVTList VTs, const SDValue *Ops, 5184 unsigned NumOps) { 5185 // If an identical node already exists, use it. 5186 void *IP = 0; 5187 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5188 FoldingSetNodeID ID; 5189 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5190 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5191 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 5192 } 5193 5194 if (!RemoveNodeFromCSEMaps(N)) 5195 IP = 0; 5196 5197 // Start the morphing. 5198 N->NodeType = Opc; 5199 N->ValueList = VTs.VTs; 5200 N->NumValues = VTs.NumVTs; 5201 5202 // Clear the operands list, updating used nodes to remove this from their 5203 // use list. Keep track of any operands that become dead as a result. 5204 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5205 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5206 SDUse &Use = *I++; 5207 SDNode *Used = Use.getNode(); 5208 Use.set(SDValue()); 5209 if (Used->use_empty()) 5210 DeadNodeSet.insert(Used); 5211 } 5212 5213 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5214 // Initialize the memory references information. 5215 MN->setMemRefs(0, 0); 5216 // If NumOps is larger than the # of operands we can have in a 5217 // MachineSDNode, reallocate the operand list. 5218 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5219 if (MN->OperandsNeedDelete) 5220 delete[] MN->OperandList; 5221 if (NumOps > array_lengthof(MN->LocalOperands)) 5222 // We're creating a final node that will live unmorphed for the 5223 // remainder of the current SelectionDAG iteration, so we can allocate 5224 // the operands directly out of a pool with no recycling metadata. 5225 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5226 Ops, NumOps); 5227 else 5228 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5229 MN->OperandsNeedDelete = false; 5230 } else 5231 MN->InitOperands(MN->OperandList, Ops, NumOps); 5232 } else { 5233 // If NumOps is larger than the # of operands we currently have, reallocate 5234 // the operand list. 5235 if (NumOps > N->NumOperands) { 5236 if (N->OperandsNeedDelete) 5237 delete[] N->OperandList; 5238 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5239 N->OperandsNeedDelete = true; 5240 } else 5241 N->InitOperands(N->OperandList, Ops, NumOps); 5242 } 5243 5244 // Delete any nodes that are still dead after adding the uses for the 5245 // new operands. 5246 if (!DeadNodeSet.empty()) { 5247 SmallVector<SDNode *, 16> DeadNodes; 5248 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5249 E = DeadNodeSet.end(); I != E; ++I) 5250 if ((*I)->use_empty()) 5251 DeadNodes.push_back(*I); 5252 RemoveDeadNodes(DeadNodes); 5253 } 5254 5255 if (IP) 5256 CSEMap.InsertNode(N, IP); // Memoize the new node. 5257 return N; 5258} 5259 5260 5261/// getMachineNode - These are used for target selectors to create a new node 5262/// with specified return type(s), MachineInstr opcode, and operands. 5263/// 5264/// Note that getMachineNode returns the resultant node. If there is already a 5265/// node of the specified opcode and operands, it returns that node instead of 5266/// the current one. 5267MachineSDNode * 5268SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5269 SDVTList VTs = getVTList(VT); 5270 return getMachineNode(Opcode, dl, VTs, None); 5271} 5272 5273MachineSDNode * 5274SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5275 SDVTList VTs = getVTList(VT); 5276 SDValue Ops[] = { Op1 }; 5277 return getMachineNode(Opcode, dl, VTs, Ops); 5278} 5279 5280MachineSDNode * 5281SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5282 SDValue Op1, SDValue Op2) { 5283 SDVTList VTs = getVTList(VT); 5284 SDValue Ops[] = { Op1, Op2 }; 5285 return getMachineNode(Opcode, dl, VTs, Ops); 5286} 5287 5288MachineSDNode * 5289SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5290 SDValue Op1, SDValue Op2, SDValue Op3) { 5291 SDVTList VTs = getVTList(VT); 5292 SDValue Ops[] = { Op1, Op2, Op3 }; 5293 return getMachineNode(Opcode, dl, VTs, Ops); 5294} 5295 5296MachineSDNode * 5297SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5298 ArrayRef<SDValue> Ops) { 5299 SDVTList VTs = getVTList(VT); 5300 return getMachineNode(Opcode, dl, VTs, Ops); 5301} 5302 5303MachineSDNode * 5304SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5305 SDVTList VTs = getVTList(VT1, VT2); 5306 return getMachineNode(Opcode, dl, VTs, None); 5307} 5308 5309MachineSDNode * 5310SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5311 EVT VT1, EVT VT2, SDValue Op1) { 5312 SDVTList VTs = getVTList(VT1, VT2); 5313 SDValue Ops[] = { Op1 }; 5314 return getMachineNode(Opcode, dl, VTs, Ops); 5315} 5316 5317MachineSDNode * 5318SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5319 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5320 SDVTList VTs = getVTList(VT1, VT2); 5321 SDValue Ops[] = { Op1, Op2 }; 5322 return getMachineNode(Opcode, dl, VTs, Ops); 5323} 5324 5325MachineSDNode * 5326SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5327 EVT VT1, EVT VT2, SDValue Op1, 5328 SDValue Op2, SDValue Op3) { 5329 SDVTList VTs = getVTList(VT1, VT2); 5330 SDValue Ops[] = { Op1, Op2, Op3 }; 5331 return getMachineNode(Opcode, dl, VTs, Ops); 5332} 5333 5334MachineSDNode * 5335SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5336 EVT VT1, EVT VT2, 5337 ArrayRef<SDValue> Ops) { 5338 SDVTList VTs = getVTList(VT1, VT2); 5339 return getMachineNode(Opcode, dl, VTs, Ops); 5340} 5341 5342MachineSDNode * 5343SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5344 EVT VT1, EVT VT2, EVT VT3, 5345 SDValue Op1, SDValue Op2) { 5346 SDVTList VTs = getVTList(VT1, VT2, VT3); 5347 SDValue Ops[] = { Op1, Op2 }; 5348 return getMachineNode(Opcode, dl, VTs, Ops); 5349} 5350 5351MachineSDNode * 5352SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5353 EVT VT1, EVT VT2, EVT VT3, 5354 SDValue Op1, SDValue Op2, SDValue Op3) { 5355 SDVTList VTs = getVTList(VT1, VT2, VT3); 5356 SDValue Ops[] = { Op1, Op2, Op3 }; 5357 return getMachineNode(Opcode, dl, VTs, Ops); 5358} 5359 5360MachineSDNode * 5361SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5362 EVT VT1, EVT VT2, EVT VT3, 5363 ArrayRef<SDValue> Ops) { 5364 SDVTList VTs = getVTList(VT1, VT2, VT3); 5365 return getMachineNode(Opcode, dl, VTs, Ops); 5366} 5367 5368MachineSDNode * 5369SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5370 EVT VT2, EVT VT3, EVT VT4, 5371 ArrayRef<SDValue> Ops) { 5372 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5373 return getMachineNode(Opcode, dl, VTs, Ops); 5374} 5375 5376MachineSDNode * 5377SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5378 ArrayRef<EVT> ResultTys, 5379 ArrayRef<SDValue> Ops) { 5380 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5381 return getMachineNode(Opcode, dl, VTs, Ops); 5382} 5383 5384MachineSDNode * 5385SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5386 ArrayRef<SDValue> OpsArray) { 5387 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5388 MachineSDNode *N; 5389 void *IP = 0; 5390 const SDValue *Ops = OpsArray.data(); 5391 unsigned NumOps = OpsArray.size(); 5392 5393 if (DoCSE) { 5394 FoldingSetNodeID ID; 5395 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5396 IP = 0; 5397 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5398 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5399 } 5400 } 5401 5402 // Allocate a new MachineSDNode. 5403 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5404 5405 // Initialize the operands list. 5406 if (NumOps > array_lengthof(N->LocalOperands)) 5407 // We're creating a final node that will live unmorphed for the 5408 // remainder of the current SelectionDAG iteration, so we can allocate 5409 // the operands directly out of a pool with no recycling metadata. 5410 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5411 Ops, NumOps); 5412 else 5413 N->InitOperands(N->LocalOperands, Ops, NumOps); 5414 N->OperandsNeedDelete = false; 5415 5416 if (DoCSE) 5417 CSEMap.InsertNode(N, IP); 5418 5419 AllNodes.push_back(N); 5420#ifndef NDEBUG 5421 VerifyMachineNode(N); 5422#endif 5423 return N; 5424} 5425 5426/// getTargetExtractSubreg - A convenience function for creating 5427/// TargetOpcode::EXTRACT_SUBREG nodes. 5428SDValue 5429SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5430 SDValue Operand) { 5431 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5432 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5433 VT, Operand, SRIdxVal); 5434 return SDValue(Subreg, 0); 5435} 5436 5437/// getTargetInsertSubreg - A convenience function for creating 5438/// TargetOpcode::INSERT_SUBREG nodes. 5439SDValue 5440SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5441 SDValue Operand, SDValue Subreg) { 5442 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5443 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5444 VT, Operand, Subreg, SRIdxVal); 5445 return SDValue(Result, 0); 5446} 5447 5448/// getNodeIfExists - Get the specified node if it's already available, or 5449/// else return NULL. 5450SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5451 const SDValue *Ops, unsigned NumOps) { 5452 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5453 FoldingSetNodeID ID; 5454 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5455 void *IP = 0; 5456 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5457 return E; 5458 } 5459 return NULL; 5460} 5461 5462/// getDbgValue - Creates a SDDbgValue node. 5463/// 5464SDDbgValue * 5465SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5466 DebugLoc DL, unsigned O) { 5467 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5468} 5469 5470SDDbgValue * 5471SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5472 DebugLoc DL, unsigned O) { 5473 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5474} 5475 5476SDDbgValue * 5477SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5478 DebugLoc DL, unsigned O) { 5479 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5480} 5481 5482namespace { 5483 5484/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5485/// pointed to by a use iterator is deleted, increment the use iterator 5486/// so that it doesn't dangle. 5487/// 5488class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5489 SDNode::use_iterator &UI; 5490 SDNode::use_iterator &UE; 5491 5492 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5493 // Increment the iterator as needed. 5494 while (UI != UE && N == *UI) 5495 ++UI; 5496 } 5497 5498public: 5499 RAUWUpdateListener(SelectionDAG &d, 5500 SDNode::use_iterator &ui, 5501 SDNode::use_iterator &ue) 5502 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5503}; 5504 5505} 5506 5507/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5508/// This can cause recursive merging of nodes in the DAG. 5509/// 5510/// This version assumes From has a single result value. 5511/// 5512void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5513 SDNode *From = FromN.getNode(); 5514 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5515 "Cannot replace with this method!"); 5516 assert(From != To.getNode() && "Cannot replace uses of with self"); 5517 5518 // Iterate over all the existing uses of From. New uses will be added 5519 // to the beginning of the use list, which we avoid visiting. 5520 // This specifically avoids visiting uses of From that arise while the 5521 // replacement is happening, because any such uses would be the result 5522 // of CSE: If an existing node looks like From after one of its operands 5523 // is replaced by To, we don't want to replace of all its users with To 5524 // too. See PR3018 for more info. 5525 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5526 RAUWUpdateListener Listener(*this, UI, UE); 5527 while (UI != UE) { 5528 SDNode *User = *UI; 5529 5530 // This node is about to morph, remove its old self from the CSE maps. 5531 RemoveNodeFromCSEMaps(User); 5532 5533 // A user can appear in a use list multiple times, and when this 5534 // happens the uses are usually next to each other in the list. 5535 // To help reduce the number of CSE recomputations, process all 5536 // the uses of this user that we can find this way. 5537 do { 5538 SDUse &Use = UI.getUse(); 5539 ++UI; 5540 Use.set(To); 5541 } while (UI != UE && *UI == User); 5542 5543 // Now that we have modified User, add it back to the CSE maps. If it 5544 // already exists there, recursively merge the results together. 5545 AddModifiedNodeToCSEMaps(User); 5546 } 5547 5548 // If we just RAUW'd the root, take note. 5549 if (FromN == getRoot()) 5550 setRoot(To); 5551} 5552 5553/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5554/// This can cause recursive merging of nodes in the DAG. 5555/// 5556/// This version assumes that for each value of From, there is a 5557/// corresponding value in To in the same position with the same type. 5558/// 5559void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5560#ifndef NDEBUG 5561 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5562 assert((!From->hasAnyUseOfValue(i) || 5563 From->getValueType(i) == To->getValueType(i)) && 5564 "Cannot use this version of ReplaceAllUsesWith!"); 5565#endif 5566 5567 // Handle the trivial case. 5568 if (From == To) 5569 return; 5570 5571 // Iterate over just the existing users of From. See the comments in 5572 // the ReplaceAllUsesWith above. 5573 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5574 RAUWUpdateListener Listener(*this, UI, UE); 5575 while (UI != UE) { 5576 SDNode *User = *UI; 5577 5578 // This node is about to morph, remove its old self from the CSE maps. 5579 RemoveNodeFromCSEMaps(User); 5580 5581 // A user can appear in a use list multiple times, and when this 5582 // happens the uses are usually next to each other in the list. 5583 // To help reduce the number of CSE recomputations, process all 5584 // the uses of this user that we can find this way. 5585 do { 5586 SDUse &Use = UI.getUse(); 5587 ++UI; 5588 Use.setNode(To); 5589 } while (UI != UE && *UI == User); 5590 5591 // Now that we have modified User, add it back to the CSE maps. If it 5592 // already exists there, recursively merge the results together. 5593 AddModifiedNodeToCSEMaps(User); 5594 } 5595 5596 // If we just RAUW'd the root, take note. 5597 if (From == getRoot().getNode()) 5598 setRoot(SDValue(To, getRoot().getResNo())); 5599} 5600 5601/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5602/// This can cause recursive merging of nodes in the DAG. 5603/// 5604/// This version can replace From with any result values. To must match the 5605/// number and types of values returned by From. 5606void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5607 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5608 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5609 5610 // Iterate over just the existing users of From. See the comments in 5611 // the ReplaceAllUsesWith above. 5612 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5613 RAUWUpdateListener Listener(*this, UI, UE); 5614 while (UI != UE) { 5615 SDNode *User = *UI; 5616 5617 // This node is about to morph, remove its old self from the CSE maps. 5618 RemoveNodeFromCSEMaps(User); 5619 5620 // A user can appear in a use list multiple times, and when this 5621 // happens the uses are usually next to each other in the list. 5622 // To help reduce the number of CSE recomputations, process all 5623 // the uses of this user that we can find this way. 5624 do { 5625 SDUse &Use = UI.getUse(); 5626 const SDValue &ToOp = To[Use.getResNo()]; 5627 ++UI; 5628 Use.set(ToOp); 5629 } while (UI != UE && *UI == User); 5630 5631 // Now that we have modified User, add it back to the CSE maps. If it 5632 // already exists there, recursively merge the results together. 5633 AddModifiedNodeToCSEMaps(User); 5634 } 5635 5636 // If we just RAUW'd the root, take note. 5637 if (From == getRoot().getNode()) 5638 setRoot(SDValue(To[getRoot().getResNo()])); 5639} 5640 5641/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5642/// uses of other values produced by From.getNode() alone. The Deleted 5643/// vector is handled the same way as for ReplaceAllUsesWith. 5644void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5645 // Handle the really simple, really trivial case efficiently. 5646 if (From == To) return; 5647 5648 // Handle the simple, trivial, case efficiently. 5649 if (From.getNode()->getNumValues() == 1) { 5650 ReplaceAllUsesWith(From, To); 5651 return; 5652 } 5653 5654 // Iterate over just the existing users of From. See the comments in 5655 // the ReplaceAllUsesWith above. 5656 SDNode::use_iterator UI = From.getNode()->use_begin(), 5657 UE = From.getNode()->use_end(); 5658 RAUWUpdateListener Listener(*this, UI, UE); 5659 while (UI != UE) { 5660 SDNode *User = *UI; 5661 bool UserRemovedFromCSEMaps = false; 5662 5663 // A user can appear in a use list multiple times, and when this 5664 // happens the uses are usually next to each other in the list. 5665 // To help reduce the number of CSE recomputations, process all 5666 // the uses of this user that we can find this way. 5667 do { 5668 SDUse &Use = UI.getUse(); 5669 5670 // Skip uses of different values from the same node. 5671 if (Use.getResNo() != From.getResNo()) { 5672 ++UI; 5673 continue; 5674 } 5675 5676 // If this node hasn't been modified yet, it's still in the CSE maps, 5677 // so remove its old self from the CSE maps. 5678 if (!UserRemovedFromCSEMaps) { 5679 RemoveNodeFromCSEMaps(User); 5680 UserRemovedFromCSEMaps = true; 5681 } 5682 5683 ++UI; 5684 Use.set(To); 5685 } while (UI != UE && *UI == User); 5686 5687 // We are iterating over all uses of the From node, so if a use 5688 // doesn't use the specific value, no changes are made. 5689 if (!UserRemovedFromCSEMaps) 5690 continue; 5691 5692 // Now that we have modified User, add it back to the CSE maps. If it 5693 // already exists there, recursively merge the results together. 5694 AddModifiedNodeToCSEMaps(User); 5695 } 5696 5697 // If we just RAUW'd the root, take note. 5698 if (From == getRoot()) 5699 setRoot(To); 5700} 5701 5702namespace { 5703 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5704 /// to record information about a use. 5705 struct UseMemo { 5706 SDNode *User; 5707 unsigned Index; 5708 SDUse *Use; 5709 }; 5710 5711 /// operator< - Sort Memos by User. 5712 bool operator<(const UseMemo &L, const UseMemo &R) { 5713 return (intptr_t)L.User < (intptr_t)R.User; 5714 } 5715} 5716 5717/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5718/// uses of other values produced by From.getNode() alone. The same value 5719/// may appear in both the From and To list. The Deleted vector is 5720/// handled the same way as for ReplaceAllUsesWith. 5721void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5722 const SDValue *To, 5723 unsigned Num){ 5724 // Handle the simple, trivial case efficiently. 5725 if (Num == 1) 5726 return ReplaceAllUsesOfValueWith(*From, *To); 5727 5728 // Read up all the uses and make records of them. This helps 5729 // processing new uses that are introduced during the 5730 // replacement process. 5731 SmallVector<UseMemo, 4> Uses; 5732 for (unsigned i = 0; i != Num; ++i) { 5733 unsigned FromResNo = From[i].getResNo(); 5734 SDNode *FromNode = From[i].getNode(); 5735 for (SDNode::use_iterator UI = FromNode->use_begin(), 5736 E = FromNode->use_end(); UI != E; ++UI) { 5737 SDUse &Use = UI.getUse(); 5738 if (Use.getResNo() == FromResNo) { 5739 UseMemo Memo = { *UI, i, &Use }; 5740 Uses.push_back(Memo); 5741 } 5742 } 5743 } 5744 5745 // Sort the uses, so that all the uses from a given User are together. 5746 std::sort(Uses.begin(), Uses.end()); 5747 5748 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5749 UseIndex != UseIndexEnd; ) { 5750 // We know that this user uses some value of From. If it is the right 5751 // value, update it. 5752 SDNode *User = Uses[UseIndex].User; 5753 5754 // This node is about to morph, remove its old self from the CSE maps. 5755 RemoveNodeFromCSEMaps(User); 5756 5757 // The Uses array is sorted, so all the uses for a given User 5758 // are next to each other in the list. 5759 // To help reduce the number of CSE recomputations, process all 5760 // the uses of this user that we can find this way. 5761 do { 5762 unsigned i = Uses[UseIndex].Index; 5763 SDUse &Use = *Uses[UseIndex].Use; 5764 ++UseIndex; 5765 5766 Use.set(To[i]); 5767 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5768 5769 // Now that we have modified User, add it back to the CSE maps. If it 5770 // already exists there, recursively merge the results together. 5771 AddModifiedNodeToCSEMaps(User); 5772 } 5773} 5774 5775/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5776/// based on their topological order. It returns the maximum id and a vector 5777/// of the SDNodes* in assigned order by reference. 5778unsigned SelectionDAG::AssignTopologicalOrder() { 5779 5780 unsigned DAGSize = 0; 5781 5782 // SortedPos tracks the progress of the algorithm. Nodes before it are 5783 // sorted, nodes after it are unsorted. When the algorithm completes 5784 // it is at the end of the list. 5785 allnodes_iterator SortedPos = allnodes_begin(); 5786 5787 // Visit all the nodes. Move nodes with no operands to the front of 5788 // the list immediately. Annotate nodes that do have operands with their 5789 // operand count. Before we do this, the Node Id fields of the nodes 5790 // may contain arbitrary values. After, the Node Id fields for nodes 5791 // before SortedPos will contain the topological sort index, and the 5792 // Node Id fields for nodes At SortedPos and after will contain the 5793 // count of outstanding operands. 5794 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5795 SDNode *N = I++; 5796 checkForCycles(N); 5797 unsigned Degree = N->getNumOperands(); 5798 if (Degree == 0) { 5799 // A node with no uses, add it to the result array immediately. 5800 N->setNodeId(DAGSize++); 5801 allnodes_iterator Q = N; 5802 if (Q != SortedPos) 5803 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5804 assert(SortedPos != AllNodes.end() && "Overran node list"); 5805 ++SortedPos; 5806 } else { 5807 // Temporarily use the Node Id as scratch space for the degree count. 5808 N->setNodeId(Degree); 5809 } 5810 } 5811 5812 // Visit all the nodes. As we iterate, move nodes into sorted order, 5813 // such that by the time the end is reached all nodes will be sorted. 5814 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5815 SDNode *N = I; 5816 checkForCycles(N); 5817 // N is in sorted position, so all its uses have one less operand 5818 // that needs to be sorted. 5819 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5820 UI != UE; ++UI) { 5821 SDNode *P = *UI; 5822 unsigned Degree = P->getNodeId(); 5823 assert(Degree != 0 && "Invalid node degree"); 5824 --Degree; 5825 if (Degree == 0) { 5826 // All of P's operands are sorted, so P may sorted now. 5827 P->setNodeId(DAGSize++); 5828 if (P != SortedPos) 5829 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5830 assert(SortedPos != AllNodes.end() && "Overran node list"); 5831 ++SortedPos; 5832 } else { 5833 // Update P's outstanding operand count. 5834 P->setNodeId(Degree); 5835 } 5836 } 5837 if (I == SortedPos) { 5838#ifndef NDEBUG 5839 SDNode *S = ++I; 5840 dbgs() << "Overran sorted position:\n"; 5841 S->dumprFull(); 5842#endif 5843 llvm_unreachable(0); 5844 } 5845 } 5846 5847 assert(SortedPos == AllNodes.end() && 5848 "Topological sort incomplete!"); 5849 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5850 "First node in topological sort is not the entry token!"); 5851 assert(AllNodes.front().getNodeId() == 0 && 5852 "First node in topological sort has non-zero id!"); 5853 assert(AllNodes.front().getNumOperands() == 0 && 5854 "First node in topological sort has operands!"); 5855 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5856 "Last node in topologic sort has unexpected id!"); 5857 assert(AllNodes.back().use_empty() && 5858 "Last node in topologic sort has users!"); 5859 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5860 return DAGSize; 5861} 5862 5863/// AssignOrdering - Assign an order to the SDNode. 5864void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5865 assert(SD && "Trying to assign an order to a null node!"); 5866 Ordering->add(SD, Order); 5867} 5868 5869/// GetOrdering - Get the order for the SDNode. 5870unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5871 assert(SD && "Trying to get the order of a null node!"); 5872 return Ordering->getOrder(SD); 5873} 5874 5875/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5876/// value is produced by SD. 5877void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5878 DbgInfo->add(DB, SD, isParameter); 5879 if (SD) 5880 SD->setHasDebugValue(true); 5881} 5882 5883/// TransferDbgValues - Transfer SDDbgValues. 5884void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5885 if (From == To || !From.getNode()->getHasDebugValue()) 5886 return; 5887 SDNode *FromNode = From.getNode(); 5888 SDNode *ToNode = To.getNode(); 5889 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5890 SmallVector<SDDbgValue *, 2> ClonedDVs; 5891 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5892 I != E; ++I) { 5893 SDDbgValue *Dbg = *I; 5894 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5895 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5896 Dbg->getOffset(), Dbg->getDebugLoc(), 5897 Dbg->getOrder()); 5898 ClonedDVs.push_back(Clone); 5899 } 5900 } 5901 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5902 E = ClonedDVs.end(); I != E; ++I) 5903 AddDbgValue(*I, ToNode, false); 5904} 5905 5906//===----------------------------------------------------------------------===// 5907// SDNode Class 5908//===----------------------------------------------------------------------===// 5909 5910HandleSDNode::~HandleSDNode() { 5911 DropOperands(); 5912} 5913 5914GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5915 const GlobalValue *GA, 5916 EVT VT, int64_t o, unsigned char TF) 5917 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5918 TheGlobal = GA; 5919} 5920 5921MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5922 MachineMemOperand *mmo) 5923 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5924 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5925 MMO->isNonTemporal(), MMO->isInvariant()); 5926 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5927 assert(isNonTemporal() == MMO->isNonTemporal() && 5928 "Non-temporal encoding error!"); 5929 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5930} 5931 5932MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5933 const SDValue *Ops, unsigned NumOps, EVT memvt, 5934 MachineMemOperand *mmo) 5935 : SDNode(Opc, dl, VTs, Ops, NumOps), 5936 MemoryVT(memvt), MMO(mmo) { 5937 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5938 MMO->isNonTemporal(), MMO->isInvariant()); 5939 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5940 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5941} 5942 5943/// Profile - Gather unique data for the node. 5944/// 5945void SDNode::Profile(FoldingSetNodeID &ID) const { 5946 AddNodeIDNode(ID, this); 5947} 5948 5949namespace { 5950 struct EVTArray { 5951 std::vector<EVT> VTs; 5952 5953 EVTArray() { 5954 VTs.reserve(MVT::LAST_VALUETYPE); 5955 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5956 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5957 } 5958 }; 5959} 5960 5961static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5962static ManagedStatic<EVTArray> SimpleVTArray; 5963static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5964 5965/// getValueTypeList - Return a pointer to the specified value type. 5966/// 5967const EVT *SDNode::getValueTypeList(EVT VT) { 5968 if (VT.isExtended()) { 5969 sys::SmartScopedLock<true> Lock(*VTMutex); 5970 return &(*EVTs->insert(VT).first); 5971 } else { 5972 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5973 "Value type out of range!"); 5974 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5975 } 5976} 5977 5978/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5979/// indicated value. This method ignores uses of other values defined by this 5980/// operation. 5981bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5982 assert(Value < getNumValues() && "Bad value!"); 5983 5984 // TODO: Only iterate over uses of a given value of the node 5985 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5986 if (UI.getUse().getResNo() == Value) { 5987 if (NUses == 0) 5988 return false; 5989 --NUses; 5990 } 5991 } 5992 5993 // Found exactly the right number of uses? 5994 return NUses == 0; 5995} 5996 5997 5998/// hasAnyUseOfValue - Return true if there are any use of the indicated 5999/// value. This method ignores uses of other values defined by this operation. 6000bool SDNode::hasAnyUseOfValue(unsigned Value) const { 6001 assert(Value < getNumValues() && "Bad value!"); 6002 6003 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 6004 if (UI.getUse().getResNo() == Value) 6005 return true; 6006 6007 return false; 6008} 6009 6010 6011/// isOnlyUserOf - Return true if this node is the only use of N. 6012/// 6013bool SDNode::isOnlyUserOf(SDNode *N) const { 6014 bool Seen = false; 6015 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 6016 SDNode *User = *I; 6017 if (User == this) 6018 Seen = true; 6019 else 6020 return false; 6021 } 6022 6023 return Seen; 6024} 6025 6026/// isOperand - Return true if this node is an operand of N. 6027/// 6028bool SDValue::isOperandOf(SDNode *N) const { 6029 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6030 if (*this == N->getOperand(i)) 6031 return true; 6032 return false; 6033} 6034 6035bool SDNode::isOperandOf(SDNode *N) const { 6036 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 6037 if (this == N->OperandList[i].getNode()) 6038 return true; 6039 return false; 6040} 6041 6042/// reachesChainWithoutSideEffects - Return true if this operand (which must 6043/// be a chain) reaches the specified operand without crossing any 6044/// side-effecting instructions on any chain path. In practice, this looks 6045/// through token factors and non-volatile loads. In order to remain efficient, 6046/// this only looks a couple of nodes in, it does not do an exhaustive search. 6047bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 6048 unsigned Depth) const { 6049 if (*this == Dest) return true; 6050 6051 // Don't search too deeply, we just want to be able to see through 6052 // TokenFactor's etc. 6053 if (Depth == 0) return false; 6054 6055 // If this is a token factor, all inputs to the TF happen in parallel. If any 6056 // of the operands of the TF does not reach dest, then we cannot do the xform. 6057 if (getOpcode() == ISD::TokenFactor) { 6058 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 6059 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 6060 return false; 6061 return true; 6062 } 6063 6064 // Loads don't have side effects, look through them. 6065 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 6066 if (!Ld->isVolatile()) 6067 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 6068 } 6069 return false; 6070} 6071 6072/// hasPredecessor - Return true if N is a predecessor of this node. 6073/// N is either an operand of this node, or can be reached by recursively 6074/// traversing up the operands. 6075/// NOTE: This is an expensive method. Use it carefully. 6076bool SDNode::hasPredecessor(const SDNode *N) const { 6077 SmallPtrSet<const SDNode *, 32> Visited; 6078 SmallVector<const SDNode *, 16> Worklist; 6079 return hasPredecessorHelper(N, Visited, Worklist); 6080} 6081 6082bool SDNode::hasPredecessorHelper(const SDNode *N, 6083 SmallPtrSet<const SDNode *, 32> &Visited, 6084 SmallVector<const SDNode *, 16> &Worklist) const { 6085 if (Visited.empty()) { 6086 Worklist.push_back(this); 6087 } else { 6088 // Take a look in the visited set. If we've already encountered this node 6089 // we needn't search further. 6090 if (Visited.count(N)) 6091 return true; 6092 } 6093 6094 // Haven't visited N yet. Continue the search. 6095 while (!Worklist.empty()) { 6096 const SDNode *M = Worklist.pop_back_val(); 6097 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 6098 SDNode *Op = M->getOperand(i).getNode(); 6099 if (Visited.insert(Op)) 6100 Worklist.push_back(Op); 6101 if (Op == N) 6102 return true; 6103 } 6104 } 6105 6106 return false; 6107} 6108 6109uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 6110 assert(Num < NumOperands && "Invalid child # of SDNode!"); 6111 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 6112} 6113 6114SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6115 assert(N->getNumValues() == 1 && 6116 "Can't unroll a vector with multiple results!"); 6117 6118 EVT VT = N->getValueType(0); 6119 unsigned NE = VT.getVectorNumElements(); 6120 EVT EltVT = VT.getVectorElementType(); 6121 DebugLoc dl = N->getDebugLoc(); 6122 6123 SmallVector<SDValue, 8> Scalars; 6124 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6125 6126 // If ResNE is 0, fully unroll the vector op. 6127 if (ResNE == 0) 6128 ResNE = NE; 6129 else if (NE > ResNE) 6130 NE = ResNE; 6131 6132 unsigned i; 6133 for (i= 0; i != NE; ++i) { 6134 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6135 SDValue Operand = N->getOperand(j); 6136 EVT OperandVT = Operand.getValueType(); 6137 if (OperandVT.isVector()) { 6138 // A vector operand; extract a single element. 6139 EVT OperandEltVT = OperandVT.getVectorElementType(); 6140 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6141 OperandEltVT, 6142 Operand, 6143 getConstant(i, TLI.getPointerTy())); 6144 } else { 6145 // A scalar operand; just use it as is. 6146 Operands[j] = Operand; 6147 } 6148 } 6149 6150 switch (N->getOpcode()) { 6151 default: 6152 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6153 &Operands[0], Operands.size())); 6154 break; 6155 case ISD::VSELECT: 6156 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6157 &Operands[0], Operands.size())); 6158 break; 6159 case ISD::SHL: 6160 case ISD::SRA: 6161 case ISD::SRL: 6162 case ISD::ROTL: 6163 case ISD::ROTR: 6164 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6165 getShiftAmountOperand(Operands[0].getValueType(), 6166 Operands[1]))); 6167 break; 6168 case ISD::SIGN_EXTEND_INREG: 6169 case ISD::FP_ROUND_INREG: { 6170 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6171 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6172 Operands[0], 6173 getValueType(ExtVT))); 6174 } 6175 } 6176 } 6177 6178 for (; i < ResNE; ++i) 6179 Scalars.push_back(getUNDEF(EltVT)); 6180 6181 return getNode(ISD::BUILD_VECTOR, dl, 6182 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6183 &Scalars[0], Scalars.size()); 6184} 6185 6186 6187/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6188/// location that is 'Dist' units away from the location that the 'Base' load 6189/// is loading from. 6190bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6191 unsigned Bytes, int Dist) const { 6192 if (LD->getChain() != Base->getChain()) 6193 return false; 6194 EVT VT = LD->getValueType(0); 6195 if (VT.getSizeInBits() / 8 != Bytes) 6196 return false; 6197 6198 SDValue Loc = LD->getOperand(1); 6199 SDValue BaseLoc = Base->getOperand(1); 6200 if (Loc.getOpcode() == ISD::FrameIndex) { 6201 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6202 return false; 6203 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6204 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6205 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6206 int FS = MFI->getObjectSize(FI); 6207 int BFS = MFI->getObjectSize(BFI); 6208 if (FS != BFS || FS != (int)Bytes) return false; 6209 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6210 } 6211 6212 // Handle X+C 6213 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6214 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6215 return true; 6216 6217 const GlobalValue *GV1 = NULL; 6218 const GlobalValue *GV2 = NULL; 6219 int64_t Offset1 = 0; 6220 int64_t Offset2 = 0; 6221 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6222 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6223 if (isGA1 && isGA2 && GV1 == GV2) 6224 return Offset1 == (Offset2 + Dist*Bytes); 6225 return false; 6226} 6227 6228 6229/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6230/// it cannot be inferred. 6231unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6232 // If this is a GlobalAddress + cst, return the alignment. 6233 const GlobalValue *GV; 6234 int64_t GVOffset = 0; 6235 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6236 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6237 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6238 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6239 TLI.getDataLayout()); 6240 unsigned AlignBits = KnownZero.countTrailingOnes(); 6241 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6242 if (Align) 6243 return MinAlign(Align, GVOffset); 6244 } 6245 6246 // If this is a direct reference to a stack slot, use information about the 6247 // stack slot's alignment. 6248 int FrameIdx = 1 << 31; 6249 int64_t FrameOffset = 0; 6250 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6251 FrameIdx = FI->getIndex(); 6252 } else if (isBaseWithConstantOffset(Ptr) && 6253 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6254 // Handle FI+Cst 6255 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6256 FrameOffset = Ptr.getConstantOperandVal(1); 6257 } 6258 6259 if (FrameIdx != (1 << 31)) { 6260 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6261 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6262 FrameOffset); 6263 return FIInfoAlign; 6264 } 6265 6266 return 0; 6267} 6268 6269// getAddressSpace - Return the address space this GlobalAddress belongs to. 6270unsigned GlobalAddressSDNode::getAddressSpace() const { 6271 return getGlobal()->getType()->getAddressSpace(); 6272} 6273 6274 6275Type *ConstantPoolSDNode::getType() const { 6276 if (isMachineConstantPoolEntry()) 6277 return Val.MachineCPVal->getType(); 6278 return Val.ConstVal->getType(); 6279} 6280 6281bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6282 APInt &SplatUndef, 6283 unsigned &SplatBitSize, 6284 bool &HasAnyUndefs, 6285 unsigned MinSplatBits, 6286 bool isBigEndian) { 6287 EVT VT = getValueType(0); 6288 assert(VT.isVector() && "Expected a vector type"); 6289 unsigned sz = VT.getSizeInBits(); 6290 if (MinSplatBits > sz) 6291 return false; 6292 6293 SplatValue = APInt(sz, 0); 6294 SplatUndef = APInt(sz, 0); 6295 6296 // Get the bits. Bits with undefined values (when the corresponding element 6297 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6298 // in SplatValue. If any of the values are not constant, give up and return 6299 // false. 6300 unsigned int nOps = getNumOperands(); 6301 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6302 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6303 6304 for (unsigned j = 0; j < nOps; ++j) { 6305 unsigned i = isBigEndian ? nOps-1-j : j; 6306 SDValue OpVal = getOperand(i); 6307 unsigned BitPos = j * EltBitSize; 6308 6309 if (OpVal.getOpcode() == ISD::UNDEF) 6310 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6311 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6312 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6313 zextOrTrunc(sz) << BitPos; 6314 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6315 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6316 else 6317 return false; 6318 } 6319 6320 // The build_vector is all constants or undefs. Find the smallest element 6321 // size that splats the vector. 6322 6323 HasAnyUndefs = (SplatUndef != 0); 6324 while (sz > 8) { 6325 6326 unsigned HalfSize = sz / 2; 6327 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6328 APInt LowValue = SplatValue.trunc(HalfSize); 6329 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6330 APInt LowUndef = SplatUndef.trunc(HalfSize); 6331 6332 // If the two halves do not match (ignoring undef bits), stop here. 6333 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6334 MinSplatBits > HalfSize) 6335 break; 6336 6337 SplatValue = HighValue | LowValue; 6338 SplatUndef = HighUndef & LowUndef; 6339 6340 sz = HalfSize; 6341 } 6342 6343 SplatBitSize = sz; 6344 return true; 6345} 6346 6347bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6348 // Find the first non-undef value in the shuffle mask. 6349 unsigned i, e; 6350 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6351 /* search */; 6352 6353 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6354 6355 // Make sure all remaining elements are either undef or the same as the first 6356 // non-undef value. 6357 for (int Idx = Mask[i]; i != e; ++i) 6358 if (Mask[i] >= 0 && Mask[i] != Idx) 6359 return false; 6360 return true; 6361} 6362 6363#ifdef XDEBUG 6364static void checkForCyclesHelper(const SDNode *N, 6365 SmallPtrSet<const SDNode*, 32> &Visited, 6366 SmallPtrSet<const SDNode*, 32> &Checked) { 6367 // If this node has already been checked, don't check it again. 6368 if (Checked.count(N)) 6369 return; 6370 6371 // If a node has already been visited on this depth-first walk, reject it as 6372 // a cycle. 6373 if (!Visited.insert(N)) { 6374 dbgs() << "Offending node:\n"; 6375 N->dumprFull(); 6376 errs() << "Detected cycle in SelectionDAG\n"; 6377 abort(); 6378 } 6379 6380 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6381 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6382 6383 Checked.insert(N); 6384 Visited.erase(N); 6385} 6386#endif 6387 6388void llvm::checkForCycles(const llvm::SDNode *N) { 6389#ifdef XDEBUG 6390 assert(N && "Checking nonexistant SDNode"); 6391 SmallPtrSet<const SDNode*, 32> visited; 6392 SmallPtrSet<const SDNode*, 32> checked; 6393 checkForCyclesHelper(N, visited, checked); 6394#endif 6395} 6396 6397void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6398 checkForCycles(DAG->getRoot().getNode()); 6399} 6400