SelectionDAG.cpp revision 5ae7911b2437aec6f695d6820284ff7bc60ec97a
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Support/MathExtras.h" 20#include "llvm/Target/MRegisterInfo.h" 21#include "llvm/Target/TargetLowering.h" 22#include "llvm/Target/TargetInstrInfo.h" 23#include "llvm/Target/TargetMachine.h" 24#include <iostream> 25#include <set> 26#include <cmath> 27#include <algorithm> 28using namespace llvm; 29 30// Temporary boolean for testing the dag combiner 31namespace llvm { 32 extern bool CombinerEnabled; 33} 34 35static bool isCommutativeBinOp(unsigned Opcode) { 36 switch (Opcode) { 37 case ISD::ADD: 38 case ISD::MUL: 39 case ISD::AND: 40 case ISD::OR: 41 case ISD::XOR: return true; 42 default: return false; // FIXME: Need commutative info for user ops! 43 } 44} 45 46static bool isAssociativeBinOp(unsigned Opcode) { 47 switch (Opcode) { 48 case ISD::ADD: 49 case ISD::MUL: 50 case ISD::AND: 51 case ISD::OR: 52 case ISD::XOR: return true; 53 default: return false; // FIXME: Need associative info for user ops! 54 } 55} 56 57// isInvertibleForFree - Return true if there is no cost to emitting the logical 58// inverse of this node. 59static bool isInvertibleForFree(SDOperand N) { 60 if (isa<ConstantSDNode>(N.Val)) return true; 61 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse()) 62 return true; 63 return false; 64} 65 66//===----------------------------------------------------------------------===// 67// ConstantFPSDNode Class 68//===----------------------------------------------------------------------===// 69 70/// isExactlyValue - We don't rely on operator== working on double values, as 71/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 72/// As such, this method can be used to do an exact bit-for-bit comparison of 73/// two floating point values. 74bool ConstantFPSDNode::isExactlyValue(double V) const { 75 return DoubleToBits(V) == DoubleToBits(Value); 76} 77 78//===----------------------------------------------------------------------===// 79// ISD Class 80//===----------------------------------------------------------------------===// 81 82/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 83/// when given the operation for (X op Y). 84ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 85 // To perform this operation, we just need to swap the L and G bits of the 86 // operation. 87 unsigned OldL = (Operation >> 2) & 1; 88 unsigned OldG = (Operation >> 1) & 1; 89 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 90 (OldL << 1) | // New G bit 91 (OldG << 2)); // New L bit. 92} 93 94/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 95/// 'op' is a valid SetCC operation. 96ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 97 unsigned Operation = Op; 98 if (isInteger) 99 Operation ^= 7; // Flip L, G, E bits, but not U. 100 else 101 Operation ^= 15; // Flip all of the condition bits. 102 if (Operation > ISD::SETTRUE2) 103 Operation &= ~8; // Don't let N and U bits get set. 104 return ISD::CondCode(Operation); 105} 106 107 108/// isSignedOp - For an integer comparison, return 1 if the comparison is a 109/// signed operation and 2 if the result is an unsigned comparison. Return zero 110/// if the operation does not depend on the sign of the input (setne and seteq). 111static int isSignedOp(ISD::CondCode Opcode) { 112 switch (Opcode) { 113 default: assert(0 && "Illegal integer setcc operation!"); 114 case ISD::SETEQ: 115 case ISD::SETNE: return 0; 116 case ISD::SETLT: 117 case ISD::SETLE: 118 case ISD::SETGT: 119 case ISD::SETGE: return 1; 120 case ISD::SETULT: 121 case ISD::SETULE: 122 case ISD::SETUGT: 123 case ISD::SETUGE: return 2; 124 } 125} 126 127/// getSetCCOrOperation - Return the result of a logical OR between different 128/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 129/// returns SETCC_INVALID if it is not possible to represent the resultant 130/// comparison. 131ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 132 bool isInteger) { 133 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 134 // Cannot fold a signed integer setcc with an unsigned integer setcc. 135 return ISD::SETCC_INVALID; 136 137 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 138 139 // If the N and U bits get set then the resultant comparison DOES suddenly 140 // care about orderedness, and is true when ordered. 141 if (Op > ISD::SETTRUE2) 142 Op &= ~16; // Clear the N bit. 143 return ISD::CondCode(Op); 144} 145 146/// getSetCCAndOperation - Return the result of a logical AND between different 147/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 148/// function returns zero if it is not possible to represent the resultant 149/// comparison. 150ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 151 bool isInteger) { 152 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 153 // Cannot fold a signed setcc with an unsigned setcc. 154 return ISD::SETCC_INVALID; 155 156 // Combine all of the condition bits. 157 return ISD::CondCode(Op1 & Op2); 158} 159 160const TargetMachine &SelectionDAG::getTarget() const { 161 return TLI.getTargetMachine(); 162} 163 164//===----------------------------------------------------------------------===// 165// SelectionDAG Class 166//===----------------------------------------------------------------------===// 167 168/// RemoveDeadNodes - This method deletes all unreachable nodes in the 169/// SelectionDAG, including nodes (like loads) that have uses of their token 170/// chain but no other uses and no side effect. If a node is passed in as an 171/// argument, it is used as the seed for node deletion. 172void SelectionDAG::RemoveDeadNodes(SDNode *N) { 173 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 174 175 // Create a dummy node (which is not added to allnodes), that adds a reference 176 // to the root node, preventing it from being deleted. 177 SDNode *DummyNode = new SDNode(ISD::EntryToken, getRoot()); 178 179 // If we have a hint to start from, use it. 180 if (N) DeleteNodeIfDead(N, &AllNodeSet); 181 182 Restart: 183 unsigned NumNodes = AllNodeSet.size(); 184 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 185 I != E; ++I) { 186 // Try to delete this node. 187 DeleteNodeIfDead(*I, &AllNodeSet); 188 189 // If we actually deleted any nodes, do not use invalid iterators in 190 // AllNodeSet. 191 if (AllNodeSet.size() != NumNodes) 192 goto Restart; 193 } 194 195 // Restore AllNodes. 196 if (AllNodes.size() != NumNodes) 197 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 198 199 // If the root changed (e.g. it was a dead load, update the root). 200 setRoot(DummyNode->getOperand(0)); 201 202 // Now that we are done with the dummy node, delete it. 203 DummyNode->getOperand(0).Val->removeUser(DummyNode); 204 delete DummyNode; 205} 206 207 208void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 209 if (!N->use_empty()) 210 return; 211 212 // Okay, we really are going to delete this node. First take this out of the 213 // appropriate CSE map. 214 RemoveNodeFromCSEMaps(N); 215 216 // Next, brutally remove the operand list. This is safe to do, as there are 217 // no cycles in the graph. 218 while (!N->Operands.empty()) { 219 SDNode *O = N->Operands.back().Val; 220 N->Operands.pop_back(); 221 O->removeUser(N); 222 223 // Now that we removed this operand, see if there are no uses of it left. 224 DeleteNodeIfDead(O, NodeSet); 225 } 226 227 // Remove the node from the nodes set and delete it. 228 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 229 AllNodeSet.erase(N); 230 231 // Now that the node is gone, check to see if any of the operands of this node 232 // are dead now. 233 delete N; 234} 235 236void SelectionDAG::DeleteNode(SDNode *N) { 237 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 238 239 // First take this out of the appropriate CSE map. 240 RemoveNodeFromCSEMaps(N); 241 242 // Finally, remove uses due to operands of this node, remove from the 243 // AllNodes list, and delete the node. 244 DeleteNodeNotInCSEMaps(N); 245} 246 247void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 248 249 // Remove it from the AllNodes list. 250 for (std::vector<SDNode*>::iterator I = AllNodes.begin(); ; ++I) { 251 assert(I != AllNodes.end() && "Node not in AllNodes list??"); 252 if (*I == N) { 253 // Erase from the vector, which is not ordered. 254 std::swap(*I, AllNodes.back()); 255 AllNodes.pop_back(); 256 break; 257 } 258 } 259 260 // Drop all of the operands and decrement used nodes use counts. 261 while (!N->Operands.empty()) { 262 SDNode *O = N->Operands.back().Val; 263 N->Operands.pop_back(); 264 O->removeUser(N); 265 } 266 267 delete N; 268} 269 270/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 271/// correspond to it. This is useful when we're about to delete or repurpose 272/// the node. We don't want future request for structurally identical nodes 273/// to return N anymore. 274void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 275 bool Erased = false; 276 switch (N->getOpcode()) { 277 case ISD::Constant: 278 Erased = Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 279 N->getValueType(0))); 280 break; 281 case ISD::TargetConstant: 282 Erased = TargetConstants.erase(std::make_pair( 283 cast<ConstantSDNode>(N)->getValue(), 284 N->getValueType(0))); 285 break; 286 case ISD::ConstantFP: { 287 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue()); 288 Erased = ConstantFPs.erase(std::make_pair(V, N->getValueType(0))); 289 break; 290 } 291 case ISD::CONDCODE: 292 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 293 "Cond code doesn't exist!"); 294 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 295 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 296 break; 297 case ISD::GlobalAddress: 298 Erased = GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 299 break; 300 case ISD::TargetGlobalAddress: 301 Erased =TargetGlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 302 break; 303 case ISD::FrameIndex: 304 Erased = FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 305 break; 306 case ISD::TargetFrameIndex: 307 Erased = TargetFrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 308 break; 309 case ISD::ConstantPool: 310 Erased = ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get()); 311 break; 312 case ISD::TargetConstantPool: 313 Erased =TargetConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get()); 314 break; 315 case ISD::BasicBlock: 316 Erased = BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 317 break; 318 case ISD::ExternalSymbol: 319 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 320 break; 321 case ISD::VALUETYPE: 322 Erased = ValueTypeNodes[cast<VTSDNode>(N)->getVT()] != 0; 323 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0; 324 break; 325 case ISD::Register: 326 Erased = RegNodes.erase(std::make_pair(cast<RegisterSDNode>(N)->getReg(), 327 N->getValueType(0))); 328 break; 329 case ISD::SRCVALUE: { 330 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N); 331 Erased =ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset())); 332 break; 333 } 334 case ISD::LOAD: 335 Erased = Loads.erase(std::make_pair(N->getOperand(1), 336 std::make_pair(N->getOperand(0), 337 N->getValueType(0)))); 338 break; 339 default: 340 if (N->getNumValues() == 1) { 341 if (N->getNumOperands() == 0) { 342 Erased = NullaryOps.erase(std::make_pair(N->getOpcode(), 343 N->getValueType(0))); 344 } else if (N->getNumOperands() == 1) { 345 Erased = 346 UnaryOps.erase(std::make_pair(N->getOpcode(), 347 std::make_pair(N->getOperand(0), 348 N->getValueType(0)))); 349 } else if (N->getNumOperands() == 2) { 350 Erased = 351 BinaryOps.erase(std::make_pair(N->getOpcode(), 352 std::make_pair(N->getOperand(0), 353 N->getOperand(1)))); 354 } else { 355 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 356 Erased = 357 OneResultNodes.erase(std::make_pair(N->getOpcode(), 358 std::make_pair(N->getValueType(0), 359 Ops))); 360 } 361 } else { 362 // Remove the node from the ArbitraryNodes map. 363 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 364 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 365 Erased = 366 ArbitraryNodes.erase(std::make_pair(N->getOpcode(), 367 std::make_pair(RV, Ops))); 368 } 369 break; 370 } 371#ifndef NDEBUG 372 // Verify that the node was actually in one of the CSE maps, unless it has a 373 // flag result (which cannot be CSE'd) or is one of the special cases that are 374 // not subject to CSE. 375 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 376 N->getOpcode() != ISD::CALL && N->getOpcode() != ISD::CALLSEQ_START && 377 N->getOpcode() != ISD::CALLSEQ_END && !N->isTargetOpcode()) { 378 379 N->dump(); 380 assert(0 && "Node is not in map!"); 381 } 382#endif 383} 384 385/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 386/// has been taken out and modified in some way. If the specified node already 387/// exists in the CSE maps, do not modify the maps, but return the existing node 388/// instead. If it doesn't exist, add it and return null. 389/// 390SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 391 assert(N->getNumOperands() && "This is a leaf node!"); 392 if (N->getOpcode() == ISD::LOAD) { 393 SDNode *&L = Loads[std::make_pair(N->getOperand(1), 394 std::make_pair(N->getOperand(0), 395 N->getValueType(0)))]; 396 if (L) return L; 397 L = N; 398 } else if (N->getNumOperands() == 1) { 399 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(), 400 std::make_pair(N->getOperand(0), 401 N->getValueType(0)))]; 402 if (U) return U; 403 U = N; 404 } else if (N->getNumOperands() == 2) { 405 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(), 406 std::make_pair(N->getOperand(0), 407 N->getOperand(1)))]; 408 if (B) return B; 409 B = N; 410 } else if (N->getNumValues() == 1) { 411 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 412 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(), 413 std::make_pair(N->getValueType(0), Ops))]; 414 if (ORN) return ORN; 415 ORN = N; 416 } else { 417 // Remove the node from the ArbitraryNodes map. 418 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 419 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 420 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(), 421 std::make_pair(RV, Ops))]; 422 if (AN) return AN; 423 AN = N; 424 } 425 return 0; 426 427} 428 429 430 431SelectionDAG::~SelectionDAG() { 432 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 433 delete AllNodes[i]; 434} 435 436SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 437 if (Op.getValueType() == VT) return Op; 438 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); 439 return getNode(ISD::AND, Op.getValueType(), Op, 440 getConstant(Imm, Op.getValueType())); 441} 442 443SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 444 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 445 // Mask out any bits that are not valid for this constant. 446 if (VT != MVT::i64) 447 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 448 449 SDNode *&N = Constants[std::make_pair(Val, VT)]; 450 if (N) return SDOperand(N, 0); 451 N = new ConstantSDNode(false, Val, VT); 452 AllNodes.push_back(N); 453 return SDOperand(N, 0); 454} 455 456SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) { 457 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 458 // Mask out any bits that are not valid for this constant. 459 if (VT != MVT::i64) 460 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 461 462 SDNode *&N = TargetConstants[std::make_pair(Val, VT)]; 463 if (N) return SDOperand(N, 0); 464 N = new ConstantSDNode(true, Val, VT); 465 AllNodes.push_back(N); 466 return SDOperand(N, 0); 467} 468 469SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 470 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 471 if (VT == MVT::f32) 472 Val = (float)Val; // Mask out extra precision. 473 474 // Do the map lookup using the actual bit pattern for the floating point 475 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 476 // we don't have issues with SNANs. 477 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)]; 478 if (N) return SDOperand(N, 0); 479 N = new ConstantFPSDNode(Val, VT); 480 AllNodes.push_back(N); 481 return SDOperand(N, 0); 482} 483 484 485 486SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 487 MVT::ValueType VT) { 488 SDNode *&N = GlobalValues[GV]; 489 if (N) return SDOperand(N, 0); 490 N = new GlobalAddressSDNode(false, GV, VT); 491 AllNodes.push_back(N); 492 return SDOperand(N, 0); 493} 494 495SDOperand SelectionDAG::getTargetGlobalAddress(const GlobalValue *GV, 496 MVT::ValueType VT) { 497 SDNode *&N = TargetGlobalValues[GV]; 498 if (N) return SDOperand(N, 0); 499 N = new GlobalAddressSDNode(true, GV, VT); 500 AllNodes.push_back(N); 501 return SDOperand(N, 0); 502} 503 504SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 505 SDNode *&N = FrameIndices[FI]; 506 if (N) return SDOperand(N, 0); 507 N = new FrameIndexSDNode(FI, VT, false); 508 AllNodes.push_back(N); 509 return SDOperand(N, 0); 510} 511 512SDOperand SelectionDAG::getTargetFrameIndex(int FI, MVT::ValueType VT) { 513 SDNode *&N = TargetFrameIndices[FI]; 514 if (N) return SDOperand(N, 0); 515 N = new FrameIndexSDNode(FI, VT, true); 516 AllNodes.push_back(N); 517 return SDOperand(N, 0); 518} 519 520SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT) { 521 SDNode *&N = ConstantPoolIndices[C]; 522 if (N) return SDOperand(N, 0); 523 N = new ConstantPoolSDNode(C, VT, false); 524 AllNodes.push_back(N); 525 return SDOperand(N, 0); 526} 527 528SDOperand SelectionDAG::getTargetConstantPool(Constant *C, MVT::ValueType VT) { 529 SDNode *&N = TargetConstantPoolIndices[C]; 530 if (N) return SDOperand(N, 0); 531 N = new ConstantPoolSDNode(C, VT, true); 532 AllNodes.push_back(N); 533 return SDOperand(N, 0); 534} 535 536SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 537 SDNode *&N = BBNodes[MBB]; 538 if (N) return SDOperand(N, 0); 539 N = new BasicBlockSDNode(MBB); 540 AllNodes.push_back(N); 541 return SDOperand(N, 0); 542} 543 544SDOperand SelectionDAG::getValueType(MVT::ValueType VT) { 545 if ((unsigned)VT >= ValueTypeNodes.size()) 546 ValueTypeNodes.resize(VT+1); 547 if (ValueTypeNodes[VT] == 0) { 548 ValueTypeNodes[VT] = new VTSDNode(VT); 549 AllNodes.push_back(ValueTypeNodes[VT]); 550 } 551 552 return SDOperand(ValueTypeNodes[VT], 0); 553} 554 555SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 556 SDNode *&N = ExternalSymbols[Sym]; 557 if (N) return SDOperand(N, 0); 558 N = new ExternalSymbolSDNode(Sym, VT); 559 AllNodes.push_back(N); 560 return SDOperand(N, 0); 561} 562 563SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 564 if ((unsigned)Cond >= CondCodeNodes.size()) 565 CondCodeNodes.resize(Cond+1); 566 567 if (CondCodeNodes[Cond] == 0) { 568 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 569 AllNodes.push_back(CondCodeNodes[Cond]); 570 } 571 return SDOperand(CondCodeNodes[Cond], 0); 572} 573 574SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) { 575 RegisterSDNode *&Reg = RegNodes[std::make_pair(RegNo, VT)]; 576 if (!Reg) { 577 Reg = new RegisterSDNode(RegNo, VT); 578 AllNodes.push_back(Reg); 579 } 580 return SDOperand(Reg, 0); 581} 582 583/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 584/// this predicate to simplify operations downstream. V and Mask are known to 585/// be the same type. 586static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 587 const TargetLowering &TLI) { 588 unsigned SrcBits; 589 if (Mask == 0) return true; 590 591 // If we know the result of a setcc has the top bits zero, use this info. 592 switch (Op.getOpcode()) { 593 case ISD::Constant: 594 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 595 596 case ISD::SETCC: 597 return ((Mask & 1) == 0) && 598 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 599 600 case ISD::ZEXTLOAD: 601 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT()); 602 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 603 case ISD::ZERO_EXTEND: 604 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 605 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 606 case ISD::AssertZext: 607 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT()); 608 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 609 case ISD::AND: 610 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 611 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 612 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 613 614 // FALL THROUGH 615 case ISD::OR: 616 case ISD::XOR: 617 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 618 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 619 case ISD::SELECT: 620 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 621 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 622 case ISD::SELECT_CC: 623 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) && 624 MaskedValueIsZero(Op.getOperand(3), Mask, TLI); 625 case ISD::SRL: 626 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 627 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 628 uint64_t NewVal = Mask << ShAmt->getValue(); 629 SrcBits = MVT::getSizeInBits(Op.getValueType()); 630 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 631 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 632 } 633 return false; 634 case ISD::SHL: 635 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 636 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 637 uint64_t NewVal = Mask >> ShAmt->getValue(); 638 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 639 } 640 return false; 641 case ISD::CTTZ: 642 case ISD::CTLZ: 643 case ISD::CTPOP: 644 // Bit counting instructions can not set the high bits of the result 645 // register. The max number of bits sets depends on the input. 646 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0; 647 648 // TODO we could handle some SRA cases here. 649 default: break; 650 } 651 652 return false; 653} 654 655 656 657SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1, 658 SDOperand N2, ISD::CondCode Cond) { 659 // These setcc operations always fold. 660 switch (Cond) { 661 default: break; 662 case ISD::SETFALSE: 663 case ISD::SETFALSE2: return getConstant(0, VT); 664 case ISD::SETTRUE: 665 case ISD::SETTRUE2: return getConstant(1, VT); 666 } 667 668 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 669 uint64_t C2 = N2C->getValue(); 670 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 671 uint64_t C1 = N1C->getValue(); 672 673 // Sign extend the operands if required 674 if (ISD::isSignedIntSetCC(Cond)) { 675 C1 = N1C->getSignExtended(); 676 C2 = N2C->getSignExtended(); 677 } 678 679 switch (Cond) { 680 default: assert(0 && "Unknown integer setcc!"); 681 case ISD::SETEQ: return getConstant(C1 == C2, VT); 682 case ISD::SETNE: return getConstant(C1 != C2, VT); 683 case ISD::SETULT: return getConstant(C1 < C2, VT); 684 case ISD::SETUGT: return getConstant(C1 > C2, VT); 685 case ISD::SETULE: return getConstant(C1 <= C2, VT); 686 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 687 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 688 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 689 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 690 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 691 } 692 } else { 693 // If the LHS is a ZERO_EXTEND, perform the comparison on the input. 694 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 695 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 696 697 // If the comparison constant has bits in the upper part, the 698 // zero-extended value could never match. 699 if (C2 & (~0ULL << InSize)) { 700 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 701 switch (Cond) { 702 case ISD::SETUGT: 703 case ISD::SETUGE: 704 case ISD::SETEQ: return getConstant(0, VT); 705 case ISD::SETULT: 706 case ISD::SETULE: 707 case ISD::SETNE: return getConstant(1, VT); 708 case ISD::SETGT: 709 case ISD::SETGE: 710 // True if the sign bit of C2 is set. 711 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 712 case ISD::SETLT: 713 case ISD::SETLE: 714 // True if the sign bit of C2 isn't set. 715 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 716 default: 717 break; 718 } 719 } 720 721 // Otherwise, we can perform the comparison with the low bits. 722 switch (Cond) { 723 case ISD::SETEQ: 724 case ISD::SETNE: 725 case ISD::SETUGT: 726 case ISD::SETUGE: 727 case ISD::SETULT: 728 case ISD::SETULE: 729 return getSetCC(VT, N1.getOperand(0), 730 getConstant(C2, N1.getOperand(0).getValueType()), 731 Cond); 732 default: 733 break; // todo, be more careful with signed comparisons 734 } 735 } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG && 736 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { 737 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT(); 738 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy); 739 MVT::ValueType ExtDstTy = N1.getValueType(); 740 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy); 741 742 // If the extended part has any inconsistent bits, it cannot ever 743 // compare equal. In other words, they have to be all ones or all 744 // zeros. 745 uint64_t ExtBits = 746 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1)); 747 if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits) 748 return getConstant(Cond == ISD::SETNE, VT); 749 750 // Otherwise, make this a use of a zext. 751 return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy), 752 getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy), 753 Cond); 754 } 755 756 uint64_t MinVal, MaxVal; 757 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 758 if (ISD::isSignedIntSetCC(Cond)) { 759 MinVal = 1ULL << (OperandBitSize-1); 760 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 761 MaxVal = ~0ULL >> (65-OperandBitSize); 762 else 763 MaxVal = 0; 764 } else { 765 MinVal = 0; 766 MaxVal = ~0ULL >> (64-OperandBitSize); 767 } 768 769 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 770 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 771 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 772 --C2; // X >= C1 --> X > (C1-1) 773 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 774 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); 775 } 776 777 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 778 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 779 ++C2; // X <= C1 --> X < (C1+1) 780 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 781 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); 782 } 783 784 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 785 return getConstant(0, VT); // X < MIN --> false 786 787 // Canonicalize setgt X, Min --> setne X, Min 788 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 789 return getSetCC(VT, N1, N2, ISD::SETNE); 790 791 // If we have setult X, 1, turn it into seteq X, 0 792 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 793 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()), 794 ISD::SETEQ); 795 // If we have setugt X, Max-1, turn it into seteq X, Max 796 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 797 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()), 798 ISD::SETEQ); 799 800 // If we have "setcc X, C1", check to see if we can shrink the immediate 801 // by changing cc. 802 803 // SETUGT X, SINTMAX -> SETLT X, 0 804 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 805 C2 == (~0ULL >> (65-OperandBitSize))) 806 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT); 807 808 // FIXME: Implement the rest of these. 809 810 811 // Fold bit comparisons when we can. 812 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 813 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 814 if (ConstantSDNode *AndRHS = 815 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 816 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 817 // Perform the xform if the AND RHS is a single bit. 818 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 819 return getNode(ISD::SRL, VT, N1, 820 getConstant(Log2_64(AndRHS->getValue()), 821 TLI.getShiftAmountTy())); 822 } 823 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 824 // (X & 8) == 8 --> (X & 8) >> 3 825 // Perform the xform if C2 is a single bit. 826 if ((C2 & (C2-1)) == 0) { 827 return getNode(ISD::SRL, VT, N1, 828 getConstant(Log2_64(C2),TLI.getShiftAmountTy())); 829 } 830 } 831 } 832 } 833 } else if (isa<ConstantSDNode>(N1.Val)) { 834 // Ensure that the constant occurs on the RHS. 835 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 836 } 837 838 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 839 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 840 double C1 = N1C->getValue(), C2 = N2C->getValue(); 841 842 switch (Cond) { 843 default: break; // FIXME: Implement the rest of these! 844 case ISD::SETEQ: return getConstant(C1 == C2, VT); 845 case ISD::SETNE: return getConstant(C1 != C2, VT); 846 case ISD::SETLT: return getConstant(C1 < C2, VT); 847 case ISD::SETGT: return getConstant(C1 > C2, VT); 848 case ISD::SETLE: return getConstant(C1 <= C2, VT); 849 case ISD::SETGE: return getConstant(C1 >= C2, VT); 850 } 851 } else { 852 // Ensure that the constant occurs on the RHS. 853 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 854 } 855 856 if (N1 == N2) { 857 // We can always fold X == Y for integer setcc's. 858 if (MVT::isInteger(N1.getValueType())) 859 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 860 unsigned UOF = ISD::getUnorderedFlavor(Cond); 861 if (UOF == 2) // FP operators that are undefined on NaNs. 862 return getConstant(ISD::isTrueWhenEqual(Cond), VT); 863 if (UOF == unsigned(ISD::isTrueWhenEqual(Cond))) 864 return getConstant(UOF, VT); 865 // Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO 866 // if it is not already. 867 ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO; 868 if (NewCond != Cond) 869 return getSetCC(VT, N1, N2, NewCond); 870 } 871 872 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 873 MVT::isInteger(N1.getValueType())) { 874 if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB || 875 N1.getOpcode() == ISD::XOR) { 876 // Simplify (X+Y) == (X+Z) --> Y == Z 877 if (N1.getOpcode() == N2.getOpcode()) { 878 if (N1.getOperand(0) == N2.getOperand(0)) 879 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 880 if (N1.getOperand(1) == N2.getOperand(1)) 881 return getSetCC(VT, N1.getOperand(0), N2.getOperand(0), Cond); 882 if (isCommutativeBinOp(N1.getOpcode())) { 883 // If X op Y == Y op X, try other combinations. 884 if (N1.getOperand(0) == N2.getOperand(1)) 885 return getSetCC(VT, N1.getOperand(1), N2.getOperand(0), Cond); 886 if (N1.getOperand(1) == N2.getOperand(0)) 887 return getSetCC(VT, N1.getOperand(1), N2.getOperand(1), Cond); 888 } 889 } 890 891 // FIXME: move this stuff to the DAG Combiner when it exists! 892 893 // Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0. Common for condcodes. 894 if (N1.getOpcode() == ISD::XOR) 895 if (ConstantSDNode *XORC = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 896 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N2)) { 897 // If we know that all of the inverted bits are zero, don't bother 898 // performing the inversion. 899 if (MaskedValueIsZero(N1.getOperand(0), ~XORC->getValue(), TLI)) 900 return getSetCC(VT, N1.getOperand(0), 901 getConstant(XORC->getValue()^RHSC->getValue(), 902 N1.getValueType()), Cond); 903 } 904 905 // Simplify (X+Z) == X --> Z == 0 906 if (N1.getOperand(0) == N2) 907 return getSetCC(VT, N1.getOperand(1), 908 getConstant(0, N1.getValueType()), Cond); 909 if (N1.getOperand(1) == N2) { 910 if (isCommutativeBinOp(N1.getOpcode())) 911 return getSetCC(VT, N1.getOperand(0), 912 getConstant(0, N1.getValueType()), Cond); 913 else { 914 assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); 915 // (Z-X) == X --> Z == X<<1 916 return getSetCC(VT, N1.getOperand(0), 917 getNode(ISD::SHL, N2.getValueType(), 918 N2, getConstant(1, TLI.getShiftAmountTy())), 919 Cond); 920 } 921 } 922 } 923 924 if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || 925 N2.getOpcode() == ISD::XOR) { 926 // Simplify X == (X+Z) --> Z == 0 927 if (N2.getOperand(0) == N1) { 928 return getSetCC(VT, N2.getOperand(1), 929 getConstant(0, N2.getValueType()), Cond); 930 } else if (N2.getOperand(1) == N1) { 931 if (isCommutativeBinOp(N2.getOpcode())) { 932 return getSetCC(VT, N2.getOperand(0), 933 getConstant(0, N2.getValueType()), Cond); 934 } else { 935 assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!"); 936 // X == (Z-X) --> X<<1 == Z 937 return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1, 938 getConstant(1, TLI.getShiftAmountTy())), 939 N2.getOperand(0), Cond); 940 } 941 } 942 } 943 } 944 945 // Fold away ALL boolean setcc's. 946 if (N1.getValueType() == MVT::i1) { 947 switch (Cond) { 948 default: assert(0 && "Unknown integer setcc!"); 949 case ISD::SETEQ: // X == Y -> (X^Y)^1 950 N1 = getNode(ISD::XOR, MVT::i1, 951 getNode(ISD::XOR, MVT::i1, N1, N2), 952 getConstant(1, MVT::i1)); 953 break; 954 case ISD::SETNE: // X != Y --> (X^Y) 955 N1 = getNode(ISD::XOR, MVT::i1, N1, N2); 956 break; 957 case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y 958 case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y 959 N1 = getNode(ISD::AND, MVT::i1, N2, 960 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 961 break; 962 case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X 963 case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X 964 N1 = getNode(ISD::AND, MVT::i1, N1, 965 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 966 break; 967 case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y 968 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y 969 N1 = getNode(ISD::OR, MVT::i1, N2, 970 getNode(ISD::XOR, MVT::i1, N1, getConstant(1, MVT::i1))); 971 break; 972 case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X 973 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X 974 N1 = getNode(ISD::OR, MVT::i1, N1, 975 getNode(ISD::XOR, MVT::i1, N2, getConstant(1, MVT::i1))); 976 break; 977 } 978 if (VT != MVT::i1) 979 N1 = getNode(ISD::ZERO_EXTEND, VT, N1); 980 return N1; 981 } 982 983 // Could not fold it. 984 return SDOperand(); 985} 986 987SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2, 988 SDOperand N3, SDOperand N4, 989 ISD::CondCode CC) { 990 MVT::ValueType VT = N3.getValueType(); 991 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 992 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 993 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 994 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val); 995 996 // Check to see if we can simplify the select into an fabs node 997 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) { 998 // Allow either -0.0 or 0.0 999 if (CFP->getValue() == 0.0) { 1000 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 1001 if ((CC == ISD::SETGE || CC == ISD::SETGT) && 1002 N1 == N3 && N4.getOpcode() == ISD::FNEG && 1003 N1 == N4.getOperand(0)) 1004 return getNode(ISD::FABS, VT, N1); 1005 1006 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 1007 if ((CC == ISD::SETLT || CC == ISD::SETLE) && 1008 N1 == N4 && N3.getOpcode() == ISD::FNEG && 1009 N3.getOperand(0) == N4) 1010 return getNode(ISD::FABS, VT, N4); 1011 } 1012 } 1013 1014 // check to see if we're select_cc'ing a select_cc. 1015 // this allows us to turn: 1016 // select_cc set[eq,ne] (select_cc cc, lhs, rhs, 1, 0), 0, true, false -> 1017 // select_cc cc, lhs, rhs, true, false 1018 if ((N1C && N1C->isNullValue() && N2.getOpcode() == ISD::SELECT_CC) || 1019 (N2C && N2C->isNullValue() && N1.getOpcode() == ISD::SELECT_CC) && 1020 (CC == ISD::SETEQ || CC == ISD::SETNE)) { 1021 SDOperand SCC = N1C ? N2 : N1; 1022 ConstantSDNode *SCCT = dyn_cast<ConstantSDNode>(SCC.getOperand(2)); 1023 ConstantSDNode *SCCF = dyn_cast<ConstantSDNode>(SCC.getOperand(3)); 1024 if (SCCT && SCCF && SCCF->isNullValue() && SCCT->getValue() == 1ULL) { 1025 if (CC == ISD::SETEQ) std::swap(N3, N4); 1026 return getNode(ISD::SELECT_CC, N3.getValueType(), SCC.getOperand(0), 1027 SCC.getOperand(1), N3, N4, SCC.getOperand(4)); 1028 } 1029 } 1030 1031 // Check to see if we can perform the "gzip trick", transforming 1032 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A 1033 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() && 1034 MVT::isInteger(N1.getValueType()) && 1035 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) { 1036 MVT::ValueType XType = N1.getValueType(); 1037 MVT::ValueType AType = N3.getValueType(); 1038 if (XType >= AType) { 1039 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a 1040 // single-bit constant. FIXME: remove once the dag combiner 1041 // exists. 1042 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) { 1043 unsigned ShCtV = Log2_64(N3C->getValue()); 1044 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1; 1045 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy()); 1046 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt); 1047 if (XType > AType) 1048 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1049 return getNode(ISD::AND, AType, Shift, N3); 1050 } 1051 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1052 getConstant(MVT::getSizeInBits(XType)-1, 1053 TLI.getShiftAmountTy())); 1054 if (XType > AType) 1055 Shift = getNode(ISD::TRUNCATE, AType, Shift); 1056 return getNode(ISD::AND, AType, Shift, N3); 1057 } 1058 } 1059 1060 // Check to see if this is the equivalent of setcc 1061 if (N4C && N4C->isNullValue() && N3C && (N3C->getValue() == 1ULL)) { 1062 MVT::ValueType XType = N1.getValueType(); 1063 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy())) { 1064 SDOperand Res = getSetCC(TLI.getSetCCResultTy(), N1, N2, CC); 1065 if (Res.getValueType() != VT) 1066 Res = getNode(ISD::ZERO_EXTEND, VT, Res); 1067 return Res; 1068 } 1069 1070 // seteq X, 0 -> srl (ctlz X, log2(size(X))) 1071 if (N2C && N2C->isNullValue() && CC == ISD::SETEQ && 1072 TLI.isOperationLegal(ISD::CTLZ, XType)) { 1073 SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1); 1074 return getNode(ISD::SRL, XType, Ctlz, 1075 getConstant(Log2_32(MVT::getSizeInBits(XType)), 1076 TLI.getShiftAmountTy())); 1077 } 1078 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1) 1079 if (N2C && N2C->isNullValue() && CC == ISD::SETGT) { 1080 SDOperand NegN1 = getNode(ISD::SUB, XType, getConstant(0, XType), N1); 1081 SDOperand NotN1 = getNode(ISD::XOR, XType, N1, getConstant(~0ULL, XType)); 1082 return getNode(ISD::SRL, XType, getNode(ISD::AND, XType, NegN1, NotN1), 1083 getConstant(MVT::getSizeInBits(XType)-1, 1084 TLI.getShiftAmountTy())); 1085 } 1086 // setgt X, -1 -> xor (srl (X, size(X)-1), 1) 1087 if (N2C && N2C->isAllOnesValue() && CC == ISD::SETGT) { 1088 SDOperand Sign = getNode(ISD::SRL, XType, N1, 1089 getConstant(MVT::getSizeInBits(XType)-1, 1090 TLI.getShiftAmountTy())); 1091 return getNode(ISD::XOR, XType, Sign, getConstant(1, XType)); 1092 } 1093 } 1094 1095 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X -> 1096 // Y = sra (X, size(X)-1); xor (add (X, Y), Y) 1097 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) && 1098 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) { 1099 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) { 1100 MVT::ValueType XType = N1.getValueType(); 1101 if (SubC->isNullValue() && MVT::isInteger(XType)) { 1102 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1103 getConstant(MVT::getSizeInBits(XType)-1, 1104 TLI.getShiftAmountTy())); 1105 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift), 1106 Shift); 1107 } 1108 } 1109 } 1110 1111 // Could not fold it. 1112 return SDOperand(); 1113} 1114 1115/// getNode - Gets or creates the specified node. 1116/// 1117SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 1118 SDNode *&N = NullaryOps[std::make_pair(Opcode, VT)]; 1119 if (!N) { 1120 N = new SDNode(Opcode, VT); 1121 AllNodes.push_back(N); 1122 } 1123 return SDOperand(N, 0); 1124} 1125 1126SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1127 SDOperand Operand) { 1128 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 1129 uint64_t Val = C->getValue(); 1130 switch (Opcode) { 1131 default: break; 1132 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 1133 case ISD::ANY_EXTEND: 1134 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 1135 case ISD::TRUNCATE: return getConstant(Val, VT); 1136 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 1137 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 1138 } 1139 } 1140 1141 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 1142 switch (Opcode) { 1143 case ISD::FNEG: 1144 return getConstantFP(-C->getValue(), VT); 1145 case ISD::FP_ROUND: 1146 case ISD::FP_EXTEND: 1147 return getConstantFP(C->getValue(), VT); 1148 case ISD::FP_TO_SINT: 1149 return getConstant((int64_t)C->getValue(), VT); 1150 case ISD::FP_TO_UINT: 1151 return getConstant((uint64_t)C->getValue(), VT); 1152 } 1153 1154 unsigned OpOpcode = Operand.Val->getOpcode(); 1155 switch (Opcode) { 1156 case ISD::TokenFactor: 1157 return Operand; // Factor of one node? No factor. 1158 case ISD::SIGN_EXTEND: 1159 if (Operand.getValueType() == VT) return Operand; // noop extension 1160 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 1161 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1162 break; 1163 case ISD::ZERO_EXTEND: 1164 if (Operand.getValueType() == VT) return Operand; // noop extension 1165 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 1166 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 1167 break; 1168 case ISD::ANY_EXTEND: 1169 if (Operand.getValueType() == VT) return Operand; // noop extension 1170 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 1171 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 1172 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1173 break; 1174 case ISD::TRUNCATE: 1175 if (Operand.getValueType() == VT) return Operand; // noop truncate 1176 if (OpOpcode == ISD::TRUNCATE) 1177 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 1178 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 1179 OpOpcode == ISD::ANY_EXTEND) { 1180 // If the source is smaller than the dest, we still need an extend. 1181 if (Operand.Val->getOperand(0).getValueType() < VT) 1182 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1183 else if (Operand.Val->getOperand(0).getValueType() > VT) 1184 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 1185 else 1186 return Operand.Val->getOperand(0); 1187 } 1188 break; 1189 case ISD::FNEG: 1190 if (OpOpcode == ISD::SUB) // -(X-Y) -> (Y-X) 1191 return getNode(ISD::SUB, VT, Operand.Val->getOperand(1), 1192 Operand.Val->getOperand(0)); 1193 if (OpOpcode == ISD::FNEG) // --X -> X 1194 return Operand.Val->getOperand(0); 1195 break; 1196 case ISD::FABS: 1197 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 1198 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 1199 break; 1200 } 1201 1202 SDNode *N; 1203 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 1204 SDNode *&E = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 1205 if (E) return SDOperand(E, 0); 1206 E = N = new SDNode(Opcode, Operand); 1207 } else { 1208 N = new SDNode(Opcode, Operand); 1209 } 1210 N->setValueTypes(VT); 1211 AllNodes.push_back(N); 1212 return SDOperand(N, 0); 1213} 1214 1215 1216 1217SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1218 SDOperand N1, SDOperand N2) { 1219#ifndef NDEBUG 1220 switch (Opcode) { 1221 case ISD::TokenFactor: 1222 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 1223 N2.getValueType() == MVT::Other && "Invalid token factor!"); 1224 break; 1225 case ISD::AND: 1226 case ISD::OR: 1227 case ISD::XOR: 1228 case ISD::UDIV: 1229 case ISD::UREM: 1230 case ISD::MULHU: 1231 case ISD::MULHS: 1232 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 1233 // fall through 1234 case ISD::ADD: 1235 case ISD::SUB: 1236 case ISD::MUL: 1237 case ISD::SDIV: 1238 case ISD::SREM: 1239 assert(N1.getValueType() == N2.getValueType() && 1240 N1.getValueType() == VT && "Binary operator types must match!"); 1241 break; 1242 1243 case ISD::SHL: 1244 case ISD::SRA: 1245 case ISD::SRL: 1246 assert(VT == N1.getValueType() && 1247 "Shift operators return type must be the same as their first arg"); 1248 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 1249 VT != MVT::i1 && "Shifts only work on integers"); 1250 break; 1251 case ISD::FP_ROUND_INREG: { 1252 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1253 assert(VT == N1.getValueType() && "Not an inreg round!"); 1254 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1255 "Cannot FP_ROUND_INREG integer types"); 1256 assert(EVT <= VT && "Not rounding down!"); 1257 break; 1258 } 1259 case ISD::AssertSext: 1260 case ISD::AssertZext: 1261 case ISD::SIGN_EXTEND_INREG: { 1262 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1263 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1264 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1265 "Cannot *_EXTEND_INREG FP types"); 1266 assert(EVT <= VT && "Not extending!"); 1267 } 1268 1269 default: break; 1270 } 1271#endif 1272 1273 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1274 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1275 if (N1C) { 1276 if (N2C) { 1277 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 1278 switch (Opcode) { 1279 case ISD::ADD: return getConstant(C1 + C2, VT); 1280 case ISD::SUB: return getConstant(C1 - C2, VT); 1281 case ISD::MUL: return getConstant(C1 * C2, VT); 1282 case ISD::UDIV: 1283 if (C2) return getConstant(C1 / C2, VT); 1284 break; 1285 case ISD::UREM : 1286 if (C2) return getConstant(C1 % C2, VT); 1287 break; 1288 case ISD::SDIV : 1289 if (C2) return getConstant(N1C->getSignExtended() / 1290 N2C->getSignExtended(), VT); 1291 break; 1292 case ISD::SREM : 1293 if (C2) return getConstant(N1C->getSignExtended() % 1294 N2C->getSignExtended(), VT); 1295 break; 1296 case ISD::AND : return getConstant(C1 & C2, VT); 1297 case ISD::OR : return getConstant(C1 | C2, VT); 1298 case ISD::XOR : return getConstant(C1 ^ C2, VT); 1299 case ISD::SHL : return getConstant(C1 << C2, VT); 1300 case ISD::SRL : return getConstant(C1 >> C2, VT); 1301 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 1302 default: break; 1303 } 1304 } else { // Cannonicalize constant to RHS if commutative 1305 if (isCommutativeBinOp(Opcode)) { 1306 std::swap(N1C, N2C); 1307 std::swap(N1, N2); 1308 } 1309 } 1310 1311 if (!CombinerEnabled) { 1312 switch (Opcode) { 1313 default: break; 1314 case ISD::SHL: // shl 0, X -> 0 1315 if (N1C->isNullValue()) return N1; 1316 break; 1317 case ISD::SRL: // srl 0, X -> 0 1318 if (N1C->isNullValue()) return N1; 1319 break; 1320 case ISD::SRA: // sra -1, X -> -1 1321 if (N1C->isAllOnesValue()) return N1; 1322 break; 1323 case ISD::SIGN_EXTEND_INREG: // SIGN_EXTEND_INREG N1C, EVT 1324 // Extending a constant? Just return the extended constant. 1325 SDOperand Tmp = getNode(ISD::TRUNCATE, cast<VTSDNode>(N2)->getVT(), N1); 1326 return getNode(ISD::SIGN_EXTEND, VT, Tmp); 1327 } 1328 } 1329 } 1330 1331 if (!CombinerEnabled) { 1332 if (N2C) { 1333 uint64_t C2 = N2C->getValue(); 1334 1335 switch (Opcode) { 1336 case ISD::ADD: 1337 if (!C2) return N1; // add X, 0 -> X 1338 break; 1339 case ISD::SUB: 1340 if (!C2) return N1; // sub X, 0 -> X 1341 return getNode(ISD::ADD, VT, N1, getConstant(-C2, VT)); 1342 case ISD::MUL: 1343 if (!C2) return N2; // mul X, 0 -> 0 1344 if (N2C->isAllOnesValue()) // mul X, -1 -> 0-X 1345 return getNode(ISD::SUB, VT, getConstant(0, VT), N1); 1346 1347 // FIXME: Move this to the DAG combiner when it exists. 1348 if ((C2 & C2-1) == 0) { 1349 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 1350 return getNode(ISD::SHL, VT, N1, ShAmt); 1351 } 1352 break; 1353 1354 case ISD::MULHU: 1355 case ISD::MULHS: 1356 if (!C2) return N2; // mul X, 0 -> 0 1357 1358 if (C2 == 1) // 0X*01 -> 0X hi(0X) == 0 1359 return getConstant(0, VT); 1360 1361 // Many others could be handled here, including -1, powers of 2, etc. 1362 break; 1363 1364 case ISD::UDIV: 1365 // FIXME: Move this to the DAG combiner when it exists. 1366 if ((C2 & C2-1) == 0 && C2) { 1367 SDOperand ShAmt = getConstant(Log2_64(C2), TLI.getShiftAmountTy()); 1368 return getNode(ISD::SRL, VT, N1, ShAmt); 1369 } 1370 break; 1371 1372 case ISD::SHL: 1373 case ISD::SRL: 1374 case ISD::SRA: 1375 // If the shift amount is bigger than the size of the data, then all the 1376 // bits are shifted out. Simplify to undef. 1377 if (C2 >= MVT::getSizeInBits(N1.getValueType())) { 1378 return getNode(ISD::UNDEF, N1.getValueType()); 1379 } 1380 if (C2 == 0) return N1; 1381 1382 if (Opcode == ISD::SRA) { 1383 // If the sign bit is known to be zero, switch this to a SRL. 1384 if (MaskedValueIsZero(N1, 1385 1ULL << (MVT::getSizeInBits(N1.getValueType())-1), 1386 TLI)) 1387 return getNode(ISD::SRL, N1.getValueType(), N1, N2); 1388 } else { 1389 // If the part left over is known to be zero, the whole thing is zero. 1390 uint64_t TypeMask = ~0ULL >> (64-MVT::getSizeInBits(N1.getValueType())); 1391 if (Opcode == ISD::SRL) { 1392 if (MaskedValueIsZero(N1, TypeMask << C2, TLI)) 1393 return getConstant(0, N1.getValueType()); 1394 } else if (Opcode == ISD::SHL) { 1395 if (MaskedValueIsZero(N1, TypeMask >> C2, TLI)) 1396 return getConstant(0, N1.getValueType()); 1397 } 1398 } 1399 1400 if (Opcode == ISD::SHL && N1.getNumOperands() == 2) 1401 if (ConstantSDNode *OpSA = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1402 unsigned OpSAC = OpSA->getValue(); 1403 if (N1.getOpcode() == ISD::SHL) { 1404 if (C2+OpSAC >= MVT::getSizeInBits(N1.getValueType())) 1405 return getConstant(0, N1.getValueType()); 1406 return getNode(ISD::SHL, N1.getValueType(), N1.getOperand(0), 1407 getConstant(C2+OpSAC, N2.getValueType())); 1408 } else if (N1.getOpcode() == ISD::SRL) { 1409 // (X >> C1) << C2: if C2 > C1, ((X & ~0<<C1) << C2-C1) 1410 SDOperand Mask = getNode(ISD::AND, VT, N1.getOperand(0), 1411 getConstant(~0ULL << OpSAC, VT)); 1412 if (C2 > OpSAC) { 1413 return getNode(ISD::SHL, VT, Mask, 1414 getConstant(C2-OpSAC, N2.getValueType())); 1415 } else { 1416 // (X >> C1) << C2: if C2 <= C1, ((X & ~0<<C1) >> C1-C2) 1417 return getNode(ISD::SRL, VT, Mask, 1418 getConstant(OpSAC-C2, N2.getValueType())); 1419 } 1420 } else if (N1.getOpcode() == ISD::SRA) { 1421 // if C1 == C2, just mask out low bits. 1422 if (C2 == OpSAC) 1423 return getNode(ISD::AND, VT, N1.getOperand(0), 1424 getConstant(~0ULL << C2, VT)); 1425 } 1426 } 1427 break; 1428 1429 case ISD::AND: 1430 if (!C2) return N2; // X and 0 -> 0 1431 if (N2C->isAllOnesValue()) 1432 return N1; // X and -1 -> X 1433 1434 if (MaskedValueIsZero(N1, C2, TLI)) // X and 0 -> 0 1435 return getConstant(0, VT); 1436 1437 { 1438 uint64_t NotC2 = ~C2; 1439 if (VT != MVT::i64) 1440 NotC2 &= (1ULL << MVT::getSizeInBits(VT))-1; 1441 1442 if (MaskedValueIsZero(N1, NotC2, TLI)) 1443 return N1; // if (X & ~C2) -> 0, the and is redundant 1444 } 1445 1446 // FIXME: Should add a corresponding version of this for 1447 // ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which 1448 // we don't have yet. 1449 // FIXME: NOW WE DO, add this. 1450 1451 // and (sign_extend_inreg x:16:32), 1 -> and x, 1 1452 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG) { 1453 // If we are masking out the part of our input that was extended, just 1454 // mask the input to the extension directly. 1455 unsigned ExtendBits = 1456 MVT::getSizeInBits(cast<VTSDNode>(N1.getOperand(1))->getVT()); 1457 if ((C2 & (~0ULL << ExtendBits)) == 0) 1458 return getNode(ISD::AND, VT, N1.getOperand(0), N2); 1459 } else if (N1.getOpcode() == ISD::OR) { 1460 if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 1461 if ((ORI->getValue() & C2) == C2) { 1462 // If the 'or' is setting all of the bits that we are masking for, 1463 // we know the result of the AND will be the AND mask itself. 1464 return N2; 1465 } 1466 } 1467 break; 1468 case ISD::OR: 1469 if (!C2)return N1; // X or 0 -> X 1470 if (N2C->isAllOnesValue()) 1471 return N2; // X or -1 -> -1 1472 break; 1473 case ISD::XOR: 1474 if (!C2) return N1; // X xor 0 -> X 1475 if (N2C->getValue() == 1 && N1.Val->getOpcode() == ISD::SETCC) { 1476 SDNode *SetCC = N1.Val; 1477 // !(X op Y) -> (X !op Y) 1478 bool isInteger = MVT::isInteger(SetCC->getOperand(0).getValueType()); 1479 ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get(); 1480 return getSetCC(SetCC->getValueType(0), 1481 SetCC->getOperand(0), SetCC->getOperand(1), 1482 ISD::getSetCCInverse(CC, isInteger)); 1483 } else if (N2C->isAllOnesValue()) { 1484 if (N1.getOpcode() == ISD::AND || N1.getOpcode() == ISD::OR) { 1485 SDNode *Op = N1.Val; 1486 // !(X or Y) -> (!X and !Y) iff X or Y are freely invertible 1487 // !(X and Y) -> (!X or !Y) iff X or Y are freely invertible 1488 SDOperand LHS = Op->getOperand(0), RHS = Op->getOperand(1); 1489 if (isInvertibleForFree(RHS) || isInvertibleForFree(LHS)) { 1490 LHS = getNode(ISD::XOR, VT, LHS, N2); // RHS = ~LHS 1491 RHS = getNode(ISD::XOR, VT, RHS, N2); // RHS = ~RHS 1492 if (Op->getOpcode() == ISD::AND) 1493 return getNode(ISD::OR, VT, LHS, RHS); 1494 return getNode(ISD::AND, VT, LHS, RHS); 1495 } 1496 } 1497 // X xor -1 -> not(x) ? 1498 } 1499 break; 1500 } 1501 1502 // Reassociate ((X op C1) op C2) if possible. 1503 if (N1.getOpcode() == Opcode && isAssociativeBinOp(Opcode)) 1504 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N1.Val->getOperand(1))) 1505 return getNode(Opcode, VT, N1.Val->getOperand(0), 1506 getNode(Opcode, VT, N2, N1.Val->getOperand(1))); 1507 } 1508 } 1509 1510 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1511 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1512 if (N1CFP) { 1513 if (N2CFP) { 1514 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1515 switch (Opcode) { 1516 case ISD::ADD: return getConstantFP(C1 + C2, VT); 1517 case ISD::SUB: return getConstantFP(C1 - C2, VT); 1518 case ISD::MUL: return getConstantFP(C1 * C2, VT); 1519 case ISD::SDIV: 1520 if (C2) return getConstantFP(C1 / C2, VT); 1521 break; 1522 case ISD::SREM : 1523 if (C2) return getConstantFP(fmod(C1, C2), VT); 1524 break; 1525 default: break; 1526 } 1527 } else { // Cannonicalize constant to RHS if commutative 1528 if (isCommutativeBinOp(Opcode)) { 1529 std::swap(N1CFP, N2CFP); 1530 std::swap(N1, N2); 1531 } 1532 } 1533 1534 if (!CombinerEnabled) { 1535 if (Opcode == ISD::FP_ROUND_INREG) 1536 return getNode(ISD::FP_EXTEND, VT, 1537 getNode(ISD::FP_ROUND, cast<VTSDNode>(N2)->getVT(), N1)); 1538 } 1539 } 1540 1541 // Finally, fold operations that do not require constants. 1542 switch (Opcode) { 1543 case ISD::TokenFactor: 1544 if (!CombinerEnabled) { 1545 if (N1.getOpcode() == ISD::EntryToken) 1546 return N2; 1547 if (N2.getOpcode() == ISD::EntryToken) 1548 return N1; 1549 } 1550 break; 1551 1552 case ISD::AND: 1553 case ISD::OR: 1554 if (!CombinerEnabled) { 1555 if (N1.Val->getOpcode() == ISD::SETCC && N2.Val->getOpcode() == ISD::SETCC){ 1556 SDNode *LHS = N1.Val, *RHS = N2.Val; 1557 SDOperand LL = LHS->getOperand(0), RL = RHS->getOperand(0); 1558 SDOperand LR = LHS->getOperand(1), RR = RHS->getOperand(1); 1559 ISD::CondCode Op1 = cast<CondCodeSDNode>(LHS->getOperand(2))->get(); 1560 ISD::CondCode Op2 = cast<CondCodeSDNode>(RHS->getOperand(2))->get(); 1561 1562 if (LR == RR && isa<ConstantSDNode>(LR) && 1563 Op2 == Op1 && MVT::isInteger(LL.getValueType())) { 1564 // (X != 0) | (Y != 0) -> (X|Y != 0) 1565 // (X == 0) & (Y == 0) -> (X|Y == 0) 1566 // (X < 0) | (Y < 0) -> (X|Y < 0) 1567 if (cast<ConstantSDNode>(LR)->getValue() == 0 && 1568 ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || 1569 (Op2 == ISD::SETNE && Opcode == ISD::OR) || 1570 (Op2 == ISD::SETLT && Opcode == ISD::OR))) 1571 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR, 1572 Op2); 1573 1574 if (cast<ConstantSDNode>(LR)->isAllOnesValue()) { 1575 // (X == -1) & (Y == -1) -> (X&Y == -1) 1576 // (X != -1) | (Y != -1) -> (X&Y != -1) 1577 // (X > -1) | (Y > -1) -> (X&Y > -1) 1578 if ((Opcode == ISD::AND && Op2 == ISD::SETEQ) || 1579 (Opcode == ISD::OR && Op2 == ISD::SETNE) || 1580 (Opcode == ISD::OR && Op2 == ISD::SETGT)) 1581 return getSetCC(VT, getNode(ISD::AND, LR.getValueType(), LL, RL), 1582 LR, Op2); 1583 // (X > -1) & (Y > -1) -> (X|Y > -1) 1584 if (Opcode == ISD::AND && Op2 == ISD::SETGT) 1585 return getSetCC(VT, getNode(ISD::OR, LR.getValueType(), LL, RL), 1586 LR, Op2); 1587 } 1588 } 1589 1590 // (X op1 Y) | (Y op2 X) -> (X op1 Y) | (X swapop2 Y) 1591 if (LL == RR && LR == RL) { 1592 Op2 = ISD::getSetCCSwappedOperands(Op2); 1593 goto MatchedBackwards; 1594 } 1595 1596 if (LL == RL && LR == RR) { 1597 MatchedBackwards: 1598 ISD::CondCode Result; 1599 bool isInteger = MVT::isInteger(LL.getValueType()); 1600 if (Opcode == ISD::OR) 1601 Result = ISD::getSetCCOrOperation(Op1, Op2, isInteger); 1602 else 1603 Result = ISD::getSetCCAndOperation(Op1, Op2, isInteger); 1604 1605 if (Result != ISD::SETCC_INVALID) 1606 return getSetCC(LHS->getValueType(0), LL, LR, Result); 1607 } 1608 } 1609 1610 // and/or zext(a), zext(b) -> zext(and/or a, b) 1611 if (N1.getOpcode() == ISD::ZERO_EXTEND && 1612 N2.getOpcode() == ISD::ZERO_EXTEND && 1613 N1.getOperand(0).getValueType() == N2.getOperand(0).getValueType()) 1614 return getNode(ISD::ZERO_EXTEND, VT, 1615 getNode(Opcode, N1.getOperand(0).getValueType(), 1616 N1.getOperand(0), N2.getOperand(0))); 1617 } 1618 break; 1619 case ISD::XOR: 1620 if (!CombinerEnabled) { 1621 if (N1 == N2) return getConstant(0, VT); // xor X, Y -> 0 1622 } 1623 break; 1624 case ISD::ADD: 1625 if (!CombinerEnabled) { 1626 if (N2.getOpcode() == ISD::FNEG) // (A+ (-B) -> A-B 1627 return getNode(ISD::SUB, VT, N1, N2.getOperand(0)); 1628 if (N1.getOpcode() == ISD::FNEG) // ((-A)+B) -> B-A 1629 return getNode(ISD::SUB, VT, N2, N1.getOperand(0)); 1630 if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) && 1631 cast<ConstantSDNode>(N1.getOperand(0))->getValue() == 0) 1632 return getNode(ISD::SUB, VT, N2, N1.getOperand(1)); // (0-A)+B -> B-A 1633 if (N2.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N2.getOperand(0)) && 1634 cast<ConstantSDNode>(N2.getOperand(0))->getValue() == 0) 1635 return getNode(ISD::SUB, VT, N1, N2.getOperand(1)); // A+(0-B) -> A-B 1636 if (N2.getOpcode() == ISD::SUB && N1 == N2.Val->getOperand(1) && 1637 !MVT::isFloatingPoint(N2.getValueType())) 1638 return N2.Val->getOperand(0); // A+(B-A) -> B 1639 } 1640 break; 1641 case ISD::SUB: 1642 if (!CombinerEnabled) { 1643 if (N1.getOpcode() == ISD::ADD) { 1644 if (N1.Val->getOperand(0) == N2 && 1645 !MVT::isFloatingPoint(N2.getValueType())) 1646 return N1.Val->getOperand(1); // (A+B)-A == B 1647 if (N1.Val->getOperand(1) == N2 && 1648 !MVT::isFloatingPoint(N2.getValueType())) 1649 return N1.Val->getOperand(0); // (A+B)-B == A 1650 } 1651 if (N2.getOpcode() == ISD::FNEG) // (A- (-B) -> A+B 1652 return getNode(ISD::ADD, VT, N1, N2.getOperand(0)); 1653 } 1654 break; 1655 case ISD::FP_ROUND_INREG: 1656 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 1657 break; 1658 case ISD::SIGN_EXTEND_INREG: { 1659 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1660 if (EVT == VT) return N1; // Not actually extending 1661 if (!CombinerEnabled) { 1662 // If we are sign extending an extension, use the original source. 1663 if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG || 1664 N1.getOpcode() == ISD::AssertSext) 1665 if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT) 1666 return N1; 1667 1668 // If we are sign extending a sextload, return just the load. 1669 if (N1.getOpcode() == ISD::SEXTLOAD) 1670 if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT) 1671 return N1; 1672 1673 // If we are extending the result of a setcc, and we already know the 1674 // contents of the top bits, eliminate the extension. 1675 if (N1.getOpcode() == ISD::SETCC && 1676 TLI.getSetCCResultContents() == 1677 TargetLowering::ZeroOrNegativeOneSetCCResult) 1678 return N1; 1679 1680 // If we are sign extending the result of an (and X, C) operation, and we 1681 // know the extended bits are zeros already, don't do the extend. 1682 if (N1.getOpcode() == ISD::AND) 1683 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 1684 uint64_t Mask = N1C->getValue(); 1685 unsigned NumBits = MVT::getSizeInBits(EVT); 1686 if ((Mask & (~0ULL << (NumBits-1))) == 0) 1687 return N1; 1688 } 1689 } 1690 break; 1691 } 1692 1693 // FIXME: figure out how to safely handle things like 1694 // int foo(int x) { return 1 << (x & 255); } 1695 // int bar() { return foo(256); } 1696#if 0 1697 case ISD::SHL: 1698 case ISD::SRL: 1699 case ISD::SRA: 1700 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1701 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1) 1702 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1703 else if (N2.getOpcode() == ISD::AND) 1704 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1705 // If the and is only masking out bits that cannot effect the shift, 1706 // eliminate the and. 1707 unsigned NumBits = MVT::getSizeInBits(VT); 1708 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1709 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1710 } 1711 break; 1712#endif 1713 } 1714 1715 // Memoize this node if possible. 1716 SDNode *N; 1717 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END && 1718 VT != MVT::Flag) { 1719 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1720 if (BON) return SDOperand(BON, 0); 1721 1722 BON = N = new SDNode(Opcode, N1, N2); 1723 } else { 1724 N = new SDNode(Opcode, N1, N2); 1725 } 1726 1727 N->setValueTypes(VT); 1728 AllNodes.push_back(N); 1729 return SDOperand(N, 0); 1730} 1731 1732// setAdjCallChain - This method changes the token chain of an 1733// CALLSEQ_START/END node to be the specified operand. 1734void SDNode::setAdjCallChain(SDOperand N) { 1735 assert(N.getValueType() == MVT::Other); 1736 assert((getOpcode() == ISD::CALLSEQ_START || 1737 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); 1738 1739 Operands[0].Val->removeUser(this); 1740 Operands[0] = N; 1741 N.Val->Uses.push_back(this); 1742} 1743 1744 1745 1746SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1747 SDOperand Chain, SDOperand Ptr, 1748 SDOperand SV) { 1749 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1750 if (N) return SDOperand(N, 0); 1751 N = new SDNode(ISD::LOAD, Chain, Ptr, SV); 1752 1753 // Loads have a token chain. 1754 N->setValueTypes(VT, MVT::Other); 1755 AllNodes.push_back(N); 1756 return SDOperand(N, 0); 1757} 1758 1759 1760SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT, 1761 SDOperand Chain, SDOperand Ptr, SDOperand SV, 1762 MVT::ValueType EVT) { 1763 std::vector<SDOperand> Ops; 1764 Ops.reserve(4); 1765 Ops.push_back(Chain); 1766 Ops.push_back(Ptr); 1767 Ops.push_back(SV); 1768 Ops.push_back(getValueType(EVT)); 1769 std::vector<MVT::ValueType> VTs; 1770 VTs.reserve(2); 1771 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain. 1772 return getNode(Opcode, VTs, Ops); 1773} 1774 1775SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1776 SDOperand N1, SDOperand N2, SDOperand N3) { 1777 // Perform various simplifications. 1778 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1779 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1780 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1781 switch (Opcode) { 1782 case ISD::SETCC: { 1783 // Use SimplifySetCC to simplify SETCC's. 1784 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 1785 if (Simp.Val) return Simp; 1786 break; 1787 } 1788 case ISD::SELECT: 1789 if (N1C) 1790 if (N1C->getValue()) 1791 return N2; // select true, X, Y -> X 1792 else 1793 return N3; // select false, X, Y -> Y 1794 1795 if (N2 == N3) return N2; // select C, X, X -> X 1796 1797 if (VT == MVT::i1) { // Boolean SELECT 1798 if (N2C) { 1799 if (N2C->getValue()) // select C, 1, X -> C | X 1800 return getNode(ISD::OR, VT, N1, N3); 1801 else // select C, 0, X -> ~C & X 1802 return getNode(ISD::AND, VT, 1803 getNode(ISD::XOR, N1.getValueType(), N1, 1804 getConstant(1, N1.getValueType())), N3); 1805 } else if (N3C) { 1806 if (N3C->getValue()) // select C, X, 1 -> ~C | X 1807 return getNode(ISD::OR, VT, 1808 getNode(ISD::XOR, N1.getValueType(), N1, 1809 getConstant(1, N1.getValueType())), N2); 1810 else // select C, X, 0 -> C & X 1811 return getNode(ISD::AND, VT, N1, N2); 1812 } 1813 1814 if (N1 == N2) // X ? X : Y --> X ? 1 : Y --> X | Y 1815 return getNode(ISD::OR, VT, N1, N3); 1816 if (N1 == N3) // X ? Y : X --> X ? Y : 0 --> X & Y 1817 return getNode(ISD::AND, VT, N1, N2); 1818 } 1819 if (N1.getOpcode() == ISD::SETCC) { 1820 SDOperand Simp = SimplifySelectCC(N1.getOperand(0), N1.getOperand(1), N2, 1821 N3, cast<CondCodeSDNode>(N1.getOperand(2))->get()); 1822 if (Simp.Val) return Simp; 1823 } 1824 break; 1825 case ISD::BRCOND: 1826 if (N2C) 1827 if (N2C->getValue()) // Unconditional branch 1828 return getNode(ISD::BR, MVT::Other, N1, N3); 1829 else 1830 return N1; // Never-taken branch 1831 break; 1832 } 1833 1834 std::vector<SDOperand> Ops; 1835 Ops.reserve(3); 1836 Ops.push_back(N1); 1837 Ops.push_back(N2); 1838 Ops.push_back(N3); 1839 1840 // Memoize node if it doesn't produce a flag. 1841 SDNode *N; 1842 if (VT != MVT::Flag) { 1843 SDNode *&E = OneResultNodes[std::make_pair(Opcode,std::make_pair(VT, Ops))]; 1844 if (E) return SDOperand(E, 0); 1845 E = N = new SDNode(Opcode, N1, N2, N3); 1846 } else { 1847 N = new SDNode(Opcode, N1, N2, N3); 1848 } 1849 N->setValueTypes(VT); 1850 AllNodes.push_back(N); 1851 return SDOperand(N, 0); 1852} 1853 1854SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1855 SDOperand N1, SDOperand N2, SDOperand N3, 1856 SDOperand N4) { 1857 std::vector<SDOperand> Ops; 1858 Ops.reserve(4); 1859 Ops.push_back(N1); 1860 Ops.push_back(N2); 1861 Ops.push_back(N3); 1862 Ops.push_back(N4); 1863 return getNode(Opcode, VT, Ops); 1864} 1865 1866SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1867 SDOperand N1, SDOperand N2, SDOperand N3, 1868 SDOperand N4, SDOperand N5) { 1869 std::vector<SDOperand> Ops; 1870 Ops.reserve(5); 1871 Ops.push_back(N1); 1872 Ops.push_back(N2); 1873 Ops.push_back(N3); 1874 Ops.push_back(N4); 1875 Ops.push_back(N5); 1876 return getNode(Opcode, VT, Ops); 1877} 1878 1879 1880SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { 1881 assert((!V || isa<PointerType>(V->getType())) && 1882 "SrcValue is not a pointer?"); 1883 SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; 1884 if (N) return SDOperand(N, 0); 1885 1886 N = new SrcValueSDNode(V, Offset); 1887 AllNodes.push_back(N); 1888 return SDOperand(N, 0); 1889} 1890 1891SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1892 std::vector<SDOperand> &Ops) { 1893 switch (Ops.size()) { 1894 case 0: return getNode(Opcode, VT); 1895 case 1: return getNode(Opcode, VT, Ops[0]); 1896 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 1897 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 1898 default: break; 1899 } 1900 1901 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val); 1902 switch (Opcode) { 1903 default: break; 1904 case ISD::BRCONDTWOWAY: 1905 if (N1C) 1906 if (N1C->getValue()) // Unconditional branch to true dest. 1907 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]); 1908 else // Unconditional branch to false dest. 1909 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]); 1910 break; 1911 case ISD::BRTWOWAY_CC: 1912 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!"); 1913 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1914 "LHS and RHS of comparison must have same type!"); 1915 break; 1916 case ISD::TRUNCSTORE: { 1917 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1918 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT(); 1919#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1920 // If this is a truncating store of a constant, convert to the desired type 1921 // and store it instead. 1922 if (isa<Constant>(Ops[0])) { 1923 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1924 if (isa<Constant>(Op)) 1925 N1 = Op; 1926 } 1927 // Also for ConstantFP? 1928#endif 1929 if (Ops[0].getValueType() == EVT) // Normal store? 1930 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]); 1931 assert(Ops[1].getValueType() > EVT && "Not a truncation?"); 1932 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) && 1933 "Can't do FP-INT conversion!"); 1934 break; 1935 } 1936 case ISD::SELECT_CC: { 1937 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1938 assert(Ops[0].getValueType() == Ops[1].getValueType() && 1939 "LHS and RHS of condition must have same type!"); 1940 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1941 "True and False arms of SelectCC must have same type!"); 1942 assert(Ops[2].getValueType() == VT && 1943 "select_cc node must be of same type as true and false value!"); 1944 SDOperand Simp = SimplifySelectCC(Ops[0], Ops[1], Ops[2], Ops[3], 1945 cast<CondCodeSDNode>(Ops[4])->get()); 1946 if (Simp.Val) return Simp; 1947 break; 1948 } 1949 case ISD::BR_CC: { 1950 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1951 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1952 "LHS/RHS of comparison should match types!"); 1953 // Use SimplifySetCC to simplify SETCC's. 1954 SDOperand Simp = SimplifySetCC(MVT::i1, Ops[2], Ops[3], 1955 cast<CondCodeSDNode>(Ops[1])->get()); 1956 if (Simp.Val) { 1957 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Simp)) { 1958 if (C->getValue() & 1) // Unconditional branch 1959 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[4]); 1960 else 1961 return Ops[0]; // Unconditional Fall through 1962 } else if (Simp.Val->getOpcode() == ISD::SETCC) { 1963 Ops[2] = Simp.getOperand(0); 1964 Ops[3] = Simp.getOperand(1); 1965 Ops[1] = Simp.getOperand(2); 1966 } 1967 } 1968 break; 1969 } 1970 } 1971 1972 // Memoize nodes. 1973 SDNode *N; 1974 if (VT != MVT::Flag) { 1975 SDNode *&E = 1976 OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1977 if (E) return SDOperand(E, 0); 1978 E = N = new SDNode(Opcode, Ops); 1979 } else { 1980 N = new SDNode(Opcode, Ops); 1981 } 1982 N->setValueTypes(VT); 1983 AllNodes.push_back(N); 1984 return SDOperand(N, 0); 1985} 1986 1987SDOperand SelectionDAG::getNode(unsigned Opcode, 1988 std::vector<MVT::ValueType> &ResultTys, 1989 std::vector<SDOperand> &Ops) { 1990 if (ResultTys.size() == 1) 1991 return getNode(Opcode, ResultTys[0], Ops); 1992 1993 switch (Opcode) { 1994 case ISD::EXTLOAD: 1995 case ISD::SEXTLOAD: 1996 case ISD::ZEXTLOAD: { 1997 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT(); 1998 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!"); 1999 // If they are asking for an extending load from/to the same thing, return a 2000 // normal load. 2001 if (ResultTys[0] == EVT) 2002 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]); 2003 assert(EVT < ResultTys[0] && 2004 "Should only be an extending load, not truncating!"); 2005 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) && 2006 "Cannot sign/zero extend a FP load!"); 2007 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) && 2008 "Cannot convert from FP to Int or Int -> FP!"); 2009 break; 2010 } 2011 2012 // FIXME: figure out how to safely handle things like 2013 // int foo(int x) { return 1 << (x & 255); } 2014 // int bar() { return foo(256); } 2015#if 0 2016 case ISD::SRA_PARTS: 2017 case ISD::SRL_PARTS: 2018 case ISD::SHL_PARTS: 2019 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 2020 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 2021 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 2022 else if (N3.getOpcode() == ISD::AND) 2023 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 2024 // If the and is only masking out bits that cannot effect the shift, 2025 // eliminate the and. 2026 unsigned NumBits = MVT::getSizeInBits(VT)*2; 2027 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 2028 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 2029 } 2030 break; 2031#endif 2032 } 2033 2034 // Memoize the node unless it returns a flag. 2035 SDNode *N; 2036 if (ResultTys.back() != MVT::Flag) { 2037 SDNode *&E = 2038 ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, Ops))]; 2039 if (E) return SDOperand(E, 0); 2040 E = N = new SDNode(Opcode, Ops); 2041 } else { 2042 N = new SDNode(Opcode, Ops); 2043 } 2044 N->setValueTypes(ResultTys); 2045 AllNodes.push_back(N); 2046 return SDOperand(N, 0); 2047} 2048 2049 2050/// SelectNodeTo - These are used for target selectors to *mutate* the 2051/// specified node to have the specified return type, Target opcode, and 2052/// operands. Note that target opcodes are stored as 2053/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field. 2054void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2055 MVT::ValueType VT) { 2056 RemoveNodeFromCSEMaps(N); 2057 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2058 N->setValueTypes(VT); 2059} 2060void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2061 MVT::ValueType VT, SDOperand Op1) { 2062 RemoveNodeFromCSEMaps(N); 2063 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2064 N->setValueTypes(VT); 2065 N->setOperands(Op1); 2066} 2067void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2068 MVT::ValueType VT, SDOperand Op1, 2069 SDOperand Op2) { 2070 RemoveNodeFromCSEMaps(N); 2071 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2072 N->setValueTypes(VT); 2073 N->setOperands(Op1, Op2); 2074} 2075void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2076 MVT::ValueType VT1, MVT::ValueType VT2, 2077 SDOperand Op1, SDOperand Op2) { 2078 RemoveNodeFromCSEMaps(N); 2079 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2080 N->setValueTypes(VT1, VT2); 2081 N->setOperands(Op1, Op2); 2082} 2083void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2084 MVT::ValueType VT, SDOperand Op1, 2085 SDOperand Op2, SDOperand Op3) { 2086 RemoveNodeFromCSEMaps(N); 2087 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2088 N->setValueTypes(VT); 2089 N->setOperands(Op1, Op2, Op3); 2090} 2091void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2092 MVT::ValueType VT1, MVT::ValueType VT2, 2093 SDOperand Op1, SDOperand Op2, SDOperand Op3) { 2094 RemoveNodeFromCSEMaps(N); 2095 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2096 N->setValueTypes(VT1, VT2); 2097 N->setOperands(Op1, Op2, Op3); 2098} 2099 2100void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2101 MVT::ValueType VT, SDOperand Op1, 2102 SDOperand Op2, SDOperand Op3, SDOperand Op4) { 2103 RemoveNodeFromCSEMaps(N); 2104 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2105 N->setValueTypes(VT); 2106 N->setOperands(Op1, Op2, Op3, Op4); 2107} 2108void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 2109 MVT::ValueType VT, SDOperand Op1, 2110 SDOperand Op2, SDOperand Op3, SDOperand Op4, 2111 SDOperand Op5) { 2112 RemoveNodeFromCSEMaps(N); 2113 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 2114 N->setValueTypes(VT); 2115 N->setOperands(Op1, Op2, Op3, Op4, Op5); 2116} 2117 2118/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2119/// This can cause recursive merging of nodes in the DAG. 2120/// 2121/// This version assumes From/To have a single result value. 2122/// 2123void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand ToN, 2124 std::vector<SDNode*> *Deleted) { 2125 SDNode *From = FromN.Val, *To = ToN.Val; 2126 assert(From->getNumValues() == 1 && To->getNumValues() == 1 && 2127 "Cannot replace with this method!"); 2128 assert(From != To && "Cannot replace uses of with self"); 2129 2130 while (!From->use_empty()) { 2131 // Process users until they are all gone. 2132 SDNode *U = *From->use_begin(); 2133 2134 // This node is about to morph, remove its old self from the CSE maps. 2135 RemoveNodeFromCSEMaps(U); 2136 2137 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2138 if (U->getOperand(i).Val == From) { 2139 From->removeUser(U); 2140 U->Operands[i].Val = To; 2141 To->addUser(U); 2142 } 2143 2144 // Now that we have modified U, add it back to the CSE maps. If it already 2145 // exists there, recursively merge the results together. 2146 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2147 ReplaceAllUsesWith(U, Existing, Deleted); 2148 // U is now dead. 2149 if (Deleted) Deleted->push_back(U); 2150 DeleteNodeNotInCSEMaps(U); 2151 } 2152 } 2153} 2154 2155/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2156/// This can cause recursive merging of nodes in the DAG. 2157/// 2158/// This version assumes From/To have matching types and numbers of result 2159/// values. 2160/// 2161void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 2162 std::vector<SDNode*> *Deleted) { 2163 assert(From != To && "Cannot replace uses of with self"); 2164 assert(From->getNumValues() == To->getNumValues() && 2165 "Cannot use this version of ReplaceAllUsesWith!"); 2166 if (From->getNumValues() == 1) { // If possible, use the faster version. 2167 ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), Deleted); 2168 return; 2169 } 2170 2171 while (!From->use_empty()) { 2172 // Process users until they are all gone. 2173 SDNode *U = *From->use_begin(); 2174 2175 // This node is about to morph, remove its old self from the CSE maps. 2176 RemoveNodeFromCSEMaps(U); 2177 2178 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2179 if (U->getOperand(i).Val == From) { 2180 From->removeUser(U); 2181 U->Operands[i].Val = To; 2182 To->addUser(U); 2183 } 2184 2185 // Now that we have modified U, add it back to the CSE maps. If it already 2186 // exists there, recursively merge the results together. 2187 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2188 ReplaceAllUsesWith(U, Existing, Deleted); 2189 // U is now dead. 2190 if (Deleted) Deleted->push_back(U); 2191 DeleteNodeNotInCSEMaps(U); 2192 } 2193 } 2194} 2195 2196/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 2197/// This can cause recursive merging of nodes in the DAG. 2198/// 2199/// This version can replace From with any result values. To must match the 2200/// number and types of values returned by From. 2201void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 2202 const std::vector<SDOperand> &To, 2203 std::vector<SDNode*> *Deleted) { 2204 assert(From->getNumValues() == To.size() && 2205 "Incorrect number of values to replace with!"); 2206 if (To.size() == 1 && To[0].Val->getNumValues() == 1) { 2207 // Degenerate case handled above. 2208 ReplaceAllUsesWith(SDOperand(From, 0), To[0], Deleted); 2209 return; 2210 } 2211 2212 while (!From->use_empty()) { 2213 // Process users until they are all gone. 2214 SDNode *U = *From->use_begin(); 2215 2216 // This node is about to morph, remove its old self from the CSE maps. 2217 RemoveNodeFromCSEMaps(U); 2218 2219 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 2220 if (U->getOperand(i).Val == From) { 2221 const SDOperand &ToOp = To[U->getOperand(i).ResNo]; 2222 From->removeUser(U); 2223 U->Operands[i] = ToOp; 2224 ToOp.Val->addUser(U); 2225 } 2226 2227 // Now that we have modified U, add it back to the CSE maps. If it already 2228 // exists there, recursively merge the results together. 2229 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 2230 ReplaceAllUsesWith(U, Existing, Deleted); 2231 // U is now dead. 2232 if (Deleted) Deleted->push_back(U); 2233 DeleteNodeNotInCSEMaps(U); 2234 } 2235 } 2236} 2237 2238 2239//===----------------------------------------------------------------------===// 2240// SDNode Class 2241//===----------------------------------------------------------------------===// 2242 2243/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 2244/// indicated value. This method ignores uses of other values defined by this 2245/// operation. 2246bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 2247 assert(Value < getNumValues() && "Bad value!"); 2248 2249 // If there is only one value, this is easy. 2250 if (getNumValues() == 1) 2251 return use_size() == NUses; 2252 if (Uses.size() < NUses) return false; 2253 2254 SDOperand TheValue(this, Value); 2255 2256 std::set<SDNode*> UsersHandled; 2257 2258 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 2259 UI != E; ++UI) { 2260 SDNode *User = *UI; 2261 if (User->getNumOperands() == 1 || 2262 UsersHandled.insert(User).second) // First time we've seen this? 2263 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 2264 if (User->getOperand(i) == TheValue) { 2265 if (NUses == 0) 2266 return false; // too many uses 2267 --NUses; 2268 } 2269 } 2270 2271 // Found exactly the right number of uses? 2272 return NUses == 0; 2273} 2274 2275 2276const char *SDNode::getOperationName(const SelectionDAG *G) const { 2277 switch (getOpcode()) { 2278 default: 2279 if (getOpcode() < ISD::BUILTIN_OP_END) 2280 return "<<Unknown DAG Node>>"; 2281 else { 2282 if (G) 2283 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 2284 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes()) 2285 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END); 2286 return "<<Unknown Target Node>>"; 2287 } 2288 2289 case ISD::PCMARKER: return "PCMarker"; 2290 case ISD::SRCVALUE: return "SrcValue"; 2291 case ISD::VALUETYPE: return "ValueType"; 2292 case ISD::EntryToken: return "EntryToken"; 2293 case ISD::TokenFactor: return "TokenFactor"; 2294 case ISD::AssertSext: return "AssertSext"; 2295 case ISD::AssertZext: return "AssertZext"; 2296 case ISD::Constant: return "Constant"; 2297 case ISD::TargetConstant: return "TargetConstant"; 2298 case ISD::ConstantFP: return "ConstantFP"; 2299 case ISD::GlobalAddress: return "GlobalAddress"; 2300 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 2301 case ISD::FrameIndex: return "FrameIndex"; 2302 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 2303 case ISD::BasicBlock: return "BasicBlock"; 2304 case ISD::Register: return "Register"; 2305 case ISD::ExternalSymbol: return "ExternalSymbol"; 2306 case ISD::ConstantPool: return "ConstantPool"; 2307 case ISD::TargetConstantPool: return "TargetConstantPool"; 2308 case ISD::CopyToReg: return "CopyToReg"; 2309 case ISD::CopyFromReg: return "CopyFromReg"; 2310 case ISD::ImplicitDef: return "ImplicitDef"; 2311 case ISD::UNDEF: return "undef"; 2312 2313 // Unary operators 2314 case ISD::FABS: return "fabs"; 2315 case ISD::FNEG: return "fneg"; 2316 case ISD::FSQRT: return "fsqrt"; 2317 case ISD::FSIN: return "fsin"; 2318 case ISD::FCOS: return "fcos"; 2319 2320 // Binary operators 2321 case ISD::ADD: return "add"; 2322 case ISD::SUB: return "sub"; 2323 case ISD::MUL: return "mul"; 2324 case ISD::MULHU: return "mulhu"; 2325 case ISD::MULHS: return "mulhs"; 2326 case ISD::SDIV: return "sdiv"; 2327 case ISD::UDIV: return "udiv"; 2328 case ISD::SREM: return "srem"; 2329 case ISD::UREM: return "urem"; 2330 case ISD::AND: return "and"; 2331 case ISD::OR: return "or"; 2332 case ISD::XOR: return "xor"; 2333 case ISD::SHL: return "shl"; 2334 case ISD::SRA: return "sra"; 2335 case ISD::SRL: return "srl"; 2336 2337 case ISD::SETCC: return "setcc"; 2338 case ISD::SELECT: return "select"; 2339 case ISD::SELECT_CC: return "select_cc"; 2340 case ISD::ADD_PARTS: return "add_parts"; 2341 case ISD::SUB_PARTS: return "sub_parts"; 2342 case ISD::SHL_PARTS: return "shl_parts"; 2343 case ISD::SRA_PARTS: return "sra_parts"; 2344 case ISD::SRL_PARTS: return "srl_parts"; 2345 2346 // Conversion operators. 2347 case ISD::SIGN_EXTEND: return "sign_extend"; 2348 case ISD::ZERO_EXTEND: return "zero_extend"; 2349 case ISD::ANY_EXTEND: return "any_extend"; 2350 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 2351 case ISD::TRUNCATE: return "truncate"; 2352 case ISD::FP_ROUND: return "fp_round"; 2353 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 2354 case ISD::FP_EXTEND: return "fp_extend"; 2355 2356 case ISD::SINT_TO_FP: return "sint_to_fp"; 2357 case ISD::UINT_TO_FP: return "uint_to_fp"; 2358 case ISD::FP_TO_SINT: return "fp_to_sint"; 2359 case ISD::FP_TO_UINT: return "fp_to_uint"; 2360 2361 // Control flow instructions 2362 case ISD::BR: return "br"; 2363 case ISD::BRCOND: return "brcond"; 2364 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 2365 case ISD::BR_CC: return "br_cc"; 2366 case ISD::BRTWOWAY_CC: return "brtwoway_cc"; 2367 case ISD::RET: return "ret"; 2368 case ISD::CALL: return "call"; 2369 case ISD::TAILCALL:return "tailcall"; 2370 case ISD::CALLSEQ_START: return "callseq_start"; 2371 case ISD::CALLSEQ_END: return "callseq_end"; 2372 2373 // Other operators 2374 case ISD::LOAD: return "load"; 2375 case ISD::STORE: return "store"; 2376 case ISD::EXTLOAD: return "extload"; 2377 case ISD::SEXTLOAD: return "sextload"; 2378 case ISD::ZEXTLOAD: return "zextload"; 2379 case ISD::TRUNCSTORE: return "truncstore"; 2380 2381 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 2382 case ISD::EXTRACT_ELEMENT: return "extract_element"; 2383 case ISD::BUILD_PAIR: return "build_pair"; 2384 case ISD::MEMSET: return "memset"; 2385 case ISD::MEMCPY: return "memcpy"; 2386 case ISD::MEMMOVE: return "memmove"; 2387 2388 // Bit counting 2389 case ISD::CTPOP: return "ctpop"; 2390 case ISD::CTTZ: return "cttz"; 2391 case ISD::CTLZ: return "ctlz"; 2392 2393 // IO Intrinsics 2394 case ISD::READPORT: return "readport"; 2395 case ISD::WRITEPORT: return "writeport"; 2396 case ISD::READIO: return "readio"; 2397 case ISD::WRITEIO: return "writeio"; 2398 2399 case ISD::CONDCODE: 2400 switch (cast<CondCodeSDNode>(this)->get()) { 2401 default: assert(0 && "Unknown setcc condition!"); 2402 case ISD::SETOEQ: return "setoeq"; 2403 case ISD::SETOGT: return "setogt"; 2404 case ISD::SETOGE: return "setoge"; 2405 case ISD::SETOLT: return "setolt"; 2406 case ISD::SETOLE: return "setole"; 2407 case ISD::SETONE: return "setone"; 2408 2409 case ISD::SETO: return "seto"; 2410 case ISD::SETUO: return "setuo"; 2411 case ISD::SETUEQ: return "setue"; 2412 case ISD::SETUGT: return "setugt"; 2413 case ISD::SETUGE: return "setuge"; 2414 case ISD::SETULT: return "setult"; 2415 case ISD::SETULE: return "setule"; 2416 case ISD::SETUNE: return "setune"; 2417 2418 case ISD::SETEQ: return "seteq"; 2419 case ISD::SETGT: return "setgt"; 2420 case ISD::SETGE: return "setge"; 2421 case ISD::SETLT: return "setlt"; 2422 case ISD::SETLE: return "setle"; 2423 case ISD::SETNE: return "setne"; 2424 } 2425 } 2426} 2427 2428void SDNode::dump() const { dump(0); } 2429void SDNode::dump(const SelectionDAG *G) const { 2430 std::cerr << (void*)this << ": "; 2431 2432 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 2433 if (i) std::cerr << ","; 2434 if (getValueType(i) == MVT::Other) 2435 std::cerr << "ch"; 2436 else 2437 std::cerr << MVT::getValueTypeString(getValueType(i)); 2438 } 2439 std::cerr << " = " << getOperationName(G); 2440 2441 std::cerr << " "; 2442 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 2443 if (i) std::cerr << ", "; 2444 std::cerr << (void*)getOperand(i).Val; 2445 if (unsigned RN = getOperand(i).ResNo) 2446 std::cerr << ":" << RN; 2447 } 2448 2449 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 2450 std::cerr << "<" << CSDN->getValue() << ">"; 2451 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 2452 std::cerr << "<" << CSDN->getValue() << ">"; 2453 } else if (const GlobalAddressSDNode *GADN = 2454 dyn_cast<GlobalAddressSDNode>(this)) { 2455 std::cerr << "<"; 2456 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 2457 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 2458 std::cerr << "<" << FIDN->getIndex() << ">"; 2459 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 2460 std::cerr << "<" << *CP->get() << ">"; 2461 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 2462 std::cerr << "<"; 2463 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 2464 if (LBB) 2465 std::cerr << LBB->getName() << " "; 2466 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 2467 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 2468 if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) { 2469 std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg()); 2470 } else { 2471 std::cerr << " #" << R->getReg(); 2472 } 2473 } else if (const ExternalSymbolSDNode *ES = 2474 dyn_cast<ExternalSymbolSDNode>(this)) { 2475 std::cerr << "'" << ES->getSymbol() << "'"; 2476 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 2477 if (M->getValue()) 2478 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">"; 2479 else 2480 std::cerr << "<null:" << M->getOffset() << ">"; 2481 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 2482 std::cerr << ":" << getValueTypeString(N->getVT()); 2483 } 2484} 2485 2486static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) { 2487 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 2488 if (N->getOperand(i).Val->hasOneUse()) 2489 DumpNodes(N->getOperand(i).Val, indent+2, G); 2490 else 2491 std::cerr << "\n" << std::string(indent+2, ' ') 2492 << (void*)N->getOperand(i).Val << ": <multiple use>"; 2493 2494 2495 std::cerr << "\n" << std::string(indent, ' '); 2496 N->dump(G); 2497} 2498 2499void SelectionDAG::dump() const { 2500 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 2501 std::vector<SDNode*> Nodes(AllNodes); 2502 std::sort(Nodes.begin(), Nodes.end()); 2503 2504 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 2505 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 2506 DumpNodes(Nodes[i], 2, this); 2507 } 2508 2509 DumpNodes(getRoot().Val, 2, this); 2510 2511 std::cerr << "\n\n"; 2512} 2513 2514