SelectionDAG.cpp revision 5eb0cecbc5dd370e33d4e0ab1abee7ce8597ca9c
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetInstrInfo.h" 31#include "llvm/Target/TargetMachine.h" 32#include "llvm/Support/MathExtras.h" 33#include "llvm/Support/raw_ostream.h" 34#include "llvm/ADT/SetVector.h" 35#include "llvm/ADT/SmallPtrSet.h" 36#include "llvm/ADT/SmallSet.h" 37#include "llvm/ADT/SmallVector.h" 38#include "llvm/ADT/StringExtras.h" 39#include <algorithm> 40#include <cmath> 41using namespace llvm; 42 43/// makeVTList - Return an instance of the SDVTList struct initialized with the 44/// specified members. 45static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 46 SDVTList Res = {VTs, NumVTs}; 47 return Res; 48} 49 50static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 51 switch (VT.getSimpleVT()) { 52 default: assert(0 && "Unknown FP format"); 53 case MVT::f32: return &APFloat::IEEEsingle; 54 case MVT::f64: return &APFloat::IEEEdouble; 55 case MVT::f80: return &APFloat::x87DoubleExtended; 56 case MVT::f128: return &APFloat::IEEEquad; 57 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 58 } 59} 60 61SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 62 63//===----------------------------------------------------------------------===// 64// ConstantFPSDNode Class 65//===----------------------------------------------------------------------===// 66 67/// isExactlyValue - We don't rely on operator== working on double values, as 68/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 69/// As such, this method can be used to do an exact bit-for-bit comparison of 70/// two floating point values. 71bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 72 return getValueAPF().bitwiseIsEqual(V); 73} 74 75bool ConstantFPSDNode::isValueValidForType(MVT VT, 76 const APFloat& Val) { 77 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 78 79 // PPC long double cannot be converted to any other type. 80 if (VT == MVT::ppcf128 || 81 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 82 return false; 83 84 // convert modifies in place, so make a copy. 85 APFloat Val2 = APFloat(Val); 86 return Val2.convert(*MVTToAPFloatSemantics(VT), 87 APFloat::rmNearestTiesToEven) == APFloat::opOK; 88} 89 90//===----------------------------------------------------------------------===// 91// ISD Namespace 92//===----------------------------------------------------------------------===// 93 94/// isBuildVectorAllOnes - Return true if the specified node is a 95/// BUILD_VECTOR where all of the elements are ~0 or undef. 96bool ISD::isBuildVectorAllOnes(const SDNode *N) { 97 // Look through a bit convert. 98 if (N->getOpcode() == ISD::BIT_CONVERT) 99 N = N->getOperand(0).getNode(); 100 101 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 102 103 unsigned i = 0, e = N->getNumOperands(); 104 105 // Skip over all of the undef values. 106 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 107 ++i; 108 109 // Do not accept an all-undef vector. 110 if (i == e) return false; 111 112 // Do not accept build_vectors that aren't all constants or which have non-~0 113 // elements. 114 SDValue NotZero = N->getOperand(i); 115 if (isa<ConstantSDNode>(NotZero)) { 116 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 117 return false; 118 } else if (isa<ConstantFPSDNode>(NotZero)) { 119 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 120 convertToAPInt().isAllOnesValue()) 121 return false; 122 } else 123 return false; 124 125 // Okay, we have at least one ~0 value, check to see if the rest match or are 126 // undefs. 127 for (++i; i != e; ++i) 128 if (N->getOperand(i) != NotZero && 129 N->getOperand(i).getOpcode() != ISD::UNDEF) 130 return false; 131 return true; 132} 133 134 135/// isBuildVectorAllZeros - Return true if the specified node is a 136/// BUILD_VECTOR where all of the elements are 0 or undef. 137bool ISD::isBuildVectorAllZeros(const SDNode *N) { 138 // Look through a bit convert. 139 if (N->getOpcode() == ISD::BIT_CONVERT) 140 N = N->getOperand(0).getNode(); 141 142 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 143 144 unsigned i = 0, e = N->getNumOperands(); 145 146 // Skip over all of the undef values. 147 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 148 ++i; 149 150 // Do not accept an all-undef vector. 151 if (i == e) return false; 152 153 // Do not accept build_vectors that aren't all constants or which have non-~0 154 // elements. 155 SDValue Zero = N->getOperand(i); 156 if (isa<ConstantSDNode>(Zero)) { 157 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 158 return false; 159 } else if (isa<ConstantFPSDNode>(Zero)) { 160 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 161 return false; 162 } else 163 return false; 164 165 // Okay, we have at least one ~0 value, check to see if the rest match or are 166 // undefs. 167 for (++i; i != e; ++i) 168 if (N->getOperand(i) != Zero && 169 N->getOperand(i).getOpcode() != ISD::UNDEF) 170 return false; 171 return true; 172} 173 174/// isScalarToVector - Return true if the specified node is a 175/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 176/// element is not an undef. 177bool ISD::isScalarToVector(const SDNode *N) { 178 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 179 return true; 180 181 if (N->getOpcode() != ISD::BUILD_VECTOR) 182 return false; 183 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 184 return false; 185 unsigned NumElems = N->getNumOperands(); 186 for (unsigned i = 1; i < NumElems; ++i) { 187 SDValue V = N->getOperand(i); 188 if (V.getOpcode() != ISD::UNDEF) 189 return false; 190 } 191 return true; 192} 193 194 195/// isDebugLabel - Return true if the specified node represents a debug 196/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 197bool ISD::isDebugLabel(const SDNode *N) { 198 SDValue Zero; 199 if (N->getOpcode() == ISD::DBG_LABEL) 200 return true; 201 if (N->isMachineOpcode() && 202 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 203 return true; 204 return false; 205} 206 207/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 208/// when given the operation for (X op Y). 209ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 210 // To perform this operation, we just need to swap the L and G bits of the 211 // operation. 212 unsigned OldL = (Operation >> 2) & 1; 213 unsigned OldG = (Operation >> 1) & 1; 214 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 215 (OldL << 1) | // New G bit 216 (OldG << 2)); // New L bit. 217} 218 219/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 220/// 'op' is a valid SetCC operation. 221ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 222 unsigned Operation = Op; 223 if (isInteger) 224 Operation ^= 7; // Flip L, G, E bits, but not U. 225 else 226 Operation ^= 15; // Flip all of the condition bits. 227 if (Operation > ISD::SETTRUE2) 228 Operation &= ~8; // Don't let N and U bits get set. 229 return ISD::CondCode(Operation); 230} 231 232 233/// isSignedOp - For an integer comparison, return 1 if the comparison is a 234/// signed operation and 2 if the result is an unsigned comparison. Return zero 235/// if the operation does not depend on the sign of the input (setne and seteq). 236static int isSignedOp(ISD::CondCode Opcode) { 237 switch (Opcode) { 238 default: assert(0 && "Illegal integer setcc operation!"); 239 case ISD::SETEQ: 240 case ISD::SETNE: return 0; 241 case ISD::SETLT: 242 case ISD::SETLE: 243 case ISD::SETGT: 244 case ISD::SETGE: return 1; 245 case ISD::SETULT: 246 case ISD::SETULE: 247 case ISD::SETUGT: 248 case ISD::SETUGE: return 2; 249 } 250} 251 252/// getSetCCOrOperation - Return the result of a logical OR between different 253/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 254/// returns SETCC_INVALID if it is not possible to represent the resultant 255/// comparison. 256ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 257 bool isInteger) { 258 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 259 // Cannot fold a signed integer setcc with an unsigned integer setcc. 260 return ISD::SETCC_INVALID; 261 262 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 263 264 // If the N and U bits get set then the resultant comparison DOES suddenly 265 // care about orderedness, and is true when ordered. 266 if (Op > ISD::SETTRUE2) 267 Op &= ~16; // Clear the U bit if the N bit is set. 268 269 // Canonicalize illegal integer setcc's. 270 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 271 Op = ISD::SETNE; 272 273 return ISD::CondCode(Op); 274} 275 276/// getSetCCAndOperation - Return the result of a logical AND between different 277/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 278/// function returns zero if it is not possible to represent the resultant 279/// comparison. 280ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 281 bool isInteger) { 282 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 283 // Cannot fold a signed setcc with an unsigned setcc. 284 return ISD::SETCC_INVALID; 285 286 // Combine all of the condition bits. 287 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 288 289 // Canonicalize illegal integer setcc's. 290 if (isInteger) { 291 switch (Result) { 292 default: break; 293 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 294 case ISD::SETOEQ: // SETEQ & SETU[LG]E 295 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 296 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 297 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 298 } 299 } 300 301 return Result; 302} 303 304const TargetMachine &SelectionDAG::getTarget() const { 305 return MF->getTarget(); 306} 307 308//===----------------------------------------------------------------------===// 309// SDNode Profile Support 310//===----------------------------------------------------------------------===// 311 312/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 313/// 314static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 315 ID.AddInteger(OpC); 316} 317 318/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 319/// solely with their pointer. 320static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 321 ID.AddPointer(VTList.VTs); 322} 323 324/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 325/// 326static void AddNodeIDOperands(FoldingSetNodeID &ID, 327 const SDValue *Ops, unsigned NumOps) { 328 for (; NumOps; --NumOps, ++Ops) { 329 ID.AddPointer(Ops->getNode()); 330 ID.AddInteger(Ops->getResNo()); 331 } 332} 333 334/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 335/// 336static void AddNodeIDOperands(FoldingSetNodeID &ID, 337 const SDUse *Ops, unsigned NumOps) { 338 for (; NumOps; --NumOps, ++Ops) { 339 ID.AddPointer(Ops->getVal()); 340 ID.AddInteger(Ops->getSDValue().getResNo()); 341 } 342} 343 344static void AddNodeIDNode(FoldingSetNodeID &ID, 345 unsigned short OpC, SDVTList VTList, 346 const SDValue *OpList, unsigned N) { 347 AddNodeIDOpcode(ID, OpC); 348 AddNodeIDValueTypes(ID, VTList); 349 AddNodeIDOperands(ID, OpList, N); 350} 351 352 353/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 354/// data. 355static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 356 AddNodeIDOpcode(ID, N->getOpcode()); 357 // Add the return value info. 358 AddNodeIDValueTypes(ID, N->getVTList()); 359 // Add the operand info. 360 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 361 362 // Handle SDNode leafs with special info. 363 switch (N->getOpcode()) { 364 default: break; // Normal nodes don't need extra info. 365 case ISD::ARG_FLAGS: 366 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 367 break; 368 case ISD::TargetConstant: 369 case ISD::Constant: 370 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 371 break; 372 case ISD::TargetConstantFP: 373 case ISD::ConstantFP: { 374 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 375 break; 376 } 377 case ISD::TargetGlobalAddress: 378 case ISD::GlobalAddress: 379 case ISD::TargetGlobalTLSAddress: 380 case ISD::GlobalTLSAddress: { 381 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 382 ID.AddPointer(GA->getGlobal()); 383 ID.AddInteger(GA->getOffset()); 384 break; 385 } 386 case ISD::BasicBlock: 387 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 388 break; 389 case ISD::Register: 390 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 391 break; 392 case ISD::DBG_STOPPOINT: { 393 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 394 ID.AddInteger(DSP->getLine()); 395 ID.AddInteger(DSP->getColumn()); 396 ID.AddPointer(DSP->getCompileUnit()); 397 break; 398 } 399 case ISD::SRCVALUE: 400 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 401 break; 402 case ISD::MEMOPERAND: { 403 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 404 MO.Profile(ID); 405 break; 406 } 407 case ISD::FrameIndex: 408 case ISD::TargetFrameIndex: 409 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 410 break; 411 case ISD::JumpTable: 412 case ISD::TargetJumpTable: 413 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 414 break; 415 case ISD::ConstantPool: 416 case ISD::TargetConstantPool: { 417 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 418 ID.AddInteger(CP->getAlignment()); 419 ID.AddInteger(CP->getOffset()); 420 if (CP->isMachineConstantPoolEntry()) 421 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 422 else 423 ID.AddPointer(CP->getConstVal()); 424 break; 425 } 426 case ISD::CALL: { 427 const CallSDNode *Call = cast<CallSDNode>(N); 428 ID.AddInteger(Call->getCallingConv()); 429 ID.AddInteger(Call->isVarArg()); 430 break; 431 } 432 case ISD::LOAD: { 433 const LoadSDNode *LD = cast<LoadSDNode>(N); 434 ID.AddInteger(LD->getAddressingMode()); 435 ID.AddInteger(LD->getExtensionType()); 436 ID.AddInteger(LD->getMemoryVT().getRawBits()); 437 ID.AddInteger(LD->getRawFlags()); 438 break; 439 } 440 case ISD::STORE: { 441 const StoreSDNode *ST = cast<StoreSDNode>(N); 442 ID.AddInteger(ST->getAddressingMode()); 443 ID.AddInteger(ST->isTruncatingStore()); 444 ID.AddInteger(ST->getMemoryVT().getRawBits()); 445 ID.AddInteger(ST->getRawFlags()); 446 break; 447 } 448 case ISD::ATOMIC_CMP_SWAP_8: 449 case ISD::ATOMIC_SWAP_8: 450 case ISD::ATOMIC_LOAD_ADD_8: 451 case ISD::ATOMIC_LOAD_SUB_8: 452 case ISD::ATOMIC_LOAD_AND_8: 453 case ISD::ATOMIC_LOAD_OR_8: 454 case ISD::ATOMIC_LOAD_XOR_8: 455 case ISD::ATOMIC_LOAD_NAND_8: 456 case ISD::ATOMIC_LOAD_MIN_8: 457 case ISD::ATOMIC_LOAD_MAX_8: 458 case ISD::ATOMIC_LOAD_UMIN_8: 459 case ISD::ATOMIC_LOAD_UMAX_8: 460 case ISD::ATOMIC_CMP_SWAP_16: 461 case ISD::ATOMIC_SWAP_16: 462 case ISD::ATOMIC_LOAD_ADD_16: 463 case ISD::ATOMIC_LOAD_SUB_16: 464 case ISD::ATOMIC_LOAD_AND_16: 465 case ISD::ATOMIC_LOAD_OR_16: 466 case ISD::ATOMIC_LOAD_XOR_16: 467 case ISD::ATOMIC_LOAD_NAND_16: 468 case ISD::ATOMIC_LOAD_MIN_16: 469 case ISD::ATOMIC_LOAD_MAX_16: 470 case ISD::ATOMIC_LOAD_UMIN_16: 471 case ISD::ATOMIC_LOAD_UMAX_16: 472 case ISD::ATOMIC_CMP_SWAP_32: 473 case ISD::ATOMIC_SWAP_32: 474 case ISD::ATOMIC_LOAD_ADD_32: 475 case ISD::ATOMIC_LOAD_SUB_32: 476 case ISD::ATOMIC_LOAD_AND_32: 477 case ISD::ATOMIC_LOAD_OR_32: 478 case ISD::ATOMIC_LOAD_XOR_32: 479 case ISD::ATOMIC_LOAD_NAND_32: 480 case ISD::ATOMIC_LOAD_MIN_32: 481 case ISD::ATOMIC_LOAD_MAX_32: 482 case ISD::ATOMIC_LOAD_UMIN_32: 483 case ISD::ATOMIC_LOAD_UMAX_32: 484 case ISD::ATOMIC_CMP_SWAP_64: 485 case ISD::ATOMIC_SWAP_64: 486 case ISD::ATOMIC_LOAD_ADD_64: 487 case ISD::ATOMIC_LOAD_SUB_64: 488 case ISD::ATOMIC_LOAD_AND_64: 489 case ISD::ATOMIC_LOAD_OR_64: 490 case ISD::ATOMIC_LOAD_XOR_64: 491 case ISD::ATOMIC_LOAD_NAND_64: 492 case ISD::ATOMIC_LOAD_MIN_64: 493 case ISD::ATOMIC_LOAD_MAX_64: 494 case ISD::ATOMIC_LOAD_UMIN_64: 495 case ISD::ATOMIC_LOAD_UMAX_64: { 496 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 497 ID.AddInteger(AT->getRawFlags()); 498 break; 499 } 500 } // end switch (N->getOpcode()) 501} 502 503/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 504/// the CSE map that carries both alignment and volatility information. 505/// 506static unsigned encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 507 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 508} 509 510//===----------------------------------------------------------------------===// 511// SelectionDAG Class 512//===----------------------------------------------------------------------===// 513 514/// RemoveDeadNodes - This method deletes all unreachable nodes in the 515/// SelectionDAG. 516void SelectionDAG::RemoveDeadNodes() { 517 // Create a dummy node (which is not added to allnodes), that adds a reference 518 // to the root node, preventing it from being deleted. 519 HandleSDNode Dummy(getRoot()); 520 521 SmallVector<SDNode*, 128> DeadNodes; 522 523 // Add all obviously-dead nodes to the DeadNodes worklist. 524 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 525 if (I->use_empty()) 526 DeadNodes.push_back(I); 527 528 RemoveDeadNodes(DeadNodes); 529 530 // If the root changed (e.g. it was a dead load, update the root). 531 setRoot(Dummy.getValue()); 532} 533 534/// RemoveDeadNodes - This method deletes the unreachable nodes in the 535/// given list, and any nodes that become unreachable as a result. 536void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 537 DAGUpdateListener *UpdateListener) { 538 539 // Process the worklist, deleting the nodes and adding their uses to the 540 // worklist. 541 while (!DeadNodes.empty()) { 542 SDNode *N = DeadNodes.back(); 543 DeadNodes.pop_back(); 544 545 if (UpdateListener) 546 UpdateListener->NodeDeleted(N, 0); 547 548 // Take the node out of the appropriate CSE map. 549 RemoveNodeFromCSEMaps(N); 550 551 // Next, brutally remove the operand list. This is safe to do, as there are 552 // no cycles in the graph. 553 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 554 SDNode *Operand = I->getVal(); 555 Operand->removeUser(std::distance(N->op_begin(), I), N); 556 557 // Now that we removed this operand, see if there are no uses of it left. 558 if (Operand->use_empty()) 559 DeadNodes.push_back(Operand); 560 } 561 if (N->OperandsNeedDelete) { 562 delete[] N->OperandList; 563 } 564 N->OperandList = 0; 565 N->NumOperands = 0; 566 567 // Finally, remove N itself. 568 NodeAllocator.Deallocate(AllNodes.remove(N)); 569 } 570} 571 572void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 573 SmallVector<SDNode*, 16> DeadNodes(1, N); 574 RemoveDeadNodes(DeadNodes, UpdateListener); 575} 576 577void SelectionDAG::DeleteNode(SDNode *N) { 578 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 579 580 // First take this out of the appropriate CSE map. 581 RemoveNodeFromCSEMaps(N); 582 583 // Finally, remove uses due to operands of this node, remove from the 584 // AllNodes list, and delete the node. 585 DeleteNodeNotInCSEMaps(N); 586} 587 588void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 589 590 // Drop all of the operands and decrement used nodes use counts. 591 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 592 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 593 if (N->OperandsNeedDelete) 594 delete[] N->OperandList; 595 596 assert(N != AllNodes.begin()); 597 NodeAllocator.Deallocate(AllNodes.remove(N)); 598} 599 600/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 601/// correspond to it. This is useful when we're about to delete or repurpose 602/// the node. We don't want future request for structurally identical nodes 603/// to return N anymore. 604bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 605 bool Erased = false; 606 switch (N->getOpcode()) { 607 case ISD::EntryToken: 608 assert(0 && "EntryToken should not be in CSEMaps!"); 609 return false; 610 case ISD::HANDLENODE: return false; // noop. 611 case ISD::CONDCODE: 612 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 613 "Cond code doesn't exist!"); 614 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 615 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 616 break; 617 case ISD::ExternalSymbol: 618 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 619 break; 620 case ISD::TargetExternalSymbol: 621 Erased = 622 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 623 break; 624 case ISD::VALUETYPE: { 625 MVT VT = cast<VTSDNode>(N)->getVT(); 626 if (VT.isExtended()) { 627 Erased = ExtendedValueTypeNodes.erase(VT); 628 } else { 629 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 630 ValueTypeNodes[VT.getSimpleVT()] = 0; 631 } 632 break; 633 } 634 default: 635 // Remove it from the CSE Map. 636 Erased = CSEMap.RemoveNode(N); 637 break; 638 } 639#ifndef NDEBUG 640 // Verify that the node was actually in one of the CSE maps, unless it has a 641 // flag result (which cannot be CSE'd) or is one of the special cases that are 642 // not subject to CSE. 643 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 644 !N->isMachineOpcode() && 645 N->getOpcode() != ISD::DBG_LABEL && 646 N->getOpcode() != ISD::DBG_STOPPOINT && 647 N->getOpcode() != ISD::EH_LABEL && 648 N->getOpcode() != ISD::DECLARE) { 649 N->dump(this); 650 cerr << "\n"; 651 assert(0 && "Node is not in map!"); 652 } 653#endif 654 return Erased; 655} 656 657/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 658/// has been taken out and modified in some way. If the specified node already 659/// exists in the CSE maps, do not modify the maps, but return the existing node 660/// instead. If it doesn't exist, add it and return null. 661/// 662SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 663 assert(N->getNumOperands() && "This is a leaf node!"); 664 665 if (N->getValueType(0) == MVT::Flag) 666 return 0; // Never CSE anything that produces a flag. 667 668 switch (N->getOpcode()) { 669 default: break; 670 case ISD::HANDLENODE: 671 case ISD::DBG_LABEL: 672 case ISD::DBG_STOPPOINT: 673 case ISD::EH_LABEL: 674 case ISD::DECLARE: 675 return 0; // Never add these nodes. 676 } 677 678 // Check that remaining values produced are not flags. 679 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 680 if (N->getValueType(i) == MVT::Flag) 681 return 0; // Never CSE anything that produces a flag. 682 683 SDNode *New = CSEMap.GetOrInsertNode(N); 684 if (New != N) return New; // Node already existed. 685 return 0; 686} 687 688/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 689/// were replaced with those specified. If this node is never memoized, 690/// return null, otherwise return a pointer to the slot it would take. If a 691/// node already exists with these operands, the slot will be non-null. 692SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 693 void *&InsertPos) { 694 if (N->getValueType(0) == MVT::Flag) 695 return 0; // Never CSE anything that produces a flag. 696 697 switch (N->getOpcode()) { 698 default: break; 699 case ISD::HANDLENODE: 700 case ISD::DBG_LABEL: 701 case ISD::DBG_STOPPOINT: 702 case ISD::EH_LABEL: 703 return 0; // Never add these nodes. 704 } 705 706 // Check that remaining values produced are not flags. 707 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 708 if (N->getValueType(i) == MVT::Flag) 709 return 0; // Never CSE anything that produces a flag. 710 711 SDValue Ops[] = { Op }; 712 FoldingSetNodeID ID; 713 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 714 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 715} 716 717/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 718/// were replaced with those specified. If this node is never memoized, 719/// return null, otherwise return a pointer to the slot it would take. If a 720/// node already exists with these operands, the slot will be non-null. 721SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 722 SDValue Op1, SDValue Op2, 723 void *&InsertPos) { 724 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 725 726 // Check that remaining values produced are not flags. 727 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 728 if (N->getValueType(i) == MVT::Flag) 729 return 0; // Never CSE anything that produces a flag. 730 731 SDValue Ops[] = { Op1, Op2 }; 732 FoldingSetNodeID ID; 733 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 734 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 735} 736 737 738/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 739/// were replaced with those specified. If this node is never memoized, 740/// return null, otherwise return a pointer to the slot it would take. If a 741/// node already exists with these operands, the slot will be non-null. 742SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 743 const SDValue *Ops,unsigned NumOps, 744 void *&InsertPos) { 745 if (N->getValueType(0) == MVT::Flag) 746 return 0; // Never CSE anything that produces a flag. 747 748 switch (N->getOpcode()) { 749 default: break; 750 case ISD::HANDLENODE: 751 case ISD::DBG_LABEL: 752 case ISD::DBG_STOPPOINT: 753 case ISD::EH_LABEL: 754 case ISD::DECLARE: 755 return 0; // Never add these nodes. 756 } 757 758 // Check that remaining values produced are not flags. 759 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 760 if (N->getValueType(i) == MVT::Flag) 761 return 0; // Never CSE anything that produces a flag. 762 763 FoldingSetNodeID ID; 764 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 765 766 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 767 ID.AddInteger(LD->getAddressingMode()); 768 ID.AddInteger(LD->getExtensionType()); 769 ID.AddInteger(LD->getMemoryVT().getRawBits()); 770 ID.AddInteger(LD->getRawFlags()); 771 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { 772 ID.AddInteger(ST->getAddressingMode()); 773 ID.AddInteger(ST->isTruncatingStore()); 774 ID.AddInteger(ST->getMemoryVT().getRawBits()); 775 ID.AddInteger(ST->getRawFlags()); 776 } 777 778 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 779} 780 781/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 782void SelectionDAG::VerifyNode(SDNode *N) { 783 switch (N->getOpcode()) { 784 default: 785 break; 786 case ISD::BUILD_VECTOR: { 787 assert(N->getNumValues() == 1 && "Too many results for BUILD_VECTOR!"); 788 assert(N->getValueType(0).isVector() && "Wrong BUILD_VECTOR return type!"); 789 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 790 "Wrong number of BUILD_VECTOR operands!"); 791 MVT EltVT = N->getValueType(0).getVectorElementType(); 792 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 793 assert(I->getSDValue().getValueType() == EltVT && 794 "Wrong BUILD_VECTOR operand type!"); 795 break; 796 } 797 } 798} 799 800/// getMVTAlignment - Compute the default alignment value for the 801/// given type. 802/// 803unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 804 const Type *Ty = VT == MVT::iPTR ? 805 PointerType::get(Type::Int8Ty, 0) : 806 VT.getTypeForMVT(); 807 808 return TLI.getTargetData()->getABITypeAlignment(Ty); 809} 810 811SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 812 : TLI(tli), FLI(fli), 813 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 814 Root(getEntryNode()) { 815 AllNodes.push_back(&EntryNode); 816} 817 818void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi) { 819 MF = &mf; 820 MMI = mmi; 821} 822 823SelectionDAG::~SelectionDAG() { 824 allnodes_clear(); 825} 826 827void SelectionDAG::allnodes_clear() { 828 assert(&*AllNodes.begin() == &EntryNode); 829 AllNodes.remove(AllNodes.begin()); 830 while (!AllNodes.empty()) { 831 SDNode *N = AllNodes.remove(AllNodes.begin()); 832 N->SetNextInBucket(0); 833 if (N->OperandsNeedDelete) 834 delete [] N->OperandList; 835 NodeAllocator.Deallocate(N); 836 } 837} 838 839void SelectionDAG::clear() { 840 allnodes_clear(); 841 OperandAllocator.Reset(); 842 CSEMap.clear(); 843 844 ExtendedValueTypeNodes.clear(); 845 ExternalSymbols.clear(); 846 TargetExternalSymbols.clear(); 847 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 848 static_cast<CondCodeSDNode*>(0)); 849 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 850 static_cast<SDNode*>(0)); 851 852 EntryNode.Uses = 0; 853 AllNodes.push_back(&EntryNode); 854 Root = getEntryNode(); 855} 856 857SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 858 if (Op.getValueType() == VT) return Op; 859 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 860 VT.getSizeInBits()); 861 return getNode(ISD::AND, Op.getValueType(), Op, 862 getConstant(Imm, Op.getValueType())); 863} 864 865SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 866 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 867 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 868} 869 870SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 871 return getConstant(*ConstantInt::get(Val), VT, isT); 872} 873 874SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 875 assert(VT.isInteger() && "Cannot create FP integer constant!"); 876 877 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 878 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 879 "APInt size does not match type size!"); 880 881 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 882 FoldingSetNodeID ID; 883 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 884 ID.AddPointer(&Val); 885 void *IP = 0; 886 SDNode *N = NULL; 887 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 888 if (!VT.isVector()) 889 return SDValue(N, 0); 890 if (!N) { 891 N = NodeAllocator.Allocate<ConstantSDNode>(); 892 new (N) ConstantSDNode(isT, &Val, EltVT); 893 CSEMap.InsertNode(N, IP); 894 AllNodes.push_back(N); 895 } 896 897 SDValue Result(N, 0); 898 if (VT.isVector()) { 899 SmallVector<SDValue, 8> Ops; 900 Ops.assign(VT.getVectorNumElements(), Result); 901 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 902 } 903 return Result; 904} 905 906SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 907 return getConstant(Val, TLI.getPointerTy(), isTarget); 908} 909 910 911SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 912 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 913} 914 915SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 916 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 917 918 MVT EltVT = 919 VT.isVector() ? VT.getVectorElementType() : VT; 920 921 // Do the map lookup using the actual bit pattern for the floating point 922 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 923 // we don't have issues with SNANs. 924 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 925 FoldingSetNodeID ID; 926 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 927 ID.AddPointer(&V); 928 void *IP = 0; 929 SDNode *N = NULL; 930 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 931 if (!VT.isVector()) 932 return SDValue(N, 0); 933 if (!N) { 934 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 935 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 936 CSEMap.InsertNode(N, IP); 937 AllNodes.push_back(N); 938 } 939 940 SDValue Result(N, 0); 941 if (VT.isVector()) { 942 SmallVector<SDValue, 8> Ops; 943 Ops.assign(VT.getVectorNumElements(), Result); 944 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 945 } 946 return Result; 947} 948 949SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 950 MVT EltVT = 951 VT.isVector() ? VT.getVectorElementType() : VT; 952 if (EltVT==MVT::f32) 953 return getConstantFP(APFloat((float)Val), VT, isTarget); 954 else 955 return getConstantFP(APFloat(Val), VT, isTarget); 956} 957 958SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 959 MVT VT, int Offset, 960 bool isTargetGA) { 961 unsigned Opc; 962 963 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 964 if (!GVar) { 965 // If GV is an alias then use the aliasee for determining thread-localness. 966 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 967 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 968 } 969 970 if (GVar && GVar->isThreadLocal()) 971 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 972 else 973 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 974 975 FoldingSetNodeID ID; 976 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 977 ID.AddPointer(GV); 978 ID.AddInteger(Offset); 979 void *IP = 0; 980 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 981 return SDValue(E, 0); 982 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 983 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 984 CSEMap.InsertNode(N, IP); 985 AllNodes.push_back(N); 986 return SDValue(N, 0); 987} 988 989SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 990 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 991 FoldingSetNodeID ID; 992 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 993 ID.AddInteger(FI); 994 void *IP = 0; 995 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 996 return SDValue(E, 0); 997 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 998 new (N) FrameIndexSDNode(FI, VT, isTarget); 999 CSEMap.InsertNode(N, IP); 1000 AllNodes.push_back(N); 1001 return SDValue(N, 0); 1002} 1003 1004SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 1005 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1006 FoldingSetNodeID ID; 1007 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1008 ID.AddInteger(JTI); 1009 void *IP = 0; 1010 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1011 return SDValue(E, 0); 1012 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1013 new (N) JumpTableSDNode(JTI, VT, isTarget); 1014 CSEMap.InsertNode(N, IP); 1015 AllNodes.push_back(N); 1016 return SDValue(N, 0); 1017} 1018 1019SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 1020 unsigned Alignment, int Offset, 1021 bool isTarget) { 1022 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1023 FoldingSetNodeID ID; 1024 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1025 ID.AddInteger(Alignment); 1026 ID.AddInteger(Offset); 1027 ID.AddPointer(C); 1028 void *IP = 0; 1029 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1030 return SDValue(E, 0); 1031 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1032 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1033 CSEMap.InsertNode(N, IP); 1034 AllNodes.push_back(N); 1035 return SDValue(N, 0); 1036} 1037 1038 1039SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1040 unsigned Alignment, int Offset, 1041 bool isTarget) { 1042 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1043 FoldingSetNodeID ID; 1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1045 ID.AddInteger(Alignment); 1046 ID.AddInteger(Offset); 1047 C->AddSelectionDAGCSEId(ID); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1052 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1053 CSEMap.InsertNode(N, IP); 1054 AllNodes.push_back(N); 1055 return SDValue(N, 0); 1056} 1057 1058 1059SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1060 FoldingSetNodeID ID; 1061 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1062 ID.AddPointer(MBB); 1063 void *IP = 0; 1064 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1065 return SDValue(E, 0); 1066 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1067 new (N) BasicBlockSDNode(MBB); 1068 CSEMap.InsertNode(N, IP); 1069 AllNodes.push_back(N); 1070 return SDValue(N, 0); 1071} 1072 1073SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1074 FoldingSetNodeID ID; 1075 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1076 ID.AddInteger(Flags.getRawBits()); 1077 void *IP = 0; 1078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1079 return SDValue(E, 0); 1080 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1081 new (N) ARG_FLAGSSDNode(Flags); 1082 CSEMap.InsertNode(N, IP); 1083 AllNodes.push_back(N); 1084 return SDValue(N, 0); 1085} 1086 1087SDValue SelectionDAG::getValueType(MVT VT) { 1088 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1089 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1090 1091 SDNode *&N = VT.isExtended() ? 1092 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1093 1094 if (N) return SDValue(N, 0); 1095 N = NodeAllocator.Allocate<VTSDNode>(); 1096 new (N) VTSDNode(VT); 1097 AllNodes.push_back(N); 1098 return SDValue(N, 0); 1099} 1100 1101SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1102 SDNode *&N = ExternalSymbols[Sym]; 1103 if (N) return SDValue(N, 0); 1104 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1105 new (N) ExternalSymbolSDNode(false, Sym, VT); 1106 AllNodes.push_back(N); 1107 return SDValue(N, 0); 1108} 1109 1110SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1111 SDNode *&N = TargetExternalSymbols[Sym]; 1112 if (N) return SDValue(N, 0); 1113 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1114 new (N) ExternalSymbolSDNode(true, Sym, VT); 1115 AllNodes.push_back(N); 1116 return SDValue(N, 0); 1117} 1118 1119SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1120 if ((unsigned)Cond >= CondCodeNodes.size()) 1121 CondCodeNodes.resize(Cond+1); 1122 1123 if (CondCodeNodes[Cond] == 0) { 1124 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1125 new (N) CondCodeSDNode(Cond); 1126 CondCodeNodes[Cond] = N; 1127 AllNodes.push_back(N); 1128 } 1129 return SDValue(CondCodeNodes[Cond], 0); 1130} 1131 1132SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1133 FoldingSetNodeID ID; 1134 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1135 ID.AddInteger(RegNo); 1136 void *IP = 0; 1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1138 return SDValue(E, 0); 1139 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1140 new (N) RegisterSDNode(RegNo, VT); 1141 CSEMap.InsertNode(N, IP); 1142 AllNodes.push_back(N); 1143 return SDValue(N, 0); 1144} 1145 1146SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1147 unsigned Line, unsigned Col, 1148 const CompileUnitDesc *CU) { 1149 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1150 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1151 AllNodes.push_back(N); 1152 return SDValue(N, 0); 1153} 1154 1155SDValue SelectionDAG::getLabel(unsigned Opcode, 1156 SDValue Root, 1157 unsigned LabelID) { 1158 FoldingSetNodeID ID; 1159 SDValue Ops[] = { Root }; 1160 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1161 ID.AddInteger(LabelID); 1162 void *IP = 0; 1163 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1164 return SDValue(E, 0); 1165 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1166 new (N) LabelSDNode(Opcode, Root, LabelID); 1167 CSEMap.InsertNode(N, IP); 1168 AllNodes.push_back(N); 1169 return SDValue(N, 0); 1170} 1171 1172SDValue SelectionDAG::getSrcValue(const Value *V) { 1173 assert((!V || isa<PointerType>(V->getType())) && 1174 "SrcValue is not a pointer?"); 1175 1176 FoldingSetNodeID ID; 1177 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1178 ID.AddPointer(V); 1179 1180 void *IP = 0; 1181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1182 return SDValue(E, 0); 1183 1184 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1185 new (N) SrcValueSDNode(V); 1186 CSEMap.InsertNode(N, IP); 1187 AllNodes.push_back(N); 1188 return SDValue(N, 0); 1189} 1190 1191SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1192 const Value *v = MO.getValue(); 1193 assert((!v || isa<PointerType>(v->getType())) && 1194 "SrcValue is not a pointer?"); 1195 1196 FoldingSetNodeID ID; 1197 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1198 MO.Profile(ID); 1199 1200 void *IP = 0; 1201 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1202 return SDValue(E, 0); 1203 1204 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1205 new (N) MemOperandSDNode(MO); 1206 CSEMap.InsertNode(N, IP); 1207 AllNodes.push_back(N); 1208 return SDValue(N, 0); 1209} 1210 1211/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1212/// specified value type. 1213SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1214 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1215 unsigned ByteSize = VT.getSizeInBits()/8; 1216 const Type *Ty = VT.getTypeForMVT(); 1217 unsigned StackAlign = 1218 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1219 1220 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1221 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1222} 1223 1224SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1225 SDValue N2, ISD::CondCode Cond) { 1226 // These setcc operations always fold. 1227 switch (Cond) { 1228 default: break; 1229 case ISD::SETFALSE: 1230 case ISD::SETFALSE2: return getConstant(0, VT); 1231 case ISD::SETTRUE: 1232 case ISD::SETTRUE2: return getConstant(1, VT); 1233 1234 case ISD::SETOEQ: 1235 case ISD::SETOGT: 1236 case ISD::SETOGE: 1237 case ISD::SETOLT: 1238 case ISD::SETOLE: 1239 case ISD::SETONE: 1240 case ISD::SETO: 1241 case ISD::SETUO: 1242 case ISD::SETUEQ: 1243 case ISD::SETUNE: 1244 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1245 break; 1246 } 1247 1248 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1249 const APInt &C2 = N2C->getAPIntValue(); 1250 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1251 const APInt &C1 = N1C->getAPIntValue(); 1252 1253 switch (Cond) { 1254 default: assert(0 && "Unknown integer setcc!"); 1255 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1256 case ISD::SETNE: return getConstant(C1 != C2, VT); 1257 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1258 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1259 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1260 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1261 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1262 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1263 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1264 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1265 } 1266 } 1267 } 1268 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1269 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1270 // No compile time operations on this type yet. 1271 if (N1C->getValueType(0) == MVT::ppcf128) 1272 return SDValue(); 1273 1274 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1275 switch (Cond) { 1276 default: break; 1277 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1278 return getNode(ISD::UNDEF, VT); 1279 // fall through 1280 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1281 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1282 return getNode(ISD::UNDEF, VT); 1283 // fall through 1284 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1285 R==APFloat::cmpLessThan, VT); 1286 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1287 return getNode(ISD::UNDEF, VT); 1288 // fall through 1289 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1290 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1291 return getNode(ISD::UNDEF, VT); 1292 // fall through 1293 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1294 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1295 return getNode(ISD::UNDEF, VT); 1296 // fall through 1297 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1298 R==APFloat::cmpEqual, VT); 1299 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1300 return getNode(ISD::UNDEF, VT); 1301 // fall through 1302 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1303 R==APFloat::cmpEqual, VT); 1304 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1305 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1306 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1307 R==APFloat::cmpEqual, VT); 1308 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1309 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1310 R==APFloat::cmpLessThan, VT); 1311 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1312 R==APFloat::cmpUnordered, VT); 1313 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1314 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1315 } 1316 } else { 1317 // Ensure that the constant occurs on the RHS. 1318 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1319 } 1320 } 1321 1322 // Could not fold it. 1323 return SDValue(); 1324} 1325 1326/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1327/// use this predicate to simplify operations downstream. 1328bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1329 unsigned BitWidth = Op.getValueSizeInBits(); 1330 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1331} 1332 1333/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1334/// this predicate to simplify operations downstream. Mask is known to be zero 1335/// for bits that V cannot have. 1336bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1337 unsigned Depth) const { 1338 APInt KnownZero, KnownOne; 1339 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1340 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1341 return (KnownZero & Mask) == Mask; 1342} 1343 1344/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1345/// known to be either zero or one and return them in the KnownZero/KnownOne 1346/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1347/// processing. 1348void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1349 APInt &KnownZero, APInt &KnownOne, 1350 unsigned Depth) const { 1351 unsigned BitWidth = Mask.getBitWidth(); 1352 assert(BitWidth == Op.getValueType().getSizeInBits() && 1353 "Mask size mismatches value type size!"); 1354 1355 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1356 if (Depth == 6 || Mask == 0) 1357 return; // Limit search depth. 1358 1359 APInt KnownZero2, KnownOne2; 1360 1361 switch (Op.getOpcode()) { 1362 case ISD::Constant: 1363 // We know all of the bits for a constant! 1364 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1365 KnownZero = ~KnownOne & Mask; 1366 return; 1367 case ISD::AND: 1368 // If either the LHS or the RHS are Zero, the result is zero. 1369 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1370 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1371 KnownZero2, KnownOne2, Depth+1); 1372 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1373 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1374 1375 // Output known-1 bits are only known if set in both the LHS & RHS. 1376 KnownOne &= KnownOne2; 1377 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1378 KnownZero |= KnownZero2; 1379 return; 1380 case ISD::OR: 1381 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1382 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1383 KnownZero2, KnownOne2, Depth+1); 1384 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1385 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1386 1387 // Output known-0 bits are only known if clear in both the LHS & RHS. 1388 KnownZero &= KnownZero2; 1389 // Output known-1 are known to be set if set in either the LHS | RHS. 1390 KnownOne |= KnownOne2; 1391 return; 1392 case ISD::XOR: { 1393 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1394 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1395 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1396 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1397 1398 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1399 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1400 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1401 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1402 KnownZero = KnownZeroOut; 1403 return; 1404 } 1405 case ISD::MUL: { 1406 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1407 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1408 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1409 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1410 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1411 1412 // If low bits are zero in either operand, output low known-0 bits. 1413 // Also compute a conserative estimate for high known-0 bits. 1414 // More trickiness is possible, but this is sufficient for the 1415 // interesting case of alignment computation. 1416 KnownOne.clear(); 1417 unsigned TrailZ = KnownZero.countTrailingOnes() + 1418 KnownZero2.countTrailingOnes(); 1419 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1420 KnownZero2.countLeadingOnes(), 1421 BitWidth) - BitWidth; 1422 1423 TrailZ = std::min(TrailZ, BitWidth); 1424 LeadZ = std::min(LeadZ, BitWidth); 1425 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1426 APInt::getHighBitsSet(BitWidth, LeadZ); 1427 KnownZero &= Mask; 1428 return; 1429 } 1430 case ISD::UDIV: { 1431 // For the purposes of computing leading zeros we can conservatively 1432 // treat a udiv as a logical right shift by the power of 2 known to 1433 // be less than the denominator. 1434 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1435 ComputeMaskedBits(Op.getOperand(0), 1436 AllOnes, KnownZero2, KnownOne2, Depth+1); 1437 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1438 1439 KnownOne2.clear(); 1440 KnownZero2.clear(); 1441 ComputeMaskedBits(Op.getOperand(1), 1442 AllOnes, KnownZero2, KnownOne2, Depth+1); 1443 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1444 if (RHSUnknownLeadingOnes != BitWidth) 1445 LeadZ = std::min(BitWidth, 1446 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1447 1448 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1449 return; 1450 } 1451 case ISD::SELECT: 1452 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1453 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1454 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1455 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1456 1457 // Only known if known in both the LHS and RHS. 1458 KnownOne &= KnownOne2; 1459 KnownZero &= KnownZero2; 1460 return; 1461 case ISD::SELECT_CC: 1462 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1463 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1464 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1465 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1466 1467 // Only known if known in both the LHS and RHS. 1468 KnownOne &= KnownOne2; 1469 KnownZero &= KnownZero2; 1470 return; 1471 case ISD::SETCC: 1472 // If we know the result of a setcc has the top bits zero, use this info. 1473 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult && 1474 BitWidth > 1) 1475 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1476 return; 1477 case ISD::SHL: 1478 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1479 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1480 unsigned ShAmt = SA->getZExtValue(); 1481 1482 // If the shift count is an invalid immediate, don't do anything. 1483 if (ShAmt >= BitWidth) 1484 return; 1485 1486 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1487 KnownZero, KnownOne, Depth+1); 1488 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1489 KnownZero <<= ShAmt; 1490 KnownOne <<= ShAmt; 1491 // low bits known zero. 1492 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1493 } 1494 return; 1495 case ISD::SRL: 1496 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1497 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1498 unsigned ShAmt = SA->getZExtValue(); 1499 1500 // If the shift count is an invalid immediate, don't do anything. 1501 if (ShAmt >= BitWidth) 1502 return; 1503 1504 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1505 KnownZero, KnownOne, Depth+1); 1506 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1507 KnownZero = KnownZero.lshr(ShAmt); 1508 KnownOne = KnownOne.lshr(ShAmt); 1509 1510 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1511 KnownZero |= HighBits; // High bits known zero. 1512 } 1513 return; 1514 case ISD::SRA: 1515 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1516 unsigned ShAmt = SA->getZExtValue(); 1517 1518 // If the shift count is an invalid immediate, don't do anything. 1519 if (ShAmt >= BitWidth) 1520 return; 1521 1522 APInt InDemandedMask = (Mask << ShAmt); 1523 // If any of the demanded bits are produced by the sign extension, we also 1524 // demand the input sign bit. 1525 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1526 if (HighBits.getBoolValue()) 1527 InDemandedMask |= APInt::getSignBit(BitWidth); 1528 1529 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1530 Depth+1); 1531 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1532 KnownZero = KnownZero.lshr(ShAmt); 1533 KnownOne = KnownOne.lshr(ShAmt); 1534 1535 // Handle the sign bits. 1536 APInt SignBit = APInt::getSignBit(BitWidth); 1537 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1538 1539 if (KnownZero.intersects(SignBit)) { 1540 KnownZero |= HighBits; // New bits are known zero. 1541 } else if (KnownOne.intersects(SignBit)) { 1542 KnownOne |= HighBits; // New bits are known one. 1543 } 1544 } 1545 return; 1546 case ISD::SIGN_EXTEND_INREG: { 1547 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1548 unsigned EBits = EVT.getSizeInBits(); 1549 1550 // Sign extension. Compute the demanded bits in the result that are not 1551 // present in the input. 1552 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1553 1554 APInt InSignBit = APInt::getSignBit(EBits); 1555 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1556 1557 // If the sign extended bits are demanded, we know that the sign 1558 // bit is demanded. 1559 InSignBit.zext(BitWidth); 1560 if (NewBits.getBoolValue()) 1561 InputDemandedBits |= InSignBit; 1562 1563 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1564 KnownZero, KnownOne, Depth+1); 1565 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1566 1567 // If the sign bit of the input is known set or clear, then we know the 1568 // top bits of the result. 1569 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1570 KnownZero |= NewBits; 1571 KnownOne &= ~NewBits; 1572 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1573 KnownOne |= NewBits; 1574 KnownZero &= ~NewBits; 1575 } else { // Input sign bit unknown 1576 KnownZero &= ~NewBits; 1577 KnownOne &= ~NewBits; 1578 } 1579 return; 1580 } 1581 case ISD::CTTZ: 1582 case ISD::CTLZ: 1583 case ISD::CTPOP: { 1584 unsigned LowBits = Log2_32(BitWidth)+1; 1585 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1586 KnownOne.clear(); 1587 return; 1588 } 1589 case ISD::LOAD: { 1590 if (ISD::isZEXTLoad(Op.getNode())) { 1591 LoadSDNode *LD = cast<LoadSDNode>(Op); 1592 MVT VT = LD->getMemoryVT(); 1593 unsigned MemBits = VT.getSizeInBits(); 1594 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1595 } 1596 return; 1597 } 1598 case ISD::ZERO_EXTEND: { 1599 MVT InVT = Op.getOperand(0).getValueType(); 1600 unsigned InBits = InVT.getSizeInBits(); 1601 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1602 APInt InMask = Mask; 1603 InMask.trunc(InBits); 1604 KnownZero.trunc(InBits); 1605 KnownOne.trunc(InBits); 1606 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1607 KnownZero.zext(BitWidth); 1608 KnownOne.zext(BitWidth); 1609 KnownZero |= NewBits; 1610 return; 1611 } 1612 case ISD::SIGN_EXTEND: { 1613 MVT InVT = Op.getOperand(0).getValueType(); 1614 unsigned InBits = InVT.getSizeInBits(); 1615 APInt InSignBit = APInt::getSignBit(InBits); 1616 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1617 APInt InMask = Mask; 1618 InMask.trunc(InBits); 1619 1620 // If any of the sign extended bits are demanded, we know that the sign 1621 // bit is demanded. Temporarily set this bit in the mask for our callee. 1622 if (NewBits.getBoolValue()) 1623 InMask |= InSignBit; 1624 1625 KnownZero.trunc(InBits); 1626 KnownOne.trunc(InBits); 1627 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1628 1629 // Note if the sign bit is known to be zero or one. 1630 bool SignBitKnownZero = KnownZero.isNegative(); 1631 bool SignBitKnownOne = KnownOne.isNegative(); 1632 assert(!(SignBitKnownZero && SignBitKnownOne) && 1633 "Sign bit can't be known to be both zero and one!"); 1634 1635 // If the sign bit wasn't actually demanded by our caller, we don't 1636 // want it set in the KnownZero and KnownOne result values. Reset the 1637 // mask and reapply it to the result values. 1638 InMask = Mask; 1639 InMask.trunc(InBits); 1640 KnownZero &= InMask; 1641 KnownOne &= InMask; 1642 1643 KnownZero.zext(BitWidth); 1644 KnownOne.zext(BitWidth); 1645 1646 // If the sign bit is known zero or one, the top bits match. 1647 if (SignBitKnownZero) 1648 KnownZero |= NewBits; 1649 else if (SignBitKnownOne) 1650 KnownOne |= NewBits; 1651 return; 1652 } 1653 case ISD::ANY_EXTEND: { 1654 MVT InVT = Op.getOperand(0).getValueType(); 1655 unsigned InBits = InVT.getSizeInBits(); 1656 APInt InMask = Mask; 1657 InMask.trunc(InBits); 1658 KnownZero.trunc(InBits); 1659 KnownOne.trunc(InBits); 1660 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1661 KnownZero.zext(BitWidth); 1662 KnownOne.zext(BitWidth); 1663 return; 1664 } 1665 case ISD::TRUNCATE: { 1666 MVT InVT = Op.getOperand(0).getValueType(); 1667 unsigned InBits = InVT.getSizeInBits(); 1668 APInt InMask = Mask; 1669 InMask.zext(InBits); 1670 KnownZero.zext(InBits); 1671 KnownOne.zext(InBits); 1672 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1674 KnownZero.trunc(BitWidth); 1675 KnownOne.trunc(BitWidth); 1676 break; 1677 } 1678 case ISD::AssertZext: { 1679 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1680 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1681 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1682 KnownOne, Depth+1); 1683 KnownZero |= (~InMask) & Mask; 1684 return; 1685 } 1686 case ISD::FGETSIGN: 1687 // All bits are zero except the low bit. 1688 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1689 return; 1690 1691 case ISD::SUB: { 1692 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1693 // We know that the top bits of C-X are clear if X contains less bits 1694 // than C (i.e. no wrap-around can happen). For example, 20-X is 1695 // positive if we can prove that X is >= 0 and < 16. 1696 if (CLHS->getAPIntValue().isNonNegative()) { 1697 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1698 // NLZ can't be BitWidth with no sign bit 1699 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1700 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1701 Depth+1); 1702 1703 // If all of the MaskV bits are known to be zero, then we know the 1704 // output top bits are zero, because we now know that the output is 1705 // from [0-C]. 1706 if ((KnownZero2 & MaskV) == MaskV) { 1707 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1708 // Top bits known zero. 1709 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1710 } 1711 } 1712 } 1713 } 1714 // fall through 1715 case ISD::ADD: { 1716 // Output known-0 bits are known if clear or set in both the low clear bits 1717 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1718 // low 3 bits clear. 1719 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1720 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1721 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1722 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1723 1724 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1725 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1726 KnownZeroOut = std::min(KnownZeroOut, 1727 KnownZero2.countTrailingOnes()); 1728 1729 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1730 return; 1731 } 1732 case ISD::SREM: 1733 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1734 const APInt &RA = Rem->getAPIntValue(); 1735 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1736 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1737 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1738 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1739 1740 // If the sign bit of the first operand is zero, the sign bit of 1741 // the result is zero. If the first operand has no one bits below 1742 // the second operand's single 1 bit, its sign will be zero. 1743 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1744 KnownZero2 |= ~LowBits; 1745 1746 KnownZero |= KnownZero2 & Mask; 1747 1748 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1749 } 1750 } 1751 return; 1752 case ISD::UREM: { 1753 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1754 const APInt &RA = Rem->getAPIntValue(); 1755 if (RA.isPowerOf2()) { 1756 APInt LowBits = (RA - 1); 1757 APInt Mask2 = LowBits & Mask; 1758 KnownZero |= ~LowBits & Mask; 1759 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1760 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1761 break; 1762 } 1763 } 1764 1765 // Since the result is less than or equal to either operand, any leading 1766 // zero bits in either operand must also exist in the result. 1767 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1768 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1769 Depth+1); 1770 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1771 Depth+1); 1772 1773 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1774 KnownZero2.countLeadingOnes()); 1775 KnownOne.clear(); 1776 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1777 return; 1778 } 1779 default: 1780 // Allow the target to implement this method for its nodes. 1781 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1782 case ISD::INTRINSIC_WO_CHAIN: 1783 case ISD::INTRINSIC_W_CHAIN: 1784 case ISD::INTRINSIC_VOID: 1785 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1786 } 1787 return; 1788 } 1789} 1790 1791/// ComputeNumSignBits - Return the number of times the sign bit of the 1792/// register is replicated into the other bits. We know that at least 1 bit 1793/// is always equal to the sign bit (itself), but other cases can give us 1794/// information. For example, immediately after an "SRA X, 2", we know that 1795/// the top 3 bits are all equal to each other, so we return 3. 1796unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1797 MVT VT = Op.getValueType(); 1798 assert(VT.isInteger() && "Invalid VT!"); 1799 unsigned VTBits = VT.getSizeInBits(); 1800 unsigned Tmp, Tmp2; 1801 unsigned FirstAnswer = 1; 1802 1803 if (Depth == 6) 1804 return 1; // Limit search depth. 1805 1806 switch (Op.getOpcode()) { 1807 default: break; 1808 case ISD::AssertSext: 1809 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1810 return VTBits-Tmp+1; 1811 case ISD::AssertZext: 1812 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1813 return VTBits-Tmp; 1814 1815 case ISD::Constant: { 1816 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1817 // If negative, return # leading ones. 1818 if (Val.isNegative()) 1819 return Val.countLeadingOnes(); 1820 1821 // Return # leading zeros. 1822 return Val.countLeadingZeros(); 1823 } 1824 1825 case ISD::SIGN_EXTEND: 1826 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1827 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1828 1829 case ISD::SIGN_EXTEND_INREG: 1830 // Max of the input and what this extends. 1831 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1832 Tmp = VTBits-Tmp+1; 1833 1834 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1835 return std::max(Tmp, Tmp2); 1836 1837 case ISD::SRA: 1838 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1839 // SRA X, C -> adds C sign bits. 1840 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1841 Tmp += C->getZExtValue(); 1842 if (Tmp > VTBits) Tmp = VTBits; 1843 } 1844 return Tmp; 1845 case ISD::SHL: 1846 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1847 // shl destroys sign bits. 1848 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1849 if (C->getZExtValue() >= VTBits || // Bad shift. 1850 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1851 return Tmp - C->getZExtValue(); 1852 } 1853 break; 1854 case ISD::AND: 1855 case ISD::OR: 1856 case ISD::XOR: // NOT is handled here. 1857 // Logical binary ops preserve the number of sign bits at the worst. 1858 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1859 if (Tmp != 1) { 1860 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1861 FirstAnswer = std::min(Tmp, Tmp2); 1862 // We computed what we know about the sign bits as our first 1863 // answer. Now proceed to the generic code that uses 1864 // ComputeMaskedBits, and pick whichever answer is better. 1865 } 1866 break; 1867 1868 case ISD::SELECT: 1869 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1870 if (Tmp == 1) return 1; // Early out. 1871 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1872 return std::min(Tmp, Tmp2); 1873 1874 case ISD::SETCC: 1875 // If setcc returns 0/-1, all bits are sign bits. 1876 if (TLI.getSetCCResultContents() == 1877 TargetLowering::ZeroOrNegativeOneSetCCResult) 1878 return VTBits; 1879 break; 1880 case ISD::ROTL: 1881 case ISD::ROTR: 1882 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1883 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 1884 1885 // Handle rotate right by N like a rotate left by 32-N. 1886 if (Op.getOpcode() == ISD::ROTR) 1887 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1888 1889 // If we aren't rotating out all of the known-in sign bits, return the 1890 // number that are left. This handles rotl(sext(x), 1) for example. 1891 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1892 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1893 } 1894 break; 1895 case ISD::ADD: 1896 // Add can have at most one carry bit. Thus we know that the output 1897 // is, at worst, one more bit than the inputs. 1898 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1899 if (Tmp == 1) return 1; // Early out. 1900 1901 // Special case decrementing a value (ADD X, -1): 1902 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1903 if (CRHS->isAllOnesValue()) { 1904 APInt KnownZero, KnownOne; 1905 APInt Mask = APInt::getAllOnesValue(VTBits); 1906 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1907 1908 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1909 // sign bits set. 1910 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1911 return VTBits; 1912 1913 // If we are subtracting one from a positive number, there is no carry 1914 // out of the result. 1915 if (KnownZero.isNegative()) 1916 return Tmp; 1917 } 1918 1919 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1920 if (Tmp2 == 1) return 1; 1921 return std::min(Tmp, Tmp2)-1; 1922 break; 1923 1924 case ISD::SUB: 1925 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1926 if (Tmp2 == 1) return 1; 1927 1928 // Handle NEG. 1929 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1930 if (CLHS->isNullValue()) { 1931 APInt KnownZero, KnownOne; 1932 APInt Mask = APInt::getAllOnesValue(VTBits); 1933 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1934 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1935 // sign bits set. 1936 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1937 return VTBits; 1938 1939 // If the input is known to be positive (the sign bit is known clear), 1940 // the output of the NEG has the same number of sign bits as the input. 1941 if (KnownZero.isNegative()) 1942 return Tmp2; 1943 1944 // Otherwise, we treat this like a SUB. 1945 } 1946 1947 // Sub can have at most one carry bit. Thus we know that the output 1948 // is, at worst, one more bit than the inputs. 1949 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1950 if (Tmp == 1) return 1; // Early out. 1951 return std::min(Tmp, Tmp2)-1; 1952 break; 1953 case ISD::TRUNCATE: 1954 // FIXME: it's tricky to do anything useful for this, but it is an important 1955 // case for targets like X86. 1956 break; 1957 } 1958 1959 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1960 if (Op.getOpcode() == ISD::LOAD) { 1961 LoadSDNode *LD = cast<LoadSDNode>(Op); 1962 unsigned ExtType = LD->getExtensionType(); 1963 switch (ExtType) { 1964 default: break; 1965 case ISD::SEXTLOAD: // '17' bits known 1966 Tmp = LD->getMemoryVT().getSizeInBits(); 1967 return VTBits-Tmp+1; 1968 case ISD::ZEXTLOAD: // '16' bits known 1969 Tmp = LD->getMemoryVT().getSizeInBits(); 1970 return VTBits-Tmp; 1971 } 1972 } 1973 1974 // Allow the target to implement this method for its nodes. 1975 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 1976 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 1977 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 1978 Op.getOpcode() == ISD::INTRINSIC_VOID) { 1979 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 1980 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 1981 } 1982 1983 // Finally, if we can prove that the top bits of the result are 0's or 1's, 1984 // use this information. 1985 APInt KnownZero, KnownOne; 1986 APInt Mask = APInt::getAllOnesValue(VTBits); 1987 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1988 1989 if (KnownZero.isNegative()) { // sign bit is 0 1990 Mask = KnownZero; 1991 } else if (KnownOne.isNegative()) { // sign bit is 1; 1992 Mask = KnownOne; 1993 } else { 1994 // Nothing known. 1995 return FirstAnswer; 1996 } 1997 1998 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 1999 // the number of identical bits in the top of the input value. 2000 Mask = ~Mask; 2001 Mask <<= Mask.getBitWidth()-VTBits; 2002 // Return # leading zeros. We use 'min' here in case Val was zero before 2003 // shifting. We don't want to return '64' as for an i32 "0". 2004 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2005} 2006 2007 2008bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2009 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2010 if (!GA) return false; 2011 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2012 if (!GV) return false; 2013 MachineModuleInfo *MMI = getMachineModuleInfo(); 2014 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV); 2015} 2016 2017 2018/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2019/// element of the result of the vector shuffle. 2020SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2021 MVT VT = N->getValueType(0); 2022 SDValue PermMask = N->getOperand(2); 2023 SDValue Idx = PermMask.getOperand(i); 2024 if (Idx.getOpcode() == ISD::UNDEF) 2025 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2026 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2027 unsigned NumElems = PermMask.getNumOperands(); 2028 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2029 Index %= NumElems; 2030 2031 if (V.getOpcode() == ISD::BIT_CONVERT) { 2032 V = V.getOperand(0); 2033 if (V.getValueType().getVectorNumElements() != NumElems) 2034 return SDValue(); 2035 } 2036 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2037 return (Index == 0) ? V.getOperand(0) 2038 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2039 if (V.getOpcode() == ISD::BUILD_VECTOR) 2040 return V.getOperand(Index); 2041 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2042 return getShuffleScalarElt(V.getNode(), Index); 2043 return SDValue(); 2044} 2045 2046 2047/// getNode - Gets or creates the specified node. 2048/// 2049SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2050 FoldingSetNodeID ID; 2051 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2052 void *IP = 0; 2053 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2054 return SDValue(E, 0); 2055 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2056 new (N) SDNode(Opcode, SDNode::getSDVTList(VT)); 2057 CSEMap.InsertNode(N, IP); 2058 2059 AllNodes.push_back(N); 2060#ifndef NDEBUG 2061 VerifyNode(N); 2062#endif 2063 return SDValue(N, 0); 2064} 2065 2066SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2067 // Constant fold unary operations with an integer constant operand. 2068 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2069 const APInt &Val = C->getAPIntValue(); 2070 unsigned BitWidth = VT.getSizeInBits(); 2071 switch (Opcode) { 2072 default: break; 2073 case ISD::SIGN_EXTEND: 2074 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2075 case ISD::ANY_EXTEND: 2076 case ISD::ZERO_EXTEND: 2077 case ISD::TRUNCATE: 2078 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2079 case ISD::UINT_TO_FP: 2080 case ISD::SINT_TO_FP: { 2081 const uint64_t zero[] = {0, 0}; 2082 // No compile time operations on this type. 2083 if (VT==MVT::ppcf128) 2084 break; 2085 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2086 (void)apf.convertFromAPInt(Val, 2087 Opcode==ISD::SINT_TO_FP, 2088 APFloat::rmNearestTiesToEven); 2089 return getConstantFP(apf, VT); 2090 } 2091 case ISD::BIT_CONVERT: 2092 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2093 return getConstantFP(Val.bitsToFloat(), VT); 2094 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2095 return getConstantFP(Val.bitsToDouble(), VT); 2096 break; 2097 case ISD::BSWAP: 2098 return getConstant(Val.byteSwap(), VT); 2099 case ISD::CTPOP: 2100 return getConstant(Val.countPopulation(), VT); 2101 case ISD::CTLZ: 2102 return getConstant(Val.countLeadingZeros(), VT); 2103 case ISD::CTTZ: 2104 return getConstant(Val.countTrailingZeros(), VT); 2105 } 2106 } 2107 2108 // Constant fold unary operations with a floating point constant operand. 2109 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2110 APFloat V = C->getValueAPF(); // make copy 2111 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2112 switch (Opcode) { 2113 case ISD::FNEG: 2114 V.changeSign(); 2115 return getConstantFP(V, VT); 2116 case ISD::FABS: 2117 V.clearSign(); 2118 return getConstantFP(V, VT); 2119 case ISD::FP_ROUND: 2120 case ISD::FP_EXTEND: 2121 // This can return overflow, underflow, or inexact; we don't care. 2122 // FIXME need to be more flexible about rounding mode. 2123 (void)V.convert(*MVTToAPFloatSemantics(VT), 2124 APFloat::rmNearestTiesToEven); 2125 return getConstantFP(V, VT); 2126 case ISD::FP_TO_SINT: 2127 case ISD::FP_TO_UINT: { 2128 integerPart x; 2129 assert(integerPartWidth >= 64); 2130 // FIXME need to be more flexible about rounding mode. 2131 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2132 Opcode==ISD::FP_TO_SINT, 2133 APFloat::rmTowardZero); 2134 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2135 break; 2136 return getConstant(x, VT); 2137 } 2138 case ISD::BIT_CONVERT: 2139 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2140 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT); 2141 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2142 return getConstant(V.convertToAPInt().getZExtValue(), VT); 2143 break; 2144 } 2145 } 2146 } 2147 2148 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2149 switch (Opcode) { 2150 case ISD::TokenFactor: 2151 case ISD::CONCAT_VECTORS: 2152 return Operand; // Factor or concat of one node? No need. 2153 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2154 case ISD::FP_EXTEND: 2155 assert(VT.isFloatingPoint() && 2156 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2157 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2158 if (Operand.getOpcode() == ISD::UNDEF) 2159 return getNode(ISD::UNDEF, VT); 2160 break; 2161 case ISD::SIGN_EXTEND: 2162 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2163 "Invalid SIGN_EXTEND!"); 2164 if (Operand.getValueType() == VT) return Operand; // noop extension 2165 assert(Operand.getValueType().bitsLT(VT) 2166 && "Invalid sext node, dst < src!"); 2167 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2168 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2169 break; 2170 case ISD::ZERO_EXTEND: 2171 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2172 "Invalid ZERO_EXTEND!"); 2173 if (Operand.getValueType() == VT) return Operand; // noop extension 2174 assert(Operand.getValueType().bitsLT(VT) 2175 && "Invalid zext node, dst < src!"); 2176 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2177 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2178 break; 2179 case ISD::ANY_EXTEND: 2180 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2181 "Invalid ANY_EXTEND!"); 2182 if (Operand.getValueType() == VT) return Operand; // noop extension 2183 assert(Operand.getValueType().bitsLT(VT) 2184 && "Invalid anyext node, dst < src!"); 2185 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2186 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2187 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2188 break; 2189 case ISD::TRUNCATE: 2190 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2191 "Invalid TRUNCATE!"); 2192 if (Operand.getValueType() == VT) return Operand; // noop truncate 2193 assert(Operand.getValueType().bitsGT(VT) 2194 && "Invalid truncate node, src < dst!"); 2195 if (OpOpcode == ISD::TRUNCATE) 2196 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2197 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2198 OpOpcode == ISD::ANY_EXTEND) { 2199 // If the source is smaller than the dest, we still need an extend. 2200 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2201 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2202 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2203 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2204 else 2205 return Operand.getNode()->getOperand(0); 2206 } 2207 break; 2208 case ISD::BIT_CONVERT: 2209 // Basic sanity checking. 2210 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2211 && "Cannot BIT_CONVERT between types of different sizes!"); 2212 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2213 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2214 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2215 if (OpOpcode == ISD::UNDEF) 2216 return getNode(ISD::UNDEF, VT); 2217 break; 2218 case ISD::SCALAR_TO_VECTOR: 2219 assert(VT.isVector() && !Operand.getValueType().isVector() && 2220 VT.getVectorElementType() == Operand.getValueType() && 2221 "Illegal SCALAR_TO_VECTOR node!"); 2222 if (OpOpcode == ISD::UNDEF) 2223 return getNode(ISD::UNDEF, VT); 2224 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2225 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2226 isa<ConstantSDNode>(Operand.getOperand(1)) && 2227 Operand.getConstantOperandVal(1) == 0 && 2228 Operand.getOperand(0).getValueType() == VT) 2229 return Operand.getOperand(0); 2230 break; 2231 case ISD::FNEG: 2232 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2233 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2234 Operand.getNode()->getOperand(0)); 2235 if (OpOpcode == ISD::FNEG) // --X -> X 2236 return Operand.getNode()->getOperand(0); 2237 break; 2238 case ISD::FABS: 2239 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2240 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2241 break; 2242 } 2243 2244 SDNode *N; 2245 SDVTList VTs = getVTList(VT); 2246 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2247 FoldingSetNodeID ID; 2248 SDValue Ops[1] = { Operand }; 2249 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2250 void *IP = 0; 2251 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2252 return SDValue(E, 0); 2253 N = NodeAllocator.Allocate<UnarySDNode>(); 2254 new (N) UnarySDNode(Opcode, VTs, Operand); 2255 CSEMap.InsertNode(N, IP); 2256 } else { 2257 N = NodeAllocator.Allocate<UnarySDNode>(); 2258 new (N) UnarySDNode(Opcode, VTs, Operand); 2259 } 2260 2261 AllNodes.push_back(N); 2262#ifndef NDEBUG 2263 VerifyNode(N); 2264#endif 2265 return SDValue(N, 0); 2266} 2267 2268SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2269 SDValue N1, SDValue N2) { 2270 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2271 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2272 switch (Opcode) { 2273 default: break; 2274 case ISD::TokenFactor: 2275 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2276 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2277 // Fold trivial token factors. 2278 if (N1.getOpcode() == ISD::EntryToken) return N2; 2279 if (N2.getOpcode() == ISD::EntryToken) return N1; 2280 break; 2281 case ISD::CONCAT_VECTORS: 2282 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2283 // one big BUILD_VECTOR. 2284 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2285 N2.getOpcode() == ISD::BUILD_VECTOR) { 2286 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2287 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2288 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2289 } 2290 break; 2291 case ISD::AND: 2292 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2293 N1.getValueType() == VT && "Binary operator types must match!"); 2294 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2295 // worth handling here. 2296 if (N2C && N2C->isNullValue()) 2297 return N2; 2298 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2299 return N1; 2300 break; 2301 case ISD::OR: 2302 case ISD::XOR: 2303 case ISD::ADD: 2304 case ISD::SUB: 2305 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2306 N1.getValueType() == VT && "Binary operator types must match!"); 2307 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2308 // it's worth handling here. 2309 if (N2C && N2C->isNullValue()) 2310 return N1; 2311 break; 2312 case ISD::UDIV: 2313 case ISD::UREM: 2314 case ISD::MULHU: 2315 case ISD::MULHS: 2316 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2317 // fall through 2318 case ISD::MUL: 2319 case ISD::SDIV: 2320 case ISD::SREM: 2321 case ISD::FADD: 2322 case ISD::FSUB: 2323 case ISD::FMUL: 2324 case ISD::FDIV: 2325 case ISD::FREM: 2326 assert(N1.getValueType() == N2.getValueType() && 2327 N1.getValueType() == VT && "Binary operator types must match!"); 2328 break; 2329 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2330 assert(N1.getValueType() == VT && 2331 N1.getValueType().isFloatingPoint() && 2332 N2.getValueType().isFloatingPoint() && 2333 "Invalid FCOPYSIGN!"); 2334 break; 2335 case ISD::SHL: 2336 case ISD::SRA: 2337 case ISD::SRL: 2338 case ISD::ROTL: 2339 case ISD::ROTR: 2340 assert(VT == N1.getValueType() && 2341 "Shift operators return type must be the same as their first arg"); 2342 assert(VT.isInteger() && N2.getValueType().isInteger() && 2343 "Shifts only work on integers"); 2344 2345 // Always fold shifts of i1 values so the code generator doesn't need to 2346 // handle them. Since we know the size of the shift has to be less than the 2347 // size of the value, the shift/rotate count is guaranteed to be zero. 2348 if (VT == MVT::i1) 2349 return N1; 2350 break; 2351 case ISD::FP_ROUND_INREG: { 2352 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2353 assert(VT == N1.getValueType() && "Not an inreg round!"); 2354 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2355 "Cannot FP_ROUND_INREG integer types"); 2356 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2357 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2358 break; 2359 } 2360 case ISD::FP_ROUND: 2361 assert(VT.isFloatingPoint() && 2362 N1.getValueType().isFloatingPoint() && 2363 VT.bitsLE(N1.getValueType()) && 2364 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2365 if (N1.getValueType() == VT) return N1; // noop conversion. 2366 break; 2367 case ISD::AssertSext: 2368 case ISD::AssertZext: { 2369 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2370 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2371 assert(VT.isInteger() && EVT.isInteger() && 2372 "Cannot *_EXTEND_INREG FP types"); 2373 assert(EVT.bitsLE(VT) && "Not extending!"); 2374 if (VT == EVT) return N1; // noop assertion. 2375 break; 2376 } 2377 case ISD::SIGN_EXTEND_INREG: { 2378 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2379 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2380 assert(VT.isInteger() && EVT.isInteger() && 2381 "Cannot *_EXTEND_INREG FP types"); 2382 assert(EVT.bitsLE(VT) && "Not extending!"); 2383 if (EVT == VT) return N1; // Not actually extending 2384 2385 if (N1C) { 2386 APInt Val = N1C->getAPIntValue(); 2387 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2388 Val <<= Val.getBitWidth()-FromBits; 2389 Val = Val.ashr(Val.getBitWidth()-FromBits); 2390 return getConstant(Val, VT); 2391 } 2392 break; 2393 } 2394 case ISD::EXTRACT_VECTOR_ELT: 2395 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2396 if (N1.getOpcode() == ISD::UNDEF) 2397 return getNode(ISD::UNDEF, VT); 2398 2399 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2400 // expanding copies of large vectors from registers. 2401 if (N2C && 2402 N1.getOpcode() == ISD::CONCAT_VECTORS && 2403 N1.getNumOperands() > 0) { 2404 unsigned Factor = 2405 N1.getOperand(0).getValueType().getVectorNumElements(); 2406 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2407 N1.getOperand(N2C->getZExtValue() / Factor), 2408 getConstant(N2C->getZExtValue() % Factor, 2409 N2.getValueType())); 2410 } 2411 2412 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2413 // expanding large vector constants. 2414 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2415 return N1.getOperand(N2C->getZExtValue()); 2416 2417 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2418 // operations are lowered to scalars. 2419 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2420 if (N1.getOperand(2) == N2) 2421 return N1.getOperand(1); 2422 else 2423 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2424 } 2425 break; 2426 case ISD::EXTRACT_ELEMENT: 2427 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2428 assert(!N1.getValueType().isVector() && !VT.isVector() && 2429 (N1.getValueType().isInteger() == VT.isInteger()) && 2430 "Wrong types for EXTRACT_ELEMENT!"); 2431 2432 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2433 // 64-bit integers into 32-bit parts. Instead of building the extract of 2434 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2435 if (N1.getOpcode() == ISD::BUILD_PAIR) 2436 return N1.getOperand(N2C->getZExtValue()); 2437 2438 // EXTRACT_ELEMENT of a constant int is also very common. 2439 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2440 unsigned ElementSize = VT.getSizeInBits(); 2441 unsigned Shift = ElementSize * N2C->getZExtValue(); 2442 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2443 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2444 } 2445 break; 2446 case ISD::EXTRACT_SUBVECTOR: 2447 if (N1.getValueType() == VT) // Trivial extraction. 2448 return N1; 2449 break; 2450 } 2451 2452 if (N1C) { 2453 if (N2C) { 2454 const APInt &C1 = N1C->getAPIntValue(), &C2 = N2C->getAPIntValue(); 2455 switch (Opcode) { 2456 case ISD::ADD: return getConstant(C1 + C2, VT); 2457 case ISD::SUB: return getConstant(C1 - C2, VT); 2458 case ISD::MUL: return getConstant(C1 * C2, VT); 2459 case ISD::UDIV: 2460 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2461 break; 2462 case ISD::UREM : 2463 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2464 break; 2465 case ISD::SDIV : 2466 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2467 break; 2468 case ISD::SREM : 2469 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2470 break; 2471 case ISD::AND : return getConstant(C1 & C2, VT); 2472 case ISD::OR : return getConstant(C1 | C2, VT); 2473 case ISD::XOR : return getConstant(C1 ^ C2, VT); 2474 case ISD::SHL : return getConstant(C1 << C2, VT); 2475 case ISD::SRL : return getConstant(C1.lshr(C2), VT); 2476 case ISD::SRA : return getConstant(C1.ashr(C2), VT); 2477 case ISD::ROTL : return getConstant(C1.rotl(C2), VT); 2478 case ISD::ROTR : return getConstant(C1.rotr(C2), VT); 2479 default: break; 2480 } 2481 } else { // Cannonicalize constant to RHS if commutative 2482 if (isCommutativeBinOp(Opcode)) { 2483 std::swap(N1C, N2C); 2484 std::swap(N1, N2); 2485 } 2486 } 2487 } 2488 2489 // Constant fold FP operations. 2490 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2491 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2492 if (N1CFP) { 2493 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2494 // Cannonicalize constant to RHS if commutative 2495 std::swap(N1CFP, N2CFP); 2496 std::swap(N1, N2); 2497 } else if (N2CFP && VT != MVT::ppcf128) { 2498 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2499 APFloat::opStatus s; 2500 switch (Opcode) { 2501 case ISD::FADD: 2502 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2503 if (s != APFloat::opInvalidOp) 2504 return getConstantFP(V1, VT); 2505 break; 2506 case ISD::FSUB: 2507 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2508 if (s!=APFloat::opInvalidOp) 2509 return getConstantFP(V1, VT); 2510 break; 2511 case ISD::FMUL: 2512 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2513 if (s!=APFloat::opInvalidOp) 2514 return getConstantFP(V1, VT); 2515 break; 2516 case ISD::FDIV: 2517 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2518 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2519 return getConstantFP(V1, VT); 2520 break; 2521 case ISD::FREM : 2522 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2523 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2524 return getConstantFP(V1, VT); 2525 break; 2526 case ISD::FCOPYSIGN: 2527 V1.copySign(V2); 2528 return getConstantFP(V1, VT); 2529 default: break; 2530 } 2531 } 2532 } 2533 2534 // Canonicalize an UNDEF to the RHS, even over a constant. 2535 if (N1.getOpcode() == ISD::UNDEF) { 2536 if (isCommutativeBinOp(Opcode)) { 2537 std::swap(N1, N2); 2538 } else { 2539 switch (Opcode) { 2540 case ISD::FP_ROUND_INREG: 2541 case ISD::SIGN_EXTEND_INREG: 2542 case ISD::SUB: 2543 case ISD::FSUB: 2544 case ISD::FDIV: 2545 case ISD::FREM: 2546 case ISD::SRA: 2547 return N1; // fold op(undef, arg2) -> undef 2548 case ISD::UDIV: 2549 case ISD::SDIV: 2550 case ISD::UREM: 2551 case ISD::SREM: 2552 case ISD::SRL: 2553 case ISD::SHL: 2554 if (!VT.isVector()) 2555 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2556 // For vectors, we can't easily build an all zero vector, just return 2557 // the LHS. 2558 return N2; 2559 } 2560 } 2561 } 2562 2563 // Fold a bunch of operators when the RHS is undef. 2564 if (N2.getOpcode() == ISD::UNDEF) { 2565 switch (Opcode) { 2566 case ISD::XOR: 2567 if (N1.getOpcode() == ISD::UNDEF) 2568 // Handle undef ^ undef -> 0 special case. This is a common 2569 // idiom (misuse). 2570 return getConstant(0, VT); 2571 // fallthrough 2572 case ISD::ADD: 2573 case ISD::ADDC: 2574 case ISD::ADDE: 2575 case ISD::SUB: 2576 case ISD::FADD: 2577 case ISD::FSUB: 2578 case ISD::FMUL: 2579 case ISD::FDIV: 2580 case ISD::FREM: 2581 case ISD::UDIV: 2582 case ISD::SDIV: 2583 case ISD::UREM: 2584 case ISD::SREM: 2585 return N2; // fold op(arg1, undef) -> undef 2586 case ISD::MUL: 2587 case ISD::AND: 2588 case ISD::SRL: 2589 case ISD::SHL: 2590 if (!VT.isVector()) 2591 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2592 // For vectors, we can't easily build an all zero vector, just return 2593 // the LHS. 2594 return N1; 2595 case ISD::OR: 2596 if (!VT.isVector()) 2597 return getConstant(VT.getIntegerVTBitMask(), VT); 2598 // For vectors, we can't easily build an all one vector, just return 2599 // the LHS. 2600 return N1; 2601 case ISD::SRA: 2602 return N1; 2603 } 2604 } 2605 2606 // Memoize this node if possible. 2607 SDNode *N; 2608 SDVTList VTs = getVTList(VT); 2609 if (VT != MVT::Flag) { 2610 SDValue Ops[] = { N1, N2 }; 2611 FoldingSetNodeID ID; 2612 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2613 void *IP = 0; 2614 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2615 return SDValue(E, 0); 2616 N = NodeAllocator.Allocate<BinarySDNode>(); 2617 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2618 CSEMap.InsertNode(N, IP); 2619 } else { 2620 N = NodeAllocator.Allocate<BinarySDNode>(); 2621 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2622 } 2623 2624 AllNodes.push_back(N); 2625#ifndef NDEBUG 2626 VerifyNode(N); 2627#endif 2628 return SDValue(N, 0); 2629} 2630 2631SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2632 SDValue N1, SDValue N2, SDValue N3) { 2633 // Perform various simplifications. 2634 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2635 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2636 switch (Opcode) { 2637 case ISD::CONCAT_VECTORS: 2638 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2639 // one big BUILD_VECTOR. 2640 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2641 N2.getOpcode() == ISD::BUILD_VECTOR && 2642 N3.getOpcode() == ISD::BUILD_VECTOR) { 2643 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2644 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2645 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2646 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2647 } 2648 break; 2649 case ISD::SETCC: { 2650 // Use FoldSetCC to simplify SETCC's. 2651 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2652 if (Simp.getNode()) return Simp; 2653 break; 2654 } 2655 case ISD::SELECT: 2656 if (N1C) { 2657 if (N1C->getZExtValue()) 2658 return N2; // select true, X, Y -> X 2659 else 2660 return N3; // select false, X, Y -> Y 2661 } 2662 2663 if (N2 == N3) return N2; // select C, X, X -> X 2664 break; 2665 case ISD::BRCOND: 2666 if (N2C) { 2667 if (N2C->getZExtValue()) // Unconditional branch 2668 return getNode(ISD::BR, MVT::Other, N1, N3); 2669 else 2670 return N1; // Never-taken branch 2671 } 2672 break; 2673 case ISD::VECTOR_SHUFFLE: 2674 assert(VT == N1.getValueType() && VT == N2.getValueType() && 2675 VT.isVector() && N3.getValueType().isVector() && 2676 N3.getOpcode() == ISD::BUILD_VECTOR && 2677 VT.getVectorNumElements() == N3.getNumOperands() && 2678 "Illegal VECTOR_SHUFFLE node!"); 2679 break; 2680 case ISD::BIT_CONVERT: 2681 // Fold bit_convert nodes from a type to themselves. 2682 if (N1.getValueType() == VT) 2683 return N1; 2684 break; 2685 } 2686 2687 // Memoize node if it doesn't produce a flag. 2688 SDNode *N; 2689 SDVTList VTs = getVTList(VT); 2690 if (VT != MVT::Flag) { 2691 SDValue Ops[] = { N1, N2, N3 }; 2692 FoldingSetNodeID ID; 2693 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2694 void *IP = 0; 2695 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2696 return SDValue(E, 0); 2697 N = NodeAllocator.Allocate<TernarySDNode>(); 2698 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2699 CSEMap.InsertNode(N, IP); 2700 } else { 2701 N = NodeAllocator.Allocate<TernarySDNode>(); 2702 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2703 } 2704 AllNodes.push_back(N); 2705#ifndef NDEBUG 2706 VerifyNode(N); 2707#endif 2708 return SDValue(N, 0); 2709} 2710 2711SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2712 SDValue N1, SDValue N2, SDValue N3, 2713 SDValue N4) { 2714 SDValue Ops[] = { N1, N2, N3, N4 }; 2715 return getNode(Opcode, VT, Ops, 4); 2716} 2717 2718SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2719 SDValue N1, SDValue N2, SDValue N3, 2720 SDValue N4, SDValue N5) { 2721 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2722 return getNode(Opcode, VT, Ops, 5); 2723} 2724 2725/// getMemsetValue - Vectorized representation of the memset value 2726/// operand. 2727static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2728 unsigned NumBits = VT.isVector() ? 2729 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2730 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2731 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2732 unsigned Shift = 8; 2733 for (unsigned i = NumBits; i > 8; i >>= 1) { 2734 Val = (Val << Shift) | Val; 2735 Shift <<= 1; 2736 } 2737 if (VT.isInteger()) 2738 return DAG.getConstant(Val, VT); 2739 return DAG.getConstantFP(APFloat(Val), VT); 2740 } 2741 2742 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2743 unsigned Shift = 8; 2744 for (unsigned i = NumBits; i > 8; i >>= 1) { 2745 Value = DAG.getNode(ISD::OR, VT, 2746 DAG.getNode(ISD::SHL, VT, Value, 2747 DAG.getConstant(Shift, MVT::i8)), Value); 2748 Shift <<= 1; 2749 } 2750 2751 return Value; 2752} 2753 2754/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2755/// used when a memcpy is turned into a memset when the source is a constant 2756/// string ptr. 2757static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2758 const TargetLowering &TLI, 2759 std::string &Str, unsigned Offset) { 2760 // Handle vector with all elements zero. 2761 if (Str.empty()) { 2762 if (VT.isInteger()) 2763 return DAG.getConstant(0, VT); 2764 unsigned NumElts = VT.getVectorNumElements(); 2765 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2766 return DAG.getNode(ISD::BIT_CONVERT, VT, 2767 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2768 } 2769 2770 assert(!VT.isVector() && "Can't handle vector type here!"); 2771 unsigned NumBits = VT.getSizeInBits(); 2772 unsigned MSB = NumBits / 8; 2773 uint64_t Val = 0; 2774 if (TLI.isLittleEndian()) 2775 Offset = Offset + MSB - 1; 2776 for (unsigned i = 0; i != MSB; ++i) { 2777 Val = (Val << 8) | (unsigned char)Str[Offset]; 2778 Offset += TLI.isLittleEndian() ? -1 : 1; 2779 } 2780 return DAG.getConstant(Val, VT); 2781} 2782 2783/// getMemBasePlusOffset - Returns base and offset node for the 2784/// 2785static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2786 SelectionDAG &DAG) { 2787 MVT VT = Base.getValueType(); 2788 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2789} 2790 2791/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2792/// 2793static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2794 unsigned SrcDelta = 0; 2795 GlobalAddressSDNode *G = NULL; 2796 if (Src.getOpcode() == ISD::GlobalAddress) 2797 G = cast<GlobalAddressSDNode>(Src); 2798 else if (Src.getOpcode() == ISD::ADD && 2799 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2800 Src.getOperand(1).getOpcode() == ISD::Constant) { 2801 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2802 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 2803 } 2804 if (!G) 2805 return false; 2806 2807 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2808 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2809 return true; 2810 2811 return false; 2812} 2813 2814/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2815/// to replace the memset / memcpy is below the threshold. It also returns the 2816/// types of the sequence of memory ops to perform memset / memcpy. 2817static 2818bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2819 SDValue Dst, SDValue Src, 2820 unsigned Limit, uint64_t Size, unsigned &Align, 2821 std::string &Str, bool &isSrcStr, 2822 SelectionDAG &DAG, 2823 const TargetLowering &TLI) { 2824 isSrcStr = isMemSrcFromString(Src, Str); 2825 bool isSrcConst = isa<ConstantSDNode>(Src); 2826 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2827 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2828 if (VT != MVT::iAny) { 2829 unsigned NewAlign = (unsigned) 2830 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2831 // If source is a string constant, this will require an unaligned load. 2832 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2833 if (Dst.getOpcode() != ISD::FrameIndex) { 2834 // Can't change destination alignment. It requires a unaligned store. 2835 if (AllowUnalign) 2836 VT = MVT::iAny; 2837 } else { 2838 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2839 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2840 if (MFI->isFixedObjectIndex(FI)) { 2841 // Can't change destination alignment. It requires a unaligned store. 2842 if (AllowUnalign) 2843 VT = MVT::iAny; 2844 } else { 2845 // Give the stack frame object a larger alignment if needed. 2846 if (MFI->getObjectAlignment(FI) < NewAlign) 2847 MFI->setObjectAlignment(FI, NewAlign); 2848 Align = NewAlign; 2849 } 2850 } 2851 } 2852 } 2853 2854 if (VT == MVT::iAny) { 2855 if (AllowUnalign) { 2856 VT = MVT::i64; 2857 } else { 2858 switch (Align & 7) { 2859 case 0: VT = MVT::i64; break; 2860 case 4: VT = MVT::i32; break; 2861 case 2: VT = MVT::i16; break; 2862 default: VT = MVT::i8; break; 2863 } 2864 } 2865 2866 MVT LVT = MVT::i64; 2867 while (!TLI.isTypeLegal(LVT)) 2868 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2869 assert(LVT.isInteger()); 2870 2871 if (VT.bitsGT(LVT)) 2872 VT = LVT; 2873 } 2874 2875 unsigned NumMemOps = 0; 2876 while (Size != 0) { 2877 unsigned VTSize = VT.getSizeInBits() / 8; 2878 while (VTSize > Size) { 2879 // For now, only use non-vector load / store's for the left-over pieces. 2880 if (VT.isVector()) { 2881 VT = MVT::i64; 2882 while (!TLI.isTypeLegal(VT)) 2883 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2884 VTSize = VT.getSizeInBits() / 8; 2885 } else { 2886 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2887 VTSize >>= 1; 2888 } 2889 } 2890 2891 if (++NumMemOps > Limit) 2892 return false; 2893 MemOps.push_back(VT); 2894 Size -= VTSize; 2895 } 2896 2897 return true; 2898} 2899 2900static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 2901 SDValue Chain, SDValue Dst, 2902 SDValue Src, uint64_t Size, 2903 unsigned Align, bool AlwaysInline, 2904 const Value *DstSV, uint64_t DstSVOff, 2905 const Value *SrcSV, uint64_t SrcSVOff){ 2906 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2907 2908 // Expand memcpy to a series of load and store ops if the size operand falls 2909 // below a certain threshold. 2910 std::vector<MVT> MemOps; 2911 uint64_t Limit = -1; 2912 if (!AlwaysInline) 2913 Limit = TLI.getMaxStoresPerMemcpy(); 2914 unsigned DstAlign = Align; // Destination alignment can change. 2915 std::string Str; 2916 bool CopyFromStr; 2917 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2918 Str, CopyFromStr, DAG, TLI)) 2919 return SDValue(); 2920 2921 2922 bool isZeroStr = CopyFromStr && Str.empty(); 2923 SmallVector<SDValue, 8> OutChains; 2924 unsigned NumMemOps = MemOps.size(); 2925 uint64_t SrcOff = 0, DstOff = 0; 2926 for (unsigned i = 0; i < NumMemOps; i++) { 2927 MVT VT = MemOps[i]; 2928 unsigned VTSize = VT.getSizeInBits() / 8; 2929 SDValue Value, Store; 2930 2931 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 2932 // It's unlikely a store of a vector immediate can be done in a single 2933 // instruction. It would require a load from a constantpool first. 2934 // We also handle store a vector with all zero's. 2935 // FIXME: Handle other cases where store of vector immediate is done in 2936 // a single instruction. 2937 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 2938 Store = DAG.getStore(Chain, Value, 2939 getMemBasePlusOffset(Dst, DstOff, DAG), 2940 DstSV, DstSVOff + DstOff, false, DstAlign); 2941 } else { 2942 Value = DAG.getLoad(VT, Chain, 2943 getMemBasePlusOffset(Src, SrcOff, DAG), 2944 SrcSV, SrcSVOff + SrcOff, false, Align); 2945 Store = DAG.getStore(Chain, Value, 2946 getMemBasePlusOffset(Dst, DstOff, DAG), 2947 DstSV, DstSVOff + DstOff, false, DstAlign); 2948 } 2949 OutChains.push_back(Store); 2950 SrcOff += VTSize; 2951 DstOff += VTSize; 2952 } 2953 2954 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2955 &OutChains[0], OutChains.size()); 2956} 2957 2958static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 2959 SDValue Chain, SDValue Dst, 2960 SDValue Src, uint64_t Size, 2961 unsigned Align, bool AlwaysInline, 2962 const Value *DstSV, uint64_t DstSVOff, 2963 const Value *SrcSV, uint64_t SrcSVOff){ 2964 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2965 2966 // Expand memmove to a series of load and store ops if the size operand falls 2967 // below a certain threshold. 2968 std::vector<MVT> MemOps; 2969 uint64_t Limit = -1; 2970 if (!AlwaysInline) 2971 Limit = TLI.getMaxStoresPerMemmove(); 2972 unsigned DstAlign = Align; // Destination alignment can change. 2973 std::string Str; 2974 bool CopyFromStr; 2975 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2976 Str, CopyFromStr, DAG, TLI)) 2977 return SDValue(); 2978 2979 uint64_t SrcOff = 0, DstOff = 0; 2980 2981 SmallVector<SDValue, 8> LoadValues; 2982 SmallVector<SDValue, 8> LoadChains; 2983 SmallVector<SDValue, 8> OutChains; 2984 unsigned NumMemOps = MemOps.size(); 2985 for (unsigned i = 0; i < NumMemOps; i++) { 2986 MVT VT = MemOps[i]; 2987 unsigned VTSize = VT.getSizeInBits() / 8; 2988 SDValue Value, Store; 2989 2990 Value = DAG.getLoad(VT, Chain, 2991 getMemBasePlusOffset(Src, SrcOff, DAG), 2992 SrcSV, SrcSVOff + SrcOff, false, Align); 2993 LoadValues.push_back(Value); 2994 LoadChains.push_back(Value.getValue(1)); 2995 SrcOff += VTSize; 2996 } 2997 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 2998 &LoadChains[0], LoadChains.size()); 2999 OutChains.clear(); 3000 for (unsigned i = 0; i < NumMemOps; i++) { 3001 MVT VT = MemOps[i]; 3002 unsigned VTSize = VT.getSizeInBits() / 8; 3003 SDValue Value, Store; 3004 3005 Store = DAG.getStore(Chain, LoadValues[i], 3006 getMemBasePlusOffset(Dst, DstOff, DAG), 3007 DstSV, DstSVOff + DstOff, false, DstAlign); 3008 OutChains.push_back(Store); 3009 DstOff += VTSize; 3010 } 3011 3012 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3013 &OutChains[0], OutChains.size()); 3014} 3015 3016static SDValue getMemsetStores(SelectionDAG &DAG, 3017 SDValue Chain, SDValue Dst, 3018 SDValue Src, uint64_t Size, 3019 unsigned Align, 3020 const Value *DstSV, uint64_t DstSVOff) { 3021 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3022 3023 // Expand memset to a series of load/store ops if the size operand 3024 // falls below a certain threshold. 3025 std::vector<MVT> MemOps; 3026 std::string Str; 3027 bool CopyFromStr; 3028 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3029 Size, Align, Str, CopyFromStr, DAG, TLI)) 3030 return SDValue(); 3031 3032 SmallVector<SDValue, 8> OutChains; 3033 uint64_t DstOff = 0; 3034 3035 unsigned NumMemOps = MemOps.size(); 3036 for (unsigned i = 0; i < NumMemOps; i++) { 3037 MVT VT = MemOps[i]; 3038 unsigned VTSize = VT.getSizeInBits() / 8; 3039 SDValue Value = getMemsetValue(Src, VT, DAG); 3040 SDValue Store = DAG.getStore(Chain, Value, 3041 getMemBasePlusOffset(Dst, DstOff, DAG), 3042 DstSV, DstSVOff + DstOff); 3043 OutChains.push_back(Store); 3044 DstOff += VTSize; 3045 } 3046 3047 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3048 &OutChains[0], OutChains.size()); 3049} 3050 3051SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3052 SDValue Src, SDValue Size, 3053 unsigned Align, bool AlwaysInline, 3054 const Value *DstSV, uint64_t DstSVOff, 3055 const Value *SrcSV, uint64_t SrcSVOff) { 3056 3057 // Check to see if we should lower the memcpy to loads and stores first. 3058 // For cases within the target-specified limits, this is the best choice. 3059 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3060 if (ConstantSize) { 3061 // Memcpy with size zero? Just return the original chain. 3062 if (ConstantSize->isNullValue()) 3063 return Chain; 3064 3065 SDValue Result = 3066 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3067 ConstantSize->getZExtValue(), 3068 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3069 if (Result.getNode()) 3070 return Result; 3071 } 3072 3073 // Then check to see if we should lower the memcpy with target-specific 3074 // code. If the target chooses to do this, this is the next best. 3075 SDValue Result = 3076 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3077 AlwaysInline, 3078 DstSV, DstSVOff, SrcSV, SrcSVOff); 3079 if (Result.getNode()) 3080 return Result; 3081 3082 // If we really need inline code and the target declined to provide it, 3083 // use a (potentially long) sequence of loads and stores. 3084 if (AlwaysInline) { 3085 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3086 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3087 ConstantSize->getZExtValue(), Align, true, 3088 DstSV, DstSVOff, SrcSV, SrcSVOff); 3089 } 3090 3091 // Emit a library call. 3092 TargetLowering::ArgListTy Args; 3093 TargetLowering::ArgListEntry Entry; 3094 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3095 Entry.Node = Dst; Args.push_back(Entry); 3096 Entry.Node = Src; Args.push_back(Entry); 3097 Entry.Node = Size; Args.push_back(Entry); 3098 std::pair<SDValue,SDValue> CallResult = 3099 TLI.LowerCallTo(Chain, Type::VoidTy, 3100 false, false, false, CallingConv::C, false, 3101 getExternalSymbol("memcpy", TLI.getPointerTy()), 3102 Args, *this); 3103 return CallResult.second; 3104} 3105 3106SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3107 SDValue Src, SDValue Size, 3108 unsigned Align, 3109 const Value *DstSV, uint64_t DstSVOff, 3110 const Value *SrcSV, uint64_t SrcSVOff) { 3111 3112 // Check to see if we should lower the memmove to loads and stores first. 3113 // For cases within the target-specified limits, this is the best choice. 3114 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3115 if (ConstantSize) { 3116 // Memmove with size zero? Just return the original chain. 3117 if (ConstantSize->isNullValue()) 3118 return Chain; 3119 3120 SDValue Result = 3121 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3122 ConstantSize->getZExtValue(), 3123 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3124 if (Result.getNode()) 3125 return Result; 3126 } 3127 3128 // Then check to see if we should lower the memmove with target-specific 3129 // code. If the target chooses to do this, this is the next best. 3130 SDValue Result = 3131 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3132 DstSV, DstSVOff, SrcSV, SrcSVOff); 3133 if (Result.getNode()) 3134 return Result; 3135 3136 // Emit a library call. 3137 TargetLowering::ArgListTy Args; 3138 TargetLowering::ArgListEntry Entry; 3139 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3140 Entry.Node = Dst; Args.push_back(Entry); 3141 Entry.Node = Src; Args.push_back(Entry); 3142 Entry.Node = Size; Args.push_back(Entry); 3143 std::pair<SDValue,SDValue> CallResult = 3144 TLI.LowerCallTo(Chain, Type::VoidTy, 3145 false, false, false, CallingConv::C, false, 3146 getExternalSymbol("memmove", TLI.getPointerTy()), 3147 Args, *this); 3148 return CallResult.second; 3149} 3150 3151SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3152 SDValue Src, SDValue Size, 3153 unsigned Align, 3154 const Value *DstSV, uint64_t DstSVOff) { 3155 3156 // Check to see if we should lower the memset to stores first. 3157 // For cases within the target-specified limits, this is the best choice. 3158 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3159 if (ConstantSize) { 3160 // Memset with size zero? Just return the original chain. 3161 if (ConstantSize->isNullValue()) 3162 return Chain; 3163 3164 SDValue Result = 3165 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3166 Align, DstSV, DstSVOff); 3167 if (Result.getNode()) 3168 return Result; 3169 } 3170 3171 // Then check to see if we should lower the memset with target-specific 3172 // code. If the target chooses to do this, this is the next best. 3173 SDValue Result = 3174 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3175 DstSV, DstSVOff); 3176 if (Result.getNode()) 3177 return Result; 3178 3179 // Emit a library call. 3180 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3181 TargetLowering::ArgListTy Args; 3182 TargetLowering::ArgListEntry Entry; 3183 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3184 Args.push_back(Entry); 3185 // Extend or truncate the argument to be an i32 value for the call. 3186 if (Src.getValueType().bitsGT(MVT::i32)) 3187 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3188 else 3189 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3190 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3191 Args.push_back(Entry); 3192 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3193 Args.push_back(Entry); 3194 std::pair<SDValue,SDValue> CallResult = 3195 TLI.LowerCallTo(Chain, Type::VoidTy, 3196 false, false, false, CallingConv::C, false, 3197 getExternalSymbol("memset", TLI.getPointerTy()), 3198 Args, *this); 3199 return CallResult.second; 3200} 3201 3202SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain, 3203 SDValue Ptr, SDValue Cmp, 3204 SDValue Swp, const Value* PtrVal, 3205 unsigned Alignment) { 3206 assert((Opcode == ISD::ATOMIC_CMP_SWAP_8 || 3207 Opcode == ISD::ATOMIC_CMP_SWAP_16 || 3208 Opcode == ISD::ATOMIC_CMP_SWAP_32 || 3209 Opcode == ISD::ATOMIC_CMP_SWAP_64) && "Invalid Atomic Op"); 3210 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3211 3212 MVT VT = Cmp.getValueType(); 3213 3214 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3215 Alignment = getMVTAlignment(VT); 3216 3217 SDVTList VTs = getVTList(VT, MVT::Other); 3218 FoldingSetNodeID ID; 3219 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3220 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3221 void* IP = 0; 3222 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3223 return SDValue(E, 0); 3224 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3225 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3226 CSEMap.InsertNode(N, IP); 3227 AllNodes.push_back(N); 3228 return SDValue(N, 0); 3229} 3230 3231SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain, 3232 SDValue Ptr, SDValue Val, 3233 const Value* PtrVal, 3234 unsigned Alignment) { 3235 assert((Opcode == ISD::ATOMIC_LOAD_ADD_8 || 3236 Opcode == ISD::ATOMIC_LOAD_SUB_8 || 3237 Opcode == ISD::ATOMIC_LOAD_AND_8 || 3238 Opcode == ISD::ATOMIC_LOAD_OR_8 || 3239 Opcode == ISD::ATOMIC_LOAD_XOR_8 || 3240 Opcode == ISD::ATOMIC_LOAD_NAND_8 || 3241 Opcode == ISD::ATOMIC_LOAD_MIN_8 || 3242 Opcode == ISD::ATOMIC_LOAD_MAX_8 || 3243 Opcode == ISD::ATOMIC_LOAD_UMIN_8 || 3244 Opcode == ISD::ATOMIC_LOAD_UMAX_8 || 3245 Opcode == ISD::ATOMIC_SWAP_8 || 3246 Opcode == ISD::ATOMIC_LOAD_ADD_16 || 3247 Opcode == ISD::ATOMIC_LOAD_SUB_16 || 3248 Opcode == ISD::ATOMIC_LOAD_AND_16 || 3249 Opcode == ISD::ATOMIC_LOAD_OR_16 || 3250 Opcode == ISD::ATOMIC_LOAD_XOR_16 || 3251 Opcode == ISD::ATOMIC_LOAD_NAND_16 || 3252 Opcode == ISD::ATOMIC_LOAD_MIN_16 || 3253 Opcode == ISD::ATOMIC_LOAD_MAX_16 || 3254 Opcode == ISD::ATOMIC_LOAD_UMIN_16 || 3255 Opcode == ISD::ATOMIC_LOAD_UMAX_16 || 3256 Opcode == ISD::ATOMIC_SWAP_16 || 3257 Opcode == ISD::ATOMIC_LOAD_ADD_32 || 3258 Opcode == ISD::ATOMIC_LOAD_SUB_32 || 3259 Opcode == ISD::ATOMIC_LOAD_AND_32 || 3260 Opcode == ISD::ATOMIC_LOAD_OR_32 || 3261 Opcode == ISD::ATOMIC_LOAD_XOR_32 || 3262 Opcode == ISD::ATOMIC_LOAD_NAND_32 || 3263 Opcode == ISD::ATOMIC_LOAD_MIN_32 || 3264 Opcode == ISD::ATOMIC_LOAD_MAX_32 || 3265 Opcode == ISD::ATOMIC_LOAD_UMIN_32 || 3266 Opcode == ISD::ATOMIC_LOAD_UMAX_32 || 3267 Opcode == ISD::ATOMIC_SWAP_32 || 3268 Opcode == ISD::ATOMIC_LOAD_ADD_64 || 3269 Opcode == ISD::ATOMIC_LOAD_SUB_64 || 3270 Opcode == ISD::ATOMIC_LOAD_AND_64 || 3271 Opcode == ISD::ATOMIC_LOAD_OR_64 || 3272 Opcode == ISD::ATOMIC_LOAD_XOR_64 || 3273 Opcode == ISD::ATOMIC_LOAD_NAND_64 || 3274 Opcode == ISD::ATOMIC_LOAD_MIN_64 || 3275 Opcode == ISD::ATOMIC_LOAD_MAX_64 || 3276 Opcode == ISD::ATOMIC_LOAD_UMIN_64 || 3277 Opcode == ISD::ATOMIC_LOAD_UMAX_64 || 3278 Opcode == ISD::ATOMIC_SWAP_64) && "Invalid Atomic Op"); 3279 3280 MVT VT = Val.getValueType(); 3281 3282 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3283 Alignment = getMVTAlignment(VT); 3284 3285 SDVTList VTs = getVTList(VT, MVT::Other); 3286 FoldingSetNodeID ID; 3287 SDValue Ops[] = {Chain, Ptr, Val}; 3288 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3289 void* IP = 0; 3290 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3291 return SDValue(E, 0); 3292 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3293 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment); 3294 CSEMap.InsertNode(N, IP); 3295 AllNodes.push_back(N); 3296 return SDValue(N, 0); 3297} 3298 3299/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3300/// Allowed to return something different (and simpler) if Simplify is true. 3301SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3302 bool Simplify) { 3303 if (Simplify && NumOps == 1) 3304 return Ops[0]; 3305 3306 SmallVector<MVT, 4> VTs; 3307 VTs.reserve(NumOps); 3308 for (unsigned i = 0; i < NumOps; ++i) 3309 VTs.push_back(Ops[i].getValueType()); 3310 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3311} 3312 3313SDValue 3314SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3315 SDVTList VTs, 3316 const SDValue *Operands, unsigned NumOperands) { 3317 // Do not include isTailCall in the folding set profile. 3318 FoldingSetNodeID ID; 3319 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3320 ID.AddInteger(CallingConv); 3321 ID.AddInteger(IsVarArgs); 3322 void *IP = 0; 3323 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3324 // Instead of including isTailCall in the folding set, we just 3325 // set the flag of the existing node. 3326 if (!IsTailCall) 3327 cast<CallSDNode>(E)->setNotTailCall(); 3328 return SDValue(E, 0); 3329 } 3330 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3331 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, 3332 VTs, Operands, NumOperands); 3333 CSEMap.InsertNode(N, IP); 3334 AllNodes.push_back(N); 3335 return SDValue(N, 0); 3336} 3337 3338SDValue 3339SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3340 MVT VT, SDValue Chain, 3341 SDValue Ptr, SDValue Offset, 3342 const Value *SV, int SVOffset, MVT EVT, 3343 bool isVolatile, unsigned Alignment) { 3344 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3345 Alignment = getMVTAlignment(VT); 3346 3347 if (VT == EVT) { 3348 ExtType = ISD::NON_EXTLOAD; 3349 } else if (ExtType == ISD::NON_EXTLOAD) { 3350 assert(VT == EVT && "Non-extending load from different memory type!"); 3351 } else { 3352 // Extending load. 3353 if (VT.isVector()) 3354 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3355 "Invalid vector extload!"); 3356 else 3357 assert(EVT.bitsLT(VT) && 3358 "Should only be an extending load, not truncating!"); 3359 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3360 "Cannot sign/zero extend a FP/Vector load!"); 3361 assert(VT.isInteger() == EVT.isInteger() && 3362 "Cannot convert from FP to Int or Int -> FP!"); 3363 } 3364 3365 bool Indexed = AM != ISD::UNINDEXED; 3366 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3367 "Unindexed load with an offset!"); 3368 3369 SDVTList VTs = Indexed ? 3370 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3371 SDValue Ops[] = { Chain, Ptr, Offset }; 3372 FoldingSetNodeID ID; 3373 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3374 ID.AddInteger(AM); 3375 ID.AddInteger(ExtType); 3376 ID.AddInteger(EVT.getRawBits()); 3377 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3378 void *IP = 0; 3379 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3380 return SDValue(E, 0); 3381 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3382 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3383 Alignment, isVolatile); 3384 CSEMap.InsertNode(N, IP); 3385 AllNodes.push_back(N); 3386 return SDValue(N, 0); 3387} 3388 3389SDValue SelectionDAG::getLoad(MVT VT, 3390 SDValue Chain, SDValue Ptr, 3391 const Value *SV, int SVOffset, 3392 bool isVolatile, unsigned Alignment) { 3393 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3394 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3395 SV, SVOffset, VT, isVolatile, Alignment); 3396} 3397 3398SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3399 SDValue Chain, SDValue Ptr, 3400 const Value *SV, 3401 int SVOffset, MVT EVT, 3402 bool isVolatile, unsigned Alignment) { 3403 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3404 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3405 SV, SVOffset, EVT, isVolatile, Alignment); 3406} 3407 3408SDValue 3409SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3410 SDValue Offset, ISD::MemIndexedMode AM) { 3411 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3412 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3413 "Load is already a indexed load!"); 3414 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3415 LD->getChain(), Base, Offset, LD->getSrcValue(), 3416 LD->getSrcValueOffset(), LD->getMemoryVT(), 3417 LD->isVolatile(), LD->getAlignment()); 3418} 3419 3420SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3421 SDValue Ptr, const Value *SV, int SVOffset, 3422 bool isVolatile, unsigned Alignment) { 3423 MVT VT = Val.getValueType(); 3424 3425 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3426 Alignment = getMVTAlignment(VT); 3427 3428 SDVTList VTs = getVTList(MVT::Other); 3429 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3430 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3431 FoldingSetNodeID ID; 3432 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3433 ID.AddInteger(ISD::UNINDEXED); 3434 ID.AddInteger(false); 3435 ID.AddInteger(VT.getRawBits()); 3436 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3437 void *IP = 0; 3438 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3439 return SDValue(E, 0); 3440 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3441 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3442 VT, SV, SVOffset, Alignment, isVolatile); 3443 CSEMap.InsertNode(N, IP); 3444 AllNodes.push_back(N); 3445 return SDValue(N, 0); 3446} 3447 3448SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3449 SDValue Ptr, const Value *SV, 3450 int SVOffset, MVT SVT, 3451 bool isVolatile, unsigned Alignment) { 3452 MVT VT = Val.getValueType(); 3453 3454 if (VT == SVT) 3455 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3456 3457 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3458 assert(VT.isInteger() == SVT.isInteger() && 3459 "Can't do FP-INT conversion!"); 3460 3461 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3462 Alignment = getMVTAlignment(VT); 3463 3464 SDVTList VTs = getVTList(MVT::Other); 3465 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3466 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3467 FoldingSetNodeID ID; 3468 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3469 ID.AddInteger(ISD::UNINDEXED); 3470 ID.AddInteger(1); 3471 ID.AddInteger(SVT.getRawBits()); 3472 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3473 void *IP = 0; 3474 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3475 return SDValue(E, 0); 3476 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3477 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3478 SVT, SV, SVOffset, Alignment, isVolatile); 3479 CSEMap.InsertNode(N, IP); 3480 AllNodes.push_back(N); 3481 return SDValue(N, 0); 3482} 3483 3484SDValue 3485SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3486 SDValue Offset, ISD::MemIndexedMode AM) { 3487 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3488 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3489 "Store is already a indexed store!"); 3490 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3491 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3492 FoldingSetNodeID ID; 3493 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3494 ID.AddInteger(AM); 3495 ID.AddInteger(ST->isTruncatingStore()); 3496 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3497 ID.AddInteger(ST->getRawFlags()); 3498 void *IP = 0; 3499 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3500 return SDValue(E, 0); 3501 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3502 new (N) StoreSDNode(Ops, VTs, AM, 3503 ST->isTruncatingStore(), ST->getMemoryVT(), 3504 ST->getSrcValue(), ST->getSrcValueOffset(), 3505 ST->getAlignment(), ST->isVolatile()); 3506 CSEMap.InsertNode(N, IP); 3507 AllNodes.push_back(N); 3508 return SDValue(N, 0); 3509} 3510 3511SDValue SelectionDAG::getVAArg(MVT VT, 3512 SDValue Chain, SDValue Ptr, 3513 SDValue SV) { 3514 SDValue Ops[] = { Chain, Ptr, SV }; 3515 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3516} 3517 3518SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3519 const SDUse *Ops, unsigned NumOps) { 3520 switch (NumOps) { 3521 case 0: return getNode(Opcode, VT); 3522 case 1: return getNode(Opcode, VT, Ops[0]); 3523 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3524 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3525 default: break; 3526 } 3527 3528 // Copy from an SDUse array into an SDValue array for use with 3529 // the regular getNode logic. 3530 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3531 return getNode(Opcode, VT, &NewOps[0], NumOps); 3532} 3533 3534SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3535 const SDValue *Ops, unsigned NumOps) { 3536 switch (NumOps) { 3537 case 0: return getNode(Opcode, VT); 3538 case 1: return getNode(Opcode, VT, Ops[0]); 3539 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3540 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3541 default: break; 3542 } 3543 3544 switch (Opcode) { 3545 default: break; 3546 case ISD::SELECT_CC: { 3547 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3548 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3549 "LHS and RHS of condition must have same type!"); 3550 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3551 "True and False arms of SelectCC must have same type!"); 3552 assert(Ops[2].getValueType() == VT && 3553 "select_cc node must be of same type as true and false value!"); 3554 break; 3555 } 3556 case ISD::BR_CC: { 3557 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3558 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3559 "LHS/RHS of comparison should match types!"); 3560 break; 3561 } 3562 } 3563 3564 // Memoize nodes. 3565 SDNode *N; 3566 SDVTList VTs = getVTList(VT); 3567 if (VT != MVT::Flag) { 3568 FoldingSetNodeID ID; 3569 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3570 void *IP = 0; 3571 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3572 return SDValue(E, 0); 3573 N = NodeAllocator.Allocate<SDNode>(); 3574 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3575 CSEMap.InsertNode(N, IP); 3576 } else { 3577 N = NodeAllocator.Allocate<SDNode>(); 3578 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3579 } 3580 AllNodes.push_back(N); 3581#ifndef NDEBUG 3582 VerifyNode(N); 3583#endif 3584 return SDValue(N, 0); 3585} 3586 3587SDValue SelectionDAG::getNode(unsigned Opcode, 3588 const std::vector<MVT> &ResultTys, 3589 const SDValue *Ops, unsigned NumOps) { 3590 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3591 Ops, NumOps); 3592} 3593 3594SDValue SelectionDAG::getNode(unsigned Opcode, 3595 const MVT *VTs, unsigned NumVTs, 3596 const SDValue *Ops, unsigned NumOps) { 3597 if (NumVTs == 1) 3598 return getNode(Opcode, VTs[0], Ops, NumOps); 3599 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3600} 3601 3602SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3603 const SDValue *Ops, unsigned NumOps) { 3604 if (VTList.NumVTs == 1) 3605 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3606 3607 switch (Opcode) { 3608 // FIXME: figure out how to safely handle things like 3609 // int foo(int x) { return 1 << (x & 255); } 3610 // int bar() { return foo(256); } 3611#if 0 3612 case ISD::SRA_PARTS: 3613 case ISD::SRL_PARTS: 3614 case ISD::SHL_PARTS: 3615 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3616 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3617 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3618 else if (N3.getOpcode() == ISD::AND) 3619 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3620 // If the and is only masking out bits that cannot effect the shift, 3621 // eliminate the and. 3622 unsigned NumBits = VT.getSizeInBits()*2; 3623 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3624 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3625 } 3626 break; 3627#endif 3628 } 3629 3630 // Memoize the node unless it returns a flag. 3631 SDNode *N; 3632 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3633 FoldingSetNodeID ID; 3634 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3635 void *IP = 0; 3636 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3637 return SDValue(E, 0); 3638 if (NumOps == 1) { 3639 N = NodeAllocator.Allocate<UnarySDNode>(); 3640 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3641 } else if (NumOps == 2) { 3642 N = NodeAllocator.Allocate<BinarySDNode>(); 3643 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3644 } else if (NumOps == 3) { 3645 N = NodeAllocator.Allocate<TernarySDNode>(); 3646 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3647 } else { 3648 N = NodeAllocator.Allocate<SDNode>(); 3649 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3650 } 3651 CSEMap.InsertNode(N, IP); 3652 } else { 3653 if (NumOps == 1) { 3654 N = NodeAllocator.Allocate<UnarySDNode>(); 3655 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3656 } else if (NumOps == 2) { 3657 N = NodeAllocator.Allocate<BinarySDNode>(); 3658 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3659 } else if (NumOps == 3) { 3660 N = NodeAllocator.Allocate<TernarySDNode>(); 3661 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3662 } else { 3663 N = NodeAllocator.Allocate<SDNode>(); 3664 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3665 } 3666 } 3667 AllNodes.push_back(N); 3668#ifndef NDEBUG 3669 VerifyNode(N); 3670#endif 3671 return SDValue(N, 0); 3672} 3673 3674SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3675 return getNode(Opcode, VTList, 0, 0); 3676} 3677 3678SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3679 SDValue N1) { 3680 SDValue Ops[] = { N1 }; 3681 return getNode(Opcode, VTList, Ops, 1); 3682} 3683 3684SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3685 SDValue N1, SDValue N2) { 3686 SDValue Ops[] = { N1, N2 }; 3687 return getNode(Opcode, VTList, Ops, 2); 3688} 3689 3690SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3691 SDValue N1, SDValue N2, SDValue N3) { 3692 SDValue Ops[] = { N1, N2, N3 }; 3693 return getNode(Opcode, VTList, Ops, 3); 3694} 3695 3696SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3697 SDValue N1, SDValue N2, SDValue N3, 3698 SDValue N4) { 3699 SDValue Ops[] = { N1, N2, N3, N4 }; 3700 return getNode(Opcode, VTList, Ops, 4); 3701} 3702 3703SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3704 SDValue N1, SDValue N2, SDValue N3, 3705 SDValue N4, SDValue N5) { 3706 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3707 return getNode(Opcode, VTList, Ops, 5); 3708} 3709 3710SDVTList SelectionDAG::getVTList(MVT VT) { 3711 return makeVTList(SDNode::getValueTypeList(VT), 1); 3712} 3713 3714SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3715 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3716 E = VTList.rend(); I != E; ++I) 3717 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 3718 return *I; 3719 3720 MVT *Array = Allocator.Allocate<MVT>(2); 3721 Array[0] = VT1; 3722 Array[1] = VT2; 3723 SDVTList Result = makeVTList(Array, 2); 3724 VTList.push_back(Result); 3725 return Result; 3726} 3727 3728SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 3729 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3730 E = VTList.rend(); I != E; ++I) 3731 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3732 I->VTs[2] == VT3) 3733 return *I; 3734 3735 MVT *Array = Allocator.Allocate<MVT>(3); 3736 Array[0] = VT1; 3737 Array[1] = VT2; 3738 Array[2] = VT3; 3739 SDVTList Result = makeVTList(Array, 3); 3740 VTList.push_back(Result); 3741 return Result; 3742} 3743 3744SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3745 switch (NumVTs) { 3746 case 0: assert(0 && "Cannot have nodes without results!"); 3747 case 1: return getVTList(VTs[0]); 3748 case 2: return getVTList(VTs[0], VTs[1]); 3749 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3750 default: break; 3751 } 3752 3753 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3754 E = VTList.rend(); I != E; ++I) { 3755 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 3756 continue; 3757 3758 bool NoMatch = false; 3759 for (unsigned i = 2; i != NumVTs; ++i) 3760 if (VTs[i] != I->VTs[i]) { 3761 NoMatch = true; 3762 break; 3763 } 3764 if (!NoMatch) 3765 return *I; 3766 } 3767 3768 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 3769 std::copy(VTs, VTs+NumVTs, Array); 3770 SDVTList Result = makeVTList(Array, NumVTs); 3771 VTList.push_back(Result); 3772 return Result; 3773} 3774 3775 3776/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3777/// specified operands. If the resultant node already exists in the DAG, 3778/// this does not modify the specified node, instead it returns the node that 3779/// already exists. If the resultant node does not exist in the DAG, the 3780/// input node is returned. As a degenerate case, if you specify the same 3781/// input operands as the node already has, the input node is returned. 3782SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 3783 SDNode *N = InN.getNode(); 3784 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3785 3786 // Check to see if there is no change. 3787 if (Op == N->getOperand(0)) return InN; 3788 3789 // See if the modified node already exists. 3790 void *InsertPos = 0; 3791 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3792 return SDValue(Existing, InN.getResNo()); 3793 3794 // Nope it doesn't. Remove the node from its current place in the maps. 3795 if (InsertPos) 3796 if (!RemoveNodeFromCSEMaps(N)) 3797 InsertPos = 0; 3798 3799 // Now we update the operands. 3800 N->OperandList[0].getVal()->removeUser(0, N); 3801 N->OperandList[0] = Op; 3802 N->OperandList[0].setUser(N); 3803 Op.getNode()->addUser(0, N); 3804 3805 // If this gets put into a CSE map, add it. 3806 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3807 return InN; 3808} 3809 3810SDValue SelectionDAG:: 3811UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 3812 SDNode *N = InN.getNode(); 3813 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3814 3815 // Check to see if there is no change. 3816 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3817 return InN; // No operands changed, just return the input node. 3818 3819 // See if the modified node already exists. 3820 void *InsertPos = 0; 3821 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3822 return SDValue(Existing, InN.getResNo()); 3823 3824 // Nope it doesn't. Remove the node from its current place in the maps. 3825 if (InsertPos) 3826 if (!RemoveNodeFromCSEMaps(N)) 3827 InsertPos = 0; 3828 3829 // Now we update the operands. 3830 if (N->OperandList[0] != Op1) { 3831 N->OperandList[0].getVal()->removeUser(0, N); 3832 N->OperandList[0] = Op1; 3833 N->OperandList[0].setUser(N); 3834 Op1.getNode()->addUser(0, N); 3835 } 3836 if (N->OperandList[1] != Op2) { 3837 N->OperandList[1].getVal()->removeUser(1, N); 3838 N->OperandList[1] = Op2; 3839 N->OperandList[1].setUser(N); 3840 Op2.getNode()->addUser(1, N); 3841 } 3842 3843 // If this gets put into a CSE map, add it. 3844 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3845 return InN; 3846} 3847 3848SDValue SelectionDAG:: 3849UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 3850 SDValue Ops[] = { Op1, Op2, Op3 }; 3851 return UpdateNodeOperands(N, Ops, 3); 3852} 3853 3854SDValue SelectionDAG:: 3855UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3856 SDValue Op3, SDValue Op4) { 3857 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 3858 return UpdateNodeOperands(N, Ops, 4); 3859} 3860 3861SDValue SelectionDAG:: 3862UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3863 SDValue Op3, SDValue Op4, SDValue Op5) { 3864 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3865 return UpdateNodeOperands(N, Ops, 5); 3866} 3867 3868SDValue SelectionDAG:: 3869UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 3870 SDNode *N = InN.getNode(); 3871 assert(N->getNumOperands() == NumOps && 3872 "Update with wrong number of operands"); 3873 3874 // Check to see if there is no change. 3875 bool AnyChange = false; 3876 for (unsigned i = 0; i != NumOps; ++i) { 3877 if (Ops[i] != N->getOperand(i)) { 3878 AnyChange = true; 3879 break; 3880 } 3881 } 3882 3883 // No operands changed, just return the input node. 3884 if (!AnyChange) return InN; 3885 3886 // See if the modified node already exists. 3887 void *InsertPos = 0; 3888 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3889 return SDValue(Existing, InN.getResNo()); 3890 3891 // Nope it doesn't. Remove the node from its current place in the maps. 3892 if (InsertPos) 3893 if (!RemoveNodeFromCSEMaps(N)) 3894 InsertPos = 0; 3895 3896 // Now we update the operands. 3897 for (unsigned i = 0; i != NumOps; ++i) { 3898 if (N->OperandList[i] != Ops[i]) { 3899 N->OperandList[i].getVal()->removeUser(i, N); 3900 N->OperandList[i] = Ops[i]; 3901 N->OperandList[i].setUser(N); 3902 Ops[i].getNode()->addUser(i, N); 3903 } 3904 } 3905 3906 // If this gets put into a CSE map, add it. 3907 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3908 return InN; 3909} 3910 3911/// DropOperands - Release the operands and set this node to have 3912/// zero operands. 3913void SDNode::DropOperands() { 3914 // Unlike the code in MorphNodeTo that does this, we don't need to 3915 // watch for dead nodes here. 3916 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 3917 I->getVal()->removeUser(std::distance(op_begin(), I), this); 3918 3919 NumOperands = 0; 3920} 3921 3922/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 3923/// machine opcode. 3924/// 3925SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3926 MVT VT) { 3927 SDVTList VTs = getVTList(VT); 3928 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 3929} 3930 3931SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3932 MVT VT, SDValue Op1) { 3933 SDVTList VTs = getVTList(VT); 3934 SDValue Ops[] = { Op1 }; 3935 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 3936} 3937 3938SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3939 MVT VT, SDValue Op1, 3940 SDValue Op2) { 3941 SDVTList VTs = getVTList(VT); 3942 SDValue Ops[] = { Op1, Op2 }; 3943 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 3944} 3945 3946SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3947 MVT VT, SDValue Op1, 3948 SDValue Op2, SDValue Op3) { 3949 SDVTList VTs = getVTList(VT); 3950 SDValue Ops[] = { Op1, Op2, Op3 }; 3951 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 3952} 3953 3954SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3955 MVT VT, const SDValue *Ops, 3956 unsigned NumOps) { 3957 SDVTList VTs = getVTList(VT); 3958 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3959} 3960 3961SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3962 MVT VT1, MVT VT2, const SDValue *Ops, 3963 unsigned NumOps) { 3964 SDVTList VTs = getVTList(VT1, VT2); 3965 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3966} 3967 3968SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3969 MVT VT1, MVT VT2) { 3970 SDVTList VTs = getVTList(VT1, VT2); 3971 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 3972} 3973 3974SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3975 MVT VT1, MVT VT2, MVT VT3, 3976 const SDValue *Ops, unsigned NumOps) { 3977 SDVTList VTs = getVTList(VT1, VT2, VT3); 3978 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3979} 3980 3981SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3982 MVT VT1, MVT VT2, 3983 SDValue Op1) { 3984 SDVTList VTs = getVTList(VT1, VT2); 3985 SDValue Ops[] = { Op1 }; 3986 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 3987} 3988 3989SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3990 MVT VT1, MVT VT2, 3991 SDValue Op1, SDValue Op2) { 3992 SDVTList VTs = getVTList(VT1, VT2); 3993 SDValue Ops[] = { Op1, Op2 }; 3994 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 3995} 3996 3997SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3998 MVT VT1, MVT VT2, 3999 SDValue Op1, SDValue Op2, 4000 SDValue Op3) { 4001 SDVTList VTs = getVTList(VT1, VT2); 4002 SDValue Ops[] = { Op1, Op2, Op3 }; 4003 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4004} 4005 4006SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4007 SDVTList VTs, const SDValue *Ops, 4008 unsigned NumOps) { 4009 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4010} 4011 4012SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4013 MVT VT) { 4014 SDVTList VTs = getVTList(VT); 4015 return MorphNodeTo(N, Opc, VTs, 0, 0); 4016} 4017 4018SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4019 MVT VT, SDValue Op1) { 4020 SDVTList VTs = getVTList(VT); 4021 SDValue Ops[] = { Op1 }; 4022 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4023} 4024 4025SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4026 MVT VT, SDValue Op1, 4027 SDValue Op2) { 4028 SDVTList VTs = getVTList(VT); 4029 SDValue Ops[] = { Op1, Op2 }; 4030 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4031} 4032 4033SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4034 MVT VT, SDValue Op1, 4035 SDValue Op2, SDValue Op3) { 4036 SDVTList VTs = getVTList(VT); 4037 SDValue Ops[] = { Op1, Op2, Op3 }; 4038 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4039} 4040 4041SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4042 MVT VT, const SDValue *Ops, 4043 unsigned NumOps) { 4044 SDVTList VTs = getVTList(VT); 4045 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4046} 4047 4048SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4049 MVT VT1, MVT VT2, const SDValue *Ops, 4050 unsigned NumOps) { 4051 SDVTList VTs = getVTList(VT1, VT2); 4052 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4053} 4054 4055SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4056 MVT VT1, MVT VT2) { 4057 SDVTList VTs = getVTList(VT1, VT2); 4058 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4059} 4060 4061SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4062 MVT VT1, MVT VT2, MVT VT3, 4063 const SDValue *Ops, unsigned NumOps) { 4064 SDVTList VTs = getVTList(VT1, VT2, VT3); 4065 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4066} 4067 4068SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4069 MVT VT1, MVT VT2, 4070 SDValue Op1) { 4071 SDVTList VTs = getVTList(VT1, VT2); 4072 SDValue Ops[] = { Op1 }; 4073 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4074} 4075 4076SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4077 MVT VT1, MVT VT2, 4078 SDValue Op1, SDValue Op2) { 4079 SDVTList VTs = getVTList(VT1, VT2); 4080 SDValue Ops[] = { Op1, Op2 }; 4081 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4082} 4083 4084SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4085 MVT VT1, MVT VT2, 4086 SDValue Op1, SDValue Op2, 4087 SDValue Op3) { 4088 SDVTList VTs = getVTList(VT1, VT2); 4089 SDValue Ops[] = { Op1, Op2, Op3 }; 4090 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4091} 4092 4093/// MorphNodeTo - These *mutate* the specified node to have the specified 4094/// return type, opcode, and operands. 4095/// 4096/// Note that MorphNodeTo returns the resultant node. If there is already a 4097/// node of the specified opcode and operands, it returns that node instead of 4098/// the current one. 4099/// 4100/// Using MorphNodeTo is faster than creating a new node and swapping it in 4101/// with ReplaceAllUsesWith both because it often avoids allocating a new 4102/// node, and because it doesn't require CSE recalculation for any of 4103/// the node's users. 4104/// 4105SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4106 SDVTList VTs, const SDValue *Ops, 4107 unsigned NumOps) { 4108 // If an identical node already exists, use it. 4109 void *IP = 0; 4110 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4111 FoldingSetNodeID ID; 4112 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4113 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4114 return ON; 4115 } 4116 4117 if (!RemoveNodeFromCSEMaps(N)) 4118 IP = 0; 4119 4120 // Start the morphing. 4121 N->NodeType = Opc; 4122 N->ValueList = VTs.VTs; 4123 N->NumValues = VTs.NumVTs; 4124 4125 // Clear the operands list, updating used nodes to remove this from their 4126 // use list. Keep track of any operands that become dead as a result. 4127 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4128 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end(); 4129 I != E; ++I) { 4130 SDNode *Used = I->getVal(); 4131 Used->removeUser(std::distance(B, I), N); 4132 if (Used->use_empty()) 4133 DeadNodeSet.insert(Used); 4134 } 4135 4136 // If NumOps is larger than the # of operands we currently have, reallocate 4137 // the operand list. 4138 if (NumOps > N->NumOperands) { 4139 if (N->OperandsNeedDelete) 4140 delete[] N->OperandList; 4141 if (N->isMachineOpcode()) { 4142 // We're creating a final node that will live unmorphed for the 4143 // remainder of the current SelectionDAG iteration, so we can allocate 4144 // the operands directly out of a pool with no recycling metadata. 4145 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4146 N->OperandsNeedDelete = false; 4147 } else { 4148 N->OperandList = new SDUse[NumOps]; 4149 N->OperandsNeedDelete = true; 4150 } 4151 } 4152 4153 // Assign the new operands. 4154 N->NumOperands = NumOps; 4155 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4156 N->OperandList[i] = Ops[i]; 4157 N->OperandList[i].setUser(N); 4158 SDNode *ToUse = N->OperandList[i].getVal(); 4159 ToUse->addUser(i, N); 4160 } 4161 4162 // Delete any nodes that are still dead after adding the uses for the 4163 // new operands. 4164 SmallVector<SDNode *, 16> DeadNodes; 4165 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4166 E = DeadNodeSet.end(); I != E; ++I) 4167 if ((*I)->use_empty()) 4168 DeadNodes.push_back(*I); 4169 RemoveDeadNodes(DeadNodes); 4170 4171 if (IP) 4172 CSEMap.InsertNode(N, IP); // Memoize the new node. 4173 return N; 4174} 4175 4176 4177/// getTargetNode - These are used for target selectors to create a new node 4178/// with specified return type(s), target opcode, and operands. 4179/// 4180/// Note that getTargetNode returns the resultant node. If there is already a 4181/// node of the specified opcode and operands, it returns that node instead of 4182/// the current one. 4183SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4184 return getNode(~Opcode, VT).getNode(); 4185} 4186SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4187 return getNode(~Opcode, VT, Op1).getNode(); 4188} 4189SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4190 SDValue Op1, SDValue Op2) { 4191 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4192} 4193SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4194 SDValue Op1, SDValue Op2, 4195 SDValue Op3) { 4196 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4197} 4198SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4199 const SDValue *Ops, unsigned NumOps) { 4200 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4201} 4202SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4203 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4204 SDValue Op; 4205 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4206} 4207SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4208 MVT VT2, SDValue Op1) { 4209 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4210 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4211} 4212SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4213 MVT VT2, SDValue Op1, 4214 SDValue Op2) { 4215 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4216 SDValue Ops[] = { Op1, Op2 }; 4217 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4218} 4219SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4220 MVT VT2, SDValue Op1, 4221 SDValue Op2, SDValue Op3) { 4222 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4223 SDValue Ops[] = { Op1, Op2, Op3 }; 4224 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4225} 4226SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4227 const SDValue *Ops, unsigned NumOps) { 4228 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4229 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4230} 4231SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4232 SDValue Op1, SDValue Op2) { 4233 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4234 SDValue Ops[] = { Op1, Op2 }; 4235 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4236} 4237SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4238 SDValue Op1, SDValue Op2, 4239 SDValue Op3) { 4240 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4241 SDValue Ops[] = { Op1, Op2, Op3 }; 4242 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4243} 4244SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4245 const SDValue *Ops, unsigned NumOps) { 4246 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4247 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4248} 4249SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4250 MVT VT2, MVT VT3, MVT VT4, 4251 const SDValue *Ops, unsigned NumOps) { 4252 std::vector<MVT> VTList; 4253 VTList.push_back(VT1); 4254 VTList.push_back(VT2); 4255 VTList.push_back(VT3); 4256 VTList.push_back(VT4); 4257 const MVT *VTs = getNodeValueTypes(VTList); 4258 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4259} 4260SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4261 const std::vector<MVT> &ResultTys, 4262 const SDValue *Ops, unsigned NumOps) { 4263 const MVT *VTs = getNodeValueTypes(ResultTys); 4264 return getNode(~Opcode, VTs, ResultTys.size(), 4265 Ops, NumOps).getNode(); 4266} 4267 4268/// getNodeIfExists - Get the specified node if it's already available, or 4269/// else return NULL. 4270SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4271 const SDValue *Ops, unsigned NumOps) { 4272 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4273 FoldingSetNodeID ID; 4274 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4275 void *IP = 0; 4276 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4277 return E; 4278 } 4279 return NULL; 4280} 4281 4282 4283/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4284/// This can cause recursive merging of nodes in the DAG. 4285/// 4286/// This version assumes From has a single result value. 4287/// 4288void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4289 DAGUpdateListener *UpdateListener) { 4290 SDNode *From = FromN.getNode(); 4291 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4292 "Cannot replace with this method!"); 4293 assert(From != To.getNode() && "Cannot replace uses of with self"); 4294 4295 while (!From->use_empty()) { 4296 SDNode::use_iterator UI = From->use_begin(); 4297 SDNode *U = *UI; 4298 4299 // This node is about to morph, remove its old self from the CSE maps. 4300 RemoveNodeFromCSEMaps(U); 4301 int operandNum = 0; 4302 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4303 I != E; ++I, ++operandNum) 4304 if (I->getVal() == From) { 4305 From->removeUser(operandNum, U); 4306 *I = To; 4307 I->setUser(U); 4308 To.getNode()->addUser(operandNum, U); 4309 } 4310 4311 // Now that we have modified U, add it back to the CSE maps. If it already 4312 // exists there, recursively merge the results together. 4313 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4314 ReplaceAllUsesWith(U, Existing, UpdateListener); 4315 // U is now dead. Inform the listener if it exists and delete it. 4316 if (UpdateListener) 4317 UpdateListener->NodeDeleted(U, Existing); 4318 DeleteNodeNotInCSEMaps(U); 4319 } else { 4320 // If the node doesn't already exist, we updated it. Inform a listener if 4321 // it exists. 4322 if (UpdateListener) 4323 UpdateListener->NodeUpdated(U); 4324 } 4325 } 4326} 4327 4328/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4329/// This can cause recursive merging of nodes in the DAG. 4330/// 4331/// This version assumes From/To have matching types and numbers of result 4332/// values. 4333/// 4334void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4335 DAGUpdateListener *UpdateListener) { 4336 assert(From->getVTList().VTs == To->getVTList().VTs && 4337 From->getNumValues() == To->getNumValues() && 4338 "Cannot use this version of ReplaceAllUsesWith!"); 4339 4340 // Handle the trivial case. 4341 if (From == To) 4342 return; 4343 4344 while (!From->use_empty()) { 4345 SDNode::use_iterator UI = From->use_begin(); 4346 SDNode *U = *UI; 4347 4348 // This node is about to morph, remove its old self from the CSE maps. 4349 RemoveNodeFromCSEMaps(U); 4350 int operandNum = 0; 4351 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4352 I != E; ++I, ++operandNum) 4353 if (I->getVal() == From) { 4354 From->removeUser(operandNum, U); 4355 I->getSDValue().setNode(To); 4356 To->addUser(operandNum, U); 4357 } 4358 4359 // Now that we have modified U, add it back to the CSE maps. If it already 4360 // exists there, recursively merge the results together. 4361 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4362 ReplaceAllUsesWith(U, Existing, UpdateListener); 4363 // U is now dead. Inform the listener if it exists and delete it. 4364 if (UpdateListener) 4365 UpdateListener->NodeDeleted(U, Existing); 4366 DeleteNodeNotInCSEMaps(U); 4367 } else { 4368 // If the node doesn't already exist, we updated it. Inform a listener if 4369 // it exists. 4370 if (UpdateListener) 4371 UpdateListener->NodeUpdated(U); 4372 } 4373 } 4374} 4375 4376/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4377/// This can cause recursive merging of nodes in the DAG. 4378/// 4379/// This version can replace From with any result values. To must match the 4380/// number and types of values returned by From. 4381void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4382 const SDValue *To, 4383 DAGUpdateListener *UpdateListener) { 4384 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4385 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4386 4387 while (!From->use_empty()) { 4388 SDNode::use_iterator UI = From->use_begin(); 4389 SDNode *U = *UI; 4390 4391 // This node is about to morph, remove its old self from the CSE maps. 4392 RemoveNodeFromCSEMaps(U); 4393 int operandNum = 0; 4394 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4395 I != E; ++I, ++operandNum) 4396 if (I->getVal() == From) { 4397 const SDValue &ToOp = To[I->getSDValue().getResNo()]; 4398 From->removeUser(operandNum, U); 4399 *I = ToOp; 4400 I->setUser(U); 4401 ToOp.getNode()->addUser(operandNum, U); 4402 } 4403 4404 // Now that we have modified U, add it back to the CSE maps. If it already 4405 // exists there, recursively merge the results together. 4406 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4407 ReplaceAllUsesWith(U, Existing, UpdateListener); 4408 // U is now dead. Inform the listener if it exists and delete it. 4409 if (UpdateListener) 4410 UpdateListener->NodeDeleted(U, Existing); 4411 DeleteNodeNotInCSEMaps(U); 4412 } else { 4413 // If the node doesn't already exist, we updated it. Inform a listener if 4414 // it exists. 4415 if (UpdateListener) 4416 UpdateListener->NodeUpdated(U); 4417 } 4418 } 4419} 4420 4421/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4422/// uses of other values produced by From.getVal() alone. The Deleted vector is 4423/// handled the same way as for ReplaceAllUsesWith. 4424void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4425 DAGUpdateListener *UpdateListener){ 4426 // Handle the really simple, really trivial case efficiently. 4427 if (From == To) return; 4428 4429 // Handle the simple, trivial, case efficiently. 4430 if (From.getNode()->getNumValues() == 1) { 4431 ReplaceAllUsesWith(From, To, UpdateListener); 4432 return; 4433 } 4434 4435 // Get all of the users of From.getNode(). We want these in a nice, 4436 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4437 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end()); 4438 4439 while (!Users.empty()) { 4440 // We know that this user uses some value of From. If it is the right 4441 // value, update it. 4442 SDNode *User = Users.back(); 4443 Users.pop_back(); 4444 4445 // Scan for an operand that matches From. 4446 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4447 for (; Op != E; ++Op) 4448 if (*Op == From) break; 4449 4450 // If there are no matches, the user must use some other result of From. 4451 if (Op == E) continue; 4452 4453 // Okay, we know this user needs to be updated. Remove its old self 4454 // from the CSE maps. 4455 RemoveNodeFromCSEMaps(User); 4456 4457 // Update all operands that match "From" in case there are multiple uses. 4458 for (; Op != E; ++Op) { 4459 if (*Op == From) { 4460 From.getNode()->removeUser(Op-User->op_begin(), User); 4461 *Op = To; 4462 Op->setUser(User); 4463 To.getNode()->addUser(Op-User->op_begin(), User); 4464 } 4465 } 4466 4467 // Now that we have modified User, add it back to the CSE maps. If it 4468 // already exists there, recursively merge the results together. 4469 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4470 if (!Existing) { 4471 if (UpdateListener) UpdateListener->NodeUpdated(User); 4472 continue; // Continue on to next user. 4473 } 4474 4475 // If there was already an existing matching node, use ReplaceAllUsesWith 4476 // to replace the dead one with the existing one. This can cause 4477 // recursive merging of other unrelated nodes down the line. 4478 ReplaceAllUsesWith(User, Existing, UpdateListener); 4479 4480 // User is now dead. Notify a listener if present. 4481 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4482 DeleteNodeNotInCSEMaps(User); 4483 } 4484} 4485 4486/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4487/// uses of other values produced by From.getVal() alone. The same value may 4488/// appear in both the From and To list. The Deleted vector is 4489/// handled the same way as for ReplaceAllUsesWith. 4490void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4491 const SDValue *To, 4492 unsigned Num, 4493 DAGUpdateListener *UpdateListener){ 4494 // Handle the simple, trivial case efficiently. 4495 if (Num == 1) 4496 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4497 4498 SmallVector<std::pair<SDNode *, unsigned>, 16> Users; 4499 for (unsigned i = 0; i != Num; ++i) 4500 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(), 4501 E = From[i].getNode()->use_end(); UI != E; ++UI) 4502 Users.push_back(std::make_pair(*UI, i)); 4503 4504 while (!Users.empty()) { 4505 // We know that this user uses some value of From. If it is the right 4506 // value, update it. 4507 SDNode *User = Users.back().first; 4508 unsigned i = Users.back().second; 4509 Users.pop_back(); 4510 4511 // Scan for an operand that matches From. 4512 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4513 for (; Op != E; ++Op) 4514 if (*Op == From[i]) break; 4515 4516 // If there are no matches, the user must use some other result of From. 4517 if (Op == E) continue; 4518 4519 // Okay, we know this user needs to be updated. Remove its old self 4520 // from the CSE maps. 4521 RemoveNodeFromCSEMaps(User); 4522 4523 // Update all operands that match "From" in case there are multiple uses. 4524 for (; Op != E; ++Op) { 4525 if (*Op == From[i]) { 4526 From[i].getNode()->removeUser(Op-User->op_begin(), User); 4527 *Op = To[i]; 4528 Op->setUser(User); 4529 To[i].getNode()->addUser(Op-User->op_begin(), User); 4530 } 4531 } 4532 4533 // Now that we have modified User, add it back to the CSE maps. If it 4534 // already exists there, recursively merge the results together. 4535 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4536 if (!Existing) { 4537 if (UpdateListener) UpdateListener->NodeUpdated(User); 4538 continue; // Continue on to next user. 4539 } 4540 4541 // If there was already an existing matching node, use ReplaceAllUsesWith 4542 // to replace the dead one with the existing one. This can cause 4543 // recursive merging of other unrelated nodes down the line. 4544 ReplaceAllUsesWith(User, Existing, UpdateListener); 4545 4546 // User is now dead. Notify a listener if present. 4547 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4548 DeleteNodeNotInCSEMaps(User); 4549 } 4550} 4551 4552/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4553/// based on their topological order. It returns the maximum id and a vector 4554/// of the SDNodes* in assigned order by reference. 4555unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) { 4556 unsigned DAGSize = AllNodes.size(); 4557 std::vector<SDNode*> Sources; 4558 4559 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){ 4560 SDNode *N = I; 4561 unsigned Degree = N->use_size(); 4562 // Temporarily use the Node Id as scratch space for the degree count. 4563 N->setNodeId(Degree); 4564 if (Degree == 0) 4565 Sources.push_back(N); 4566 } 4567 4568 TopOrder.clear(); 4569 TopOrder.reserve(DAGSize); 4570 int Id = 0; 4571 while (!Sources.empty()) { 4572 SDNode *N = Sources.back(); 4573 Sources.pop_back(); 4574 TopOrder.push_back(N); 4575 N->setNodeId(Id++); 4576 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 4577 SDNode *P = I->getVal(); 4578 unsigned Degree = P->getNodeId(); 4579 --Degree; 4580 P->setNodeId(Degree); 4581 if (Degree == 0) 4582 Sources.push_back(P); 4583 } 4584 } 4585 4586 return Id; 4587} 4588 4589 4590 4591//===----------------------------------------------------------------------===// 4592// SDNode Class 4593//===----------------------------------------------------------------------===// 4594 4595// Out-of-line virtual method to give class a home. 4596void SDNode::ANCHOR() {} 4597void UnarySDNode::ANCHOR() {} 4598void BinarySDNode::ANCHOR() {} 4599void TernarySDNode::ANCHOR() {} 4600void HandleSDNode::ANCHOR() {} 4601void ConstantSDNode::ANCHOR() {} 4602void ConstantFPSDNode::ANCHOR() {} 4603void GlobalAddressSDNode::ANCHOR() {} 4604void FrameIndexSDNode::ANCHOR() {} 4605void JumpTableSDNode::ANCHOR() {} 4606void ConstantPoolSDNode::ANCHOR() {} 4607void BasicBlockSDNode::ANCHOR() {} 4608void SrcValueSDNode::ANCHOR() {} 4609void MemOperandSDNode::ANCHOR() {} 4610void RegisterSDNode::ANCHOR() {} 4611void DbgStopPointSDNode::ANCHOR() {} 4612void LabelSDNode::ANCHOR() {} 4613void ExternalSymbolSDNode::ANCHOR() {} 4614void CondCodeSDNode::ANCHOR() {} 4615void ARG_FLAGSSDNode::ANCHOR() {} 4616void VTSDNode::ANCHOR() {} 4617void MemSDNode::ANCHOR() {} 4618void LoadSDNode::ANCHOR() {} 4619void StoreSDNode::ANCHOR() {} 4620void AtomicSDNode::ANCHOR() {} 4621void CallSDNode::ANCHOR() {} 4622 4623HandleSDNode::~HandleSDNode() { 4624 DropOperands(); 4625} 4626 4627GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4628 MVT VT, int o) 4629 : SDNode(isa<GlobalVariable>(GA) && 4630 cast<GlobalVariable>(GA)->isThreadLocal() ? 4631 // Thread Local 4632 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4633 // Non Thread Local 4634 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4635 getSDVTList(VT)), Offset(o) { 4636 TheGlobal = const_cast<GlobalValue*>(GA); 4637} 4638 4639MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 4640 const Value *srcValue, int SVO, 4641 unsigned alignment, bool vol) 4642 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4643 Flags(encodeMemSDNodeFlags(vol, alignment)) { 4644 4645 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4646 assert(getAlignment() == alignment && "Alignment representation error!"); 4647 assert(isVolatile() == vol && "Volatile representation error!"); 4648} 4649 4650/// getMemOperand - Return a MachineMemOperand object describing the memory 4651/// reference performed by this memory reference. 4652MachineMemOperand MemSDNode::getMemOperand() const { 4653 int Flags; 4654 if (isa<LoadSDNode>(this)) 4655 Flags = MachineMemOperand::MOLoad; 4656 else if (isa<StoreSDNode>(this)) 4657 Flags = MachineMemOperand::MOStore; 4658 else { 4659 assert(isa<AtomicSDNode>(this) && "Unknown MemSDNode opcode!"); 4660 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4661 } 4662 4663 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4664 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4665 4666 // Check if the memory reference references a frame index 4667 const FrameIndexSDNode *FI = 4668 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 4669 if (!getSrcValue() && FI) 4670 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4671 Flags, 0, Size, getAlignment()); 4672 else 4673 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4674 Size, getAlignment()); 4675} 4676 4677/// Profile - Gather unique data for the node. 4678/// 4679void SDNode::Profile(FoldingSetNodeID &ID) const { 4680 AddNodeIDNode(ID, this); 4681} 4682 4683/// getValueTypeList - Return a pointer to the specified value type. 4684/// 4685const MVT *SDNode::getValueTypeList(MVT VT) { 4686 if (VT.isExtended()) { 4687 static std::set<MVT, MVT::compareRawBits> EVTs; 4688 return &(*EVTs.insert(VT).first); 4689 } else { 4690 static MVT VTs[MVT::LAST_VALUETYPE]; 4691 VTs[VT.getSimpleVT()] = VT; 4692 return &VTs[VT.getSimpleVT()]; 4693 } 4694} 4695 4696/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4697/// indicated value. This method ignores uses of other values defined by this 4698/// operation. 4699bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4700 assert(Value < getNumValues() && "Bad value!"); 4701 4702 // TODO: Only iterate over uses of a given value of the node 4703 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4704 if (UI.getUse().getSDValue().getResNo() == Value) { 4705 if (NUses == 0) 4706 return false; 4707 --NUses; 4708 } 4709 } 4710 4711 // Found exactly the right number of uses? 4712 return NUses == 0; 4713} 4714 4715 4716/// hasAnyUseOfValue - Return true if there are any use of the indicated 4717/// value. This method ignores uses of other values defined by this operation. 4718bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4719 assert(Value < getNumValues() && "Bad value!"); 4720 4721 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 4722 if (UI.getUse().getSDValue().getResNo() == Value) 4723 return true; 4724 4725 return false; 4726} 4727 4728 4729/// isOnlyUserOf - Return true if this node is the only use of N. 4730/// 4731bool SDNode::isOnlyUserOf(SDNode *N) const { 4732 bool Seen = false; 4733 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4734 SDNode *User = *I; 4735 if (User == this) 4736 Seen = true; 4737 else 4738 return false; 4739 } 4740 4741 return Seen; 4742} 4743 4744/// isOperand - Return true if this node is an operand of N. 4745/// 4746bool SDValue::isOperandOf(SDNode *N) const { 4747 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4748 if (*this == N->getOperand(i)) 4749 return true; 4750 return false; 4751} 4752 4753bool SDNode::isOperandOf(SDNode *N) const { 4754 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4755 if (this == N->OperandList[i].getVal()) 4756 return true; 4757 return false; 4758} 4759 4760/// reachesChainWithoutSideEffects - Return true if this operand (which must 4761/// be a chain) reaches the specified operand without crossing any 4762/// side-effecting instructions. In practice, this looks through token 4763/// factors and non-volatile loads. In order to remain efficient, this only 4764/// looks a couple of nodes in, it does not do an exhaustive search. 4765bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 4766 unsigned Depth) const { 4767 if (*this == Dest) return true; 4768 4769 // Don't search too deeply, we just want to be able to see through 4770 // TokenFactor's etc. 4771 if (Depth == 0) return false; 4772 4773 // If this is a token factor, all inputs to the TF happen in parallel. If any 4774 // of the operands of the TF reach dest, then we can do the xform. 4775 if (getOpcode() == ISD::TokenFactor) { 4776 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4777 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4778 return true; 4779 return false; 4780 } 4781 4782 // Loads don't have side effects, look through them. 4783 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4784 if (!Ld->isVolatile()) 4785 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4786 } 4787 return false; 4788} 4789 4790 4791static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4792 SmallPtrSet<SDNode *, 32> &Visited) { 4793 if (found || !Visited.insert(N)) 4794 return; 4795 4796 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4797 SDNode *Op = N->getOperand(i).getNode(); 4798 if (Op == P) { 4799 found = true; 4800 return; 4801 } 4802 findPredecessor(Op, P, found, Visited); 4803 } 4804} 4805 4806/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4807/// is either an operand of N or it can be reached by recursively traversing 4808/// up the operands. 4809/// NOTE: this is an expensive method. Use it carefully. 4810bool SDNode::isPredecessorOf(SDNode *N) const { 4811 SmallPtrSet<SDNode *, 32> Visited; 4812 bool found = false; 4813 findPredecessor(N, this, found, Visited); 4814 return found; 4815} 4816 4817uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4818 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4819 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 4820} 4821 4822std::string SDNode::getOperationName(const SelectionDAG *G) const { 4823 switch (getOpcode()) { 4824 default: 4825 if (getOpcode() < ISD::BUILTIN_OP_END) 4826 return "<<Unknown DAG Node>>"; 4827 if (isMachineOpcode()) { 4828 if (G) 4829 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4830 if (getMachineOpcode() < TII->getNumOpcodes()) 4831 return TII->get(getMachineOpcode()).getName(); 4832 return "<<Unknown Machine Node>>"; 4833 } 4834 if (G) { 4835 TargetLowering &TLI = G->getTargetLoweringInfo(); 4836 const char *Name = TLI.getTargetNodeName(getOpcode()); 4837 if (Name) return Name; 4838 return "<<Unknown Target Node>>"; 4839 } 4840 return "<<Unknown Node>>"; 4841 4842#ifndef NDEBUG 4843 case ISD::DELETED_NODE: 4844 return "<<Deleted Node!>>"; 4845#endif 4846 case ISD::PREFETCH: return "Prefetch"; 4847 case ISD::MEMBARRIER: return "MemBarrier"; 4848 case ISD::ATOMIC_CMP_SWAP_8: return "AtomicCmpSwap8"; 4849 case ISD::ATOMIC_SWAP_8: return "AtomicSwap8"; 4850 case ISD::ATOMIC_LOAD_ADD_8: return "AtomicLoadAdd8"; 4851 case ISD::ATOMIC_LOAD_SUB_8: return "AtomicLoadSub8"; 4852 case ISD::ATOMIC_LOAD_AND_8: return "AtomicLoadAnd8"; 4853 case ISD::ATOMIC_LOAD_OR_8: return "AtomicLoadOr8"; 4854 case ISD::ATOMIC_LOAD_XOR_8: return "AtomicLoadXor8"; 4855 case ISD::ATOMIC_LOAD_NAND_8: return "AtomicLoadNand8"; 4856 case ISD::ATOMIC_LOAD_MIN_8: return "AtomicLoadMin8"; 4857 case ISD::ATOMIC_LOAD_MAX_8: return "AtomicLoadMax8"; 4858 case ISD::ATOMIC_LOAD_UMIN_8: return "AtomicLoadUMin8"; 4859 case ISD::ATOMIC_LOAD_UMAX_8: return "AtomicLoadUMax8"; 4860 case ISD::ATOMIC_CMP_SWAP_16: return "AtomicCmpSwap16"; 4861 case ISD::ATOMIC_SWAP_16: return "AtomicSwap16"; 4862 case ISD::ATOMIC_LOAD_ADD_16: return "AtomicLoadAdd16"; 4863 case ISD::ATOMIC_LOAD_SUB_16: return "AtomicLoadSub16"; 4864 case ISD::ATOMIC_LOAD_AND_16: return "AtomicLoadAnd16"; 4865 case ISD::ATOMIC_LOAD_OR_16: return "AtomicLoadOr16"; 4866 case ISD::ATOMIC_LOAD_XOR_16: return "AtomicLoadXor16"; 4867 case ISD::ATOMIC_LOAD_NAND_16: return "AtomicLoadNand16"; 4868 case ISD::ATOMIC_LOAD_MIN_16: return "AtomicLoadMin16"; 4869 case ISD::ATOMIC_LOAD_MAX_16: return "AtomicLoadMax16"; 4870 case ISD::ATOMIC_LOAD_UMIN_16: return "AtomicLoadUMin16"; 4871 case ISD::ATOMIC_LOAD_UMAX_16: return "AtomicLoadUMax16"; 4872 case ISD::ATOMIC_CMP_SWAP_32: return "AtomicCmpSwap32"; 4873 case ISD::ATOMIC_SWAP_32: return "AtomicSwap32"; 4874 case ISD::ATOMIC_LOAD_ADD_32: return "AtomicLoadAdd32"; 4875 case ISD::ATOMIC_LOAD_SUB_32: return "AtomicLoadSub32"; 4876 case ISD::ATOMIC_LOAD_AND_32: return "AtomicLoadAnd32"; 4877 case ISD::ATOMIC_LOAD_OR_32: return "AtomicLoadOr32"; 4878 case ISD::ATOMIC_LOAD_XOR_32: return "AtomicLoadXor32"; 4879 case ISD::ATOMIC_LOAD_NAND_32: return "AtomicLoadNand32"; 4880 case ISD::ATOMIC_LOAD_MIN_32: return "AtomicLoadMin32"; 4881 case ISD::ATOMIC_LOAD_MAX_32: return "AtomicLoadMax32"; 4882 case ISD::ATOMIC_LOAD_UMIN_32: return "AtomicLoadUMin32"; 4883 case ISD::ATOMIC_LOAD_UMAX_32: return "AtomicLoadUMax32"; 4884 case ISD::ATOMIC_CMP_SWAP_64: return "AtomicCmpSwap64"; 4885 case ISD::ATOMIC_SWAP_64: return "AtomicSwap64"; 4886 case ISD::ATOMIC_LOAD_ADD_64: return "AtomicLoadAdd64"; 4887 case ISD::ATOMIC_LOAD_SUB_64: return "AtomicLoadSub64"; 4888 case ISD::ATOMIC_LOAD_AND_64: return "AtomicLoadAnd64"; 4889 case ISD::ATOMIC_LOAD_OR_64: return "AtomicLoadOr64"; 4890 case ISD::ATOMIC_LOAD_XOR_64: return "AtomicLoadXor64"; 4891 case ISD::ATOMIC_LOAD_NAND_64: return "AtomicLoadNand64"; 4892 case ISD::ATOMIC_LOAD_MIN_64: return "AtomicLoadMin64"; 4893 case ISD::ATOMIC_LOAD_MAX_64: return "AtomicLoadMax64"; 4894 case ISD::ATOMIC_LOAD_UMIN_64: return "AtomicLoadUMin64"; 4895 case ISD::ATOMIC_LOAD_UMAX_64: return "AtomicLoadUMax64"; 4896 case ISD::PCMARKER: return "PCMarker"; 4897 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 4898 case ISD::SRCVALUE: return "SrcValue"; 4899 case ISD::MEMOPERAND: return "MemOperand"; 4900 case ISD::EntryToken: return "EntryToken"; 4901 case ISD::TokenFactor: return "TokenFactor"; 4902 case ISD::AssertSext: return "AssertSext"; 4903 case ISD::AssertZext: return "AssertZext"; 4904 4905 case ISD::BasicBlock: return "BasicBlock"; 4906 case ISD::ARG_FLAGS: return "ArgFlags"; 4907 case ISD::VALUETYPE: return "ValueType"; 4908 case ISD::Register: return "Register"; 4909 4910 case ISD::Constant: return "Constant"; 4911 case ISD::ConstantFP: return "ConstantFP"; 4912 case ISD::GlobalAddress: return "GlobalAddress"; 4913 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 4914 case ISD::FrameIndex: return "FrameIndex"; 4915 case ISD::JumpTable: return "JumpTable"; 4916 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 4917 case ISD::RETURNADDR: return "RETURNADDR"; 4918 case ISD::FRAMEADDR: return "FRAMEADDR"; 4919 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 4920 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 4921 case ISD::EHSELECTION: return "EHSELECTION"; 4922 case ISD::EH_RETURN: return "EH_RETURN"; 4923 case ISD::ConstantPool: return "ConstantPool"; 4924 case ISD::ExternalSymbol: return "ExternalSymbol"; 4925 case ISD::INTRINSIC_WO_CHAIN: { 4926 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 4927 return Intrinsic::getName((Intrinsic::ID)IID); 4928 } 4929 case ISD::INTRINSIC_VOID: 4930 case ISD::INTRINSIC_W_CHAIN: { 4931 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 4932 return Intrinsic::getName((Intrinsic::ID)IID); 4933 } 4934 4935 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 4936 case ISD::TargetConstant: return "TargetConstant"; 4937 case ISD::TargetConstantFP:return "TargetConstantFP"; 4938 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 4939 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 4940 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 4941 case ISD::TargetJumpTable: return "TargetJumpTable"; 4942 case ISD::TargetConstantPool: return "TargetConstantPool"; 4943 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 4944 4945 case ISD::CopyToReg: return "CopyToReg"; 4946 case ISD::CopyFromReg: return "CopyFromReg"; 4947 case ISD::UNDEF: return "undef"; 4948 case ISD::MERGE_VALUES: return "merge_values"; 4949 case ISD::INLINEASM: return "inlineasm"; 4950 case ISD::DBG_LABEL: return "dbg_label"; 4951 case ISD::EH_LABEL: return "eh_label"; 4952 case ISD::DECLARE: return "declare"; 4953 case ISD::HANDLENODE: return "handlenode"; 4954 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 4955 case ISD::CALL: return "call"; 4956 4957 // Unary operators 4958 case ISD::FABS: return "fabs"; 4959 case ISD::FNEG: return "fneg"; 4960 case ISD::FSQRT: return "fsqrt"; 4961 case ISD::FSIN: return "fsin"; 4962 case ISD::FCOS: return "fcos"; 4963 case ISD::FPOWI: return "fpowi"; 4964 case ISD::FPOW: return "fpow"; 4965 case ISD::FTRUNC: return "ftrunc"; 4966 case ISD::FFLOOR: return "ffloor"; 4967 case ISD::FCEIL: return "fceil"; 4968 case ISD::FRINT: return "frint"; 4969 case ISD::FNEARBYINT: return "fnearbyint"; 4970 4971 // Binary operators 4972 case ISD::ADD: return "add"; 4973 case ISD::SUB: return "sub"; 4974 case ISD::MUL: return "mul"; 4975 case ISD::MULHU: return "mulhu"; 4976 case ISD::MULHS: return "mulhs"; 4977 case ISD::SDIV: return "sdiv"; 4978 case ISD::UDIV: return "udiv"; 4979 case ISD::SREM: return "srem"; 4980 case ISD::UREM: return "urem"; 4981 case ISD::SMUL_LOHI: return "smul_lohi"; 4982 case ISD::UMUL_LOHI: return "umul_lohi"; 4983 case ISD::SDIVREM: return "sdivrem"; 4984 case ISD::UDIVREM: return "udivrem"; 4985 case ISD::AND: return "and"; 4986 case ISD::OR: return "or"; 4987 case ISD::XOR: return "xor"; 4988 case ISD::SHL: return "shl"; 4989 case ISD::SRA: return "sra"; 4990 case ISD::SRL: return "srl"; 4991 case ISD::ROTL: return "rotl"; 4992 case ISD::ROTR: return "rotr"; 4993 case ISD::FADD: return "fadd"; 4994 case ISD::FSUB: return "fsub"; 4995 case ISD::FMUL: return "fmul"; 4996 case ISD::FDIV: return "fdiv"; 4997 case ISD::FREM: return "frem"; 4998 case ISD::FCOPYSIGN: return "fcopysign"; 4999 case ISD::FGETSIGN: return "fgetsign"; 5000 5001 case ISD::SETCC: return "setcc"; 5002 case ISD::VSETCC: return "vsetcc"; 5003 case ISD::SELECT: return "select"; 5004 case ISD::SELECT_CC: return "select_cc"; 5005 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5006 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5007 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5008 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5009 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5010 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5011 case ISD::CARRY_FALSE: return "carry_false"; 5012 case ISD::ADDC: return "addc"; 5013 case ISD::ADDE: return "adde"; 5014 case ISD::SUBC: return "subc"; 5015 case ISD::SUBE: return "sube"; 5016 case ISD::SHL_PARTS: return "shl_parts"; 5017 case ISD::SRA_PARTS: return "sra_parts"; 5018 case ISD::SRL_PARTS: return "srl_parts"; 5019 5020 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5021 case ISD::INSERT_SUBREG: return "insert_subreg"; 5022 5023 // Conversion operators. 5024 case ISD::SIGN_EXTEND: return "sign_extend"; 5025 case ISD::ZERO_EXTEND: return "zero_extend"; 5026 case ISD::ANY_EXTEND: return "any_extend"; 5027 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5028 case ISD::TRUNCATE: return "truncate"; 5029 case ISD::FP_ROUND: return "fp_round"; 5030 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5031 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5032 case ISD::FP_EXTEND: return "fp_extend"; 5033 5034 case ISD::SINT_TO_FP: return "sint_to_fp"; 5035 case ISD::UINT_TO_FP: return "uint_to_fp"; 5036 case ISD::FP_TO_SINT: return "fp_to_sint"; 5037 case ISD::FP_TO_UINT: return "fp_to_uint"; 5038 case ISD::BIT_CONVERT: return "bit_convert"; 5039 5040 // Control flow instructions 5041 case ISD::BR: return "br"; 5042 case ISD::BRIND: return "brind"; 5043 case ISD::BR_JT: return "br_jt"; 5044 case ISD::BRCOND: return "brcond"; 5045 case ISD::BR_CC: return "br_cc"; 5046 case ISD::RET: return "ret"; 5047 case ISD::CALLSEQ_START: return "callseq_start"; 5048 case ISD::CALLSEQ_END: return "callseq_end"; 5049 5050 // Other operators 5051 case ISD::LOAD: return "load"; 5052 case ISD::STORE: return "store"; 5053 case ISD::VAARG: return "vaarg"; 5054 case ISD::VACOPY: return "vacopy"; 5055 case ISD::VAEND: return "vaend"; 5056 case ISD::VASTART: return "vastart"; 5057 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5058 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5059 case ISD::BUILD_PAIR: return "build_pair"; 5060 case ISD::STACKSAVE: return "stacksave"; 5061 case ISD::STACKRESTORE: return "stackrestore"; 5062 case ISD::TRAP: return "trap"; 5063 5064 // Bit manipulation 5065 case ISD::BSWAP: return "bswap"; 5066 case ISD::CTPOP: return "ctpop"; 5067 case ISD::CTTZ: return "cttz"; 5068 case ISD::CTLZ: return "ctlz"; 5069 5070 // Debug info 5071 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5072 case ISD::DEBUG_LOC: return "debug_loc"; 5073 5074 // Trampolines 5075 case ISD::TRAMPOLINE: return "trampoline"; 5076 5077 case ISD::CONDCODE: 5078 switch (cast<CondCodeSDNode>(this)->get()) { 5079 default: assert(0 && "Unknown setcc condition!"); 5080 case ISD::SETOEQ: return "setoeq"; 5081 case ISD::SETOGT: return "setogt"; 5082 case ISD::SETOGE: return "setoge"; 5083 case ISD::SETOLT: return "setolt"; 5084 case ISD::SETOLE: return "setole"; 5085 case ISD::SETONE: return "setone"; 5086 5087 case ISD::SETO: return "seto"; 5088 case ISD::SETUO: return "setuo"; 5089 case ISD::SETUEQ: return "setue"; 5090 case ISD::SETUGT: return "setugt"; 5091 case ISD::SETUGE: return "setuge"; 5092 case ISD::SETULT: return "setult"; 5093 case ISD::SETULE: return "setule"; 5094 case ISD::SETUNE: return "setune"; 5095 5096 case ISD::SETEQ: return "seteq"; 5097 case ISD::SETGT: return "setgt"; 5098 case ISD::SETGE: return "setge"; 5099 case ISD::SETLT: return "setlt"; 5100 case ISD::SETLE: return "setle"; 5101 case ISD::SETNE: return "setne"; 5102 } 5103 } 5104} 5105 5106const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5107 switch (AM) { 5108 default: 5109 return ""; 5110 case ISD::PRE_INC: 5111 return "<pre-inc>"; 5112 case ISD::PRE_DEC: 5113 return "<pre-dec>"; 5114 case ISD::POST_INC: 5115 return "<post-inc>"; 5116 case ISD::POST_DEC: 5117 return "<post-dec>"; 5118 } 5119} 5120 5121std::string ISD::ArgFlagsTy::getArgFlagsString() { 5122 std::string S = "< "; 5123 5124 if (isZExt()) 5125 S += "zext "; 5126 if (isSExt()) 5127 S += "sext "; 5128 if (isInReg()) 5129 S += "inreg "; 5130 if (isSRet()) 5131 S += "sret "; 5132 if (isByVal()) 5133 S += "byval "; 5134 if (isNest()) 5135 S += "nest "; 5136 if (getByValAlign()) 5137 S += "byval-align:" + utostr(getByValAlign()) + " "; 5138 if (getOrigAlign()) 5139 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5140 if (getByValSize()) 5141 S += "byval-size:" + utostr(getByValSize()) + " "; 5142 return S + ">"; 5143} 5144 5145void SDNode::dump() const { dump(0); } 5146void SDNode::dump(const SelectionDAG *G) const { 5147 print(errs(), G); 5148 errs().flush(); 5149} 5150 5151void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5152 OS << (void*)this << ": "; 5153 5154 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5155 if (i) OS << ","; 5156 if (getValueType(i) == MVT::Other) 5157 OS << "ch"; 5158 else 5159 OS << getValueType(i).getMVTString(); 5160 } 5161 OS << " = " << getOperationName(G); 5162 5163 OS << " "; 5164 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5165 if (i) OS << ", "; 5166 OS << (void*)getOperand(i).getNode(); 5167 if (unsigned RN = getOperand(i).getResNo()) 5168 OS << ":" << RN; 5169 } 5170 5171 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5172 SDNode *Mask = getOperand(2).getNode(); 5173 OS << "<"; 5174 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5175 if (i) OS << ","; 5176 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5177 OS << "u"; 5178 else 5179 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5180 } 5181 OS << ">"; 5182 } 5183 5184 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5185 OS << '<' << CSDN->getAPIntValue() << '>'; 5186 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5187 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5188 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5189 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5190 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5191 else { 5192 OS << "<APFloat("; 5193 CSDN->getValueAPF().convertToAPInt().dump(); 5194 OS << ")>"; 5195 } 5196 } else if (const GlobalAddressSDNode *GADN = 5197 dyn_cast<GlobalAddressSDNode>(this)) { 5198 int offset = GADN->getOffset(); 5199 OS << '<'; 5200 WriteAsOperand(OS, GADN->getGlobal()); 5201 OS << '>'; 5202 if (offset > 0) 5203 OS << " + " << offset; 5204 else 5205 OS << " " << offset; 5206 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5207 OS << "<" << FIDN->getIndex() << ">"; 5208 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5209 OS << "<" << JTDN->getIndex() << ">"; 5210 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5211 int offset = CP->getOffset(); 5212 if (CP->isMachineConstantPoolEntry()) 5213 OS << "<" << *CP->getMachineCPVal() << ">"; 5214 else 5215 OS << "<" << *CP->getConstVal() << ">"; 5216 if (offset > 0) 5217 OS << " + " << offset; 5218 else 5219 OS << " " << offset; 5220 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5221 OS << "<"; 5222 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5223 if (LBB) 5224 OS << LBB->getName() << " "; 5225 OS << (const void*)BBDN->getBasicBlock() << ">"; 5226 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5227 if (G && R->getReg() && 5228 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5229 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5230 } else { 5231 OS << " #" << R->getReg(); 5232 } 5233 } else if (const ExternalSymbolSDNode *ES = 5234 dyn_cast<ExternalSymbolSDNode>(this)) { 5235 OS << "'" << ES->getSymbol() << "'"; 5236 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5237 if (M->getValue()) 5238 OS << "<" << M->getValue() << ">"; 5239 else 5240 OS << "<null>"; 5241 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5242 if (M->MO.getValue()) 5243 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5244 else 5245 OS << "<null:" << M->MO.getOffset() << ">"; 5246 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5247 OS << N->getArgFlags().getArgFlagsString(); 5248 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5249 OS << ":" << N->getVT().getMVTString(); 5250 } 5251 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5252 const Value *SrcValue = LD->getSrcValue(); 5253 int SrcOffset = LD->getSrcValueOffset(); 5254 OS << " <"; 5255 if (SrcValue) 5256 OS << SrcValue; 5257 else 5258 OS << "null"; 5259 OS << ":" << SrcOffset << ">"; 5260 5261 bool doExt = true; 5262 switch (LD->getExtensionType()) { 5263 default: doExt = false; break; 5264 case ISD::EXTLOAD: OS << " <anyext "; break; 5265 case ISD::SEXTLOAD: OS << " <sext "; break; 5266 case ISD::ZEXTLOAD: OS << " <zext "; break; 5267 } 5268 if (doExt) 5269 OS << LD->getMemoryVT().getMVTString() << ">"; 5270 5271 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5272 if (*AM) 5273 OS << " " << AM; 5274 if (LD->isVolatile()) 5275 OS << " <volatile>"; 5276 OS << " alignment=" << LD->getAlignment(); 5277 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5278 const Value *SrcValue = ST->getSrcValue(); 5279 int SrcOffset = ST->getSrcValueOffset(); 5280 OS << " <"; 5281 if (SrcValue) 5282 OS << SrcValue; 5283 else 5284 OS << "null"; 5285 OS << ":" << SrcOffset << ">"; 5286 5287 if (ST->isTruncatingStore()) 5288 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 5289 5290 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5291 if (*AM) 5292 OS << " " << AM; 5293 if (ST->isVolatile()) 5294 OS << " <volatile>"; 5295 OS << " alignment=" << ST->getAlignment(); 5296 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5297 const Value *SrcValue = AT->getSrcValue(); 5298 int SrcOffset = AT->getSrcValueOffset(); 5299 OS << " <"; 5300 if (SrcValue) 5301 OS << SrcValue; 5302 else 5303 OS << "null"; 5304 OS << ":" << SrcOffset << ">"; 5305 if (AT->isVolatile()) 5306 OS << " <volatile>"; 5307 OS << " alignment=" << AT->getAlignment(); 5308 } 5309} 5310 5311static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5312 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5313 if (N->getOperand(i).getNode()->hasOneUse()) 5314 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5315 else 5316 cerr << "\n" << std::string(indent+2, ' ') 5317 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5318 5319 5320 cerr << "\n" << std::string(indent, ' '); 5321 N->dump(G); 5322} 5323 5324void SelectionDAG::dump() const { 5325 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5326 5327 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5328 I != E; ++I) { 5329 const SDNode *N = I; 5330 if (!N->hasOneUse() && N != getRoot().getNode()) 5331 DumpNodes(N, 2, this); 5332 } 5333 5334 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5335 5336 cerr << "\n\n"; 5337} 5338 5339const Type *ConstantPoolSDNode::getType() const { 5340 if (isMachineConstantPoolEntry()) 5341 return Val.MachineCPVal->getType(); 5342 return Val.ConstVal->getType(); 5343} 5344