SelectionDAG.cpp revision 6d1f5d951bab2222096210e76e6f7e18e88ae547
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetSelectionDAGInfo.h" 36#include "llvm/Target/TargetOptions.h" 37#include "llvm/Target/TargetInstrInfo.h" 38#include "llvm/Target/TargetIntrinsicInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Debug.h" 42#include "llvm/Support/ErrorHandling.h" 43#include "llvm/Support/ManagedStatic.h" 44#include "llvm/Support/MathExtras.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/Support/Mutex.h" 47#include "llvm/ADT/SetVector.h" 48#include "llvm/ADT/SmallPtrSet.h" 49#include "llvm/ADT/SmallSet.h" 50#include "llvm/ADT/SmallVector.h" 51#include "llvm/ADT/StringExtras.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BITCAST) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. 129 SDValue NotZero = N->getOperand(i); 130 if (isa<ConstantSDNode>(NotZero)) { 131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 132 return false; 133 } else if (isa<ConstantFPSDNode>(NotZero)) { 134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 135 bitcastToAPInt().isAllOnesValue()) 136 return false; 137 } else 138 return false; 139 140 // Okay, we have at least one ~0 value, check to see if the rest match or are 141 // undefs. 142 for (++i; i != e; ++i) 143 if (N->getOperand(i) != NotZero && 144 N->getOperand(i).getOpcode() != ISD::UNDEF) 145 return false; 146 return true; 147} 148 149 150/// isBuildVectorAllZeros - Return true if the specified node is a 151/// BUILD_VECTOR where all of the elements are 0 or undef. 152bool ISD::isBuildVectorAllZeros(const SDNode *N) { 153 // Look through a bit convert. 154 if (N->getOpcode() == ISD::BITCAST) 155 N = N->getOperand(0).getNode(); 156 157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 158 159 unsigned i = 0, e = N->getNumOperands(); 160 161 // Skip over all of the undef values. 162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 163 ++i; 164 165 // Do not accept an all-undef vector. 166 if (i == e) return false; 167 168 // Do not accept build_vectors that aren't all constants or which have non-0 169 // elements. 170 SDValue Zero = N->getOperand(i); 171 if (isa<ConstantSDNode>(Zero)) { 172 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 173 return false; 174 } else if (isa<ConstantFPSDNode>(Zero)) { 175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 176 return false; 177 } else 178 return false; 179 180 // Okay, we have at least one 0 value, check to see if the rest match or are 181 // undefs. 182 for (++i; i != e; ++i) 183 if (N->getOperand(i) != Zero && 184 N->getOperand(i).getOpcode() != ISD::UNDEF) 185 return false; 186 return true; 187} 188 189/// isScalarToVector - Return true if the specified node is a 190/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 191/// element is not an undef. 192bool ISD::isScalarToVector(const SDNode *N) { 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 194 return true; 195 196 if (N->getOpcode() != ISD::BUILD_VECTOR) 197 return false; 198 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 199 return false; 200 unsigned NumElems = N->getNumOperands(); 201 if (NumElems == 1) 202 return false; 203 for (unsigned i = 1; i < NumElems; ++i) { 204 SDValue V = N->getOperand(i); 205 if (V.getOpcode() != ISD::UNDEF) 206 return false; 207 } 208 return true; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: llvm_unreachable("Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: { 436 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 437 ID.AddInteger(AT->getMemoryVT().getRawBits()); 438 ID.AddInteger(AT->getRawSubclassData()); 439 break; 440 } 441 case ISD::VECTOR_SHUFFLE: { 442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 444 i != e; ++i) 445 ID.AddInteger(SVN->getMaskElt(i)); 446 break; 447 } 448 case ISD::TargetBlockAddress: 449 case ISD::BlockAddress: { 450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 452 break; 453 } 454 } // end switch (N->getOpcode()) 455} 456 457/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 458/// data. 459static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 460 AddNodeIDOpcode(ID, N->getOpcode()); 461 // Add the return value info. 462 AddNodeIDValueTypes(ID, N->getVTList()); 463 // Add the operand info. 464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 465 466 // Handle SDNode leafs with special info. 467 AddNodeIDCustom(ID, N); 468} 469 470/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 471/// the CSE map that carries volatility, temporalness, indexing mode, and 472/// extension/truncation information. 473/// 474static inline unsigned 475encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 476 bool isNonTemporal) { 477 assert((ConvType & 3) == ConvType && 478 "ConvType may not require more than 2 bits!"); 479 assert((AM & 7) == AM && 480 "AM may not require more than 3 bits!"); 481 return ConvType | 482 (AM << 2) | 483 (isVolatile << 5) | 484 (isNonTemporal << 6); 485} 486 487//===----------------------------------------------------------------------===// 488// SelectionDAG Class 489//===----------------------------------------------------------------------===// 490 491/// doNotCSE - Return true if CSE should not be performed for this node. 492static bool doNotCSE(SDNode *N) { 493 if (N->getValueType(0) == MVT::Glue) 494 return true; // Never CSE anything that produces a flag. 495 496 switch (N->getOpcode()) { 497 default: break; 498 case ISD::HANDLENODE: 499 case ISD::EH_LABEL: 500 return true; // Never CSE these nodes. 501 } 502 503 // Check that remaining values produced are not flags. 504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 505 if (N->getValueType(i) == MVT::Glue) 506 return true; // Never CSE anything that produces a flag. 507 508 return false; 509} 510 511/// RemoveDeadNodes - This method deletes all unreachable nodes in the 512/// SelectionDAG. 513void SelectionDAG::RemoveDeadNodes() { 514 // Create a dummy node (which is not added to allnodes), that adds a reference 515 // to the root node, preventing it from being deleted. 516 HandleSDNode Dummy(getRoot()); 517 518 SmallVector<SDNode*, 128> DeadNodes; 519 520 // Add all obviously-dead nodes to the DeadNodes worklist. 521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 522 if (I->use_empty()) 523 DeadNodes.push_back(I); 524 525 RemoveDeadNodes(DeadNodes); 526 527 // If the root changed (e.g. it was a dead load, update the root). 528 setRoot(Dummy.getValue()); 529} 530 531/// RemoveDeadNodes - This method deletes the unreachable nodes in the 532/// given list, and any nodes that become unreachable as a result. 533void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 534 DAGUpdateListener *UpdateListener) { 535 536 // Process the worklist, deleting the nodes and adding their uses to the 537 // worklist. 538 while (!DeadNodes.empty()) { 539 SDNode *N = DeadNodes.pop_back_val(); 540 541 if (UpdateListener) 542 UpdateListener->NodeDeleted(N, 0); 543 544 // Take the node out of the appropriate CSE map. 545 RemoveNodeFromCSEMaps(N); 546 547 // Next, brutally remove the operand list. This is safe to do, as there are 548 // no cycles in the graph. 549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 550 SDUse &Use = *I++; 551 SDNode *Operand = Use.getNode(); 552 Use.set(SDValue()); 553 554 // Now that we removed this operand, see if there are no uses of it left. 555 if (Operand->use_empty()) 556 DeadNodes.push_back(Operand); 557 } 558 559 DeallocateNode(N); 560 } 561} 562 563void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 564 SmallVector<SDNode*, 16> DeadNodes(1, N); 565 RemoveDeadNodes(DeadNodes, UpdateListener); 566} 567 568void SelectionDAG::DeleteNode(SDNode *N) { 569 // First take this out of the appropriate CSE map. 570 RemoveNodeFromCSEMaps(N); 571 572 // Finally, remove uses due to operands of this node, remove from the 573 // AllNodes list, and delete the node. 574 DeleteNodeNotInCSEMaps(N); 575} 576 577void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 578 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 579 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 580 581 // Drop all of the operands and decrement used node's use counts. 582 N->DropOperands(); 583 584 DeallocateNode(N); 585} 586 587void SelectionDAG::DeallocateNode(SDNode *N) { 588 if (N->OperandsNeedDelete) 589 delete[] N->OperandList; 590 591 // Set the opcode to DELETED_NODE to help catch bugs when node 592 // memory is reallocated. 593 N->NodeType = ISD::DELETED_NODE; 594 595 NodeAllocator.Deallocate(AllNodes.remove(N)); 596 597 // Remove the ordering of this node. 598 Ordering->remove(N); 599 600 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 601 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 602 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 603 DbgVals[i]->setIsInvalidated(); 604} 605 606/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 607/// correspond to it. This is useful when we're about to delete or repurpose 608/// the node. We don't want future request for structurally identical nodes 609/// to return N anymore. 610bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 611 bool Erased = false; 612 switch (N->getOpcode()) { 613 case ISD::HANDLENODE: return false; // noop. 614 case ISD::CONDCODE: 615 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 616 "Cond code doesn't exist!"); 617 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 618 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 619 break; 620 case ISD::ExternalSymbol: 621 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 622 break; 623 case ISD::TargetExternalSymbol: { 624 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 625 Erased = TargetExternalSymbols.erase( 626 std::pair<std::string,unsigned char>(ESN->getSymbol(), 627 ESN->getTargetFlags())); 628 break; 629 } 630 case ISD::VALUETYPE: { 631 EVT VT = cast<VTSDNode>(N)->getVT(); 632 if (VT.isExtended()) { 633 Erased = ExtendedValueTypeNodes.erase(VT); 634 } else { 635 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 636 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 637 } 638 break; 639 } 640 default: 641 // Remove it from the CSE Map. 642 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 643 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746#ifndef NDEBUG 747/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 748static void VerifyNodeCommon(SDNode *N) { 749 switch (N->getOpcode()) { 750 default: 751 break; 752 case ISD::BUILD_PAIR: { 753 EVT VT = N->getValueType(0); 754 assert(N->getNumValues() == 1 && "Too many results!"); 755 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 756 "Wrong return type!"); 757 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 758 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 759 "Mismatched operand types!"); 760 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 761 "Wrong operand type!"); 762 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 763 "Wrong return type size"); 764 break; 765 } 766 case ISD::BUILD_VECTOR: { 767 assert(N->getNumValues() == 1 && "Too many results!"); 768 assert(N->getValueType(0).isVector() && "Wrong return type!"); 769 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 770 "Wrong number of operands!"); 771 EVT EltVT = N->getValueType(0).getVectorElementType(); 772 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 773 assert((I->getValueType() == EltVT || 774 (EltVT.isInteger() && I->getValueType().isInteger() && 775 EltVT.bitsLE(I->getValueType()))) && 776 "Wrong operand type!"); 777 break; 778 } 779 } 780} 781 782/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 783static void VerifySDNode(SDNode *N) { 784 // The SDNode allocators cannot be used to allocate nodes with fields that are 785 // not present in an SDNode! 786 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 787 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 788 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 789 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 790 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 791 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 792 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 793 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 794 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 795 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 796 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 797 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 798 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 799 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 800 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 801 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 802 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 803 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 804 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 805 806 VerifyNodeCommon(N); 807} 808 809/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 810/// invalid. 811static void VerifyMachineNode(SDNode *N) { 812 // The MachineNode allocators cannot be used to allocate nodes with fields 813 // that are not present in a MachineNode! 814 // Currently there are no such nodes. 815 816 VerifyNodeCommon(N); 817} 818#endif // NDEBUG 819 820/// getEVTAlignment - Compute the default alignment value for the 821/// given type. 822/// 823unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 824 Type *Ty = VT == MVT::iPTR ? 825 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 826 VT.getTypeForEVT(*getContext()); 827 828 return TLI.getTargetData()->getABITypeAlignment(Ty); 829} 830 831// EntryNode could meaningfully have debug info if we can find it... 832SelectionDAG::SelectionDAG(const TargetMachine &tm) 833 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 834 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 835 Root(getEntryNode()), Ordering(0) { 836 AllNodes.push_back(&EntryNode); 837 Ordering = new SDNodeOrdering(); 838 DbgInfo = new SDDbgInfo(); 839} 840 841void SelectionDAG::init(MachineFunction &mf) { 842 MF = &mf; 843 Context = &mf.getFunction()->getContext(); 844} 845 846SelectionDAG::~SelectionDAG() { 847 allnodes_clear(); 848 delete Ordering; 849 delete DbgInfo; 850} 851 852void SelectionDAG::allnodes_clear() { 853 assert(&*AllNodes.begin() == &EntryNode); 854 AllNodes.remove(AllNodes.begin()); 855 while (!AllNodes.empty()) 856 DeallocateNode(AllNodes.begin()); 857} 858 859void SelectionDAG::clear() { 860 allnodes_clear(); 861 OperandAllocator.Reset(); 862 CSEMap.clear(); 863 864 ExtendedValueTypeNodes.clear(); 865 ExternalSymbols.clear(); 866 TargetExternalSymbols.clear(); 867 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 868 static_cast<CondCodeSDNode*>(0)); 869 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 870 static_cast<SDNode*>(0)); 871 872 EntryNode.UseList = 0; 873 AllNodes.push_back(&EntryNode); 874 Root = getEntryNode(); 875 Ordering->clear(); 876 DbgInfo->clear(); 877} 878 879SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 880 return VT.bitsGT(Op.getValueType()) ? 881 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 882 getNode(ISD::TRUNCATE, DL, VT, Op); 883} 884 885SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 886 return VT.bitsGT(Op.getValueType()) ? 887 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 888 getNode(ISD::TRUNCATE, DL, VT, Op); 889} 890 891SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 892 assert(!VT.isVector() && 893 "getZeroExtendInReg should use the vector element type instead of " 894 "the vector type!"); 895 if (Op.getValueType() == VT) return Op; 896 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 897 APInt Imm = APInt::getLowBitsSet(BitWidth, 898 VT.getSizeInBits()); 899 return getNode(ISD::AND, DL, Op.getValueType(), Op, 900 getConstant(Imm, Op.getValueType())); 901} 902 903/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 904/// 905SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 906 EVT EltVT = VT.getScalarType(); 907 SDValue NegOne = 908 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 909 return getNode(ISD::XOR, DL, VT, Val, NegOne); 910} 911 912SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 913 EVT EltVT = VT.getScalarType(); 914 assert((EltVT.getSizeInBits() >= 64 || 915 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 916 "getConstant with a uint64_t value that doesn't fit in the type!"); 917 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 918} 919 920SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 921 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 922} 923 924SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 925 assert(VT.isInteger() && "Cannot create FP integer constant!"); 926 927 EVT EltVT = VT.getScalarType(); 928 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 929 "APInt size does not match type size!"); 930 931 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 932 FoldingSetNodeID ID; 933 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 934 ID.AddPointer(&Val); 935 void *IP = 0; 936 SDNode *N = NULL; 937 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 938 if (!VT.isVector()) 939 return SDValue(N, 0); 940 941 if (!N) { 942 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 943 CSEMap.InsertNode(N, IP); 944 AllNodes.push_back(N); 945 } 946 947 SDValue Result(N, 0); 948 if (VT.isVector()) { 949 SmallVector<SDValue, 8> Ops; 950 Ops.assign(VT.getVectorNumElements(), Result); 951 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 952 } 953 return Result; 954} 955 956SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 957 return getConstant(Val, TLI.getPointerTy(), isTarget); 958} 959 960 961SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 962 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 963} 964 965SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 966 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 967 968 EVT EltVT = VT.getScalarType(); 969 970 // Do the map lookup using the actual bit pattern for the floating point 971 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 972 // we don't have issues with SNANs. 973 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 974 FoldingSetNodeID ID; 975 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 976 ID.AddPointer(&V); 977 void *IP = 0; 978 SDNode *N = NULL; 979 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 980 if (!VT.isVector()) 981 return SDValue(N, 0); 982 983 if (!N) { 984 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 985 CSEMap.InsertNode(N, IP); 986 AllNodes.push_back(N); 987 } 988 989 SDValue Result(N, 0); 990 if (VT.isVector()) { 991 SmallVector<SDValue, 8> Ops; 992 Ops.assign(VT.getVectorNumElements(), Result); 993 // FIXME DebugLoc info might be appropriate here 994 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 995 } 996 return Result; 997} 998 999SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1000 EVT EltVT = VT.getScalarType(); 1001 if (EltVT==MVT::f32) 1002 return getConstantFP(APFloat((float)Val), VT, isTarget); 1003 else if (EltVT==MVT::f64) 1004 return getConstantFP(APFloat(Val), VT, isTarget); 1005 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1006 bool ignored; 1007 APFloat apf = APFloat(Val); 1008 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1009 &ignored); 1010 return getConstantFP(apf, VT, isTarget); 1011 } else { 1012 assert(0 && "Unsupported type in getConstantFP"); 1013 return SDValue(); 1014 } 1015} 1016 1017SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1018 EVT VT, int64_t Offset, 1019 bool isTargetGA, 1020 unsigned char TargetFlags) { 1021 assert((TargetFlags == 0 || isTargetGA) && 1022 "Cannot set target flags on target-independent globals"); 1023 1024 // Truncate (with sign-extension) the offset value to the pointer size. 1025 EVT PTy = TLI.getPointerTy(); 1026 unsigned BitWidth = PTy.getSizeInBits(); 1027 if (BitWidth < 64) 1028 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1029 1030 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1031 if (!GVar) { 1032 // If GV is an alias then use the aliasee for determining thread-localness. 1033 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1034 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1035 } 1036 1037 unsigned Opc; 1038 if (GVar && GVar->isThreadLocal()) 1039 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1040 else 1041 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1042 1043 FoldingSetNodeID ID; 1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1045 ID.AddPointer(GV); 1046 ID.AddInteger(Offset); 1047 ID.AddInteger(TargetFlags); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 1052 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1053 Offset, TargetFlags); 1054 CSEMap.InsertNode(N, IP); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1060 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1061 FoldingSetNodeID ID; 1062 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1063 ID.AddInteger(FI); 1064 void *IP = 0; 1065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1066 return SDValue(E, 0); 1067 1068 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1069 CSEMap.InsertNode(N, IP); 1070 AllNodes.push_back(N); 1071 return SDValue(N, 0); 1072} 1073 1074SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1075 unsigned char TargetFlags) { 1076 assert((TargetFlags == 0 || isTarget) && 1077 "Cannot set target flags on target-independent jump tables"); 1078 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1079 FoldingSetNodeID ID; 1080 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1081 ID.AddInteger(JTI); 1082 ID.AddInteger(TargetFlags); 1083 void *IP = 0; 1084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1085 return SDValue(E, 0); 1086 1087 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1088 TargetFlags); 1089 CSEMap.InsertNode(N, IP); 1090 AllNodes.push_back(N); 1091 return SDValue(N, 0); 1092} 1093 1094SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1095 unsigned Alignment, int Offset, 1096 bool isTarget, 1097 unsigned char TargetFlags) { 1098 assert((TargetFlags == 0 || isTarget) && 1099 "Cannot set target flags on target-independent globals"); 1100 if (Alignment == 0) 1101 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1102 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1103 FoldingSetNodeID ID; 1104 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1105 ID.AddInteger(Alignment); 1106 ID.AddInteger(Offset); 1107 ID.AddPointer(C); 1108 ID.AddInteger(TargetFlags); 1109 void *IP = 0; 1110 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1111 return SDValue(E, 0); 1112 1113 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1114 Alignment, TargetFlags); 1115 CSEMap.InsertNode(N, IP); 1116 AllNodes.push_back(N); 1117 return SDValue(N, 0); 1118} 1119 1120 1121SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1122 unsigned Alignment, int Offset, 1123 bool isTarget, 1124 unsigned char TargetFlags) { 1125 assert((TargetFlags == 0 || isTarget) && 1126 "Cannot set target flags on target-independent globals"); 1127 if (Alignment == 0) 1128 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1129 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1130 FoldingSetNodeID ID; 1131 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1132 ID.AddInteger(Alignment); 1133 ID.AddInteger(Offset); 1134 C->AddSelectionDAGCSEId(ID); 1135 ID.AddInteger(TargetFlags); 1136 void *IP = 0; 1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1138 return SDValue(E, 0); 1139 1140 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1141 Alignment, TargetFlags); 1142 CSEMap.InsertNode(N, IP); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1148 FoldingSetNodeID ID; 1149 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1150 ID.AddPointer(MBB); 1151 void *IP = 0; 1152 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1153 return SDValue(E, 0); 1154 1155 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1156 CSEMap.InsertNode(N, IP); 1157 AllNodes.push_back(N); 1158 return SDValue(N, 0); 1159} 1160 1161SDValue SelectionDAG::getValueType(EVT VT) { 1162 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1163 ValueTypeNodes.size()) 1164 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1165 1166 SDNode *&N = VT.isExtended() ? 1167 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1168 1169 if (N) return SDValue(N, 0); 1170 N = new (NodeAllocator) VTSDNode(VT); 1171 AllNodes.push_back(N); 1172 return SDValue(N, 0); 1173} 1174 1175SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1176 SDNode *&N = ExternalSymbols[Sym]; 1177 if (N) return SDValue(N, 0); 1178 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1179 AllNodes.push_back(N); 1180 return SDValue(N, 0); 1181} 1182 1183SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1184 unsigned char TargetFlags) { 1185 SDNode *&N = 1186 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1187 TargetFlags)]; 1188 if (N) return SDValue(N, 0); 1189 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1190 AllNodes.push_back(N); 1191 return SDValue(N, 0); 1192} 1193 1194SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1195 if ((unsigned)Cond >= CondCodeNodes.size()) 1196 CondCodeNodes.resize(Cond+1); 1197 1198 if (CondCodeNodes[Cond] == 0) { 1199 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1200 CondCodeNodes[Cond] = N; 1201 AllNodes.push_back(N); 1202 } 1203 1204 return SDValue(CondCodeNodes[Cond], 0); 1205} 1206 1207// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1208// the shuffle mask M that point at N1 to point at N2, and indices that point 1209// N2 to point at N1. 1210static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1211 std::swap(N1, N2); 1212 int NElts = M.size(); 1213 for (int i = 0; i != NElts; ++i) { 1214 if (M[i] >= NElts) 1215 M[i] -= NElts; 1216 else if (M[i] >= 0) 1217 M[i] += NElts; 1218 } 1219} 1220 1221SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1222 SDValue N2, const int *Mask) { 1223 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1224 assert(VT.isVector() && N1.getValueType().isVector() && 1225 "Vector Shuffle VTs must be a vectors"); 1226 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1227 && "Vector Shuffle VTs must have same element type"); 1228 1229 // Canonicalize shuffle undef, undef -> undef 1230 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1231 return getUNDEF(VT); 1232 1233 // Validate that all indices in Mask are within the range of the elements 1234 // input to the shuffle. 1235 unsigned NElts = VT.getVectorNumElements(); 1236 SmallVector<int, 8> MaskVec; 1237 for (unsigned i = 0; i != NElts; ++i) { 1238 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1239 MaskVec.push_back(Mask[i]); 1240 } 1241 1242 // Canonicalize shuffle v, v -> v, undef 1243 if (N1 == N2) { 1244 N2 = getUNDEF(VT); 1245 for (unsigned i = 0; i != NElts; ++i) 1246 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1247 } 1248 1249 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1250 if (N1.getOpcode() == ISD::UNDEF) 1251 commuteShuffle(N1, N2, MaskVec); 1252 1253 // Canonicalize all index into lhs, -> shuffle lhs, undef 1254 // Canonicalize all index into rhs, -> shuffle rhs, undef 1255 bool AllLHS = true, AllRHS = true; 1256 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1257 for (unsigned i = 0; i != NElts; ++i) { 1258 if (MaskVec[i] >= (int)NElts) { 1259 if (N2Undef) 1260 MaskVec[i] = -1; 1261 else 1262 AllLHS = false; 1263 } else if (MaskVec[i] >= 0) { 1264 AllRHS = false; 1265 } 1266 } 1267 if (AllLHS && AllRHS) 1268 return getUNDEF(VT); 1269 if (AllLHS && !N2Undef) 1270 N2 = getUNDEF(VT); 1271 if (AllRHS) { 1272 N1 = getUNDEF(VT); 1273 commuteShuffle(N1, N2, MaskVec); 1274 } 1275 1276 // If Identity shuffle, or all shuffle in to undef, return that node. 1277 bool AllUndef = true; 1278 bool Identity = true; 1279 for (unsigned i = 0; i != NElts; ++i) { 1280 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1281 if (MaskVec[i] >= 0) AllUndef = false; 1282 } 1283 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1284 return N1; 1285 if (AllUndef) 1286 return getUNDEF(VT); 1287 1288 FoldingSetNodeID ID; 1289 SDValue Ops[2] = { N1, N2 }; 1290 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1291 for (unsigned i = 0; i != NElts; ++i) 1292 ID.AddInteger(MaskVec[i]); 1293 1294 void* IP = 0; 1295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1296 return SDValue(E, 0); 1297 1298 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1299 // SDNode doesn't have access to it. This memory will be "leaked" when 1300 // the node is deallocated, but recovered when the NodeAllocator is released. 1301 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1302 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1303 1304 ShuffleVectorSDNode *N = 1305 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1306 CSEMap.InsertNode(N, IP); 1307 AllNodes.push_back(N); 1308 return SDValue(N, 0); 1309} 1310 1311SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1312 SDValue Val, SDValue DTy, 1313 SDValue STy, SDValue Rnd, SDValue Sat, 1314 ISD::CvtCode Code) { 1315 // If the src and dest types are the same and the conversion is between 1316 // integer types of the same sign or two floats, no conversion is necessary. 1317 if (DTy == STy && 1318 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1319 return Val; 1320 1321 FoldingSetNodeID ID; 1322 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1323 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1324 void* IP = 0; 1325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1326 return SDValue(E, 0); 1327 1328 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1329 Code); 1330 CSEMap.InsertNode(N, IP); 1331 AllNodes.push_back(N); 1332 return SDValue(N, 0); 1333} 1334 1335SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1336 FoldingSetNodeID ID; 1337 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1338 ID.AddInteger(RegNo); 1339 void *IP = 0; 1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1341 return SDValue(E, 0); 1342 1343 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1350 FoldingSetNodeID ID; 1351 SDValue Ops[] = { Root }; 1352 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1353 ID.AddPointer(Label); 1354 void *IP = 0; 1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1356 return SDValue(E, 0); 1357 1358 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1359 CSEMap.InsertNode(N, IP); 1360 AllNodes.push_back(N); 1361 return SDValue(N, 0); 1362} 1363 1364 1365SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1366 bool isTarget, 1367 unsigned char TargetFlags) { 1368 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1369 1370 FoldingSetNodeID ID; 1371 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1372 ID.AddPointer(BA); 1373 ID.AddInteger(TargetFlags); 1374 void *IP = 0; 1375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1376 return SDValue(E, 0); 1377 1378 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1379 CSEMap.InsertNode(N, IP); 1380 AllNodes.push_back(N); 1381 return SDValue(N, 0); 1382} 1383 1384SDValue SelectionDAG::getSrcValue(const Value *V) { 1385 assert((!V || V->getType()->isPointerTy()) && 1386 "SrcValue is not a pointer?"); 1387 1388 FoldingSetNodeID ID; 1389 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1390 ID.AddPointer(V); 1391 1392 void *IP = 0; 1393 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1394 return SDValue(E, 0); 1395 1396 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1397 CSEMap.InsertNode(N, IP); 1398 AllNodes.push_back(N); 1399 return SDValue(N, 0); 1400} 1401 1402/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1403SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1404 FoldingSetNodeID ID; 1405 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1406 ID.AddPointer(MD); 1407 1408 void *IP = 0; 1409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1410 return SDValue(E, 0); 1411 1412 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1413 CSEMap.InsertNode(N, IP); 1414 AllNodes.push_back(N); 1415 return SDValue(N, 0); 1416} 1417 1418 1419/// getShiftAmountOperand - Return the specified value casted to 1420/// the target's desired shift amount type. 1421SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1422 EVT OpTy = Op.getValueType(); 1423 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1424 if (OpTy == ShTy || OpTy.isVector()) return Op; 1425 1426 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1427 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1428} 1429 1430/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1431/// specified value type. 1432SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1433 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1434 unsigned ByteSize = VT.getStoreSize(); 1435 Type *Ty = VT.getTypeForEVT(*getContext()); 1436 unsigned StackAlign = 1437 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1438 1439 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1440 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1441} 1442 1443/// CreateStackTemporary - Create a stack temporary suitable for holding 1444/// either of the specified value types. 1445SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1446 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1447 VT2.getStoreSizeInBits())/8; 1448 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1449 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1450 const TargetData *TD = TLI.getTargetData(); 1451 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1452 TD->getPrefTypeAlignment(Ty2)); 1453 1454 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1455 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1456 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1457} 1458 1459SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1460 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1461 // These setcc operations always fold. 1462 switch (Cond) { 1463 default: break; 1464 case ISD::SETFALSE: 1465 case ISD::SETFALSE2: return getConstant(0, VT); 1466 case ISD::SETTRUE: 1467 case ISD::SETTRUE2: return getConstant(1, VT); 1468 1469 case ISD::SETOEQ: 1470 case ISD::SETOGT: 1471 case ISD::SETOGE: 1472 case ISD::SETOLT: 1473 case ISD::SETOLE: 1474 case ISD::SETONE: 1475 case ISD::SETO: 1476 case ISD::SETUO: 1477 case ISD::SETUEQ: 1478 case ISD::SETUNE: 1479 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1480 break; 1481 } 1482 1483 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1484 const APInt &C2 = N2C->getAPIntValue(); 1485 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1486 const APInt &C1 = N1C->getAPIntValue(); 1487 1488 switch (Cond) { 1489 default: llvm_unreachable("Unknown integer setcc!"); 1490 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1491 case ISD::SETNE: return getConstant(C1 != C2, VT); 1492 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1493 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1494 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1495 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1496 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1497 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1498 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1499 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1500 } 1501 } 1502 } 1503 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1504 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1505 // No compile time operations on this type yet. 1506 if (N1C->getValueType(0) == MVT::ppcf128) 1507 return SDValue(); 1508 1509 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1510 switch (Cond) { 1511 default: break; 1512 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1513 return getUNDEF(VT); 1514 // fall through 1515 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1516 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1517 return getUNDEF(VT); 1518 // fall through 1519 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1520 R==APFloat::cmpLessThan, VT); 1521 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1522 return getUNDEF(VT); 1523 // fall through 1524 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1525 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1526 return getUNDEF(VT); 1527 // fall through 1528 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1529 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1530 return getUNDEF(VT); 1531 // fall through 1532 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1533 R==APFloat::cmpEqual, VT); 1534 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1535 return getUNDEF(VT); 1536 // fall through 1537 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1538 R==APFloat::cmpEqual, VT); 1539 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1540 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1541 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1542 R==APFloat::cmpEqual, VT); 1543 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1544 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1545 R==APFloat::cmpLessThan, VT); 1546 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1547 R==APFloat::cmpUnordered, VT); 1548 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1549 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1550 } 1551 } else { 1552 // Ensure that the constant occurs on the RHS. 1553 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1554 } 1555 } 1556 1557 // Could not fold it. 1558 return SDValue(); 1559} 1560 1561/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1562/// use this predicate to simplify operations downstream. 1563bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1564 // This predicate is not safe for vector operations. 1565 if (Op.getValueType().isVector()) 1566 return false; 1567 1568 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1569 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1570} 1571 1572/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1573/// this predicate to simplify operations downstream. Mask is known to be zero 1574/// for bits that V cannot have. 1575bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1576 unsigned Depth) const { 1577 APInt KnownZero, KnownOne; 1578 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1579 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1580 return (KnownZero & Mask) == Mask; 1581} 1582 1583/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1584/// known to be either zero or one and return them in the KnownZero/KnownOne 1585/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1586/// processing. 1587void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1588 APInt &KnownZero, APInt &KnownOne, 1589 unsigned Depth) const { 1590 unsigned BitWidth = Mask.getBitWidth(); 1591 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1592 "Mask size mismatches value type size!"); 1593 1594 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1595 if (Depth == 6 || Mask == 0) 1596 return; // Limit search depth. 1597 1598 APInt KnownZero2, KnownOne2; 1599 1600 switch (Op.getOpcode()) { 1601 case ISD::Constant: 1602 // We know all of the bits for a constant! 1603 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1604 KnownZero = ~KnownOne & Mask; 1605 return; 1606 case ISD::AND: 1607 // If either the LHS or the RHS are Zero, the result is zero. 1608 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1609 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1610 KnownZero2, KnownOne2, Depth+1); 1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1612 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1613 1614 // Output known-1 bits are only known if set in both the LHS & RHS. 1615 KnownOne &= KnownOne2; 1616 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1617 KnownZero |= KnownZero2; 1618 return; 1619 case ISD::OR: 1620 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1621 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1622 KnownZero2, KnownOne2, Depth+1); 1623 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1624 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1625 1626 // Output known-0 bits are only known if clear in both the LHS & RHS. 1627 KnownZero &= KnownZero2; 1628 // Output known-1 are known to be set if set in either the LHS | RHS. 1629 KnownOne |= KnownOne2; 1630 return; 1631 case ISD::XOR: { 1632 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1633 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1636 1637 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1638 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1639 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1640 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1641 KnownZero = KnownZeroOut; 1642 return; 1643 } 1644 case ISD::MUL: { 1645 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1646 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1647 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1650 1651 // If low bits are zero in either operand, output low known-0 bits. 1652 // Also compute a conserative estimate for high known-0 bits. 1653 // More trickiness is possible, but this is sufficient for the 1654 // interesting case of alignment computation. 1655 KnownOne.clearAllBits(); 1656 unsigned TrailZ = KnownZero.countTrailingOnes() + 1657 KnownZero2.countTrailingOnes(); 1658 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1659 KnownZero2.countLeadingOnes(), 1660 BitWidth) - BitWidth; 1661 1662 TrailZ = std::min(TrailZ, BitWidth); 1663 LeadZ = std::min(LeadZ, BitWidth); 1664 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1665 APInt::getHighBitsSet(BitWidth, LeadZ); 1666 KnownZero &= Mask; 1667 return; 1668 } 1669 case ISD::UDIV: { 1670 // For the purposes of computing leading zeros we can conservatively 1671 // treat a udiv as a logical right shift by the power of 2 known to 1672 // be less than the denominator. 1673 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1674 ComputeMaskedBits(Op.getOperand(0), 1675 AllOnes, KnownZero2, KnownOne2, Depth+1); 1676 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1677 1678 KnownOne2.clearAllBits(); 1679 KnownZero2.clearAllBits(); 1680 ComputeMaskedBits(Op.getOperand(1), 1681 AllOnes, KnownZero2, KnownOne2, Depth+1); 1682 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1683 if (RHSUnknownLeadingOnes != BitWidth) 1684 LeadZ = std::min(BitWidth, 1685 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1686 1687 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1688 return; 1689 } 1690 case ISD::SELECT: 1691 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1692 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1695 1696 // Only known if known in both the LHS and RHS. 1697 KnownOne &= KnownOne2; 1698 KnownZero &= KnownZero2; 1699 return; 1700 case ISD::SELECT_CC: 1701 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1702 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1704 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1705 1706 // Only known if known in both the LHS and RHS. 1707 KnownOne &= KnownOne2; 1708 KnownZero &= KnownZero2; 1709 return; 1710 case ISD::SADDO: 1711 case ISD::UADDO: 1712 case ISD::SSUBO: 1713 case ISD::USUBO: 1714 case ISD::SMULO: 1715 case ISD::UMULO: 1716 if (Op.getResNo() != 1) 1717 return; 1718 // The boolean result conforms to getBooleanContents. Fall through. 1719 case ISD::SETCC: 1720 // If we know the result of a setcc has the top bits zero, use this info. 1721 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1722 BitWidth > 1) 1723 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1724 return; 1725 case ISD::SHL: 1726 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1727 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1728 unsigned ShAmt = SA->getZExtValue(); 1729 1730 // If the shift count is an invalid immediate, don't do anything. 1731 if (ShAmt >= BitWidth) 1732 return; 1733 1734 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1735 KnownZero, KnownOne, Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 KnownZero <<= ShAmt; 1738 KnownOne <<= ShAmt; 1739 // low bits known zero. 1740 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1741 } 1742 return; 1743 case ISD::SRL: 1744 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1745 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1746 unsigned ShAmt = SA->getZExtValue(); 1747 1748 // If the shift count is an invalid immediate, don't do anything. 1749 if (ShAmt >= BitWidth) 1750 return; 1751 1752 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1753 KnownZero, KnownOne, Depth+1); 1754 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1755 KnownZero = KnownZero.lshr(ShAmt); 1756 KnownOne = KnownOne.lshr(ShAmt); 1757 1758 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1759 KnownZero |= HighBits; // High bits known zero. 1760 } 1761 return; 1762 case ISD::SRA: 1763 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1764 unsigned ShAmt = SA->getZExtValue(); 1765 1766 // If the shift count is an invalid immediate, don't do anything. 1767 if (ShAmt >= BitWidth) 1768 return; 1769 1770 APInt InDemandedMask = (Mask << ShAmt); 1771 // If any of the demanded bits are produced by the sign extension, we also 1772 // demand the input sign bit. 1773 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1774 if (HighBits.getBoolValue()) 1775 InDemandedMask |= APInt::getSignBit(BitWidth); 1776 1777 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1778 Depth+1); 1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1780 KnownZero = KnownZero.lshr(ShAmt); 1781 KnownOne = KnownOne.lshr(ShAmt); 1782 1783 // Handle the sign bits. 1784 APInt SignBit = APInt::getSignBit(BitWidth); 1785 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1786 1787 if (KnownZero.intersects(SignBit)) { 1788 KnownZero |= HighBits; // New bits are known zero. 1789 } else if (KnownOne.intersects(SignBit)) { 1790 KnownOne |= HighBits; // New bits are known one. 1791 } 1792 } 1793 return; 1794 case ISD::SIGN_EXTEND_INREG: { 1795 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1796 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1797 1798 // Sign extension. Compute the demanded bits in the result that are not 1799 // present in the input. 1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1801 1802 APInt InSignBit = APInt::getSignBit(EBits); 1803 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1804 1805 // If the sign extended bits are demanded, we know that the sign 1806 // bit is demanded. 1807 InSignBit = InSignBit.zext(BitWidth); 1808 if (NewBits.getBoolValue()) 1809 InputDemandedBits |= InSignBit; 1810 1811 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1812 KnownZero, KnownOne, Depth+1); 1813 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1814 1815 // If the sign bit of the input is known set or clear, then we know the 1816 // top bits of the result. 1817 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1818 KnownZero |= NewBits; 1819 KnownOne &= ~NewBits; 1820 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1821 KnownOne |= NewBits; 1822 KnownZero &= ~NewBits; 1823 } else { // Input sign bit unknown 1824 KnownZero &= ~NewBits; 1825 KnownOne &= ~NewBits; 1826 } 1827 return; 1828 } 1829 case ISD::CTTZ: 1830 case ISD::CTLZ: 1831 case ISD::CTPOP: { 1832 unsigned LowBits = Log2_32(BitWidth)+1; 1833 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1834 KnownOne.clearAllBits(); 1835 return; 1836 } 1837 case ISD::LOAD: { 1838 if (ISD::isZEXTLoad(Op.getNode())) { 1839 LoadSDNode *LD = cast<LoadSDNode>(Op); 1840 EVT VT = LD->getMemoryVT(); 1841 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1842 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1843 } 1844 return; 1845 } 1846 case ISD::ZERO_EXTEND: { 1847 EVT InVT = Op.getOperand(0).getValueType(); 1848 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1849 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1850 APInt InMask = Mask.trunc(InBits); 1851 KnownZero = KnownZero.trunc(InBits); 1852 KnownOne = KnownOne.trunc(InBits); 1853 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1854 KnownZero = KnownZero.zext(BitWidth); 1855 KnownOne = KnownOne.zext(BitWidth); 1856 KnownZero |= NewBits; 1857 return; 1858 } 1859 case ISD::SIGN_EXTEND: { 1860 EVT InVT = Op.getOperand(0).getValueType(); 1861 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1862 APInt InSignBit = APInt::getSignBit(InBits); 1863 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1864 APInt InMask = Mask.trunc(InBits); 1865 1866 // If any of the sign extended bits are demanded, we know that the sign 1867 // bit is demanded. Temporarily set this bit in the mask for our callee. 1868 if (NewBits.getBoolValue()) 1869 InMask |= InSignBit; 1870 1871 KnownZero = KnownZero.trunc(InBits); 1872 KnownOne = KnownOne.trunc(InBits); 1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1874 1875 // Note if the sign bit is known to be zero or one. 1876 bool SignBitKnownZero = KnownZero.isNegative(); 1877 bool SignBitKnownOne = KnownOne.isNegative(); 1878 assert(!(SignBitKnownZero && SignBitKnownOne) && 1879 "Sign bit can't be known to be both zero and one!"); 1880 1881 // If the sign bit wasn't actually demanded by our caller, we don't 1882 // want it set in the KnownZero and KnownOne result values. Reset the 1883 // mask and reapply it to the result values. 1884 InMask = Mask.trunc(InBits); 1885 KnownZero &= InMask; 1886 KnownOne &= InMask; 1887 1888 KnownZero = KnownZero.zext(BitWidth); 1889 KnownOne = KnownOne.zext(BitWidth); 1890 1891 // If the sign bit is known zero or one, the top bits match. 1892 if (SignBitKnownZero) 1893 KnownZero |= NewBits; 1894 else if (SignBitKnownOne) 1895 KnownOne |= NewBits; 1896 return; 1897 } 1898 case ISD::ANY_EXTEND: { 1899 EVT InVT = Op.getOperand(0).getValueType(); 1900 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1901 APInt InMask = Mask.trunc(InBits); 1902 KnownZero = KnownZero.trunc(InBits); 1903 KnownOne = KnownOne.trunc(InBits); 1904 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1905 KnownZero = KnownZero.zext(BitWidth); 1906 KnownOne = KnownOne.zext(BitWidth); 1907 return; 1908 } 1909 case ISD::TRUNCATE: { 1910 EVT InVT = Op.getOperand(0).getValueType(); 1911 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1912 APInt InMask = Mask.zext(InBits); 1913 KnownZero = KnownZero.zext(InBits); 1914 KnownOne = KnownOne.zext(InBits); 1915 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1916 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1917 KnownZero = KnownZero.trunc(BitWidth); 1918 KnownOne = KnownOne.trunc(BitWidth); 1919 break; 1920 } 1921 case ISD::AssertZext: { 1922 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1923 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1924 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1925 KnownOne, Depth+1); 1926 KnownZero |= (~InMask) & Mask; 1927 return; 1928 } 1929 case ISD::FGETSIGN: 1930 // All bits are zero except the low bit. 1931 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1932 return; 1933 1934 case ISD::SUB: { 1935 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1936 // We know that the top bits of C-X are clear if X contains less bits 1937 // than C (i.e. no wrap-around can happen). For example, 20-X is 1938 // positive if we can prove that X is >= 0 and < 16. 1939 if (CLHS->getAPIntValue().isNonNegative()) { 1940 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1941 // NLZ can't be BitWidth with no sign bit 1942 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1943 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1944 Depth+1); 1945 1946 // If all of the MaskV bits are known to be zero, then we know the 1947 // output top bits are zero, because we now know that the output is 1948 // from [0-C]. 1949 if ((KnownZero2 & MaskV) == MaskV) { 1950 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1951 // Top bits known zero. 1952 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1953 } 1954 } 1955 } 1956 } 1957 // fall through 1958 case ISD::ADD: 1959 case ISD::ADDE: { 1960 // Output known-0 bits are known if clear or set in both the low clear bits 1961 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1962 // low 3 bits clear. 1963 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1964 BitWidth - Mask.countLeadingZeros()); 1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1966 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1967 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1968 1969 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1970 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1971 KnownZeroOut = std::min(KnownZeroOut, 1972 KnownZero2.countTrailingOnes()); 1973 1974 if (Op.getOpcode() == ISD::ADD) { 1975 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1976 return; 1977 } 1978 1979 // With ADDE, a carry bit may be added in, so we can only use this 1980 // information if we know (at least) that the low two bits are clear. We 1981 // then return to the caller that the low bit is unknown but that other bits 1982 // are known zero. 1983 if (KnownZeroOut >= 2) // ADDE 1984 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 1985 return; 1986 } 1987 case ISD::SREM: 1988 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1989 const APInt &RA = Rem->getAPIntValue().abs(); 1990 if (RA.isPowerOf2()) { 1991 APInt LowBits = RA - 1; 1992 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1993 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1994 1995 // The low bits of the first operand are unchanged by the srem. 1996 KnownZero = KnownZero2 & LowBits; 1997 KnownOne = KnownOne2 & LowBits; 1998 1999 // If the first operand is non-negative or has all low bits zero, then 2000 // the upper bits are all zero. 2001 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2002 KnownZero |= ~LowBits; 2003 2004 // If the first operand is negative and not all low bits are zero, then 2005 // the upper bits are all one. 2006 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2007 KnownOne |= ~LowBits; 2008 2009 KnownZero &= Mask; 2010 KnownOne &= Mask; 2011 2012 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2013 } 2014 } 2015 return; 2016 case ISD::UREM: { 2017 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2018 const APInt &RA = Rem->getAPIntValue(); 2019 if (RA.isPowerOf2()) { 2020 APInt LowBits = (RA - 1); 2021 APInt Mask2 = LowBits & Mask; 2022 KnownZero |= ~LowBits & Mask; 2023 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 2024 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2025 break; 2026 } 2027 } 2028 2029 // Since the result is less than or equal to either operand, any leading 2030 // zero bits in either operand must also exist in the result. 2031 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 2032 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 2033 Depth+1); 2034 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 2035 Depth+1); 2036 2037 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2038 KnownZero2.countLeadingOnes()); 2039 KnownOne.clearAllBits(); 2040 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2041 return; 2042 } 2043 case ISD::FrameIndex: 2044 case ISD::TargetFrameIndex: 2045 if (unsigned Align = InferPtrAlignment(Op)) { 2046 // The low bits are known zero if the pointer is aligned. 2047 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2048 return; 2049 } 2050 break; 2051 2052 default: 2053 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2054 break; 2055 // Fallthrough 2056 case ISD::INTRINSIC_WO_CHAIN: 2057 case ISD::INTRINSIC_W_CHAIN: 2058 case ISD::INTRINSIC_VOID: 2059 // Allow the target to implement this method for its nodes. 2060 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2061 Depth); 2062 return; 2063 } 2064} 2065 2066/// ComputeNumSignBits - Return the number of times the sign bit of the 2067/// register is replicated into the other bits. We know that at least 1 bit 2068/// is always equal to the sign bit (itself), but other cases can give us 2069/// information. For example, immediately after an "SRA X, 2", we know that 2070/// the top 3 bits are all equal to each other, so we return 3. 2071unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2072 EVT VT = Op.getValueType(); 2073 assert(VT.isInteger() && "Invalid VT!"); 2074 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2075 unsigned Tmp, Tmp2; 2076 unsigned FirstAnswer = 1; 2077 2078 if (Depth == 6) 2079 return 1; // Limit search depth. 2080 2081 switch (Op.getOpcode()) { 2082 default: break; 2083 case ISD::AssertSext: 2084 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2085 return VTBits-Tmp+1; 2086 case ISD::AssertZext: 2087 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2088 return VTBits-Tmp; 2089 2090 case ISD::Constant: { 2091 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2092 return Val.getNumSignBits(); 2093 } 2094 2095 case ISD::SIGN_EXTEND: 2096 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2097 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2098 2099 case ISD::SIGN_EXTEND_INREG: 2100 // Max of the input and what this extends. 2101 Tmp = 2102 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2103 Tmp = VTBits-Tmp+1; 2104 2105 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2106 return std::max(Tmp, Tmp2); 2107 2108 case ISD::SRA: 2109 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2110 // SRA X, C -> adds C sign bits. 2111 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2112 Tmp += C->getZExtValue(); 2113 if (Tmp > VTBits) Tmp = VTBits; 2114 } 2115 return Tmp; 2116 case ISD::SHL: 2117 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2118 // shl destroys sign bits. 2119 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2120 if (C->getZExtValue() >= VTBits || // Bad shift. 2121 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2122 return Tmp - C->getZExtValue(); 2123 } 2124 break; 2125 case ISD::AND: 2126 case ISD::OR: 2127 case ISD::XOR: // NOT is handled here. 2128 // Logical binary ops preserve the number of sign bits at the worst. 2129 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2130 if (Tmp != 1) { 2131 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2132 FirstAnswer = std::min(Tmp, Tmp2); 2133 // We computed what we know about the sign bits as our first 2134 // answer. Now proceed to the generic code that uses 2135 // ComputeMaskedBits, and pick whichever answer is better. 2136 } 2137 break; 2138 2139 case ISD::SELECT: 2140 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2141 if (Tmp == 1) return 1; // Early out. 2142 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2143 return std::min(Tmp, Tmp2); 2144 2145 case ISD::SADDO: 2146 case ISD::UADDO: 2147 case ISD::SSUBO: 2148 case ISD::USUBO: 2149 case ISD::SMULO: 2150 case ISD::UMULO: 2151 if (Op.getResNo() != 1) 2152 break; 2153 // The boolean result conforms to getBooleanContents. Fall through. 2154 case ISD::SETCC: 2155 // If setcc returns 0/-1, all bits are sign bits. 2156 if (TLI.getBooleanContents() == 2157 TargetLowering::ZeroOrNegativeOneBooleanContent) 2158 return VTBits; 2159 break; 2160 case ISD::ROTL: 2161 case ISD::ROTR: 2162 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2163 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2164 2165 // Handle rotate right by N like a rotate left by 32-N. 2166 if (Op.getOpcode() == ISD::ROTR) 2167 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2168 2169 // If we aren't rotating out all of the known-in sign bits, return the 2170 // number that are left. This handles rotl(sext(x), 1) for example. 2171 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2172 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2173 } 2174 break; 2175 case ISD::ADD: 2176 // Add can have at most one carry bit. Thus we know that the output 2177 // is, at worst, one more bit than the inputs. 2178 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2179 if (Tmp == 1) return 1; // Early out. 2180 2181 // Special case decrementing a value (ADD X, -1): 2182 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2183 if (CRHS->isAllOnesValue()) { 2184 APInt KnownZero, KnownOne; 2185 APInt Mask = APInt::getAllOnesValue(VTBits); 2186 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2187 2188 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2189 // sign bits set. 2190 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2191 return VTBits; 2192 2193 // If we are subtracting one from a positive number, there is no carry 2194 // out of the result. 2195 if (KnownZero.isNegative()) 2196 return Tmp; 2197 } 2198 2199 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2200 if (Tmp2 == 1) return 1; 2201 return std::min(Tmp, Tmp2)-1; 2202 break; 2203 2204 case ISD::SUB: 2205 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2206 if (Tmp2 == 1) return 1; 2207 2208 // Handle NEG. 2209 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2210 if (CLHS->isNullValue()) { 2211 APInt KnownZero, KnownOne; 2212 APInt Mask = APInt::getAllOnesValue(VTBits); 2213 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2214 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2215 // sign bits set. 2216 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2217 return VTBits; 2218 2219 // If the input is known to be positive (the sign bit is known clear), 2220 // the output of the NEG has the same number of sign bits as the input. 2221 if (KnownZero.isNegative()) 2222 return Tmp2; 2223 2224 // Otherwise, we treat this like a SUB. 2225 } 2226 2227 // Sub can have at most one carry bit. Thus we know that the output 2228 // is, at worst, one more bit than the inputs. 2229 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2230 if (Tmp == 1) return 1; // Early out. 2231 return std::min(Tmp, Tmp2)-1; 2232 break; 2233 case ISD::TRUNCATE: 2234 // FIXME: it's tricky to do anything useful for this, but it is an important 2235 // case for targets like X86. 2236 break; 2237 } 2238 2239 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2240 if (Op.getOpcode() == ISD::LOAD) { 2241 LoadSDNode *LD = cast<LoadSDNode>(Op); 2242 unsigned ExtType = LD->getExtensionType(); 2243 switch (ExtType) { 2244 default: break; 2245 case ISD::SEXTLOAD: // '17' bits known 2246 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2247 return VTBits-Tmp+1; 2248 case ISD::ZEXTLOAD: // '16' bits known 2249 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2250 return VTBits-Tmp; 2251 } 2252 } 2253 2254 // Allow the target to implement this method for its nodes. 2255 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2256 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2257 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2258 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2259 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2260 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2261 } 2262 2263 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2264 // use this information. 2265 APInt KnownZero, KnownOne; 2266 APInt Mask = APInt::getAllOnesValue(VTBits); 2267 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2268 2269 if (KnownZero.isNegative()) { // sign bit is 0 2270 Mask = KnownZero; 2271 } else if (KnownOne.isNegative()) { // sign bit is 1; 2272 Mask = KnownOne; 2273 } else { 2274 // Nothing known. 2275 return FirstAnswer; 2276 } 2277 2278 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2279 // the number of identical bits in the top of the input value. 2280 Mask = ~Mask; 2281 Mask <<= Mask.getBitWidth()-VTBits; 2282 // Return # leading zeros. We use 'min' here in case Val was zero before 2283 // shifting. We don't want to return '64' as for an i32 "0". 2284 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2285} 2286 2287/// isBaseWithConstantOffset - Return true if the specified operand is an 2288/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2289/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2290/// semantics as an ADD. This handles the equivalence: 2291/// X|Cst == X+Cst iff X&Cst = 0. 2292bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2293 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2294 !isa<ConstantSDNode>(Op.getOperand(1))) 2295 return false; 2296 2297 if (Op.getOpcode() == ISD::OR && 2298 !MaskedValueIsZero(Op.getOperand(0), 2299 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2300 return false; 2301 2302 return true; 2303} 2304 2305 2306bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2307 // If we're told that NaNs won't happen, assume they won't. 2308 if (NoNaNsFPMath) 2309 return true; 2310 2311 // If the value is a constant, we can obviously see if it is a NaN or not. 2312 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2313 return !C->getValueAPF().isNaN(); 2314 2315 // TODO: Recognize more cases here. 2316 2317 return false; 2318} 2319 2320bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2321 // If the value is a constant, we can obviously see if it is a zero or not. 2322 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2323 return !C->isZero(); 2324 2325 // TODO: Recognize more cases here. 2326 switch (Op.getOpcode()) { 2327 default: break; 2328 case ISD::OR: 2329 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2330 return !C->isNullValue(); 2331 break; 2332 } 2333 2334 return false; 2335} 2336 2337bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2338 // Check the obvious case. 2339 if (A == B) return true; 2340 2341 // For for negative and positive zero. 2342 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2343 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2344 if (CA->isZero() && CB->isZero()) return true; 2345 2346 // Otherwise they may not be equal. 2347 return false; 2348} 2349 2350/// getNode - Gets or creates the specified node. 2351/// 2352SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2353 FoldingSetNodeID ID; 2354 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2355 void *IP = 0; 2356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2357 return SDValue(E, 0); 2358 2359 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2360 CSEMap.InsertNode(N, IP); 2361 2362 AllNodes.push_back(N); 2363#ifndef NDEBUG 2364 VerifySDNode(N); 2365#endif 2366 return SDValue(N, 0); 2367} 2368 2369SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2370 EVT VT, SDValue Operand) { 2371 // Constant fold unary operations with an integer constant operand. 2372 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2373 const APInt &Val = C->getAPIntValue(); 2374 switch (Opcode) { 2375 default: break; 2376 case ISD::SIGN_EXTEND: 2377 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2378 case ISD::ANY_EXTEND: 2379 case ISD::ZERO_EXTEND: 2380 case ISD::TRUNCATE: 2381 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2382 case ISD::UINT_TO_FP: 2383 case ISD::SINT_TO_FP: { 2384 // No compile time operations on ppcf128. 2385 if (VT == MVT::ppcf128) break; 2386 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2387 (void)apf.convertFromAPInt(Val, 2388 Opcode==ISD::SINT_TO_FP, 2389 APFloat::rmNearestTiesToEven); 2390 return getConstantFP(apf, VT); 2391 } 2392 case ISD::BITCAST: 2393 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2394 return getConstantFP(Val.bitsToFloat(), VT); 2395 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2396 return getConstantFP(Val.bitsToDouble(), VT); 2397 break; 2398 case ISD::BSWAP: 2399 return getConstant(Val.byteSwap(), VT); 2400 case ISD::CTPOP: 2401 return getConstant(Val.countPopulation(), VT); 2402 case ISD::CTLZ: 2403 return getConstant(Val.countLeadingZeros(), VT); 2404 case ISD::CTTZ: 2405 return getConstant(Val.countTrailingZeros(), VT); 2406 } 2407 } 2408 2409 // Constant fold unary operations with a floating point constant operand. 2410 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2411 APFloat V = C->getValueAPF(); // make copy 2412 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2413 switch (Opcode) { 2414 case ISD::FNEG: 2415 V.changeSign(); 2416 return getConstantFP(V, VT); 2417 case ISD::FABS: 2418 V.clearSign(); 2419 return getConstantFP(V, VT); 2420 case ISD::FP_ROUND: 2421 case ISD::FP_EXTEND: { 2422 bool ignored; 2423 // This can return overflow, underflow, or inexact; we don't care. 2424 // FIXME need to be more flexible about rounding mode. 2425 (void)V.convert(*EVTToAPFloatSemantics(VT), 2426 APFloat::rmNearestTiesToEven, &ignored); 2427 return getConstantFP(V, VT); 2428 } 2429 case ISD::FP_TO_SINT: 2430 case ISD::FP_TO_UINT: { 2431 integerPart x[2]; 2432 bool ignored; 2433 assert(integerPartWidth >= 64); 2434 // FIXME need to be more flexible about rounding mode. 2435 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2436 Opcode==ISD::FP_TO_SINT, 2437 APFloat::rmTowardZero, &ignored); 2438 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2439 break; 2440 APInt api(VT.getSizeInBits(), x); 2441 return getConstant(api, VT); 2442 } 2443 case ISD::BITCAST: 2444 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2445 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2446 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2447 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2448 break; 2449 } 2450 } 2451 } 2452 2453 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2454 switch (Opcode) { 2455 case ISD::TokenFactor: 2456 case ISD::MERGE_VALUES: 2457 case ISD::CONCAT_VECTORS: 2458 return Operand; // Factor, merge or concat of one node? No need. 2459 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2460 case ISD::FP_EXTEND: 2461 assert(VT.isFloatingPoint() && 2462 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2463 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2464 assert((!VT.isVector() || 2465 VT.getVectorNumElements() == 2466 Operand.getValueType().getVectorNumElements()) && 2467 "Vector element count mismatch!"); 2468 if (Operand.getOpcode() == ISD::UNDEF) 2469 return getUNDEF(VT); 2470 break; 2471 case ISD::SIGN_EXTEND: 2472 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2473 "Invalid SIGN_EXTEND!"); 2474 if (Operand.getValueType() == VT) return Operand; // noop extension 2475 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2476 "Invalid sext node, dst < src!"); 2477 assert((!VT.isVector() || 2478 VT.getVectorNumElements() == 2479 Operand.getValueType().getVectorNumElements()) && 2480 "Vector element count mismatch!"); 2481 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2482 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2483 else if (OpOpcode == ISD::UNDEF) 2484 // sext(undef) = 0, because the top bits will all be the same. 2485 return getConstant(0, VT); 2486 break; 2487 case ISD::ZERO_EXTEND: 2488 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2489 "Invalid ZERO_EXTEND!"); 2490 if (Operand.getValueType() == VT) return Operand; // noop extension 2491 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2492 "Invalid zext node, dst < src!"); 2493 assert((!VT.isVector() || 2494 VT.getVectorNumElements() == 2495 Operand.getValueType().getVectorNumElements()) && 2496 "Vector element count mismatch!"); 2497 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2498 return getNode(ISD::ZERO_EXTEND, DL, VT, 2499 Operand.getNode()->getOperand(0)); 2500 else if (OpOpcode == ISD::UNDEF) 2501 // zext(undef) = 0, because the top bits will be zero. 2502 return getConstant(0, VT); 2503 break; 2504 case ISD::ANY_EXTEND: 2505 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2506 "Invalid ANY_EXTEND!"); 2507 if (Operand.getValueType() == VT) return Operand; // noop extension 2508 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2509 "Invalid anyext node, dst < src!"); 2510 assert((!VT.isVector() || 2511 VT.getVectorNumElements() == 2512 Operand.getValueType().getVectorNumElements()) && 2513 "Vector element count mismatch!"); 2514 2515 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2516 OpOpcode == ISD::ANY_EXTEND) 2517 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2518 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2519 else if (OpOpcode == ISD::UNDEF) 2520 return getUNDEF(VT); 2521 2522 // (ext (trunx x)) -> x 2523 if (OpOpcode == ISD::TRUNCATE) { 2524 SDValue OpOp = Operand.getNode()->getOperand(0); 2525 if (OpOp.getValueType() == VT) 2526 return OpOp; 2527 } 2528 break; 2529 case ISD::TRUNCATE: 2530 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2531 "Invalid TRUNCATE!"); 2532 if (Operand.getValueType() == VT) return Operand; // noop truncate 2533 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2534 "Invalid truncate node, src < dst!"); 2535 assert((!VT.isVector() || 2536 VT.getVectorNumElements() == 2537 Operand.getValueType().getVectorNumElements()) && 2538 "Vector element count mismatch!"); 2539 if (OpOpcode == ISD::TRUNCATE) 2540 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2541 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2542 OpOpcode == ISD::ANY_EXTEND) { 2543 // If the source is smaller than the dest, we still need an extend. 2544 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2545 .bitsLT(VT.getScalarType())) 2546 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2547 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2548 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2549 else 2550 return Operand.getNode()->getOperand(0); 2551 } 2552 break; 2553 case ISD::BITCAST: 2554 // Basic sanity checking. 2555 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2556 && "Cannot BITCAST between types of different sizes!"); 2557 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2558 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2559 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2560 if (OpOpcode == ISD::UNDEF) 2561 return getUNDEF(VT); 2562 break; 2563 case ISD::SCALAR_TO_VECTOR: 2564 assert(VT.isVector() && !Operand.getValueType().isVector() && 2565 (VT.getVectorElementType() == Operand.getValueType() || 2566 (VT.getVectorElementType().isInteger() && 2567 Operand.getValueType().isInteger() && 2568 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2569 "Illegal SCALAR_TO_VECTOR node!"); 2570 if (OpOpcode == ISD::UNDEF) 2571 return getUNDEF(VT); 2572 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2573 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2574 isa<ConstantSDNode>(Operand.getOperand(1)) && 2575 Operand.getConstantOperandVal(1) == 0 && 2576 Operand.getOperand(0).getValueType() == VT) 2577 return Operand.getOperand(0); 2578 break; 2579 case ISD::FNEG: 2580 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2581 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2582 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2583 Operand.getNode()->getOperand(0)); 2584 if (OpOpcode == ISD::FNEG) // --X -> X 2585 return Operand.getNode()->getOperand(0); 2586 break; 2587 case ISD::FABS: 2588 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2589 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2590 break; 2591 } 2592 2593 SDNode *N; 2594 SDVTList VTs = getVTList(VT); 2595 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2596 FoldingSetNodeID ID; 2597 SDValue Ops[1] = { Operand }; 2598 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2599 void *IP = 0; 2600 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2601 return SDValue(E, 0); 2602 2603 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2604 CSEMap.InsertNode(N, IP); 2605 } else { 2606 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2607 } 2608 2609 AllNodes.push_back(N); 2610#ifndef NDEBUG 2611 VerifySDNode(N); 2612#endif 2613 return SDValue(N, 0); 2614} 2615 2616SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2617 EVT VT, 2618 ConstantSDNode *Cst1, 2619 ConstantSDNode *Cst2) { 2620 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2621 2622 switch (Opcode) { 2623 case ISD::ADD: return getConstant(C1 + C2, VT); 2624 case ISD::SUB: return getConstant(C1 - C2, VT); 2625 case ISD::MUL: return getConstant(C1 * C2, VT); 2626 case ISD::UDIV: 2627 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2628 break; 2629 case ISD::UREM: 2630 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2631 break; 2632 case ISD::SDIV: 2633 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2634 break; 2635 case ISD::SREM: 2636 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2637 break; 2638 case ISD::AND: return getConstant(C1 & C2, VT); 2639 case ISD::OR: return getConstant(C1 | C2, VT); 2640 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2641 case ISD::SHL: return getConstant(C1 << C2, VT); 2642 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2643 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2644 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2645 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2646 default: break; 2647 } 2648 2649 return SDValue(); 2650} 2651 2652SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2653 SDValue N1, SDValue N2) { 2654 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2655 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2656 switch (Opcode) { 2657 default: break; 2658 case ISD::TokenFactor: 2659 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2660 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2661 // Fold trivial token factors. 2662 if (N1.getOpcode() == ISD::EntryToken) return N2; 2663 if (N2.getOpcode() == ISD::EntryToken) return N1; 2664 if (N1 == N2) return N1; 2665 break; 2666 case ISD::CONCAT_VECTORS: 2667 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2668 // one big BUILD_VECTOR. 2669 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2670 N2.getOpcode() == ISD::BUILD_VECTOR) { 2671 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2672 N1.getNode()->op_end()); 2673 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2674 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2675 } 2676 break; 2677 case ISD::AND: 2678 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2679 assert(N1.getValueType() == N2.getValueType() && 2680 N1.getValueType() == VT && "Binary operator types must match!"); 2681 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2682 // worth handling here. 2683 if (N2C && N2C->isNullValue()) 2684 return N2; 2685 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2686 return N1; 2687 break; 2688 case ISD::OR: 2689 case ISD::XOR: 2690 case ISD::ADD: 2691 case ISD::SUB: 2692 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2693 assert(N1.getValueType() == N2.getValueType() && 2694 N1.getValueType() == VT && "Binary operator types must match!"); 2695 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2696 // it's worth handling here. 2697 if (N2C && N2C->isNullValue()) 2698 return N1; 2699 break; 2700 case ISD::UDIV: 2701 case ISD::UREM: 2702 case ISD::MULHU: 2703 case ISD::MULHS: 2704 case ISD::MUL: 2705 case ISD::SDIV: 2706 case ISD::SREM: 2707 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2708 assert(N1.getValueType() == N2.getValueType() && 2709 N1.getValueType() == VT && "Binary operator types must match!"); 2710 break; 2711 case ISD::FADD: 2712 case ISD::FSUB: 2713 case ISD::FMUL: 2714 case ISD::FDIV: 2715 case ISD::FREM: 2716 if (UnsafeFPMath) { 2717 if (Opcode == ISD::FADD) { 2718 // 0+x --> x 2719 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2720 if (CFP->getValueAPF().isZero()) 2721 return N2; 2722 // x+0 --> x 2723 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2724 if (CFP->getValueAPF().isZero()) 2725 return N1; 2726 } else if (Opcode == ISD::FSUB) { 2727 // x-0 --> x 2728 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2729 if (CFP->getValueAPF().isZero()) 2730 return N1; 2731 } 2732 } 2733 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2734 assert(N1.getValueType() == N2.getValueType() && 2735 N1.getValueType() == VT && "Binary operator types must match!"); 2736 break; 2737 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2738 assert(N1.getValueType() == VT && 2739 N1.getValueType().isFloatingPoint() && 2740 N2.getValueType().isFloatingPoint() && 2741 "Invalid FCOPYSIGN!"); 2742 break; 2743 case ISD::SHL: 2744 case ISD::SRA: 2745 case ISD::SRL: 2746 case ISD::ROTL: 2747 case ISD::ROTR: 2748 assert(VT == N1.getValueType() && 2749 "Shift operators return type must be the same as their first arg"); 2750 assert(VT.isInteger() && N2.getValueType().isInteger() && 2751 "Shifts only work on integers"); 2752 // Verify that the shift amount VT is bit enough to hold valid shift 2753 // amounts. This catches things like trying to shift an i1024 value by an 2754 // i8, which is easy to fall into in generic code that uses 2755 // TLI.getShiftAmount(). 2756 assert(N2.getValueType().getSizeInBits() >= 2757 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2758 "Invalid use of small shift amount with oversized value!"); 2759 2760 // Always fold shifts of i1 values so the code generator doesn't need to 2761 // handle them. Since we know the size of the shift has to be less than the 2762 // size of the value, the shift/rotate count is guaranteed to be zero. 2763 if (VT == MVT::i1) 2764 return N1; 2765 if (N2C && N2C->isNullValue()) 2766 return N1; 2767 break; 2768 case ISD::FP_ROUND_INREG: { 2769 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2770 assert(VT == N1.getValueType() && "Not an inreg round!"); 2771 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2772 "Cannot FP_ROUND_INREG integer types"); 2773 assert(EVT.isVector() == VT.isVector() && 2774 "FP_ROUND_INREG type should be vector iff the operand " 2775 "type is vector!"); 2776 assert((!EVT.isVector() || 2777 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2778 "Vector element counts must match in FP_ROUND_INREG"); 2779 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2780 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2781 break; 2782 } 2783 case ISD::FP_ROUND: 2784 assert(VT.isFloatingPoint() && 2785 N1.getValueType().isFloatingPoint() && 2786 VT.bitsLE(N1.getValueType()) && 2787 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2788 if (N1.getValueType() == VT) return N1; // noop conversion. 2789 break; 2790 case ISD::AssertSext: 2791 case ISD::AssertZext: { 2792 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2793 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2794 assert(VT.isInteger() && EVT.isInteger() && 2795 "Cannot *_EXTEND_INREG FP types"); 2796 assert(!EVT.isVector() && 2797 "AssertSExt/AssertZExt type should be the vector element type " 2798 "rather than the vector type!"); 2799 assert(EVT.bitsLE(VT) && "Not extending!"); 2800 if (VT == EVT) return N1; // noop assertion. 2801 break; 2802 } 2803 case ISD::SIGN_EXTEND_INREG: { 2804 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2805 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2806 assert(VT.isInteger() && EVT.isInteger() && 2807 "Cannot *_EXTEND_INREG FP types"); 2808 assert(EVT.isVector() == VT.isVector() && 2809 "SIGN_EXTEND_INREG type should be vector iff the operand " 2810 "type is vector!"); 2811 assert((!EVT.isVector() || 2812 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2813 "Vector element counts must match in SIGN_EXTEND_INREG"); 2814 assert(EVT.bitsLE(VT) && "Not extending!"); 2815 if (EVT == VT) return N1; // Not actually extending 2816 2817 if (N1C) { 2818 APInt Val = N1C->getAPIntValue(); 2819 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2820 Val <<= Val.getBitWidth()-FromBits; 2821 Val = Val.ashr(Val.getBitWidth()-FromBits); 2822 return getConstant(Val, VT); 2823 } 2824 break; 2825 } 2826 case ISD::EXTRACT_VECTOR_ELT: 2827 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2828 if (N1.getOpcode() == ISD::UNDEF) 2829 return getUNDEF(VT); 2830 2831 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2832 // expanding copies of large vectors from registers. 2833 if (N2C && 2834 N1.getOpcode() == ISD::CONCAT_VECTORS && 2835 N1.getNumOperands() > 0) { 2836 unsigned Factor = 2837 N1.getOperand(0).getValueType().getVectorNumElements(); 2838 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2839 N1.getOperand(N2C->getZExtValue() / Factor), 2840 getConstant(N2C->getZExtValue() % Factor, 2841 N2.getValueType())); 2842 } 2843 2844 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2845 // expanding large vector constants. 2846 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2847 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2848 EVT VEltTy = N1.getValueType().getVectorElementType(); 2849 if (Elt.getValueType() != VEltTy) { 2850 // If the vector element type is not legal, the BUILD_VECTOR operands 2851 // are promoted and implicitly truncated. Make that explicit here. 2852 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2853 } 2854 if (VT != VEltTy) { 2855 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2856 // result is implicitly extended. 2857 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2858 } 2859 return Elt; 2860 } 2861 2862 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2863 // operations are lowered to scalars. 2864 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2865 // If the indices are the same, return the inserted element else 2866 // if the indices are known different, extract the element from 2867 // the original vector. 2868 SDValue N1Op2 = N1.getOperand(2); 2869 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2870 2871 if (N1Op2C && N2C) { 2872 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2873 if (VT == N1.getOperand(1).getValueType()) 2874 return N1.getOperand(1); 2875 else 2876 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2877 } 2878 2879 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2880 } 2881 } 2882 break; 2883 case ISD::EXTRACT_ELEMENT: 2884 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2885 assert(!N1.getValueType().isVector() && !VT.isVector() && 2886 (N1.getValueType().isInteger() == VT.isInteger()) && 2887 N1.getValueType() != VT && 2888 "Wrong types for EXTRACT_ELEMENT!"); 2889 2890 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2891 // 64-bit integers into 32-bit parts. Instead of building the extract of 2892 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2893 if (N1.getOpcode() == ISD::BUILD_PAIR) 2894 return N1.getOperand(N2C->getZExtValue()); 2895 2896 // EXTRACT_ELEMENT of a constant int is also very common. 2897 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2898 unsigned ElementSize = VT.getSizeInBits(); 2899 unsigned Shift = ElementSize * N2C->getZExtValue(); 2900 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2901 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2902 } 2903 break; 2904 case ISD::EXTRACT_SUBVECTOR: { 2905 SDValue Index = N2; 2906 if (VT.isSimple() && N1.getValueType().isSimple()) { 2907 assert(VT.isVector() && N1.getValueType().isVector() && 2908 "Extract subvector VTs must be a vectors!"); 2909 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2910 "Extract subvector VTs must have the same element type!"); 2911 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2912 "Extract subvector must be from larger vector to smaller vector!"); 2913 2914 if (isa<ConstantSDNode>(Index.getNode())) { 2915 assert((VT.getVectorNumElements() + 2916 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2917 <= N1.getValueType().getVectorNumElements()) 2918 && "Extract subvector overflow!"); 2919 } 2920 2921 // Trivial extraction. 2922 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2923 return N1; 2924 } 2925 break; 2926 } 2927 } 2928 2929 if (N1C) { 2930 if (N2C) { 2931 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2932 if (SV.getNode()) return SV; 2933 } else { // Cannonicalize constant to RHS if commutative 2934 if (isCommutativeBinOp(Opcode)) { 2935 std::swap(N1C, N2C); 2936 std::swap(N1, N2); 2937 } 2938 } 2939 } 2940 2941 // Constant fold FP operations. 2942 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2943 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2944 if (N1CFP) { 2945 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2946 // Cannonicalize constant to RHS if commutative 2947 std::swap(N1CFP, N2CFP); 2948 std::swap(N1, N2); 2949 } else if (N2CFP && VT != MVT::ppcf128) { 2950 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2951 APFloat::opStatus s; 2952 switch (Opcode) { 2953 case ISD::FADD: 2954 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2955 if (s != APFloat::opInvalidOp) 2956 return getConstantFP(V1, VT); 2957 break; 2958 case ISD::FSUB: 2959 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2960 if (s!=APFloat::opInvalidOp) 2961 return getConstantFP(V1, VT); 2962 break; 2963 case ISD::FMUL: 2964 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2965 if (s!=APFloat::opInvalidOp) 2966 return getConstantFP(V1, VT); 2967 break; 2968 case ISD::FDIV: 2969 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2970 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2971 return getConstantFP(V1, VT); 2972 break; 2973 case ISD::FREM : 2974 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2975 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2976 return getConstantFP(V1, VT); 2977 break; 2978 case ISD::FCOPYSIGN: 2979 V1.copySign(V2); 2980 return getConstantFP(V1, VT); 2981 default: break; 2982 } 2983 } 2984 } 2985 2986 // Canonicalize an UNDEF to the RHS, even over a constant. 2987 if (N1.getOpcode() == ISD::UNDEF) { 2988 if (isCommutativeBinOp(Opcode)) { 2989 std::swap(N1, N2); 2990 } else { 2991 switch (Opcode) { 2992 case ISD::FP_ROUND_INREG: 2993 case ISD::SIGN_EXTEND_INREG: 2994 case ISD::SUB: 2995 case ISD::FSUB: 2996 case ISD::FDIV: 2997 case ISD::FREM: 2998 case ISD::SRA: 2999 return N1; // fold op(undef, arg2) -> undef 3000 case ISD::UDIV: 3001 case ISD::SDIV: 3002 case ISD::UREM: 3003 case ISD::SREM: 3004 case ISD::SRL: 3005 case ISD::SHL: 3006 if (!VT.isVector()) 3007 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3008 // For vectors, we can't easily build an all zero vector, just return 3009 // the LHS. 3010 return N2; 3011 } 3012 } 3013 } 3014 3015 // Fold a bunch of operators when the RHS is undef. 3016 if (N2.getOpcode() == ISD::UNDEF) { 3017 switch (Opcode) { 3018 case ISD::XOR: 3019 if (N1.getOpcode() == ISD::UNDEF) 3020 // Handle undef ^ undef -> 0 special case. This is a common 3021 // idiom (misuse). 3022 return getConstant(0, VT); 3023 // fallthrough 3024 case ISD::ADD: 3025 case ISD::ADDC: 3026 case ISD::ADDE: 3027 case ISD::SUB: 3028 case ISD::UDIV: 3029 case ISD::SDIV: 3030 case ISD::UREM: 3031 case ISD::SREM: 3032 return N2; // fold op(arg1, undef) -> undef 3033 case ISD::FADD: 3034 case ISD::FSUB: 3035 case ISD::FMUL: 3036 case ISD::FDIV: 3037 case ISD::FREM: 3038 if (UnsafeFPMath) 3039 return N2; 3040 break; 3041 case ISD::MUL: 3042 case ISD::AND: 3043 case ISD::SRL: 3044 case ISD::SHL: 3045 if (!VT.isVector()) 3046 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3047 // For vectors, we can't easily build an all zero vector, just return 3048 // the LHS. 3049 return N1; 3050 case ISD::OR: 3051 if (!VT.isVector()) 3052 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3053 // For vectors, we can't easily build an all one vector, just return 3054 // the LHS. 3055 return N1; 3056 case ISD::SRA: 3057 return N1; 3058 } 3059 } 3060 3061 // Memoize this node if possible. 3062 SDNode *N; 3063 SDVTList VTs = getVTList(VT); 3064 if (VT != MVT::Glue) { 3065 SDValue Ops[] = { N1, N2 }; 3066 FoldingSetNodeID ID; 3067 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3068 void *IP = 0; 3069 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3070 return SDValue(E, 0); 3071 3072 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3073 CSEMap.InsertNode(N, IP); 3074 } else { 3075 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3076 } 3077 3078 AllNodes.push_back(N); 3079#ifndef NDEBUG 3080 VerifySDNode(N); 3081#endif 3082 return SDValue(N, 0); 3083} 3084 3085SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3086 SDValue N1, SDValue N2, SDValue N3) { 3087 // Perform various simplifications. 3088 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3089 switch (Opcode) { 3090 case ISD::CONCAT_VECTORS: 3091 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3092 // one big BUILD_VECTOR. 3093 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3094 N2.getOpcode() == ISD::BUILD_VECTOR && 3095 N3.getOpcode() == ISD::BUILD_VECTOR) { 3096 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3097 N1.getNode()->op_end()); 3098 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3099 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3100 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3101 } 3102 break; 3103 case ISD::SETCC: { 3104 // Use FoldSetCC to simplify SETCC's. 3105 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3106 if (Simp.getNode()) return Simp; 3107 break; 3108 } 3109 case ISD::SELECT: 3110 if (N1C) { 3111 if (N1C->getZExtValue()) 3112 return N2; // select true, X, Y -> X 3113 else 3114 return N3; // select false, X, Y -> Y 3115 } 3116 3117 if (N2 == N3) return N2; // select C, X, X -> X 3118 break; 3119 case ISD::VECTOR_SHUFFLE: 3120 llvm_unreachable("should use getVectorShuffle constructor!"); 3121 break; 3122 case ISD::INSERT_SUBVECTOR: { 3123 SDValue Index = N3; 3124 if (VT.isSimple() && N1.getValueType().isSimple() 3125 && N2.getValueType().isSimple()) { 3126 assert(VT.isVector() && N1.getValueType().isVector() && 3127 N2.getValueType().isVector() && 3128 "Insert subvector VTs must be a vectors"); 3129 assert(VT == N1.getValueType() && 3130 "Dest and insert subvector source types must match!"); 3131 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3132 "Insert subvector must be from smaller vector to larger vector!"); 3133 if (isa<ConstantSDNode>(Index.getNode())) { 3134 assert((N2.getValueType().getVectorNumElements() + 3135 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3136 <= VT.getVectorNumElements()) 3137 && "Insert subvector overflow!"); 3138 } 3139 3140 // Trivial insertion. 3141 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3142 return N2; 3143 } 3144 break; 3145 } 3146 case ISD::BITCAST: 3147 // Fold bit_convert nodes from a type to themselves. 3148 if (N1.getValueType() == VT) 3149 return N1; 3150 break; 3151 } 3152 3153 // Memoize node if it doesn't produce a flag. 3154 SDNode *N; 3155 SDVTList VTs = getVTList(VT); 3156 if (VT != MVT::Glue) { 3157 SDValue Ops[] = { N1, N2, N3 }; 3158 FoldingSetNodeID ID; 3159 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3160 void *IP = 0; 3161 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3162 return SDValue(E, 0); 3163 3164 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3165 CSEMap.InsertNode(N, IP); 3166 } else { 3167 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3168 } 3169 3170 AllNodes.push_back(N); 3171#ifndef NDEBUG 3172 VerifySDNode(N); 3173#endif 3174 return SDValue(N, 0); 3175} 3176 3177SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3178 SDValue N1, SDValue N2, SDValue N3, 3179 SDValue N4) { 3180 SDValue Ops[] = { N1, N2, N3, N4 }; 3181 return getNode(Opcode, DL, VT, Ops, 4); 3182} 3183 3184SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3185 SDValue N1, SDValue N2, SDValue N3, 3186 SDValue N4, SDValue N5) { 3187 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3188 return getNode(Opcode, DL, VT, Ops, 5); 3189} 3190 3191/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3192/// the incoming stack arguments to be loaded from the stack. 3193SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3194 SmallVector<SDValue, 8> ArgChains; 3195 3196 // Include the original chain at the beginning of the list. When this is 3197 // used by target LowerCall hooks, this helps legalize find the 3198 // CALLSEQ_BEGIN node. 3199 ArgChains.push_back(Chain); 3200 3201 // Add a chain value for each stack argument. 3202 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3203 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3204 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3205 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3206 if (FI->getIndex() < 0) 3207 ArgChains.push_back(SDValue(L, 1)); 3208 3209 // Build a tokenfactor for all the chains. 3210 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3211 &ArgChains[0], ArgChains.size()); 3212} 3213 3214/// SplatByte - Distribute ByteVal over NumBits bits. 3215static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3216 APInt Val = APInt(NumBits, ByteVal); 3217 unsigned Shift = 8; 3218 for (unsigned i = NumBits; i > 8; i >>= 1) { 3219 Val = (Val << Shift) | Val; 3220 Shift <<= 1; 3221 } 3222 return Val; 3223} 3224 3225/// getMemsetValue - Vectorized representation of the memset value 3226/// operand. 3227static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3228 DebugLoc dl) { 3229 assert(Value.getOpcode() != ISD::UNDEF); 3230 3231 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3232 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3233 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3234 if (VT.isInteger()) 3235 return DAG.getConstant(Val, VT); 3236 return DAG.getConstantFP(APFloat(Val), VT); 3237 } 3238 3239 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3240 if (NumBits > 8) { 3241 // Use a multiplication with 0x010101... to extend the input to the 3242 // required length. 3243 APInt Magic = SplatByte(NumBits, 0x01); 3244 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3245 } 3246 3247 return Value; 3248} 3249 3250/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3251/// used when a memcpy is turned into a memset when the source is a constant 3252/// string ptr. 3253static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3254 const TargetLowering &TLI, 3255 std::string &Str, unsigned Offset) { 3256 // Handle vector with all elements zero. 3257 if (Str.empty()) { 3258 if (VT.isInteger()) 3259 return DAG.getConstant(0, VT); 3260 else if (VT == MVT::f32 || VT == MVT::f64) 3261 return DAG.getConstantFP(0.0, VT); 3262 else if (VT.isVector()) { 3263 unsigned NumElts = VT.getVectorNumElements(); 3264 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3265 return DAG.getNode(ISD::BITCAST, dl, VT, 3266 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3267 EltVT, NumElts))); 3268 } else 3269 llvm_unreachable("Expected type!"); 3270 } 3271 3272 assert(!VT.isVector() && "Can't handle vector type here!"); 3273 unsigned NumBits = VT.getSizeInBits(); 3274 unsigned MSB = NumBits / 8; 3275 uint64_t Val = 0; 3276 if (TLI.isLittleEndian()) 3277 Offset = Offset + MSB - 1; 3278 for (unsigned i = 0; i != MSB; ++i) { 3279 Val = (Val << 8) | (unsigned char)Str[Offset]; 3280 Offset += TLI.isLittleEndian() ? -1 : 1; 3281 } 3282 return DAG.getConstant(Val, VT); 3283} 3284 3285/// getMemBasePlusOffset - Returns base and offset node for the 3286/// 3287static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3288 SelectionDAG &DAG) { 3289 EVT VT = Base.getValueType(); 3290 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3291 VT, Base, DAG.getConstant(Offset, VT)); 3292} 3293 3294/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3295/// 3296static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3297 unsigned SrcDelta = 0; 3298 GlobalAddressSDNode *G = NULL; 3299 if (Src.getOpcode() == ISD::GlobalAddress) 3300 G = cast<GlobalAddressSDNode>(Src); 3301 else if (Src.getOpcode() == ISD::ADD && 3302 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3303 Src.getOperand(1).getOpcode() == ISD::Constant) { 3304 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3305 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3306 } 3307 if (!G) 3308 return false; 3309 3310 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3311 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3312 return true; 3313 3314 return false; 3315} 3316 3317/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3318/// to replace the memset / memcpy. Return true if the number of memory ops 3319/// is below the threshold. It returns the types of the sequence of 3320/// memory ops to perform memset / memcpy by reference. 3321static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3322 unsigned Limit, uint64_t Size, 3323 unsigned DstAlign, unsigned SrcAlign, 3324 bool NonScalarIntSafe, 3325 bool MemcpyStrSrc, 3326 SelectionDAG &DAG, 3327 const TargetLowering &TLI) { 3328 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3329 "Expecting memcpy / memset source to meet alignment requirement!"); 3330 // If 'SrcAlign' is zero, that means the memory operation does not need to 3331 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3332 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3333 // is the specified alignment of the memory operation. If it is zero, that 3334 // means it's possible to change the alignment of the destination. 3335 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3336 // not need to be loaded. 3337 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3338 NonScalarIntSafe, MemcpyStrSrc, 3339 DAG.getMachineFunction()); 3340 3341 if (VT == MVT::Other) { 3342 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3343 TLI.allowsUnalignedMemoryAccesses(VT)) { 3344 VT = TLI.getPointerTy(); 3345 } else { 3346 switch (DstAlign & 7) { 3347 case 0: VT = MVT::i64; break; 3348 case 4: VT = MVT::i32; break; 3349 case 2: VT = MVT::i16; break; 3350 default: VT = MVT::i8; break; 3351 } 3352 } 3353 3354 MVT LVT = MVT::i64; 3355 while (!TLI.isTypeLegal(LVT)) 3356 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3357 assert(LVT.isInteger()); 3358 3359 if (VT.bitsGT(LVT)) 3360 VT = LVT; 3361 } 3362 3363 unsigned NumMemOps = 0; 3364 while (Size != 0) { 3365 unsigned VTSize = VT.getSizeInBits() / 8; 3366 while (VTSize > Size) { 3367 // For now, only use non-vector load / store's for the left-over pieces. 3368 if (VT.isVector() || VT.isFloatingPoint()) { 3369 VT = MVT::i64; 3370 while (!TLI.isTypeLegal(VT)) 3371 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3372 VTSize = VT.getSizeInBits() / 8; 3373 } else { 3374 // This can result in a type that is not legal on the target, e.g. 3375 // 1 or 2 bytes on PPC. 3376 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3377 VTSize >>= 1; 3378 } 3379 } 3380 3381 if (++NumMemOps > Limit) 3382 return false; 3383 MemOps.push_back(VT); 3384 Size -= VTSize; 3385 } 3386 3387 return true; 3388} 3389 3390static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3391 SDValue Chain, SDValue Dst, 3392 SDValue Src, uint64_t Size, 3393 unsigned Align, bool isVol, 3394 bool AlwaysInline, 3395 MachinePointerInfo DstPtrInfo, 3396 MachinePointerInfo SrcPtrInfo) { 3397 // Turn a memcpy of undef to nop. 3398 if (Src.getOpcode() == ISD::UNDEF) 3399 return Chain; 3400 3401 // Expand memcpy to a series of load and store ops if the size operand falls 3402 // below a certain threshold. 3403 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3404 // rather than maybe a humongous number of loads and stores. 3405 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3406 std::vector<EVT> MemOps; 3407 bool DstAlignCanChange = false; 3408 MachineFunction &MF = DAG.getMachineFunction(); 3409 MachineFrameInfo *MFI = MF.getFrameInfo(); 3410 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3411 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3412 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3413 DstAlignCanChange = true; 3414 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3415 if (Align > SrcAlign) 3416 SrcAlign = Align; 3417 std::string Str; 3418 bool CopyFromStr = isMemSrcFromString(Src, Str); 3419 bool isZeroStr = CopyFromStr && Str.empty(); 3420 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3421 3422 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3423 (DstAlignCanChange ? 0 : Align), 3424 (isZeroStr ? 0 : SrcAlign), 3425 true, CopyFromStr, DAG, TLI)) 3426 return SDValue(); 3427 3428 if (DstAlignCanChange) { 3429 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3430 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3431 if (NewAlign > Align) { 3432 // Give the stack frame object a larger alignment if needed. 3433 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3434 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3435 Align = NewAlign; 3436 } 3437 } 3438 3439 SmallVector<SDValue, 8> OutChains; 3440 unsigned NumMemOps = MemOps.size(); 3441 uint64_t SrcOff = 0, DstOff = 0; 3442 for (unsigned i = 0; i != NumMemOps; ++i) { 3443 EVT VT = MemOps[i]; 3444 unsigned VTSize = VT.getSizeInBits() / 8; 3445 SDValue Value, Store; 3446 3447 if (CopyFromStr && 3448 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3449 // It's unlikely a store of a vector immediate can be done in a single 3450 // instruction. It would require a load from a constantpool first. 3451 // We only handle zero vectors here. 3452 // FIXME: Handle other cases where store of vector immediate is done in 3453 // a single instruction. 3454 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3455 Store = DAG.getStore(Chain, dl, Value, 3456 getMemBasePlusOffset(Dst, DstOff, DAG), 3457 DstPtrInfo.getWithOffset(DstOff), isVol, 3458 false, Align); 3459 } else { 3460 // The type might not be legal for the target. This should only happen 3461 // if the type is smaller than a legal type, as on PPC, so the right 3462 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3463 // to Load/Store if NVT==VT. 3464 // FIXME does the case above also need this? 3465 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3466 assert(NVT.bitsGE(VT)); 3467 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3468 getMemBasePlusOffset(Src, SrcOff, DAG), 3469 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3470 MinAlign(SrcAlign, SrcOff)); 3471 Store = DAG.getTruncStore(Chain, dl, Value, 3472 getMemBasePlusOffset(Dst, DstOff, DAG), 3473 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3474 false, Align); 3475 } 3476 OutChains.push_back(Store); 3477 SrcOff += VTSize; 3478 DstOff += VTSize; 3479 } 3480 3481 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3482 &OutChains[0], OutChains.size()); 3483} 3484 3485static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3486 SDValue Chain, SDValue Dst, 3487 SDValue Src, uint64_t Size, 3488 unsigned Align, bool isVol, 3489 bool AlwaysInline, 3490 MachinePointerInfo DstPtrInfo, 3491 MachinePointerInfo SrcPtrInfo) { 3492 // Turn a memmove of undef to nop. 3493 if (Src.getOpcode() == ISD::UNDEF) 3494 return Chain; 3495 3496 // Expand memmove to a series of load and store ops if the size operand falls 3497 // below a certain threshold. 3498 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3499 std::vector<EVT> MemOps; 3500 bool DstAlignCanChange = false; 3501 MachineFunction &MF = DAG.getMachineFunction(); 3502 MachineFrameInfo *MFI = MF.getFrameInfo(); 3503 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3504 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3505 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3506 DstAlignCanChange = true; 3507 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3508 if (Align > SrcAlign) 3509 SrcAlign = Align; 3510 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3511 3512 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3513 (DstAlignCanChange ? 0 : Align), 3514 SrcAlign, true, false, DAG, TLI)) 3515 return SDValue(); 3516 3517 if (DstAlignCanChange) { 3518 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3519 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3520 if (NewAlign > Align) { 3521 // Give the stack frame object a larger alignment if needed. 3522 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3523 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3524 Align = NewAlign; 3525 } 3526 } 3527 3528 uint64_t SrcOff = 0, DstOff = 0; 3529 SmallVector<SDValue, 8> LoadValues; 3530 SmallVector<SDValue, 8> LoadChains; 3531 SmallVector<SDValue, 8> OutChains; 3532 unsigned NumMemOps = MemOps.size(); 3533 for (unsigned i = 0; i < NumMemOps; i++) { 3534 EVT VT = MemOps[i]; 3535 unsigned VTSize = VT.getSizeInBits() / 8; 3536 SDValue Value, Store; 3537 3538 Value = DAG.getLoad(VT, dl, Chain, 3539 getMemBasePlusOffset(Src, SrcOff, DAG), 3540 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3541 false, SrcAlign); 3542 LoadValues.push_back(Value); 3543 LoadChains.push_back(Value.getValue(1)); 3544 SrcOff += VTSize; 3545 } 3546 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3547 &LoadChains[0], LoadChains.size()); 3548 OutChains.clear(); 3549 for (unsigned i = 0; i < NumMemOps; i++) { 3550 EVT VT = MemOps[i]; 3551 unsigned VTSize = VT.getSizeInBits() / 8; 3552 SDValue Value, Store; 3553 3554 Store = DAG.getStore(Chain, dl, LoadValues[i], 3555 getMemBasePlusOffset(Dst, DstOff, DAG), 3556 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3557 OutChains.push_back(Store); 3558 DstOff += VTSize; 3559 } 3560 3561 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3562 &OutChains[0], OutChains.size()); 3563} 3564 3565static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3566 SDValue Chain, SDValue Dst, 3567 SDValue Src, uint64_t Size, 3568 unsigned Align, bool isVol, 3569 MachinePointerInfo DstPtrInfo) { 3570 // Turn a memset of undef to nop. 3571 if (Src.getOpcode() == ISD::UNDEF) 3572 return Chain; 3573 3574 // Expand memset to a series of load/store ops if the size operand 3575 // falls below a certain threshold. 3576 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3577 std::vector<EVT> MemOps; 3578 bool DstAlignCanChange = false; 3579 MachineFunction &MF = DAG.getMachineFunction(); 3580 MachineFrameInfo *MFI = MF.getFrameInfo(); 3581 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3582 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3583 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3584 DstAlignCanChange = true; 3585 bool NonScalarIntSafe = 3586 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3587 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3588 Size, (DstAlignCanChange ? 0 : Align), 0, 3589 NonScalarIntSafe, false, DAG, TLI)) 3590 return SDValue(); 3591 3592 if (DstAlignCanChange) { 3593 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3594 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3595 if (NewAlign > Align) { 3596 // Give the stack frame object a larger alignment if needed. 3597 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3598 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3599 Align = NewAlign; 3600 } 3601 } 3602 3603 SmallVector<SDValue, 8> OutChains; 3604 uint64_t DstOff = 0; 3605 unsigned NumMemOps = MemOps.size(); 3606 3607 // Find the largest store and generate the bit pattern for it. 3608 EVT LargestVT = MemOps[0]; 3609 for (unsigned i = 1; i < NumMemOps; i++) 3610 if (MemOps[i].bitsGT(LargestVT)) 3611 LargestVT = MemOps[i]; 3612 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3613 3614 for (unsigned i = 0; i < NumMemOps; i++) { 3615 EVT VT = MemOps[i]; 3616 3617 // If this store is smaller than the largest store see whether we can get 3618 // the smaller value for free with a truncate. 3619 SDValue Value = MemSetValue; 3620 if (VT.bitsLT(LargestVT)) { 3621 if (!LargestVT.isVector() && !VT.isVector() && 3622 TLI.isTruncateFree(LargestVT, VT)) 3623 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3624 else 3625 Value = getMemsetValue(Src, VT, DAG, dl); 3626 } 3627 assert(Value.getValueType() == VT && "Value with wrong type."); 3628 SDValue Store = DAG.getStore(Chain, dl, Value, 3629 getMemBasePlusOffset(Dst, DstOff, DAG), 3630 DstPtrInfo.getWithOffset(DstOff), 3631 isVol, false, Align); 3632 OutChains.push_back(Store); 3633 DstOff += VT.getSizeInBits() / 8; 3634 } 3635 3636 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3637 &OutChains[0], OutChains.size()); 3638} 3639 3640SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3641 SDValue Src, SDValue Size, 3642 unsigned Align, bool isVol, bool AlwaysInline, 3643 MachinePointerInfo DstPtrInfo, 3644 MachinePointerInfo SrcPtrInfo) { 3645 3646 // Check to see if we should lower the memcpy to loads and stores first. 3647 // For cases within the target-specified limits, this is the best choice. 3648 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3649 if (ConstantSize) { 3650 // Memcpy with size zero? Just return the original chain. 3651 if (ConstantSize->isNullValue()) 3652 return Chain; 3653 3654 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3655 ConstantSize->getZExtValue(),Align, 3656 isVol, false, DstPtrInfo, SrcPtrInfo); 3657 if (Result.getNode()) 3658 return Result; 3659 } 3660 3661 // Then check to see if we should lower the memcpy with target-specific 3662 // code. If the target chooses to do this, this is the next best. 3663 SDValue Result = 3664 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3665 isVol, AlwaysInline, 3666 DstPtrInfo, SrcPtrInfo); 3667 if (Result.getNode()) 3668 return Result; 3669 3670 // If we really need inline code and the target declined to provide it, 3671 // use a (potentially long) sequence of loads and stores. 3672 if (AlwaysInline) { 3673 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3674 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3675 ConstantSize->getZExtValue(), Align, isVol, 3676 true, DstPtrInfo, SrcPtrInfo); 3677 } 3678 3679 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3680 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3681 // respect volatile, so they may do things like read or write memory 3682 // beyond the given memory regions. But fixing this isn't easy, and most 3683 // people don't care. 3684 3685 // Emit a library call. 3686 TargetLowering::ArgListTy Args; 3687 TargetLowering::ArgListEntry Entry; 3688 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3689 Entry.Node = Dst; Args.push_back(Entry); 3690 Entry.Node = Src; Args.push_back(Entry); 3691 Entry.Node = Size; Args.push_back(Entry); 3692 // FIXME: pass in DebugLoc 3693 std::pair<SDValue,SDValue> CallResult = 3694 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3695 false, false, false, false, 0, 3696 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3697 /*isReturnValueUsed=*/false, 3698 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3699 TLI.getPointerTy()), 3700 Args, *this, dl); 3701 return CallResult.second; 3702} 3703 3704SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3705 SDValue Src, SDValue Size, 3706 unsigned Align, bool isVol, 3707 MachinePointerInfo DstPtrInfo, 3708 MachinePointerInfo SrcPtrInfo) { 3709 3710 // Check to see if we should lower the memmove to loads and stores first. 3711 // For cases within the target-specified limits, this is the best choice. 3712 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3713 if (ConstantSize) { 3714 // Memmove with size zero? Just return the original chain. 3715 if (ConstantSize->isNullValue()) 3716 return Chain; 3717 3718 SDValue Result = 3719 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3720 ConstantSize->getZExtValue(), Align, isVol, 3721 false, DstPtrInfo, SrcPtrInfo); 3722 if (Result.getNode()) 3723 return Result; 3724 } 3725 3726 // Then check to see if we should lower the memmove with target-specific 3727 // code. If the target chooses to do this, this is the next best. 3728 SDValue Result = 3729 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3730 DstPtrInfo, SrcPtrInfo); 3731 if (Result.getNode()) 3732 return Result; 3733 3734 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3735 // not be safe. See memcpy above for more details. 3736 3737 // Emit a library call. 3738 TargetLowering::ArgListTy Args; 3739 TargetLowering::ArgListEntry Entry; 3740 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3741 Entry.Node = Dst; Args.push_back(Entry); 3742 Entry.Node = Src; Args.push_back(Entry); 3743 Entry.Node = Size; Args.push_back(Entry); 3744 // FIXME: pass in DebugLoc 3745 std::pair<SDValue,SDValue> CallResult = 3746 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3747 false, false, false, false, 0, 3748 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3749 /*isReturnValueUsed=*/false, 3750 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3751 TLI.getPointerTy()), 3752 Args, *this, dl); 3753 return CallResult.second; 3754} 3755 3756SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3757 SDValue Src, SDValue Size, 3758 unsigned Align, bool isVol, 3759 MachinePointerInfo DstPtrInfo) { 3760 3761 // Check to see if we should lower the memset to stores first. 3762 // For cases within the target-specified limits, this is the best choice. 3763 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3764 if (ConstantSize) { 3765 // Memset with size zero? Just return the original chain. 3766 if (ConstantSize->isNullValue()) 3767 return Chain; 3768 3769 SDValue Result = 3770 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3771 Align, isVol, DstPtrInfo); 3772 3773 if (Result.getNode()) 3774 return Result; 3775 } 3776 3777 // Then check to see if we should lower the memset with target-specific 3778 // code. If the target chooses to do this, this is the next best. 3779 SDValue Result = 3780 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3781 DstPtrInfo); 3782 if (Result.getNode()) 3783 return Result; 3784 3785 // Emit a library call. 3786 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3787 TargetLowering::ArgListTy Args; 3788 TargetLowering::ArgListEntry Entry; 3789 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3790 Args.push_back(Entry); 3791 // Extend or truncate the argument to be an i32 value for the call. 3792 if (Src.getValueType().bitsGT(MVT::i32)) 3793 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3794 else 3795 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3796 Entry.Node = Src; 3797 Entry.Ty = Type::getInt32Ty(*getContext()); 3798 Entry.isSExt = true; 3799 Args.push_back(Entry); 3800 Entry.Node = Size; 3801 Entry.Ty = IntPtrTy; 3802 Entry.isSExt = false; 3803 Args.push_back(Entry); 3804 // FIXME: pass in DebugLoc 3805 std::pair<SDValue,SDValue> CallResult = 3806 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3807 false, false, false, false, 0, 3808 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3809 /*isReturnValueUsed=*/false, 3810 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3811 TLI.getPointerTy()), 3812 Args, *this, dl); 3813 return CallResult.second; 3814} 3815 3816SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3817 SDValue Chain, SDValue Ptr, SDValue Cmp, 3818 SDValue Swp, MachinePointerInfo PtrInfo, 3819 unsigned Alignment, 3820 AtomicOrdering Ordering, 3821 SynchronizationScope SynchScope) { 3822 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3823 Alignment = getEVTAlignment(MemVT); 3824 3825 MachineFunction &MF = getMachineFunction(); 3826 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3827 3828 // For now, atomics are considered to be volatile always. 3829 Flags |= MachineMemOperand::MOVolatile; 3830 3831 MachineMemOperand *MMO = 3832 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3833 3834 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3835 Ordering, SynchScope); 3836} 3837 3838SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3839 SDValue Chain, 3840 SDValue Ptr, SDValue Cmp, 3841 SDValue Swp, MachineMemOperand *MMO, 3842 AtomicOrdering Ordering, 3843 SynchronizationScope SynchScope) { 3844 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3845 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3846 3847 EVT VT = Cmp.getValueType(); 3848 3849 SDVTList VTs = getVTList(VT, MVT::Other); 3850 FoldingSetNodeID ID; 3851 ID.AddInteger(MemVT.getRawBits()); 3852 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3853 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3854 void* IP = 0; 3855 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3856 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3857 return SDValue(E, 0); 3858 } 3859 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3860 Ptr, Cmp, Swp, MMO, Ordering, 3861 SynchScope); 3862 CSEMap.InsertNode(N, IP); 3863 AllNodes.push_back(N); 3864 return SDValue(N, 0); 3865} 3866 3867SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3868 SDValue Chain, 3869 SDValue Ptr, SDValue Val, 3870 const Value* PtrVal, 3871 unsigned Alignment, 3872 AtomicOrdering Ordering, 3873 SynchronizationScope SynchScope) { 3874 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3875 Alignment = getEVTAlignment(MemVT); 3876 3877 MachineFunction &MF = getMachineFunction(); 3878 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3879 3880 // For now, atomics are considered to be volatile always. 3881 Flags |= MachineMemOperand::MOVolatile; 3882 3883 MachineMemOperand *MMO = 3884 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3885 MemVT.getStoreSize(), Alignment); 3886 3887 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 3888 Ordering, SynchScope); 3889} 3890 3891SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3892 SDValue Chain, 3893 SDValue Ptr, SDValue Val, 3894 MachineMemOperand *MMO, 3895 AtomicOrdering Ordering, 3896 SynchronizationScope SynchScope) { 3897 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3898 Opcode == ISD::ATOMIC_LOAD_SUB || 3899 Opcode == ISD::ATOMIC_LOAD_AND || 3900 Opcode == ISD::ATOMIC_LOAD_OR || 3901 Opcode == ISD::ATOMIC_LOAD_XOR || 3902 Opcode == ISD::ATOMIC_LOAD_NAND || 3903 Opcode == ISD::ATOMIC_LOAD_MIN || 3904 Opcode == ISD::ATOMIC_LOAD_MAX || 3905 Opcode == ISD::ATOMIC_LOAD_UMIN || 3906 Opcode == ISD::ATOMIC_LOAD_UMAX || 3907 Opcode == ISD::ATOMIC_SWAP) && 3908 "Invalid Atomic Op"); 3909 3910 EVT VT = Val.getValueType(); 3911 3912 SDVTList VTs = getVTList(VT, MVT::Other); 3913 FoldingSetNodeID ID; 3914 ID.AddInteger(MemVT.getRawBits()); 3915 SDValue Ops[] = {Chain, Ptr, Val}; 3916 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3917 void* IP = 0; 3918 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3919 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3920 return SDValue(E, 0); 3921 } 3922 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3923 Ptr, Val, MMO, 3924 Ordering, SynchScope); 3925 CSEMap.InsertNode(N, IP); 3926 AllNodes.push_back(N); 3927 return SDValue(N, 0); 3928} 3929 3930/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3931SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3932 DebugLoc dl) { 3933 if (NumOps == 1) 3934 return Ops[0]; 3935 3936 SmallVector<EVT, 4> VTs; 3937 VTs.reserve(NumOps); 3938 for (unsigned i = 0; i < NumOps; ++i) 3939 VTs.push_back(Ops[i].getValueType()); 3940 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3941 Ops, NumOps); 3942} 3943 3944SDValue 3945SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3946 const EVT *VTs, unsigned NumVTs, 3947 const SDValue *Ops, unsigned NumOps, 3948 EVT MemVT, MachinePointerInfo PtrInfo, 3949 unsigned Align, bool Vol, 3950 bool ReadMem, bool WriteMem) { 3951 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3952 MemVT, PtrInfo, Align, Vol, 3953 ReadMem, WriteMem); 3954} 3955 3956SDValue 3957SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3958 const SDValue *Ops, unsigned NumOps, 3959 EVT MemVT, MachinePointerInfo PtrInfo, 3960 unsigned Align, bool Vol, 3961 bool ReadMem, bool WriteMem) { 3962 if (Align == 0) // Ensure that codegen never sees alignment 0 3963 Align = getEVTAlignment(MemVT); 3964 3965 MachineFunction &MF = getMachineFunction(); 3966 unsigned Flags = 0; 3967 if (WriteMem) 3968 Flags |= MachineMemOperand::MOStore; 3969 if (ReadMem) 3970 Flags |= MachineMemOperand::MOLoad; 3971 if (Vol) 3972 Flags |= MachineMemOperand::MOVolatile; 3973 MachineMemOperand *MMO = 3974 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 3975 3976 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3977} 3978 3979SDValue 3980SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3981 const SDValue *Ops, unsigned NumOps, 3982 EVT MemVT, MachineMemOperand *MMO) { 3983 assert((Opcode == ISD::INTRINSIC_VOID || 3984 Opcode == ISD::INTRINSIC_W_CHAIN || 3985 Opcode == ISD::PREFETCH || 3986 (Opcode <= INT_MAX && 3987 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3988 "Opcode is not a memory-accessing opcode!"); 3989 3990 // Memoize the node unless it returns a flag. 3991 MemIntrinsicSDNode *N; 3992 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 3993 FoldingSetNodeID ID; 3994 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3995 void *IP = 0; 3996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3997 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3998 return SDValue(E, 0); 3999 } 4000 4001 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4002 MemVT, MMO); 4003 CSEMap.InsertNode(N, IP); 4004 } else { 4005 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4006 MemVT, MMO); 4007 } 4008 AllNodes.push_back(N); 4009 return SDValue(N, 0); 4010} 4011 4012/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4013/// MachinePointerInfo record from it. This is particularly useful because the 4014/// code generator has many cases where it doesn't bother passing in a 4015/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4016static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4017 // If this is FI+Offset, we can model it. 4018 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4019 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4020 4021 // If this is (FI+Offset1)+Offset2, we can model it. 4022 if (Ptr.getOpcode() != ISD::ADD || 4023 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4024 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4025 return MachinePointerInfo(); 4026 4027 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4028 return MachinePointerInfo::getFixedStack(FI, Offset+ 4029 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4030} 4031 4032/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4033/// MachinePointerInfo record from it. This is particularly useful because the 4034/// code generator has many cases where it doesn't bother passing in a 4035/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4036static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4037 // If the 'Offset' value isn't a constant, we can't handle this. 4038 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4039 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4040 if (OffsetOp.getOpcode() == ISD::UNDEF) 4041 return InferPointerInfo(Ptr); 4042 return MachinePointerInfo(); 4043} 4044 4045 4046SDValue 4047SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4048 EVT VT, DebugLoc dl, SDValue Chain, 4049 SDValue Ptr, SDValue Offset, 4050 MachinePointerInfo PtrInfo, EVT MemVT, 4051 bool isVolatile, bool isNonTemporal, 4052 unsigned Alignment, const MDNode *TBAAInfo) { 4053 assert(Chain.getValueType() == MVT::Other && 4054 "Invalid chain type"); 4055 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4056 Alignment = getEVTAlignment(VT); 4057 4058 unsigned Flags = MachineMemOperand::MOLoad; 4059 if (isVolatile) 4060 Flags |= MachineMemOperand::MOVolatile; 4061 if (isNonTemporal) 4062 Flags |= MachineMemOperand::MONonTemporal; 4063 4064 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4065 // clients. 4066 if (PtrInfo.V == 0) 4067 PtrInfo = InferPointerInfo(Ptr, Offset); 4068 4069 MachineFunction &MF = getMachineFunction(); 4070 MachineMemOperand *MMO = 4071 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4072 TBAAInfo); 4073 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4074} 4075 4076SDValue 4077SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4078 EVT VT, DebugLoc dl, SDValue Chain, 4079 SDValue Ptr, SDValue Offset, EVT MemVT, 4080 MachineMemOperand *MMO) { 4081 if (VT == MemVT) { 4082 ExtType = ISD::NON_EXTLOAD; 4083 } else if (ExtType == ISD::NON_EXTLOAD) { 4084 assert(VT == MemVT && "Non-extending load from different memory type!"); 4085 } else { 4086 // Extending load. 4087 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4088 "Should only be an extending load, not truncating!"); 4089 assert(VT.isInteger() == MemVT.isInteger() && 4090 "Cannot convert from FP to Int or Int -> FP!"); 4091 assert(VT.isVector() == MemVT.isVector() && 4092 "Cannot use trunc store to convert to or from a vector!"); 4093 assert((!VT.isVector() || 4094 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4095 "Cannot use trunc store to change the number of vector elements!"); 4096 } 4097 4098 bool Indexed = AM != ISD::UNINDEXED; 4099 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4100 "Unindexed load with an offset!"); 4101 4102 SDVTList VTs = Indexed ? 4103 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4104 SDValue Ops[] = { Chain, Ptr, Offset }; 4105 FoldingSetNodeID ID; 4106 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4107 ID.AddInteger(MemVT.getRawBits()); 4108 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4109 MMO->isNonTemporal())); 4110 void *IP = 0; 4111 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4112 cast<LoadSDNode>(E)->refineAlignment(MMO); 4113 return SDValue(E, 0); 4114 } 4115 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4116 MemVT, MMO); 4117 CSEMap.InsertNode(N, IP); 4118 AllNodes.push_back(N); 4119 return SDValue(N, 0); 4120} 4121 4122SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4123 SDValue Chain, SDValue Ptr, 4124 MachinePointerInfo PtrInfo, 4125 bool isVolatile, bool isNonTemporal, 4126 unsigned Alignment, const MDNode *TBAAInfo) { 4127 SDValue Undef = getUNDEF(Ptr.getValueType()); 4128 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4129 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 4130} 4131 4132SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4133 SDValue Chain, SDValue Ptr, 4134 MachinePointerInfo PtrInfo, EVT MemVT, 4135 bool isVolatile, bool isNonTemporal, 4136 unsigned Alignment, const MDNode *TBAAInfo) { 4137 SDValue Undef = getUNDEF(Ptr.getValueType()); 4138 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4139 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment, 4140 TBAAInfo); 4141} 4142 4143 4144SDValue 4145SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4146 SDValue Offset, ISD::MemIndexedMode AM) { 4147 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4148 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4149 "Load is already a indexed load!"); 4150 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4151 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4152 LD->getMemoryVT(), 4153 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4154} 4155 4156SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4157 SDValue Ptr, MachinePointerInfo PtrInfo, 4158 bool isVolatile, bool isNonTemporal, 4159 unsigned Alignment, const MDNode *TBAAInfo) { 4160 assert(Chain.getValueType() == MVT::Other && 4161 "Invalid chain type"); 4162 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4163 Alignment = getEVTAlignment(Val.getValueType()); 4164 4165 unsigned Flags = MachineMemOperand::MOStore; 4166 if (isVolatile) 4167 Flags |= MachineMemOperand::MOVolatile; 4168 if (isNonTemporal) 4169 Flags |= MachineMemOperand::MONonTemporal; 4170 4171 if (PtrInfo.V == 0) 4172 PtrInfo = InferPointerInfo(Ptr); 4173 4174 MachineFunction &MF = getMachineFunction(); 4175 MachineMemOperand *MMO = 4176 MF.getMachineMemOperand(PtrInfo, Flags, 4177 Val.getValueType().getStoreSize(), Alignment, 4178 TBAAInfo); 4179 4180 return getStore(Chain, dl, Val, Ptr, MMO); 4181} 4182 4183SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4184 SDValue Ptr, MachineMemOperand *MMO) { 4185 assert(Chain.getValueType() == MVT::Other && 4186 "Invalid chain type"); 4187 EVT VT = Val.getValueType(); 4188 SDVTList VTs = getVTList(MVT::Other); 4189 SDValue Undef = getUNDEF(Ptr.getValueType()); 4190 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4191 FoldingSetNodeID ID; 4192 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4193 ID.AddInteger(VT.getRawBits()); 4194 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4195 MMO->isNonTemporal())); 4196 void *IP = 0; 4197 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4198 cast<StoreSDNode>(E)->refineAlignment(MMO); 4199 return SDValue(E, 0); 4200 } 4201 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4202 false, VT, MMO); 4203 CSEMap.InsertNode(N, IP); 4204 AllNodes.push_back(N); 4205 return SDValue(N, 0); 4206} 4207 4208SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4209 SDValue Ptr, MachinePointerInfo PtrInfo, 4210 EVT SVT,bool isVolatile, bool isNonTemporal, 4211 unsigned Alignment, 4212 const MDNode *TBAAInfo) { 4213 assert(Chain.getValueType() == MVT::Other && 4214 "Invalid chain type"); 4215 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4216 Alignment = getEVTAlignment(SVT); 4217 4218 unsigned Flags = MachineMemOperand::MOStore; 4219 if (isVolatile) 4220 Flags |= MachineMemOperand::MOVolatile; 4221 if (isNonTemporal) 4222 Flags |= MachineMemOperand::MONonTemporal; 4223 4224 if (PtrInfo.V == 0) 4225 PtrInfo = InferPointerInfo(Ptr); 4226 4227 MachineFunction &MF = getMachineFunction(); 4228 MachineMemOperand *MMO = 4229 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4230 TBAAInfo); 4231 4232 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4233} 4234 4235SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4236 SDValue Ptr, EVT SVT, 4237 MachineMemOperand *MMO) { 4238 EVT VT = Val.getValueType(); 4239 4240 assert(Chain.getValueType() == MVT::Other && 4241 "Invalid chain type"); 4242 if (VT == SVT) 4243 return getStore(Chain, dl, Val, Ptr, MMO); 4244 4245 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4246 "Should only be a truncating store, not extending!"); 4247 assert(VT.isInteger() == SVT.isInteger() && 4248 "Can't do FP-INT conversion!"); 4249 assert(VT.isVector() == SVT.isVector() && 4250 "Cannot use trunc store to convert to or from a vector!"); 4251 assert((!VT.isVector() || 4252 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4253 "Cannot use trunc store to change the number of vector elements!"); 4254 4255 SDVTList VTs = getVTList(MVT::Other); 4256 SDValue Undef = getUNDEF(Ptr.getValueType()); 4257 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4258 FoldingSetNodeID ID; 4259 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4260 ID.AddInteger(SVT.getRawBits()); 4261 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4262 MMO->isNonTemporal())); 4263 void *IP = 0; 4264 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4265 cast<StoreSDNode>(E)->refineAlignment(MMO); 4266 return SDValue(E, 0); 4267 } 4268 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4269 true, SVT, MMO); 4270 CSEMap.InsertNode(N, IP); 4271 AllNodes.push_back(N); 4272 return SDValue(N, 0); 4273} 4274 4275SDValue 4276SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4277 SDValue Offset, ISD::MemIndexedMode AM) { 4278 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4279 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4280 "Store is already a indexed store!"); 4281 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4282 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4283 FoldingSetNodeID ID; 4284 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4285 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4286 ID.AddInteger(ST->getRawSubclassData()); 4287 void *IP = 0; 4288 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4289 return SDValue(E, 0); 4290 4291 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4292 ST->isTruncatingStore(), 4293 ST->getMemoryVT(), 4294 ST->getMemOperand()); 4295 CSEMap.InsertNode(N, IP); 4296 AllNodes.push_back(N); 4297 return SDValue(N, 0); 4298} 4299 4300SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4301 SDValue Chain, SDValue Ptr, 4302 SDValue SV, 4303 unsigned Align) { 4304 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4305 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4306} 4307 4308SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4309 const SDUse *Ops, unsigned NumOps) { 4310 switch (NumOps) { 4311 case 0: return getNode(Opcode, DL, VT); 4312 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4313 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4314 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4315 default: break; 4316 } 4317 4318 // Copy from an SDUse array into an SDValue array for use with 4319 // the regular getNode logic. 4320 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4321 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4322} 4323 4324SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4325 const SDValue *Ops, unsigned NumOps) { 4326 switch (NumOps) { 4327 case 0: return getNode(Opcode, DL, VT); 4328 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4329 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4330 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4331 default: break; 4332 } 4333 4334 switch (Opcode) { 4335 default: break; 4336 case ISD::SELECT_CC: { 4337 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4338 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4339 "LHS and RHS of condition must have same type!"); 4340 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4341 "True and False arms of SelectCC must have same type!"); 4342 assert(Ops[2].getValueType() == VT && 4343 "select_cc node must be of same type as true and false value!"); 4344 break; 4345 } 4346 case ISD::BR_CC: { 4347 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4348 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4349 "LHS/RHS of comparison should match types!"); 4350 break; 4351 } 4352 } 4353 4354 // Memoize nodes. 4355 SDNode *N; 4356 SDVTList VTs = getVTList(VT); 4357 4358 if (VT != MVT::Glue) { 4359 FoldingSetNodeID ID; 4360 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4361 void *IP = 0; 4362 4363 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4364 return SDValue(E, 0); 4365 4366 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4367 CSEMap.InsertNode(N, IP); 4368 } else { 4369 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4370 } 4371 4372 AllNodes.push_back(N); 4373#ifndef NDEBUG 4374 VerifySDNode(N); 4375#endif 4376 return SDValue(N, 0); 4377} 4378 4379SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4380 const std::vector<EVT> &ResultTys, 4381 const SDValue *Ops, unsigned NumOps) { 4382 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4383 Ops, NumOps); 4384} 4385 4386SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4387 const EVT *VTs, unsigned NumVTs, 4388 const SDValue *Ops, unsigned NumOps) { 4389 if (NumVTs == 1) 4390 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4391 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4392} 4393 4394SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4395 const SDValue *Ops, unsigned NumOps) { 4396 if (VTList.NumVTs == 1) 4397 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4398 4399#if 0 4400 switch (Opcode) { 4401 // FIXME: figure out how to safely handle things like 4402 // int foo(int x) { return 1 << (x & 255); } 4403 // int bar() { return foo(256); } 4404 case ISD::SRA_PARTS: 4405 case ISD::SRL_PARTS: 4406 case ISD::SHL_PARTS: 4407 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4408 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4409 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4410 else if (N3.getOpcode() == ISD::AND) 4411 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4412 // If the and is only masking out bits that cannot effect the shift, 4413 // eliminate the and. 4414 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4415 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4416 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4417 } 4418 break; 4419 } 4420#endif 4421 4422 // Memoize the node unless it returns a flag. 4423 SDNode *N; 4424 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4425 FoldingSetNodeID ID; 4426 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4427 void *IP = 0; 4428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4429 return SDValue(E, 0); 4430 4431 if (NumOps == 1) { 4432 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4433 } else if (NumOps == 2) { 4434 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4435 } else if (NumOps == 3) { 4436 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4437 Ops[2]); 4438 } else { 4439 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4440 } 4441 CSEMap.InsertNode(N, IP); 4442 } else { 4443 if (NumOps == 1) { 4444 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4445 } else if (NumOps == 2) { 4446 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4447 } else if (NumOps == 3) { 4448 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4449 Ops[2]); 4450 } else { 4451 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4452 } 4453 } 4454 AllNodes.push_back(N); 4455#ifndef NDEBUG 4456 VerifySDNode(N); 4457#endif 4458 return SDValue(N, 0); 4459} 4460 4461SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4462 return getNode(Opcode, DL, VTList, 0, 0); 4463} 4464 4465SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4466 SDValue N1) { 4467 SDValue Ops[] = { N1 }; 4468 return getNode(Opcode, DL, VTList, Ops, 1); 4469} 4470 4471SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4472 SDValue N1, SDValue N2) { 4473 SDValue Ops[] = { N1, N2 }; 4474 return getNode(Opcode, DL, VTList, Ops, 2); 4475} 4476 4477SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4478 SDValue N1, SDValue N2, SDValue N3) { 4479 SDValue Ops[] = { N1, N2, N3 }; 4480 return getNode(Opcode, DL, VTList, Ops, 3); 4481} 4482 4483SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4484 SDValue N1, SDValue N2, SDValue N3, 4485 SDValue N4) { 4486 SDValue Ops[] = { N1, N2, N3, N4 }; 4487 return getNode(Opcode, DL, VTList, Ops, 4); 4488} 4489 4490SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4491 SDValue N1, SDValue N2, SDValue N3, 4492 SDValue N4, SDValue N5) { 4493 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4494 return getNode(Opcode, DL, VTList, Ops, 5); 4495} 4496 4497SDVTList SelectionDAG::getVTList(EVT VT) { 4498 return makeVTList(SDNode::getValueTypeList(VT), 1); 4499} 4500 4501SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4502 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4503 E = VTList.rend(); I != E; ++I) 4504 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4505 return *I; 4506 4507 EVT *Array = Allocator.Allocate<EVT>(2); 4508 Array[0] = VT1; 4509 Array[1] = VT2; 4510 SDVTList Result = makeVTList(Array, 2); 4511 VTList.push_back(Result); 4512 return Result; 4513} 4514 4515SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4516 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4517 E = VTList.rend(); I != E; ++I) 4518 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4519 I->VTs[2] == VT3) 4520 return *I; 4521 4522 EVT *Array = Allocator.Allocate<EVT>(3); 4523 Array[0] = VT1; 4524 Array[1] = VT2; 4525 Array[2] = VT3; 4526 SDVTList Result = makeVTList(Array, 3); 4527 VTList.push_back(Result); 4528 return Result; 4529} 4530 4531SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4532 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4533 E = VTList.rend(); I != E; ++I) 4534 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4535 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4536 return *I; 4537 4538 EVT *Array = Allocator.Allocate<EVT>(4); 4539 Array[0] = VT1; 4540 Array[1] = VT2; 4541 Array[2] = VT3; 4542 Array[3] = VT4; 4543 SDVTList Result = makeVTList(Array, 4); 4544 VTList.push_back(Result); 4545 return Result; 4546} 4547 4548SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4549 switch (NumVTs) { 4550 case 0: llvm_unreachable("Cannot have nodes without results!"); 4551 case 1: return getVTList(VTs[0]); 4552 case 2: return getVTList(VTs[0], VTs[1]); 4553 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4554 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4555 default: break; 4556 } 4557 4558 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4559 E = VTList.rend(); I != E; ++I) { 4560 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4561 continue; 4562 4563 bool NoMatch = false; 4564 for (unsigned i = 2; i != NumVTs; ++i) 4565 if (VTs[i] != I->VTs[i]) { 4566 NoMatch = true; 4567 break; 4568 } 4569 if (!NoMatch) 4570 return *I; 4571 } 4572 4573 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4574 std::copy(VTs, VTs+NumVTs, Array); 4575 SDVTList Result = makeVTList(Array, NumVTs); 4576 VTList.push_back(Result); 4577 return Result; 4578} 4579 4580 4581/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4582/// specified operands. If the resultant node already exists in the DAG, 4583/// this does not modify the specified node, instead it returns the node that 4584/// already exists. If the resultant node does not exist in the DAG, the 4585/// input node is returned. As a degenerate case, if you specify the same 4586/// input operands as the node already has, the input node is returned. 4587SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4588 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4589 4590 // Check to see if there is no change. 4591 if (Op == N->getOperand(0)) return N; 4592 4593 // See if the modified node already exists. 4594 void *InsertPos = 0; 4595 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4596 return Existing; 4597 4598 // Nope it doesn't. Remove the node from its current place in the maps. 4599 if (InsertPos) 4600 if (!RemoveNodeFromCSEMaps(N)) 4601 InsertPos = 0; 4602 4603 // Now we update the operands. 4604 N->OperandList[0].set(Op); 4605 4606 // If this gets put into a CSE map, add it. 4607 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4608 return N; 4609} 4610 4611SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4612 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4613 4614 // Check to see if there is no change. 4615 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4616 return N; // No operands changed, just return the input node. 4617 4618 // See if the modified node already exists. 4619 void *InsertPos = 0; 4620 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4621 return Existing; 4622 4623 // Nope it doesn't. Remove the node from its current place in the maps. 4624 if (InsertPos) 4625 if (!RemoveNodeFromCSEMaps(N)) 4626 InsertPos = 0; 4627 4628 // Now we update the operands. 4629 if (N->OperandList[0] != Op1) 4630 N->OperandList[0].set(Op1); 4631 if (N->OperandList[1] != Op2) 4632 N->OperandList[1].set(Op2); 4633 4634 // If this gets put into a CSE map, add it. 4635 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4636 return N; 4637} 4638 4639SDNode *SelectionDAG:: 4640UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4641 SDValue Ops[] = { Op1, Op2, Op3 }; 4642 return UpdateNodeOperands(N, Ops, 3); 4643} 4644 4645SDNode *SelectionDAG:: 4646UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4647 SDValue Op3, SDValue Op4) { 4648 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4649 return UpdateNodeOperands(N, Ops, 4); 4650} 4651 4652SDNode *SelectionDAG:: 4653UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4654 SDValue Op3, SDValue Op4, SDValue Op5) { 4655 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4656 return UpdateNodeOperands(N, Ops, 5); 4657} 4658 4659SDNode *SelectionDAG:: 4660UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4661 assert(N->getNumOperands() == NumOps && 4662 "Update with wrong number of operands"); 4663 4664 // Check to see if there is no change. 4665 bool AnyChange = false; 4666 for (unsigned i = 0; i != NumOps; ++i) { 4667 if (Ops[i] != N->getOperand(i)) { 4668 AnyChange = true; 4669 break; 4670 } 4671 } 4672 4673 // No operands changed, just return the input node. 4674 if (!AnyChange) return N; 4675 4676 // See if the modified node already exists. 4677 void *InsertPos = 0; 4678 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4679 return Existing; 4680 4681 // Nope it doesn't. Remove the node from its current place in the maps. 4682 if (InsertPos) 4683 if (!RemoveNodeFromCSEMaps(N)) 4684 InsertPos = 0; 4685 4686 // Now we update the operands. 4687 for (unsigned i = 0; i != NumOps; ++i) 4688 if (N->OperandList[i] != Ops[i]) 4689 N->OperandList[i].set(Ops[i]); 4690 4691 // If this gets put into a CSE map, add it. 4692 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4693 return N; 4694} 4695 4696/// DropOperands - Release the operands and set this node to have 4697/// zero operands. 4698void SDNode::DropOperands() { 4699 // Unlike the code in MorphNodeTo that does this, we don't need to 4700 // watch for dead nodes here. 4701 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4702 SDUse &Use = *I++; 4703 Use.set(SDValue()); 4704 } 4705} 4706 4707/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4708/// machine opcode. 4709/// 4710SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4711 EVT VT) { 4712 SDVTList VTs = getVTList(VT); 4713 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4714} 4715 4716SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4717 EVT VT, SDValue Op1) { 4718 SDVTList VTs = getVTList(VT); 4719 SDValue Ops[] = { Op1 }; 4720 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4721} 4722 4723SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4724 EVT VT, SDValue Op1, 4725 SDValue Op2) { 4726 SDVTList VTs = getVTList(VT); 4727 SDValue Ops[] = { Op1, Op2 }; 4728 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4729} 4730 4731SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4732 EVT VT, SDValue Op1, 4733 SDValue Op2, SDValue Op3) { 4734 SDVTList VTs = getVTList(VT); 4735 SDValue Ops[] = { Op1, Op2, Op3 }; 4736 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4737} 4738 4739SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4740 EVT VT, const SDValue *Ops, 4741 unsigned NumOps) { 4742 SDVTList VTs = getVTList(VT); 4743 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4744} 4745 4746SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4747 EVT VT1, EVT VT2, const SDValue *Ops, 4748 unsigned NumOps) { 4749 SDVTList VTs = getVTList(VT1, VT2); 4750 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4751} 4752 4753SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4754 EVT VT1, EVT VT2) { 4755 SDVTList VTs = getVTList(VT1, VT2); 4756 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4757} 4758 4759SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4760 EVT VT1, EVT VT2, EVT VT3, 4761 const SDValue *Ops, unsigned NumOps) { 4762 SDVTList VTs = getVTList(VT1, VT2, VT3); 4763 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4764} 4765 4766SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4767 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4768 const SDValue *Ops, unsigned NumOps) { 4769 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4770 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4771} 4772 4773SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4774 EVT VT1, EVT VT2, 4775 SDValue Op1) { 4776 SDVTList VTs = getVTList(VT1, VT2); 4777 SDValue Ops[] = { Op1 }; 4778 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4779} 4780 4781SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4782 EVT VT1, EVT VT2, 4783 SDValue Op1, SDValue Op2) { 4784 SDVTList VTs = getVTList(VT1, VT2); 4785 SDValue Ops[] = { Op1, Op2 }; 4786 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4787} 4788 4789SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4790 EVT VT1, EVT VT2, 4791 SDValue Op1, SDValue Op2, 4792 SDValue Op3) { 4793 SDVTList VTs = getVTList(VT1, VT2); 4794 SDValue Ops[] = { Op1, Op2, Op3 }; 4795 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4796} 4797 4798SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4799 EVT VT1, EVT VT2, EVT VT3, 4800 SDValue Op1, SDValue Op2, 4801 SDValue Op3) { 4802 SDVTList VTs = getVTList(VT1, VT2, VT3); 4803 SDValue Ops[] = { Op1, Op2, Op3 }; 4804 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4805} 4806 4807SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4808 SDVTList VTs, const SDValue *Ops, 4809 unsigned NumOps) { 4810 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4811 // Reset the NodeID to -1. 4812 N->setNodeId(-1); 4813 return N; 4814} 4815 4816/// MorphNodeTo - This *mutates* the specified node to have the specified 4817/// return type, opcode, and operands. 4818/// 4819/// Note that MorphNodeTo returns the resultant node. If there is already a 4820/// node of the specified opcode and operands, it returns that node instead of 4821/// the current one. Note that the DebugLoc need not be the same. 4822/// 4823/// Using MorphNodeTo is faster than creating a new node and swapping it in 4824/// with ReplaceAllUsesWith both because it often avoids allocating a new 4825/// node, and because it doesn't require CSE recalculation for any of 4826/// the node's users. 4827/// 4828SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4829 SDVTList VTs, const SDValue *Ops, 4830 unsigned NumOps) { 4831 // If an identical node already exists, use it. 4832 void *IP = 0; 4833 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4834 FoldingSetNodeID ID; 4835 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4836 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4837 return ON; 4838 } 4839 4840 if (!RemoveNodeFromCSEMaps(N)) 4841 IP = 0; 4842 4843 // Start the morphing. 4844 N->NodeType = Opc; 4845 N->ValueList = VTs.VTs; 4846 N->NumValues = VTs.NumVTs; 4847 4848 // Clear the operands list, updating used nodes to remove this from their 4849 // use list. Keep track of any operands that become dead as a result. 4850 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4851 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4852 SDUse &Use = *I++; 4853 SDNode *Used = Use.getNode(); 4854 Use.set(SDValue()); 4855 if (Used->use_empty()) 4856 DeadNodeSet.insert(Used); 4857 } 4858 4859 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4860 // Initialize the memory references information. 4861 MN->setMemRefs(0, 0); 4862 // If NumOps is larger than the # of operands we can have in a 4863 // MachineSDNode, reallocate the operand list. 4864 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4865 if (MN->OperandsNeedDelete) 4866 delete[] MN->OperandList; 4867 if (NumOps > array_lengthof(MN->LocalOperands)) 4868 // We're creating a final node that will live unmorphed for the 4869 // remainder of the current SelectionDAG iteration, so we can allocate 4870 // the operands directly out of a pool with no recycling metadata. 4871 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4872 Ops, NumOps); 4873 else 4874 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4875 MN->OperandsNeedDelete = false; 4876 } else 4877 MN->InitOperands(MN->OperandList, Ops, NumOps); 4878 } else { 4879 // If NumOps is larger than the # of operands we currently have, reallocate 4880 // the operand list. 4881 if (NumOps > N->NumOperands) { 4882 if (N->OperandsNeedDelete) 4883 delete[] N->OperandList; 4884 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4885 N->OperandsNeedDelete = true; 4886 } else 4887 N->InitOperands(N->OperandList, Ops, NumOps); 4888 } 4889 4890 // Delete any nodes that are still dead after adding the uses for the 4891 // new operands. 4892 if (!DeadNodeSet.empty()) { 4893 SmallVector<SDNode *, 16> DeadNodes; 4894 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4895 E = DeadNodeSet.end(); I != E; ++I) 4896 if ((*I)->use_empty()) 4897 DeadNodes.push_back(*I); 4898 RemoveDeadNodes(DeadNodes); 4899 } 4900 4901 if (IP) 4902 CSEMap.InsertNode(N, IP); // Memoize the new node. 4903 return N; 4904} 4905 4906 4907/// getMachineNode - These are used for target selectors to create a new node 4908/// with specified return type(s), MachineInstr opcode, and operands. 4909/// 4910/// Note that getMachineNode returns the resultant node. If there is already a 4911/// node of the specified opcode and operands, it returns that node instead of 4912/// the current one. 4913MachineSDNode * 4914SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4915 SDVTList VTs = getVTList(VT); 4916 return getMachineNode(Opcode, dl, VTs, 0, 0); 4917} 4918 4919MachineSDNode * 4920SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4921 SDVTList VTs = getVTList(VT); 4922 SDValue Ops[] = { Op1 }; 4923 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4924} 4925 4926MachineSDNode * 4927SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4928 SDValue Op1, SDValue Op2) { 4929 SDVTList VTs = getVTList(VT); 4930 SDValue Ops[] = { Op1, Op2 }; 4931 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4932} 4933 4934MachineSDNode * 4935SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4936 SDValue Op1, SDValue Op2, SDValue Op3) { 4937 SDVTList VTs = getVTList(VT); 4938 SDValue Ops[] = { Op1, Op2, Op3 }; 4939 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4940} 4941 4942MachineSDNode * 4943SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4944 const SDValue *Ops, unsigned NumOps) { 4945 SDVTList VTs = getVTList(VT); 4946 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4947} 4948 4949MachineSDNode * 4950SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4951 SDVTList VTs = getVTList(VT1, VT2); 4952 return getMachineNode(Opcode, dl, VTs, 0, 0); 4953} 4954 4955MachineSDNode * 4956SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4957 EVT VT1, EVT VT2, SDValue Op1) { 4958 SDVTList VTs = getVTList(VT1, VT2); 4959 SDValue Ops[] = { Op1 }; 4960 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4961} 4962 4963MachineSDNode * 4964SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4965 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4966 SDVTList VTs = getVTList(VT1, VT2); 4967 SDValue Ops[] = { Op1, Op2 }; 4968 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4969} 4970 4971MachineSDNode * 4972SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4973 EVT VT1, EVT VT2, SDValue Op1, 4974 SDValue Op2, SDValue Op3) { 4975 SDVTList VTs = getVTList(VT1, VT2); 4976 SDValue Ops[] = { Op1, Op2, Op3 }; 4977 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4978} 4979 4980MachineSDNode * 4981SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4982 EVT VT1, EVT VT2, 4983 const SDValue *Ops, unsigned NumOps) { 4984 SDVTList VTs = getVTList(VT1, VT2); 4985 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4986} 4987 4988MachineSDNode * 4989SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4990 EVT VT1, EVT VT2, EVT VT3, 4991 SDValue Op1, SDValue Op2) { 4992 SDVTList VTs = getVTList(VT1, VT2, VT3); 4993 SDValue Ops[] = { Op1, Op2 }; 4994 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4995} 4996 4997MachineSDNode * 4998SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4999 EVT VT1, EVT VT2, EVT VT3, 5000 SDValue Op1, SDValue Op2, SDValue Op3) { 5001 SDVTList VTs = getVTList(VT1, VT2, VT3); 5002 SDValue Ops[] = { Op1, Op2, Op3 }; 5003 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5004} 5005 5006MachineSDNode * 5007SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5008 EVT VT1, EVT VT2, EVT VT3, 5009 const SDValue *Ops, unsigned NumOps) { 5010 SDVTList VTs = getVTList(VT1, VT2, VT3); 5011 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5012} 5013 5014MachineSDNode * 5015SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5016 EVT VT2, EVT VT3, EVT VT4, 5017 const SDValue *Ops, unsigned NumOps) { 5018 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5019 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5020} 5021 5022MachineSDNode * 5023SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5024 const std::vector<EVT> &ResultTys, 5025 const SDValue *Ops, unsigned NumOps) { 5026 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5027 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5028} 5029 5030MachineSDNode * 5031SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5032 const SDValue *Ops, unsigned NumOps) { 5033 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5034 MachineSDNode *N; 5035 void *IP = 0; 5036 5037 if (DoCSE) { 5038 FoldingSetNodeID ID; 5039 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5040 IP = 0; 5041 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5042 return cast<MachineSDNode>(E); 5043 } 5044 5045 // Allocate a new MachineSDNode. 5046 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5047 5048 // Initialize the operands list. 5049 if (NumOps > array_lengthof(N->LocalOperands)) 5050 // We're creating a final node that will live unmorphed for the 5051 // remainder of the current SelectionDAG iteration, so we can allocate 5052 // the operands directly out of a pool with no recycling metadata. 5053 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5054 Ops, NumOps); 5055 else 5056 N->InitOperands(N->LocalOperands, Ops, NumOps); 5057 N->OperandsNeedDelete = false; 5058 5059 if (DoCSE) 5060 CSEMap.InsertNode(N, IP); 5061 5062 AllNodes.push_back(N); 5063#ifndef NDEBUG 5064 VerifyMachineNode(N); 5065#endif 5066 return N; 5067} 5068 5069/// getTargetExtractSubreg - A convenience function for creating 5070/// TargetOpcode::EXTRACT_SUBREG nodes. 5071SDValue 5072SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5073 SDValue Operand) { 5074 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5075 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5076 VT, Operand, SRIdxVal); 5077 return SDValue(Subreg, 0); 5078} 5079 5080/// getTargetInsertSubreg - A convenience function for creating 5081/// TargetOpcode::INSERT_SUBREG nodes. 5082SDValue 5083SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5084 SDValue Operand, SDValue Subreg) { 5085 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5086 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5087 VT, Operand, Subreg, SRIdxVal); 5088 return SDValue(Result, 0); 5089} 5090 5091/// getNodeIfExists - Get the specified node if it's already available, or 5092/// else return NULL. 5093SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5094 const SDValue *Ops, unsigned NumOps) { 5095 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5096 FoldingSetNodeID ID; 5097 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5098 void *IP = 0; 5099 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5100 return E; 5101 } 5102 return NULL; 5103} 5104 5105/// getDbgValue - Creates a SDDbgValue node. 5106/// 5107SDDbgValue * 5108SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5109 DebugLoc DL, unsigned O) { 5110 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5111} 5112 5113SDDbgValue * 5114SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5115 DebugLoc DL, unsigned O) { 5116 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5117} 5118 5119SDDbgValue * 5120SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5121 DebugLoc DL, unsigned O) { 5122 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5123} 5124 5125namespace { 5126 5127/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5128/// pointed to by a use iterator is deleted, increment the use iterator 5129/// so that it doesn't dangle. 5130/// 5131/// This class also manages a "downlink" DAGUpdateListener, to forward 5132/// messages to ReplaceAllUsesWith's callers. 5133/// 5134class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5135 SelectionDAG::DAGUpdateListener *DownLink; 5136 SDNode::use_iterator &UI; 5137 SDNode::use_iterator &UE; 5138 5139 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5140 // Increment the iterator as needed. 5141 while (UI != UE && N == *UI) 5142 ++UI; 5143 5144 // Then forward the message. 5145 if (DownLink) DownLink->NodeDeleted(N, E); 5146 } 5147 5148 virtual void NodeUpdated(SDNode *N) { 5149 // Just forward the message. 5150 if (DownLink) DownLink->NodeUpdated(N); 5151 } 5152 5153public: 5154 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5155 SDNode::use_iterator &ui, 5156 SDNode::use_iterator &ue) 5157 : DownLink(dl), UI(ui), UE(ue) {} 5158}; 5159 5160} 5161 5162/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5163/// This can cause recursive merging of nodes in the DAG. 5164/// 5165/// This version assumes From has a single result value. 5166/// 5167void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5168 DAGUpdateListener *UpdateListener) { 5169 SDNode *From = FromN.getNode(); 5170 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5171 "Cannot replace with this method!"); 5172 assert(From != To.getNode() && "Cannot replace uses of with self"); 5173 5174 // Iterate over all the existing uses of From. New uses will be added 5175 // to the beginning of the use list, which we avoid visiting. 5176 // This specifically avoids visiting uses of From that arise while the 5177 // replacement is happening, because any such uses would be the result 5178 // of CSE: If an existing node looks like From after one of its operands 5179 // is replaced by To, we don't want to replace of all its users with To 5180 // too. See PR3018 for more info. 5181 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5182 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5183 while (UI != UE) { 5184 SDNode *User = *UI; 5185 5186 // This node is about to morph, remove its old self from the CSE maps. 5187 RemoveNodeFromCSEMaps(User); 5188 5189 // A user can appear in a use list multiple times, and when this 5190 // happens the uses are usually next to each other in the list. 5191 // To help reduce the number of CSE recomputations, process all 5192 // the uses of this user that we can find this way. 5193 do { 5194 SDUse &Use = UI.getUse(); 5195 ++UI; 5196 Use.set(To); 5197 } while (UI != UE && *UI == User); 5198 5199 // Now that we have modified User, add it back to the CSE maps. If it 5200 // already exists there, recursively merge the results together. 5201 AddModifiedNodeToCSEMaps(User, &Listener); 5202 } 5203} 5204 5205/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5206/// This can cause recursive merging of nodes in the DAG. 5207/// 5208/// This version assumes that for each value of From, there is a 5209/// corresponding value in To in the same position with the same type. 5210/// 5211void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5212 DAGUpdateListener *UpdateListener) { 5213#ifndef NDEBUG 5214 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5215 assert((!From->hasAnyUseOfValue(i) || 5216 From->getValueType(i) == To->getValueType(i)) && 5217 "Cannot use this version of ReplaceAllUsesWith!"); 5218#endif 5219 5220 // Handle the trivial case. 5221 if (From == To) 5222 return; 5223 5224 // Iterate over just the existing users of From. See the comments in 5225 // the ReplaceAllUsesWith above. 5226 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5227 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5228 while (UI != UE) { 5229 SDNode *User = *UI; 5230 5231 // This node is about to morph, remove its old self from the CSE maps. 5232 RemoveNodeFromCSEMaps(User); 5233 5234 // A user can appear in a use list multiple times, and when this 5235 // happens the uses are usually next to each other in the list. 5236 // To help reduce the number of CSE recomputations, process all 5237 // the uses of this user that we can find this way. 5238 do { 5239 SDUse &Use = UI.getUse(); 5240 ++UI; 5241 Use.setNode(To); 5242 } while (UI != UE && *UI == User); 5243 5244 // Now that we have modified User, add it back to the CSE maps. If it 5245 // already exists there, recursively merge the results together. 5246 AddModifiedNodeToCSEMaps(User, &Listener); 5247 } 5248} 5249 5250/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5251/// This can cause recursive merging of nodes in the DAG. 5252/// 5253/// This version can replace From with any result values. To must match the 5254/// number and types of values returned by From. 5255void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5256 const SDValue *To, 5257 DAGUpdateListener *UpdateListener) { 5258 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5259 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5260 5261 // Iterate over just the existing users of From. See the comments in 5262 // the ReplaceAllUsesWith above. 5263 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5264 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5265 while (UI != UE) { 5266 SDNode *User = *UI; 5267 5268 // This node is about to morph, remove its old self from the CSE maps. 5269 RemoveNodeFromCSEMaps(User); 5270 5271 // A user can appear in a use list multiple times, and when this 5272 // happens the uses are usually next to each other in the list. 5273 // To help reduce the number of CSE recomputations, process all 5274 // the uses of this user that we can find this way. 5275 do { 5276 SDUse &Use = UI.getUse(); 5277 const SDValue &ToOp = To[Use.getResNo()]; 5278 ++UI; 5279 Use.set(ToOp); 5280 } while (UI != UE && *UI == User); 5281 5282 // Now that we have modified User, add it back to the CSE maps. If it 5283 // already exists there, recursively merge the results together. 5284 AddModifiedNodeToCSEMaps(User, &Listener); 5285 } 5286} 5287 5288/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5289/// uses of other values produced by From.getNode() alone. The Deleted 5290/// vector is handled the same way as for ReplaceAllUsesWith. 5291void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5292 DAGUpdateListener *UpdateListener){ 5293 // Handle the really simple, really trivial case efficiently. 5294 if (From == To) return; 5295 5296 // Handle the simple, trivial, case efficiently. 5297 if (From.getNode()->getNumValues() == 1) { 5298 ReplaceAllUsesWith(From, To, UpdateListener); 5299 return; 5300 } 5301 5302 // Iterate over just the existing users of From. See the comments in 5303 // the ReplaceAllUsesWith above. 5304 SDNode::use_iterator UI = From.getNode()->use_begin(), 5305 UE = From.getNode()->use_end(); 5306 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5307 while (UI != UE) { 5308 SDNode *User = *UI; 5309 bool UserRemovedFromCSEMaps = false; 5310 5311 // A user can appear in a use list multiple times, and when this 5312 // happens the uses are usually next to each other in the list. 5313 // To help reduce the number of CSE recomputations, process all 5314 // the uses of this user that we can find this way. 5315 do { 5316 SDUse &Use = UI.getUse(); 5317 5318 // Skip uses of different values from the same node. 5319 if (Use.getResNo() != From.getResNo()) { 5320 ++UI; 5321 continue; 5322 } 5323 5324 // If this node hasn't been modified yet, it's still in the CSE maps, 5325 // so remove its old self from the CSE maps. 5326 if (!UserRemovedFromCSEMaps) { 5327 RemoveNodeFromCSEMaps(User); 5328 UserRemovedFromCSEMaps = true; 5329 } 5330 5331 ++UI; 5332 Use.set(To); 5333 } while (UI != UE && *UI == User); 5334 5335 // We are iterating over all uses of the From node, so if a use 5336 // doesn't use the specific value, no changes are made. 5337 if (!UserRemovedFromCSEMaps) 5338 continue; 5339 5340 // Now that we have modified User, add it back to the CSE maps. If it 5341 // already exists there, recursively merge the results together. 5342 AddModifiedNodeToCSEMaps(User, &Listener); 5343 } 5344} 5345 5346namespace { 5347 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5348 /// to record information about a use. 5349 struct UseMemo { 5350 SDNode *User; 5351 unsigned Index; 5352 SDUse *Use; 5353 }; 5354 5355 /// operator< - Sort Memos by User. 5356 bool operator<(const UseMemo &L, const UseMemo &R) { 5357 return (intptr_t)L.User < (intptr_t)R.User; 5358 } 5359} 5360 5361/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5362/// uses of other values produced by From.getNode() alone. The same value 5363/// may appear in both the From and To list. The Deleted vector is 5364/// handled the same way as for ReplaceAllUsesWith. 5365void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5366 const SDValue *To, 5367 unsigned Num, 5368 DAGUpdateListener *UpdateListener){ 5369 // Handle the simple, trivial case efficiently. 5370 if (Num == 1) 5371 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5372 5373 // Read up all the uses and make records of them. This helps 5374 // processing new uses that are introduced during the 5375 // replacement process. 5376 SmallVector<UseMemo, 4> Uses; 5377 for (unsigned i = 0; i != Num; ++i) { 5378 unsigned FromResNo = From[i].getResNo(); 5379 SDNode *FromNode = From[i].getNode(); 5380 for (SDNode::use_iterator UI = FromNode->use_begin(), 5381 E = FromNode->use_end(); UI != E; ++UI) { 5382 SDUse &Use = UI.getUse(); 5383 if (Use.getResNo() == FromResNo) { 5384 UseMemo Memo = { *UI, i, &Use }; 5385 Uses.push_back(Memo); 5386 } 5387 } 5388 } 5389 5390 // Sort the uses, so that all the uses from a given User are together. 5391 std::sort(Uses.begin(), Uses.end()); 5392 5393 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5394 UseIndex != UseIndexEnd; ) { 5395 // We know that this user uses some value of From. If it is the right 5396 // value, update it. 5397 SDNode *User = Uses[UseIndex].User; 5398 5399 // This node is about to morph, remove its old self from the CSE maps. 5400 RemoveNodeFromCSEMaps(User); 5401 5402 // The Uses array is sorted, so all the uses for a given User 5403 // are next to each other in the list. 5404 // To help reduce the number of CSE recomputations, process all 5405 // the uses of this user that we can find this way. 5406 do { 5407 unsigned i = Uses[UseIndex].Index; 5408 SDUse &Use = *Uses[UseIndex].Use; 5409 ++UseIndex; 5410 5411 Use.set(To[i]); 5412 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5413 5414 // Now that we have modified User, add it back to the CSE maps. If it 5415 // already exists there, recursively merge the results together. 5416 AddModifiedNodeToCSEMaps(User, UpdateListener); 5417 } 5418} 5419 5420/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5421/// based on their topological order. It returns the maximum id and a vector 5422/// of the SDNodes* in assigned order by reference. 5423unsigned SelectionDAG::AssignTopologicalOrder() { 5424 5425 unsigned DAGSize = 0; 5426 5427 // SortedPos tracks the progress of the algorithm. Nodes before it are 5428 // sorted, nodes after it are unsorted. When the algorithm completes 5429 // it is at the end of the list. 5430 allnodes_iterator SortedPos = allnodes_begin(); 5431 5432 // Visit all the nodes. Move nodes with no operands to the front of 5433 // the list immediately. Annotate nodes that do have operands with their 5434 // operand count. Before we do this, the Node Id fields of the nodes 5435 // may contain arbitrary values. After, the Node Id fields for nodes 5436 // before SortedPos will contain the topological sort index, and the 5437 // Node Id fields for nodes At SortedPos and after will contain the 5438 // count of outstanding operands. 5439 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5440 SDNode *N = I++; 5441 checkForCycles(N); 5442 unsigned Degree = N->getNumOperands(); 5443 if (Degree == 0) { 5444 // A node with no uses, add it to the result array immediately. 5445 N->setNodeId(DAGSize++); 5446 allnodes_iterator Q = N; 5447 if (Q != SortedPos) 5448 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5449 assert(SortedPos != AllNodes.end() && "Overran node list"); 5450 ++SortedPos; 5451 } else { 5452 // Temporarily use the Node Id as scratch space for the degree count. 5453 N->setNodeId(Degree); 5454 } 5455 } 5456 5457 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5458 // such that by the time the end is reached all nodes will be sorted. 5459 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5460 SDNode *N = I; 5461 checkForCycles(N); 5462 // N is in sorted position, so all its uses have one less operand 5463 // that needs to be sorted. 5464 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5465 UI != UE; ++UI) { 5466 SDNode *P = *UI; 5467 unsigned Degree = P->getNodeId(); 5468 assert(Degree != 0 && "Invalid node degree"); 5469 --Degree; 5470 if (Degree == 0) { 5471 // All of P's operands are sorted, so P may sorted now. 5472 P->setNodeId(DAGSize++); 5473 if (P != SortedPos) 5474 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5475 assert(SortedPos != AllNodes.end() && "Overran node list"); 5476 ++SortedPos; 5477 } else { 5478 // Update P's outstanding operand count. 5479 P->setNodeId(Degree); 5480 } 5481 } 5482 if (I == SortedPos) { 5483#ifndef NDEBUG 5484 SDNode *S = ++I; 5485 dbgs() << "Overran sorted position:\n"; 5486 S->dumprFull(); 5487#endif 5488 llvm_unreachable(0); 5489 } 5490 } 5491 5492 assert(SortedPos == AllNodes.end() && 5493 "Topological sort incomplete!"); 5494 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5495 "First node in topological sort is not the entry token!"); 5496 assert(AllNodes.front().getNodeId() == 0 && 5497 "First node in topological sort has non-zero id!"); 5498 assert(AllNodes.front().getNumOperands() == 0 && 5499 "First node in topological sort has operands!"); 5500 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5501 "Last node in topologic sort has unexpected id!"); 5502 assert(AllNodes.back().use_empty() && 5503 "Last node in topologic sort has users!"); 5504 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5505 return DAGSize; 5506} 5507 5508/// AssignOrdering - Assign an order to the SDNode. 5509void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5510 assert(SD && "Trying to assign an order to a null node!"); 5511 Ordering->add(SD, Order); 5512} 5513 5514/// GetOrdering - Get the order for the SDNode. 5515unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5516 assert(SD && "Trying to get the order of a null node!"); 5517 return Ordering->getOrder(SD); 5518} 5519 5520/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5521/// value is produced by SD. 5522void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5523 DbgInfo->add(DB, SD, isParameter); 5524 if (SD) 5525 SD->setHasDebugValue(true); 5526} 5527 5528/// TransferDbgValues - Transfer SDDbgValues. 5529void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5530 if (From == To || !From.getNode()->getHasDebugValue()) 5531 return; 5532 SDNode *FromNode = From.getNode(); 5533 SDNode *ToNode = To.getNode(); 5534 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5535 SmallVector<SDDbgValue *, 2> ClonedDVs; 5536 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5537 I != E; ++I) { 5538 SDDbgValue *Dbg = *I; 5539 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5540 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5541 Dbg->getOffset(), Dbg->getDebugLoc(), 5542 Dbg->getOrder()); 5543 ClonedDVs.push_back(Clone); 5544 } 5545 } 5546 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5547 E = ClonedDVs.end(); I != E; ++I) 5548 AddDbgValue(*I, ToNode, false); 5549} 5550 5551//===----------------------------------------------------------------------===// 5552// SDNode Class 5553//===----------------------------------------------------------------------===// 5554 5555HandleSDNode::~HandleSDNode() { 5556 DropOperands(); 5557} 5558 5559GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5560 const GlobalValue *GA, 5561 EVT VT, int64_t o, unsigned char TF) 5562 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5563 TheGlobal = GA; 5564} 5565 5566MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5567 MachineMemOperand *mmo) 5568 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5569 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5570 MMO->isNonTemporal()); 5571 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5572 assert(isNonTemporal() == MMO->isNonTemporal() && 5573 "Non-temporal encoding error!"); 5574 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5575} 5576 5577MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5578 const SDValue *Ops, unsigned NumOps, EVT memvt, 5579 MachineMemOperand *mmo) 5580 : SDNode(Opc, dl, VTs, Ops, NumOps), 5581 MemoryVT(memvt), MMO(mmo) { 5582 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5583 MMO->isNonTemporal()); 5584 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5585 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5586} 5587 5588/// Profile - Gather unique data for the node. 5589/// 5590void SDNode::Profile(FoldingSetNodeID &ID) const { 5591 AddNodeIDNode(ID, this); 5592} 5593 5594namespace { 5595 struct EVTArray { 5596 std::vector<EVT> VTs; 5597 5598 EVTArray() { 5599 VTs.reserve(MVT::LAST_VALUETYPE); 5600 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5601 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5602 } 5603 }; 5604} 5605 5606static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5607static ManagedStatic<EVTArray> SimpleVTArray; 5608static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5609 5610/// getValueTypeList - Return a pointer to the specified value type. 5611/// 5612const EVT *SDNode::getValueTypeList(EVT VT) { 5613 if (VT.isExtended()) { 5614 sys::SmartScopedLock<true> Lock(*VTMutex); 5615 return &(*EVTs->insert(VT).first); 5616 } else { 5617 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5618 "Value type out of range!"); 5619 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5620 } 5621} 5622 5623/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5624/// indicated value. This method ignores uses of other values defined by this 5625/// operation. 5626bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5627 assert(Value < getNumValues() && "Bad value!"); 5628 5629 // TODO: Only iterate over uses of a given value of the node 5630 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5631 if (UI.getUse().getResNo() == Value) { 5632 if (NUses == 0) 5633 return false; 5634 --NUses; 5635 } 5636 } 5637 5638 // Found exactly the right number of uses? 5639 return NUses == 0; 5640} 5641 5642 5643/// hasAnyUseOfValue - Return true if there are any use of the indicated 5644/// value. This method ignores uses of other values defined by this operation. 5645bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5646 assert(Value < getNumValues() && "Bad value!"); 5647 5648 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5649 if (UI.getUse().getResNo() == Value) 5650 return true; 5651 5652 return false; 5653} 5654 5655 5656/// isOnlyUserOf - Return true if this node is the only use of N. 5657/// 5658bool SDNode::isOnlyUserOf(SDNode *N) const { 5659 bool Seen = false; 5660 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5661 SDNode *User = *I; 5662 if (User == this) 5663 Seen = true; 5664 else 5665 return false; 5666 } 5667 5668 return Seen; 5669} 5670 5671/// isOperand - Return true if this node is an operand of N. 5672/// 5673bool SDValue::isOperandOf(SDNode *N) const { 5674 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5675 if (*this == N->getOperand(i)) 5676 return true; 5677 return false; 5678} 5679 5680bool SDNode::isOperandOf(SDNode *N) const { 5681 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5682 if (this == N->OperandList[i].getNode()) 5683 return true; 5684 return false; 5685} 5686 5687/// reachesChainWithoutSideEffects - Return true if this operand (which must 5688/// be a chain) reaches the specified operand without crossing any 5689/// side-effecting instructions on any chain path. In practice, this looks 5690/// through token factors and non-volatile loads. In order to remain efficient, 5691/// this only looks a couple of nodes in, it does not do an exhaustive search. 5692bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5693 unsigned Depth) const { 5694 if (*this == Dest) return true; 5695 5696 // Don't search too deeply, we just want to be able to see through 5697 // TokenFactor's etc. 5698 if (Depth == 0) return false; 5699 5700 // If this is a token factor, all inputs to the TF happen in parallel. If any 5701 // of the operands of the TF does not reach dest, then we cannot do the xform. 5702 if (getOpcode() == ISD::TokenFactor) { 5703 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5704 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5705 return false; 5706 return true; 5707 } 5708 5709 // Loads don't have side effects, look through them. 5710 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5711 if (!Ld->isVolatile()) 5712 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5713 } 5714 return false; 5715} 5716 5717/// hasPredecessor - Return true if N is a predecessor of this node. 5718/// N is either an operand of this node, or can be reached by recursively 5719/// traversing up the operands. 5720/// NOTE: This is an expensive method. Use it carefully. 5721bool SDNode::hasPredecessor(const SDNode *N) const { 5722 SmallPtrSet<const SDNode *, 32> Visited; 5723 SmallVector<const SDNode *, 16> Worklist; 5724 return hasPredecessorHelper(N, Visited, Worklist); 5725} 5726 5727bool SDNode::hasPredecessorHelper(const SDNode *N, 5728 SmallPtrSet<const SDNode *, 32> &Visited, 5729 SmallVector<const SDNode *, 16> &Worklist) const { 5730 if (Visited.empty()) { 5731 Worklist.push_back(this); 5732 } else { 5733 // Take a look in the visited set. If we've already encountered this node 5734 // we needn't search further. 5735 if (Visited.count(N)) 5736 return true; 5737 } 5738 5739 // Haven't visited N yet. Continue the search. 5740 while (!Worklist.empty()) { 5741 const SDNode *M = Worklist.pop_back_val(); 5742 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5743 SDNode *Op = M->getOperand(i).getNode(); 5744 if (Visited.insert(Op)) 5745 Worklist.push_back(Op); 5746 if (Op == N) 5747 return true; 5748 } 5749 } 5750 5751 return false; 5752} 5753 5754uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5755 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5756 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5757} 5758 5759std::string SDNode::getOperationName(const SelectionDAG *G) const { 5760 switch (getOpcode()) { 5761 default: 5762 if (getOpcode() < ISD::BUILTIN_OP_END) 5763 return "<<Unknown DAG Node>>"; 5764 if (isMachineOpcode()) { 5765 if (G) 5766 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5767 if (getMachineOpcode() < TII->getNumOpcodes()) 5768 return TII->get(getMachineOpcode()).getName(); 5769 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5770 } 5771 if (G) { 5772 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5773 const char *Name = TLI.getTargetNodeName(getOpcode()); 5774 if (Name) return Name; 5775 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5776 } 5777 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5778 5779#ifndef NDEBUG 5780 case ISD::DELETED_NODE: 5781 return "<<Deleted Node!>>"; 5782#endif 5783 case ISD::PREFETCH: return "Prefetch"; 5784 case ISD::MEMBARRIER: return "MemBarrier"; 5785 case ISD::ATOMIC_FENCE: return "AtomicFence"; 5786 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5787 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5788 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5789 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5790 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5791 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5792 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5793 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5794 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5795 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5796 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5797 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5798 case ISD::PCMARKER: return "PCMarker"; 5799 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5800 case ISD::SRCVALUE: return "SrcValue"; 5801 case ISD::MDNODE_SDNODE: return "MDNode"; 5802 case ISD::EntryToken: return "EntryToken"; 5803 case ISD::TokenFactor: return "TokenFactor"; 5804 case ISD::AssertSext: return "AssertSext"; 5805 case ISD::AssertZext: return "AssertZext"; 5806 5807 case ISD::BasicBlock: return "BasicBlock"; 5808 case ISD::VALUETYPE: return "ValueType"; 5809 case ISD::Register: return "Register"; 5810 5811 case ISD::Constant: return "Constant"; 5812 case ISD::ConstantFP: return "ConstantFP"; 5813 case ISD::GlobalAddress: return "GlobalAddress"; 5814 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5815 case ISD::FrameIndex: return "FrameIndex"; 5816 case ISD::JumpTable: return "JumpTable"; 5817 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5818 case ISD::RETURNADDR: return "RETURNADDR"; 5819 case ISD::FRAMEADDR: return "FRAMEADDR"; 5820 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5821 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5822 case ISD::LSDAADDR: return "LSDAADDR"; 5823 case ISD::EHSELECTION: return "EHSELECTION"; 5824 case ISD::EH_RETURN: return "EH_RETURN"; 5825 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5826 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5827 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP"; 5828 case ISD::ConstantPool: return "ConstantPool"; 5829 case ISD::ExternalSymbol: return "ExternalSymbol"; 5830 case ISD::BlockAddress: return "BlockAddress"; 5831 case ISD::INTRINSIC_WO_CHAIN: 5832 case ISD::INTRINSIC_VOID: 5833 case ISD::INTRINSIC_W_CHAIN: { 5834 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5835 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5836 if (IID < Intrinsic::num_intrinsics) 5837 return Intrinsic::getName((Intrinsic::ID)IID); 5838 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5839 return TII->getName(IID); 5840 llvm_unreachable("Invalid intrinsic ID"); 5841 } 5842 5843 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5844 case ISD::TargetConstant: return "TargetConstant"; 5845 case ISD::TargetConstantFP:return "TargetConstantFP"; 5846 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5847 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5848 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5849 case ISD::TargetJumpTable: return "TargetJumpTable"; 5850 case ISD::TargetConstantPool: return "TargetConstantPool"; 5851 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5852 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5853 5854 case ISD::CopyToReg: return "CopyToReg"; 5855 case ISD::CopyFromReg: return "CopyFromReg"; 5856 case ISD::UNDEF: return "undef"; 5857 case ISD::MERGE_VALUES: return "merge_values"; 5858 case ISD::INLINEASM: return "inlineasm"; 5859 case ISD::EH_LABEL: return "eh_label"; 5860 case ISD::HANDLENODE: return "handlenode"; 5861 5862 // Unary operators 5863 case ISD::FABS: return "fabs"; 5864 case ISD::FNEG: return "fneg"; 5865 case ISD::FSQRT: return "fsqrt"; 5866 case ISD::FSIN: return "fsin"; 5867 case ISD::FCOS: return "fcos"; 5868 case ISD::FTRUNC: return "ftrunc"; 5869 case ISD::FFLOOR: return "ffloor"; 5870 case ISD::FCEIL: return "fceil"; 5871 case ISD::FRINT: return "frint"; 5872 case ISD::FNEARBYINT: return "fnearbyint"; 5873 case ISD::FEXP: return "fexp"; 5874 case ISD::FEXP2: return "fexp2"; 5875 case ISD::FLOG: return "flog"; 5876 case ISD::FLOG2: return "flog2"; 5877 case ISD::FLOG10: return "flog10"; 5878 5879 // Binary operators 5880 case ISD::ADD: return "add"; 5881 case ISD::SUB: return "sub"; 5882 case ISD::MUL: return "mul"; 5883 case ISD::MULHU: return "mulhu"; 5884 case ISD::MULHS: return "mulhs"; 5885 case ISD::SDIV: return "sdiv"; 5886 case ISD::UDIV: return "udiv"; 5887 case ISD::SREM: return "srem"; 5888 case ISD::UREM: return "urem"; 5889 case ISD::SMUL_LOHI: return "smul_lohi"; 5890 case ISD::UMUL_LOHI: return "umul_lohi"; 5891 case ISD::SDIVREM: return "sdivrem"; 5892 case ISD::UDIVREM: return "udivrem"; 5893 case ISD::AND: return "and"; 5894 case ISD::OR: return "or"; 5895 case ISD::XOR: return "xor"; 5896 case ISD::SHL: return "shl"; 5897 case ISD::SRA: return "sra"; 5898 case ISD::SRL: return "srl"; 5899 case ISD::ROTL: return "rotl"; 5900 case ISD::ROTR: return "rotr"; 5901 case ISD::FADD: return "fadd"; 5902 case ISD::FSUB: return "fsub"; 5903 case ISD::FMUL: return "fmul"; 5904 case ISD::FDIV: return "fdiv"; 5905 case ISD::FMA: return "fma"; 5906 case ISD::FREM: return "frem"; 5907 case ISD::FCOPYSIGN: return "fcopysign"; 5908 case ISD::FGETSIGN: return "fgetsign"; 5909 case ISD::FPOW: return "fpow"; 5910 5911 case ISD::FPOWI: return "fpowi"; 5912 case ISD::SETCC: return "setcc"; 5913 case ISD::VSETCC: return "vsetcc"; 5914 case ISD::SELECT: return "select"; 5915 case ISD::SELECT_CC: return "select_cc"; 5916 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5917 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5918 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5919 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 5920 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5921 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5922 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5923 case ISD::CARRY_FALSE: return "carry_false"; 5924 case ISD::ADDC: return "addc"; 5925 case ISD::ADDE: return "adde"; 5926 case ISD::SADDO: return "saddo"; 5927 case ISD::UADDO: return "uaddo"; 5928 case ISD::SSUBO: return "ssubo"; 5929 case ISD::USUBO: return "usubo"; 5930 case ISD::SMULO: return "smulo"; 5931 case ISD::UMULO: return "umulo"; 5932 case ISD::SUBC: return "subc"; 5933 case ISD::SUBE: return "sube"; 5934 case ISD::SHL_PARTS: return "shl_parts"; 5935 case ISD::SRA_PARTS: return "sra_parts"; 5936 case ISD::SRL_PARTS: return "srl_parts"; 5937 5938 // Conversion operators. 5939 case ISD::SIGN_EXTEND: return "sign_extend"; 5940 case ISD::ZERO_EXTEND: return "zero_extend"; 5941 case ISD::ANY_EXTEND: return "any_extend"; 5942 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5943 case ISD::TRUNCATE: return "truncate"; 5944 case ISD::FP_ROUND: return "fp_round"; 5945 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5946 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5947 case ISD::FP_EXTEND: return "fp_extend"; 5948 5949 case ISD::SINT_TO_FP: return "sint_to_fp"; 5950 case ISD::UINT_TO_FP: return "uint_to_fp"; 5951 case ISD::FP_TO_SINT: return "fp_to_sint"; 5952 case ISD::FP_TO_UINT: return "fp_to_uint"; 5953 case ISD::BITCAST: return "bitcast"; 5954 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5955 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5956 5957 case ISD::CONVERT_RNDSAT: { 5958 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5959 default: llvm_unreachable("Unknown cvt code!"); 5960 case ISD::CVT_FF: return "cvt_ff"; 5961 case ISD::CVT_FS: return "cvt_fs"; 5962 case ISD::CVT_FU: return "cvt_fu"; 5963 case ISD::CVT_SF: return "cvt_sf"; 5964 case ISD::CVT_UF: return "cvt_uf"; 5965 case ISD::CVT_SS: return "cvt_ss"; 5966 case ISD::CVT_SU: return "cvt_su"; 5967 case ISD::CVT_US: return "cvt_us"; 5968 case ISD::CVT_UU: return "cvt_uu"; 5969 } 5970 } 5971 5972 // Control flow instructions 5973 case ISD::BR: return "br"; 5974 case ISD::BRIND: return "brind"; 5975 case ISD::BR_JT: return "br_jt"; 5976 case ISD::BRCOND: return "brcond"; 5977 case ISD::BR_CC: return "br_cc"; 5978 case ISD::CALLSEQ_START: return "callseq_start"; 5979 case ISD::CALLSEQ_END: return "callseq_end"; 5980 5981 // Other operators 5982 case ISD::LOAD: return "load"; 5983 case ISD::STORE: return "store"; 5984 case ISD::VAARG: return "vaarg"; 5985 case ISD::VACOPY: return "vacopy"; 5986 case ISD::VAEND: return "vaend"; 5987 case ISD::VASTART: return "vastart"; 5988 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5989 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5990 case ISD::BUILD_PAIR: return "build_pair"; 5991 case ISD::STACKSAVE: return "stacksave"; 5992 case ISD::STACKRESTORE: return "stackrestore"; 5993 case ISD::TRAP: return "trap"; 5994 5995 // Bit manipulation 5996 case ISD::BSWAP: return "bswap"; 5997 case ISD::CTPOP: return "ctpop"; 5998 case ISD::CTTZ: return "cttz"; 5999 case ISD::CTLZ: return "ctlz"; 6000 6001 // Trampolines 6002 case ISD::TRAMPOLINE: return "trampoline"; 6003 6004 case ISD::CONDCODE: 6005 switch (cast<CondCodeSDNode>(this)->get()) { 6006 default: llvm_unreachable("Unknown setcc condition!"); 6007 case ISD::SETOEQ: return "setoeq"; 6008 case ISD::SETOGT: return "setogt"; 6009 case ISD::SETOGE: return "setoge"; 6010 case ISD::SETOLT: return "setolt"; 6011 case ISD::SETOLE: return "setole"; 6012 case ISD::SETONE: return "setone"; 6013 6014 case ISD::SETO: return "seto"; 6015 case ISD::SETUO: return "setuo"; 6016 case ISD::SETUEQ: return "setue"; 6017 case ISD::SETUGT: return "setugt"; 6018 case ISD::SETUGE: return "setuge"; 6019 case ISD::SETULT: return "setult"; 6020 case ISD::SETULE: return "setule"; 6021 case ISD::SETUNE: return "setune"; 6022 6023 case ISD::SETEQ: return "seteq"; 6024 case ISD::SETGT: return "setgt"; 6025 case ISD::SETGE: return "setge"; 6026 case ISD::SETLT: return "setlt"; 6027 case ISD::SETLE: return "setle"; 6028 case ISD::SETNE: return "setne"; 6029 } 6030 } 6031} 6032 6033const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 6034 switch (AM) { 6035 default: 6036 return ""; 6037 case ISD::PRE_INC: 6038 return "<pre-inc>"; 6039 case ISD::PRE_DEC: 6040 return "<pre-dec>"; 6041 case ISD::POST_INC: 6042 return "<post-inc>"; 6043 case ISD::POST_DEC: 6044 return "<post-dec>"; 6045 } 6046} 6047 6048std::string ISD::ArgFlagsTy::getArgFlagsString() { 6049 std::string S = "< "; 6050 6051 if (isZExt()) 6052 S += "zext "; 6053 if (isSExt()) 6054 S += "sext "; 6055 if (isInReg()) 6056 S += "inreg "; 6057 if (isSRet()) 6058 S += "sret "; 6059 if (isByVal()) 6060 S += "byval "; 6061 if (isNest()) 6062 S += "nest "; 6063 if (getByValAlign()) 6064 S += "byval-align:" + utostr(getByValAlign()) + " "; 6065 if (getOrigAlign()) 6066 S += "orig-align:" + utostr(getOrigAlign()) + " "; 6067 if (getByValSize()) 6068 S += "byval-size:" + utostr(getByValSize()) + " "; 6069 return S + ">"; 6070} 6071 6072void SDNode::dump() const { dump(0); } 6073void SDNode::dump(const SelectionDAG *G) const { 6074 print(dbgs(), G); 6075 dbgs() << '\n'; 6076} 6077 6078void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 6079 OS << (void*)this << ": "; 6080 6081 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 6082 if (i) OS << ","; 6083 if (getValueType(i) == MVT::Other) 6084 OS << "ch"; 6085 else 6086 OS << getValueType(i).getEVTString(); 6087 } 6088 OS << " = " << getOperationName(G); 6089} 6090 6091void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 6092 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 6093 if (!MN->memoperands_empty()) { 6094 OS << "<"; 6095 OS << "Mem:"; 6096 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 6097 e = MN->memoperands_end(); i != e; ++i) { 6098 OS << **i; 6099 if (llvm::next(i) != e) 6100 OS << " "; 6101 } 6102 OS << ">"; 6103 } 6104 } else if (const ShuffleVectorSDNode *SVN = 6105 dyn_cast<ShuffleVectorSDNode>(this)) { 6106 OS << "<"; 6107 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 6108 int Idx = SVN->getMaskElt(i); 6109 if (i) OS << ","; 6110 if (Idx < 0) 6111 OS << "u"; 6112 else 6113 OS << Idx; 6114 } 6115 OS << ">"; 6116 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 6117 OS << '<' << CSDN->getAPIntValue() << '>'; 6118 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 6119 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 6120 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 6121 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 6122 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 6123 else { 6124 OS << "<APFloat("; 6125 CSDN->getValueAPF().bitcastToAPInt().dump(); 6126 OS << ")>"; 6127 } 6128 } else if (const GlobalAddressSDNode *GADN = 6129 dyn_cast<GlobalAddressSDNode>(this)) { 6130 int64_t offset = GADN->getOffset(); 6131 OS << '<'; 6132 WriteAsOperand(OS, GADN->getGlobal()); 6133 OS << '>'; 6134 if (offset > 0) 6135 OS << " + " << offset; 6136 else 6137 OS << " " << offset; 6138 if (unsigned int TF = GADN->getTargetFlags()) 6139 OS << " [TF=" << TF << ']'; 6140 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 6141 OS << "<" << FIDN->getIndex() << ">"; 6142 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 6143 OS << "<" << JTDN->getIndex() << ">"; 6144 if (unsigned int TF = JTDN->getTargetFlags()) 6145 OS << " [TF=" << TF << ']'; 6146 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 6147 int offset = CP->getOffset(); 6148 if (CP->isMachineConstantPoolEntry()) 6149 OS << "<" << *CP->getMachineCPVal() << ">"; 6150 else 6151 OS << "<" << *CP->getConstVal() << ">"; 6152 if (offset > 0) 6153 OS << " + " << offset; 6154 else 6155 OS << " " << offset; 6156 if (unsigned int TF = CP->getTargetFlags()) 6157 OS << " [TF=" << TF << ']'; 6158 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 6159 OS << "<"; 6160 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 6161 if (LBB) 6162 OS << LBB->getName() << " "; 6163 OS << (const void*)BBDN->getBasicBlock() << ">"; 6164 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 6165 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0); 6166 } else if (const ExternalSymbolSDNode *ES = 6167 dyn_cast<ExternalSymbolSDNode>(this)) { 6168 OS << "'" << ES->getSymbol() << "'"; 6169 if (unsigned int TF = ES->getTargetFlags()) 6170 OS << " [TF=" << TF << ']'; 6171 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 6172 if (M->getValue()) 6173 OS << "<" << M->getValue() << ">"; 6174 else 6175 OS << "<null>"; 6176 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 6177 if (MD->getMD()) 6178 OS << "<" << MD->getMD() << ">"; 6179 else 6180 OS << "<null>"; 6181 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6182 OS << ":" << N->getVT().getEVTString(); 6183 } 6184 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6185 OS << "<" << *LD->getMemOperand(); 6186 6187 bool doExt = true; 6188 switch (LD->getExtensionType()) { 6189 default: doExt = false; break; 6190 case ISD::EXTLOAD: OS << ", anyext"; break; 6191 case ISD::SEXTLOAD: OS << ", sext"; break; 6192 case ISD::ZEXTLOAD: OS << ", zext"; break; 6193 } 6194 if (doExt) 6195 OS << " from " << LD->getMemoryVT().getEVTString(); 6196 6197 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6198 if (*AM) 6199 OS << ", " << AM; 6200 6201 OS << ">"; 6202 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6203 OS << "<" << *ST->getMemOperand(); 6204 6205 if (ST->isTruncatingStore()) 6206 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6207 6208 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6209 if (*AM) 6210 OS << ", " << AM; 6211 6212 OS << ">"; 6213 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6214 OS << "<" << *M->getMemOperand() << ">"; 6215 } else if (const BlockAddressSDNode *BA = 6216 dyn_cast<BlockAddressSDNode>(this)) { 6217 OS << "<"; 6218 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6219 OS << ", "; 6220 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6221 OS << ">"; 6222 if (unsigned int TF = BA->getTargetFlags()) 6223 OS << " [TF=" << TF << ']'; 6224 } 6225 6226 if (G) 6227 if (unsigned Order = G->GetOrdering(this)) 6228 OS << " [ORD=" << Order << ']'; 6229 6230 if (getNodeId() != -1) 6231 OS << " [ID=" << getNodeId() << ']'; 6232 6233 DebugLoc dl = getDebugLoc(); 6234 if (G && !dl.isUnknown()) { 6235 DIScope 6236 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6237 OS << " dbg:"; 6238 // Omit the directory, since it's usually long and uninteresting. 6239 if (Scope.Verify()) 6240 OS << Scope.getFilename(); 6241 else 6242 OS << "<unknown>"; 6243 OS << ':' << dl.getLine(); 6244 if (dl.getCol() != 0) 6245 OS << ':' << dl.getCol(); 6246 } 6247} 6248 6249void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6250 print_types(OS, G); 6251 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6252 if (i) OS << ", "; else OS << " "; 6253 OS << (void*)getOperand(i).getNode(); 6254 if (unsigned RN = getOperand(i).getResNo()) 6255 OS << ":" << RN; 6256 } 6257 print_details(OS, G); 6258} 6259 6260static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6261 const SelectionDAG *G, unsigned depth, 6262 unsigned indent) 6263{ 6264 if (depth == 0) 6265 return; 6266 6267 OS.indent(indent); 6268 6269 N->print(OS, G); 6270 6271 if (depth < 1) 6272 return; 6273 6274 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6275 // Don't follow chain operands. 6276 if (N->getOperand(i).getValueType() == MVT::Other) 6277 continue; 6278 OS << '\n'; 6279 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6280 } 6281} 6282 6283void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6284 unsigned depth) const { 6285 printrWithDepthHelper(OS, this, G, depth, 0); 6286} 6287 6288void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6289 // Don't print impossibly deep things. 6290 printrWithDepth(OS, G, 10); 6291} 6292 6293void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6294 printrWithDepth(dbgs(), G, depth); 6295} 6296 6297void SDNode::dumprFull(const SelectionDAG *G) const { 6298 // Don't print impossibly deep things. 6299 dumprWithDepth(G, 10); 6300} 6301 6302static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6303 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6304 if (N->getOperand(i).getNode()->hasOneUse()) 6305 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6306 else 6307 dbgs() << "\n" << std::string(indent+2, ' ') 6308 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6309 6310 6311 dbgs() << "\n"; 6312 dbgs().indent(indent); 6313 N->dump(G); 6314} 6315 6316SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6317 assert(N->getNumValues() == 1 && 6318 "Can't unroll a vector with multiple results!"); 6319 6320 EVT VT = N->getValueType(0); 6321 unsigned NE = VT.getVectorNumElements(); 6322 EVT EltVT = VT.getVectorElementType(); 6323 DebugLoc dl = N->getDebugLoc(); 6324 6325 SmallVector<SDValue, 8> Scalars; 6326 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6327 6328 // If ResNE is 0, fully unroll the vector op. 6329 if (ResNE == 0) 6330 ResNE = NE; 6331 else if (NE > ResNE) 6332 NE = ResNE; 6333 6334 unsigned i; 6335 for (i= 0; i != NE; ++i) { 6336 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6337 SDValue Operand = N->getOperand(j); 6338 EVT OperandVT = Operand.getValueType(); 6339 if (OperandVT.isVector()) { 6340 // A vector operand; extract a single element. 6341 EVT OperandEltVT = OperandVT.getVectorElementType(); 6342 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6343 OperandEltVT, 6344 Operand, 6345 getConstant(i, TLI.getPointerTy())); 6346 } else { 6347 // A scalar operand; just use it as is. 6348 Operands[j] = Operand; 6349 } 6350 } 6351 6352 switch (N->getOpcode()) { 6353 default: 6354 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6355 &Operands[0], Operands.size())); 6356 break; 6357 case ISD::SHL: 6358 case ISD::SRA: 6359 case ISD::SRL: 6360 case ISD::ROTL: 6361 case ISD::ROTR: 6362 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6363 getShiftAmountOperand(Operands[0].getValueType(), 6364 Operands[1]))); 6365 break; 6366 case ISD::SIGN_EXTEND_INREG: 6367 case ISD::FP_ROUND_INREG: { 6368 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6369 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6370 Operands[0], 6371 getValueType(ExtVT))); 6372 } 6373 } 6374 } 6375 6376 for (; i < ResNE; ++i) 6377 Scalars.push_back(getUNDEF(EltVT)); 6378 6379 return getNode(ISD::BUILD_VECTOR, dl, 6380 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6381 &Scalars[0], Scalars.size()); 6382} 6383 6384 6385/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6386/// location that is 'Dist' units away from the location that the 'Base' load 6387/// is loading from. 6388bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6389 unsigned Bytes, int Dist) const { 6390 if (LD->getChain() != Base->getChain()) 6391 return false; 6392 EVT VT = LD->getValueType(0); 6393 if (VT.getSizeInBits() / 8 != Bytes) 6394 return false; 6395 6396 SDValue Loc = LD->getOperand(1); 6397 SDValue BaseLoc = Base->getOperand(1); 6398 if (Loc.getOpcode() == ISD::FrameIndex) { 6399 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6400 return false; 6401 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6402 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6403 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6404 int FS = MFI->getObjectSize(FI); 6405 int BFS = MFI->getObjectSize(BFI); 6406 if (FS != BFS || FS != (int)Bytes) return false; 6407 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6408 } 6409 6410 // Handle X+C 6411 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6412 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6413 return true; 6414 6415 const GlobalValue *GV1 = NULL; 6416 const GlobalValue *GV2 = NULL; 6417 int64_t Offset1 = 0; 6418 int64_t Offset2 = 0; 6419 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6420 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6421 if (isGA1 && isGA2 && GV1 == GV2) 6422 return Offset1 == (Offset2 + Dist*Bytes); 6423 return false; 6424} 6425 6426 6427/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6428/// it cannot be inferred. 6429unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6430 // If this is a GlobalAddress + cst, return the alignment. 6431 const GlobalValue *GV; 6432 int64_t GVOffset = 0; 6433 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6434 // If GV has specified alignment, then use it. Otherwise, use the preferred 6435 // alignment. 6436 unsigned Align = GV->getAlignment(); 6437 if (!Align) { 6438 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6439 if (GVar->hasInitializer()) { 6440 const TargetData *TD = TLI.getTargetData(); 6441 Align = TD->getPreferredAlignment(GVar); 6442 } 6443 } 6444 } 6445 return MinAlign(Align, GVOffset); 6446 } 6447 6448 // If this is a direct reference to a stack slot, use information about the 6449 // stack slot's alignment. 6450 int FrameIdx = 1 << 31; 6451 int64_t FrameOffset = 0; 6452 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6453 FrameIdx = FI->getIndex(); 6454 } else if (isBaseWithConstantOffset(Ptr) && 6455 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6456 // Handle FI+Cst 6457 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6458 FrameOffset = Ptr.getConstantOperandVal(1); 6459 } 6460 6461 if (FrameIdx != (1 << 31)) { 6462 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6463 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6464 FrameOffset); 6465 return FIInfoAlign; 6466 } 6467 6468 return 0; 6469} 6470 6471void SelectionDAG::dump() const { 6472 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6473 6474 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6475 I != E; ++I) { 6476 const SDNode *N = I; 6477 if (!N->hasOneUse() && N != getRoot().getNode()) 6478 DumpNodes(N, 2, this); 6479 } 6480 6481 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6482 6483 dbgs() << "\n\n"; 6484} 6485 6486void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6487 print_types(OS, G); 6488 print_details(OS, G); 6489} 6490 6491typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6492static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6493 const SelectionDAG *G, VisitedSDNodeSet &once) { 6494 if (!once.insert(N)) // If we've been here before, return now. 6495 return; 6496 6497 // Dump the current SDNode, but don't end the line yet. 6498 OS << std::string(indent, ' '); 6499 N->printr(OS, G); 6500 6501 // Having printed this SDNode, walk the children: 6502 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6503 const SDNode *child = N->getOperand(i).getNode(); 6504 6505 if (i) OS << ","; 6506 OS << " "; 6507 6508 if (child->getNumOperands() == 0) { 6509 // This child has no grandchildren; print it inline right here. 6510 child->printr(OS, G); 6511 once.insert(child); 6512 } else { // Just the address. FIXME: also print the child's opcode. 6513 OS << (void*)child; 6514 if (unsigned RN = N->getOperand(i).getResNo()) 6515 OS << ":" << RN; 6516 } 6517 } 6518 6519 OS << "\n"; 6520 6521 // Dump children that have grandchildren on their own line(s). 6522 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6523 const SDNode *child = N->getOperand(i).getNode(); 6524 DumpNodesr(OS, child, indent+2, G, once); 6525 } 6526} 6527 6528void SDNode::dumpr() const { 6529 VisitedSDNodeSet once; 6530 DumpNodesr(dbgs(), this, 0, 0, once); 6531} 6532 6533void SDNode::dumpr(const SelectionDAG *G) const { 6534 VisitedSDNodeSet once; 6535 DumpNodesr(dbgs(), this, 0, G, once); 6536} 6537 6538 6539// getAddressSpace - Return the address space this GlobalAddress belongs to. 6540unsigned GlobalAddressSDNode::getAddressSpace() const { 6541 return getGlobal()->getType()->getAddressSpace(); 6542} 6543 6544 6545Type *ConstantPoolSDNode::getType() const { 6546 if (isMachineConstantPoolEntry()) 6547 return Val.MachineCPVal->getType(); 6548 return Val.ConstVal->getType(); 6549} 6550 6551bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6552 APInt &SplatUndef, 6553 unsigned &SplatBitSize, 6554 bool &HasAnyUndefs, 6555 unsigned MinSplatBits, 6556 bool isBigEndian) { 6557 EVT VT = getValueType(0); 6558 assert(VT.isVector() && "Expected a vector type"); 6559 unsigned sz = VT.getSizeInBits(); 6560 if (MinSplatBits > sz) 6561 return false; 6562 6563 SplatValue = APInt(sz, 0); 6564 SplatUndef = APInt(sz, 0); 6565 6566 // Get the bits. Bits with undefined values (when the corresponding element 6567 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6568 // in SplatValue. If any of the values are not constant, give up and return 6569 // false. 6570 unsigned int nOps = getNumOperands(); 6571 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6572 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6573 6574 for (unsigned j = 0; j < nOps; ++j) { 6575 unsigned i = isBigEndian ? nOps-1-j : j; 6576 SDValue OpVal = getOperand(i); 6577 unsigned BitPos = j * EltBitSize; 6578 6579 if (OpVal.getOpcode() == ISD::UNDEF) 6580 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6581 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6582 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6583 zextOrTrunc(sz) << BitPos; 6584 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6585 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6586 else 6587 return false; 6588 } 6589 6590 // The build_vector is all constants or undefs. Find the smallest element 6591 // size that splats the vector. 6592 6593 HasAnyUndefs = (SplatUndef != 0); 6594 while (sz > 8) { 6595 6596 unsigned HalfSize = sz / 2; 6597 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6598 APInt LowValue = SplatValue.trunc(HalfSize); 6599 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6600 APInt LowUndef = SplatUndef.trunc(HalfSize); 6601 6602 // If the two halves do not match (ignoring undef bits), stop here. 6603 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6604 MinSplatBits > HalfSize) 6605 break; 6606 6607 SplatValue = HighValue | LowValue; 6608 SplatUndef = HighUndef & LowUndef; 6609 6610 sz = HalfSize; 6611 } 6612 6613 SplatBitSize = sz; 6614 return true; 6615} 6616 6617bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6618 // Find the first non-undef value in the shuffle mask. 6619 unsigned i, e; 6620 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6621 /* search */; 6622 6623 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6624 6625 // Make sure all remaining elements are either undef or the same as the first 6626 // non-undef value. 6627 for (int Idx = Mask[i]; i != e; ++i) 6628 if (Mask[i] >= 0 && Mask[i] != Idx) 6629 return false; 6630 return true; 6631} 6632 6633#ifdef XDEBUG 6634static void checkForCyclesHelper(const SDNode *N, 6635 SmallPtrSet<const SDNode*, 32> &Visited, 6636 SmallPtrSet<const SDNode*, 32> &Checked) { 6637 // If this node has already been checked, don't check it again. 6638 if (Checked.count(N)) 6639 return; 6640 6641 // If a node has already been visited on this depth-first walk, reject it as 6642 // a cycle. 6643 if (!Visited.insert(N)) { 6644 dbgs() << "Offending node:\n"; 6645 N->dumprFull(); 6646 errs() << "Detected cycle in SelectionDAG\n"; 6647 abort(); 6648 } 6649 6650 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6651 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6652 6653 Checked.insert(N); 6654 Visited.erase(N); 6655} 6656#endif 6657 6658void llvm::checkForCycles(const llvm::SDNode *N) { 6659#ifdef XDEBUG 6660 assert(N && "Checking nonexistant SDNode"); 6661 SmallPtrSet<const SDNode*, 32> visited; 6662 SmallPtrSet<const SDNode*, 32> checked; 6663 checkForCyclesHelper(N, visited, checked); 6664#endif 6665} 6666 6667void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6668 checkForCycles(DAG->getRoot().getNode()); 6669} 6670