SelectionDAG.cpp revision 74500bdba3eae36a1a8a17d8bad0b971b9c212ec
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/CallingConv.h" 18#include "llvm/Constants.h" 19#include "llvm/DebugInfo.h" 20#include "llvm/DerivedTypes.h" 21#include "llvm/Function.h" 22#include "llvm/GlobalAlias.h" 23#include "llvm/GlobalVariable.h" 24#include "llvm/Intrinsics.h" 25#include "llvm/Analysis/ValueTracking.h" 26#include "llvm/Assembly/Writer.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetSelectionDAGInfo.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Support/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f16: return &APFloat::IEEEhalf; 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74// Default null implementations of the callbacks. 75void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 76void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 77 78//===----------------------------------------------------------------------===// 79// ConstantFPSDNode Class 80//===----------------------------------------------------------------------===// 81 82/// isExactlyValue - We don't rely on operator== working on double values, as 83/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 84/// As such, this method can be used to do an exact bit-for-bit comparison of 85/// two floating point values. 86bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 87 return getValueAPF().bitwiseIsEqual(V); 88} 89 90bool ConstantFPSDNode::isValueValidForType(EVT VT, 91 const APFloat& Val) { 92 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 93 94 // PPC long double cannot be converted to any other type. 95 if (VT == MVT::ppcf128 || 96 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 97 return false; 98 99 // convert modifies in place, so make a copy. 100 APFloat Val2 = APFloat(Val); 101 bool losesInfo; 102 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 103 &losesInfo); 104 return !losesInfo; 105} 106 107//===----------------------------------------------------------------------===// 108// ISD Namespace 109//===----------------------------------------------------------------------===// 110 111/// isBuildVectorAllOnes - Return true if the specified node is a 112/// BUILD_VECTOR where all of the elements are ~0 or undef. 113bool ISD::isBuildVectorAllOnes(const SDNode *N) { 114 // Look through a bit convert. 115 if (N->getOpcode() == ISD::BITCAST) 116 N = N->getOperand(0).getNode(); 117 118 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 119 120 unsigned i = 0, e = N->getNumOperands(); 121 122 // Skip over all of the undef values. 123 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 124 ++i; 125 126 // Do not accept an all-undef vector. 127 if (i == e) return false; 128 129 // Do not accept build_vectors that aren't all constants or which have non-~0 130 // elements. We have to be a bit careful here, as the type of the constant 131 // may not be the same as the type of the vector elements due to type 132 // legalization (the elements are promoted to a legal type for the target and 133 // a vector of a type may be legal when the base element type is not). 134 // We only want to check enough bits to cover the vector elements, because 135 // we care if the resultant vector is all ones, not whether the individual 136 // constants are. 137 SDValue NotZero = N->getOperand(i); 138 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 139 if (isa<ConstantSDNode>(NotZero)) { 140 if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes() < 141 EltSize) 142 return false; 143 } else if (isa<ConstantFPSDNode>(NotZero)) { 144 if (cast<ConstantFPSDNode>(NotZero)->getValueAPF() 145 .bitcastToAPInt().countTrailingOnes() < EltSize) 146 return false; 147 } else 148 return false; 149 150 // Okay, we have at least one ~0 value, check to see if the rest match or are 151 // undefs. Even with the above element type twiddling, this should be OK, as 152 // the same type legalization should have applied to all the elements. 153 for (++i; i != e; ++i) 154 if (N->getOperand(i) != NotZero && 155 N->getOperand(i).getOpcode() != ISD::UNDEF) 156 return false; 157 return true; 158} 159 160 161/// isBuildVectorAllZeros - Return true if the specified node is a 162/// BUILD_VECTOR where all of the elements are 0 or undef. 163bool ISD::isBuildVectorAllZeros(const SDNode *N) { 164 // Look through a bit convert. 165 if (N->getOpcode() == ISD::BITCAST) 166 N = N->getOperand(0).getNode(); 167 168 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 169 170 unsigned i = 0, e = N->getNumOperands(); 171 172 // Skip over all of the undef values. 173 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 174 ++i; 175 176 // Do not accept an all-undef vector. 177 if (i == e) return false; 178 179 // Do not accept build_vectors that aren't all constants or which have non-0 180 // elements. 181 SDValue Zero = N->getOperand(i); 182 if (isa<ConstantSDNode>(Zero)) { 183 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 184 return false; 185 } else if (isa<ConstantFPSDNode>(Zero)) { 186 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 187 return false; 188 } else 189 return false; 190 191 // Okay, we have at least one 0 value, check to see if the rest match or are 192 // undefs. 193 for (++i; i != e; ++i) 194 if (N->getOperand(i) != Zero && 195 N->getOperand(i).getOpcode() != ISD::UNDEF) 196 return false; 197 return true; 198} 199 200/// isScalarToVector - Return true if the specified node is a 201/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 202/// element is not an undef. 203bool ISD::isScalarToVector(const SDNode *N) { 204 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 205 return true; 206 207 if (N->getOpcode() != ISD::BUILD_VECTOR) 208 return false; 209 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 210 return false; 211 unsigned NumElems = N->getNumOperands(); 212 if (NumElems == 1) 213 return false; 214 for (unsigned i = 1; i < NumElems; ++i) { 215 SDValue V = N->getOperand(i); 216 if (V.getOpcode() != ISD::UNDEF) 217 return false; 218 } 219 return true; 220} 221 222/// allOperandsUndef - Return true if the node has at least one operand 223/// and all operands of the specified node are ISD::UNDEF. 224bool ISD::allOperandsUndef(const SDNode *N) { 225 // Return false if the node has no operands. 226 // This is "logically inconsistent" with the definition of "all" but 227 // is probably the desired behavior. 228 if (N->getNumOperands() == 0) 229 return false; 230 231 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 232 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 233 return false; 234 235 return true; 236} 237 238/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 239/// when given the operation for (X op Y). 240ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 241 // To perform this operation, we just need to swap the L and G bits of the 242 // operation. 243 unsigned OldL = (Operation >> 2) & 1; 244 unsigned OldG = (Operation >> 1) & 1; 245 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 246 (OldL << 1) | // New G bit 247 (OldG << 2)); // New L bit. 248} 249 250/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 251/// 'op' is a valid SetCC operation. 252ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 253 unsigned Operation = Op; 254 if (isInteger) 255 Operation ^= 7; // Flip L, G, E bits, but not U. 256 else 257 Operation ^= 15; // Flip all of the condition bits. 258 259 if (Operation > ISD::SETTRUE2) 260 Operation &= ~8; // Don't let N and U bits get set. 261 262 return ISD::CondCode(Operation); 263} 264 265 266/// isSignedOp - For an integer comparison, return 1 if the comparison is a 267/// signed operation and 2 if the result is an unsigned comparison. Return zero 268/// if the operation does not depend on the sign of the input (setne and seteq). 269static int isSignedOp(ISD::CondCode Opcode) { 270 switch (Opcode) { 271 default: llvm_unreachable("Illegal integer setcc operation!"); 272 case ISD::SETEQ: 273 case ISD::SETNE: return 0; 274 case ISD::SETLT: 275 case ISD::SETLE: 276 case ISD::SETGT: 277 case ISD::SETGE: return 1; 278 case ISD::SETULT: 279 case ISD::SETULE: 280 case ISD::SETUGT: 281 case ISD::SETUGE: return 2; 282 } 283} 284 285/// getSetCCOrOperation - Return the result of a logical OR between different 286/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 287/// returns SETCC_INVALID if it is not possible to represent the resultant 288/// comparison. 289ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 290 bool isInteger) { 291 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 292 // Cannot fold a signed integer setcc with an unsigned integer setcc. 293 return ISD::SETCC_INVALID; 294 295 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 296 297 // If the N and U bits get set then the resultant comparison DOES suddenly 298 // care about orderedness, and is true when ordered. 299 if (Op > ISD::SETTRUE2) 300 Op &= ~16; // Clear the U bit if the N bit is set. 301 302 // Canonicalize illegal integer setcc's. 303 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 304 Op = ISD::SETNE; 305 306 return ISD::CondCode(Op); 307} 308 309/// getSetCCAndOperation - Return the result of a logical AND between different 310/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 311/// function returns zero if it is not possible to represent the resultant 312/// comparison. 313ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 314 bool isInteger) { 315 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 316 // Cannot fold a signed setcc with an unsigned setcc. 317 return ISD::SETCC_INVALID; 318 319 // Combine all of the condition bits. 320 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 321 322 // Canonicalize illegal integer setcc's. 323 if (isInteger) { 324 switch (Result) { 325 default: break; 326 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 327 case ISD::SETOEQ: // SETEQ & SETU[LG]E 328 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 329 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 330 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 331 } 332 } 333 334 return Result; 335} 336 337//===----------------------------------------------------------------------===// 338// SDNode Profile Support 339//===----------------------------------------------------------------------===// 340 341/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 342/// 343static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 344 ID.AddInteger(OpC); 345} 346 347/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 348/// solely with their pointer. 349static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 350 ID.AddPointer(VTList.VTs); 351} 352 353/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 354/// 355static void AddNodeIDOperands(FoldingSetNodeID &ID, 356 const SDValue *Ops, unsigned NumOps) { 357 for (; NumOps; --NumOps, ++Ops) { 358 ID.AddPointer(Ops->getNode()); 359 ID.AddInteger(Ops->getResNo()); 360 } 361} 362 363/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 364/// 365static void AddNodeIDOperands(FoldingSetNodeID &ID, 366 const SDUse *Ops, unsigned NumOps) { 367 for (; NumOps; --NumOps, ++Ops) { 368 ID.AddPointer(Ops->getNode()); 369 ID.AddInteger(Ops->getResNo()); 370 } 371} 372 373static void AddNodeIDNode(FoldingSetNodeID &ID, 374 unsigned short OpC, SDVTList VTList, 375 const SDValue *OpList, unsigned N) { 376 AddNodeIDOpcode(ID, OpC); 377 AddNodeIDValueTypes(ID, VTList); 378 AddNodeIDOperands(ID, OpList, N); 379} 380 381/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 382/// the NodeID data. 383static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 384 switch (N->getOpcode()) { 385 case ISD::TargetExternalSymbol: 386 case ISD::ExternalSymbol: 387 llvm_unreachable("Should only be used on nodes with operands"); 388 default: break; // Normal nodes don't need extra info. 389 case ISD::TargetConstant: 390 case ISD::Constant: 391 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 392 break; 393 case ISD::TargetConstantFP: 394 case ISD::ConstantFP: { 395 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 396 break; 397 } 398 case ISD::TargetGlobalAddress: 399 case ISD::GlobalAddress: 400 case ISD::TargetGlobalTLSAddress: 401 case ISD::GlobalTLSAddress: { 402 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 403 ID.AddPointer(GA->getGlobal()); 404 ID.AddInteger(GA->getOffset()); 405 ID.AddInteger(GA->getTargetFlags()); 406 ID.AddInteger(GA->getAddressSpace()); 407 break; 408 } 409 case ISD::BasicBlock: 410 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 411 break; 412 case ISD::Register: 413 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 414 break; 415 case ISD::RegisterMask: 416 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 417 break; 418 case ISD::SRCVALUE: 419 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 420 break; 421 case ISD::FrameIndex: 422 case ISD::TargetFrameIndex: 423 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 424 break; 425 case ISD::JumpTable: 426 case ISD::TargetJumpTable: 427 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 428 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 429 break; 430 case ISD::ConstantPool: 431 case ISD::TargetConstantPool: { 432 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 433 ID.AddInteger(CP->getAlignment()); 434 ID.AddInteger(CP->getOffset()); 435 if (CP->isMachineConstantPoolEntry()) 436 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 437 else 438 ID.AddPointer(CP->getConstVal()); 439 ID.AddInteger(CP->getTargetFlags()); 440 break; 441 } 442 case ISD::TargetIndex: { 443 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 444 ID.AddInteger(TI->getIndex()); 445 ID.AddInteger(TI->getOffset()); 446 ID.AddInteger(TI->getTargetFlags()); 447 break; 448 } 449 case ISD::LOAD: { 450 const LoadSDNode *LD = cast<LoadSDNode>(N); 451 ID.AddInteger(LD->getMemoryVT().getRawBits()); 452 ID.AddInteger(LD->getRawSubclassData()); 453 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 454 break; 455 } 456 case ISD::STORE: { 457 const StoreSDNode *ST = cast<StoreSDNode>(N); 458 ID.AddInteger(ST->getMemoryVT().getRawBits()); 459 ID.AddInteger(ST->getRawSubclassData()); 460 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 461 break; 462 } 463 case ISD::ATOMIC_CMP_SWAP: 464 case ISD::ATOMIC_SWAP: 465 case ISD::ATOMIC_LOAD_ADD: 466 case ISD::ATOMIC_LOAD_SUB: 467 case ISD::ATOMIC_LOAD_AND: 468 case ISD::ATOMIC_LOAD_OR: 469 case ISD::ATOMIC_LOAD_XOR: 470 case ISD::ATOMIC_LOAD_NAND: 471 case ISD::ATOMIC_LOAD_MIN: 472 case ISD::ATOMIC_LOAD_MAX: 473 case ISD::ATOMIC_LOAD_UMIN: 474 case ISD::ATOMIC_LOAD_UMAX: 475 case ISD::ATOMIC_LOAD: 476 case ISD::ATOMIC_STORE: { 477 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 478 ID.AddInteger(AT->getMemoryVT().getRawBits()); 479 ID.AddInteger(AT->getRawSubclassData()); 480 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 481 break; 482 } 483 case ISD::PREFETCH: { 484 const MemSDNode *PF = cast<MemSDNode>(N); 485 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 486 break; 487 } 488 case ISD::VECTOR_SHUFFLE: { 489 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 490 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 491 i != e; ++i) 492 ID.AddInteger(SVN->getMaskElt(i)); 493 break; 494 } 495 case ISD::TargetBlockAddress: 496 case ISD::BlockAddress: { 497 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 498 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 499 break; 500 } 501 } // end switch (N->getOpcode()) 502 503 // Target specific memory nodes could also have address spaces to check. 504 if (N->isTargetMemoryOpcode()) 505 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 506} 507 508/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 509/// data. 510static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 511 AddNodeIDOpcode(ID, N->getOpcode()); 512 // Add the return value info. 513 AddNodeIDValueTypes(ID, N->getVTList()); 514 // Add the operand info. 515 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 516 517 // Handle SDNode leafs with special info. 518 AddNodeIDCustom(ID, N); 519} 520 521/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 522/// the CSE map that carries volatility, temporalness, indexing mode, and 523/// extension/truncation information. 524/// 525static inline unsigned 526encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 527 bool isNonTemporal, bool isInvariant) { 528 assert((ConvType & 3) == ConvType && 529 "ConvType may not require more than 2 bits!"); 530 assert((AM & 7) == AM && 531 "AM may not require more than 3 bits!"); 532 return ConvType | 533 (AM << 2) | 534 (isVolatile << 5) | 535 (isNonTemporal << 6) | 536 (isInvariant << 7); 537} 538 539//===----------------------------------------------------------------------===// 540// SelectionDAG Class 541//===----------------------------------------------------------------------===// 542 543/// doNotCSE - Return true if CSE should not be performed for this node. 544static bool doNotCSE(SDNode *N) { 545 if (N->getValueType(0) == MVT::Glue) 546 return true; // Never CSE anything that produces a flag. 547 548 switch (N->getOpcode()) { 549 default: break; 550 case ISD::HANDLENODE: 551 case ISD::EH_LABEL: 552 return true; // Never CSE these nodes. 553 } 554 555 // Check that remaining values produced are not flags. 556 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 557 if (N->getValueType(i) == MVT::Glue) 558 return true; // Never CSE anything that produces a flag. 559 560 return false; 561} 562 563/// RemoveDeadNodes - This method deletes all unreachable nodes in the 564/// SelectionDAG. 565void SelectionDAG::RemoveDeadNodes() { 566 // Create a dummy node (which is not added to allnodes), that adds a reference 567 // to the root node, preventing it from being deleted. 568 HandleSDNode Dummy(getRoot()); 569 570 SmallVector<SDNode*, 128> DeadNodes; 571 572 // Add all obviously-dead nodes to the DeadNodes worklist. 573 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 574 if (I->use_empty()) 575 DeadNodes.push_back(I); 576 577 RemoveDeadNodes(DeadNodes); 578 579 // If the root changed (e.g. it was a dead load, update the root). 580 setRoot(Dummy.getValue()); 581} 582 583/// RemoveDeadNodes - This method deletes the unreachable nodes in the 584/// given list, and any nodes that become unreachable as a result. 585void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 586 587 // Process the worklist, deleting the nodes and adding their uses to the 588 // worklist. 589 while (!DeadNodes.empty()) { 590 SDNode *N = DeadNodes.pop_back_val(); 591 592 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 593 DUL->NodeDeleted(N, 0); 594 595 // Take the node out of the appropriate CSE map. 596 RemoveNodeFromCSEMaps(N); 597 598 // Next, brutally remove the operand list. This is safe to do, as there are 599 // no cycles in the graph. 600 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 601 SDUse &Use = *I++; 602 SDNode *Operand = Use.getNode(); 603 Use.set(SDValue()); 604 605 // Now that we removed this operand, see if there are no uses of it left. 606 if (Operand->use_empty()) 607 DeadNodes.push_back(Operand); 608 } 609 610 DeallocateNode(N); 611 } 612} 613 614void SelectionDAG::RemoveDeadNode(SDNode *N){ 615 SmallVector<SDNode*, 16> DeadNodes(1, N); 616 617 // Create a dummy node that adds a reference to the root node, preventing 618 // it from being deleted. (This matters if the root is an operand of the 619 // dead node.) 620 HandleSDNode Dummy(getRoot()); 621 622 RemoveDeadNodes(DeadNodes); 623} 624 625void SelectionDAG::DeleteNode(SDNode *N) { 626 // First take this out of the appropriate CSE map. 627 RemoveNodeFromCSEMaps(N); 628 629 // Finally, remove uses due to operands of this node, remove from the 630 // AllNodes list, and delete the node. 631 DeleteNodeNotInCSEMaps(N); 632} 633 634void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 635 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 636 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 637 638 // Drop all of the operands and decrement used node's use counts. 639 N->DropOperands(); 640 641 DeallocateNode(N); 642} 643 644void SelectionDAG::DeallocateNode(SDNode *N) { 645 if (N->OperandsNeedDelete) 646 delete[] N->OperandList; 647 648 // Set the opcode to DELETED_NODE to help catch bugs when node 649 // memory is reallocated. 650 N->NodeType = ISD::DELETED_NODE; 651 652 NodeAllocator.Deallocate(AllNodes.remove(N)); 653 654 // Remove the ordering of this node. 655 Ordering->remove(N); 656 657 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 658 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 659 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 660 DbgVals[i]->setIsInvalidated(); 661} 662 663/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 664/// correspond to it. This is useful when we're about to delete or repurpose 665/// the node. We don't want future request for structurally identical nodes 666/// to return N anymore. 667bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 668 bool Erased = false; 669 switch (N->getOpcode()) { 670 case ISD::HANDLENODE: return false; // noop. 671 case ISD::CONDCODE: 672 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 673 "Cond code doesn't exist!"); 674 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 675 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 676 break; 677 case ISD::ExternalSymbol: 678 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 679 break; 680 case ISD::TargetExternalSymbol: { 681 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 682 Erased = TargetExternalSymbols.erase( 683 std::pair<std::string,unsigned char>(ESN->getSymbol(), 684 ESN->getTargetFlags())); 685 break; 686 } 687 case ISD::VALUETYPE: { 688 EVT VT = cast<VTSDNode>(N)->getVT(); 689 if (VT.isExtended()) { 690 Erased = ExtendedValueTypeNodes.erase(VT); 691 } else { 692 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 693 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 694 } 695 break; 696 } 697 default: 698 // Remove it from the CSE Map. 699 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 700 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 701 Erased = CSEMap.RemoveNode(N); 702 break; 703 } 704#ifndef NDEBUG 705 // Verify that the node was actually in one of the CSE maps, unless it has a 706 // flag result (which cannot be CSE'd) or is one of the special cases that are 707 // not subject to CSE. 708 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 709 !N->isMachineOpcode() && !doNotCSE(N)) { 710 N->dump(this); 711 dbgs() << "\n"; 712 llvm_unreachable("Node is not in map!"); 713 } 714#endif 715 return Erased; 716} 717 718/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 719/// maps and modified in place. Add it back to the CSE maps, unless an identical 720/// node already exists, in which case transfer all its users to the existing 721/// node. This transfer can potentially trigger recursive merging. 722/// 723void 724SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 725 // For node types that aren't CSE'd, just act as if no identical node 726 // already exists. 727 if (!doNotCSE(N)) { 728 SDNode *Existing = CSEMap.GetOrInsertNode(N); 729 if (Existing != N) { 730 // If there was already an existing matching node, use ReplaceAllUsesWith 731 // to replace the dead one with the existing one. This can cause 732 // recursive merging of other unrelated nodes down the line. 733 ReplaceAllUsesWith(N, Existing); 734 735 // N is now dead. Inform the listeners and delete it. 736 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 737 DUL->NodeDeleted(N, Existing); 738 DeleteNodeNotInCSEMaps(N); 739 return; 740 } 741 } 742 743 // If the node doesn't already exist, we updated it. Inform listeners. 744 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 745 DUL->NodeUpdated(N); 746} 747 748/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 749/// were replaced with those specified. If this node is never memoized, 750/// return null, otherwise return a pointer to the slot it would take. If a 751/// node already exists with these operands, the slot will be non-null. 752SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 753 void *&InsertPos) { 754 if (doNotCSE(N)) 755 return 0; 756 757 SDValue Ops[] = { Op }; 758 FoldingSetNodeID ID; 759 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 760 AddNodeIDCustom(ID, N); 761 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 762 return Node; 763} 764 765/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 766/// were replaced with those specified. If this node is never memoized, 767/// return null, otherwise return a pointer to the slot it would take. If a 768/// node already exists with these operands, the slot will be non-null. 769SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 770 SDValue Op1, SDValue Op2, 771 void *&InsertPos) { 772 if (doNotCSE(N)) 773 return 0; 774 775 SDValue Ops[] = { Op1, Op2 }; 776 FoldingSetNodeID ID; 777 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 778 AddNodeIDCustom(ID, N); 779 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 780 return Node; 781} 782 783 784/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 785/// were replaced with those specified. If this node is never memoized, 786/// return null, otherwise return a pointer to the slot it would take. If a 787/// node already exists with these operands, the slot will be non-null. 788SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 789 const SDValue *Ops,unsigned NumOps, 790 void *&InsertPos) { 791 if (doNotCSE(N)) 792 return 0; 793 794 FoldingSetNodeID ID; 795 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 796 AddNodeIDCustom(ID, N); 797 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 798 return Node; 799} 800 801#ifndef NDEBUG 802/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 803static void VerifyNodeCommon(SDNode *N) { 804 switch (N->getOpcode()) { 805 default: 806 break; 807 case ISD::BUILD_PAIR: { 808 EVT VT = N->getValueType(0); 809 assert(N->getNumValues() == 1 && "Too many results!"); 810 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 811 "Wrong return type!"); 812 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 813 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 814 "Mismatched operand types!"); 815 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 816 "Wrong operand type!"); 817 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 818 "Wrong return type size"); 819 break; 820 } 821 case ISD::BUILD_VECTOR: { 822 assert(N->getNumValues() == 1 && "Too many results!"); 823 assert(N->getValueType(0).isVector() && "Wrong return type!"); 824 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 825 "Wrong number of operands!"); 826 EVT EltVT = N->getValueType(0).getVectorElementType(); 827 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 828 assert((I->getValueType() == EltVT || 829 (EltVT.isInteger() && I->getValueType().isInteger() && 830 EltVT.bitsLE(I->getValueType()))) && 831 "Wrong operand type!"); 832 assert(I->getValueType() == N->getOperand(0).getValueType() && 833 "Operands must all have the same type"); 834 } 835 break; 836 } 837 } 838} 839 840/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 841static void VerifySDNode(SDNode *N) { 842 // The SDNode allocators cannot be used to allocate nodes with fields that are 843 // not present in an SDNode! 844 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 845 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 846 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 847 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 848 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 849 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 850 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 851 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 852 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 853 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 854 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 855 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 856 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 857 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 858 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 859 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 860 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 861 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 862 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 863 864 VerifyNodeCommon(N); 865} 866 867/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 868/// invalid. 869static void VerifyMachineNode(SDNode *N) { 870 // The MachineNode allocators cannot be used to allocate nodes with fields 871 // that are not present in a MachineNode! 872 // Currently there are no such nodes. 873 874 VerifyNodeCommon(N); 875} 876#endif // NDEBUG 877 878/// getEVTAlignment - Compute the default alignment value for the 879/// given type. 880/// 881unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 882 Type *Ty = VT == MVT::iPTR ? 883 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 884 VT.getTypeForEVT(*getContext()); 885 886 return TLI.getTargetData()->getABITypeAlignment(Ty); 887} 888 889// EntryNode could meaningfully have debug info if we can find it... 890SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 891 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 892 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 893 Root(getEntryNode()), Ordering(0), UpdateListeners(0) { 894 AllNodes.push_back(&EntryNode); 895 Ordering = new SDNodeOrdering(); 896 DbgInfo = new SDDbgInfo(); 897} 898 899void SelectionDAG::init(MachineFunction &mf) { 900 MF = &mf; 901 Context = &mf.getFunction()->getContext(); 902} 903 904SelectionDAG::~SelectionDAG() { 905 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 906 allnodes_clear(); 907 delete Ordering; 908 delete DbgInfo; 909} 910 911void SelectionDAG::allnodes_clear() { 912 assert(&*AllNodes.begin() == &EntryNode); 913 AllNodes.remove(AllNodes.begin()); 914 while (!AllNodes.empty()) 915 DeallocateNode(AllNodes.begin()); 916} 917 918void SelectionDAG::clear() { 919 allnodes_clear(); 920 OperandAllocator.Reset(); 921 CSEMap.clear(); 922 923 ExtendedValueTypeNodes.clear(); 924 ExternalSymbols.clear(); 925 TargetExternalSymbols.clear(); 926 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 927 static_cast<CondCodeSDNode*>(0)); 928 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 929 static_cast<SDNode*>(0)); 930 931 EntryNode.UseList = 0; 932 AllNodes.push_back(&EntryNode); 933 Root = getEntryNode(); 934 Ordering->clear(); 935 DbgInfo->clear(); 936} 937 938SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 939 return VT.bitsGT(Op.getValueType()) ? 940 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 941 getNode(ISD::TRUNCATE, DL, VT, Op); 942} 943 944SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 945 return VT.bitsGT(Op.getValueType()) ? 946 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 947 getNode(ISD::TRUNCATE, DL, VT, Op); 948} 949 950SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 951 return VT.bitsGT(Op.getValueType()) ? 952 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 953 getNode(ISD::TRUNCATE, DL, VT, Op); 954} 955 956SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 957 assert(!VT.isVector() && 958 "getZeroExtendInReg should use the vector element type instead of " 959 "the vector type!"); 960 if (Op.getValueType() == VT) return Op; 961 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 962 APInt Imm = APInt::getLowBitsSet(BitWidth, 963 VT.getSizeInBits()); 964 return getNode(ISD::AND, DL, Op.getValueType(), Op, 965 getConstant(Imm, Op.getValueType())); 966} 967 968/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 969/// 970SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 971 EVT EltVT = VT.getScalarType(); 972 SDValue NegOne = 973 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 974 return getNode(ISD::XOR, DL, VT, Val, NegOne); 975} 976 977SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 978 EVT EltVT = VT.getScalarType(); 979 assert((EltVT.getSizeInBits() >= 64 || 980 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 981 "getConstant with a uint64_t value that doesn't fit in the type!"); 982 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 983} 984 985SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 986 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 987} 988 989SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 990 assert(VT.isInteger() && "Cannot create FP integer constant!"); 991 992 EVT EltVT = VT.getScalarType(); 993 const ConstantInt *Elt = &Val; 994 995 // In some cases the vector type is legal but the element type is illegal and 996 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 997 // inserted value (the type does not need to match the vector element type). 998 // Any extra bits introduced will be truncated away. 999 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 1000 TargetLowering::TypePromoteInteger) { 1001 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 1002 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 1003 Elt = ConstantInt::get(*getContext(), NewVal); 1004 } 1005 1006 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 1007 "APInt size does not match type size!"); 1008 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 1009 FoldingSetNodeID ID; 1010 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1011 ID.AddPointer(Elt); 1012 void *IP = 0; 1013 SDNode *N = NULL; 1014 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1015 if (!VT.isVector()) 1016 return SDValue(N, 0); 1017 1018 if (!N) { 1019 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1020 CSEMap.InsertNode(N, IP); 1021 AllNodes.push_back(N); 1022 } 1023 1024 SDValue Result(N, 0); 1025 if (VT.isVector()) { 1026 SmallVector<SDValue, 8> Ops; 1027 Ops.assign(VT.getVectorNumElements(), Result); 1028 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1029 } 1030 return Result; 1031} 1032 1033SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1034 return getConstant(Val, TLI.getPointerTy(), isTarget); 1035} 1036 1037 1038SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1039 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1040} 1041 1042SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1043 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1044 1045 EVT EltVT = VT.getScalarType(); 1046 1047 // Do the map lookup using the actual bit pattern for the floating point 1048 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1049 // we don't have issues with SNANs. 1050 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1051 FoldingSetNodeID ID; 1052 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1053 ID.AddPointer(&V); 1054 void *IP = 0; 1055 SDNode *N = NULL; 1056 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1057 if (!VT.isVector()) 1058 return SDValue(N, 0); 1059 1060 if (!N) { 1061 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1062 CSEMap.InsertNode(N, IP); 1063 AllNodes.push_back(N); 1064 } 1065 1066 SDValue Result(N, 0); 1067 if (VT.isVector()) { 1068 SmallVector<SDValue, 8> Ops; 1069 Ops.assign(VT.getVectorNumElements(), Result); 1070 // FIXME DebugLoc info might be appropriate here 1071 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1072 } 1073 return Result; 1074} 1075 1076SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1077 EVT EltVT = VT.getScalarType(); 1078 if (EltVT==MVT::f32) 1079 return getConstantFP(APFloat((float)Val), VT, isTarget); 1080 else if (EltVT==MVT::f64) 1081 return getConstantFP(APFloat(Val), VT, isTarget); 1082 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) { 1083 bool ignored; 1084 APFloat apf = APFloat(Val); 1085 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1086 &ignored); 1087 return getConstantFP(apf, VT, isTarget); 1088 } else 1089 llvm_unreachable("Unsupported type in getConstantFP"); 1090} 1091 1092SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1093 EVT VT, int64_t Offset, 1094 bool isTargetGA, 1095 unsigned char TargetFlags) { 1096 assert((TargetFlags == 0 || isTargetGA) && 1097 "Cannot set target flags on target-independent globals"); 1098 1099 // Truncate (with sign-extension) the offset value to the pointer size. 1100 EVT PTy = TLI.getPointerTy(); 1101 unsigned BitWidth = PTy.getSizeInBits(); 1102 if (BitWidth < 64) 1103 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1104 1105 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1106 if (!GVar) { 1107 // If GV is an alias then use the aliasee for determining thread-localness. 1108 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1109 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1110 } 1111 1112 unsigned Opc; 1113 if (GVar && GVar->isThreadLocal()) 1114 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1115 else 1116 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1117 1118 FoldingSetNodeID ID; 1119 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1120 ID.AddPointer(GV); 1121 ID.AddInteger(Offset); 1122 ID.AddInteger(TargetFlags); 1123 ID.AddInteger(GV->getType()->getAddressSpace()); 1124 void *IP = 0; 1125 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1126 return SDValue(E, 0); 1127 1128 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1129 Offset, TargetFlags); 1130 CSEMap.InsertNode(N, IP); 1131 AllNodes.push_back(N); 1132 return SDValue(N, 0); 1133} 1134 1135SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1136 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1137 FoldingSetNodeID ID; 1138 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1139 ID.AddInteger(FI); 1140 void *IP = 0; 1141 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1142 return SDValue(E, 0); 1143 1144 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1145 CSEMap.InsertNode(N, IP); 1146 AllNodes.push_back(N); 1147 return SDValue(N, 0); 1148} 1149 1150SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1151 unsigned char TargetFlags) { 1152 assert((TargetFlags == 0 || isTarget) && 1153 "Cannot set target flags on target-independent jump tables"); 1154 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1155 FoldingSetNodeID ID; 1156 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1157 ID.AddInteger(JTI); 1158 ID.AddInteger(TargetFlags); 1159 void *IP = 0; 1160 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1161 return SDValue(E, 0); 1162 1163 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1164 TargetFlags); 1165 CSEMap.InsertNode(N, IP); 1166 AllNodes.push_back(N); 1167 return SDValue(N, 0); 1168} 1169 1170SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1171 unsigned Alignment, int Offset, 1172 bool isTarget, 1173 unsigned char TargetFlags) { 1174 assert((TargetFlags == 0 || isTarget) && 1175 "Cannot set target flags on target-independent globals"); 1176 if (Alignment == 0) 1177 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1178 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1179 FoldingSetNodeID ID; 1180 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1181 ID.AddInteger(Alignment); 1182 ID.AddInteger(Offset); 1183 ID.AddPointer(C); 1184 ID.AddInteger(TargetFlags); 1185 void *IP = 0; 1186 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1187 return SDValue(E, 0); 1188 1189 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1190 Alignment, TargetFlags); 1191 CSEMap.InsertNode(N, IP); 1192 AllNodes.push_back(N); 1193 return SDValue(N, 0); 1194} 1195 1196 1197SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1198 unsigned Alignment, int Offset, 1199 bool isTarget, 1200 unsigned char TargetFlags) { 1201 assert((TargetFlags == 0 || isTarget) && 1202 "Cannot set target flags on target-independent globals"); 1203 if (Alignment == 0) 1204 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1205 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1206 FoldingSetNodeID ID; 1207 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1208 ID.AddInteger(Alignment); 1209 ID.AddInteger(Offset); 1210 C->addSelectionDAGCSEId(ID); 1211 ID.AddInteger(TargetFlags); 1212 void *IP = 0; 1213 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1214 return SDValue(E, 0); 1215 1216 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1217 Alignment, TargetFlags); 1218 CSEMap.InsertNode(N, IP); 1219 AllNodes.push_back(N); 1220 return SDValue(N, 0); 1221} 1222 1223SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1224 unsigned char TargetFlags) { 1225 FoldingSetNodeID ID; 1226 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1227 ID.AddInteger(Index); 1228 ID.AddInteger(Offset); 1229 ID.AddInteger(TargetFlags); 1230 void *IP = 0; 1231 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1232 return SDValue(E, 0); 1233 1234 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1235 TargetFlags); 1236 CSEMap.InsertNode(N, IP); 1237 AllNodes.push_back(N); 1238 return SDValue(N, 0); 1239} 1240 1241SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1242 FoldingSetNodeID ID; 1243 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1244 ID.AddPointer(MBB); 1245 void *IP = 0; 1246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1247 return SDValue(E, 0); 1248 1249 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1250 CSEMap.InsertNode(N, IP); 1251 AllNodes.push_back(N); 1252 return SDValue(N, 0); 1253} 1254 1255SDValue SelectionDAG::getValueType(EVT VT) { 1256 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1257 ValueTypeNodes.size()) 1258 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1259 1260 SDNode *&N = VT.isExtended() ? 1261 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1262 1263 if (N) return SDValue(N, 0); 1264 N = new (NodeAllocator) VTSDNode(VT); 1265 AllNodes.push_back(N); 1266 return SDValue(N, 0); 1267} 1268 1269SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1270 SDNode *&N = ExternalSymbols[Sym]; 1271 if (N) return SDValue(N, 0); 1272 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1273 AllNodes.push_back(N); 1274 return SDValue(N, 0); 1275} 1276 1277SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1278 unsigned char TargetFlags) { 1279 SDNode *&N = 1280 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1281 TargetFlags)]; 1282 if (N) return SDValue(N, 0); 1283 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1284 AllNodes.push_back(N); 1285 return SDValue(N, 0); 1286} 1287 1288SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1289 if ((unsigned)Cond >= CondCodeNodes.size()) 1290 CondCodeNodes.resize(Cond+1); 1291 1292 if (CondCodeNodes[Cond] == 0) { 1293 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1294 CondCodeNodes[Cond] = N; 1295 AllNodes.push_back(N); 1296 } 1297 1298 return SDValue(CondCodeNodes[Cond], 0); 1299} 1300 1301// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1302// the shuffle mask M that point at N1 to point at N2, and indices that point 1303// N2 to point at N1. 1304static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1305 std::swap(N1, N2); 1306 int NElts = M.size(); 1307 for (int i = 0; i != NElts; ++i) { 1308 if (M[i] >= NElts) 1309 M[i] -= NElts; 1310 else if (M[i] >= 0) 1311 M[i] += NElts; 1312 } 1313} 1314 1315SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1316 SDValue N2, const int *Mask) { 1317 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1318 assert(VT.isVector() && N1.getValueType().isVector() && 1319 "Vector Shuffle VTs must be a vectors"); 1320 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1321 && "Vector Shuffle VTs must have same element type"); 1322 1323 // Canonicalize shuffle undef, undef -> undef 1324 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1325 return getUNDEF(VT); 1326 1327 // Validate that all indices in Mask are within the range of the elements 1328 // input to the shuffle. 1329 unsigned NElts = VT.getVectorNumElements(); 1330 SmallVector<int, 8> MaskVec; 1331 for (unsigned i = 0; i != NElts; ++i) { 1332 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1333 MaskVec.push_back(Mask[i]); 1334 } 1335 1336 // Canonicalize shuffle v, v -> v, undef 1337 if (N1 == N2) { 1338 N2 = getUNDEF(VT); 1339 for (unsigned i = 0; i != NElts; ++i) 1340 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1341 } 1342 1343 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1344 if (N1.getOpcode() == ISD::UNDEF) 1345 commuteShuffle(N1, N2, MaskVec); 1346 1347 // Canonicalize all index into lhs, -> shuffle lhs, undef 1348 // Canonicalize all index into rhs, -> shuffle rhs, undef 1349 bool AllLHS = true, AllRHS = true; 1350 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1351 for (unsigned i = 0; i != NElts; ++i) { 1352 if (MaskVec[i] >= (int)NElts) { 1353 if (N2Undef) 1354 MaskVec[i] = -1; 1355 else 1356 AllLHS = false; 1357 } else if (MaskVec[i] >= 0) { 1358 AllRHS = false; 1359 } 1360 } 1361 if (AllLHS && AllRHS) 1362 return getUNDEF(VT); 1363 if (AllLHS && !N2Undef) 1364 N2 = getUNDEF(VT); 1365 if (AllRHS) { 1366 N1 = getUNDEF(VT); 1367 commuteShuffle(N1, N2, MaskVec); 1368 } 1369 1370 // If Identity shuffle, or all shuffle in to undef, return that node. 1371 bool AllUndef = true; 1372 bool Identity = true; 1373 for (unsigned i = 0; i != NElts; ++i) { 1374 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1375 if (MaskVec[i] >= 0) AllUndef = false; 1376 } 1377 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1378 return N1; 1379 if (AllUndef) 1380 return getUNDEF(VT); 1381 1382 FoldingSetNodeID ID; 1383 SDValue Ops[2] = { N1, N2 }; 1384 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1385 for (unsigned i = 0; i != NElts; ++i) 1386 ID.AddInteger(MaskVec[i]); 1387 1388 void* IP = 0; 1389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1390 return SDValue(E, 0); 1391 1392 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1393 // SDNode doesn't have access to it. This memory will be "leaked" when 1394 // the node is deallocated, but recovered when the NodeAllocator is released. 1395 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1396 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1397 1398 ShuffleVectorSDNode *N = 1399 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1400 CSEMap.InsertNode(N, IP); 1401 AllNodes.push_back(N); 1402 return SDValue(N, 0); 1403} 1404 1405SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1406 SDValue Val, SDValue DTy, 1407 SDValue STy, SDValue Rnd, SDValue Sat, 1408 ISD::CvtCode Code) { 1409 // If the src and dest types are the same and the conversion is between 1410 // integer types of the same sign or two floats, no conversion is necessary. 1411 if (DTy == STy && 1412 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1413 return Val; 1414 1415 FoldingSetNodeID ID; 1416 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1417 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1418 void* IP = 0; 1419 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1420 return SDValue(E, 0); 1421 1422 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1423 Code); 1424 CSEMap.InsertNode(N, IP); 1425 AllNodes.push_back(N); 1426 return SDValue(N, 0); 1427} 1428 1429SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1430 FoldingSetNodeID ID; 1431 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1432 ID.AddInteger(RegNo); 1433 void *IP = 0; 1434 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1435 return SDValue(E, 0); 1436 1437 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1438 CSEMap.InsertNode(N, IP); 1439 AllNodes.push_back(N); 1440 return SDValue(N, 0); 1441} 1442 1443SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1444 FoldingSetNodeID ID; 1445 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1446 ID.AddPointer(RegMask); 1447 void *IP = 0; 1448 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1449 return SDValue(E, 0); 1450 1451 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1452 CSEMap.InsertNode(N, IP); 1453 AllNodes.push_back(N); 1454 return SDValue(N, 0); 1455} 1456 1457SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1458 FoldingSetNodeID ID; 1459 SDValue Ops[] = { Root }; 1460 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1461 ID.AddPointer(Label); 1462 void *IP = 0; 1463 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1464 return SDValue(E, 0); 1465 1466 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1467 CSEMap.InsertNode(N, IP); 1468 AllNodes.push_back(N); 1469 return SDValue(N, 0); 1470} 1471 1472 1473SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1474 bool isTarget, 1475 unsigned char TargetFlags) { 1476 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1477 1478 FoldingSetNodeID ID; 1479 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1480 ID.AddPointer(BA); 1481 ID.AddInteger(TargetFlags); 1482 void *IP = 0; 1483 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1484 return SDValue(E, 0); 1485 1486 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1487 CSEMap.InsertNode(N, IP); 1488 AllNodes.push_back(N); 1489 return SDValue(N, 0); 1490} 1491 1492SDValue SelectionDAG::getSrcValue(const Value *V) { 1493 assert((!V || V->getType()->isPointerTy()) && 1494 "SrcValue is not a pointer?"); 1495 1496 FoldingSetNodeID ID; 1497 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1498 ID.AddPointer(V); 1499 1500 void *IP = 0; 1501 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1502 return SDValue(E, 0); 1503 1504 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1505 CSEMap.InsertNode(N, IP); 1506 AllNodes.push_back(N); 1507 return SDValue(N, 0); 1508} 1509 1510/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1511SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1512 FoldingSetNodeID ID; 1513 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1514 ID.AddPointer(MD); 1515 1516 void *IP = 0; 1517 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1518 return SDValue(E, 0); 1519 1520 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1521 CSEMap.InsertNode(N, IP); 1522 AllNodes.push_back(N); 1523 return SDValue(N, 0); 1524} 1525 1526 1527/// getShiftAmountOperand - Return the specified value casted to 1528/// the target's desired shift amount type. 1529SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1530 EVT OpTy = Op.getValueType(); 1531 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1532 if (OpTy == ShTy || OpTy.isVector()) return Op; 1533 1534 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1535 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1536} 1537 1538/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1539/// specified value type. 1540SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1541 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1542 unsigned ByteSize = VT.getStoreSize(); 1543 Type *Ty = VT.getTypeForEVT(*getContext()); 1544 unsigned StackAlign = 1545 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1546 1547 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1548 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1549} 1550 1551/// CreateStackTemporary - Create a stack temporary suitable for holding 1552/// either of the specified value types. 1553SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1554 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1555 VT2.getStoreSizeInBits())/8; 1556 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1557 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1558 const TargetData *TD = TLI.getTargetData(); 1559 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1560 TD->getPrefTypeAlignment(Ty2)); 1561 1562 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1563 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1564 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1565} 1566 1567SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1568 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1569 // These setcc operations always fold. 1570 switch (Cond) { 1571 default: break; 1572 case ISD::SETFALSE: 1573 case ISD::SETFALSE2: return getConstant(0, VT); 1574 case ISD::SETTRUE: 1575 case ISD::SETTRUE2: return getConstant(1, VT); 1576 1577 case ISD::SETOEQ: 1578 case ISD::SETOGT: 1579 case ISD::SETOGE: 1580 case ISD::SETOLT: 1581 case ISD::SETOLE: 1582 case ISD::SETONE: 1583 case ISD::SETO: 1584 case ISD::SETUO: 1585 case ISD::SETUEQ: 1586 case ISD::SETUNE: 1587 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1588 break; 1589 } 1590 1591 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1592 const APInt &C2 = N2C->getAPIntValue(); 1593 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1594 const APInt &C1 = N1C->getAPIntValue(); 1595 1596 switch (Cond) { 1597 default: llvm_unreachable("Unknown integer setcc!"); 1598 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1599 case ISD::SETNE: return getConstant(C1 != C2, VT); 1600 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1601 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1602 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1603 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1604 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1605 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1606 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1607 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1608 } 1609 } 1610 } 1611 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1612 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1613 // No compile time operations on this type yet. 1614 if (N1C->getValueType(0) == MVT::ppcf128) 1615 return SDValue(); 1616 1617 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1618 switch (Cond) { 1619 default: break; 1620 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1621 return getUNDEF(VT); 1622 // fall through 1623 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1624 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1625 return getUNDEF(VT); 1626 // fall through 1627 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1628 R==APFloat::cmpLessThan, VT); 1629 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1630 return getUNDEF(VT); 1631 // fall through 1632 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1633 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1634 return getUNDEF(VT); 1635 // fall through 1636 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1637 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1638 return getUNDEF(VT); 1639 // fall through 1640 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1641 R==APFloat::cmpEqual, VT); 1642 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1643 return getUNDEF(VT); 1644 // fall through 1645 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1646 R==APFloat::cmpEqual, VT); 1647 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1648 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1649 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1650 R==APFloat::cmpEqual, VT); 1651 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1652 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1653 R==APFloat::cmpLessThan, VT); 1654 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1655 R==APFloat::cmpUnordered, VT); 1656 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1657 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1658 } 1659 } else { 1660 // Ensure that the constant occurs on the RHS. 1661 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1662 } 1663 } 1664 1665 // Could not fold it. 1666 return SDValue(); 1667} 1668 1669/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1670/// use this predicate to simplify operations downstream. 1671bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1672 // This predicate is not safe for vector operations. 1673 if (Op.getValueType().isVector()) 1674 return false; 1675 1676 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1677 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1678} 1679 1680/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1681/// this predicate to simplify operations downstream. Mask is known to be zero 1682/// for bits that V cannot have. 1683bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1684 unsigned Depth) const { 1685 APInt KnownZero, KnownOne; 1686 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1687 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1688 return (KnownZero & Mask) == Mask; 1689} 1690 1691/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1692/// known to be either zero or one and return them in the KnownZero/KnownOne 1693/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1694/// processing. 1695void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1696 APInt &KnownOne, unsigned Depth) const { 1697 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1698 1699 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1700 if (Depth == 6) 1701 return; // Limit search depth. 1702 1703 APInt KnownZero2, KnownOne2; 1704 1705 switch (Op.getOpcode()) { 1706 case ISD::Constant: 1707 // We know all of the bits for a constant! 1708 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1709 KnownZero = ~KnownOne; 1710 return; 1711 case ISD::AND: 1712 // If either the LHS or the RHS are Zero, the result is zero. 1713 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1714 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1716 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1717 1718 // Output known-1 bits are only known if set in both the LHS & RHS. 1719 KnownOne &= KnownOne2; 1720 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1721 KnownZero |= KnownZero2; 1722 return; 1723 case ISD::OR: 1724 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1725 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1726 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1727 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1728 1729 // Output known-0 bits are only known if clear in both the LHS & RHS. 1730 KnownZero &= KnownZero2; 1731 // Output known-1 are known to be set if set in either the LHS | RHS. 1732 KnownOne |= KnownOne2; 1733 return; 1734 case ISD::XOR: { 1735 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1736 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1737 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1738 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1739 1740 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1741 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1742 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1743 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1744 KnownZero = KnownZeroOut; 1745 return; 1746 } 1747 case ISD::MUL: { 1748 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1749 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1750 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1751 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1752 1753 // If low bits are zero in either operand, output low known-0 bits. 1754 // Also compute a conserative estimate for high known-0 bits. 1755 // More trickiness is possible, but this is sufficient for the 1756 // interesting case of alignment computation. 1757 KnownOne.clearAllBits(); 1758 unsigned TrailZ = KnownZero.countTrailingOnes() + 1759 KnownZero2.countTrailingOnes(); 1760 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1761 KnownZero2.countLeadingOnes(), 1762 BitWidth) - BitWidth; 1763 1764 TrailZ = std::min(TrailZ, BitWidth); 1765 LeadZ = std::min(LeadZ, BitWidth); 1766 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1767 APInt::getHighBitsSet(BitWidth, LeadZ); 1768 return; 1769 } 1770 case ISD::UDIV: { 1771 // For the purposes of computing leading zeros we can conservatively 1772 // treat a udiv as a logical right shift by the power of 2 known to 1773 // be less than the denominator. 1774 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1775 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1776 1777 KnownOne2.clearAllBits(); 1778 KnownZero2.clearAllBits(); 1779 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1780 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1781 if (RHSUnknownLeadingOnes != BitWidth) 1782 LeadZ = std::min(BitWidth, 1783 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1784 1785 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1786 return; 1787 } 1788 case ISD::SELECT: 1789 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1790 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1791 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1792 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1793 1794 // Only known if known in both the LHS and RHS. 1795 KnownOne &= KnownOne2; 1796 KnownZero &= KnownZero2; 1797 return; 1798 case ISD::SELECT_CC: 1799 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1800 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1801 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1802 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1803 1804 // Only known if known in both the LHS and RHS. 1805 KnownOne &= KnownOne2; 1806 KnownZero &= KnownZero2; 1807 return; 1808 case ISD::SADDO: 1809 case ISD::UADDO: 1810 case ISD::SSUBO: 1811 case ISD::USUBO: 1812 case ISD::SMULO: 1813 case ISD::UMULO: 1814 if (Op.getResNo() != 1) 1815 return; 1816 // The boolean result conforms to getBooleanContents. Fall through. 1817 case ISD::SETCC: 1818 // If we know the result of a setcc has the top bits zero, use this info. 1819 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1820 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1821 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1822 return; 1823 case ISD::SHL: 1824 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1825 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1826 unsigned ShAmt = SA->getZExtValue(); 1827 1828 // If the shift count is an invalid immediate, don't do anything. 1829 if (ShAmt >= BitWidth) 1830 return; 1831 1832 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1833 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1834 KnownZero <<= ShAmt; 1835 KnownOne <<= ShAmt; 1836 // low bits known zero. 1837 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1838 } 1839 return; 1840 case ISD::SRL: 1841 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1842 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1843 unsigned ShAmt = SA->getZExtValue(); 1844 1845 // If the shift count is an invalid immediate, don't do anything. 1846 if (ShAmt >= BitWidth) 1847 return; 1848 1849 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1850 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1851 KnownZero = KnownZero.lshr(ShAmt); 1852 KnownOne = KnownOne.lshr(ShAmt); 1853 1854 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1855 KnownZero |= HighBits; // High bits known zero. 1856 } 1857 return; 1858 case ISD::SRA: 1859 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1860 unsigned ShAmt = SA->getZExtValue(); 1861 1862 // If the shift count is an invalid immediate, don't do anything. 1863 if (ShAmt >= BitWidth) 1864 return; 1865 1866 // If any of the demanded bits are produced by the sign extension, we also 1867 // demand the input sign bit. 1868 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1869 1870 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1871 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1872 KnownZero = KnownZero.lshr(ShAmt); 1873 KnownOne = KnownOne.lshr(ShAmt); 1874 1875 // Handle the sign bits. 1876 APInt SignBit = APInt::getSignBit(BitWidth); 1877 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1878 1879 if (KnownZero.intersects(SignBit)) { 1880 KnownZero |= HighBits; // New bits are known zero. 1881 } else if (KnownOne.intersects(SignBit)) { 1882 KnownOne |= HighBits; // New bits are known one. 1883 } 1884 } 1885 return; 1886 case ISD::SIGN_EXTEND_INREG: { 1887 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1888 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1889 1890 // Sign extension. Compute the demanded bits in the result that are not 1891 // present in the input. 1892 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1893 1894 APInt InSignBit = APInt::getSignBit(EBits); 1895 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1896 1897 // If the sign extended bits are demanded, we know that the sign 1898 // bit is demanded. 1899 InSignBit = InSignBit.zext(BitWidth); 1900 if (NewBits.getBoolValue()) 1901 InputDemandedBits |= InSignBit; 1902 1903 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1904 KnownOne &= InputDemandedBits; 1905 KnownZero &= InputDemandedBits; 1906 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1907 1908 // If the sign bit of the input is known set or clear, then we know the 1909 // top bits of the result. 1910 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1911 KnownZero |= NewBits; 1912 KnownOne &= ~NewBits; 1913 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1914 KnownOne |= NewBits; 1915 KnownZero &= ~NewBits; 1916 } else { // Input sign bit unknown 1917 KnownZero &= ~NewBits; 1918 KnownOne &= ~NewBits; 1919 } 1920 return; 1921 } 1922 case ISD::CTTZ: 1923 case ISD::CTTZ_ZERO_UNDEF: 1924 case ISD::CTLZ: 1925 case ISD::CTLZ_ZERO_UNDEF: 1926 case ISD::CTPOP: { 1927 unsigned LowBits = Log2_32(BitWidth)+1; 1928 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1929 KnownOne.clearAllBits(); 1930 return; 1931 } 1932 case ISD::LOAD: { 1933 LoadSDNode *LD = cast<LoadSDNode>(Op); 1934 if (ISD::isZEXTLoad(Op.getNode())) { 1935 EVT VT = LD->getMemoryVT(); 1936 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1937 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1938 } else if (const MDNode *Ranges = LD->getRanges()) { 1939 computeMaskedBitsLoad(*Ranges, KnownZero); 1940 } 1941 return; 1942 } 1943 case ISD::ZERO_EXTEND: { 1944 EVT InVT = Op.getOperand(0).getValueType(); 1945 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1946 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1947 KnownZero = KnownZero.trunc(InBits); 1948 KnownOne = KnownOne.trunc(InBits); 1949 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1950 KnownZero = KnownZero.zext(BitWidth); 1951 KnownOne = KnownOne.zext(BitWidth); 1952 KnownZero |= NewBits; 1953 return; 1954 } 1955 case ISD::SIGN_EXTEND: { 1956 EVT InVT = Op.getOperand(0).getValueType(); 1957 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1958 APInt InSignBit = APInt::getSignBit(InBits); 1959 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1960 1961 KnownZero = KnownZero.trunc(InBits); 1962 KnownOne = KnownOne.trunc(InBits); 1963 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1964 1965 // Note if the sign bit is known to be zero or one. 1966 bool SignBitKnownZero = KnownZero.isNegative(); 1967 bool SignBitKnownOne = KnownOne.isNegative(); 1968 assert(!(SignBitKnownZero && SignBitKnownOne) && 1969 "Sign bit can't be known to be both zero and one!"); 1970 1971 KnownZero = KnownZero.zext(BitWidth); 1972 KnownOne = KnownOne.zext(BitWidth); 1973 1974 // If the sign bit is known zero or one, the top bits match. 1975 if (SignBitKnownZero) 1976 KnownZero |= NewBits; 1977 else if (SignBitKnownOne) 1978 KnownOne |= NewBits; 1979 return; 1980 } 1981 case ISD::ANY_EXTEND: { 1982 EVT InVT = Op.getOperand(0).getValueType(); 1983 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1984 KnownZero = KnownZero.trunc(InBits); 1985 KnownOne = KnownOne.trunc(InBits); 1986 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1987 KnownZero = KnownZero.zext(BitWidth); 1988 KnownOne = KnownOne.zext(BitWidth); 1989 return; 1990 } 1991 case ISD::TRUNCATE: { 1992 EVT InVT = Op.getOperand(0).getValueType(); 1993 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1994 KnownZero = KnownZero.zext(InBits); 1995 KnownOne = KnownOne.zext(InBits); 1996 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1997 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1998 KnownZero = KnownZero.trunc(BitWidth); 1999 KnownOne = KnownOne.trunc(BitWidth); 2000 break; 2001 } 2002 case ISD::AssertZext: { 2003 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 2004 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 2005 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2006 KnownZero |= (~InMask); 2007 KnownOne &= (~KnownZero); 2008 return; 2009 } 2010 case ISD::FGETSIGN: 2011 // All bits are zero except the low bit. 2012 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 2013 return; 2014 2015 case ISD::SUB: { 2016 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2017 // We know that the top bits of C-X are clear if X contains less bits 2018 // than C (i.e. no wrap-around can happen). For example, 20-X is 2019 // positive if we can prove that X is >= 0 and < 16. 2020 if (CLHS->getAPIntValue().isNonNegative()) { 2021 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2022 // NLZ can't be BitWidth with no sign bit 2023 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2024 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2025 2026 // If all of the MaskV bits are known to be zero, then we know the 2027 // output top bits are zero, because we now know that the output is 2028 // from [0-C]. 2029 if ((KnownZero2 & MaskV) == MaskV) { 2030 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2031 // Top bits known zero. 2032 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2033 } 2034 } 2035 } 2036 } 2037 // fall through 2038 case ISD::ADD: 2039 case ISD::ADDE: { 2040 // Output known-0 bits are known if clear or set in both the low clear bits 2041 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2042 // low 3 bits clear. 2043 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2044 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2045 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2046 2047 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2048 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2049 KnownZeroOut = std::min(KnownZeroOut, 2050 KnownZero2.countTrailingOnes()); 2051 2052 if (Op.getOpcode() == ISD::ADD) { 2053 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2054 return; 2055 } 2056 2057 // With ADDE, a carry bit may be added in, so we can only use this 2058 // information if we know (at least) that the low two bits are clear. We 2059 // then return to the caller that the low bit is unknown but that other bits 2060 // are known zero. 2061 if (KnownZeroOut >= 2) // ADDE 2062 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2063 return; 2064 } 2065 case ISD::SREM: 2066 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2067 const APInt &RA = Rem->getAPIntValue().abs(); 2068 if (RA.isPowerOf2()) { 2069 APInt LowBits = RA - 1; 2070 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2071 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2072 2073 // The low bits of the first operand are unchanged by the srem. 2074 KnownZero = KnownZero2 & LowBits; 2075 KnownOne = KnownOne2 & LowBits; 2076 2077 // If the first operand is non-negative or has all low bits zero, then 2078 // the upper bits are all zero. 2079 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2080 KnownZero |= ~LowBits; 2081 2082 // If the first operand is negative and not all low bits are zero, then 2083 // the upper bits are all one. 2084 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2085 KnownOne |= ~LowBits; 2086 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2087 } 2088 } 2089 return; 2090 case ISD::UREM: { 2091 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2092 const APInt &RA = Rem->getAPIntValue(); 2093 if (RA.isPowerOf2()) { 2094 APInt LowBits = (RA - 1); 2095 KnownZero |= ~LowBits; 2096 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2097 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2098 break; 2099 } 2100 } 2101 2102 // Since the result is less than or equal to either operand, any leading 2103 // zero bits in either operand must also exist in the result. 2104 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2105 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2106 2107 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2108 KnownZero2.countLeadingOnes()); 2109 KnownOne.clearAllBits(); 2110 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2111 return; 2112 } 2113 case ISD::FrameIndex: 2114 case ISD::TargetFrameIndex: 2115 if (unsigned Align = InferPtrAlignment(Op)) { 2116 // The low bits are known zero if the pointer is aligned. 2117 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2118 return; 2119 } 2120 break; 2121 2122 default: 2123 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2124 break; 2125 // Fallthrough 2126 case ISD::INTRINSIC_WO_CHAIN: 2127 case ISD::INTRINSIC_W_CHAIN: 2128 case ISD::INTRINSIC_VOID: 2129 // Allow the target to implement this method for its nodes. 2130 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2131 return; 2132 } 2133} 2134 2135/// ComputeNumSignBits - Return the number of times the sign bit of the 2136/// register is replicated into the other bits. We know that at least 1 bit 2137/// is always equal to the sign bit (itself), but other cases can give us 2138/// information. For example, immediately after an "SRA X, 2", we know that 2139/// the top 3 bits are all equal to each other, so we return 3. 2140unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2141 EVT VT = Op.getValueType(); 2142 assert(VT.isInteger() && "Invalid VT!"); 2143 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2144 unsigned Tmp, Tmp2; 2145 unsigned FirstAnswer = 1; 2146 2147 if (Depth == 6) 2148 return 1; // Limit search depth. 2149 2150 switch (Op.getOpcode()) { 2151 default: break; 2152 case ISD::AssertSext: 2153 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2154 return VTBits-Tmp+1; 2155 case ISD::AssertZext: 2156 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2157 return VTBits-Tmp; 2158 2159 case ISD::Constant: { 2160 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2161 return Val.getNumSignBits(); 2162 } 2163 2164 case ISD::SIGN_EXTEND: 2165 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2166 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2167 2168 case ISD::SIGN_EXTEND_INREG: 2169 // Max of the input and what this extends. 2170 Tmp = 2171 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2172 Tmp = VTBits-Tmp+1; 2173 2174 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2175 return std::max(Tmp, Tmp2); 2176 2177 case ISD::SRA: 2178 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2179 // SRA X, C -> adds C sign bits. 2180 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2181 Tmp += C->getZExtValue(); 2182 if (Tmp > VTBits) Tmp = VTBits; 2183 } 2184 return Tmp; 2185 case ISD::SHL: 2186 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2187 // shl destroys sign bits. 2188 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2189 if (C->getZExtValue() >= VTBits || // Bad shift. 2190 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2191 return Tmp - C->getZExtValue(); 2192 } 2193 break; 2194 case ISD::AND: 2195 case ISD::OR: 2196 case ISD::XOR: // NOT is handled here. 2197 // Logical binary ops preserve the number of sign bits at the worst. 2198 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2199 if (Tmp != 1) { 2200 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2201 FirstAnswer = std::min(Tmp, Tmp2); 2202 // We computed what we know about the sign bits as our first 2203 // answer. Now proceed to the generic code that uses 2204 // ComputeMaskedBits, and pick whichever answer is better. 2205 } 2206 break; 2207 2208 case ISD::SELECT: 2209 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2210 if (Tmp == 1) return 1; // Early out. 2211 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2212 return std::min(Tmp, Tmp2); 2213 2214 case ISD::SADDO: 2215 case ISD::UADDO: 2216 case ISD::SSUBO: 2217 case ISD::USUBO: 2218 case ISD::SMULO: 2219 case ISD::UMULO: 2220 if (Op.getResNo() != 1) 2221 break; 2222 // The boolean result conforms to getBooleanContents. Fall through. 2223 case ISD::SETCC: 2224 // If setcc returns 0/-1, all bits are sign bits. 2225 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2226 TargetLowering::ZeroOrNegativeOneBooleanContent) 2227 return VTBits; 2228 break; 2229 case ISD::ROTL: 2230 case ISD::ROTR: 2231 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2232 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2233 2234 // Handle rotate right by N like a rotate left by 32-N. 2235 if (Op.getOpcode() == ISD::ROTR) 2236 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2237 2238 // If we aren't rotating out all of the known-in sign bits, return the 2239 // number that are left. This handles rotl(sext(x), 1) for example. 2240 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2241 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2242 } 2243 break; 2244 case ISD::ADD: 2245 // Add can have at most one carry bit. Thus we know that the output 2246 // is, at worst, one more bit than the inputs. 2247 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2248 if (Tmp == 1) return 1; // Early out. 2249 2250 // Special case decrementing a value (ADD X, -1): 2251 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2252 if (CRHS->isAllOnesValue()) { 2253 APInt KnownZero, KnownOne; 2254 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2255 2256 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2257 // sign bits set. 2258 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2259 return VTBits; 2260 2261 // If we are subtracting one from a positive number, there is no carry 2262 // out of the result. 2263 if (KnownZero.isNegative()) 2264 return Tmp; 2265 } 2266 2267 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2268 if (Tmp2 == 1) return 1; 2269 return std::min(Tmp, Tmp2)-1; 2270 2271 case ISD::SUB: 2272 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2273 if (Tmp2 == 1) return 1; 2274 2275 // Handle NEG. 2276 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2277 if (CLHS->isNullValue()) { 2278 APInt KnownZero, KnownOne; 2279 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2280 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2281 // sign bits set. 2282 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2283 return VTBits; 2284 2285 // If the input is known to be positive (the sign bit is known clear), 2286 // the output of the NEG has the same number of sign bits as the input. 2287 if (KnownZero.isNegative()) 2288 return Tmp2; 2289 2290 // Otherwise, we treat this like a SUB. 2291 } 2292 2293 // Sub can have at most one carry bit. Thus we know that the output 2294 // is, at worst, one more bit than the inputs. 2295 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2296 if (Tmp == 1) return 1; // Early out. 2297 return std::min(Tmp, Tmp2)-1; 2298 case ISD::TRUNCATE: 2299 // FIXME: it's tricky to do anything useful for this, but it is an important 2300 // case for targets like X86. 2301 break; 2302 } 2303 2304 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2305 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2306 unsigned ExtType = LD->getExtensionType(); 2307 switch (ExtType) { 2308 default: break; 2309 case ISD::SEXTLOAD: // '17' bits known 2310 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2311 return VTBits-Tmp+1; 2312 case ISD::ZEXTLOAD: // '16' bits known 2313 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2314 return VTBits-Tmp; 2315 } 2316 } 2317 2318 // Allow the target to implement this method for its nodes. 2319 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2320 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2321 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2322 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2323 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2324 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2325 } 2326 2327 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2328 // use this information. 2329 APInt KnownZero, KnownOne; 2330 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2331 2332 APInt Mask; 2333 if (KnownZero.isNegative()) { // sign bit is 0 2334 Mask = KnownZero; 2335 } else if (KnownOne.isNegative()) { // sign bit is 1; 2336 Mask = KnownOne; 2337 } else { 2338 // Nothing known. 2339 return FirstAnswer; 2340 } 2341 2342 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2343 // the number of identical bits in the top of the input value. 2344 Mask = ~Mask; 2345 Mask <<= Mask.getBitWidth()-VTBits; 2346 // Return # leading zeros. We use 'min' here in case Val was zero before 2347 // shifting. We don't want to return '64' as for an i32 "0". 2348 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2349} 2350 2351/// isBaseWithConstantOffset - Return true if the specified operand is an 2352/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2353/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2354/// semantics as an ADD. This handles the equivalence: 2355/// X|Cst == X+Cst iff X&Cst = 0. 2356bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2357 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2358 !isa<ConstantSDNode>(Op.getOperand(1))) 2359 return false; 2360 2361 if (Op.getOpcode() == ISD::OR && 2362 !MaskedValueIsZero(Op.getOperand(0), 2363 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2364 return false; 2365 2366 return true; 2367} 2368 2369 2370bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2371 // If we're told that NaNs won't happen, assume they won't. 2372 if (getTarget().Options.NoNaNsFPMath) 2373 return true; 2374 2375 // If the value is a constant, we can obviously see if it is a NaN or not. 2376 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2377 return !C->getValueAPF().isNaN(); 2378 2379 // TODO: Recognize more cases here. 2380 2381 return false; 2382} 2383 2384bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2385 // If the value is a constant, we can obviously see if it is a zero or not. 2386 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2387 return !C->isZero(); 2388 2389 // TODO: Recognize more cases here. 2390 switch (Op.getOpcode()) { 2391 default: break; 2392 case ISD::OR: 2393 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2394 return !C->isNullValue(); 2395 break; 2396 } 2397 2398 return false; 2399} 2400 2401bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2402 // Check the obvious case. 2403 if (A == B) return true; 2404 2405 // For for negative and positive zero. 2406 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2407 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2408 if (CA->isZero() && CB->isZero()) return true; 2409 2410 // Otherwise they may not be equal. 2411 return false; 2412} 2413 2414/// getNode - Gets or creates the specified node. 2415/// 2416SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2417 FoldingSetNodeID ID; 2418 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2419 void *IP = 0; 2420 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2421 return SDValue(E, 0); 2422 2423 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2424 CSEMap.InsertNode(N, IP); 2425 2426 AllNodes.push_back(N); 2427#ifndef NDEBUG 2428 VerifySDNode(N); 2429#endif 2430 return SDValue(N, 0); 2431} 2432 2433SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2434 EVT VT, SDValue Operand) { 2435 // Constant fold unary operations with an integer constant operand. 2436 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2437 const APInt &Val = C->getAPIntValue(); 2438 switch (Opcode) { 2439 default: break; 2440 case ISD::SIGN_EXTEND: 2441 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2442 case ISD::ANY_EXTEND: 2443 case ISD::ZERO_EXTEND: 2444 case ISD::TRUNCATE: 2445 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2446 case ISD::UINT_TO_FP: 2447 case ISD::SINT_TO_FP: { 2448 // No compile time operations on ppcf128. 2449 if (VT == MVT::ppcf128) break; 2450 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2451 (void)apf.convertFromAPInt(Val, 2452 Opcode==ISD::SINT_TO_FP, 2453 APFloat::rmNearestTiesToEven); 2454 return getConstantFP(apf, VT); 2455 } 2456 case ISD::BITCAST: 2457 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2458 return getConstantFP(Val.bitsToFloat(), VT); 2459 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2460 return getConstantFP(Val.bitsToDouble(), VT); 2461 break; 2462 case ISD::BSWAP: 2463 return getConstant(Val.byteSwap(), VT); 2464 case ISD::CTPOP: 2465 return getConstant(Val.countPopulation(), VT); 2466 case ISD::CTLZ: 2467 case ISD::CTLZ_ZERO_UNDEF: 2468 return getConstant(Val.countLeadingZeros(), VT); 2469 case ISD::CTTZ: 2470 case ISD::CTTZ_ZERO_UNDEF: 2471 return getConstant(Val.countTrailingZeros(), VT); 2472 } 2473 } 2474 2475 // Constant fold unary operations with a floating point constant operand. 2476 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2477 APFloat V = C->getValueAPF(); // make copy 2478 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2479 switch (Opcode) { 2480 case ISD::FNEG: 2481 V.changeSign(); 2482 return getConstantFP(V, VT); 2483 case ISD::FABS: 2484 V.clearSign(); 2485 return getConstantFP(V, VT); 2486 case ISD::FP_EXTEND: { 2487 bool ignored; 2488 // This can return overflow, underflow, or inexact; we don't care. 2489 // FIXME need to be more flexible about rounding mode. 2490 (void)V.convert(*EVTToAPFloatSemantics(VT), 2491 APFloat::rmNearestTiesToEven, &ignored); 2492 return getConstantFP(V, VT); 2493 } 2494 case ISD::FP_TO_SINT: 2495 case ISD::FP_TO_UINT: { 2496 integerPart x[2]; 2497 bool ignored; 2498 assert(integerPartWidth >= 64); 2499 // FIXME need to be more flexible about rounding mode. 2500 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2501 Opcode==ISD::FP_TO_SINT, 2502 APFloat::rmTowardZero, &ignored); 2503 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2504 break; 2505 APInt api(VT.getSizeInBits(), x); 2506 return getConstant(api, VT); 2507 } 2508 case ISD::BITCAST: 2509 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2510 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2511 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2512 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2513 break; 2514 } 2515 } 2516 } 2517 2518 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2519 switch (Opcode) { 2520 case ISD::TokenFactor: 2521 case ISD::MERGE_VALUES: 2522 case ISD::CONCAT_VECTORS: 2523 return Operand; // Factor, merge or concat of one node? No need. 2524 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2525 case ISD::FP_EXTEND: 2526 assert(VT.isFloatingPoint() && 2527 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2528 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2529 assert((!VT.isVector() || 2530 VT.getVectorNumElements() == 2531 Operand.getValueType().getVectorNumElements()) && 2532 "Vector element count mismatch!"); 2533 if (Operand.getOpcode() == ISD::UNDEF) 2534 return getUNDEF(VT); 2535 break; 2536 case ISD::SIGN_EXTEND: 2537 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2538 "Invalid SIGN_EXTEND!"); 2539 if (Operand.getValueType() == VT) return Operand; // noop extension 2540 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2541 "Invalid sext node, dst < src!"); 2542 assert((!VT.isVector() || 2543 VT.getVectorNumElements() == 2544 Operand.getValueType().getVectorNumElements()) && 2545 "Vector element count mismatch!"); 2546 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2547 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2548 else if (OpOpcode == ISD::UNDEF) 2549 // sext(undef) = 0, because the top bits will all be the same. 2550 return getConstant(0, VT); 2551 break; 2552 case ISD::ZERO_EXTEND: 2553 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2554 "Invalid ZERO_EXTEND!"); 2555 if (Operand.getValueType() == VT) return Operand; // noop extension 2556 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2557 "Invalid zext node, dst < src!"); 2558 assert((!VT.isVector() || 2559 VT.getVectorNumElements() == 2560 Operand.getValueType().getVectorNumElements()) && 2561 "Vector element count mismatch!"); 2562 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2563 return getNode(ISD::ZERO_EXTEND, DL, VT, 2564 Operand.getNode()->getOperand(0)); 2565 else if (OpOpcode == ISD::UNDEF) 2566 // zext(undef) = 0, because the top bits will be zero. 2567 return getConstant(0, VT); 2568 break; 2569 case ISD::ANY_EXTEND: 2570 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2571 "Invalid ANY_EXTEND!"); 2572 if (Operand.getValueType() == VT) return Operand; // noop extension 2573 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2574 "Invalid anyext node, dst < src!"); 2575 assert((!VT.isVector() || 2576 VT.getVectorNumElements() == 2577 Operand.getValueType().getVectorNumElements()) && 2578 "Vector element count mismatch!"); 2579 2580 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2581 OpOpcode == ISD::ANY_EXTEND) 2582 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2583 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2584 else if (OpOpcode == ISD::UNDEF) 2585 return getUNDEF(VT); 2586 2587 // (ext (trunx x)) -> x 2588 if (OpOpcode == ISD::TRUNCATE) { 2589 SDValue OpOp = Operand.getNode()->getOperand(0); 2590 if (OpOp.getValueType() == VT) 2591 return OpOp; 2592 } 2593 break; 2594 case ISD::TRUNCATE: 2595 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2596 "Invalid TRUNCATE!"); 2597 if (Operand.getValueType() == VT) return Operand; // noop truncate 2598 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2599 "Invalid truncate node, src < dst!"); 2600 assert((!VT.isVector() || 2601 VT.getVectorNumElements() == 2602 Operand.getValueType().getVectorNumElements()) && 2603 "Vector element count mismatch!"); 2604 if (OpOpcode == ISD::TRUNCATE) 2605 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2606 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2607 OpOpcode == ISD::ANY_EXTEND) { 2608 // If the source is smaller than the dest, we still need an extend. 2609 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2610 .bitsLT(VT.getScalarType())) 2611 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2612 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2613 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2614 return Operand.getNode()->getOperand(0); 2615 } 2616 if (OpOpcode == ISD::UNDEF) 2617 return getUNDEF(VT); 2618 break; 2619 case ISD::BITCAST: 2620 // Basic sanity checking. 2621 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2622 && "Cannot BITCAST between types of different sizes!"); 2623 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2624 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2625 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2626 if (OpOpcode == ISD::UNDEF) 2627 return getUNDEF(VT); 2628 break; 2629 case ISD::SCALAR_TO_VECTOR: 2630 assert(VT.isVector() && !Operand.getValueType().isVector() && 2631 (VT.getVectorElementType() == Operand.getValueType() || 2632 (VT.getVectorElementType().isInteger() && 2633 Operand.getValueType().isInteger() && 2634 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2635 "Illegal SCALAR_TO_VECTOR node!"); 2636 if (OpOpcode == ISD::UNDEF) 2637 return getUNDEF(VT); 2638 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2639 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2640 isa<ConstantSDNode>(Operand.getOperand(1)) && 2641 Operand.getConstantOperandVal(1) == 0 && 2642 Operand.getOperand(0).getValueType() == VT) 2643 return Operand.getOperand(0); 2644 break; 2645 case ISD::FNEG: 2646 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2647 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2648 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2649 Operand.getNode()->getOperand(0)); 2650 if (OpOpcode == ISD::FNEG) // --X -> X 2651 return Operand.getNode()->getOperand(0); 2652 break; 2653 case ISD::FABS: 2654 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2655 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2656 break; 2657 } 2658 2659 SDNode *N; 2660 SDVTList VTs = getVTList(VT); 2661 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2662 FoldingSetNodeID ID; 2663 SDValue Ops[1] = { Operand }; 2664 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2665 void *IP = 0; 2666 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2667 return SDValue(E, 0); 2668 2669 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2670 CSEMap.InsertNode(N, IP); 2671 } else { 2672 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2673 } 2674 2675 AllNodes.push_back(N); 2676#ifndef NDEBUG 2677 VerifySDNode(N); 2678#endif 2679 return SDValue(N, 0); 2680} 2681 2682SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2683 EVT VT, 2684 ConstantSDNode *Cst1, 2685 ConstantSDNode *Cst2) { 2686 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2687 2688 switch (Opcode) { 2689 case ISD::ADD: return getConstant(C1 + C2, VT); 2690 case ISD::SUB: return getConstant(C1 - C2, VT); 2691 case ISD::MUL: return getConstant(C1 * C2, VT); 2692 case ISD::UDIV: 2693 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2694 break; 2695 case ISD::UREM: 2696 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2697 break; 2698 case ISD::SDIV: 2699 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2700 break; 2701 case ISD::SREM: 2702 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2703 break; 2704 case ISD::AND: return getConstant(C1 & C2, VT); 2705 case ISD::OR: return getConstant(C1 | C2, VT); 2706 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2707 case ISD::SHL: return getConstant(C1 << C2, VT); 2708 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2709 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2710 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2711 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2712 default: break; 2713 } 2714 2715 return SDValue(); 2716} 2717 2718SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2719 SDValue N1, SDValue N2) { 2720 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2721 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2722 switch (Opcode) { 2723 default: break; 2724 case ISD::TokenFactor: 2725 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2726 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2727 // Fold trivial token factors. 2728 if (N1.getOpcode() == ISD::EntryToken) return N2; 2729 if (N2.getOpcode() == ISD::EntryToken) return N1; 2730 if (N1 == N2) return N1; 2731 break; 2732 case ISD::CONCAT_VECTORS: 2733 // Concat of UNDEFs is UNDEF. 2734 if (N1.getOpcode() == ISD::UNDEF && 2735 N2.getOpcode() == ISD::UNDEF) 2736 return getUNDEF(VT); 2737 2738 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2739 // one big BUILD_VECTOR. 2740 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2741 N2.getOpcode() == ISD::BUILD_VECTOR) { 2742 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2743 N1.getNode()->op_end()); 2744 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2745 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2746 } 2747 break; 2748 case ISD::AND: 2749 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2750 assert(N1.getValueType() == N2.getValueType() && 2751 N1.getValueType() == VT && "Binary operator types must match!"); 2752 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2753 // worth handling here. 2754 if (N2C && N2C->isNullValue()) 2755 return N2; 2756 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2757 return N1; 2758 break; 2759 case ISD::OR: 2760 case ISD::XOR: 2761 case ISD::ADD: 2762 case ISD::SUB: 2763 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2764 assert(N1.getValueType() == N2.getValueType() && 2765 N1.getValueType() == VT && "Binary operator types must match!"); 2766 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2767 // it's worth handling here. 2768 if (N2C && N2C->isNullValue()) 2769 return N1; 2770 break; 2771 case ISD::UDIV: 2772 case ISD::UREM: 2773 case ISD::MULHU: 2774 case ISD::MULHS: 2775 case ISD::MUL: 2776 case ISD::SDIV: 2777 case ISD::SREM: 2778 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2779 assert(N1.getValueType() == N2.getValueType() && 2780 N1.getValueType() == VT && "Binary operator types must match!"); 2781 break; 2782 case ISD::FADD: 2783 case ISD::FSUB: 2784 case ISD::FMUL: 2785 case ISD::FDIV: 2786 case ISD::FREM: 2787 if (getTarget().Options.UnsafeFPMath) { 2788 if (Opcode == ISD::FADD) { 2789 // 0+x --> x 2790 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2791 if (CFP->getValueAPF().isZero()) 2792 return N2; 2793 // x+0 --> x 2794 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2795 if (CFP->getValueAPF().isZero()) 2796 return N1; 2797 } else if (Opcode == ISD::FSUB) { 2798 // x-0 --> x 2799 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2800 if (CFP->getValueAPF().isZero()) 2801 return N1; 2802 } 2803 } 2804 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2805 assert(N1.getValueType() == N2.getValueType() && 2806 N1.getValueType() == VT && "Binary operator types must match!"); 2807 break; 2808 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2809 assert(N1.getValueType() == VT && 2810 N1.getValueType().isFloatingPoint() && 2811 N2.getValueType().isFloatingPoint() && 2812 "Invalid FCOPYSIGN!"); 2813 break; 2814 case ISD::SHL: 2815 case ISD::SRA: 2816 case ISD::SRL: 2817 case ISD::ROTL: 2818 case ISD::ROTR: 2819 assert(VT == N1.getValueType() && 2820 "Shift operators return type must be the same as their first arg"); 2821 assert(VT.isInteger() && N2.getValueType().isInteger() && 2822 "Shifts only work on integers"); 2823 // Verify that the shift amount VT is bit enough to hold valid shift 2824 // amounts. This catches things like trying to shift an i1024 value by an 2825 // i8, which is easy to fall into in generic code that uses 2826 // TLI.getShiftAmount(). 2827 assert(N2.getValueType().getSizeInBits() >= 2828 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2829 "Invalid use of small shift amount with oversized value!"); 2830 2831 // Always fold shifts of i1 values so the code generator doesn't need to 2832 // handle them. Since we know the size of the shift has to be less than the 2833 // size of the value, the shift/rotate count is guaranteed to be zero. 2834 if (VT == MVT::i1) 2835 return N1; 2836 if (N2C && N2C->isNullValue()) 2837 return N1; 2838 break; 2839 case ISD::FP_ROUND_INREG: { 2840 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2841 assert(VT == N1.getValueType() && "Not an inreg round!"); 2842 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2843 "Cannot FP_ROUND_INREG integer types"); 2844 assert(EVT.isVector() == VT.isVector() && 2845 "FP_ROUND_INREG type should be vector iff the operand " 2846 "type is vector!"); 2847 assert((!EVT.isVector() || 2848 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2849 "Vector element counts must match in FP_ROUND_INREG"); 2850 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2851 (void)EVT; 2852 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2853 break; 2854 } 2855 case ISD::FP_ROUND: 2856 assert(VT.isFloatingPoint() && 2857 N1.getValueType().isFloatingPoint() && 2858 VT.bitsLE(N1.getValueType()) && 2859 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2860 if (N1.getValueType() == VT) return N1; // noop conversion. 2861 break; 2862 case ISD::AssertSext: 2863 case ISD::AssertZext: { 2864 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2865 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2866 assert(VT.isInteger() && EVT.isInteger() && 2867 "Cannot *_EXTEND_INREG FP types"); 2868 assert(!EVT.isVector() && 2869 "AssertSExt/AssertZExt type should be the vector element type " 2870 "rather than the vector type!"); 2871 assert(EVT.bitsLE(VT) && "Not extending!"); 2872 if (VT == EVT) return N1; // noop assertion. 2873 break; 2874 } 2875 case ISD::SIGN_EXTEND_INREG: { 2876 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2877 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2878 assert(VT.isInteger() && EVT.isInteger() && 2879 "Cannot *_EXTEND_INREG FP types"); 2880 assert(EVT.isVector() == VT.isVector() && 2881 "SIGN_EXTEND_INREG type should be vector iff the operand " 2882 "type is vector!"); 2883 assert((!EVT.isVector() || 2884 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2885 "Vector element counts must match in SIGN_EXTEND_INREG"); 2886 assert(EVT.bitsLE(VT) && "Not extending!"); 2887 if (EVT == VT) return N1; // Not actually extending 2888 2889 if (N1C) { 2890 APInt Val = N1C->getAPIntValue(); 2891 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2892 Val <<= Val.getBitWidth()-FromBits; 2893 Val = Val.ashr(Val.getBitWidth()-FromBits); 2894 return getConstant(Val, VT); 2895 } 2896 break; 2897 } 2898 case ISD::EXTRACT_VECTOR_ELT: 2899 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2900 if (N1.getOpcode() == ISD::UNDEF) 2901 return getUNDEF(VT); 2902 2903 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2904 // expanding copies of large vectors from registers. 2905 if (N2C && 2906 N1.getOpcode() == ISD::CONCAT_VECTORS && 2907 N1.getNumOperands() > 0) { 2908 unsigned Factor = 2909 N1.getOperand(0).getValueType().getVectorNumElements(); 2910 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2911 N1.getOperand(N2C->getZExtValue() / Factor), 2912 getConstant(N2C->getZExtValue() % Factor, 2913 N2.getValueType())); 2914 } 2915 2916 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2917 // expanding large vector constants. 2918 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2919 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2920 EVT VEltTy = N1.getValueType().getVectorElementType(); 2921 if (Elt.getValueType() != VEltTy) { 2922 // If the vector element type is not legal, the BUILD_VECTOR operands 2923 // are promoted and implicitly truncated. Make that explicit here. 2924 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2925 } 2926 if (VT != VEltTy) { 2927 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2928 // result is implicitly extended. 2929 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2930 } 2931 return Elt; 2932 } 2933 2934 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2935 // operations are lowered to scalars. 2936 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2937 // If the indices are the same, return the inserted element else 2938 // if the indices are known different, extract the element from 2939 // the original vector. 2940 SDValue N1Op2 = N1.getOperand(2); 2941 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2942 2943 if (N1Op2C && N2C) { 2944 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2945 if (VT == N1.getOperand(1).getValueType()) 2946 return N1.getOperand(1); 2947 else 2948 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2949 } 2950 2951 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2952 } 2953 } 2954 break; 2955 case ISD::EXTRACT_ELEMENT: 2956 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2957 assert(!N1.getValueType().isVector() && !VT.isVector() && 2958 (N1.getValueType().isInteger() == VT.isInteger()) && 2959 N1.getValueType() != VT && 2960 "Wrong types for EXTRACT_ELEMENT!"); 2961 2962 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2963 // 64-bit integers into 32-bit parts. Instead of building the extract of 2964 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2965 if (N1.getOpcode() == ISD::BUILD_PAIR) 2966 return N1.getOperand(N2C->getZExtValue()); 2967 2968 // EXTRACT_ELEMENT of a constant int is also very common. 2969 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2970 unsigned ElementSize = VT.getSizeInBits(); 2971 unsigned Shift = ElementSize * N2C->getZExtValue(); 2972 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2973 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2974 } 2975 break; 2976 case ISD::EXTRACT_SUBVECTOR: { 2977 SDValue Index = N2; 2978 if (VT.isSimple() && N1.getValueType().isSimple()) { 2979 assert(VT.isVector() && N1.getValueType().isVector() && 2980 "Extract subvector VTs must be a vectors!"); 2981 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2982 "Extract subvector VTs must have the same element type!"); 2983 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2984 "Extract subvector must be from larger vector to smaller vector!"); 2985 2986 if (isa<ConstantSDNode>(Index.getNode())) { 2987 assert((VT.getVectorNumElements() + 2988 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2989 <= N1.getValueType().getVectorNumElements()) 2990 && "Extract subvector overflow!"); 2991 } 2992 2993 // Trivial extraction. 2994 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2995 return N1; 2996 } 2997 break; 2998 } 2999 } 3000 3001 if (N1C) { 3002 if (N2C) { 3003 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 3004 if (SV.getNode()) return SV; 3005 } else { // Cannonicalize constant to RHS if commutative 3006 if (isCommutativeBinOp(Opcode)) { 3007 std::swap(N1C, N2C); 3008 std::swap(N1, N2); 3009 } 3010 } 3011 } 3012 3013 // Constant fold FP operations. 3014 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3015 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3016 if (N1CFP) { 3017 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3018 // Cannonicalize constant to RHS if commutative 3019 std::swap(N1CFP, N2CFP); 3020 std::swap(N1, N2); 3021 } else if (N2CFP && VT != MVT::ppcf128) { 3022 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3023 APFloat::opStatus s; 3024 switch (Opcode) { 3025 case ISD::FADD: 3026 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3027 if (s != APFloat::opInvalidOp) 3028 return getConstantFP(V1, VT); 3029 break; 3030 case ISD::FSUB: 3031 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3032 if (s!=APFloat::opInvalidOp) 3033 return getConstantFP(V1, VT); 3034 break; 3035 case ISD::FMUL: 3036 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3037 if (s!=APFloat::opInvalidOp) 3038 return getConstantFP(V1, VT); 3039 break; 3040 case ISD::FDIV: 3041 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3042 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3043 return getConstantFP(V1, VT); 3044 break; 3045 case ISD::FREM : 3046 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3047 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3048 return getConstantFP(V1, VT); 3049 break; 3050 case ISD::FCOPYSIGN: 3051 V1.copySign(V2); 3052 return getConstantFP(V1, VT); 3053 default: break; 3054 } 3055 } 3056 3057 if (Opcode == ISD::FP_ROUND) { 3058 APFloat V = N1CFP->getValueAPF(); // make copy 3059 bool ignored; 3060 // This can return overflow, underflow, or inexact; we don't care. 3061 // FIXME need to be more flexible about rounding mode. 3062 (void)V.convert(*EVTToAPFloatSemantics(VT), 3063 APFloat::rmNearestTiesToEven, &ignored); 3064 return getConstantFP(V, VT); 3065 } 3066 } 3067 3068 // Canonicalize an UNDEF to the RHS, even over a constant. 3069 if (N1.getOpcode() == ISD::UNDEF) { 3070 if (isCommutativeBinOp(Opcode)) { 3071 std::swap(N1, N2); 3072 } else { 3073 switch (Opcode) { 3074 case ISD::FP_ROUND_INREG: 3075 case ISD::SIGN_EXTEND_INREG: 3076 case ISD::SUB: 3077 case ISD::FSUB: 3078 case ISD::FDIV: 3079 case ISD::FREM: 3080 case ISD::SRA: 3081 return N1; // fold op(undef, arg2) -> undef 3082 case ISD::UDIV: 3083 case ISD::SDIV: 3084 case ISD::UREM: 3085 case ISD::SREM: 3086 case ISD::SRL: 3087 case ISD::SHL: 3088 if (!VT.isVector()) 3089 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3090 // For vectors, we can't easily build an all zero vector, just return 3091 // the LHS. 3092 return N2; 3093 } 3094 } 3095 } 3096 3097 // Fold a bunch of operators when the RHS is undef. 3098 if (N2.getOpcode() == ISD::UNDEF) { 3099 switch (Opcode) { 3100 case ISD::XOR: 3101 if (N1.getOpcode() == ISD::UNDEF) 3102 // Handle undef ^ undef -> 0 special case. This is a common 3103 // idiom (misuse). 3104 return getConstant(0, VT); 3105 // fallthrough 3106 case ISD::ADD: 3107 case ISD::ADDC: 3108 case ISD::ADDE: 3109 case ISD::SUB: 3110 case ISD::UDIV: 3111 case ISD::SDIV: 3112 case ISD::UREM: 3113 case ISD::SREM: 3114 return N2; // fold op(arg1, undef) -> undef 3115 case ISD::FADD: 3116 case ISD::FSUB: 3117 case ISD::FMUL: 3118 case ISD::FDIV: 3119 case ISD::FREM: 3120 if (getTarget().Options.UnsafeFPMath) 3121 return N2; 3122 break; 3123 case ISD::MUL: 3124 case ISD::AND: 3125 case ISD::SRL: 3126 case ISD::SHL: 3127 if (!VT.isVector()) 3128 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3129 // For vectors, we can't easily build an all zero vector, just return 3130 // the LHS. 3131 return N1; 3132 case ISD::OR: 3133 if (!VT.isVector()) 3134 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3135 // For vectors, we can't easily build an all one vector, just return 3136 // the LHS. 3137 return N1; 3138 case ISD::SRA: 3139 return N1; 3140 } 3141 } 3142 3143 // Memoize this node if possible. 3144 SDNode *N; 3145 SDVTList VTs = getVTList(VT); 3146 if (VT != MVT::Glue) { 3147 SDValue Ops[] = { N1, N2 }; 3148 FoldingSetNodeID ID; 3149 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3150 void *IP = 0; 3151 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3152 return SDValue(E, 0); 3153 3154 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3155 CSEMap.InsertNode(N, IP); 3156 } else { 3157 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3158 } 3159 3160 AllNodes.push_back(N); 3161#ifndef NDEBUG 3162 VerifySDNode(N); 3163#endif 3164 return SDValue(N, 0); 3165} 3166 3167SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3168 SDValue N1, SDValue N2, SDValue N3) { 3169 // Perform various simplifications. 3170 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3171 switch (Opcode) { 3172 case ISD::CONCAT_VECTORS: 3173 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3174 // one big BUILD_VECTOR. 3175 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3176 N2.getOpcode() == ISD::BUILD_VECTOR && 3177 N3.getOpcode() == ISD::BUILD_VECTOR) { 3178 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3179 N1.getNode()->op_end()); 3180 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3181 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3182 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3183 } 3184 break; 3185 case ISD::SETCC: { 3186 // Use FoldSetCC to simplify SETCC's. 3187 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3188 if (Simp.getNode()) return Simp; 3189 break; 3190 } 3191 case ISD::SELECT: 3192 if (N1C) { 3193 if (N1C->getZExtValue()) 3194 return N2; // select true, X, Y -> X 3195 return N3; // select false, X, Y -> Y 3196 } 3197 3198 if (N2 == N3) return N2; // select C, X, X -> X 3199 break; 3200 case ISD::VECTOR_SHUFFLE: 3201 llvm_unreachable("should use getVectorShuffle constructor!"); 3202 case ISD::INSERT_SUBVECTOR: { 3203 SDValue Index = N3; 3204 if (VT.isSimple() && N1.getValueType().isSimple() 3205 && N2.getValueType().isSimple()) { 3206 assert(VT.isVector() && N1.getValueType().isVector() && 3207 N2.getValueType().isVector() && 3208 "Insert subvector VTs must be a vectors"); 3209 assert(VT == N1.getValueType() && 3210 "Dest and insert subvector source types must match!"); 3211 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3212 "Insert subvector must be from smaller vector to larger vector!"); 3213 if (isa<ConstantSDNode>(Index.getNode())) { 3214 assert((N2.getValueType().getVectorNumElements() + 3215 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3216 <= VT.getVectorNumElements()) 3217 && "Insert subvector overflow!"); 3218 } 3219 3220 // Trivial insertion. 3221 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3222 return N2; 3223 } 3224 break; 3225 } 3226 case ISD::BITCAST: 3227 // Fold bit_convert nodes from a type to themselves. 3228 if (N1.getValueType() == VT) 3229 return N1; 3230 break; 3231 } 3232 3233 // Memoize node if it doesn't produce a flag. 3234 SDNode *N; 3235 SDVTList VTs = getVTList(VT); 3236 if (VT != MVT::Glue) { 3237 SDValue Ops[] = { N1, N2, N3 }; 3238 FoldingSetNodeID ID; 3239 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3240 void *IP = 0; 3241 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3242 return SDValue(E, 0); 3243 3244 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3245 CSEMap.InsertNode(N, IP); 3246 } else { 3247 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3248 } 3249 3250 AllNodes.push_back(N); 3251#ifndef NDEBUG 3252 VerifySDNode(N); 3253#endif 3254 return SDValue(N, 0); 3255} 3256 3257SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3258 SDValue N1, SDValue N2, SDValue N3, 3259 SDValue N4) { 3260 SDValue Ops[] = { N1, N2, N3, N4 }; 3261 return getNode(Opcode, DL, VT, Ops, 4); 3262} 3263 3264SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3265 SDValue N1, SDValue N2, SDValue N3, 3266 SDValue N4, SDValue N5) { 3267 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3268 return getNode(Opcode, DL, VT, Ops, 5); 3269} 3270 3271/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3272/// the incoming stack arguments to be loaded from the stack. 3273SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3274 SmallVector<SDValue, 8> ArgChains; 3275 3276 // Include the original chain at the beginning of the list. When this is 3277 // used by target LowerCall hooks, this helps legalize find the 3278 // CALLSEQ_BEGIN node. 3279 ArgChains.push_back(Chain); 3280 3281 // Add a chain value for each stack argument. 3282 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3283 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3284 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3285 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3286 if (FI->getIndex() < 0) 3287 ArgChains.push_back(SDValue(L, 1)); 3288 3289 // Build a tokenfactor for all the chains. 3290 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3291 &ArgChains[0], ArgChains.size()); 3292} 3293 3294/// SplatByte - Distribute ByteVal over NumBits bits. 3295static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3296 APInt Val = APInt(NumBits, ByteVal); 3297 unsigned Shift = 8; 3298 for (unsigned i = NumBits; i > 8; i >>= 1) { 3299 Val = (Val << Shift) | Val; 3300 Shift <<= 1; 3301 } 3302 return Val; 3303} 3304 3305/// getMemsetValue - Vectorized representation of the memset value 3306/// operand. 3307static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3308 DebugLoc dl) { 3309 assert(Value.getOpcode() != ISD::UNDEF); 3310 3311 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3312 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3313 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3314 if (VT.isInteger()) 3315 return DAG.getConstant(Val, VT); 3316 return DAG.getConstantFP(APFloat(Val), VT); 3317 } 3318 3319 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3320 if (NumBits > 8) { 3321 // Use a multiplication with 0x010101... to extend the input to the 3322 // required length. 3323 APInt Magic = SplatByte(NumBits, 0x01); 3324 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3325 } 3326 3327 return Value; 3328} 3329 3330/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3331/// used when a memcpy is turned into a memset when the source is a constant 3332/// string ptr. 3333static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3334 const TargetLowering &TLI, StringRef Str) { 3335 // Handle vector with all elements zero. 3336 if (Str.empty()) { 3337 if (VT.isInteger()) 3338 return DAG.getConstant(0, VT); 3339 else if (VT == MVT::f32 || VT == MVT::f64) 3340 return DAG.getConstantFP(0.0, VT); 3341 else if (VT.isVector()) { 3342 unsigned NumElts = VT.getVectorNumElements(); 3343 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3344 return DAG.getNode(ISD::BITCAST, dl, VT, 3345 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3346 EltVT, NumElts))); 3347 } else 3348 llvm_unreachable("Expected type!"); 3349 } 3350 3351 assert(!VT.isVector() && "Can't handle vector type here!"); 3352 unsigned NumVTBytes = VT.getSizeInBits() / 8; 3353 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3354 3355 uint64_t Val = 0; 3356 if (TLI.isLittleEndian()) { 3357 for (unsigned i = 0; i != NumBytes; ++i) 3358 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3359 } else { 3360 for (unsigned i = 0; i != NumBytes; ++i) 3361 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3362 } 3363 3364 return DAG.getConstant(Val, VT); 3365} 3366 3367/// getMemBasePlusOffset - Returns base and offset node for the 3368/// 3369static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3370 SelectionDAG &DAG) { 3371 EVT VT = Base.getValueType(); 3372 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3373 VT, Base, DAG.getConstant(Offset, VT)); 3374} 3375 3376/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3377/// 3378static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3379 unsigned SrcDelta = 0; 3380 GlobalAddressSDNode *G = NULL; 3381 if (Src.getOpcode() == ISD::GlobalAddress) 3382 G = cast<GlobalAddressSDNode>(Src); 3383 else if (Src.getOpcode() == ISD::ADD && 3384 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3385 Src.getOperand(1).getOpcode() == ISD::Constant) { 3386 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3387 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3388 } 3389 if (!G) 3390 return false; 3391 3392 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3393} 3394 3395/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3396/// to replace the memset / memcpy. Return true if the number of memory ops 3397/// is below the threshold. It returns the types of the sequence of 3398/// memory ops to perform memset / memcpy by reference. 3399static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3400 unsigned Limit, uint64_t Size, 3401 unsigned DstAlign, unsigned SrcAlign, 3402 bool IsZeroVal, 3403 bool MemcpyStrSrc, 3404 SelectionDAG &DAG, 3405 const TargetLowering &TLI) { 3406 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3407 "Expecting memcpy / memset source to meet alignment requirement!"); 3408 // If 'SrcAlign' is zero, that means the memory operation does not need to 3409 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3410 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3411 // is the specified alignment of the memory operation. If it is zero, that 3412 // means it's possible to change the alignment of the destination. 3413 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3414 // not need to be loaded. 3415 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3416 IsZeroVal, MemcpyStrSrc, 3417 DAG.getMachineFunction()); 3418 3419 if (VT == MVT::Other) { 3420 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3421 TLI.allowsUnalignedMemoryAccesses(VT)) { 3422 VT = TLI.getPointerTy(); 3423 } else { 3424 switch (DstAlign & 7) { 3425 case 0: VT = MVT::i64; break; 3426 case 4: VT = MVT::i32; break; 3427 case 2: VT = MVT::i16; break; 3428 default: VT = MVT::i8; break; 3429 } 3430 } 3431 3432 MVT LVT = MVT::i64; 3433 while (!TLI.isTypeLegal(LVT)) 3434 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3435 assert(LVT.isInteger()); 3436 3437 if (VT.bitsGT(LVT)) 3438 VT = LVT; 3439 } 3440 3441 unsigned NumMemOps = 0; 3442 while (Size != 0) { 3443 unsigned VTSize = VT.getSizeInBits() / 8; 3444 while (VTSize > Size) { 3445 // For now, only use non-vector load / store's for the left-over pieces. 3446 if (VT.isVector() || VT.isFloatingPoint()) { 3447 VT = MVT::i64; 3448 while (!TLI.isTypeLegal(VT)) 3449 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3450 VTSize = VT.getSizeInBits() / 8; 3451 } else { 3452 // This can result in a type that is not legal on the target, e.g. 3453 // 1 or 2 bytes on PPC. 3454 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3455 VTSize >>= 1; 3456 } 3457 } 3458 3459 if (++NumMemOps > Limit) 3460 return false; 3461 MemOps.push_back(VT); 3462 Size -= VTSize; 3463 } 3464 3465 return true; 3466} 3467 3468static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3469 SDValue Chain, SDValue Dst, 3470 SDValue Src, uint64_t Size, 3471 unsigned Align, bool isVol, 3472 bool AlwaysInline, 3473 MachinePointerInfo DstPtrInfo, 3474 MachinePointerInfo SrcPtrInfo) { 3475 // Turn a memcpy of undef to nop. 3476 if (Src.getOpcode() == ISD::UNDEF) 3477 return Chain; 3478 3479 // Expand memcpy to a series of load and store ops if the size operand falls 3480 // below a certain threshold. 3481 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3482 // rather than maybe a humongous number of loads and stores. 3483 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3484 std::vector<EVT> MemOps; 3485 bool DstAlignCanChange = false; 3486 MachineFunction &MF = DAG.getMachineFunction(); 3487 MachineFrameInfo *MFI = MF.getFrameInfo(); 3488 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3489 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3490 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3491 DstAlignCanChange = true; 3492 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3493 if (Align > SrcAlign) 3494 SrcAlign = Align; 3495 StringRef Str; 3496 bool CopyFromStr = isMemSrcFromString(Src, Str); 3497 bool isZeroStr = CopyFromStr && Str.empty(); 3498 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3499 3500 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3501 (DstAlignCanChange ? 0 : Align), 3502 (isZeroStr ? 0 : SrcAlign), 3503 true, CopyFromStr, DAG, TLI)) 3504 return SDValue(); 3505 3506 if (DstAlignCanChange) { 3507 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3508 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3509 if (NewAlign > Align) { 3510 // Give the stack frame object a larger alignment if needed. 3511 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3512 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3513 Align = NewAlign; 3514 } 3515 } 3516 3517 SmallVector<SDValue, 8> OutChains; 3518 unsigned NumMemOps = MemOps.size(); 3519 uint64_t SrcOff = 0, DstOff = 0; 3520 for (unsigned i = 0; i != NumMemOps; ++i) { 3521 EVT VT = MemOps[i]; 3522 unsigned VTSize = VT.getSizeInBits() / 8; 3523 SDValue Value, Store; 3524 3525 if (CopyFromStr && 3526 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3527 // It's unlikely a store of a vector immediate can be done in a single 3528 // instruction. It would require a load from a constantpool first. 3529 // We only handle zero vectors here. 3530 // FIXME: Handle other cases where store of vector immediate is done in 3531 // a single instruction. 3532 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3533 Store = DAG.getStore(Chain, dl, Value, 3534 getMemBasePlusOffset(Dst, DstOff, DAG), 3535 DstPtrInfo.getWithOffset(DstOff), isVol, 3536 false, Align); 3537 } else { 3538 // The type might not be legal for the target. This should only happen 3539 // if the type is smaller than a legal type, as on PPC, so the right 3540 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3541 // to Load/Store if NVT==VT. 3542 // FIXME does the case above also need this? 3543 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3544 assert(NVT.bitsGE(VT)); 3545 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3546 getMemBasePlusOffset(Src, SrcOff, DAG), 3547 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3548 MinAlign(SrcAlign, SrcOff)); 3549 Store = DAG.getTruncStore(Chain, dl, Value, 3550 getMemBasePlusOffset(Dst, DstOff, DAG), 3551 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3552 false, Align); 3553 } 3554 OutChains.push_back(Store); 3555 SrcOff += VTSize; 3556 DstOff += VTSize; 3557 } 3558 3559 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3560 &OutChains[0], OutChains.size()); 3561} 3562 3563static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3564 SDValue Chain, SDValue Dst, 3565 SDValue Src, uint64_t Size, 3566 unsigned Align, bool isVol, 3567 bool AlwaysInline, 3568 MachinePointerInfo DstPtrInfo, 3569 MachinePointerInfo SrcPtrInfo) { 3570 // Turn a memmove of undef to nop. 3571 if (Src.getOpcode() == ISD::UNDEF) 3572 return Chain; 3573 3574 // Expand memmove to a series of load and store ops if the size operand falls 3575 // below a certain threshold. 3576 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3577 std::vector<EVT> MemOps; 3578 bool DstAlignCanChange = false; 3579 MachineFunction &MF = DAG.getMachineFunction(); 3580 MachineFrameInfo *MFI = MF.getFrameInfo(); 3581 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3582 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3583 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3584 DstAlignCanChange = true; 3585 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3586 if (Align > SrcAlign) 3587 SrcAlign = Align; 3588 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3589 3590 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3591 (DstAlignCanChange ? 0 : Align), 3592 SrcAlign, true, false, DAG, TLI)) 3593 return SDValue(); 3594 3595 if (DstAlignCanChange) { 3596 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3597 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3598 if (NewAlign > Align) { 3599 // Give the stack frame object a larger alignment if needed. 3600 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3601 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3602 Align = NewAlign; 3603 } 3604 } 3605 3606 uint64_t SrcOff = 0, DstOff = 0; 3607 SmallVector<SDValue, 8> LoadValues; 3608 SmallVector<SDValue, 8> LoadChains; 3609 SmallVector<SDValue, 8> OutChains; 3610 unsigned NumMemOps = MemOps.size(); 3611 for (unsigned i = 0; i < NumMemOps; i++) { 3612 EVT VT = MemOps[i]; 3613 unsigned VTSize = VT.getSizeInBits() / 8; 3614 SDValue Value, Store; 3615 3616 Value = DAG.getLoad(VT, dl, Chain, 3617 getMemBasePlusOffset(Src, SrcOff, DAG), 3618 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3619 false, false, SrcAlign); 3620 LoadValues.push_back(Value); 3621 LoadChains.push_back(Value.getValue(1)); 3622 SrcOff += VTSize; 3623 } 3624 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3625 &LoadChains[0], LoadChains.size()); 3626 OutChains.clear(); 3627 for (unsigned i = 0; i < NumMemOps; i++) { 3628 EVT VT = MemOps[i]; 3629 unsigned VTSize = VT.getSizeInBits() / 8; 3630 SDValue Value, Store; 3631 3632 Store = DAG.getStore(Chain, dl, LoadValues[i], 3633 getMemBasePlusOffset(Dst, DstOff, DAG), 3634 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3635 OutChains.push_back(Store); 3636 DstOff += VTSize; 3637 } 3638 3639 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3640 &OutChains[0], OutChains.size()); 3641} 3642 3643static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3644 SDValue Chain, SDValue Dst, 3645 SDValue Src, uint64_t Size, 3646 unsigned Align, bool isVol, 3647 MachinePointerInfo DstPtrInfo) { 3648 // Turn a memset of undef to nop. 3649 if (Src.getOpcode() == ISD::UNDEF) 3650 return Chain; 3651 3652 // Expand memset to a series of load/store ops if the size operand 3653 // falls below a certain threshold. 3654 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3655 std::vector<EVT> MemOps; 3656 bool DstAlignCanChange = false; 3657 MachineFunction &MF = DAG.getMachineFunction(); 3658 MachineFrameInfo *MFI = MF.getFrameInfo(); 3659 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3660 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3661 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3662 DstAlignCanChange = true; 3663 bool IsZeroVal = 3664 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3665 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3666 Size, (DstAlignCanChange ? 0 : Align), 0, 3667 IsZeroVal, false, DAG, TLI)) 3668 return SDValue(); 3669 3670 if (DstAlignCanChange) { 3671 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3672 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3673 if (NewAlign > Align) { 3674 // Give the stack frame object a larger alignment if needed. 3675 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3676 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3677 Align = NewAlign; 3678 } 3679 } 3680 3681 SmallVector<SDValue, 8> OutChains; 3682 uint64_t DstOff = 0; 3683 unsigned NumMemOps = MemOps.size(); 3684 3685 // Find the largest store and generate the bit pattern for it. 3686 EVT LargestVT = MemOps[0]; 3687 for (unsigned i = 1; i < NumMemOps; i++) 3688 if (MemOps[i].bitsGT(LargestVT)) 3689 LargestVT = MemOps[i]; 3690 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3691 3692 for (unsigned i = 0; i < NumMemOps; i++) { 3693 EVT VT = MemOps[i]; 3694 3695 // If this store is smaller than the largest store see whether we can get 3696 // the smaller value for free with a truncate. 3697 SDValue Value = MemSetValue; 3698 if (VT.bitsLT(LargestVT)) { 3699 if (!LargestVT.isVector() && !VT.isVector() && 3700 TLI.isTruncateFree(LargestVT, VT)) 3701 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3702 else 3703 Value = getMemsetValue(Src, VT, DAG, dl); 3704 } 3705 assert(Value.getValueType() == VT && "Value with wrong type."); 3706 SDValue Store = DAG.getStore(Chain, dl, Value, 3707 getMemBasePlusOffset(Dst, DstOff, DAG), 3708 DstPtrInfo.getWithOffset(DstOff), 3709 isVol, false, Align); 3710 OutChains.push_back(Store); 3711 DstOff += VT.getSizeInBits() / 8; 3712 } 3713 3714 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3715 &OutChains[0], OutChains.size()); 3716} 3717 3718SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3719 SDValue Src, SDValue Size, 3720 unsigned Align, bool isVol, bool AlwaysInline, 3721 MachinePointerInfo DstPtrInfo, 3722 MachinePointerInfo SrcPtrInfo) { 3723 3724 // Check to see if we should lower the memcpy to loads and stores first. 3725 // For cases within the target-specified limits, this is the best choice. 3726 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3727 if (ConstantSize) { 3728 // Memcpy with size zero? Just return the original chain. 3729 if (ConstantSize->isNullValue()) 3730 return Chain; 3731 3732 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3733 ConstantSize->getZExtValue(),Align, 3734 isVol, false, DstPtrInfo, SrcPtrInfo); 3735 if (Result.getNode()) 3736 return Result; 3737 } 3738 3739 // Then check to see if we should lower the memcpy with target-specific 3740 // code. If the target chooses to do this, this is the next best. 3741 SDValue Result = 3742 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3743 isVol, AlwaysInline, 3744 DstPtrInfo, SrcPtrInfo); 3745 if (Result.getNode()) 3746 return Result; 3747 3748 // If we really need inline code and the target declined to provide it, 3749 // use a (potentially long) sequence of loads and stores. 3750 if (AlwaysInline) { 3751 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3752 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3753 ConstantSize->getZExtValue(), Align, isVol, 3754 true, DstPtrInfo, SrcPtrInfo); 3755 } 3756 3757 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3758 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3759 // respect volatile, so they may do things like read or write memory 3760 // beyond the given memory regions. But fixing this isn't easy, and most 3761 // people don't care. 3762 3763 // Emit a library call. 3764 TargetLowering::ArgListTy Args; 3765 TargetLowering::ArgListEntry Entry; 3766 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3767 Entry.Node = Dst; Args.push_back(Entry); 3768 Entry.Node = Src; Args.push_back(Entry); 3769 Entry.Node = Size; Args.push_back(Entry); 3770 // FIXME: pass in DebugLoc 3771 TargetLowering:: 3772 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3773 false, false, false, false, 0, 3774 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3775 /*isTailCall=*/false, 3776 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3777 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3778 TLI.getPointerTy()), 3779 Args, *this, dl); 3780 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3781 3782 return CallResult.second; 3783} 3784 3785SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3786 SDValue Src, SDValue Size, 3787 unsigned Align, bool isVol, 3788 MachinePointerInfo DstPtrInfo, 3789 MachinePointerInfo SrcPtrInfo) { 3790 3791 // Check to see if we should lower the memmove to loads and stores first. 3792 // For cases within the target-specified limits, this is the best choice. 3793 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3794 if (ConstantSize) { 3795 // Memmove with size zero? Just return the original chain. 3796 if (ConstantSize->isNullValue()) 3797 return Chain; 3798 3799 SDValue Result = 3800 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3801 ConstantSize->getZExtValue(), Align, isVol, 3802 false, DstPtrInfo, SrcPtrInfo); 3803 if (Result.getNode()) 3804 return Result; 3805 } 3806 3807 // Then check to see if we should lower the memmove with target-specific 3808 // code. If the target chooses to do this, this is the next best. 3809 SDValue Result = 3810 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3811 DstPtrInfo, SrcPtrInfo); 3812 if (Result.getNode()) 3813 return Result; 3814 3815 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3816 // not be safe. See memcpy above for more details. 3817 3818 // Emit a library call. 3819 TargetLowering::ArgListTy Args; 3820 TargetLowering::ArgListEntry Entry; 3821 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3822 Entry.Node = Dst; Args.push_back(Entry); 3823 Entry.Node = Src; Args.push_back(Entry); 3824 Entry.Node = Size; Args.push_back(Entry); 3825 // FIXME: pass in DebugLoc 3826 TargetLowering:: 3827 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3828 false, false, false, false, 0, 3829 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 3830 /*isTailCall=*/false, 3831 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3832 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3833 TLI.getPointerTy()), 3834 Args, *this, dl); 3835 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3836 3837 return CallResult.second; 3838} 3839 3840SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3841 SDValue Src, SDValue Size, 3842 unsigned Align, bool isVol, 3843 MachinePointerInfo DstPtrInfo) { 3844 3845 // Check to see if we should lower the memset to stores first. 3846 // For cases within the target-specified limits, this is the best choice. 3847 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3848 if (ConstantSize) { 3849 // Memset with size zero? Just return the original chain. 3850 if (ConstantSize->isNullValue()) 3851 return Chain; 3852 3853 SDValue Result = 3854 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3855 Align, isVol, DstPtrInfo); 3856 3857 if (Result.getNode()) 3858 return Result; 3859 } 3860 3861 // Then check to see if we should lower the memset with target-specific 3862 // code. If the target chooses to do this, this is the next best. 3863 SDValue Result = 3864 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3865 DstPtrInfo); 3866 if (Result.getNode()) 3867 return Result; 3868 3869 // Emit a library call. 3870 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3871 TargetLowering::ArgListTy Args; 3872 TargetLowering::ArgListEntry Entry; 3873 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3874 Args.push_back(Entry); 3875 // Extend or truncate the argument to be an i32 value for the call. 3876 if (Src.getValueType().bitsGT(MVT::i32)) 3877 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3878 else 3879 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3880 Entry.Node = Src; 3881 Entry.Ty = Type::getInt32Ty(*getContext()); 3882 Entry.isSExt = true; 3883 Args.push_back(Entry); 3884 Entry.Node = Size; 3885 Entry.Ty = IntPtrTy; 3886 Entry.isSExt = false; 3887 Args.push_back(Entry); 3888 // FIXME: pass in DebugLoc 3889 TargetLowering:: 3890 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3891 false, false, false, false, 0, 3892 TLI.getLibcallCallingConv(RTLIB::MEMSET), 3893 /*isTailCall=*/false, 3894 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 3895 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3896 TLI.getPointerTy()), 3897 Args, *this, dl); 3898 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3899 3900 return CallResult.second; 3901} 3902 3903SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3904 SDValue Chain, SDValue Ptr, SDValue Cmp, 3905 SDValue Swp, MachinePointerInfo PtrInfo, 3906 unsigned Alignment, 3907 AtomicOrdering Ordering, 3908 SynchronizationScope SynchScope) { 3909 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3910 Alignment = getEVTAlignment(MemVT); 3911 3912 MachineFunction &MF = getMachineFunction(); 3913 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3914 3915 // For now, atomics are considered to be volatile always. 3916 // FIXME: Volatile isn't really correct; we should keep track of atomic 3917 // orderings in the memoperand. 3918 Flags |= MachineMemOperand::MOVolatile; 3919 3920 MachineMemOperand *MMO = 3921 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3922 3923 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3924 Ordering, SynchScope); 3925} 3926 3927SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3928 SDValue Chain, 3929 SDValue Ptr, SDValue Cmp, 3930 SDValue Swp, MachineMemOperand *MMO, 3931 AtomicOrdering Ordering, 3932 SynchronizationScope SynchScope) { 3933 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3934 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3935 3936 EVT VT = Cmp.getValueType(); 3937 3938 SDVTList VTs = getVTList(VT, MVT::Other); 3939 FoldingSetNodeID ID; 3940 ID.AddInteger(MemVT.getRawBits()); 3941 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3942 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3943 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 3944 void* IP = 0; 3945 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3946 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3947 return SDValue(E, 0); 3948 } 3949 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3950 Ptr, Cmp, Swp, MMO, Ordering, 3951 SynchScope); 3952 CSEMap.InsertNode(N, IP); 3953 AllNodes.push_back(N); 3954 return SDValue(N, 0); 3955} 3956 3957SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3958 SDValue Chain, 3959 SDValue Ptr, SDValue Val, 3960 const Value* PtrVal, 3961 unsigned Alignment, 3962 AtomicOrdering Ordering, 3963 SynchronizationScope SynchScope) { 3964 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3965 Alignment = getEVTAlignment(MemVT); 3966 3967 MachineFunction &MF = getMachineFunction(); 3968 // A monotonic store does not load; a release store "loads" in the sense 3969 // that other stores cannot be sunk past it. 3970 // (An atomicrmw obviously both loads and stores.) 3971 unsigned Flags = MachineMemOperand::MOStore; 3972 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic) 3973 Flags |= MachineMemOperand::MOLoad; 3974 3975 // For now, atomics are considered to be volatile always. 3976 // FIXME: Volatile isn't really correct; we should keep track of atomic 3977 // orderings in the memoperand. 3978 Flags |= MachineMemOperand::MOVolatile; 3979 3980 MachineMemOperand *MMO = 3981 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3982 MemVT.getStoreSize(), Alignment); 3983 3984 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 3985 Ordering, SynchScope); 3986} 3987 3988SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3989 SDValue Chain, 3990 SDValue Ptr, SDValue Val, 3991 MachineMemOperand *MMO, 3992 AtomicOrdering Ordering, 3993 SynchronizationScope SynchScope) { 3994 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3995 Opcode == ISD::ATOMIC_LOAD_SUB || 3996 Opcode == ISD::ATOMIC_LOAD_AND || 3997 Opcode == ISD::ATOMIC_LOAD_OR || 3998 Opcode == ISD::ATOMIC_LOAD_XOR || 3999 Opcode == ISD::ATOMIC_LOAD_NAND || 4000 Opcode == ISD::ATOMIC_LOAD_MIN || 4001 Opcode == ISD::ATOMIC_LOAD_MAX || 4002 Opcode == ISD::ATOMIC_LOAD_UMIN || 4003 Opcode == ISD::ATOMIC_LOAD_UMAX || 4004 Opcode == ISD::ATOMIC_SWAP || 4005 Opcode == ISD::ATOMIC_STORE) && 4006 "Invalid Atomic Op"); 4007 4008 EVT VT = Val.getValueType(); 4009 4010 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4011 getVTList(VT, MVT::Other); 4012 FoldingSetNodeID ID; 4013 ID.AddInteger(MemVT.getRawBits()); 4014 SDValue Ops[] = {Chain, Ptr, Val}; 4015 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 4016 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4017 void* IP = 0; 4018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4019 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4020 return SDValue(E, 0); 4021 } 4022 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4023 Ptr, Val, MMO, 4024 Ordering, SynchScope); 4025 CSEMap.InsertNode(N, IP); 4026 AllNodes.push_back(N); 4027 return SDValue(N, 0); 4028} 4029 4030SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4031 EVT VT, SDValue Chain, 4032 SDValue Ptr, 4033 const Value* PtrVal, 4034 unsigned Alignment, 4035 AtomicOrdering Ordering, 4036 SynchronizationScope SynchScope) { 4037 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4038 Alignment = getEVTAlignment(MemVT); 4039 4040 MachineFunction &MF = getMachineFunction(); 4041 // A monotonic load does not store; an acquire load "stores" in the sense 4042 // that other loads cannot be hoisted past it. 4043 unsigned Flags = MachineMemOperand::MOLoad; 4044 if (Ordering > Monotonic) 4045 Flags |= MachineMemOperand::MOStore; 4046 4047 // For now, atomics are considered to be volatile always. 4048 // FIXME: Volatile isn't really correct; we should keep track of atomic 4049 // orderings in the memoperand. 4050 Flags |= MachineMemOperand::MOVolatile; 4051 4052 MachineMemOperand *MMO = 4053 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4054 MemVT.getStoreSize(), Alignment); 4055 4056 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4057 Ordering, SynchScope); 4058} 4059 4060SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4061 EVT VT, SDValue Chain, 4062 SDValue Ptr, 4063 MachineMemOperand *MMO, 4064 AtomicOrdering Ordering, 4065 SynchronizationScope SynchScope) { 4066 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4067 4068 SDVTList VTs = getVTList(VT, MVT::Other); 4069 FoldingSetNodeID ID; 4070 ID.AddInteger(MemVT.getRawBits()); 4071 SDValue Ops[] = {Chain, Ptr}; 4072 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4073 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4074 void* IP = 0; 4075 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4076 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4077 return SDValue(E, 0); 4078 } 4079 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4080 Ptr, MMO, Ordering, SynchScope); 4081 CSEMap.InsertNode(N, IP); 4082 AllNodes.push_back(N); 4083 return SDValue(N, 0); 4084} 4085 4086/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4087SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4088 DebugLoc dl) { 4089 if (NumOps == 1) 4090 return Ops[0]; 4091 4092 SmallVector<EVT, 4> VTs; 4093 VTs.reserve(NumOps); 4094 for (unsigned i = 0; i < NumOps; ++i) 4095 VTs.push_back(Ops[i].getValueType()); 4096 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4097 Ops, NumOps); 4098} 4099 4100SDValue 4101SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4102 const EVT *VTs, unsigned NumVTs, 4103 const SDValue *Ops, unsigned NumOps, 4104 EVT MemVT, MachinePointerInfo PtrInfo, 4105 unsigned Align, bool Vol, 4106 bool ReadMem, bool WriteMem) { 4107 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4108 MemVT, PtrInfo, Align, Vol, 4109 ReadMem, WriteMem); 4110} 4111 4112SDValue 4113SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4114 const SDValue *Ops, unsigned NumOps, 4115 EVT MemVT, MachinePointerInfo PtrInfo, 4116 unsigned Align, bool Vol, 4117 bool ReadMem, bool WriteMem) { 4118 if (Align == 0) // Ensure that codegen never sees alignment 0 4119 Align = getEVTAlignment(MemVT); 4120 4121 MachineFunction &MF = getMachineFunction(); 4122 unsigned Flags = 0; 4123 if (WriteMem) 4124 Flags |= MachineMemOperand::MOStore; 4125 if (ReadMem) 4126 Flags |= MachineMemOperand::MOLoad; 4127 if (Vol) 4128 Flags |= MachineMemOperand::MOVolatile; 4129 MachineMemOperand *MMO = 4130 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4131 4132 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4133} 4134 4135SDValue 4136SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4137 const SDValue *Ops, unsigned NumOps, 4138 EVT MemVT, MachineMemOperand *MMO) { 4139 assert((Opcode == ISD::INTRINSIC_VOID || 4140 Opcode == ISD::INTRINSIC_W_CHAIN || 4141 Opcode == ISD::PREFETCH || 4142 (Opcode <= INT_MAX && 4143 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4144 "Opcode is not a memory-accessing opcode!"); 4145 4146 // Memoize the node unless it returns a flag. 4147 MemIntrinsicSDNode *N; 4148 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4149 FoldingSetNodeID ID; 4150 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4151 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4152 void *IP = 0; 4153 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4154 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4155 return SDValue(E, 0); 4156 } 4157 4158 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4159 MemVT, MMO); 4160 CSEMap.InsertNode(N, IP); 4161 } else { 4162 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4163 MemVT, MMO); 4164 } 4165 AllNodes.push_back(N); 4166 return SDValue(N, 0); 4167} 4168 4169/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4170/// MachinePointerInfo record from it. This is particularly useful because the 4171/// code generator has many cases where it doesn't bother passing in a 4172/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4173static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4174 // If this is FI+Offset, we can model it. 4175 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4176 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4177 4178 // If this is (FI+Offset1)+Offset2, we can model it. 4179 if (Ptr.getOpcode() != ISD::ADD || 4180 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4181 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4182 return MachinePointerInfo(); 4183 4184 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4185 return MachinePointerInfo::getFixedStack(FI, Offset+ 4186 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4187} 4188 4189/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4190/// MachinePointerInfo record from it. This is particularly useful because the 4191/// code generator has many cases where it doesn't bother passing in a 4192/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4193static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4194 // If the 'Offset' value isn't a constant, we can't handle this. 4195 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4196 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4197 if (OffsetOp.getOpcode() == ISD::UNDEF) 4198 return InferPointerInfo(Ptr); 4199 return MachinePointerInfo(); 4200} 4201 4202 4203SDValue 4204SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4205 EVT VT, DebugLoc dl, SDValue Chain, 4206 SDValue Ptr, SDValue Offset, 4207 MachinePointerInfo PtrInfo, EVT MemVT, 4208 bool isVolatile, bool isNonTemporal, bool isInvariant, 4209 unsigned Alignment, const MDNode *TBAAInfo, 4210 const MDNode *Ranges) { 4211 assert(Chain.getValueType() == MVT::Other && 4212 "Invalid chain type"); 4213 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4214 Alignment = getEVTAlignment(VT); 4215 4216 unsigned Flags = MachineMemOperand::MOLoad; 4217 if (isVolatile) 4218 Flags |= MachineMemOperand::MOVolatile; 4219 if (isNonTemporal) 4220 Flags |= MachineMemOperand::MONonTemporal; 4221 if (isInvariant) 4222 Flags |= MachineMemOperand::MOInvariant; 4223 4224 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4225 // clients. 4226 if (PtrInfo.V == 0) 4227 PtrInfo = InferPointerInfo(Ptr, Offset); 4228 4229 MachineFunction &MF = getMachineFunction(); 4230 MachineMemOperand *MMO = 4231 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4232 TBAAInfo, Ranges); 4233 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4234} 4235 4236SDValue 4237SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4238 EVT VT, DebugLoc dl, SDValue Chain, 4239 SDValue Ptr, SDValue Offset, EVT MemVT, 4240 MachineMemOperand *MMO) { 4241 if (VT == MemVT) { 4242 ExtType = ISD::NON_EXTLOAD; 4243 } else if (ExtType == ISD::NON_EXTLOAD) { 4244 assert(VT == MemVT && "Non-extending load from different memory type!"); 4245 } else { 4246 // Extending load. 4247 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4248 "Should only be an extending load, not truncating!"); 4249 assert(VT.isInteger() == MemVT.isInteger() && 4250 "Cannot convert from FP to Int or Int -> FP!"); 4251 assert(VT.isVector() == MemVT.isVector() && 4252 "Cannot use trunc store to convert to or from a vector!"); 4253 assert((!VT.isVector() || 4254 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4255 "Cannot use trunc store to change the number of vector elements!"); 4256 } 4257 4258 bool Indexed = AM != ISD::UNINDEXED; 4259 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4260 "Unindexed load with an offset!"); 4261 4262 SDVTList VTs = Indexed ? 4263 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4264 SDValue Ops[] = { Chain, Ptr, Offset }; 4265 FoldingSetNodeID ID; 4266 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4267 ID.AddInteger(MemVT.getRawBits()); 4268 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4269 MMO->isNonTemporal(), 4270 MMO->isInvariant())); 4271 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4272 void *IP = 0; 4273 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4274 cast<LoadSDNode>(E)->refineAlignment(MMO); 4275 return SDValue(E, 0); 4276 } 4277 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4278 MemVT, MMO); 4279 CSEMap.InsertNode(N, IP); 4280 AllNodes.push_back(N); 4281 return SDValue(N, 0); 4282} 4283 4284SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4285 SDValue Chain, SDValue Ptr, 4286 MachinePointerInfo PtrInfo, 4287 bool isVolatile, bool isNonTemporal, 4288 bool isInvariant, unsigned Alignment, 4289 const MDNode *TBAAInfo, 4290 const MDNode *Ranges) { 4291 SDValue Undef = getUNDEF(Ptr.getValueType()); 4292 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4293 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4294 TBAAInfo, Ranges); 4295} 4296 4297SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4298 SDValue Chain, SDValue Ptr, 4299 MachinePointerInfo PtrInfo, EVT MemVT, 4300 bool isVolatile, bool isNonTemporal, 4301 unsigned Alignment, const MDNode *TBAAInfo) { 4302 SDValue Undef = getUNDEF(Ptr.getValueType()); 4303 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4304 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4305 TBAAInfo); 4306} 4307 4308 4309SDValue 4310SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4311 SDValue Offset, ISD::MemIndexedMode AM) { 4312 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4313 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4314 "Load is already a indexed load!"); 4315 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4316 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4317 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4318 false, LD->getAlignment()); 4319} 4320 4321SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4322 SDValue Ptr, MachinePointerInfo PtrInfo, 4323 bool isVolatile, bool isNonTemporal, 4324 unsigned Alignment, const MDNode *TBAAInfo) { 4325 assert(Chain.getValueType() == MVT::Other && 4326 "Invalid chain type"); 4327 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4328 Alignment = getEVTAlignment(Val.getValueType()); 4329 4330 unsigned Flags = MachineMemOperand::MOStore; 4331 if (isVolatile) 4332 Flags |= MachineMemOperand::MOVolatile; 4333 if (isNonTemporal) 4334 Flags |= MachineMemOperand::MONonTemporal; 4335 4336 if (PtrInfo.V == 0) 4337 PtrInfo = InferPointerInfo(Ptr); 4338 4339 MachineFunction &MF = getMachineFunction(); 4340 MachineMemOperand *MMO = 4341 MF.getMachineMemOperand(PtrInfo, Flags, 4342 Val.getValueType().getStoreSize(), Alignment, 4343 TBAAInfo); 4344 4345 return getStore(Chain, dl, Val, Ptr, MMO); 4346} 4347 4348SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4349 SDValue Ptr, MachineMemOperand *MMO) { 4350 assert(Chain.getValueType() == MVT::Other && 4351 "Invalid chain type"); 4352 EVT VT = Val.getValueType(); 4353 SDVTList VTs = getVTList(MVT::Other); 4354 SDValue Undef = getUNDEF(Ptr.getValueType()); 4355 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4356 FoldingSetNodeID ID; 4357 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4358 ID.AddInteger(VT.getRawBits()); 4359 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4360 MMO->isNonTemporal(), MMO->isInvariant())); 4361 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4362 void *IP = 0; 4363 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4364 cast<StoreSDNode>(E)->refineAlignment(MMO); 4365 return SDValue(E, 0); 4366 } 4367 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4368 false, VT, MMO); 4369 CSEMap.InsertNode(N, IP); 4370 AllNodes.push_back(N); 4371 return SDValue(N, 0); 4372} 4373 4374SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4375 SDValue Ptr, MachinePointerInfo PtrInfo, 4376 EVT SVT,bool isVolatile, bool isNonTemporal, 4377 unsigned Alignment, 4378 const MDNode *TBAAInfo) { 4379 assert(Chain.getValueType() == MVT::Other && 4380 "Invalid chain type"); 4381 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4382 Alignment = getEVTAlignment(SVT); 4383 4384 unsigned Flags = MachineMemOperand::MOStore; 4385 if (isVolatile) 4386 Flags |= MachineMemOperand::MOVolatile; 4387 if (isNonTemporal) 4388 Flags |= MachineMemOperand::MONonTemporal; 4389 4390 if (PtrInfo.V == 0) 4391 PtrInfo = InferPointerInfo(Ptr); 4392 4393 MachineFunction &MF = getMachineFunction(); 4394 MachineMemOperand *MMO = 4395 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4396 TBAAInfo); 4397 4398 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4399} 4400 4401SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4402 SDValue Ptr, EVT SVT, 4403 MachineMemOperand *MMO) { 4404 EVT VT = Val.getValueType(); 4405 4406 assert(Chain.getValueType() == MVT::Other && 4407 "Invalid chain type"); 4408 if (VT == SVT) 4409 return getStore(Chain, dl, Val, Ptr, MMO); 4410 4411 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4412 "Should only be a truncating store, not extending!"); 4413 assert(VT.isInteger() == SVT.isInteger() && 4414 "Can't do FP-INT conversion!"); 4415 assert(VT.isVector() == SVT.isVector() && 4416 "Cannot use trunc store to convert to or from a vector!"); 4417 assert((!VT.isVector() || 4418 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4419 "Cannot use trunc store to change the number of vector elements!"); 4420 4421 SDVTList VTs = getVTList(MVT::Other); 4422 SDValue Undef = getUNDEF(Ptr.getValueType()); 4423 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4424 FoldingSetNodeID ID; 4425 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4426 ID.AddInteger(SVT.getRawBits()); 4427 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4428 MMO->isNonTemporal(), MMO->isInvariant())); 4429 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4430 void *IP = 0; 4431 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4432 cast<StoreSDNode>(E)->refineAlignment(MMO); 4433 return SDValue(E, 0); 4434 } 4435 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4436 true, SVT, MMO); 4437 CSEMap.InsertNode(N, IP); 4438 AllNodes.push_back(N); 4439 return SDValue(N, 0); 4440} 4441 4442SDValue 4443SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4444 SDValue Offset, ISD::MemIndexedMode AM) { 4445 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4446 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4447 "Store is already a indexed store!"); 4448 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4449 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4450 FoldingSetNodeID ID; 4451 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4452 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4453 ID.AddInteger(ST->getRawSubclassData()); 4454 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4455 void *IP = 0; 4456 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4457 return SDValue(E, 0); 4458 4459 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4460 ST->isTruncatingStore(), 4461 ST->getMemoryVT(), 4462 ST->getMemOperand()); 4463 CSEMap.InsertNode(N, IP); 4464 AllNodes.push_back(N); 4465 return SDValue(N, 0); 4466} 4467 4468SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4469 SDValue Chain, SDValue Ptr, 4470 SDValue SV, 4471 unsigned Align) { 4472 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4473 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4474} 4475 4476SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4477 const SDUse *Ops, unsigned NumOps) { 4478 switch (NumOps) { 4479 case 0: return getNode(Opcode, DL, VT); 4480 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4481 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4482 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4483 default: break; 4484 } 4485 4486 // Copy from an SDUse array into an SDValue array for use with 4487 // the regular getNode logic. 4488 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4489 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4490} 4491 4492SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4493 const SDValue *Ops, unsigned NumOps) { 4494 switch (NumOps) { 4495 case 0: return getNode(Opcode, DL, VT); 4496 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4497 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4498 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4499 default: break; 4500 } 4501 4502 switch (Opcode) { 4503 default: break; 4504 case ISD::SELECT_CC: { 4505 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4506 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4507 "LHS and RHS of condition must have same type!"); 4508 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4509 "True and False arms of SelectCC must have same type!"); 4510 assert(Ops[2].getValueType() == VT && 4511 "select_cc node must be of same type as true and false value!"); 4512 break; 4513 } 4514 case ISD::BR_CC: { 4515 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4516 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4517 "LHS/RHS of comparison should match types!"); 4518 break; 4519 } 4520 } 4521 4522 // Memoize nodes. 4523 SDNode *N; 4524 SDVTList VTs = getVTList(VT); 4525 4526 if (VT != MVT::Glue) { 4527 FoldingSetNodeID ID; 4528 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4529 void *IP = 0; 4530 4531 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4532 return SDValue(E, 0); 4533 4534 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4535 CSEMap.InsertNode(N, IP); 4536 } else { 4537 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4538 } 4539 4540 AllNodes.push_back(N); 4541#ifndef NDEBUG 4542 VerifySDNode(N); 4543#endif 4544 return SDValue(N, 0); 4545} 4546 4547SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4548 const std::vector<EVT> &ResultTys, 4549 const SDValue *Ops, unsigned NumOps) { 4550 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4551 Ops, NumOps); 4552} 4553 4554SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4555 const EVT *VTs, unsigned NumVTs, 4556 const SDValue *Ops, unsigned NumOps) { 4557 if (NumVTs == 1) 4558 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4559 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4560} 4561 4562SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4563 const SDValue *Ops, unsigned NumOps) { 4564 if (VTList.NumVTs == 1) 4565 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4566 4567#if 0 4568 switch (Opcode) { 4569 // FIXME: figure out how to safely handle things like 4570 // int foo(int x) { return 1 << (x & 255); } 4571 // int bar() { return foo(256); } 4572 case ISD::SRA_PARTS: 4573 case ISD::SRL_PARTS: 4574 case ISD::SHL_PARTS: 4575 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4576 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4577 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4578 else if (N3.getOpcode() == ISD::AND) 4579 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4580 // If the and is only masking out bits that cannot effect the shift, 4581 // eliminate the and. 4582 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4583 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4584 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4585 } 4586 break; 4587 } 4588#endif 4589 4590 // Memoize the node unless it returns a flag. 4591 SDNode *N; 4592 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4593 FoldingSetNodeID ID; 4594 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4595 void *IP = 0; 4596 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4597 return SDValue(E, 0); 4598 4599 if (NumOps == 1) { 4600 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4601 } else if (NumOps == 2) { 4602 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4603 } else if (NumOps == 3) { 4604 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4605 Ops[2]); 4606 } else { 4607 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4608 } 4609 CSEMap.InsertNode(N, IP); 4610 } else { 4611 if (NumOps == 1) { 4612 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4613 } else if (NumOps == 2) { 4614 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4615 } else if (NumOps == 3) { 4616 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4617 Ops[2]); 4618 } else { 4619 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4620 } 4621 } 4622 AllNodes.push_back(N); 4623#ifndef NDEBUG 4624 VerifySDNode(N); 4625#endif 4626 return SDValue(N, 0); 4627} 4628 4629SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4630 return getNode(Opcode, DL, VTList, 0, 0); 4631} 4632 4633SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4634 SDValue N1) { 4635 SDValue Ops[] = { N1 }; 4636 return getNode(Opcode, DL, VTList, Ops, 1); 4637} 4638 4639SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4640 SDValue N1, SDValue N2) { 4641 SDValue Ops[] = { N1, N2 }; 4642 return getNode(Opcode, DL, VTList, Ops, 2); 4643} 4644 4645SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4646 SDValue N1, SDValue N2, SDValue N3) { 4647 SDValue Ops[] = { N1, N2, N3 }; 4648 return getNode(Opcode, DL, VTList, Ops, 3); 4649} 4650 4651SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4652 SDValue N1, SDValue N2, SDValue N3, 4653 SDValue N4) { 4654 SDValue Ops[] = { N1, N2, N3, N4 }; 4655 return getNode(Opcode, DL, VTList, Ops, 4); 4656} 4657 4658SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4659 SDValue N1, SDValue N2, SDValue N3, 4660 SDValue N4, SDValue N5) { 4661 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4662 return getNode(Opcode, DL, VTList, Ops, 5); 4663} 4664 4665SDVTList SelectionDAG::getVTList(EVT VT) { 4666 return makeVTList(SDNode::getValueTypeList(VT), 1); 4667} 4668 4669SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4670 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4671 E = VTList.rend(); I != E; ++I) 4672 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4673 return *I; 4674 4675 EVT *Array = Allocator.Allocate<EVT>(2); 4676 Array[0] = VT1; 4677 Array[1] = VT2; 4678 SDVTList Result = makeVTList(Array, 2); 4679 VTList.push_back(Result); 4680 return Result; 4681} 4682 4683SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4684 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4685 E = VTList.rend(); I != E; ++I) 4686 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4687 I->VTs[2] == VT3) 4688 return *I; 4689 4690 EVT *Array = Allocator.Allocate<EVT>(3); 4691 Array[0] = VT1; 4692 Array[1] = VT2; 4693 Array[2] = VT3; 4694 SDVTList Result = makeVTList(Array, 3); 4695 VTList.push_back(Result); 4696 return Result; 4697} 4698 4699SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4700 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4701 E = VTList.rend(); I != E; ++I) 4702 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4703 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4704 return *I; 4705 4706 EVT *Array = Allocator.Allocate<EVT>(4); 4707 Array[0] = VT1; 4708 Array[1] = VT2; 4709 Array[2] = VT3; 4710 Array[3] = VT4; 4711 SDVTList Result = makeVTList(Array, 4); 4712 VTList.push_back(Result); 4713 return Result; 4714} 4715 4716SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4717 switch (NumVTs) { 4718 case 0: llvm_unreachable("Cannot have nodes without results!"); 4719 case 1: return getVTList(VTs[0]); 4720 case 2: return getVTList(VTs[0], VTs[1]); 4721 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4722 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4723 default: break; 4724 } 4725 4726 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4727 E = VTList.rend(); I != E; ++I) { 4728 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4729 continue; 4730 4731 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4732 return *I; 4733 } 4734 4735 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4736 std::copy(VTs, VTs+NumVTs, Array); 4737 SDVTList Result = makeVTList(Array, NumVTs); 4738 VTList.push_back(Result); 4739 return Result; 4740} 4741 4742 4743/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4744/// specified operands. If the resultant node already exists in the DAG, 4745/// this does not modify the specified node, instead it returns the node that 4746/// already exists. If the resultant node does not exist in the DAG, the 4747/// input node is returned. As a degenerate case, if you specify the same 4748/// input operands as the node already has, the input node is returned. 4749SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4750 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4751 4752 // Check to see if there is no change. 4753 if (Op == N->getOperand(0)) return N; 4754 4755 // See if the modified node already exists. 4756 void *InsertPos = 0; 4757 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4758 return Existing; 4759 4760 // Nope it doesn't. Remove the node from its current place in the maps. 4761 if (InsertPos) 4762 if (!RemoveNodeFromCSEMaps(N)) 4763 InsertPos = 0; 4764 4765 // Now we update the operands. 4766 N->OperandList[0].set(Op); 4767 4768 // If this gets put into a CSE map, add it. 4769 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4770 return N; 4771} 4772 4773SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4774 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4775 4776 // Check to see if there is no change. 4777 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4778 return N; // No operands changed, just return the input node. 4779 4780 // See if the modified node already exists. 4781 void *InsertPos = 0; 4782 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4783 return Existing; 4784 4785 // Nope it doesn't. Remove the node from its current place in the maps. 4786 if (InsertPos) 4787 if (!RemoveNodeFromCSEMaps(N)) 4788 InsertPos = 0; 4789 4790 // Now we update the operands. 4791 if (N->OperandList[0] != Op1) 4792 N->OperandList[0].set(Op1); 4793 if (N->OperandList[1] != Op2) 4794 N->OperandList[1].set(Op2); 4795 4796 // If this gets put into a CSE map, add it. 4797 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4798 return N; 4799} 4800 4801SDNode *SelectionDAG:: 4802UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4803 SDValue Ops[] = { Op1, Op2, Op3 }; 4804 return UpdateNodeOperands(N, Ops, 3); 4805} 4806 4807SDNode *SelectionDAG:: 4808UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4809 SDValue Op3, SDValue Op4) { 4810 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4811 return UpdateNodeOperands(N, Ops, 4); 4812} 4813 4814SDNode *SelectionDAG:: 4815UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4816 SDValue Op3, SDValue Op4, SDValue Op5) { 4817 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4818 return UpdateNodeOperands(N, Ops, 5); 4819} 4820 4821SDNode *SelectionDAG:: 4822UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4823 assert(N->getNumOperands() == NumOps && 4824 "Update with wrong number of operands"); 4825 4826 // Check to see if there is no change. 4827 bool AnyChange = false; 4828 for (unsigned i = 0; i != NumOps; ++i) { 4829 if (Ops[i] != N->getOperand(i)) { 4830 AnyChange = true; 4831 break; 4832 } 4833 } 4834 4835 // No operands changed, just return the input node. 4836 if (!AnyChange) return N; 4837 4838 // See if the modified node already exists. 4839 void *InsertPos = 0; 4840 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4841 return Existing; 4842 4843 // Nope it doesn't. Remove the node from its current place in the maps. 4844 if (InsertPos) 4845 if (!RemoveNodeFromCSEMaps(N)) 4846 InsertPos = 0; 4847 4848 // Now we update the operands. 4849 for (unsigned i = 0; i != NumOps; ++i) 4850 if (N->OperandList[i] != Ops[i]) 4851 N->OperandList[i].set(Ops[i]); 4852 4853 // If this gets put into a CSE map, add it. 4854 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4855 return N; 4856} 4857 4858/// DropOperands - Release the operands and set this node to have 4859/// zero operands. 4860void SDNode::DropOperands() { 4861 // Unlike the code in MorphNodeTo that does this, we don't need to 4862 // watch for dead nodes here. 4863 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4864 SDUse &Use = *I++; 4865 Use.set(SDValue()); 4866 } 4867} 4868 4869/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4870/// machine opcode. 4871/// 4872SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4873 EVT VT) { 4874 SDVTList VTs = getVTList(VT); 4875 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4876} 4877 4878SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4879 EVT VT, SDValue Op1) { 4880 SDVTList VTs = getVTList(VT); 4881 SDValue Ops[] = { Op1 }; 4882 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4883} 4884 4885SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4886 EVT VT, SDValue Op1, 4887 SDValue Op2) { 4888 SDVTList VTs = getVTList(VT); 4889 SDValue Ops[] = { Op1, Op2 }; 4890 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4891} 4892 4893SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4894 EVT VT, SDValue Op1, 4895 SDValue Op2, SDValue Op3) { 4896 SDVTList VTs = getVTList(VT); 4897 SDValue Ops[] = { Op1, Op2, Op3 }; 4898 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4899} 4900 4901SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4902 EVT VT, const SDValue *Ops, 4903 unsigned NumOps) { 4904 SDVTList VTs = getVTList(VT); 4905 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4906} 4907 4908SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4909 EVT VT1, EVT VT2, const SDValue *Ops, 4910 unsigned NumOps) { 4911 SDVTList VTs = getVTList(VT1, VT2); 4912 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4913} 4914 4915SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4916 EVT VT1, EVT VT2) { 4917 SDVTList VTs = getVTList(VT1, VT2); 4918 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4919} 4920 4921SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4922 EVT VT1, EVT VT2, EVT VT3, 4923 const SDValue *Ops, unsigned NumOps) { 4924 SDVTList VTs = getVTList(VT1, VT2, VT3); 4925 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4926} 4927 4928SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4929 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4930 const SDValue *Ops, unsigned NumOps) { 4931 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4932 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4933} 4934 4935SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4936 EVT VT1, EVT VT2, 4937 SDValue Op1) { 4938 SDVTList VTs = getVTList(VT1, VT2); 4939 SDValue Ops[] = { Op1 }; 4940 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4941} 4942 4943SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4944 EVT VT1, EVT VT2, 4945 SDValue Op1, SDValue Op2) { 4946 SDVTList VTs = getVTList(VT1, VT2); 4947 SDValue Ops[] = { Op1, Op2 }; 4948 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4949} 4950 4951SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4952 EVT VT1, EVT VT2, 4953 SDValue Op1, SDValue Op2, 4954 SDValue Op3) { 4955 SDVTList VTs = getVTList(VT1, VT2); 4956 SDValue Ops[] = { Op1, Op2, Op3 }; 4957 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4958} 4959 4960SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4961 EVT VT1, EVT VT2, EVT VT3, 4962 SDValue Op1, SDValue Op2, 4963 SDValue Op3) { 4964 SDVTList VTs = getVTList(VT1, VT2, VT3); 4965 SDValue Ops[] = { Op1, Op2, Op3 }; 4966 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4967} 4968 4969SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4970 SDVTList VTs, const SDValue *Ops, 4971 unsigned NumOps) { 4972 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4973 // Reset the NodeID to -1. 4974 N->setNodeId(-1); 4975 return N; 4976} 4977 4978/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 4979/// the line number information on the merged node since it is not possible to 4980/// preserve the information that operation is associated with multiple lines. 4981/// This will make the debugger working better at -O0, were there is a higher 4982/// probability having other instructions associated with that line. 4983/// 4984SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 4985 DebugLoc NLoc = N->getDebugLoc(); 4986 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 4987 N->setDebugLoc(DebugLoc()); 4988 } 4989 return N; 4990} 4991 4992/// MorphNodeTo - This *mutates* the specified node to have the specified 4993/// return type, opcode, and operands. 4994/// 4995/// Note that MorphNodeTo returns the resultant node. If there is already a 4996/// node of the specified opcode and operands, it returns that node instead of 4997/// the current one. Note that the DebugLoc need not be the same. 4998/// 4999/// Using MorphNodeTo is faster than creating a new node and swapping it in 5000/// with ReplaceAllUsesWith both because it often avoids allocating a new 5001/// node, and because it doesn't require CSE recalculation for any of 5002/// the node's users. 5003/// 5004SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5005 SDVTList VTs, const SDValue *Ops, 5006 unsigned NumOps) { 5007 // If an identical node already exists, use it. 5008 void *IP = 0; 5009 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5010 FoldingSetNodeID ID; 5011 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5012 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5013 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 5014 } 5015 5016 if (!RemoveNodeFromCSEMaps(N)) 5017 IP = 0; 5018 5019 // Start the morphing. 5020 N->NodeType = Opc; 5021 N->ValueList = VTs.VTs; 5022 N->NumValues = VTs.NumVTs; 5023 5024 // Clear the operands list, updating used nodes to remove this from their 5025 // use list. Keep track of any operands that become dead as a result. 5026 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5027 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5028 SDUse &Use = *I++; 5029 SDNode *Used = Use.getNode(); 5030 Use.set(SDValue()); 5031 if (Used->use_empty()) 5032 DeadNodeSet.insert(Used); 5033 } 5034 5035 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5036 // Initialize the memory references information. 5037 MN->setMemRefs(0, 0); 5038 // If NumOps is larger than the # of operands we can have in a 5039 // MachineSDNode, reallocate the operand list. 5040 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5041 if (MN->OperandsNeedDelete) 5042 delete[] MN->OperandList; 5043 if (NumOps > array_lengthof(MN->LocalOperands)) 5044 // We're creating a final node that will live unmorphed for the 5045 // remainder of the current SelectionDAG iteration, so we can allocate 5046 // the operands directly out of a pool with no recycling metadata. 5047 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5048 Ops, NumOps); 5049 else 5050 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5051 MN->OperandsNeedDelete = false; 5052 } else 5053 MN->InitOperands(MN->OperandList, Ops, NumOps); 5054 } else { 5055 // If NumOps is larger than the # of operands we currently have, reallocate 5056 // the operand list. 5057 if (NumOps > N->NumOperands) { 5058 if (N->OperandsNeedDelete) 5059 delete[] N->OperandList; 5060 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5061 N->OperandsNeedDelete = true; 5062 } else 5063 N->InitOperands(N->OperandList, Ops, NumOps); 5064 } 5065 5066 // Delete any nodes that are still dead after adding the uses for the 5067 // new operands. 5068 if (!DeadNodeSet.empty()) { 5069 SmallVector<SDNode *, 16> DeadNodes; 5070 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5071 E = DeadNodeSet.end(); I != E; ++I) 5072 if ((*I)->use_empty()) 5073 DeadNodes.push_back(*I); 5074 RemoveDeadNodes(DeadNodes); 5075 } 5076 5077 if (IP) 5078 CSEMap.InsertNode(N, IP); // Memoize the new node. 5079 return N; 5080} 5081 5082 5083/// getMachineNode - These are used for target selectors to create a new node 5084/// with specified return type(s), MachineInstr opcode, and operands. 5085/// 5086/// Note that getMachineNode returns the resultant node. If there is already a 5087/// node of the specified opcode and operands, it returns that node instead of 5088/// the current one. 5089MachineSDNode * 5090SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5091 SDVTList VTs = getVTList(VT); 5092 return getMachineNode(Opcode, dl, VTs, 0, 0); 5093} 5094 5095MachineSDNode * 5096SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5097 SDVTList VTs = getVTList(VT); 5098 SDValue Ops[] = { Op1 }; 5099 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5100} 5101 5102MachineSDNode * 5103SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5104 SDValue Op1, SDValue Op2) { 5105 SDVTList VTs = getVTList(VT); 5106 SDValue Ops[] = { Op1, Op2 }; 5107 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5108} 5109 5110MachineSDNode * 5111SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5112 SDValue Op1, SDValue Op2, SDValue Op3) { 5113 SDVTList VTs = getVTList(VT); 5114 SDValue Ops[] = { Op1, Op2, Op3 }; 5115 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5116} 5117 5118MachineSDNode * 5119SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5120 const SDValue *Ops, unsigned NumOps) { 5121 SDVTList VTs = getVTList(VT); 5122 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5123} 5124 5125MachineSDNode * 5126SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5127 SDVTList VTs = getVTList(VT1, VT2); 5128 return getMachineNode(Opcode, dl, VTs, 0, 0); 5129} 5130 5131MachineSDNode * 5132SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5133 EVT VT1, EVT VT2, SDValue Op1) { 5134 SDVTList VTs = getVTList(VT1, VT2); 5135 SDValue Ops[] = { Op1 }; 5136 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5137} 5138 5139MachineSDNode * 5140SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5141 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5142 SDVTList VTs = getVTList(VT1, VT2); 5143 SDValue Ops[] = { Op1, Op2 }; 5144 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5145} 5146 5147MachineSDNode * 5148SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5149 EVT VT1, EVT VT2, SDValue Op1, 5150 SDValue Op2, SDValue Op3) { 5151 SDVTList VTs = getVTList(VT1, VT2); 5152 SDValue Ops[] = { Op1, Op2, Op3 }; 5153 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5154} 5155 5156MachineSDNode * 5157SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5158 EVT VT1, EVT VT2, 5159 const SDValue *Ops, unsigned NumOps) { 5160 SDVTList VTs = getVTList(VT1, VT2); 5161 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5162} 5163 5164MachineSDNode * 5165SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5166 EVT VT1, EVT VT2, EVT VT3, 5167 SDValue Op1, SDValue Op2) { 5168 SDVTList VTs = getVTList(VT1, VT2, VT3); 5169 SDValue Ops[] = { Op1, Op2 }; 5170 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5171} 5172 5173MachineSDNode * 5174SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5175 EVT VT1, EVT VT2, EVT VT3, 5176 SDValue Op1, SDValue Op2, SDValue Op3) { 5177 SDVTList VTs = getVTList(VT1, VT2, VT3); 5178 SDValue Ops[] = { Op1, Op2, Op3 }; 5179 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5180} 5181 5182MachineSDNode * 5183SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5184 EVT VT1, EVT VT2, EVT VT3, 5185 const SDValue *Ops, unsigned NumOps) { 5186 SDVTList VTs = getVTList(VT1, VT2, VT3); 5187 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5188} 5189 5190MachineSDNode * 5191SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5192 EVT VT2, EVT VT3, EVT VT4, 5193 const SDValue *Ops, unsigned NumOps) { 5194 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5195 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5196} 5197 5198MachineSDNode * 5199SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5200 const std::vector<EVT> &ResultTys, 5201 const SDValue *Ops, unsigned NumOps) { 5202 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5203 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5204} 5205 5206MachineSDNode * 5207SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5208 const SDValue *Ops, unsigned NumOps) { 5209 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5210 MachineSDNode *N; 5211 void *IP = 0; 5212 5213 if (DoCSE) { 5214 FoldingSetNodeID ID; 5215 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5216 IP = 0; 5217 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5218 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5219 } 5220 } 5221 5222 // Allocate a new MachineSDNode. 5223 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5224 5225 // Initialize the operands list. 5226 if (NumOps > array_lengthof(N->LocalOperands)) 5227 // We're creating a final node that will live unmorphed for the 5228 // remainder of the current SelectionDAG iteration, so we can allocate 5229 // the operands directly out of a pool with no recycling metadata. 5230 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5231 Ops, NumOps); 5232 else 5233 N->InitOperands(N->LocalOperands, Ops, NumOps); 5234 N->OperandsNeedDelete = false; 5235 5236 if (DoCSE) 5237 CSEMap.InsertNode(N, IP); 5238 5239 AllNodes.push_back(N); 5240#ifndef NDEBUG 5241 VerifyMachineNode(N); 5242#endif 5243 return N; 5244} 5245 5246/// getTargetExtractSubreg - A convenience function for creating 5247/// TargetOpcode::EXTRACT_SUBREG nodes. 5248SDValue 5249SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5250 SDValue Operand) { 5251 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5252 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5253 VT, Operand, SRIdxVal); 5254 return SDValue(Subreg, 0); 5255} 5256 5257/// getTargetInsertSubreg - A convenience function for creating 5258/// TargetOpcode::INSERT_SUBREG nodes. 5259SDValue 5260SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5261 SDValue Operand, SDValue Subreg) { 5262 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5263 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5264 VT, Operand, Subreg, SRIdxVal); 5265 return SDValue(Result, 0); 5266} 5267 5268/// getNodeIfExists - Get the specified node if it's already available, or 5269/// else return NULL. 5270SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5271 const SDValue *Ops, unsigned NumOps) { 5272 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5273 FoldingSetNodeID ID; 5274 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5275 void *IP = 0; 5276 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5277 return E; 5278 } 5279 return NULL; 5280} 5281 5282/// getDbgValue - Creates a SDDbgValue node. 5283/// 5284SDDbgValue * 5285SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5286 DebugLoc DL, unsigned O) { 5287 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5288} 5289 5290SDDbgValue * 5291SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5292 DebugLoc DL, unsigned O) { 5293 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5294} 5295 5296SDDbgValue * 5297SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5298 DebugLoc DL, unsigned O) { 5299 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5300} 5301 5302namespace { 5303 5304/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5305/// pointed to by a use iterator is deleted, increment the use iterator 5306/// so that it doesn't dangle. 5307/// 5308class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5309 SDNode::use_iterator &UI; 5310 SDNode::use_iterator &UE; 5311 5312 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5313 // Increment the iterator as needed. 5314 while (UI != UE && N == *UI) 5315 ++UI; 5316 } 5317 5318public: 5319 RAUWUpdateListener(SelectionDAG &d, 5320 SDNode::use_iterator &ui, 5321 SDNode::use_iterator &ue) 5322 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5323}; 5324 5325} 5326 5327/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5328/// This can cause recursive merging of nodes in the DAG. 5329/// 5330/// This version assumes From has a single result value. 5331/// 5332void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5333 SDNode *From = FromN.getNode(); 5334 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5335 "Cannot replace with this method!"); 5336 assert(From != To.getNode() && "Cannot replace uses of with self"); 5337 5338 // Iterate over all the existing uses of From. New uses will be added 5339 // to the beginning of the use list, which we avoid visiting. 5340 // This specifically avoids visiting uses of From that arise while the 5341 // replacement is happening, because any such uses would be the result 5342 // of CSE: If an existing node looks like From after one of its operands 5343 // is replaced by To, we don't want to replace of all its users with To 5344 // too. See PR3018 for more info. 5345 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5346 RAUWUpdateListener Listener(*this, UI, UE); 5347 while (UI != UE) { 5348 SDNode *User = *UI; 5349 5350 // This node is about to morph, remove its old self from the CSE maps. 5351 RemoveNodeFromCSEMaps(User); 5352 5353 // A user can appear in a use list multiple times, and when this 5354 // happens the uses are usually next to each other in the list. 5355 // To help reduce the number of CSE recomputations, process all 5356 // the uses of this user that we can find this way. 5357 do { 5358 SDUse &Use = UI.getUse(); 5359 ++UI; 5360 Use.set(To); 5361 } while (UI != UE && *UI == User); 5362 5363 // Now that we have modified User, add it back to the CSE maps. If it 5364 // already exists there, recursively merge the results together. 5365 AddModifiedNodeToCSEMaps(User); 5366 } 5367 5368 // If we just RAUW'd the root, take note. 5369 if (FromN == getRoot()) 5370 setRoot(To); 5371} 5372 5373/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5374/// This can cause recursive merging of nodes in the DAG. 5375/// 5376/// This version assumes that for each value of From, there is a 5377/// corresponding value in To in the same position with the same type. 5378/// 5379void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5380#ifndef NDEBUG 5381 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5382 assert((!From->hasAnyUseOfValue(i) || 5383 From->getValueType(i) == To->getValueType(i)) && 5384 "Cannot use this version of ReplaceAllUsesWith!"); 5385#endif 5386 5387 // Handle the trivial case. 5388 if (From == To) 5389 return; 5390 5391 // Iterate over just the existing users of From. See the comments in 5392 // the ReplaceAllUsesWith above. 5393 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5394 RAUWUpdateListener Listener(*this, UI, UE); 5395 while (UI != UE) { 5396 SDNode *User = *UI; 5397 5398 // This node is about to morph, remove its old self from the CSE maps. 5399 RemoveNodeFromCSEMaps(User); 5400 5401 // A user can appear in a use list multiple times, and when this 5402 // happens the uses are usually next to each other in the list. 5403 // To help reduce the number of CSE recomputations, process all 5404 // the uses of this user that we can find this way. 5405 do { 5406 SDUse &Use = UI.getUse(); 5407 ++UI; 5408 Use.setNode(To); 5409 } while (UI != UE && *UI == User); 5410 5411 // Now that we have modified User, add it back to the CSE maps. If it 5412 // already exists there, recursively merge the results together. 5413 AddModifiedNodeToCSEMaps(User); 5414 } 5415 5416 // If we just RAUW'd the root, take note. 5417 if (From == getRoot().getNode()) 5418 setRoot(SDValue(To, getRoot().getResNo())); 5419} 5420 5421/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5422/// This can cause recursive merging of nodes in the DAG. 5423/// 5424/// This version can replace From with any result values. To must match the 5425/// number and types of values returned by From. 5426void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5427 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5428 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5429 5430 // Iterate over just the existing users of From. See the comments in 5431 // the ReplaceAllUsesWith above. 5432 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5433 RAUWUpdateListener Listener(*this, UI, UE); 5434 while (UI != UE) { 5435 SDNode *User = *UI; 5436 5437 // This node is about to morph, remove its old self from the CSE maps. 5438 RemoveNodeFromCSEMaps(User); 5439 5440 // A user can appear in a use list multiple times, and when this 5441 // happens the uses are usually next to each other in the list. 5442 // To help reduce the number of CSE recomputations, process all 5443 // the uses of this user that we can find this way. 5444 do { 5445 SDUse &Use = UI.getUse(); 5446 const SDValue &ToOp = To[Use.getResNo()]; 5447 ++UI; 5448 Use.set(ToOp); 5449 } while (UI != UE && *UI == User); 5450 5451 // Now that we have modified User, add it back to the CSE maps. If it 5452 // already exists there, recursively merge the results together. 5453 AddModifiedNodeToCSEMaps(User); 5454 } 5455 5456 // If we just RAUW'd the root, take note. 5457 if (From == getRoot().getNode()) 5458 setRoot(SDValue(To[getRoot().getResNo()])); 5459} 5460 5461/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5462/// uses of other values produced by From.getNode() alone. The Deleted 5463/// vector is handled the same way as for ReplaceAllUsesWith. 5464void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5465 // Handle the really simple, really trivial case efficiently. 5466 if (From == To) return; 5467 5468 // Handle the simple, trivial, case efficiently. 5469 if (From.getNode()->getNumValues() == 1) { 5470 ReplaceAllUsesWith(From, To); 5471 return; 5472 } 5473 5474 // Iterate over just the existing users of From. See the comments in 5475 // the ReplaceAllUsesWith above. 5476 SDNode::use_iterator UI = From.getNode()->use_begin(), 5477 UE = From.getNode()->use_end(); 5478 RAUWUpdateListener Listener(*this, UI, UE); 5479 while (UI != UE) { 5480 SDNode *User = *UI; 5481 bool UserRemovedFromCSEMaps = false; 5482 5483 // A user can appear in a use list multiple times, and when this 5484 // happens the uses are usually next to each other in the list. 5485 // To help reduce the number of CSE recomputations, process all 5486 // the uses of this user that we can find this way. 5487 do { 5488 SDUse &Use = UI.getUse(); 5489 5490 // Skip uses of different values from the same node. 5491 if (Use.getResNo() != From.getResNo()) { 5492 ++UI; 5493 continue; 5494 } 5495 5496 // If this node hasn't been modified yet, it's still in the CSE maps, 5497 // so remove its old self from the CSE maps. 5498 if (!UserRemovedFromCSEMaps) { 5499 RemoveNodeFromCSEMaps(User); 5500 UserRemovedFromCSEMaps = true; 5501 } 5502 5503 ++UI; 5504 Use.set(To); 5505 } while (UI != UE && *UI == User); 5506 5507 // We are iterating over all uses of the From node, so if a use 5508 // doesn't use the specific value, no changes are made. 5509 if (!UserRemovedFromCSEMaps) 5510 continue; 5511 5512 // Now that we have modified User, add it back to the CSE maps. If it 5513 // already exists there, recursively merge the results together. 5514 AddModifiedNodeToCSEMaps(User); 5515 } 5516 5517 // If we just RAUW'd the root, take note. 5518 if (From == getRoot()) 5519 setRoot(To); 5520} 5521 5522namespace { 5523 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5524 /// to record information about a use. 5525 struct UseMemo { 5526 SDNode *User; 5527 unsigned Index; 5528 SDUse *Use; 5529 }; 5530 5531 /// operator< - Sort Memos by User. 5532 bool operator<(const UseMemo &L, const UseMemo &R) { 5533 return (intptr_t)L.User < (intptr_t)R.User; 5534 } 5535} 5536 5537/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5538/// uses of other values produced by From.getNode() alone. The same value 5539/// may appear in both the From and To list. The Deleted vector is 5540/// handled the same way as for ReplaceAllUsesWith. 5541void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5542 const SDValue *To, 5543 unsigned Num){ 5544 // Handle the simple, trivial case efficiently. 5545 if (Num == 1) 5546 return ReplaceAllUsesOfValueWith(*From, *To); 5547 5548 // Read up all the uses and make records of them. This helps 5549 // processing new uses that are introduced during the 5550 // replacement process. 5551 SmallVector<UseMemo, 4> Uses; 5552 for (unsigned i = 0; i != Num; ++i) { 5553 unsigned FromResNo = From[i].getResNo(); 5554 SDNode *FromNode = From[i].getNode(); 5555 for (SDNode::use_iterator UI = FromNode->use_begin(), 5556 E = FromNode->use_end(); UI != E; ++UI) { 5557 SDUse &Use = UI.getUse(); 5558 if (Use.getResNo() == FromResNo) { 5559 UseMemo Memo = { *UI, i, &Use }; 5560 Uses.push_back(Memo); 5561 } 5562 } 5563 } 5564 5565 // Sort the uses, so that all the uses from a given User are together. 5566 std::sort(Uses.begin(), Uses.end()); 5567 5568 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5569 UseIndex != UseIndexEnd; ) { 5570 // We know that this user uses some value of From. If it is the right 5571 // value, update it. 5572 SDNode *User = Uses[UseIndex].User; 5573 5574 // This node is about to morph, remove its old self from the CSE maps. 5575 RemoveNodeFromCSEMaps(User); 5576 5577 // The Uses array is sorted, so all the uses for a given User 5578 // are next to each other in the list. 5579 // To help reduce the number of CSE recomputations, process all 5580 // the uses of this user that we can find this way. 5581 do { 5582 unsigned i = Uses[UseIndex].Index; 5583 SDUse &Use = *Uses[UseIndex].Use; 5584 ++UseIndex; 5585 5586 Use.set(To[i]); 5587 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5588 5589 // Now that we have modified User, add it back to the CSE maps. If it 5590 // already exists there, recursively merge the results together. 5591 AddModifiedNodeToCSEMaps(User); 5592 } 5593} 5594 5595/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5596/// based on their topological order. It returns the maximum id and a vector 5597/// of the SDNodes* in assigned order by reference. 5598unsigned SelectionDAG::AssignTopologicalOrder() { 5599 5600 unsigned DAGSize = 0; 5601 5602 // SortedPos tracks the progress of the algorithm. Nodes before it are 5603 // sorted, nodes after it are unsorted. When the algorithm completes 5604 // it is at the end of the list. 5605 allnodes_iterator SortedPos = allnodes_begin(); 5606 5607 // Visit all the nodes. Move nodes with no operands to the front of 5608 // the list immediately. Annotate nodes that do have operands with their 5609 // operand count. Before we do this, the Node Id fields of the nodes 5610 // may contain arbitrary values. After, the Node Id fields for nodes 5611 // before SortedPos will contain the topological sort index, and the 5612 // Node Id fields for nodes At SortedPos and after will contain the 5613 // count of outstanding operands. 5614 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5615 SDNode *N = I++; 5616 checkForCycles(N); 5617 unsigned Degree = N->getNumOperands(); 5618 if (Degree == 0) { 5619 // A node with no uses, add it to the result array immediately. 5620 N->setNodeId(DAGSize++); 5621 allnodes_iterator Q = N; 5622 if (Q != SortedPos) 5623 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5624 assert(SortedPos != AllNodes.end() && "Overran node list"); 5625 ++SortedPos; 5626 } else { 5627 // Temporarily use the Node Id as scratch space for the degree count. 5628 N->setNodeId(Degree); 5629 } 5630 } 5631 5632 // Visit all the nodes. As we iterate, move nodes into sorted order, 5633 // such that by the time the end is reached all nodes will be sorted. 5634 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5635 SDNode *N = I; 5636 checkForCycles(N); 5637 // N is in sorted position, so all its uses have one less operand 5638 // that needs to be sorted. 5639 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5640 UI != UE; ++UI) { 5641 SDNode *P = *UI; 5642 unsigned Degree = P->getNodeId(); 5643 assert(Degree != 0 && "Invalid node degree"); 5644 --Degree; 5645 if (Degree == 0) { 5646 // All of P's operands are sorted, so P may sorted now. 5647 P->setNodeId(DAGSize++); 5648 if (P != SortedPos) 5649 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5650 assert(SortedPos != AllNodes.end() && "Overran node list"); 5651 ++SortedPos; 5652 } else { 5653 // Update P's outstanding operand count. 5654 P->setNodeId(Degree); 5655 } 5656 } 5657 if (I == SortedPos) { 5658#ifndef NDEBUG 5659 SDNode *S = ++I; 5660 dbgs() << "Overran sorted position:\n"; 5661 S->dumprFull(); 5662#endif 5663 llvm_unreachable(0); 5664 } 5665 } 5666 5667 assert(SortedPos == AllNodes.end() && 5668 "Topological sort incomplete!"); 5669 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5670 "First node in topological sort is not the entry token!"); 5671 assert(AllNodes.front().getNodeId() == 0 && 5672 "First node in topological sort has non-zero id!"); 5673 assert(AllNodes.front().getNumOperands() == 0 && 5674 "First node in topological sort has operands!"); 5675 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5676 "Last node in topologic sort has unexpected id!"); 5677 assert(AllNodes.back().use_empty() && 5678 "Last node in topologic sort has users!"); 5679 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5680 return DAGSize; 5681} 5682 5683/// AssignOrdering - Assign an order to the SDNode. 5684void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5685 assert(SD && "Trying to assign an order to a null node!"); 5686 Ordering->add(SD, Order); 5687} 5688 5689/// GetOrdering - Get the order for the SDNode. 5690unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5691 assert(SD && "Trying to get the order of a null node!"); 5692 return Ordering->getOrder(SD); 5693} 5694 5695/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5696/// value is produced by SD. 5697void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5698 DbgInfo->add(DB, SD, isParameter); 5699 if (SD) 5700 SD->setHasDebugValue(true); 5701} 5702 5703/// TransferDbgValues - Transfer SDDbgValues. 5704void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5705 if (From == To || !From.getNode()->getHasDebugValue()) 5706 return; 5707 SDNode *FromNode = From.getNode(); 5708 SDNode *ToNode = To.getNode(); 5709 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5710 SmallVector<SDDbgValue *, 2> ClonedDVs; 5711 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5712 I != E; ++I) { 5713 SDDbgValue *Dbg = *I; 5714 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5715 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5716 Dbg->getOffset(), Dbg->getDebugLoc(), 5717 Dbg->getOrder()); 5718 ClonedDVs.push_back(Clone); 5719 } 5720 } 5721 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5722 E = ClonedDVs.end(); I != E; ++I) 5723 AddDbgValue(*I, ToNode, false); 5724} 5725 5726//===----------------------------------------------------------------------===// 5727// SDNode Class 5728//===----------------------------------------------------------------------===// 5729 5730HandleSDNode::~HandleSDNode() { 5731 DropOperands(); 5732} 5733 5734GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5735 const GlobalValue *GA, 5736 EVT VT, int64_t o, unsigned char TF) 5737 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5738 TheGlobal = GA; 5739} 5740 5741MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5742 MachineMemOperand *mmo) 5743 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5744 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5745 MMO->isNonTemporal(), MMO->isInvariant()); 5746 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5747 assert(isNonTemporal() == MMO->isNonTemporal() && 5748 "Non-temporal encoding error!"); 5749 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5750} 5751 5752MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5753 const SDValue *Ops, unsigned NumOps, EVT memvt, 5754 MachineMemOperand *mmo) 5755 : SDNode(Opc, dl, VTs, Ops, NumOps), 5756 MemoryVT(memvt), MMO(mmo) { 5757 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5758 MMO->isNonTemporal(), MMO->isInvariant()); 5759 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5760 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5761} 5762 5763/// Profile - Gather unique data for the node. 5764/// 5765void SDNode::Profile(FoldingSetNodeID &ID) const { 5766 AddNodeIDNode(ID, this); 5767} 5768 5769namespace { 5770 struct EVTArray { 5771 std::vector<EVT> VTs; 5772 5773 EVTArray() { 5774 VTs.reserve(MVT::LAST_VALUETYPE); 5775 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5776 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5777 } 5778 }; 5779} 5780 5781static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5782static ManagedStatic<EVTArray> SimpleVTArray; 5783static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5784 5785/// getValueTypeList - Return a pointer to the specified value type. 5786/// 5787const EVT *SDNode::getValueTypeList(EVT VT) { 5788 if (VT.isExtended()) { 5789 sys::SmartScopedLock<true> Lock(*VTMutex); 5790 return &(*EVTs->insert(VT).first); 5791 } else { 5792 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5793 "Value type out of range!"); 5794 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5795 } 5796} 5797 5798/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5799/// indicated value. This method ignores uses of other values defined by this 5800/// operation. 5801bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5802 assert(Value < getNumValues() && "Bad value!"); 5803 5804 // TODO: Only iterate over uses of a given value of the node 5805 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5806 if (UI.getUse().getResNo() == Value) { 5807 if (NUses == 0) 5808 return false; 5809 --NUses; 5810 } 5811 } 5812 5813 // Found exactly the right number of uses? 5814 return NUses == 0; 5815} 5816 5817 5818/// hasAnyUseOfValue - Return true if there are any use of the indicated 5819/// value. This method ignores uses of other values defined by this operation. 5820bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5821 assert(Value < getNumValues() && "Bad value!"); 5822 5823 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5824 if (UI.getUse().getResNo() == Value) 5825 return true; 5826 5827 return false; 5828} 5829 5830 5831/// isOnlyUserOf - Return true if this node is the only use of N. 5832/// 5833bool SDNode::isOnlyUserOf(SDNode *N) const { 5834 bool Seen = false; 5835 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5836 SDNode *User = *I; 5837 if (User == this) 5838 Seen = true; 5839 else 5840 return false; 5841 } 5842 5843 return Seen; 5844} 5845 5846/// isOperand - Return true if this node is an operand of N. 5847/// 5848bool SDValue::isOperandOf(SDNode *N) const { 5849 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5850 if (*this == N->getOperand(i)) 5851 return true; 5852 return false; 5853} 5854 5855bool SDNode::isOperandOf(SDNode *N) const { 5856 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5857 if (this == N->OperandList[i].getNode()) 5858 return true; 5859 return false; 5860} 5861 5862/// reachesChainWithoutSideEffects - Return true if this operand (which must 5863/// be a chain) reaches the specified operand without crossing any 5864/// side-effecting instructions on any chain path. In practice, this looks 5865/// through token factors and non-volatile loads. In order to remain efficient, 5866/// this only looks a couple of nodes in, it does not do an exhaustive search. 5867bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5868 unsigned Depth) const { 5869 if (*this == Dest) return true; 5870 5871 // Don't search too deeply, we just want to be able to see through 5872 // TokenFactor's etc. 5873 if (Depth == 0) return false; 5874 5875 // If this is a token factor, all inputs to the TF happen in parallel. If any 5876 // of the operands of the TF does not reach dest, then we cannot do the xform. 5877 if (getOpcode() == ISD::TokenFactor) { 5878 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5879 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5880 return false; 5881 return true; 5882 } 5883 5884 // Loads don't have side effects, look through them. 5885 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5886 if (!Ld->isVolatile()) 5887 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5888 } 5889 return false; 5890} 5891 5892/// hasPredecessor - Return true if N is a predecessor of this node. 5893/// N is either an operand of this node, or can be reached by recursively 5894/// traversing up the operands. 5895/// NOTE: This is an expensive method. Use it carefully. 5896bool SDNode::hasPredecessor(const SDNode *N) const { 5897 SmallPtrSet<const SDNode *, 32> Visited; 5898 SmallVector<const SDNode *, 16> Worklist; 5899 return hasPredecessorHelper(N, Visited, Worklist); 5900} 5901 5902bool SDNode::hasPredecessorHelper(const SDNode *N, 5903 SmallPtrSet<const SDNode *, 32> &Visited, 5904 SmallVector<const SDNode *, 16> &Worklist) const { 5905 if (Visited.empty()) { 5906 Worklist.push_back(this); 5907 } else { 5908 // Take a look in the visited set. If we've already encountered this node 5909 // we needn't search further. 5910 if (Visited.count(N)) 5911 return true; 5912 } 5913 5914 // Haven't visited N yet. Continue the search. 5915 while (!Worklist.empty()) { 5916 const SDNode *M = Worklist.pop_back_val(); 5917 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5918 SDNode *Op = M->getOperand(i).getNode(); 5919 if (Visited.insert(Op)) 5920 Worklist.push_back(Op); 5921 if (Op == N) 5922 return true; 5923 } 5924 } 5925 5926 return false; 5927} 5928 5929uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5930 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5931 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5932} 5933 5934SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 5935 assert(N->getNumValues() == 1 && 5936 "Can't unroll a vector with multiple results!"); 5937 5938 EVT VT = N->getValueType(0); 5939 unsigned NE = VT.getVectorNumElements(); 5940 EVT EltVT = VT.getVectorElementType(); 5941 DebugLoc dl = N->getDebugLoc(); 5942 5943 SmallVector<SDValue, 8> Scalars; 5944 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 5945 5946 // If ResNE is 0, fully unroll the vector op. 5947 if (ResNE == 0) 5948 ResNE = NE; 5949 else if (NE > ResNE) 5950 NE = ResNE; 5951 5952 unsigned i; 5953 for (i= 0; i != NE; ++i) { 5954 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 5955 SDValue Operand = N->getOperand(j); 5956 EVT OperandVT = Operand.getValueType(); 5957 if (OperandVT.isVector()) { 5958 // A vector operand; extract a single element. 5959 EVT OperandEltVT = OperandVT.getVectorElementType(); 5960 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 5961 OperandEltVT, 5962 Operand, 5963 getConstant(i, TLI.getPointerTy())); 5964 } else { 5965 // A scalar operand; just use it as is. 5966 Operands[j] = Operand; 5967 } 5968 } 5969 5970 switch (N->getOpcode()) { 5971 default: 5972 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 5973 &Operands[0], Operands.size())); 5974 break; 5975 case ISD::VSELECT: 5976 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 5977 &Operands[0], Operands.size())); 5978 break; 5979 case ISD::SHL: 5980 case ISD::SRA: 5981 case ISD::SRL: 5982 case ISD::ROTL: 5983 case ISD::ROTR: 5984 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 5985 getShiftAmountOperand(Operands[0].getValueType(), 5986 Operands[1]))); 5987 break; 5988 case ISD::SIGN_EXTEND_INREG: 5989 case ISD::FP_ROUND_INREG: { 5990 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 5991 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 5992 Operands[0], 5993 getValueType(ExtVT))); 5994 } 5995 } 5996 } 5997 5998 for (; i < ResNE; ++i) 5999 Scalars.push_back(getUNDEF(EltVT)); 6000 6001 return getNode(ISD::BUILD_VECTOR, dl, 6002 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6003 &Scalars[0], Scalars.size()); 6004} 6005 6006 6007/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6008/// location that is 'Dist' units away from the location that the 'Base' load 6009/// is loading from. 6010bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6011 unsigned Bytes, int Dist) const { 6012 if (LD->getChain() != Base->getChain()) 6013 return false; 6014 EVT VT = LD->getValueType(0); 6015 if (VT.getSizeInBits() / 8 != Bytes) 6016 return false; 6017 6018 SDValue Loc = LD->getOperand(1); 6019 SDValue BaseLoc = Base->getOperand(1); 6020 if (Loc.getOpcode() == ISD::FrameIndex) { 6021 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6022 return false; 6023 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6024 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6025 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6026 int FS = MFI->getObjectSize(FI); 6027 int BFS = MFI->getObjectSize(BFI); 6028 if (FS != BFS || FS != (int)Bytes) return false; 6029 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6030 } 6031 6032 // Handle X+C 6033 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6034 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6035 return true; 6036 6037 const GlobalValue *GV1 = NULL; 6038 const GlobalValue *GV2 = NULL; 6039 int64_t Offset1 = 0; 6040 int64_t Offset2 = 0; 6041 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6042 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6043 if (isGA1 && isGA2 && GV1 == GV2) 6044 return Offset1 == (Offset2 + Dist*Bytes); 6045 return false; 6046} 6047 6048 6049/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6050/// it cannot be inferred. 6051unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6052 // If this is a GlobalAddress + cst, return the alignment. 6053 const GlobalValue *GV; 6054 int64_t GVOffset = 0; 6055 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6056 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6057 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6058 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6059 TLI.getTargetData()); 6060 unsigned AlignBits = KnownZero.countTrailingOnes(); 6061 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6062 if (Align) 6063 return MinAlign(Align, GVOffset); 6064 } 6065 6066 // If this is a direct reference to a stack slot, use information about the 6067 // stack slot's alignment. 6068 int FrameIdx = 1 << 31; 6069 int64_t FrameOffset = 0; 6070 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6071 FrameIdx = FI->getIndex(); 6072 } else if (isBaseWithConstantOffset(Ptr) && 6073 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6074 // Handle FI+Cst 6075 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6076 FrameOffset = Ptr.getConstantOperandVal(1); 6077 } 6078 6079 if (FrameIdx != (1 << 31)) { 6080 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6081 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6082 FrameOffset); 6083 return FIInfoAlign; 6084 } 6085 6086 return 0; 6087} 6088 6089// getAddressSpace - Return the address space this GlobalAddress belongs to. 6090unsigned GlobalAddressSDNode::getAddressSpace() const { 6091 return getGlobal()->getType()->getAddressSpace(); 6092} 6093 6094 6095Type *ConstantPoolSDNode::getType() const { 6096 if (isMachineConstantPoolEntry()) 6097 return Val.MachineCPVal->getType(); 6098 return Val.ConstVal->getType(); 6099} 6100 6101bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6102 APInt &SplatUndef, 6103 unsigned &SplatBitSize, 6104 bool &HasAnyUndefs, 6105 unsigned MinSplatBits, 6106 bool isBigEndian) { 6107 EVT VT = getValueType(0); 6108 assert(VT.isVector() && "Expected a vector type"); 6109 unsigned sz = VT.getSizeInBits(); 6110 if (MinSplatBits > sz) 6111 return false; 6112 6113 SplatValue = APInt(sz, 0); 6114 SplatUndef = APInt(sz, 0); 6115 6116 // Get the bits. Bits with undefined values (when the corresponding element 6117 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6118 // in SplatValue. If any of the values are not constant, give up and return 6119 // false. 6120 unsigned int nOps = getNumOperands(); 6121 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6122 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6123 6124 for (unsigned j = 0; j < nOps; ++j) { 6125 unsigned i = isBigEndian ? nOps-1-j : j; 6126 SDValue OpVal = getOperand(i); 6127 unsigned BitPos = j * EltBitSize; 6128 6129 if (OpVal.getOpcode() == ISD::UNDEF) 6130 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6131 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6132 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6133 zextOrTrunc(sz) << BitPos; 6134 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6135 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6136 else 6137 return false; 6138 } 6139 6140 // The build_vector is all constants or undefs. Find the smallest element 6141 // size that splats the vector. 6142 6143 HasAnyUndefs = (SplatUndef != 0); 6144 while (sz > 8) { 6145 6146 unsigned HalfSize = sz / 2; 6147 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6148 APInt LowValue = SplatValue.trunc(HalfSize); 6149 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6150 APInt LowUndef = SplatUndef.trunc(HalfSize); 6151 6152 // If the two halves do not match (ignoring undef bits), stop here. 6153 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6154 MinSplatBits > HalfSize) 6155 break; 6156 6157 SplatValue = HighValue | LowValue; 6158 SplatUndef = HighUndef & LowUndef; 6159 6160 sz = HalfSize; 6161 } 6162 6163 SplatBitSize = sz; 6164 return true; 6165} 6166 6167bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6168 // Find the first non-undef value in the shuffle mask. 6169 unsigned i, e; 6170 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6171 /* search */; 6172 6173 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6174 6175 // Make sure all remaining elements are either undef or the same as the first 6176 // non-undef value. 6177 for (int Idx = Mask[i]; i != e; ++i) 6178 if (Mask[i] >= 0 && Mask[i] != Idx) 6179 return false; 6180 return true; 6181} 6182 6183#ifdef XDEBUG 6184static void checkForCyclesHelper(const SDNode *N, 6185 SmallPtrSet<const SDNode*, 32> &Visited, 6186 SmallPtrSet<const SDNode*, 32> &Checked) { 6187 // If this node has already been checked, don't check it again. 6188 if (Checked.count(N)) 6189 return; 6190 6191 // If a node has already been visited on this depth-first walk, reject it as 6192 // a cycle. 6193 if (!Visited.insert(N)) { 6194 dbgs() << "Offending node:\n"; 6195 N->dumprFull(); 6196 errs() << "Detected cycle in SelectionDAG\n"; 6197 abort(); 6198 } 6199 6200 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6201 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6202 6203 Checked.insert(N); 6204 Visited.erase(N); 6205} 6206#endif 6207 6208void llvm::checkForCycles(const llvm::SDNode *N) { 6209#ifdef XDEBUG 6210 assert(N && "Checking nonexistant SDNode"); 6211 SmallPtrSet<const SDNode*, 32> visited; 6212 SmallPtrSet<const SDNode*, 32> checked; 6213 checkForCyclesHelper(N, visited, checked); 6214#endif 6215} 6216 6217void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6218 checkForCycles(DAG->getRoot().getNode()); 6219} 6220