SelectionDAG.cpp revision 760f86f3395750ef6d03ecfe6f82d2867fbf568b
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetOptions.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/Support/CommandLine.h" 34#include "llvm/Support/MathExtras.h" 35#include "llvm/Support/raw_ostream.h" 36#include "llvm/ADT/SetVector.h" 37#include "llvm/ADT/SmallPtrSet.h" 38#include "llvm/ADT/SmallSet.h" 39#include "llvm/ADT/SmallVector.h" 40#include "llvm/ADT/StringExtras.h" 41#include <algorithm> 42#include <cmath> 43using namespace llvm; 44 45/// makeVTList - Return an instance of the SDVTList struct initialized with the 46/// specified members. 47static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 48 SDVTList Res = {VTs, NumVTs}; 49 return Res; 50} 51 52static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 53 switch (VT.getSimpleVT()) { 54 default: assert(0 && "Unknown FP format"); 55 case MVT::f32: return &APFloat::IEEEsingle; 56 case MVT::f64: return &APFloat::IEEEdouble; 57 case MVT::f80: return &APFloat::x87DoubleExtended; 58 case MVT::f128: return &APFloat::IEEEquad; 59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 60 } 61} 62 63SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 64 65//===----------------------------------------------------------------------===// 66// ConstantFPSDNode Class 67//===----------------------------------------------------------------------===// 68 69/// isExactlyValue - We don't rely on operator== working on double values, as 70/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 71/// As such, this method can be used to do an exact bit-for-bit comparison of 72/// two floating point values. 73bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 74 return getValueAPF().bitwiseIsEqual(V); 75} 76 77bool ConstantFPSDNode::isValueValidForType(MVT VT, 78 const APFloat& Val) { 79 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 80 81 // PPC long double cannot be converted to any other type. 82 if (VT == MVT::ppcf128 || 83 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 84 return false; 85 86 // convert modifies in place, so make a copy. 87 APFloat Val2 = APFloat(Val); 88 bool losesInfo; 89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 90 &losesInfo); 91 return !losesInfo; 92} 93 94//===----------------------------------------------------------------------===// 95// ISD Namespace 96//===----------------------------------------------------------------------===// 97 98/// isBuildVectorAllOnes - Return true if the specified node is a 99/// BUILD_VECTOR where all of the elements are ~0 or undef. 100bool ISD::isBuildVectorAllOnes(const SDNode *N) { 101 // Look through a bit convert. 102 if (N->getOpcode() == ISD::BIT_CONVERT) 103 N = N->getOperand(0).getNode(); 104 105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 106 107 unsigned i = 0, e = N->getNumOperands(); 108 109 // Skip over all of the undef values. 110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 111 ++i; 112 113 // Do not accept an all-undef vector. 114 if (i == e) return false; 115 116 // Do not accept build_vectors that aren't all constants or which have non-~0 117 // elements. 118 SDValue NotZero = N->getOperand(i); 119 if (isa<ConstantSDNode>(NotZero)) { 120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 121 return false; 122 } else if (isa<ConstantFPSDNode>(NotZero)) { 123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 124 bitcastToAPInt().isAllOnesValue()) 125 return false; 126 } else 127 return false; 128 129 // Okay, we have at least one ~0 value, check to see if the rest match or are 130 // undefs. 131 for (++i; i != e; ++i) 132 if (N->getOperand(i) != NotZero && 133 N->getOperand(i).getOpcode() != ISD::UNDEF) 134 return false; 135 return true; 136} 137 138 139/// isBuildVectorAllZeros - Return true if the specified node is a 140/// BUILD_VECTOR where all of the elements are 0 or undef. 141bool ISD::isBuildVectorAllZeros(const SDNode *N) { 142 // Look through a bit convert. 143 if (N->getOpcode() == ISD::BIT_CONVERT) 144 N = N->getOperand(0).getNode(); 145 146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 147 148 unsigned i = 0, e = N->getNumOperands(); 149 150 // Skip over all of the undef values. 151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 152 ++i; 153 154 // Do not accept an all-undef vector. 155 if (i == e) return false; 156 157 // Do not accept build_vectors that aren't all constants or which have non-~0 158 // elements. 159 SDValue Zero = N->getOperand(i); 160 if (isa<ConstantSDNode>(Zero)) { 161 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 162 return false; 163 } else if (isa<ConstantFPSDNode>(Zero)) { 164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 165 return false; 166 } else 167 return false; 168 169 // Okay, we have at least one ~0 value, check to see if the rest match or are 170 // undefs. 171 for (++i; i != e; ++i) 172 if (N->getOperand(i) != Zero && 173 N->getOperand(i).getOpcode() != ISD::UNDEF) 174 return false; 175 return true; 176} 177 178/// isScalarToVector - Return true if the specified node is a 179/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 180/// element is not an undef. 181bool ISD::isScalarToVector(const SDNode *N) { 182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 183 return true; 184 185 if (N->getOpcode() != ISD::BUILD_VECTOR) 186 return false; 187 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 188 return false; 189 unsigned NumElems = N->getNumOperands(); 190 for (unsigned i = 1; i < NumElems; ++i) { 191 SDValue V = N->getOperand(i); 192 if (V.getOpcode() != ISD::UNDEF) 193 return false; 194 } 195 return true; 196} 197 198 199/// isDebugLabel - Return true if the specified node represents a debug 200/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 201bool ISD::isDebugLabel(const SDNode *N) { 202 SDValue Zero; 203 if (N->getOpcode() == ISD::DBG_LABEL) 204 return true; 205 if (N->isMachineOpcode() && 206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 207 return true; 208 return false; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: assert(0 && "Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310const TargetMachine &SelectionDAG::getTarget() const { 311 return MF->getTarget(); 312} 313 314//===----------------------------------------------------------------------===// 315// SDNode Profile Support 316//===----------------------------------------------------------------------===// 317 318/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 319/// 320static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 321 ID.AddInteger(OpC); 322} 323 324/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 325/// solely with their pointer. 326static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 327 ID.AddPointer(VTList.VTs); 328} 329 330/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 331/// 332static void AddNodeIDOperands(FoldingSetNodeID &ID, 333 const SDValue *Ops, unsigned NumOps) { 334 for (; NumOps; --NumOps, ++Ops) { 335 ID.AddPointer(Ops->getNode()); 336 ID.AddInteger(Ops->getResNo()); 337 } 338} 339 340/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 341/// 342static void AddNodeIDOperands(FoldingSetNodeID &ID, 343 const SDUse *Ops, unsigned NumOps) { 344 for (; NumOps; --NumOps, ++Ops) { 345 ID.AddPointer(Ops->getVal()); 346 ID.AddInteger(Ops->getSDValue().getResNo()); 347 } 348} 349 350static void AddNodeIDNode(FoldingSetNodeID &ID, 351 unsigned short OpC, SDVTList VTList, 352 const SDValue *OpList, unsigned N) { 353 AddNodeIDOpcode(ID, OpC); 354 AddNodeIDValueTypes(ID, VTList); 355 AddNodeIDOperands(ID, OpList, N); 356} 357 358/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 359/// the NodeID data. 360static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 361 switch (N->getOpcode()) { 362 default: break; // Normal nodes don't need extra info. 363 case ISD::ARG_FLAGS: 364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 365 break; 366 case ISD::TargetConstant: 367 case ISD::Constant: 368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 369 break; 370 case ISD::TargetConstantFP: 371 case ISD::ConstantFP: { 372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 373 break; 374 } 375 case ISD::TargetGlobalAddress: 376 case ISD::GlobalAddress: 377 case ISD::TargetGlobalTLSAddress: 378 case ISD::GlobalTLSAddress: { 379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 380 ID.AddPointer(GA->getGlobal()); 381 ID.AddInteger(GA->getOffset()); 382 break; 383 } 384 case ISD::BasicBlock: 385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 386 break; 387 case ISD::Register: 388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 389 break; 390 case ISD::DBG_STOPPOINT: { 391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 392 ID.AddInteger(DSP->getLine()); 393 ID.AddInteger(DSP->getColumn()); 394 ID.AddPointer(DSP->getCompileUnit()); 395 break; 396 } 397 case ISD::SRCVALUE: 398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 399 break; 400 case ISD::MEMOPERAND: { 401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 402 MO.Profile(ID); 403 break; 404 } 405 case ISD::FrameIndex: 406 case ISD::TargetFrameIndex: 407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 408 break; 409 case ISD::JumpTable: 410 case ISD::TargetJumpTable: 411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 412 break; 413 case ISD::ConstantPool: 414 case ISD::TargetConstantPool: { 415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 416 ID.AddInteger(CP->getAlignment()); 417 ID.AddInteger(CP->getOffset()); 418 if (CP->isMachineConstantPoolEntry()) 419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 420 else 421 ID.AddPointer(CP->getConstVal()); 422 break; 423 } 424 case ISD::CALL: { 425 const CallSDNode *Call = cast<CallSDNode>(N); 426 ID.AddInteger(Call->getCallingConv()); 427 ID.AddInteger(Call->isVarArg()); 428 break; 429 } 430 case ISD::LOAD: { 431 const LoadSDNode *LD = cast<LoadSDNode>(N); 432 ID.AddInteger(LD->getAddressingMode()); 433 ID.AddInteger(LD->getExtensionType()); 434 ID.AddInteger(LD->getMemoryVT().getRawBits()); 435 ID.AddInteger(LD->getRawFlags()); 436 break; 437 } 438 case ISD::STORE: { 439 const StoreSDNode *ST = cast<StoreSDNode>(N); 440 ID.AddInteger(ST->getAddressingMode()); 441 ID.AddInteger(ST->isTruncatingStore()); 442 ID.AddInteger(ST->getMemoryVT().getRawBits()); 443 ID.AddInteger(ST->getRawFlags()); 444 break; 445 } 446 case ISD::ATOMIC_CMP_SWAP: 447 case ISD::ATOMIC_SWAP: 448 case ISD::ATOMIC_LOAD_ADD: 449 case ISD::ATOMIC_LOAD_SUB: 450 case ISD::ATOMIC_LOAD_AND: 451 case ISD::ATOMIC_LOAD_OR: 452 case ISD::ATOMIC_LOAD_XOR: 453 case ISD::ATOMIC_LOAD_NAND: 454 case ISD::ATOMIC_LOAD_MIN: 455 case ISD::ATOMIC_LOAD_MAX: 456 case ISD::ATOMIC_LOAD_UMIN: 457 case ISD::ATOMIC_LOAD_UMAX: { 458 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 459 ID.AddInteger(AT->getRawFlags()); 460 break; 461 } 462 } // end switch (N->getOpcode()) 463} 464 465/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 466/// data. 467static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 468 AddNodeIDOpcode(ID, N->getOpcode()); 469 // Add the return value info. 470 AddNodeIDValueTypes(ID, N->getVTList()); 471 // Add the operand info. 472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 473 474 // Handle SDNode leafs with special info. 475 AddNodeIDCustom(ID, N); 476} 477 478/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 479/// the CSE map that carries both alignment and volatility information. 480/// 481static inline unsigned 482encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 483 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::DBG_LABEL: 499 case ISD::DBG_STOPPOINT: 500 case ISD::EH_LABEL: 501 case ISD::DECLARE: 502 return true; // Never CSE these nodes. 503 } 504 505 // Check that remaining values produced are not flags. 506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 507 if (N->getValueType(i) == MVT::Flag) 508 return true; // Never CSE anything that produces a flag. 509 510 return false; 511} 512 513/// RemoveDeadNodes - This method deletes all unreachable nodes in the 514/// SelectionDAG. 515void SelectionDAG::RemoveDeadNodes() { 516 // Create a dummy node (which is not added to allnodes), that adds a reference 517 // to the root node, preventing it from being deleted. 518 HandleSDNode Dummy(getRoot()); 519 520 SmallVector<SDNode*, 128> DeadNodes; 521 522 // Add all obviously-dead nodes to the DeadNodes worklist. 523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 524 if (I->use_empty()) 525 DeadNodes.push_back(I); 526 527 RemoveDeadNodes(DeadNodes); 528 529 // If the root changed (e.g. it was a dead load, update the root). 530 setRoot(Dummy.getValue()); 531} 532 533/// RemoveDeadNodes - This method deletes the unreachable nodes in the 534/// given list, and any nodes that become unreachable as a result. 535void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 536 DAGUpdateListener *UpdateListener) { 537 538 // Process the worklist, deleting the nodes and adding their uses to the 539 // worklist. 540 while (!DeadNodes.empty()) { 541 SDNode *N = DeadNodes.back(); 542 DeadNodes.pop_back(); 543 544 if (UpdateListener) 545 UpdateListener->NodeDeleted(N, 0); 546 547 // Take the node out of the appropriate CSE map. 548 RemoveNodeFromCSEMaps(N); 549 550 // Next, brutally remove the operand list. This is safe to do, as there are 551 // no cycles in the graph. 552 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 553 SDNode *Operand = I->getVal(); 554 Operand->removeUser(std::distance(N->op_begin(), I), N); 555 556 // Now that we removed this operand, see if there are no uses of it left. 557 if (Operand->use_empty()) 558 DeadNodes.push_back(Operand); 559 } 560 561 DeallocateNode(N); 562 } 563} 564 565void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 566 SmallVector<SDNode*, 16> DeadNodes(1, N); 567 RemoveDeadNodes(DeadNodes, UpdateListener); 568} 569 570void SelectionDAG::DeleteNode(SDNode *N) { 571 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 572 573 // First take this out of the appropriate CSE map. 574 RemoveNodeFromCSEMaps(N); 575 576 // Finally, remove uses due to operands of this node, remove from the 577 // AllNodes list, and delete the node. 578 DeleteNodeNotInCSEMaps(N); 579} 580 581void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 582 assert(N != AllNodes.begin()); 583 584 // Drop all of the operands and decrement used node's use counts. 585 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 586 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 587 588 DeallocateNode(N); 589} 590 591void SelectionDAG::DeallocateNode(SDNode *N) { 592 if (N->OperandsNeedDelete) 593 delete[] N->OperandList; 594 595 // Set the opcode to DELETED_NODE to help catch bugs when node 596 // memory is reallocated. 597 N->NodeType = ISD::DELETED_NODE; 598 599 NodeAllocator.Deallocate(AllNodes.remove(N)); 600} 601 602/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 603/// correspond to it. This is useful when we're about to delete or repurpose 604/// the node. We don't want future request for structurally identical nodes 605/// to return N anymore. 606bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 607 bool Erased = false; 608 switch (N->getOpcode()) { 609 case ISD::EntryToken: 610 assert(0 && "EntryToken should not be in CSEMaps!"); 611 return false; 612 case ISD::HANDLENODE: return false; // noop. 613 case ISD::CONDCODE: 614 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 615 "Cond code doesn't exist!"); 616 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 617 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 618 break; 619 case ISD::ExternalSymbol: 620 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 621 break; 622 case ISD::TargetExternalSymbol: 623 Erased = 624 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 625 break; 626 case ISD::VALUETYPE: { 627 MVT VT = cast<VTSDNode>(N)->getVT(); 628 if (VT.isExtended()) { 629 Erased = ExtendedValueTypeNodes.erase(VT); 630 } else { 631 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 632 ValueTypeNodes[VT.getSimpleVT()] = 0; 633 } 634 break; 635 } 636 default: 637 // Remove it from the CSE Map. 638 Erased = CSEMap.RemoveNode(N); 639 break; 640 } 641#ifndef NDEBUG 642 // Verify that the node was actually in one of the CSE maps, unless it has a 643 // flag result (which cannot be CSE'd) or is one of the special cases that are 644 // not subject to CSE. 645 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 646 !N->isMachineOpcode() && !doNotCSE(N)) { 647 N->dump(this); 648 cerr << "\n"; 649 assert(0 && "Node is not in map!"); 650 } 651#endif 652 return Erased; 653} 654 655/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 656/// has been taken out and modified in some way. If the specified node already 657/// exists in the CSE maps, do not modify the maps, but return the existing node 658/// instead. If it doesn't exist, add it and return null. 659/// 660SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 661 assert(N->getNumOperands() && "This is a leaf node!"); 662 663 if (doNotCSE(N)) 664 return 0; 665 666 SDNode *New = CSEMap.GetOrInsertNode(N); 667 if (New != N) return New; // Node already existed. 668 return 0; 669} 670 671/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 672/// were replaced with those specified. If this node is never memoized, 673/// return null, otherwise return a pointer to the slot it would take. If a 674/// node already exists with these operands, the slot will be non-null. 675SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 676 void *&InsertPos) { 677 if (doNotCSE(N)) 678 return 0; 679 680 SDValue Ops[] = { Op }; 681 FoldingSetNodeID ID; 682 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 683 AddNodeIDCustom(ID, N); 684 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 685} 686 687/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 688/// were replaced with those specified. If this node is never memoized, 689/// return null, otherwise return a pointer to the slot it would take. If a 690/// node already exists with these operands, the slot will be non-null. 691SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 692 SDValue Op1, SDValue Op2, 693 void *&InsertPos) { 694 if (doNotCSE(N)) 695 return 0; 696 697 SDValue Ops[] = { Op1, Op2 }; 698 FoldingSetNodeID ID; 699 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 700 AddNodeIDCustom(ID, N); 701 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 702} 703 704 705/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 706/// were replaced with those specified. If this node is never memoized, 707/// return null, otherwise return a pointer to the slot it would take. If a 708/// node already exists with these operands, the slot will be non-null. 709SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 710 const SDValue *Ops,unsigned NumOps, 711 void *&InsertPos) { 712 if (doNotCSE(N)) 713 return 0; 714 715 FoldingSetNodeID ID; 716 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 717 AddNodeIDCustom(ID, N); 718 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 719} 720 721/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 722void SelectionDAG::VerifyNode(SDNode *N) { 723 switch (N->getOpcode()) { 724 default: 725 break; 726 case ISD::BUILD_PAIR: { 727 MVT VT = N->getValueType(0); 728 assert(N->getNumValues() == 1 && "Too many results!"); 729 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 730 "Wrong return type!"); 731 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 732 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 733 "Mismatched operand types!"); 734 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 735 "Wrong operand type!"); 736 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 737 "Wrong return type size"); 738 break; 739 } 740 case ISD::BUILD_VECTOR: { 741 assert(N->getNumValues() == 1 && "Too many results!"); 742 assert(N->getValueType(0).isVector() && "Wrong return type!"); 743 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 744 "Wrong number of operands!"); 745 // FIXME: Change vector_shuffle to a variadic node with mask elements being 746 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an 747 // operand, and it is not always possible to legalize it. Turning off the 748 // following checks at least makes it possible to legalize most of the time. 749// MVT EltVT = N->getValueType(0).getVectorElementType(); 750// for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 751// assert(I->getSDValue().getValueType() == EltVT && 752// "Wrong operand type!"); 753 break; 754 } 755 } 756} 757 758/// getMVTAlignment - Compute the default alignment value for the 759/// given type. 760/// 761unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 762 const Type *Ty = VT == MVT::iPTR ? 763 PointerType::get(Type::Int8Ty, 0) : 764 VT.getTypeForMVT(); 765 766 return TLI.getTargetData()->getABITypeAlignment(Ty); 767} 768 769SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 770 : TLI(tli), FLI(fli), 771 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 772 Root(getEntryNode()) { 773 AllNodes.push_back(&EntryNode); 774} 775 776void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 777 DwarfWriter *dw) { 778 MF = &mf; 779 MMI = mmi; 780 DW = dw; 781} 782 783SelectionDAG::~SelectionDAG() { 784 allnodes_clear(); 785} 786 787void SelectionDAG::allnodes_clear() { 788 assert(&*AllNodes.begin() == &EntryNode); 789 AllNodes.remove(AllNodes.begin()); 790 while (!AllNodes.empty()) 791 DeallocateNode(AllNodes.begin()); 792} 793 794void SelectionDAG::clear() { 795 allnodes_clear(); 796 OperandAllocator.Reset(); 797 CSEMap.clear(); 798 799 ExtendedValueTypeNodes.clear(); 800 ExternalSymbols.clear(); 801 TargetExternalSymbols.clear(); 802 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 803 static_cast<CondCodeSDNode*>(0)); 804 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 805 static_cast<SDNode*>(0)); 806 807 EntryNode.Uses = 0; 808 AllNodes.push_back(&EntryNode); 809 Root = getEntryNode(); 810} 811 812SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 813 if (Op.getValueType() == VT) return Op; 814 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 815 VT.getSizeInBits()); 816 return getNode(ISD::AND, Op.getValueType(), Op, 817 getConstant(Imm, Op.getValueType())); 818} 819 820/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 821/// 822SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) { 823 SDValue NegOne; 824 if (VT.isVector()) { 825 MVT EltVT = VT.getVectorElementType(); 826 SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT); 827 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt); 828 NegOne = getNode(ISD::BUILD_VECTOR, VT, &NegOnes[0], NegOnes.size()); 829 } else 830 NegOne = getConstant(VT.getIntegerVTBitMask(), VT); 831 832 return getNode(ISD::XOR, VT, Val, NegOne); 833} 834 835SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 836 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 837 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 838} 839 840SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 841 return getConstant(*ConstantInt::get(Val), VT, isT); 842} 843 844SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 845 assert(VT.isInteger() && "Cannot create FP integer constant!"); 846 847 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 848 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 849 "APInt size does not match type size!"); 850 851 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 852 FoldingSetNodeID ID; 853 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 854 ID.AddPointer(&Val); 855 void *IP = 0; 856 SDNode *N = NULL; 857 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 858 if (!VT.isVector()) 859 return SDValue(N, 0); 860 if (!N) { 861 N = NodeAllocator.Allocate<ConstantSDNode>(); 862 new (N) ConstantSDNode(isT, &Val, EltVT); 863 CSEMap.InsertNode(N, IP); 864 AllNodes.push_back(N); 865 } 866 867 SDValue Result(N, 0); 868 if (VT.isVector()) { 869 SmallVector<SDValue, 8> Ops; 870 Ops.assign(VT.getVectorNumElements(), Result); 871 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 872 } 873 return Result; 874} 875 876SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 877 return getConstant(Val, TLI.getPointerTy(), isTarget); 878} 879 880 881SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 882 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 883} 884 885SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 886 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 887 888 MVT EltVT = 889 VT.isVector() ? VT.getVectorElementType() : VT; 890 891 // Do the map lookup using the actual bit pattern for the floating point 892 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 893 // we don't have issues with SNANs. 894 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 895 FoldingSetNodeID ID; 896 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 897 ID.AddPointer(&V); 898 void *IP = 0; 899 SDNode *N = NULL; 900 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 901 if (!VT.isVector()) 902 return SDValue(N, 0); 903 if (!N) { 904 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 905 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 906 CSEMap.InsertNode(N, IP); 907 AllNodes.push_back(N); 908 } 909 910 SDValue Result(N, 0); 911 if (VT.isVector()) { 912 SmallVector<SDValue, 8> Ops; 913 Ops.assign(VT.getVectorNumElements(), Result); 914 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 915 } 916 return Result; 917} 918 919SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 920 MVT EltVT = 921 VT.isVector() ? VT.getVectorElementType() : VT; 922 if (EltVT==MVT::f32) 923 return getConstantFP(APFloat((float)Val), VT, isTarget); 924 else 925 return getConstantFP(APFloat(Val), VT, isTarget); 926} 927 928SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 929 MVT VT, int64_t Offset, 930 bool isTargetGA) { 931 unsigned Opc; 932 933 // Truncate (with sign-extension) the offset value to the pointer size. 934 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 935 if (BitWidth < 64) 936 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 937 938 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 939 if (!GVar) { 940 // If GV is an alias then use the aliasee for determining thread-localness. 941 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 942 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 943 } 944 945 if (GVar && GVar->isThreadLocal()) 946 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 947 else 948 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 949 950 FoldingSetNodeID ID; 951 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 952 ID.AddPointer(GV); 953 ID.AddInteger(Offset); 954 void *IP = 0; 955 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 956 return SDValue(E, 0); 957 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 958 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 959 CSEMap.InsertNode(N, IP); 960 AllNodes.push_back(N); 961 return SDValue(N, 0); 962} 963 964SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 965 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 966 FoldingSetNodeID ID; 967 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 968 ID.AddInteger(FI); 969 void *IP = 0; 970 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 971 return SDValue(E, 0); 972 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 973 new (N) FrameIndexSDNode(FI, VT, isTarget); 974 CSEMap.InsertNode(N, IP); 975 AllNodes.push_back(N); 976 return SDValue(N, 0); 977} 978 979SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 980 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 981 FoldingSetNodeID ID; 982 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 983 ID.AddInteger(JTI); 984 void *IP = 0; 985 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 986 return SDValue(E, 0); 987 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 988 new (N) JumpTableSDNode(JTI, VT, isTarget); 989 CSEMap.InsertNode(N, IP); 990 AllNodes.push_back(N); 991 return SDValue(N, 0); 992} 993 994SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 995 unsigned Alignment, int Offset, 996 bool isTarget) { 997 if (Alignment == 0) 998 Alignment = 999 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1000 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1001 FoldingSetNodeID ID; 1002 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1003 ID.AddInteger(Alignment); 1004 ID.AddInteger(Offset); 1005 ID.AddPointer(C); 1006 void *IP = 0; 1007 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1008 return SDValue(E, 0); 1009 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1010 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1011 CSEMap.InsertNode(N, IP); 1012 AllNodes.push_back(N); 1013 return SDValue(N, 0); 1014} 1015 1016 1017SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1018 unsigned Alignment, int Offset, 1019 bool isTarget) { 1020 if (Alignment == 0) 1021 Alignment = 1022 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1023 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1024 FoldingSetNodeID ID; 1025 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1026 ID.AddInteger(Alignment); 1027 ID.AddInteger(Offset); 1028 C->AddSelectionDAGCSEId(ID); 1029 void *IP = 0; 1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1031 return SDValue(E, 0); 1032 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1033 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1034 CSEMap.InsertNode(N, IP); 1035 AllNodes.push_back(N); 1036 return SDValue(N, 0); 1037} 1038 1039 1040SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1041 FoldingSetNodeID ID; 1042 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1043 ID.AddPointer(MBB); 1044 void *IP = 0; 1045 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1046 return SDValue(E, 0); 1047 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1048 new (N) BasicBlockSDNode(MBB); 1049 CSEMap.InsertNode(N, IP); 1050 AllNodes.push_back(N); 1051 return SDValue(N, 0); 1052} 1053 1054SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1055 FoldingSetNodeID ID; 1056 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1057 ID.AddInteger(Flags.getRawBits()); 1058 void *IP = 0; 1059 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1060 return SDValue(E, 0); 1061 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1062 new (N) ARG_FLAGSSDNode(Flags); 1063 CSEMap.InsertNode(N, IP); 1064 AllNodes.push_back(N); 1065 return SDValue(N, 0); 1066} 1067 1068SDValue SelectionDAG::getValueType(MVT VT) { 1069 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1070 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1071 1072 SDNode *&N = VT.isExtended() ? 1073 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1074 1075 if (N) return SDValue(N, 0); 1076 N = NodeAllocator.Allocate<VTSDNode>(); 1077 new (N) VTSDNode(VT); 1078 AllNodes.push_back(N); 1079 return SDValue(N, 0); 1080} 1081 1082SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1083 SDNode *&N = ExternalSymbols[Sym]; 1084 if (N) return SDValue(N, 0); 1085 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1086 new (N) ExternalSymbolSDNode(false, Sym, VT); 1087 AllNodes.push_back(N); 1088 return SDValue(N, 0); 1089} 1090 1091SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1092 SDNode *&N = TargetExternalSymbols[Sym]; 1093 if (N) return SDValue(N, 0); 1094 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1095 new (N) ExternalSymbolSDNode(true, Sym, VT); 1096 AllNodes.push_back(N); 1097 return SDValue(N, 0); 1098} 1099 1100SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1101 if ((unsigned)Cond >= CondCodeNodes.size()) 1102 CondCodeNodes.resize(Cond+1); 1103 1104 if (CondCodeNodes[Cond] == 0) { 1105 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1106 new (N) CondCodeSDNode(Cond); 1107 CondCodeNodes[Cond] = N; 1108 AllNodes.push_back(N); 1109 } 1110 return SDValue(CondCodeNodes[Cond], 0); 1111} 1112 1113SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, 1114 SDValue STy, SDValue Rnd, SDValue Sat, 1115 ISD::CvtCode Code) { 1116 // If the src and dest types are the same, no conversion is necessary. 1117 if (DTy == STy) 1118 return Val; 1119 1120 FoldingSetNodeID ID; 1121 void* IP = 0; 1122 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1123 return SDValue(E, 0); 1124 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1125 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1126 new (N) CvtRndSatSDNode(VT, Ops, 5, Code); 1127 CSEMap.InsertNode(N, IP); 1128 AllNodes.push_back(N); 1129 return SDValue(N, 0); 1130} 1131 1132SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1133 FoldingSetNodeID ID; 1134 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1135 ID.AddInteger(RegNo); 1136 void *IP = 0; 1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1138 return SDValue(E, 0); 1139 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1140 new (N) RegisterSDNode(RegNo, VT); 1141 CSEMap.InsertNode(N, IP); 1142 AllNodes.push_back(N); 1143 return SDValue(N, 0); 1144} 1145 1146SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1147 unsigned Line, unsigned Col, 1148 Value *CU) { 1149 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1150 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1151 AllNodes.push_back(N); 1152 return SDValue(N, 0); 1153} 1154 1155SDValue SelectionDAG::getLabel(unsigned Opcode, 1156 SDValue Root, 1157 unsigned LabelID) { 1158 FoldingSetNodeID ID; 1159 SDValue Ops[] = { Root }; 1160 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1161 ID.AddInteger(LabelID); 1162 void *IP = 0; 1163 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1164 return SDValue(E, 0); 1165 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1166 new (N) LabelSDNode(Opcode, Root, LabelID); 1167 CSEMap.InsertNode(N, IP); 1168 AllNodes.push_back(N); 1169 return SDValue(N, 0); 1170} 1171 1172SDValue SelectionDAG::getSrcValue(const Value *V) { 1173 assert((!V || isa<PointerType>(V->getType())) && 1174 "SrcValue is not a pointer?"); 1175 1176 FoldingSetNodeID ID; 1177 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1178 ID.AddPointer(V); 1179 1180 void *IP = 0; 1181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1182 return SDValue(E, 0); 1183 1184 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1185 new (N) SrcValueSDNode(V); 1186 CSEMap.InsertNode(N, IP); 1187 AllNodes.push_back(N); 1188 return SDValue(N, 0); 1189} 1190 1191SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1192#ifndef NDEBUG 1193 const Value *v = MO.getValue(); 1194 assert((!v || isa<PointerType>(v->getType())) && 1195 "SrcValue is not a pointer?"); 1196#endif 1197 1198 FoldingSetNodeID ID; 1199 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1200 MO.Profile(ID); 1201 1202 void *IP = 0; 1203 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1204 return SDValue(E, 0); 1205 1206 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1207 new (N) MemOperandSDNode(MO); 1208 CSEMap.InsertNode(N, IP); 1209 AllNodes.push_back(N); 1210 return SDValue(N, 0); 1211} 1212 1213/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1214/// specified value type. 1215SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1216 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1217 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1218 const Type *Ty = VT.getTypeForMVT(); 1219 unsigned StackAlign = 1220 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1221 1222 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1223 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1224} 1225 1226/// CreateStackTemporary - Create a stack temporary suitable for holding 1227/// either of the specified value types. 1228SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) { 1229 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1230 VT2.getStoreSizeInBits())/8; 1231 const Type *Ty1 = VT1.getTypeForMVT(); 1232 const Type *Ty2 = VT2.getTypeForMVT(); 1233 const TargetData *TD = TLI.getTargetData(); 1234 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1235 TD->getPrefTypeAlignment(Ty2)); 1236 1237 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1238 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1239 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1240} 1241 1242SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1243 SDValue N2, ISD::CondCode Cond) { 1244 // These setcc operations always fold. 1245 switch (Cond) { 1246 default: break; 1247 case ISD::SETFALSE: 1248 case ISD::SETFALSE2: return getConstant(0, VT); 1249 case ISD::SETTRUE: 1250 case ISD::SETTRUE2: return getConstant(1, VT); 1251 1252 case ISD::SETOEQ: 1253 case ISD::SETOGT: 1254 case ISD::SETOGE: 1255 case ISD::SETOLT: 1256 case ISD::SETOLE: 1257 case ISD::SETONE: 1258 case ISD::SETO: 1259 case ISD::SETUO: 1260 case ISD::SETUEQ: 1261 case ISD::SETUNE: 1262 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1263 break; 1264 } 1265 1266 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1267 const APInt &C2 = N2C->getAPIntValue(); 1268 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1269 const APInt &C1 = N1C->getAPIntValue(); 1270 1271 switch (Cond) { 1272 default: assert(0 && "Unknown integer setcc!"); 1273 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1274 case ISD::SETNE: return getConstant(C1 != C2, VT); 1275 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1276 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1277 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1278 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1279 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1280 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1281 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1282 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1283 } 1284 } 1285 } 1286 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1287 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1288 // No compile time operations on this type yet. 1289 if (N1C->getValueType(0) == MVT::ppcf128) 1290 return SDValue(); 1291 1292 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1293 switch (Cond) { 1294 default: break; 1295 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1296 return getNode(ISD::UNDEF, VT); 1297 // fall through 1298 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1299 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1300 return getNode(ISD::UNDEF, VT); 1301 // fall through 1302 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1303 R==APFloat::cmpLessThan, VT); 1304 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1305 return getNode(ISD::UNDEF, VT); 1306 // fall through 1307 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1308 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1309 return getNode(ISD::UNDEF, VT); 1310 // fall through 1311 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1312 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1313 return getNode(ISD::UNDEF, VT); 1314 // fall through 1315 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1316 R==APFloat::cmpEqual, VT); 1317 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1318 return getNode(ISD::UNDEF, VT); 1319 // fall through 1320 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1321 R==APFloat::cmpEqual, VT); 1322 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1323 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1324 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1325 R==APFloat::cmpEqual, VT); 1326 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1327 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1328 R==APFloat::cmpLessThan, VT); 1329 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1330 R==APFloat::cmpUnordered, VT); 1331 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1332 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1333 } 1334 } else { 1335 // Ensure that the constant occurs on the RHS. 1336 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1337 } 1338 } 1339 1340 // Could not fold it. 1341 return SDValue(); 1342} 1343 1344/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1345/// use this predicate to simplify operations downstream. 1346bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1347 unsigned BitWidth = Op.getValueSizeInBits(); 1348 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1349} 1350 1351/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1352/// this predicate to simplify operations downstream. Mask is known to be zero 1353/// for bits that V cannot have. 1354bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1355 unsigned Depth) const { 1356 APInt KnownZero, KnownOne; 1357 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1358 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1359 return (KnownZero & Mask) == Mask; 1360} 1361 1362/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1363/// known to be either zero or one and return them in the KnownZero/KnownOne 1364/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1365/// processing. 1366void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1367 APInt &KnownZero, APInt &KnownOne, 1368 unsigned Depth) const { 1369 unsigned BitWidth = Mask.getBitWidth(); 1370 assert(BitWidth == Op.getValueType().getSizeInBits() && 1371 "Mask size mismatches value type size!"); 1372 1373 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1374 if (Depth == 6 || Mask == 0) 1375 return; // Limit search depth. 1376 1377 APInt KnownZero2, KnownOne2; 1378 1379 switch (Op.getOpcode()) { 1380 case ISD::Constant: 1381 // We know all of the bits for a constant! 1382 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1383 KnownZero = ~KnownOne & Mask; 1384 return; 1385 case ISD::AND: 1386 // If either the LHS or the RHS are Zero, the result is zero. 1387 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1388 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1389 KnownZero2, KnownOne2, Depth+1); 1390 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1391 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1392 1393 // Output known-1 bits are only known if set in both the LHS & RHS. 1394 KnownOne &= KnownOne2; 1395 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1396 KnownZero |= KnownZero2; 1397 return; 1398 case ISD::OR: 1399 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1400 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1401 KnownZero2, KnownOne2, Depth+1); 1402 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1403 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1404 1405 // Output known-0 bits are only known if clear in both the LHS & RHS. 1406 KnownZero &= KnownZero2; 1407 // Output known-1 are known to be set if set in either the LHS | RHS. 1408 KnownOne |= KnownOne2; 1409 return; 1410 case ISD::XOR: { 1411 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1412 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1413 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1414 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1415 1416 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1417 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1418 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1419 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1420 KnownZero = KnownZeroOut; 1421 return; 1422 } 1423 case ISD::MUL: { 1424 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1425 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1426 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1427 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1428 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1429 1430 // If low bits are zero in either operand, output low known-0 bits. 1431 // Also compute a conserative estimate for high known-0 bits. 1432 // More trickiness is possible, but this is sufficient for the 1433 // interesting case of alignment computation. 1434 KnownOne.clear(); 1435 unsigned TrailZ = KnownZero.countTrailingOnes() + 1436 KnownZero2.countTrailingOnes(); 1437 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1438 KnownZero2.countLeadingOnes(), 1439 BitWidth) - BitWidth; 1440 1441 TrailZ = std::min(TrailZ, BitWidth); 1442 LeadZ = std::min(LeadZ, BitWidth); 1443 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1444 APInt::getHighBitsSet(BitWidth, LeadZ); 1445 KnownZero &= Mask; 1446 return; 1447 } 1448 case ISD::UDIV: { 1449 // For the purposes of computing leading zeros we can conservatively 1450 // treat a udiv as a logical right shift by the power of 2 known to 1451 // be less than the denominator. 1452 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1453 ComputeMaskedBits(Op.getOperand(0), 1454 AllOnes, KnownZero2, KnownOne2, Depth+1); 1455 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1456 1457 KnownOne2.clear(); 1458 KnownZero2.clear(); 1459 ComputeMaskedBits(Op.getOperand(1), 1460 AllOnes, KnownZero2, KnownOne2, Depth+1); 1461 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1462 if (RHSUnknownLeadingOnes != BitWidth) 1463 LeadZ = std::min(BitWidth, 1464 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1465 1466 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1467 return; 1468 } 1469 case ISD::SELECT: 1470 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1471 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1472 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1473 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1474 1475 // Only known if known in both the LHS and RHS. 1476 KnownOne &= KnownOne2; 1477 KnownZero &= KnownZero2; 1478 return; 1479 case ISD::SELECT_CC: 1480 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1481 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1482 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1483 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1484 1485 // Only known if known in both the LHS and RHS. 1486 KnownOne &= KnownOne2; 1487 KnownZero &= KnownZero2; 1488 return; 1489 case ISD::SADDO: 1490 case ISD::UADDO: 1491 case ISD::SSUBO: 1492 case ISD::USUBO: 1493 case ISD::SMULO: 1494 case ISD::UMULO: 1495 if (Op.getResNo() != 1) 1496 return; 1497 // The boolean result conforms to getBooleanContents. Fall through. 1498 case ISD::SETCC: 1499 // If we know the result of a setcc has the top bits zero, use this info. 1500 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1501 BitWidth > 1) 1502 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1503 return; 1504 case ISD::SHL: 1505 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1506 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1507 unsigned ShAmt = SA->getZExtValue(); 1508 1509 // If the shift count is an invalid immediate, don't do anything. 1510 if (ShAmt >= BitWidth) 1511 return; 1512 1513 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1514 KnownZero, KnownOne, Depth+1); 1515 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1516 KnownZero <<= ShAmt; 1517 KnownOne <<= ShAmt; 1518 // low bits known zero. 1519 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1520 } 1521 return; 1522 case ISD::SRL: 1523 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1524 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1525 unsigned ShAmt = SA->getZExtValue(); 1526 1527 // If the shift count is an invalid immediate, don't do anything. 1528 if (ShAmt >= BitWidth) 1529 return; 1530 1531 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1532 KnownZero, KnownOne, Depth+1); 1533 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1534 KnownZero = KnownZero.lshr(ShAmt); 1535 KnownOne = KnownOne.lshr(ShAmt); 1536 1537 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1538 KnownZero |= HighBits; // High bits known zero. 1539 } 1540 return; 1541 case ISD::SRA: 1542 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1543 unsigned ShAmt = SA->getZExtValue(); 1544 1545 // If the shift count is an invalid immediate, don't do anything. 1546 if (ShAmt >= BitWidth) 1547 return; 1548 1549 APInt InDemandedMask = (Mask << ShAmt); 1550 // If any of the demanded bits are produced by the sign extension, we also 1551 // demand the input sign bit. 1552 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1553 if (HighBits.getBoolValue()) 1554 InDemandedMask |= APInt::getSignBit(BitWidth); 1555 1556 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1557 Depth+1); 1558 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1559 KnownZero = KnownZero.lshr(ShAmt); 1560 KnownOne = KnownOne.lshr(ShAmt); 1561 1562 // Handle the sign bits. 1563 APInt SignBit = APInt::getSignBit(BitWidth); 1564 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1565 1566 if (KnownZero.intersects(SignBit)) { 1567 KnownZero |= HighBits; // New bits are known zero. 1568 } else if (KnownOne.intersects(SignBit)) { 1569 KnownOne |= HighBits; // New bits are known one. 1570 } 1571 } 1572 return; 1573 case ISD::SIGN_EXTEND_INREG: { 1574 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1575 unsigned EBits = EVT.getSizeInBits(); 1576 1577 // Sign extension. Compute the demanded bits in the result that are not 1578 // present in the input. 1579 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1580 1581 APInt InSignBit = APInt::getSignBit(EBits); 1582 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1583 1584 // If the sign extended bits are demanded, we know that the sign 1585 // bit is demanded. 1586 InSignBit.zext(BitWidth); 1587 if (NewBits.getBoolValue()) 1588 InputDemandedBits |= InSignBit; 1589 1590 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1591 KnownZero, KnownOne, Depth+1); 1592 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1593 1594 // If the sign bit of the input is known set or clear, then we know the 1595 // top bits of the result. 1596 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1597 KnownZero |= NewBits; 1598 KnownOne &= ~NewBits; 1599 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1600 KnownOne |= NewBits; 1601 KnownZero &= ~NewBits; 1602 } else { // Input sign bit unknown 1603 KnownZero &= ~NewBits; 1604 KnownOne &= ~NewBits; 1605 } 1606 return; 1607 } 1608 case ISD::CTTZ: 1609 case ISD::CTLZ: 1610 case ISD::CTPOP: { 1611 unsigned LowBits = Log2_32(BitWidth)+1; 1612 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1613 KnownOne.clear(); 1614 return; 1615 } 1616 case ISD::LOAD: { 1617 if (ISD::isZEXTLoad(Op.getNode())) { 1618 LoadSDNode *LD = cast<LoadSDNode>(Op); 1619 MVT VT = LD->getMemoryVT(); 1620 unsigned MemBits = VT.getSizeInBits(); 1621 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1622 } 1623 return; 1624 } 1625 case ISD::ZERO_EXTEND: { 1626 MVT InVT = Op.getOperand(0).getValueType(); 1627 unsigned InBits = InVT.getSizeInBits(); 1628 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1629 APInt InMask = Mask; 1630 InMask.trunc(InBits); 1631 KnownZero.trunc(InBits); 1632 KnownOne.trunc(InBits); 1633 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1634 KnownZero.zext(BitWidth); 1635 KnownOne.zext(BitWidth); 1636 KnownZero |= NewBits; 1637 return; 1638 } 1639 case ISD::SIGN_EXTEND: { 1640 MVT InVT = Op.getOperand(0).getValueType(); 1641 unsigned InBits = InVT.getSizeInBits(); 1642 APInt InSignBit = APInt::getSignBit(InBits); 1643 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1644 APInt InMask = Mask; 1645 InMask.trunc(InBits); 1646 1647 // If any of the sign extended bits are demanded, we know that the sign 1648 // bit is demanded. Temporarily set this bit in the mask for our callee. 1649 if (NewBits.getBoolValue()) 1650 InMask |= InSignBit; 1651 1652 KnownZero.trunc(InBits); 1653 KnownOne.trunc(InBits); 1654 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1655 1656 // Note if the sign bit is known to be zero or one. 1657 bool SignBitKnownZero = KnownZero.isNegative(); 1658 bool SignBitKnownOne = KnownOne.isNegative(); 1659 assert(!(SignBitKnownZero && SignBitKnownOne) && 1660 "Sign bit can't be known to be both zero and one!"); 1661 1662 // If the sign bit wasn't actually demanded by our caller, we don't 1663 // want it set in the KnownZero and KnownOne result values. Reset the 1664 // mask and reapply it to the result values. 1665 InMask = Mask; 1666 InMask.trunc(InBits); 1667 KnownZero &= InMask; 1668 KnownOne &= InMask; 1669 1670 KnownZero.zext(BitWidth); 1671 KnownOne.zext(BitWidth); 1672 1673 // If the sign bit is known zero or one, the top bits match. 1674 if (SignBitKnownZero) 1675 KnownZero |= NewBits; 1676 else if (SignBitKnownOne) 1677 KnownOne |= NewBits; 1678 return; 1679 } 1680 case ISD::ANY_EXTEND: { 1681 MVT InVT = Op.getOperand(0).getValueType(); 1682 unsigned InBits = InVT.getSizeInBits(); 1683 APInt InMask = Mask; 1684 InMask.trunc(InBits); 1685 KnownZero.trunc(InBits); 1686 KnownOne.trunc(InBits); 1687 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1688 KnownZero.zext(BitWidth); 1689 KnownOne.zext(BitWidth); 1690 return; 1691 } 1692 case ISD::TRUNCATE: { 1693 MVT InVT = Op.getOperand(0).getValueType(); 1694 unsigned InBits = InVT.getSizeInBits(); 1695 APInt InMask = Mask; 1696 InMask.zext(InBits); 1697 KnownZero.zext(InBits); 1698 KnownOne.zext(InBits); 1699 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1701 KnownZero.trunc(BitWidth); 1702 KnownOne.trunc(BitWidth); 1703 break; 1704 } 1705 case ISD::AssertZext: { 1706 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1707 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1708 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1709 KnownOne, Depth+1); 1710 KnownZero |= (~InMask) & Mask; 1711 return; 1712 } 1713 case ISD::FGETSIGN: 1714 // All bits are zero except the low bit. 1715 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1716 return; 1717 1718 case ISD::SUB: { 1719 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1720 // We know that the top bits of C-X are clear if X contains less bits 1721 // than C (i.e. no wrap-around can happen). For example, 20-X is 1722 // positive if we can prove that X is >= 0 and < 16. 1723 if (CLHS->getAPIntValue().isNonNegative()) { 1724 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1725 // NLZ can't be BitWidth with no sign bit 1726 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1727 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1728 Depth+1); 1729 1730 // If all of the MaskV bits are known to be zero, then we know the 1731 // output top bits are zero, because we now know that the output is 1732 // from [0-C]. 1733 if ((KnownZero2 & MaskV) == MaskV) { 1734 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1735 // Top bits known zero. 1736 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1737 } 1738 } 1739 } 1740 } 1741 // fall through 1742 case ISD::ADD: { 1743 // Output known-0 bits are known if clear or set in both the low clear bits 1744 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1745 // low 3 bits clear. 1746 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1747 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1748 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1749 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1750 1751 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1752 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1753 KnownZeroOut = std::min(KnownZeroOut, 1754 KnownZero2.countTrailingOnes()); 1755 1756 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1757 return; 1758 } 1759 case ISD::SREM: 1760 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1761 const APInt &RA = Rem->getAPIntValue(); 1762 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1763 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1764 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1765 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1766 1767 // If the sign bit of the first operand is zero, the sign bit of 1768 // the result is zero. If the first operand has no one bits below 1769 // the second operand's single 1 bit, its sign will be zero. 1770 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1771 KnownZero2 |= ~LowBits; 1772 1773 KnownZero |= KnownZero2 & Mask; 1774 1775 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1776 } 1777 } 1778 return; 1779 case ISD::UREM: { 1780 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1781 const APInt &RA = Rem->getAPIntValue(); 1782 if (RA.isPowerOf2()) { 1783 APInt LowBits = (RA - 1); 1784 APInt Mask2 = LowBits & Mask; 1785 KnownZero |= ~LowBits & Mask; 1786 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1787 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1788 break; 1789 } 1790 } 1791 1792 // Since the result is less than or equal to either operand, any leading 1793 // zero bits in either operand must also exist in the result. 1794 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1795 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1796 Depth+1); 1797 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1798 Depth+1); 1799 1800 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1801 KnownZero2.countLeadingOnes()); 1802 KnownOne.clear(); 1803 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1804 return; 1805 } 1806 default: 1807 // Allow the target to implement this method for its nodes. 1808 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1809 case ISD::INTRINSIC_WO_CHAIN: 1810 case ISD::INTRINSIC_W_CHAIN: 1811 case ISD::INTRINSIC_VOID: 1812 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1813 } 1814 return; 1815 } 1816} 1817 1818/// ComputeNumSignBits - Return the number of times the sign bit of the 1819/// register is replicated into the other bits. We know that at least 1 bit 1820/// is always equal to the sign bit (itself), but other cases can give us 1821/// information. For example, immediately after an "SRA X, 2", we know that 1822/// the top 3 bits are all equal to each other, so we return 3. 1823unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1824 MVT VT = Op.getValueType(); 1825 assert(VT.isInteger() && "Invalid VT!"); 1826 unsigned VTBits = VT.getSizeInBits(); 1827 unsigned Tmp, Tmp2; 1828 unsigned FirstAnswer = 1; 1829 1830 if (Depth == 6) 1831 return 1; // Limit search depth. 1832 1833 switch (Op.getOpcode()) { 1834 default: break; 1835 case ISD::AssertSext: 1836 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1837 return VTBits-Tmp+1; 1838 case ISD::AssertZext: 1839 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1840 return VTBits-Tmp; 1841 1842 case ISD::Constant: { 1843 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1844 // If negative, return # leading ones. 1845 if (Val.isNegative()) 1846 return Val.countLeadingOnes(); 1847 1848 // Return # leading zeros. 1849 return Val.countLeadingZeros(); 1850 } 1851 1852 case ISD::SIGN_EXTEND: 1853 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1854 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1855 1856 case ISD::SIGN_EXTEND_INREG: 1857 // Max of the input and what this extends. 1858 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1859 Tmp = VTBits-Tmp+1; 1860 1861 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1862 return std::max(Tmp, Tmp2); 1863 1864 case ISD::SRA: 1865 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1866 // SRA X, C -> adds C sign bits. 1867 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1868 Tmp += C->getZExtValue(); 1869 if (Tmp > VTBits) Tmp = VTBits; 1870 } 1871 return Tmp; 1872 case ISD::SHL: 1873 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1874 // shl destroys sign bits. 1875 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1876 if (C->getZExtValue() >= VTBits || // Bad shift. 1877 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1878 return Tmp - C->getZExtValue(); 1879 } 1880 break; 1881 case ISD::AND: 1882 case ISD::OR: 1883 case ISD::XOR: // NOT is handled here. 1884 // Logical binary ops preserve the number of sign bits at the worst. 1885 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1886 if (Tmp != 1) { 1887 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1888 FirstAnswer = std::min(Tmp, Tmp2); 1889 // We computed what we know about the sign bits as our first 1890 // answer. Now proceed to the generic code that uses 1891 // ComputeMaskedBits, and pick whichever answer is better. 1892 } 1893 break; 1894 1895 case ISD::SELECT: 1896 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1897 if (Tmp == 1) return 1; // Early out. 1898 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1899 return std::min(Tmp, Tmp2); 1900 1901 case ISD::SADDO: 1902 case ISD::UADDO: 1903 case ISD::SSUBO: 1904 case ISD::USUBO: 1905 case ISD::SMULO: 1906 case ISD::UMULO: 1907 if (Op.getResNo() != 1) 1908 break; 1909 // The boolean result conforms to getBooleanContents. Fall through. 1910 case ISD::SETCC: 1911 // If setcc returns 0/-1, all bits are sign bits. 1912 if (TLI.getBooleanContents() == 1913 TargetLowering::ZeroOrNegativeOneBooleanContent) 1914 return VTBits; 1915 break; 1916 case ISD::ROTL: 1917 case ISD::ROTR: 1918 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1919 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 1920 1921 // Handle rotate right by N like a rotate left by 32-N. 1922 if (Op.getOpcode() == ISD::ROTR) 1923 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1924 1925 // If we aren't rotating out all of the known-in sign bits, return the 1926 // number that are left. This handles rotl(sext(x), 1) for example. 1927 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1928 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1929 } 1930 break; 1931 case ISD::ADD: 1932 // Add can have at most one carry bit. Thus we know that the output 1933 // is, at worst, one more bit than the inputs. 1934 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1935 if (Tmp == 1) return 1; // Early out. 1936 1937 // Special case decrementing a value (ADD X, -1): 1938 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1939 if (CRHS->isAllOnesValue()) { 1940 APInt KnownZero, KnownOne; 1941 APInt Mask = APInt::getAllOnesValue(VTBits); 1942 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1943 1944 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1945 // sign bits set. 1946 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1947 return VTBits; 1948 1949 // If we are subtracting one from a positive number, there is no carry 1950 // out of the result. 1951 if (KnownZero.isNegative()) 1952 return Tmp; 1953 } 1954 1955 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1956 if (Tmp2 == 1) return 1; 1957 return std::min(Tmp, Tmp2)-1; 1958 break; 1959 1960 case ISD::SUB: 1961 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1962 if (Tmp2 == 1) return 1; 1963 1964 // Handle NEG. 1965 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1966 if (CLHS->isNullValue()) { 1967 APInt KnownZero, KnownOne; 1968 APInt Mask = APInt::getAllOnesValue(VTBits); 1969 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1970 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1971 // sign bits set. 1972 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1973 return VTBits; 1974 1975 // If the input is known to be positive (the sign bit is known clear), 1976 // the output of the NEG has the same number of sign bits as the input. 1977 if (KnownZero.isNegative()) 1978 return Tmp2; 1979 1980 // Otherwise, we treat this like a SUB. 1981 } 1982 1983 // Sub can have at most one carry bit. Thus we know that the output 1984 // is, at worst, one more bit than the inputs. 1985 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1986 if (Tmp == 1) return 1; // Early out. 1987 return std::min(Tmp, Tmp2)-1; 1988 break; 1989 case ISD::TRUNCATE: 1990 // FIXME: it's tricky to do anything useful for this, but it is an important 1991 // case for targets like X86. 1992 break; 1993 } 1994 1995 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1996 if (Op.getOpcode() == ISD::LOAD) { 1997 LoadSDNode *LD = cast<LoadSDNode>(Op); 1998 unsigned ExtType = LD->getExtensionType(); 1999 switch (ExtType) { 2000 default: break; 2001 case ISD::SEXTLOAD: // '17' bits known 2002 Tmp = LD->getMemoryVT().getSizeInBits(); 2003 return VTBits-Tmp+1; 2004 case ISD::ZEXTLOAD: // '16' bits known 2005 Tmp = LD->getMemoryVT().getSizeInBits(); 2006 return VTBits-Tmp; 2007 } 2008 } 2009 2010 // Allow the target to implement this method for its nodes. 2011 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2012 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2013 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2014 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2015 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2016 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2017 } 2018 2019 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2020 // use this information. 2021 APInt KnownZero, KnownOne; 2022 APInt Mask = APInt::getAllOnesValue(VTBits); 2023 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2024 2025 if (KnownZero.isNegative()) { // sign bit is 0 2026 Mask = KnownZero; 2027 } else if (KnownOne.isNegative()) { // sign bit is 1; 2028 Mask = KnownOne; 2029 } else { 2030 // Nothing known. 2031 return FirstAnswer; 2032 } 2033 2034 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2035 // the number of identical bits in the top of the input value. 2036 Mask = ~Mask; 2037 Mask <<= Mask.getBitWidth()-VTBits; 2038 // Return # leading zeros. We use 'min' here in case Val was zero before 2039 // shifting. We don't want to return '64' as for an i32 "0". 2040 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2041} 2042 2043 2044bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2045 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2046 if (!GA) return false; 2047 if (GA->getOffset() != 0) return false; 2048 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2049 if (!GV) return false; 2050 MachineModuleInfo *MMI = getMachineModuleInfo(); 2051 return MMI && MMI->hasDebugInfo(); 2052} 2053 2054 2055/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2056/// element of the result of the vector shuffle. 2057SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2058 MVT VT = N->getValueType(0); 2059 SDValue PermMask = N->getOperand(2); 2060 SDValue Idx = PermMask.getOperand(i); 2061 if (Idx.getOpcode() == ISD::UNDEF) 2062 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2063 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2064 unsigned NumElems = PermMask.getNumOperands(); 2065 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2066 Index %= NumElems; 2067 2068 if (V.getOpcode() == ISD::BIT_CONVERT) { 2069 V = V.getOperand(0); 2070 MVT VVT = V.getValueType(); 2071 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems) 2072 return SDValue(); 2073 } 2074 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2075 return (Index == 0) ? V.getOperand(0) 2076 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2077 if (V.getOpcode() == ISD::BUILD_VECTOR) 2078 return V.getOperand(Index); 2079 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2080 return getShuffleScalarElt(V.getNode(), Index); 2081 return SDValue(); 2082} 2083 2084 2085/// getNode - Gets or creates the specified node. 2086/// 2087SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2088 FoldingSetNodeID ID; 2089 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2090 void *IP = 0; 2091 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2092 return SDValue(E, 0); 2093 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2094 new (N) SDNode(Opcode, SDNode::getSDVTList(VT)); 2095 CSEMap.InsertNode(N, IP); 2096 2097 AllNodes.push_back(N); 2098#ifndef NDEBUG 2099 VerifyNode(N); 2100#endif 2101 return SDValue(N, 0); 2102} 2103 2104SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2105 // Constant fold unary operations with an integer constant operand. 2106 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2107 const APInt &Val = C->getAPIntValue(); 2108 unsigned BitWidth = VT.getSizeInBits(); 2109 switch (Opcode) { 2110 default: break; 2111 case ISD::SIGN_EXTEND: 2112 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2113 case ISD::ANY_EXTEND: 2114 case ISD::ZERO_EXTEND: 2115 case ISD::TRUNCATE: 2116 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2117 case ISD::UINT_TO_FP: 2118 case ISD::SINT_TO_FP: { 2119 const uint64_t zero[] = {0, 0}; 2120 // No compile time operations on this type. 2121 if (VT==MVT::ppcf128) 2122 break; 2123 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2124 (void)apf.convertFromAPInt(Val, 2125 Opcode==ISD::SINT_TO_FP, 2126 APFloat::rmNearestTiesToEven); 2127 return getConstantFP(apf, VT); 2128 } 2129 case ISD::BIT_CONVERT: 2130 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2131 return getConstantFP(Val.bitsToFloat(), VT); 2132 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2133 return getConstantFP(Val.bitsToDouble(), VT); 2134 break; 2135 case ISD::BSWAP: 2136 return getConstant(Val.byteSwap(), VT); 2137 case ISD::CTPOP: 2138 return getConstant(Val.countPopulation(), VT); 2139 case ISD::CTLZ: 2140 return getConstant(Val.countLeadingZeros(), VT); 2141 case ISD::CTTZ: 2142 return getConstant(Val.countTrailingZeros(), VT); 2143 } 2144 } 2145 2146 // Constant fold unary operations with a floating point constant operand. 2147 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2148 APFloat V = C->getValueAPF(); // make copy 2149 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2150 switch (Opcode) { 2151 case ISD::FNEG: 2152 V.changeSign(); 2153 return getConstantFP(V, VT); 2154 case ISD::FABS: 2155 V.clearSign(); 2156 return getConstantFP(V, VT); 2157 case ISD::FP_ROUND: 2158 case ISD::FP_EXTEND: { 2159 bool ignored; 2160 // This can return overflow, underflow, or inexact; we don't care. 2161 // FIXME need to be more flexible about rounding mode. 2162 (void)V.convert(*MVTToAPFloatSemantics(VT), 2163 APFloat::rmNearestTiesToEven, &ignored); 2164 return getConstantFP(V, VT); 2165 } 2166 case ISD::FP_TO_SINT: 2167 case ISD::FP_TO_UINT: { 2168 integerPart x; 2169 bool ignored; 2170 assert(integerPartWidth >= 64); 2171 // FIXME need to be more flexible about rounding mode. 2172 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2173 Opcode==ISD::FP_TO_SINT, 2174 APFloat::rmTowardZero, &ignored); 2175 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2176 break; 2177 return getConstant(x, VT); 2178 } 2179 case ISD::BIT_CONVERT: 2180 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2181 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2182 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2183 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2184 break; 2185 } 2186 } 2187 } 2188 2189 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2190 switch (Opcode) { 2191 case ISD::TokenFactor: 2192 case ISD::MERGE_VALUES: 2193 case ISD::CONCAT_VECTORS: 2194 return Operand; // Factor, merge or concat of one node? No need. 2195 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2196 case ISD::FP_EXTEND: 2197 assert(VT.isFloatingPoint() && 2198 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2199 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2200 if (Operand.getOpcode() == ISD::UNDEF) 2201 return getNode(ISD::UNDEF, VT); 2202 break; 2203 case ISD::SIGN_EXTEND: 2204 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2205 "Invalid SIGN_EXTEND!"); 2206 if (Operand.getValueType() == VT) return Operand; // noop extension 2207 assert(Operand.getValueType().bitsLT(VT) 2208 && "Invalid sext node, dst < src!"); 2209 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2210 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2211 break; 2212 case ISD::ZERO_EXTEND: 2213 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2214 "Invalid ZERO_EXTEND!"); 2215 if (Operand.getValueType() == VT) return Operand; // noop extension 2216 assert(Operand.getValueType().bitsLT(VT) 2217 && "Invalid zext node, dst < src!"); 2218 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2219 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2220 break; 2221 case ISD::ANY_EXTEND: 2222 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2223 "Invalid ANY_EXTEND!"); 2224 if (Operand.getValueType() == VT) return Operand; // noop extension 2225 assert(Operand.getValueType().bitsLT(VT) 2226 && "Invalid anyext node, dst < src!"); 2227 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2228 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2229 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2230 break; 2231 case ISD::TRUNCATE: 2232 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2233 "Invalid TRUNCATE!"); 2234 if (Operand.getValueType() == VT) return Operand; // noop truncate 2235 assert(Operand.getValueType().bitsGT(VT) 2236 && "Invalid truncate node, src < dst!"); 2237 if (OpOpcode == ISD::TRUNCATE) 2238 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2239 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2240 OpOpcode == ISD::ANY_EXTEND) { 2241 // If the source is smaller than the dest, we still need an extend. 2242 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2243 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2244 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2245 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2246 else 2247 return Operand.getNode()->getOperand(0); 2248 } 2249 break; 2250 case ISD::BIT_CONVERT: 2251 // Basic sanity checking. 2252 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2253 && "Cannot BIT_CONVERT between types of different sizes!"); 2254 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2255 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2256 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2257 if (OpOpcode == ISD::UNDEF) 2258 return getNode(ISD::UNDEF, VT); 2259 break; 2260 case ISD::SCALAR_TO_VECTOR: 2261 assert(VT.isVector() && !Operand.getValueType().isVector() && 2262 VT.getVectorElementType() == Operand.getValueType() && 2263 "Illegal SCALAR_TO_VECTOR node!"); 2264 if (OpOpcode == ISD::UNDEF) 2265 return getNode(ISD::UNDEF, VT); 2266 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2267 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2268 isa<ConstantSDNode>(Operand.getOperand(1)) && 2269 Operand.getConstantOperandVal(1) == 0 && 2270 Operand.getOperand(0).getValueType() == VT) 2271 return Operand.getOperand(0); 2272 break; 2273 case ISD::FNEG: 2274 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2275 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2276 Operand.getNode()->getOperand(0)); 2277 if (OpOpcode == ISD::FNEG) // --X -> X 2278 return Operand.getNode()->getOperand(0); 2279 break; 2280 case ISD::FABS: 2281 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2282 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2283 break; 2284 } 2285 2286 SDNode *N; 2287 SDVTList VTs = getVTList(VT); 2288 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2289 FoldingSetNodeID ID; 2290 SDValue Ops[1] = { Operand }; 2291 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2292 void *IP = 0; 2293 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2294 return SDValue(E, 0); 2295 N = NodeAllocator.Allocate<UnarySDNode>(); 2296 new (N) UnarySDNode(Opcode, VTs, Operand); 2297 CSEMap.InsertNode(N, IP); 2298 } else { 2299 N = NodeAllocator.Allocate<UnarySDNode>(); 2300 new (N) UnarySDNode(Opcode, VTs, Operand); 2301 } 2302 2303 AllNodes.push_back(N); 2304#ifndef NDEBUG 2305 VerifyNode(N); 2306#endif 2307 return SDValue(N, 0); 2308} 2309 2310SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2311 MVT VT, 2312 ConstantSDNode *Cst1, 2313 ConstantSDNode *Cst2) { 2314 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2315 2316 switch (Opcode) { 2317 case ISD::ADD: return getConstant(C1 + C2, VT); 2318 case ISD::SUB: return getConstant(C1 - C2, VT); 2319 case ISD::MUL: return getConstant(C1 * C2, VT); 2320 case ISD::UDIV: 2321 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2322 break; 2323 case ISD::UREM: 2324 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2325 break; 2326 case ISD::SDIV: 2327 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2328 break; 2329 case ISD::SREM: 2330 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2331 break; 2332 case ISD::AND: return getConstant(C1 & C2, VT); 2333 case ISD::OR: return getConstant(C1 | C2, VT); 2334 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2335 case ISD::SHL: return getConstant(C1 << C2, VT); 2336 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2337 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2338 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2339 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2340 default: break; 2341 } 2342 2343 return SDValue(); 2344} 2345 2346SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2347 SDValue N1, SDValue N2) { 2348 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2349 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2350 switch (Opcode) { 2351 default: break; 2352 case ISD::TokenFactor: 2353 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2354 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2355 // Fold trivial token factors. 2356 if (N1.getOpcode() == ISD::EntryToken) return N2; 2357 if (N2.getOpcode() == ISD::EntryToken) return N1; 2358 if (N1 == N2) return N1; 2359 break; 2360 case ISD::CONCAT_VECTORS: 2361 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2362 // one big BUILD_VECTOR. 2363 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2364 N2.getOpcode() == ISD::BUILD_VECTOR) { 2365 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2366 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2367 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2368 } 2369 break; 2370 case ISD::AND: 2371 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2372 N1.getValueType() == VT && "Binary operator types must match!"); 2373 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2374 // worth handling here. 2375 if (N2C && N2C->isNullValue()) 2376 return N2; 2377 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2378 return N1; 2379 break; 2380 case ISD::OR: 2381 case ISD::XOR: 2382 case ISD::ADD: 2383 case ISD::SUB: 2384 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2385 N1.getValueType() == VT && "Binary operator types must match!"); 2386 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2387 // it's worth handling here. 2388 if (N2C && N2C->isNullValue()) 2389 return N1; 2390 break; 2391 case ISD::UDIV: 2392 case ISD::UREM: 2393 case ISD::MULHU: 2394 case ISD::MULHS: 2395 case ISD::MUL: 2396 case ISD::SDIV: 2397 case ISD::SREM: 2398 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2399 // fall through 2400 case ISD::FADD: 2401 case ISD::FSUB: 2402 case ISD::FMUL: 2403 case ISD::FDIV: 2404 case ISD::FREM: 2405 if (UnsafeFPMath && Opcode == ISD::FADD) { 2406 // 0+x --> x 2407 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2408 if (CFP->getValueAPF().isZero()) 2409 return N2; 2410 // x+0 --> x 2411 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2412 if (CFP->getValueAPF().isZero()) 2413 return N1; 2414 } 2415 assert(N1.getValueType() == N2.getValueType() && 2416 N1.getValueType() == VT && "Binary operator types must match!"); 2417 break; 2418 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2419 assert(N1.getValueType() == VT && 2420 N1.getValueType().isFloatingPoint() && 2421 N2.getValueType().isFloatingPoint() && 2422 "Invalid FCOPYSIGN!"); 2423 break; 2424 case ISD::SHL: 2425 case ISD::SRA: 2426 case ISD::SRL: 2427 case ISD::ROTL: 2428 case ISD::ROTR: 2429 assert(VT == N1.getValueType() && 2430 "Shift operators return type must be the same as their first arg"); 2431 assert(VT.isInteger() && N2.getValueType().isInteger() && 2432 "Shifts only work on integers"); 2433 assert((N2.getValueType() == TLI.getShiftAmountTy() || 2434 (N2.getValueType().isVector() && N2.getValueType().isInteger())) && 2435 "Wrong type for shift amount"); 2436 2437 // Always fold shifts of i1 values so the code generator doesn't need to 2438 // handle them. Since we know the size of the shift has to be less than the 2439 // size of the value, the shift/rotate count is guaranteed to be zero. 2440 if (VT == MVT::i1) 2441 return N1; 2442 break; 2443 case ISD::FP_ROUND_INREG: { 2444 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2445 assert(VT == N1.getValueType() && "Not an inreg round!"); 2446 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2447 "Cannot FP_ROUND_INREG integer types"); 2448 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2449 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2450 break; 2451 } 2452 case ISD::FP_ROUND: 2453 assert(VT.isFloatingPoint() && 2454 N1.getValueType().isFloatingPoint() && 2455 VT.bitsLE(N1.getValueType()) && 2456 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2457 if (N1.getValueType() == VT) return N1; // noop conversion. 2458 break; 2459 case ISD::AssertSext: 2460 case ISD::AssertZext: { 2461 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2462 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2463 assert(VT.isInteger() && EVT.isInteger() && 2464 "Cannot *_EXTEND_INREG FP types"); 2465 assert(EVT.bitsLE(VT) && "Not extending!"); 2466 if (VT == EVT) return N1; // noop assertion. 2467 break; 2468 } 2469 case ISD::SIGN_EXTEND_INREG: { 2470 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2471 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2472 assert(VT.isInteger() && EVT.isInteger() && 2473 "Cannot *_EXTEND_INREG FP types"); 2474 assert(EVT.bitsLE(VT) && "Not extending!"); 2475 if (EVT == VT) return N1; // Not actually extending 2476 2477 if (N1C) { 2478 APInt Val = N1C->getAPIntValue(); 2479 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2480 Val <<= Val.getBitWidth()-FromBits; 2481 Val = Val.ashr(Val.getBitWidth()-FromBits); 2482 return getConstant(Val, VT); 2483 } 2484 break; 2485 } 2486 case ISD::EXTRACT_VECTOR_ELT: 2487 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2488 if (N1.getOpcode() == ISD::UNDEF) 2489 return getNode(ISD::UNDEF, VT); 2490 2491 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2492 // expanding copies of large vectors from registers. 2493 if (N2C && 2494 N1.getOpcode() == ISD::CONCAT_VECTORS && 2495 N1.getNumOperands() > 0) { 2496 unsigned Factor = 2497 N1.getOperand(0).getValueType().getVectorNumElements(); 2498 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2499 N1.getOperand(N2C->getZExtValue() / Factor), 2500 getConstant(N2C->getZExtValue() % Factor, 2501 N2.getValueType())); 2502 } 2503 2504 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2505 // expanding large vector constants. 2506 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2507 return N1.getOperand(N2C->getZExtValue()); 2508 2509 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2510 // operations are lowered to scalars. 2511 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2512 if (N1.getOperand(2) == N2) 2513 return N1.getOperand(1); 2514 else 2515 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2516 } 2517 break; 2518 case ISD::EXTRACT_ELEMENT: 2519 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2520 assert(!N1.getValueType().isVector() && !VT.isVector() && 2521 (N1.getValueType().isInteger() == VT.isInteger()) && 2522 "Wrong types for EXTRACT_ELEMENT!"); 2523 2524 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2525 // 64-bit integers into 32-bit parts. Instead of building the extract of 2526 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2527 if (N1.getOpcode() == ISD::BUILD_PAIR) 2528 return N1.getOperand(N2C->getZExtValue()); 2529 2530 // EXTRACT_ELEMENT of a constant int is also very common. 2531 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2532 unsigned ElementSize = VT.getSizeInBits(); 2533 unsigned Shift = ElementSize * N2C->getZExtValue(); 2534 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2535 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2536 } 2537 break; 2538 case ISD::EXTRACT_SUBVECTOR: 2539 if (N1.getValueType() == VT) // Trivial extraction. 2540 return N1; 2541 break; 2542 } 2543 2544 if (N1C) { 2545 if (N2C) { 2546 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2547 if (SV.getNode()) return SV; 2548 } else { // Cannonicalize constant to RHS if commutative 2549 if (isCommutativeBinOp(Opcode)) { 2550 std::swap(N1C, N2C); 2551 std::swap(N1, N2); 2552 } 2553 } 2554 } 2555 2556 // Constant fold FP operations. 2557 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2558 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2559 if (N1CFP) { 2560 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2561 // Cannonicalize constant to RHS if commutative 2562 std::swap(N1CFP, N2CFP); 2563 std::swap(N1, N2); 2564 } else if (N2CFP && VT != MVT::ppcf128) { 2565 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2566 APFloat::opStatus s; 2567 switch (Opcode) { 2568 case ISD::FADD: 2569 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2570 if (s != APFloat::opInvalidOp) 2571 return getConstantFP(V1, VT); 2572 break; 2573 case ISD::FSUB: 2574 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2575 if (s!=APFloat::opInvalidOp) 2576 return getConstantFP(V1, VT); 2577 break; 2578 case ISD::FMUL: 2579 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2580 if (s!=APFloat::opInvalidOp) 2581 return getConstantFP(V1, VT); 2582 break; 2583 case ISD::FDIV: 2584 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2585 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2586 return getConstantFP(V1, VT); 2587 break; 2588 case ISD::FREM : 2589 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2590 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2591 return getConstantFP(V1, VT); 2592 break; 2593 case ISD::FCOPYSIGN: 2594 V1.copySign(V2); 2595 return getConstantFP(V1, VT); 2596 default: break; 2597 } 2598 } 2599 } 2600 2601 // Canonicalize an UNDEF to the RHS, even over a constant. 2602 if (N1.getOpcode() == ISD::UNDEF) { 2603 if (isCommutativeBinOp(Opcode)) { 2604 std::swap(N1, N2); 2605 } else { 2606 switch (Opcode) { 2607 case ISD::FP_ROUND_INREG: 2608 case ISD::SIGN_EXTEND_INREG: 2609 case ISD::SUB: 2610 case ISD::FSUB: 2611 case ISD::FDIV: 2612 case ISD::FREM: 2613 case ISD::SRA: 2614 return N1; // fold op(undef, arg2) -> undef 2615 case ISD::UDIV: 2616 case ISD::SDIV: 2617 case ISD::UREM: 2618 case ISD::SREM: 2619 case ISD::SRL: 2620 case ISD::SHL: 2621 if (!VT.isVector()) 2622 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2623 // For vectors, we can't easily build an all zero vector, just return 2624 // the LHS. 2625 return N2; 2626 } 2627 } 2628 } 2629 2630 // Fold a bunch of operators when the RHS is undef. 2631 if (N2.getOpcode() == ISD::UNDEF) { 2632 switch (Opcode) { 2633 case ISD::XOR: 2634 if (N1.getOpcode() == ISD::UNDEF) 2635 // Handle undef ^ undef -> 0 special case. This is a common 2636 // idiom (misuse). 2637 return getConstant(0, VT); 2638 // fallthrough 2639 case ISD::ADD: 2640 case ISD::ADDC: 2641 case ISD::ADDE: 2642 case ISD::SUB: 2643 case ISD::FADD: 2644 case ISD::FSUB: 2645 case ISD::FMUL: 2646 case ISD::FDIV: 2647 case ISD::FREM: 2648 case ISD::UDIV: 2649 case ISD::SDIV: 2650 case ISD::UREM: 2651 case ISD::SREM: 2652 return N2; // fold op(arg1, undef) -> undef 2653 case ISD::MUL: 2654 case ISD::AND: 2655 case ISD::SRL: 2656 case ISD::SHL: 2657 if (!VT.isVector()) 2658 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2659 // For vectors, we can't easily build an all zero vector, just return 2660 // the LHS. 2661 return N1; 2662 case ISD::OR: 2663 if (!VT.isVector()) 2664 return getConstant(VT.getIntegerVTBitMask(), VT); 2665 // For vectors, we can't easily build an all one vector, just return 2666 // the LHS. 2667 return N1; 2668 case ISD::SRA: 2669 return N1; 2670 } 2671 } 2672 2673 // Memoize this node if possible. 2674 SDNode *N; 2675 SDVTList VTs = getVTList(VT); 2676 if (VT != MVT::Flag) { 2677 SDValue Ops[] = { N1, N2 }; 2678 FoldingSetNodeID ID; 2679 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2680 void *IP = 0; 2681 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2682 return SDValue(E, 0); 2683 N = NodeAllocator.Allocate<BinarySDNode>(); 2684 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2685 CSEMap.InsertNode(N, IP); 2686 } else { 2687 N = NodeAllocator.Allocate<BinarySDNode>(); 2688 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2689 } 2690 2691 AllNodes.push_back(N); 2692#ifndef NDEBUG 2693 VerifyNode(N); 2694#endif 2695 return SDValue(N, 0); 2696} 2697 2698SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2699 SDValue N1, SDValue N2, SDValue N3) { 2700 // Perform various simplifications. 2701 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2702 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2703 switch (Opcode) { 2704 case ISD::CONCAT_VECTORS: 2705 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2706 // one big BUILD_VECTOR. 2707 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2708 N2.getOpcode() == ISD::BUILD_VECTOR && 2709 N3.getOpcode() == ISD::BUILD_VECTOR) { 2710 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2711 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2712 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2713 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2714 } 2715 break; 2716 case ISD::SETCC: { 2717 // Use FoldSetCC to simplify SETCC's. 2718 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2719 if (Simp.getNode()) return Simp; 2720 break; 2721 } 2722 case ISD::SELECT: 2723 if (N1C) { 2724 if (N1C->getZExtValue()) 2725 return N2; // select true, X, Y -> X 2726 else 2727 return N3; // select false, X, Y -> Y 2728 } 2729 2730 if (N2 == N3) return N2; // select C, X, X -> X 2731 break; 2732 case ISD::BRCOND: 2733 if (N2C) { 2734 if (N2C->getZExtValue()) // Unconditional branch 2735 return getNode(ISD::BR, MVT::Other, N1, N3); 2736 else 2737 return N1; // Never-taken branch 2738 } 2739 break; 2740 case ISD::VECTOR_SHUFFLE: 2741 assert(N1.getValueType() == N2.getValueType() && 2742 N1.getValueType().isVector() && 2743 VT.isVector() && N3.getValueType().isVector() && 2744 N3.getOpcode() == ISD::BUILD_VECTOR && 2745 VT.getVectorNumElements() == N3.getNumOperands() && 2746 "Illegal VECTOR_SHUFFLE node!"); 2747 break; 2748 case ISD::BIT_CONVERT: 2749 // Fold bit_convert nodes from a type to themselves. 2750 if (N1.getValueType() == VT) 2751 return N1; 2752 break; 2753 } 2754 2755 // Memoize node if it doesn't produce a flag. 2756 SDNode *N; 2757 SDVTList VTs = getVTList(VT); 2758 if (VT != MVT::Flag) { 2759 SDValue Ops[] = { N1, N2, N3 }; 2760 FoldingSetNodeID ID; 2761 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2762 void *IP = 0; 2763 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2764 return SDValue(E, 0); 2765 N = NodeAllocator.Allocate<TernarySDNode>(); 2766 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2767 CSEMap.InsertNode(N, IP); 2768 } else { 2769 N = NodeAllocator.Allocate<TernarySDNode>(); 2770 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2771 } 2772 AllNodes.push_back(N); 2773#ifndef NDEBUG 2774 VerifyNode(N); 2775#endif 2776 return SDValue(N, 0); 2777} 2778 2779SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2780 SDValue N1, SDValue N2, SDValue N3, 2781 SDValue N4) { 2782 SDValue Ops[] = { N1, N2, N3, N4 }; 2783 return getNode(Opcode, VT, Ops, 4); 2784} 2785 2786SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2787 SDValue N1, SDValue N2, SDValue N3, 2788 SDValue N4, SDValue N5) { 2789 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2790 return getNode(Opcode, VT, Ops, 5); 2791} 2792 2793/// getMemsetValue - Vectorized representation of the memset value 2794/// operand. 2795static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2796 unsigned NumBits = VT.isVector() ? 2797 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2798 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2799 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2800 unsigned Shift = 8; 2801 for (unsigned i = NumBits; i > 8; i >>= 1) { 2802 Val = (Val << Shift) | Val; 2803 Shift <<= 1; 2804 } 2805 if (VT.isInteger()) 2806 return DAG.getConstant(Val, VT); 2807 return DAG.getConstantFP(APFloat(Val), VT); 2808 } 2809 2810 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2811 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2812 unsigned Shift = 8; 2813 for (unsigned i = NumBits; i > 8; i >>= 1) { 2814 Value = DAG.getNode(ISD::OR, VT, 2815 DAG.getNode(ISD::SHL, VT, Value, 2816 DAG.getConstant(Shift, 2817 TLI.getShiftAmountTy())), 2818 Value); 2819 Shift <<= 1; 2820 } 2821 2822 return Value; 2823} 2824 2825/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2826/// used when a memcpy is turned into a memset when the source is a constant 2827/// string ptr. 2828static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2829 const TargetLowering &TLI, 2830 std::string &Str, unsigned Offset) { 2831 // Handle vector with all elements zero. 2832 if (Str.empty()) { 2833 if (VT.isInteger()) 2834 return DAG.getConstant(0, VT); 2835 unsigned NumElts = VT.getVectorNumElements(); 2836 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2837 return DAG.getNode(ISD::BIT_CONVERT, VT, 2838 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2839 } 2840 2841 assert(!VT.isVector() && "Can't handle vector type here!"); 2842 unsigned NumBits = VT.getSizeInBits(); 2843 unsigned MSB = NumBits / 8; 2844 uint64_t Val = 0; 2845 if (TLI.isLittleEndian()) 2846 Offset = Offset + MSB - 1; 2847 for (unsigned i = 0; i != MSB; ++i) { 2848 Val = (Val << 8) | (unsigned char)Str[Offset]; 2849 Offset += TLI.isLittleEndian() ? -1 : 1; 2850 } 2851 return DAG.getConstant(Val, VT); 2852} 2853 2854/// getMemBasePlusOffset - Returns base and offset node for the 2855/// 2856static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2857 SelectionDAG &DAG) { 2858 MVT VT = Base.getValueType(); 2859 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2860} 2861 2862/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2863/// 2864static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2865 unsigned SrcDelta = 0; 2866 GlobalAddressSDNode *G = NULL; 2867 if (Src.getOpcode() == ISD::GlobalAddress) 2868 G = cast<GlobalAddressSDNode>(Src); 2869 else if (Src.getOpcode() == ISD::ADD && 2870 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2871 Src.getOperand(1).getOpcode() == ISD::Constant) { 2872 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2873 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 2874 } 2875 if (!G) 2876 return false; 2877 2878 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2879 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2880 return true; 2881 2882 return false; 2883} 2884 2885/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2886/// to replace the memset / memcpy is below the threshold. It also returns the 2887/// types of the sequence of memory ops to perform memset / memcpy. 2888static 2889bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2890 SDValue Dst, SDValue Src, 2891 unsigned Limit, uint64_t Size, unsigned &Align, 2892 std::string &Str, bool &isSrcStr, 2893 SelectionDAG &DAG, 2894 const TargetLowering &TLI) { 2895 isSrcStr = isMemSrcFromString(Src, Str); 2896 bool isSrcConst = isa<ConstantSDNode>(Src); 2897 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2898 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2899 if (VT != MVT::iAny) { 2900 unsigned NewAlign = (unsigned) 2901 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2902 // If source is a string constant, this will require an unaligned load. 2903 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2904 if (Dst.getOpcode() != ISD::FrameIndex) { 2905 // Can't change destination alignment. It requires a unaligned store. 2906 if (AllowUnalign) 2907 VT = MVT::iAny; 2908 } else { 2909 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2910 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2911 if (MFI->isFixedObjectIndex(FI)) { 2912 // Can't change destination alignment. It requires a unaligned store. 2913 if (AllowUnalign) 2914 VT = MVT::iAny; 2915 } else { 2916 // Give the stack frame object a larger alignment if needed. 2917 if (MFI->getObjectAlignment(FI) < NewAlign) 2918 MFI->setObjectAlignment(FI, NewAlign); 2919 Align = NewAlign; 2920 } 2921 } 2922 } 2923 } 2924 2925 if (VT == MVT::iAny) { 2926 if (AllowUnalign) { 2927 VT = MVT::i64; 2928 } else { 2929 switch (Align & 7) { 2930 case 0: VT = MVT::i64; break; 2931 case 4: VT = MVT::i32; break; 2932 case 2: VT = MVT::i16; break; 2933 default: VT = MVT::i8; break; 2934 } 2935 } 2936 2937 MVT LVT = MVT::i64; 2938 while (!TLI.isTypeLegal(LVT)) 2939 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2940 assert(LVT.isInteger()); 2941 2942 if (VT.bitsGT(LVT)) 2943 VT = LVT; 2944 } 2945 2946 unsigned NumMemOps = 0; 2947 while (Size != 0) { 2948 unsigned VTSize = VT.getSizeInBits() / 8; 2949 while (VTSize > Size) { 2950 // For now, only use non-vector load / store's for the left-over pieces. 2951 if (VT.isVector()) { 2952 VT = MVT::i64; 2953 while (!TLI.isTypeLegal(VT)) 2954 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2955 VTSize = VT.getSizeInBits() / 8; 2956 } else { 2957 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2958 VTSize >>= 1; 2959 } 2960 } 2961 2962 if (++NumMemOps > Limit) 2963 return false; 2964 MemOps.push_back(VT); 2965 Size -= VTSize; 2966 } 2967 2968 return true; 2969} 2970 2971static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 2972 SDValue Chain, SDValue Dst, 2973 SDValue Src, uint64_t Size, 2974 unsigned Align, bool AlwaysInline, 2975 const Value *DstSV, uint64_t DstSVOff, 2976 const Value *SrcSV, uint64_t SrcSVOff){ 2977 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2978 2979 // Expand memcpy to a series of load and store ops if the size operand falls 2980 // below a certain threshold. 2981 std::vector<MVT> MemOps; 2982 uint64_t Limit = -1ULL; 2983 if (!AlwaysInline) 2984 Limit = TLI.getMaxStoresPerMemcpy(); 2985 unsigned DstAlign = Align; // Destination alignment can change. 2986 std::string Str; 2987 bool CopyFromStr; 2988 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2989 Str, CopyFromStr, DAG, TLI)) 2990 return SDValue(); 2991 2992 2993 bool isZeroStr = CopyFromStr && Str.empty(); 2994 SmallVector<SDValue, 8> OutChains; 2995 unsigned NumMemOps = MemOps.size(); 2996 uint64_t SrcOff = 0, DstOff = 0; 2997 for (unsigned i = 0; i < NumMemOps; i++) { 2998 MVT VT = MemOps[i]; 2999 unsigned VTSize = VT.getSizeInBits() / 8; 3000 SDValue Value, Store; 3001 3002 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3003 // It's unlikely a store of a vector immediate can be done in a single 3004 // instruction. It would require a load from a constantpool first. 3005 // We also handle store a vector with all zero's. 3006 // FIXME: Handle other cases where store of vector immediate is done in 3007 // a single instruction. 3008 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 3009 Store = DAG.getStore(Chain, Value, 3010 getMemBasePlusOffset(Dst, DstOff, DAG), 3011 DstSV, DstSVOff + DstOff, false, DstAlign); 3012 } else { 3013 Value = DAG.getLoad(VT, Chain, 3014 getMemBasePlusOffset(Src, SrcOff, DAG), 3015 SrcSV, SrcSVOff + SrcOff, false, Align); 3016 Store = DAG.getStore(Chain, Value, 3017 getMemBasePlusOffset(Dst, DstOff, DAG), 3018 DstSV, DstSVOff + DstOff, false, DstAlign); 3019 } 3020 OutChains.push_back(Store); 3021 SrcOff += VTSize; 3022 DstOff += VTSize; 3023 } 3024 3025 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3026 &OutChains[0], OutChains.size()); 3027} 3028 3029static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 3030 SDValue Chain, SDValue Dst, 3031 SDValue Src, uint64_t Size, 3032 unsigned Align, bool AlwaysInline, 3033 const Value *DstSV, uint64_t DstSVOff, 3034 const Value *SrcSV, uint64_t SrcSVOff){ 3035 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3036 3037 // Expand memmove to a series of load and store ops if the size operand falls 3038 // below a certain threshold. 3039 std::vector<MVT> MemOps; 3040 uint64_t Limit = -1ULL; 3041 if (!AlwaysInline) 3042 Limit = TLI.getMaxStoresPerMemmove(); 3043 unsigned DstAlign = Align; // Destination alignment can change. 3044 std::string Str; 3045 bool CopyFromStr; 3046 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3047 Str, CopyFromStr, DAG, TLI)) 3048 return SDValue(); 3049 3050 uint64_t SrcOff = 0, DstOff = 0; 3051 3052 SmallVector<SDValue, 8> LoadValues; 3053 SmallVector<SDValue, 8> LoadChains; 3054 SmallVector<SDValue, 8> OutChains; 3055 unsigned NumMemOps = MemOps.size(); 3056 for (unsigned i = 0; i < NumMemOps; i++) { 3057 MVT VT = MemOps[i]; 3058 unsigned VTSize = VT.getSizeInBits() / 8; 3059 SDValue Value, Store; 3060 3061 Value = DAG.getLoad(VT, Chain, 3062 getMemBasePlusOffset(Src, SrcOff, DAG), 3063 SrcSV, SrcSVOff + SrcOff, false, Align); 3064 LoadValues.push_back(Value); 3065 LoadChains.push_back(Value.getValue(1)); 3066 SrcOff += VTSize; 3067 } 3068 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 3069 &LoadChains[0], LoadChains.size()); 3070 OutChains.clear(); 3071 for (unsigned i = 0; i < NumMemOps; i++) { 3072 MVT VT = MemOps[i]; 3073 unsigned VTSize = VT.getSizeInBits() / 8; 3074 SDValue Value, Store; 3075 3076 Store = DAG.getStore(Chain, LoadValues[i], 3077 getMemBasePlusOffset(Dst, DstOff, DAG), 3078 DstSV, DstSVOff + DstOff, false, DstAlign); 3079 OutChains.push_back(Store); 3080 DstOff += VTSize; 3081 } 3082 3083 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3084 &OutChains[0], OutChains.size()); 3085} 3086 3087static SDValue getMemsetStores(SelectionDAG &DAG, 3088 SDValue Chain, SDValue Dst, 3089 SDValue Src, uint64_t Size, 3090 unsigned Align, 3091 const Value *DstSV, uint64_t DstSVOff) { 3092 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3093 3094 // Expand memset to a series of load/store ops if the size operand 3095 // falls below a certain threshold. 3096 std::vector<MVT> MemOps; 3097 std::string Str; 3098 bool CopyFromStr; 3099 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3100 Size, Align, Str, CopyFromStr, DAG, TLI)) 3101 return SDValue(); 3102 3103 SmallVector<SDValue, 8> OutChains; 3104 uint64_t DstOff = 0; 3105 3106 unsigned NumMemOps = MemOps.size(); 3107 for (unsigned i = 0; i < NumMemOps; i++) { 3108 MVT VT = MemOps[i]; 3109 unsigned VTSize = VT.getSizeInBits() / 8; 3110 SDValue Value = getMemsetValue(Src, VT, DAG); 3111 SDValue Store = DAG.getStore(Chain, Value, 3112 getMemBasePlusOffset(Dst, DstOff, DAG), 3113 DstSV, DstSVOff + DstOff); 3114 OutChains.push_back(Store); 3115 DstOff += VTSize; 3116 } 3117 3118 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3119 &OutChains[0], OutChains.size()); 3120} 3121 3122SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3123 SDValue Src, SDValue Size, 3124 unsigned Align, bool AlwaysInline, 3125 const Value *DstSV, uint64_t DstSVOff, 3126 const Value *SrcSV, uint64_t SrcSVOff) { 3127 3128 // Check to see if we should lower the memcpy to loads and stores first. 3129 // For cases within the target-specified limits, this is the best choice. 3130 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3131 if (ConstantSize) { 3132 // Memcpy with size zero? Just return the original chain. 3133 if (ConstantSize->isNullValue()) 3134 return Chain; 3135 3136 SDValue Result = 3137 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3138 ConstantSize->getZExtValue(), 3139 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3140 if (Result.getNode()) 3141 return Result; 3142 } 3143 3144 // Then check to see if we should lower the memcpy with target-specific 3145 // code. If the target chooses to do this, this is the next best. 3146 SDValue Result = 3147 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3148 AlwaysInline, 3149 DstSV, DstSVOff, SrcSV, SrcSVOff); 3150 if (Result.getNode()) 3151 return Result; 3152 3153 // If we really need inline code and the target declined to provide it, 3154 // use a (potentially long) sequence of loads and stores. 3155 if (AlwaysInline) { 3156 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3157 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3158 ConstantSize->getZExtValue(), Align, true, 3159 DstSV, DstSVOff, SrcSV, SrcSVOff); 3160 } 3161 3162 // Emit a library call. 3163 TargetLowering::ArgListTy Args; 3164 TargetLowering::ArgListEntry Entry; 3165 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3166 Entry.Node = Dst; Args.push_back(Entry); 3167 Entry.Node = Src; Args.push_back(Entry); 3168 Entry.Node = Size; Args.push_back(Entry); 3169 std::pair<SDValue,SDValue> CallResult = 3170 TLI.LowerCallTo(Chain, Type::VoidTy, 3171 false, false, false, false, CallingConv::C, false, 3172 getExternalSymbol("memcpy", TLI.getPointerTy()), 3173 Args, *this); 3174 return CallResult.second; 3175} 3176 3177SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3178 SDValue Src, SDValue Size, 3179 unsigned Align, 3180 const Value *DstSV, uint64_t DstSVOff, 3181 const Value *SrcSV, uint64_t SrcSVOff) { 3182 3183 // Check to see if we should lower the memmove to loads and stores first. 3184 // For cases within the target-specified limits, this is the best choice. 3185 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3186 if (ConstantSize) { 3187 // Memmove with size zero? Just return the original chain. 3188 if (ConstantSize->isNullValue()) 3189 return Chain; 3190 3191 SDValue Result = 3192 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3193 ConstantSize->getZExtValue(), 3194 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3195 if (Result.getNode()) 3196 return Result; 3197 } 3198 3199 // Then check to see if we should lower the memmove with target-specific 3200 // code. If the target chooses to do this, this is the next best. 3201 SDValue Result = 3202 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3203 DstSV, DstSVOff, SrcSV, SrcSVOff); 3204 if (Result.getNode()) 3205 return Result; 3206 3207 // Emit a library call. 3208 TargetLowering::ArgListTy Args; 3209 TargetLowering::ArgListEntry Entry; 3210 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3211 Entry.Node = Dst; Args.push_back(Entry); 3212 Entry.Node = Src; Args.push_back(Entry); 3213 Entry.Node = Size; Args.push_back(Entry); 3214 std::pair<SDValue,SDValue> CallResult = 3215 TLI.LowerCallTo(Chain, Type::VoidTy, 3216 false, false, false, false, CallingConv::C, false, 3217 getExternalSymbol("memmove", TLI.getPointerTy()), 3218 Args, *this); 3219 return CallResult.second; 3220} 3221 3222SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3223 SDValue Src, SDValue Size, 3224 unsigned Align, 3225 const Value *DstSV, uint64_t DstSVOff) { 3226 3227 // Check to see if we should lower the memset to stores first. 3228 // For cases within the target-specified limits, this is the best choice. 3229 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3230 if (ConstantSize) { 3231 // Memset with size zero? Just return the original chain. 3232 if (ConstantSize->isNullValue()) 3233 return Chain; 3234 3235 SDValue Result = 3236 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3237 Align, DstSV, DstSVOff); 3238 if (Result.getNode()) 3239 return Result; 3240 } 3241 3242 // Then check to see if we should lower the memset with target-specific 3243 // code. If the target chooses to do this, this is the next best. 3244 SDValue Result = 3245 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3246 DstSV, DstSVOff); 3247 if (Result.getNode()) 3248 return Result; 3249 3250 // Emit a library call. 3251 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3252 TargetLowering::ArgListTy Args; 3253 TargetLowering::ArgListEntry Entry; 3254 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3255 Args.push_back(Entry); 3256 // Extend or truncate the argument to be an i32 value for the call. 3257 if (Src.getValueType().bitsGT(MVT::i32)) 3258 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3259 else 3260 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3261 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3262 Args.push_back(Entry); 3263 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3264 Args.push_back(Entry); 3265 std::pair<SDValue,SDValue> CallResult = 3266 TLI.LowerCallTo(Chain, Type::VoidTy, 3267 false, false, false, false, CallingConv::C, false, 3268 getExternalSymbol("memset", TLI.getPointerTy()), 3269 Args, *this); 3270 return CallResult.second; 3271} 3272 3273SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3274 SDValue Chain, 3275 SDValue Ptr, SDValue Cmp, 3276 SDValue Swp, const Value* PtrVal, 3277 unsigned Alignment) { 3278 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3279 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3280 3281 MVT VT = Cmp.getValueType(); 3282 3283 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3284 Alignment = getMVTAlignment(MemVT); 3285 3286 SDVTList VTs = getVTList(VT, MVT::Other); 3287 FoldingSetNodeID ID; 3288 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3289 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3290 void* IP = 0; 3291 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3292 return SDValue(E, 0); 3293 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3294 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3295 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3296 CSEMap.InsertNode(N, IP); 3297 AllNodes.push_back(N); 3298 return SDValue(N, 0); 3299} 3300 3301SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3302 SDValue Chain, 3303 SDValue Ptr, SDValue Val, 3304 const Value* PtrVal, 3305 unsigned Alignment) { 3306 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3307 Opcode == ISD::ATOMIC_LOAD_SUB || 3308 Opcode == ISD::ATOMIC_LOAD_AND || 3309 Opcode == ISD::ATOMIC_LOAD_OR || 3310 Opcode == ISD::ATOMIC_LOAD_XOR || 3311 Opcode == ISD::ATOMIC_LOAD_NAND || 3312 Opcode == ISD::ATOMIC_LOAD_MIN || 3313 Opcode == ISD::ATOMIC_LOAD_MAX || 3314 Opcode == ISD::ATOMIC_LOAD_UMIN || 3315 Opcode == ISD::ATOMIC_LOAD_UMAX || 3316 Opcode == ISD::ATOMIC_SWAP) && 3317 "Invalid Atomic Op"); 3318 3319 MVT VT = Val.getValueType(); 3320 3321 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3322 Alignment = getMVTAlignment(MemVT); 3323 3324 SDVTList VTs = getVTList(VT, MVT::Other); 3325 FoldingSetNodeID ID; 3326 SDValue Ops[] = {Chain, Ptr, Val}; 3327 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3328 void* IP = 0; 3329 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3330 return SDValue(E, 0); 3331 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3332 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3333 Chain, Ptr, Val, PtrVal, Alignment); 3334 CSEMap.InsertNode(N, IP); 3335 AllNodes.push_back(N); 3336 return SDValue(N, 0); 3337} 3338 3339/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3340/// Allowed to return something different (and simpler) if Simplify is true. 3341SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) { 3342 if (NumOps == 1) 3343 return Ops[0]; 3344 3345 SmallVector<MVT, 4> VTs; 3346 VTs.reserve(NumOps); 3347 for (unsigned i = 0; i < NumOps; ++i) 3348 VTs.push_back(Ops[i].getValueType()); 3349 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3350} 3351 3352SDValue 3353SelectionDAG::getMemIntrinsicNode(unsigned Opcode, 3354 const MVT *VTs, unsigned NumVTs, 3355 const SDValue *Ops, unsigned NumOps, 3356 MVT MemVT, const Value *srcValue, int SVOff, 3357 unsigned Align, bool Vol, 3358 bool ReadMem, bool WriteMem) { 3359 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps, 3360 MemVT, srcValue, SVOff, Align, Vol, 3361 ReadMem, WriteMem); 3362} 3363 3364SDValue 3365SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList, 3366 const SDValue *Ops, unsigned NumOps, 3367 MVT MemVT, const Value *srcValue, int SVOff, 3368 unsigned Align, bool Vol, 3369 bool ReadMem, bool WriteMem) { 3370 // Memoize the node unless it returns a flag. 3371 MemIntrinsicSDNode *N; 3372 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3373 FoldingSetNodeID ID; 3374 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3375 void *IP = 0; 3376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3377 return SDValue(E, 0); 3378 3379 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3380 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3381 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3382 CSEMap.InsertNode(N, IP); 3383 } else { 3384 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3385 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3386 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3387 } 3388 AllNodes.push_back(N); 3389 return SDValue(N, 0); 3390} 3391 3392SDValue 3393SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3394 bool IsInreg, SDVTList VTs, 3395 const SDValue *Operands, unsigned NumOperands) { 3396 // Do not include isTailCall in the folding set profile. 3397 FoldingSetNodeID ID; 3398 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3399 ID.AddInteger(CallingConv); 3400 ID.AddInteger(IsVarArgs); 3401 void *IP = 0; 3402 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3403 // Instead of including isTailCall in the folding set, we just 3404 // set the flag of the existing node. 3405 if (!IsTailCall) 3406 cast<CallSDNode>(E)->setNotTailCall(); 3407 return SDValue(E, 0); 3408 } 3409 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3410 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg, 3411 VTs, Operands, NumOperands); 3412 CSEMap.InsertNode(N, IP); 3413 AllNodes.push_back(N); 3414 return SDValue(N, 0); 3415} 3416 3417SDValue 3418SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3419 MVT VT, SDValue Chain, 3420 SDValue Ptr, SDValue Offset, 3421 const Value *SV, int SVOffset, MVT EVT, 3422 bool isVolatile, unsigned Alignment) { 3423 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3424 Alignment = getMVTAlignment(VT); 3425 3426 if (VT == EVT) { 3427 ExtType = ISD::NON_EXTLOAD; 3428 } else if (ExtType == ISD::NON_EXTLOAD) { 3429 assert(VT == EVT && "Non-extending load from different memory type!"); 3430 } else { 3431 // Extending load. 3432 if (VT.isVector()) 3433 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3434 "Invalid vector extload!"); 3435 else 3436 assert(EVT.bitsLT(VT) && 3437 "Should only be an extending load, not truncating!"); 3438 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3439 "Cannot sign/zero extend a FP/Vector load!"); 3440 assert(VT.isInteger() == EVT.isInteger() && 3441 "Cannot convert from FP to Int or Int -> FP!"); 3442 } 3443 3444 bool Indexed = AM != ISD::UNINDEXED; 3445 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3446 "Unindexed load with an offset!"); 3447 3448 SDVTList VTs = Indexed ? 3449 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3450 SDValue Ops[] = { Chain, Ptr, Offset }; 3451 FoldingSetNodeID ID; 3452 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3453 ID.AddInteger(AM); 3454 ID.AddInteger(ExtType); 3455 ID.AddInteger(EVT.getRawBits()); 3456 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3457 void *IP = 0; 3458 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3459 return SDValue(E, 0); 3460 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3461 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3462 Alignment, isVolatile); 3463 CSEMap.InsertNode(N, IP); 3464 AllNodes.push_back(N); 3465 return SDValue(N, 0); 3466} 3467 3468SDValue SelectionDAG::getLoad(MVT VT, 3469 SDValue Chain, SDValue Ptr, 3470 const Value *SV, int SVOffset, 3471 bool isVolatile, unsigned Alignment) { 3472 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3473 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3474 SV, SVOffset, VT, isVolatile, Alignment); 3475} 3476 3477SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3478 SDValue Chain, SDValue Ptr, 3479 const Value *SV, 3480 int SVOffset, MVT EVT, 3481 bool isVolatile, unsigned Alignment) { 3482 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3483 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3484 SV, SVOffset, EVT, isVolatile, Alignment); 3485} 3486 3487SDValue 3488SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3489 SDValue Offset, ISD::MemIndexedMode AM) { 3490 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3491 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3492 "Load is already a indexed load!"); 3493 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3494 LD->getChain(), Base, Offset, LD->getSrcValue(), 3495 LD->getSrcValueOffset(), LD->getMemoryVT(), 3496 LD->isVolatile(), LD->getAlignment()); 3497} 3498 3499SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3500 SDValue Ptr, const Value *SV, int SVOffset, 3501 bool isVolatile, unsigned Alignment) { 3502 MVT VT = Val.getValueType(); 3503 3504 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3505 Alignment = getMVTAlignment(VT); 3506 3507 SDVTList VTs = getVTList(MVT::Other); 3508 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3509 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3510 FoldingSetNodeID ID; 3511 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3512 ID.AddInteger(ISD::UNINDEXED); 3513 ID.AddInteger(false); 3514 ID.AddInteger(VT.getRawBits()); 3515 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3516 void *IP = 0; 3517 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3518 return SDValue(E, 0); 3519 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3520 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3521 VT, SV, SVOffset, Alignment, isVolatile); 3522 CSEMap.InsertNode(N, IP); 3523 AllNodes.push_back(N); 3524 return SDValue(N, 0); 3525} 3526 3527SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3528 SDValue Ptr, const Value *SV, 3529 int SVOffset, MVT SVT, 3530 bool isVolatile, unsigned Alignment) { 3531 MVT VT = Val.getValueType(); 3532 3533 if (VT == SVT) 3534 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3535 3536 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3537 assert(VT.isInteger() == SVT.isInteger() && 3538 "Can't do FP-INT conversion!"); 3539 3540 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3541 Alignment = getMVTAlignment(VT); 3542 3543 SDVTList VTs = getVTList(MVT::Other); 3544 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3545 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3546 FoldingSetNodeID ID; 3547 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3548 ID.AddInteger(ISD::UNINDEXED); 3549 ID.AddInteger(1); 3550 ID.AddInteger(SVT.getRawBits()); 3551 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3552 void *IP = 0; 3553 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3554 return SDValue(E, 0); 3555 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3556 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3557 SVT, SV, SVOffset, Alignment, isVolatile); 3558 CSEMap.InsertNode(N, IP); 3559 AllNodes.push_back(N); 3560 return SDValue(N, 0); 3561} 3562 3563SDValue 3564SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3565 SDValue Offset, ISD::MemIndexedMode AM) { 3566 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3567 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3568 "Store is already a indexed store!"); 3569 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3570 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3571 FoldingSetNodeID ID; 3572 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3573 ID.AddInteger(AM); 3574 ID.AddInteger(ST->isTruncatingStore()); 3575 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3576 ID.AddInteger(ST->getRawFlags()); 3577 void *IP = 0; 3578 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3579 return SDValue(E, 0); 3580 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3581 new (N) StoreSDNode(Ops, VTs, AM, 3582 ST->isTruncatingStore(), ST->getMemoryVT(), 3583 ST->getSrcValue(), ST->getSrcValueOffset(), 3584 ST->getAlignment(), ST->isVolatile()); 3585 CSEMap.InsertNode(N, IP); 3586 AllNodes.push_back(N); 3587 return SDValue(N, 0); 3588} 3589 3590SDValue SelectionDAG::getVAArg(MVT VT, 3591 SDValue Chain, SDValue Ptr, 3592 SDValue SV) { 3593 SDValue Ops[] = { Chain, Ptr, SV }; 3594 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3595} 3596 3597SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3598 const SDUse *Ops, unsigned NumOps) { 3599 switch (NumOps) { 3600 case 0: return getNode(Opcode, VT); 3601 case 1: return getNode(Opcode, VT, Ops[0]); 3602 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3603 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3604 default: break; 3605 } 3606 3607 // Copy from an SDUse array into an SDValue array for use with 3608 // the regular getNode logic. 3609 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3610 return getNode(Opcode, VT, &NewOps[0], NumOps); 3611} 3612 3613SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3614 const SDValue *Ops, unsigned NumOps) { 3615 switch (NumOps) { 3616 case 0: return getNode(Opcode, VT); 3617 case 1: return getNode(Opcode, VT, Ops[0]); 3618 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3619 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3620 default: break; 3621 } 3622 3623 switch (Opcode) { 3624 default: break; 3625 case ISD::SELECT_CC: { 3626 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3627 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3628 "LHS and RHS of condition must have same type!"); 3629 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3630 "True and False arms of SelectCC must have same type!"); 3631 assert(Ops[2].getValueType() == VT && 3632 "select_cc node must be of same type as true and false value!"); 3633 break; 3634 } 3635 case ISD::BR_CC: { 3636 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3637 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3638 "LHS/RHS of comparison should match types!"); 3639 break; 3640 } 3641 } 3642 3643 // Memoize nodes. 3644 SDNode *N; 3645 SDVTList VTs = getVTList(VT); 3646 if (VT != MVT::Flag) { 3647 FoldingSetNodeID ID; 3648 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3649 void *IP = 0; 3650 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3651 return SDValue(E, 0); 3652 N = NodeAllocator.Allocate<SDNode>(); 3653 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3654 CSEMap.InsertNode(N, IP); 3655 } else { 3656 N = NodeAllocator.Allocate<SDNode>(); 3657 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3658 } 3659 AllNodes.push_back(N); 3660#ifndef NDEBUG 3661 VerifyNode(N); 3662#endif 3663 return SDValue(N, 0); 3664} 3665 3666SDValue SelectionDAG::getNode(unsigned Opcode, 3667 const std::vector<MVT> &ResultTys, 3668 const SDValue *Ops, unsigned NumOps) { 3669 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3670 Ops, NumOps); 3671} 3672 3673SDValue SelectionDAG::getNode(unsigned Opcode, 3674 const MVT *VTs, unsigned NumVTs, 3675 const SDValue *Ops, unsigned NumOps) { 3676 if (NumVTs == 1) 3677 return getNode(Opcode, VTs[0], Ops, NumOps); 3678 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3679} 3680 3681SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3682 const SDValue *Ops, unsigned NumOps) { 3683 if (VTList.NumVTs == 1) 3684 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3685 3686 switch (Opcode) { 3687 // FIXME: figure out how to safely handle things like 3688 // int foo(int x) { return 1 << (x & 255); } 3689 // int bar() { return foo(256); } 3690#if 0 3691 case ISD::SRA_PARTS: 3692 case ISD::SRL_PARTS: 3693 case ISD::SHL_PARTS: 3694 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3695 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3696 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3697 else if (N3.getOpcode() == ISD::AND) 3698 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3699 // If the and is only masking out bits that cannot effect the shift, 3700 // eliminate the and. 3701 unsigned NumBits = VT.getSizeInBits()*2; 3702 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3703 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3704 } 3705 break; 3706#endif 3707 } 3708 3709 // Memoize the node unless it returns a flag. 3710 SDNode *N; 3711 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3712 FoldingSetNodeID ID; 3713 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3714 void *IP = 0; 3715 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3716 return SDValue(E, 0); 3717 if (NumOps == 1) { 3718 N = NodeAllocator.Allocate<UnarySDNode>(); 3719 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3720 } else if (NumOps == 2) { 3721 N = NodeAllocator.Allocate<BinarySDNode>(); 3722 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3723 } else if (NumOps == 3) { 3724 N = NodeAllocator.Allocate<TernarySDNode>(); 3725 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3726 } else { 3727 N = NodeAllocator.Allocate<SDNode>(); 3728 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3729 } 3730 CSEMap.InsertNode(N, IP); 3731 } else { 3732 if (NumOps == 1) { 3733 N = NodeAllocator.Allocate<UnarySDNode>(); 3734 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3735 } else if (NumOps == 2) { 3736 N = NodeAllocator.Allocate<BinarySDNode>(); 3737 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3738 } else if (NumOps == 3) { 3739 N = NodeAllocator.Allocate<TernarySDNode>(); 3740 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3741 } else { 3742 N = NodeAllocator.Allocate<SDNode>(); 3743 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3744 } 3745 } 3746 AllNodes.push_back(N); 3747#ifndef NDEBUG 3748 VerifyNode(N); 3749#endif 3750 return SDValue(N, 0); 3751} 3752 3753SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3754 return getNode(Opcode, VTList, 0, 0); 3755} 3756 3757SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3758 SDValue N1) { 3759 SDValue Ops[] = { N1 }; 3760 return getNode(Opcode, VTList, Ops, 1); 3761} 3762 3763SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3764 SDValue N1, SDValue N2) { 3765 SDValue Ops[] = { N1, N2 }; 3766 return getNode(Opcode, VTList, Ops, 2); 3767} 3768 3769SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3770 SDValue N1, SDValue N2, SDValue N3) { 3771 SDValue Ops[] = { N1, N2, N3 }; 3772 return getNode(Opcode, VTList, Ops, 3); 3773} 3774 3775SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3776 SDValue N1, SDValue N2, SDValue N3, 3777 SDValue N4) { 3778 SDValue Ops[] = { N1, N2, N3, N4 }; 3779 return getNode(Opcode, VTList, Ops, 4); 3780} 3781 3782SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3783 SDValue N1, SDValue N2, SDValue N3, 3784 SDValue N4, SDValue N5) { 3785 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3786 return getNode(Opcode, VTList, Ops, 5); 3787} 3788 3789SDVTList SelectionDAG::getVTList(MVT VT) { 3790 return makeVTList(SDNode::getValueTypeList(VT), 1); 3791} 3792 3793SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3794 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3795 E = VTList.rend(); I != E; ++I) 3796 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 3797 return *I; 3798 3799 MVT *Array = Allocator.Allocate<MVT>(2); 3800 Array[0] = VT1; 3801 Array[1] = VT2; 3802 SDVTList Result = makeVTList(Array, 2); 3803 VTList.push_back(Result); 3804 return Result; 3805} 3806 3807SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 3808 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3809 E = VTList.rend(); I != E; ++I) 3810 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3811 I->VTs[2] == VT3) 3812 return *I; 3813 3814 MVT *Array = Allocator.Allocate<MVT>(3); 3815 Array[0] = VT1; 3816 Array[1] = VT2; 3817 Array[2] = VT3; 3818 SDVTList Result = makeVTList(Array, 3); 3819 VTList.push_back(Result); 3820 return Result; 3821} 3822 3823SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) { 3824 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3825 E = VTList.rend(); I != E; ++I) 3826 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3827 I->VTs[2] == VT3 && I->VTs[3] == VT4) 3828 return *I; 3829 3830 MVT *Array = Allocator.Allocate<MVT>(3); 3831 Array[0] = VT1; 3832 Array[1] = VT2; 3833 Array[2] = VT3; 3834 Array[3] = VT4; 3835 SDVTList Result = makeVTList(Array, 4); 3836 VTList.push_back(Result); 3837 return Result; 3838} 3839 3840SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3841 switch (NumVTs) { 3842 case 0: assert(0 && "Cannot have nodes without results!"); 3843 case 1: return getVTList(VTs[0]); 3844 case 2: return getVTList(VTs[0], VTs[1]); 3845 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3846 default: break; 3847 } 3848 3849 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3850 E = VTList.rend(); I != E; ++I) { 3851 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 3852 continue; 3853 3854 bool NoMatch = false; 3855 for (unsigned i = 2; i != NumVTs; ++i) 3856 if (VTs[i] != I->VTs[i]) { 3857 NoMatch = true; 3858 break; 3859 } 3860 if (!NoMatch) 3861 return *I; 3862 } 3863 3864 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 3865 std::copy(VTs, VTs+NumVTs, Array); 3866 SDVTList Result = makeVTList(Array, NumVTs); 3867 VTList.push_back(Result); 3868 return Result; 3869} 3870 3871 3872/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3873/// specified operands. If the resultant node already exists in the DAG, 3874/// this does not modify the specified node, instead it returns the node that 3875/// already exists. If the resultant node does not exist in the DAG, the 3876/// input node is returned. As a degenerate case, if you specify the same 3877/// input operands as the node already has, the input node is returned. 3878SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 3879 SDNode *N = InN.getNode(); 3880 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3881 3882 // Check to see if there is no change. 3883 if (Op == N->getOperand(0)) return InN; 3884 3885 // See if the modified node already exists. 3886 void *InsertPos = 0; 3887 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3888 return SDValue(Existing, InN.getResNo()); 3889 3890 // Nope it doesn't. Remove the node from its current place in the maps. 3891 if (InsertPos) 3892 if (!RemoveNodeFromCSEMaps(N)) 3893 InsertPos = 0; 3894 3895 // Now we update the operands. 3896 N->OperandList[0].getVal()->removeUser(0, N); 3897 N->OperandList[0] = Op; 3898 N->OperandList[0].setUser(N); 3899 Op.getNode()->addUser(0, N); 3900 3901 // If this gets put into a CSE map, add it. 3902 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3903 return InN; 3904} 3905 3906SDValue SelectionDAG:: 3907UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 3908 SDNode *N = InN.getNode(); 3909 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3910 3911 // Check to see if there is no change. 3912 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3913 return InN; // No operands changed, just return the input node. 3914 3915 // See if the modified node already exists. 3916 void *InsertPos = 0; 3917 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3918 return SDValue(Existing, InN.getResNo()); 3919 3920 // Nope it doesn't. Remove the node from its current place in the maps. 3921 if (InsertPos) 3922 if (!RemoveNodeFromCSEMaps(N)) 3923 InsertPos = 0; 3924 3925 // Now we update the operands. 3926 if (N->OperandList[0] != Op1) { 3927 N->OperandList[0].getVal()->removeUser(0, N); 3928 N->OperandList[0] = Op1; 3929 N->OperandList[0].setUser(N); 3930 Op1.getNode()->addUser(0, N); 3931 } 3932 if (N->OperandList[1] != Op2) { 3933 N->OperandList[1].getVal()->removeUser(1, N); 3934 N->OperandList[1] = Op2; 3935 N->OperandList[1].setUser(N); 3936 Op2.getNode()->addUser(1, N); 3937 } 3938 3939 // If this gets put into a CSE map, add it. 3940 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3941 return InN; 3942} 3943 3944SDValue SelectionDAG:: 3945UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 3946 SDValue Ops[] = { Op1, Op2, Op3 }; 3947 return UpdateNodeOperands(N, Ops, 3); 3948} 3949 3950SDValue SelectionDAG:: 3951UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3952 SDValue Op3, SDValue Op4) { 3953 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 3954 return UpdateNodeOperands(N, Ops, 4); 3955} 3956 3957SDValue SelectionDAG:: 3958UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3959 SDValue Op3, SDValue Op4, SDValue Op5) { 3960 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3961 return UpdateNodeOperands(N, Ops, 5); 3962} 3963 3964SDValue SelectionDAG:: 3965UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 3966 SDNode *N = InN.getNode(); 3967 assert(N->getNumOperands() == NumOps && 3968 "Update with wrong number of operands"); 3969 3970 // Check to see if there is no change. 3971 bool AnyChange = false; 3972 for (unsigned i = 0; i != NumOps; ++i) { 3973 if (Ops[i] != N->getOperand(i)) { 3974 AnyChange = true; 3975 break; 3976 } 3977 } 3978 3979 // No operands changed, just return the input node. 3980 if (!AnyChange) return InN; 3981 3982 // See if the modified node already exists. 3983 void *InsertPos = 0; 3984 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3985 return SDValue(Existing, InN.getResNo()); 3986 3987 // Nope it doesn't. Remove the node from its current place in the maps. 3988 if (InsertPos) 3989 if (!RemoveNodeFromCSEMaps(N)) 3990 InsertPos = 0; 3991 3992 // Now we update the operands. 3993 for (unsigned i = 0; i != NumOps; ++i) { 3994 if (N->OperandList[i] != Ops[i]) { 3995 N->OperandList[i].getVal()->removeUser(i, N); 3996 N->OperandList[i] = Ops[i]; 3997 N->OperandList[i].setUser(N); 3998 Ops[i].getNode()->addUser(i, N); 3999 } 4000 } 4001 4002 // If this gets put into a CSE map, add it. 4003 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4004 return InN; 4005} 4006 4007/// DropOperands - Release the operands and set this node to have 4008/// zero operands. 4009void SDNode::DropOperands() { 4010 // Unlike the code in MorphNodeTo that does this, we don't need to 4011 // watch for dead nodes here. 4012 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 4013 I->getVal()->removeUser(std::distance(op_begin(), I), this); 4014 4015 NumOperands = 0; 4016} 4017 4018/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4019/// machine opcode. 4020/// 4021SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4022 MVT VT) { 4023 SDVTList VTs = getVTList(VT); 4024 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4025} 4026 4027SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4028 MVT VT, SDValue Op1) { 4029 SDVTList VTs = getVTList(VT); 4030 SDValue Ops[] = { Op1 }; 4031 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4032} 4033 4034SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4035 MVT VT, SDValue Op1, 4036 SDValue Op2) { 4037 SDVTList VTs = getVTList(VT); 4038 SDValue Ops[] = { Op1, Op2 }; 4039 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4040} 4041 4042SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4043 MVT VT, SDValue Op1, 4044 SDValue Op2, SDValue Op3) { 4045 SDVTList VTs = getVTList(VT); 4046 SDValue Ops[] = { Op1, Op2, Op3 }; 4047 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4048} 4049 4050SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4051 MVT VT, const SDValue *Ops, 4052 unsigned NumOps) { 4053 SDVTList VTs = getVTList(VT); 4054 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4055} 4056 4057SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4058 MVT VT1, MVT VT2, const SDValue *Ops, 4059 unsigned NumOps) { 4060 SDVTList VTs = getVTList(VT1, VT2); 4061 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4062} 4063 4064SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4065 MVT VT1, MVT VT2) { 4066 SDVTList VTs = getVTList(VT1, VT2); 4067 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4068} 4069 4070SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4071 MVT VT1, MVT VT2, MVT VT3, 4072 const SDValue *Ops, unsigned NumOps) { 4073 SDVTList VTs = getVTList(VT1, VT2, VT3); 4074 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4075} 4076 4077SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4078 MVT VT1, MVT VT2, MVT VT3, MVT VT4, 4079 const SDValue *Ops, unsigned NumOps) { 4080 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4081 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4082} 4083 4084SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4085 MVT VT1, MVT VT2, 4086 SDValue Op1) { 4087 SDVTList VTs = getVTList(VT1, VT2); 4088 SDValue Ops[] = { Op1 }; 4089 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4090} 4091 4092SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4093 MVT VT1, MVT VT2, 4094 SDValue Op1, SDValue Op2) { 4095 SDVTList VTs = getVTList(VT1, VT2); 4096 SDValue Ops[] = { Op1, Op2 }; 4097 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4098} 4099 4100SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4101 MVT VT1, MVT VT2, 4102 SDValue Op1, SDValue Op2, 4103 SDValue Op3) { 4104 SDVTList VTs = getVTList(VT1, VT2); 4105 SDValue Ops[] = { Op1, Op2, Op3 }; 4106 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4107} 4108 4109SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4110 MVT VT1, MVT VT2, MVT VT3, 4111 SDValue Op1, SDValue Op2, 4112 SDValue Op3) { 4113 SDVTList VTs = getVTList(VT1, VT2, VT3); 4114 SDValue Ops[] = { Op1, Op2, Op3 }; 4115 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4116} 4117 4118SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4119 SDVTList VTs, const SDValue *Ops, 4120 unsigned NumOps) { 4121 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4122} 4123 4124SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4125 MVT VT) { 4126 SDVTList VTs = getVTList(VT); 4127 return MorphNodeTo(N, Opc, VTs, 0, 0); 4128} 4129 4130SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4131 MVT VT, SDValue Op1) { 4132 SDVTList VTs = getVTList(VT); 4133 SDValue Ops[] = { Op1 }; 4134 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4135} 4136 4137SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4138 MVT VT, SDValue Op1, 4139 SDValue Op2) { 4140 SDVTList VTs = getVTList(VT); 4141 SDValue Ops[] = { Op1, Op2 }; 4142 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4143} 4144 4145SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4146 MVT VT, SDValue Op1, 4147 SDValue Op2, SDValue Op3) { 4148 SDVTList VTs = getVTList(VT); 4149 SDValue Ops[] = { Op1, Op2, Op3 }; 4150 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4151} 4152 4153SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4154 MVT VT, const SDValue *Ops, 4155 unsigned NumOps) { 4156 SDVTList VTs = getVTList(VT); 4157 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4158} 4159 4160SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4161 MVT VT1, MVT VT2, const SDValue *Ops, 4162 unsigned NumOps) { 4163 SDVTList VTs = getVTList(VT1, VT2); 4164 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4165} 4166 4167SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4168 MVT VT1, MVT VT2) { 4169 SDVTList VTs = getVTList(VT1, VT2); 4170 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4171} 4172 4173SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4174 MVT VT1, MVT VT2, MVT VT3, 4175 const SDValue *Ops, unsigned NumOps) { 4176 SDVTList VTs = getVTList(VT1, VT2, VT3); 4177 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4178} 4179 4180SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4181 MVT VT1, MVT VT2, 4182 SDValue Op1) { 4183 SDVTList VTs = getVTList(VT1, VT2); 4184 SDValue Ops[] = { Op1 }; 4185 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4186} 4187 4188SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4189 MVT VT1, MVT VT2, 4190 SDValue Op1, SDValue Op2) { 4191 SDVTList VTs = getVTList(VT1, VT2); 4192 SDValue Ops[] = { Op1, Op2 }; 4193 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4194} 4195 4196SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4197 MVT VT1, MVT VT2, 4198 SDValue Op1, SDValue Op2, 4199 SDValue Op3) { 4200 SDVTList VTs = getVTList(VT1, VT2); 4201 SDValue Ops[] = { Op1, Op2, Op3 }; 4202 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4203} 4204 4205/// MorphNodeTo - These *mutate* the specified node to have the specified 4206/// return type, opcode, and operands. 4207/// 4208/// Note that MorphNodeTo returns the resultant node. If there is already a 4209/// node of the specified opcode and operands, it returns that node instead of 4210/// the current one. 4211/// 4212/// Using MorphNodeTo is faster than creating a new node and swapping it in 4213/// with ReplaceAllUsesWith both because it often avoids allocating a new 4214/// node, and because it doesn't require CSE recalculation for any of 4215/// the node's users. 4216/// 4217SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4218 SDVTList VTs, const SDValue *Ops, 4219 unsigned NumOps) { 4220 // If an identical node already exists, use it. 4221 void *IP = 0; 4222 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4223 FoldingSetNodeID ID; 4224 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4225 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4226 return ON; 4227 } 4228 4229 if (!RemoveNodeFromCSEMaps(N)) 4230 IP = 0; 4231 4232 // Start the morphing. 4233 N->NodeType = Opc; 4234 N->ValueList = VTs.VTs; 4235 N->NumValues = VTs.NumVTs; 4236 4237 // Clear the operands list, updating used nodes to remove this from their 4238 // use list. Keep track of any operands that become dead as a result. 4239 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4240 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end(); 4241 I != E; ++I) { 4242 SDNode *Used = I->getVal(); 4243 Used->removeUser(std::distance(B, I), N); 4244 if (Used->use_empty()) 4245 DeadNodeSet.insert(Used); 4246 } 4247 4248 // If NumOps is larger than the # of operands we currently have, reallocate 4249 // the operand list. 4250 if (NumOps > N->NumOperands) { 4251 if (N->OperandsNeedDelete) 4252 delete[] N->OperandList; 4253 4254 if (N->isMachineOpcode()) { 4255 // We're creating a final node that will live unmorphed for the 4256 // remainder of the current SelectionDAG iteration, so we can allocate 4257 // the operands directly out of a pool with no recycling metadata. 4258 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4259 N->OperandsNeedDelete = false; 4260 } else { 4261 N->OperandList = new SDUse[NumOps]; 4262 N->OperandsNeedDelete = true; 4263 } 4264 } 4265 4266 // Assign the new operands. 4267 N->NumOperands = NumOps; 4268 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4269 N->OperandList[i] = Ops[i]; 4270 N->OperandList[i].setUser(N); 4271 SDNode *ToUse = N->OperandList[i].getVal(); 4272 ToUse->addUser(i, N); 4273 } 4274 4275 // Delete any nodes that are still dead after adding the uses for the 4276 // new operands. 4277 SmallVector<SDNode *, 16> DeadNodes; 4278 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4279 E = DeadNodeSet.end(); I != E; ++I) 4280 if ((*I)->use_empty()) 4281 DeadNodes.push_back(*I); 4282 RemoveDeadNodes(DeadNodes); 4283 4284 if (IP) 4285 CSEMap.InsertNode(N, IP); // Memoize the new node. 4286 return N; 4287} 4288 4289 4290/// getTargetNode - These are used for target selectors to create a new node 4291/// with specified return type(s), target opcode, and operands. 4292/// 4293/// Note that getTargetNode returns the resultant node. If there is already a 4294/// node of the specified opcode and operands, it returns that node instead of 4295/// the current one. 4296SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4297 return getNode(~Opcode, VT).getNode(); 4298} 4299SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4300 return getNode(~Opcode, VT, Op1).getNode(); 4301} 4302SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4303 SDValue Op1, SDValue Op2) { 4304 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4305} 4306SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4307 SDValue Op1, SDValue Op2, 4308 SDValue Op3) { 4309 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4310} 4311SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4312 const SDValue *Ops, unsigned NumOps) { 4313 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4314} 4315SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4316 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4317 SDValue Op; 4318 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4319} 4320SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4321 MVT VT2, SDValue Op1) { 4322 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4323 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4324} 4325SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4326 MVT VT2, SDValue Op1, 4327 SDValue Op2) { 4328 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4329 SDValue Ops[] = { Op1, Op2 }; 4330 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4331} 4332SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4333 MVT VT2, SDValue Op1, 4334 SDValue Op2, SDValue Op3) { 4335 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4336 SDValue Ops[] = { Op1, Op2, Op3 }; 4337 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4338} 4339SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4340 const SDValue *Ops, unsigned NumOps) { 4341 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4342 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4343} 4344SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4345 SDValue Op1, SDValue Op2) { 4346 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4347 SDValue Ops[] = { Op1, Op2 }; 4348 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4349} 4350SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4351 SDValue Op1, SDValue Op2, 4352 SDValue Op3) { 4353 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4354 SDValue Ops[] = { Op1, Op2, Op3 }; 4355 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4356} 4357SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4358 const SDValue *Ops, unsigned NumOps) { 4359 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4360 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4361} 4362SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4363 MVT VT2, MVT VT3, MVT VT4, 4364 const SDValue *Ops, unsigned NumOps) { 4365 std::vector<MVT> VTList; 4366 VTList.push_back(VT1); 4367 VTList.push_back(VT2); 4368 VTList.push_back(VT3); 4369 VTList.push_back(VT4); 4370 const MVT *VTs = getNodeValueTypes(VTList); 4371 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4372} 4373SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4374 const std::vector<MVT> &ResultTys, 4375 const SDValue *Ops, unsigned NumOps) { 4376 const MVT *VTs = getNodeValueTypes(ResultTys); 4377 return getNode(~Opcode, VTs, ResultTys.size(), 4378 Ops, NumOps).getNode(); 4379} 4380 4381/// getNodeIfExists - Get the specified node if it's already available, or 4382/// else return NULL. 4383SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4384 const SDValue *Ops, unsigned NumOps) { 4385 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4386 FoldingSetNodeID ID; 4387 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4388 void *IP = 0; 4389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4390 return E; 4391 } 4392 return NULL; 4393} 4394 4395 4396/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4397/// This can cause recursive merging of nodes in the DAG. 4398/// 4399/// This version assumes From has a single result value. 4400/// 4401void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4402 DAGUpdateListener *UpdateListener) { 4403 SDNode *From = FromN.getNode(); 4404 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4405 "Cannot replace with this method!"); 4406 assert(From != To.getNode() && "Cannot replace uses of with self"); 4407 4408 // Iterate over all the existing uses of From. This specifically avoids 4409 // visiting any new uses of From that arise while the replacement is 4410 // happening, because any such uses would be the result of CSE: If an 4411 // existing node looks like From after one of its operands is replaced 4412 // by To, we don't want to replace of all its users with To too. 4413 // See PR3018 for more info. 4414 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4415 while (UI != UE) { 4416 SDNode *U = *UI; 4417 do ++UI; while (UI != UE && *UI == U); 4418 4419 // This node is about to morph, remove its old self from the CSE maps. 4420 RemoveNodeFromCSEMaps(U); 4421 int operandNum = 0; 4422 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4423 I != E; ++I, ++operandNum) 4424 if (I->getVal() == From) { 4425 From->removeUser(operandNum, U); 4426 *I = To; 4427 I->setUser(U); 4428 To.getNode()->addUser(operandNum, U); 4429 } 4430 4431 // Now that we have modified U, add it back to the CSE maps. If it already 4432 // exists there, recursively merge the results together. 4433 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4434 ReplaceAllUsesWith(U, Existing, UpdateListener); 4435 // U is now dead. Inform the listener if it exists and delete it. 4436 if (UpdateListener) 4437 UpdateListener->NodeDeleted(U, Existing); 4438 DeleteNodeNotInCSEMaps(U); 4439 } else { 4440 // If the node doesn't already exist, we updated it. Inform a listener if 4441 // it exists. 4442 if (UpdateListener) 4443 UpdateListener->NodeUpdated(U); 4444 } 4445 } 4446} 4447 4448/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4449/// This can cause recursive merging of nodes in the DAG. 4450/// 4451/// This version assumes From/To have matching types and numbers of result 4452/// values. 4453/// 4454void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4455 DAGUpdateListener *UpdateListener) { 4456 assert(From->getVTList().VTs == To->getVTList().VTs && 4457 From->getNumValues() == To->getNumValues() && 4458 "Cannot use this version of ReplaceAllUsesWith!"); 4459 4460 // Handle the trivial case. 4461 if (From == To) 4462 return; 4463 4464 // Iterate over just the existing users of From. See the comments in 4465 // the ReplaceAllUsesWith above. 4466 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4467 while (UI != UE) { 4468 SDNode *U = *UI; 4469 do ++UI; while (UI != UE && *UI == U); 4470 4471 // This node is about to morph, remove its old self from the CSE maps. 4472 RemoveNodeFromCSEMaps(U); 4473 int operandNum = 0; 4474 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4475 I != E; ++I, ++operandNum) 4476 if (I->getVal() == From) { 4477 From->removeUser(operandNum, U); 4478 I->getSDValue().setNode(To); 4479 To->addUser(operandNum, U); 4480 } 4481 4482 // Now that we have modified U, add it back to the CSE maps. If it already 4483 // exists there, recursively merge the results together. 4484 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4485 ReplaceAllUsesWith(U, Existing, UpdateListener); 4486 // U is now dead. Inform the listener if it exists and delete it. 4487 if (UpdateListener) 4488 UpdateListener->NodeDeleted(U, Existing); 4489 DeleteNodeNotInCSEMaps(U); 4490 } else { 4491 // If the node doesn't already exist, we updated it. Inform a listener if 4492 // it exists. 4493 if (UpdateListener) 4494 UpdateListener->NodeUpdated(U); 4495 } 4496 } 4497} 4498 4499/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4500/// This can cause recursive merging of nodes in the DAG. 4501/// 4502/// This version can replace From with any result values. To must match the 4503/// number and types of values returned by From. 4504void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4505 const SDValue *To, 4506 DAGUpdateListener *UpdateListener) { 4507 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4508 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4509 4510 // Iterate over just the existing users of From. See the comments in 4511 // the ReplaceAllUsesWith above. 4512 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4513 while (UI != UE) { 4514 SDNode *U = *UI; 4515 do ++UI; while (UI != UE && *UI == U); 4516 4517 // This node is about to morph, remove its old self from the CSE maps. 4518 RemoveNodeFromCSEMaps(U); 4519 int operandNum = 0; 4520 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4521 I != E; ++I, ++operandNum) 4522 if (I->getVal() == From) { 4523 const SDValue &ToOp = To[I->getSDValue().getResNo()]; 4524 From->removeUser(operandNum, U); 4525 *I = ToOp; 4526 I->setUser(U); 4527 ToOp.getNode()->addUser(operandNum, U); 4528 } 4529 4530 // Now that we have modified U, add it back to the CSE maps. If it already 4531 // exists there, recursively merge the results together. 4532 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4533 ReplaceAllUsesWith(U, Existing, UpdateListener); 4534 // U is now dead. Inform the listener if it exists and delete it. 4535 if (UpdateListener) 4536 UpdateListener->NodeDeleted(U, Existing); 4537 DeleteNodeNotInCSEMaps(U); 4538 } else { 4539 // If the node doesn't already exist, we updated it. Inform a listener if 4540 // it exists. 4541 if (UpdateListener) 4542 UpdateListener->NodeUpdated(U); 4543 } 4544 } 4545} 4546 4547/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4548/// uses of other values produced by From.getVal() alone. The Deleted vector is 4549/// handled the same way as for ReplaceAllUsesWith. 4550void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4551 DAGUpdateListener *UpdateListener){ 4552 // Handle the really simple, really trivial case efficiently. 4553 if (From == To) return; 4554 4555 // Handle the simple, trivial, case efficiently. 4556 if (From.getNode()->getNumValues() == 1) { 4557 ReplaceAllUsesWith(From, To, UpdateListener); 4558 return; 4559 } 4560 4561 // Get all of the users of From.getNode(). We want these in a nice, 4562 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4563 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end()); 4564 4565 while (!Users.empty()) { 4566 // We know that this user uses some value of From. If it is the right 4567 // value, update it. 4568 SDNode *User = Users.back(); 4569 Users.pop_back(); 4570 4571 // Scan for an operand that matches From. 4572 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4573 for (; Op != E; ++Op) 4574 if (*Op == From) break; 4575 4576 // If there are no matches, the user must use some other result of From. 4577 if (Op == E) continue; 4578 4579 // Okay, we know this user needs to be updated. Remove its old self 4580 // from the CSE maps. 4581 RemoveNodeFromCSEMaps(User); 4582 4583 // Update all operands that match "From" in case there are multiple uses. 4584 for (; Op != E; ++Op) { 4585 if (*Op == From) { 4586 From.getNode()->removeUser(Op-User->op_begin(), User); 4587 *Op = To; 4588 Op->setUser(User); 4589 To.getNode()->addUser(Op-User->op_begin(), User); 4590 } 4591 } 4592 4593 // Now that we have modified User, add it back to the CSE maps. If it 4594 // already exists there, recursively merge the results together. 4595 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4596 if (!Existing) { 4597 if (UpdateListener) UpdateListener->NodeUpdated(User); 4598 continue; // Continue on to next user. 4599 } 4600 4601 // If there was already an existing matching node, use ReplaceAllUsesWith 4602 // to replace the dead one with the existing one. This can cause 4603 // recursive merging of other unrelated nodes down the line. 4604 ReplaceAllUsesWith(User, Existing, UpdateListener); 4605 4606 // User is now dead. Notify a listener if present. 4607 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4608 DeleteNodeNotInCSEMaps(User); 4609 } 4610} 4611 4612/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4613/// uses of other values produced by From.getVal() alone. The same value may 4614/// appear in both the From and To list. The Deleted vector is 4615/// handled the same way as for ReplaceAllUsesWith. 4616void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4617 const SDValue *To, 4618 unsigned Num, 4619 DAGUpdateListener *UpdateListener){ 4620 // Handle the simple, trivial case efficiently. 4621 if (Num == 1) 4622 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4623 4624 SmallVector<std::pair<SDNode *, unsigned>, 16> Users; 4625 for (unsigned i = 0; i != Num; ++i) 4626 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(), 4627 E = From[i].getNode()->use_end(); UI != E; ++UI) 4628 Users.push_back(std::make_pair(*UI, i)); 4629 4630 while (!Users.empty()) { 4631 // We know that this user uses some value of From. If it is the right 4632 // value, update it. 4633 SDNode *User = Users.back().first; 4634 unsigned i = Users.back().second; 4635 Users.pop_back(); 4636 4637 // Scan for an operand that matches From. 4638 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4639 for (; Op != E; ++Op) 4640 if (*Op == From[i]) break; 4641 4642 // If there are no matches, the user must use some other result of From. 4643 if (Op == E) continue; 4644 4645 // Okay, we know this user needs to be updated. Remove its old self 4646 // from the CSE maps. 4647 RemoveNodeFromCSEMaps(User); 4648 4649 // Update all operands that match "From" in case there are multiple uses. 4650 for (; Op != E; ++Op) { 4651 if (*Op == From[i]) { 4652 From[i].getNode()->removeUser(Op-User->op_begin(), User); 4653 *Op = To[i]; 4654 Op->setUser(User); 4655 To[i].getNode()->addUser(Op-User->op_begin(), User); 4656 } 4657 } 4658 4659 // Now that we have modified User, add it back to the CSE maps. If it 4660 // already exists there, recursively merge the results together. 4661 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4662 if (!Existing) { 4663 if (UpdateListener) UpdateListener->NodeUpdated(User); 4664 continue; // Continue on to next user. 4665 } 4666 4667 // If there was already an existing matching node, use ReplaceAllUsesWith 4668 // to replace the dead one with the existing one. This can cause 4669 // recursive merging of other unrelated nodes down the line. 4670 ReplaceAllUsesWith(User, Existing, UpdateListener); 4671 4672 // User is now dead. Notify a listener if present. 4673 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4674 DeleteNodeNotInCSEMaps(User); 4675 } 4676} 4677 4678/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4679/// based on their topological order. It returns the maximum id and a vector 4680/// of the SDNodes* in assigned order by reference. 4681unsigned SelectionDAG::AssignTopologicalOrder() { 4682 4683 unsigned DAGSize = 0; 4684 4685 // SortedPos tracks the progress of the algorithm. Nodes before it are 4686 // sorted, nodes after it are unsorted. When the algorithm completes 4687 // it is at the end of the list. 4688 allnodes_iterator SortedPos = allnodes_begin(); 4689 4690 // Visit all the nodes. Move nodes with no operands to the front of 4691 // the list immediately. Annotate nodes that do have operands with their 4692 // operand count. Before we do this, the Node Id fields of the nodes 4693 // may contain arbitrary values. After, the Node Id fields for nodes 4694 // before SortedPos will contain the topological sort index, and the 4695 // Node Id fields for nodes At SortedPos and after will contain the 4696 // count of outstanding operands. 4697 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 4698 SDNode *N = I++; 4699 unsigned Degree = N->getNumOperands(); 4700 if (Degree == 0) { 4701 // A node with no uses, add it to the result array immediately. 4702 N->setNodeId(DAGSize++); 4703 allnodes_iterator Q = N; 4704 if (Q != SortedPos) 4705 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 4706 ++SortedPos; 4707 } else { 4708 // Temporarily use the Node Id as scratch space for the degree count. 4709 N->setNodeId(Degree); 4710 } 4711 } 4712 4713 // Visit all the nodes. As we iterate, moves nodes into sorted order, 4714 // such that by the time the end is reached all nodes will be sorted. 4715 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 4716 SDNode *N = I; 4717 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 4718 UI != UE; ++UI) { 4719 SDNode *P = *UI; 4720 unsigned Degree = P->getNodeId(); 4721 --Degree; 4722 if (Degree == 0) { 4723 // All of P's operands are sorted, so P may sorted now. 4724 P->setNodeId(DAGSize++); 4725 if (P != SortedPos) 4726 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 4727 ++SortedPos; 4728 } else { 4729 // Update P's outstanding operand count. 4730 P->setNodeId(Degree); 4731 } 4732 } 4733 } 4734 4735 assert(SortedPos == AllNodes.end() && 4736 "Topological sort incomplete!"); 4737 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 4738 "First node in topological sort is not the entry token!"); 4739 assert(AllNodes.front().getNodeId() == 0 && 4740 "First node in topological sort has non-zero id!"); 4741 assert(AllNodes.front().getNumOperands() == 0 && 4742 "First node in topological sort has operands!"); 4743 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 4744 "Last node in topologic sort has unexpected id!"); 4745 assert(AllNodes.back().use_empty() && 4746 "Last node in topologic sort has users!"); 4747 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 4748 return DAGSize; 4749} 4750 4751 4752 4753//===----------------------------------------------------------------------===// 4754// SDNode Class 4755//===----------------------------------------------------------------------===// 4756 4757HandleSDNode::~HandleSDNode() { 4758 DropOperands(); 4759} 4760 4761GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4762 MVT VT, int64_t o) 4763 : SDNode(isa<GlobalVariable>(GA) && 4764 cast<GlobalVariable>(GA)->isThreadLocal() ? 4765 // Thread Local 4766 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4767 // Non Thread Local 4768 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4769 getSDVTList(VT)), Offset(o) { 4770 TheGlobal = const_cast<GlobalValue*>(GA); 4771} 4772 4773MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 4774 const Value *srcValue, int SVO, 4775 unsigned alignment, bool vol) 4776 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4777 Flags(encodeMemSDNodeFlags(vol, alignment)) { 4778 4779 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4780 assert(getAlignment() == alignment && "Alignment representation error!"); 4781 assert(isVolatile() == vol && "Volatile representation error!"); 4782} 4783 4784MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops, 4785 unsigned NumOps, MVT memvt, const Value *srcValue, 4786 int SVO, unsigned alignment, bool vol) 4787 : SDNode(Opc, VTs, Ops, NumOps), 4788 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4789 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 4790 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4791 assert(getAlignment() == alignment && "Alignment representation error!"); 4792 assert(isVolatile() == vol && "Volatile representation error!"); 4793} 4794 4795/// getMemOperand - Return a MachineMemOperand object describing the memory 4796/// reference performed by this memory reference. 4797MachineMemOperand MemSDNode::getMemOperand() const { 4798 int Flags = 0; 4799 if (isa<LoadSDNode>(this)) 4800 Flags = MachineMemOperand::MOLoad; 4801 else if (isa<StoreSDNode>(this)) 4802 Flags = MachineMemOperand::MOStore; 4803 else if (isa<AtomicSDNode>(this)) { 4804 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4805 } 4806 else { 4807 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 4808 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 4809 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 4810 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 4811 } 4812 4813 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4814 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4815 4816 // Check if the memory reference references a frame index 4817 const FrameIndexSDNode *FI = 4818 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 4819 if (!getSrcValue() && FI) 4820 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4821 Flags, 0, Size, getAlignment()); 4822 else 4823 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4824 Size, getAlignment()); 4825} 4826 4827/// Profile - Gather unique data for the node. 4828/// 4829void SDNode::Profile(FoldingSetNodeID &ID) const { 4830 AddNodeIDNode(ID, this); 4831} 4832 4833/// getValueTypeList - Return a pointer to the specified value type. 4834/// 4835const MVT *SDNode::getValueTypeList(MVT VT) { 4836 if (VT.isExtended()) { 4837 static std::set<MVT, MVT::compareRawBits> EVTs; 4838 return &(*EVTs.insert(VT).first); 4839 } else { 4840 static MVT VTs[MVT::LAST_VALUETYPE]; 4841 VTs[VT.getSimpleVT()] = VT; 4842 return &VTs[VT.getSimpleVT()]; 4843 } 4844} 4845 4846/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4847/// indicated value. This method ignores uses of other values defined by this 4848/// operation. 4849bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4850 assert(Value < getNumValues() && "Bad value!"); 4851 4852 // TODO: Only iterate over uses of a given value of the node 4853 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4854 if (UI.getUse().getSDValue().getResNo() == Value) { 4855 if (NUses == 0) 4856 return false; 4857 --NUses; 4858 } 4859 } 4860 4861 // Found exactly the right number of uses? 4862 return NUses == 0; 4863} 4864 4865 4866/// hasAnyUseOfValue - Return true if there are any use of the indicated 4867/// value. This method ignores uses of other values defined by this operation. 4868bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4869 assert(Value < getNumValues() && "Bad value!"); 4870 4871 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 4872 if (UI.getUse().getSDValue().getResNo() == Value) 4873 return true; 4874 4875 return false; 4876} 4877 4878 4879/// isOnlyUserOf - Return true if this node is the only use of N. 4880/// 4881bool SDNode::isOnlyUserOf(SDNode *N) const { 4882 bool Seen = false; 4883 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4884 SDNode *User = *I; 4885 if (User == this) 4886 Seen = true; 4887 else 4888 return false; 4889 } 4890 4891 return Seen; 4892} 4893 4894/// isOperand - Return true if this node is an operand of N. 4895/// 4896bool SDValue::isOperandOf(SDNode *N) const { 4897 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4898 if (*this == N->getOperand(i)) 4899 return true; 4900 return false; 4901} 4902 4903bool SDNode::isOperandOf(SDNode *N) const { 4904 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4905 if (this == N->OperandList[i].getVal()) 4906 return true; 4907 return false; 4908} 4909 4910/// reachesChainWithoutSideEffects - Return true if this operand (which must 4911/// be a chain) reaches the specified operand without crossing any 4912/// side-effecting instructions. In practice, this looks through token 4913/// factors and non-volatile loads. In order to remain efficient, this only 4914/// looks a couple of nodes in, it does not do an exhaustive search. 4915bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 4916 unsigned Depth) const { 4917 if (*this == Dest) return true; 4918 4919 // Don't search too deeply, we just want to be able to see through 4920 // TokenFactor's etc. 4921 if (Depth == 0) return false; 4922 4923 // If this is a token factor, all inputs to the TF happen in parallel. If any 4924 // of the operands of the TF reach dest, then we can do the xform. 4925 if (getOpcode() == ISD::TokenFactor) { 4926 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4927 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4928 return true; 4929 return false; 4930 } 4931 4932 // Loads don't have side effects, look through them. 4933 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4934 if (!Ld->isVolatile()) 4935 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4936 } 4937 return false; 4938} 4939 4940 4941static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4942 SmallPtrSet<SDNode *, 32> &Visited) { 4943 if (found || !Visited.insert(N)) 4944 return; 4945 4946 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4947 SDNode *Op = N->getOperand(i).getNode(); 4948 if (Op == P) { 4949 found = true; 4950 return; 4951 } 4952 findPredecessor(Op, P, found, Visited); 4953 } 4954} 4955 4956/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4957/// is either an operand of N or it can be reached by recursively traversing 4958/// up the operands. 4959/// NOTE: this is an expensive method. Use it carefully. 4960bool SDNode::isPredecessorOf(SDNode *N) const { 4961 SmallPtrSet<SDNode *, 32> Visited; 4962 bool found = false; 4963 findPredecessor(N, this, found, Visited); 4964 return found; 4965} 4966 4967uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4968 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4969 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 4970} 4971 4972std::string SDNode::getOperationName(const SelectionDAG *G) const { 4973 switch (getOpcode()) { 4974 default: 4975 if (getOpcode() < ISD::BUILTIN_OP_END) 4976 return "<<Unknown DAG Node>>"; 4977 if (isMachineOpcode()) { 4978 if (G) 4979 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4980 if (getMachineOpcode() < TII->getNumOpcodes()) 4981 return TII->get(getMachineOpcode()).getName(); 4982 return "<<Unknown Machine Node>>"; 4983 } 4984 if (G) { 4985 const TargetLowering &TLI = G->getTargetLoweringInfo(); 4986 const char *Name = TLI.getTargetNodeName(getOpcode()); 4987 if (Name) return Name; 4988 return "<<Unknown Target Node>>"; 4989 } 4990 return "<<Unknown Node>>"; 4991 4992#ifndef NDEBUG 4993 case ISD::DELETED_NODE: 4994 return "<<Deleted Node!>>"; 4995#endif 4996 case ISD::PREFETCH: return "Prefetch"; 4997 case ISD::MEMBARRIER: return "MemBarrier"; 4998 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 4999 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5000 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5001 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5002 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5003 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5004 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5005 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5006 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5007 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5008 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5009 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5010 case ISD::PCMARKER: return "PCMarker"; 5011 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5012 case ISD::SRCVALUE: return "SrcValue"; 5013 case ISD::MEMOPERAND: return "MemOperand"; 5014 case ISD::EntryToken: return "EntryToken"; 5015 case ISD::TokenFactor: return "TokenFactor"; 5016 case ISD::AssertSext: return "AssertSext"; 5017 case ISD::AssertZext: return "AssertZext"; 5018 5019 case ISD::BasicBlock: return "BasicBlock"; 5020 case ISD::ARG_FLAGS: return "ArgFlags"; 5021 case ISD::VALUETYPE: return "ValueType"; 5022 case ISD::Register: return "Register"; 5023 5024 case ISD::Constant: return "Constant"; 5025 case ISD::ConstantFP: return "ConstantFP"; 5026 case ISD::GlobalAddress: return "GlobalAddress"; 5027 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5028 case ISD::FrameIndex: return "FrameIndex"; 5029 case ISD::JumpTable: return "JumpTable"; 5030 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5031 case ISD::RETURNADDR: return "RETURNADDR"; 5032 case ISD::FRAMEADDR: return "FRAMEADDR"; 5033 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5034 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5035 case ISD::EHSELECTION: return "EHSELECTION"; 5036 case ISD::EH_RETURN: return "EH_RETURN"; 5037 case ISD::ConstantPool: return "ConstantPool"; 5038 case ISD::ExternalSymbol: return "ExternalSymbol"; 5039 case ISD::INTRINSIC_WO_CHAIN: { 5040 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5041 return Intrinsic::getName((Intrinsic::ID)IID); 5042 } 5043 case ISD::INTRINSIC_VOID: 5044 case ISD::INTRINSIC_W_CHAIN: { 5045 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5046 return Intrinsic::getName((Intrinsic::ID)IID); 5047 } 5048 5049 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5050 case ISD::TargetConstant: return "TargetConstant"; 5051 case ISD::TargetConstantFP:return "TargetConstantFP"; 5052 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5053 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5054 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5055 case ISD::TargetJumpTable: return "TargetJumpTable"; 5056 case ISD::TargetConstantPool: return "TargetConstantPool"; 5057 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5058 5059 case ISD::CopyToReg: return "CopyToReg"; 5060 case ISD::CopyFromReg: return "CopyFromReg"; 5061 case ISD::UNDEF: return "undef"; 5062 case ISD::MERGE_VALUES: return "merge_values"; 5063 case ISD::INLINEASM: return "inlineasm"; 5064 case ISD::DBG_LABEL: return "dbg_label"; 5065 case ISD::EH_LABEL: return "eh_label"; 5066 case ISD::DECLARE: return "declare"; 5067 case ISD::HANDLENODE: return "handlenode"; 5068 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 5069 case ISD::CALL: return "call"; 5070 5071 // Unary operators 5072 case ISD::FABS: return "fabs"; 5073 case ISD::FNEG: return "fneg"; 5074 case ISD::FSQRT: return "fsqrt"; 5075 case ISD::FSIN: return "fsin"; 5076 case ISD::FCOS: return "fcos"; 5077 case ISD::FPOWI: return "fpowi"; 5078 case ISD::FPOW: return "fpow"; 5079 case ISD::FTRUNC: return "ftrunc"; 5080 case ISD::FFLOOR: return "ffloor"; 5081 case ISD::FCEIL: return "fceil"; 5082 case ISD::FRINT: return "frint"; 5083 case ISD::FNEARBYINT: return "fnearbyint"; 5084 5085 // Binary operators 5086 case ISD::ADD: return "add"; 5087 case ISD::SUB: return "sub"; 5088 case ISD::MUL: return "mul"; 5089 case ISD::MULHU: return "mulhu"; 5090 case ISD::MULHS: return "mulhs"; 5091 case ISD::SDIV: return "sdiv"; 5092 case ISD::UDIV: return "udiv"; 5093 case ISD::SREM: return "srem"; 5094 case ISD::UREM: return "urem"; 5095 case ISD::SMUL_LOHI: return "smul_lohi"; 5096 case ISD::UMUL_LOHI: return "umul_lohi"; 5097 case ISD::SDIVREM: return "sdivrem"; 5098 case ISD::UDIVREM: return "udivrem"; 5099 case ISD::AND: return "and"; 5100 case ISD::OR: return "or"; 5101 case ISD::XOR: return "xor"; 5102 case ISD::SHL: return "shl"; 5103 case ISD::SRA: return "sra"; 5104 case ISD::SRL: return "srl"; 5105 case ISD::ROTL: return "rotl"; 5106 case ISD::ROTR: return "rotr"; 5107 case ISD::FADD: return "fadd"; 5108 case ISD::FSUB: return "fsub"; 5109 case ISD::FMUL: return "fmul"; 5110 case ISD::FDIV: return "fdiv"; 5111 case ISD::FREM: return "frem"; 5112 case ISD::FCOPYSIGN: return "fcopysign"; 5113 case ISD::FGETSIGN: return "fgetsign"; 5114 5115 case ISD::SETCC: return "setcc"; 5116 case ISD::VSETCC: return "vsetcc"; 5117 case ISD::SELECT: return "select"; 5118 case ISD::SELECT_CC: return "select_cc"; 5119 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5120 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5121 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5122 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5123 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5124 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5125 case ISD::CARRY_FALSE: return "carry_false"; 5126 case ISD::ADDC: return "addc"; 5127 case ISD::ADDE: return "adde"; 5128 case ISD::SADDO: return "saddo"; 5129 case ISD::UADDO: return "uaddo"; 5130 case ISD::SSUBO: return "ssubo"; 5131 case ISD::USUBO: return "usubo"; 5132 case ISD::SMULO: return "smulo"; 5133 case ISD::UMULO: return "umulo"; 5134 case ISD::SUBC: return "subc"; 5135 case ISD::SUBE: return "sube"; 5136 case ISD::SHL_PARTS: return "shl_parts"; 5137 case ISD::SRA_PARTS: return "sra_parts"; 5138 case ISD::SRL_PARTS: return "srl_parts"; 5139 5140 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5141 case ISD::INSERT_SUBREG: return "insert_subreg"; 5142 5143 // Conversion operators. 5144 case ISD::SIGN_EXTEND: return "sign_extend"; 5145 case ISD::ZERO_EXTEND: return "zero_extend"; 5146 case ISD::ANY_EXTEND: return "any_extend"; 5147 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5148 case ISD::TRUNCATE: return "truncate"; 5149 case ISD::FP_ROUND: return "fp_round"; 5150 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5151 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5152 case ISD::FP_EXTEND: return "fp_extend"; 5153 5154 case ISD::SINT_TO_FP: return "sint_to_fp"; 5155 case ISD::UINT_TO_FP: return "uint_to_fp"; 5156 case ISD::FP_TO_SINT: return "fp_to_sint"; 5157 case ISD::FP_TO_UINT: return "fp_to_uint"; 5158 case ISD::BIT_CONVERT: return "bit_convert"; 5159 5160 case ISD::CONVERT_RNDSAT: { 5161 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5162 default: assert(0 && "Unknown cvt code!"); 5163 case ISD::CVT_FF: return "cvt_ff"; 5164 case ISD::CVT_FS: return "cvt_fs"; 5165 case ISD::CVT_FU: return "cvt_fu"; 5166 case ISD::CVT_SF: return "cvt_sf"; 5167 case ISD::CVT_UF: return "cvt_uf"; 5168 case ISD::CVT_SS: return "cvt_ss"; 5169 case ISD::CVT_SU: return "cvt_su"; 5170 case ISD::CVT_US: return "cvt_us"; 5171 case ISD::CVT_UU: return "cvt_uu"; 5172 } 5173 } 5174 5175 // Control flow instructions 5176 case ISD::BR: return "br"; 5177 case ISD::BRIND: return "brind"; 5178 case ISD::BR_JT: return "br_jt"; 5179 case ISD::BRCOND: return "brcond"; 5180 case ISD::BR_CC: return "br_cc"; 5181 case ISD::RET: return "ret"; 5182 case ISD::CALLSEQ_START: return "callseq_start"; 5183 case ISD::CALLSEQ_END: return "callseq_end"; 5184 5185 // Other operators 5186 case ISD::LOAD: return "load"; 5187 case ISD::STORE: return "store"; 5188 case ISD::VAARG: return "vaarg"; 5189 case ISD::VACOPY: return "vacopy"; 5190 case ISD::VAEND: return "vaend"; 5191 case ISD::VASTART: return "vastart"; 5192 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5193 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5194 case ISD::BUILD_PAIR: return "build_pair"; 5195 case ISD::STACKSAVE: return "stacksave"; 5196 case ISD::STACKRESTORE: return "stackrestore"; 5197 case ISD::TRAP: return "trap"; 5198 5199 // Bit manipulation 5200 case ISD::BSWAP: return "bswap"; 5201 case ISD::CTPOP: return "ctpop"; 5202 case ISD::CTTZ: return "cttz"; 5203 case ISD::CTLZ: return "ctlz"; 5204 5205 // Debug info 5206 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5207 case ISD::DEBUG_LOC: return "debug_loc"; 5208 5209 // Trampolines 5210 case ISD::TRAMPOLINE: return "trampoline"; 5211 5212 case ISD::CONDCODE: 5213 switch (cast<CondCodeSDNode>(this)->get()) { 5214 default: assert(0 && "Unknown setcc condition!"); 5215 case ISD::SETOEQ: return "setoeq"; 5216 case ISD::SETOGT: return "setogt"; 5217 case ISD::SETOGE: return "setoge"; 5218 case ISD::SETOLT: return "setolt"; 5219 case ISD::SETOLE: return "setole"; 5220 case ISD::SETONE: return "setone"; 5221 5222 case ISD::SETO: return "seto"; 5223 case ISD::SETUO: return "setuo"; 5224 case ISD::SETUEQ: return "setue"; 5225 case ISD::SETUGT: return "setugt"; 5226 case ISD::SETUGE: return "setuge"; 5227 case ISD::SETULT: return "setult"; 5228 case ISD::SETULE: return "setule"; 5229 case ISD::SETUNE: return "setune"; 5230 5231 case ISD::SETEQ: return "seteq"; 5232 case ISD::SETGT: return "setgt"; 5233 case ISD::SETGE: return "setge"; 5234 case ISD::SETLT: return "setlt"; 5235 case ISD::SETLE: return "setle"; 5236 case ISD::SETNE: return "setne"; 5237 } 5238 } 5239} 5240 5241const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5242 switch (AM) { 5243 default: 5244 return ""; 5245 case ISD::PRE_INC: 5246 return "<pre-inc>"; 5247 case ISD::PRE_DEC: 5248 return "<pre-dec>"; 5249 case ISD::POST_INC: 5250 return "<post-inc>"; 5251 case ISD::POST_DEC: 5252 return "<post-dec>"; 5253 } 5254} 5255 5256std::string ISD::ArgFlagsTy::getArgFlagsString() { 5257 std::string S = "< "; 5258 5259 if (isZExt()) 5260 S += "zext "; 5261 if (isSExt()) 5262 S += "sext "; 5263 if (isInReg()) 5264 S += "inreg "; 5265 if (isSRet()) 5266 S += "sret "; 5267 if (isByVal()) 5268 S += "byval "; 5269 if (isNest()) 5270 S += "nest "; 5271 if (getByValAlign()) 5272 S += "byval-align:" + utostr(getByValAlign()) + " "; 5273 if (getOrigAlign()) 5274 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5275 if (getByValSize()) 5276 S += "byval-size:" + utostr(getByValSize()) + " "; 5277 return S + ">"; 5278} 5279 5280void SDNode::dump() const { dump(0); } 5281void SDNode::dump(const SelectionDAG *G) const { 5282 print(errs(), G); 5283 errs().flush(); 5284} 5285 5286void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5287 OS << (void*)this << ": "; 5288 5289 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5290 if (i) OS << ","; 5291 if (getValueType(i) == MVT::Other) 5292 OS << "ch"; 5293 else 5294 OS << getValueType(i).getMVTString(); 5295 } 5296 OS << " = " << getOperationName(G); 5297 5298 OS << " "; 5299 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5300 if (i) OS << ", "; 5301 OS << (void*)getOperand(i).getNode(); 5302 if (unsigned RN = getOperand(i).getResNo()) 5303 OS << ":" << RN; 5304 } 5305 5306 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5307 SDNode *Mask = getOperand(2).getNode(); 5308 OS << "<"; 5309 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5310 if (i) OS << ","; 5311 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5312 OS << "u"; 5313 else 5314 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5315 } 5316 OS << ">"; 5317 } 5318 5319 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5320 OS << '<' << CSDN->getAPIntValue() << '>'; 5321 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5322 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5323 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5324 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5325 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5326 else { 5327 OS << "<APFloat("; 5328 CSDN->getValueAPF().bitcastToAPInt().dump(); 5329 OS << ")>"; 5330 } 5331 } else if (const GlobalAddressSDNode *GADN = 5332 dyn_cast<GlobalAddressSDNode>(this)) { 5333 int64_t offset = GADN->getOffset(); 5334 OS << '<'; 5335 WriteAsOperand(OS, GADN->getGlobal()); 5336 OS << '>'; 5337 if (offset > 0) 5338 OS << " + " << offset; 5339 else 5340 OS << " " << offset; 5341 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5342 OS << "<" << FIDN->getIndex() << ">"; 5343 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5344 OS << "<" << JTDN->getIndex() << ">"; 5345 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5346 int offset = CP->getOffset(); 5347 if (CP->isMachineConstantPoolEntry()) 5348 OS << "<" << *CP->getMachineCPVal() << ">"; 5349 else 5350 OS << "<" << *CP->getConstVal() << ">"; 5351 if (offset > 0) 5352 OS << " + " << offset; 5353 else 5354 OS << " " << offset; 5355 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5356 OS << "<"; 5357 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5358 if (LBB) 5359 OS << LBB->getName() << " "; 5360 OS << (const void*)BBDN->getBasicBlock() << ">"; 5361 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5362 if (G && R->getReg() && 5363 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5364 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5365 } else { 5366 OS << " #" << R->getReg(); 5367 } 5368 } else if (const ExternalSymbolSDNode *ES = 5369 dyn_cast<ExternalSymbolSDNode>(this)) { 5370 OS << "'" << ES->getSymbol() << "'"; 5371 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5372 if (M->getValue()) 5373 OS << "<" << M->getValue() << ">"; 5374 else 5375 OS << "<null>"; 5376 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5377 if (M->MO.getValue()) 5378 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5379 else 5380 OS << "<null:" << M->MO.getOffset() << ">"; 5381 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5382 OS << N->getArgFlags().getArgFlagsString(); 5383 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5384 OS << ":" << N->getVT().getMVTString(); 5385 } 5386 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5387 const Value *SrcValue = LD->getSrcValue(); 5388 int SrcOffset = LD->getSrcValueOffset(); 5389 OS << " <"; 5390 if (SrcValue) 5391 OS << SrcValue; 5392 else 5393 OS << "null"; 5394 OS << ":" << SrcOffset << ">"; 5395 5396 bool doExt = true; 5397 switch (LD->getExtensionType()) { 5398 default: doExt = false; break; 5399 case ISD::EXTLOAD: OS << " <anyext "; break; 5400 case ISD::SEXTLOAD: OS << " <sext "; break; 5401 case ISD::ZEXTLOAD: OS << " <zext "; break; 5402 } 5403 if (doExt) 5404 OS << LD->getMemoryVT().getMVTString() << ">"; 5405 5406 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5407 if (*AM) 5408 OS << " " << AM; 5409 if (LD->isVolatile()) 5410 OS << " <volatile>"; 5411 OS << " alignment=" << LD->getAlignment(); 5412 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5413 const Value *SrcValue = ST->getSrcValue(); 5414 int SrcOffset = ST->getSrcValueOffset(); 5415 OS << " <"; 5416 if (SrcValue) 5417 OS << SrcValue; 5418 else 5419 OS << "null"; 5420 OS << ":" << SrcOffset << ">"; 5421 5422 if (ST->isTruncatingStore()) 5423 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 5424 5425 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5426 if (*AM) 5427 OS << " " << AM; 5428 if (ST->isVolatile()) 5429 OS << " <volatile>"; 5430 OS << " alignment=" << ST->getAlignment(); 5431 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5432 const Value *SrcValue = AT->getSrcValue(); 5433 int SrcOffset = AT->getSrcValueOffset(); 5434 OS << " <"; 5435 if (SrcValue) 5436 OS << SrcValue; 5437 else 5438 OS << "null"; 5439 OS << ":" << SrcOffset << ">"; 5440 if (AT->isVolatile()) 5441 OS << " <volatile>"; 5442 OS << " alignment=" << AT->getAlignment(); 5443 } 5444} 5445 5446static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5447 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5448 if (N->getOperand(i).getNode()->hasOneUse()) 5449 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5450 else 5451 cerr << "\n" << std::string(indent+2, ' ') 5452 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5453 5454 5455 cerr << "\n" << std::string(indent, ' '); 5456 N->dump(G); 5457} 5458 5459void SelectionDAG::dump() const { 5460 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5461 5462 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5463 I != E; ++I) { 5464 const SDNode *N = I; 5465 if (!N->hasOneUse() && N != getRoot().getNode()) 5466 DumpNodes(N, 2, this); 5467 } 5468 5469 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5470 5471 cerr << "\n\n"; 5472} 5473 5474const Type *ConstantPoolSDNode::getType() const { 5475 if (isMachineConstantPoolEntry()) 5476 return Val.MachineCPVal->getType(); 5477 return Val.ConstVal->getType(); 5478} 5479