SelectionDAG.cpp revision 7c626d30974c632ab500171ff185a24bcf2603bf
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/CallingConv.h" 18#include "llvm/Constants.h" 19#include "llvm/DebugInfo.h" 20#include "llvm/DerivedTypes.h" 21#include "llvm/Function.h" 22#include "llvm/GlobalAlias.h" 23#include "llvm/GlobalVariable.h" 24#include "llvm/Intrinsics.h" 25#include "llvm/Analysis/ValueTracking.h" 26#include "llvm/Assembly/Writer.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetSelectionDAGInfo.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Support/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f16: return &APFloat::IEEEhalf; 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74// Default null implementations of the callbacks. 75void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 76void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 77 78//===----------------------------------------------------------------------===// 79// ConstantFPSDNode Class 80//===----------------------------------------------------------------------===// 81 82/// isExactlyValue - We don't rely on operator== working on double values, as 83/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 84/// As such, this method can be used to do an exact bit-for-bit comparison of 85/// two floating point values. 86bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 87 return getValueAPF().bitwiseIsEqual(V); 88} 89 90bool ConstantFPSDNode::isValueValidForType(EVT VT, 91 const APFloat& Val) { 92 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 93 94 // PPC long double cannot be converted to any other type. 95 if (VT == MVT::ppcf128 || 96 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 97 return false; 98 99 // convert modifies in place, so make a copy. 100 APFloat Val2 = APFloat(Val); 101 bool losesInfo; 102 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 103 &losesInfo); 104 return !losesInfo; 105} 106 107//===----------------------------------------------------------------------===// 108// ISD Namespace 109//===----------------------------------------------------------------------===// 110 111/// isBuildVectorAllOnes - Return true if the specified node is a 112/// BUILD_VECTOR where all of the elements are ~0 or undef. 113bool ISD::isBuildVectorAllOnes(const SDNode *N) { 114 // Look through a bit convert. 115 if (N->getOpcode() == ISD::BITCAST) 116 N = N->getOperand(0).getNode(); 117 118 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 119 120 unsigned i = 0, e = N->getNumOperands(); 121 122 // Skip over all of the undef values. 123 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 124 ++i; 125 126 // Do not accept an all-undef vector. 127 if (i == e) return false; 128 129 // Do not accept build_vectors that aren't all constants or which have non-~0 130 // elements. We have to be a bit careful here, as the type of the constant 131 // may not be the same as the type of the vector elements due to type 132 // legalization (the elements are promoted to a legal type for the target and 133 // a vector of a type may be legal when the base element type is not). 134 // We only want to check enough bits to cover the vector elements, because 135 // we care if the resultant vector is all ones, not whether the individual 136 // constants are. 137 SDValue NotZero = N->getOperand(i); 138 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 139 if (isa<ConstantSDNode>(NotZero)) { 140 if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes() < 141 EltSize) 142 return false; 143 } else if (isa<ConstantFPSDNode>(NotZero)) { 144 if (cast<ConstantFPSDNode>(NotZero)->getValueAPF() 145 .bitcastToAPInt().countTrailingOnes() < EltSize) 146 return false; 147 } else 148 return false; 149 150 // Okay, we have at least one ~0 value, check to see if the rest match or are 151 // undefs. Even with the above element type twiddling, this should be OK, as 152 // the same type legalization should have applied to all the elements. 153 for (++i; i != e; ++i) 154 if (N->getOperand(i) != NotZero && 155 N->getOperand(i).getOpcode() != ISD::UNDEF) 156 return false; 157 return true; 158} 159 160 161/// isBuildVectorAllZeros - Return true if the specified node is a 162/// BUILD_VECTOR where all of the elements are 0 or undef. 163bool ISD::isBuildVectorAllZeros(const SDNode *N) { 164 // Look through a bit convert. 165 if (N->getOpcode() == ISD::BITCAST) 166 N = N->getOperand(0).getNode(); 167 168 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 169 170 unsigned i = 0, e = N->getNumOperands(); 171 172 // Skip over all of the undef values. 173 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 174 ++i; 175 176 // Do not accept an all-undef vector. 177 if (i == e) return false; 178 179 // Do not accept build_vectors that aren't all constants or which have non-0 180 // elements. 181 SDValue Zero = N->getOperand(i); 182 if (isa<ConstantSDNode>(Zero)) { 183 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 184 return false; 185 } else if (isa<ConstantFPSDNode>(Zero)) { 186 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 187 return false; 188 } else 189 return false; 190 191 // Okay, we have at least one 0 value, check to see if the rest match or are 192 // undefs. 193 for (++i; i != e; ++i) 194 if (N->getOperand(i) != Zero && 195 N->getOperand(i).getOpcode() != ISD::UNDEF) 196 return false; 197 return true; 198} 199 200/// isScalarToVector - Return true if the specified node is a 201/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 202/// element is not an undef. 203bool ISD::isScalarToVector(const SDNode *N) { 204 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 205 return true; 206 207 if (N->getOpcode() != ISD::BUILD_VECTOR) 208 return false; 209 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 210 return false; 211 unsigned NumElems = N->getNumOperands(); 212 if (NumElems == 1) 213 return false; 214 for (unsigned i = 1; i < NumElems; ++i) { 215 SDValue V = N->getOperand(i); 216 if (V.getOpcode() != ISD::UNDEF) 217 return false; 218 } 219 return true; 220} 221 222/// allOperandsUndef - Return true if the node has at least one operand 223/// and all operands of the specified node are ISD::UNDEF. 224bool ISD::allOperandsUndef(const SDNode *N) { 225 // Return false if the node has no operands. 226 // This is "logically inconsistent" with the definition of "all" but 227 // is probably the desired behavior. 228 if (N->getNumOperands() == 0) 229 return false; 230 231 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 232 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 233 return false; 234 235 return true; 236} 237 238/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 239/// when given the operation for (X op Y). 240ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 241 // To perform this operation, we just need to swap the L and G bits of the 242 // operation. 243 unsigned OldL = (Operation >> 2) & 1; 244 unsigned OldG = (Operation >> 1) & 1; 245 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 246 (OldL << 1) | // New G bit 247 (OldG << 2)); // New L bit. 248} 249 250/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 251/// 'op' is a valid SetCC operation. 252ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 253 unsigned Operation = Op; 254 if (isInteger) 255 Operation ^= 7; // Flip L, G, E bits, but not U. 256 else 257 Operation ^= 15; // Flip all of the condition bits. 258 259 if (Operation > ISD::SETTRUE2) 260 Operation &= ~8; // Don't let N and U bits get set. 261 262 return ISD::CondCode(Operation); 263} 264 265 266/// isSignedOp - For an integer comparison, return 1 if the comparison is a 267/// signed operation and 2 if the result is an unsigned comparison. Return zero 268/// if the operation does not depend on the sign of the input (setne and seteq). 269static int isSignedOp(ISD::CondCode Opcode) { 270 switch (Opcode) { 271 default: llvm_unreachable("Illegal integer setcc operation!"); 272 case ISD::SETEQ: 273 case ISD::SETNE: return 0; 274 case ISD::SETLT: 275 case ISD::SETLE: 276 case ISD::SETGT: 277 case ISD::SETGE: return 1; 278 case ISD::SETULT: 279 case ISD::SETULE: 280 case ISD::SETUGT: 281 case ISD::SETUGE: return 2; 282 } 283} 284 285/// getSetCCOrOperation - Return the result of a logical OR between different 286/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 287/// returns SETCC_INVALID if it is not possible to represent the resultant 288/// comparison. 289ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 290 bool isInteger) { 291 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 292 // Cannot fold a signed integer setcc with an unsigned integer setcc. 293 return ISD::SETCC_INVALID; 294 295 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 296 297 // If the N and U bits get set then the resultant comparison DOES suddenly 298 // care about orderedness, and is true when ordered. 299 if (Op > ISD::SETTRUE2) 300 Op &= ~16; // Clear the U bit if the N bit is set. 301 302 // Canonicalize illegal integer setcc's. 303 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 304 Op = ISD::SETNE; 305 306 return ISD::CondCode(Op); 307} 308 309/// getSetCCAndOperation - Return the result of a logical AND between different 310/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 311/// function returns zero if it is not possible to represent the resultant 312/// comparison. 313ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 314 bool isInteger) { 315 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 316 // Cannot fold a signed setcc with an unsigned setcc. 317 return ISD::SETCC_INVALID; 318 319 // Combine all of the condition bits. 320 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 321 322 // Canonicalize illegal integer setcc's. 323 if (isInteger) { 324 switch (Result) { 325 default: break; 326 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 327 case ISD::SETOEQ: // SETEQ & SETU[LG]E 328 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 329 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 330 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 331 } 332 } 333 334 return Result; 335} 336 337//===----------------------------------------------------------------------===// 338// SDNode Profile Support 339//===----------------------------------------------------------------------===// 340 341/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 342/// 343static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 344 ID.AddInteger(OpC); 345} 346 347/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 348/// solely with their pointer. 349static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 350 ID.AddPointer(VTList.VTs); 351} 352 353/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 354/// 355static void AddNodeIDOperands(FoldingSetNodeID &ID, 356 const SDValue *Ops, unsigned NumOps) { 357 for (; NumOps; --NumOps, ++Ops) { 358 ID.AddPointer(Ops->getNode()); 359 ID.AddInteger(Ops->getResNo()); 360 } 361} 362 363/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 364/// 365static void AddNodeIDOperands(FoldingSetNodeID &ID, 366 const SDUse *Ops, unsigned NumOps) { 367 for (; NumOps; --NumOps, ++Ops) { 368 ID.AddPointer(Ops->getNode()); 369 ID.AddInteger(Ops->getResNo()); 370 } 371} 372 373static void AddNodeIDNode(FoldingSetNodeID &ID, 374 unsigned short OpC, SDVTList VTList, 375 const SDValue *OpList, unsigned N) { 376 AddNodeIDOpcode(ID, OpC); 377 AddNodeIDValueTypes(ID, VTList); 378 AddNodeIDOperands(ID, OpList, N); 379} 380 381/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 382/// the NodeID data. 383static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 384 switch (N->getOpcode()) { 385 case ISD::TargetExternalSymbol: 386 case ISD::ExternalSymbol: 387 llvm_unreachable("Should only be used on nodes with operands"); 388 default: break; // Normal nodes don't need extra info. 389 case ISD::TargetConstant: 390 case ISD::Constant: 391 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 392 break; 393 case ISD::TargetConstantFP: 394 case ISD::ConstantFP: { 395 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 396 break; 397 } 398 case ISD::TargetGlobalAddress: 399 case ISD::GlobalAddress: 400 case ISD::TargetGlobalTLSAddress: 401 case ISD::GlobalTLSAddress: { 402 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 403 ID.AddPointer(GA->getGlobal()); 404 ID.AddInteger(GA->getOffset()); 405 ID.AddInteger(GA->getTargetFlags()); 406 ID.AddInteger(GA->getAddressSpace()); 407 break; 408 } 409 case ISD::BasicBlock: 410 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 411 break; 412 case ISD::Register: 413 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 414 break; 415 case ISD::RegisterMask: 416 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 417 break; 418 case ISD::SRCVALUE: 419 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 420 break; 421 case ISD::FrameIndex: 422 case ISD::TargetFrameIndex: 423 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 424 break; 425 case ISD::JumpTable: 426 case ISD::TargetJumpTable: 427 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 428 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 429 break; 430 case ISD::ConstantPool: 431 case ISD::TargetConstantPool: { 432 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 433 ID.AddInteger(CP->getAlignment()); 434 ID.AddInteger(CP->getOffset()); 435 if (CP->isMachineConstantPoolEntry()) 436 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 437 else 438 ID.AddPointer(CP->getConstVal()); 439 ID.AddInteger(CP->getTargetFlags()); 440 break; 441 } 442 case ISD::TargetIndex: { 443 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 444 ID.AddInteger(TI->getIndex()); 445 ID.AddInteger(TI->getOffset()); 446 ID.AddInteger(TI->getTargetFlags()); 447 break; 448 } 449 case ISD::LOAD: { 450 const LoadSDNode *LD = cast<LoadSDNode>(N); 451 ID.AddInteger(LD->getMemoryVT().getRawBits()); 452 ID.AddInteger(LD->getRawSubclassData()); 453 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 454 break; 455 } 456 case ISD::STORE: { 457 const StoreSDNode *ST = cast<StoreSDNode>(N); 458 ID.AddInteger(ST->getMemoryVT().getRawBits()); 459 ID.AddInteger(ST->getRawSubclassData()); 460 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 461 break; 462 } 463 case ISD::ATOMIC_CMP_SWAP: 464 case ISD::ATOMIC_SWAP: 465 case ISD::ATOMIC_LOAD_ADD: 466 case ISD::ATOMIC_LOAD_SUB: 467 case ISD::ATOMIC_LOAD_AND: 468 case ISD::ATOMIC_LOAD_OR: 469 case ISD::ATOMIC_LOAD_XOR: 470 case ISD::ATOMIC_LOAD_NAND: 471 case ISD::ATOMIC_LOAD_MIN: 472 case ISD::ATOMIC_LOAD_MAX: 473 case ISD::ATOMIC_LOAD_UMIN: 474 case ISD::ATOMIC_LOAD_UMAX: 475 case ISD::ATOMIC_LOAD: 476 case ISD::ATOMIC_STORE: { 477 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 478 ID.AddInteger(AT->getMemoryVT().getRawBits()); 479 ID.AddInteger(AT->getRawSubclassData()); 480 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 481 break; 482 } 483 case ISD::PREFETCH: { 484 const MemSDNode *PF = cast<MemSDNode>(N); 485 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 486 break; 487 } 488 case ISD::VECTOR_SHUFFLE: { 489 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 490 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 491 i != e; ++i) 492 ID.AddInteger(SVN->getMaskElt(i)); 493 break; 494 } 495 case ISD::TargetBlockAddress: 496 case ISD::BlockAddress: { 497 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 498 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 499 break; 500 } 501 } // end switch (N->getOpcode()) 502 503 // Target specific memory nodes could also have address spaces to check. 504 if (N->isTargetMemoryOpcode()) 505 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 506} 507 508/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 509/// data. 510static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 511 AddNodeIDOpcode(ID, N->getOpcode()); 512 // Add the return value info. 513 AddNodeIDValueTypes(ID, N->getVTList()); 514 // Add the operand info. 515 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 516 517 // Handle SDNode leafs with special info. 518 AddNodeIDCustom(ID, N); 519} 520 521/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 522/// the CSE map that carries volatility, temporalness, indexing mode, and 523/// extension/truncation information. 524/// 525static inline unsigned 526encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 527 bool isNonTemporal, bool isInvariant) { 528 assert((ConvType & 3) == ConvType && 529 "ConvType may not require more than 2 bits!"); 530 assert((AM & 7) == AM && 531 "AM may not require more than 3 bits!"); 532 return ConvType | 533 (AM << 2) | 534 (isVolatile << 5) | 535 (isNonTemporal << 6) | 536 (isInvariant << 7); 537} 538 539//===----------------------------------------------------------------------===// 540// SelectionDAG Class 541//===----------------------------------------------------------------------===// 542 543/// doNotCSE - Return true if CSE should not be performed for this node. 544static bool doNotCSE(SDNode *N) { 545 if (N->getValueType(0) == MVT::Glue) 546 return true; // Never CSE anything that produces a flag. 547 548 switch (N->getOpcode()) { 549 default: break; 550 case ISD::HANDLENODE: 551 case ISD::EH_LABEL: 552 return true; // Never CSE these nodes. 553 } 554 555 // Check that remaining values produced are not flags. 556 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 557 if (N->getValueType(i) == MVT::Glue) 558 return true; // Never CSE anything that produces a flag. 559 560 return false; 561} 562 563/// RemoveDeadNodes - This method deletes all unreachable nodes in the 564/// SelectionDAG. 565void SelectionDAG::RemoveDeadNodes() { 566 // Create a dummy node (which is not added to allnodes), that adds a reference 567 // to the root node, preventing it from being deleted. 568 HandleSDNode Dummy(getRoot()); 569 570 SmallVector<SDNode*, 128> DeadNodes; 571 572 // Add all obviously-dead nodes to the DeadNodes worklist. 573 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 574 if (I->use_empty()) 575 DeadNodes.push_back(I); 576 577 RemoveDeadNodes(DeadNodes); 578 579 // If the root changed (e.g. it was a dead load, update the root). 580 setRoot(Dummy.getValue()); 581} 582 583/// RemoveDeadNodes - This method deletes the unreachable nodes in the 584/// given list, and any nodes that become unreachable as a result. 585void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 586 587 // Process the worklist, deleting the nodes and adding their uses to the 588 // worklist. 589 while (!DeadNodes.empty()) { 590 SDNode *N = DeadNodes.pop_back_val(); 591 592 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 593 DUL->NodeDeleted(N, 0); 594 595 // Take the node out of the appropriate CSE map. 596 RemoveNodeFromCSEMaps(N); 597 598 // Next, brutally remove the operand list. This is safe to do, as there are 599 // no cycles in the graph. 600 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 601 SDUse &Use = *I++; 602 SDNode *Operand = Use.getNode(); 603 Use.set(SDValue()); 604 605 // Now that we removed this operand, see if there are no uses of it left. 606 if (Operand->use_empty()) 607 DeadNodes.push_back(Operand); 608 } 609 610 DeallocateNode(N); 611 } 612} 613 614void SelectionDAG::RemoveDeadNode(SDNode *N){ 615 SmallVector<SDNode*, 16> DeadNodes(1, N); 616 617 // Create a dummy node that adds a reference to the root node, preventing 618 // it from being deleted. (This matters if the root is an operand of the 619 // dead node.) 620 HandleSDNode Dummy(getRoot()); 621 622 RemoveDeadNodes(DeadNodes); 623} 624 625void SelectionDAG::DeleteNode(SDNode *N) { 626 // First take this out of the appropriate CSE map. 627 RemoveNodeFromCSEMaps(N); 628 629 // Finally, remove uses due to operands of this node, remove from the 630 // AllNodes list, and delete the node. 631 DeleteNodeNotInCSEMaps(N); 632} 633 634void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 635 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 636 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 637 638 // Drop all of the operands and decrement used node's use counts. 639 N->DropOperands(); 640 641 DeallocateNode(N); 642} 643 644void SelectionDAG::DeallocateNode(SDNode *N) { 645 if (N->OperandsNeedDelete) 646 delete[] N->OperandList; 647 648 // Set the opcode to DELETED_NODE to help catch bugs when node 649 // memory is reallocated. 650 N->NodeType = ISD::DELETED_NODE; 651 652 NodeAllocator.Deallocate(AllNodes.remove(N)); 653 654 // Remove the ordering of this node. 655 Ordering->remove(N); 656 657 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 658 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 659 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 660 DbgVals[i]->setIsInvalidated(); 661} 662 663/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 664/// correspond to it. This is useful when we're about to delete or repurpose 665/// the node. We don't want future request for structurally identical nodes 666/// to return N anymore. 667bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 668 bool Erased = false; 669 switch (N->getOpcode()) { 670 case ISD::HANDLENODE: return false; // noop. 671 case ISD::CONDCODE: 672 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 673 "Cond code doesn't exist!"); 674 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 675 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 676 break; 677 case ISD::ExternalSymbol: 678 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 679 break; 680 case ISD::TargetExternalSymbol: { 681 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 682 Erased = TargetExternalSymbols.erase( 683 std::pair<std::string,unsigned char>(ESN->getSymbol(), 684 ESN->getTargetFlags())); 685 break; 686 } 687 case ISD::VALUETYPE: { 688 EVT VT = cast<VTSDNode>(N)->getVT(); 689 if (VT.isExtended()) { 690 Erased = ExtendedValueTypeNodes.erase(VT); 691 } else { 692 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 693 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 694 } 695 break; 696 } 697 default: 698 // Remove it from the CSE Map. 699 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 700 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 701 Erased = CSEMap.RemoveNode(N); 702 break; 703 } 704#ifndef NDEBUG 705 // Verify that the node was actually in one of the CSE maps, unless it has a 706 // flag result (which cannot be CSE'd) or is one of the special cases that are 707 // not subject to CSE. 708 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 709 !N->isMachineOpcode() && !doNotCSE(N)) { 710 N->dump(this); 711 dbgs() << "\n"; 712 llvm_unreachable("Node is not in map!"); 713 } 714#endif 715 return Erased; 716} 717 718/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 719/// maps and modified in place. Add it back to the CSE maps, unless an identical 720/// node already exists, in which case transfer all its users to the existing 721/// node. This transfer can potentially trigger recursive merging. 722/// 723void 724SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 725 // For node types that aren't CSE'd, just act as if no identical node 726 // already exists. 727 if (!doNotCSE(N)) { 728 SDNode *Existing = CSEMap.GetOrInsertNode(N); 729 if (Existing != N) { 730 // If there was already an existing matching node, use ReplaceAllUsesWith 731 // to replace the dead one with the existing one. This can cause 732 // recursive merging of other unrelated nodes down the line. 733 ReplaceAllUsesWith(N, Existing); 734 735 // N is now dead. Inform the listeners and delete it. 736 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 737 DUL->NodeDeleted(N, Existing); 738 DeleteNodeNotInCSEMaps(N); 739 return; 740 } 741 } 742 743 // If the node doesn't already exist, we updated it. Inform listeners. 744 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 745 DUL->NodeUpdated(N); 746} 747 748/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 749/// were replaced with those specified. If this node is never memoized, 750/// return null, otherwise return a pointer to the slot it would take. If a 751/// node already exists with these operands, the slot will be non-null. 752SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 753 void *&InsertPos) { 754 if (doNotCSE(N)) 755 return 0; 756 757 SDValue Ops[] = { Op }; 758 FoldingSetNodeID ID; 759 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 760 AddNodeIDCustom(ID, N); 761 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 762 return Node; 763} 764 765/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 766/// were replaced with those specified. If this node is never memoized, 767/// return null, otherwise return a pointer to the slot it would take. If a 768/// node already exists with these operands, the slot will be non-null. 769SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 770 SDValue Op1, SDValue Op2, 771 void *&InsertPos) { 772 if (doNotCSE(N)) 773 return 0; 774 775 SDValue Ops[] = { Op1, Op2 }; 776 FoldingSetNodeID ID; 777 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 778 AddNodeIDCustom(ID, N); 779 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 780 return Node; 781} 782 783 784/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 785/// were replaced with those specified. If this node is never memoized, 786/// return null, otherwise return a pointer to the slot it would take. If a 787/// node already exists with these operands, the slot will be non-null. 788SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 789 const SDValue *Ops,unsigned NumOps, 790 void *&InsertPos) { 791 if (doNotCSE(N)) 792 return 0; 793 794 FoldingSetNodeID ID; 795 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 796 AddNodeIDCustom(ID, N); 797 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 798 return Node; 799} 800 801#ifndef NDEBUG 802/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 803static void VerifyNodeCommon(SDNode *N) { 804 switch (N->getOpcode()) { 805 default: 806 break; 807 case ISD::BUILD_PAIR: { 808 EVT VT = N->getValueType(0); 809 assert(N->getNumValues() == 1 && "Too many results!"); 810 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 811 "Wrong return type!"); 812 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 813 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 814 "Mismatched operand types!"); 815 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 816 "Wrong operand type!"); 817 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 818 "Wrong return type size"); 819 break; 820 } 821 case ISD::BUILD_VECTOR: { 822 assert(N->getNumValues() == 1 && "Too many results!"); 823 assert(N->getValueType(0).isVector() && "Wrong return type!"); 824 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 825 "Wrong number of operands!"); 826 EVT EltVT = N->getValueType(0).getVectorElementType(); 827 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 828 assert((I->getValueType() == EltVT || 829 (EltVT.isInteger() && I->getValueType().isInteger() && 830 EltVT.bitsLE(I->getValueType()))) && 831 "Wrong operand type!"); 832 assert(I->getValueType() == N->getOperand(0).getValueType() && 833 "Operands must all have the same type"); 834 } 835 break; 836 } 837 } 838} 839 840/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 841static void VerifySDNode(SDNode *N) { 842 // The SDNode allocators cannot be used to allocate nodes with fields that are 843 // not present in an SDNode! 844 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 845 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 846 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 847 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 848 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 849 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 850 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 851 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 852 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 853 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 854 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 855 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 856 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 857 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 858 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 859 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 860 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 861 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 862 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 863 864 VerifyNodeCommon(N); 865} 866 867/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 868/// invalid. 869static void VerifyMachineNode(SDNode *N) { 870 // The MachineNode allocators cannot be used to allocate nodes with fields 871 // that are not present in a MachineNode! 872 // Currently there are no such nodes. 873 874 VerifyNodeCommon(N); 875} 876#endif // NDEBUG 877 878/// getEVTAlignment - Compute the default alignment value for the 879/// given type. 880/// 881unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 882 Type *Ty = VT == MVT::iPTR ? 883 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 884 VT.getTypeForEVT(*getContext()); 885 886 return TLI.getTargetData()->getABITypeAlignment(Ty); 887} 888 889// EntryNode could meaningfully have debug info if we can find it... 890SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 891 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 892 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 893 Root(getEntryNode()), Ordering(0), UpdateListeners(0) { 894 AllNodes.push_back(&EntryNode); 895 Ordering = new SDNodeOrdering(); 896 DbgInfo = new SDDbgInfo(); 897} 898 899void SelectionDAG::init(MachineFunction &mf) { 900 MF = &mf; 901 Context = &mf.getFunction()->getContext(); 902} 903 904SelectionDAG::~SelectionDAG() { 905 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 906 allnodes_clear(); 907 delete Ordering; 908 delete DbgInfo; 909} 910 911void SelectionDAG::allnodes_clear() { 912 assert(&*AllNodes.begin() == &EntryNode); 913 AllNodes.remove(AllNodes.begin()); 914 while (!AllNodes.empty()) 915 DeallocateNode(AllNodes.begin()); 916} 917 918void SelectionDAG::clear() { 919 allnodes_clear(); 920 OperandAllocator.Reset(); 921 CSEMap.clear(); 922 923 ExtendedValueTypeNodes.clear(); 924 ExternalSymbols.clear(); 925 TargetExternalSymbols.clear(); 926 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 927 static_cast<CondCodeSDNode*>(0)); 928 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 929 static_cast<SDNode*>(0)); 930 931 EntryNode.UseList = 0; 932 AllNodes.push_back(&EntryNode); 933 Root = getEntryNode(); 934 Ordering->clear(); 935 DbgInfo->clear(); 936} 937 938SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 939 return VT.bitsGT(Op.getValueType()) ? 940 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 941 getNode(ISD::TRUNCATE, DL, VT, Op); 942} 943 944SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 945 return VT.bitsGT(Op.getValueType()) ? 946 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 947 getNode(ISD::TRUNCATE, DL, VT, Op); 948} 949 950SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 951 return VT.bitsGT(Op.getValueType()) ? 952 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 953 getNode(ISD::TRUNCATE, DL, VT, Op); 954} 955 956SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 957 assert(!VT.isVector() && 958 "getZeroExtendInReg should use the vector element type instead of " 959 "the vector type!"); 960 if (Op.getValueType() == VT) return Op; 961 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 962 APInt Imm = APInt::getLowBitsSet(BitWidth, 963 VT.getSizeInBits()); 964 return getNode(ISD::AND, DL, Op.getValueType(), Op, 965 getConstant(Imm, Op.getValueType())); 966} 967 968/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 969/// 970SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 971 EVT EltVT = VT.getScalarType(); 972 SDValue NegOne = 973 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 974 return getNode(ISD::XOR, DL, VT, Val, NegOne); 975} 976 977SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 978 EVT EltVT = VT.getScalarType(); 979 assert((EltVT.getSizeInBits() >= 64 || 980 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 981 "getConstant with a uint64_t value that doesn't fit in the type!"); 982 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 983} 984 985SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 986 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 987} 988 989SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 990 assert(VT.isInteger() && "Cannot create FP integer constant!"); 991 992 EVT EltVT = VT.getScalarType(); 993 const ConstantInt *Elt = &Val; 994 995 // In some cases the vector type is legal but the element type is illegal and 996 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 997 // inserted value (the type does not need to match the vector element type). 998 // Any extra bits introduced will be truncated away. 999 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 1000 TargetLowering::TypePromoteInteger) { 1001 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 1002 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 1003 Elt = ConstantInt::get(*getContext(), NewVal); 1004 } 1005 1006 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 1007 "APInt size does not match type size!"); 1008 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 1009 FoldingSetNodeID ID; 1010 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1011 ID.AddPointer(Elt); 1012 void *IP = 0; 1013 SDNode *N = NULL; 1014 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1015 if (!VT.isVector()) 1016 return SDValue(N, 0); 1017 1018 if (!N) { 1019 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1020 CSEMap.InsertNode(N, IP); 1021 AllNodes.push_back(N); 1022 } 1023 1024 SDValue Result(N, 0); 1025 if (VT.isVector()) { 1026 SmallVector<SDValue, 8> Ops; 1027 Ops.assign(VT.getVectorNumElements(), Result); 1028 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1029 } 1030 return Result; 1031} 1032 1033SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1034 return getConstant(Val, TLI.getPointerTy(), isTarget); 1035} 1036 1037 1038SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1039 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1040} 1041 1042SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1043 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1044 1045 EVT EltVT = VT.getScalarType(); 1046 1047 // Do the map lookup using the actual bit pattern for the floating point 1048 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1049 // we don't have issues with SNANs. 1050 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1051 FoldingSetNodeID ID; 1052 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1053 ID.AddPointer(&V); 1054 void *IP = 0; 1055 SDNode *N = NULL; 1056 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1057 if (!VT.isVector()) 1058 return SDValue(N, 0); 1059 1060 if (!N) { 1061 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1062 CSEMap.InsertNode(N, IP); 1063 AllNodes.push_back(N); 1064 } 1065 1066 SDValue Result(N, 0); 1067 if (VT.isVector()) { 1068 SmallVector<SDValue, 8> Ops; 1069 Ops.assign(VT.getVectorNumElements(), Result); 1070 // FIXME DebugLoc info might be appropriate here 1071 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1072 } 1073 return Result; 1074} 1075 1076SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1077 EVT EltVT = VT.getScalarType(); 1078 if (EltVT==MVT::f32) 1079 return getConstantFP(APFloat((float)Val), VT, isTarget); 1080 else if (EltVT==MVT::f64) 1081 return getConstantFP(APFloat(Val), VT, isTarget); 1082 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) { 1083 bool ignored; 1084 APFloat apf = APFloat(Val); 1085 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1086 &ignored); 1087 return getConstantFP(apf, VT, isTarget); 1088 } else 1089 llvm_unreachable("Unsupported type in getConstantFP"); 1090} 1091 1092SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1093 EVT VT, int64_t Offset, 1094 bool isTargetGA, 1095 unsigned char TargetFlags) { 1096 assert((TargetFlags == 0 || isTargetGA) && 1097 "Cannot set target flags on target-independent globals"); 1098 1099 // Truncate (with sign-extension) the offset value to the pointer size. 1100 EVT PTy = TLI.getPointerTy(); 1101 unsigned BitWidth = PTy.getSizeInBits(); 1102 if (BitWidth < 64) 1103 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1104 1105 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1106 if (!GVar) { 1107 // If GV is an alias then use the aliasee for determining thread-localness. 1108 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1109 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1110 } 1111 1112 unsigned Opc; 1113 if (GVar && GVar->isThreadLocal()) 1114 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1115 else 1116 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1117 1118 FoldingSetNodeID ID; 1119 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1120 ID.AddPointer(GV); 1121 ID.AddInteger(Offset); 1122 ID.AddInteger(TargetFlags); 1123 ID.AddInteger(GV->getType()->getAddressSpace()); 1124 void *IP = 0; 1125 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1126 return SDValue(E, 0); 1127 1128 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1129 Offset, TargetFlags); 1130 CSEMap.InsertNode(N, IP); 1131 AllNodes.push_back(N); 1132 return SDValue(N, 0); 1133} 1134 1135SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1136 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1137 FoldingSetNodeID ID; 1138 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1139 ID.AddInteger(FI); 1140 void *IP = 0; 1141 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1142 return SDValue(E, 0); 1143 1144 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1145 CSEMap.InsertNode(N, IP); 1146 AllNodes.push_back(N); 1147 return SDValue(N, 0); 1148} 1149 1150SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1151 unsigned char TargetFlags) { 1152 assert((TargetFlags == 0 || isTarget) && 1153 "Cannot set target flags on target-independent jump tables"); 1154 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1155 FoldingSetNodeID ID; 1156 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1157 ID.AddInteger(JTI); 1158 ID.AddInteger(TargetFlags); 1159 void *IP = 0; 1160 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1161 return SDValue(E, 0); 1162 1163 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1164 TargetFlags); 1165 CSEMap.InsertNode(N, IP); 1166 AllNodes.push_back(N); 1167 return SDValue(N, 0); 1168} 1169 1170SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1171 unsigned Alignment, int Offset, 1172 bool isTarget, 1173 unsigned char TargetFlags) { 1174 assert((TargetFlags == 0 || isTarget) && 1175 "Cannot set target flags on target-independent globals"); 1176 if (Alignment == 0) 1177 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1178 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1179 FoldingSetNodeID ID; 1180 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1181 ID.AddInteger(Alignment); 1182 ID.AddInteger(Offset); 1183 ID.AddPointer(C); 1184 ID.AddInteger(TargetFlags); 1185 void *IP = 0; 1186 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1187 return SDValue(E, 0); 1188 1189 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1190 Alignment, TargetFlags); 1191 CSEMap.InsertNode(N, IP); 1192 AllNodes.push_back(N); 1193 return SDValue(N, 0); 1194} 1195 1196 1197SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1198 unsigned Alignment, int Offset, 1199 bool isTarget, 1200 unsigned char TargetFlags) { 1201 assert((TargetFlags == 0 || isTarget) && 1202 "Cannot set target flags on target-independent globals"); 1203 if (Alignment == 0) 1204 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1205 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1206 FoldingSetNodeID ID; 1207 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1208 ID.AddInteger(Alignment); 1209 ID.AddInteger(Offset); 1210 C->addSelectionDAGCSEId(ID); 1211 ID.AddInteger(TargetFlags); 1212 void *IP = 0; 1213 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1214 return SDValue(E, 0); 1215 1216 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1217 Alignment, TargetFlags); 1218 CSEMap.InsertNode(N, IP); 1219 AllNodes.push_back(N); 1220 return SDValue(N, 0); 1221} 1222 1223SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1224 unsigned char TargetFlags) { 1225 FoldingSetNodeID ID; 1226 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1227 ID.AddInteger(Index); 1228 ID.AddInteger(Offset); 1229 ID.AddInteger(TargetFlags); 1230 void *IP = 0; 1231 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1232 return SDValue(E, 0); 1233 1234 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1235 TargetFlags); 1236 CSEMap.InsertNode(N, IP); 1237 AllNodes.push_back(N); 1238 return SDValue(N, 0); 1239} 1240 1241SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1242 FoldingSetNodeID ID; 1243 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1244 ID.AddPointer(MBB); 1245 void *IP = 0; 1246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1247 return SDValue(E, 0); 1248 1249 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1250 CSEMap.InsertNode(N, IP); 1251 AllNodes.push_back(N); 1252 return SDValue(N, 0); 1253} 1254 1255SDValue SelectionDAG::getValueType(EVT VT) { 1256 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1257 ValueTypeNodes.size()) 1258 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1259 1260 SDNode *&N = VT.isExtended() ? 1261 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1262 1263 if (N) return SDValue(N, 0); 1264 N = new (NodeAllocator) VTSDNode(VT); 1265 AllNodes.push_back(N); 1266 return SDValue(N, 0); 1267} 1268 1269SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1270 SDNode *&N = ExternalSymbols[Sym]; 1271 if (N) return SDValue(N, 0); 1272 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1273 AllNodes.push_back(N); 1274 return SDValue(N, 0); 1275} 1276 1277SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1278 unsigned char TargetFlags) { 1279 SDNode *&N = 1280 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1281 TargetFlags)]; 1282 if (N) return SDValue(N, 0); 1283 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1284 AllNodes.push_back(N); 1285 return SDValue(N, 0); 1286} 1287 1288SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1289 if ((unsigned)Cond >= CondCodeNodes.size()) 1290 CondCodeNodes.resize(Cond+1); 1291 1292 if (CondCodeNodes[Cond] == 0) { 1293 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1294 CondCodeNodes[Cond] = N; 1295 AllNodes.push_back(N); 1296 } 1297 1298 return SDValue(CondCodeNodes[Cond], 0); 1299} 1300 1301// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1302// the shuffle mask M that point at N1 to point at N2, and indices that point 1303// N2 to point at N1. 1304static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1305 std::swap(N1, N2); 1306 int NElts = M.size(); 1307 for (int i = 0; i != NElts; ++i) { 1308 if (M[i] >= NElts) 1309 M[i] -= NElts; 1310 else if (M[i] >= 0) 1311 M[i] += NElts; 1312 } 1313} 1314 1315SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1316 SDValue N2, const int *Mask) { 1317 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1318 assert(VT.isVector() && N1.getValueType().isVector() && 1319 "Vector Shuffle VTs must be a vectors"); 1320 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1321 && "Vector Shuffle VTs must have same element type"); 1322 1323 // Canonicalize shuffle undef, undef -> undef 1324 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1325 return getUNDEF(VT); 1326 1327 // Validate that all indices in Mask are within the range of the elements 1328 // input to the shuffle. 1329 unsigned NElts = VT.getVectorNumElements(); 1330 SmallVector<int, 8> MaskVec; 1331 for (unsigned i = 0; i != NElts; ++i) { 1332 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1333 MaskVec.push_back(Mask[i]); 1334 } 1335 1336 // Canonicalize shuffle v, v -> v, undef 1337 if (N1 == N2) { 1338 N2 = getUNDEF(VT); 1339 for (unsigned i = 0; i != NElts; ++i) 1340 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1341 } 1342 1343 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1344 if (N1.getOpcode() == ISD::UNDEF) 1345 commuteShuffle(N1, N2, MaskVec); 1346 1347 // Canonicalize all index into lhs, -> shuffle lhs, undef 1348 // Canonicalize all index into rhs, -> shuffle rhs, undef 1349 bool AllLHS = true, AllRHS = true; 1350 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1351 for (unsigned i = 0; i != NElts; ++i) { 1352 if (MaskVec[i] >= (int)NElts) { 1353 if (N2Undef) 1354 MaskVec[i] = -1; 1355 else 1356 AllLHS = false; 1357 } else if (MaskVec[i] >= 0) { 1358 AllRHS = false; 1359 } 1360 } 1361 if (AllLHS && AllRHS) 1362 return getUNDEF(VT); 1363 if (AllLHS && !N2Undef) 1364 N2 = getUNDEF(VT); 1365 if (AllRHS) { 1366 N1 = getUNDEF(VT); 1367 commuteShuffle(N1, N2, MaskVec); 1368 } 1369 1370 // If Identity shuffle, or all shuffle in to undef, return that node. 1371 bool AllUndef = true; 1372 bool Identity = true; 1373 for (unsigned i = 0; i != NElts; ++i) { 1374 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1375 if (MaskVec[i] >= 0) AllUndef = false; 1376 } 1377 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1378 return N1; 1379 if (AllUndef) 1380 return getUNDEF(VT); 1381 1382 FoldingSetNodeID ID; 1383 SDValue Ops[2] = { N1, N2 }; 1384 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1385 for (unsigned i = 0; i != NElts; ++i) 1386 ID.AddInteger(MaskVec[i]); 1387 1388 void* IP = 0; 1389 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1390 return SDValue(E, 0); 1391 1392 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1393 // SDNode doesn't have access to it. This memory will be "leaked" when 1394 // the node is deallocated, but recovered when the NodeAllocator is released. 1395 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1396 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1397 1398 ShuffleVectorSDNode *N = 1399 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1400 CSEMap.InsertNode(N, IP); 1401 AllNodes.push_back(N); 1402 return SDValue(N, 0); 1403} 1404 1405SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1406 SDValue Val, SDValue DTy, 1407 SDValue STy, SDValue Rnd, SDValue Sat, 1408 ISD::CvtCode Code) { 1409 // If the src and dest types are the same and the conversion is between 1410 // integer types of the same sign or two floats, no conversion is necessary. 1411 if (DTy == STy && 1412 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1413 return Val; 1414 1415 FoldingSetNodeID ID; 1416 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1417 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1418 void* IP = 0; 1419 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1420 return SDValue(E, 0); 1421 1422 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1423 Code); 1424 CSEMap.InsertNode(N, IP); 1425 AllNodes.push_back(N); 1426 return SDValue(N, 0); 1427} 1428 1429SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1430 FoldingSetNodeID ID; 1431 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1432 ID.AddInteger(RegNo); 1433 void *IP = 0; 1434 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1435 return SDValue(E, 0); 1436 1437 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1438 CSEMap.InsertNode(N, IP); 1439 AllNodes.push_back(N); 1440 return SDValue(N, 0); 1441} 1442 1443SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1444 FoldingSetNodeID ID; 1445 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1446 ID.AddPointer(RegMask); 1447 void *IP = 0; 1448 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1449 return SDValue(E, 0); 1450 1451 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1452 CSEMap.InsertNode(N, IP); 1453 AllNodes.push_back(N); 1454 return SDValue(N, 0); 1455} 1456 1457SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1458 FoldingSetNodeID ID; 1459 SDValue Ops[] = { Root }; 1460 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1461 ID.AddPointer(Label); 1462 void *IP = 0; 1463 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1464 return SDValue(E, 0); 1465 1466 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1467 CSEMap.InsertNode(N, IP); 1468 AllNodes.push_back(N); 1469 return SDValue(N, 0); 1470} 1471 1472 1473SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1474 bool isTarget, 1475 unsigned char TargetFlags) { 1476 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1477 1478 FoldingSetNodeID ID; 1479 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1480 ID.AddPointer(BA); 1481 ID.AddInteger(TargetFlags); 1482 void *IP = 0; 1483 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1484 return SDValue(E, 0); 1485 1486 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1487 CSEMap.InsertNode(N, IP); 1488 AllNodes.push_back(N); 1489 return SDValue(N, 0); 1490} 1491 1492SDValue SelectionDAG::getSrcValue(const Value *V) { 1493 assert((!V || V->getType()->isPointerTy()) && 1494 "SrcValue is not a pointer?"); 1495 1496 FoldingSetNodeID ID; 1497 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1498 ID.AddPointer(V); 1499 1500 void *IP = 0; 1501 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1502 return SDValue(E, 0); 1503 1504 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1505 CSEMap.InsertNode(N, IP); 1506 AllNodes.push_back(N); 1507 return SDValue(N, 0); 1508} 1509 1510/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1511SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1512 FoldingSetNodeID ID; 1513 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1514 ID.AddPointer(MD); 1515 1516 void *IP = 0; 1517 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1518 return SDValue(E, 0); 1519 1520 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1521 CSEMap.InsertNode(N, IP); 1522 AllNodes.push_back(N); 1523 return SDValue(N, 0); 1524} 1525 1526 1527/// getShiftAmountOperand - Return the specified value casted to 1528/// the target's desired shift amount type. 1529SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1530 EVT OpTy = Op.getValueType(); 1531 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1532 if (OpTy == ShTy || OpTy.isVector()) return Op; 1533 1534 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1535 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1536} 1537 1538/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1539/// specified value type. 1540SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1541 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1542 unsigned ByteSize = VT.getStoreSize(); 1543 Type *Ty = VT.getTypeForEVT(*getContext()); 1544 unsigned StackAlign = 1545 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1546 1547 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1548 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1549} 1550 1551/// CreateStackTemporary - Create a stack temporary suitable for holding 1552/// either of the specified value types. 1553SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1554 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1555 VT2.getStoreSizeInBits())/8; 1556 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1557 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1558 const TargetData *TD = TLI.getTargetData(); 1559 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1560 TD->getPrefTypeAlignment(Ty2)); 1561 1562 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1563 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1564 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1565} 1566 1567SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1568 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1569 // These setcc operations always fold. 1570 switch (Cond) { 1571 default: break; 1572 case ISD::SETFALSE: 1573 case ISD::SETFALSE2: return getConstant(0, VT); 1574 case ISD::SETTRUE: 1575 case ISD::SETTRUE2: return getConstant(1, VT); 1576 1577 case ISD::SETOEQ: 1578 case ISD::SETOGT: 1579 case ISD::SETOGE: 1580 case ISD::SETOLT: 1581 case ISD::SETOLE: 1582 case ISD::SETONE: 1583 case ISD::SETO: 1584 case ISD::SETUO: 1585 case ISD::SETUEQ: 1586 case ISD::SETUNE: 1587 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1588 break; 1589 } 1590 1591 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1592 const APInt &C2 = N2C->getAPIntValue(); 1593 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1594 const APInt &C1 = N1C->getAPIntValue(); 1595 1596 switch (Cond) { 1597 default: llvm_unreachable("Unknown integer setcc!"); 1598 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1599 case ISD::SETNE: return getConstant(C1 != C2, VT); 1600 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1601 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1602 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1603 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1604 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1605 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1606 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1607 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1608 } 1609 } 1610 } 1611 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1612 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1613 // No compile time operations on this type yet. 1614 if (N1C->getValueType(0) == MVT::ppcf128) 1615 return SDValue(); 1616 1617 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1618 switch (Cond) { 1619 default: break; 1620 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1621 return getUNDEF(VT); 1622 // fall through 1623 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1624 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1625 return getUNDEF(VT); 1626 // fall through 1627 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1628 R==APFloat::cmpLessThan, VT); 1629 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1630 return getUNDEF(VT); 1631 // fall through 1632 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1633 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1634 return getUNDEF(VT); 1635 // fall through 1636 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1637 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1638 return getUNDEF(VT); 1639 // fall through 1640 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1641 R==APFloat::cmpEqual, VT); 1642 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1643 return getUNDEF(VT); 1644 // fall through 1645 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1646 R==APFloat::cmpEqual, VT); 1647 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1648 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1649 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1650 R==APFloat::cmpEqual, VT); 1651 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1652 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1653 R==APFloat::cmpLessThan, VT); 1654 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1655 R==APFloat::cmpUnordered, VT); 1656 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1657 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1658 } 1659 } else { 1660 // Ensure that the constant occurs on the RHS. 1661 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1662 } 1663 } 1664 1665 // Could not fold it. 1666 return SDValue(); 1667} 1668 1669/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1670/// use this predicate to simplify operations downstream. 1671bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1672 // This predicate is not safe for vector operations. 1673 if (Op.getValueType().isVector()) 1674 return false; 1675 1676 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1677 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1678} 1679 1680/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1681/// this predicate to simplify operations downstream. Mask is known to be zero 1682/// for bits that V cannot have. 1683bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1684 unsigned Depth) const { 1685 APInt KnownZero, KnownOne; 1686 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1687 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1688 return (KnownZero & Mask) == Mask; 1689} 1690 1691/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1692/// known to be either zero or one and return them in the KnownZero/KnownOne 1693/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1694/// processing. 1695void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1696 APInt &KnownOne, unsigned Depth) const { 1697 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1698 1699 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1700 if (Depth == 6) 1701 return; // Limit search depth. 1702 1703 APInt KnownZero2, KnownOne2; 1704 1705 switch (Op.getOpcode()) { 1706 case ISD::Constant: 1707 // We know all of the bits for a constant! 1708 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1709 KnownZero = ~KnownOne; 1710 return; 1711 case ISD::AND: 1712 // If either the LHS or the RHS are Zero, the result is zero. 1713 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1714 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1716 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1717 1718 // Output known-1 bits are only known if set in both the LHS & RHS. 1719 KnownOne &= KnownOne2; 1720 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1721 KnownZero |= KnownZero2; 1722 return; 1723 case ISD::OR: 1724 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1725 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1726 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1727 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1728 1729 // Output known-0 bits are only known if clear in both the LHS & RHS. 1730 KnownZero &= KnownZero2; 1731 // Output known-1 are known to be set if set in either the LHS | RHS. 1732 KnownOne |= KnownOne2; 1733 return; 1734 case ISD::XOR: { 1735 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1736 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1737 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1738 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1739 1740 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1741 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1742 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1743 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1744 KnownZero = KnownZeroOut; 1745 return; 1746 } 1747 case ISD::MUL: { 1748 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1749 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1750 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1751 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1752 1753 // If low bits are zero in either operand, output low known-0 bits. 1754 // Also compute a conserative estimate for high known-0 bits. 1755 // More trickiness is possible, but this is sufficient for the 1756 // interesting case of alignment computation. 1757 KnownOne.clearAllBits(); 1758 unsigned TrailZ = KnownZero.countTrailingOnes() + 1759 KnownZero2.countTrailingOnes(); 1760 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1761 KnownZero2.countLeadingOnes(), 1762 BitWidth) - BitWidth; 1763 1764 TrailZ = std::min(TrailZ, BitWidth); 1765 LeadZ = std::min(LeadZ, BitWidth); 1766 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1767 APInt::getHighBitsSet(BitWidth, LeadZ); 1768 return; 1769 } 1770 case ISD::UDIV: { 1771 // For the purposes of computing leading zeros we can conservatively 1772 // treat a udiv as a logical right shift by the power of 2 known to 1773 // be less than the denominator. 1774 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1775 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1776 1777 KnownOne2.clearAllBits(); 1778 KnownZero2.clearAllBits(); 1779 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1780 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1781 if (RHSUnknownLeadingOnes != BitWidth) 1782 LeadZ = std::min(BitWidth, 1783 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1784 1785 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1786 return; 1787 } 1788 case ISD::SELECT: 1789 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1790 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1791 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1792 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1793 1794 // Only known if known in both the LHS and RHS. 1795 KnownOne &= KnownOne2; 1796 KnownZero &= KnownZero2; 1797 return; 1798 case ISD::SELECT_CC: 1799 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1800 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1801 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1802 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1803 1804 // Only known if known in both the LHS and RHS. 1805 KnownOne &= KnownOne2; 1806 KnownZero &= KnownZero2; 1807 return; 1808 case ISD::SADDO: 1809 case ISD::UADDO: 1810 case ISD::SSUBO: 1811 case ISD::USUBO: 1812 case ISD::SMULO: 1813 case ISD::UMULO: 1814 if (Op.getResNo() != 1) 1815 return; 1816 // The boolean result conforms to getBooleanContents. Fall through. 1817 case ISD::SETCC: 1818 // If we know the result of a setcc has the top bits zero, use this info. 1819 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1820 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1821 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1822 return; 1823 case ISD::SHL: 1824 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1825 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1826 unsigned ShAmt = SA->getZExtValue(); 1827 1828 // If the shift count is an invalid immediate, don't do anything. 1829 if (ShAmt >= BitWidth) 1830 return; 1831 1832 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1833 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1834 KnownZero <<= ShAmt; 1835 KnownOne <<= ShAmt; 1836 // low bits known zero. 1837 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1838 } 1839 return; 1840 case ISD::SRL: 1841 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1842 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1843 unsigned ShAmt = SA->getZExtValue(); 1844 1845 // If the shift count is an invalid immediate, don't do anything. 1846 if (ShAmt >= BitWidth) 1847 return; 1848 1849 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1850 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1851 KnownZero = KnownZero.lshr(ShAmt); 1852 KnownOne = KnownOne.lshr(ShAmt); 1853 1854 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1855 KnownZero |= HighBits; // High bits known zero. 1856 } 1857 return; 1858 case ISD::SRA: 1859 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1860 unsigned ShAmt = SA->getZExtValue(); 1861 1862 // If the shift count is an invalid immediate, don't do anything. 1863 if (ShAmt >= BitWidth) 1864 return; 1865 1866 // If any of the demanded bits are produced by the sign extension, we also 1867 // demand the input sign bit. 1868 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1869 1870 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1871 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1872 KnownZero = KnownZero.lshr(ShAmt); 1873 KnownOne = KnownOne.lshr(ShAmt); 1874 1875 // Handle the sign bits. 1876 APInt SignBit = APInt::getSignBit(BitWidth); 1877 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1878 1879 if (KnownZero.intersects(SignBit)) { 1880 KnownZero |= HighBits; // New bits are known zero. 1881 } else if (KnownOne.intersects(SignBit)) { 1882 KnownOne |= HighBits; // New bits are known one. 1883 } 1884 } 1885 return; 1886 case ISD::SIGN_EXTEND_INREG: { 1887 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1888 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1889 1890 // Sign extension. Compute the demanded bits in the result that are not 1891 // present in the input. 1892 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1893 1894 APInt InSignBit = APInt::getSignBit(EBits); 1895 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1896 1897 // If the sign extended bits are demanded, we know that the sign 1898 // bit is demanded. 1899 InSignBit = InSignBit.zext(BitWidth); 1900 if (NewBits.getBoolValue()) 1901 InputDemandedBits |= InSignBit; 1902 1903 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1904 KnownOne &= InputDemandedBits; 1905 KnownZero &= InputDemandedBits; 1906 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1907 1908 // If the sign bit of the input is known set or clear, then we know the 1909 // top bits of the result. 1910 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1911 KnownZero |= NewBits; 1912 KnownOne &= ~NewBits; 1913 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1914 KnownOne |= NewBits; 1915 KnownZero &= ~NewBits; 1916 } else { // Input sign bit unknown 1917 KnownZero &= ~NewBits; 1918 KnownOne &= ~NewBits; 1919 } 1920 return; 1921 } 1922 case ISD::CTTZ: 1923 case ISD::CTTZ_ZERO_UNDEF: 1924 case ISD::CTLZ: 1925 case ISD::CTLZ_ZERO_UNDEF: 1926 case ISD::CTPOP: { 1927 unsigned LowBits = Log2_32(BitWidth)+1; 1928 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1929 KnownOne.clearAllBits(); 1930 return; 1931 } 1932 case ISD::LOAD: { 1933 LoadSDNode *LD = cast<LoadSDNode>(Op); 1934 if (ISD::isZEXTLoad(Op.getNode())) { 1935 EVT VT = LD->getMemoryVT(); 1936 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1937 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1938 } else if (const MDNode *Ranges = LD->getRanges()) { 1939 computeMaskedBitsLoad(*Ranges, KnownZero); 1940 } 1941 return; 1942 } 1943 case ISD::ZERO_EXTEND: { 1944 EVT InVT = Op.getOperand(0).getValueType(); 1945 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1946 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1947 KnownZero = KnownZero.trunc(InBits); 1948 KnownOne = KnownOne.trunc(InBits); 1949 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1950 KnownZero = KnownZero.zext(BitWidth); 1951 KnownOne = KnownOne.zext(BitWidth); 1952 KnownZero |= NewBits; 1953 return; 1954 } 1955 case ISD::SIGN_EXTEND: { 1956 EVT InVT = Op.getOperand(0).getValueType(); 1957 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1958 APInt InSignBit = APInt::getSignBit(InBits); 1959 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1960 1961 KnownZero = KnownZero.trunc(InBits); 1962 KnownOne = KnownOne.trunc(InBits); 1963 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1964 1965 // Note if the sign bit is known to be zero or one. 1966 bool SignBitKnownZero = KnownZero.isNegative(); 1967 bool SignBitKnownOne = KnownOne.isNegative(); 1968 assert(!(SignBitKnownZero && SignBitKnownOne) && 1969 "Sign bit can't be known to be both zero and one!"); 1970 1971 KnownZero = KnownZero.zext(BitWidth); 1972 KnownOne = KnownOne.zext(BitWidth); 1973 1974 // If the sign bit is known zero or one, the top bits match. 1975 if (SignBitKnownZero) 1976 KnownZero |= NewBits; 1977 else if (SignBitKnownOne) 1978 KnownOne |= NewBits; 1979 return; 1980 } 1981 case ISD::ANY_EXTEND: { 1982 EVT InVT = Op.getOperand(0).getValueType(); 1983 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1984 KnownZero = KnownZero.trunc(InBits); 1985 KnownOne = KnownOne.trunc(InBits); 1986 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1987 KnownZero = KnownZero.zext(BitWidth); 1988 KnownOne = KnownOne.zext(BitWidth); 1989 return; 1990 } 1991 case ISD::TRUNCATE: { 1992 EVT InVT = Op.getOperand(0).getValueType(); 1993 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1994 KnownZero = KnownZero.zext(InBits); 1995 KnownOne = KnownOne.zext(InBits); 1996 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1997 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1998 KnownZero = KnownZero.trunc(BitWidth); 1999 KnownOne = KnownOne.trunc(BitWidth); 2000 break; 2001 } 2002 case ISD::AssertZext: { 2003 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 2004 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 2005 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2006 KnownZero |= (~InMask); 2007 KnownOne &= (~KnownZero); 2008 return; 2009 } 2010 case ISD::FGETSIGN: 2011 // All bits are zero except the low bit. 2012 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 2013 return; 2014 2015 case ISD::SUB: { 2016 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2017 // We know that the top bits of C-X are clear if X contains less bits 2018 // than C (i.e. no wrap-around can happen). For example, 20-X is 2019 // positive if we can prove that X is >= 0 and < 16. 2020 if (CLHS->getAPIntValue().isNonNegative()) { 2021 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2022 // NLZ can't be BitWidth with no sign bit 2023 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2024 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2025 2026 // If all of the MaskV bits are known to be zero, then we know the 2027 // output top bits are zero, because we now know that the output is 2028 // from [0-C]. 2029 if ((KnownZero2 & MaskV) == MaskV) { 2030 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2031 // Top bits known zero. 2032 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2033 } 2034 } 2035 } 2036 } 2037 // fall through 2038 case ISD::ADD: 2039 case ISD::ADDE: { 2040 // Output known-0 bits are known if clear or set in both the low clear bits 2041 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2042 // low 3 bits clear. 2043 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2044 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2045 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2046 2047 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2048 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2049 KnownZeroOut = std::min(KnownZeroOut, 2050 KnownZero2.countTrailingOnes()); 2051 2052 if (Op.getOpcode() == ISD::ADD) { 2053 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2054 return; 2055 } 2056 2057 // With ADDE, a carry bit may be added in, so we can only use this 2058 // information if we know (at least) that the low two bits are clear. We 2059 // then return to the caller that the low bit is unknown but that other bits 2060 // are known zero. 2061 if (KnownZeroOut >= 2) // ADDE 2062 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2063 return; 2064 } 2065 case ISD::SREM: 2066 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2067 const APInt &RA = Rem->getAPIntValue().abs(); 2068 if (RA.isPowerOf2()) { 2069 APInt LowBits = RA - 1; 2070 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2071 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2072 2073 // The low bits of the first operand are unchanged by the srem. 2074 KnownZero = KnownZero2 & LowBits; 2075 KnownOne = KnownOne2 & LowBits; 2076 2077 // If the first operand is non-negative or has all low bits zero, then 2078 // the upper bits are all zero. 2079 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2080 KnownZero |= ~LowBits; 2081 2082 // If the first operand is negative and not all low bits are zero, then 2083 // the upper bits are all one. 2084 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2085 KnownOne |= ~LowBits; 2086 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2087 } 2088 } 2089 return; 2090 case ISD::UREM: { 2091 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2092 const APInt &RA = Rem->getAPIntValue(); 2093 if (RA.isPowerOf2()) { 2094 APInt LowBits = (RA - 1); 2095 KnownZero |= ~LowBits; 2096 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2097 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2098 break; 2099 } 2100 } 2101 2102 // Since the result is less than or equal to either operand, any leading 2103 // zero bits in either operand must also exist in the result. 2104 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2105 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2106 2107 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2108 KnownZero2.countLeadingOnes()); 2109 KnownOne.clearAllBits(); 2110 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2111 return; 2112 } 2113 case ISD::FrameIndex: 2114 case ISD::TargetFrameIndex: 2115 if (unsigned Align = InferPtrAlignment(Op)) { 2116 // The low bits are known zero if the pointer is aligned. 2117 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2118 return; 2119 } 2120 break; 2121 2122 default: 2123 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2124 break; 2125 // Fallthrough 2126 case ISD::INTRINSIC_WO_CHAIN: 2127 case ISD::INTRINSIC_W_CHAIN: 2128 case ISD::INTRINSIC_VOID: 2129 // Allow the target to implement this method for its nodes. 2130 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2131 return; 2132 } 2133} 2134 2135/// ComputeNumSignBits - Return the number of times the sign bit of the 2136/// register is replicated into the other bits. We know that at least 1 bit 2137/// is always equal to the sign bit (itself), but other cases can give us 2138/// information. For example, immediately after an "SRA X, 2", we know that 2139/// the top 3 bits are all equal to each other, so we return 3. 2140unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2141 EVT VT = Op.getValueType(); 2142 assert(VT.isInteger() && "Invalid VT!"); 2143 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2144 unsigned Tmp, Tmp2; 2145 unsigned FirstAnswer = 1; 2146 2147 if (Depth == 6) 2148 return 1; // Limit search depth. 2149 2150 switch (Op.getOpcode()) { 2151 default: break; 2152 case ISD::AssertSext: 2153 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2154 return VTBits-Tmp+1; 2155 case ISD::AssertZext: 2156 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2157 return VTBits-Tmp; 2158 2159 case ISD::Constant: { 2160 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2161 return Val.getNumSignBits(); 2162 } 2163 2164 case ISD::SIGN_EXTEND: 2165 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2166 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2167 2168 case ISD::SIGN_EXTEND_INREG: 2169 // Max of the input and what this extends. 2170 Tmp = 2171 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2172 Tmp = VTBits-Tmp+1; 2173 2174 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2175 return std::max(Tmp, Tmp2); 2176 2177 case ISD::SRA: 2178 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2179 // SRA X, C -> adds C sign bits. 2180 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2181 Tmp += C->getZExtValue(); 2182 if (Tmp > VTBits) Tmp = VTBits; 2183 } 2184 return Tmp; 2185 case ISD::SHL: 2186 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2187 // shl destroys sign bits. 2188 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2189 if (C->getZExtValue() >= VTBits || // Bad shift. 2190 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2191 return Tmp - C->getZExtValue(); 2192 } 2193 break; 2194 case ISD::AND: 2195 case ISD::OR: 2196 case ISD::XOR: // NOT is handled here. 2197 // Logical binary ops preserve the number of sign bits at the worst. 2198 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2199 if (Tmp != 1) { 2200 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2201 FirstAnswer = std::min(Tmp, Tmp2); 2202 // We computed what we know about the sign bits as our first 2203 // answer. Now proceed to the generic code that uses 2204 // ComputeMaskedBits, and pick whichever answer is better. 2205 } 2206 break; 2207 2208 case ISD::SELECT: 2209 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2210 if (Tmp == 1) return 1; // Early out. 2211 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2212 return std::min(Tmp, Tmp2); 2213 2214 case ISD::SADDO: 2215 case ISD::UADDO: 2216 case ISD::SSUBO: 2217 case ISD::USUBO: 2218 case ISD::SMULO: 2219 case ISD::UMULO: 2220 if (Op.getResNo() != 1) 2221 break; 2222 // The boolean result conforms to getBooleanContents. Fall through. 2223 case ISD::SETCC: 2224 // If setcc returns 0/-1, all bits are sign bits. 2225 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2226 TargetLowering::ZeroOrNegativeOneBooleanContent) 2227 return VTBits; 2228 break; 2229 case ISD::ROTL: 2230 case ISD::ROTR: 2231 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2232 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2233 2234 // Handle rotate right by N like a rotate left by 32-N. 2235 if (Op.getOpcode() == ISD::ROTR) 2236 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2237 2238 // If we aren't rotating out all of the known-in sign bits, return the 2239 // number that are left. This handles rotl(sext(x), 1) for example. 2240 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2241 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2242 } 2243 break; 2244 case ISD::ADD: 2245 // Add can have at most one carry bit. Thus we know that the output 2246 // is, at worst, one more bit than the inputs. 2247 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2248 if (Tmp == 1) return 1; // Early out. 2249 2250 // Special case decrementing a value (ADD X, -1): 2251 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2252 if (CRHS->isAllOnesValue()) { 2253 APInt KnownZero, KnownOne; 2254 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2255 2256 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2257 // sign bits set. 2258 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2259 return VTBits; 2260 2261 // If we are subtracting one from a positive number, there is no carry 2262 // out of the result. 2263 if (KnownZero.isNegative()) 2264 return Tmp; 2265 } 2266 2267 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2268 if (Tmp2 == 1) return 1; 2269 return std::min(Tmp, Tmp2)-1; 2270 2271 case ISD::SUB: 2272 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2273 if (Tmp2 == 1) return 1; 2274 2275 // Handle NEG. 2276 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2277 if (CLHS->isNullValue()) { 2278 APInt KnownZero, KnownOne; 2279 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2280 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2281 // sign bits set. 2282 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2283 return VTBits; 2284 2285 // If the input is known to be positive (the sign bit is known clear), 2286 // the output of the NEG has the same number of sign bits as the input. 2287 if (KnownZero.isNegative()) 2288 return Tmp2; 2289 2290 // Otherwise, we treat this like a SUB. 2291 } 2292 2293 // Sub can have at most one carry bit. Thus we know that the output 2294 // is, at worst, one more bit than the inputs. 2295 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2296 if (Tmp == 1) return 1; // Early out. 2297 return std::min(Tmp, Tmp2)-1; 2298 case ISD::TRUNCATE: 2299 // FIXME: it's tricky to do anything useful for this, but it is an important 2300 // case for targets like X86. 2301 break; 2302 } 2303 2304 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2305 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2306 unsigned ExtType = LD->getExtensionType(); 2307 switch (ExtType) { 2308 default: break; 2309 case ISD::SEXTLOAD: // '17' bits known 2310 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2311 return VTBits-Tmp+1; 2312 case ISD::ZEXTLOAD: // '16' bits known 2313 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2314 return VTBits-Tmp; 2315 } 2316 } 2317 2318 // Allow the target to implement this method for its nodes. 2319 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2320 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2321 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2322 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2323 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2324 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2325 } 2326 2327 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2328 // use this information. 2329 APInt KnownZero, KnownOne; 2330 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2331 2332 APInt Mask; 2333 if (KnownZero.isNegative()) { // sign bit is 0 2334 Mask = KnownZero; 2335 } else if (KnownOne.isNegative()) { // sign bit is 1; 2336 Mask = KnownOne; 2337 } else { 2338 // Nothing known. 2339 return FirstAnswer; 2340 } 2341 2342 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2343 // the number of identical bits in the top of the input value. 2344 Mask = ~Mask; 2345 Mask <<= Mask.getBitWidth()-VTBits; 2346 // Return # leading zeros. We use 'min' here in case Val was zero before 2347 // shifting. We don't want to return '64' as for an i32 "0". 2348 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2349} 2350 2351/// isBaseWithConstantOffset - Return true if the specified operand is an 2352/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2353/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2354/// semantics as an ADD. This handles the equivalence: 2355/// X|Cst == X+Cst iff X&Cst = 0. 2356bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2357 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2358 !isa<ConstantSDNode>(Op.getOperand(1))) 2359 return false; 2360 2361 if (Op.getOpcode() == ISD::OR && 2362 !MaskedValueIsZero(Op.getOperand(0), 2363 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2364 return false; 2365 2366 return true; 2367} 2368 2369 2370bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2371 // If we're told that NaNs won't happen, assume they won't. 2372 if (getTarget().Options.NoNaNsFPMath) 2373 return true; 2374 2375 // If the value is a constant, we can obviously see if it is a NaN or not. 2376 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2377 return !C->getValueAPF().isNaN(); 2378 2379 // TODO: Recognize more cases here. 2380 2381 return false; 2382} 2383 2384bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2385 // If the value is a constant, we can obviously see if it is a zero or not. 2386 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2387 return !C->isZero(); 2388 2389 // TODO: Recognize more cases here. 2390 switch (Op.getOpcode()) { 2391 default: break; 2392 case ISD::OR: 2393 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2394 return !C->isNullValue(); 2395 break; 2396 } 2397 2398 return false; 2399} 2400 2401bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2402 // Check the obvious case. 2403 if (A == B) return true; 2404 2405 // For for negative and positive zero. 2406 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2407 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2408 if (CA->isZero() && CB->isZero()) return true; 2409 2410 // Otherwise they may not be equal. 2411 return false; 2412} 2413 2414/// getNode - Gets or creates the specified node. 2415/// 2416SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2417 FoldingSetNodeID ID; 2418 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2419 void *IP = 0; 2420 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2421 return SDValue(E, 0); 2422 2423 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2424 CSEMap.InsertNode(N, IP); 2425 2426 AllNodes.push_back(N); 2427#ifndef NDEBUG 2428 VerifySDNode(N); 2429#endif 2430 return SDValue(N, 0); 2431} 2432 2433SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2434 EVT VT, SDValue Operand) { 2435 // Constant fold unary operations with an integer constant operand. 2436 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2437 const APInt &Val = C->getAPIntValue(); 2438 switch (Opcode) { 2439 default: break; 2440 case ISD::SIGN_EXTEND: 2441 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2442 case ISD::ANY_EXTEND: 2443 case ISD::ZERO_EXTEND: 2444 case ISD::TRUNCATE: 2445 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2446 case ISD::UINT_TO_FP: 2447 case ISD::SINT_TO_FP: { 2448 // No compile time operations on ppcf128. 2449 if (VT == MVT::ppcf128) break; 2450 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2451 (void)apf.convertFromAPInt(Val, 2452 Opcode==ISD::SINT_TO_FP, 2453 APFloat::rmNearestTiesToEven); 2454 return getConstantFP(apf, VT); 2455 } 2456 case ISD::BITCAST: 2457 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2458 return getConstantFP(Val.bitsToFloat(), VT); 2459 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2460 return getConstantFP(Val.bitsToDouble(), VT); 2461 break; 2462 case ISD::BSWAP: 2463 return getConstant(Val.byteSwap(), VT); 2464 case ISD::CTPOP: 2465 return getConstant(Val.countPopulation(), VT); 2466 case ISD::CTLZ: 2467 case ISD::CTLZ_ZERO_UNDEF: 2468 return getConstant(Val.countLeadingZeros(), VT); 2469 case ISD::CTTZ: 2470 case ISD::CTTZ_ZERO_UNDEF: 2471 return getConstant(Val.countTrailingZeros(), VT); 2472 } 2473 } 2474 2475 // Constant fold unary operations with a floating point constant operand. 2476 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2477 APFloat V = C->getValueAPF(); // make copy 2478 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2479 switch (Opcode) { 2480 case ISD::FNEG: 2481 V.changeSign(); 2482 return getConstantFP(V, VT); 2483 case ISD::FABS: 2484 V.clearSign(); 2485 return getConstantFP(V, VT); 2486 case ISD::FCEIL: { 2487 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2488 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2489 return getConstantFP(V, VT); 2490 break; 2491 } 2492 case ISD::FTRUNC: { 2493 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2494 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2495 return getConstantFP(V, VT); 2496 break; 2497 } 2498 case ISD::FFLOOR: { 2499 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2500 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2501 return getConstantFP(V, VT); 2502 break; 2503 } 2504 case ISD::FP_EXTEND: { 2505 bool ignored; 2506 // This can return overflow, underflow, or inexact; we don't care. 2507 // FIXME need to be more flexible about rounding mode. 2508 (void)V.convert(*EVTToAPFloatSemantics(VT), 2509 APFloat::rmNearestTiesToEven, &ignored); 2510 return getConstantFP(V, VT); 2511 } 2512 case ISD::FP_TO_SINT: 2513 case ISD::FP_TO_UINT: { 2514 integerPart x[2]; 2515 bool ignored; 2516 assert(integerPartWidth >= 64); 2517 // FIXME need to be more flexible about rounding mode. 2518 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2519 Opcode==ISD::FP_TO_SINT, 2520 APFloat::rmTowardZero, &ignored); 2521 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2522 break; 2523 APInt api(VT.getSizeInBits(), x); 2524 return getConstant(api, VT); 2525 } 2526 case ISD::BITCAST: 2527 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2528 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2529 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2530 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2531 break; 2532 } 2533 } 2534 } 2535 2536 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2537 switch (Opcode) { 2538 case ISD::TokenFactor: 2539 case ISD::MERGE_VALUES: 2540 case ISD::CONCAT_VECTORS: 2541 return Operand; // Factor, merge or concat of one node? No need. 2542 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2543 case ISD::FP_EXTEND: 2544 assert(VT.isFloatingPoint() && 2545 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2546 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2547 assert((!VT.isVector() || 2548 VT.getVectorNumElements() == 2549 Operand.getValueType().getVectorNumElements()) && 2550 "Vector element count mismatch!"); 2551 if (Operand.getOpcode() == ISD::UNDEF) 2552 return getUNDEF(VT); 2553 break; 2554 case ISD::SIGN_EXTEND: 2555 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2556 "Invalid SIGN_EXTEND!"); 2557 if (Operand.getValueType() == VT) return Operand; // noop extension 2558 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2559 "Invalid sext node, dst < src!"); 2560 assert((!VT.isVector() || 2561 VT.getVectorNumElements() == 2562 Operand.getValueType().getVectorNumElements()) && 2563 "Vector element count mismatch!"); 2564 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2565 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2566 else if (OpOpcode == ISD::UNDEF) 2567 // sext(undef) = 0, because the top bits will all be the same. 2568 return getConstant(0, VT); 2569 break; 2570 case ISD::ZERO_EXTEND: 2571 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2572 "Invalid ZERO_EXTEND!"); 2573 if (Operand.getValueType() == VT) return Operand; // noop extension 2574 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2575 "Invalid zext node, dst < src!"); 2576 assert((!VT.isVector() || 2577 VT.getVectorNumElements() == 2578 Operand.getValueType().getVectorNumElements()) && 2579 "Vector element count mismatch!"); 2580 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2581 return getNode(ISD::ZERO_EXTEND, DL, VT, 2582 Operand.getNode()->getOperand(0)); 2583 else if (OpOpcode == ISD::UNDEF) 2584 // zext(undef) = 0, because the top bits will be zero. 2585 return getConstant(0, VT); 2586 break; 2587 case ISD::ANY_EXTEND: 2588 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2589 "Invalid ANY_EXTEND!"); 2590 if (Operand.getValueType() == VT) return Operand; // noop extension 2591 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2592 "Invalid anyext node, dst < src!"); 2593 assert((!VT.isVector() || 2594 VT.getVectorNumElements() == 2595 Operand.getValueType().getVectorNumElements()) && 2596 "Vector element count mismatch!"); 2597 2598 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2599 OpOpcode == ISD::ANY_EXTEND) 2600 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2601 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2602 else if (OpOpcode == ISD::UNDEF) 2603 return getUNDEF(VT); 2604 2605 // (ext (trunx x)) -> x 2606 if (OpOpcode == ISD::TRUNCATE) { 2607 SDValue OpOp = Operand.getNode()->getOperand(0); 2608 if (OpOp.getValueType() == VT) 2609 return OpOp; 2610 } 2611 break; 2612 case ISD::TRUNCATE: 2613 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2614 "Invalid TRUNCATE!"); 2615 if (Operand.getValueType() == VT) return Operand; // noop truncate 2616 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2617 "Invalid truncate node, src < dst!"); 2618 assert((!VT.isVector() || 2619 VT.getVectorNumElements() == 2620 Operand.getValueType().getVectorNumElements()) && 2621 "Vector element count mismatch!"); 2622 if (OpOpcode == ISD::TRUNCATE) 2623 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2624 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2625 OpOpcode == ISD::ANY_EXTEND) { 2626 // If the source is smaller than the dest, we still need an extend. 2627 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2628 .bitsLT(VT.getScalarType())) 2629 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2630 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2631 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2632 return Operand.getNode()->getOperand(0); 2633 } 2634 if (OpOpcode == ISD::UNDEF) 2635 return getUNDEF(VT); 2636 break; 2637 case ISD::BITCAST: 2638 // Basic sanity checking. 2639 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2640 && "Cannot BITCAST between types of different sizes!"); 2641 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2642 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2643 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2644 if (OpOpcode == ISD::UNDEF) 2645 return getUNDEF(VT); 2646 break; 2647 case ISD::SCALAR_TO_VECTOR: 2648 assert(VT.isVector() && !Operand.getValueType().isVector() && 2649 (VT.getVectorElementType() == Operand.getValueType() || 2650 (VT.getVectorElementType().isInteger() && 2651 Operand.getValueType().isInteger() && 2652 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2653 "Illegal SCALAR_TO_VECTOR node!"); 2654 if (OpOpcode == ISD::UNDEF) 2655 return getUNDEF(VT); 2656 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2657 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2658 isa<ConstantSDNode>(Operand.getOperand(1)) && 2659 Operand.getConstantOperandVal(1) == 0 && 2660 Operand.getOperand(0).getValueType() == VT) 2661 return Operand.getOperand(0); 2662 break; 2663 case ISD::FNEG: 2664 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2665 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2666 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2667 Operand.getNode()->getOperand(0)); 2668 if (OpOpcode == ISD::FNEG) // --X -> X 2669 return Operand.getNode()->getOperand(0); 2670 break; 2671 case ISD::FABS: 2672 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2673 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2674 break; 2675 } 2676 2677 SDNode *N; 2678 SDVTList VTs = getVTList(VT); 2679 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2680 FoldingSetNodeID ID; 2681 SDValue Ops[1] = { Operand }; 2682 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2683 void *IP = 0; 2684 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2685 return SDValue(E, 0); 2686 2687 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2688 CSEMap.InsertNode(N, IP); 2689 } else { 2690 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2691 } 2692 2693 AllNodes.push_back(N); 2694#ifndef NDEBUG 2695 VerifySDNode(N); 2696#endif 2697 return SDValue(N, 0); 2698} 2699 2700SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2701 EVT VT, 2702 ConstantSDNode *Cst1, 2703 ConstantSDNode *Cst2) { 2704 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2705 2706 switch (Opcode) { 2707 case ISD::ADD: return getConstant(C1 + C2, VT); 2708 case ISD::SUB: return getConstant(C1 - C2, VT); 2709 case ISD::MUL: return getConstant(C1 * C2, VT); 2710 case ISD::UDIV: 2711 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2712 break; 2713 case ISD::UREM: 2714 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2715 break; 2716 case ISD::SDIV: 2717 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2718 break; 2719 case ISD::SREM: 2720 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2721 break; 2722 case ISD::AND: return getConstant(C1 & C2, VT); 2723 case ISD::OR: return getConstant(C1 | C2, VT); 2724 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2725 case ISD::SHL: return getConstant(C1 << C2, VT); 2726 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2727 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2728 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2729 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2730 default: break; 2731 } 2732 2733 return SDValue(); 2734} 2735 2736SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2737 SDValue N1, SDValue N2) { 2738 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2739 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2740 switch (Opcode) { 2741 default: break; 2742 case ISD::TokenFactor: 2743 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2744 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2745 // Fold trivial token factors. 2746 if (N1.getOpcode() == ISD::EntryToken) return N2; 2747 if (N2.getOpcode() == ISD::EntryToken) return N1; 2748 if (N1 == N2) return N1; 2749 break; 2750 case ISD::CONCAT_VECTORS: 2751 // Concat of UNDEFs is UNDEF. 2752 if (N1.getOpcode() == ISD::UNDEF && 2753 N2.getOpcode() == ISD::UNDEF) 2754 return getUNDEF(VT); 2755 2756 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2757 // one big BUILD_VECTOR. 2758 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2759 N2.getOpcode() == ISD::BUILD_VECTOR) { 2760 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2761 N1.getNode()->op_end()); 2762 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2763 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2764 } 2765 break; 2766 case ISD::AND: 2767 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2768 assert(N1.getValueType() == N2.getValueType() && 2769 N1.getValueType() == VT && "Binary operator types must match!"); 2770 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2771 // worth handling here. 2772 if (N2C && N2C->isNullValue()) 2773 return N2; 2774 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2775 return N1; 2776 break; 2777 case ISD::OR: 2778 case ISD::XOR: 2779 case ISD::ADD: 2780 case ISD::SUB: 2781 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2782 assert(N1.getValueType() == N2.getValueType() && 2783 N1.getValueType() == VT && "Binary operator types must match!"); 2784 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2785 // it's worth handling here. 2786 if (N2C && N2C->isNullValue()) 2787 return N1; 2788 break; 2789 case ISD::UDIV: 2790 case ISD::UREM: 2791 case ISD::MULHU: 2792 case ISD::MULHS: 2793 case ISD::MUL: 2794 case ISD::SDIV: 2795 case ISD::SREM: 2796 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2797 assert(N1.getValueType() == N2.getValueType() && 2798 N1.getValueType() == VT && "Binary operator types must match!"); 2799 break; 2800 case ISD::FADD: 2801 case ISD::FSUB: 2802 case ISD::FMUL: 2803 case ISD::FDIV: 2804 case ISD::FREM: 2805 if (getTarget().Options.UnsafeFPMath) { 2806 if (Opcode == ISD::FADD) { 2807 // 0+x --> x 2808 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2809 if (CFP->getValueAPF().isZero()) 2810 return N2; 2811 // x+0 --> x 2812 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2813 if (CFP->getValueAPF().isZero()) 2814 return N1; 2815 } else if (Opcode == ISD::FSUB) { 2816 // x-0 --> x 2817 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2818 if (CFP->getValueAPF().isZero()) 2819 return N1; 2820 } 2821 } 2822 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2823 assert(N1.getValueType() == N2.getValueType() && 2824 N1.getValueType() == VT && "Binary operator types must match!"); 2825 break; 2826 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2827 assert(N1.getValueType() == VT && 2828 N1.getValueType().isFloatingPoint() && 2829 N2.getValueType().isFloatingPoint() && 2830 "Invalid FCOPYSIGN!"); 2831 break; 2832 case ISD::SHL: 2833 case ISD::SRA: 2834 case ISD::SRL: 2835 case ISD::ROTL: 2836 case ISD::ROTR: 2837 assert(VT == N1.getValueType() && 2838 "Shift operators return type must be the same as their first arg"); 2839 assert(VT.isInteger() && N2.getValueType().isInteger() && 2840 "Shifts only work on integers"); 2841 // Verify that the shift amount VT is bit enough to hold valid shift 2842 // amounts. This catches things like trying to shift an i1024 value by an 2843 // i8, which is easy to fall into in generic code that uses 2844 // TLI.getShiftAmount(). 2845 assert(N2.getValueType().getSizeInBits() >= 2846 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2847 "Invalid use of small shift amount with oversized value!"); 2848 2849 // Always fold shifts of i1 values so the code generator doesn't need to 2850 // handle them. Since we know the size of the shift has to be less than the 2851 // size of the value, the shift/rotate count is guaranteed to be zero. 2852 if (VT == MVT::i1) 2853 return N1; 2854 if (N2C && N2C->isNullValue()) 2855 return N1; 2856 break; 2857 case ISD::FP_ROUND_INREG: { 2858 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2859 assert(VT == N1.getValueType() && "Not an inreg round!"); 2860 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2861 "Cannot FP_ROUND_INREG integer types"); 2862 assert(EVT.isVector() == VT.isVector() && 2863 "FP_ROUND_INREG type should be vector iff the operand " 2864 "type is vector!"); 2865 assert((!EVT.isVector() || 2866 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2867 "Vector element counts must match in FP_ROUND_INREG"); 2868 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2869 (void)EVT; 2870 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2871 break; 2872 } 2873 case ISD::FP_ROUND: 2874 assert(VT.isFloatingPoint() && 2875 N1.getValueType().isFloatingPoint() && 2876 VT.bitsLE(N1.getValueType()) && 2877 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2878 if (N1.getValueType() == VT) return N1; // noop conversion. 2879 break; 2880 case ISD::AssertSext: 2881 case ISD::AssertZext: { 2882 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2883 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2884 assert(VT.isInteger() && EVT.isInteger() && 2885 "Cannot *_EXTEND_INREG FP types"); 2886 assert(!EVT.isVector() && 2887 "AssertSExt/AssertZExt type should be the vector element type " 2888 "rather than the vector type!"); 2889 assert(EVT.bitsLE(VT) && "Not extending!"); 2890 if (VT == EVT) return N1; // noop assertion. 2891 break; 2892 } 2893 case ISD::SIGN_EXTEND_INREG: { 2894 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2895 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2896 assert(VT.isInteger() && EVT.isInteger() && 2897 "Cannot *_EXTEND_INREG FP types"); 2898 assert(EVT.isVector() == VT.isVector() && 2899 "SIGN_EXTEND_INREG type should be vector iff the operand " 2900 "type is vector!"); 2901 assert((!EVT.isVector() || 2902 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2903 "Vector element counts must match in SIGN_EXTEND_INREG"); 2904 assert(EVT.bitsLE(VT) && "Not extending!"); 2905 if (EVT == VT) return N1; // Not actually extending 2906 2907 if (N1C) { 2908 APInt Val = N1C->getAPIntValue(); 2909 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2910 Val <<= Val.getBitWidth()-FromBits; 2911 Val = Val.ashr(Val.getBitWidth()-FromBits); 2912 return getConstant(Val, VT); 2913 } 2914 break; 2915 } 2916 case ISD::EXTRACT_VECTOR_ELT: 2917 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2918 if (N1.getOpcode() == ISD::UNDEF) 2919 return getUNDEF(VT); 2920 2921 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2922 // expanding copies of large vectors from registers. 2923 if (N2C && 2924 N1.getOpcode() == ISD::CONCAT_VECTORS && 2925 N1.getNumOperands() > 0) { 2926 unsigned Factor = 2927 N1.getOperand(0).getValueType().getVectorNumElements(); 2928 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2929 N1.getOperand(N2C->getZExtValue() / Factor), 2930 getConstant(N2C->getZExtValue() % Factor, 2931 N2.getValueType())); 2932 } 2933 2934 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2935 // expanding large vector constants. 2936 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2937 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2938 EVT VEltTy = N1.getValueType().getVectorElementType(); 2939 if (Elt.getValueType() != VEltTy) { 2940 // If the vector element type is not legal, the BUILD_VECTOR operands 2941 // are promoted and implicitly truncated. Make that explicit here. 2942 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2943 } 2944 if (VT != VEltTy) { 2945 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2946 // result is implicitly extended. 2947 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2948 } 2949 return Elt; 2950 } 2951 2952 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2953 // operations are lowered to scalars. 2954 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2955 // If the indices are the same, return the inserted element else 2956 // if the indices are known different, extract the element from 2957 // the original vector. 2958 SDValue N1Op2 = N1.getOperand(2); 2959 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2960 2961 if (N1Op2C && N2C) { 2962 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2963 if (VT == N1.getOperand(1).getValueType()) 2964 return N1.getOperand(1); 2965 else 2966 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2967 } 2968 2969 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2970 } 2971 } 2972 break; 2973 case ISD::EXTRACT_ELEMENT: 2974 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2975 assert(!N1.getValueType().isVector() && !VT.isVector() && 2976 (N1.getValueType().isInteger() == VT.isInteger()) && 2977 N1.getValueType() != VT && 2978 "Wrong types for EXTRACT_ELEMENT!"); 2979 2980 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2981 // 64-bit integers into 32-bit parts. Instead of building the extract of 2982 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2983 if (N1.getOpcode() == ISD::BUILD_PAIR) 2984 return N1.getOperand(N2C->getZExtValue()); 2985 2986 // EXTRACT_ELEMENT of a constant int is also very common. 2987 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2988 unsigned ElementSize = VT.getSizeInBits(); 2989 unsigned Shift = ElementSize * N2C->getZExtValue(); 2990 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2991 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2992 } 2993 break; 2994 case ISD::EXTRACT_SUBVECTOR: { 2995 SDValue Index = N2; 2996 if (VT.isSimple() && N1.getValueType().isSimple()) { 2997 assert(VT.isVector() && N1.getValueType().isVector() && 2998 "Extract subvector VTs must be a vectors!"); 2999 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 3000 "Extract subvector VTs must have the same element type!"); 3001 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 3002 "Extract subvector must be from larger vector to smaller vector!"); 3003 3004 if (isa<ConstantSDNode>(Index.getNode())) { 3005 assert((VT.getVectorNumElements() + 3006 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3007 <= N1.getValueType().getVectorNumElements()) 3008 && "Extract subvector overflow!"); 3009 } 3010 3011 // Trivial extraction. 3012 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 3013 return N1; 3014 } 3015 break; 3016 } 3017 } 3018 3019 if (N1C) { 3020 if (N2C) { 3021 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 3022 if (SV.getNode()) return SV; 3023 } else { // Cannonicalize constant to RHS if commutative 3024 if (isCommutativeBinOp(Opcode)) { 3025 std::swap(N1C, N2C); 3026 std::swap(N1, N2); 3027 } 3028 } 3029 } 3030 3031 // Constant fold FP operations. 3032 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3033 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3034 if (N1CFP) { 3035 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3036 // Cannonicalize constant to RHS if commutative 3037 std::swap(N1CFP, N2CFP); 3038 std::swap(N1, N2); 3039 } else if (N2CFP && VT != MVT::ppcf128) { 3040 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3041 APFloat::opStatus s; 3042 switch (Opcode) { 3043 case ISD::FADD: 3044 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3045 if (s != APFloat::opInvalidOp) 3046 return getConstantFP(V1, VT); 3047 break; 3048 case ISD::FSUB: 3049 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3050 if (s!=APFloat::opInvalidOp) 3051 return getConstantFP(V1, VT); 3052 break; 3053 case ISD::FMUL: 3054 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3055 if (s!=APFloat::opInvalidOp) 3056 return getConstantFP(V1, VT); 3057 break; 3058 case ISD::FDIV: 3059 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3060 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3061 return getConstantFP(V1, VT); 3062 break; 3063 case ISD::FREM : 3064 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3065 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3066 return getConstantFP(V1, VT); 3067 break; 3068 case ISD::FCOPYSIGN: 3069 V1.copySign(V2); 3070 return getConstantFP(V1, VT); 3071 default: break; 3072 } 3073 } 3074 3075 if (Opcode == ISD::FP_ROUND) { 3076 APFloat V = N1CFP->getValueAPF(); // make copy 3077 bool ignored; 3078 // This can return overflow, underflow, or inexact; we don't care. 3079 // FIXME need to be more flexible about rounding mode. 3080 (void)V.convert(*EVTToAPFloatSemantics(VT), 3081 APFloat::rmNearestTiesToEven, &ignored); 3082 return getConstantFP(V, VT); 3083 } 3084 } 3085 3086 // Canonicalize an UNDEF to the RHS, even over a constant. 3087 if (N1.getOpcode() == ISD::UNDEF) { 3088 if (isCommutativeBinOp(Opcode)) { 3089 std::swap(N1, N2); 3090 } else { 3091 switch (Opcode) { 3092 case ISD::FP_ROUND_INREG: 3093 case ISD::SIGN_EXTEND_INREG: 3094 case ISD::SUB: 3095 case ISD::FSUB: 3096 case ISD::FDIV: 3097 case ISD::FREM: 3098 case ISD::SRA: 3099 return N1; // fold op(undef, arg2) -> undef 3100 case ISD::UDIV: 3101 case ISD::SDIV: 3102 case ISD::UREM: 3103 case ISD::SREM: 3104 case ISD::SRL: 3105 case ISD::SHL: 3106 if (!VT.isVector()) 3107 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3108 // For vectors, we can't easily build an all zero vector, just return 3109 // the LHS. 3110 return N2; 3111 } 3112 } 3113 } 3114 3115 // Fold a bunch of operators when the RHS is undef. 3116 if (N2.getOpcode() == ISD::UNDEF) { 3117 switch (Opcode) { 3118 case ISD::XOR: 3119 if (N1.getOpcode() == ISD::UNDEF) 3120 // Handle undef ^ undef -> 0 special case. This is a common 3121 // idiom (misuse). 3122 return getConstant(0, VT); 3123 // fallthrough 3124 case ISD::ADD: 3125 case ISD::ADDC: 3126 case ISD::ADDE: 3127 case ISD::SUB: 3128 case ISD::UDIV: 3129 case ISD::SDIV: 3130 case ISD::UREM: 3131 case ISD::SREM: 3132 return N2; // fold op(arg1, undef) -> undef 3133 case ISD::FADD: 3134 case ISD::FSUB: 3135 case ISD::FMUL: 3136 case ISD::FDIV: 3137 case ISD::FREM: 3138 if (getTarget().Options.UnsafeFPMath) 3139 return N2; 3140 break; 3141 case ISD::MUL: 3142 case ISD::AND: 3143 case ISD::SRL: 3144 case ISD::SHL: 3145 if (!VT.isVector()) 3146 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3147 // For vectors, we can't easily build an all zero vector, just return 3148 // the LHS. 3149 return N1; 3150 case ISD::OR: 3151 if (!VT.isVector()) 3152 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3153 // For vectors, we can't easily build an all one vector, just return 3154 // the LHS. 3155 return N1; 3156 case ISD::SRA: 3157 return N1; 3158 } 3159 } 3160 3161 // Memoize this node if possible. 3162 SDNode *N; 3163 SDVTList VTs = getVTList(VT); 3164 if (VT != MVT::Glue) { 3165 SDValue Ops[] = { N1, N2 }; 3166 FoldingSetNodeID ID; 3167 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3168 void *IP = 0; 3169 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3170 return SDValue(E, 0); 3171 3172 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3173 CSEMap.InsertNode(N, IP); 3174 } else { 3175 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3176 } 3177 3178 AllNodes.push_back(N); 3179#ifndef NDEBUG 3180 VerifySDNode(N); 3181#endif 3182 return SDValue(N, 0); 3183} 3184 3185SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3186 SDValue N1, SDValue N2, SDValue N3) { 3187 // Perform various simplifications. 3188 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3189 switch (Opcode) { 3190 case ISD::CONCAT_VECTORS: 3191 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3192 // one big BUILD_VECTOR. 3193 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3194 N2.getOpcode() == ISD::BUILD_VECTOR && 3195 N3.getOpcode() == ISD::BUILD_VECTOR) { 3196 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3197 N1.getNode()->op_end()); 3198 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3199 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3200 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3201 } 3202 break; 3203 case ISD::SETCC: { 3204 // Use FoldSetCC to simplify SETCC's. 3205 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3206 if (Simp.getNode()) return Simp; 3207 break; 3208 } 3209 case ISD::SELECT: 3210 if (N1C) { 3211 if (N1C->getZExtValue()) 3212 return N2; // select true, X, Y -> X 3213 return N3; // select false, X, Y -> Y 3214 } 3215 3216 if (N2 == N3) return N2; // select C, X, X -> X 3217 break; 3218 case ISD::VECTOR_SHUFFLE: 3219 llvm_unreachable("should use getVectorShuffle constructor!"); 3220 case ISD::INSERT_SUBVECTOR: { 3221 SDValue Index = N3; 3222 if (VT.isSimple() && N1.getValueType().isSimple() 3223 && N2.getValueType().isSimple()) { 3224 assert(VT.isVector() && N1.getValueType().isVector() && 3225 N2.getValueType().isVector() && 3226 "Insert subvector VTs must be a vectors"); 3227 assert(VT == N1.getValueType() && 3228 "Dest and insert subvector source types must match!"); 3229 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3230 "Insert subvector must be from smaller vector to larger vector!"); 3231 if (isa<ConstantSDNode>(Index.getNode())) { 3232 assert((N2.getValueType().getVectorNumElements() + 3233 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3234 <= VT.getVectorNumElements()) 3235 && "Insert subvector overflow!"); 3236 } 3237 3238 // Trivial insertion. 3239 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3240 return N2; 3241 } 3242 break; 3243 } 3244 case ISD::BITCAST: 3245 // Fold bit_convert nodes from a type to themselves. 3246 if (N1.getValueType() == VT) 3247 return N1; 3248 break; 3249 } 3250 3251 // Memoize node if it doesn't produce a flag. 3252 SDNode *N; 3253 SDVTList VTs = getVTList(VT); 3254 if (VT != MVT::Glue) { 3255 SDValue Ops[] = { N1, N2, N3 }; 3256 FoldingSetNodeID ID; 3257 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3258 void *IP = 0; 3259 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3260 return SDValue(E, 0); 3261 3262 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3263 CSEMap.InsertNode(N, IP); 3264 } else { 3265 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3266 } 3267 3268 AllNodes.push_back(N); 3269#ifndef NDEBUG 3270 VerifySDNode(N); 3271#endif 3272 return SDValue(N, 0); 3273} 3274 3275SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3276 SDValue N1, SDValue N2, SDValue N3, 3277 SDValue N4) { 3278 SDValue Ops[] = { N1, N2, N3, N4 }; 3279 return getNode(Opcode, DL, VT, Ops, 4); 3280} 3281 3282SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3283 SDValue N1, SDValue N2, SDValue N3, 3284 SDValue N4, SDValue N5) { 3285 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3286 return getNode(Opcode, DL, VT, Ops, 5); 3287} 3288 3289/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3290/// the incoming stack arguments to be loaded from the stack. 3291SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3292 SmallVector<SDValue, 8> ArgChains; 3293 3294 // Include the original chain at the beginning of the list. When this is 3295 // used by target LowerCall hooks, this helps legalize find the 3296 // CALLSEQ_BEGIN node. 3297 ArgChains.push_back(Chain); 3298 3299 // Add a chain value for each stack argument. 3300 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3301 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3302 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3303 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3304 if (FI->getIndex() < 0) 3305 ArgChains.push_back(SDValue(L, 1)); 3306 3307 // Build a tokenfactor for all the chains. 3308 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3309 &ArgChains[0], ArgChains.size()); 3310} 3311 3312/// SplatByte - Distribute ByteVal over NumBits bits. 3313static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3314 APInt Val = APInt(NumBits, ByteVal); 3315 unsigned Shift = 8; 3316 for (unsigned i = NumBits; i > 8; i >>= 1) { 3317 Val = (Val << Shift) | Val; 3318 Shift <<= 1; 3319 } 3320 return Val; 3321} 3322 3323/// getMemsetValue - Vectorized representation of the memset value 3324/// operand. 3325static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3326 DebugLoc dl) { 3327 assert(Value.getOpcode() != ISD::UNDEF); 3328 3329 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3330 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3331 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3332 if (VT.isInteger()) 3333 return DAG.getConstant(Val, VT); 3334 return DAG.getConstantFP(APFloat(Val), VT); 3335 } 3336 3337 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3338 if (NumBits > 8) { 3339 // Use a multiplication with 0x010101... to extend the input to the 3340 // required length. 3341 APInt Magic = SplatByte(NumBits, 0x01); 3342 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3343 } 3344 3345 return Value; 3346} 3347 3348/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3349/// used when a memcpy is turned into a memset when the source is a constant 3350/// string ptr. 3351static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3352 const TargetLowering &TLI, StringRef Str) { 3353 // Handle vector with all elements zero. 3354 if (Str.empty()) { 3355 if (VT.isInteger()) 3356 return DAG.getConstant(0, VT); 3357 else if (VT == MVT::f32 || VT == MVT::f64) 3358 return DAG.getConstantFP(0.0, VT); 3359 else if (VT.isVector()) { 3360 unsigned NumElts = VT.getVectorNumElements(); 3361 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3362 return DAG.getNode(ISD::BITCAST, dl, VT, 3363 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3364 EltVT, NumElts))); 3365 } else 3366 llvm_unreachable("Expected type!"); 3367 } 3368 3369 assert(!VT.isVector() && "Can't handle vector type here!"); 3370 unsigned NumVTBytes = VT.getSizeInBits() / 8; 3371 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3372 3373 uint64_t Val = 0; 3374 if (TLI.isLittleEndian()) { 3375 for (unsigned i = 0; i != NumBytes; ++i) 3376 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3377 } else { 3378 for (unsigned i = 0; i != NumBytes; ++i) 3379 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3380 } 3381 3382 return DAG.getConstant(Val, VT); 3383} 3384 3385/// getMemBasePlusOffset - Returns base and offset node for the 3386/// 3387static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3388 SelectionDAG &DAG) { 3389 EVT VT = Base.getValueType(); 3390 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3391 VT, Base, DAG.getConstant(Offset, VT)); 3392} 3393 3394/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3395/// 3396static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3397 unsigned SrcDelta = 0; 3398 GlobalAddressSDNode *G = NULL; 3399 if (Src.getOpcode() == ISD::GlobalAddress) 3400 G = cast<GlobalAddressSDNode>(Src); 3401 else if (Src.getOpcode() == ISD::ADD && 3402 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3403 Src.getOperand(1).getOpcode() == ISD::Constant) { 3404 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3405 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3406 } 3407 if (!G) 3408 return false; 3409 3410 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3411} 3412 3413/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3414/// to replace the memset / memcpy. Return true if the number of memory ops 3415/// is below the threshold. It returns the types of the sequence of 3416/// memory ops to perform memset / memcpy by reference. 3417static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3418 unsigned Limit, uint64_t Size, 3419 unsigned DstAlign, unsigned SrcAlign, 3420 bool IsZeroVal, 3421 bool MemcpyStrSrc, 3422 SelectionDAG &DAG, 3423 const TargetLowering &TLI) { 3424 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3425 "Expecting memcpy / memset source to meet alignment requirement!"); 3426 // If 'SrcAlign' is zero, that means the memory operation does not need to 3427 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3428 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3429 // is the specified alignment of the memory operation. If it is zero, that 3430 // means it's possible to change the alignment of the destination. 3431 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3432 // not need to be loaded. 3433 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3434 IsZeroVal, MemcpyStrSrc, 3435 DAG.getMachineFunction()); 3436 3437 if (VT == MVT::Other) { 3438 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3439 TLI.allowsUnalignedMemoryAccesses(VT)) { 3440 VT = TLI.getPointerTy(); 3441 } else { 3442 switch (DstAlign & 7) { 3443 case 0: VT = MVT::i64; break; 3444 case 4: VT = MVT::i32; break; 3445 case 2: VT = MVT::i16; break; 3446 default: VT = MVT::i8; break; 3447 } 3448 } 3449 3450 MVT LVT = MVT::i64; 3451 while (!TLI.isTypeLegal(LVT)) 3452 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3453 assert(LVT.isInteger()); 3454 3455 if (VT.bitsGT(LVT)) 3456 VT = LVT; 3457 } 3458 3459 unsigned NumMemOps = 0; 3460 while (Size != 0) { 3461 unsigned VTSize = VT.getSizeInBits() / 8; 3462 while (VTSize > Size) { 3463 // For now, only use non-vector load / store's for the left-over pieces. 3464 if (VT.isVector() || VT.isFloatingPoint()) { 3465 VT = MVT::i64; 3466 while (!TLI.isTypeLegal(VT)) 3467 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3468 VTSize = VT.getSizeInBits() / 8; 3469 } else { 3470 // This can result in a type that is not legal on the target, e.g. 3471 // 1 or 2 bytes on PPC. 3472 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3473 VTSize >>= 1; 3474 } 3475 } 3476 3477 if (++NumMemOps > Limit) 3478 return false; 3479 MemOps.push_back(VT); 3480 Size -= VTSize; 3481 } 3482 3483 return true; 3484} 3485 3486static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3487 SDValue Chain, SDValue Dst, 3488 SDValue Src, uint64_t Size, 3489 unsigned Align, bool isVol, 3490 bool AlwaysInline, 3491 MachinePointerInfo DstPtrInfo, 3492 MachinePointerInfo SrcPtrInfo) { 3493 // Turn a memcpy of undef to nop. 3494 if (Src.getOpcode() == ISD::UNDEF) 3495 return Chain; 3496 3497 // Expand memcpy to a series of load and store ops if the size operand falls 3498 // below a certain threshold. 3499 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3500 // rather than maybe a humongous number of loads and stores. 3501 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3502 std::vector<EVT> MemOps; 3503 bool DstAlignCanChange = false; 3504 MachineFunction &MF = DAG.getMachineFunction(); 3505 MachineFrameInfo *MFI = MF.getFrameInfo(); 3506 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3507 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3508 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3509 DstAlignCanChange = true; 3510 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3511 if (Align > SrcAlign) 3512 SrcAlign = Align; 3513 StringRef Str; 3514 bool CopyFromStr = isMemSrcFromString(Src, Str); 3515 bool isZeroStr = CopyFromStr && Str.empty(); 3516 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3517 3518 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3519 (DstAlignCanChange ? 0 : Align), 3520 (isZeroStr ? 0 : SrcAlign), 3521 true, CopyFromStr, DAG, TLI)) 3522 return SDValue(); 3523 3524 if (DstAlignCanChange) { 3525 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3526 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3527 if (NewAlign > Align) { 3528 // Give the stack frame object a larger alignment if needed. 3529 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3530 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3531 Align = NewAlign; 3532 } 3533 } 3534 3535 SmallVector<SDValue, 8> OutChains; 3536 unsigned NumMemOps = MemOps.size(); 3537 uint64_t SrcOff = 0, DstOff = 0; 3538 for (unsigned i = 0; i != NumMemOps; ++i) { 3539 EVT VT = MemOps[i]; 3540 unsigned VTSize = VT.getSizeInBits() / 8; 3541 SDValue Value, Store; 3542 3543 if (CopyFromStr && 3544 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3545 // It's unlikely a store of a vector immediate can be done in a single 3546 // instruction. It would require a load from a constantpool first. 3547 // We only handle zero vectors here. 3548 // FIXME: Handle other cases where store of vector immediate is done in 3549 // a single instruction. 3550 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3551 Store = DAG.getStore(Chain, dl, Value, 3552 getMemBasePlusOffset(Dst, DstOff, DAG), 3553 DstPtrInfo.getWithOffset(DstOff), isVol, 3554 false, Align); 3555 } else { 3556 // The type might not be legal for the target. This should only happen 3557 // if the type is smaller than a legal type, as on PPC, so the right 3558 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3559 // to Load/Store if NVT==VT. 3560 // FIXME does the case above also need this? 3561 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3562 assert(NVT.bitsGE(VT)); 3563 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3564 getMemBasePlusOffset(Src, SrcOff, DAG), 3565 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3566 MinAlign(SrcAlign, SrcOff)); 3567 Store = DAG.getTruncStore(Chain, dl, Value, 3568 getMemBasePlusOffset(Dst, DstOff, DAG), 3569 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3570 false, Align); 3571 } 3572 OutChains.push_back(Store); 3573 SrcOff += VTSize; 3574 DstOff += VTSize; 3575 } 3576 3577 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3578 &OutChains[0], OutChains.size()); 3579} 3580 3581static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3582 SDValue Chain, SDValue Dst, 3583 SDValue Src, uint64_t Size, 3584 unsigned Align, bool isVol, 3585 bool AlwaysInline, 3586 MachinePointerInfo DstPtrInfo, 3587 MachinePointerInfo SrcPtrInfo) { 3588 // Turn a memmove of undef to nop. 3589 if (Src.getOpcode() == ISD::UNDEF) 3590 return Chain; 3591 3592 // Expand memmove to a series of load and store ops if the size operand falls 3593 // below a certain threshold. 3594 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3595 std::vector<EVT> MemOps; 3596 bool DstAlignCanChange = false; 3597 MachineFunction &MF = DAG.getMachineFunction(); 3598 MachineFrameInfo *MFI = MF.getFrameInfo(); 3599 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3600 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3601 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3602 DstAlignCanChange = true; 3603 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3604 if (Align > SrcAlign) 3605 SrcAlign = Align; 3606 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3607 3608 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3609 (DstAlignCanChange ? 0 : Align), 3610 SrcAlign, true, false, DAG, TLI)) 3611 return SDValue(); 3612 3613 if (DstAlignCanChange) { 3614 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3615 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3616 if (NewAlign > Align) { 3617 // Give the stack frame object a larger alignment if needed. 3618 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3619 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3620 Align = NewAlign; 3621 } 3622 } 3623 3624 uint64_t SrcOff = 0, DstOff = 0; 3625 SmallVector<SDValue, 8> LoadValues; 3626 SmallVector<SDValue, 8> LoadChains; 3627 SmallVector<SDValue, 8> OutChains; 3628 unsigned NumMemOps = MemOps.size(); 3629 for (unsigned i = 0; i < NumMemOps; i++) { 3630 EVT VT = MemOps[i]; 3631 unsigned VTSize = VT.getSizeInBits() / 8; 3632 SDValue Value, Store; 3633 3634 Value = DAG.getLoad(VT, dl, Chain, 3635 getMemBasePlusOffset(Src, SrcOff, DAG), 3636 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3637 false, false, SrcAlign); 3638 LoadValues.push_back(Value); 3639 LoadChains.push_back(Value.getValue(1)); 3640 SrcOff += VTSize; 3641 } 3642 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3643 &LoadChains[0], LoadChains.size()); 3644 OutChains.clear(); 3645 for (unsigned i = 0; i < NumMemOps; i++) { 3646 EVT VT = MemOps[i]; 3647 unsigned VTSize = VT.getSizeInBits() / 8; 3648 SDValue Value, Store; 3649 3650 Store = DAG.getStore(Chain, dl, LoadValues[i], 3651 getMemBasePlusOffset(Dst, DstOff, DAG), 3652 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3653 OutChains.push_back(Store); 3654 DstOff += VTSize; 3655 } 3656 3657 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3658 &OutChains[0], OutChains.size()); 3659} 3660 3661static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3662 SDValue Chain, SDValue Dst, 3663 SDValue Src, uint64_t Size, 3664 unsigned Align, bool isVol, 3665 MachinePointerInfo DstPtrInfo) { 3666 // Turn a memset of undef to nop. 3667 if (Src.getOpcode() == ISD::UNDEF) 3668 return Chain; 3669 3670 // Expand memset to a series of load/store ops if the size operand 3671 // falls below a certain threshold. 3672 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3673 std::vector<EVT> MemOps; 3674 bool DstAlignCanChange = false; 3675 MachineFunction &MF = DAG.getMachineFunction(); 3676 MachineFrameInfo *MFI = MF.getFrameInfo(); 3677 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3678 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3679 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3680 DstAlignCanChange = true; 3681 bool IsZeroVal = 3682 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3683 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3684 Size, (DstAlignCanChange ? 0 : Align), 0, 3685 IsZeroVal, false, DAG, TLI)) 3686 return SDValue(); 3687 3688 if (DstAlignCanChange) { 3689 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3690 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3691 if (NewAlign > Align) { 3692 // Give the stack frame object a larger alignment if needed. 3693 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3694 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3695 Align = NewAlign; 3696 } 3697 } 3698 3699 SmallVector<SDValue, 8> OutChains; 3700 uint64_t DstOff = 0; 3701 unsigned NumMemOps = MemOps.size(); 3702 3703 // Find the largest store and generate the bit pattern for it. 3704 EVT LargestVT = MemOps[0]; 3705 for (unsigned i = 1; i < NumMemOps; i++) 3706 if (MemOps[i].bitsGT(LargestVT)) 3707 LargestVT = MemOps[i]; 3708 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3709 3710 for (unsigned i = 0; i < NumMemOps; i++) { 3711 EVT VT = MemOps[i]; 3712 3713 // If this store is smaller than the largest store see whether we can get 3714 // the smaller value for free with a truncate. 3715 SDValue Value = MemSetValue; 3716 if (VT.bitsLT(LargestVT)) { 3717 if (!LargestVT.isVector() && !VT.isVector() && 3718 TLI.isTruncateFree(LargestVT, VT)) 3719 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3720 else 3721 Value = getMemsetValue(Src, VT, DAG, dl); 3722 } 3723 assert(Value.getValueType() == VT && "Value with wrong type."); 3724 SDValue Store = DAG.getStore(Chain, dl, Value, 3725 getMemBasePlusOffset(Dst, DstOff, DAG), 3726 DstPtrInfo.getWithOffset(DstOff), 3727 isVol, false, Align); 3728 OutChains.push_back(Store); 3729 DstOff += VT.getSizeInBits() / 8; 3730 } 3731 3732 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3733 &OutChains[0], OutChains.size()); 3734} 3735 3736SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3737 SDValue Src, SDValue Size, 3738 unsigned Align, bool isVol, bool AlwaysInline, 3739 MachinePointerInfo DstPtrInfo, 3740 MachinePointerInfo SrcPtrInfo) { 3741 3742 // Check to see if we should lower the memcpy to loads and stores first. 3743 // For cases within the target-specified limits, this is the best choice. 3744 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3745 if (ConstantSize) { 3746 // Memcpy with size zero? Just return the original chain. 3747 if (ConstantSize->isNullValue()) 3748 return Chain; 3749 3750 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3751 ConstantSize->getZExtValue(),Align, 3752 isVol, false, DstPtrInfo, SrcPtrInfo); 3753 if (Result.getNode()) 3754 return Result; 3755 } 3756 3757 // Then check to see if we should lower the memcpy with target-specific 3758 // code. If the target chooses to do this, this is the next best. 3759 SDValue Result = 3760 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3761 isVol, AlwaysInline, 3762 DstPtrInfo, SrcPtrInfo); 3763 if (Result.getNode()) 3764 return Result; 3765 3766 // If we really need inline code and the target declined to provide it, 3767 // use a (potentially long) sequence of loads and stores. 3768 if (AlwaysInline) { 3769 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3770 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3771 ConstantSize->getZExtValue(), Align, isVol, 3772 true, DstPtrInfo, SrcPtrInfo); 3773 } 3774 3775 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3776 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3777 // respect volatile, so they may do things like read or write memory 3778 // beyond the given memory regions. But fixing this isn't easy, and most 3779 // people don't care. 3780 3781 // Emit a library call. 3782 TargetLowering::ArgListTy Args; 3783 TargetLowering::ArgListEntry Entry; 3784 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3785 Entry.Node = Dst; Args.push_back(Entry); 3786 Entry.Node = Src; Args.push_back(Entry); 3787 Entry.Node = Size; Args.push_back(Entry); 3788 // FIXME: pass in DebugLoc 3789 TargetLowering:: 3790 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3791 false, false, false, false, 0, 3792 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3793 /*isTailCall=*/false, 3794 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3795 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3796 TLI.getPointerTy()), 3797 Args, *this, dl); 3798 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3799 3800 return CallResult.second; 3801} 3802 3803SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3804 SDValue Src, SDValue Size, 3805 unsigned Align, bool isVol, 3806 MachinePointerInfo DstPtrInfo, 3807 MachinePointerInfo SrcPtrInfo) { 3808 3809 // Check to see if we should lower the memmove to loads and stores first. 3810 // For cases within the target-specified limits, this is the best choice. 3811 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3812 if (ConstantSize) { 3813 // Memmove with size zero? Just return the original chain. 3814 if (ConstantSize->isNullValue()) 3815 return Chain; 3816 3817 SDValue Result = 3818 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3819 ConstantSize->getZExtValue(), Align, isVol, 3820 false, DstPtrInfo, SrcPtrInfo); 3821 if (Result.getNode()) 3822 return Result; 3823 } 3824 3825 // Then check to see if we should lower the memmove with target-specific 3826 // code. If the target chooses to do this, this is the next best. 3827 SDValue Result = 3828 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3829 DstPtrInfo, SrcPtrInfo); 3830 if (Result.getNode()) 3831 return Result; 3832 3833 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3834 // not be safe. See memcpy above for more details. 3835 3836 // Emit a library call. 3837 TargetLowering::ArgListTy Args; 3838 TargetLowering::ArgListEntry Entry; 3839 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3840 Entry.Node = Dst; Args.push_back(Entry); 3841 Entry.Node = Src; Args.push_back(Entry); 3842 Entry.Node = Size; Args.push_back(Entry); 3843 // FIXME: pass in DebugLoc 3844 TargetLowering:: 3845 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3846 false, false, false, false, 0, 3847 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 3848 /*isTailCall=*/false, 3849 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3850 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3851 TLI.getPointerTy()), 3852 Args, *this, dl); 3853 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3854 3855 return CallResult.second; 3856} 3857 3858SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3859 SDValue Src, SDValue Size, 3860 unsigned Align, bool isVol, 3861 MachinePointerInfo DstPtrInfo) { 3862 3863 // Check to see if we should lower the memset to stores first. 3864 // For cases within the target-specified limits, this is the best choice. 3865 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3866 if (ConstantSize) { 3867 // Memset with size zero? Just return the original chain. 3868 if (ConstantSize->isNullValue()) 3869 return Chain; 3870 3871 SDValue Result = 3872 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3873 Align, isVol, DstPtrInfo); 3874 3875 if (Result.getNode()) 3876 return Result; 3877 } 3878 3879 // Then check to see if we should lower the memset with target-specific 3880 // code. If the target chooses to do this, this is the next best. 3881 SDValue Result = 3882 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3883 DstPtrInfo); 3884 if (Result.getNode()) 3885 return Result; 3886 3887 // Emit a library call. 3888 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3889 TargetLowering::ArgListTy Args; 3890 TargetLowering::ArgListEntry Entry; 3891 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3892 Args.push_back(Entry); 3893 // Extend or truncate the argument to be an i32 value for the call. 3894 if (Src.getValueType().bitsGT(MVT::i32)) 3895 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3896 else 3897 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3898 Entry.Node = Src; 3899 Entry.Ty = Type::getInt32Ty(*getContext()); 3900 Entry.isSExt = true; 3901 Args.push_back(Entry); 3902 Entry.Node = Size; 3903 Entry.Ty = IntPtrTy; 3904 Entry.isSExt = false; 3905 Args.push_back(Entry); 3906 // FIXME: pass in DebugLoc 3907 TargetLowering:: 3908 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3909 false, false, false, false, 0, 3910 TLI.getLibcallCallingConv(RTLIB::MEMSET), 3911 /*isTailCall=*/false, 3912 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 3913 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3914 TLI.getPointerTy()), 3915 Args, *this, dl); 3916 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3917 3918 return CallResult.second; 3919} 3920 3921SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3922 SDValue Chain, SDValue Ptr, SDValue Cmp, 3923 SDValue Swp, MachinePointerInfo PtrInfo, 3924 unsigned Alignment, 3925 AtomicOrdering Ordering, 3926 SynchronizationScope SynchScope) { 3927 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3928 Alignment = getEVTAlignment(MemVT); 3929 3930 MachineFunction &MF = getMachineFunction(); 3931 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3932 3933 // For now, atomics are considered to be volatile always. 3934 // FIXME: Volatile isn't really correct; we should keep track of atomic 3935 // orderings in the memoperand. 3936 Flags |= MachineMemOperand::MOVolatile; 3937 3938 MachineMemOperand *MMO = 3939 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3940 3941 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3942 Ordering, SynchScope); 3943} 3944 3945SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3946 SDValue Chain, 3947 SDValue Ptr, SDValue Cmp, 3948 SDValue Swp, MachineMemOperand *MMO, 3949 AtomicOrdering Ordering, 3950 SynchronizationScope SynchScope) { 3951 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3952 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3953 3954 EVT VT = Cmp.getValueType(); 3955 3956 SDVTList VTs = getVTList(VT, MVT::Other); 3957 FoldingSetNodeID ID; 3958 ID.AddInteger(MemVT.getRawBits()); 3959 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3960 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3961 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 3962 void* IP = 0; 3963 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3964 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3965 return SDValue(E, 0); 3966 } 3967 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3968 Ptr, Cmp, Swp, MMO, Ordering, 3969 SynchScope); 3970 CSEMap.InsertNode(N, IP); 3971 AllNodes.push_back(N); 3972 return SDValue(N, 0); 3973} 3974 3975SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3976 SDValue Chain, 3977 SDValue Ptr, SDValue Val, 3978 const Value* PtrVal, 3979 unsigned Alignment, 3980 AtomicOrdering Ordering, 3981 SynchronizationScope SynchScope) { 3982 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3983 Alignment = getEVTAlignment(MemVT); 3984 3985 MachineFunction &MF = getMachineFunction(); 3986 // A monotonic store does not load; a release store "loads" in the sense 3987 // that other stores cannot be sunk past it. 3988 // (An atomicrmw obviously both loads and stores.) 3989 unsigned Flags = MachineMemOperand::MOStore; 3990 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic) 3991 Flags |= MachineMemOperand::MOLoad; 3992 3993 // For now, atomics are considered to be volatile always. 3994 // FIXME: Volatile isn't really correct; we should keep track of atomic 3995 // orderings in the memoperand. 3996 Flags |= MachineMemOperand::MOVolatile; 3997 3998 MachineMemOperand *MMO = 3999 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4000 MemVT.getStoreSize(), Alignment); 4001 4002 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4003 Ordering, SynchScope); 4004} 4005 4006SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4007 SDValue Chain, 4008 SDValue Ptr, SDValue Val, 4009 MachineMemOperand *MMO, 4010 AtomicOrdering Ordering, 4011 SynchronizationScope SynchScope) { 4012 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4013 Opcode == ISD::ATOMIC_LOAD_SUB || 4014 Opcode == ISD::ATOMIC_LOAD_AND || 4015 Opcode == ISD::ATOMIC_LOAD_OR || 4016 Opcode == ISD::ATOMIC_LOAD_XOR || 4017 Opcode == ISD::ATOMIC_LOAD_NAND || 4018 Opcode == ISD::ATOMIC_LOAD_MIN || 4019 Opcode == ISD::ATOMIC_LOAD_MAX || 4020 Opcode == ISD::ATOMIC_LOAD_UMIN || 4021 Opcode == ISD::ATOMIC_LOAD_UMAX || 4022 Opcode == ISD::ATOMIC_SWAP || 4023 Opcode == ISD::ATOMIC_STORE) && 4024 "Invalid Atomic Op"); 4025 4026 EVT VT = Val.getValueType(); 4027 4028 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4029 getVTList(VT, MVT::Other); 4030 FoldingSetNodeID ID; 4031 ID.AddInteger(MemVT.getRawBits()); 4032 SDValue Ops[] = {Chain, Ptr, Val}; 4033 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 4034 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4035 void* IP = 0; 4036 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4037 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4038 return SDValue(E, 0); 4039 } 4040 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4041 Ptr, Val, MMO, 4042 Ordering, SynchScope); 4043 CSEMap.InsertNode(N, IP); 4044 AllNodes.push_back(N); 4045 return SDValue(N, 0); 4046} 4047 4048SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4049 EVT VT, SDValue Chain, 4050 SDValue Ptr, 4051 const Value* PtrVal, 4052 unsigned Alignment, 4053 AtomicOrdering Ordering, 4054 SynchronizationScope SynchScope) { 4055 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4056 Alignment = getEVTAlignment(MemVT); 4057 4058 MachineFunction &MF = getMachineFunction(); 4059 // A monotonic load does not store; an acquire load "stores" in the sense 4060 // that other loads cannot be hoisted past it. 4061 unsigned Flags = MachineMemOperand::MOLoad; 4062 if (Ordering > Monotonic) 4063 Flags |= MachineMemOperand::MOStore; 4064 4065 // For now, atomics are considered to be volatile always. 4066 // FIXME: Volatile isn't really correct; we should keep track of atomic 4067 // orderings in the memoperand. 4068 Flags |= MachineMemOperand::MOVolatile; 4069 4070 MachineMemOperand *MMO = 4071 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4072 MemVT.getStoreSize(), Alignment); 4073 4074 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4075 Ordering, SynchScope); 4076} 4077 4078SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4079 EVT VT, SDValue Chain, 4080 SDValue Ptr, 4081 MachineMemOperand *MMO, 4082 AtomicOrdering Ordering, 4083 SynchronizationScope SynchScope) { 4084 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4085 4086 SDVTList VTs = getVTList(VT, MVT::Other); 4087 FoldingSetNodeID ID; 4088 ID.AddInteger(MemVT.getRawBits()); 4089 SDValue Ops[] = {Chain, Ptr}; 4090 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4091 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4092 void* IP = 0; 4093 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4094 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4095 return SDValue(E, 0); 4096 } 4097 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4098 Ptr, MMO, Ordering, SynchScope); 4099 CSEMap.InsertNode(N, IP); 4100 AllNodes.push_back(N); 4101 return SDValue(N, 0); 4102} 4103 4104/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4105SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4106 DebugLoc dl) { 4107 if (NumOps == 1) 4108 return Ops[0]; 4109 4110 SmallVector<EVT, 4> VTs; 4111 VTs.reserve(NumOps); 4112 for (unsigned i = 0; i < NumOps; ++i) 4113 VTs.push_back(Ops[i].getValueType()); 4114 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4115 Ops, NumOps); 4116} 4117 4118SDValue 4119SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4120 const EVT *VTs, unsigned NumVTs, 4121 const SDValue *Ops, unsigned NumOps, 4122 EVT MemVT, MachinePointerInfo PtrInfo, 4123 unsigned Align, bool Vol, 4124 bool ReadMem, bool WriteMem) { 4125 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4126 MemVT, PtrInfo, Align, Vol, 4127 ReadMem, WriteMem); 4128} 4129 4130SDValue 4131SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4132 const SDValue *Ops, unsigned NumOps, 4133 EVT MemVT, MachinePointerInfo PtrInfo, 4134 unsigned Align, bool Vol, 4135 bool ReadMem, bool WriteMem) { 4136 if (Align == 0) // Ensure that codegen never sees alignment 0 4137 Align = getEVTAlignment(MemVT); 4138 4139 MachineFunction &MF = getMachineFunction(); 4140 unsigned Flags = 0; 4141 if (WriteMem) 4142 Flags |= MachineMemOperand::MOStore; 4143 if (ReadMem) 4144 Flags |= MachineMemOperand::MOLoad; 4145 if (Vol) 4146 Flags |= MachineMemOperand::MOVolatile; 4147 MachineMemOperand *MMO = 4148 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4149 4150 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4151} 4152 4153SDValue 4154SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4155 const SDValue *Ops, unsigned NumOps, 4156 EVT MemVT, MachineMemOperand *MMO) { 4157 assert((Opcode == ISD::INTRINSIC_VOID || 4158 Opcode == ISD::INTRINSIC_W_CHAIN || 4159 Opcode == ISD::PREFETCH || 4160 (Opcode <= INT_MAX && 4161 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4162 "Opcode is not a memory-accessing opcode!"); 4163 4164 // Memoize the node unless it returns a flag. 4165 MemIntrinsicSDNode *N; 4166 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4167 FoldingSetNodeID ID; 4168 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4169 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4170 void *IP = 0; 4171 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4172 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4173 return SDValue(E, 0); 4174 } 4175 4176 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4177 MemVT, MMO); 4178 CSEMap.InsertNode(N, IP); 4179 } else { 4180 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4181 MemVT, MMO); 4182 } 4183 AllNodes.push_back(N); 4184 return SDValue(N, 0); 4185} 4186 4187/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4188/// MachinePointerInfo record from it. This is particularly useful because the 4189/// code generator has many cases where it doesn't bother passing in a 4190/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4191static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4192 // If this is FI+Offset, we can model it. 4193 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4194 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4195 4196 // If this is (FI+Offset1)+Offset2, we can model it. 4197 if (Ptr.getOpcode() != ISD::ADD || 4198 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4199 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4200 return MachinePointerInfo(); 4201 4202 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4203 return MachinePointerInfo::getFixedStack(FI, Offset+ 4204 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4205} 4206 4207/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4208/// MachinePointerInfo record from it. This is particularly useful because the 4209/// code generator has many cases where it doesn't bother passing in a 4210/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4211static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4212 // If the 'Offset' value isn't a constant, we can't handle this. 4213 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4214 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4215 if (OffsetOp.getOpcode() == ISD::UNDEF) 4216 return InferPointerInfo(Ptr); 4217 return MachinePointerInfo(); 4218} 4219 4220 4221SDValue 4222SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4223 EVT VT, DebugLoc dl, SDValue Chain, 4224 SDValue Ptr, SDValue Offset, 4225 MachinePointerInfo PtrInfo, EVT MemVT, 4226 bool isVolatile, bool isNonTemporal, bool isInvariant, 4227 unsigned Alignment, const MDNode *TBAAInfo, 4228 const MDNode *Ranges) { 4229 assert(Chain.getValueType() == MVT::Other && 4230 "Invalid chain type"); 4231 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4232 Alignment = getEVTAlignment(VT); 4233 4234 unsigned Flags = MachineMemOperand::MOLoad; 4235 if (isVolatile) 4236 Flags |= MachineMemOperand::MOVolatile; 4237 if (isNonTemporal) 4238 Flags |= MachineMemOperand::MONonTemporal; 4239 if (isInvariant) 4240 Flags |= MachineMemOperand::MOInvariant; 4241 4242 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4243 // clients. 4244 if (PtrInfo.V == 0) 4245 PtrInfo = InferPointerInfo(Ptr, Offset); 4246 4247 MachineFunction &MF = getMachineFunction(); 4248 MachineMemOperand *MMO = 4249 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4250 TBAAInfo, Ranges); 4251 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4252} 4253 4254SDValue 4255SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4256 EVT VT, DebugLoc dl, SDValue Chain, 4257 SDValue Ptr, SDValue Offset, EVT MemVT, 4258 MachineMemOperand *MMO) { 4259 if (VT == MemVT) { 4260 ExtType = ISD::NON_EXTLOAD; 4261 } else if (ExtType == ISD::NON_EXTLOAD) { 4262 assert(VT == MemVT && "Non-extending load from different memory type!"); 4263 } else { 4264 // Extending load. 4265 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4266 "Should only be an extending load, not truncating!"); 4267 assert(VT.isInteger() == MemVT.isInteger() && 4268 "Cannot convert from FP to Int or Int -> FP!"); 4269 assert(VT.isVector() == MemVT.isVector() && 4270 "Cannot use trunc store to convert to or from a vector!"); 4271 assert((!VT.isVector() || 4272 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4273 "Cannot use trunc store to change the number of vector elements!"); 4274 } 4275 4276 bool Indexed = AM != ISD::UNINDEXED; 4277 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4278 "Unindexed load with an offset!"); 4279 4280 SDVTList VTs = Indexed ? 4281 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4282 SDValue Ops[] = { Chain, Ptr, Offset }; 4283 FoldingSetNodeID ID; 4284 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4285 ID.AddInteger(MemVT.getRawBits()); 4286 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4287 MMO->isNonTemporal(), 4288 MMO->isInvariant())); 4289 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4290 void *IP = 0; 4291 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4292 cast<LoadSDNode>(E)->refineAlignment(MMO); 4293 return SDValue(E, 0); 4294 } 4295 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4296 MemVT, MMO); 4297 CSEMap.InsertNode(N, IP); 4298 AllNodes.push_back(N); 4299 return SDValue(N, 0); 4300} 4301 4302SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4303 SDValue Chain, SDValue Ptr, 4304 MachinePointerInfo PtrInfo, 4305 bool isVolatile, bool isNonTemporal, 4306 bool isInvariant, unsigned Alignment, 4307 const MDNode *TBAAInfo, 4308 const MDNode *Ranges) { 4309 SDValue Undef = getUNDEF(Ptr.getValueType()); 4310 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4311 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4312 TBAAInfo, Ranges); 4313} 4314 4315SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4316 SDValue Chain, SDValue Ptr, 4317 MachinePointerInfo PtrInfo, EVT MemVT, 4318 bool isVolatile, bool isNonTemporal, 4319 unsigned Alignment, const MDNode *TBAAInfo) { 4320 SDValue Undef = getUNDEF(Ptr.getValueType()); 4321 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4322 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4323 TBAAInfo); 4324} 4325 4326 4327SDValue 4328SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4329 SDValue Offset, ISD::MemIndexedMode AM) { 4330 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4331 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4332 "Load is already a indexed load!"); 4333 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4334 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4335 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4336 false, LD->getAlignment()); 4337} 4338 4339SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4340 SDValue Ptr, MachinePointerInfo PtrInfo, 4341 bool isVolatile, bool isNonTemporal, 4342 unsigned Alignment, const MDNode *TBAAInfo) { 4343 assert(Chain.getValueType() == MVT::Other && 4344 "Invalid chain type"); 4345 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4346 Alignment = getEVTAlignment(Val.getValueType()); 4347 4348 unsigned Flags = MachineMemOperand::MOStore; 4349 if (isVolatile) 4350 Flags |= MachineMemOperand::MOVolatile; 4351 if (isNonTemporal) 4352 Flags |= MachineMemOperand::MONonTemporal; 4353 4354 if (PtrInfo.V == 0) 4355 PtrInfo = InferPointerInfo(Ptr); 4356 4357 MachineFunction &MF = getMachineFunction(); 4358 MachineMemOperand *MMO = 4359 MF.getMachineMemOperand(PtrInfo, Flags, 4360 Val.getValueType().getStoreSize(), Alignment, 4361 TBAAInfo); 4362 4363 return getStore(Chain, dl, Val, Ptr, MMO); 4364} 4365 4366SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4367 SDValue Ptr, MachineMemOperand *MMO) { 4368 assert(Chain.getValueType() == MVT::Other && 4369 "Invalid chain type"); 4370 EVT VT = Val.getValueType(); 4371 SDVTList VTs = getVTList(MVT::Other); 4372 SDValue Undef = getUNDEF(Ptr.getValueType()); 4373 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4374 FoldingSetNodeID ID; 4375 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4376 ID.AddInteger(VT.getRawBits()); 4377 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4378 MMO->isNonTemporal(), MMO->isInvariant())); 4379 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4380 void *IP = 0; 4381 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4382 cast<StoreSDNode>(E)->refineAlignment(MMO); 4383 return SDValue(E, 0); 4384 } 4385 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4386 false, VT, MMO); 4387 CSEMap.InsertNode(N, IP); 4388 AllNodes.push_back(N); 4389 return SDValue(N, 0); 4390} 4391 4392SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4393 SDValue Ptr, MachinePointerInfo PtrInfo, 4394 EVT SVT,bool isVolatile, bool isNonTemporal, 4395 unsigned Alignment, 4396 const MDNode *TBAAInfo) { 4397 assert(Chain.getValueType() == MVT::Other && 4398 "Invalid chain type"); 4399 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4400 Alignment = getEVTAlignment(SVT); 4401 4402 unsigned Flags = MachineMemOperand::MOStore; 4403 if (isVolatile) 4404 Flags |= MachineMemOperand::MOVolatile; 4405 if (isNonTemporal) 4406 Flags |= MachineMemOperand::MONonTemporal; 4407 4408 if (PtrInfo.V == 0) 4409 PtrInfo = InferPointerInfo(Ptr); 4410 4411 MachineFunction &MF = getMachineFunction(); 4412 MachineMemOperand *MMO = 4413 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4414 TBAAInfo); 4415 4416 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4417} 4418 4419SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4420 SDValue Ptr, EVT SVT, 4421 MachineMemOperand *MMO) { 4422 EVT VT = Val.getValueType(); 4423 4424 assert(Chain.getValueType() == MVT::Other && 4425 "Invalid chain type"); 4426 if (VT == SVT) 4427 return getStore(Chain, dl, Val, Ptr, MMO); 4428 4429 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4430 "Should only be a truncating store, not extending!"); 4431 assert(VT.isInteger() == SVT.isInteger() && 4432 "Can't do FP-INT conversion!"); 4433 assert(VT.isVector() == SVT.isVector() && 4434 "Cannot use trunc store to convert to or from a vector!"); 4435 assert((!VT.isVector() || 4436 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4437 "Cannot use trunc store to change the number of vector elements!"); 4438 4439 SDVTList VTs = getVTList(MVT::Other); 4440 SDValue Undef = getUNDEF(Ptr.getValueType()); 4441 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4442 FoldingSetNodeID ID; 4443 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4444 ID.AddInteger(SVT.getRawBits()); 4445 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4446 MMO->isNonTemporal(), MMO->isInvariant())); 4447 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4448 void *IP = 0; 4449 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4450 cast<StoreSDNode>(E)->refineAlignment(MMO); 4451 return SDValue(E, 0); 4452 } 4453 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4454 true, SVT, MMO); 4455 CSEMap.InsertNode(N, IP); 4456 AllNodes.push_back(N); 4457 return SDValue(N, 0); 4458} 4459 4460SDValue 4461SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4462 SDValue Offset, ISD::MemIndexedMode AM) { 4463 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4464 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4465 "Store is already a indexed store!"); 4466 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4467 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4468 FoldingSetNodeID ID; 4469 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4470 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4471 ID.AddInteger(ST->getRawSubclassData()); 4472 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4473 void *IP = 0; 4474 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4475 return SDValue(E, 0); 4476 4477 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4478 ST->isTruncatingStore(), 4479 ST->getMemoryVT(), 4480 ST->getMemOperand()); 4481 CSEMap.InsertNode(N, IP); 4482 AllNodes.push_back(N); 4483 return SDValue(N, 0); 4484} 4485 4486SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4487 SDValue Chain, SDValue Ptr, 4488 SDValue SV, 4489 unsigned Align) { 4490 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4491 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4492} 4493 4494SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4495 const SDUse *Ops, unsigned NumOps) { 4496 switch (NumOps) { 4497 case 0: return getNode(Opcode, DL, VT); 4498 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4499 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4500 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4501 default: break; 4502 } 4503 4504 // Copy from an SDUse array into an SDValue array for use with 4505 // the regular getNode logic. 4506 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4507 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4508} 4509 4510SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4511 const SDValue *Ops, unsigned NumOps) { 4512 switch (NumOps) { 4513 case 0: return getNode(Opcode, DL, VT); 4514 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4515 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4516 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4517 default: break; 4518 } 4519 4520 switch (Opcode) { 4521 default: break; 4522 case ISD::SELECT_CC: { 4523 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4524 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4525 "LHS and RHS of condition must have same type!"); 4526 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4527 "True and False arms of SelectCC must have same type!"); 4528 assert(Ops[2].getValueType() == VT && 4529 "select_cc node must be of same type as true and false value!"); 4530 break; 4531 } 4532 case ISD::BR_CC: { 4533 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4534 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4535 "LHS/RHS of comparison should match types!"); 4536 break; 4537 } 4538 } 4539 4540 // Memoize nodes. 4541 SDNode *N; 4542 SDVTList VTs = getVTList(VT); 4543 4544 if (VT != MVT::Glue) { 4545 FoldingSetNodeID ID; 4546 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4547 void *IP = 0; 4548 4549 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4550 return SDValue(E, 0); 4551 4552 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4553 CSEMap.InsertNode(N, IP); 4554 } else { 4555 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4556 } 4557 4558 AllNodes.push_back(N); 4559#ifndef NDEBUG 4560 VerifySDNode(N); 4561#endif 4562 return SDValue(N, 0); 4563} 4564 4565SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4566 const std::vector<EVT> &ResultTys, 4567 const SDValue *Ops, unsigned NumOps) { 4568 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4569 Ops, NumOps); 4570} 4571 4572SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4573 const EVT *VTs, unsigned NumVTs, 4574 const SDValue *Ops, unsigned NumOps) { 4575 if (NumVTs == 1) 4576 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4577 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4578} 4579 4580SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4581 const SDValue *Ops, unsigned NumOps) { 4582 if (VTList.NumVTs == 1) 4583 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4584 4585#if 0 4586 switch (Opcode) { 4587 // FIXME: figure out how to safely handle things like 4588 // int foo(int x) { return 1 << (x & 255); } 4589 // int bar() { return foo(256); } 4590 case ISD::SRA_PARTS: 4591 case ISD::SRL_PARTS: 4592 case ISD::SHL_PARTS: 4593 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4594 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4595 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4596 else if (N3.getOpcode() == ISD::AND) 4597 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4598 // If the and is only masking out bits that cannot effect the shift, 4599 // eliminate the and. 4600 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4601 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4602 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4603 } 4604 break; 4605 } 4606#endif 4607 4608 // Memoize the node unless it returns a flag. 4609 SDNode *N; 4610 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4611 FoldingSetNodeID ID; 4612 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4613 void *IP = 0; 4614 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4615 return SDValue(E, 0); 4616 4617 if (NumOps == 1) { 4618 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4619 } else if (NumOps == 2) { 4620 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4621 } else if (NumOps == 3) { 4622 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4623 Ops[2]); 4624 } else { 4625 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4626 } 4627 CSEMap.InsertNode(N, IP); 4628 } else { 4629 if (NumOps == 1) { 4630 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4631 } else if (NumOps == 2) { 4632 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4633 } else if (NumOps == 3) { 4634 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4635 Ops[2]); 4636 } else { 4637 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4638 } 4639 } 4640 AllNodes.push_back(N); 4641#ifndef NDEBUG 4642 VerifySDNode(N); 4643#endif 4644 return SDValue(N, 0); 4645} 4646 4647SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4648 return getNode(Opcode, DL, VTList, 0, 0); 4649} 4650 4651SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4652 SDValue N1) { 4653 SDValue Ops[] = { N1 }; 4654 return getNode(Opcode, DL, VTList, Ops, 1); 4655} 4656 4657SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4658 SDValue N1, SDValue N2) { 4659 SDValue Ops[] = { N1, N2 }; 4660 return getNode(Opcode, DL, VTList, Ops, 2); 4661} 4662 4663SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4664 SDValue N1, SDValue N2, SDValue N3) { 4665 SDValue Ops[] = { N1, N2, N3 }; 4666 return getNode(Opcode, DL, VTList, Ops, 3); 4667} 4668 4669SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4670 SDValue N1, SDValue N2, SDValue N3, 4671 SDValue N4) { 4672 SDValue Ops[] = { N1, N2, N3, N4 }; 4673 return getNode(Opcode, DL, VTList, Ops, 4); 4674} 4675 4676SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4677 SDValue N1, SDValue N2, SDValue N3, 4678 SDValue N4, SDValue N5) { 4679 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4680 return getNode(Opcode, DL, VTList, Ops, 5); 4681} 4682 4683SDVTList SelectionDAG::getVTList(EVT VT) { 4684 return makeVTList(SDNode::getValueTypeList(VT), 1); 4685} 4686 4687SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4688 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4689 E = VTList.rend(); I != E; ++I) 4690 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4691 return *I; 4692 4693 EVT *Array = Allocator.Allocate<EVT>(2); 4694 Array[0] = VT1; 4695 Array[1] = VT2; 4696 SDVTList Result = makeVTList(Array, 2); 4697 VTList.push_back(Result); 4698 return Result; 4699} 4700 4701SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4702 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4703 E = VTList.rend(); I != E; ++I) 4704 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4705 I->VTs[2] == VT3) 4706 return *I; 4707 4708 EVT *Array = Allocator.Allocate<EVT>(3); 4709 Array[0] = VT1; 4710 Array[1] = VT2; 4711 Array[2] = VT3; 4712 SDVTList Result = makeVTList(Array, 3); 4713 VTList.push_back(Result); 4714 return Result; 4715} 4716 4717SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4718 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4719 E = VTList.rend(); I != E; ++I) 4720 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4721 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4722 return *I; 4723 4724 EVT *Array = Allocator.Allocate<EVT>(4); 4725 Array[0] = VT1; 4726 Array[1] = VT2; 4727 Array[2] = VT3; 4728 Array[3] = VT4; 4729 SDVTList Result = makeVTList(Array, 4); 4730 VTList.push_back(Result); 4731 return Result; 4732} 4733 4734SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4735 switch (NumVTs) { 4736 case 0: llvm_unreachable("Cannot have nodes without results!"); 4737 case 1: return getVTList(VTs[0]); 4738 case 2: return getVTList(VTs[0], VTs[1]); 4739 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4740 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4741 default: break; 4742 } 4743 4744 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4745 E = VTList.rend(); I != E; ++I) { 4746 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4747 continue; 4748 4749 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4750 return *I; 4751 } 4752 4753 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4754 std::copy(VTs, VTs+NumVTs, Array); 4755 SDVTList Result = makeVTList(Array, NumVTs); 4756 VTList.push_back(Result); 4757 return Result; 4758} 4759 4760 4761/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4762/// specified operands. If the resultant node already exists in the DAG, 4763/// this does not modify the specified node, instead it returns the node that 4764/// already exists. If the resultant node does not exist in the DAG, the 4765/// input node is returned. As a degenerate case, if you specify the same 4766/// input operands as the node already has, the input node is returned. 4767SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4768 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4769 4770 // Check to see if there is no change. 4771 if (Op == N->getOperand(0)) return N; 4772 4773 // See if the modified node already exists. 4774 void *InsertPos = 0; 4775 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4776 return Existing; 4777 4778 // Nope it doesn't. Remove the node from its current place in the maps. 4779 if (InsertPos) 4780 if (!RemoveNodeFromCSEMaps(N)) 4781 InsertPos = 0; 4782 4783 // Now we update the operands. 4784 N->OperandList[0].set(Op); 4785 4786 // If this gets put into a CSE map, add it. 4787 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4788 return N; 4789} 4790 4791SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4792 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4793 4794 // Check to see if there is no change. 4795 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4796 return N; // No operands changed, just return the input node. 4797 4798 // See if the modified node already exists. 4799 void *InsertPos = 0; 4800 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4801 return Existing; 4802 4803 // Nope it doesn't. Remove the node from its current place in the maps. 4804 if (InsertPos) 4805 if (!RemoveNodeFromCSEMaps(N)) 4806 InsertPos = 0; 4807 4808 // Now we update the operands. 4809 if (N->OperandList[0] != Op1) 4810 N->OperandList[0].set(Op1); 4811 if (N->OperandList[1] != Op2) 4812 N->OperandList[1].set(Op2); 4813 4814 // If this gets put into a CSE map, add it. 4815 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4816 return N; 4817} 4818 4819SDNode *SelectionDAG:: 4820UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4821 SDValue Ops[] = { Op1, Op2, Op3 }; 4822 return UpdateNodeOperands(N, Ops, 3); 4823} 4824 4825SDNode *SelectionDAG:: 4826UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4827 SDValue Op3, SDValue Op4) { 4828 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4829 return UpdateNodeOperands(N, Ops, 4); 4830} 4831 4832SDNode *SelectionDAG:: 4833UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4834 SDValue Op3, SDValue Op4, SDValue Op5) { 4835 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4836 return UpdateNodeOperands(N, Ops, 5); 4837} 4838 4839SDNode *SelectionDAG:: 4840UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4841 assert(N->getNumOperands() == NumOps && 4842 "Update with wrong number of operands"); 4843 4844 // Check to see if there is no change. 4845 bool AnyChange = false; 4846 for (unsigned i = 0; i != NumOps; ++i) { 4847 if (Ops[i] != N->getOperand(i)) { 4848 AnyChange = true; 4849 break; 4850 } 4851 } 4852 4853 // No operands changed, just return the input node. 4854 if (!AnyChange) return N; 4855 4856 // See if the modified node already exists. 4857 void *InsertPos = 0; 4858 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4859 return Existing; 4860 4861 // Nope it doesn't. Remove the node from its current place in the maps. 4862 if (InsertPos) 4863 if (!RemoveNodeFromCSEMaps(N)) 4864 InsertPos = 0; 4865 4866 // Now we update the operands. 4867 for (unsigned i = 0; i != NumOps; ++i) 4868 if (N->OperandList[i] != Ops[i]) 4869 N->OperandList[i].set(Ops[i]); 4870 4871 // If this gets put into a CSE map, add it. 4872 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4873 return N; 4874} 4875 4876/// DropOperands - Release the operands and set this node to have 4877/// zero operands. 4878void SDNode::DropOperands() { 4879 // Unlike the code in MorphNodeTo that does this, we don't need to 4880 // watch for dead nodes here. 4881 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4882 SDUse &Use = *I++; 4883 Use.set(SDValue()); 4884 } 4885} 4886 4887/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4888/// machine opcode. 4889/// 4890SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4891 EVT VT) { 4892 SDVTList VTs = getVTList(VT); 4893 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4894} 4895 4896SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4897 EVT VT, SDValue Op1) { 4898 SDVTList VTs = getVTList(VT); 4899 SDValue Ops[] = { Op1 }; 4900 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4901} 4902 4903SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4904 EVT VT, SDValue Op1, 4905 SDValue Op2) { 4906 SDVTList VTs = getVTList(VT); 4907 SDValue Ops[] = { Op1, Op2 }; 4908 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4909} 4910 4911SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4912 EVT VT, SDValue Op1, 4913 SDValue Op2, SDValue Op3) { 4914 SDVTList VTs = getVTList(VT); 4915 SDValue Ops[] = { Op1, Op2, Op3 }; 4916 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4917} 4918 4919SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4920 EVT VT, const SDValue *Ops, 4921 unsigned NumOps) { 4922 SDVTList VTs = getVTList(VT); 4923 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4924} 4925 4926SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4927 EVT VT1, EVT VT2, const SDValue *Ops, 4928 unsigned NumOps) { 4929 SDVTList VTs = getVTList(VT1, VT2); 4930 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4931} 4932 4933SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4934 EVT VT1, EVT VT2) { 4935 SDVTList VTs = getVTList(VT1, VT2); 4936 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4937} 4938 4939SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4940 EVT VT1, EVT VT2, EVT VT3, 4941 const SDValue *Ops, unsigned NumOps) { 4942 SDVTList VTs = getVTList(VT1, VT2, VT3); 4943 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4944} 4945 4946SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4947 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4948 const SDValue *Ops, unsigned NumOps) { 4949 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4950 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4951} 4952 4953SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4954 EVT VT1, EVT VT2, 4955 SDValue Op1) { 4956 SDVTList VTs = getVTList(VT1, VT2); 4957 SDValue Ops[] = { Op1 }; 4958 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4959} 4960 4961SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4962 EVT VT1, EVT VT2, 4963 SDValue Op1, SDValue Op2) { 4964 SDVTList VTs = getVTList(VT1, VT2); 4965 SDValue Ops[] = { Op1, Op2 }; 4966 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4967} 4968 4969SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4970 EVT VT1, EVT VT2, 4971 SDValue Op1, SDValue Op2, 4972 SDValue Op3) { 4973 SDVTList VTs = getVTList(VT1, VT2); 4974 SDValue Ops[] = { Op1, Op2, Op3 }; 4975 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4976} 4977 4978SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4979 EVT VT1, EVT VT2, EVT VT3, 4980 SDValue Op1, SDValue Op2, 4981 SDValue Op3) { 4982 SDVTList VTs = getVTList(VT1, VT2, VT3); 4983 SDValue Ops[] = { Op1, Op2, Op3 }; 4984 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4985} 4986 4987SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4988 SDVTList VTs, const SDValue *Ops, 4989 unsigned NumOps) { 4990 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4991 // Reset the NodeID to -1. 4992 N->setNodeId(-1); 4993 return N; 4994} 4995 4996/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 4997/// the line number information on the merged node since it is not possible to 4998/// preserve the information that operation is associated with multiple lines. 4999/// This will make the debugger working better at -O0, were there is a higher 5000/// probability having other instructions associated with that line. 5001/// 5002SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 5003 DebugLoc NLoc = N->getDebugLoc(); 5004 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 5005 N->setDebugLoc(DebugLoc()); 5006 } 5007 return N; 5008} 5009 5010/// MorphNodeTo - This *mutates* the specified node to have the specified 5011/// return type, opcode, and operands. 5012/// 5013/// Note that MorphNodeTo returns the resultant node. If there is already a 5014/// node of the specified opcode and operands, it returns that node instead of 5015/// the current one. Note that the DebugLoc need not be the same. 5016/// 5017/// Using MorphNodeTo is faster than creating a new node and swapping it in 5018/// with ReplaceAllUsesWith both because it often avoids allocating a new 5019/// node, and because it doesn't require CSE recalculation for any of 5020/// the node's users. 5021/// 5022SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5023 SDVTList VTs, const SDValue *Ops, 5024 unsigned NumOps) { 5025 // If an identical node already exists, use it. 5026 void *IP = 0; 5027 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5028 FoldingSetNodeID ID; 5029 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5030 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5031 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 5032 } 5033 5034 if (!RemoveNodeFromCSEMaps(N)) 5035 IP = 0; 5036 5037 // Start the morphing. 5038 N->NodeType = Opc; 5039 N->ValueList = VTs.VTs; 5040 N->NumValues = VTs.NumVTs; 5041 5042 // Clear the operands list, updating used nodes to remove this from their 5043 // use list. Keep track of any operands that become dead as a result. 5044 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5045 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5046 SDUse &Use = *I++; 5047 SDNode *Used = Use.getNode(); 5048 Use.set(SDValue()); 5049 if (Used->use_empty()) 5050 DeadNodeSet.insert(Used); 5051 } 5052 5053 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5054 // Initialize the memory references information. 5055 MN->setMemRefs(0, 0); 5056 // If NumOps is larger than the # of operands we can have in a 5057 // MachineSDNode, reallocate the operand list. 5058 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5059 if (MN->OperandsNeedDelete) 5060 delete[] MN->OperandList; 5061 if (NumOps > array_lengthof(MN->LocalOperands)) 5062 // We're creating a final node that will live unmorphed for the 5063 // remainder of the current SelectionDAG iteration, so we can allocate 5064 // the operands directly out of a pool with no recycling metadata. 5065 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5066 Ops, NumOps); 5067 else 5068 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5069 MN->OperandsNeedDelete = false; 5070 } else 5071 MN->InitOperands(MN->OperandList, Ops, NumOps); 5072 } else { 5073 // If NumOps is larger than the # of operands we currently have, reallocate 5074 // the operand list. 5075 if (NumOps > N->NumOperands) { 5076 if (N->OperandsNeedDelete) 5077 delete[] N->OperandList; 5078 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5079 N->OperandsNeedDelete = true; 5080 } else 5081 N->InitOperands(N->OperandList, Ops, NumOps); 5082 } 5083 5084 // Delete any nodes that are still dead after adding the uses for the 5085 // new operands. 5086 if (!DeadNodeSet.empty()) { 5087 SmallVector<SDNode *, 16> DeadNodes; 5088 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5089 E = DeadNodeSet.end(); I != E; ++I) 5090 if ((*I)->use_empty()) 5091 DeadNodes.push_back(*I); 5092 RemoveDeadNodes(DeadNodes); 5093 } 5094 5095 if (IP) 5096 CSEMap.InsertNode(N, IP); // Memoize the new node. 5097 return N; 5098} 5099 5100 5101/// getMachineNode - These are used for target selectors to create a new node 5102/// with specified return type(s), MachineInstr opcode, and operands. 5103/// 5104/// Note that getMachineNode returns the resultant node. If there is already a 5105/// node of the specified opcode and operands, it returns that node instead of 5106/// the current one. 5107MachineSDNode * 5108SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5109 SDVTList VTs = getVTList(VT); 5110 return getMachineNode(Opcode, dl, VTs, 0, 0); 5111} 5112 5113MachineSDNode * 5114SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5115 SDVTList VTs = getVTList(VT); 5116 SDValue Ops[] = { Op1 }; 5117 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5118} 5119 5120MachineSDNode * 5121SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5122 SDValue Op1, SDValue Op2) { 5123 SDVTList VTs = getVTList(VT); 5124 SDValue Ops[] = { Op1, Op2 }; 5125 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5126} 5127 5128MachineSDNode * 5129SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5130 SDValue Op1, SDValue Op2, SDValue Op3) { 5131 SDVTList VTs = getVTList(VT); 5132 SDValue Ops[] = { Op1, Op2, Op3 }; 5133 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5134} 5135 5136MachineSDNode * 5137SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5138 const SDValue *Ops, unsigned NumOps) { 5139 SDVTList VTs = getVTList(VT); 5140 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5141} 5142 5143MachineSDNode * 5144SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5145 SDVTList VTs = getVTList(VT1, VT2); 5146 return getMachineNode(Opcode, dl, VTs, 0, 0); 5147} 5148 5149MachineSDNode * 5150SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5151 EVT VT1, EVT VT2, SDValue Op1) { 5152 SDVTList VTs = getVTList(VT1, VT2); 5153 SDValue Ops[] = { Op1 }; 5154 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5155} 5156 5157MachineSDNode * 5158SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5159 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5160 SDVTList VTs = getVTList(VT1, VT2); 5161 SDValue Ops[] = { Op1, Op2 }; 5162 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5163} 5164 5165MachineSDNode * 5166SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5167 EVT VT1, EVT VT2, SDValue Op1, 5168 SDValue Op2, SDValue Op3) { 5169 SDVTList VTs = getVTList(VT1, VT2); 5170 SDValue Ops[] = { Op1, Op2, Op3 }; 5171 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5172} 5173 5174MachineSDNode * 5175SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5176 EVT VT1, EVT VT2, 5177 const SDValue *Ops, unsigned NumOps) { 5178 SDVTList VTs = getVTList(VT1, VT2); 5179 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5180} 5181 5182MachineSDNode * 5183SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5184 EVT VT1, EVT VT2, EVT VT3, 5185 SDValue Op1, SDValue Op2) { 5186 SDVTList VTs = getVTList(VT1, VT2, VT3); 5187 SDValue Ops[] = { Op1, Op2 }; 5188 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5189} 5190 5191MachineSDNode * 5192SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5193 EVT VT1, EVT VT2, EVT VT3, 5194 SDValue Op1, SDValue Op2, SDValue Op3) { 5195 SDVTList VTs = getVTList(VT1, VT2, VT3); 5196 SDValue Ops[] = { Op1, Op2, Op3 }; 5197 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5198} 5199 5200MachineSDNode * 5201SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5202 EVT VT1, EVT VT2, EVT VT3, 5203 const SDValue *Ops, unsigned NumOps) { 5204 SDVTList VTs = getVTList(VT1, VT2, VT3); 5205 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5206} 5207 5208MachineSDNode * 5209SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5210 EVT VT2, EVT VT3, EVT VT4, 5211 const SDValue *Ops, unsigned NumOps) { 5212 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5213 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5214} 5215 5216MachineSDNode * 5217SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5218 const std::vector<EVT> &ResultTys, 5219 const SDValue *Ops, unsigned NumOps) { 5220 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5221 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5222} 5223 5224MachineSDNode * 5225SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5226 const SDValue *Ops, unsigned NumOps) { 5227 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5228 MachineSDNode *N; 5229 void *IP = 0; 5230 5231 if (DoCSE) { 5232 FoldingSetNodeID ID; 5233 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5234 IP = 0; 5235 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5236 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5237 } 5238 } 5239 5240 // Allocate a new MachineSDNode. 5241 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5242 5243 // Initialize the operands list. 5244 if (NumOps > array_lengthof(N->LocalOperands)) 5245 // We're creating a final node that will live unmorphed for the 5246 // remainder of the current SelectionDAG iteration, so we can allocate 5247 // the operands directly out of a pool with no recycling metadata. 5248 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5249 Ops, NumOps); 5250 else 5251 N->InitOperands(N->LocalOperands, Ops, NumOps); 5252 N->OperandsNeedDelete = false; 5253 5254 if (DoCSE) 5255 CSEMap.InsertNode(N, IP); 5256 5257 AllNodes.push_back(N); 5258#ifndef NDEBUG 5259 VerifyMachineNode(N); 5260#endif 5261 return N; 5262} 5263 5264/// getTargetExtractSubreg - A convenience function for creating 5265/// TargetOpcode::EXTRACT_SUBREG nodes. 5266SDValue 5267SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5268 SDValue Operand) { 5269 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5270 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5271 VT, Operand, SRIdxVal); 5272 return SDValue(Subreg, 0); 5273} 5274 5275/// getTargetInsertSubreg - A convenience function for creating 5276/// TargetOpcode::INSERT_SUBREG nodes. 5277SDValue 5278SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5279 SDValue Operand, SDValue Subreg) { 5280 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5281 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5282 VT, Operand, Subreg, SRIdxVal); 5283 return SDValue(Result, 0); 5284} 5285 5286/// getNodeIfExists - Get the specified node if it's already available, or 5287/// else return NULL. 5288SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5289 const SDValue *Ops, unsigned NumOps) { 5290 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5291 FoldingSetNodeID ID; 5292 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5293 void *IP = 0; 5294 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5295 return E; 5296 } 5297 return NULL; 5298} 5299 5300/// getDbgValue - Creates a SDDbgValue node. 5301/// 5302SDDbgValue * 5303SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5304 DebugLoc DL, unsigned O) { 5305 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5306} 5307 5308SDDbgValue * 5309SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5310 DebugLoc DL, unsigned O) { 5311 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5312} 5313 5314SDDbgValue * 5315SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5316 DebugLoc DL, unsigned O) { 5317 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5318} 5319 5320namespace { 5321 5322/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5323/// pointed to by a use iterator is deleted, increment the use iterator 5324/// so that it doesn't dangle. 5325/// 5326class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5327 SDNode::use_iterator &UI; 5328 SDNode::use_iterator &UE; 5329 5330 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5331 // Increment the iterator as needed. 5332 while (UI != UE && N == *UI) 5333 ++UI; 5334 } 5335 5336public: 5337 RAUWUpdateListener(SelectionDAG &d, 5338 SDNode::use_iterator &ui, 5339 SDNode::use_iterator &ue) 5340 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5341}; 5342 5343} 5344 5345/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5346/// This can cause recursive merging of nodes in the DAG. 5347/// 5348/// This version assumes From has a single result value. 5349/// 5350void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5351 SDNode *From = FromN.getNode(); 5352 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5353 "Cannot replace with this method!"); 5354 assert(From != To.getNode() && "Cannot replace uses of with self"); 5355 5356 // Iterate over all the existing uses of From. New uses will be added 5357 // to the beginning of the use list, which we avoid visiting. 5358 // This specifically avoids visiting uses of From that arise while the 5359 // replacement is happening, because any such uses would be the result 5360 // of CSE: If an existing node looks like From after one of its operands 5361 // is replaced by To, we don't want to replace of all its users with To 5362 // too. See PR3018 for more info. 5363 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5364 RAUWUpdateListener Listener(*this, UI, UE); 5365 while (UI != UE) { 5366 SDNode *User = *UI; 5367 5368 // This node is about to morph, remove its old self from the CSE maps. 5369 RemoveNodeFromCSEMaps(User); 5370 5371 // A user can appear in a use list multiple times, and when this 5372 // happens the uses are usually next to each other in the list. 5373 // To help reduce the number of CSE recomputations, process all 5374 // the uses of this user that we can find this way. 5375 do { 5376 SDUse &Use = UI.getUse(); 5377 ++UI; 5378 Use.set(To); 5379 } while (UI != UE && *UI == User); 5380 5381 // Now that we have modified User, add it back to the CSE maps. If it 5382 // already exists there, recursively merge the results together. 5383 AddModifiedNodeToCSEMaps(User); 5384 } 5385 5386 // If we just RAUW'd the root, take note. 5387 if (FromN == getRoot()) 5388 setRoot(To); 5389} 5390 5391/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5392/// This can cause recursive merging of nodes in the DAG. 5393/// 5394/// This version assumes that for each value of From, there is a 5395/// corresponding value in To in the same position with the same type. 5396/// 5397void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5398#ifndef NDEBUG 5399 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5400 assert((!From->hasAnyUseOfValue(i) || 5401 From->getValueType(i) == To->getValueType(i)) && 5402 "Cannot use this version of ReplaceAllUsesWith!"); 5403#endif 5404 5405 // Handle the trivial case. 5406 if (From == To) 5407 return; 5408 5409 // Iterate over just the existing users of From. See the comments in 5410 // the ReplaceAllUsesWith above. 5411 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5412 RAUWUpdateListener Listener(*this, UI, UE); 5413 while (UI != UE) { 5414 SDNode *User = *UI; 5415 5416 // This node is about to morph, remove its old self from the CSE maps. 5417 RemoveNodeFromCSEMaps(User); 5418 5419 // A user can appear in a use list multiple times, and when this 5420 // happens the uses are usually next to each other in the list. 5421 // To help reduce the number of CSE recomputations, process all 5422 // the uses of this user that we can find this way. 5423 do { 5424 SDUse &Use = UI.getUse(); 5425 ++UI; 5426 Use.setNode(To); 5427 } while (UI != UE && *UI == User); 5428 5429 // Now that we have modified User, add it back to the CSE maps. If it 5430 // already exists there, recursively merge the results together. 5431 AddModifiedNodeToCSEMaps(User); 5432 } 5433 5434 // If we just RAUW'd the root, take note. 5435 if (From == getRoot().getNode()) 5436 setRoot(SDValue(To, getRoot().getResNo())); 5437} 5438 5439/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5440/// This can cause recursive merging of nodes in the DAG. 5441/// 5442/// This version can replace From with any result values. To must match the 5443/// number and types of values returned by From. 5444void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5445 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5446 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5447 5448 // Iterate over just the existing users of From. See the comments in 5449 // the ReplaceAllUsesWith above. 5450 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5451 RAUWUpdateListener Listener(*this, UI, UE); 5452 while (UI != UE) { 5453 SDNode *User = *UI; 5454 5455 // This node is about to morph, remove its old self from the CSE maps. 5456 RemoveNodeFromCSEMaps(User); 5457 5458 // A user can appear in a use list multiple times, and when this 5459 // happens the uses are usually next to each other in the list. 5460 // To help reduce the number of CSE recomputations, process all 5461 // the uses of this user that we can find this way. 5462 do { 5463 SDUse &Use = UI.getUse(); 5464 const SDValue &ToOp = To[Use.getResNo()]; 5465 ++UI; 5466 Use.set(ToOp); 5467 } while (UI != UE && *UI == User); 5468 5469 // Now that we have modified User, add it back to the CSE maps. If it 5470 // already exists there, recursively merge the results together. 5471 AddModifiedNodeToCSEMaps(User); 5472 } 5473 5474 // If we just RAUW'd the root, take note. 5475 if (From == getRoot().getNode()) 5476 setRoot(SDValue(To[getRoot().getResNo()])); 5477} 5478 5479/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5480/// uses of other values produced by From.getNode() alone. The Deleted 5481/// vector is handled the same way as for ReplaceAllUsesWith. 5482void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5483 // Handle the really simple, really trivial case efficiently. 5484 if (From == To) return; 5485 5486 // Handle the simple, trivial, case efficiently. 5487 if (From.getNode()->getNumValues() == 1) { 5488 ReplaceAllUsesWith(From, To); 5489 return; 5490 } 5491 5492 // Iterate over just the existing users of From. See the comments in 5493 // the ReplaceAllUsesWith above. 5494 SDNode::use_iterator UI = From.getNode()->use_begin(), 5495 UE = From.getNode()->use_end(); 5496 RAUWUpdateListener Listener(*this, UI, UE); 5497 while (UI != UE) { 5498 SDNode *User = *UI; 5499 bool UserRemovedFromCSEMaps = false; 5500 5501 // A user can appear in a use list multiple times, and when this 5502 // happens the uses are usually next to each other in the list. 5503 // To help reduce the number of CSE recomputations, process all 5504 // the uses of this user that we can find this way. 5505 do { 5506 SDUse &Use = UI.getUse(); 5507 5508 // Skip uses of different values from the same node. 5509 if (Use.getResNo() != From.getResNo()) { 5510 ++UI; 5511 continue; 5512 } 5513 5514 // If this node hasn't been modified yet, it's still in the CSE maps, 5515 // so remove its old self from the CSE maps. 5516 if (!UserRemovedFromCSEMaps) { 5517 RemoveNodeFromCSEMaps(User); 5518 UserRemovedFromCSEMaps = true; 5519 } 5520 5521 ++UI; 5522 Use.set(To); 5523 } while (UI != UE && *UI == User); 5524 5525 // We are iterating over all uses of the From node, so if a use 5526 // doesn't use the specific value, no changes are made. 5527 if (!UserRemovedFromCSEMaps) 5528 continue; 5529 5530 // Now that we have modified User, add it back to the CSE maps. If it 5531 // already exists there, recursively merge the results together. 5532 AddModifiedNodeToCSEMaps(User); 5533 } 5534 5535 // If we just RAUW'd the root, take note. 5536 if (From == getRoot()) 5537 setRoot(To); 5538} 5539 5540namespace { 5541 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5542 /// to record information about a use. 5543 struct UseMemo { 5544 SDNode *User; 5545 unsigned Index; 5546 SDUse *Use; 5547 }; 5548 5549 /// operator< - Sort Memos by User. 5550 bool operator<(const UseMemo &L, const UseMemo &R) { 5551 return (intptr_t)L.User < (intptr_t)R.User; 5552 } 5553} 5554 5555/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5556/// uses of other values produced by From.getNode() alone. The same value 5557/// may appear in both the From and To list. The Deleted vector is 5558/// handled the same way as for ReplaceAllUsesWith. 5559void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5560 const SDValue *To, 5561 unsigned Num){ 5562 // Handle the simple, trivial case efficiently. 5563 if (Num == 1) 5564 return ReplaceAllUsesOfValueWith(*From, *To); 5565 5566 // Read up all the uses and make records of them. This helps 5567 // processing new uses that are introduced during the 5568 // replacement process. 5569 SmallVector<UseMemo, 4> Uses; 5570 for (unsigned i = 0; i != Num; ++i) { 5571 unsigned FromResNo = From[i].getResNo(); 5572 SDNode *FromNode = From[i].getNode(); 5573 for (SDNode::use_iterator UI = FromNode->use_begin(), 5574 E = FromNode->use_end(); UI != E; ++UI) { 5575 SDUse &Use = UI.getUse(); 5576 if (Use.getResNo() == FromResNo) { 5577 UseMemo Memo = { *UI, i, &Use }; 5578 Uses.push_back(Memo); 5579 } 5580 } 5581 } 5582 5583 // Sort the uses, so that all the uses from a given User are together. 5584 std::sort(Uses.begin(), Uses.end()); 5585 5586 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5587 UseIndex != UseIndexEnd; ) { 5588 // We know that this user uses some value of From. If it is the right 5589 // value, update it. 5590 SDNode *User = Uses[UseIndex].User; 5591 5592 // This node is about to morph, remove its old self from the CSE maps. 5593 RemoveNodeFromCSEMaps(User); 5594 5595 // The Uses array is sorted, so all the uses for a given User 5596 // are next to each other in the list. 5597 // To help reduce the number of CSE recomputations, process all 5598 // the uses of this user that we can find this way. 5599 do { 5600 unsigned i = Uses[UseIndex].Index; 5601 SDUse &Use = *Uses[UseIndex].Use; 5602 ++UseIndex; 5603 5604 Use.set(To[i]); 5605 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5606 5607 // Now that we have modified User, add it back to the CSE maps. If it 5608 // already exists there, recursively merge the results together. 5609 AddModifiedNodeToCSEMaps(User); 5610 } 5611} 5612 5613/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5614/// based on their topological order. It returns the maximum id and a vector 5615/// of the SDNodes* in assigned order by reference. 5616unsigned SelectionDAG::AssignTopologicalOrder() { 5617 5618 unsigned DAGSize = 0; 5619 5620 // SortedPos tracks the progress of the algorithm. Nodes before it are 5621 // sorted, nodes after it are unsorted. When the algorithm completes 5622 // it is at the end of the list. 5623 allnodes_iterator SortedPos = allnodes_begin(); 5624 5625 // Visit all the nodes. Move nodes with no operands to the front of 5626 // the list immediately. Annotate nodes that do have operands with their 5627 // operand count. Before we do this, the Node Id fields of the nodes 5628 // may contain arbitrary values. After, the Node Id fields for nodes 5629 // before SortedPos will contain the topological sort index, and the 5630 // Node Id fields for nodes At SortedPos and after will contain the 5631 // count of outstanding operands. 5632 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5633 SDNode *N = I++; 5634 checkForCycles(N); 5635 unsigned Degree = N->getNumOperands(); 5636 if (Degree == 0) { 5637 // A node with no uses, add it to the result array immediately. 5638 N->setNodeId(DAGSize++); 5639 allnodes_iterator Q = N; 5640 if (Q != SortedPos) 5641 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5642 assert(SortedPos != AllNodes.end() && "Overran node list"); 5643 ++SortedPos; 5644 } else { 5645 // Temporarily use the Node Id as scratch space for the degree count. 5646 N->setNodeId(Degree); 5647 } 5648 } 5649 5650 // Visit all the nodes. As we iterate, move nodes into sorted order, 5651 // such that by the time the end is reached all nodes will be sorted. 5652 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5653 SDNode *N = I; 5654 checkForCycles(N); 5655 // N is in sorted position, so all its uses have one less operand 5656 // that needs to be sorted. 5657 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5658 UI != UE; ++UI) { 5659 SDNode *P = *UI; 5660 unsigned Degree = P->getNodeId(); 5661 assert(Degree != 0 && "Invalid node degree"); 5662 --Degree; 5663 if (Degree == 0) { 5664 // All of P's operands are sorted, so P may sorted now. 5665 P->setNodeId(DAGSize++); 5666 if (P != SortedPos) 5667 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5668 assert(SortedPos != AllNodes.end() && "Overran node list"); 5669 ++SortedPos; 5670 } else { 5671 // Update P's outstanding operand count. 5672 P->setNodeId(Degree); 5673 } 5674 } 5675 if (I == SortedPos) { 5676#ifndef NDEBUG 5677 SDNode *S = ++I; 5678 dbgs() << "Overran sorted position:\n"; 5679 S->dumprFull(); 5680#endif 5681 llvm_unreachable(0); 5682 } 5683 } 5684 5685 assert(SortedPos == AllNodes.end() && 5686 "Topological sort incomplete!"); 5687 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5688 "First node in topological sort is not the entry token!"); 5689 assert(AllNodes.front().getNodeId() == 0 && 5690 "First node in topological sort has non-zero id!"); 5691 assert(AllNodes.front().getNumOperands() == 0 && 5692 "First node in topological sort has operands!"); 5693 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5694 "Last node in topologic sort has unexpected id!"); 5695 assert(AllNodes.back().use_empty() && 5696 "Last node in topologic sort has users!"); 5697 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5698 return DAGSize; 5699} 5700 5701/// AssignOrdering - Assign an order to the SDNode. 5702void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5703 assert(SD && "Trying to assign an order to a null node!"); 5704 Ordering->add(SD, Order); 5705} 5706 5707/// GetOrdering - Get the order for the SDNode. 5708unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5709 assert(SD && "Trying to get the order of a null node!"); 5710 return Ordering->getOrder(SD); 5711} 5712 5713/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5714/// value is produced by SD. 5715void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5716 DbgInfo->add(DB, SD, isParameter); 5717 if (SD) 5718 SD->setHasDebugValue(true); 5719} 5720 5721/// TransferDbgValues - Transfer SDDbgValues. 5722void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5723 if (From == To || !From.getNode()->getHasDebugValue()) 5724 return; 5725 SDNode *FromNode = From.getNode(); 5726 SDNode *ToNode = To.getNode(); 5727 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5728 SmallVector<SDDbgValue *, 2> ClonedDVs; 5729 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5730 I != E; ++I) { 5731 SDDbgValue *Dbg = *I; 5732 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5733 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5734 Dbg->getOffset(), Dbg->getDebugLoc(), 5735 Dbg->getOrder()); 5736 ClonedDVs.push_back(Clone); 5737 } 5738 } 5739 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5740 E = ClonedDVs.end(); I != E; ++I) 5741 AddDbgValue(*I, ToNode, false); 5742} 5743 5744//===----------------------------------------------------------------------===// 5745// SDNode Class 5746//===----------------------------------------------------------------------===// 5747 5748HandleSDNode::~HandleSDNode() { 5749 DropOperands(); 5750} 5751 5752GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5753 const GlobalValue *GA, 5754 EVT VT, int64_t o, unsigned char TF) 5755 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5756 TheGlobal = GA; 5757} 5758 5759MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5760 MachineMemOperand *mmo) 5761 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5762 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5763 MMO->isNonTemporal(), MMO->isInvariant()); 5764 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5765 assert(isNonTemporal() == MMO->isNonTemporal() && 5766 "Non-temporal encoding error!"); 5767 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5768} 5769 5770MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5771 const SDValue *Ops, unsigned NumOps, EVT memvt, 5772 MachineMemOperand *mmo) 5773 : SDNode(Opc, dl, VTs, Ops, NumOps), 5774 MemoryVT(memvt), MMO(mmo) { 5775 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5776 MMO->isNonTemporal(), MMO->isInvariant()); 5777 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5778 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5779} 5780 5781/// Profile - Gather unique data for the node. 5782/// 5783void SDNode::Profile(FoldingSetNodeID &ID) const { 5784 AddNodeIDNode(ID, this); 5785} 5786 5787namespace { 5788 struct EVTArray { 5789 std::vector<EVT> VTs; 5790 5791 EVTArray() { 5792 VTs.reserve(MVT::LAST_VALUETYPE); 5793 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5794 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5795 } 5796 }; 5797} 5798 5799static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5800static ManagedStatic<EVTArray> SimpleVTArray; 5801static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5802 5803/// getValueTypeList - Return a pointer to the specified value type. 5804/// 5805const EVT *SDNode::getValueTypeList(EVT VT) { 5806 if (VT.isExtended()) { 5807 sys::SmartScopedLock<true> Lock(*VTMutex); 5808 return &(*EVTs->insert(VT).first); 5809 } else { 5810 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5811 "Value type out of range!"); 5812 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5813 } 5814} 5815 5816/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5817/// indicated value. This method ignores uses of other values defined by this 5818/// operation. 5819bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5820 assert(Value < getNumValues() && "Bad value!"); 5821 5822 // TODO: Only iterate over uses of a given value of the node 5823 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5824 if (UI.getUse().getResNo() == Value) { 5825 if (NUses == 0) 5826 return false; 5827 --NUses; 5828 } 5829 } 5830 5831 // Found exactly the right number of uses? 5832 return NUses == 0; 5833} 5834 5835 5836/// hasAnyUseOfValue - Return true if there are any use of the indicated 5837/// value. This method ignores uses of other values defined by this operation. 5838bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5839 assert(Value < getNumValues() && "Bad value!"); 5840 5841 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5842 if (UI.getUse().getResNo() == Value) 5843 return true; 5844 5845 return false; 5846} 5847 5848 5849/// isOnlyUserOf - Return true if this node is the only use of N. 5850/// 5851bool SDNode::isOnlyUserOf(SDNode *N) const { 5852 bool Seen = false; 5853 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5854 SDNode *User = *I; 5855 if (User == this) 5856 Seen = true; 5857 else 5858 return false; 5859 } 5860 5861 return Seen; 5862} 5863 5864/// isOperand - Return true if this node is an operand of N. 5865/// 5866bool SDValue::isOperandOf(SDNode *N) const { 5867 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5868 if (*this == N->getOperand(i)) 5869 return true; 5870 return false; 5871} 5872 5873bool SDNode::isOperandOf(SDNode *N) const { 5874 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5875 if (this == N->OperandList[i].getNode()) 5876 return true; 5877 return false; 5878} 5879 5880/// reachesChainWithoutSideEffects - Return true if this operand (which must 5881/// be a chain) reaches the specified operand without crossing any 5882/// side-effecting instructions on any chain path. In practice, this looks 5883/// through token factors and non-volatile loads. In order to remain efficient, 5884/// this only looks a couple of nodes in, it does not do an exhaustive search. 5885bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5886 unsigned Depth) const { 5887 if (*this == Dest) return true; 5888 5889 // Don't search too deeply, we just want to be able to see through 5890 // TokenFactor's etc. 5891 if (Depth == 0) return false; 5892 5893 // If this is a token factor, all inputs to the TF happen in parallel. If any 5894 // of the operands of the TF does not reach dest, then we cannot do the xform. 5895 if (getOpcode() == ISD::TokenFactor) { 5896 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5897 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5898 return false; 5899 return true; 5900 } 5901 5902 // Loads don't have side effects, look through them. 5903 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5904 if (!Ld->isVolatile()) 5905 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5906 } 5907 return false; 5908} 5909 5910/// hasPredecessor - Return true if N is a predecessor of this node. 5911/// N is either an operand of this node, or can be reached by recursively 5912/// traversing up the operands. 5913/// NOTE: This is an expensive method. Use it carefully. 5914bool SDNode::hasPredecessor(const SDNode *N) const { 5915 SmallPtrSet<const SDNode *, 32> Visited; 5916 SmallVector<const SDNode *, 16> Worklist; 5917 return hasPredecessorHelper(N, Visited, Worklist); 5918} 5919 5920bool SDNode::hasPredecessorHelper(const SDNode *N, 5921 SmallPtrSet<const SDNode *, 32> &Visited, 5922 SmallVector<const SDNode *, 16> &Worklist) const { 5923 if (Visited.empty()) { 5924 Worklist.push_back(this); 5925 } else { 5926 // Take a look in the visited set. If we've already encountered this node 5927 // we needn't search further. 5928 if (Visited.count(N)) 5929 return true; 5930 } 5931 5932 // Haven't visited N yet. Continue the search. 5933 while (!Worklist.empty()) { 5934 const SDNode *M = Worklist.pop_back_val(); 5935 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5936 SDNode *Op = M->getOperand(i).getNode(); 5937 if (Visited.insert(Op)) 5938 Worklist.push_back(Op); 5939 if (Op == N) 5940 return true; 5941 } 5942 } 5943 5944 return false; 5945} 5946 5947uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5948 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5949 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5950} 5951 5952SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 5953 assert(N->getNumValues() == 1 && 5954 "Can't unroll a vector with multiple results!"); 5955 5956 EVT VT = N->getValueType(0); 5957 unsigned NE = VT.getVectorNumElements(); 5958 EVT EltVT = VT.getVectorElementType(); 5959 DebugLoc dl = N->getDebugLoc(); 5960 5961 SmallVector<SDValue, 8> Scalars; 5962 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 5963 5964 // If ResNE is 0, fully unroll the vector op. 5965 if (ResNE == 0) 5966 ResNE = NE; 5967 else if (NE > ResNE) 5968 NE = ResNE; 5969 5970 unsigned i; 5971 for (i= 0; i != NE; ++i) { 5972 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 5973 SDValue Operand = N->getOperand(j); 5974 EVT OperandVT = Operand.getValueType(); 5975 if (OperandVT.isVector()) { 5976 // A vector operand; extract a single element. 5977 EVT OperandEltVT = OperandVT.getVectorElementType(); 5978 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 5979 OperandEltVT, 5980 Operand, 5981 getConstant(i, TLI.getPointerTy())); 5982 } else { 5983 // A scalar operand; just use it as is. 5984 Operands[j] = Operand; 5985 } 5986 } 5987 5988 switch (N->getOpcode()) { 5989 default: 5990 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 5991 &Operands[0], Operands.size())); 5992 break; 5993 case ISD::VSELECT: 5994 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 5995 &Operands[0], Operands.size())); 5996 break; 5997 case ISD::SHL: 5998 case ISD::SRA: 5999 case ISD::SRL: 6000 case ISD::ROTL: 6001 case ISD::ROTR: 6002 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6003 getShiftAmountOperand(Operands[0].getValueType(), 6004 Operands[1]))); 6005 break; 6006 case ISD::SIGN_EXTEND_INREG: 6007 case ISD::FP_ROUND_INREG: { 6008 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6009 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6010 Operands[0], 6011 getValueType(ExtVT))); 6012 } 6013 } 6014 } 6015 6016 for (; i < ResNE; ++i) 6017 Scalars.push_back(getUNDEF(EltVT)); 6018 6019 return getNode(ISD::BUILD_VECTOR, dl, 6020 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6021 &Scalars[0], Scalars.size()); 6022} 6023 6024 6025/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6026/// location that is 'Dist' units away from the location that the 'Base' load 6027/// is loading from. 6028bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6029 unsigned Bytes, int Dist) const { 6030 if (LD->getChain() != Base->getChain()) 6031 return false; 6032 EVT VT = LD->getValueType(0); 6033 if (VT.getSizeInBits() / 8 != Bytes) 6034 return false; 6035 6036 SDValue Loc = LD->getOperand(1); 6037 SDValue BaseLoc = Base->getOperand(1); 6038 if (Loc.getOpcode() == ISD::FrameIndex) { 6039 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6040 return false; 6041 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6042 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6043 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6044 int FS = MFI->getObjectSize(FI); 6045 int BFS = MFI->getObjectSize(BFI); 6046 if (FS != BFS || FS != (int)Bytes) return false; 6047 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6048 } 6049 6050 // Handle X+C 6051 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6052 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6053 return true; 6054 6055 const GlobalValue *GV1 = NULL; 6056 const GlobalValue *GV2 = NULL; 6057 int64_t Offset1 = 0; 6058 int64_t Offset2 = 0; 6059 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6060 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6061 if (isGA1 && isGA2 && GV1 == GV2) 6062 return Offset1 == (Offset2 + Dist*Bytes); 6063 return false; 6064} 6065 6066 6067/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6068/// it cannot be inferred. 6069unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6070 // If this is a GlobalAddress + cst, return the alignment. 6071 const GlobalValue *GV; 6072 int64_t GVOffset = 0; 6073 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6074 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6075 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6076 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6077 TLI.getTargetData()); 6078 unsigned AlignBits = KnownZero.countTrailingOnes(); 6079 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6080 if (Align) 6081 return MinAlign(Align, GVOffset); 6082 } 6083 6084 // If this is a direct reference to a stack slot, use information about the 6085 // stack slot's alignment. 6086 int FrameIdx = 1 << 31; 6087 int64_t FrameOffset = 0; 6088 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6089 FrameIdx = FI->getIndex(); 6090 } else if (isBaseWithConstantOffset(Ptr) && 6091 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6092 // Handle FI+Cst 6093 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6094 FrameOffset = Ptr.getConstantOperandVal(1); 6095 } 6096 6097 if (FrameIdx != (1 << 31)) { 6098 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6099 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6100 FrameOffset); 6101 return FIInfoAlign; 6102 } 6103 6104 return 0; 6105} 6106 6107// getAddressSpace - Return the address space this GlobalAddress belongs to. 6108unsigned GlobalAddressSDNode::getAddressSpace() const { 6109 return getGlobal()->getType()->getAddressSpace(); 6110} 6111 6112 6113Type *ConstantPoolSDNode::getType() const { 6114 if (isMachineConstantPoolEntry()) 6115 return Val.MachineCPVal->getType(); 6116 return Val.ConstVal->getType(); 6117} 6118 6119bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6120 APInt &SplatUndef, 6121 unsigned &SplatBitSize, 6122 bool &HasAnyUndefs, 6123 unsigned MinSplatBits, 6124 bool isBigEndian) { 6125 EVT VT = getValueType(0); 6126 assert(VT.isVector() && "Expected a vector type"); 6127 unsigned sz = VT.getSizeInBits(); 6128 if (MinSplatBits > sz) 6129 return false; 6130 6131 SplatValue = APInt(sz, 0); 6132 SplatUndef = APInt(sz, 0); 6133 6134 // Get the bits. Bits with undefined values (when the corresponding element 6135 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6136 // in SplatValue. If any of the values are not constant, give up and return 6137 // false. 6138 unsigned int nOps = getNumOperands(); 6139 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6140 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6141 6142 for (unsigned j = 0; j < nOps; ++j) { 6143 unsigned i = isBigEndian ? nOps-1-j : j; 6144 SDValue OpVal = getOperand(i); 6145 unsigned BitPos = j * EltBitSize; 6146 6147 if (OpVal.getOpcode() == ISD::UNDEF) 6148 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6149 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6150 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6151 zextOrTrunc(sz) << BitPos; 6152 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6153 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6154 else 6155 return false; 6156 } 6157 6158 // The build_vector is all constants or undefs. Find the smallest element 6159 // size that splats the vector. 6160 6161 HasAnyUndefs = (SplatUndef != 0); 6162 while (sz > 8) { 6163 6164 unsigned HalfSize = sz / 2; 6165 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6166 APInt LowValue = SplatValue.trunc(HalfSize); 6167 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6168 APInt LowUndef = SplatUndef.trunc(HalfSize); 6169 6170 // If the two halves do not match (ignoring undef bits), stop here. 6171 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6172 MinSplatBits > HalfSize) 6173 break; 6174 6175 SplatValue = HighValue | LowValue; 6176 SplatUndef = HighUndef & LowUndef; 6177 6178 sz = HalfSize; 6179 } 6180 6181 SplatBitSize = sz; 6182 return true; 6183} 6184 6185bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6186 // Find the first non-undef value in the shuffle mask. 6187 unsigned i, e; 6188 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6189 /* search */; 6190 6191 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6192 6193 // Make sure all remaining elements are either undef or the same as the first 6194 // non-undef value. 6195 for (int Idx = Mask[i]; i != e; ++i) 6196 if (Mask[i] >= 0 && Mask[i] != Idx) 6197 return false; 6198 return true; 6199} 6200 6201#ifdef XDEBUG 6202static void checkForCyclesHelper(const SDNode *N, 6203 SmallPtrSet<const SDNode*, 32> &Visited, 6204 SmallPtrSet<const SDNode*, 32> &Checked) { 6205 // If this node has already been checked, don't check it again. 6206 if (Checked.count(N)) 6207 return; 6208 6209 // If a node has already been visited on this depth-first walk, reject it as 6210 // a cycle. 6211 if (!Visited.insert(N)) { 6212 dbgs() << "Offending node:\n"; 6213 N->dumprFull(); 6214 errs() << "Detected cycle in SelectionDAG\n"; 6215 abort(); 6216 } 6217 6218 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6219 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6220 6221 Checked.insert(N); 6222 Visited.erase(N); 6223} 6224#endif 6225 6226void llvm::checkForCycles(const llvm::SDNode *N) { 6227#ifdef XDEBUG 6228 assert(N && "Checking nonexistant SDNode"); 6229 SmallPtrSet<const SDNode*, 32> visited; 6230 SmallPtrSet<const SDNode*, 32> checked; 6231 checkForCyclesHelper(N, visited, checked); 6232#endif 6233} 6234 6235void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6236 checkForCycles(DAG->getRoot().getNode()); 6237} 6238