SelectionDAG.cpp revision 7d34267df63e23be1957f738de783c145febb7af
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeDbgValue.h" 16#include "SDNodeOrdering.h" 17#include "llvm/ADT/SetVector.h" 18#include "llvm/ADT/SmallPtrSet.h" 19#include "llvm/ADT/SmallSet.h" 20#include "llvm/ADT/SmallVector.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/Analysis/ValueTracking.h" 23#include "llvm/Assembly/Writer.h" 24#include "llvm/CallingConv.h" 25#include "llvm/CodeGen/MachineBasicBlock.h" 26#include "llvm/CodeGen/MachineConstantPool.h" 27#include "llvm/CodeGen/MachineFrameInfo.h" 28#include "llvm/CodeGen/MachineModuleInfo.h" 29#include "llvm/Constants.h" 30#include "llvm/DataLayout.h" 31#include "llvm/DebugInfo.h" 32#include "llvm/DerivedTypes.h" 33#include "llvm/Function.h" 34#include "llvm/GlobalAlias.h" 35#include "llvm/GlobalVariable.h" 36#include "llvm/Intrinsics.h" 37#include "llvm/Support/CommandLine.h" 38#include "llvm/Support/Debug.h" 39#include "llvm/Support/ErrorHandling.h" 40#include "llvm/Support/ManagedStatic.h" 41#include "llvm/Support/MathExtras.h" 42#include "llvm/Support/Mutex.h" 43#include "llvm/Support/raw_ostream.h" 44#include "llvm/TargetTransformInfo.h" 45#include "llvm/Target/TargetInstrInfo.h" 46#include "llvm/Target/TargetIntrinsicInfo.h" 47#include "llvm/Target/TargetLowering.h" 48#include "llvm/Target/TargetMachine.h" 49#include "llvm/Target/TargetOptions.h" 50#include "llvm/Target/TargetRegisterInfo.h" 51#include "llvm/Target/TargetSelectionDAGInfo.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f16: return &APFloat::IEEEhalf; 67 case MVT::f32: return &APFloat::IEEEsingle; 68 case MVT::f64: return &APFloat::IEEEdouble; 69 case MVT::f80: return &APFloat::x87DoubleExtended; 70 case MVT::f128: return &APFloat::IEEEquad; 71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 72 } 73} 74 75// Default null implementations of the callbacks. 76void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 77void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 78 79//===----------------------------------------------------------------------===// 80// ConstantFPSDNode Class 81//===----------------------------------------------------------------------===// 82 83/// isExactlyValue - We don't rely on operator== working on double values, as 84/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 85/// As such, this method can be used to do an exact bit-for-bit comparison of 86/// two floating point values. 87bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 88 return getValueAPF().bitwiseIsEqual(V); 89} 90 91bool ConstantFPSDNode::isValueValidForType(EVT VT, 92 const APFloat& Val) { 93 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 94 95 // convert modifies in place, so make a copy. 96 APFloat Val2 = APFloat(Val); 97 bool losesInfo; 98 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 99 &losesInfo); 100 return !losesInfo; 101} 102 103//===----------------------------------------------------------------------===// 104// ISD Namespace 105//===----------------------------------------------------------------------===// 106 107/// isBuildVectorAllOnes - Return true if the specified node is a 108/// BUILD_VECTOR where all of the elements are ~0 or undef. 109bool ISD::isBuildVectorAllOnes(const SDNode *N) { 110 // Look through a bit convert. 111 if (N->getOpcode() == ISD::BITCAST) 112 N = N->getOperand(0).getNode(); 113 114 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 115 116 unsigned i = 0, e = N->getNumOperands(); 117 118 // Skip over all of the undef values. 119 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 120 ++i; 121 122 // Do not accept an all-undef vector. 123 if (i == e) return false; 124 125 // Do not accept build_vectors that aren't all constants or which have non-~0 126 // elements. We have to be a bit careful here, as the type of the constant 127 // may not be the same as the type of the vector elements due to type 128 // legalization (the elements are promoted to a legal type for the target and 129 // a vector of a type may be legal when the base element type is not). 130 // We only want to check enough bits to cover the vector elements, because 131 // we care if the resultant vector is all ones, not whether the individual 132 // constants are. 133 SDValue NotZero = N->getOperand(i); 134 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 135 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) { 136 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 137 return false; 138 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) { 139 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 140 return false; 141 } else 142 return false; 143 144 // Okay, we have at least one ~0 value, check to see if the rest match or are 145 // undefs. Even with the above element type twiddling, this should be OK, as 146 // the same type legalization should have applied to all the elements. 147 for (++i; i != e; ++i) 148 if (N->getOperand(i) != NotZero && 149 N->getOperand(i).getOpcode() != ISD::UNDEF) 150 return false; 151 return true; 152} 153 154 155/// isBuildVectorAllZeros - Return true if the specified node is a 156/// BUILD_VECTOR where all of the elements are 0 or undef. 157bool ISD::isBuildVectorAllZeros(const SDNode *N) { 158 // Look through a bit convert. 159 if (N->getOpcode() == ISD::BITCAST) 160 N = N->getOperand(0).getNode(); 161 162 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 163 164 unsigned i = 0, e = N->getNumOperands(); 165 166 // Skip over all of the undef values. 167 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 168 ++i; 169 170 // Do not accept an all-undef vector. 171 if (i == e) return false; 172 173 // Do not accept build_vectors that aren't all constants or which have non-0 174 // elements. 175 SDValue Zero = N->getOperand(i); 176 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) { 177 if (!CN->isNullValue()) 178 return false; 179 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) { 180 if (!CFPN->getValueAPF().isPosZero()) 181 return false; 182 } else 183 return false; 184 185 // Okay, we have at least one 0 value, check to see if the rest match or are 186 // undefs. 187 for (++i; i != e; ++i) 188 if (N->getOperand(i) != Zero && 189 N->getOperand(i).getOpcode() != ISD::UNDEF) 190 return false; 191 return true; 192} 193 194/// isScalarToVector - Return true if the specified node is a 195/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 196/// element is not an undef. 197bool ISD::isScalarToVector(const SDNode *N) { 198 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 199 return true; 200 201 if (N->getOpcode() != ISD::BUILD_VECTOR) 202 return false; 203 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 204 return false; 205 unsigned NumElems = N->getNumOperands(); 206 if (NumElems == 1) 207 return false; 208 for (unsigned i = 1; i < NumElems; ++i) { 209 SDValue V = N->getOperand(i); 210 if (V.getOpcode() != ISD::UNDEF) 211 return false; 212 } 213 return true; 214} 215 216/// allOperandsUndef - Return true if the node has at least one operand 217/// and all operands of the specified node are ISD::UNDEF. 218bool ISD::allOperandsUndef(const SDNode *N) { 219 // Return false if the node has no operands. 220 // This is "logically inconsistent" with the definition of "all" but 221 // is probably the desired behavior. 222 if (N->getNumOperands() == 0) 223 return false; 224 225 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 226 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 227 return false; 228 229 return true; 230} 231 232/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 233/// when given the operation for (X op Y). 234ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 235 // To perform this operation, we just need to swap the L and G bits of the 236 // operation. 237 unsigned OldL = (Operation >> 2) & 1; 238 unsigned OldG = (Operation >> 1) & 1; 239 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 240 (OldL << 1) | // New G bit 241 (OldG << 2)); // New L bit. 242} 243 244/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 245/// 'op' is a valid SetCC operation. 246ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 247 unsigned Operation = Op; 248 if (isInteger) 249 Operation ^= 7; // Flip L, G, E bits, but not U. 250 else 251 Operation ^= 15; // Flip all of the condition bits. 252 253 if (Operation > ISD::SETTRUE2) 254 Operation &= ~8; // Don't let N and U bits get set. 255 256 return ISD::CondCode(Operation); 257} 258 259 260/// isSignedOp - For an integer comparison, return 1 if the comparison is a 261/// signed operation and 2 if the result is an unsigned comparison. Return zero 262/// if the operation does not depend on the sign of the input (setne and seteq). 263static int isSignedOp(ISD::CondCode Opcode) { 264 switch (Opcode) { 265 default: llvm_unreachable("Illegal integer setcc operation!"); 266 case ISD::SETEQ: 267 case ISD::SETNE: return 0; 268 case ISD::SETLT: 269 case ISD::SETLE: 270 case ISD::SETGT: 271 case ISD::SETGE: return 1; 272 case ISD::SETULT: 273 case ISD::SETULE: 274 case ISD::SETUGT: 275 case ISD::SETUGE: return 2; 276 } 277} 278 279/// getSetCCOrOperation - Return the result of a logical OR between different 280/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 281/// returns SETCC_INVALID if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed integer setcc with an unsigned integer setcc. 287 return ISD::SETCC_INVALID; 288 289 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 290 291 // If the N and U bits get set then the resultant comparison DOES suddenly 292 // care about orderedness, and is true when ordered. 293 if (Op > ISD::SETTRUE2) 294 Op &= ~16; // Clear the U bit if the N bit is set. 295 296 // Canonicalize illegal integer setcc's. 297 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 298 Op = ISD::SETNE; 299 300 return ISD::CondCode(Op); 301} 302 303/// getSetCCAndOperation - Return the result of a logical AND between different 304/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 305/// function returns zero if it is not possible to represent the resultant 306/// comparison. 307ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 308 bool isInteger) { 309 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 310 // Cannot fold a signed setcc with an unsigned setcc. 311 return ISD::SETCC_INVALID; 312 313 // Combine all of the condition bits. 314 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 315 316 // Canonicalize illegal integer setcc's. 317 if (isInteger) { 318 switch (Result) { 319 default: break; 320 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 321 case ISD::SETOEQ: // SETEQ & SETU[LG]E 322 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 323 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 324 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 325 } 326 } 327 328 return Result; 329} 330 331//===----------------------------------------------------------------------===// 332// SDNode Profile Support 333//===----------------------------------------------------------------------===// 334 335/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 336/// 337static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 338 ID.AddInteger(OpC); 339} 340 341/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 342/// solely with their pointer. 343static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 344 ID.AddPointer(VTList.VTs); 345} 346 347/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 348/// 349static void AddNodeIDOperands(FoldingSetNodeID &ID, 350 const SDValue *Ops, unsigned NumOps) { 351 for (; NumOps; --NumOps, ++Ops) { 352 ID.AddPointer(Ops->getNode()); 353 ID.AddInteger(Ops->getResNo()); 354 } 355} 356 357/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 358/// 359static void AddNodeIDOperands(FoldingSetNodeID &ID, 360 const SDUse *Ops, unsigned NumOps) { 361 for (; NumOps; --NumOps, ++Ops) { 362 ID.AddPointer(Ops->getNode()); 363 ID.AddInteger(Ops->getResNo()); 364 } 365} 366 367static void AddNodeIDNode(FoldingSetNodeID &ID, 368 unsigned short OpC, SDVTList VTList, 369 const SDValue *OpList, unsigned N) { 370 AddNodeIDOpcode(ID, OpC); 371 AddNodeIDValueTypes(ID, VTList); 372 AddNodeIDOperands(ID, OpList, N); 373} 374 375/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 376/// the NodeID data. 377static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 378 switch (N->getOpcode()) { 379 case ISD::TargetExternalSymbol: 380 case ISD::ExternalSymbol: 381 llvm_unreachable("Should only be used on nodes with operands"); 382 default: break; // Normal nodes don't need extra info. 383 case ISD::TargetConstant: 384 case ISD::Constant: 385 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 386 break; 387 case ISD::TargetConstantFP: 388 case ISD::ConstantFP: { 389 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 390 break; 391 } 392 case ISD::TargetGlobalAddress: 393 case ISD::GlobalAddress: 394 case ISD::TargetGlobalTLSAddress: 395 case ISD::GlobalTLSAddress: { 396 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 397 ID.AddPointer(GA->getGlobal()); 398 ID.AddInteger(GA->getOffset()); 399 ID.AddInteger(GA->getTargetFlags()); 400 ID.AddInteger(GA->getAddressSpace()); 401 break; 402 } 403 case ISD::BasicBlock: 404 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 405 break; 406 case ISD::Register: 407 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 408 break; 409 case ISD::RegisterMask: 410 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 411 break; 412 case ISD::SRCVALUE: 413 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 414 break; 415 case ISD::FrameIndex: 416 case ISD::TargetFrameIndex: 417 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 418 break; 419 case ISD::JumpTable: 420 case ISD::TargetJumpTable: 421 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 422 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 423 break; 424 case ISD::ConstantPool: 425 case ISD::TargetConstantPool: { 426 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 427 ID.AddInteger(CP->getAlignment()); 428 ID.AddInteger(CP->getOffset()); 429 if (CP->isMachineConstantPoolEntry()) 430 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 431 else 432 ID.AddPointer(CP->getConstVal()); 433 ID.AddInteger(CP->getTargetFlags()); 434 break; 435 } 436 case ISD::TargetIndex: { 437 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 438 ID.AddInteger(TI->getIndex()); 439 ID.AddInteger(TI->getOffset()); 440 ID.AddInteger(TI->getTargetFlags()); 441 break; 442 } 443 case ISD::LOAD: { 444 const LoadSDNode *LD = cast<LoadSDNode>(N); 445 ID.AddInteger(LD->getMemoryVT().getRawBits()); 446 ID.AddInteger(LD->getRawSubclassData()); 447 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 448 break; 449 } 450 case ISD::STORE: { 451 const StoreSDNode *ST = cast<StoreSDNode>(N); 452 ID.AddInteger(ST->getMemoryVT().getRawBits()); 453 ID.AddInteger(ST->getRawSubclassData()); 454 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 455 break; 456 } 457 case ISD::ATOMIC_CMP_SWAP: 458 case ISD::ATOMIC_SWAP: 459 case ISD::ATOMIC_LOAD_ADD: 460 case ISD::ATOMIC_LOAD_SUB: 461 case ISD::ATOMIC_LOAD_AND: 462 case ISD::ATOMIC_LOAD_OR: 463 case ISD::ATOMIC_LOAD_XOR: 464 case ISD::ATOMIC_LOAD_NAND: 465 case ISD::ATOMIC_LOAD_MIN: 466 case ISD::ATOMIC_LOAD_MAX: 467 case ISD::ATOMIC_LOAD_UMIN: 468 case ISD::ATOMIC_LOAD_UMAX: 469 case ISD::ATOMIC_LOAD: 470 case ISD::ATOMIC_STORE: { 471 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 472 ID.AddInteger(AT->getMemoryVT().getRawBits()); 473 ID.AddInteger(AT->getRawSubclassData()); 474 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 475 break; 476 } 477 case ISD::PREFETCH: { 478 const MemSDNode *PF = cast<MemSDNode>(N); 479 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 480 break; 481 } 482 case ISD::VECTOR_SHUFFLE: { 483 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 484 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 485 i != e; ++i) 486 ID.AddInteger(SVN->getMaskElt(i)); 487 break; 488 } 489 case ISD::TargetBlockAddress: 490 case ISD::BlockAddress: { 491 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N); 492 ID.AddPointer(BA->getBlockAddress()); 493 ID.AddInteger(BA->getOffset()); 494 ID.AddInteger(BA->getTargetFlags()); 495 break; 496 } 497 } // end switch (N->getOpcode()) 498 499 // Target specific memory nodes could also have address spaces to check. 500 if (N->isTargetMemoryOpcode()) 501 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 502} 503 504/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 505/// data. 506static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 507 AddNodeIDOpcode(ID, N->getOpcode()); 508 // Add the return value info. 509 AddNodeIDValueTypes(ID, N->getVTList()); 510 // Add the operand info. 511 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 512 513 // Handle SDNode leafs with special info. 514 AddNodeIDCustom(ID, N); 515} 516 517/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 518/// the CSE map that carries volatility, temporalness, indexing mode, and 519/// extension/truncation information. 520/// 521static inline unsigned 522encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 523 bool isNonTemporal, bool isInvariant) { 524 assert((ConvType & 3) == ConvType && 525 "ConvType may not require more than 2 bits!"); 526 assert((AM & 7) == AM && 527 "AM may not require more than 3 bits!"); 528 return ConvType | 529 (AM << 2) | 530 (isVolatile << 5) | 531 (isNonTemporal << 6) | 532 (isInvariant << 7); 533} 534 535//===----------------------------------------------------------------------===// 536// SelectionDAG Class 537//===----------------------------------------------------------------------===// 538 539/// doNotCSE - Return true if CSE should not be performed for this node. 540static bool doNotCSE(SDNode *N) { 541 if (N->getValueType(0) == MVT::Glue) 542 return true; // Never CSE anything that produces a flag. 543 544 switch (N->getOpcode()) { 545 default: break; 546 case ISD::HANDLENODE: 547 case ISD::EH_LABEL: 548 return true; // Never CSE these nodes. 549 } 550 551 // Check that remaining values produced are not flags. 552 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 553 if (N->getValueType(i) == MVT::Glue) 554 return true; // Never CSE anything that produces a flag. 555 556 return false; 557} 558 559/// RemoveDeadNodes - This method deletes all unreachable nodes in the 560/// SelectionDAG. 561void SelectionDAG::RemoveDeadNodes() { 562 // Create a dummy node (which is not added to allnodes), that adds a reference 563 // to the root node, preventing it from being deleted. 564 HandleSDNode Dummy(getRoot()); 565 566 SmallVector<SDNode*, 128> DeadNodes; 567 568 // Add all obviously-dead nodes to the DeadNodes worklist. 569 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 570 if (I->use_empty()) 571 DeadNodes.push_back(I); 572 573 RemoveDeadNodes(DeadNodes); 574 575 // If the root changed (e.g. it was a dead load, update the root). 576 setRoot(Dummy.getValue()); 577} 578 579/// RemoveDeadNodes - This method deletes the unreachable nodes in the 580/// given list, and any nodes that become unreachable as a result. 581void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 582 583 // Process the worklist, deleting the nodes and adding their uses to the 584 // worklist. 585 while (!DeadNodes.empty()) { 586 SDNode *N = DeadNodes.pop_back_val(); 587 588 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 589 DUL->NodeDeleted(N, 0); 590 591 // Take the node out of the appropriate CSE map. 592 RemoveNodeFromCSEMaps(N); 593 594 // Next, brutally remove the operand list. This is safe to do, as there are 595 // no cycles in the graph. 596 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 597 SDUse &Use = *I++; 598 SDNode *Operand = Use.getNode(); 599 Use.set(SDValue()); 600 601 // Now that we removed this operand, see if there are no uses of it left. 602 if (Operand->use_empty()) 603 DeadNodes.push_back(Operand); 604 } 605 606 DeallocateNode(N); 607 } 608} 609 610void SelectionDAG::RemoveDeadNode(SDNode *N){ 611 SmallVector<SDNode*, 16> DeadNodes(1, N); 612 613 // Create a dummy node that adds a reference to the root node, preventing 614 // it from being deleted. (This matters if the root is an operand of the 615 // dead node.) 616 HandleSDNode Dummy(getRoot()); 617 618 RemoveDeadNodes(DeadNodes); 619} 620 621void SelectionDAG::DeleteNode(SDNode *N) { 622 // First take this out of the appropriate CSE map. 623 RemoveNodeFromCSEMaps(N); 624 625 // Finally, remove uses due to operands of this node, remove from the 626 // AllNodes list, and delete the node. 627 DeleteNodeNotInCSEMaps(N); 628} 629 630void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 631 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 632 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 633 634 // Drop all of the operands and decrement used node's use counts. 635 N->DropOperands(); 636 637 DeallocateNode(N); 638} 639 640void SelectionDAG::DeallocateNode(SDNode *N) { 641 if (N->OperandsNeedDelete) 642 delete[] N->OperandList; 643 644 // Set the opcode to DELETED_NODE to help catch bugs when node 645 // memory is reallocated. 646 N->NodeType = ISD::DELETED_NODE; 647 648 NodeAllocator.Deallocate(AllNodes.remove(N)); 649 650 // Remove the ordering of this node. 651 Ordering->remove(N); 652 653 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 654 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 655 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 656 DbgVals[i]->setIsInvalidated(); 657} 658 659/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 660/// correspond to it. This is useful when we're about to delete or repurpose 661/// the node. We don't want future request for structurally identical nodes 662/// to return N anymore. 663bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 664 bool Erased = false; 665 switch (N->getOpcode()) { 666 case ISD::HANDLENODE: return false; // noop. 667 case ISD::CONDCODE: 668 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 669 "Cond code doesn't exist!"); 670 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 671 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 672 break; 673 case ISD::ExternalSymbol: 674 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 675 break; 676 case ISD::TargetExternalSymbol: { 677 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 678 Erased = TargetExternalSymbols.erase( 679 std::pair<std::string,unsigned char>(ESN->getSymbol(), 680 ESN->getTargetFlags())); 681 break; 682 } 683 case ISD::VALUETYPE: { 684 EVT VT = cast<VTSDNode>(N)->getVT(); 685 if (VT.isExtended()) { 686 Erased = ExtendedValueTypeNodes.erase(VT); 687 } else { 688 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 689 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 690 } 691 break; 692 } 693 default: 694 // Remove it from the CSE Map. 695 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 696 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 697 Erased = CSEMap.RemoveNode(N); 698 break; 699 } 700#ifndef NDEBUG 701 // Verify that the node was actually in one of the CSE maps, unless it has a 702 // flag result (which cannot be CSE'd) or is one of the special cases that are 703 // not subject to CSE. 704 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 705 !N->isMachineOpcode() && !doNotCSE(N)) { 706 N->dump(this); 707 dbgs() << "\n"; 708 llvm_unreachable("Node is not in map!"); 709 } 710#endif 711 return Erased; 712} 713 714/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 715/// maps and modified in place. Add it back to the CSE maps, unless an identical 716/// node already exists, in which case transfer all its users to the existing 717/// node. This transfer can potentially trigger recursive merging. 718/// 719void 720SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 721 // For node types that aren't CSE'd, just act as if no identical node 722 // already exists. 723 if (!doNotCSE(N)) { 724 SDNode *Existing = CSEMap.GetOrInsertNode(N); 725 if (Existing != N) { 726 // If there was already an existing matching node, use ReplaceAllUsesWith 727 // to replace the dead one with the existing one. This can cause 728 // recursive merging of other unrelated nodes down the line. 729 ReplaceAllUsesWith(N, Existing); 730 731 // N is now dead. Inform the listeners and delete it. 732 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 733 DUL->NodeDeleted(N, Existing); 734 DeleteNodeNotInCSEMaps(N); 735 return; 736 } 737 } 738 739 // If the node doesn't already exist, we updated it. Inform listeners. 740 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 741 DUL->NodeUpdated(N); 742} 743 744/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 745/// were replaced with those specified. If this node is never memoized, 746/// return null, otherwise return a pointer to the slot it would take. If a 747/// node already exists with these operands, the slot will be non-null. 748SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 749 void *&InsertPos) { 750 if (doNotCSE(N)) 751 return 0; 752 753 SDValue Ops[] = { Op }; 754 FoldingSetNodeID ID; 755 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 756 AddNodeIDCustom(ID, N); 757 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 758 return Node; 759} 760 761/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 762/// were replaced with those specified. If this node is never memoized, 763/// return null, otherwise return a pointer to the slot it would take. If a 764/// node already exists with these operands, the slot will be non-null. 765SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 766 SDValue Op1, SDValue Op2, 767 void *&InsertPos) { 768 if (doNotCSE(N)) 769 return 0; 770 771 SDValue Ops[] = { Op1, Op2 }; 772 FoldingSetNodeID ID; 773 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 774 AddNodeIDCustom(ID, N); 775 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 776 return Node; 777} 778 779 780/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 781/// were replaced with those specified. If this node is never memoized, 782/// return null, otherwise return a pointer to the slot it would take. If a 783/// node already exists with these operands, the slot will be non-null. 784SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 785 const SDValue *Ops,unsigned NumOps, 786 void *&InsertPos) { 787 if (doNotCSE(N)) 788 return 0; 789 790 FoldingSetNodeID ID; 791 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 792 AddNodeIDCustom(ID, N); 793 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 794 return Node; 795} 796 797#ifndef NDEBUG 798/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 799static void VerifyNodeCommon(SDNode *N) { 800 switch (N->getOpcode()) { 801 default: 802 break; 803 case ISD::BUILD_PAIR: { 804 EVT VT = N->getValueType(0); 805 assert(N->getNumValues() == 1 && "Too many results!"); 806 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 807 "Wrong return type!"); 808 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 809 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 810 "Mismatched operand types!"); 811 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 812 "Wrong operand type!"); 813 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 814 "Wrong return type size"); 815 break; 816 } 817 case ISD::BUILD_VECTOR: { 818 assert(N->getNumValues() == 1 && "Too many results!"); 819 assert(N->getValueType(0).isVector() && "Wrong return type!"); 820 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 821 "Wrong number of operands!"); 822 EVT EltVT = N->getValueType(0).getVectorElementType(); 823 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 824 assert((I->getValueType() == EltVT || 825 (EltVT.isInteger() && I->getValueType().isInteger() && 826 EltVT.bitsLE(I->getValueType()))) && 827 "Wrong operand type!"); 828 assert(I->getValueType() == N->getOperand(0).getValueType() && 829 "Operands must all have the same type"); 830 } 831 break; 832 } 833 } 834} 835 836/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 837static void VerifySDNode(SDNode *N) { 838 // The SDNode allocators cannot be used to allocate nodes with fields that are 839 // not present in an SDNode! 840 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 841 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 842 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 843 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 844 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 845 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 846 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 847 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 848 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 849 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 850 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 851 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 852 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 853 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 854 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 855 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 856 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 857 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 858 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 859 860 VerifyNodeCommon(N); 861} 862 863/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 864/// invalid. 865static void VerifyMachineNode(SDNode *N) { 866 // The MachineNode allocators cannot be used to allocate nodes with fields 867 // that are not present in a MachineNode! 868 // Currently there are no such nodes. 869 870 VerifyNodeCommon(N); 871} 872#endif // NDEBUG 873 874/// getEVTAlignment - Compute the default alignment value for the 875/// given type. 876/// 877unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 878 Type *Ty = VT == MVT::iPTR ? 879 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 880 VT.getTypeForEVT(*getContext()); 881 882 return TLI.getDataLayout()->getABITypeAlignment(Ty); 883} 884 885// EntryNode could meaningfully have debug info if we can find it... 886SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 887 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 888 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 889 Root(getEntryNode()), Ordering(0), UpdateListeners(0) { 890 AllNodes.push_back(&EntryNode); 891 Ordering = new SDNodeOrdering(); 892 DbgInfo = new SDDbgInfo(); 893} 894 895void SelectionDAG::init(MachineFunction &mf) { 896 MF = &mf; 897 Context = &mf.getFunction()->getContext(); 898} 899 900SelectionDAG::~SelectionDAG() { 901 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 902 allnodes_clear(); 903 delete Ordering; 904 delete DbgInfo; 905} 906 907void SelectionDAG::allnodes_clear() { 908 assert(&*AllNodes.begin() == &EntryNode); 909 AllNodes.remove(AllNodes.begin()); 910 while (!AllNodes.empty()) 911 DeallocateNode(AllNodes.begin()); 912} 913 914void SelectionDAG::clear() { 915 allnodes_clear(); 916 OperandAllocator.Reset(); 917 CSEMap.clear(); 918 919 ExtendedValueTypeNodes.clear(); 920 ExternalSymbols.clear(); 921 TargetExternalSymbols.clear(); 922 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 923 static_cast<CondCodeSDNode*>(0)); 924 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 925 static_cast<SDNode*>(0)); 926 927 EntryNode.UseList = 0; 928 AllNodes.push_back(&EntryNode); 929 Root = getEntryNode(); 930 Ordering->clear(); 931 DbgInfo->clear(); 932} 933 934SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 935 return VT.bitsGT(Op.getValueType()) ? 936 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 937 getNode(ISD::TRUNCATE, DL, VT, Op); 938} 939 940SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 941 return VT.bitsGT(Op.getValueType()) ? 942 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 943 getNode(ISD::TRUNCATE, DL, VT, Op); 944} 945 946SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 947 return VT.bitsGT(Op.getValueType()) ? 948 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 949 getNode(ISD::TRUNCATE, DL, VT, Op); 950} 951 952SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 953 assert(!VT.isVector() && 954 "getZeroExtendInReg should use the vector element type instead of " 955 "the vector type!"); 956 if (Op.getValueType() == VT) return Op; 957 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 958 APInt Imm = APInt::getLowBitsSet(BitWidth, 959 VT.getSizeInBits()); 960 return getNode(ISD::AND, DL, Op.getValueType(), Op, 961 getConstant(Imm, Op.getValueType())); 962} 963 964/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 965/// 966SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 967 EVT EltVT = VT.getScalarType(); 968 SDValue NegOne = 969 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 970 return getNode(ISD::XOR, DL, VT, Val, NegOne); 971} 972 973SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 974 EVT EltVT = VT.getScalarType(); 975 assert((EltVT.getSizeInBits() >= 64 || 976 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 977 "getConstant with a uint64_t value that doesn't fit in the type!"); 978 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 979} 980 981SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 982 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 983} 984 985SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 986 assert(VT.isInteger() && "Cannot create FP integer constant!"); 987 988 EVT EltVT = VT.getScalarType(); 989 const ConstantInt *Elt = &Val; 990 991 // In some cases the vector type is legal but the element type is illegal and 992 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 993 // inserted value (the type does not need to match the vector element type). 994 // Any extra bits introduced will be truncated away. 995 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 996 TargetLowering::TypePromoteInteger) { 997 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 998 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 999 Elt = ConstantInt::get(*getContext(), NewVal); 1000 } 1001 1002 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 1003 "APInt size does not match type size!"); 1004 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 1005 FoldingSetNodeID ID; 1006 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1007 ID.AddPointer(Elt); 1008 void *IP = 0; 1009 SDNode *N = NULL; 1010 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1011 if (!VT.isVector()) 1012 return SDValue(N, 0); 1013 1014 if (!N) { 1015 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1016 CSEMap.InsertNode(N, IP); 1017 AllNodes.push_back(N); 1018 } 1019 1020 SDValue Result(N, 0); 1021 if (VT.isVector()) { 1022 SmallVector<SDValue, 8> Ops; 1023 Ops.assign(VT.getVectorNumElements(), Result); 1024 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1025 } 1026 return Result; 1027} 1028 1029SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1030 return getConstant(Val, TLI.getPointerTy(), isTarget); 1031} 1032 1033 1034SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1035 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1036} 1037 1038SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1039 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1040 1041 EVT EltVT = VT.getScalarType(); 1042 1043 // Do the map lookup using the actual bit pattern for the floating point 1044 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1045 // we don't have issues with SNANs. 1046 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1047 FoldingSetNodeID ID; 1048 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1049 ID.AddPointer(&V); 1050 void *IP = 0; 1051 SDNode *N = NULL; 1052 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1053 if (!VT.isVector()) 1054 return SDValue(N, 0); 1055 1056 if (!N) { 1057 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1058 CSEMap.InsertNode(N, IP); 1059 AllNodes.push_back(N); 1060 } 1061 1062 SDValue Result(N, 0); 1063 if (VT.isVector()) { 1064 SmallVector<SDValue, 8> Ops; 1065 Ops.assign(VT.getVectorNumElements(), Result); 1066 // FIXME DebugLoc info might be appropriate here 1067 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1068 } 1069 return Result; 1070} 1071 1072SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1073 EVT EltVT = VT.getScalarType(); 1074 if (EltVT==MVT::f32) 1075 return getConstantFP(APFloat((float)Val), VT, isTarget); 1076 else if (EltVT==MVT::f64) 1077 return getConstantFP(APFloat(Val), VT, isTarget); 1078 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) { 1079 bool ignored; 1080 APFloat apf = APFloat(Val); 1081 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1082 &ignored); 1083 return getConstantFP(apf, VT, isTarget); 1084 } else 1085 llvm_unreachable("Unsupported type in getConstantFP"); 1086} 1087 1088SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1089 EVT VT, int64_t Offset, 1090 bool isTargetGA, 1091 unsigned char TargetFlags) { 1092 assert((TargetFlags == 0 || isTargetGA) && 1093 "Cannot set target flags on target-independent globals"); 1094 1095 // Truncate (with sign-extension) the offset value to the pointer size. 1096 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 1097 if (BitWidth < 64) 1098 Offset = SignExtend64(Offset, BitWidth); 1099 1100 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1101 if (!GVar) { 1102 // If GV is an alias then use the aliasee for determining thread-localness. 1103 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1104 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1105 } 1106 1107 unsigned Opc; 1108 if (GVar && GVar->isThreadLocal()) 1109 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1110 else 1111 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1112 1113 FoldingSetNodeID ID; 1114 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1115 ID.AddPointer(GV); 1116 ID.AddInteger(Offset); 1117 ID.AddInteger(TargetFlags); 1118 ID.AddInteger(GV->getType()->getAddressSpace()); 1119 void *IP = 0; 1120 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1121 return SDValue(E, 0); 1122 1123 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1124 Offset, TargetFlags); 1125 CSEMap.InsertNode(N, IP); 1126 AllNodes.push_back(N); 1127 return SDValue(N, 0); 1128} 1129 1130SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1131 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1132 FoldingSetNodeID ID; 1133 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1134 ID.AddInteger(FI); 1135 void *IP = 0; 1136 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1137 return SDValue(E, 0); 1138 1139 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1140 CSEMap.InsertNode(N, IP); 1141 AllNodes.push_back(N); 1142 return SDValue(N, 0); 1143} 1144 1145SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1146 unsigned char TargetFlags) { 1147 assert((TargetFlags == 0 || isTarget) && 1148 "Cannot set target flags on target-independent jump tables"); 1149 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1150 FoldingSetNodeID ID; 1151 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1152 ID.AddInteger(JTI); 1153 ID.AddInteger(TargetFlags); 1154 void *IP = 0; 1155 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1156 return SDValue(E, 0); 1157 1158 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1159 TargetFlags); 1160 CSEMap.InsertNode(N, IP); 1161 AllNodes.push_back(N); 1162 return SDValue(N, 0); 1163} 1164 1165SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1166 unsigned Alignment, int Offset, 1167 bool isTarget, 1168 unsigned char TargetFlags) { 1169 assert((TargetFlags == 0 || isTarget) && 1170 "Cannot set target flags on target-independent globals"); 1171 if (Alignment == 0) 1172 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1173 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1174 FoldingSetNodeID ID; 1175 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1176 ID.AddInteger(Alignment); 1177 ID.AddInteger(Offset); 1178 ID.AddPointer(C); 1179 ID.AddInteger(TargetFlags); 1180 void *IP = 0; 1181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1182 return SDValue(E, 0); 1183 1184 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1185 Alignment, TargetFlags); 1186 CSEMap.InsertNode(N, IP); 1187 AllNodes.push_back(N); 1188 return SDValue(N, 0); 1189} 1190 1191 1192SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1193 unsigned Alignment, int Offset, 1194 bool isTarget, 1195 unsigned char TargetFlags) { 1196 assert((TargetFlags == 0 || isTarget) && 1197 "Cannot set target flags on target-independent globals"); 1198 if (Alignment == 0) 1199 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType()); 1200 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1201 FoldingSetNodeID ID; 1202 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1203 ID.AddInteger(Alignment); 1204 ID.AddInteger(Offset); 1205 C->addSelectionDAGCSEId(ID); 1206 ID.AddInteger(TargetFlags); 1207 void *IP = 0; 1208 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1209 return SDValue(E, 0); 1210 1211 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1212 Alignment, TargetFlags); 1213 CSEMap.InsertNode(N, IP); 1214 AllNodes.push_back(N); 1215 return SDValue(N, 0); 1216} 1217 1218SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1219 unsigned char TargetFlags) { 1220 FoldingSetNodeID ID; 1221 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1222 ID.AddInteger(Index); 1223 ID.AddInteger(Offset); 1224 ID.AddInteger(TargetFlags); 1225 void *IP = 0; 1226 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1227 return SDValue(E, 0); 1228 1229 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1230 TargetFlags); 1231 CSEMap.InsertNode(N, IP); 1232 AllNodes.push_back(N); 1233 return SDValue(N, 0); 1234} 1235 1236SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1237 FoldingSetNodeID ID; 1238 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1239 ID.AddPointer(MBB); 1240 void *IP = 0; 1241 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1242 return SDValue(E, 0); 1243 1244 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1245 CSEMap.InsertNode(N, IP); 1246 AllNodes.push_back(N); 1247 return SDValue(N, 0); 1248} 1249 1250SDValue SelectionDAG::getValueType(EVT VT) { 1251 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1252 ValueTypeNodes.size()) 1253 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1254 1255 SDNode *&N = VT.isExtended() ? 1256 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1257 1258 if (N) return SDValue(N, 0); 1259 N = new (NodeAllocator) VTSDNode(VT); 1260 AllNodes.push_back(N); 1261 return SDValue(N, 0); 1262} 1263 1264SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1265 SDNode *&N = ExternalSymbols[Sym]; 1266 if (N) return SDValue(N, 0); 1267 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1273 unsigned char TargetFlags) { 1274 SDNode *&N = 1275 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1276 TargetFlags)]; 1277 if (N) return SDValue(N, 0); 1278 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1279 AllNodes.push_back(N); 1280 return SDValue(N, 0); 1281} 1282 1283SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1284 if ((unsigned)Cond >= CondCodeNodes.size()) 1285 CondCodeNodes.resize(Cond+1); 1286 1287 if (CondCodeNodes[Cond] == 0) { 1288 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1289 CondCodeNodes[Cond] = N; 1290 AllNodes.push_back(N); 1291 } 1292 1293 return SDValue(CondCodeNodes[Cond], 0); 1294} 1295 1296// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1297// the shuffle mask M that point at N1 to point at N2, and indices that point 1298// N2 to point at N1. 1299static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1300 std::swap(N1, N2); 1301 int NElts = M.size(); 1302 for (int i = 0; i != NElts; ++i) { 1303 if (M[i] >= NElts) 1304 M[i] -= NElts; 1305 else if (M[i] >= 0) 1306 M[i] += NElts; 1307 } 1308} 1309 1310SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1311 SDValue N2, const int *Mask) { 1312 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1313 assert(VT.isVector() && N1.getValueType().isVector() && 1314 "Vector Shuffle VTs must be a vectors"); 1315 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1316 && "Vector Shuffle VTs must have same element type"); 1317 1318 // Canonicalize shuffle undef, undef -> undef 1319 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1320 return getUNDEF(VT); 1321 1322 // Validate that all indices in Mask are within the range of the elements 1323 // input to the shuffle. 1324 unsigned NElts = VT.getVectorNumElements(); 1325 SmallVector<int, 8> MaskVec; 1326 for (unsigned i = 0; i != NElts; ++i) { 1327 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1328 MaskVec.push_back(Mask[i]); 1329 } 1330 1331 // Canonicalize shuffle v, v -> v, undef 1332 if (N1 == N2) { 1333 N2 = getUNDEF(VT); 1334 for (unsigned i = 0; i != NElts; ++i) 1335 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1336 } 1337 1338 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1339 if (N1.getOpcode() == ISD::UNDEF) 1340 commuteShuffle(N1, N2, MaskVec); 1341 1342 // Canonicalize all index into lhs, -> shuffle lhs, undef 1343 // Canonicalize all index into rhs, -> shuffle rhs, undef 1344 bool AllLHS = true, AllRHS = true; 1345 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1346 for (unsigned i = 0; i != NElts; ++i) { 1347 if (MaskVec[i] >= (int)NElts) { 1348 if (N2Undef) 1349 MaskVec[i] = -1; 1350 else 1351 AllLHS = false; 1352 } else if (MaskVec[i] >= 0) { 1353 AllRHS = false; 1354 } 1355 } 1356 if (AllLHS && AllRHS) 1357 return getUNDEF(VT); 1358 if (AllLHS && !N2Undef) 1359 N2 = getUNDEF(VT); 1360 if (AllRHS) { 1361 N1 = getUNDEF(VT); 1362 commuteShuffle(N1, N2, MaskVec); 1363 } 1364 1365 // If Identity shuffle, or all shuffle in to undef, return that node. 1366 bool AllUndef = true; 1367 bool Identity = true; 1368 for (unsigned i = 0; i != NElts; ++i) { 1369 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1370 if (MaskVec[i] >= 0) AllUndef = false; 1371 } 1372 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1373 return N1; 1374 if (AllUndef) 1375 return getUNDEF(VT); 1376 1377 FoldingSetNodeID ID; 1378 SDValue Ops[2] = { N1, N2 }; 1379 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1380 for (unsigned i = 0; i != NElts; ++i) 1381 ID.AddInteger(MaskVec[i]); 1382 1383 void* IP = 0; 1384 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1385 return SDValue(E, 0); 1386 1387 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1388 // SDNode doesn't have access to it. This memory will be "leaked" when 1389 // the node is deallocated, but recovered when the NodeAllocator is released. 1390 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1391 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1392 1393 ShuffleVectorSDNode *N = 1394 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1395 CSEMap.InsertNode(N, IP); 1396 AllNodes.push_back(N); 1397 return SDValue(N, 0); 1398} 1399 1400SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1401 SDValue Val, SDValue DTy, 1402 SDValue STy, SDValue Rnd, SDValue Sat, 1403 ISD::CvtCode Code) { 1404 // If the src and dest types are the same and the conversion is between 1405 // integer types of the same sign or two floats, no conversion is necessary. 1406 if (DTy == STy && 1407 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1408 return Val; 1409 1410 FoldingSetNodeID ID; 1411 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1412 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1413 void* IP = 0; 1414 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1415 return SDValue(E, 0); 1416 1417 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1418 Code); 1419 CSEMap.InsertNode(N, IP); 1420 AllNodes.push_back(N); 1421 return SDValue(N, 0); 1422} 1423 1424SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1425 FoldingSetNodeID ID; 1426 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1427 ID.AddInteger(RegNo); 1428 void *IP = 0; 1429 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1430 return SDValue(E, 0); 1431 1432 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1433 CSEMap.InsertNode(N, IP); 1434 AllNodes.push_back(N); 1435 return SDValue(N, 0); 1436} 1437 1438SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1439 FoldingSetNodeID ID; 1440 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1441 ID.AddPointer(RegMask); 1442 void *IP = 0; 1443 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1444 return SDValue(E, 0); 1445 1446 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1447 CSEMap.InsertNode(N, IP); 1448 AllNodes.push_back(N); 1449 return SDValue(N, 0); 1450} 1451 1452SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1453 FoldingSetNodeID ID; 1454 SDValue Ops[] = { Root }; 1455 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1456 ID.AddPointer(Label); 1457 void *IP = 0; 1458 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1459 return SDValue(E, 0); 1460 1461 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1462 CSEMap.InsertNode(N, IP); 1463 AllNodes.push_back(N); 1464 return SDValue(N, 0); 1465} 1466 1467 1468SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1469 int64_t Offset, 1470 bool isTarget, 1471 unsigned char TargetFlags) { 1472 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1473 1474 FoldingSetNodeID ID; 1475 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1476 ID.AddPointer(BA); 1477 ID.AddInteger(Offset); 1478 ID.AddInteger(TargetFlags); 1479 void *IP = 0; 1480 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1481 return SDValue(E, 0); 1482 1483 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset, 1484 TargetFlags); 1485 CSEMap.InsertNode(N, IP); 1486 AllNodes.push_back(N); 1487 return SDValue(N, 0); 1488} 1489 1490SDValue SelectionDAG::getSrcValue(const Value *V) { 1491 assert((!V || V->getType()->isPointerTy()) && 1492 "SrcValue is not a pointer?"); 1493 1494 FoldingSetNodeID ID; 1495 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1496 ID.AddPointer(V); 1497 1498 void *IP = 0; 1499 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1500 return SDValue(E, 0); 1501 1502 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1503 CSEMap.InsertNode(N, IP); 1504 AllNodes.push_back(N); 1505 return SDValue(N, 0); 1506} 1507 1508/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1509SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1510 FoldingSetNodeID ID; 1511 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1512 ID.AddPointer(MD); 1513 1514 void *IP = 0; 1515 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1516 return SDValue(E, 0); 1517 1518 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1519 CSEMap.InsertNode(N, IP); 1520 AllNodes.push_back(N); 1521 return SDValue(N, 0); 1522} 1523 1524 1525/// getShiftAmountOperand - Return the specified value casted to 1526/// the target's desired shift amount type. 1527SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1528 EVT OpTy = Op.getValueType(); 1529 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1530 if (OpTy == ShTy || OpTy.isVector()) return Op; 1531 1532 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1533 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1534} 1535 1536/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1537/// specified value type. 1538SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1539 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1540 unsigned ByteSize = VT.getStoreSize(); 1541 Type *Ty = VT.getTypeForEVT(*getContext()); 1542 unsigned StackAlign = 1543 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign); 1544 1545 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1546 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1547} 1548 1549/// CreateStackTemporary - Create a stack temporary suitable for holding 1550/// either of the specified value types. 1551SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1552 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1553 VT2.getStoreSizeInBits())/8; 1554 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1555 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1556 const DataLayout *TD = TLI.getDataLayout(); 1557 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1558 TD->getPrefTypeAlignment(Ty2)); 1559 1560 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1561 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1562 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1563} 1564 1565SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1566 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1567 // These setcc operations always fold. 1568 switch (Cond) { 1569 default: break; 1570 case ISD::SETFALSE: 1571 case ISD::SETFALSE2: return getConstant(0, VT); 1572 case ISD::SETTRUE: 1573 case ISD::SETTRUE2: return getConstant(1, VT); 1574 1575 case ISD::SETOEQ: 1576 case ISD::SETOGT: 1577 case ISD::SETOGE: 1578 case ISD::SETOLT: 1579 case ISD::SETOLE: 1580 case ISD::SETONE: 1581 case ISD::SETO: 1582 case ISD::SETUO: 1583 case ISD::SETUEQ: 1584 case ISD::SETUNE: 1585 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1586 break; 1587 } 1588 1589 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1590 const APInt &C2 = N2C->getAPIntValue(); 1591 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1592 const APInt &C1 = N1C->getAPIntValue(); 1593 1594 switch (Cond) { 1595 default: llvm_unreachable("Unknown integer setcc!"); 1596 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1597 case ISD::SETNE: return getConstant(C1 != C2, VT); 1598 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1599 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1600 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1601 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1602 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1603 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1604 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1605 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1606 } 1607 } 1608 } 1609 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1610 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1611 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1612 switch (Cond) { 1613 default: break; 1614 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1615 return getUNDEF(VT); 1616 // fall through 1617 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1618 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1619 return getUNDEF(VT); 1620 // fall through 1621 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1622 R==APFloat::cmpLessThan, VT); 1623 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1624 return getUNDEF(VT); 1625 // fall through 1626 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1627 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1628 return getUNDEF(VT); 1629 // fall through 1630 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1631 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1632 return getUNDEF(VT); 1633 // fall through 1634 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1635 R==APFloat::cmpEqual, VT); 1636 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1637 return getUNDEF(VT); 1638 // fall through 1639 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1640 R==APFloat::cmpEqual, VT); 1641 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1642 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1643 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1644 R==APFloat::cmpEqual, VT); 1645 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1646 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1647 R==APFloat::cmpLessThan, VT); 1648 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1649 R==APFloat::cmpUnordered, VT); 1650 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1651 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1652 } 1653 } else { 1654 // Ensure that the constant occurs on the RHS. 1655 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1656 } 1657 } 1658 1659 // Could not fold it. 1660 return SDValue(); 1661} 1662 1663/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1664/// use this predicate to simplify operations downstream. 1665bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1666 // This predicate is not safe for vector operations. 1667 if (Op.getValueType().isVector()) 1668 return false; 1669 1670 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1671 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1672} 1673 1674/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1675/// this predicate to simplify operations downstream. Mask is known to be zero 1676/// for bits that V cannot have. 1677bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1678 unsigned Depth) const { 1679 APInt KnownZero, KnownOne; 1680 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1681 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1682 return (KnownZero & Mask) == Mask; 1683} 1684 1685/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1686/// known to be either zero or one and return them in the KnownZero/KnownOne 1687/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1688/// processing. 1689void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1690 APInt &KnownOne, unsigned Depth) const { 1691 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1692 1693 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1694 if (Depth == 6) 1695 return; // Limit search depth. 1696 1697 APInt KnownZero2, KnownOne2; 1698 1699 switch (Op.getOpcode()) { 1700 case ISD::Constant: 1701 // We know all of the bits for a constant! 1702 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1703 KnownZero = ~KnownOne; 1704 return; 1705 case ISD::AND: 1706 // If either the LHS or the RHS are Zero, the result is zero. 1707 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1708 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1709 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1710 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1711 1712 // Output known-1 bits are only known if set in both the LHS & RHS. 1713 KnownOne &= KnownOne2; 1714 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1715 KnownZero |= KnownZero2; 1716 return; 1717 case ISD::OR: 1718 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1719 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1720 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1721 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1722 1723 // Output known-0 bits are only known if clear in both the LHS & RHS. 1724 KnownZero &= KnownZero2; 1725 // Output known-1 are known to be set if set in either the LHS | RHS. 1726 KnownOne |= KnownOne2; 1727 return; 1728 case ISD::XOR: { 1729 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1730 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1731 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1732 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1733 1734 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1735 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1736 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1737 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1738 KnownZero = KnownZeroOut; 1739 return; 1740 } 1741 case ISD::MUL: { 1742 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1743 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1744 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1745 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1746 1747 // If low bits are zero in either operand, output low known-0 bits. 1748 // Also compute a conserative estimate for high known-0 bits. 1749 // More trickiness is possible, but this is sufficient for the 1750 // interesting case of alignment computation. 1751 KnownOne.clearAllBits(); 1752 unsigned TrailZ = KnownZero.countTrailingOnes() + 1753 KnownZero2.countTrailingOnes(); 1754 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1755 KnownZero2.countLeadingOnes(), 1756 BitWidth) - BitWidth; 1757 1758 TrailZ = std::min(TrailZ, BitWidth); 1759 LeadZ = std::min(LeadZ, BitWidth); 1760 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1761 APInt::getHighBitsSet(BitWidth, LeadZ); 1762 return; 1763 } 1764 case ISD::UDIV: { 1765 // For the purposes of computing leading zeros we can conservatively 1766 // treat a udiv as a logical right shift by the power of 2 known to 1767 // be less than the denominator. 1768 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1769 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1770 1771 KnownOne2.clearAllBits(); 1772 KnownZero2.clearAllBits(); 1773 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1774 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1775 if (RHSUnknownLeadingOnes != BitWidth) 1776 LeadZ = std::min(BitWidth, 1777 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1778 1779 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1780 return; 1781 } 1782 case ISD::SELECT: 1783 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1784 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1785 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1786 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1787 1788 // Only known if known in both the LHS and RHS. 1789 KnownOne &= KnownOne2; 1790 KnownZero &= KnownZero2; 1791 return; 1792 case ISD::SELECT_CC: 1793 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1794 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1795 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1796 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1797 1798 // Only known if known in both the LHS and RHS. 1799 KnownOne &= KnownOne2; 1800 KnownZero &= KnownZero2; 1801 return; 1802 case ISD::SADDO: 1803 case ISD::UADDO: 1804 case ISD::SSUBO: 1805 case ISD::USUBO: 1806 case ISD::SMULO: 1807 case ISD::UMULO: 1808 if (Op.getResNo() != 1) 1809 return; 1810 // The boolean result conforms to getBooleanContents. Fall through. 1811 case ISD::SETCC: 1812 // If we know the result of a setcc has the top bits zero, use this info. 1813 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1814 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1815 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1816 return; 1817 case ISD::SHL: 1818 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1819 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1820 unsigned ShAmt = SA->getZExtValue(); 1821 1822 // If the shift count is an invalid immediate, don't do anything. 1823 if (ShAmt >= BitWidth) 1824 return; 1825 1826 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1827 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1828 KnownZero <<= ShAmt; 1829 KnownOne <<= ShAmt; 1830 // low bits known zero. 1831 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1832 } 1833 return; 1834 case ISD::SRL: 1835 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1836 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1837 unsigned ShAmt = SA->getZExtValue(); 1838 1839 // If the shift count is an invalid immediate, don't do anything. 1840 if (ShAmt >= BitWidth) 1841 return; 1842 1843 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1844 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1845 KnownZero = KnownZero.lshr(ShAmt); 1846 KnownOne = KnownOne.lshr(ShAmt); 1847 1848 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1849 KnownZero |= HighBits; // High bits known zero. 1850 } 1851 return; 1852 case ISD::SRA: 1853 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1854 unsigned ShAmt = SA->getZExtValue(); 1855 1856 // If the shift count is an invalid immediate, don't do anything. 1857 if (ShAmt >= BitWidth) 1858 return; 1859 1860 // If any of the demanded bits are produced by the sign extension, we also 1861 // demand the input sign bit. 1862 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1863 1864 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1865 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1866 KnownZero = KnownZero.lshr(ShAmt); 1867 KnownOne = KnownOne.lshr(ShAmt); 1868 1869 // Handle the sign bits. 1870 APInt SignBit = APInt::getSignBit(BitWidth); 1871 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1872 1873 if (KnownZero.intersects(SignBit)) { 1874 KnownZero |= HighBits; // New bits are known zero. 1875 } else if (KnownOne.intersects(SignBit)) { 1876 KnownOne |= HighBits; // New bits are known one. 1877 } 1878 } 1879 return; 1880 case ISD::SIGN_EXTEND_INREG: { 1881 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1882 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1883 1884 // Sign extension. Compute the demanded bits in the result that are not 1885 // present in the input. 1886 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1887 1888 APInt InSignBit = APInt::getSignBit(EBits); 1889 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1890 1891 // If the sign extended bits are demanded, we know that the sign 1892 // bit is demanded. 1893 InSignBit = InSignBit.zext(BitWidth); 1894 if (NewBits.getBoolValue()) 1895 InputDemandedBits |= InSignBit; 1896 1897 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1898 KnownOne &= InputDemandedBits; 1899 KnownZero &= InputDemandedBits; 1900 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1901 1902 // If the sign bit of the input is known set or clear, then we know the 1903 // top bits of the result. 1904 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1905 KnownZero |= NewBits; 1906 KnownOne &= ~NewBits; 1907 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1908 KnownOne |= NewBits; 1909 KnownZero &= ~NewBits; 1910 } else { // Input sign bit unknown 1911 KnownZero &= ~NewBits; 1912 KnownOne &= ~NewBits; 1913 } 1914 return; 1915 } 1916 case ISD::CTTZ: 1917 case ISD::CTTZ_ZERO_UNDEF: 1918 case ISD::CTLZ: 1919 case ISD::CTLZ_ZERO_UNDEF: 1920 case ISD::CTPOP: { 1921 unsigned LowBits = Log2_32(BitWidth)+1; 1922 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1923 KnownOne.clearAllBits(); 1924 return; 1925 } 1926 case ISD::LOAD: { 1927 LoadSDNode *LD = cast<LoadSDNode>(Op); 1928 if (ISD::isZEXTLoad(Op.getNode())) { 1929 EVT VT = LD->getMemoryVT(); 1930 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1931 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1932 } else if (const MDNode *Ranges = LD->getRanges()) { 1933 computeMaskedBitsLoad(*Ranges, KnownZero); 1934 } 1935 return; 1936 } 1937 case ISD::ZERO_EXTEND: { 1938 EVT InVT = Op.getOperand(0).getValueType(); 1939 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1940 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1941 KnownZero = KnownZero.trunc(InBits); 1942 KnownOne = KnownOne.trunc(InBits); 1943 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1944 KnownZero = KnownZero.zext(BitWidth); 1945 KnownOne = KnownOne.zext(BitWidth); 1946 KnownZero |= NewBits; 1947 return; 1948 } 1949 case ISD::SIGN_EXTEND: { 1950 EVT InVT = Op.getOperand(0).getValueType(); 1951 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1952 APInt InSignBit = APInt::getSignBit(InBits); 1953 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1954 1955 KnownZero = KnownZero.trunc(InBits); 1956 KnownOne = KnownOne.trunc(InBits); 1957 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1958 1959 // Note if the sign bit is known to be zero or one. 1960 bool SignBitKnownZero = KnownZero.isNegative(); 1961 bool SignBitKnownOne = KnownOne.isNegative(); 1962 assert(!(SignBitKnownZero && SignBitKnownOne) && 1963 "Sign bit can't be known to be both zero and one!"); 1964 1965 KnownZero = KnownZero.zext(BitWidth); 1966 KnownOne = KnownOne.zext(BitWidth); 1967 1968 // If the sign bit is known zero or one, the top bits match. 1969 if (SignBitKnownZero) 1970 KnownZero |= NewBits; 1971 else if (SignBitKnownOne) 1972 KnownOne |= NewBits; 1973 return; 1974 } 1975 case ISD::ANY_EXTEND: { 1976 EVT InVT = Op.getOperand(0).getValueType(); 1977 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1978 KnownZero = KnownZero.trunc(InBits); 1979 KnownOne = KnownOne.trunc(InBits); 1980 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1981 KnownZero = KnownZero.zext(BitWidth); 1982 KnownOne = KnownOne.zext(BitWidth); 1983 return; 1984 } 1985 case ISD::TRUNCATE: { 1986 EVT InVT = Op.getOperand(0).getValueType(); 1987 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1988 KnownZero = KnownZero.zext(InBits); 1989 KnownOne = KnownOne.zext(InBits); 1990 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1991 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1992 KnownZero = KnownZero.trunc(BitWidth); 1993 KnownOne = KnownOne.trunc(BitWidth); 1994 break; 1995 } 1996 case ISD::AssertZext: { 1997 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1998 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1999 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2000 KnownZero |= (~InMask); 2001 KnownOne &= (~KnownZero); 2002 return; 2003 } 2004 case ISD::FGETSIGN: 2005 // All bits are zero except the low bit. 2006 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 2007 return; 2008 2009 case ISD::SUB: { 2010 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2011 // We know that the top bits of C-X are clear if X contains less bits 2012 // than C (i.e. no wrap-around can happen). For example, 20-X is 2013 // positive if we can prove that X is >= 0 and < 16. 2014 if (CLHS->getAPIntValue().isNonNegative()) { 2015 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2016 // NLZ can't be BitWidth with no sign bit 2017 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2018 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2019 2020 // If all of the MaskV bits are known to be zero, then we know the 2021 // output top bits are zero, because we now know that the output is 2022 // from [0-C]. 2023 if ((KnownZero2 & MaskV) == MaskV) { 2024 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2025 // Top bits known zero. 2026 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2027 } 2028 } 2029 } 2030 } 2031 // fall through 2032 case ISD::ADD: 2033 case ISD::ADDE: { 2034 // Output known-0 bits are known if clear or set in both the low clear bits 2035 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2036 // low 3 bits clear. 2037 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2038 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2039 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2040 2041 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2042 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2043 KnownZeroOut = std::min(KnownZeroOut, 2044 KnownZero2.countTrailingOnes()); 2045 2046 if (Op.getOpcode() == ISD::ADD) { 2047 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2048 return; 2049 } 2050 2051 // With ADDE, a carry bit may be added in, so we can only use this 2052 // information if we know (at least) that the low two bits are clear. We 2053 // then return to the caller that the low bit is unknown but that other bits 2054 // are known zero. 2055 if (KnownZeroOut >= 2) // ADDE 2056 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2057 return; 2058 } 2059 case ISD::SREM: 2060 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2061 const APInt &RA = Rem->getAPIntValue().abs(); 2062 if (RA.isPowerOf2()) { 2063 APInt LowBits = RA - 1; 2064 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2065 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2066 2067 // The low bits of the first operand are unchanged by the srem. 2068 KnownZero = KnownZero2 & LowBits; 2069 KnownOne = KnownOne2 & LowBits; 2070 2071 // If the first operand is non-negative or has all low bits zero, then 2072 // the upper bits are all zero. 2073 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2074 KnownZero |= ~LowBits; 2075 2076 // If the first operand is negative and not all low bits are zero, then 2077 // the upper bits are all one. 2078 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2079 KnownOne |= ~LowBits; 2080 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2081 } 2082 } 2083 return; 2084 case ISD::UREM: { 2085 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2086 const APInt &RA = Rem->getAPIntValue(); 2087 if (RA.isPowerOf2()) { 2088 APInt LowBits = (RA - 1); 2089 KnownZero |= ~LowBits; 2090 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2091 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2092 break; 2093 } 2094 } 2095 2096 // Since the result is less than or equal to either operand, any leading 2097 // zero bits in either operand must also exist in the result. 2098 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2099 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2100 2101 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2102 KnownZero2.countLeadingOnes()); 2103 KnownOne.clearAllBits(); 2104 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2105 return; 2106 } 2107 case ISD::FrameIndex: 2108 case ISD::TargetFrameIndex: 2109 if (unsigned Align = InferPtrAlignment(Op)) { 2110 // The low bits are known zero if the pointer is aligned. 2111 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2112 return; 2113 } 2114 break; 2115 2116 default: 2117 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2118 break; 2119 // Fallthrough 2120 case ISD::INTRINSIC_WO_CHAIN: 2121 case ISD::INTRINSIC_W_CHAIN: 2122 case ISD::INTRINSIC_VOID: 2123 // Allow the target to implement this method for its nodes. 2124 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2125 return; 2126 } 2127} 2128 2129/// ComputeNumSignBits - Return the number of times the sign bit of the 2130/// register is replicated into the other bits. We know that at least 1 bit 2131/// is always equal to the sign bit (itself), but other cases can give us 2132/// information. For example, immediately after an "SRA X, 2", we know that 2133/// the top 3 bits are all equal to each other, so we return 3. 2134unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2135 EVT VT = Op.getValueType(); 2136 assert(VT.isInteger() && "Invalid VT!"); 2137 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2138 unsigned Tmp, Tmp2; 2139 unsigned FirstAnswer = 1; 2140 2141 if (Depth == 6) 2142 return 1; // Limit search depth. 2143 2144 switch (Op.getOpcode()) { 2145 default: break; 2146 case ISD::AssertSext: 2147 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2148 return VTBits-Tmp+1; 2149 case ISD::AssertZext: 2150 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2151 return VTBits-Tmp; 2152 2153 case ISD::Constant: { 2154 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2155 return Val.getNumSignBits(); 2156 } 2157 2158 case ISD::SIGN_EXTEND: 2159 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2160 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2161 2162 case ISD::SIGN_EXTEND_INREG: 2163 // Max of the input and what this extends. 2164 Tmp = 2165 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2166 Tmp = VTBits-Tmp+1; 2167 2168 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2169 return std::max(Tmp, Tmp2); 2170 2171 case ISD::SRA: 2172 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2173 // SRA X, C -> adds C sign bits. 2174 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2175 Tmp += C->getZExtValue(); 2176 if (Tmp > VTBits) Tmp = VTBits; 2177 } 2178 return Tmp; 2179 case ISD::SHL: 2180 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2181 // shl destroys sign bits. 2182 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2183 if (C->getZExtValue() >= VTBits || // Bad shift. 2184 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2185 return Tmp - C->getZExtValue(); 2186 } 2187 break; 2188 case ISD::AND: 2189 case ISD::OR: 2190 case ISD::XOR: // NOT is handled here. 2191 // Logical binary ops preserve the number of sign bits at the worst. 2192 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2193 if (Tmp != 1) { 2194 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2195 FirstAnswer = std::min(Tmp, Tmp2); 2196 // We computed what we know about the sign bits as our first 2197 // answer. Now proceed to the generic code that uses 2198 // ComputeMaskedBits, and pick whichever answer is better. 2199 } 2200 break; 2201 2202 case ISD::SELECT: 2203 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2204 if (Tmp == 1) return 1; // Early out. 2205 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2206 return std::min(Tmp, Tmp2); 2207 2208 case ISD::SADDO: 2209 case ISD::UADDO: 2210 case ISD::SSUBO: 2211 case ISD::USUBO: 2212 case ISD::SMULO: 2213 case ISD::UMULO: 2214 if (Op.getResNo() != 1) 2215 break; 2216 // The boolean result conforms to getBooleanContents. Fall through. 2217 case ISD::SETCC: 2218 // If setcc returns 0/-1, all bits are sign bits. 2219 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2220 TargetLowering::ZeroOrNegativeOneBooleanContent) 2221 return VTBits; 2222 break; 2223 case ISD::ROTL: 2224 case ISD::ROTR: 2225 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2226 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2227 2228 // Handle rotate right by N like a rotate left by 32-N. 2229 if (Op.getOpcode() == ISD::ROTR) 2230 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2231 2232 // If we aren't rotating out all of the known-in sign bits, return the 2233 // number that are left. This handles rotl(sext(x), 1) for example. 2234 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2235 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2236 } 2237 break; 2238 case ISD::ADD: 2239 // Add can have at most one carry bit. Thus we know that the output 2240 // is, at worst, one more bit than the inputs. 2241 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2242 if (Tmp == 1) return 1; // Early out. 2243 2244 // Special case decrementing a value (ADD X, -1): 2245 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2246 if (CRHS->isAllOnesValue()) { 2247 APInt KnownZero, KnownOne; 2248 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2249 2250 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2251 // sign bits set. 2252 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2253 return VTBits; 2254 2255 // If we are subtracting one from a positive number, there is no carry 2256 // out of the result. 2257 if (KnownZero.isNegative()) 2258 return Tmp; 2259 } 2260 2261 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2262 if (Tmp2 == 1) return 1; 2263 return std::min(Tmp, Tmp2)-1; 2264 2265 case ISD::SUB: 2266 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2267 if (Tmp2 == 1) return 1; 2268 2269 // Handle NEG. 2270 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2271 if (CLHS->isNullValue()) { 2272 APInt KnownZero, KnownOne; 2273 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2274 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2275 // sign bits set. 2276 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2277 return VTBits; 2278 2279 // If the input is known to be positive (the sign bit is known clear), 2280 // the output of the NEG has the same number of sign bits as the input. 2281 if (KnownZero.isNegative()) 2282 return Tmp2; 2283 2284 // Otherwise, we treat this like a SUB. 2285 } 2286 2287 // Sub can have at most one carry bit. Thus we know that the output 2288 // is, at worst, one more bit than the inputs. 2289 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2290 if (Tmp == 1) return 1; // Early out. 2291 return std::min(Tmp, Tmp2)-1; 2292 case ISD::TRUNCATE: 2293 // FIXME: it's tricky to do anything useful for this, but it is an important 2294 // case for targets like X86. 2295 break; 2296 } 2297 2298 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2299 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2300 unsigned ExtType = LD->getExtensionType(); 2301 switch (ExtType) { 2302 default: break; 2303 case ISD::SEXTLOAD: // '17' bits known 2304 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2305 return VTBits-Tmp+1; 2306 case ISD::ZEXTLOAD: // '16' bits known 2307 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2308 return VTBits-Tmp; 2309 } 2310 } 2311 2312 // Allow the target to implement this method for its nodes. 2313 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2314 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2315 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2316 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2317 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2318 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2319 } 2320 2321 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2322 // use this information. 2323 APInt KnownZero, KnownOne; 2324 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2325 2326 APInt Mask; 2327 if (KnownZero.isNegative()) { // sign bit is 0 2328 Mask = KnownZero; 2329 } else if (KnownOne.isNegative()) { // sign bit is 1; 2330 Mask = KnownOne; 2331 } else { 2332 // Nothing known. 2333 return FirstAnswer; 2334 } 2335 2336 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2337 // the number of identical bits in the top of the input value. 2338 Mask = ~Mask; 2339 Mask <<= Mask.getBitWidth()-VTBits; 2340 // Return # leading zeros. We use 'min' here in case Val was zero before 2341 // shifting. We don't want to return '64' as for an i32 "0". 2342 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2343} 2344 2345/// isBaseWithConstantOffset - Return true if the specified operand is an 2346/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2347/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2348/// semantics as an ADD. This handles the equivalence: 2349/// X|Cst == X+Cst iff X&Cst = 0. 2350bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2351 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2352 !isa<ConstantSDNode>(Op.getOperand(1))) 2353 return false; 2354 2355 if (Op.getOpcode() == ISD::OR && 2356 !MaskedValueIsZero(Op.getOperand(0), 2357 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2358 return false; 2359 2360 return true; 2361} 2362 2363 2364bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2365 // If we're told that NaNs won't happen, assume they won't. 2366 if (getTarget().Options.NoNaNsFPMath) 2367 return true; 2368 2369 // If the value is a constant, we can obviously see if it is a NaN or not. 2370 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2371 return !C->getValueAPF().isNaN(); 2372 2373 // TODO: Recognize more cases here. 2374 2375 return false; 2376} 2377 2378bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2379 // If the value is a constant, we can obviously see if it is a zero or not. 2380 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2381 return !C->isZero(); 2382 2383 // TODO: Recognize more cases here. 2384 switch (Op.getOpcode()) { 2385 default: break; 2386 case ISD::OR: 2387 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2388 return !C->isNullValue(); 2389 break; 2390 } 2391 2392 return false; 2393} 2394 2395bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2396 // Check the obvious case. 2397 if (A == B) return true; 2398 2399 // For for negative and positive zero. 2400 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2401 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2402 if (CA->isZero() && CB->isZero()) return true; 2403 2404 // Otherwise they may not be equal. 2405 return false; 2406} 2407 2408/// getNode - Gets or creates the specified node. 2409/// 2410SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2411 FoldingSetNodeID ID; 2412 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2413 void *IP = 0; 2414 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2415 return SDValue(E, 0); 2416 2417 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2418 CSEMap.InsertNode(N, IP); 2419 2420 AllNodes.push_back(N); 2421#ifndef NDEBUG 2422 VerifySDNode(N); 2423#endif 2424 return SDValue(N, 0); 2425} 2426 2427SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2428 EVT VT, SDValue Operand) { 2429 // Constant fold unary operations with an integer constant operand. 2430 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2431 const APInt &Val = C->getAPIntValue(); 2432 switch (Opcode) { 2433 default: break; 2434 case ISD::SIGN_EXTEND: 2435 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2436 case ISD::ANY_EXTEND: 2437 case ISD::ZERO_EXTEND: 2438 case ISD::TRUNCATE: 2439 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2440 case ISD::UINT_TO_FP: 2441 case ISD::SINT_TO_FP: { 2442 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2443 (void)apf.convertFromAPInt(Val, 2444 Opcode==ISD::SINT_TO_FP, 2445 APFloat::rmNearestTiesToEven); 2446 return getConstantFP(apf, VT); 2447 } 2448 case ISD::BITCAST: 2449 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2450 return getConstantFP(APFloat(Val), VT); 2451 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2452 return getConstantFP(APFloat(Val), VT); 2453 break; 2454 case ISD::BSWAP: 2455 return getConstant(Val.byteSwap(), VT); 2456 case ISD::CTPOP: 2457 return getConstant(Val.countPopulation(), VT); 2458 case ISD::CTLZ: 2459 case ISD::CTLZ_ZERO_UNDEF: 2460 return getConstant(Val.countLeadingZeros(), VT); 2461 case ISD::CTTZ: 2462 case ISD::CTTZ_ZERO_UNDEF: 2463 return getConstant(Val.countTrailingZeros(), VT); 2464 } 2465 } 2466 2467 // Constant fold unary operations with a floating point constant operand. 2468 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2469 APFloat V = C->getValueAPF(); // make copy 2470 switch (Opcode) { 2471 case ISD::FNEG: 2472 V.changeSign(); 2473 return getConstantFP(V, VT); 2474 case ISD::FABS: 2475 V.clearSign(); 2476 return getConstantFP(V, VT); 2477 case ISD::FCEIL: { 2478 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2479 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2480 return getConstantFP(V, VT); 2481 break; 2482 } 2483 case ISD::FTRUNC: { 2484 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2485 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2486 return getConstantFP(V, VT); 2487 break; 2488 } 2489 case ISD::FFLOOR: { 2490 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2491 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2492 return getConstantFP(V, VT); 2493 break; 2494 } 2495 case ISD::FP_EXTEND: { 2496 bool ignored; 2497 // This can return overflow, underflow, or inexact; we don't care. 2498 // FIXME need to be more flexible about rounding mode. 2499 (void)V.convert(*EVTToAPFloatSemantics(VT), 2500 APFloat::rmNearestTiesToEven, &ignored); 2501 return getConstantFP(V, VT); 2502 } 2503 case ISD::FP_TO_SINT: 2504 case ISD::FP_TO_UINT: { 2505 integerPart x[2]; 2506 bool ignored; 2507 assert(integerPartWidth >= 64); 2508 // FIXME need to be more flexible about rounding mode. 2509 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2510 Opcode==ISD::FP_TO_SINT, 2511 APFloat::rmTowardZero, &ignored); 2512 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2513 break; 2514 APInt api(VT.getSizeInBits(), x); 2515 return getConstant(api, VT); 2516 } 2517 case ISD::BITCAST: 2518 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2519 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2520 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2521 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2522 break; 2523 } 2524 } 2525 2526 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2527 switch (Opcode) { 2528 case ISD::TokenFactor: 2529 case ISD::MERGE_VALUES: 2530 case ISD::CONCAT_VECTORS: 2531 return Operand; // Factor, merge or concat of one node? No need. 2532 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2533 case ISD::FP_EXTEND: 2534 assert(VT.isFloatingPoint() && 2535 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2536 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2537 assert((!VT.isVector() || 2538 VT.getVectorNumElements() == 2539 Operand.getValueType().getVectorNumElements()) && 2540 "Vector element count mismatch!"); 2541 if (Operand.getOpcode() == ISD::UNDEF) 2542 return getUNDEF(VT); 2543 break; 2544 case ISD::SIGN_EXTEND: 2545 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2546 "Invalid SIGN_EXTEND!"); 2547 if (Operand.getValueType() == VT) return Operand; // noop extension 2548 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2549 "Invalid sext node, dst < src!"); 2550 assert((!VT.isVector() || 2551 VT.getVectorNumElements() == 2552 Operand.getValueType().getVectorNumElements()) && 2553 "Vector element count mismatch!"); 2554 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2555 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2556 else if (OpOpcode == ISD::UNDEF) 2557 // sext(undef) = 0, because the top bits will all be the same. 2558 return getConstant(0, VT); 2559 break; 2560 case ISD::ZERO_EXTEND: 2561 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2562 "Invalid ZERO_EXTEND!"); 2563 if (Operand.getValueType() == VT) return Operand; // noop extension 2564 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2565 "Invalid zext node, dst < src!"); 2566 assert((!VT.isVector() || 2567 VT.getVectorNumElements() == 2568 Operand.getValueType().getVectorNumElements()) && 2569 "Vector element count mismatch!"); 2570 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2571 return getNode(ISD::ZERO_EXTEND, DL, VT, 2572 Operand.getNode()->getOperand(0)); 2573 else if (OpOpcode == ISD::UNDEF) 2574 // zext(undef) = 0, because the top bits will be zero. 2575 return getConstant(0, VT); 2576 break; 2577 case ISD::ANY_EXTEND: 2578 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2579 "Invalid ANY_EXTEND!"); 2580 if (Operand.getValueType() == VT) return Operand; // noop extension 2581 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2582 "Invalid anyext node, dst < src!"); 2583 assert((!VT.isVector() || 2584 VT.getVectorNumElements() == 2585 Operand.getValueType().getVectorNumElements()) && 2586 "Vector element count mismatch!"); 2587 2588 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2589 OpOpcode == ISD::ANY_EXTEND) 2590 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2591 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2592 else if (OpOpcode == ISD::UNDEF) 2593 return getUNDEF(VT); 2594 2595 // (ext (trunx x)) -> x 2596 if (OpOpcode == ISD::TRUNCATE) { 2597 SDValue OpOp = Operand.getNode()->getOperand(0); 2598 if (OpOp.getValueType() == VT) 2599 return OpOp; 2600 } 2601 break; 2602 case ISD::TRUNCATE: 2603 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2604 "Invalid TRUNCATE!"); 2605 if (Operand.getValueType() == VT) return Operand; // noop truncate 2606 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2607 "Invalid truncate node, src < dst!"); 2608 assert((!VT.isVector() || 2609 VT.getVectorNumElements() == 2610 Operand.getValueType().getVectorNumElements()) && 2611 "Vector element count mismatch!"); 2612 if (OpOpcode == ISD::TRUNCATE) 2613 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2614 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2615 OpOpcode == ISD::ANY_EXTEND) { 2616 // If the source is smaller than the dest, we still need an extend. 2617 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2618 .bitsLT(VT.getScalarType())) 2619 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2620 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2621 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2622 return Operand.getNode()->getOperand(0); 2623 } 2624 if (OpOpcode == ISD::UNDEF) 2625 return getUNDEF(VT); 2626 break; 2627 case ISD::BITCAST: 2628 // Basic sanity checking. 2629 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2630 && "Cannot BITCAST between types of different sizes!"); 2631 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2632 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2633 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2634 if (OpOpcode == ISD::UNDEF) 2635 return getUNDEF(VT); 2636 break; 2637 case ISD::SCALAR_TO_VECTOR: 2638 assert(VT.isVector() && !Operand.getValueType().isVector() && 2639 (VT.getVectorElementType() == Operand.getValueType() || 2640 (VT.getVectorElementType().isInteger() && 2641 Operand.getValueType().isInteger() && 2642 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2643 "Illegal SCALAR_TO_VECTOR node!"); 2644 if (OpOpcode == ISD::UNDEF) 2645 return getUNDEF(VT); 2646 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2647 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2648 isa<ConstantSDNode>(Operand.getOperand(1)) && 2649 Operand.getConstantOperandVal(1) == 0 && 2650 Operand.getOperand(0).getValueType() == VT) 2651 return Operand.getOperand(0); 2652 break; 2653 case ISD::FNEG: 2654 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2655 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2656 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2657 Operand.getNode()->getOperand(0)); 2658 if (OpOpcode == ISD::FNEG) // --X -> X 2659 return Operand.getNode()->getOperand(0); 2660 break; 2661 case ISD::FABS: 2662 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2663 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2664 break; 2665 } 2666 2667 SDNode *N; 2668 SDVTList VTs = getVTList(VT); 2669 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2670 FoldingSetNodeID ID; 2671 SDValue Ops[1] = { Operand }; 2672 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2673 void *IP = 0; 2674 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2675 return SDValue(E, 0); 2676 2677 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2678 CSEMap.InsertNode(N, IP); 2679 } else { 2680 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2681 } 2682 2683 AllNodes.push_back(N); 2684#ifndef NDEBUG 2685 VerifySDNode(N); 2686#endif 2687 return SDValue(N, 0); 2688} 2689 2690SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2691 EVT VT, 2692 ConstantSDNode *Cst1, 2693 ConstantSDNode *Cst2) { 2694 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2695 2696 switch (Opcode) { 2697 case ISD::ADD: return getConstant(C1 + C2, VT); 2698 case ISD::SUB: return getConstant(C1 - C2, VT); 2699 case ISD::MUL: return getConstant(C1 * C2, VT); 2700 case ISD::UDIV: 2701 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2702 break; 2703 case ISD::UREM: 2704 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2705 break; 2706 case ISD::SDIV: 2707 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2708 break; 2709 case ISD::SREM: 2710 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2711 break; 2712 case ISD::AND: return getConstant(C1 & C2, VT); 2713 case ISD::OR: return getConstant(C1 | C2, VT); 2714 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2715 case ISD::SHL: return getConstant(C1 << C2, VT); 2716 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2717 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2718 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2719 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2720 default: break; 2721 } 2722 2723 return SDValue(); 2724} 2725 2726SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2727 SDValue N1, SDValue N2) { 2728 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2729 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2730 switch (Opcode) { 2731 default: break; 2732 case ISD::TokenFactor: 2733 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2734 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2735 // Fold trivial token factors. 2736 if (N1.getOpcode() == ISD::EntryToken) return N2; 2737 if (N2.getOpcode() == ISD::EntryToken) return N1; 2738 if (N1 == N2) return N1; 2739 break; 2740 case ISD::CONCAT_VECTORS: 2741 // Concat of UNDEFs is UNDEF. 2742 if (N1.getOpcode() == ISD::UNDEF && 2743 N2.getOpcode() == ISD::UNDEF) 2744 return getUNDEF(VT); 2745 2746 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2747 // one big BUILD_VECTOR. 2748 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2749 N2.getOpcode() == ISD::BUILD_VECTOR) { 2750 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2751 N1.getNode()->op_end()); 2752 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2753 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2754 } 2755 break; 2756 case ISD::AND: 2757 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2758 assert(N1.getValueType() == N2.getValueType() && 2759 N1.getValueType() == VT && "Binary operator types must match!"); 2760 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2761 // worth handling here. 2762 if (N2C && N2C->isNullValue()) 2763 return N2; 2764 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2765 return N1; 2766 break; 2767 case ISD::OR: 2768 case ISD::XOR: 2769 case ISD::ADD: 2770 case ISD::SUB: 2771 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2772 assert(N1.getValueType() == N2.getValueType() && 2773 N1.getValueType() == VT && "Binary operator types must match!"); 2774 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2775 // it's worth handling here. 2776 if (N2C && N2C->isNullValue()) 2777 return N1; 2778 break; 2779 case ISD::UDIV: 2780 case ISD::UREM: 2781 case ISD::MULHU: 2782 case ISD::MULHS: 2783 case ISD::MUL: 2784 case ISD::SDIV: 2785 case ISD::SREM: 2786 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2787 assert(N1.getValueType() == N2.getValueType() && 2788 N1.getValueType() == VT && "Binary operator types must match!"); 2789 break; 2790 case ISD::FADD: 2791 case ISD::FSUB: 2792 case ISD::FMUL: 2793 case ISD::FDIV: 2794 case ISD::FREM: 2795 if (getTarget().Options.UnsafeFPMath) { 2796 if (Opcode == ISD::FADD) { 2797 // 0+x --> x 2798 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2799 if (CFP->getValueAPF().isZero()) 2800 return N2; 2801 // x+0 --> x 2802 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2803 if (CFP->getValueAPF().isZero()) 2804 return N1; 2805 } else if (Opcode == ISD::FSUB) { 2806 // x-0 --> x 2807 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2808 if (CFP->getValueAPF().isZero()) 2809 return N1; 2810 } else if (Opcode == ISD::FMUL) { 2811 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1); 2812 SDValue V = N2; 2813 2814 // If the first operand isn't the constant, try the second 2815 if (!CFP) { 2816 CFP = dyn_cast<ConstantFPSDNode>(N2); 2817 V = N1; 2818 } 2819 2820 if (CFP) { 2821 // 0*x --> 0 2822 if (CFP->isZero()) 2823 return SDValue(CFP,0); 2824 // 1*x --> x 2825 if (CFP->isExactlyValue(1.0)) 2826 return V; 2827 } 2828 } 2829 } 2830 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2831 assert(N1.getValueType() == N2.getValueType() && 2832 N1.getValueType() == VT && "Binary operator types must match!"); 2833 break; 2834 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2835 assert(N1.getValueType() == VT && 2836 N1.getValueType().isFloatingPoint() && 2837 N2.getValueType().isFloatingPoint() && 2838 "Invalid FCOPYSIGN!"); 2839 break; 2840 case ISD::SHL: 2841 case ISD::SRA: 2842 case ISD::SRL: 2843 case ISD::ROTL: 2844 case ISD::ROTR: 2845 assert(VT == N1.getValueType() && 2846 "Shift operators return type must be the same as their first arg"); 2847 assert(VT.isInteger() && N2.getValueType().isInteger() && 2848 "Shifts only work on integers"); 2849 // Verify that the shift amount VT is bit enough to hold valid shift 2850 // amounts. This catches things like trying to shift an i1024 value by an 2851 // i8, which is easy to fall into in generic code that uses 2852 // TLI.getShiftAmount(). 2853 assert(N2.getValueType().getSizeInBits() >= 2854 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2855 "Invalid use of small shift amount with oversized value!"); 2856 2857 // Always fold shifts of i1 values so the code generator doesn't need to 2858 // handle them. Since we know the size of the shift has to be less than the 2859 // size of the value, the shift/rotate count is guaranteed to be zero. 2860 if (VT == MVT::i1) 2861 return N1; 2862 if (N2C && N2C->isNullValue()) 2863 return N1; 2864 break; 2865 case ISD::FP_ROUND_INREG: { 2866 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2867 assert(VT == N1.getValueType() && "Not an inreg round!"); 2868 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2869 "Cannot FP_ROUND_INREG integer types"); 2870 assert(EVT.isVector() == VT.isVector() && 2871 "FP_ROUND_INREG type should be vector iff the operand " 2872 "type is vector!"); 2873 assert((!EVT.isVector() || 2874 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2875 "Vector element counts must match in FP_ROUND_INREG"); 2876 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2877 (void)EVT; 2878 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2879 break; 2880 } 2881 case ISD::FP_ROUND: 2882 assert(VT.isFloatingPoint() && 2883 N1.getValueType().isFloatingPoint() && 2884 VT.bitsLE(N1.getValueType()) && 2885 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2886 if (N1.getValueType() == VT) return N1; // noop conversion. 2887 break; 2888 case ISD::AssertSext: 2889 case ISD::AssertZext: { 2890 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2891 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2892 assert(VT.isInteger() && EVT.isInteger() && 2893 "Cannot *_EXTEND_INREG FP types"); 2894 assert(!EVT.isVector() && 2895 "AssertSExt/AssertZExt type should be the vector element type " 2896 "rather than the vector type!"); 2897 assert(EVT.bitsLE(VT) && "Not extending!"); 2898 if (VT == EVT) return N1; // noop assertion. 2899 break; 2900 } 2901 case ISD::SIGN_EXTEND_INREG: { 2902 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2903 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2904 assert(VT.isInteger() && EVT.isInteger() && 2905 "Cannot *_EXTEND_INREG FP types"); 2906 assert(EVT.isVector() == VT.isVector() && 2907 "SIGN_EXTEND_INREG type should be vector iff the operand " 2908 "type is vector!"); 2909 assert((!EVT.isVector() || 2910 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2911 "Vector element counts must match in SIGN_EXTEND_INREG"); 2912 assert(EVT.bitsLE(VT) && "Not extending!"); 2913 if (EVT == VT) return N1; // Not actually extending 2914 2915 if (N1C) { 2916 APInt Val = N1C->getAPIntValue(); 2917 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2918 Val <<= Val.getBitWidth()-FromBits; 2919 Val = Val.ashr(Val.getBitWidth()-FromBits); 2920 return getConstant(Val, VT); 2921 } 2922 break; 2923 } 2924 case ISD::EXTRACT_VECTOR_ELT: 2925 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2926 if (N1.getOpcode() == ISD::UNDEF) 2927 return getUNDEF(VT); 2928 2929 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2930 // expanding copies of large vectors from registers. 2931 if (N2C && 2932 N1.getOpcode() == ISD::CONCAT_VECTORS && 2933 N1.getNumOperands() > 0) { 2934 unsigned Factor = 2935 N1.getOperand(0).getValueType().getVectorNumElements(); 2936 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2937 N1.getOperand(N2C->getZExtValue() / Factor), 2938 getConstant(N2C->getZExtValue() % Factor, 2939 N2.getValueType())); 2940 } 2941 2942 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2943 // expanding large vector constants. 2944 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2945 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2946 2947 if (VT != Elt.getValueType()) 2948 // If the vector element type is not legal, the BUILD_VECTOR operands 2949 // are promoted and implicitly truncated, and the result implicitly 2950 // extended. Make that explicit here. 2951 Elt = getAnyExtOrTrunc(Elt, DL, VT); 2952 2953 return Elt; 2954 } 2955 2956 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2957 // operations are lowered to scalars. 2958 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2959 // If the indices are the same, return the inserted element else 2960 // if the indices are known different, extract the element from 2961 // the original vector. 2962 SDValue N1Op2 = N1.getOperand(2); 2963 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2964 2965 if (N1Op2C && N2C) { 2966 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2967 if (VT == N1.getOperand(1).getValueType()) 2968 return N1.getOperand(1); 2969 else 2970 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2971 } 2972 2973 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2974 } 2975 } 2976 break; 2977 case ISD::EXTRACT_ELEMENT: 2978 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2979 assert(!N1.getValueType().isVector() && !VT.isVector() && 2980 (N1.getValueType().isInteger() == VT.isInteger()) && 2981 N1.getValueType() != VT && 2982 "Wrong types for EXTRACT_ELEMENT!"); 2983 2984 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2985 // 64-bit integers into 32-bit parts. Instead of building the extract of 2986 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2987 if (N1.getOpcode() == ISD::BUILD_PAIR) 2988 return N1.getOperand(N2C->getZExtValue()); 2989 2990 // EXTRACT_ELEMENT of a constant int is also very common. 2991 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2992 unsigned ElementSize = VT.getSizeInBits(); 2993 unsigned Shift = ElementSize * N2C->getZExtValue(); 2994 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2995 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2996 } 2997 break; 2998 case ISD::EXTRACT_SUBVECTOR: { 2999 SDValue Index = N2; 3000 if (VT.isSimple() && N1.getValueType().isSimple()) { 3001 assert(VT.isVector() && N1.getValueType().isVector() && 3002 "Extract subvector VTs must be a vectors!"); 3003 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 3004 "Extract subvector VTs must have the same element type!"); 3005 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 3006 "Extract subvector must be from larger vector to smaller vector!"); 3007 3008 if (isa<ConstantSDNode>(Index.getNode())) { 3009 assert((VT.getVectorNumElements() + 3010 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3011 <= N1.getValueType().getVectorNumElements()) 3012 && "Extract subvector overflow!"); 3013 } 3014 3015 // Trivial extraction. 3016 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 3017 return N1; 3018 } 3019 break; 3020 } 3021 } 3022 3023 if (N1C) { 3024 if (N2C) { 3025 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 3026 if (SV.getNode()) return SV; 3027 } else { // Cannonicalize constant to RHS if commutative 3028 if (isCommutativeBinOp(Opcode)) { 3029 std::swap(N1C, N2C); 3030 std::swap(N1, N2); 3031 } 3032 } 3033 } 3034 3035 // Constant fold FP operations. 3036 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3037 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3038 if (N1CFP) { 3039 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3040 // Cannonicalize constant to RHS if commutative 3041 std::swap(N1CFP, N2CFP); 3042 std::swap(N1, N2); 3043 } else if (N2CFP) { 3044 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3045 APFloat::opStatus s; 3046 switch (Opcode) { 3047 case ISD::FADD: 3048 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3049 if (s != APFloat::opInvalidOp) 3050 return getConstantFP(V1, VT); 3051 break; 3052 case ISD::FSUB: 3053 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3054 if (s!=APFloat::opInvalidOp) 3055 return getConstantFP(V1, VT); 3056 break; 3057 case ISD::FMUL: 3058 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3059 if (s!=APFloat::opInvalidOp) 3060 return getConstantFP(V1, VT); 3061 break; 3062 case ISD::FDIV: 3063 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3064 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3065 return getConstantFP(V1, VT); 3066 break; 3067 case ISD::FREM : 3068 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3069 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3070 return getConstantFP(V1, VT); 3071 break; 3072 case ISD::FCOPYSIGN: 3073 V1.copySign(V2); 3074 return getConstantFP(V1, VT); 3075 default: break; 3076 } 3077 } 3078 3079 if (Opcode == ISD::FP_ROUND) { 3080 APFloat V = N1CFP->getValueAPF(); // make copy 3081 bool ignored; 3082 // This can return overflow, underflow, or inexact; we don't care. 3083 // FIXME need to be more flexible about rounding mode. 3084 (void)V.convert(*EVTToAPFloatSemantics(VT), 3085 APFloat::rmNearestTiesToEven, &ignored); 3086 return getConstantFP(V, VT); 3087 } 3088 } 3089 3090 // Canonicalize an UNDEF to the RHS, even over a constant. 3091 if (N1.getOpcode() == ISD::UNDEF) { 3092 if (isCommutativeBinOp(Opcode)) { 3093 std::swap(N1, N2); 3094 } else { 3095 switch (Opcode) { 3096 case ISD::FP_ROUND_INREG: 3097 case ISD::SIGN_EXTEND_INREG: 3098 case ISD::SUB: 3099 case ISD::FSUB: 3100 case ISD::FDIV: 3101 case ISD::FREM: 3102 case ISD::SRA: 3103 return N1; // fold op(undef, arg2) -> undef 3104 case ISD::UDIV: 3105 case ISD::SDIV: 3106 case ISD::UREM: 3107 case ISD::SREM: 3108 case ISD::SRL: 3109 case ISD::SHL: 3110 if (!VT.isVector()) 3111 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3112 // For vectors, we can't easily build an all zero vector, just return 3113 // the LHS. 3114 return N2; 3115 } 3116 } 3117 } 3118 3119 // Fold a bunch of operators when the RHS is undef. 3120 if (N2.getOpcode() == ISD::UNDEF) { 3121 switch (Opcode) { 3122 case ISD::XOR: 3123 if (N1.getOpcode() == ISD::UNDEF) 3124 // Handle undef ^ undef -> 0 special case. This is a common 3125 // idiom (misuse). 3126 return getConstant(0, VT); 3127 // fallthrough 3128 case ISD::ADD: 3129 case ISD::ADDC: 3130 case ISD::ADDE: 3131 case ISD::SUB: 3132 case ISD::UDIV: 3133 case ISD::SDIV: 3134 case ISD::UREM: 3135 case ISD::SREM: 3136 return N2; // fold op(arg1, undef) -> undef 3137 case ISD::FADD: 3138 case ISD::FSUB: 3139 case ISD::FMUL: 3140 case ISD::FDIV: 3141 case ISD::FREM: 3142 if (getTarget().Options.UnsafeFPMath) 3143 return N2; 3144 break; 3145 case ISD::MUL: 3146 case ISD::AND: 3147 case ISD::SRL: 3148 case ISD::SHL: 3149 if (!VT.isVector()) 3150 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3151 // For vectors, we can't easily build an all zero vector, just return 3152 // the LHS. 3153 return N1; 3154 case ISD::OR: 3155 if (!VT.isVector()) 3156 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3157 // For vectors, we can't easily build an all one vector, just return 3158 // the LHS. 3159 return N1; 3160 case ISD::SRA: 3161 return N1; 3162 } 3163 } 3164 3165 // Memoize this node if possible. 3166 SDNode *N; 3167 SDVTList VTs = getVTList(VT); 3168 if (VT != MVT::Glue) { 3169 SDValue Ops[] = { N1, N2 }; 3170 FoldingSetNodeID ID; 3171 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3172 void *IP = 0; 3173 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3174 return SDValue(E, 0); 3175 3176 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3177 CSEMap.InsertNode(N, IP); 3178 } else { 3179 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3180 } 3181 3182 AllNodes.push_back(N); 3183#ifndef NDEBUG 3184 VerifySDNode(N); 3185#endif 3186 return SDValue(N, 0); 3187} 3188 3189SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3190 SDValue N1, SDValue N2, SDValue N3) { 3191 // Perform various simplifications. 3192 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3193 switch (Opcode) { 3194 case ISD::CONCAT_VECTORS: 3195 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3196 // one big BUILD_VECTOR. 3197 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3198 N2.getOpcode() == ISD::BUILD_VECTOR && 3199 N3.getOpcode() == ISD::BUILD_VECTOR) { 3200 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3201 N1.getNode()->op_end()); 3202 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3203 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3204 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3205 } 3206 break; 3207 case ISD::SETCC: { 3208 // Use FoldSetCC to simplify SETCC's. 3209 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3210 if (Simp.getNode()) return Simp; 3211 break; 3212 } 3213 case ISD::SELECT: 3214 if (N1C) { 3215 if (N1C->getZExtValue()) 3216 return N2; // select true, X, Y -> X 3217 return N3; // select false, X, Y -> Y 3218 } 3219 3220 if (N2 == N3) return N2; // select C, X, X -> X 3221 break; 3222 case ISD::VECTOR_SHUFFLE: 3223 llvm_unreachable("should use getVectorShuffle constructor!"); 3224 case ISD::INSERT_SUBVECTOR: { 3225 SDValue Index = N3; 3226 if (VT.isSimple() && N1.getValueType().isSimple() 3227 && N2.getValueType().isSimple()) { 3228 assert(VT.isVector() && N1.getValueType().isVector() && 3229 N2.getValueType().isVector() && 3230 "Insert subvector VTs must be a vectors"); 3231 assert(VT == N1.getValueType() && 3232 "Dest and insert subvector source types must match!"); 3233 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3234 "Insert subvector must be from smaller vector to larger vector!"); 3235 if (isa<ConstantSDNode>(Index.getNode())) { 3236 assert((N2.getValueType().getVectorNumElements() + 3237 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3238 <= VT.getVectorNumElements()) 3239 && "Insert subvector overflow!"); 3240 } 3241 3242 // Trivial insertion. 3243 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3244 return N2; 3245 } 3246 break; 3247 } 3248 case ISD::BITCAST: 3249 // Fold bit_convert nodes from a type to themselves. 3250 if (N1.getValueType() == VT) 3251 return N1; 3252 break; 3253 } 3254 3255 // Memoize node if it doesn't produce a flag. 3256 SDNode *N; 3257 SDVTList VTs = getVTList(VT); 3258 if (VT != MVT::Glue) { 3259 SDValue Ops[] = { N1, N2, N3 }; 3260 FoldingSetNodeID ID; 3261 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3262 void *IP = 0; 3263 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3264 return SDValue(E, 0); 3265 3266 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3267 CSEMap.InsertNode(N, IP); 3268 } else { 3269 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3270 } 3271 3272 AllNodes.push_back(N); 3273#ifndef NDEBUG 3274 VerifySDNode(N); 3275#endif 3276 return SDValue(N, 0); 3277} 3278 3279SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3280 SDValue N1, SDValue N2, SDValue N3, 3281 SDValue N4) { 3282 SDValue Ops[] = { N1, N2, N3, N4 }; 3283 return getNode(Opcode, DL, VT, Ops, 4); 3284} 3285 3286SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3287 SDValue N1, SDValue N2, SDValue N3, 3288 SDValue N4, SDValue N5) { 3289 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3290 return getNode(Opcode, DL, VT, Ops, 5); 3291} 3292 3293/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3294/// the incoming stack arguments to be loaded from the stack. 3295SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3296 SmallVector<SDValue, 8> ArgChains; 3297 3298 // Include the original chain at the beginning of the list. When this is 3299 // used by target LowerCall hooks, this helps legalize find the 3300 // CALLSEQ_BEGIN node. 3301 ArgChains.push_back(Chain); 3302 3303 // Add a chain value for each stack argument. 3304 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3305 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3306 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3307 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3308 if (FI->getIndex() < 0) 3309 ArgChains.push_back(SDValue(L, 1)); 3310 3311 // Build a tokenfactor for all the chains. 3312 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3313 &ArgChains[0], ArgChains.size()); 3314} 3315 3316/// SplatByte - Distribute ByteVal over NumBits bits. 3317static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3318 APInt Val = APInt(NumBits, ByteVal); 3319 unsigned Shift = 8; 3320 for (unsigned i = NumBits; i > 8; i >>= 1) { 3321 Val = (Val << Shift) | Val; 3322 Shift <<= 1; 3323 } 3324 return Val; 3325} 3326 3327/// getMemsetValue - Vectorized representation of the memset value 3328/// operand. 3329static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3330 DebugLoc dl) { 3331 assert(Value.getOpcode() != ISD::UNDEF); 3332 3333 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3334 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3335 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3336 if (VT.isInteger()) 3337 return DAG.getConstant(Val, VT); 3338 return DAG.getConstantFP(APFloat(Val), VT); 3339 } 3340 3341 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3342 if (NumBits > 8) { 3343 // Use a multiplication with 0x010101... to extend the input to the 3344 // required length. 3345 APInt Magic = SplatByte(NumBits, 0x01); 3346 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3347 } 3348 3349 return Value; 3350} 3351 3352/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3353/// used when a memcpy is turned into a memset when the source is a constant 3354/// string ptr. 3355static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3356 const TargetLowering &TLI, StringRef Str) { 3357 // Handle vector with all elements zero. 3358 if (Str.empty()) { 3359 if (VT.isInteger()) 3360 return DAG.getConstant(0, VT); 3361 else if (VT == MVT::f32 || VT == MVT::f64) 3362 return DAG.getConstantFP(0.0, VT); 3363 else if (VT.isVector()) { 3364 unsigned NumElts = VT.getVectorNumElements(); 3365 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3366 return DAG.getNode(ISD::BITCAST, dl, VT, 3367 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3368 EltVT, NumElts))); 3369 } else 3370 llvm_unreachable("Expected type!"); 3371 } 3372 3373 assert(!VT.isVector() && "Can't handle vector type here!"); 3374 unsigned NumVTBytes = VT.getSizeInBits() / 8; 3375 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3376 3377 APInt Val(NumBytes*8, 0); 3378 if (TLI.isLittleEndian()) { 3379 for (unsigned i = 0; i != NumBytes; ++i) 3380 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3381 } else { 3382 for (unsigned i = 0; i != NumBytes; ++i) 3383 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3384 } 3385 3386 // If the "cost" of materializing the integer immediate is 1 or free, then 3387 // it is cost effective to turn the load into the immediate. 3388 if (DAG.getTarget().getScalarTargetTransformInfo()-> 3389 getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2) 3390 return DAG.getConstant(Val, VT); 3391 return SDValue(0, 0); 3392} 3393 3394/// getMemBasePlusOffset - Returns base and offset node for the 3395/// 3396static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3397 SelectionDAG &DAG) { 3398 EVT VT = Base.getValueType(); 3399 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3400 VT, Base, DAG.getConstant(Offset, VT)); 3401} 3402 3403/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3404/// 3405static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3406 unsigned SrcDelta = 0; 3407 GlobalAddressSDNode *G = NULL; 3408 if (Src.getOpcode() == ISD::GlobalAddress) 3409 G = cast<GlobalAddressSDNode>(Src); 3410 else if (Src.getOpcode() == ISD::ADD && 3411 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3412 Src.getOperand(1).getOpcode() == ISD::Constant) { 3413 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3414 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3415 } 3416 if (!G) 3417 return false; 3418 3419 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3420} 3421 3422/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3423/// to replace the memset / memcpy. Return true if the number of memory ops 3424/// is below the threshold. It returns the types of the sequence of 3425/// memory ops to perform memset / memcpy by reference. 3426static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3427 unsigned Limit, uint64_t Size, 3428 unsigned DstAlign, unsigned SrcAlign, 3429 bool ZeroOrLdSrc, 3430 bool MemcpyStrSrc, 3431 bool AllowOverlap, 3432 SelectionDAG &DAG, 3433 const TargetLowering &TLI) { 3434 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3435 "Expecting memcpy / memset source to meet alignment requirement!"); 3436 // If 'SrcAlign' is zero, that means the memory operation does not need to 3437 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3438 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3439 // is the specified alignment of the memory operation. If it is zero, that 3440 // means it's possible to change the alignment of the destination. 3441 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3442 // not need to be loaded. 3443 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3444 ZeroOrLdSrc, MemcpyStrSrc, 3445 DAG.getMachineFunction()); 3446 3447 if (VT == MVT::Other) { 3448 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() || 3449 TLI.allowsUnalignedMemoryAccesses(VT)) { 3450 VT = TLI.getPointerTy(); 3451 } else { 3452 switch (DstAlign & 7) { 3453 case 0: VT = MVT::i64; break; 3454 case 4: VT = MVT::i32; break; 3455 case 2: VT = MVT::i16; break; 3456 default: VT = MVT::i8; break; 3457 } 3458 } 3459 3460 MVT LVT = MVT::i64; 3461 while (!TLI.isTypeLegal(LVT)) 3462 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3463 assert(LVT.isInteger()); 3464 3465 if (VT.bitsGT(LVT)) 3466 VT = LVT; 3467 } 3468 3469 unsigned NumMemOps = 0; 3470 while (Size != 0) { 3471 if (++NumMemOps > Limit) 3472 return false; 3473 3474 unsigned VTSize = VT.getSizeInBits() / 8; 3475 while (VTSize > Size) { 3476 // For now, only use non-vector load / store's for the left-over pieces. 3477 EVT NewVT = VT; 3478 unsigned NewVTSize; 3479 3480 bool Found = false; 3481 if (VT.isVector() || VT.isFloatingPoint()) { 3482 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; 3483 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) && 3484 TLI.isSafeMemOpType(NewVT.getSimpleVT())) 3485 Found = true; 3486 else if (NewVT == MVT::i64 && 3487 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) && 3488 TLI.isSafeMemOpType(MVT::f64)) { 3489 // i64 is usually not legal on 32-bit targets, but f64 may be. 3490 NewVT = MVT::f64; 3491 Found = true; 3492 } 3493 } 3494 3495 if (!Found) { 3496 do { 3497 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); 3498 if (NewVT == MVT::i8) 3499 break; 3500 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT())); 3501 } 3502 NewVTSize = NewVT.getSizeInBits() / 8; 3503 3504 // If the new VT cannot cover all of the remaining bits, then consider 3505 // issuing a (or a pair of) unaligned and overlapping load / store. 3506 // FIXME: Only does this for 64-bit or more since we don't have proper 3507 // cost model for unaligned load / store. 3508 bool Fast; 3509 if (AllowOverlap && VTSize >= 8 && NewVTSize < Size && 3510 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast) 3511 VTSize = Size; 3512 else { 3513 VT = NewVT; 3514 VTSize = NewVTSize; 3515 } 3516 } 3517 3518 MemOps.push_back(VT); 3519 Size -= VTSize; 3520 } 3521 3522 return true; 3523} 3524 3525static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3526 SDValue Chain, SDValue Dst, 3527 SDValue Src, uint64_t Size, 3528 unsigned Align, bool isVol, 3529 bool AlwaysInline, 3530 MachinePointerInfo DstPtrInfo, 3531 MachinePointerInfo SrcPtrInfo) { 3532 // Turn a memcpy of undef to nop. 3533 if (Src.getOpcode() == ISD::UNDEF) 3534 return Chain; 3535 3536 // Expand memcpy to a series of load and store ops if the size operand falls 3537 // below a certain threshold. 3538 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3539 // rather than maybe a humongous number of loads and stores. 3540 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3541 std::vector<EVT> MemOps; 3542 bool DstAlignCanChange = false; 3543 MachineFunction &MF = DAG.getMachineFunction(); 3544 MachineFrameInfo *MFI = MF.getFrameInfo(); 3545 bool OptSize = 3546 MF.getFunction()->getFnAttributes(). 3547 hasAttribute(Attributes::OptimizeForSize); 3548 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3549 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3550 DstAlignCanChange = true; 3551 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3552 if (Align > SrcAlign) 3553 SrcAlign = Align; 3554 StringRef Str; 3555 bool CopyFromStr = isMemSrcFromString(Src, Str); 3556 bool isZeroStr = CopyFromStr && Str.empty(); 3557 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3558 3559 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3560 (DstAlignCanChange ? 0 : Align), 3561 (isZeroStr ? 0 : SrcAlign), 3562 true, CopyFromStr, true, DAG, TLI)) 3563 return SDValue(); 3564 3565 if (DstAlignCanChange) { 3566 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3567 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3568 if (NewAlign > Align) { 3569 // Give the stack frame object a larger alignment if needed. 3570 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3571 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3572 Align = NewAlign; 3573 } 3574 } 3575 3576 SmallVector<SDValue, 8> OutChains; 3577 unsigned NumMemOps = MemOps.size(); 3578 uint64_t SrcOff = 0, DstOff = 0; 3579 for (unsigned i = 0; i != NumMemOps; ++i) { 3580 EVT VT = MemOps[i]; 3581 unsigned VTSize = VT.getSizeInBits() / 8; 3582 SDValue Value, Store; 3583 3584 if (VTSize > Size) { 3585 // Issuing an unaligned load / store pair that overlaps with the previous 3586 // pair. Adjust the offset accordingly. 3587 assert(i == NumMemOps-1 && i != 0); 3588 SrcOff -= VTSize - Size; 3589 DstOff -= VTSize - Size; 3590 } 3591 3592 if (CopyFromStr && 3593 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3594 // It's unlikely a store of a vector immediate can be done in a single 3595 // instruction. It would require a load from a constantpool first. 3596 // We only handle zero vectors here. 3597 // FIXME: Handle other cases where store of vector immediate is done in 3598 // a single instruction. 3599 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3600 if (Value.getNode()) 3601 Store = DAG.getStore(Chain, dl, Value, 3602 getMemBasePlusOffset(Dst, DstOff, DAG), 3603 DstPtrInfo.getWithOffset(DstOff), isVol, 3604 false, Align); 3605 } 3606 3607 if (!Store.getNode()) { 3608 // The type might not be legal for the target. This should only happen 3609 // if the type is smaller than a legal type, as on PPC, so the right 3610 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3611 // to Load/Store if NVT==VT. 3612 // FIXME does the case above also need this? 3613 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3614 assert(NVT.bitsGE(VT)); 3615 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3616 getMemBasePlusOffset(Src, SrcOff, DAG), 3617 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3618 MinAlign(SrcAlign, SrcOff)); 3619 Store = DAG.getTruncStore(Chain, dl, Value, 3620 getMemBasePlusOffset(Dst, DstOff, DAG), 3621 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3622 false, Align); 3623 } 3624 OutChains.push_back(Store); 3625 SrcOff += VTSize; 3626 DstOff += VTSize; 3627 Size -= VTSize; 3628 } 3629 3630 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3631 &OutChains[0], OutChains.size()); 3632} 3633 3634static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3635 SDValue Chain, SDValue Dst, 3636 SDValue Src, uint64_t Size, 3637 unsigned Align, bool isVol, 3638 bool AlwaysInline, 3639 MachinePointerInfo DstPtrInfo, 3640 MachinePointerInfo SrcPtrInfo) { 3641 // Turn a memmove of undef to nop. 3642 if (Src.getOpcode() == ISD::UNDEF) 3643 return Chain; 3644 3645 // Expand memmove to a series of load and store ops if the size operand falls 3646 // below a certain threshold. 3647 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3648 std::vector<EVT> MemOps; 3649 bool DstAlignCanChange = false; 3650 MachineFunction &MF = DAG.getMachineFunction(); 3651 MachineFrameInfo *MFI = MF.getFrameInfo(); 3652 bool OptSize = MF.getFunction()->getFnAttributes(). 3653 hasAttribute(Attributes::OptimizeForSize); 3654 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3655 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3656 DstAlignCanChange = true; 3657 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3658 if (Align > SrcAlign) 3659 SrcAlign = Align; 3660 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3661 3662 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3663 (DstAlignCanChange ? 0 : Align), 3664 SrcAlign, true, false, false, DAG, TLI)) 3665 return SDValue(); 3666 3667 if (DstAlignCanChange) { 3668 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3669 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3670 if (NewAlign > Align) { 3671 // Give the stack frame object a larger alignment if needed. 3672 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3673 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3674 Align = NewAlign; 3675 } 3676 } 3677 3678 uint64_t SrcOff = 0, DstOff = 0; 3679 SmallVector<SDValue, 8> LoadValues; 3680 SmallVector<SDValue, 8> LoadChains; 3681 SmallVector<SDValue, 8> OutChains; 3682 unsigned NumMemOps = MemOps.size(); 3683 for (unsigned i = 0; i < NumMemOps; i++) { 3684 EVT VT = MemOps[i]; 3685 unsigned VTSize = VT.getSizeInBits() / 8; 3686 SDValue Value, Store; 3687 3688 Value = DAG.getLoad(VT, dl, Chain, 3689 getMemBasePlusOffset(Src, SrcOff, DAG), 3690 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3691 false, false, SrcAlign); 3692 LoadValues.push_back(Value); 3693 LoadChains.push_back(Value.getValue(1)); 3694 SrcOff += VTSize; 3695 } 3696 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3697 &LoadChains[0], LoadChains.size()); 3698 OutChains.clear(); 3699 for (unsigned i = 0; i < NumMemOps; i++) { 3700 EVT VT = MemOps[i]; 3701 unsigned VTSize = VT.getSizeInBits() / 8; 3702 SDValue Value, Store; 3703 3704 Store = DAG.getStore(Chain, dl, LoadValues[i], 3705 getMemBasePlusOffset(Dst, DstOff, DAG), 3706 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3707 OutChains.push_back(Store); 3708 DstOff += VTSize; 3709 } 3710 3711 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3712 &OutChains[0], OutChains.size()); 3713} 3714 3715static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3716 SDValue Chain, SDValue Dst, 3717 SDValue Src, uint64_t Size, 3718 unsigned Align, bool isVol, 3719 MachinePointerInfo DstPtrInfo) { 3720 // Turn a memset of undef to nop. 3721 if (Src.getOpcode() == ISD::UNDEF) 3722 return Chain; 3723 3724 // Expand memset to a series of load/store ops if the size operand 3725 // falls below a certain threshold. 3726 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3727 std::vector<EVT> MemOps; 3728 bool DstAlignCanChange = false; 3729 MachineFunction &MF = DAG.getMachineFunction(); 3730 MachineFrameInfo *MFI = MF.getFrameInfo(); 3731 bool OptSize = MF.getFunction()->getFnAttributes(). 3732 hasAttribute(Attributes::OptimizeForSize); 3733 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3734 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3735 DstAlignCanChange = true; 3736 bool IsZeroVal = 3737 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3738 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3739 Size, (DstAlignCanChange ? 0 : Align), 0, 3740 IsZeroVal, false, true, DAG, TLI)) 3741 return SDValue(); 3742 3743 if (DstAlignCanChange) { 3744 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3745 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3746 if (NewAlign > Align) { 3747 // Give the stack frame object a larger alignment if needed. 3748 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3749 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3750 Align = NewAlign; 3751 } 3752 } 3753 3754 SmallVector<SDValue, 8> OutChains; 3755 uint64_t DstOff = 0; 3756 unsigned NumMemOps = MemOps.size(); 3757 3758 // Find the largest store and generate the bit pattern for it. 3759 EVT LargestVT = MemOps[0]; 3760 for (unsigned i = 1; i < NumMemOps; i++) 3761 if (MemOps[i].bitsGT(LargestVT)) 3762 LargestVT = MemOps[i]; 3763 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3764 3765 for (unsigned i = 0; i < NumMemOps; i++) { 3766 EVT VT = MemOps[i]; 3767 unsigned VTSize = VT.getSizeInBits() / 8; 3768 if (VTSize > Size) { 3769 // Issuing an unaligned load / store pair that overlaps with the previous 3770 // pair. Adjust the offset accordingly. 3771 assert(i == NumMemOps-1 && i != 0); 3772 DstOff -= VTSize - Size; 3773 } 3774 3775 // If this store is smaller than the largest store see whether we can get 3776 // the smaller value for free with a truncate. 3777 SDValue Value = MemSetValue; 3778 if (VT.bitsLT(LargestVT)) { 3779 if (!LargestVT.isVector() && !VT.isVector() && 3780 TLI.isTruncateFree(LargestVT, VT)) 3781 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3782 else 3783 Value = getMemsetValue(Src, VT, DAG, dl); 3784 } 3785 assert(Value.getValueType() == VT && "Value with wrong type."); 3786 SDValue Store = DAG.getStore(Chain, dl, Value, 3787 getMemBasePlusOffset(Dst, DstOff, DAG), 3788 DstPtrInfo.getWithOffset(DstOff), 3789 isVol, false, Align); 3790 OutChains.push_back(Store); 3791 DstOff += VT.getSizeInBits() / 8; 3792 Size -= VTSize; 3793 } 3794 3795 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3796 &OutChains[0], OutChains.size()); 3797} 3798 3799SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3800 SDValue Src, SDValue Size, 3801 unsigned Align, bool isVol, bool AlwaysInline, 3802 MachinePointerInfo DstPtrInfo, 3803 MachinePointerInfo SrcPtrInfo) { 3804 3805 // Check to see if we should lower the memcpy to loads and stores first. 3806 // For cases within the target-specified limits, this is the best choice. 3807 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3808 if (ConstantSize) { 3809 // Memcpy with size zero? Just return the original chain. 3810 if (ConstantSize->isNullValue()) 3811 return Chain; 3812 3813 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3814 ConstantSize->getZExtValue(),Align, 3815 isVol, false, DstPtrInfo, SrcPtrInfo); 3816 if (Result.getNode()) 3817 return Result; 3818 } 3819 3820 // Then check to see if we should lower the memcpy with target-specific 3821 // code. If the target chooses to do this, this is the next best. 3822 SDValue Result = 3823 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3824 isVol, AlwaysInline, 3825 DstPtrInfo, SrcPtrInfo); 3826 if (Result.getNode()) 3827 return Result; 3828 3829 // If we really need inline code and the target declined to provide it, 3830 // use a (potentially long) sequence of loads and stores. 3831 if (AlwaysInline) { 3832 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3833 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3834 ConstantSize->getZExtValue(), Align, isVol, 3835 true, DstPtrInfo, SrcPtrInfo); 3836 } 3837 3838 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3839 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3840 // respect volatile, so they may do things like read or write memory 3841 // beyond the given memory regions. But fixing this isn't easy, and most 3842 // people don't care. 3843 3844 // Emit a library call. 3845 TargetLowering::ArgListTy Args; 3846 TargetLowering::ArgListEntry Entry; 3847 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3848 Entry.Node = Dst; Args.push_back(Entry); 3849 Entry.Node = Src; Args.push_back(Entry); 3850 Entry.Node = Size; Args.push_back(Entry); 3851 // FIXME: pass in DebugLoc 3852 TargetLowering:: 3853 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3854 false, false, false, false, 0, 3855 TLI.getLibcallCallingConv(RTLIB::MEMCPY), 3856 /*isTailCall=*/false, 3857 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3858 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3859 TLI.getPointerTy()), 3860 Args, *this, dl); 3861 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3862 3863 return CallResult.second; 3864} 3865 3866SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3867 SDValue Src, SDValue Size, 3868 unsigned Align, bool isVol, 3869 MachinePointerInfo DstPtrInfo, 3870 MachinePointerInfo SrcPtrInfo) { 3871 3872 // Check to see if we should lower the memmove to loads and stores first. 3873 // For cases within the target-specified limits, this is the best choice. 3874 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3875 if (ConstantSize) { 3876 // Memmove with size zero? Just return the original chain. 3877 if (ConstantSize->isNullValue()) 3878 return Chain; 3879 3880 SDValue Result = 3881 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3882 ConstantSize->getZExtValue(), Align, isVol, 3883 false, DstPtrInfo, SrcPtrInfo); 3884 if (Result.getNode()) 3885 return Result; 3886 } 3887 3888 // Then check to see if we should lower the memmove with target-specific 3889 // code. If the target chooses to do this, this is the next best. 3890 SDValue Result = 3891 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3892 DstPtrInfo, SrcPtrInfo); 3893 if (Result.getNode()) 3894 return Result; 3895 3896 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3897 // not be safe. See memcpy above for more details. 3898 3899 // Emit a library call. 3900 TargetLowering::ArgListTy Args; 3901 TargetLowering::ArgListEntry Entry; 3902 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext()); 3903 Entry.Node = Dst; Args.push_back(Entry); 3904 Entry.Node = Src; Args.push_back(Entry); 3905 Entry.Node = Size; Args.push_back(Entry); 3906 // FIXME: pass in DebugLoc 3907 TargetLowering:: 3908 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3909 false, false, false, false, 0, 3910 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), 3911 /*isTailCall=*/false, 3912 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3913 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3914 TLI.getPointerTy()), 3915 Args, *this, dl); 3916 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3917 3918 return CallResult.second; 3919} 3920 3921SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3922 SDValue Src, SDValue Size, 3923 unsigned Align, bool isVol, 3924 MachinePointerInfo DstPtrInfo) { 3925 3926 // Check to see if we should lower the memset to stores first. 3927 // For cases within the target-specified limits, this is the best choice. 3928 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3929 if (ConstantSize) { 3930 // Memset with size zero? Just return the original chain. 3931 if (ConstantSize->isNullValue()) 3932 return Chain; 3933 3934 SDValue Result = 3935 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3936 Align, isVol, DstPtrInfo); 3937 3938 if (Result.getNode()) 3939 return Result; 3940 } 3941 3942 // Then check to see if we should lower the memset with target-specific 3943 // code. If the target chooses to do this, this is the next best. 3944 SDValue Result = 3945 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3946 DstPtrInfo); 3947 if (Result.getNode()) 3948 return Result; 3949 3950 // Emit a library call. 3951 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext()); 3952 TargetLowering::ArgListTy Args; 3953 TargetLowering::ArgListEntry Entry; 3954 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3955 Args.push_back(Entry); 3956 // Extend or truncate the argument to be an i32 value for the call. 3957 if (Src.getValueType().bitsGT(MVT::i32)) 3958 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3959 else 3960 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3961 Entry.Node = Src; 3962 Entry.Ty = Type::getInt32Ty(*getContext()); 3963 Entry.isSExt = true; 3964 Args.push_back(Entry); 3965 Entry.Node = Size; 3966 Entry.Ty = IntPtrTy; 3967 Entry.isSExt = false; 3968 Args.push_back(Entry); 3969 // FIXME: pass in DebugLoc 3970 TargetLowering:: 3971 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3972 false, false, false, false, 0, 3973 TLI.getLibcallCallingConv(RTLIB::MEMSET), 3974 /*isTailCall=*/false, 3975 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 3976 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3977 TLI.getPointerTy()), 3978 Args, *this, dl); 3979 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI); 3980 3981 return CallResult.second; 3982} 3983 3984SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3985 SDValue Chain, SDValue Ptr, SDValue Cmp, 3986 SDValue Swp, MachinePointerInfo PtrInfo, 3987 unsigned Alignment, 3988 AtomicOrdering Ordering, 3989 SynchronizationScope SynchScope) { 3990 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3991 Alignment = getEVTAlignment(MemVT); 3992 3993 MachineFunction &MF = getMachineFunction(); 3994 3995 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE. 3996 // For now, atomics are considered to be volatile always. 3997 // FIXME: Volatile isn't really correct; we should keep track of atomic 3998 // orderings in the memoperand. 3999 unsigned Flags = MachineMemOperand::MOVolatile; 4000 if (Opcode != ISD::ATOMIC_STORE) 4001 Flags |= MachineMemOperand::MOLoad; 4002 if (Opcode != ISD::ATOMIC_LOAD) 4003 Flags |= MachineMemOperand::MOStore; 4004 4005 MachineMemOperand *MMO = 4006 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 4007 4008 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 4009 Ordering, SynchScope); 4010} 4011 4012SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4013 SDValue Chain, 4014 SDValue Ptr, SDValue Cmp, 4015 SDValue Swp, MachineMemOperand *MMO, 4016 AtomicOrdering Ordering, 4017 SynchronizationScope SynchScope) { 4018 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 4019 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 4020 4021 EVT VT = Cmp.getValueType(); 4022 4023 SDVTList VTs = getVTList(VT, MVT::Other); 4024 FoldingSetNodeID ID; 4025 ID.AddInteger(MemVT.getRawBits()); 4026 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 4027 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 4028 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4029 void* IP = 0; 4030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4031 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4032 return SDValue(E, 0); 4033 } 4034 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4035 Ptr, Cmp, Swp, MMO, Ordering, 4036 SynchScope); 4037 CSEMap.InsertNode(N, IP); 4038 AllNodes.push_back(N); 4039 return SDValue(N, 0); 4040} 4041 4042SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4043 SDValue Chain, 4044 SDValue Ptr, SDValue Val, 4045 const Value* PtrVal, 4046 unsigned Alignment, 4047 AtomicOrdering Ordering, 4048 SynchronizationScope SynchScope) { 4049 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4050 Alignment = getEVTAlignment(MemVT); 4051 4052 MachineFunction &MF = getMachineFunction(); 4053 // An atomic store does not load. An atomic load does not store. 4054 // (An atomicrmw obviously both loads and stores.) 4055 // For now, atomics are considered to be volatile always, and they are 4056 // chained as such. 4057 // FIXME: Volatile isn't really correct; we should keep track of atomic 4058 // orderings in the memoperand. 4059 unsigned Flags = MachineMemOperand::MOVolatile; 4060 if (Opcode != ISD::ATOMIC_STORE) 4061 Flags |= MachineMemOperand::MOLoad; 4062 if (Opcode != ISD::ATOMIC_LOAD) 4063 Flags |= MachineMemOperand::MOStore; 4064 4065 MachineMemOperand *MMO = 4066 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4067 MemVT.getStoreSize(), Alignment); 4068 4069 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4070 Ordering, SynchScope); 4071} 4072 4073SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4074 SDValue Chain, 4075 SDValue Ptr, SDValue Val, 4076 MachineMemOperand *MMO, 4077 AtomicOrdering Ordering, 4078 SynchronizationScope SynchScope) { 4079 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4080 Opcode == ISD::ATOMIC_LOAD_SUB || 4081 Opcode == ISD::ATOMIC_LOAD_AND || 4082 Opcode == ISD::ATOMIC_LOAD_OR || 4083 Opcode == ISD::ATOMIC_LOAD_XOR || 4084 Opcode == ISD::ATOMIC_LOAD_NAND || 4085 Opcode == ISD::ATOMIC_LOAD_MIN || 4086 Opcode == ISD::ATOMIC_LOAD_MAX || 4087 Opcode == ISD::ATOMIC_LOAD_UMIN || 4088 Opcode == ISD::ATOMIC_LOAD_UMAX || 4089 Opcode == ISD::ATOMIC_SWAP || 4090 Opcode == ISD::ATOMIC_STORE) && 4091 "Invalid Atomic Op"); 4092 4093 EVT VT = Val.getValueType(); 4094 4095 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4096 getVTList(VT, MVT::Other); 4097 FoldingSetNodeID ID; 4098 ID.AddInteger(MemVT.getRawBits()); 4099 SDValue Ops[] = {Chain, Ptr, Val}; 4100 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 4101 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4102 void* IP = 0; 4103 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4104 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4105 return SDValue(E, 0); 4106 } 4107 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4108 Ptr, Val, MMO, 4109 Ordering, SynchScope); 4110 CSEMap.InsertNode(N, IP); 4111 AllNodes.push_back(N); 4112 return SDValue(N, 0); 4113} 4114 4115SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4116 EVT VT, SDValue Chain, 4117 SDValue Ptr, 4118 const Value* PtrVal, 4119 unsigned Alignment, 4120 AtomicOrdering Ordering, 4121 SynchronizationScope SynchScope) { 4122 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4123 Alignment = getEVTAlignment(MemVT); 4124 4125 MachineFunction &MF = getMachineFunction(); 4126 // An atomic store does not load. An atomic load does not store. 4127 // (An atomicrmw obviously both loads and stores.) 4128 // For now, atomics are considered to be volatile always, and they are 4129 // chained as such. 4130 // FIXME: Volatile isn't really correct; we should keep track of atomic 4131 // orderings in the memoperand. 4132 unsigned Flags = MachineMemOperand::MOVolatile; 4133 if (Opcode != ISD::ATOMIC_STORE) 4134 Flags |= MachineMemOperand::MOLoad; 4135 if (Opcode != ISD::ATOMIC_LOAD) 4136 Flags |= MachineMemOperand::MOStore; 4137 4138 MachineMemOperand *MMO = 4139 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4140 MemVT.getStoreSize(), Alignment); 4141 4142 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4143 Ordering, SynchScope); 4144} 4145 4146SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4147 EVT VT, SDValue Chain, 4148 SDValue Ptr, 4149 MachineMemOperand *MMO, 4150 AtomicOrdering Ordering, 4151 SynchronizationScope SynchScope) { 4152 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4153 4154 SDVTList VTs = getVTList(VT, MVT::Other); 4155 FoldingSetNodeID ID; 4156 ID.AddInteger(MemVT.getRawBits()); 4157 SDValue Ops[] = {Chain, Ptr}; 4158 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4159 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4160 void* IP = 0; 4161 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4162 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4163 return SDValue(E, 0); 4164 } 4165 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4166 Ptr, MMO, Ordering, SynchScope); 4167 CSEMap.InsertNode(N, IP); 4168 AllNodes.push_back(N); 4169 return SDValue(N, 0); 4170} 4171 4172/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4173SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4174 DebugLoc dl) { 4175 if (NumOps == 1) 4176 return Ops[0]; 4177 4178 SmallVector<EVT, 4> VTs; 4179 VTs.reserve(NumOps); 4180 for (unsigned i = 0; i < NumOps; ++i) 4181 VTs.push_back(Ops[i].getValueType()); 4182 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4183 Ops, NumOps); 4184} 4185 4186SDValue 4187SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4188 const EVT *VTs, unsigned NumVTs, 4189 const SDValue *Ops, unsigned NumOps, 4190 EVT MemVT, MachinePointerInfo PtrInfo, 4191 unsigned Align, bool Vol, 4192 bool ReadMem, bool WriteMem) { 4193 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4194 MemVT, PtrInfo, Align, Vol, 4195 ReadMem, WriteMem); 4196} 4197 4198SDValue 4199SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4200 const SDValue *Ops, unsigned NumOps, 4201 EVT MemVT, MachinePointerInfo PtrInfo, 4202 unsigned Align, bool Vol, 4203 bool ReadMem, bool WriteMem) { 4204 if (Align == 0) // Ensure that codegen never sees alignment 0 4205 Align = getEVTAlignment(MemVT); 4206 4207 MachineFunction &MF = getMachineFunction(); 4208 unsigned Flags = 0; 4209 if (WriteMem) 4210 Flags |= MachineMemOperand::MOStore; 4211 if (ReadMem) 4212 Flags |= MachineMemOperand::MOLoad; 4213 if (Vol) 4214 Flags |= MachineMemOperand::MOVolatile; 4215 MachineMemOperand *MMO = 4216 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4217 4218 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4219} 4220 4221SDValue 4222SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4223 const SDValue *Ops, unsigned NumOps, 4224 EVT MemVT, MachineMemOperand *MMO) { 4225 assert((Opcode == ISD::INTRINSIC_VOID || 4226 Opcode == ISD::INTRINSIC_W_CHAIN || 4227 Opcode == ISD::PREFETCH || 4228 Opcode == ISD::LIFETIME_START || 4229 Opcode == ISD::LIFETIME_END || 4230 (Opcode <= INT_MAX && 4231 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4232 "Opcode is not a memory-accessing opcode!"); 4233 4234 // Memoize the node unless it returns a flag. 4235 MemIntrinsicSDNode *N; 4236 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4237 FoldingSetNodeID ID; 4238 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4239 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4240 void *IP = 0; 4241 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4242 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4243 return SDValue(E, 0); 4244 } 4245 4246 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4247 MemVT, MMO); 4248 CSEMap.InsertNode(N, IP); 4249 } else { 4250 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4251 MemVT, MMO); 4252 } 4253 AllNodes.push_back(N); 4254 return SDValue(N, 0); 4255} 4256 4257/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4258/// MachinePointerInfo record from it. This is particularly useful because the 4259/// code generator has many cases where it doesn't bother passing in a 4260/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4261static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4262 // If this is FI+Offset, we can model it. 4263 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4264 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4265 4266 // If this is (FI+Offset1)+Offset2, we can model it. 4267 if (Ptr.getOpcode() != ISD::ADD || 4268 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4269 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4270 return MachinePointerInfo(); 4271 4272 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4273 return MachinePointerInfo::getFixedStack(FI, Offset+ 4274 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4275} 4276 4277/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4278/// MachinePointerInfo record from it. This is particularly useful because the 4279/// code generator has many cases where it doesn't bother passing in a 4280/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4281static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4282 // If the 'Offset' value isn't a constant, we can't handle this. 4283 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4284 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4285 if (OffsetOp.getOpcode() == ISD::UNDEF) 4286 return InferPointerInfo(Ptr); 4287 return MachinePointerInfo(); 4288} 4289 4290 4291SDValue 4292SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4293 EVT VT, DebugLoc dl, SDValue Chain, 4294 SDValue Ptr, SDValue Offset, 4295 MachinePointerInfo PtrInfo, EVT MemVT, 4296 bool isVolatile, bool isNonTemporal, bool isInvariant, 4297 unsigned Alignment, const MDNode *TBAAInfo, 4298 const MDNode *Ranges) { 4299 assert(Chain.getValueType() == MVT::Other && 4300 "Invalid chain type"); 4301 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4302 Alignment = getEVTAlignment(VT); 4303 4304 unsigned Flags = MachineMemOperand::MOLoad; 4305 if (isVolatile) 4306 Flags |= MachineMemOperand::MOVolatile; 4307 if (isNonTemporal) 4308 Flags |= MachineMemOperand::MONonTemporal; 4309 if (isInvariant) 4310 Flags |= MachineMemOperand::MOInvariant; 4311 4312 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4313 // clients. 4314 if (PtrInfo.V == 0) 4315 PtrInfo = InferPointerInfo(Ptr, Offset); 4316 4317 MachineFunction &MF = getMachineFunction(); 4318 MachineMemOperand *MMO = 4319 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4320 TBAAInfo, Ranges); 4321 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4322} 4323 4324SDValue 4325SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4326 EVT VT, DebugLoc dl, SDValue Chain, 4327 SDValue Ptr, SDValue Offset, EVT MemVT, 4328 MachineMemOperand *MMO) { 4329 if (VT == MemVT) { 4330 ExtType = ISD::NON_EXTLOAD; 4331 } else if (ExtType == ISD::NON_EXTLOAD) { 4332 assert(VT == MemVT && "Non-extending load from different memory type!"); 4333 } else { 4334 // Extending load. 4335 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4336 "Should only be an extending load, not truncating!"); 4337 assert(VT.isInteger() == MemVT.isInteger() && 4338 "Cannot convert from FP to Int or Int -> FP!"); 4339 assert(VT.isVector() == MemVT.isVector() && 4340 "Cannot use trunc store to convert to or from a vector!"); 4341 assert((!VT.isVector() || 4342 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4343 "Cannot use trunc store to change the number of vector elements!"); 4344 } 4345 4346 bool Indexed = AM != ISD::UNINDEXED; 4347 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4348 "Unindexed load with an offset!"); 4349 4350 SDVTList VTs = Indexed ? 4351 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4352 SDValue Ops[] = { Chain, Ptr, Offset }; 4353 FoldingSetNodeID ID; 4354 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4355 ID.AddInteger(MemVT.getRawBits()); 4356 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4357 MMO->isNonTemporal(), 4358 MMO->isInvariant())); 4359 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4360 void *IP = 0; 4361 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4362 cast<LoadSDNode>(E)->refineAlignment(MMO); 4363 return SDValue(E, 0); 4364 } 4365 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4366 MemVT, MMO); 4367 CSEMap.InsertNode(N, IP); 4368 AllNodes.push_back(N); 4369 return SDValue(N, 0); 4370} 4371 4372SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4373 SDValue Chain, SDValue Ptr, 4374 MachinePointerInfo PtrInfo, 4375 bool isVolatile, bool isNonTemporal, 4376 bool isInvariant, unsigned Alignment, 4377 const MDNode *TBAAInfo, 4378 const MDNode *Ranges) { 4379 SDValue Undef = getUNDEF(Ptr.getValueType()); 4380 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4381 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4382 TBAAInfo, Ranges); 4383} 4384 4385SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4386 SDValue Chain, SDValue Ptr, 4387 MachinePointerInfo PtrInfo, EVT MemVT, 4388 bool isVolatile, bool isNonTemporal, 4389 unsigned Alignment, const MDNode *TBAAInfo) { 4390 SDValue Undef = getUNDEF(Ptr.getValueType()); 4391 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4392 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4393 TBAAInfo); 4394} 4395 4396 4397SDValue 4398SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4399 SDValue Offset, ISD::MemIndexedMode AM) { 4400 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4401 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4402 "Load is already a indexed load!"); 4403 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4404 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4405 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4406 false, LD->getAlignment()); 4407} 4408 4409SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4410 SDValue Ptr, MachinePointerInfo PtrInfo, 4411 bool isVolatile, bool isNonTemporal, 4412 unsigned Alignment, const MDNode *TBAAInfo) { 4413 assert(Chain.getValueType() == MVT::Other && 4414 "Invalid chain type"); 4415 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4416 Alignment = getEVTAlignment(Val.getValueType()); 4417 4418 unsigned Flags = MachineMemOperand::MOStore; 4419 if (isVolatile) 4420 Flags |= MachineMemOperand::MOVolatile; 4421 if (isNonTemporal) 4422 Flags |= MachineMemOperand::MONonTemporal; 4423 4424 if (PtrInfo.V == 0) 4425 PtrInfo = InferPointerInfo(Ptr); 4426 4427 MachineFunction &MF = getMachineFunction(); 4428 MachineMemOperand *MMO = 4429 MF.getMachineMemOperand(PtrInfo, Flags, 4430 Val.getValueType().getStoreSize(), Alignment, 4431 TBAAInfo); 4432 4433 return getStore(Chain, dl, Val, Ptr, MMO); 4434} 4435 4436SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4437 SDValue Ptr, MachineMemOperand *MMO) { 4438 assert(Chain.getValueType() == MVT::Other && 4439 "Invalid chain type"); 4440 EVT VT = Val.getValueType(); 4441 SDVTList VTs = getVTList(MVT::Other); 4442 SDValue Undef = getUNDEF(Ptr.getValueType()); 4443 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4444 FoldingSetNodeID ID; 4445 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4446 ID.AddInteger(VT.getRawBits()); 4447 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4448 MMO->isNonTemporal(), MMO->isInvariant())); 4449 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4450 void *IP = 0; 4451 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4452 cast<StoreSDNode>(E)->refineAlignment(MMO); 4453 return SDValue(E, 0); 4454 } 4455 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4456 false, VT, MMO); 4457 CSEMap.InsertNode(N, IP); 4458 AllNodes.push_back(N); 4459 return SDValue(N, 0); 4460} 4461 4462SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4463 SDValue Ptr, MachinePointerInfo PtrInfo, 4464 EVT SVT,bool isVolatile, bool isNonTemporal, 4465 unsigned Alignment, 4466 const MDNode *TBAAInfo) { 4467 assert(Chain.getValueType() == MVT::Other && 4468 "Invalid chain type"); 4469 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4470 Alignment = getEVTAlignment(SVT); 4471 4472 unsigned Flags = MachineMemOperand::MOStore; 4473 if (isVolatile) 4474 Flags |= MachineMemOperand::MOVolatile; 4475 if (isNonTemporal) 4476 Flags |= MachineMemOperand::MONonTemporal; 4477 4478 if (PtrInfo.V == 0) 4479 PtrInfo = InferPointerInfo(Ptr); 4480 4481 MachineFunction &MF = getMachineFunction(); 4482 MachineMemOperand *MMO = 4483 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4484 TBAAInfo); 4485 4486 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4487} 4488 4489SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4490 SDValue Ptr, EVT SVT, 4491 MachineMemOperand *MMO) { 4492 EVT VT = Val.getValueType(); 4493 4494 assert(Chain.getValueType() == MVT::Other && 4495 "Invalid chain type"); 4496 if (VT == SVT) 4497 return getStore(Chain, dl, Val, Ptr, MMO); 4498 4499 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4500 "Should only be a truncating store, not extending!"); 4501 assert(VT.isInteger() == SVT.isInteger() && 4502 "Can't do FP-INT conversion!"); 4503 assert(VT.isVector() == SVT.isVector() && 4504 "Cannot use trunc store to convert to or from a vector!"); 4505 assert((!VT.isVector() || 4506 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4507 "Cannot use trunc store to change the number of vector elements!"); 4508 4509 SDVTList VTs = getVTList(MVT::Other); 4510 SDValue Undef = getUNDEF(Ptr.getValueType()); 4511 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4512 FoldingSetNodeID ID; 4513 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4514 ID.AddInteger(SVT.getRawBits()); 4515 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4516 MMO->isNonTemporal(), MMO->isInvariant())); 4517 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4518 void *IP = 0; 4519 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4520 cast<StoreSDNode>(E)->refineAlignment(MMO); 4521 return SDValue(E, 0); 4522 } 4523 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4524 true, SVT, MMO); 4525 CSEMap.InsertNode(N, IP); 4526 AllNodes.push_back(N); 4527 return SDValue(N, 0); 4528} 4529 4530SDValue 4531SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4532 SDValue Offset, ISD::MemIndexedMode AM) { 4533 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4534 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4535 "Store is already a indexed store!"); 4536 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4537 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4538 FoldingSetNodeID ID; 4539 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4540 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4541 ID.AddInteger(ST->getRawSubclassData()); 4542 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4543 void *IP = 0; 4544 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4545 return SDValue(E, 0); 4546 4547 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4548 ST->isTruncatingStore(), 4549 ST->getMemoryVT(), 4550 ST->getMemOperand()); 4551 CSEMap.InsertNode(N, IP); 4552 AllNodes.push_back(N); 4553 return SDValue(N, 0); 4554} 4555 4556SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4557 SDValue Chain, SDValue Ptr, 4558 SDValue SV, 4559 unsigned Align) { 4560 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4561 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4562} 4563 4564SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4565 const SDUse *Ops, unsigned NumOps) { 4566 switch (NumOps) { 4567 case 0: return getNode(Opcode, DL, VT); 4568 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4569 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4570 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4571 default: break; 4572 } 4573 4574 // Copy from an SDUse array into an SDValue array for use with 4575 // the regular getNode logic. 4576 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4577 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4578} 4579 4580SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4581 const SDValue *Ops, unsigned NumOps) { 4582 switch (NumOps) { 4583 case 0: return getNode(Opcode, DL, VT); 4584 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4585 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4586 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4587 default: break; 4588 } 4589 4590 switch (Opcode) { 4591 default: break; 4592 case ISD::SELECT_CC: { 4593 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4594 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4595 "LHS and RHS of condition must have same type!"); 4596 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4597 "True and False arms of SelectCC must have same type!"); 4598 assert(Ops[2].getValueType() == VT && 4599 "select_cc node must be of same type as true and false value!"); 4600 break; 4601 } 4602 case ISD::BR_CC: { 4603 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4604 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4605 "LHS/RHS of comparison should match types!"); 4606 break; 4607 } 4608 } 4609 4610 // Memoize nodes. 4611 SDNode *N; 4612 SDVTList VTs = getVTList(VT); 4613 4614 if (VT != MVT::Glue) { 4615 FoldingSetNodeID ID; 4616 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4617 void *IP = 0; 4618 4619 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4620 return SDValue(E, 0); 4621 4622 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4623 CSEMap.InsertNode(N, IP); 4624 } else { 4625 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4626 } 4627 4628 AllNodes.push_back(N); 4629#ifndef NDEBUG 4630 VerifySDNode(N); 4631#endif 4632 return SDValue(N, 0); 4633} 4634 4635SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4636 const std::vector<EVT> &ResultTys, 4637 const SDValue *Ops, unsigned NumOps) { 4638 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4639 Ops, NumOps); 4640} 4641 4642SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4643 const EVT *VTs, unsigned NumVTs, 4644 const SDValue *Ops, unsigned NumOps) { 4645 if (NumVTs == 1) 4646 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4647 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4648} 4649 4650SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4651 const SDValue *Ops, unsigned NumOps) { 4652 if (VTList.NumVTs == 1) 4653 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4654 4655#if 0 4656 switch (Opcode) { 4657 // FIXME: figure out how to safely handle things like 4658 // int foo(int x) { return 1 << (x & 255); } 4659 // int bar() { return foo(256); } 4660 case ISD::SRA_PARTS: 4661 case ISD::SRL_PARTS: 4662 case ISD::SHL_PARTS: 4663 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4664 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4665 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4666 else if (N3.getOpcode() == ISD::AND) 4667 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4668 // If the and is only masking out bits that cannot effect the shift, 4669 // eliminate the and. 4670 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4671 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4672 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4673 } 4674 break; 4675 } 4676#endif 4677 4678 // Memoize the node unless it returns a flag. 4679 SDNode *N; 4680 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4681 FoldingSetNodeID ID; 4682 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4683 void *IP = 0; 4684 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4685 return SDValue(E, 0); 4686 4687 if (NumOps == 1) { 4688 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4689 } else if (NumOps == 2) { 4690 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4691 } else if (NumOps == 3) { 4692 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4693 Ops[2]); 4694 } else { 4695 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4696 } 4697 CSEMap.InsertNode(N, IP); 4698 } else { 4699 if (NumOps == 1) { 4700 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4701 } else if (NumOps == 2) { 4702 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4703 } else if (NumOps == 3) { 4704 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4705 Ops[2]); 4706 } else { 4707 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4708 } 4709 } 4710 AllNodes.push_back(N); 4711#ifndef NDEBUG 4712 VerifySDNode(N); 4713#endif 4714 return SDValue(N, 0); 4715} 4716 4717SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4718 return getNode(Opcode, DL, VTList, 0, 0); 4719} 4720 4721SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4722 SDValue N1) { 4723 SDValue Ops[] = { N1 }; 4724 return getNode(Opcode, DL, VTList, Ops, 1); 4725} 4726 4727SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4728 SDValue N1, SDValue N2) { 4729 SDValue Ops[] = { N1, N2 }; 4730 return getNode(Opcode, DL, VTList, Ops, 2); 4731} 4732 4733SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4734 SDValue N1, SDValue N2, SDValue N3) { 4735 SDValue Ops[] = { N1, N2, N3 }; 4736 return getNode(Opcode, DL, VTList, Ops, 3); 4737} 4738 4739SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4740 SDValue N1, SDValue N2, SDValue N3, 4741 SDValue N4) { 4742 SDValue Ops[] = { N1, N2, N3, N4 }; 4743 return getNode(Opcode, DL, VTList, Ops, 4); 4744} 4745 4746SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4747 SDValue N1, SDValue N2, SDValue N3, 4748 SDValue N4, SDValue N5) { 4749 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4750 return getNode(Opcode, DL, VTList, Ops, 5); 4751} 4752 4753SDVTList SelectionDAG::getVTList(EVT VT) { 4754 return makeVTList(SDNode::getValueTypeList(VT), 1); 4755} 4756 4757SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4758 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4759 E = VTList.rend(); I != E; ++I) 4760 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4761 return *I; 4762 4763 EVT *Array = Allocator.Allocate<EVT>(2); 4764 Array[0] = VT1; 4765 Array[1] = VT2; 4766 SDVTList Result = makeVTList(Array, 2); 4767 VTList.push_back(Result); 4768 return Result; 4769} 4770 4771SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4772 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4773 E = VTList.rend(); I != E; ++I) 4774 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4775 I->VTs[2] == VT3) 4776 return *I; 4777 4778 EVT *Array = Allocator.Allocate<EVT>(3); 4779 Array[0] = VT1; 4780 Array[1] = VT2; 4781 Array[2] = VT3; 4782 SDVTList Result = makeVTList(Array, 3); 4783 VTList.push_back(Result); 4784 return Result; 4785} 4786 4787SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4788 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4789 E = VTList.rend(); I != E; ++I) 4790 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4791 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4792 return *I; 4793 4794 EVT *Array = Allocator.Allocate<EVT>(4); 4795 Array[0] = VT1; 4796 Array[1] = VT2; 4797 Array[2] = VT3; 4798 Array[3] = VT4; 4799 SDVTList Result = makeVTList(Array, 4); 4800 VTList.push_back(Result); 4801 return Result; 4802} 4803 4804SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4805 switch (NumVTs) { 4806 case 0: llvm_unreachable("Cannot have nodes without results!"); 4807 case 1: return getVTList(VTs[0]); 4808 case 2: return getVTList(VTs[0], VTs[1]); 4809 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4810 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4811 default: break; 4812 } 4813 4814 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4815 E = VTList.rend(); I != E; ++I) { 4816 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4817 continue; 4818 4819 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4820 return *I; 4821 } 4822 4823 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4824 std::copy(VTs, VTs+NumVTs, Array); 4825 SDVTList Result = makeVTList(Array, NumVTs); 4826 VTList.push_back(Result); 4827 return Result; 4828} 4829 4830 4831/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4832/// specified operands. If the resultant node already exists in the DAG, 4833/// this does not modify the specified node, instead it returns the node that 4834/// already exists. If the resultant node does not exist in the DAG, the 4835/// input node is returned. As a degenerate case, if you specify the same 4836/// input operands as the node already has, the input node is returned. 4837SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4838 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4839 4840 // Check to see if there is no change. 4841 if (Op == N->getOperand(0)) return N; 4842 4843 // See if the modified node already exists. 4844 void *InsertPos = 0; 4845 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4846 return Existing; 4847 4848 // Nope it doesn't. Remove the node from its current place in the maps. 4849 if (InsertPos) 4850 if (!RemoveNodeFromCSEMaps(N)) 4851 InsertPos = 0; 4852 4853 // Now we update the operands. 4854 N->OperandList[0].set(Op); 4855 4856 // If this gets put into a CSE map, add it. 4857 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4858 return N; 4859} 4860 4861SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4862 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4863 4864 // Check to see if there is no change. 4865 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4866 return N; // No operands changed, just return the input node. 4867 4868 // See if the modified node already exists. 4869 void *InsertPos = 0; 4870 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4871 return Existing; 4872 4873 // Nope it doesn't. Remove the node from its current place in the maps. 4874 if (InsertPos) 4875 if (!RemoveNodeFromCSEMaps(N)) 4876 InsertPos = 0; 4877 4878 // Now we update the operands. 4879 if (N->OperandList[0] != Op1) 4880 N->OperandList[0].set(Op1); 4881 if (N->OperandList[1] != Op2) 4882 N->OperandList[1].set(Op2); 4883 4884 // If this gets put into a CSE map, add it. 4885 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4886 return N; 4887} 4888 4889SDNode *SelectionDAG:: 4890UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4891 SDValue Ops[] = { Op1, Op2, Op3 }; 4892 return UpdateNodeOperands(N, Ops, 3); 4893} 4894 4895SDNode *SelectionDAG:: 4896UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4897 SDValue Op3, SDValue Op4) { 4898 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4899 return UpdateNodeOperands(N, Ops, 4); 4900} 4901 4902SDNode *SelectionDAG:: 4903UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4904 SDValue Op3, SDValue Op4, SDValue Op5) { 4905 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4906 return UpdateNodeOperands(N, Ops, 5); 4907} 4908 4909SDNode *SelectionDAG:: 4910UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4911 assert(N->getNumOperands() == NumOps && 4912 "Update with wrong number of operands"); 4913 4914 // Check to see if there is no change. 4915 bool AnyChange = false; 4916 for (unsigned i = 0; i != NumOps; ++i) { 4917 if (Ops[i] != N->getOperand(i)) { 4918 AnyChange = true; 4919 break; 4920 } 4921 } 4922 4923 // No operands changed, just return the input node. 4924 if (!AnyChange) return N; 4925 4926 // See if the modified node already exists. 4927 void *InsertPos = 0; 4928 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4929 return Existing; 4930 4931 // Nope it doesn't. Remove the node from its current place in the maps. 4932 if (InsertPos) 4933 if (!RemoveNodeFromCSEMaps(N)) 4934 InsertPos = 0; 4935 4936 // Now we update the operands. 4937 for (unsigned i = 0; i != NumOps; ++i) 4938 if (N->OperandList[i] != Ops[i]) 4939 N->OperandList[i].set(Ops[i]); 4940 4941 // If this gets put into a CSE map, add it. 4942 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4943 return N; 4944} 4945 4946/// DropOperands - Release the operands and set this node to have 4947/// zero operands. 4948void SDNode::DropOperands() { 4949 // Unlike the code in MorphNodeTo that does this, we don't need to 4950 // watch for dead nodes here. 4951 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4952 SDUse &Use = *I++; 4953 Use.set(SDValue()); 4954 } 4955} 4956 4957/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4958/// machine opcode. 4959/// 4960SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4961 EVT VT) { 4962 SDVTList VTs = getVTList(VT); 4963 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4964} 4965 4966SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4967 EVT VT, SDValue Op1) { 4968 SDVTList VTs = getVTList(VT); 4969 SDValue Ops[] = { Op1 }; 4970 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4971} 4972 4973SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4974 EVT VT, SDValue Op1, 4975 SDValue Op2) { 4976 SDVTList VTs = getVTList(VT); 4977 SDValue Ops[] = { Op1, Op2 }; 4978 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4979} 4980 4981SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4982 EVT VT, SDValue Op1, 4983 SDValue Op2, SDValue Op3) { 4984 SDVTList VTs = getVTList(VT); 4985 SDValue Ops[] = { Op1, Op2, Op3 }; 4986 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4987} 4988 4989SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4990 EVT VT, const SDValue *Ops, 4991 unsigned NumOps) { 4992 SDVTList VTs = getVTList(VT); 4993 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4994} 4995 4996SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4997 EVT VT1, EVT VT2, const SDValue *Ops, 4998 unsigned NumOps) { 4999 SDVTList VTs = getVTList(VT1, VT2); 5000 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5001} 5002 5003SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5004 EVT VT1, EVT VT2) { 5005 SDVTList VTs = getVTList(VT1, VT2); 5006 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 5007} 5008 5009SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5010 EVT VT1, EVT VT2, EVT VT3, 5011 const SDValue *Ops, unsigned NumOps) { 5012 SDVTList VTs = getVTList(VT1, VT2, VT3); 5013 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5014} 5015 5016SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5017 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 5018 const SDValue *Ops, unsigned NumOps) { 5019 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5020 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5021} 5022 5023SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5024 EVT VT1, EVT VT2, 5025 SDValue Op1) { 5026 SDVTList VTs = getVTList(VT1, VT2); 5027 SDValue Ops[] = { Op1 }; 5028 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5029} 5030 5031SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5032 EVT VT1, EVT VT2, 5033 SDValue Op1, SDValue Op2) { 5034 SDVTList VTs = getVTList(VT1, VT2); 5035 SDValue Ops[] = { Op1, Op2 }; 5036 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5037} 5038 5039SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5040 EVT VT1, EVT VT2, 5041 SDValue Op1, SDValue Op2, 5042 SDValue Op3) { 5043 SDVTList VTs = getVTList(VT1, VT2); 5044 SDValue Ops[] = { Op1, Op2, Op3 }; 5045 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5046} 5047 5048SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5049 EVT VT1, EVT VT2, EVT VT3, 5050 SDValue Op1, SDValue Op2, 5051 SDValue Op3) { 5052 SDVTList VTs = getVTList(VT1, VT2, VT3); 5053 SDValue Ops[] = { Op1, Op2, Op3 }; 5054 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5055} 5056 5057SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5058 SDVTList VTs, const SDValue *Ops, 5059 unsigned NumOps) { 5060 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 5061 // Reset the NodeID to -1. 5062 N->setNodeId(-1); 5063 return N; 5064} 5065 5066/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 5067/// the line number information on the merged node since it is not possible to 5068/// preserve the information that operation is associated with multiple lines. 5069/// This will make the debugger working better at -O0, were there is a higher 5070/// probability having other instructions associated with that line. 5071/// 5072SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 5073 DebugLoc NLoc = N->getDebugLoc(); 5074 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 5075 N->setDebugLoc(DebugLoc()); 5076 } 5077 return N; 5078} 5079 5080/// MorphNodeTo - This *mutates* the specified node to have the specified 5081/// return type, opcode, and operands. 5082/// 5083/// Note that MorphNodeTo returns the resultant node. If there is already a 5084/// node of the specified opcode and operands, it returns that node instead of 5085/// the current one. Note that the DebugLoc need not be the same. 5086/// 5087/// Using MorphNodeTo is faster than creating a new node and swapping it in 5088/// with ReplaceAllUsesWith both because it often avoids allocating a new 5089/// node, and because it doesn't require CSE recalculation for any of 5090/// the node's users. 5091/// 5092SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5093 SDVTList VTs, const SDValue *Ops, 5094 unsigned NumOps) { 5095 // If an identical node already exists, use it. 5096 void *IP = 0; 5097 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5098 FoldingSetNodeID ID; 5099 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5100 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5101 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 5102 } 5103 5104 if (!RemoveNodeFromCSEMaps(N)) 5105 IP = 0; 5106 5107 // Start the morphing. 5108 N->NodeType = Opc; 5109 N->ValueList = VTs.VTs; 5110 N->NumValues = VTs.NumVTs; 5111 5112 // Clear the operands list, updating used nodes to remove this from their 5113 // use list. Keep track of any operands that become dead as a result. 5114 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5115 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5116 SDUse &Use = *I++; 5117 SDNode *Used = Use.getNode(); 5118 Use.set(SDValue()); 5119 if (Used->use_empty()) 5120 DeadNodeSet.insert(Used); 5121 } 5122 5123 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5124 // Initialize the memory references information. 5125 MN->setMemRefs(0, 0); 5126 // If NumOps is larger than the # of operands we can have in a 5127 // MachineSDNode, reallocate the operand list. 5128 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5129 if (MN->OperandsNeedDelete) 5130 delete[] MN->OperandList; 5131 if (NumOps > array_lengthof(MN->LocalOperands)) 5132 // We're creating a final node that will live unmorphed for the 5133 // remainder of the current SelectionDAG iteration, so we can allocate 5134 // the operands directly out of a pool with no recycling metadata. 5135 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5136 Ops, NumOps); 5137 else 5138 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5139 MN->OperandsNeedDelete = false; 5140 } else 5141 MN->InitOperands(MN->OperandList, Ops, NumOps); 5142 } else { 5143 // If NumOps is larger than the # of operands we currently have, reallocate 5144 // the operand list. 5145 if (NumOps > N->NumOperands) { 5146 if (N->OperandsNeedDelete) 5147 delete[] N->OperandList; 5148 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5149 N->OperandsNeedDelete = true; 5150 } else 5151 N->InitOperands(N->OperandList, Ops, NumOps); 5152 } 5153 5154 // Delete any nodes that are still dead after adding the uses for the 5155 // new operands. 5156 if (!DeadNodeSet.empty()) { 5157 SmallVector<SDNode *, 16> DeadNodes; 5158 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5159 E = DeadNodeSet.end(); I != E; ++I) 5160 if ((*I)->use_empty()) 5161 DeadNodes.push_back(*I); 5162 RemoveDeadNodes(DeadNodes); 5163 } 5164 5165 if (IP) 5166 CSEMap.InsertNode(N, IP); // Memoize the new node. 5167 return N; 5168} 5169 5170 5171/// getMachineNode - These are used for target selectors to create a new node 5172/// with specified return type(s), MachineInstr opcode, and operands. 5173/// 5174/// Note that getMachineNode returns the resultant node. If there is already a 5175/// node of the specified opcode and operands, it returns that node instead of 5176/// the current one. 5177MachineSDNode * 5178SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5179 SDVTList VTs = getVTList(VT); 5180 return getMachineNode(Opcode, dl, VTs, 0, 0); 5181} 5182 5183MachineSDNode * 5184SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5185 SDVTList VTs = getVTList(VT); 5186 SDValue Ops[] = { Op1 }; 5187 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5188} 5189 5190MachineSDNode * 5191SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5192 SDValue Op1, SDValue Op2) { 5193 SDVTList VTs = getVTList(VT); 5194 SDValue Ops[] = { Op1, Op2 }; 5195 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5196} 5197 5198MachineSDNode * 5199SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5200 SDValue Op1, SDValue Op2, SDValue Op3) { 5201 SDVTList VTs = getVTList(VT); 5202 SDValue Ops[] = { Op1, Op2, Op3 }; 5203 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5204} 5205 5206MachineSDNode * 5207SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5208 const SDValue *Ops, unsigned NumOps) { 5209 SDVTList VTs = getVTList(VT); 5210 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5211} 5212 5213MachineSDNode * 5214SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5215 SDVTList VTs = getVTList(VT1, VT2); 5216 return getMachineNode(Opcode, dl, VTs, 0, 0); 5217} 5218 5219MachineSDNode * 5220SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5221 EVT VT1, EVT VT2, SDValue Op1) { 5222 SDVTList VTs = getVTList(VT1, VT2); 5223 SDValue Ops[] = { Op1 }; 5224 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5225} 5226 5227MachineSDNode * 5228SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5229 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5230 SDVTList VTs = getVTList(VT1, VT2); 5231 SDValue Ops[] = { Op1, Op2 }; 5232 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5233} 5234 5235MachineSDNode * 5236SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5237 EVT VT1, EVT VT2, SDValue Op1, 5238 SDValue Op2, SDValue Op3) { 5239 SDVTList VTs = getVTList(VT1, VT2); 5240 SDValue Ops[] = { Op1, Op2, Op3 }; 5241 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5242} 5243 5244MachineSDNode * 5245SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5246 EVT VT1, EVT VT2, 5247 const SDValue *Ops, unsigned NumOps) { 5248 SDVTList VTs = getVTList(VT1, VT2); 5249 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5250} 5251 5252MachineSDNode * 5253SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5254 EVT VT1, EVT VT2, EVT VT3, 5255 SDValue Op1, SDValue Op2) { 5256 SDVTList VTs = getVTList(VT1, VT2, VT3); 5257 SDValue Ops[] = { Op1, Op2 }; 5258 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5259} 5260 5261MachineSDNode * 5262SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5263 EVT VT1, EVT VT2, EVT VT3, 5264 SDValue Op1, SDValue Op2, SDValue Op3) { 5265 SDVTList VTs = getVTList(VT1, VT2, VT3); 5266 SDValue Ops[] = { Op1, Op2, Op3 }; 5267 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5268} 5269 5270MachineSDNode * 5271SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5272 EVT VT1, EVT VT2, EVT VT3, 5273 const SDValue *Ops, unsigned NumOps) { 5274 SDVTList VTs = getVTList(VT1, VT2, VT3); 5275 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5276} 5277 5278MachineSDNode * 5279SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5280 EVT VT2, EVT VT3, EVT VT4, 5281 const SDValue *Ops, unsigned NumOps) { 5282 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5283 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5284} 5285 5286MachineSDNode * 5287SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5288 const std::vector<EVT> &ResultTys, 5289 const SDValue *Ops, unsigned NumOps) { 5290 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5291 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5292} 5293 5294MachineSDNode * 5295SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5296 const SDValue *Ops, unsigned NumOps) { 5297 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5298 MachineSDNode *N; 5299 void *IP = 0; 5300 5301 if (DoCSE) { 5302 FoldingSetNodeID ID; 5303 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5304 IP = 0; 5305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5306 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5307 } 5308 } 5309 5310 // Allocate a new MachineSDNode. 5311 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5312 5313 // Initialize the operands list. 5314 if (NumOps > array_lengthof(N->LocalOperands)) 5315 // We're creating a final node that will live unmorphed for the 5316 // remainder of the current SelectionDAG iteration, so we can allocate 5317 // the operands directly out of a pool with no recycling metadata. 5318 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5319 Ops, NumOps); 5320 else 5321 N->InitOperands(N->LocalOperands, Ops, NumOps); 5322 N->OperandsNeedDelete = false; 5323 5324 if (DoCSE) 5325 CSEMap.InsertNode(N, IP); 5326 5327 AllNodes.push_back(N); 5328#ifndef NDEBUG 5329 VerifyMachineNode(N); 5330#endif 5331 return N; 5332} 5333 5334/// getTargetExtractSubreg - A convenience function for creating 5335/// TargetOpcode::EXTRACT_SUBREG nodes. 5336SDValue 5337SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5338 SDValue Operand) { 5339 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5340 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5341 VT, Operand, SRIdxVal); 5342 return SDValue(Subreg, 0); 5343} 5344 5345/// getTargetInsertSubreg - A convenience function for creating 5346/// TargetOpcode::INSERT_SUBREG nodes. 5347SDValue 5348SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5349 SDValue Operand, SDValue Subreg) { 5350 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5351 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5352 VT, Operand, Subreg, SRIdxVal); 5353 return SDValue(Result, 0); 5354} 5355 5356/// getNodeIfExists - Get the specified node if it's already available, or 5357/// else return NULL. 5358SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5359 const SDValue *Ops, unsigned NumOps) { 5360 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5361 FoldingSetNodeID ID; 5362 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5363 void *IP = 0; 5364 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5365 return E; 5366 } 5367 return NULL; 5368} 5369 5370/// getDbgValue - Creates a SDDbgValue node. 5371/// 5372SDDbgValue * 5373SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5374 DebugLoc DL, unsigned O) { 5375 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5376} 5377 5378SDDbgValue * 5379SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5380 DebugLoc DL, unsigned O) { 5381 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5382} 5383 5384SDDbgValue * 5385SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5386 DebugLoc DL, unsigned O) { 5387 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5388} 5389 5390namespace { 5391 5392/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5393/// pointed to by a use iterator is deleted, increment the use iterator 5394/// so that it doesn't dangle. 5395/// 5396class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5397 SDNode::use_iterator &UI; 5398 SDNode::use_iterator &UE; 5399 5400 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5401 // Increment the iterator as needed. 5402 while (UI != UE && N == *UI) 5403 ++UI; 5404 } 5405 5406public: 5407 RAUWUpdateListener(SelectionDAG &d, 5408 SDNode::use_iterator &ui, 5409 SDNode::use_iterator &ue) 5410 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5411}; 5412 5413} 5414 5415/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5416/// This can cause recursive merging of nodes in the DAG. 5417/// 5418/// This version assumes From has a single result value. 5419/// 5420void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5421 SDNode *From = FromN.getNode(); 5422 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5423 "Cannot replace with this method!"); 5424 assert(From != To.getNode() && "Cannot replace uses of with self"); 5425 5426 // Iterate over all the existing uses of From. New uses will be added 5427 // to the beginning of the use list, which we avoid visiting. 5428 // This specifically avoids visiting uses of From that arise while the 5429 // replacement is happening, because any such uses would be the result 5430 // of CSE: If an existing node looks like From after one of its operands 5431 // is replaced by To, we don't want to replace of all its users with To 5432 // too. See PR3018 for more info. 5433 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5434 RAUWUpdateListener Listener(*this, UI, UE); 5435 while (UI != UE) { 5436 SDNode *User = *UI; 5437 5438 // This node is about to morph, remove its old self from the CSE maps. 5439 RemoveNodeFromCSEMaps(User); 5440 5441 // A user can appear in a use list multiple times, and when this 5442 // happens the uses are usually next to each other in the list. 5443 // To help reduce the number of CSE recomputations, process all 5444 // the uses of this user that we can find this way. 5445 do { 5446 SDUse &Use = UI.getUse(); 5447 ++UI; 5448 Use.set(To); 5449 } while (UI != UE && *UI == User); 5450 5451 // Now that we have modified User, add it back to the CSE maps. If it 5452 // already exists there, recursively merge the results together. 5453 AddModifiedNodeToCSEMaps(User); 5454 } 5455 5456 // If we just RAUW'd the root, take note. 5457 if (FromN == getRoot()) 5458 setRoot(To); 5459} 5460 5461/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5462/// This can cause recursive merging of nodes in the DAG. 5463/// 5464/// This version assumes that for each value of From, there is a 5465/// corresponding value in To in the same position with the same type. 5466/// 5467void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5468#ifndef NDEBUG 5469 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5470 assert((!From->hasAnyUseOfValue(i) || 5471 From->getValueType(i) == To->getValueType(i)) && 5472 "Cannot use this version of ReplaceAllUsesWith!"); 5473#endif 5474 5475 // Handle the trivial case. 5476 if (From == To) 5477 return; 5478 5479 // Iterate over just the existing users of From. See the comments in 5480 // the ReplaceAllUsesWith above. 5481 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5482 RAUWUpdateListener Listener(*this, UI, UE); 5483 while (UI != UE) { 5484 SDNode *User = *UI; 5485 5486 // This node is about to morph, remove its old self from the CSE maps. 5487 RemoveNodeFromCSEMaps(User); 5488 5489 // A user can appear in a use list multiple times, and when this 5490 // happens the uses are usually next to each other in the list. 5491 // To help reduce the number of CSE recomputations, process all 5492 // the uses of this user that we can find this way. 5493 do { 5494 SDUse &Use = UI.getUse(); 5495 ++UI; 5496 Use.setNode(To); 5497 } while (UI != UE && *UI == User); 5498 5499 // Now that we have modified User, add it back to the CSE maps. If it 5500 // already exists there, recursively merge the results together. 5501 AddModifiedNodeToCSEMaps(User); 5502 } 5503 5504 // If we just RAUW'd the root, take note. 5505 if (From == getRoot().getNode()) 5506 setRoot(SDValue(To, getRoot().getResNo())); 5507} 5508 5509/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5510/// This can cause recursive merging of nodes in the DAG. 5511/// 5512/// This version can replace From with any result values. To must match the 5513/// number and types of values returned by From. 5514void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5515 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5516 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5517 5518 // Iterate over just the existing users of From. See the comments in 5519 // the ReplaceAllUsesWith above. 5520 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5521 RAUWUpdateListener Listener(*this, UI, UE); 5522 while (UI != UE) { 5523 SDNode *User = *UI; 5524 5525 // This node is about to morph, remove its old self from the CSE maps. 5526 RemoveNodeFromCSEMaps(User); 5527 5528 // A user can appear in a use list multiple times, and when this 5529 // happens the uses are usually next to each other in the list. 5530 // To help reduce the number of CSE recomputations, process all 5531 // the uses of this user that we can find this way. 5532 do { 5533 SDUse &Use = UI.getUse(); 5534 const SDValue &ToOp = To[Use.getResNo()]; 5535 ++UI; 5536 Use.set(ToOp); 5537 } while (UI != UE && *UI == User); 5538 5539 // Now that we have modified User, add it back to the CSE maps. If it 5540 // already exists there, recursively merge the results together. 5541 AddModifiedNodeToCSEMaps(User); 5542 } 5543 5544 // If we just RAUW'd the root, take note. 5545 if (From == getRoot().getNode()) 5546 setRoot(SDValue(To[getRoot().getResNo()])); 5547} 5548 5549/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5550/// uses of other values produced by From.getNode() alone. The Deleted 5551/// vector is handled the same way as for ReplaceAllUsesWith. 5552void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5553 // Handle the really simple, really trivial case efficiently. 5554 if (From == To) return; 5555 5556 // Handle the simple, trivial, case efficiently. 5557 if (From.getNode()->getNumValues() == 1) { 5558 ReplaceAllUsesWith(From, To); 5559 return; 5560 } 5561 5562 // Iterate over just the existing users of From. See the comments in 5563 // the ReplaceAllUsesWith above. 5564 SDNode::use_iterator UI = From.getNode()->use_begin(), 5565 UE = From.getNode()->use_end(); 5566 RAUWUpdateListener Listener(*this, UI, UE); 5567 while (UI != UE) { 5568 SDNode *User = *UI; 5569 bool UserRemovedFromCSEMaps = false; 5570 5571 // A user can appear in a use list multiple times, and when this 5572 // happens the uses are usually next to each other in the list. 5573 // To help reduce the number of CSE recomputations, process all 5574 // the uses of this user that we can find this way. 5575 do { 5576 SDUse &Use = UI.getUse(); 5577 5578 // Skip uses of different values from the same node. 5579 if (Use.getResNo() != From.getResNo()) { 5580 ++UI; 5581 continue; 5582 } 5583 5584 // If this node hasn't been modified yet, it's still in the CSE maps, 5585 // so remove its old self from the CSE maps. 5586 if (!UserRemovedFromCSEMaps) { 5587 RemoveNodeFromCSEMaps(User); 5588 UserRemovedFromCSEMaps = true; 5589 } 5590 5591 ++UI; 5592 Use.set(To); 5593 } while (UI != UE && *UI == User); 5594 5595 // We are iterating over all uses of the From node, so if a use 5596 // doesn't use the specific value, no changes are made. 5597 if (!UserRemovedFromCSEMaps) 5598 continue; 5599 5600 // Now that we have modified User, add it back to the CSE maps. If it 5601 // already exists there, recursively merge the results together. 5602 AddModifiedNodeToCSEMaps(User); 5603 } 5604 5605 // If we just RAUW'd the root, take note. 5606 if (From == getRoot()) 5607 setRoot(To); 5608} 5609 5610namespace { 5611 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5612 /// to record information about a use. 5613 struct UseMemo { 5614 SDNode *User; 5615 unsigned Index; 5616 SDUse *Use; 5617 }; 5618 5619 /// operator< - Sort Memos by User. 5620 bool operator<(const UseMemo &L, const UseMemo &R) { 5621 return (intptr_t)L.User < (intptr_t)R.User; 5622 } 5623} 5624 5625/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5626/// uses of other values produced by From.getNode() alone. The same value 5627/// may appear in both the From and To list. The Deleted vector is 5628/// handled the same way as for ReplaceAllUsesWith. 5629void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5630 const SDValue *To, 5631 unsigned Num){ 5632 // Handle the simple, trivial case efficiently. 5633 if (Num == 1) 5634 return ReplaceAllUsesOfValueWith(*From, *To); 5635 5636 // Read up all the uses and make records of them. This helps 5637 // processing new uses that are introduced during the 5638 // replacement process. 5639 SmallVector<UseMemo, 4> Uses; 5640 for (unsigned i = 0; i != Num; ++i) { 5641 unsigned FromResNo = From[i].getResNo(); 5642 SDNode *FromNode = From[i].getNode(); 5643 for (SDNode::use_iterator UI = FromNode->use_begin(), 5644 E = FromNode->use_end(); UI != E; ++UI) { 5645 SDUse &Use = UI.getUse(); 5646 if (Use.getResNo() == FromResNo) { 5647 UseMemo Memo = { *UI, i, &Use }; 5648 Uses.push_back(Memo); 5649 } 5650 } 5651 } 5652 5653 // Sort the uses, so that all the uses from a given User are together. 5654 std::sort(Uses.begin(), Uses.end()); 5655 5656 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5657 UseIndex != UseIndexEnd; ) { 5658 // We know that this user uses some value of From. If it is the right 5659 // value, update it. 5660 SDNode *User = Uses[UseIndex].User; 5661 5662 // This node is about to morph, remove its old self from the CSE maps. 5663 RemoveNodeFromCSEMaps(User); 5664 5665 // The Uses array is sorted, so all the uses for a given User 5666 // are next to each other in the list. 5667 // To help reduce the number of CSE recomputations, process all 5668 // the uses of this user that we can find this way. 5669 do { 5670 unsigned i = Uses[UseIndex].Index; 5671 SDUse &Use = *Uses[UseIndex].Use; 5672 ++UseIndex; 5673 5674 Use.set(To[i]); 5675 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5676 5677 // Now that we have modified User, add it back to the CSE maps. If it 5678 // already exists there, recursively merge the results together. 5679 AddModifiedNodeToCSEMaps(User); 5680 } 5681} 5682 5683/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5684/// based on their topological order. It returns the maximum id and a vector 5685/// of the SDNodes* in assigned order by reference. 5686unsigned SelectionDAG::AssignTopologicalOrder() { 5687 5688 unsigned DAGSize = 0; 5689 5690 // SortedPos tracks the progress of the algorithm. Nodes before it are 5691 // sorted, nodes after it are unsorted. When the algorithm completes 5692 // it is at the end of the list. 5693 allnodes_iterator SortedPos = allnodes_begin(); 5694 5695 // Visit all the nodes. Move nodes with no operands to the front of 5696 // the list immediately. Annotate nodes that do have operands with their 5697 // operand count. Before we do this, the Node Id fields of the nodes 5698 // may contain arbitrary values. After, the Node Id fields for nodes 5699 // before SortedPos will contain the topological sort index, and the 5700 // Node Id fields for nodes At SortedPos and after will contain the 5701 // count of outstanding operands. 5702 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5703 SDNode *N = I++; 5704 checkForCycles(N); 5705 unsigned Degree = N->getNumOperands(); 5706 if (Degree == 0) { 5707 // A node with no uses, add it to the result array immediately. 5708 N->setNodeId(DAGSize++); 5709 allnodes_iterator Q = N; 5710 if (Q != SortedPos) 5711 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5712 assert(SortedPos != AllNodes.end() && "Overran node list"); 5713 ++SortedPos; 5714 } else { 5715 // Temporarily use the Node Id as scratch space for the degree count. 5716 N->setNodeId(Degree); 5717 } 5718 } 5719 5720 // Visit all the nodes. As we iterate, move nodes into sorted order, 5721 // such that by the time the end is reached all nodes will be sorted. 5722 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5723 SDNode *N = I; 5724 checkForCycles(N); 5725 // N is in sorted position, so all its uses have one less operand 5726 // that needs to be sorted. 5727 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5728 UI != UE; ++UI) { 5729 SDNode *P = *UI; 5730 unsigned Degree = P->getNodeId(); 5731 assert(Degree != 0 && "Invalid node degree"); 5732 --Degree; 5733 if (Degree == 0) { 5734 // All of P's operands are sorted, so P may sorted now. 5735 P->setNodeId(DAGSize++); 5736 if (P != SortedPos) 5737 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5738 assert(SortedPos != AllNodes.end() && "Overran node list"); 5739 ++SortedPos; 5740 } else { 5741 // Update P's outstanding operand count. 5742 P->setNodeId(Degree); 5743 } 5744 } 5745 if (I == SortedPos) { 5746#ifndef NDEBUG 5747 SDNode *S = ++I; 5748 dbgs() << "Overran sorted position:\n"; 5749 S->dumprFull(); 5750#endif 5751 llvm_unreachable(0); 5752 } 5753 } 5754 5755 assert(SortedPos == AllNodes.end() && 5756 "Topological sort incomplete!"); 5757 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5758 "First node in topological sort is not the entry token!"); 5759 assert(AllNodes.front().getNodeId() == 0 && 5760 "First node in topological sort has non-zero id!"); 5761 assert(AllNodes.front().getNumOperands() == 0 && 5762 "First node in topological sort has operands!"); 5763 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5764 "Last node in topologic sort has unexpected id!"); 5765 assert(AllNodes.back().use_empty() && 5766 "Last node in topologic sort has users!"); 5767 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5768 return DAGSize; 5769} 5770 5771/// AssignOrdering - Assign an order to the SDNode. 5772void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5773 assert(SD && "Trying to assign an order to a null node!"); 5774 Ordering->add(SD, Order); 5775} 5776 5777/// GetOrdering - Get the order for the SDNode. 5778unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5779 assert(SD && "Trying to get the order of a null node!"); 5780 return Ordering->getOrder(SD); 5781} 5782 5783/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5784/// value is produced by SD. 5785void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5786 DbgInfo->add(DB, SD, isParameter); 5787 if (SD) 5788 SD->setHasDebugValue(true); 5789} 5790 5791/// TransferDbgValues - Transfer SDDbgValues. 5792void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5793 if (From == To || !From.getNode()->getHasDebugValue()) 5794 return; 5795 SDNode *FromNode = From.getNode(); 5796 SDNode *ToNode = To.getNode(); 5797 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5798 SmallVector<SDDbgValue *, 2> ClonedDVs; 5799 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5800 I != E; ++I) { 5801 SDDbgValue *Dbg = *I; 5802 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5803 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5804 Dbg->getOffset(), Dbg->getDebugLoc(), 5805 Dbg->getOrder()); 5806 ClonedDVs.push_back(Clone); 5807 } 5808 } 5809 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5810 E = ClonedDVs.end(); I != E; ++I) 5811 AddDbgValue(*I, ToNode, false); 5812} 5813 5814//===----------------------------------------------------------------------===// 5815// SDNode Class 5816//===----------------------------------------------------------------------===// 5817 5818HandleSDNode::~HandleSDNode() { 5819 DropOperands(); 5820} 5821 5822GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5823 const GlobalValue *GA, 5824 EVT VT, int64_t o, unsigned char TF) 5825 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5826 TheGlobal = GA; 5827} 5828 5829MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5830 MachineMemOperand *mmo) 5831 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5832 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5833 MMO->isNonTemporal(), MMO->isInvariant()); 5834 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5835 assert(isNonTemporal() == MMO->isNonTemporal() && 5836 "Non-temporal encoding error!"); 5837 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5838} 5839 5840MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5841 const SDValue *Ops, unsigned NumOps, EVT memvt, 5842 MachineMemOperand *mmo) 5843 : SDNode(Opc, dl, VTs, Ops, NumOps), 5844 MemoryVT(memvt), MMO(mmo) { 5845 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5846 MMO->isNonTemporal(), MMO->isInvariant()); 5847 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5848 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5849} 5850 5851/// Profile - Gather unique data for the node. 5852/// 5853void SDNode::Profile(FoldingSetNodeID &ID) const { 5854 AddNodeIDNode(ID, this); 5855} 5856 5857namespace { 5858 struct EVTArray { 5859 std::vector<EVT> VTs; 5860 5861 EVTArray() { 5862 VTs.reserve(MVT::LAST_VALUETYPE); 5863 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5864 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5865 } 5866 }; 5867} 5868 5869static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5870static ManagedStatic<EVTArray> SimpleVTArray; 5871static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5872 5873/// getValueTypeList - Return a pointer to the specified value type. 5874/// 5875const EVT *SDNode::getValueTypeList(EVT VT) { 5876 if (VT.isExtended()) { 5877 sys::SmartScopedLock<true> Lock(*VTMutex); 5878 return &(*EVTs->insert(VT).first); 5879 } else { 5880 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5881 "Value type out of range!"); 5882 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5883 } 5884} 5885 5886/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5887/// indicated value. This method ignores uses of other values defined by this 5888/// operation. 5889bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5890 assert(Value < getNumValues() && "Bad value!"); 5891 5892 // TODO: Only iterate over uses of a given value of the node 5893 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5894 if (UI.getUse().getResNo() == Value) { 5895 if (NUses == 0) 5896 return false; 5897 --NUses; 5898 } 5899 } 5900 5901 // Found exactly the right number of uses? 5902 return NUses == 0; 5903} 5904 5905 5906/// hasAnyUseOfValue - Return true if there are any use of the indicated 5907/// value. This method ignores uses of other values defined by this operation. 5908bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5909 assert(Value < getNumValues() && "Bad value!"); 5910 5911 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5912 if (UI.getUse().getResNo() == Value) 5913 return true; 5914 5915 return false; 5916} 5917 5918 5919/// isOnlyUserOf - Return true if this node is the only use of N. 5920/// 5921bool SDNode::isOnlyUserOf(SDNode *N) const { 5922 bool Seen = false; 5923 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5924 SDNode *User = *I; 5925 if (User == this) 5926 Seen = true; 5927 else 5928 return false; 5929 } 5930 5931 return Seen; 5932} 5933 5934/// isOperand - Return true if this node is an operand of N. 5935/// 5936bool SDValue::isOperandOf(SDNode *N) const { 5937 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5938 if (*this == N->getOperand(i)) 5939 return true; 5940 return false; 5941} 5942 5943bool SDNode::isOperandOf(SDNode *N) const { 5944 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5945 if (this == N->OperandList[i].getNode()) 5946 return true; 5947 return false; 5948} 5949 5950/// reachesChainWithoutSideEffects - Return true if this operand (which must 5951/// be a chain) reaches the specified operand without crossing any 5952/// side-effecting instructions on any chain path. In practice, this looks 5953/// through token factors and non-volatile loads. In order to remain efficient, 5954/// this only looks a couple of nodes in, it does not do an exhaustive search. 5955bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5956 unsigned Depth) const { 5957 if (*this == Dest) return true; 5958 5959 // Don't search too deeply, we just want to be able to see through 5960 // TokenFactor's etc. 5961 if (Depth == 0) return false; 5962 5963 // If this is a token factor, all inputs to the TF happen in parallel. If any 5964 // of the operands of the TF does not reach dest, then we cannot do the xform. 5965 if (getOpcode() == ISD::TokenFactor) { 5966 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5967 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5968 return false; 5969 return true; 5970 } 5971 5972 // Loads don't have side effects, look through them. 5973 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5974 if (!Ld->isVolatile()) 5975 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5976 } 5977 return false; 5978} 5979 5980/// hasPredecessor - Return true if N is a predecessor of this node. 5981/// N is either an operand of this node, or can be reached by recursively 5982/// traversing up the operands. 5983/// NOTE: This is an expensive method. Use it carefully. 5984bool SDNode::hasPredecessor(const SDNode *N) const { 5985 SmallPtrSet<const SDNode *, 32> Visited; 5986 SmallVector<const SDNode *, 16> Worklist; 5987 return hasPredecessorHelper(N, Visited, Worklist); 5988} 5989 5990bool SDNode::hasPredecessorHelper(const SDNode *N, 5991 SmallPtrSet<const SDNode *, 32> &Visited, 5992 SmallVector<const SDNode *, 16> &Worklist) const { 5993 if (Visited.empty()) { 5994 Worklist.push_back(this); 5995 } else { 5996 // Take a look in the visited set. If we've already encountered this node 5997 // we needn't search further. 5998 if (Visited.count(N)) 5999 return true; 6000 } 6001 6002 // Haven't visited N yet. Continue the search. 6003 while (!Worklist.empty()) { 6004 const SDNode *M = Worklist.pop_back_val(); 6005 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 6006 SDNode *Op = M->getOperand(i).getNode(); 6007 if (Visited.insert(Op)) 6008 Worklist.push_back(Op); 6009 if (Op == N) 6010 return true; 6011 } 6012 } 6013 6014 return false; 6015} 6016 6017uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 6018 assert(Num < NumOperands && "Invalid child # of SDNode!"); 6019 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 6020} 6021 6022SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6023 assert(N->getNumValues() == 1 && 6024 "Can't unroll a vector with multiple results!"); 6025 6026 EVT VT = N->getValueType(0); 6027 unsigned NE = VT.getVectorNumElements(); 6028 EVT EltVT = VT.getVectorElementType(); 6029 DebugLoc dl = N->getDebugLoc(); 6030 6031 SmallVector<SDValue, 8> Scalars; 6032 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6033 6034 // If ResNE is 0, fully unroll the vector op. 6035 if (ResNE == 0) 6036 ResNE = NE; 6037 else if (NE > ResNE) 6038 NE = ResNE; 6039 6040 unsigned i; 6041 for (i= 0; i != NE; ++i) { 6042 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6043 SDValue Operand = N->getOperand(j); 6044 EVT OperandVT = Operand.getValueType(); 6045 if (OperandVT.isVector()) { 6046 // A vector operand; extract a single element. 6047 EVT OperandEltVT = OperandVT.getVectorElementType(); 6048 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6049 OperandEltVT, 6050 Operand, 6051 getConstant(i, TLI.getPointerTy())); 6052 } else { 6053 // A scalar operand; just use it as is. 6054 Operands[j] = Operand; 6055 } 6056 } 6057 6058 switch (N->getOpcode()) { 6059 default: 6060 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6061 &Operands[0], Operands.size())); 6062 break; 6063 case ISD::VSELECT: 6064 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6065 &Operands[0], Operands.size())); 6066 break; 6067 case ISD::SHL: 6068 case ISD::SRA: 6069 case ISD::SRL: 6070 case ISD::ROTL: 6071 case ISD::ROTR: 6072 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6073 getShiftAmountOperand(Operands[0].getValueType(), 6074 Operands[1]))); 6075 break; 6076 case ISD::SIGN_EXTEND_INREG: 6077 case ISD::FP_ROUND_INREG: { 6078 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6079 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6080 Operands[0], 6081 getValueType(ExtVT))); 6082 } 6083 } 6084 } 6085 6086 for (; i < ResNE; ++i) 6087 Scalars.push_back(getUNDEF(EltVT)); 6088 6089 return getNode(ISD::BUILD_VECTOR, dl, 6090 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6091 &Scalars[0], Scalars.size()); 6092} 6093 6094 6095/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6096/// location that is 'Dist' units away from the location that the 'Base' load 6097/// is loading from. 6098bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6099 unsigned Bytes, int Dist) const { 6100 if (LD->getChain() != Base->getChain()) 6101 return false; 6102 EVT VT = LD->getValueType(0); 6103 if (VT.getSizeInBits() / 8 != Bytes) 6104 return false; 6105 6106 SDValue Loc = LD->getOperand(1); 6107 SDValue BaseLoc = Base->getOperand(1); 6108 if (Loc.getOpcode() == ISD::FrameIndex) { 6109 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6110 return false; 6111 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6112 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6113 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6114 int FS = MFI->getObjectSize(FI); 6115 int BFS = MFI->getObjectSize(BFI); 6116 if (FS != BFS || FS != (int)Bytes) return false; 6117 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6118 } 6119 6120 // Handle X+C 6121 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6122 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6123 return true; 6124 6125 const GlobalValue *GV1 = NULL; 6126 const GlobalValue *GV2 = NULL; 6127 int64_t Offset1 = 0; 6128 int64_t Offset2 = 0; 6129 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6130 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6131 if (isGA1 && isGA2 && GV1 == GV2) 6132 return Offset1 == (Offset2 + Dist*Bytes); 6133 return false; 6134} 6135 6136 6137/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6138/// it cannot be inferred. 6139unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6140 // If this is a GlobalAddress + cst, return the alignment. 6141 const GlobalValue *GV; 6142 int64_t GVOffset = 0; 6143 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6144 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6145 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6146 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6147 TLI.getDataLayout()); 6148 unsigned AlignBits = KnownZero.countTrailingOnes(); 6149 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6150 if (Align) 6151 return MinAlign(Align, GVOffset); 6152 } 6153 6154 // If this is a direct reference to a stack slot, use information about the 6155 // stack slot's alignment. 6156 int FrameIdx = 1 << 31; 6157 int64_t FrameOffset = 0; 6158 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6159 FrameIdx = FI->getIndex(); 6160 } else if (isBaseWithConstantOffset(Ptr) && 6161 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6162 // Handle FI+Cst 6163 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6164 FrameOffset = Ptr.getConstantOperandVal(1); 6165 } 6166 6167 if (FrameIdx != (1 << 31)) { 6168 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6169 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6170 FrameOffset); 6171 return FIInfoAlign; 6172 } 6173 6174 return 0; 6175} 6176 6177// getAddressSpace - Return the address space this GlobalAddress belongs to. 6178unsigned GlobalAddressSDNode::getAddressSpace() const { 6179 return getGlobal()->getType()->getAddressSpace(); 6180} 6181 6182 6183Type *ConstantPoolSDNode::getType() const { 6184 if (isMachineConstantPoolEntry()) 6185 return Val.MachineCPVal->getType(); 6186 return Val.ConstVal->getType(); 6187} 6188 6189bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6190 APInt &SplatUndef, 6191 unsigned &SplatBitSize, 6192 bool &HasAnyUndefs, 6193 unsigned MinSplatBits, 6194 bool isBigEndian) { 6195 EVT VT = getValueType(0); 6196 assert(VT.isVector() && "Expected a vector type"); 6197 unsigned sz = VT.getSizeInBits(); 6198 if (MinSplatBits > sz) 6199 return false; 6200 6201 SplatValue = APInt(sz, 0); 6202 SplatUndef = APInt(sz, 0); 6203 6204 // Get the bits. Bits with undefined values (when the corresponding element 6205 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6206 // in SplatValue. If any of the values are not constant, give up and return 6207 // false. 6208 unsigned int nOps = getNumOperands(); 6209 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6210 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6211 6212 for (unsigned j = 0; j < nOps; ++j) { 6213 unsigned i = isBigEndian ? nOps-1-j : j; 6214 SDValue OpVal = getOperand(i); 6215 unsigned BitPos = j * EltBitSize; 6216 6217 if (OpVal.getOpcode() == ISD::UNDEF) 6218 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6219 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6220 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6221 zextOrTrunc(sz) << BitPos; 6222 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6223 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6224 else 6225 return false; 6226 } 6227 6228 // The build_vector is all constants or undefs. Find the smallest element 6229 // size that splats the vector. 6230 6231 HasAnyUndefs = (SplatUndef != 0); 6232 while (sz > 8) { 6233 6234 unsigned HalfSize = sz / 2; 6235 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6236 APInt LowValue = SplatValue.trunc(HalfSize); 6237 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6238 APInt LowUndef = SplatUndef.trunc(HalfSize); 6239 6240 // If the two halves do not match (ignoring undef bits), stop here. 6241 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6242 MinSplatBits > HalfSize) 6243 break; 6244 6245 SplatValue = HighValue | LowValue; 6246 SplatUndef = HighUndef & LowUndef; 6247 6248 sz = HalfSize; 6249 } 6250 6251 SplatBitSize = sz; 6252 return true; 6253} 6254 6255bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6256 // Find the first non-undef value in the shuffle mask. 6257 unsigned i, e; 6258 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6259 /* search */; 6260 6261 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6262 6263 // Make sure all remaining elements are either undef or the same as the first 6264 // non-undef value. 6265 for (int Idx = Mask[i]; i != e; ++i) 6266 if (Mask[i] >= 0 && Mask[i] != Idx) 6267 return false; 6268 return true; 6269} 6270 6271#ifdef XDEBUG 6272static void checkForCyclesHelper(const SDNode *N, 6273 SmallPtrSet<const SDNode*, 32> &Visited, 6274 SmallPtrSet<const SDNode*, 32> &Checked) { 6275 // If this node has already been checked, don't check it again. 6276 if (Checked.count(N)) 6277 return; 6278 6279 // If a node has already been visited on this depth-first walk, reject it as 6280 // a cycle. 6281 if (!Visited.insert(N)) { 6282 dbgs() << "Offending node:\n"; 6283 N->dumprFull(); 6284 errs() << "Detected cycle in SelectionDAG\n"; 6285 abort(); 6286 } 6287 6288 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6289 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6290 6291 Checked.insert(N); 6292 Visited.erase(N); 6293} 6294#endif 6295 6296void llvm::checkForCycles(const llvm::SDNode *N) { 6297#ifdef XDEBUG 6298 assert(N && "Checking nonexistant SDNode"); 6299 SmallPtrSet<const SDNode*, 32> visited; 6300 SmallPtrSet<const SDNode*, 32> checked; 6301 checkForCyclesHelper(N, visited, checked); 6302#endif 6303} 6304 6305void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6306 checkForCycles(DAG->getRoot().getNode()); 6307} 6308