SelectionDAG.cpp revision 8819c84aed10777ba91d4e862229882b8da0b272
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeDbgValue.h" 16#include "llvm/ADT/SetVector.h" 17#include "llvm/ADT/SmallPtrSet.h" 18#include "llvm/ADT/SmallSet.h" 19#include "llvm/ADT/SmallVector.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/Analysis/TargetTransformInfo.h" 22#include "llvm/Analysis/ValueTracking.h" 23#include "llvm/Assembly/Writer.h" 24#include "llvm/CodeGen/MachineBasicBlock.h" 25#include "llvm/CodeGen/MachineConstantPool.h" 26#include "llvm/CodeGen/MachineFrameInfo.h" 27#include "llvm/CodeGen/MachineModuleInfo.h" 28#include "llvm/DebugInfo.h" 29#include "llvm/IR/CallingConv.h" 30#include "llvm/IR/Constants.h" 31#include "llvm/IR/DataLayout.h" 32#include "llvm/IR/DerivedTypes.h" 33#include "llvm/IR/Function.h" 34#include "llvm/IR/GlobalAlias.h" 35#include "llvm/IR/GlobalVariable.h" 36#include "llvm/IR/Intrinsics.h" 37#include "llvm/Support/CommandLine.h" 38#include "llvm/Support/Debug.h" 39#include "llvm/Support/ErrorHandling.h" 40#include "llvm/Support/ManagedStatic.h" 41#include "llvm/Support/MathExtras.h" 42#include "llvm/Support/Mutex.h" 43#include "llvm/Support/raw_ostream.h" 44#include "llvm/Target/TargetInstrInfo.h" 45#include "llvm/Target/TargetIntrinsicInfo.h" 46#include "llvm/Target/TargetLowering.h" 47#include "llvm/Target/TargetMachine.h" 48#include "llvm/Target/TargetOptions.h" 49#include "llvm/Target/TargetRegisterInfo.h" 50#include "llvm/Target/TargetSelectionDAGInfo.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62// Default null implementations of the callbacks. 63void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {} 64void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {} 65 66//===----------------------------------------------------------------------===// 67// ConstantFPSDNode Class 68//===----------------------------------------------------------------------===// 69 70/// isExactlyValue - We don't rely on operator== working on double values, as 71/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 72/// As such, this method can be used to do an exact bit-for-bit comparison of 73/// two floating point values. 74bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 75 return getValueAPF().bitwiseIsEqual(V); 76} 77 78bool ConstantFPSDNode::isValueValidForType(EVT VT, 79 const APFloat& Val) { 80 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 81 82 // convert modifies in place, so make a copy. 83 APFloat Val2 = APFloat(Val); 84 bool losesInfo; 85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT), 86 APFloat::rmNearestTiesToEven, 87 &losesInfo); 88 return !losesInfo; 89} 90 91//===----------------------------------------------------------------------===// 92// ISD Namespace 93//===----------------------------------------------------------------------===// 94 95/// isBuildVectorAllOnes - Return true if the specified node is a 96/// BUILD_VECTOR where all of the elements are ~0 or undef. 97bool ISD::isBuildVectorAllOnes(const SDNode *N) { 98 // Look through a bit convert. 99 if (N->getOpcode() == ISD::BITCAST) 100 N = N->getOperand(0).getNode(); 101 102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 103 104 unsigned i = 0, e = N->getNumOperands(); 105 106 // Skip over all of the undef values. 107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 108 ++i; 109 110 // Do not accept an all-undef vector. 111 if (i == e) return false; 112 113 // Do not accept build_vectors that aren't all constants or which have non-~0 114 // elements. We have to be a bit careful here, as the type of the constant 115 // may not be the same as the type of the vector elements due to type 116 // legalization (the elements are promoted to a legal type for the target and 117 // a vector of a type may be legal when the base element type is not). 118 // We only want to check enough bits to cover the vector elements, because 119 // we care if the resultant vector is all ones, not whether the individual 120 // constants are. 121 SDValue NotZero = N->getOperand(i); 122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); 123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) { 124 if (CN->getAPIntValue().countTrailingOnes() < EltSize) 125 return false; 126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) { 127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize) 128 return false; 129 } else 130 return false; 131 132 // Okay, we have at least one ~0 value, check to see if the rest match or are 133 // undefs. Even with the above element type twiddling, this should be OK, as 134 // the same type legalization should have applied to all the elements. 135 for (++i; i != e; ++i) 136 if (N->getOperand(i) != NotZero && 137 N->getOperand(i).getOpcode() != ISD::UNDEF) 138 return false; 139 return true; 140} 141 142 143/// isBuildVectorAllZeros - Return true if the specified node is a 144/// BUILD_VECTOR where all of the elements are 0 or undef. 145bool ISD::isBuildVectorAllZeros(const SDNode *N) { 146 // Look through a bit convert. 147 if (N->getOpcode() == ISD::BITCAST) 148 N = N->getOperand(0).getNode(); 149 150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 151 152 unsigned i = 0, e = N->getNumOperands(); 153 154 // Skip over all of the undef values. 155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 156 ++i; 157 158 // Do not accept an all-undef vector. 159 if (i == e) return false; 160 161 // Do not accept build_vectors that aren't all constants or which have non-0 162 // elements. 163 SDValue Zero = N->getOperand(i); 164 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) { 165 if (!CN->isNullValue()) 166 return false; 167 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) { 168 if (!CFPN->getValueAPF().isPosZero()) 169 return false; 170 } else 171 return false; 172 173 // Okay, we have at least one 0 value, check to see if the rest match or are 174 // undefs. 175 for (++i; i != e; ++i) 176 if (N->getOperand(i) != Zero && 177 N->getOperand(i).getOpcode() != ISD::UNDEF) 178 return false; 179 return true; 180} 181 182/// isScalarToVector - Return true if the specified node is a 183/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 184/// element is not an undef. 185bool ISD::isScalarToVector(const SDNode *N) { 186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 187 return true; 188 189 if (N->getOpcode() != ISD::BUILD_VECTOR) 190 return false; 191 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 192 return false; 193 unsigned NumElems = N->getNumOperands(); 194 if (NumElems == 1) 195 return false; 196 for (unsigned i = 1; i < NumElems; ++i) { 197 SDValue V = N->getOperand(i); 198 if (V.getOpcode() != ISD::UNDEF) 199 return false; 200 } 201 return true; 202} 203 204/// allOperandsUndef - Return true if the node has at least one operand 205/// and all operands of the specified node are ISD::UNDEF. 206bool ISD::allOperandsUndef(const SDNode *N) { 207 // Return false if the node has no operands. 208 // This is "logically inconsistent" with the definition of "all" but 209 // is probably the desired behavior. 210 if (N->getNumOperands() == 0) 211 return false; 212 213 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i) 214 if (N->getOperand(i).getOpcode() != ISD::UNDEF) 215 return false; 216 217 return true; 218} 219 220/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 221/// when given the operation for (X op Y). 222ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 223 // To perform this operation, we just need to swap the L and G bits of the 224 // operation. 225 unsigned OldL = (Operation >> 2) & 1; 226 unsigned OldG = (Operation >> 1) & 1; 227 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 228 (OldL << 1) | // New G bit 229 (OldG << 2)); // New L bit. 230} 231 232/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 233/// 'op' is a valid SetCC operation. 234ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 235 unsigned Operation = Op; 236 if (isInteger) 237 Operation ^= 7; // Flip L, G, E bits, but not U. 238 else 239 Operation ^= 15; // Flip all of the condition bits. 240 241 if (Operation > ISD::SETTRUE2) 242 Operation &= ~8; // Don't let N and U bits get set. 243 244 return ISD::CondCode(Operation); 245} 246 247 248/// isSignedOp - For an integer comparison, return 1 if the comparison is a 249/// signed operation and 2 if the result is an unsigned comparison. Return zero 250/// if the operation does not depend on the sign of the input (setne and seteq). 251static int isSignedOp(ISD::CondCode Opcode) { 252 switch (Opcode) { 253 default: llvm_unreachable("Illegal integer setcc operation!"); 254 case ISD::SETEQ: 255 case ISD::SETNE: return 0; 256 case ISD::SETLT: 257 case ISD::SETLE: 258 case ISD::SETGT: 259 case ISD::SETGE: return 1; 260 case ISD::SETULT: 261 case ISD::SETULE: 262 case ISD::SETUGT: 263 case ISD::SETUGE: return 2; 264 } 265} 266 267/// getSetCCOrOperation - Return the result of a logical OR between different 268/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 269/// returns SETCC_INVALID if it is not possible to represent the resultant 270/// comparison. 271ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 272 bool isInteger) { 273 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 274 // Cannot fold a signed integer setcc with an unsigned integer setcc. 275 return ISD::SETCC_INVALID; 276 277 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 278 279 // If the N and U bits get set then the resultant comparison DOES suddenly 280 // care about orderedness, and is true when ordered. 281 if (Op > ISD::SETTRUE2) 282 Op &= ~16; // Clear the U bit if the N bit is set. 283 284 // Canonicalize illegal integer setcc's. 285 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 286 Op = ISD::SETNE; 287 288 return ISD::CondCode(Op); 289} 290 291/// getSetCCAndOperation - Return the result of a logical AND between different 292/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 293/// function returns zero if it is not possible to represent the resultant 294/// comparison. 295ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 296 bool isInteger) { 297 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 298 // Cannot fold a signed setcc with an unsigned setcc. 299 return ISD::SETCC_INVALID; 300 301 // Combine all of the condition bits. 302 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 303 304 // Canonicalize illegal integer setcc's. 305 if (isInteger) { 306 switch (Result) { 307 default: break; 308 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 309 case ISD::SETOEQ: // SETEQ & SETU[LG]E 310 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 311 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 312 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 313 } 314 } 315 316 return Result; 317} 318 319//===----------------------------------------------------------------------===// 320// SDNode Profile Support 321//===----------------------------------------------------------------------===// 322 323/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 324/// 325static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 326 ID.AddInteger(OpC); 327} 328 329/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 330/// solely with their pointer. 331static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 332 ID.AddPointer(VTList.VTs); 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDValue *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 346/// 347static void AddNodeIDOperands(FoldingSetNodeID &ID, 348 const SDUse *Ops, unsigned NumOps) { 349 for (; NumOps; --NumOps, ++Ops) { 350 ID.AddPointer(Ops->getNode()); 351 ID.AddInteger(Ops->getResNo()); 352 } 353} 354 355static void AddNodeIDNode(FoldingSetNodeID &ID, 356 unsigned short OpC, SDVTList VTList, 357 const SDValue *OpList, unsigned N) { 358 AddNodeIDOpcode(ID, OpC); 359 AddNodeIDValueTypes(ID, VTList); 360 AddNodeIDOperands(ID, OpList, N); 361} 362 363/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 364/// the NodeID data. 365static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 366 switch (N->getOpcode()) { 367 case ISD::TargetExternalSymbol: 368 case ISD::ExternalSymbol: 369 llvm_unreachable("Should only be used on nodes with operands"); 370 default: break; // Normal nodes don't need extra info. 371 case ISD::TargetConstant: 372 case ISD::Constant: 373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 374 break; 375 case ISD::TargetConstantFP: 376 case ISD::ConstantFP: { 377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 378 break; 379 } 380 case ISD::TargetGlobalAddress: 381 case ISD::GlobalAddress: 382 case ISD::TargetGlobalTLSAddress: 383 case ISD::GlobalTLSAddress: { 384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 385 ID.AddPointer(GA->getGlobal()); 386 ID.AddInteger(GA->getOffset()); 387 ID.AddInteger(GA->getTargetFlags()); 388 ID.AddInteger(GA->getAddressSpace()); 389 break; 390 } 391 case ISD::BasicBlock: 392 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 393 break; 394 case ISD::Register: 395 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 396 break; 397 case ISD::RegisterMask: 398 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 399 break; 400 case ISD::SRCVALUE: 401 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 402 break; 403 case ISD::FrameIndex: 404 case ISD::TargetFrameIndex: 405 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 406 break; 407 case ISD::JumpTable: 408 case ISD::TargetJumpTable: 409 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 410 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 411 break; 412 case ISD::ConstantPool: 413 case ISD::TargetConstantPool: { 414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 415 ID.AddInteger(CP->getAlignment()); 416 ID.AddInteger(CP->getOffset()); 417 if (CP->isMachineConstantPoolEntry()) 418 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 419 else 420 ID.AddPointer(CP->getConstVal()); 421 ID.AddInteger(CP->getTargetFlags()); 422 break; 423 } 424 case ISD::TargetIndex: { 425 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N); 426 ID.AddInteger(TI->getIndex()); 427 ID.AddInteger(TI->getOffset()); 428 ID.AddInteger(TI->getTargetFlags()); 429 break; 430 } 431 case ISD::LOAD: { 432 const LoadSDNode *LD = cast<LoadSDNode>(N); 433 ID.AddInteger(LD->getMemoryVT().getRawBits()); 434 ID.AddInteger(LD->getRawSubclassData()); 435 ID.AddInteger(LD->getPointerInfo().getAddrSpace()); 436 break; 437 } 438 case ISD::STORE: { 439 const StoreSDNode *ST = cast<StoreSDNode>(N); 440 ID.AddInteger(ST->getMemoryVT().getRawBits()); 441 ID.AddInteger(ST->getRawSubclassData()); 442 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 443 break; 444 } 445 case ISD::ATOMIC_CMP_SWAP: 446 case ISD::ATOMIC_SWAP: 447 case ISD::ATOMIC_LOAD_ADD: 448 case ISD::ATOMIC_LOAD_SUB: 449 case ISD::ATOMIC_LOAD_AND: 450 case ISD::ATOMIC_LOAD_OR: 451 case ISD::ATOMIC_LOAD_XOR: 452 case ISD::ATOMIC_LOAD_NAND: 453 case ISD::ATOMIC_LOAD_MIN: 454 case ISD::ATOMIC_LOAD_MAX: 455 case ISD::ATOMIC_LOAD_UMIN: 456 case ISD::ATOMIC_LOAD_UMAX: 457 case ISD::ATOMIC_LOAD: 458 case ISD::ATOMIC_STORE: { 459 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 460 ID.AddInteger(AT->getMemoryVT().getRawBits()); 461 ID.AddInteger(AT->getRawSubclassData()); 462 ID.AddInteger(AT->getPointerInfo().getAddrSpace()); 463 break; 464 } 465 case ISD::PREFETCH: { 466 const MemSDNode *PF = cast<MemSDNode>(N); 467 ID.AddInteger(PF->getPointerInfo().getAddrSpace()); 468 break; 469 } 470 case ISD::VECTOR_SHUFFLE: { 471 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 472 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 473 i != e; ++i) 474 ID.AddInteger(SVN->getMaskElt(i)); 475 break; 476 } 477 case ISD::TargetBlockAddress: 478 case ISD::BlockAddress: { 479 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N); 480 ID.AddPointer(BA->getBlockAddress()); 481 ID.AddInteger(BA->getOffset()); 482 ID.AddInteger(BA->getTargetFlags()); 483 break; 484 } 485 } // end switch (N->getOpcode()) 486 487 // Target specific memory nodes could also have address spaces to check. 488 if (N->isTargetMemoryOpcode()) 489 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); 490} 491 492/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 493/// data. 494static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 495 AddNodeIDOpcode(ID, N->getOpcode()); 496 // Add the return value info. 497 AddNodeIDValueTypes(ID, N->getVTList()); 498 // Add the operand info. 499 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 500 501 // Handle SDNode leafs with special info. 502 AddNodeIDCustom(ID, N); 503} 504 505/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 506/// the CSE map that carries volatility, temporalness, indexing mode, and 507/// extension/truncation information. 508/// 509static inline unsigned 510encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 511 bool isNonTemporal, bool isInvariant) { 512 assert((ConvType & 3) == ConvType && 513 "ConvType may not require more than 2 bits!"); 514 assert((AM & 7) == AM && 515 "AM may not require more than 3 bits!"); 516 return ConvType | 517 (AM << 2) | 518 (isVolatile << 5) | 519 (isNonTemporal << 6) | 520 (isInvariant << 7); 521} 522 523//===----------------------------------------------------------------------===// 524// SelectionDAG Class 525//===----------------------------------------------------------------------===// 526 527/// doNotCSE - Return true if CSE should not be performed for this node. 528static bool doNotCSE(SDNode *N) { 529 if (N->getValueType(0) == MVT::Glue) 530 return true; // Never CSE anything that produces a flag. 531 532 switch (N->getOpcode()) { 533 default: break; 534 case ISD::HANDLENODE: 535 case ISD::EH_LABEL: 536 return true; // Never CSE these nodes. 537 } 538 539 // Check that remaining values produced are not flags. 540 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 541 if (N->getValueType(i) == MVT::Glue) 542 return true; // Never CSE anything that produces a flag. 543 544 return false; 545} 546 547/// RemoveDeadNodes - This method deletes all unreachable nodes in the 548/// SelectionDAG. 549void SelectionDAG::RemoveDeadNodes() { 550 // Create a dummy node (which is not added to allnodes), that adds a reference 551 // to the root node, preventing it from being deleted. 552 HandleSDNode Dummy(getRoot()); 553 554 SmallVector<SDNode*, 128> DeadNodes; 555 556 // Add all obviously-dead nodes to the DeadNodes worklist. 557 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 558 if (I->use_empty()) 559 DeadNodes.push_back(I); 560 561 RemoveDeadNodes(DeadNodes); 562 563 // If the root changed (e.g. it was a dead load, update the root). 564 setRoot(Dummy.getValue()); 565} 566 567/// RemoveDeadNodes - This method deletes the unreachable nodes in the 568/// given list, and any nodes that become unreachable as a result. 569void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) { 570 571 // Process the worklist, deleting the nodes and adding their uses to the 572 // worklist. 573 while (!DeadNodes.empty()) { 574 SDNode *N = DeadNodes.pop_back_val(); 575 576 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 577 DUL->NodeDeleted(N, 0); 578 579 // Take the node out of the appropriate CSE map. 580 RemoveNodeFromCSEMaps(N); 581 582 // Next, brutally remove the operand list. This is safe to do, as there are 583 // no cycles in the graph. 584 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 585 SDUse &Use = *I++; 586 SDNode *Operand = Use.getNode(); 587 Use.set(SDValue()); 588 589 // Now that we removed this operand, see if there are no uses of it left. 590 if (Operand->use_empty()) 591 DeadNodes.push_back(Operand); 592 } 593 594 DeallocateNode(N); 595 } 596} 597 598void SelectionDAG::RemoveDeadNode(SDNode *N){ 599 SmallVector<SDNode*, 16> DeadNodes(1, N); 600 601 // Create a dummy node that adds a reference to the root node, preventing 602 // it from being deleted. (This matters if the root is an operand of the 603 // dead node.) 604 HandleSDNode Dummy(getRoot()); 605 606 RemoveDeadNodes(DeadNodes); 607} 608 609void SelectionDAG::DeleteNode(SDNode *N) { 610 // First take this out of the appropriate CSE map. 611 RemoveNodeFromCSEMaps(N); 612 613 // Finally, remove uses due to operands of this node, remove from the 614 // AllNodes list, and delete the node. 615 DeleteNodeNotInCSEMaps(N); 616} 617 618void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 619 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 620 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 621 622 // Drop all of the operands and decrement used node's use counts. 623 N->DropOperands(); 624 625 DeallocateNode(N); 626} 627 628void SelectionDAG::DeallocateNode(SDNode *N) { 629 if (N->OperandsNeedDelete) 630 delete[] N->OperandList; 631 632 // Set the opcode to DELETED_NODE to help catch bugs when node 633 // memory is reallocated. 634 N->NodeType = ISD::DELETED_NODE; 635 636 NodeAllocator.Deallocate(AllNodes.remove(N)); 637 638 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 639 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 640 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 641 DbgVals[i]->setIsInvalidated(); 642} 643 644/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 645/// correspond to it. This is useful when we're about to delete or repurpose 646/// the node. We don't want future request for structurally identical nodes 647/// to return N anymore. 648bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 649 bool Erased = false; 650 switch (N->getOpcode()) { 651 case ISD::HANDLENODE: return false; // noop. 652 case ISD::CONDCODE: 653 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 654 "Cond code doesn't exist!"); 655 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 656 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 657 break; 658 case ISD::ExternalSymbol: 659 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 660 break; 661 case ISD::TargetExternalSymbol: { 662 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 663 Erased = TargetExternalSymbols.erase( 664 std::pair<std::string,unsigned char>(ESN->getSymbol(), 665 ESN->getTargetFlags())); 666 break; 667 } 668 case ISD::VALUETYPE: { 669 EVT VT = cast<VTSDNode>(N)->getVT(); 670 if (VT.isExtended()) { 671 Erased = ExtendedValueTypeNodes.erase(VT); 672 } else { 673 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 674 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 675 } 676 break; 677 } 678 default: 679 // Remove it from the CSE Map. 680 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 681 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 682 Erased = CSEMap.RemoveNode(N); 683 break; 684 } 685#ifndef NDEBUG 686 // Verify that the node was actually in one of the CSE maps, unless it has a 687 // flag result (which cannot be CSE'd) or is one of the special cases that are 688 // not subject to CSE. 689 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 690 !N->isMachineOpcode() && !doNotCSE(N)) { 691 N->dump(this); 692 dbgs() << "\n"; 693 llvm_unreachable("Node is not in map!"); 694 } 695#endif 696 return Erased; 697} 698 699/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 700/// maps and modified in place. Add it back to the CSE maps, unless an identical 701/// node already exists, in which case transfer all its users to the existing 702/// node. This transfer can potentially trigger recursive merging. 703/// 704void 705SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) { 706 // For node types that aren't CSE'd, just act as if no identical node 707 // already exists. 708 if (!doNotCSE(N)) { 709 SDNode *Existing = CSEMap.GetOrInsertNode(N); 710 if (Existing != N) { 711 // If there was already an existing matching node, use ReplaceAllUsesWith 712 // to replace the dead one with the existing one. This can cause 713 // recursive merging of other unrelated nodes down the line. 714 ReplaceAllUsesWith(N, Existing); 715 716 // N is now dead. Inform the listeners and delete it. 717 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 718 DUL->NodeDeleted(N, Existing); 719 DeleteNodeNotInCSEMaps(N); 720 return; 721 } 722 } 723 724 // If the node doesn't already exist, we updated it. Inform listeners. 725 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next) 726 DUL->NodeUpdated(N); 727} 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 734 void *&InsertPos) { 735 if (doNotCSE(N)) 736 return 0; 737 738 SDValue Ops[] = { Op }; 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 747/// were replaced with those specified. If this node is never memoized, 748/// return null, otherwise return a pointer to the slot it would take. If a 749/// node already exists with these operands, the slot will be non-null. 750SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 751 SDValue Op1, SDValue Op2, 752 void *&InsertPos) { 753 if (doNotCSE(N)) 754 return 0; 755 756 SDValue Ops[] = { Op1, Op2 }; 757 FoldingSetNodeID ID; 758 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 759 AddNodeIDCustom(ID, N); 760 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 761 return Node; 762} 763 764 765/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 766/// were replaced with those specified. If this node is never memoized, 767/// return null, otherwise return a pointer to the slot it would take. If a 768/// node already exists with these operands, the slot will be non-null. 769SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 770 const SDValue *Ops,unsigned NumOps, 771 void *&InsertPos) { 772 if (doNotCSE(N)) 773 return 0; 774 775 FoldingSetNodeID ID; 776 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 777 AddNodeIDCustom(ID, N); 778 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 779 return Node; 780} 781 782#ifndef NDEBUG 783/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 784static void VerifyNodeCommon(SDNode *N) { 785 switch (N->getOpcode()) { 786 default: 787 break; 788 case ISD::BUILD_PAIR: { 789 EVT VT = N->getValueType(0); 790 assert(N->getNumValues() == 1 && "Too many results!"); 791 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 792 "Wrong return type!"); 793 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 794 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 795 "Mismatched operand types!"); 796 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 797 "Wrong operand type!"); 798 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 799 "Wrong return type size"); 800 break; 801 } 802 case ISD::BUILD_VECTOR: { 803 assert(N->getNumValues() == 1 && "Too many results!"); 804 assert(N->getValueType(0).isVector() && "Wrong return type!"); 805 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 806 "Wrong number of operands!"); 807 EVT EltVT = N->getValueType(0).getVectorElementType(); 808 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 809 assert((I->getValueType() == EltVT || 810 (EltVT.isInteger() && I->getValueType().isInteger() && 811 EltVT.bitsLE(I->getValueType()))) && 812 "Wrong operand type!"); 813 assert(I->getValueType() == N->getOperand(0).getValueType() && 814 "Operands must all have the same type"); 815 } 816 break; 817 } 818 } 819} 820 821/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 822static void VerifySDNode(SDNode *N) { 823 // The SDNode allocators cannot be used to allocate nodes with fields that are 824 // not present in an SDNode! 825 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 826 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 827 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 828 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 829 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 830 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 831 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 832 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 833 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 834 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 835 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 836 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 837 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 838 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 839 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 840 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 841 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 842 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 843 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 844 845 VerifyNodeCommon(N); 846} 847 848/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 849/// invalid. 850static void VerifyMachineNode(SDNode *N) { 851 // The MachineNode allocators cannot be used to allocate nodes with fields 852 // that are not present in a MachineNode! 853 // Currently there are no such nodes. 854 855 VerifyNodeCommon(N); 856} 857#endif // NDEBUG 858 859/// getEVTAlignment - Compute the default alignment value for the 860/// given type. 861/// 862unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 863 Type *Ty = VT == MVT::iPTR ? 864 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 865 VT.getTypeForEVT(*getContext()); 866 867 return TM.getTargetLowering()->getDataLayout()->getABITypeAlignment(Ty); 868} 869 870// EntryNode could meaningfully have debug info if we can find it... 871SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 872 : TM(tm), TSI(*tm.getSelectionDAGInfo()), TTI(0), OptLevel(OL), 873 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)), 874 Root(getEntryNode()), UpdateListeners(0) { 875 AllNodes.push_back(&EntryNode); 876 DbgInfo = new SDDbgInfo(); 877} 878 879void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) { 880 MF = &mf; 881 TTI = tti; 882 Context = &mf.getFunction()->getContext(); 883} 884 885SelectionDAG::~SelectionDAG() { 886 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners"); 887 allnodes_clear(); 888 delete DbgInfo; 889} 890 891void SelectionDAG::allnodes_clear() { 892 assert(&*AllNodes.begin() == &EntryNode); 893 AllNodes.remove(AllNodes.begin()); 894 while (!AllNodes.empty()) 895 DeallocateNode(AllNodes.begin()); 896} 897 898void SelectionDAG::clear() { 899 allnodes_clear(); 900 OperandAllocator.Reset(); 901 CSEMap.clear(); 902 903 ExtendedValueTypeNodes.clear(); 904 ExternalSymbols.clear(); 905 TargetExternalSymbols.clear(); 906 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 907 static_cast<CondCodeSDNode*>(0)); 908 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 909 static_cast<SDNode*>(0)); 910 911 EntryNode.UseList = 0; 912 AllNodes.push_back(&EntryNode); 913 Root = getEntryNode(); 914 DbgInfo->clear(); 915} 916 917SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 918 return VT.bitsGT(Op.getValueType()) ? 919 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 920 getNode(ISD::TRUNCATE, DL, VT, Op); 921} 922 923SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 924 return VT.bitsGT(Op.getValueType()) ? 925 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 926 getNode(ISD::TRUNCATE, DL, VT, Op); 927} 928 929SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) { 930 return VT.bitsGT(Op.getValueType()) ? 931 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 932 getNode(ISD::TRUNCATE, DL, VT, Op); 933} 934 935SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) { 936 assert(!VT.isVector() && 937 "getZeroExtendInReg should use the vector element type instead of " 938 "the vector type!"); 939 if (Op.getValueType() == VT) return Op; 940 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 941 APInt Imm = APInt::getLowBitsSet(BitWidth, 942 VT.getSizeInBits()); 943 return getNode(ISD::AND, DL, Op.getValueType(), Op, 944 getConstant(Imm, Op.getValueType())); 945} 946 947/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 948/// 949SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) { 950 EVT EltVT = VT.getScalarType(); 951 SDValue NegOne = 952 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 953 return getNode(ISD::XOR, DL, VT, Val, NegOne); 954} 955 956SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 957 EVT EltVT = VT.getScalarType(); 958 assert((EltVT.getSizeInBits() >= 64 || 959 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 960 "getConstant with a uint64_t value that doesn't fit in the type!"); 961 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 962} 963 964SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 965 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 966} 967 968SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 969 assert(VT.isInteger() && "Cannot create FP integer constant!"); 970 971 EVT EltVT = VT.getScalarType(); 972 const ConstantInt *Elt = &Val; 973 974 const TargetLowering *TLI = TM.getTargetLowering(); 975 976 // In some cases the vector type is legal but the element type is illegal and 977 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 978 // inserted value (the type does not need to match the vector element type). 979 // Any extra bits introduced will be truncated away. 980 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) == 981 TargetLowering::TypePromoteInteger) { 982 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT); 983 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 984 Elt = ConstantInt::get(*getContext(), NewVal); 985 } 986 987 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 988 "APInt size does not match type size!"); 989 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 990 FoldingSetNodeID ID; 991 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 992 ID.AddPointer(Elt); 993 void *IP = 0; 994 SDNode *N = NULL; 995 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 996 if (!VT.isVector()) 997 return SDValue(N, 0); 998 999 if (!N) { 1000 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 1001 CSEMap.InsertNode(N, IP); 1002 AllNodes.push_back(N); 1003 } 1004 1005 SDValue Result(N, 0); 1006 if (VT.isVector()) { 1007 SmallVector<SDValue, 8> Ops; 1008 Ops.assign(VT.getVectorNumElements(), Result); 1009 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size()); 1010 } 1011 return Result; 1012} 1013 1014SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 1015 return getConstant(Val, TM.getTargetLowering()->getPointerTy(), isTarget); 1016} 1017 1018 1019SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 1020 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 1021} 1022 1023SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 1024 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 1025 1026 EVT EltVT = VT.getScalarType(); 1027 1028 // Do the map lookup using the actual bit pattern for the floating point 1029 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1030 // we don't have issues with SNANs. 1031 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1032 FoldingSetNodeID ID; 1033 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1034 ID.AddPointer(&V); 1035 void *IP = 0; 1036 SDNode *N = NULL; 1037 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1038 if (!VT.isVector()) 1039 return SDValue(N, 0); 1040 1041 if (!N) { 1042 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1043 CSEMap.InsertNode(N, IP); 1044 AllNodes.push_back(N); 1045 } 1046 1047 SDValue Result(N, 0); 1048 if (VT.isVector()) { 1049 SmallVector<SDValue, 8> Ops; 1050 Ops.assign(VT.getVectorNumElements(), Result); 1051 // FIXME SDLoc info might be appropriate here 1052 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size()); 1053 } 1054 return Result; 1055} 1056 1057SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1058 EVT EltVT = VT.getScalarType(); 1059 if (EltVT==MVT::f32) 1060 return getConstantFP(APFloat((float)Val), VT, isTarget); 1061 else if (EltVT==MVT::f64) 1062 return getConstantFP(APFloat(Val), VT, isTarget); 1063 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 || 1064 EltVT==MVT::f16) { 1065 bool ignored; 1066 APFloat apf = APFloat(Val); 1067 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1068 &ignored); 1069 return getConstantFP(apf, VT, isTarget); 1070 } else 1071 llvm_unreachable("Unsupported type in getConstantFP"); 1072} 1073 1074SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL, 1075 EVT VT, int64_t Offset, 1076 bool isTargetGA, 1077 unsigned char TargetFlags) { 1078 assert((TargetFlags == 0 || isTargetGA) && 1079 "Cannot set target flags on target-independent globals"); 1080 1081 // Truncate (with sign-extension) the offset value to the pointer size. 1082 unsigned BitWidth = TM.getTargetLowering()->getPointerTy().getSizeInBits(); 1083 if (BitWidth < 64) 1084 Offset = SignExtend64(Offset, BitWidth); 1085 1086 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1087 if (!GVar) { 1088 // If GV is an alias then use the aliasee for determining thread-localness. 1089 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1090 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1091 } 1092 1093 unsigned Opc; 1094 if (GVar && GVar->isThreadLocal()) 1095 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1096 else 1097 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1098 1099 FoldingSetNodeID ID; 1100 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1101 ID.AddPointer(GV); 1102 ID.AddInteger(Offset); 1103 ID.AddInteger(TargetFlags); 1104 ID.AddInteger(GV->getType()->getAddressSpace()); 1105 void *IP = 0; 1106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1107 return SDValue(E, 0); 1108 1109 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(), 1110 DL.getDebugLoc(), GV, VT, 1111 Offset, TargetFlags); 1112 CSEMap.InsertNode(N, IP); 1113 AllNodes.push_back(N); 1114 return SDValue(N, 0); 1115} 1116 1117SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1118 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1119 FoldingSetNodeID ID; 1120 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1121 ID.AddInteger(FI); 1122 void *IP = 0; 1123 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1124 return SDValue(E, 0); 1125 1126 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1127 CSEMap.InsertNode(N, IP); 1128 AllNodes.push_back(N); 1129 return SDValue(N, 0); 1130} 1131 1132SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1133 unsigned char TargetFlags) { 1134 assert((TargetFlags == 0 || isTarget) && 1135 "Cannot set target flags on target-independent jump tables"); 1136 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1137 FoldingSetNodeID ID; 1138 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1139 ID.AddInteger(JTI); 1140 ID.AddInteger(TargetFlags); 1141 void *IP = 0; 1142 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1143 return SDValue(E, 0); 1144 1145 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1146 TargetFlags); 1147 CSEMap.InsertNode(N, IP); 1148 AllNodes.push_back(N); 1149 return SDValue(N, 0); 1150} 1151 1152SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1153 unsigned Alignment, int Offset, 1154 bool isTarget, 1155 unsigned char TargetFlags) { 1156 assert((TargetFlags == 0 || isTarget) && 1157 "Cannot set target flags on target-independent globals"); 1158 if (Alignment == 0) 1159 Alignment = 1160 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType()); 1161 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1162 FoldingSetNodeID ID; 1163 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1164 ID.AddInteger(Alignment); 1165 ID.AddInteger(Offset); 1166 ID.AddPointer(C); 1167 ID.AddInteger(TargetFlags); 1168 void *IP = 0; 1169 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1170 return SDValue(E, 0); 1171 1172 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1173 Alignment, TargetFlags); 1174 CSEMap.InsertNode(N, IP); 1175 AllNodes.push_back(N); 1176 return SDValue(N, 0); 1177} 1178 1179 1180SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1181 unsigned Alignment, int Offset, 1182 bool isTarget, 1183 unsigned char TargetFlags) { 1184 assert((TargetFlags == 0 || isTarget) && 1185 "Cannot set target flags on target-independent globals"); 1186 if (Alignment == 0) 1187 Alignment = 1188 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType()); 1189 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1190 FoldingSetNodeID ID; 1191 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1192 ID.AddInteger(Alignment); 1193 ID.AddInteger(Offset); 1194 C->addSelectionDAGCSEId(ID); 1195 ID.AddInteger(TargetFlags); 1196 void *IP = 0; 1197 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1198 return SDValue(E, 0); 1199 1200 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1201 Alignment, TargetFlags); 1202 CSEMap.InsertNode(N, IP); 1203 AllNodes.push_back(N); 1204 return SDValue(N, 0); 1205} 1206 1207SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset, 1208 unsigned char TargetFlags) { 1209 FoldingSetNodeID ID; 1210 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0); 1211 ID.AddInteger(Index); 1212 ID.AddInteger(Offset); 1213 ID.AddInteger(TargetFlags); 1214 void *IP = 0; 1215 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1216 return SDValue(E, 0); 1217 1218 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, 1219 TargetFlags); 1220 CSEMap.InsertNode(N, IP); 1221 AllNodes.push_back(N); 1222 return SDValue(N, 0); 1223} 1224 1225SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1226 FoldingSetNodeID ID; 1227 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1228 ID.AddPointer(MBB); 1229 void *IP = 0; 1230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1231 return SDValue(E, 0); 1232 1233 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1234 CSEMap.InsertNode(N, IP); 1235 AllNodes.push_back(N); 1236 return SDValue(N, 0); 1237} 1238 1239SDValue SelectionDAG::getValueType(EVT VT) { 1240 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1241 ValueTypeNodes.size()) 1242 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1243 1244 SDNode *&N = VT.isExtended() ? 1245 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1246 1247 if (N) return SDValue(N, 0); 1248 N = new (NodeAllocator) VTSDNode(VT); 1249 AllNodes.push_back(N); 1250 return SDValue(N, 0); 1251} 1252 1253SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1254 SDNode *&N = ExternalSymbols[Sym]; 1255 if (N) return SDValue(N, 0); 1256 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1257 AllNodes.push_back(N); 1258 return SDValue(N, 0); 1259} 1260 1261SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1262 unsigned char TargetFlags) { 1263 SDNode *&N = 1264 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1265 TargetFlags)]; 1266 if (N) return SDValue(N, 0); 1267 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1273 if ((unsigned)Cond >= CondCodeNodes.size()) 1274 CondCodeNodes.resize(Cond+1); 1275 1276 if (CondCodeNodes[Cond] == 0) { 1277 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1278 CondCodeNodes[Cond] = N; 1279 AllNodes.push_back(N); 1280 } 1281 1282 return SDValue(CondCodeNodes[Cond], 0); 1283} 1284 1285// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1286// the shuffle mask M that point at N1 to point at N2, and indices that point 1287// N2 to point at N1. 1288static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1289 std::swap(N1, N2); 1290 int NElts = M.size(); 1291 for (int i = 0; i != NElts; ++i) { 1292 if (M[i] >= NElts) 1293 M[i] -= NElts; 1294 else if (M[i] >= 0) 1295 M[i] += NElts; 1296 } 1297} 1298 1299SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, 1300 SDValue N2, const int *Mask) { 1301 assert(VT == N1.getValueType() && VT == N2.getValueType() && 1302 "Invalid VECTOR_SHUFFLE"); 1303 1304 // Canonicalize shuffle undef, undef -> undef 1305 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1306 return getUNDEF(VT); 1307 1308 // Validate that all indices in Mask are within the range of the elements 1309 // input to the shuffle. 1310 unsigned NElts = VT.getVectorNumElements(); 1311 SmallVector<int, 8> MaskVec; 1312 for (unsigned i = 0; i != NElts; ++i) { 1313 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1314 MaskVec.push_back(Mask[i]); 1315 } 1316 1317 // Canonicalize shuffle v, v -> v, undef 1318 if (N1 == N2) { 1319 N2 = getUNDEF(VT); 1320 for (unsigned i = 0; i != NElts; ++i) 1321 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1322 } 1323 1324 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1325 if (N1.getOpcode() == ISD::UNDEF) 1326 commuteShuffle(N1, N2, MaskVec); 1327 1328 // Canonicalize all index into lhs, -> shuffle lhs, undef 1329 // Canonicalize all index into rhs, -> shuffle rhs, undef 1330 bool AllLHS = true, AllRHS = true; 1331 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1332 for (unsigned i = 0; i != NElts; ++i) { 1333 if (MaskVec[i] >= (int)NElts) { 1334 if (N2Undef) 1335 MaskVec[i] = -1; 1336 else 1337 AllLHS = false; 1338 } else if (MaskVec[i] >= 0) { 1339 AllRHS = false; 1340 } 1341 } 1342 if (AllLHS && AllRHS) 1343 return getUNDEF(VT); 1344 if (AllLHS && !N2Undef) 1345 N2 = getUNDEF(VT); 1346 if (AllRHS) { 1347 N1 = getUNDEF(VT); 1348 commuteShuffle(N1, N2, MaskVec); 1349 } 1350 1351 // If Identity shuffle return that node. 1352 bool Identity = true; 1353 for (unsigned i = 0; i != NElts; ++i) { 1354 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1355 } 1356 if (Identity && NElts) 1357 return N1; 1358 1359 FoldingSetNodeID ID; 1360 SDValue Ops[2] = { N1, N2 }; 1361 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1362 for (unsigned i = 0; i != NElts; ++i) 1363 ID.AddInteger(MaskVec[i]); 1364 1365 void* IP = 0; 1366 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1367 return SDValue(E, 0); 1368 1369 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1370 // SDNode doesn't have access to it. This memory will be "leaked" when 1371 // the node is deallocated, but recovered when the NodeAllocator is released. 1372 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1373 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1374 1375 ShuffleVectorSDNode *N = 1376 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(), 1377 dl.getDebugLoc(), N1, N2, 1378 MaskAlloc); 1379 CSEMap.InsertNode(N, IP); 1380 AllNodes.push_back(N); 1381 return SDValue(N, 0); 1382} 1383 1384SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl, 1385 SDValue Val, SDValue DTy, 1386 SDValue STy, SDValue Rnd, SDValue Sat, 1387 ISD::CvtCode Code) { 1388 // If the src and dest types are the same and the conversion is between 1389 // integer types of the same sign or two floats, no conversion is necessary. 1390 if (DTy == STy && 1391 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1392 return Val; 1393 1394 FoldingSetNodeID ID; 1395 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1396 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1397 void* IP = 0; 1398 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1399 return SDValue(E, 0); 1400 1401 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(), 1402 dl.getDebugLoc(), 1403 Ops, 5, Code); 1404 CSEMap.InsertNode(N, IP); 1405 AllNodes.push_back(N); 1406 return SDValue(N, 0); 1407} 1408 1409SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1410 FoldingSetNodeID ID; 1411 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1412 ID.AddInteger(RegNo); 1413 void *IP = 0; 1414 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1415 return SDValue(E, 0); 1416 1417 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1418 CSEMap.InsertNode(N, IP); 1419 AllNodes.push_back(N); 1420 return SDValue(N, 0); 1421} 1422 1423SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1424 FoldingSetNodeID ID; 1425 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1426 ID.AddPointer(RegMask); 1427 void *IP = 0; 1428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1429 return SDValue(E, 0); 1430 1431 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1432 CSEMap.InsertNode(N, IP); 1433 AllNodes.push_back(N); 1434 return SDValue(N, 0); 1435} 1436 1437SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) { 1438 FoldingSetNodeID ID; 1439 SDValue Ops[] = { Root }; 1440 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1441 ID.AddPointer(Label); 1442 void *IP = 0; 1443 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1444 return SDValue(E, 0); 1445 1446 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(), 1447 dl.getDebugLoc(), Root, Label); 1448 CSEMap.InsertNode(N, IP); 1449 AllNodes.push_back(N); 1450 return SDValue(N, 0); 1451} 1452 1453 1454SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1455 int64_t Offset, 1456 bool isTarget, 1457 unsigned char TargetFlags) { 1458 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1459 1460 FoldingSetNodeID ID; 1461 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1462 ID.AddPointer(BA); 1463 ID.AddInteger(Offset); 1464 ID.AddInteger(TargetFlags); 1465 void *IP = 0; 1466 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1467 return SDValue(E, 0); 1468 1469 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset, 1470 TargetFlags); 1471 CSEMap.InsertNode(N, IP); 1472 AllNodes.push_back(N); 1473 return SDValue(N, 0); 1474} 1475 1476SDValue SelectionDAG::getSrcValue(const Value *V) { 1477 assert((!V || V->getType()->isPointerTy()) && 1478 "SrcValue is not a pointer?"); 1479 1480 FoldingSetNodeID ID; 1481 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1482 ID.AddPointer(V); 1483 1484 void *IP = 0; 1485 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1486 return SDValue(E, 0); 1487 1488 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1489 CSEMap.InsertNode(N, IP); 1490 AllNodes.push_back(N); 1491 return SDValue(N, 0); 1492} 1493 1494/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1495SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1496 FoldingSetNodeID ID; 1497 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1498 ID.AddPointer(MD); 1499 1500 void *IP = 0; 1501 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1502 return SDValue(E, 0); 1503 1504 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1505 CSEMap.InsertNode(N, IP); 1506 AllNodes.push_back(N); 1507 return SDValue(N, 0); 1508} 1509 1510 1511/// getShiftAmountOperand - Return the specified value casted to 1512/// the target's desired shift amount type. 1513SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1514 EVT OpTy = Op.getValueType(); 1515 EVT ShTy = TM.getTargetLowering()->getShiftAmountTy(LHSTy); 1516 if (OpTy == ShTy || OpTy.isVector()) return Op; 1517 1518 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1519 return getNode(Opcode, SDLoc(Op), ShTy, Op); 1520} 1521 1522/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1523/// specified value type. 1524SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1525 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1526 unsigned ByteSize = VT.getStoreSize(); 1527 Type *Ty = VT.getTypeForEVT(*getContext()); 1528 const TargetLowering *TLI = TM.getTargetLowering(); 1529 unsigned StackAlign = 1530 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign); 1531 1532 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1533 return getFrameIndex(FrameIdx, TLI->getPointerTy()); 1534} 1535 1536/// CreateStackTemporary - Create a stack temporary suitable for holding 1537/// either of the specified value types. 1538SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1539 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1540 VT2.getStoreSizeInBits())/8; 1541 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1542 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1543 const TargetLowering *TLI = TM.getTargetLowering(); 1544 const DataLayout *TD = TLI->getDataLayout(); 1545 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1546 TD->getPrefTypeAlignment(Ty2)); 1547 1548 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1549 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1550 return getFrameIndex(FrameIdx, TLI->getPointerTy()); 1551} 1552 1553SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1554 SDValue N2, ISD::CondCode Cond, SDLoc dl) { 1555 // These setcc operations always fold. 1556 switch (Cond) { 1557 default: break; 1558 case ISD::SETFALSE: 1559 case ISD::SETFALSE2: return getConstant(0, VT); 1560 case ISD::SETTRUE: 1561 case ISD::SETTRUE2: { 1562 const TargetLowering *TLI = TM.getTargetLowering(); 1563 TargetLowering::BooleanContent Cnt = TLI->getBooleanContents(VT.isVector()); 1564 return getConstant( 1565 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT); 1566 } 1567 1568 case ISD::SETOEQ: 1569 case ISD::SETOGT: 1570 case ISD::SETOGE: 1571 case ISD::SETOLT: 1572 case ISD::SETOLE: 1573 case ISD::SETONE: 1574 case ISD::SETO: 1575 case ISD::SETUO: 1576 case ISD::SETUEQ: 1577 case ISD::SETUNE: 1578 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1579 break; 1580 } 1581 1582 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1583 const APInt &C2 = N2C->getAPIntValue(); 1584 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1585 const APInt &C1 = N1C->getAPIntValue(); 1586 1587 switch (Cond) { 1588 default: llvm_unreachable("Unknown integer setcc!"); 1589 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1590 case ISD::SETNE: return getConstant(C1 != C2, VT); 1591 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1592 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1593 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1594 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1595 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1596 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1597 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1598 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1599 } 1600 } 1601 } 1602 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1603 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1604 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1605 switch (Cond) { 1606 default: break; 1607 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1608 return getUNDEF(VT); 1609 // fall through 1610 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1611 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1612 return getUNDEF(VT); 1613 // fall through 1614 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1615 R==APFloat::cmpLessThan, VT); 1616 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1617 return getUNDEF(VT); 1618 // fall through 1619 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1620 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1621 return getUNDEF(VT); 1622 // fall through 1623 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1624 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1625 return getUNDEF(VT); 1626 // fall through 1627 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1628 R==APFloat::cmpEqual, VT); 1629 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1630 return getUNDEF(VT); 1631 // fall through 1632 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1633 R==APFloat::cmpEqual, VT); 1634 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1635 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1636 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1637 R==APFloat::cmpEqual, VT); 1638 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1639 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1640 R==APFloat::cmpLessThan, VT); 1641 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1642 R==APFloat::cmpUnordered, VT); 1643 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1644 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1645 } 1646 } else { 1647 // Ensure that the constant occurs on the RHS. 1648 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond); 1649 MVT CompVT = N1.getValueType().getSimpleVT(); 1650 if (!TM.getTargetLowering()->isCondCodeLegal(SwappedCond, CompVT)) 1651 return SDValue(); 1652 1653 return getSetCC(dl, VT, N2, N1, SwappedCond); 1654 } 1655 } 1656 1657 // Could not fold it. 1658 return SDValue(); 1659} 1660 1661/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1662/// use this predicate to simplify operations downstream. 1663bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1664 // This predicate is not safe for vector operations. 1665 if (Op.getValueType().isVector()) 1666 return false; 1667 1668 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1669 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1670} 1671 1672/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1673/// this predicate to simplify operations downstream. Mask is known to be zero 1674/// for bits that V cannot have. 1675bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1676 unsigned Depth) const { 1677 APInt KnownZero, KnownOne; 1678 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1679 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1680 return (KnownZero & Mask) == Mask; 1681} 1682 1683/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1684/// known to be either zero or one and return them in the KnownZero/KnownOne 1685/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1686/// processing. 1687void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero, 1688 APInt &KnownOne, unsigned Depth) const { 1689 const TargetLowering *TLI = TM.getTargetLowering(); 1690 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1691 1692 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1693 if (Depth == 6) 1694 return; // Limit search depth. 1695 1696 APInt KnownZero2, KnownOne2; 1697 1698 switch (Op.getOpcode()) { 1699 case ISD::Constant: 1700 // We know all of the bits for a constant! 1701 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1702 KnownZero = ~KnownOne; 1703 return; 1704 case ISD::AND: 1705 // If either the LHS or the RHS are Zero, the result is zero. 1706 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1707 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1708 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1709 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1710 1711 // Output known-1 bits are only known if set in both the LHS & RHS. 1712 KnownOne &= KnownOne2; 1713 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1714 KnownZero |= KnownZero2; 1715 return; 1716 case ISD::OR: 1717 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1718 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1719 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1720 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1721 1722 // Output known-0 bits are only known if clear in both the LHS & RHS. 1723 KnownZero &= KnownZero2; 1724 // Output known-1 are known to be set if set in either the LHS | RHS. 1725 KnownOne |= KnownOne2; 1726 return; 1727 case ISD::XOR: { 1728 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1729 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1730 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1731 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1732 1733 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1734 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1735 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1736 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1737 KnownZero = KnownZeroOut; 1738 return; 1739 } 1740 case ISD::MUL: { 1741 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1742 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1743 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1744 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1745 1746 // If low bits are zero in either operand, output low known-0 bits. 1747 // Also compute a conserative estimate for high known-0 bits. 1748 // More trickiness is possible, but this is sufficient for the 1749 // interesting case of alignment computation. 1750 KnownOne.clearAllBits(); 1751 unsigned TrailZ = KnownZero.countTrailingOnes() + 1752 KnownZero2.countTrailingOnes(); 1753 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1754 KnownZero2.countLeadingOnes(), 1755 BitWidth) - BitWidth; 1756 1757 TrailZ = std::min(TrailZ, BitWidth); 1758 LeadZ = std::min(LeadZ, BitWidth); 1759 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1760 APInt::getHighBitsSet(BitWidth, LeadZ); 1761 return; 1762 } 1763 case ISD::UDIV: { 1764 // For the purposes of computing leading zeros we can conservatively 1765 // treat a udiv as a logical right shift by the power of 2 known to 1766 // be less than the denominator. 1767 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 1768 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1769 1770 KnownOne2.clearAllBits(); 1771 KnownZero2.clearAllBits(); 1772 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1773 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1774 if (RHSUnknownLeadingOnes != BitWidth) 1775 LeadZ = std::min(BitWidth, 1776 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1777 1778 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ); 1779 return; 1780 } 1781 case ISD::SELECT: 1782 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1); 1783 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 1784 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1785 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1786 1787 // Only known if known in both the LHS and RHS. 1788 KnownOne &= KnownOne2; 1789 KnownZero &= KnownZero2; 1790 return; 1791 case ISD::SELECT_CC: 1792 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1); 1793 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1); 1794 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1795 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1796 1797 // Only known if known in both the LHS and RHS. 1798 KnownOne &= KnownOne2; 1799 KnownZero &= KnownZero2; 1800 return; 1801 case ISD::SADDO: 1802 case ISD::UADDO: 1803 case ISD::SSUBO: 1804 case ISD::USUBO: 1805 case ISD::SMULO: 1806 case ISD::UMULO: 1807 if (Op.getResNo() != 1) 1808 return; 1809 // The boolean result conforms to getBooleanContents. Fall through. 1810 case ISD::SETCC: 1811 // If we know the result of a setcc has the top bits zero, use this info. 1812 if (TLI->getBooleanContents(Op.getValueType().isVector()) == 1813 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1814 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1815 return; 1816 case ISD::SHL: 1817 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1818 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1819 unsigned ShAmt = SA->getZExtValue(); 1820 1821 // If the shift count is an invalid immediate, don't do anything. 1822 if (ShAmt >= BitWidth) 1823 return; 1824 1825 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1826 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1827 KnownZero <<= ShAmt; 1828 KnownOne <<= ShAmt; 1829 // low bits known zero. 1830 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1831 } 1832 return; 1833 case ISD::SRL: 1834 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1835 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1836 unsigned ShAmt = SA->getZExtValue(); 1837 1838 // If the shift count is an invalid immediate, don't do anything. 1839 if (ShAmt >= BitWidth) 1840 return; 1841 1842 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1843 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1844 KnownZero = KnownZero.lshr(ShAmt); 1845 KnownOne = KnownOne.lshr(ShAmt); 1846 1847 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1848 KnownZero |= HighBits; // High bits known zero. 1849 } 1850 return; 1851 case ISD::SRA: 1852 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1853 unsigned ShAmt = SA->getZExtValue(); 1854 1855 // If the shift count is an invalid immediate, don't do anything. 1856 if (ShAmt >= BitWidth) 1857 return; 1858 1859 // If any of the demanded bits are produced by the sign extension, we also 1860 // demand the input sign bit. 1861 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 1862 1863 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1864 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1865 KnownZero = KnownZero.lshr(ShAmt); 1866 KnownOne = KnownOne.lshr(ShAmt); 1867 1868 // Handle the sign bits. 1869 APInt SignBit = APInt::getSignBit(BitWidth); 1870 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1871 1872 if (KnownZero.intersects(SignBit)) { 1873 KnownZero |= HighBits; // New bits are known zero. 1874 } else if (KnownOne.intersects(SignBit)) { 1875 KnownOne |= HighBits; // New bits are known one. 1876 } 1877 } 1878 return; 1879 case ISD::SIGN_EXTEND_INREG: { 1880 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1881 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1882 1883 // Sign extension. Compute the demanded bits in the result that are not 1884 // present in the input. 1885 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits); 1886 1887 APInt InSignBit = APInt::getSignBit(EBits); 1888 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits); 1889 1890 // If the sign extended bits are demanded, we know that the sign 1891 // bit is demanded. 1892 InSignBit = InSignBit.zext(BitWidth); 1893 if (NewBits.getBoolValue()) 1894 InputDemandedBits |= InSignBit; 1895 1896 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1897 KnownOne &= InputDemandedBits; 1898 KnownZero &= InputDemandedBits; 1899 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1900 1901 // If the sign bit of the input is known set or clear, then we know the 1902 // top bits of the result. 1903 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1904 KnownZero |= NewBits; 1905 KnownOne &= ~NewBits; 1906 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1907 KnownOne |= NewBits; 1908 KnownZero &= ~NewBits; 1909 } else { // Input sign bit unknown 1910 KnownZero &= ~NewBits; 1911 KnownOne &= ~NewBits; 1912 } 1913 return; 1914 } 1915 case ISD::CTTZ: 1916 case ISD::CTTZ_ZERO_UNDEF: 1917 case ISD::CTLZ: 1918 case ISD::CTLZ_ZERO_UNDEF: 1919 case ISD::CTPOP: { 1920 unsigned LowBits = Log2_32(BitWidth)+1; 1921 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1922 KnownOne.clearAllBits(); 1923 return; 1924 } 1925 case ISD::LOAD: { 1926 LoadSDNode *LD = cast<LoadSDNode>(Op); 1927 // If this is a ZEXTLoad and we are looking at the loaded value. 1928 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) { 1929 EVT VT = LD->getMemoryVT(); 1930 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1931 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 1932 } else if (const MDNode *Ranges = LD->getRanges()) { 1933 computeMaskedBitsLoad(*Ranges, KnownZero); 1934 } 1935 return; 1936 } 1937 case ISD::ZERO_EXTEND: { 1938 EVT InVT = Op.getOperand(0).getValueType(); 1939 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1940 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1941 KnownZero = KnownZero.trunc(InBits); 1942 KnownOne = KnownOne.trunc(InBits); 1943 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1944 KnownZero = KnownZero.zext(BitWidth); 1945 KnownOne = KnownOne.zext(BitWidth); 1946 KnownZero |= NewBits; 1947 return; 1948 } 1949 case ISD::SIGN_EXTEND: { 1950 EVT InVT = Op.getOperand(0).getValueType(); 1951 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1952 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits); 1953 1954 KnownZero = KnownZero.trunc(InBits); 1955 KnownOne = KnownOne.trunc(InBits); 1956 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1957 1958 // Note if the sign bit is known to be zero or one. 1959 bool SignBitKnownZero = KnownZero.isNegative(); 1960 bool SignBitKnownOne = KnownOne.isNegative(); 1961 assert(!(SignBitKnownZero && SignBitKnownOne) && 1962 "Sign bit can't be known to be both zero and one!"); 1963 1964 KnownZero = KnownZero.zext(BitWidth); 1965 KnownOne = KnownOne.zext(BitWidth); 1966 1967 // If the sign bit is known zero or one, the top bits match. 1968 if (SignBitKnownZero) 1969 KnownZero |= NewBits; 1970 else if (SignBitKnownOne) 1971 KnownOne |= NewBits; 1972 return; 1973 } 1974 case ISD::ANY_EXTEND: { 1975 EVT InVT = Op.getOperand(0).getValueType(); 1976 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1977 KnownZero = KnownZero.trunc(InBits); 1978 KnownOne = KnownOne.trunc(InBits); 1979 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1980 KnownZero = KnownZero.zext(BitWidth); 1981 KnownOne = KnownOne.zext(BitWidth); 1982 return; 1983 } 1984 case ISD::TRUNCATE: { 1985 EVT InVT = Op.getOperand(0).getValueType(); 1986 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1987 KnownZero = KnownZero.zext(InBits); 1988 KnownOne = KnownOne.zext(InBits); 1989 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1990 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1991 KnownZero = KnownZero.trunc(BitWidth); 1992 KnownOne = KnownOne.trunc(BitWidth); 1993 break; 1994 } 1995 case ISD::AssertZext: { 1996 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1997 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1998 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 1999 KnownZero |= (~InMask); 2000 KnownOne &= (~KnownZero); 2001 return; 2002 } 2003 case ISD::FGETSIGN: 2004 // All bits are zero except the low bit. 2005 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 2006 return; 2007 2008 case ISD::SUB: { 2009 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 2010 // We know that the top bits of C-X are clear if X contains less bits 2011 // than C (i.e. no wrap-around can happen). For example, 20-X is 2012 // positive if we can prove that X is >= 0 and < 16. 2013 if (CLHS->getAPIntValue().isNonNegative()) { 2014 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 2015 // NLZ can't be BitWidth with no sign bit 2016 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 2017 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2018 2019 // If all of the MaskV bits are known to be zero, then we know the 2020 // output top bits are zero, because we now know that the output is 2021 // from [0-C]. 2022 if ((KnownZero2 & MaskV) == MaskV) { 2023 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 2024 // Top bits known zero. 2025 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2); 2026 } 2027 } 2028 } 2029 } 2030 // fall through 2031 case ISD::ADD: 2032 case ISD::ADDE: { 2033 // Output known-0 bits are known if clear or set in both the low clear bits 2034 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2035 // low 3 bits clear. 2036 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1); 2037 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2038 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2039 2040 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2041 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2042 KnownZeroOut = std::min(KnownZeroOut, 2043 KnownZero2.countTrailingOnes()); 2044 2045 if (Op.getOpcode() == ISD::ADD) { 2046 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2047 return; 2048 } 2049 2050 // With ADDE, a carry bit may be added in, so we can only use this 2051 // information if we know (at least) that the low two bits are clear. We 2052 // then return to the caller that the low bit is unknown but that other bits 2053 // are known zero. 2054 if (KnownZeroOut >= 2) // ADDE 2055 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2056 return; 2057 } 2058 case ISD::SREM: 2059 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2060 const APInt &RA = Rem->getAPIntValue().abs(); 2061 if (RA.isPowerOf2()) { 2062 APInt LowBits = RA - 1; 2063 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1); 2064 2065 // The low bits of the first operand are unchanged by the srem. 2066 KnownZero = KnownZero2 & LowBits; 2067 KnownOne = KnownOne2 & LowBits; 2068 2069 // If the first operand is non-negative or has all low bits zero, then 2070 // the upper bits are all zero. 2071 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2072 KnownZero |= ~LowBits; 2073 2074 // If the first operand is negative and not all low bits are zero, then 2075 // the upper bits are all one. 2076 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2077 KnownOne |= ~LowBits; 2078 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2079 } 2080 } 2081 return; 2082 case ISD::UREM: { 2083 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2084 const APInt &RA = Rem->getAPIntValue(); 2085 if (RA.isPowerOf2()) { 2086 APInt LowBits = (RA - 1); 2087 KnownZero |= ~LowBits; 2088 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1); 2089 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2090 break; 2091 } 2092 } 2093 2094 // Since the result is less than or equal to either operand, any leading 2095 // zero bits in either operand must also exist in the result. 2096 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2097 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1); 2098 2099 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2100 KnownZero2.countLeadingOnes()); 2101 KnownOne.clearAllBits(); 2102 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders); 2103 return; 2104 } 2105 case ISD::FrameIndex: 2106 case ISD::TargetFrameIndex: 2107 if (unsigned Align = InferPtrAlignment(Op)) { 2108 // The low bits are known zero if the pointer is aligned. 2109 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2110 return; 2111 } 2112 break; 2113 2114 default: 2115 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2116 break; 2117 // Fallthrough 2118 case ISD::INTRINSIC_WO_CHAIN: 2119 case ISD::INTRINSIC_W_CHAIN: 2120 case ISD::INTRINSIC_VOID: 2121 // Allow the target to implement this method for its nodes. 2122 TLI->computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth); 2123 return; 2124 } 2125} 2126 2127/// ComputeNumSignBits - Return the number of times the sign bit of the 2128/// register is replicated into the other bits. We know that at least 1 bit 2129/// is always equal to the sign bit (itself), but other cases can give us 2130/// information. For example, immediately after an "SRA X, 2", we know that 2131/// the top 3 bits are all equal to each other, so we return 3. 2132unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2133 const TargetLowering *TLI = TM.getTargetLowering(); 2134 EVT VT = Op.getValueType(); 2135 assert(VT.isInteger() && "Invalid VT!"); 2136 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2137 unsigned Tmp, Tmp2; 2138 unsigned FirstAnswer = 1; 2139 2140 if (Depth == 6) 2141 return 1; // Limit search depth. 2142 2143 switch (Op.getOpcode()) { 2144 default: break; 2145 case ISD::AssertSext: 2146 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2147 return VTBits-Tmp+1; 2148 case ISD::AssertZext: 2149 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2150 return VTBits-Tmp; 2151 2152 case ISD::Constant: { 2153 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2154 return Val.getNumSignBits(); 2155 } 2156 2157 case ISD::SIGN_EXTEND: 2158 Tmp = 2159 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2160 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2161 2162 case ISD::SIGN_EXTEND_INREG: 2163 // Max of the input and what this extends. 2164 Tmp = 2165 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2166 Tmp = VTBits-Tmp+1; 2167 2168 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2169 return std::max(Tmp, Tmp2); 2170 2171 case ISD::SRA: 2172 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2173 // SRA X, C -> adds C sign bits. 2174 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2175 Tmp += C->getZExtValue(); 2176 if (Tmp > VTBits) Tmp = VTBits; 2177 } 2178 return Tmp; 2179 case ISD::SHL: 2180 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2181 // shl destroys sign bits. 2182 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2183 if (C->getZExtValue() >= VTBits || // Bad shift. 2184 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2185 return Tmp - C->getZExtValue(); 2186 } 2187 break; 2188 case ISD::AND: 2189 case ISD::OR: 2190 case ISD::XOR: // NOT is handled here. 2191 // Logical binary ops preserve the number of sign bits at the worst. 2192 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2193 if (Tmp != 1) { 2194 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2195 FirstAnswer = std::min(Tmp, Tmp2); 2196 // We computed what we know about the sign bits as our first 2197 // answer. Now proceed to the generic code that uses 2198 // ComputeMaskedBits, and pick whichever answer is better. 2199 } 2200 break; 2201 2202 case ISD::SELECT: 2203 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2204 if (Tmp == 1) return 1; // Early out. 2205 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2206 return std::min(Tmp, Tmp2); 2207 2208 case ISD::SADDO: 2209 case ISD::UADDO: 2210 case ISD::SSUBO: 2211 case ISD::USUBO: 2212 case ISD::SMULO: 2213 case ISD::UMULO: 2214 if (Op.getResNo() != 1) 2215 break; 2216 // The boolean result conforms to getBooleanContents. Fall through. 2217 case ISD::SETCC: 2218 // If setcc returns 0/-1, all bits are sign bits. 2219 if (TLI->getBooleanContents(Op.getValueType().isVector()) == 2220 TargetLowering::ZeroOrNegativeOneBooleanContent) 2221 return VTBits; 2222 break; 2223 case ISD::ROTL: 2224 case ISD::ROTR: 2225 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2226 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2227 2228 // Handle rotate right by N like a rotate left by 32-N. 2229 if (Op.getOpcode() == ISD::ROTR) 2230 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2231 2232 // If we aren't rotating out all of the known-in sign bits, return the 2233 // number that are left. This handles rotl(sext(x), 1) for example. 2234 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2235 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2236 } 2237 break; 2238 case ISD::ADD: 2239 // Add can have at most one carry bit. Thus we know that the output 2240 // is, at worst, one more bit than the inputs. 2241 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2242 if (Tmp == 1) return 1; // Early out. 2243 2244 // Special case decrementing a value (ADD X, -1): 2245 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2246 if (CRHS->isAllOnesValue()) { 2247 APInt KnownZero, KnownOne; 2248 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 2249 2250 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2251 // sign bits set. 2252 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2253 return VTBits; 2254 2255 // If we are subtracting one from a positive number, there is no carry 2256 // out of the result. 2257 if (KnownZero.isNegative()) 2258 return Tmp; 2259 } 2260 2261 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2262 if (Tmp2 == 1) return 1; 2263 return std::min(Tmp, Tmp2)-1; 2264 2265 case ISD::SUB: 2266 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2267 if (Tmp2 == 1) return 1; 2268 2269 // Handle NEG. 2270 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2271 if (CLHS->isNullValue()) { 2272 APInt KnownZero, KnownOne; 2273 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 2274 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2275 // sign bits set. 2276 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue()) 2277 return VTBits; 2278 2279 // If the input is known to be positive (the sign bit is known clear), 2280 // the output of the NEG has the same number of sign bits as the input. 2281 if (KnownZero.isNegative()) 2282 return Tmp2; 2283 2284 // Otherwise, we treat this like a SUB. 2285 } 2286 2287 // Sub can have at most one carry bit. Thus we know that the output 2288 // is, at worst, one more bit than the inputs. 2289 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2290 if (Tmp == 1) return 1; // Early out. 2291 return std::min(Tmp, Tmp2)-1; 2292 case ISD::TRUNCATE: 2293 // FIXME: it's tricky to do anything useful for this, but it is an important 2294 // case for targets like X86. 2295 break; 2296 } 2297 2298 // If we are looking at the loaded value of the SDNode. 2299 if (Op.getResNo() == 0) { 2300 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2301 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) { 2302 unsigned ExtType = LD->getExtensionType(); 2303 switch (ExtType) { 2304 default: break; 2305 case ISD::SEXTLOAD: // '17' bits known 2306 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2307 return VTBits-Tmp+1; 2308 case ISD::ZEXTLOAD: // '16' bits known 2309 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2310 return VTBits-Tmp; 2311 } 2312 } 2313 } 2314 2315 // Allow the target to implement this method for its nodes. 2316 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2317 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2318 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2319 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2320 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, Depth); 2321 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2322 } 2323 2324 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2325 // use this information. 2326 APInt KnownZero, KnownOne; 2327 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 2328 2329 APInt Mask; 2330 if (KnownZero.isNegative()) { // sign bit is 0 2331 Mask = KnownZero; 2332 } else if (KnownOne.isNegative()) { // sign bit is 1; 2333 Mask = KnownOne; 2334 } else { 2335 // Nothing known. 2336 return FirstAnswer; 2337 } 2338 2339 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2340 // the number of identical bits in the top of the input value. 2341 Mask = ~Mask; 2342 Mask <<= Mask.getBitWidth()-VTBits; 2343 // Return # leading zeros. We use 'min' here in case Val was zero before 2344 // shifting. We don't want to return '64' as for an i32 "0". 2345 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2346} 2347 2348/// isBaseWithConstantOffset - Return true if the specified operand is an 2349/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2350/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2351/// semantics as an ADD. This handles the equivalence: 2352/// X|Cst == X+Cst iff X&Cst = 0. 2353bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2354 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2355 !isa<ConstantSDNode>(Op.getOperand(1))) 2356 return false; 2357 2358 if (Op.getOpcode() == ISD::OR && 2359 !MaskedValueIsZero(Op.getOperand(0), 2360 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2361 return false; 2362 2363 return true; 2364} 2365 2366 2367bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2368 // If we're told that NaNs won't happen, assume they won't. 2369 if (getTarget().Options.NoNaNsFPMath) 2370 return true; 2371 2372 // If the value is a constant, we can obviously see if it is a NaN or not. 2373 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2374 return !C->getValueAPF().isNaN(); 2375 2376 // TODO: Recognize more cases here. 2377 2378 return false; 2379} 2380 2381bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2382 // If the value is a constant, we can obviously see if it is a zero or not. 2383 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2384 return !C->isZero(); 2385 2386 // TODO: Recognize more cases here. 2387 switch (Op.getOpcode()) { 2388 default: break; 2389 case ISD::OR: 2390 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2391 return !C->isNullValue(); 2392 break; 2393 } 2394 2395 return false; 2396} 2397 2398bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2399 // Check the obvious case. 2400 if (A == B) return true; 2401 2402 // For for negative and positive zero. 2403 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2404 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2405 if (CA->isZero() && CB->isZero()) return true; 2406 2407 // Otherwise they may not be equal. 2408 return false; 2409} 2410 2411/// getNode - Gets or creates the specified node. 2412/// 2413SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) { 2414 FoldingSetNodeID ID; 2415 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2416 void *IP = 0; 2417 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2418 return SDValue(E, 0); 2419 2420 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), 2421 DL.getDebugLoc(), getVTList(VT)); 2422 CSEMap.InsertNode(N, IP); 2423 2424 AllNodes.push_back(N); 2425#ifndef NDEBUG 2426 VerifySDNode(N); 2427#endif 2428 return SDValue(N, 0); 2429} 2430 2431SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 2432 EVT VT, SDValue Operand) { 2433 // Constant fold unary operations with an integer constant operand. 2434 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2435 const APInt &Val = C->getAPIntValue(); 2436 switch (Opcode) { 2437 default: break; 2438 case ISD::SIGN_EXTEND: 2439 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2440 case ISD::ANY_EXTEND: 2441 case ISD::ZERO_EXTEND: 2442 case ISD::TRUNCATE: 2443 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2444 case ISD::UINT_TO_FP: 2445 case ISD::SINT_TO_FP: { 2446 APFloat apf(EVTToAPFloatSemantics(VT), 2447 APInt::getNullValue(VT.getSizeInBits())); 2448 (void)apf.convertFromAPInt(Val, 2449 Opcode==ISD::SINT_TO_FP, 2450 APFloat::rmNearestTiesToEven); 2451 return getConstantFP(apf, VT); 2452 } 2453 case ISD::BITCAST: 2454 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2455 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT); 2456 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2457 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT); 2458 break; 2459 case ISD::BSWAP: 2460 return getConstant(Val.byteSwap(), VT); 2461 case ISD::CTPOP: 2462 return getConstant(Val.countPopulation(), VT); 2463 case ISD::CTLZ: 2464 case ISD::CTLZ_ZERO_UNDEF: 2465 return getConstant(Val.countLeadingZeros(), VT); 2466 case ISD::CTTZ: 2467 case ISD::CTTZ_ZERO_UNDEF: 2468 return getConstant(Val.countTrailingZeros(), VT); 2469 } 2470 } 2471 2472 // Constant fold unary operations with a floating point constant operand. 2473 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2474 APFloat V = C->getValueAPF(); // make copy 2475 switch (Opcode) { 2476 case ISD::FNEG: 2477 V.changeSign(); 2478 return getConstantFP(V, VT); 2479 case ISD::FABS: 2480 V.clearSign(); 2481 return getConstantFP(V, VT); 2482 case ISD::FCEIL: { 2483 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive); 2484 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2485 return getConstantFP(V, VT); 2486 break; 2487 } 2488 case ISD::FTRUNC: { 2489 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero); 2490 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2491 return getConstantFP(V, VT); 2492 break; 2493 } 2494 case ISD::FFLOOR: { 2495 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative); 2496 if (fs == APFloat::opOK || fs == APFloat::opInexact) 2497 return getConstantFP(V, VT); 2498 break; 2499 } 2500 case ISD::FP_EXTEND: { 2501 bool ignored; 2502 // This can return overflow, underflow, or inexact; we don't care. 2503 // FIXME need to be more flexible about rounding mode. 2504 (void)V.convert(EVTToAPFloatSemantics(VT), 2505 APFloat::rmNearestTiesToEven, &ignored); 2506 return getConstantFP(V, VT); 2507 } 2508 case ISD::FP_TO_SINT: 2509 case ISD::FP_TO_UINT: { 2510 integerPart x[2]; 2511 bool ignored; 2512 assert(integerPartWidth >= 64); 2513 // FIXME need to be more flexible about rounding mode. 2514 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2515 Opcode==ISD::FP_TO_SINT, 2516 APFloat::rmTowardZero, &ignored); 2517 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2518 break; 2519 APInt api(VT.getSizeInBits(), x); 2520 return getConstant(api, VT); 2521 } 2522 case ISD::BITCAST: 2523 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2524 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2525 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2526 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2527 break; 2528 } 2529 } 2530 2531 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2532 switch (Opcode) { 2533 case ISD::TokenFactor: 2534 case ISD::MERGE_VALUES: 2535 case ISD::CONCAT_VECTORS: 2536 return Operand; // Factor, merge or concat of one node? No need. 2537 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2538 case ISD::FP_EXTEND: 2539 assert(VT.isFloatingPoint() && 2540 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2541 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2542 assert((!VT.isVector() || 2543 VT.getVectorNumElements() == 2544 Operand.getValueType().getVectorNumElements()) && 2545 "Vector element count mismatch!"); 2546 if (Operand.getOpcode() == ISD::UNDEF) 2547 return getUNDEF(VT); 2548 break; 2549 case ISD::SIGN_EXTEND: 2550 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2551 "Invalid SIGN_EXTEND!"); 2552 if (Operand.getValueType() == VT) return Operand; // noop extension 2553 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2554 "Invalid sext node, dst < src!"); 2555 assert((!VT.isVector() || 2556 VT.getVectorNumElements() == 2557 Operand.getValueType().getVectorNumElements()) && 2558 "Vector element count mismatch!"); 2559 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2560 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2561 else if (OpOpcode == ISD::UNDEF) 2562 // sext(undef) = 0, because the top bits will all be the same. 2563 return getConstant(0, VT); 2564 break; 2565 case ISD::ZERO_EXTEND: 2566 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2567 "Invalid ZERO_EXTEND!"); 2568 if (Operand.getValueType() == VT) return Operand; // noop extension 2569 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2570 "Invalid zext node, dst < src!"); 2571 assert((!VT.isVector() || 2572 VT.getVectorNumElements() == 2573 Operand.getValueType().getVectorNumElements()) && 2574 "Vector element count mismatch!"); 2575 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2576 return getNode(ISD::ZERO_EXTEND, DL, VT, 2577 Operand.getNode()->getOperand(0)); 2578 else if (OpOpcode == ISD::UNDEF) 2579 // zext(undef) = 0, because the top bits will be zero. 2580 return getConstant(0, VT); 2581 break; 2582 case ISD::ANY_EXTEND: 2583 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2584 "Invalid ANY_EXTEND!"); 2585 if (Operand.getValueType() == VT) return Operand; // noop extension 2586 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2587 "Invalid anyext node, dst < src!"); 2588 assert((!VT.isVector() || 2589 VT.getVectorNumElements() == 2590 Operand.getValueType().getVectorNumElements()) && 2591 "Vector element count mismatch!"); 2592 2593 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2594 OpOpcode == ISD::ANY_EXTEND) 2595 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2596 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2597 else if (OpOpcode == ISD::UNDEF) 2598 return getUNDEF(VT); 2599 2600 // (ext (trunx x)) -> x 2601 if (OpOpcode == ISD::TRUNCATE) { 2602 SDValue OpOp = Operand.getNode()->getOperand(0); 2603 if (OpOp.getValueType() == VT) 2604 return OpOp; 2605 } 2606 break; 2607 case ISD::TRUNCATE: 2608 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2609 "Invalid TRUNCATE!"); 2610 if (Operand.getValueType() == VT) return Operand; // noop truncate 2611 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2612 "Invalid truncate node, src < dst!"); 2613 assert((!VT.isVector() || 2614 VT.getVectorNumElements() == 2615 Operand.getValueType().getVectorNumElements()) && 2616 "Vector element count mismatch!"); 2617 if (OpOpcode == ISD::TRUNCATE) 2618 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2619 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2620 OpOpcode == ISD::ANY_EXTEND) { 2621 // If the source is smaller than the dest, we still need an extend. 2622 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2623 .bitsLT(VT.getScalarType())) 2624 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2625 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2626 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2627 return Operand.getNode()->getOperand(0); 2628 } 2629 if (OpOpcode == ISD::UNDEF) 2630 return getUNDEF(VT); 2631 break; 2632 case ISD::BITCAST: 2633 // Basic sanity checking. 2634 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2635 && "Cannot BITCAST between types of different sizes!"); 2636 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2637 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2638 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2639 if (OpOpcode == ISD::UNDEF) 2640 return getUNDEF(VT); 2641 break; 2642 case ISD::SCALAR_TO_VECTOR: 2643 assert(VT.isVector() && !Operand.getValueType().isVector() && 2644 (VT.getVectorElementType() == Operand.getValueType() || 2645 (VT.getVectorElementType().isInteger() && 2646 Operand.getValueType().isInteger() && 2647 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2648 "Illegal SCALAR_TO_VECTOR node!"); 2649 if (OpOpcode == ISD::UNDEF) 2650 return getUNDEF(VT); 2651 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2652 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2653 isa<ConstantSDNode>(Operand.getOperand(1)) && 2654 Operand.getConstantOperandVal(1) == 0 && 2655 Operand.getOperand(0).getValueType() == VT) 2656 return Operand.getOperand(0); 2657 break; 2658 case ISD::FNEG: 2659 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2660 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2661 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2662 Operand.getNode()->getOperand(0)); 2663 if (OpOpcode == ISD::FNEG) // --X -> X 2664 return Operand.getNode()->getOperand(0); 2665 break; 2666 case ISD::FABS: 2667 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2668 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2669 break; 2670 } 2671 2672 SDNode *N; 2673 SDVTList VTs = getVTList(VT); 2674 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2675 FoldingSetNodeID ID; 2676 SDValue Ops[1] = { Operand }; 2677 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2678 void *IP = 0; 2679 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2680 return SDValue(E, 0); 2681 2682 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 2683 DL.getDebugLoc(), VTs, Operand); 2684 CSEMap.InsertNode(N, IP); 2685 } else { 2686 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 2687 DL.getDebugLoc(), VTs, Operand); 2688 } 2689 2690 AllNodes.push_back(N); 2691#ifndef NDEBUG 2692 VerifySDNode(N); 2693#endif 2694 return SDValue(N, 0); 2695} 2696 2697SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT, 2698 SDNode *Cst1, SDNode *Cst2) { 2699 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs; 2700 SmallVector<SDValue, 4> Outputs; 2701 EVT SVT = VT.getScalarType(); 2702 2703 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1); 2704 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2); 2705 if (Scalar1 && Scalar2) { 2706 // Scalar instruction. 2707 Inputs.push_back(std::make_pair(Scalar1, Scalar2)); 2708 } else { 2709 // For vectors extract each constant element into Inputs so we can constant 2710 // fold them individually. 2711 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1); 2712 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2); 2713 if (!BV1 || !BV2) 2714 return SDValue(); 2715 2716 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!"); 2717 2718 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) { 2719 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I)); 2720 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I)); 2721 if (!V1 || !V2) // Not a constant, bail. 2722 return SDValue(); 2723 2724 // Avoid BUILD_VECTOR nodes that perform implicit truncation. 2725 // FIXME: This is valid and could be handled by truncating the APInts. 2726 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT) 2727 return SDValue(); 2728 2729 Inputs.push_back(std::make_pair(V1, V2)); 2730 } 2731 } 2732 2733 // We have a number of constant values, constant fold them element by element. 2734 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) { 2735 const APInt &C1 = Inputs[I].first->getAPIntValue(); 2736 const APInt &C2 = Inputs[I].second->getAPIntValue(); 2737 2738 switch (Opcode) { 2739 case ISD::ADD: 2740 Outputs.push_back(getConstant(C1 + C2, SVT)); 2741 break; 2742 case ISD::SUB: 2743 Outputs.push_back(getConstant(C1 - C2, SVT)); 2744 break; 2745 case ISD::MUL: 2746 Outputs.push_back(getConstant(C1 * C2, SVT)); 2747 break; 2748 case ISD::UDIV: 2749 if (!C2.getBoolValue()) 2750 return SDValue(); 2751 Outputs.push_back(getConstant(C1.udiv(C2), SVT)); 2752 break; 2753 case ISD::UREM: 2754 if (!C2.getBoolValue()) 2755 return SDValue(); 2756 Outputs.push_back(getConstant(C1.urem(C2), SVT)); 2757 break; 2758 case ISD::SDIV: 2759 if (!C2.getBoolValue()) 2760 return SDValue(); 2761 Outputs.push_back(getConstant(C1.sdiv(C2), SVT)); 2762 break; 2763 case ISD::SREM: 2764 if (!C2.getBoolValue()) 2765 return SDValue(); 2766 Outputs.push_back(getConstant(C1.srem(C2), SVT)); 2767 break; 2768 case ISD::AND: 2769 Outputs.push_back(getConstant(C1 & C2, SVT)); 2770 break; 2771 case ISD::OR: 2772 Outputs.push_back(getConstant(C1 | C2, SVT)); 2773 break; 2774 case ISD::XOR: 2775 Outputs.push_back(getConstant(C1 ^ C2, SVT)); 2776 break; 2777 case ISD::SHL: 2778 Outputs.push_back(getConstant(C1 << C2, SVT)); 2779 break; 2780 case ISD::SRL: 2781 Outputs.push_back(getConstant(C1.lshr(C2), SVT)); 2782 break; 2783 case ISD::SRA: 2784 Outputs.push_back(getConstant(C1.ashr(C2), SVT)); 2785 break; 2786 case ISD::ROTL: 2787 Outputs.push_back(getConstant(C1.rotl(C2), SVT)); 2788 break; 2789 case ISD::ROTR: 2790 Outputs.push_back(getConstant(C1.rotr(C2), SVT)); 2791 break; 2792 default: 2793 return SDValue(); 2794 } 2795 } 2796 2797 // Handle the scalar case first. 2798 if (Scalar1 && Scalar2) 2799 return Outputs.back(); 2800 2801 // Otherwise build a big vector out of the scalar elements we generated. 2802 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs.data(), 2803 Outputs.size()); 2804} 2805 2806SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, 2807 SDValue N2) { 2808 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2809 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2810 switch (Opcode) { 2811 default: break; 2812 case ISD::TokenFactor: 2813 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2814 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2815 // Fold trivial token factors. 2816 if (N1.getOpcode() == ISD::EntryToken) return N2; 2817 if (N2.getOpcode() == ISD::EntryToken) return N1; 2818 if (N1 == N2) return N1; 2819 break; 2820 case ISD::CONCAT_VECTORS: 2821 // Concat of UNDEFs is UNDEF. 2822 if (N1.getOpcode() == ISD::UNDEF && 2823 N2.getOpcode() == ISD::UNDEF) 2824 return getUNDEF(VT); 2825 2826 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2827 // one big BUILD_VECTOR. 2828 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2829 N2.getOpcode() == ISD::BUILD_VECTOR) { 2830 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2831 N1.getNode()->op_end()); 2832 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2833 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2834 } 2835 break; 2836 case ISD::AND: 2837 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2838 assert(N1.getValueType() == N2.getValueType() && 2839 N1.getValueType() == VT && "Binary operator types must match!"); 2840 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2841 // worth handling here. 2842 if (N2C && N2C->isNullValue()) 2843 return N2; 2844 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2845 return N1; 2846 break; 2847 case ISD::OR: 2848 case ISD::XOR: 2849 case ISD::ADD: 2850 case ISD::SUB: 2851 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2852 assert(N1.getValueType() == N2.getValueType() && 2853 N1.getValueType() == VT && "Binary operator types must match!"); 2854 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2855 // it's worth handling here. 2856 if (N2C && N2C->isNullValue()) 2857 return N1; 2858 break; 2859 case ISD::UDIV: 2860 case ISD::UREM: 2861 case ISD::MULHU: 2862 case ISD::MULHS: 2863 case ISD::MUL: 2864 case ISD::SDIV: 2865 case ISD::SREM: 2866 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2867 assert(N1.getValueType() == N2.getValueType() && 2868 N1.getValueType() == VT && "Binary operator types must match!"); 2869 break; 2870 case ISD::FADD: 2871 case ISD::FSUB: 2872 case ISD::FMUL: 2873 case ISD::FDIV: 2874 case ISD::FREM: 2875 if (getTarget().Options.UnsafeFPMath) { 2876 if (Opcode == ISD::FADD) { 2877 // 0+x --> x 2878 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2879 if (CFP->getValueAPF().isZero()) 2880 return N2; 2881 // x+0 --> x 2882 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2883 if (CFP->getValueAPF().isZero()) 2884 return N1; 2885 } else if (Opcode == ISD::FSUB) { 2886 // x-0 --> x 2887 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2888 if (CFP->getValueAPF().isZero()) 2889 return N1; 2890 } else if (Opcode == ISD::FMUL) { 2891 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1); 2892 SDValue V = N2; 2893 2894 // If the first operand isn't the constant, try the second 2895 if (!CFP) { 2896 CFP = dyn_cast<ConstantFPSDNode>(N2); 2897 V = N1; 2898 } 2899 2900 if (CFP) { 2901 // 0*x --> 0 2902 if (CFP->isZero()) 2903 return SDValue(CFP,0); 2904 // 1*x --> x 2905 if (CFP->isExactlyValue(1.0)) 2906 return V; 2907 } 2908 } 2909 } 2910 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2911 assert(N1.getValueType() == N2.getValueType() && 2912 N1.getValueType() == VT && "Binary operator types must match!"); 2913 break; 2914 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2915 assert(N1.getValueType() == VT && 2916 N1.getValueType().isFloatingPoint() && 2917 N2.getValueType().isFloatingPoint() && 2918 "Invalid FCOPYSIGN!"); 2919 break; 2920 case ISD::SHL: 2921 case ISD::SRA: 2922 case ISD::SRL: 2923 case ISD::ROTL: 2924 case ISD::ROTR: 2925 assert(VT == N1.getValueType() && 2926 "Shift operators return type must be the same as their first arg"); 2927 assert(VT.isInteger() && N2.getValueType().isInteger() && 2928 "Shifts only work on integers"); 2929 assert((!VT.isVector() || VT == N2.getValueType()) && 2930 "Vector shift amounts must be in the same as their first arg"); 2931 // Verify that the shift amount VT is bit enough to hold valid shift 2932 // amounts. This catches things like trying to shift an i1024 value by an 2933 // i8, which is easy to fall into in generic code that uses 2934 // TLI.getShiftAmount(). 2935 assert(N2.getValueType().getSizeInBits() >= 2936 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2937 "Invalid use of small shift amount with oversized value!"); 2938 2939 // Always fold shifts of i1 values so the code generator doesn't need to 2940 // handle them. Since we know the size of the shift has to be less than the 2941 // size of the value, the shift/rotate count is guaranteed to be zero. 2942 if (VT == MVT::i1) 2943 return N1; 2944 if (N2C && N2C->isNullValue()) 2945 return N1; 2946 break; 2947 case ISD::FP_ROUND_INREG: { 2948 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2949 assert(VT == N1.getValueType() && "Not an inreg round!"); 2950 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2951 "Cannot FP_ROUND_INREG integer types"); 2952 assert(EVT.isVector() == VT.isVector() && 2953 "FP_ROUND_INREG type should be vector iff the operand " 2954 "type is vector!"); 2955 assert((!EVT.isVector() || 2956 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2957 "Vector element counts must match in FP_ROUND_INREG"); 2958 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2959 (void)EVT; 2960 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2961 break; 2962 } 2963 case ISD::FP_ROUND: 2964 assert(VT.isFloatingPoint() && 2965 N1.getValueType().isFloatingPoint() && 2966 VT.bitsLE(N1.getValueType()) && 2967 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2968 if (N1.getValueType() == VT) return N1; // noop conversion. 2969 break; 2970 case ISD::AssertSext: 2971 case ISD::AssertZext: { 2972 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2973 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2974 assert(VT.isInteger() && EVT.isInteger() && 2975 "Cannot *_EXTEND_INREG FP types"); 2976 assert(!EVT.isVector() && 2977 "AssertSExt/AssertZExt type should be the vector element type " 2978 "rather than the vector type!"); 2979 assert(EVT.bitsLE(VT) && "Not extending!"); 2980 if (VT == EVT) return N1; // noop assertion. 2981 break; 2982 } 2983 case ISD::SIGN_EXTEND_INREG: { 2984 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2985 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2986 assert(VT.isInteger() && EVT.isInteger() && 2987 "Cannot *_EXTEND_INREG FP types"); 2988 assert(EVT.isVector() == VT.isVector() && 2989 "SIGN_EXTEND_INREG type should be vector iff the operand " 2990 "type is vector!"); 2991 assert((!EVT.isVector() || 2992 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2993 "Vector element counts must match in SIGN_EXTEND_INREG"); 2994 assert(EVT.bitsLE(VT) && "Not extending!"); 2995 if (EVT == VT) return N1; // Not actually extending 2996 2997 if (N1C) { 2998 APInt Val = N1C->getAPIntValue(); 2999 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 3000 Val <<= Val.getBitWidth()-FromBits; 3001 Val = Val.ashr(Val.getBitWidth()-FromBits); 3002 return getConstant(Val, VT); 3003 } 3004 break; 3005 } 3006 case ISD::EXTRACT_VECTOR_ELT: 3007 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 3008 if (N1.getOpcode() == ISD::UNDEF) 3009 return getUNDEF(VT); 3010 3011 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 3012 // expanding copies of large vectors from registers. 3013 if (N2C && 3014 N1.getOpcode() == ISD::CONCAT_VECTORS && 3015 N1.getNumOperands() > 0) { 3016 unsigned Factor = 3017 N1.getOperand(0).getValueType().getVectorNumElements(); 3018 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 3019 N1.getOperand(N2C->getZExtValue() / Factor), 3020 getConstant(N2C->getZExtValue() % Factor, 3021 N2.getValueType())); 3022 } 3023 3024 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 3025 // expanding large vector constants. 3026 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 3027 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 3028 3029 if (VT != Elt.getValueType()) 3030 // If the vector element type is not legal, the BUILD_VECTOR operands 3031 // are promoted and implicitly truncated, and the result implicitly 3032 // extended. Make that explicit here. 3033 Elt = getAnyExtOrTrunc(Elt, DL, VT); 3034 3035 return Elt; 3036 } 3037 3038 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 3039 // operations are lowered to scalars. 3040 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 3041 // If the indices are the same, return the inserted element else 3042 // if the indices are known different, extract the element from 3043 // the original vector. 3044 SDValue N1Op2 = N1.getOperand(2); 3045 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 3046 3047 if (N1Op2C && N2C) { 3048 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 3049 if (VT == N1.getOperand(1).getValueType()) 3050 return N1.getOperand(1); 3051 else 3052 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 3053 } 3054 3055 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 3056 } 3057 } 3058 break; 3059 case ISD::EXTRACT_ELEMENT: 3060 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 3061 assert(!N1.getValueType().isVector() && !VT.isVector() && 3062 (N1.getValueType().isInteger() == VT.isInteger()) && 3063 N1.getValueType() != VT && 3064 "Wrong types for EXTRACT_ELEMENT!"); 3065 3066 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 3067 // 64-bit integers into 32-bit parts. Instead of building the extract of 3068 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 3069 if (N1.getOpcode() == ISD::BUILD_PAIR) 3070 return N1.getOperand(N2C->getZExtValue()); 3071 3072 // EXTRACT_ELEMENT of a constant int is also very common. 3073 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 3074 unsigned ElementSize = VT.getSizeInBits(); 3075 unsigned Shift = ElementSize * N2C->getZExtValue(); 3076 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 3077 return getConstant(ShiftedVal.trunc(ElementSize), VT); 3078 } 3079 break; 3080 case ISD::EXTRACT_SUBVECTOR: { 3081 SDValue Index = N2; 3082 if (VT.isSimple() && N1.getValueType().isSimple()) { 3083 assert(VT.isVector() && N1.getValueType().isVector() && 3084 "Extract subvector VTs must be a vectors!"); 3085 assert(VT.getVectorElementType() == 3086 N1.getValueType().getVectorElementType() && 3087 "Extract subvector VTs must have the same element type!"); 3088 assert(VT.getSimpleVT() <= N1.getSimpleValueType() && 3089 "Extract subvector must be from larger vector to smaller vector!"); 3090 3091 if (isa<ConstantSDNode>(Index.getNode())) { 3092 assert((VT.getVectorNumElements() + 3093 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3094 <= N1.getValueType().getVectorNumElements()) 3095 && "Extract subvector overflow!"); 3096 } 3097 3098 // Trivial extraction. 3099 if (VT.getSimpleVT() == N1.getSimpleValueType()) 3100 return N1; 3101 } 3102 break; 3103 } 3104 } 3105 3106 // Perform trivial constant folding. 3107 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode()); 3108 if (SV.getNode()) return SV; 3109 3110 // Canonicalize constant to RHS if commutative. 3111 if (N1C && !N2C && isCommutativeBinOp(Opcode)) { 3112 std::swap(N1C, N2C); 3113 std::swap(N1, N2); 3114 } 3115 3116 // Constant fold FP operations. 3117 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 3118 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 3119 if (N1CFP) { 3120 if (!N2CFP && isCommutativeBinOp(Opcode)) { 3121 // Canonicalize constant to RHS if commutative. 3122 std::swap(N1CFP, N2CFP); 3123 std::swap(N1, N2); 3124 } else if (N2CFP) { 3125 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3126 APFloat::opStatus s; 3127 switch (Opcode) { 3128 case ISD::FADD: 3129 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3130 if (s != APFloat::opInvalidOp) 3131 return getConstantFP(V1, VT); 3132 break; 3133 case ISD::FSUB: 3134 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3135 if (s!=APFloat::opInvalidOp) 3136 return getConstantFP(V1, VT); 3137 break; 3138 case ISD::FMUL: 3139 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3140 if (s!=APFloat::opInvalidOp) 3141 return getConstantFP(V1, VT); 3142 break; 3143 case ISD::FDIV: 3144 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3145 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3146 return getConstantFP(V1, VT); 3147 break; 3148 case ISD::FREM : 3149 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3150 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3151 return getConstantFP(V1, VT); 3152 break; 3153 case ISD::FCOPYSIGN: 3154 V1.copySign(V2); 3155 return getConstantFP(V1, VT); 3156 default: break; 3157 } 3158 } 3159 3160 if (Opcode == ISD::FP_ROUND) { 3161 APFloat V = N1CFP->getValueAPF(); // make copy 3162 bool ignored; 3163 // This can return overflow, underflow, or inexact; we don't care. 3164 // FIXME need to be more flexible about rounding mode. 3165 (void)V.convert(EVTToAPFloatSemantics(VT), 3166 APFloat::rmNearestTiesToEven, &ignored); 3167 return getConstantFP(V, VT); 3168 } 3169 } 3170 3171 // Canonicalize an UNDEF to the RHS, even over a constant. 3172 if (N1.getOpcode() == ISD::UNDEF) { 3173 if (isCommutativeBinOp(Opcode)) { 3174 std::swap(N1, N2); 3175 } else { 3176 switch (Opcode) { 3177 case ISD::FP_ROUND_INREG: 3178 case ISD::SIGN_EXTEND_INREG: 3179 case ISD::SUB: 3180 case ISD::FSUB: 3181 case ISD::FDIV: 3182 case ISD::FREM: 3183 case ISD::SRA: 3184 return N1; // fold op(undef, arg2) -> undef 3185 case ISD::UDIV: 3186 case ISD::SDIV: 3187 case ISD::UREM: 3188 case ISD::SREM: 3189 case ISD::SRL: 3190 case ISD::SHL: 3191 if (!VT.isVector()) 3192 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3193 // For vectors, we can't easily build an all zero vector, just return 3194 // the LHS. 3195 return N2; 3196 } 3197 } 3198 } 3199 3200 // Fold a bunch of operators when the RHS is undef. 3201 if (N2.getOpcode() == ISD::UNDEF) { 3202 switch (Opcode) { 3203 case ISD::XOR: 3204 if (N1.getOpcode() == ISD::UNDEF) 3205 // Handle undef ^ undef -> 0 special case. This is a common 3206 // idiom (misuse). 3207 return getConstant(0, VT); 3208 // fallthrough 3209 case ISD::ADD: 3210 case ISD::ADDC: 3211 case ISD::ADDE: 3212 case ISD::SUB: 3213 case ISD::UDIV: 3214 case ISD::SDIV: 3215 case ISD::UREM: 3216 case ISD::SREM: 3217 return N2; // fold op(arg1, undef) -> undef 3218 case ISD::FADD: 3219 case ISD::FSUB: 3220 case ISD::FMUL: 3221 case ISD::FDIV: 3222 case ISD::FREM: 3223 if (getTarget().Options.UnsafeFPMath) 3224 return N2; 3225 break; 3226 case ISD::MUL: 3227 case ISD::AND: 3228 case ISD::SRL: 3229 case ISD::SHL: 3230 if (!VT.isVector()) 3231 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3232 // For vectors, we can't easily build an all zero vector, just return 3233 // the LHS. 3234 return N1; 3235 case ISD::OR: 3236 if (!VT.isVector()) 3237 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3238 // For vectors, we can't easily build an all one vector, just return 3239 // the LHS. 3240 return N1; 3241 case ISD::SRA: 3242 return N1; 3243 } 3244 } 3245 3246 // Memoize this node if possible. 3247 SDNode *N; 3248 SDVTList VTs = getVTList(VT); 3249 if (VT != MVT::Glue) { 3250 SDValue Ops[] = { N1, N2 }; 3251 FoldingSetNodeID ID; 3252 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3253 void *IP = 0; 3254 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3255 return SDValue(E, 0); 3256 3257 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 3258 DL.getDebugLoc(), VTs, N1, N2); 3259 CSEMap.InsertNode(N, IP); 3260 } else { 3261 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 3262 DL.getDebugLoc(), VTs, N1, N2); 3263 } 3264 3265 AllNodes.push_back(N); 3266#ifndef NDEBUG 3267 VerifySDNode(N); 3268#endif 3269 return SDValue(N, 0); 3270} 3271 3272SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3273 SDValue N1, SDValue N2, SDValue N3) { 3274 // Perform various simplifications. 3275 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3276 switch (Opcode) { 3277 case ISD::FMA: { 3278 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1); 3279 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2); 3280 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3); 3281 if (N1CFP && N2CFP && N3CFP) { 3282 APFloat V1 = N1CFP->getValueAPF(); 3283 const APFloat &V2 = N2CFP->getValueAPF(); 3284 const APFloat &V3 = N3CFP->getValueAPF(); 3285 APFloat::opStatus s = 3286 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven); 3287 if (s != APFloat::opInvalidOp) 3288 return getConstantFP(V1, VT); 3289 } 3290 break; 3291 } 3292 case ISD::CONCAT_VECTORS: 3293 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3294 // one big BUILD_VECTOR. 3295 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3296 N2.getOpcode() == ISD::BUILD_VECTOR && 3297 N3.getOpcode() == ISD::BUILD_VECTOR) { 3298 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3299 N1.getNode()->op_end()); 3300 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3301 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3302 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3303 } 3304 break; 3305 case ISD::SETCC: { 3306 // Use FoldSetCC to simplify SETCC's. 3307 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3308 if (Simp.getNode()) return Simp; 3309 break; 3310 } 3311 case ISD::SELECT: 3312 if (N1C) { 3313 if (N1C->getZExtValue()) 3314 return N2; // select true, X, Y -> X 3315 return N3; // select false, X, Y -> Y 3316 } 3317 3318 if (N2 == N3) return N2; // select C, X, X -> X 3319 break; 3320 case ISD::VECTOR_SHUFFLE: 3321 llvm_unreachable("should use getVectorShuffle constructor!"); 3322 case ISD::INSERT_SUBVECTOR: { 3323 SDValue Index = N3; 3324 if (VT.isSimple() && N1.getValueType().isSimple() 3325 && N2.getValueType().isSimple()) { 3326 assert(VT.isVector() && N1.getValueType().isVector() && 3327 N2.getValueType().isVector() && 3328 "Insert subvector VTs must be a vectors"); 3329 assert(VT == N1.getValueType() && 3330 "Dest and insert subvector source types must match!"); 3331 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() && 3332 "Insert subvector must be from smaller vector to larger vector!"); 3333 if (isa<ConstantSDNode>(Index.getNode())) { 3334 assert((N2.getValueType().getVectorNumElements() + 3335 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3336 <= VT.getVectorNumElements()) 3337 && "Insert subvector overflow!"); 3338 } 3339 3340 // Trivial insertion. 3341 if (VT.getSimpleVT() == N2.getSimpleValueType()) 3342 return N2; 3343 } 3344 break; 3345 } 3346 case ISD::BITCAST: 3347 // Fold bit_convert nodes from a type to themselves. 3348 if (N1.getValueType() == VT) 3349 return N1; 3350 break; 3351 } 3352 3353 // Memoize node if it doesn't produce a flag. 3354 SDNode *N; 3355 SDVTList VTs = getVTList(VT); 3356 if (VT != MVT::Glue) { 3357 SDValue Ops[] = { N1, N2, N3 }; 3358 FoldingSetNodeID ID; 3359 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3360 void *IP = 0; 3361 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3362 return SDValue(E, 0); 3363 3364 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 3365 DL.getDebugLoc(), VTs, N1, N2, N3); 3366 CSEMap.InsertNode(N, IP); 3367 } else { 3368 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 3369 DL.getDebugLoc(), VTs, N1, N2, N3); 3370 } 3371 3372 AllNodes.push_back(N); 3373#ifndef NDEBUG 3374 VerifySDNode(N); 3375#endif 3376 return SDValue(N, 0); 3377} 3378 3379SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3380 SDValue N1, SDValue N2, SDValue N3, 3381 SDValue N4) { 3382 SDValue Ops[] = { N1, N2, N3, N4 }; 3383 return getNode(Opcode, DL, VT, Ops, 4); 3384} 3385 3386SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 3387 SDValue N1, SDValue N2, SDValue N3, 3388 SDValue N4, SDValue N5) { 3389 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3390 return getNode(Opcode, DL, VT, Ops, 5); 3391} 3392 3393/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3394/// the incoming stack arguments to be loaded from the stack. 3395SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3396 SmallVector<SDValue, 8> ArgChains; 3397 3398 // Include the original chain at the beginning of the list. When this is 3399 // used by target LowerCall hooks, this helps legalize find the 3400 // CALLSEQ_BEGIN node. 3401 ArgChains.push_back(Chain); 3402 3403 // Add a chain value for each stack argument. 3404 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3405 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3406 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3407 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3408 if (FI->getIndex() < 0) 3409 ArgChains.push_back(SDValue(L, 1)); 3410 3411 // Build a tokenfactor for all the chains. 3412 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, 3413 &ArgChains[0], ArgChains.size()); 3414} 3415 3416/// getMemsetValue - Vectorized representation of the memset value 3417/// operand. 3418static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3419 SDLoc dl) { 3420 assert(Value.getOpcode() != ISD::UNDEF); 3421 3422 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3423 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3424 assert(C->getAPIntValue().getBitWidth() == 8); 3425 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue()); 3426 if (VT.isInteger()) 3427 return DAG.getConstant(Val, VT); 3428 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT); 3429 } 3430 3431 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3432 if (NumBits > 8) { 3433 // Use a multiplication with 0x010101... to extend the input to the 3434 // required length. 3435 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01)); 3436 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3437 } 3438 3439 return Value; 3440} 3441 3442/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3443/// used when a memcpy is turned into a memset when the source is a constant 3444/// string ptr. 3445static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG, 3446 const TargetLowering &TLI, StringRef Str) { 3447 // Handle vector with all elements zero. 3448 if (Str.empty()) { 3449 if (VT.isInteger()) 3450 return DAG.getConstant(0, VT); 3451 else if (VT == MVT::f32 || VT == MVT::f64) 3452 return DAG.getConstantFP(0.0, VT); 3453 else if (VT.isVector()) { 3454 unsigned NumElts = VT.getVectorNumElements(); 3455 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3456 return DAG.getNode(ISD::BITCAST, dl, VT, 3457 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3458 EltVT, NumElts))); 3459 } else 3460 llvm_unreachable("Expected type!"); 3461 } 3462 3463 assert(!VT.isVector() && "Can't handle vector type here!"); 3464 unsigned NumVTBits = VT.getSizeInBits(); 3465 unsigned NumVTBytes = NumVTBits / 8; 3466 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size())); 3467 3468 APInt Val(NumVTBits, 0); 3469 if (TLI.isLittleEndian()) { 3470 for (unsigned i = 0; i != NumBytes; ++i) 3471 Val |= (uint64_t)(unsigned char)Str[i] << i*8; 3472 } else { 3473 for (unsigned i = 0; i != NumBytes; ++i) 3474 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8; 3475 } 3476 3477 // If the "cost" of materializing the integer immediate is 1 or free, then 3478 // it is cost effective to turn the load into the immediate. 3479 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo(); 3480 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2) 3481 return DAG.getConstant(Val, VT); 3482 return SDValue(0, 0); 3483} 3484 3485/// getMemBasePlusOffset - Returns base and offset node for the 3486/// 3487static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl, 3488 SelectionDAG &DAG) { 3489 EVT VT = Base.getValueType(); 3490 return DAG.getNode(ISD::ADD, dl, 3491 VT, Base, DAG.getConstant(Offset, VT)); 3492} 3493 3494/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3495/// 3496static bool isMemSrcFromString(SDValue Src, StringRef &Str) { 3497 unsigned SrcDelta = 0; 3498 GlobalAddressSDNode *G = NULL; 3499 if (Src.getOpcode() == ISD::GlobalAddress) 3500 G = cast<GlobalAddressSDNode>(Src); 3501 else if (Src.getOpcode() == ISD::ADD && 3502 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3503 Src.getOperand(1).getOpcode() == ISD::Constant) { 3504 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3505 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3506 } 3507 if (!G) 3508 return false; 3509 3510 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false); 3511} 3512 3513/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3514/// to replace the memset / memcpy. Return true if the number of memory ops 3515/// is below the threshold. It returns the types of the sequence of 3516/// memory ops to perform memset / memcpy by reference. 3517static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3518 unsigned Limit, uint64_t Size, 3519 unsigned DstAlign, unsigned SrcAlign, 3520 bool IsMemset, 3521 bool ZeroMemset, 3522 bool MemcpyStrSrc, 3523 bool AllowOverlap, 3524 SelectionDAG &DAG, 3525 const TargetLowering &TLI) { 3526 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3527 "Expecting memcpy / memset source to meet alignment requirement!"); 3528 // If 'SrcAlign' is zero, that means the memory operation does not need to 3529 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3530 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3531 // is the specified alignment of the memory operation. If it is zero, that 3532 // means it's possible to change the alignment of the destination. 3533 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3534 // not need to be loaded. 3535 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3536 IsMemset, ZeroMemset, MemcpyStrSrc, 3537 DAG.getMachineFunction()); 3538 3539 if (VT == MVT::Other) { 3540 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() || 3541 TLI.allowsUnalignedMemoryAccesses(VT)) { 3542 VT = TLI.getPointerTy(); 3543 } else { 3544 switch (DstAlign & 7) { 3545 case 0: VT = MVT::i64; break; 3546 case 4: VT = MVT::i32; break; 3547 case 2: VT = MVT::i16; break; 3548 default: VT = MVT::i8; break; 3549 } 3550 } 3551 3552 MVT LVT = MVT::i64; 3553 while (!TLI.isTypeLegal(LVT)) 3554 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3555 assert(LVT.isInteger()); 3556 3557 if (VT.bitsGT(LVT)) 3558 VT = LVT; 3559 } 3560 3561 unsigned NumMemOps = 0; 3562 while (Size != 0) { 3563 unsigned VTSize = VT.getSizeInBits() / 8; 3564 while (VTSize > Size) { 3565 // For now, only use non-vector load / store's for the left-over pieces. 3566 EVT NewVT = VT; 3567 unsigned NewVTSize; 3568 3569 bool Found = false; 3570 if (VT.isVector() || VT.isFloatingPoint()) { 3571 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32; 3572 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) && 3573 TLI.isSafeMemOpType(NewVT.getSimpleVT())) 3574 Found = true; 3575 else if (NewVT == MVT::i64 && 3576 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) && 3577 TLI.isSafeMemOpType(MVT::f64)) { 3578 // i64 is usually not legal on 32-bit targets, but f64 may be. 3579 NewVT = MVT::f64; 3580 Found = true; 3581 } 3582 } 3583 3584 if (!Found) { 3585 do { 3586 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1); 3587 if (NewVT == MVT::i8) 3588 break; 3589 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT())); 3590 } 3591 NewVTSize = NewVT.getSizeInBits() / 8; 3592 3593 // If the new VT cannot cover all of the remaining bits, then consider 3594 // issuing a (or a pair of) unaligned and overlapping load / store. 3595 // FIXME: Only does this for 64-bit or more since we don't have proper 3596 // cost model for unaligned load / store. 3597 bool Fast; 3598 if (NumMemOps && AllowOverlap && 3599 VTSize >= 8 && NewVTSize < Size && 3600 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast) 3601 VTSize = Size; 3602 else { 3603 VT = NewVT; 3604 VTSize = NewVTSize; 3605 } 3606 } 3607 3608 if (++NumMemOps > Limit) 3609 return false; 3610 3611 MemOps.push_back(VT); 3612 Size -= VTSize; 3613 } 3614 3615 return true; 3616} 3617 3618static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl, 3619 SDValue Chain, SDValue Dst, 3620 SDValue Src, uint64_t Size, 3621 unsigned Align, bool isVol, 3622 bool AlwaysInline, 3623 MachinePointerInfo DstPtrInfo, 3624 MachinePointerInfo SrcPtrInfo) { 3625 // Turn a memcpy of undef to nop. 3626 if (Src.getOpcode() == ISD::UNDEF) 3627 return Chain; 3628 3629 // Expand memcpy to a series of load and store ops if the size operand falls 3630 // below a certain threshold. 3631 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3632 // rather than maybe a humongous number of loads and stores. 3633 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3634 std::vector<EVT> MemOps; 3635 bool DstAlignCanChange = false; 3636 MachineFunction &MF = DAG.getMachineFunction(); 3637 MachineFrameInfo *MFI = MF.getFrameInfo(); 3638 bool OptSize = 3639 MF.getFunction()->getAttributes(). 3640 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3641 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3642 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3643 DstAlignCanChange = true; 3644 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3645 if (Align > SrcAlign) 3646 SrcAlign = Align; 3647 StringRef Str; 3648 bool CopyFromStr = isMemSrcFromString(Src, Str); 3649 bool isZeroStr = CopyFromStr && Str.empty(); 3650 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3651 3652 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3653 (DstAlignCanChange ? 0 : Align), 3654 (isZeroStr ? 0 : SrcAlign), 3655 false, false, CopyFromStr, true, DAG, TLI)) 3656 return SDValue(); 3657 3658 if (DstAlignCanChange) { 3659 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3660 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3661 3662 // Don't promote to an alignment that would require dynamic stack 3663 // realignment. 3664 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 3665 if (!TRI->needsStackRealignment(MF)) 3666 while (NewAlign > Align && 3667 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign)) 3668 NewAlign /= 2; 3669 3670 if (NewAlign > Align) { 3671 // Give the stack frame object a larger alignment if needed. 3672 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3673 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3674 Align = NewAlign; 3675 } 3676 } 3677 3678 SmallVector<SDValue, 8> OutChains; 3679 unsigned NumMemOps = MemOps.size(); 3680 uint64_t SrcOff = 0, DstOff = 0; 3681 for (unsigned i = 0; i != NumMemOps; ++i) { 3682 EVT VT = MemOps[i]; 3683 unsigned VTSize = VT.getSizeInBits() / 8; 3684 SDValue Value, Store; 3685 3686 if (VTSize > Size) { 3687 // Issuing an unaligned load / store pair that overlaps with the previous 3688 // pair. Adjust the offset accordingly. 3689 assert(i == NumMemOps-1 && i != 0); 3690 SrcOff -= VTSize - Size; 3691 DstOff -= VTSize - Size; 3692 } 3693 3694 if (CopyFromStr && 3695 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3696 // It's unlikely a store of a vector immediate can be done in a single 3697 // instruction. It would require a load from a constantpool first. 3698 // We only handle zero vectors here. 3699 // FIXME: Handle other cases where store of vector immediate is done in 3700 // a single instruction. 3701 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff)); 3702 if (Value.getNode()) 3703 Store = DAG.getStore(Chain, dl, Value, 3704 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3705 DstPtrInfo.getWithOffset(DstOff), isVol, 3706 false, Align); 3707 } 3708 3709 if (!Store.getNode()) { 3710 // The type might not be legal for the target. This should only happen 3711 // if the type is smaller than a legal type, as on PPC, so the right 3712 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3713 // to Load/Store if NVT==VT. 3714 // FIXME does the case above also need this? 3715 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3716 assert(NVT.bitsGE(VT)); 3717 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3718 getMemBasePlusOffset(Src, SrcOff, dl, DAG), 3719 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3720 MinAlign(SrcAlign, SrcOff)); 3721 Store = DAG.getTruncStore(Chain, dl, Value, 3722 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3723 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3724 false, Align); 3725 } 3726 OutChains.push_back(Store); 3727 SrcOff += VTSize; 3728 DstOff += VTSize; 3729 Size -= VTSize; 3730 } 3731 3732 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3733 &OutChains[0], OutChains.size()); 3734} 3735 3736static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl, 3737 SDValue Chain, SDValue Dst, 3738 SDValue Src, uint64_t Size, 3739 unsigned Align, bool isVol, 3740 bool AlwaysInline, 3741 MachinePointerInfo DstPtrInfo, 3742 MachinePointerInfo SrcPtrInfo) { 3743 // Turn a memmove of undef to nop. 3744 if (Src.getOpcode() == ISD::UNDEF) 3745 return Chain; 3746 3747 // Expand memmove to a series of load and store ops if the size operand falls 3748 // below a certain threshold. 3749 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3750 std::vector<EVT> MemOps; 3751 bool DstAlignCanChange = false; 3752 MachineFunction &MF = DAG.getMachineFunction(); 3753 MachineFrameInfo *MFI = MF.getFrameInfo(); 3754 bool OptSize = MF.getFunction()->getAttributes(). 3755 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3756 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3757 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3758 DstAlignCanChange = true; 3759 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3760 if (Align > SrcAlign) 3761 SrcAlign = Align; 3762 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3763 3764 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3765 (DstAlignCanChange ? 0 : Align), SrcAlign, 3766 false, false, false, false, DAG, TLI)) 3767 return SDValue(); 3768 3769 if (DstAlignCanChange) { 3770 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3771 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3772 if (NewAlign > Align) { 3773 // Give the stack frame object a larger alignment if needed. 3774 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3775 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3776 Align = NewAlign; 3777 } 3778 } 3779 3780 uint64_t SrcOff = 0, DstOff = 0; 3781 SmallVector<SDValue, 8> LoadValues; 3782 SmallVector<SDValue, 8> LoadChains; 3783 SmallVector<SDValue, 8> OutChains; 3784 unsigned NumMemOps = MemOps.size(); 3785 for (unsigned i = 0; i < NumMemOps; i++) { 3786 EVT VT = MemOps[i]; 3787 unsigned VTSize = VT.getSizeInBits() / 8; 3788 SDValue Value; 3789 3790 Value = DAG.getLoad(VT, dl, Chain, 3791 getMemBasePlusOffset(Src, SrcOff, dl, DAG), 3792 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3793 false, false, SrcAlign); 3794 LoadValues.push_back(Value); 3795 LoadChains.push_back(Value.getValue(1)); 3796 SrcOff += VTSize; 3797 } 3798 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3799 &LoadChains[0], LoadChains.size()); 3800 OutChains.clear(); 3801 for (unsigned i = 0; i < NumMemOps; i++) { 3802 EVT VT = MemOps[i]; 3803 unsigned VTSize = VT.getSizeInBits() / 8; 3804 SDValue Store; 3805 3806 Store = DAG.getStore(Chain, dl, LoadValues[i], 3807 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3808 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3809 OutChains.push_back(Store); 3810 DstOff += VTSize; 3811 } 3812 3813 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3814 &OutChains[0], OutChains.size()); 3815} 3816 3817/// \brief Lower the call to 'memset' intrinsic function into a series of store 3818/// operations. 3819/// 3820/// \param DAG Selection DAG where lowered code is placed. 3821/// \param dl Link to corresponding IR location. 3822/// \param Chain Control flow dependency. 3823/// \param Dst Pointer to destination memory location. 3824/// \param Src Value of byte to write into the memory. 3825/// \param Size Number of bytes to write. 3826/// \param Align Alignment of the destination in bytes. 3827/// \param isVol True if destination is volatile. 3828/// \param DstPtrInfo IR information on the memory pointer. 3829/// \returns New head in the control flow, if lowering was successful, empty 3830/// SDValue otherwise. 3831/// 3832/// The function tries to replace 'llvm.memset' intrinsic with several store 3833/// operations and value calculation code. This is usually profitable for small 3834/// memory size. 3835static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl, 3836 SDValue Chain, SDValue Dst, 3837 SDValue Src, uint64_t Size, 3838 unsigned Align, bool isVol, 3839 MachinePointerInfo DstPtrInfo) { 3840 // Turn a memset of undef to nop. 3841 if (Src.getOpcode() == ISD::UNDEF) 3842 return Chain; 3843 3844 // Expand memset to a series of load/store ops if the size operand 3845 // falls below a certain threshold. 3846 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3847 std::vector<EVT> MemOps; 3848 bool DstAlignCanChange = false; 3849 MachineFunction &MF = DAG.getMachineFunction(); 3850 MachineFrameInfo *MFI = MF.getFrameInfo(); 3851 bool OptSize = MF.getFunction()->getAttributes(). 3852 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize); 3853 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3854 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3855 DstAlignCanChange = true; 3856 bool IsZeroVal = 3857 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3858 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3859 Size, (DstAlignCanChange ? 0 : Align), 0, 3860 true, IsZeroVal, false, true, DAG, TLI)) 3861 return SDValue(); 3862 3863 if (DstAlignCanChange) { 3864 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3865 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty); 3866 if (NewAlign > Align) { 3867 // Give the stack frame object a larger alignment if needed. 3868 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3869 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3870 Align = NewAlign; 3871 } 3872 } 3873 3874 SmallVector<SDValue, 8> OutChains; 3875 uint64_t DstOff = 0; 3876 unsigned NumMemOps = MemOps.size(); 3877 3878 // Find the largest store and generate the bit pattern for it. 3879 EVT LargestVT = MemOps[0]; 3880 for (unsigned i = 1; i < NumMemOps; i++) 3881 if (MemOps[i].bitsGT(LargestVT)) 3882 LargestVT = MemOps[i]; 3883 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3884 3885 for (unsigned i = 0; i < NumMemOps; i++) { 3886 EVT VT = MemOps[i]; 3887 unsigned VTSize = VT.getSizeInBits() / 8; 3888 if (VTSize > Size) { 3889 // Issuing an unaligned load / store pair that overlaps with the previous 3890 // pair. Adjust the offset accordingly. 3891 assert(i == NumMemOps-1 && i != 0); 3892 DstOff -= VTSize - Size; 3893 } 3894 3895 // If this store is smaller than the largest store see whether we can get 3896 // the smaller value for free with a truncate. 3897 SDValue Value = MemSetValue; 3898 if (VT.bitsLT(LargestVT)) { 3899 if (!LargestVT.isVector() && !VT.isVector() && 3900 TLI.isTruncateFree(LargestVT, VT)) 3901 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3902 else 3903 Value = getMemsetValue(Src, VT, DAG, dl); 3904 } 3905 assert(Value.getValueType() == VT && "Value with wrong type."); 3906 SDValue Store = DAG.getStore(Chain, dl, Value, 3907 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3908 DstPtrInfo.getWithOffset(DstOff), 3909 isVol, false, Align); 3910 OutChains.push_back(Store); 3911 DstOff += VT.getSizeInBits() / 8; 3912 Size -= VTSize; 3913 } 3914 3915 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3916 &OutChains[0], OutChains.size()); 3917} 3918 3919SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst, 3920 SDValue Src, SDValue Size, 3921 unsigned Align, bool isVol, bool AlwaysInline, 3922 MachinePointerInfo DstPtrInfo, 3923 MachinePointerInfo SrcPtrInfo) { 3924 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 3925 3926 // Check to see if we should lower the memcpy to loads and stores first. 3927 // For cases within the target-specified limits, this is the best choice. 3928 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3929 if (ConstantSize) { 3930 // Memcpy with size zero? Just return the original chain. 3931 if (ConstantSize->isNullValue()) 3932 return Chain; 3933 3934 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3935 ConstantSize->getZExtValue(),Align, 3936 isVol, false, DstPtrInfo, SrcPtrInfo); 3937 if (Result.getNode()) 3938 return Result; 3939 } 3940 3941 // Then check to see if we should lower the memcpy with target-specific 3942 // code. If the target chooses to do this, this is the next best. 3943 SDValue Result = 3944 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3945 isVol, AlwaysInline, 3946 DstPtrInfo, SrcPtrInfo); 3947 if (Result.getNode()) 3948 return Result; 3949 3950 // If we really need inline code and the target declined to provide it, 3951 // use a (potentially long) sequence of loads and stores. 3952 if (AlwaysInline) { 3953 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3954 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3955 ConstantSize->getZExtValue(), Align, isVol, 3956 true, DstPtrInfo, SrcPtrInfo); 3957 } 3958 3959 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3960 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3961 // respect volatile, so they may do things like read or write memory 3962 // beyond the given memory regions. But fixing this isn't easy, and most 3963 // people don't care. 3964 3965 const TargetLowering *TLI = TM.getTargetLowering(); 3966 3967 // Emit a library call. 3968 TargetLowering::ArgListTy Args; 3969 TargetLowering::ArgListEntry Entry; 3970 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext()); 3971 Entry.Node = Dst; Args.push_back(Entry); 3972 Entry.Node = Src; Args.push_back(Entry); 3973 Entry.Node = Size; Args.push_back(Entry); 3974 // FIXME: pass in SDLoc 3975 TargetLowering:: 3976 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 3977 false, false, false, false, 0, 3978 TLI->getLibcallCallingConv(RTLIB::MEMCPY), 3979 /*isTailCall=*/false, 3980 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 3981 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY), 3982 TLI->getPointerTy()), 3983 Args, *this, dl); 3984 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 3985 3986 return CallResult.second; 3987} 3988 3989SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst, 3990 SDValue Src, SDValue Size, 3991 unsigned Align, bool isVol, 3992 MachinePointerInfo DstPtrInfo, 3993 MachinePointerInfo SrcPtrInfo) { 3994 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 3995 3996 // Check to see if we should lower the memmove to loads and stores first. 3997 // For cases within the target-specified limits, this is the best choice. 3998 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3999 if (ConstantSize) { 4000 // Memmove with size zero? Just return the original chain. 4001 if (ConstantSize->isNullValue()) 4002 return Chain; 4003 4004 SDValue Result = 4005 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 4006 ConstantSize->getZExtValue(), Align, isVol, 4007 false, DstPtrInfo, SrcPtrInfo); 4008 if (Result.getNode()) 4009 return Result; 4010 } 4011 4012 // Then check to see if we should lower the memmove with target-specific 4013 // code. If the target chooses to do this, this is the next best. 4014 SDValue Result = 4015 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4016 DstPtrInfo, SrcPtrInfo); 4017 if (Result.getNode()) 4018 return Result; 4019 4020 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 4021 // not be safe. See memcpy above for more details. 4022 4023 const TargetLowering *TLI = TM.getTargetLowering(); 4024 4025 // Emit a library call. 4026 TargetLowering::ArgListTy Args; 4027 TargetLowering::ArgListEntry Entry; 4028 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext()); 4029 Entry.Node = Dst; Args.push_back(Entry); 4030 Entry.Node = Src; Args.push_back(Entry); 4031 Entry.Node = Size; Args.push_back(Entry); 4032 // FIXME: pass in SDLoc 4033 TargetLowering:: 4034 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4035 false, false, false, false, 0, 4036 TLI->getLibcallCallingConv(RTLIB::MEMMOVE), 4037 /*isTailCall=*/false, 4038 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false, 4039 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE), 4040 TLI->getPointerTy()), 4041 Args, *this, dl); 4042 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 4043 4044 return CallResult.second; 4045} 4046 4047SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst, 4048 SDValue Src, SDValue Size, 4049 unsigned Align, bool isVol, 4050 MachinePointerInfo DstPtrInfo) { 4051 assert(Align && "The SDAG layer expects explicit alignment and reserves 0"); 4052 4053 // Check to see if we should lower the memset to stores first. 4054 // For cases within the target-specified limits, this is the best choice. 4055 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 4056 if (ConstantSize) { 4057 // Memset with size zero? Just return the original chain. 4058 if (ConstantSize->isNullValue()) 4059 return Chain; 4060 4061 SDValue Result = 4062 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 4063 Align, isVol, DstPtrInfo); 4064 4065 if (Result.getNode()) 4066 return Result; 4067 } 4068 4069 // Then check to see if we should lower the memset with target-specific 4070 // code. If the target chooses to do this, this is the next best. 4071 SDValue Result = 4072 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 4073 DstPtrInfo); 4074 if (Result.getNode()) 4075 return Result; 4076 4077 // Emit a library call. 4078 const TargetLowering *TLI = TM.getTargetLowering(); 4079 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext()); 4080 TargetLowering::ArgListTy Args; 4081 TargetLowering::ArgListEntry Entry; 4082 Entry.Node = Dst; Entry.Ty = IntPtrTy; 4083 Args.push_back(Entry); 4084 // Extend or truncate the argument to be an i32 value for the call. 4085 if (Src.getValueType().bitsGT(MVT::i32)) 4086 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 4087 else 4088 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 4089 Entry.Node = Src; 4090 Entry.Ty = Type::getInt32Ty(*getContext()); 4091 Entry.isSExt = true; 4092 Args.push_back(Entry); 4093 Entry.Node = Size; 4094 Entry.Ty = IntPtrTy; 4095 Entry.isSExt = false; 4096 Args.push_back(Entry); 4097 // FIXME: pass in SDLoc 4098 TargetLowering:: 4099 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()), 4100 false, false, false, false, 0, 4101 TLI->getLibcallCallingConv(RTLIB::MEMSET), 4102 /*isTailCall=*/false, 4103 /*doesNotReturn*/false, /*isReturnValueUsed=*/false, 4104 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET), 4105 TLI->getPointerTy()), 4106 Args, *this, dl); 4107 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI); 4108 4109 return CallResult.second; 4110} 4111 4112SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4113 SDVTList VTList, SDValue* Ops, unsigned NumOps, 4114 MachineMemOperand *MMO, 4115 AtomicOrdering Ordering, 4116 SynchronizationScope SynchScope) { 4117 FoldingSetNodeID ID; 4118 ID.AddInteger(MemVT.getRawBits()); 4119 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4120 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4121 void* IP = 0; 4122 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4123 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4124 return SDValue(E, 0); 4125 } 4126 4127 // Allocate the operands array for the node out of the BumpPtrAllocator, since 4128 // SDNode doesn't have access to it. This memory will be "leaked" when 4129 // the node is deallocated, but recovered when the allocator is released. 4130 // If the number of operands is less than 5 we use AtomicSDNode's internal 4131 // storage. 4132 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps) : 0; 4133 4134 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(), 4135 dl.getDebugLoc(), VTList, MemVT, 4136 Ops, DynOps, NumOps, MMO, 4137 Ordering, SynchScope); 4138 CSEMap.InsertNode(N, IP); 4139 AllNodes.push_back(N); 4140 return SDValue(N, 0); 4141} 4142 4143SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4144 SDValue Chain, SDValue Ptr, SDValue Cmp, 4145 SDValue Swp, MachinePointerInfo PtrInfo, 4146 unsigned Alignment, 4147 AtomicOrdering Ordering, 4148 SynchronizationScope SynchScope) { 4149 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4150 Alignment = getEVTAlignment(MemVT); 4151 4152 MachineFunction &MF = getMachineFunction(); 4153 4154 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE. 4155 // For now, atomics are considered to be volatile always. 4156 // FIXME: Volatile isn't really correct; we should keep track of atomic 4157 // orderings in the memoperand. 4158 unsigned Flags = MachineMemOperand::MOVolatile; 4159 if (Opcode != ISD::ATOMIC_STORE) 4160 Flags |= MachineMemOperand::MOLoad; 4161 if (Opcode != ISD::ATOMIC_LOAD) 4162 Flags |= MachineMemOperand::MOStore; 4163 4164 MachineMemOperand *MMO = 4165 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 4166 4167 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 4168 Ordering, SynchScope); 4169} 4170 4171SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4172 SDValue Chain, 4173 SDValue Ptr, SDValue Cmp, 4174 SDValue Swp, MachineMemOperand *MMO, 4175 AtomicOrdering Ordering, 4176 SynchronizationScope SynchScope) { 4177 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 4178 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 4179 4180 EVT VT = Cmp.getValueType(); 4181 4182 SDVTList VTs = getVTList(VT, MVT::Other); 4183 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 4184 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 4, MMO, Ordering, SynchScope); 4185} 4186 4187SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4188 SDValue Chain, 4189 SDValue Ptr, SDValue Val, 4190 const Value* PtrVal, 4191 unsigned Alignment, 4192 AtomicOrdering Ordering, 4193 SynchronizationScope SynchScope) { 4194 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4195 Alignment = getEVTAlignment(MemVT); 4196 4197 MachineFunction &MF = getMachineFunction(); 4198 // An atomic store does not load. An atomic load does not store. 4199 // (An atomicrmw obviously both loads and stores.) 4200 // For now, atomics are considered to be volatile always, and they are 4201 // chained as such. 4202 // FIXME: Volatile isn't really correct; we should keep track of atomic 4203 // orderings in the memoperand. 4204 unsigned Flags = MachineMemOperand::MOVolatile; 4205 if (Opcode != ISD::ATOMIC_STORE) 4206 Flags |= MachineMemOperand::MOLoad; 4207 if (Opcode != ISD::ATOMIC_LOAD) 4208 Flags |= MachineMemOperand::MOStore; 4209 4210 MachineMemOperand *MMO = 4211 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4212 MemVT.getStoreSize(), Alignment); 4213 4214 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 4215 Ordering, SynchScope); 4216} 4217 4218SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4219 SDValue Chain, 4220 SDValue Ptr, SDValue Val, 4221 MachineMemOperand *MMO, 4222 AtomicOrdering Ordering, 4223 SynchronizationScope SynchScope) { 4224 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 4225 Opcode == ISD::ATOMIC_LOAD_SUB || 4226 Opcode == ISD::ATOMIC_LOAD_AND || 4227 Opcode == ISD::ATOMIC_LOAD_OR || 4228 Opcode == ISD::ATOMIC_LOAD_XOR || 4229 Opcode == ISD::ATOMIC_LOAD_NAND || 4230 Opcode == ISD::ATOMIC_LOAD_MIN || 4231 Opcode == ISD::ATOMIC_LOAD_MAX || 4232 Opcode == ISD::ATOMIC_LOAD_UMIN || 4233 Opcode == ISD::ATOMIC_LOAD_UMAX || 4234 Opcode == ISD::ATOMIC_SWAP || 4235 Opcode == ISD::ATOMIC_STORE) && 4236 "Invalid Atomic Op"); 4237 4238 EVT VT = Val.getValueType(); 4239 4240 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 4241 getVTList(VT, MVT::Other); 4242 SDValue Ops[] = {Chain, Ptr, Val}; 4243 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 3, MMO, Ordering, SynchScope); 4244} 4245 4246SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4247 EVT VT, SDValue Chain, 4248 SDValue Ptr, 4249 const Value* PtrVal, 4250 unsigned Alignment, 4251 AtomicOrdering Ordering, 4252 SynchronizationScope SynchScope) { 4253 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4254 Alignment = getEVTAlignment(MemVT); 4255 4256 MachineFunction &MF = getMachineFunction(); 4257 // An atomic store does not load. An atomic load does not store. 4258 // (An atomicrmw obviously both loads and stores.) 4259 // For now, atomics are considered to be volatile always, and they are 4260 // chained as such. 4261 // FIXME: Volatile isn't really correct; we should keep track of atomic 4262 // orderings in the memoperand. 4263 unsigned Flags = MachineMemOperand::MOVolatile; 4264 if (Opcode != ISD::ATOMIC_STORE) 4265 Flags |= MachineMemOperand::MOLoad; 4266 if (Opcode != ISD::ATOMIC_LOAD) 4267 Flags |= MachineMemOperand::MOStore; 4268 4269 MachineMemOperand *MMO = 4270 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4271 MemVT.getStoreSize(), Alignment); 4272 4273 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4274 Ordering, SynchScope); 4275} 4276 4277SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, 4278 EVT VT, SDValue Chain, 4279 SDValue Ptr, 4280 MachineMemOperand *MMO, 4281 AtomicOrdering Ordering, 4282 SynchronizationScope SynchScope) { 4283 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4284 4285 SDVTList VTs = getVTList(VT, MVT::Other); 4286 SDValue Ops[] = {Chain, Ptr}; 4287 return getAtomic(Opcode, dl, MemVT, VTs, Ops, 2, MMO, Ordering, SynchScope); 4288} 4289 4290/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4291SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4292 SDLoc dl) { 4293 if (NumOps == 1) 4294 return Ops[0]; 4295 4296 SmallVector<EVT, 4> VTs; 4297 VTs.reserve(NumOps); 4298 for (unsigned i = 0; i < NumOps; ++i) 4299 VTs.push_back(Ops[i].getValueType()); 4300 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4301 Ops, NumOps); 4302} 4303 4304SDValue 4305SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, 4306 const EVT *VTs, unsigned NumVTs, 4307 const SDValue *Ops, unsigned NumOps, 4308 EVT MemVT, MachinePointerInfo PtrInfo, 4309 unsigned Align, bool Vol, 4310 bool ReadMem, bool WriteMem) { 4311 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4312 MemVT, PtrInfo, Align, Vol, 4313 ReadMem, WriteMem); 4314} 4315 4316SDValue 4317SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 4318 const SDValue *Ops, unsigned NumOps, 4319 EVT MemVT, MachinePointerInfo PtrInfo, 4320 unsigned Align, bool Vol, 4321 bool ReadMem, bool WriteMem) { 4322 if (Align == 0) // Ensure that codegen never sees alignment 0 4323 Align = getEVTAlignment(MemVT); 4324 4325 MachineFunction &MF = getMachineFunction(); 4326 unsigned Flags = 0; 4327 if (WriteMem) 4328 Flags |= MachineMemOperand::MOStore; 4329 if (ReadMem) 4330 Flags |= MachineMemOperand::MOLoad; 4331 if (Vol) 4332 Flags |= MachineMemOperand::MOVolatile; 4333 MachineMemOperand *MMO = 4334 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4335 4336 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4337} 4338 4339SDValue 4340SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, 4341 const SDValue *Ops, unsigned NumOps, 4342 EVT MemVT, MachineMemOperand *MMO) { 4343 assert((Opcode == ISD::INTRINSIC_VOID || 4344 Opcode == ISD::INTRINSIC_W_CHAIN || 4345 Opcode == ISD::PREFETCH || 4346 Opcode == ISD::LIFETIME_START || 4347 Opcode == ISD::LIFETIME_END || 4348 (Opcode <= INT_MAX && 4349 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4350 "Opcode is not a memory-accessing opcode!"); 4351 4352 // Memoize the node unless it returns a flag. 4353 MemIntrinsicSDNode *N; 4354 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4355 FoldingSetNodeID ID; 4356 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4357 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4358 void *IP = 0; 4359 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4360 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4361 return SDValue(E, 0); 4362 } 4363 4364 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(), 4365 dl.getDebugLoc(), VTList, Ops, 4366 NumOps, MemVT, MMO); 4367 CSEMap.InsertNode(N, IP); 4368 } else { 4369 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(), 4370 dl.getDebugLoc(), VTList, Ops, 4371 NumOps, MemVT, MMO); 4372 } 4373 AllNodes.push_back(N); 4374 return SDValue(N, 0); 4375} 4376 4377/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4378/// MachinePointerInfo record from it. This is particularly useful because the 4379/// code generator has many cases where it doesn't bother passing in a 4380/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4381static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4382 // If this is FI+Offset, we can model it. 4383 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4384 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4385 4386 // If this is (FI+Offset1)+Offset2, we can model it. 4387 if (Ptr.getOpcode() != ISD::ADD || 4388 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4389 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4390 return MachinePointerInfo(); 4391 4392 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4393 return MachinePointerInfo::getFixedStack(FI, Offset+ 4394 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4395} 4396 4397/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4398/// MachinePointerInfo record from it. This is particularly useful because the 4399/// code generator has many cases where it doesn't bother passing in a 4400/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4401static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4402 // If the 'Offset' value isn't a constant, we can't handle this. 4403 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4404 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4405 if (OffsetOp.getOpcode() == ISD::UNDEF) 4406 return InferPointerInfo(Ptr); 4407 return MachinePointerInfo(); 4408} 4409 4410 4411SDValue 4412SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4413 EVT VT, SDLoc dl, SDValue Chain, 4414 SDValue Ptr, SDValue Offset, 4415 MachinePointerInfo PtrInfo, EVT MemVT, 4416 bool isVolatile, bool isNonTemporal, bool isInvariant, 4417 unsigned Alignment, const MDNode *TBAAInfo, 4418 const MDNode *Ranges) { 4419 assert(Chain.getValueType() == MVT::Other && 4420 "Invalid chain type"); 4421 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4422 Alignment = getEVTAlignment(VT); 4423 4424 unsigned Flags = MachineMemOperand::MOLoad; 4425 if (isVolatile) 4426 Flags |= MachineMemOperand::MOVolatile; 4427 if (isNonTemporal) 4428 Flags |= MachineMemOperand::MONonTemporal; 4429 if (isInvariant) 4430 Flags |= MachineMemOperand::MOInvariant; 4431 4432 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4433 // clients. 4434 if (PtrInfo.V == 0) 4435 PtrInfo = InferPointerInfo(Ptr, Offset); 4436 4437 MachineFunction &MF = getMachineFunction(); 4438 MachineMemOperand *MMO = 4439 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4440 TBAAInfo, Ranges); 4441 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4442} 4443 4444SDValue 4445SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4446 EVT VT, SDLoc dl, SDValue Chain, 4447 SDValue Ptr, SDValue Offset, EVT MemVT, 4448 MachineMemOperand *MMO) { 4449 if (VT == MemVT) { 4450 ExtType = ISD::NON_EXTLOAD; 4451 } else if (ExtType == ISD::NON_EXTLOAD) { 4452 assert(VT == MemVT && "Non-extending load from different memory type!"); 4453 } else { 4454 // Extending load. 4455 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4456 "Should only be an extending load, not truncating!"); 4457 assert(VT.isInteger() == MemVT.isInteger() && 4458 "Cannot convert from FP to Int or Int -> FP!"); 4459 assert(VT.isVector() == MemVT.isVector() && 4460 "Cannot use trunc store to convert to or from a vector!"); 4461 assert((!VT.isVector() || 4462 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4463 "Cannot use trunc store to change the number of vector elements!"); 4464 } 4465 4466 bool Indexed = AM != ISD::UNINDEXED; 4467 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4468 "Unindexed load with an offset!"); 4469 4470 SDVTList VTs = Indexed ? 4471 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4472 SDValue Ops[] = { Chain, Ptr, Offset }; 4473 FoldingSetNodeID ID; 4474 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4475 ID.AddInteger(MemVT.getRawBits()); 4476 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4477 MMO->isNonTemporal(), 4478 MMO->isInvariant())); 4479 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4480 void *IP = 0; 4481 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4482 cast<LoadSDNode>(E)->refineAlignment(MMO); 4483 return SDValue(E, 0); 4484 } 4485 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(), 4486 dl.getDebugLoc(), VTs, AM, ExtType, 4487 MemVT, MMO); 4488 CSEMap.InsertNode(N, IP); 4489 AllNodes.push_back(N); 4490 return SDValue(N, 0); 4491} 4492 4493SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl, 4494 SDValue Chain, SDValue Ptr, 4495 MachinePointerInfo PtrInfo, 4496 bool isVolatile, bool isNonTemporal, 4497 bool isInvariant, unsigned Alignment, 4498 const MDNode *TBAAInfo, 4499 const MDNode *Ranges) { 4500 SDValue Undef = getUNDEF(Ptr.getValueType()); 4501 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4502 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4503 TBAAInfo, Ranges); 4504} 4505 4506SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, 4507 SDValue Chain, SDValue Ptr, 4508 MachinePointerInfo PtrInfo, EVT MemVT, 4509 bool isVolatile, bool isNonTemporal, 4510 unsigned Alignment, const MDNode *TBAAInfo) { 4511 SDValue Undef = getUNDEF(Ptr.getValueType()); 4512 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4513 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4514 TBAAInfo); 4515} 4516 4517 4518SDValue 4519SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base, 4520 SDValue Offset, ISD::MemIndexedMode AM) { 4521 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4522 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4523 "Load is already a indexed load!"); 4524 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4525 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4526 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4527 false, LD->getAlignment()); 4528} 4529 4530SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val, 4531 SDValue Ptr, MachinePointerInfo PtrInfo, 4532 bool isVolatile, bool isNonTemporal, 4533 unsigned Alignment, const MDNode *TBAAInfo) { 4534 assert(Chain.getValueType() == MVT::Other && 4535 "Invalid chain type"); 4536 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4537 Alignment = getEVTAlignment(Val.getValueType()); 4538 4539 unsigned Flags = MachineMemOperand::MOStore; 4540 if (isVolatile) 4541 Flags |= MachineMemOperand::MOVolatile; 4542 if (isNonTemporal) 4543 Flags |= MachineMemOperand::MONonTemporal; 4544 4545 if (PtrInfo.V == 0) 4546 PtrInfo = InferPointerInfo(Ptr); 4547 4548 MachineFunction &MF = getMachineFunction(); 4549 MachineMemOperand *MMO = 4550 MF.getMachineMemOperand(PtrInfo, Flags, 4551 Val.getValueType().getStoreSize(), Alignment, 4552 TBAAInfo); 4553 4554 return getStore(Chain, dl, Val, Ptr, MMO); 4555} 4556 4557SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val, 4558 SDValue Ptr, MachineMemOperand *MMO) { 4559 assert(Chain.getValueType() == MVT::Other && 4560 "Invalid chain type"); 4561 EVT VT = Val.getValueType(); 4562 SDVTList VTs = getVTList(MVT::Other); 4563 SDValue Undef = getUNDEF(Ptr.getValueType()); 4564 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4565 FoldingSetNodeID ID; 4566 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4567 ID.AddInteger(VT.getRawBits()); 4568 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4569 MMO->isNonTemporal(), MMO->isInvariant())); 4570 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4571 void *IP = 0; 4572 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4573 cast<StoreSDNode>(E)->refineAlignment(MMO); 4574 return SDValue(E, 0); 4575 } 4576 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4577 dl.getDebugLoc(), VTs, 4578 ISD::UNINDEXED, false, VT, MMO); 4579 CSEMap.InsertNode(N, IP); 4580 AllNodes.push_back(N); 4581 return SDValue(N, 0); 4582} 4583 4584SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, 4585 SDValue Ptr, MachinePointerInfo PtrInfo, 4586 EVT SVT,bool isVolatile, bool isNonTemporal, 4587 unsigned Alignment, 4588 const MDNode *TBAAInfo) { 4589 assert(Chain.getValueType() == MVT::Other && 4590 "Invalid chain type"); 4591 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4592 Alignment = getEVTAlignment(SVT); 4593 4594 unsigned Flags = MachineMemOperand::MOStore; 4595 if (isVolatile) 4596 Flags |= MachineMemOperand::MOVolatile; 4597 if (isNonTemporal) 4598 Flags |= MachineMemOperand::MONonTemporal; 4599 4600 if (PtrInfo.V == 0) 4601 PtrInfo = InferPointerInfo(Ptr); 4602 4603 MachineFunction &MF = getMachineFunction(); 4604 MachineMemOperand *MMO = 4605 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4606 TBAAInfo); 4607 4608 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4609} 4610 4611SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, 4612 SDValue Ptr, EVT SVT, 4613 MachineMemOperand *MMO) { 4614 EVT VT = Val.getValueType(); 4615 4616 assert(Chain.getValueType() == MVT::Other && 4617 "Invalid chain type"); 4618 if (VT == SVT) 4619 return getStore(Chain, dl, Val, Ptr, MMO); 4620 4621 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4622 "Should only be a truncating store, not extending!"); 4623 assert(VT.isInteger() == SVT.isInteger() && 4624 "Can't do FP-INT conversion!"); 4625 assert(VT.isVector() == SVT.isVector() && 4626 "Cannot use trunc store to convert to or from a vector!"); 4627 assert((!VT.isVector() || 4628 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4629 "Cannot use trunc store to change the number of vector elements!"); 4630 4631 SDVTList VTs = getVTList(MVT::Other); 4632 SDValue Undef = getUNDEF(Ptr.getValueType()); 4633 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4634 FoldingSetNodeID ID; 4635 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4636 ID.AddInteger(SVT.getRawBits()); 4637 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4638 MMO->isNonTemporal(), MMO->isInvariant())); 4639 ID.AddInteger(MMO->getPointerInfo().getAddrSpace()); 4640 void *IP = 0; 4641 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4642 cast<StoreSDNode>(E)->refineAlignment(MMO); 4643 return SDValue(E, 0); 4644 } 4645 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4646 dl.getDebugLoc(), VTs, 4647 ISD::UNINDEXED, true, SVT, MMO); 4648 CSEMap.InsertNode(N, IP); 4649 AllNodes.push_back(N); 4650 return SDValue(N, 0); 4651} 4652 4653SDValue 4654SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base, 4655 SDValue Offset, ISD::MemIndexedMode AM) { 4656 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4657 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4658 "Store is already a indexed store!"); 4659 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4660 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4661 FoldingSetNodeID ID; 4662 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4663 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4664 ID.AddInteger(ST->getRawSubclassData()); 4665 ID.AddInteger(ST->getPointerInfo().getAddrSpace()); 4666 void *IP = 0; 4667 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4668 return SDValue(E, 0); 4669 4670 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(), 4671 dl.getDebugLoc(), VTs, AM, 4672 ST->isTruncatingStore(), 4673 ST->getMemoryVT(), 4674 ST->getMemOperand()); 4675 CSEMap.InsertNode(N, IP); 4676 AllNodes.push_back(N); 4677 return SDValue(N, 0); 4678} 4679 4680SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl, 4681 SDValue Chain, SDValue Ptr, 4682 SDValue SV, 4683 unsigned Align) { 4684 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4685 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4686} 4687 4688SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 4689 const SDUse *Ops, unsigned NumOps) { 4690 switch (NumOps) { 4691 case 0: return getNode(Opcode, DL, VT); 4692 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4693 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4694 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4695 default: break; 4696 } 4697 4698 // Copy from an SDUse array into an SDValue array for use with 4699 // the regular getNode logic. 4700 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4701 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4702} 4703 4704SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, 4705 const SDValue *Ops, unsigned NumOps) { 4706 switch (NumOps) { 4707 case 0: return getNode(Opcode, DL, VT); 4708 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4709 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4710 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4711 default: break; 4712 } 4713 4714 switch (Opcode) { 4715 default: break; 4716 case ISD::SELECT_CC: { 4717 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4718 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4719 "LHS and RHS of condition must have same type!"); 4720 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4721 "True and False arms of SelectCC must have same type!"); 4722 assert(Ops[2].getValueType() == VT && 4723 "select_cc node must be of same type as true and false value!"); 4724 break; 4725 } 4726 case ISD::BR_CC: { 4727 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4728 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4729 "LHS/RHS of comparison should match types!"); 4730 break; 4731 } 4732 } 4733 4734 // Memoize nodes. 4735 SDNode *N; 4736 SDVTList VTs = getVTList(VT); 4737 4738 if (VT != MVT::Glue) { 4739 FoldingSetNodeID ID; 4740 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4741 void *IP = 0; 4742 4743 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4744 return SDValue(E, 0); 4745 4746 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4747 VTs, Ops, NumOps); 4748 CSEMap.InsertNode(N, IP); 4749 } else { 4750 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4751 VTs, Ops, NumOps); 4752 } 4753 4754 AllNodes.push_back(N); 4755#ifndef NDEBUG 4756 VerifySDNode(N); 4757#endif 4758 return SDValue(N, 0); 4759} 4760 4761SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 4762 ArrayRef<EVT> ResultTys, 4763 const SDValue *Ops, unsigned NumOps) { 4764 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4765 Ops, NumOps); 4766} 4767 4768SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, 4769 const EVT *VTs, unsigned NumVTs, 4770 const SDValue *Ops, unsigned NumOps) { 4771 if (NumVTs == 1) 4772 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4773 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4774} 4775 4776SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4777 const SDValue *Ops, unsigned NumOps) { 4778 if (VTList.NumVTs == 1) 4779 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4780 4781#if 0 4782 switch (Opcode) { 4783 // FIXME: figure out how to safely handle things like 4784 // int foo(int x) { return 1 << (x & 255); } 4785 // int bar() { return foo(256); } 4786 case ISD::SRA_PARTS: 4787 case ISD::SRL_PARTS: 4788 case ISD::SHL_PARTS: 4789 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4790 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4791 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4792 else if (N3.getOpcode() == ISD::AND) 4793 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4794 // If the and is only masking out bits that cannot effect the shift, 4795 // eliminate the and. 4796 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4797 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4798 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4799 } 4800 break; 4801 } 4802#endif 4803 4804 // Memoize the node unless it returns a flag. 4805 SDNode *N; 4806 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4807 FoldingSetNodeID ID; 4808 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4809 void *IP = 0; 4810 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4811 return SDValue(E, 0); 4812 4813 if (NumOps == 1) { 4814 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 4815 DL.getDebugLoc(), VTList, Ops[0]); 4816 } else if (NumOps == 2) { 4817 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 4818 DL.getDebugLoc(), VTList, Ops[0], 4819 Ops[1]); 4820 } else if (NumOps == 3) { 4821 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 4822 DL.getDebugLoc(), VTList, Ops[0], 4823 Ops[1], Ops[2]); 4824 } else { 4825 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4826 VTList, Ops, NumOps); 4827 } 4828 CSEMap.InsertNode(N, IP); 4829 } else { 4830 if (NumOps == 1) { 4831 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(), 4832 DL.getDebugLoc(), VTList, Ops[0]); 4833 } else if (NumOps == 2) { 4834 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(), 4835 DL.getDebugLoc(), VTList, Ops[0], 4836 Ops[1]); 4837 } else if (NumOps == 3) { 4838 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(), 4839 DL.getDebugLoc(), VTList, Ops[0], 4840 Ops[1], Ops[2]); 4841 } else { 4842 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), 4843 VTList, Ops, NumOps); 4844 } 4845 } 4846 AllNodes.push_back(N); 4847#ifndef NDEBUG 4848 VerifySDNode(N); 4849#endif 4850 return SDValue(N, 0); 4851} 4852 4853SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) { 4854 return getNode(Opcode, DL, VTList, 0, 0); 4855} 4856 4857SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4858 SDValue N1) { 4859 SDValue Ops[] = { N1 }; 4860 return getNode(Opcode, DL, VTList, Ops, 1); 4861} 4862 4863SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4864 SDValue N1, SDValue N2) { 4865 SDValue Ops[] = { N1, N2 }; 4866 return getNode(Opcode, DL, VTList, Ops, 2); 4867} 4868 4869SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4870 SDValue N1, SDValue N2, SDValue N3) { 4871 SDValue Ops[] = { N1, N2, N3 }; 4872 return getNode(Opcode, DL, VTList, Ops, 3); 4873} 4874 4875SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4876 SDValue N1, SDValue N2, SDValue N3, 4877 SDValue N4) { 4878 SDValue Ops[] = { N1, N2, N3, N4 }; 4879 return getNode(Opcode, DL, VTList, Ops, 4); 4880} 4881 4882SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, 4883 SDValue N1, SDValue N2, SDValue N3, 4884 SDValue N4, SDValue N5) { 4885 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4886 return getNode(Opcode, DL, VTList, Ops, 5); 4887} 4888 4889SDVTList SelectionDAG::getVTList(EVT VT) { 4890 return makeVTList(SDNode::getValueTypeList(VT), 1); 4891} 4892 4893SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4894 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4895 E = VTList.rend(); I != E; ++I) 4896 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4897 return *I; 4898 4899 EVT *Array = Allocator.Allocate<EVT>(2); 4900 Array[0] = VT1; 4901 Array[1] = VT2; 4902 SDVTList Result = makeVTList(Array, 2); 4903 VTList.push_back(Result); 4904 return Result; 4905} 4906 4907SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4908 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4909 E = VTList.rend(); I != E; ++I) 4910 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4911 I->VTs[2] == VT3) 4912 return *I; 4913 4914 EVT *Array = Allocator.Allocate<EVT>(3); 4915 Array[0] = VT1; 4916 Array[1] = VT2; 4917 Array[2] = VT3; 4918 SDVTList Result = makeVTList(Array, 3); 4919 VTList.push_back(Result); 4920 return Result; 4921} 4922 4923SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4924 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4925 E = VTList.rend(); I != E; ++I) 4926 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4927 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4928 return *I; 4929 4930 EVT *Array = Allocator.Allocate<EVT>(4); 4931 Array[0] = VT1; 4932 Array[1] = VT2; 4933 Array[2] = VT3; 4934 Array[3] = VT4; 4935 SDVTList Result = makeVTList(Array, 4); 4936 VTList.push_back(Result); 4937 return Result; 4938} 4939 4940SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4941 switch (NumVTs) { 4942 case 0: llvm_unreachable("Cannot have nodes without results!"); 4943 case 1: return getVTList(VTs[0]); 4944 case 2: return getVTList(VTs[0], VTs[1]); 4945 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4946 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4947 default: break; 4948 } 4949 4950 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4951 E = VTList.rend(); I != E; ++I) { 4952 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4953 continue; 4954 4955 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2])) 4956 return *I; 4957 } 4958 4959 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4960 std::copy(VTs, VTs+NumVTs, Array); 4961 SDVTList Result = makeVTList(Array, NumVTs); 4962 VTList.push_back(Result); 4963 return Result; 4964} 4965 4966 4967/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4968/// specified operands. If the resultant node already exists in the DAG, 4969/// this does not modify the specified node, instead it returns the node that 4970/// already exists. If the resultant node does not exist in the DAG, the 4971/// input node is returned. As a degenerate case, if you specify the same 4972/// input operands as the node already has, the input node is returned. 4973SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4974 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4975 4976 // Check to see if there is no change. 4977 if (Op == N->getOperand(0)) return N; 4978 4979 // See if the modified node already exists. 4980 void *InsertPos = 0; 4981 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4982 return Existing; 4983 4984 // Nope it doesn't. Remove the node from its current place in the maps. 4985 if (InsertPos) 4986 if (!RemoveNodeFromCSEMaps(N)) 4987 InsertPos = 0; 4988 4989 // Now we update the operands. 4990 N->OperandList[0].set(Op); 4991 4992 // If this gets put into a CSE map, add it. 4993 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4994 return N; 4995} 4996 4997SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4998 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4999 5000 // Check to see if there is no change. 5001 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 5002 return N; // No operands changed, just return the input node. 5003 5004 // See if the modified node already exists. 5005 void *InsertPos = 0; 5006 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 5007 return Existing; 5008 5009 // Nope it doesn't. Remove the node from its current place in the maps. 5010 if (InsertPos) 5011 if (!RemoveNodeFromCSEMaps(N)) 5012 InsertPos = 0; 5013 5014 // Now we update the operands. 5015 if (N->OperandList[0] != Op1) 5016 N->OperandList[0].set(Op1); 5017 if (N->OperandList[1] != Op2) 5018 N->OperandList[1].set(Op2); 5019 5020 // If this gets put into a CSE map, add it. 5021 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5022 return N; 5023} 5024 5025SDNode *SelectionDAG:: 5026UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 5027 SDValue Ops[] = { Op1, Op2, Op3 }; 5028 return UpdateNodeOperands(N, Ops, 3); 5029} 5030 5031SDNode *SelectionDAG:: 5032UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 5033 SDValue Op3, SDValue Op4) { 5034 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 5035 return UpdateNodeOperands(N, Ops, 4); 5036} 5037 5038SDNode *SelectionDAG:: 5039UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 5040 SDValue Op3, SDValue Op4, SDValue Op5) { 5041 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 5042 return UpdateNodeOperands(N, Ops, 5); 5043} 5044 5045SDNode *SelectionDAG:: 5046UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 5047 assert(N->getNumOperands() == NumOps && 5048 "Update with wrong number of operands"); 5049 5050 // Check to see if there is no change. 5051 bool AnyChange = false; 5052 for (unsigned i = 0; i != NumOps; ++i) { 5053 if (Ops[i] != N->getOperand(i)) { 5054 AnyChange = true; 5055 break; 5056 } 5057 } 5058 5059 // No operands changed, just return the input node. 5060 if (!AnyChange) return N; 5061 5062 // See if the modified node already exists. 5063 void *InsertPos = 0; 5064 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 5065 return Existing; 5066 5067 // Nope it doesn't. Remove the node from its current place in the maps. 5068 if (InsertPos) 5069 if (!RemoveNodeFromCSEMaps(N)) 5070 InsertPos = 0; 5071 5072 // Now we update the operands. 5073 for (unsigned i = 0; i != NumOps; ++i) 5074 if (N->OperandList[i] != Ops[i]) 5075 N->OperandList[i].set(Ops[i]); 5076 5077 // If this gets put into a CSE map, add it. 5078 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 5079 return N; 5080} 5081 5082/// DropOperands - Release the operands and set this node to have 5083/// zero operands. 5084void SDNode::DropOperands() { 5085 // Unlike the code in MorphNodeTo that does this, we don't need to 5086 // watch for dead nodes here. 5087 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 5088 SDUse &Use = *I++; 5089 Use.set(SDValue()); 5090 } 5091} 5092 5093/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 5094/// machine opcode. 5095/// 5096SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5097 EVT VT) { 5098 SDVTList VTs = getVTList(VT); 5099 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 5100} 5101 5102SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5103 EVT VT, SDValue Op1) { 5104 SDVTList VTs = getVTList(VT); 5105 SDValue Ops[] = { Op1 }; 5106 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5107} 5108 5109SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5110 EVT VT, SDValue Op1, 5111 SDValue Op2) { 5112 SDVTList VTs = getVTList(VT); 5113 SDValue Ops[] = { Op1, Op2 }; 5114 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5115} 5116 5117SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5118 EVT VT, SDValue Op1, 5119 SDValue Op2, SDValue Op3) { 5120 SDVTList VTs = getVTList(VT); 5121 SDValue Ops[] = { Op1, Op2, Op3 }; 5122 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5123} 5124 5125SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5126 EVT VT, const SDValue *Ops, 5127 unsigned NumOps) { 5128 SDVTList VTs = getVTList(VT); 5129 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5130} 5131 5132SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5133 EVT VT1, EVT VT2, const SDValue *Ops, 5134 unsigned NumOps) { 5135 SDVTList VTs = getVTList(VT1, VT2); 5136 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5137} 5138 5139SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5140 EVT VT1, EVT VT2) { 5141 SDVTList VTs = getVTList(VT1, VT2); 5142 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 5143} 5144 5145SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5146 EVT VT1, EVT VT2, EVT VT3, 5147 const SDValue *Ops, unsigned NumOps) { 5148 SDVTList VTs = getVTList(VT1, VT2, VT3); 5149 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5150} 5151 5152SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5153 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 5154 const SDValue *Ops, unsigned NumOps) { 5155 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5156 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 5157} 5158 5159SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5160 EVT VT1, EVT VT2, 5161 SDValue Op1) { 5162 SDVTList VTs = getVTList(VT1, VT2); 5163 SDValue Ops[] = { Op1 }; 5164 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 5165} 5166 5167SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5168 EVT VT1, EVT VT2, 5169 SDValue Op1, SDValue Op2) { 5170 SDVTList VTs = getVTList(VT1, VT2); 5171 SDValue Ops[] = { Op1, Op2 }; 5172 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 5173} 5174 5175SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5176 EVT VT1, EVT VT2, 5177 SDValue Op1, SDValue Op2, 5178 SDValue Op3) { 5179 SDVTList VTs = getVTList(VT1, VT2); 5180 SDValue Ops[] = { Op1, Op2, Op3 }; 5181 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5182} 5183 5184SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5185 EVT VT1, EVT VT2, EVT VT3, 5186 SDValue Op1, SDValue Op2, 5187 SDValue Op3) { 5188 SDVTList VTs = getVTList(VT1, VT2, VT3); 5189 SDValue Ops[] = { Op1, Op2, Op3 }; 5190 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 5191} 5192 5193SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 5194 SDVTList VTs, const SDValue *Ops, 5195 unsigned NumOps) { 5196 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 5197 // Reset the NodeID to -1. 5198 N->setNodeId(-1); 5199 return N; 5200} 5201 5202/// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away 5203/// the line number information on the merged node since it is not possible to 5204/// preserve the information that operation is associated with multiple lines. 5205/// This will make the debugger working better at -O0, were there is a higher 5206/// probability having other instructions associated with that line. 5207/// 5208/// For IROrder, we keep the smaller of the two 5209SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) { 5210 DebugLoc NLoc = N->getDebugLoc(); 5211 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && 5212 (OLoc.getDebugLoc() != NLoc)) { 5213 N->setDebugLoc(DebugLoc()); 5214 } 5215 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder()); 5216 N->setIROrder(Order); 5217 return N; 5218} 5219 5220/// MorphNodeTo - This *mutates* the specified node to have the specified 5221/// return type, opcode, and operands. 5222/// 5223/// Note that MorphNodeTo returns the resultant node. If there is already a 5224/// node of the specified opcode and operands, it returns that node instead of 5225/// the current one. Note that the SDLoc need not be the same. 5226/// 5227/// Using MorphNodeTo is faster than creating a new node and swapping it in 5228/// with ReplaceAllUsesWith both because it often avoids allocating a new 5229/// node, and because it doesn't require CSE recalculation for any of 5230/// the node's users. 5231/// 5232SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 5233 SDVTList VTs, const SDValue *Ops, 5234 unsigned NumOps) { 5235 // If an identical node already exists, use it. 5236 void *IP = 0; 5237 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 5238 FoldingSetNodeID ID; 5239 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 5240 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 5241 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N)); 5242 } 5243 5244 if (!RemoveNodeFromCSEMaps(N)) 5245 IP = 0; 5246 5247 // Start the morphing. 5248 N->NodeType = Opc; 5249 N->ValueList = VTs.VTs; 5250 N->NumValues = VTs.NumVTs; 5251 5252 // Clear the operands list, updating used nodes to remove this from their 5253 // use list. Keep track of any operands that become dead as a result. 5254 SmallPtrSet<SDNode*, 16> DeadNodeSet; 5255 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 5256 SDUse &Use = *I++; 5257 SDNode *Used = Use.getNode(); 5258 Use.set(SDValue()); 5259 if (Used->use_empty()) 5260 DeadNodeSet.insert(Used); 5261 } 5262 5263 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 5264 // Initialize the memory references information. 5265 MN->setMemRefs(0, 0); 5266 // If NumOps is larger than the # of operands we can have in a 5267 // MachineSDNode, reallocate the operand list. 5268 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 5269 if (MN->OperandsNeedDelete) 5270 delete[] MN->OperandList; 5271 if (NumOps > array_lengthof(MN->LocalOperands)) 5272 // We're creating a final node that will live unmorphed for the 5273 // remainder of the current SelectionDAG iteration, so we can allocate 5274 // the operands directly out of a pool with no recycling metadata. 5275 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5276 Ops, NumOps); 5277 else 5278 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5279 MN->OperandsNeedDelete = false; 5280 } else 5281 MN->InitOperands(MN->OperandList, Ops, NumOps); 5282 } else { 5283 // If NumOps is larger than the # of operands we currently have, reallocate 5284 // the operand list. 5285 if (NumOps > N->NumOperands) { 5286 if (N->OperandsNeedDelete) 5287 delete[] N->OperandList; 5288 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5289 N->OperandsNeedDelete = true; 5290 } else 5291 N->InitOperands(N->OperandList, Ops, NumOps); 5292 } 5293 5294 // Delete any nodes that are still dead after adding the uses for the 5295 // new operands. 5296 if (!DeadNodeSet.empty()) { 5297 SmallVector<SDNode *, 16> DeadNodes; 5298 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5299 E = DeadNodeSet.end(); I != E; ++I) 5300 if ((*I)->use_empty()) 5301 DeadNodes.push_back(*I); 5302 RemoveDeadNodes(DeadNodes); 5303 } 5304 5305 if (IP) 5306 CSEMap.InsertNode(N, IP); // Memoize the new node. 5307 return N; 5308} 5309 5310 5311/// getMachineNode - These are used for target selectors to create a new node 5312/// with specified return type(s), MachineInstr opcode, and operands. 5313/// 5314/// Note that getMachineNode returns the resultant node. If there is already a 5315/// node of the specified opcode and operands, it returns that node instead of 5316/// the current one. 5317MachineSDNode * 5318SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) { 5319 SDVTList VTs = getVTList(VT); 5320 return getMachineNode(Opcode, dl, VTs, None); 5321} 5322 5323MachineSDNode * 5324SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) { 5325 SDVTList VTs = getVTList(VT); 5326 SDValue Ops[] = { Op1 }; 5327 return getMachineNode(Opcode, dl, VTs, Ops); 5328} 5329 5330MachineSDNode * 5331SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5332 SDValue Op1, SDValue Op2) { 5333 SDVTList VTs = getVTList(VT); 5334 SDValue Ops[] = { Op1, Op2 }; 5335 return getMachineNode(Opcode, dl, VTs, Ops); 5336} 5337 5338MachineSDNode * 5339SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5340 SDValue Op1, SDValue Op2, SDValue Op3) { 5341 SDVTList VTs = getVTList(VT); 5342 SDValue Ops[] = { Op1, Op2, Op3 }; 5343 return getMachineNode(Opcode, dl, VTs, Ops); 5344} 5345 5346MachineSDNode * 5347SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, 5348 ArrayRef<SDValue> Ops) { 5349 SDVTList VTs = getVTList(VT); 5350 return getMachineNode(Opcode, dl, VTs, Ops); 5351} 5352 5353MachineSDNode * 5354SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) { 5355 SDVTList VTs = getVTList(VT1, VT2); 5356 return getMachineNode(Opcode, dl, VTs, None); 5357} 5358 5359MachineSDNode * 5360SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5361 EVT VT1, EVT VT2, SDValue Op1) { 5362 SDVTList VTs = getVTList(VT1, VT2); 5363 SDValue Ops[] = { Op1 }; 5364 return getMachineNode(Opcode, dl, VTs, Ops); 5365} 5366 5367MachineSDNode * 5368SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5369 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5370 SDVTList VTs = getVTList(VT1, VT2); 5371 SDValue Ops[] = { Op1, Op2 }; 5372 return getMachineNode(Opcode, dl, VTs, Ops); 5373} 5374 5375MachineSDNode * 5376SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5377 EVT VT1, EVT VT2, SDValue Op1, 5378 SDValue Op2, SDValue Op3) { 5379 SDVTList VTs = getVTList(VT1, VT2); 5380 SDValue Ops[] = { Op1, Op2, Op3 }; 5381 return getMachineNode(Opcode, dl, VTs, Ops); 5382} 5383 5384MachineSDNode * 5385SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5386 EVT VT1, EVT VT2, 5387 ArrayRef<SDValue> Ops) { 5388 SDVTList VTs = getVTList(VT1, VT2); 5389 return getMachineNode(Opcode, dl, VTs, Ops); 5390} 5391 5392MachineSDNode * 5393SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5394 EVT VT1, EVT VT2, EVT VT3, 5395 SDValue Op1, SDValue Op2) { 5396 SDVTList VTs = getVTList(VT1, VT2, VT3); 5397 SDValue Ops[] = { Op1, Op2 }; 5398 return getMachineNode(Opcode, dl, VTs, Ops); 5399} 5400 5401MachineSDNode * 5402SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5403 EVT VT1, EVT VT2, EVT VT3, 5404 SDValue Op1, SDValue Op2, SDValue Op3) { 5405 SDVTList VTs = getVTList(VT1, VT2, VT3); 5406 SDValue Ops[] = { Op1, Op2, Op3 }; 5407 return getMachineNode(Opcode, dl, VTs, Ops); 5408} 5409 5410MachineSDNode * 5411SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5412 EVT VT1, EVT VT2, EVT VT3, 5413 ArrayRef<SDValue> Ops) { 5414 SDVTList VTs = getVTList(VT1, VT2, VT3); 5415 return getMachineNode(Opcode, dl, VTs, Ops); 5416} 5417 5418MachineSDNode * 5419SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, 5420 EVT VT2, EVT VT3, EVT VT4, 5421 ArrayRef<SDValue> Ops) { 5422 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5423 return getMachineNode(Opcode, dl, VTs, Ops); 5424} 5425 5426MachineSDNode * 5427SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, 5428 ArrayRef<EVT> ResultTys, 5429 ArrayRef<SDValue> Ops) { 5430 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5431 return getMachineNode(Opcode, dl, VTs, Ops); 5432} 5433 5434MachineSDNode * 5435SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs, 5436 ArrayRef<SDValue> OpsArray) { 5437 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5438 MachineSDNode *N; 5439 void *IP = 0; 5440 const SDValue *Ops = OpsArray.data(); 5441 unsigned NumOps = OpsArray.size(); 5442 5443 if (DoCSE) { 5444 FoldingSetNodeID ID; 5445 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5446 IP = 0; 5447 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5448 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL)); 5449 } 5450 } 5451 5452 // Allocate a new MachineSDNode. 5453 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(), 5454 DL.getDebugLoc(), VTs); 5455 5456 // Initialize the operands list. 5457 if (NumOps > array_lengthof(N->LocalOperands)) 5458 // We're creating a final node that will live unmorphed for the 5459 // remainder of the current SelectionDAG iteration, so we can allocate 5460 // the operands directly out of a pool with no recycling metadata. 5461 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5462 Ops, NumOps); 5463 else 5464 N->InitOperands(N->LocalOperands, Ops, NumOps); 5465 N->OperandsNeedDelete = false; 5466 5467 if (DoCSE) 5468 CSEMap.InsertNode(N, IP); 5469 5470 AllNodes.push_back(N); 5471#ifndef NDEBUG 5472 VerifyMachineNode(N); 5473#endif 5474 return N; 5475} 5476 5477/// getTargetExtractSubreg - A convenience function for creating 5478/// TargetOpcode::EXTRACT_SUBREG nodes. 5479SDValue 5480SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, 5481 SDValue Operand) { 5482 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5483 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5484 VT, Operand, SRIdxVal); 5485 return SDValue(Subreg, 0); 5486} 5487 5488/// getTargetInsertSubreg - A convenience function for creating 5489/// TargetOpcode::INSERT_SUBREG nodes. 5490SDValue 5491SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, 5492 SDValue Operand, SDValue Subreg) { 5493 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5494 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5495 VT, Operand, Subreg, SRIdxVal); 5496 return SDValue(Result, 0); 5497} 5498 5499/// getNodeIfExists - Get the specified node if it's already available, or 5500/// else return NULL. 5501SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5502 const SDValue *Ops, unsigned NumOps) { 5503 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5504 FoldingSetNodeID ID; 5505 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5506 void *IP = 0; 5507 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5508 return E; 5509 } 5510 return NULL; 5511} 5512 5513/// getDbgValue - Creates a SDDbgValue node. 5514/// 5515SDDbgValue * 5516SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5517 DebugLoc DL, unsigned O) { 5518 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5519} 5520 5521SDDbgValue * 5522SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5523 DebugLoc DL, unsigned O) { 5524 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5525} 5526 5527SDDbgValue * 5528SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5529 DebugLoc DL, unsigned O) { 5530 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5531} 5532 5533namespace { 5534 5535/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5536/// pointed to by a use iterator is deleted, increment the use iterator 5537/// so that it doesn't dangle. 5538/// 5539class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5540 SDNode::use_iterator &UI; 5541 SDNode::use_iterator &UE; 5542 5543 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5544 // Increment the iterator as needed. 5545 while (UI != UE && N == *UI) 5546 ++UI; 5547 } 5548 5549public: 5550 RAUWUpdateListener(SelectionDAG &d, 5551 SDNode::use_iterator &ui, 5552 SDNode::use_iterator &ue) 5553 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {} 5554}; 5555 5556} 5557 5558/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5559/// This can cause recursive merging of nodes in the DAG. 5560/// 5561/// This version assumes From has a single result value. 5562/// 5563void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) { 5564 SDNode *From = FromN.getNode(); 5565 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5566 "Cannot replace with this method!"); 5567 assert(From != To.getNode() && "Cannot replace uses of with self"); 5568 5569 // Iterate over all the existing uses of From. New uses will be added 5570 // to the beginning of the use list, which we avoid visiting. 5571 // This specifically avoids visiting uses of From that arise while the 5572 // replacement is happening, because any such uses would be the result 5573 // of CSE: If an existing node looks like From after one of its operands 5574 // is replaced by To, we don't want to replace of all its users with To 5575 // too. See PR3018 for more info. 5576 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5577 RAUWUpdateListener Listener(*this, UI, UE); 5578 while (UI != UE) { 5579 SDNode *User = *UI; 5580 5581 // This node is about to morph, remove its old self from the CSE maps. 5582 RemoveNodeFromCSEMaps(User); 5583 5584 // A user can appear in a use list multiple times, and when this 5585 // happens the uses are usually next to each other in the list. 5586 // To help reduce the number of CSE recomputations, process all 5587 // the uses of this user that we can find this way. 5588 do { 5589 SDUse &Use = UI.getUse(); 5590 ++UI; 5591 Use.set(To); 5592 } while (UI != UE && *UI == User); 5593 5594 // Now that we have modified User, add it back to the CSE maps. If it 5595 // already exists there, recursively merge the results together. 5596 AddModifiedNodeToCSEMaps(User); 5597 } 5598 5599 // If we just RAUW'd the root, take note. 5600 if (FromN == getRoot()) 5601 setRoot(To); 5602} 5603 5604/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5605/// This can cause recursive merging of nodes in the DAG. 5606/// 5607/// This version assumes that for each value of From, there is a 5608/// corresponding value in To in the same position with the same type. 5609/// 5610void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) { 5611#ifndef NDEBUG 5612 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5613 assert((!From->hasAnyUseOfValue(i) || 5614 From->getValueType(i) == To->getValueType(i)) && 5615 "Cannot use this version of ReplaceAllUsesWith!"); 5616#endif 5617 5618 // Handle the trivial case. 5619 if (From == To) 5620 return; 5621 5622 // Iterate over just the existing users of From. See the comments in 5623 // the ReplaceAllUsesWith above. 5624 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5625 RAUWUpdateListener Listener(*this, UI, UE); 5626 while (UI != UE) { 5627 SDNode *User = *UI; 5628 5629 // This node is about to morph, remove its old self from the CSE maps. 5630 RemoveNodeFromCSEMaps(User); 5631 5632 // A user can appear in a use list multiple times, and when this 5633 // happens the uses are usually next to each other in the list. 5634 // To help reduce the number of CSE recomputations, process all 5635 // the uses of this user that we can find this way. 5636 do { 5637 SDUse &Use = UI.getUse(); 5638 ++UI; 5639 Use.setNode(To); 5640 } while (UI != UE && *UI == User); 5641 5642 // Now that we have modified User, add it back to the CSE maps. If it 5643 // already exists there, recursively merge the results together. 5644 AddModifiedNodeToCSEMaps(User); 5645 } 5646 5647 // If we just RAUW'd the root, take note. 5648 if (From == getRoot().getNode()) 5649 setRoot(SDValue(To, getRoot().getResNo())); 5650} 5651 5652/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5653/// This can cause recursive merging of nodes in the DAG. 5654/// 5655/// This version can replace From with any result values. To must match the 5656/// number and types of values returned by From. 5657void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) { 5658 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5659 return ReplaceAllUsesWith(SDValue(From, 0), To[0]); 5660 5661 // Iterate over just the existing users of From. See the comments in 5662 // the ReplaceAllUsesWith above. 5663 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5664 RAUWUpdateListener Listener(*this, UI, UE); 5665 while (UI != UE) { 5666 SDNode *User = *UI; 5667 5668 // This node is about to morph, remove its old self from the CSE maps. 5669 RemoveNodeFromCSEMaps(User); 5670 5671 // A user can appear in a use list multiple times, and when this 5672 // happens the uses are usually next to each other in the list. 5673 // To help reduce the number of CSE recomputations, process all 5674 // the uses of this user that we can find this way. 5675 do { 5676 SDUse &Use = UI.getUse(); 5677 const SDValue &ToOp = To[Use.getResNo()]; 5678 ++UI; 5679 Use.set(ToOp); 5680 } while (UI != UE && *UI == User); 5681 5682 // Now that we have modified User, add it back to the CSE maps. If it 5683 // already exists there, recursively merge the results together. 5684 AddModifiedNodeToCSEMaps(User); 5685 } 5686 5687 // If we just RAUW'd the root, take note. 5688 if (From == getRoot().getNode()) 5689 setRoot(SDValue(To[getRoot().getResNo()])); 5690} 5691 5692/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5693/// uses of other values produced by From.getNode() alone. The Deleted 5694/// vector is handled the same way as for ReplaceAllUsesWith. 5695void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){ 5696 // Handle the really simple, really trivial case efficiently. 5697 if (From == To) return; 5698 5699 // Handle the simple, trivial, case efficiently. 5700 if (From.getNode()->getNumValues() == 1) { 5701 ReplaceAllUsesWith(From, To); 5702 return; 5703 } 5704 5705 // Iterate over just the existing users of From. See the comments in 5706 // the ReplaceAllUsesWith above. 5707 SDNode::use_iterator UI = From.getNode()->use_begin(), 5708 UE = From.getNode()->use_end(); 5709 RAUWUpdateListener Listener(*this, UI, UE); 5710 while (UI != UE) { 5711 SDNode *User = *UI; 5712 bool UserRemovedFromCSEMaps = false; 5713 5714 // A user can appear in a use list multiple times, and when this 5715 // happens the uses are usually next to each other in the list. 5716 // To help reduce the number of CSE recomputations, process all 5717 // the uses of this user that we can find this way. 5718 do { 5719 SDUse &Use = UI.getUse(); 5720 5721 // Skip uses of different values from the same node. 5722 if (Use.getResNo() != From.getResNo()) { 5723 ++UI; 5724 continue; 5725 } 5726 5727 // If this node hasn't been modified yet, it's still in the CSE maps, 5728 // so remove its old self from the CSE maps. 5729 if (!UserRemovedFromCSEMaps) { 5730 RemoveNodeFromCSEMaps(User); 5731 UserRemovedFromCSEMaps = true; 5732 } 5733 5734 ++UI; 5735 Use.set(To); 5736 } while (UI != UE && *UI == User); 5737 5738 // We are iterating over all uses of the From node, so if a use 5739 // doesn't use the specific value, no changes are made. 5740 if (!UserRemovedFromCSEMaps) 5741 continue; 5742 5743 // Now that we have modified User, add it back to the CSE maps. If it 5744 // already exists there, recursively merge the results together. 5745 AddModifiedNodeToCSEMaps(User); 5746 } 5747 5748 // If we just RAUW'd the root, take note. 5749 if (From == getRoot()) 5750 setRoot(To); 5751} 5752 5753namespace { 5754 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5755 /// to record information about a use. 5756 struct UseMemo { 5757 SDNode *User; 5758 unsigned Index; 5759 SDUse *Use; 5760 }; 5761 5762 /// operator< - Sort Memos by User. 5763 bool operator<(const UseMemo &L, const UseMemo &R) { 5764 return (intptr_t)L.User < (intptr_t)R.User; 5765 } 5766} 5767 5768/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5769/// uses of other values produced by From.getNode() alone. The same value 5770/// may appear in both the From and To list. The Deleted vector is 5771/// handled the same way as for ReplaceAllUsesWith. 5772void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5773 const SDValue *To, 5774 unsigned Num){ 5775 // Handle the simple, trivial case efficiently. 5776 if (Num == 1) 5777 return ReplaceAllUsesOfValueWith(*From, *To); 5778 5779 // Read up all the uses and make records of them. This helps 5780 // processing new uses that are introduced during the 5781 // replacement process. 5782 SmallVector<UseMemo, 4> Uses; 5783 for (unsigned i = 0; i != Num; ++i) { 5784 unsigned FromResNo = From[i].getResNo(); 5785 SDNode *FromNode = From[i].getNode(); 5786 for (SDNode::use_iterator UI = FromNode->use_begin(), 5787 E = FromNode->use_end(); UI != E; ++UI) { 5788 SDUse &Use = UI.getUse(); 5789 if (Use.getResNo() == FromResNo) { 5790 UseMemo Memo = { *UI, i, &Use }; 5791 Uses.push_back(Memo); 5792 } 5793 } 5794 } 5795 5796 // Sort the uses, so that all the uses from a given User are together. 5797 std::sort(Uses.begin(), Uses.end()); 5798 5799 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5800 UseIndex != UseIndexEnd; ) { 5801 // We know that this user uses some value of From. If it is the right 5802 // value, update it. 5803 SDNode *User = Uses[UseIndex].User; 5804 5805 // This node is about to morph, remove its old self from the CSE maps. 5806 RemoveNodeFromCSEMaps(User); 5807 5808 // The Uses array is sorted, so all the uses for a given User 5809 // are next to each other in the list. 5810 // To help reduce the number of CSE recomputations, process all 5811 // the uses of this user that we can find this way. 5812 do { 5813 unsigned i = Uses[UseIndex].Index; 5814 SDUse &Use = *Uses[UseIndex].Use; 5815 ++UseIndex; 5816 5817 Use.set(To[i]); 5818 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5819 5820 // Now that we have modified User, add it back to the CSE maps. If it 5821 // already exists there, recursively merge the results together. 5822 AddModifiedNodeToCSEMaps(User); 5823 } 5824} 5825 5826/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5827/// based on their topological order. It returns the maximum id and a vector 5828/// of the SDNodes* in assigned order by reference. 5829unsigned SelectionDAG::AssignTopologicalOrder() { 5830 5831 unsigned DAGSize = 0; 5832 5833 // SortedPos tracks the progress of the algorithm. Nodes before it are 5834 // sorted, nodes after it are unsorted. When the algorithm completes 5835 // it is at the end of the list. 5836 allnodes_iterator SortedPos = allnodes_begin(); 5837 5838 // Visit all the nodes. Move nodes with no operands to the front of 5839 // the list immediately. Annotate nodes that do have operands with their 5840 // operand count. Before we do this, the Node Id fields of the nodes 5841 // may contain arbitrary values. After, the Node Id fields for nodes 5842 // before SortedPos will contain the topological sort index, and the 5843 // Node Id fields for nodes At SortedPos and after will contain the 5844 // count of outstanding operands. 5845 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5846 SDNode *N = I++; 5847 checkForCycles(N); 5848 unsigned Degree = N->getNumOperands(); 5849 if (Degree == 0) { 5850 // A node with no uses, add it to the result array immediately. 5851 N->setNodeId(DAGSize++); 5852 allnodes_iterator Q = N; 5853 if (Q != SortedPos) 5854 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5855 assert(SortedPos != AllNodes.end() && "Overran node list"); 5856 ++SortedPos; 5857 } else { 5858 // Temporarily use the Node Id as scratch space for the degree count. 5859 N->setNodeId(Degree); 5860 } 5861 } 5862 5863 // Visit all the nodes. As we iterate, move nodes into sorted order, 5864 // such that by the time the end is reached all nodes will be sorted. 5865 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5866 SDNode *N = I; 5867 checkForCycles(N); 5868 // N is in sorted position, so all its uses have one less operand 5869 // that needs to be sorted. 5870 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5871 UI != UE; ++UI) { 5872 SDNode *P = *UI; 5873 unsigned Degree = P->getNodeId(); 5874 assert(Degree != 0 && "Invalid node degree"); 5875 --Degree; 5876 if (Degree == 0) { 5877 // All of P's operands are sorted, so P may sorted now. 5878 P->setNodeId(DAGSize++); 5879 if (P != SortedPos) 5880 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5881 assert(SortedPos != AllNodes.end() && "Overran node list"); 5882 ++SortedPos; 5883 } else { 5884 // Update P's outstanding operand count. 5885 P->setNodeId(Degree); 5886 } 5887 } 5888 if (I == SortedPos) { 5889#ifndef NDEBUG 5890 SDNode *S = ++I; 5891 dbgs() << "Overran sorted position:\n"; 5892 S->dumprFull(); 5893#endif 5894 llvm_unreachable(0); 5895 } 5896 } 5897 5898 assert(SortedPos == AllNodes.end() && 5899 "Topological sort incomplete!"); 5900 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5901 "First node in topological sort is not the entry token!"); 5902 assert(AllNodes.front().getNodeId() == 0 && 5903 "First node in topological sort has non-zero id!"); 5904 assert(AllNodes.front().getNumOperands() == 0 && 5905 "First node in topological sort has operands!"); 5906 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5907 "Last node in topologic sort has unexpected id!"); 5908 assert(AllNodes.back().use_empty() && 5909 "Last node in topologic sort has users!"); 5910 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5911 return DAGSize; 5912} 5913 5914/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5915/// value is produced by SD. 5916void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5917 DbgInfo->add(DB, SD, isParameter); 5918 if (SD) 5919 SD->setHasDebugValue(true); 5920} 5921 5922/// TransferDbgValues - Transfer SDDbgValues. 5923void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5924 if (From == To || !From.getNode()->getHasDebugValue()) 5925 return; 5926 SDNode *FromNode = From.getNode(); 5927 SDNode *ToNode = To.getNode(); 5928 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5929 SmallVector<SDDbgValue *, 2> ClonedDVs; 5930 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5931 I != E; ++I) { 5932 SDDbgValue *Dbg = *I; 5933 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5934 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5935 Dbg->getOffset(), Dbg->getDebugLoc(), 5936 Dbg->getOrder()); 5937 ClonedDVs.push_back(Clone); 5938 } 5939 } 5940 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(), 5941 E = ClonedDVs.end(); I != E; ++I) 5942 AddDbgValue(*I, ToNode, false); 5943} 5944 5945//===----------------------------------------------------------------------===// 5946// SDNode Class 5947//===----------------------------------------------------------------------===// 5948 5949HandleSDNode::~HandleSDNode() { 5950 DropOperands(); 5951} 5952 5953GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order, 5954 DebugLoc DL, const GlobalValue *GA, 5955 EVT VT, int64_t o, unsigned char TF) 5956 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5957 TheGlobal = GA; 5958} 5959 5960MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, 5961 EVT memvt, MachineMemOperand *mmo) 5962 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5963 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5964 MMO->isNonTemporal(), MMO->isInvariant()); 5965 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5966 assert(isNonTemporal() == MMO->isNonTemporal() && 5967 "Non-temporal encoding error!"); 5968 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5969} 5970 5971MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, 5972 const SDValue *Ops, unsigned NumOps, EVT memvt, 5973 MachineMemOperand *mmo) 5974 : SDNode(Opc, Order, dl, VTs, Ops, NumOps), 5975 MemoryVT(memvt), MMO(mmo) { 5976 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5977 MMO->isNonTemporal(), MMO->isInvariant()); 5978 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5979 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5980} 5981 5982/// Profile - Gather unique data for the node. 5983/// 5984void SDNode::Profile(FoldingSetNodeID &ID) const { 5985 AddNodeIDNode(ID, this); 5986} 5987 5988namespace { 5989 struct EVTArray { 5990 std::vector<EVT> VTs; 5991 5992 EVTArray() { 5993 VTs.reserve(MVT::LAST_VALUETYPE); 5994 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5995 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5996 } 5997 }; 5998} 5999 6000static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 6001static ManagedStatic<EVTArray> SimpleVTArray; 6002static ManagedStatic<sys::SmartMutex<true> > VTMutex; 6003 6004/// getValueTypeList - Return a pointer to the specified value type. 6005/// 6006const EVT *SDNode::getValueTypeList(EVT VT) { 6007 if (VT.isExtended()) { 6008 sys::SmartScopedLock<true> Lock(*VTMutex); 6009 return &(*EVTs->insert(VT).first); 6010 } else { 6011 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 6012 "Value type out of range!"); 6013 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 6014 } 6015} 6016 6017/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 6018/// indicated value. This method ignores uses of other values defined by this 6019/// operation. 6020bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 6021 assert(Value < getNumValues() && "Bad value!"); 6022 6023 // TODO: Only iterate over uses of a given value of the node 6024 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 6025 if (UI.getUse().getResNo() == Value) { 6026 if (NUses == 0) 6027 return false; 6028 --NUses; 6029 } 6030 } 6031 6032 // Found exactly the right number of uses? 6033 return NUses == 0; 6034} 6035 6036 6037/// hasAnyUseOfValue - Return true if there are any use of the indicated 6038/// value. This method ignores uses of other values defined by this operation. 6039bool SDNode::hasAnyUseOfValue(unsigned Value) const { 6040 assert(Value < getNumValues() && "Bad value!"); 6041 6042 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 6043 if (UI.getUse().getResNo() == Value) 6044 return true; 6045 6046 return false; 6047} 6048 6049 6050/// isOnlyUserOf - Return true if this node is the only use of N. 6051/// 6052bool SDNode::isOnlyUserOf(SDNode *N) const { 6053 bool Seen = false; 6054 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 6055 SDNode *User = *I; 6056 if (User == this) 6057 Seen = true; 6058 else 6059 return false; 6060 } 6061 6062 return Seen; 6063} 6064 6065/// isOperand - Return true if this node is an operand of N. 6066/// 6067bool SDValue::isOperandOf(SDNode *N) const { 6068 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6069 if (*this == N->getOperand(i)) 6070 return true; 6071 return false; 6072} 6073 6074bool SDNode::isOperandOf(SDNode *N) const { 6075 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 6076 if (this == N->OperandList[i].getNode()) 6077 return true; 6078 return false; 6079} 6080 6081/// reachesChainWithoutSideEffects - Return true if this operand (which must 6082/// be a chain) reaches the specified operand without crossing any 6083/// side-effecting instructions on any chain path. In practice, this looks 6084/// through token factors and non-volatile loads. In order to remain efficient, 6085/// this only looks a couple of nodes in, it does not do an exhaustive search. 6086bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 6087 unsigned Depth) const { 6088 if (*this == Dest) return true; 6089 6090 // Don't search too deeply, we just want to be able to see through 6091 // TokenFactor's etc. 6092 if (Depth == 0) return false; 6093 6094 // If this is a token factor, all inputs to the TF happen in parallel. If any 6095 // of the operands of the TF does not reach dest, then we cannot do the xform. 6096 if (getOpcode() == ISD::TokenFactor) { 6097 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 6098 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 6099 return false; 6100 return true; 6101 } 6102 6103 // Loads don't have side effects, look through them. 6104 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 6105 if (!Ld->isVolatile()) 6106 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 6107 } 6108 return false; 6109} 6110 6111/// hasPredecessor - Return true if N is a predecessor of this node. 6112/// N is either an operand of this node, or can be reached by recursively 6113/// traversing up the operands. 6114/// NOTE: This is an expensive method. Use it carefully. 6115bool SDNode::hasPredecessor(const SDNode *N) const { 6116 SmallPtrSet<const SDNode *, 32> Visited; 6117 SmallVector<const SDNode *, 16> Worklist; 6118 return hasPredecessorHelper(N, Visited, Worklist); 6119} 6120 6121bool 6122SDNode::hasPredecessorHelper(const SDNode *N, 6123 SmallPtrSet<const SDNode *, 32> &Visited, 6124 SmallVectorImpl<const SDNode *> &Worklist) const { 6125 if (Visited.empty()) { 6126 Worklist.push_back(this); 6127 } else { 6128 // Take a look in the visited set. If we've already encountered this node 6129 // we needn't search further. 6130 if (Visited.count(N)) 6131 return true; 6132 } 6133 6134 // Haven't visited N yet. Continue the search. 6135 while (!Worklist.empty()) { 6136 const SDNode *M = Worklist.pop_back_val(); 6137 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 6138 SDNode *Op = M->getOperand(i).getNode(); 6139 if (Visited.insert(Op)) 6140 Worklist.push_back(Op); 6141 if (Op == N) 6142 return true; 6143 } 6144 } 6145 6146 return false; 6147} 6148 6149uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 6150 assert(Num < NumOperands && "Invalid child # of SDNode!"); 6151 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 6152} 6153 6154SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6155 assert(N->getNumValues() == 1 && 6156 "Can't unroll a vector with multiple results!"); 6157 6158 EVT VT = N->getValueType(0); 6159 unsigned NE = VT.getVectorNumElements(); 6160 EVT EltVT = VT.getVectorElementType(); 6161 SDLoc dl(N); 6162 6163 SmallVector<SDValue, 8> Scalars; 6164 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6165 6166 // If ResNE is 0, fully unroll the vector op. 6167 if (ResNE == 0) 6168 ResNE = NE; 6169 else if (NE > ResNE) 6170 NE = ResNE; 6171 6172 unsigned i; 6173 for (i= 0; i != NE; ++i) { 6174 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6175 SDValue Operand = N->getOperand(j); 6176 EVT OperandVT = Operand.getValueType(); 6177 if (OperandVT.isVector()) { 6178 // A vector operand; extract a single element. 6179 const TargetLowering *TLI = TM.getTargetLowering(); 6180 EVT OperandEltVT = OperandVT.getVectorElementType(); 6181 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6182 OperandEltVT, 6183 Operand, 6184 getConstant(i, TLI->getVectorIdxTy())); 6185 } else { 6186 // A scalar operand; just use it as is. 6187 Operands[j] = Operand; 6188 } 6189 } 6190 6191 switch (N->getOpcode()) { 6192 default: 6193 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6194 &Operands[0], Operands.size())); 6195 break; 6196 case ISD::VSELECT: 6197 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6198 &Operands[0], Operands.size())); 6199 break; 6200 case ISD::SHL: 6201 case ISD::SRA: 6202 case ISD::SRL: 6203 case ISD::ROTL: 6204 case ISD::ROTR: 6205 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6206 getShiftAmountOperand(Operands[0].getValueType(), 6207 Operands[1]))); 6208 break; 6209 case ISD::SIGN_EXTEND_INREG: 6210 case ISD::FP_ROUND_INREG: { 6211 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6212 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6213 Operands[0], 6214 getValueType(ExtVT))); 6215 } 6216 } 6217 } 6218 6219 for (; i < ResNE; ++i) 6220 Scalars.push_back(getUNDEF(EltVT)); 6221 6222 return getNode(ISD::BUILD_VECTOR, dl, 6223 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6224 &Scalars[0], Scalars.size()); 6225} 6226 6227 6228/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6229/// location that is 'Dist' units away from the location that the 'Base' load 6230/// is loading from. 6231bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6232 unsigned Bytes, int Dist) const { 6233 if (LD->getChain() != Base->getChain()) 6234 return false; 6235 EVT VT = LD->getValueType(0); 6236 if (VT.getSizeInBits() / 8 != Bytes) 6237 return false; 6238 6239 SDValue Loc = LD->getOperand(1); 6240 SDValue BaseLoc = Base->getOperand(1); 6241 if (Loc.getOpcode() == ISD::FrameIndex) { 6242 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6243 return false; 6244 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6245 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6246 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6247 int FS = MFI->getObjectSize(FI); 6248 int BFS = MFI->getObjectSize(BFI); 6249 if (FS != BFS || FS != (int)Bytes) return false; 6250 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6251 } 6252 6253 // Handle X+C 6254 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6255 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6256 return true; 6257 6258 const GlobalValue *GV1 = NULL; 6259 const GlobalValue *GV2 = NULL; 6260 int64_t Offset1 = 0; 6261 int64_t Offset2 = 0; 6262 const TargetLowering *TLI = TM.getTargetLowering(); 6263 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6264 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6265 if (isGA1 && isGA2 && GV1 == GV2) 6266 return Offset1 == (Offset2 + Dist*Bytes); 6267 return false; 6268} 6269 6270 6271/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6272/// it cannot be inferred. 6273unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6274 // If this is a GlobalAddress + cst, return the alignment. 6275 const GlobalValue *GV; 6276 int64_t GVOffset = 0; 6277 const TargetLowering *TLI = TM.getTargetLowering(); 6278 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6279 unsigned PtrWidth = TLI->getPointerTy().getSizeInBits(); 6280 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6281 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, 6282 TLI->getDataLayout()); 6283 unsigned AlignBits = KnownZero.countTrailingOnes(); 6284 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6285 if (Align) 6286 return MinAlign(Align, GVOffset); 6287 } 6288 6289 // If this is a direct reference to a stack slot, use information about the 6290 // stack slot's alignment. 6291 int FrameIdx = 1 << 31; 6292 int64_t FrameOffset = 0; 6293 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6294 FrameIdx = FI->getIndex(); 6295 } else if (isBaseWithConstantOffset(Ptr) && 6296 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6297 // Handle FI+Cst 6298 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6299 FrameOffset = Ptr.getConstantOperandVal(1); 6300 } 6301 6302 if (FrameIdx != (1 << 31)) { 6303 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6304 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6305 FrameOffset); 6306 return FIInfoAlign; 6307 } 6308 6309 return 0; 6310} 6311 6312// getAddressSpace - Return the address space this GlobalAddress belongs to. 6313unsigned GlobalAddressSDNode::getAddressSpace() const { 6314 return getGlobal()->getType()->getAddressSpace(); 6315} 6316 6317 6318Type *ConstantPoolSDNode::getType() const { 6319 if (isMachineConstantPoolEntry()) 6320 return Val.MachineCPVal->getType(); 6321 return Val.ConstVal->getType(); 6322} 6323 6324bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6325 APInt &SplatUndef, 6326 unsigned &SplatBitSize, 6327 bool &HasAnyUndefs, 6328 unsigned MinSplatBits, 6329 bool isBigEndian) { 6330 EVT VT = getValueType(0); 6331 assert(VT.isVector() && "Expected a vector type"); 6332 unsigned sz = VT.getSizeInBits(); 6333 if (MinSplatBits > sz) 6334 return false; 6335 6336 SplatValue = APInt(sz, 0); 6337 SplatUndef = APInt(sz, 0); 6338 6339 // Get the bits. Bits with undefined values (when the corresponding element 6340 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6341 // in SplatValue. If any of the values are not constant, give up and return 6342 // false. 6343 unsigned int nOps = getNumOperands(); 6344 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6345 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6346 6347 for (unsigned j = 0; j < nOps; ++j) { 6348 unsigned i = isBigEndian ? nOps-1-j : j; 6349 SDValue OpVal = getOperand(i); 6350 unsigned BitPos = j * EltBitSize; 6351 6352 if (OpVal.getOpcode() == ISD::UNDEF) 6353 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6354 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6355 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6356 zextOrTrunc(sz) << BitPos; 6357 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6358 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6359 else 6360 return false; 6361 } 6362 6363 // The build_vector is all constants or undefs. Find the smallest element 6364 // size that splats the vector. 6365 6366 HasAnyUndefs = (SplatUndef != 0); 6367 while (sz > 8) { 6368 6369 unsigned HalfSize = sz / 2; 6370 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6371 APInt LowValue = SplatValue.trunc(HalfSize); 6372 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6373 APInt LowUndef = SplatUndef.trunc(HalfSize); 6374 6375 // If the two halves do not match (ignoring undef bits), stop here. 6376 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6377 MinSplatBits > HalfSize) 6378 break; 6379 6380 SplatValue = HighValue | LowValue; 6381 SplatUndef = HighUndef & LowUndef; 6382 6383 sz = HalfSize; 6384 } 6385 6386 SplatBitSize = sz; 6387 return true; 6388} 6389 6390bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6391 // Find the first non-undef value in the shuffle mask. 6392 unsigned i, e; 6393 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6394 /* search */; 6395 6396 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6397 6398 // Make sure all remaining elements are either undef or the same as the first 6399 // non-undef value. 6400 for (int Idx = Mask[i]; i != e; ++i) 6401 if (Mask[i] >= 0 && Mask[i] != Idx) 6402 return false; 6403 return true; 6404} 6405 6406#ifdef XDEBUG 6407static void checkForCyclesHelper(const SDNode *N, 6408 SmallPtrSet<const SDNode*, 32> &Visited, 6409 SmallPtrSet<const SDNode*, 32> &Checked) { 6410 // If this node has already been checked, don't check it again. 6411 if (Checked.count(N)) 6412 return; 6413 6414 // If a node has already been visited on this depth-first walk, reject it as 6415 // a cycle. 6416 if (!Visited.insert(N)) { 6417 dbgs() << "Offending node:\n"; 6418 N->dumprFull(); 6419 errs() << "Detected cycle in SelectionDAG\n"; 6420 abort(); 6421 } 6422 6423 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6424 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6425 6426 Checked.insert(N); 6427 Visited.erase(N); 6428} 6429#endif 6430 6431void llvm::checkForCycles(const llvm::SDNode *N) { 6432#ifdef XDEBUG 6433 assert(N && "Checking nonexistant SDNode"); 6434 SmallPtrSet<const SDNode*, 32> visited; 6435 SmallPtrSet<const SDNode*, 32> checked; 6436 checkForCyclesHelper(N, visited, checked); 6437#endif 6438} 6439 6440void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6441 checkForCycles(DAG->getRoot().getNode()); 6442} 6443