SelectionDAG.cpp revision 91766fe066efe6e0969ba805a2e3726a70ed34a3
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetLowering.h" 34#include "llvm/Target/TargetSelectionDAGInfo.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/Support/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BITCAST) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BITCAST) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 if (NumElems == 1) 201 return false; 202 for (unsigned i = 1; i < NumElems; ++i) { 203 SDValue V = N->getOperand(i); 204 if (V.getOpcode() != ISD::UNDEF) 205 return false; 206 } 207 return true; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: llvm_unreachable("Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309//===----------------------------------------------------------------------===// 310// SDNode Profile Support 311//===----------------------------------------------------------------------===// 312 313/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 314/// 315static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 316 ID.AddInteger(OpC); 317} 318 319/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 320/// solely with their pointer. 321static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 322 ID.AddPointer(VTList.VTs); 323} 324 325/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 326/// 327static void AddNodeIDOperands(FoldingSetNodeID &ID, 328 const SDValue *Ops, unsigned NumOps) { 329 for (; NumOps; --NumOps, ++Ops) { 330 ID.AddPointer(Ops->getNode()); 331 ID.AddInteger(Ops->getResNo()); 332 } 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDUse *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345static void AddNodeIDNode(FoldingSetNodeID &ID, 346 unsigned short OpC, SDVTList VTList, 347 const SDValue *OpList, unsigned N) { 348 AddNodeIDOpcode(ID, OpC); 349 AddNodeIDValueTypes(ID, VTList); 350 AddNodeIDOperands(ID, OpList, N); 351} 352 353/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 354/// the NodeID data. 355static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 356 switch (N->getOpcode()) { 357 case ISD::TargetExternalSymbol: 358 case ISD::ExternalSymbol: 359 llvm_unreachable("Should only be used on nodes with operands"); 360 default: break; // Normal nodes don't need extra info. 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 ID.AddInteger(GA->getTargetFlags()); 378 break; 379 } 380 case ISD::BasicBlock: 381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 382 break; 383 case ISD::Register: 384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 385 break; 386 case ISD::RegisterMask: 387 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask()); 388 break; 389 case ISD::SRCVALUE: 390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 391 break; 392 case ISD::FrameIndex: 393 case ISD::TargetFrameIndex: 394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 395 break; 396 case ISD::JumpTable: 397 case ISD::TargetJumpTable: 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 400 break; 401 case ISD::ConstantPool: 402 case ISD::TargetConstantPool: { 403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 404 ID.AddInteger(CP->getAlignment()); 405 ID.AddInteger(CP->getOffset()); 406 if (CP->isMachineConstantPoolEntry()) 407 CP->getMachineCPVal()->addSelectionDAGCSEId(ID); 408 else 409 ID.AddPointer(CP->getConstVal()); 410 ID.AddInteger(CP->getTargetFlags()); 411 break; 412 } 413 case ISD::LOAD: { 414 const LoadSDNode *LD = cast<LoadSDNode>(N); 415 ID.AddInteger(LD->getMemoryVT().getRawBits()); 416 ID.AddInteger(LD->getRawSubclassData()); 417 break; 418 } 419 case ISD::STORE: { 420 const StoreSDNode *ST = cast<StoreSDNode>(N); 421 ID.AddInteger(ST->getMemoryVT().getRawBits()); 422 ID.AddInteger(ST->getRawSubclassData()); 423 break; 424 } 425 case ISD::ATOMIC_CMP_SWAP: 426 case ISD::ATOMIC_SWAP: 427 case ISD::ATOMIC_LOAD_ADD: 428 case ISD::ATOMIC_LOAD_SUB: 429 case ISD::ATOMIC_LOAD_AND: 430 case ISD::ATOMIC_LOAD_OR: 431 case ISD::ATOMIC_LOAD_XOR: 432 case ISD::ATOMIC_LOAD_NAND: 433 case ISD::ATOMIC_LOAD_MIN: 434 case ISD::ATOMIC_LOAD_MAX: 435 case ISD::ATOMIC_LOAD_UMIN: 436 case ISD::ATOMIC_LOAD_UMAX: 437 case ISD::ATOMIC_LOAD: 438 case ISD::ATOMIC_STORE: { 439 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 440 ID.AddInteger(AT->getMemoryVT().getRawBits()); 441 ID.AddInteger(AT->getRawSubclassData()); 442 break; 443 } 444 case ISD::VECTOR_SHUFFLE: { 445 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 446 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 447 i != e; ++i) 448 ID.AddInteger(SVN->getMaskElt(i)); 449 break; 450 } 451 case ISD::TargetBlockAddress: 452 case ISD::BlockAddress: { 453 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 454 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 455 break; 456 } 457 } // end switch (N->getOpcode()) 458} 459 460/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 461/// data. 462static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 463 AddNodeIDOpcode(ID, N->getOpcode()); 464 // Add the return value info. 465 AddNodeIDValueTypes(ID, N->getVTList()); 466 // Add the operand info. 467 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 468 469 // Handle SDNode leafs with special info. 470 AddNodeIDCustom(ID, N); 471} 472 473/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 474/// the CSE map that carries volatility, temporalness, indexing mode, and 475/// extension/truncation information. 476/// 477static inline unsigned 478encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 479 bool isNonTemporal, bool isInvariant) { 480 assert((ConvType & 3) == ConvType && 481 "ConvType may not require more than 2 bits!"); 482 assert((AM & 7) == AM && 483 "AM may not require more than 3 bits!"); 484 return ConvType | 485 (AM << 2) | 486 (isVolatile << 5) | 487 (isNonTemporal << 6) | 488 (isInvariant << 7); 489} 490 491//===----------------------------------------------------------------------===// 492// SelectionDAG Class 493//===----------------------------------------------------------------------===// 494 495/// doNotCSE - Return true if CSE should not be performed for this node. 496static bool doNotCSE(SDNode *N) { 497 if (N->getValueType(0) == MVT::Glue) 498 return true; // Never CSE anything that produces a flag. 499 500 switch (N->getOpcode()) { 501 default: break; 502 case ISD::HANDLENODE: 503 case ISD::EH_LABEL: 504 return true; // Never CSE these nodes. 505 } 506 507 // Check that remaining values produced are not flags. 508 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 509 if (N->getValueType(i) == MVT::Glue) 510 return true; // Never CSE anything that produces a flag. 511 512 return false; 513} 514 515/// RemoveDeadNodes - This method deletes all unreachable nodes in the 516/// SelectionDAG. 517void SelectionDAG::RemoveDeadNodes() { 518 // Create a dummy node (which is not added to allnodes), that adds a reference 519 // to the root node, preventing it from being deleted. 520 HandleSDNode Dummy(getRoot()); 521 522 SmallVector<SDNode*, 128> DeadNodes; 523 524 // Add all obviously-dead nodes to the DeadNodes worklist. 525 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 526 if (I->use_empty()) 527 DeadNodes.push_back(I); 528 529 RemoveDeadNodes(DeadNodes); 530 531 // If the root changed (e.g. it was a dead load, update the root). 532 setRoot(Dummy.getValue()); 533} 534 535/// RemoveDeadNodes - This method deletes the unreachable nodes in the 536/// given list, and any nodes that become unreachable as a result. 537void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 538 DAGUpdateListener *UpdateListener) { 539 540 // Process the worklist, deleting the nodes and adding their uses to the 541 // worklist. 542 while (!DeadNodes.empty()) { 543 SDNode *N = DeadNodes.pop_back_val(); 544 545 if (UpdateListener) 546 UpdateListener->NodeDeleted(N, 0); 547 548 // Take the node out of the appropriate CSE map. 549 RemoveNodeFromCSEMaps(N); 550 551 // Next, brutally remove the operand list. This is safe to do, as there are 552 // no cycles in the graph. 553 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 554 SDUse &Use = *I++; 555 SDNode *Operand = Use.getNode(); 556 Use.set(SDValue()); 557 558 // Now that we removed this operand, see if there are no uses of it left. 559 if (Operand->use_empty()) 560 DeadNodes.push_back(Operand); 561 } 562 563 DeallocateNode(N); 564 } 565} 566 567void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 568 SmallVector<SDNode*, 16> DeadNodes(1, N); 569 570 // Create a dummy node that adds a reference to the root node, preventing 571 // it from being deleted. (This matters if the root is an operand of the 572 // dead node.) 573 HandleSDNode Dummy(getRoot()); 574 575 RemoveDeadNodes(DeadNodes, UpdateListener); 576} 577 578void SelectionDAG::DeleteNode(SDNode *N) { 579 // First take this out of the appropriate CSE map. 580 RemoveNodeFromCSEMaps(N); 581 582 // Finally, remove uses due to operands of this node, remove from the 583 // AllNodes list, and delete the node. 584 DeleteNodeNotInCSEMaps(N); 585} 586 587void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 588 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 589 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 590 591 // Drop all of the operands and decrement used node's use counts. 592 N->DropOperands(); 593 594 DeallocateNode(N); 595} 596 597void SelectionDAG::DeallocateNode(SDNode *N) { 598 if (N->OperandsNeedDelete) 599 delete[] N->OperandList; 600 601 // Set the opcode to DELETED_NODE to help catch bugs when node 602 // memory is reallocated. 603 N->NodeType = ISD::DELETED_NODE; 604 605 NodeAllocator.Deallocate(AllNodes.remove(N)); 606 607 // Remove the ordering of this node. 608 Ordering->remove(N); 609 610 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 611 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N); 612 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 613 DbgVals[i]->setIsInvalidated(); 614} 615 616/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 617/// correspond to it. This is useful when we're about to delete or repurpose 618/// the node. We don't want future request for structurally identical nodes 619/// to return N anymore. 620bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 621 bool Erased = false; 622 switch (N->getOpcode()) { 623 case ISD::HANDLENODE: return false; // noop. 624 case ISD::CONDCODE: 625 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 626 "Cond code doesn't exist!"); 627 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 628 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 629 break; 630 case ISD::ExternalSymbol: 631 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 632 break; 633 case ISD::TargetExternalSymbol: { 634 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 635 Erased = TargetExternalSymbols.erase( 636 std::pair<std::string,unsigned char>(ESN->getSymbol(), 637 ESN->getTargetFlags())); 638 break; 639 } 640 case ISD::VALUETYPE: { 641 EVT VT = cast<VTSDNode>(N)->getVT(); 642 if (VT.isExtended()) { 643 Erased = ExtendedValueTypeNodes.erase(VT); 644 } else { 645 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 646 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 647 } 648 break; 649 } 650 default: 651 // Remove it from the CSE Map. 652 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 653 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 654 Erased = CSEMap.RemoveNode(N); 655 break; 656 } 657#ifndef NDEBUG 658 // Verify that the node was actually in one of the CSE maps, unless it has a 659 // flag result (which cannot be CSE'd) or is one of the special cases that are 660 // not subject to CSE. 661 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 662 !N->isMachineOpcode() && !doNotCSE(N)) { 663 N->dump(this); 664 dbgs() << "\n"; 665 llvm_unreachable("Node is not in map!"); 666 } 667#endif 668 return Erased; 669} 670 671/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 672/// maps and modified in place. Add it back to the CSE maps, unless an identical 673/// node already exists, in which case transfer all its users to the existing 674/// node. This transfer can potentially trigger recursive merging. 675/// 676void 677SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 678 DAGUpdateListener *UpdateListener) { 679 // For node types that aren't CSE'd, just act as if no identical node 680 // already exists. 681 if (!doNotCSE(N)) { 682 SDNode *Existing = CSEMap.GetOrInsertNode(N); 683 if (Existing != N) { 684 // If there was already an existing matching node, use ReplaceAllUsesWith 685 // to replace the dead one with the existing one. This can cause 686 // recursive merging of other unrelated nodes down the line. 687 ReplaceAllUsesWith(N, Existing, UpdateListener); 688 689 // N is now dead. Inform the listener if it exists and delete it. 690 if (UpdateListener) 691 UpdateListener->NodeDeleted(N, Existing); 692 DeleteNodeNotInCSEMaps(N); 693 return; 694 } 695 } 696 697 // If the node doesn't already exist, we updated it. Inform a listener if 698 // it exists. 699 if (UpdateListener) 700 UpdateListener->NodeUpdated(N); 701} 702 703/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 704/// were replaced with those specified. If this node is never memoized, 705/// return null, otherwise return a pointer to the slot it would take. If a 706/// node already exists with these operands, the slot will be non-null. 707SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 708 void *&InsertPos) { 709 if (doNotCSE(N)) 710 return 0; 711 712 SDValue Ops[] = { Op }; 713 FoldingSetNodeID ID; 714 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 715 AddNodeIDCustom(ID, N); 716 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 717 return Node; 718} 719 720/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 721/// were replaced with those specified. If this node is never memoized, 722/// return null, otherwise return a pointer to the slot it would take. If a 723/// node already exists with these operands, the slot will be non-null. 724SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 725 SDValue Op1, SDValue Op2, 726 void *&InsertPos) { 727 if (doNotCSE(N)) 728 return 0; 729 730 SDValue Ops[] = { Op1, Op2 }; 731 FoldingSetNodeID ID; 732 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 733 AddNodeIDCustom(ID, N); 734 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 735 return Node; 736} 737 738 739/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 740/// were replaced with those specified. If this node is never memoized, 741/// return null, otherwise return a pointer to the slot it would take. If a 742/// node already exists with these operands, the slot will be non-null. 743SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 744 const SDValue *Ops,unsigned NumOps, 745 void *&InsertPos) { 746 if (doNotCSE(N)) 747 return 0; 748 749 FoldingSetNodeID ID; 750 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 751 AddNodeIDCustom(ID, N); 752 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 753 return Node; 754} 755 756#ifndef NDEBUG 757/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 758static void VerifyNodeCommon(SDNode *N) { 759 switch (N->getOpcode()) { 760 default: 761 break; 762 case ISD::BUILD_PAIR: { 763 EVT VT = N->getValueType(0); 764 assert(N->getNumValues() == 1 && "Too many results!"); 765 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 766 "Wrong return type!"); 767 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 768 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 769 "Mismatched operand types!"); 770 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 771 "Wrong operand type!"); 772 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 773 "Wrong return type size"); 774 break; 775 } 776 case ISD::BUILD_VECTOR: { 777 assert(N->getNumValues() == 1 && "Too many results!"); 778 assert(N->getValueType(0).isVector() && "Wrong return type!"); 779 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 780 "Wrong number of operands!"); 781 EVT EltVT = N->getValueType(0).getVectorElementType(); 782 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 783 assert((I->getValueType() == EltVT || 784 (EltVT.isInteger() && I->getValueType().isInteger() && 785 EltVT.bitsLE(I->getValueType()))) && 786 "Wrong operand type!"); 787 assert(I->getValueType() == N->getOperand(0).getValueType() && 788 "Operands must all have the same type"); 789 } 790 break; 791 } 792 } 793} 794 795/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 796static void VerifySDNode(SDNode *N) { 797 // The SDNode allocators cannot be used to allocate nodes with fields that are 798 // not present in an SDNode! 799 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 800 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 801 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 802 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 803 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 804 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 805 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 806 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 807 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 808 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 809 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 810 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 811 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 812 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 813 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 814 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 815 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 816 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 817 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 818 819 VerifyNodeCommon(N); 820} 821 822/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 823/// invalid. 824static void VerifyMachineNode(SDNode *N) { 825 // The MachineNode allocators cannot be used to allocate nodes with fields 826 // that are not present in a MachineNode! 827 // Currently there are no such nodes. 828 829 VerifyNodeCommon(N); 830} 831#endif // NDEBUG 832 833/// getEVTAlignment - Compute the default alignment value for the 834/// given type. 835/// 836unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 837 Type *Ty = VT == MVT::iPTR ? 838 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 839 VT.getTypeForEVT(*getContext()); 840 841 return TLI.getTargetData()->getABITypeAlignment(Ty); 842} 843 844// EntryNode could meaningfully have debug info if we can find it... 845SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL) 846 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 847 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 848 Root(getEntryNode()), Ordering(0) { 849 AllNodes.push_back(&EntryNode); 850 Ordering = new SDNodeOrdering(); 851 DbgInfo = new SDDbgInfo(); 852} 853 854void SelectionDAG::init(MachineFunction &mf) { 855 MF = &mf; 856 Context = &mf.getFunction()->getContext(); 857} 858 859SelectionDAG::~SelectionDAG() { 860 allnodes_clear(); 861 delete Ordering; 862 delete DbgInfo; 863} 864 865void SelectionDAG::allnodes_clear() { 866 assert(&*AllNodes.begin() == &EntryNode); 867 AllNodes.remove(AllNodes.begin()); 868 while (!AllNodes.empty()) 869 DeallocateNode(AllNodes.begin()); 870} 871 872void SelectionDAG::clear() { 873 allnodes_clear(); 874 OperandAllocator.Reset(); 875 CSEMap.clear(); 876 877 ExtendedValueTypeNodes.clear(); 878 ExternalSymbols.clear(); 879 TargetExternalSymbols.clear(); 880 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 881 static_cast<CondCodeSDNode*>(0)); 882 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 883 static_cast<SDNode*>(0)); 884 885 EntryNode.UseList = 0; 886 AllNodes.push_back(&EntryNode); 887 Root = getEntryNode(); 888 Ordering->clear(); 889 DbgInfo->clear(); 890} 891 892SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 893 return VT.bitsGT(Op.getValueType()) ? 894 getNode(ISD::ANY_EXTEND, DL, VT, Op) : 895 getNode(ISD::TRUNCATE, DL, VT, Op); 896} 897 898SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 899 return VT.bitsGT(Op.getValueType()) ? 900 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 901 getNode(ISD::TRUNCATE, DL, VT, Op); 902} 903 904SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 905 return VT.bitsGT(Op.getValueType()) ? 906 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 907 getNode(ISD::TRUNCATE, DL, VT, Op); 908} 909 910SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 911 assert(!VT.isVector() && 912 "getZeroExtendInReg should use the vector element type instead of " 913 "the vector type!"); 914 if (Op.getValueType() == VT) return Op; 915 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 916 APInt Imm = APInt::getLowBitsSet(BitWidth, 917 VT.getSizeInBits()); 918 return getNode(ISD::AND, DL, Op.getValueType(), Op, 919 getConstant(Imm, Op.getValueType())); 920} 921 922/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 923/// 924SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 925 EVT EltVT = VT.getScalarType(); 926 SDValue NegOne = 927 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 928 return getNode(ISD::XOR, DL, VT, Val, NegOne); 929} 930 931SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 932 EVT EltVT = VT.getScalarType(); 933 assert((EltVT.getSizeInBits() >= 64 || 934 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 935 "getConstant with a uint64_t value that doesn't fit in the type!"); 936 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 937} 938 939SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 940 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 941} 942 943SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 944 assert(VT.isInteger() && "Cannot create FP integer constant!"); 945 946 EVT EltVT = VT.getScalarType(); 947 const ConstantInt *Elt = &Val; 948 949 // In some cases the vector type is legal but the element type is illegal and 950 // needs to be promoted, for example v8i8 on ARM. In this case, promote the 951 // inserted value (the type does not need to match the vector element type). 952 // Any extra bits introduced will be truncated away. 953 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) == 954 TargetLowering::TypePromoteInteger) { 955 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT); 956 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits()); 957 Elt = ConstantInt::get(*getContext(), NewVal); 958 } 959 960 assert(Elt->getBitWidth() == EltVT.getSizeInBits() && 961 "APInt size does not match type size!"); 962 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 963 FoldingSetNodeID ID; 964 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 965 ID.AddPointer(Elt); 966 void *IP = 0; 967 SDNode *N = NULL; 968 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 969 if (!VT.isVector()) 970 return SDValue(N, 0); 971 972 if (!N) { 973 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT); 974 CSEMap.InsertNode(N, IP); 975 AllNodes.push_back(N); 976 } 977 978 SDValue Result(N, 0); 979 if (VT.isVector()) { 980 SmallVector<SDValue, 8> Ops; 981 Ops.assign(VT.getVectorNumElements(), Result); 982 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 983 } 984 return Result; 985} 986 987SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 988 return getConstant(Val, TLI.getPointerTy(), isTarget); 989} 990 991 992SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 993 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 994} 995 996SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 997 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 998 999 EVT EltVT = VT.getScalarType(); 1000 1001 // Do the map lookup using the actual bit pattern for the floating point 1002 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 1003 // we don't have issues with SNANs. 1004 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 1005 FoldingSetNodeID ID; 1006 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 1007 ID.AddPointer(&V); 1008 void *IP = 0; 1009 SDNode *N = NULL; 1010 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 1011 if (!VT.isVector()) 1012 return SDValue(N, 0); 1013 1014 if (!N) { 1015 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 1016 CSEMap.InsertNode(N, IP); 1017 AllNodes.push_back(N); 1018 } 1019 1020 SDValue Result(N, 0); 1021 if (VT.isVector()) { 1022 SmallVector<SDValue, 8> Ops; 1023 Ops.assign(VT.getVectorNumElements(), Result); 1024 // FIXME DebugLoc info might be appropriate here 1025 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 1026 } 1027 return Result; 1028} 1029 1030SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1031 EVT EltVT = VT.getScalarType(); 1032 if (EltVT==MVT::f32) 1033 return getConstantFP(APFloat((float)Val), VT, isTarget); 1034 else if (EltVT==MVT::f64) 1035 return getConstantFP(APFloat(Val), VT, isTarget); 1036 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1037 bool ignored; 1038 APFloat apf = APFloat(Val); 1039 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1040 &ignored); 1041 return getConstantFP(apf, VT, isTarget); 1042 } else { 1043 assert(0 && "Unsupported type in getConstantFP"); 1044 return SDValue(); 1045 } 1046} 1047 1048SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1049 EVT VT, int64_t Offset, 1050 bool isTargetGA, 1051 unsigned char TargetFlags) { 1052 assert((TargetFlags == 0 || isTargetGA) && 1053 "Cannot set target flags on target-independent globals"); 1054 1055 // Truncate (with sign-extension) the offset value to the pointer size. 1056 EVT PTy = TLI.getPointerTy(); 1057 unsigned BitWidth = PTy.getSizeInBits(); 1058 if (BitWidth < 64) 1059 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1060 1061 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1062 if (!GVar) { 1063 // If GV is an alias then use the aliasee for determining thread-localness. 1064 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1065 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1066 } 1067 1068 unsigned Opc; 1069 if (GVar && GVar->isThreadLocal()) 1070 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1071 else 1072 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1073 1074 FoldingSetNodeID ID; 1075 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1076 ID.AddPointer(GV); 1077 ID.AddInteger(Offset); 1078 ID.AddInteger(TargetFlags); 1079 void *IP = 0; 1080 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1081 return SDValue(E, 0); 1082 1083 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1084 Offset, TargetFlags); 1085 CSEMap.InsertNode(N, IP); 1086 AllNodes.push_back(N); 1087 return SDValue(N, 0); 1088} 1089 1090SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1091 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1092 FoldingSetNodeID ID; 1093 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1094 ID.AddInteger(FI); 1095 void *IP = 0; 1096 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1097 return SDValue(E, 0); 1098 1099 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1100 CSEMap.InsertNode(N, IP); 1101 AllNodes.push_back(N); 1102 return SDValue(N, 0); 1103} 1104 1105SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1106 unsigned char TargetFlags) { 1107 assert((TargetFlags == 0 || isTarget) && 1108 "Cannot set target flags on target-independent jump tables"); 1109 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1110 FoldingSetNodeID ID; 1111 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1112 ID.AddInteger(JTI); 1113 ID.AddInteger(TargetFlags); 1114 void *IP = 0; 1115 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1116 return SDValue(E, 0); 1117 1118 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1119 TargetFlags); 1120 CSEMap.InsertNode(N, IP); 1121 AllNodes.push_back(N); 1122 return SDValue(N, 0); 1123} 1124 1125SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1126 unsigned Alignment, int Offset, 1127 bool isTarget, 1128 unsigned char TargetFlags) { 1129 assert((TargetFlags == 0 || isTarget) && 1130 "Cannot set target flags on target-independent globals"); 1131 if (Alignment == 0) 1132 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1133 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1134 FoldingSetNodeID ID; 1135 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1136 ID.AddInteger(Alignment); 1137 ID.AddInteger(Offset); 1138 ID.AddPointer(C); 1139 ID.AddInteger(TargetFlags); 1140 void *IP = 0; 1141 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1142 return SDValue(E, 0); 1143 1144 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1145 Alignment, TargetFlags); 1146 CSEMap.InsertNode(N, IP); 1147 AllNodes.push_back(N); 1148 return SDValue(N, 0); 1149} 1150 1151 1152SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1153 unsigned Alignment, int Offset, 1154 bool isTarget, 1155 unsigned char TargetFlags) { 1156 assert((TargetFlags == 0 || isTarget) && 1157 "Cannot set target flags on target-independent globals"); 1158 if (Alignment == 0) 1159 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1160 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1161 FoldingSetNodeID ID; 1162 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1163 ID.AddInteger(Alignment); 1164 ID.AddInteger(Offset); 1165 C->addSelectionDAGCSEId(ID); 1166 ID.AddInteger(TargetFlags); 1167 void *IP = 0; 1168 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1169 return SDValue(E, 0); 1170 1171 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1172 Alignment, TargetFlags); 1173 CSEMap.InsertNode(N, IP); 1174 AllNodes.push_back(N); 1175 return SDValue(N, 0); 1176} 1177 1178SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1179 FoldingSetNodeID ID; 1180 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1181 ID.AddPointer(MBB); 1182 void *IP = 0; 1183 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1184 return SDValue(E, 0); 1185 1186 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1187 CSEMap.InsertNode(N, IP); 1188 AllNodes.push_back(N); 1189 return SDValue(N, 0); 1190} 1191 1192SDValue SelectionDAG::getValueType(EVT VT) { 1193 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1194 ValueTypeNodes.size()) 1195 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1196 1197 SDNode *&N = VT.isExtended() ? 1198 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1199 1200 if (N) return SDValue(N, 0); 1201 N = new (NodeAllocator) VTSDNode(VT); 1202 AllNodes.push_back(N); 1203 return SDValue(N, 0); 1204} 1205 1206SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1207 SDNode *&N = ExternalSymbols[Sym]; 1208 if (N) return SDValue(N, 0); 1209 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1210 AllNodes.push_back(N); 1211 return SDValue(N, 0); 1212} 1213 1214SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1215 unsigned char TargetFlags) { 1216 SDNode *&N = 1217 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1218 TargetFlags)]; 1219 if (N) return SDValue(N, 0); 1220 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1221 AllNodes.push_back(N); 1222 return SDValue(N, 0); 1223} 1224 1225SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1226 if ((unsigned)Cond >= CondCodeNodes.size()) 1227 CondCodeNodes.resize(Cond+1); 1228 1229 if (CondCodeNodes[Cond] == 0) { 1230 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1231 CondCodeNodes[Cond] = N; 1232 AllNodes.push_back(N); 1233 } 1234 1235 return SDValue(CondCodeNodes[Cond], 0); 1236} 1237 1238// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1239// the shuffle mask M that point at N1 to point at N2, and indices that point 1240// N2 to point at N1. 1241static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1242 std::swap(N1, N2); 1243 int NElts = M.size(); 1244 for (int i = 0; i != NElts; ++i) { 1245 if (M[i] >= NElts) 1246 M[i] -= NElts; 1247 else if (M[i] >= 0) 1248 M[i] += NElts; 1249 } 1250} 1251 1252SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1253 SDValue N2, const int *Mask) { 1254 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1255 assert(VT.isVector() && N1.getValueType().isVector() && 1256 "Vector Shuffle VTs must be a vectors"); 1257 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1258 && "Vector Shuffle VTs must have same element type"); 1259 1260 // Canonicalize shuffle undef, undef -> undef 1261 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1262 return getUNDEF(VT); 1263 1264 // Validate that all indices in Mask are within the range of the elements 1265 // input to the shuffle. 1266 unsigned NElts = VT.getVectorNumElements(); 1267 SmallVector<int, 8> MaskVec; 1268 for (unsigned i = 0; i != NElts; ++i) { 1269 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1270 MaskVec.push_back(Mask[i]); 1271 } 1272 1273 // Canonicalize shuffle v, v -> v, undef 1274 if (N1 == N2) { 1275 N2 = getUNDEF(VT); 1276 for (unsigned i = 0; i != NElts; ++i) 1277 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1278 } 1279 1280 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1281 if (N1.getOpcode() == ISD::UNDEF) 1282 commuteShuffle(N1, N2, MaskVec); 1283 1284 // Canonicalize all index into lhs, -> shuffle lhs, undef 1285 // Canonicalize all index into rhs, -> shuffle rhs, undef 1286 bool AllLHS = true, AllRHS = true; 1287 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1288 for (unsigned i = 0; i != NElts; ++i) { 1289 if (MaskVec[i] >= (int)NElts) { 1290 if (N2Undef) 1291 MaskVec[i] = -1; 1292 else 1293 AllLHS = false; 1294 } else if (MaskVec[i] >= 0) { 1295 AllRHS = false; 1296 } 1297 } 1298 if (AllLHS && AllRHS) 1299 return getUNDEF(VT); 1300 if (AllLHS && !N2Undef) 1301 N2 = getUNDEF(VT); 1302 if (AllRHS) { 1303 N1 = getUNDEF(VT); 1304 commuteShuffle(N1, N2, MaskVec); 1305 } 1306 1307 // If Identity shuffle, or all shuffle in to undef, return that node. 1308 bool AllUndef = true; 1309 bool Identity = true; 1310 for (unsigned i = 0; i != NElts; ++i) { 1311 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1312 if (MaskVec[i] >= 0) AllUndef = false; 1313 } 1314 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1315 return N1; 1316 if (AllUndef) 1317 return getUNDEF(VT); 1318 1319 FoldingSetNodeID ID; 1320 SDValue Ops[2] = { N1, N2 }; 1321 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1322 for (unsigned i = 0; i != NElts; ++i) 1323 ID.AddInteger(MaskVec[i]); 1324 1325 void* IP = 0; 1326 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1327 return SDValue(E, 0); 1328 1329 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1330 // SDNode doesn't have access to it. This memory will be "leaked" when 1331 // the node is deallocated, but recovered when the NodeAllocator is released. 1332 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1333 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1334 1335 ShuffleVectorSDNode *N = 1336 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1337 CSEMap.InsertNode(N, IP); 1338 AllNodes.push_back(N); 1339 return SDValue(N, 0); 1340} 1341 1342SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1343 SDValue Val, SDValue DTy, 1344 SDValue STy, SDValue Rnd, SDValue Sat, 1345 ISD::CvtCode Code) { 1346 // If the src and dest types are the same and the conversion is between 1347 // integer types of the same sign or two floats, no conversion is necessary. 1348 if (DTy == STy && 1349 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1350 return Val; 1351 1352 FoldingSetNodeID ID; 1353 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1354 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1355 void* IP = 0; 1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1357 return SDValue(E, 0); 1358 1359 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1360 Code); 1361 CSEMap.InsertNode(N, IP); 1362 AllNodes.push_back(N); 1363 return SDValue(N, 0); 1364} 1365 1366SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1367 FoldingSetNodeID ID; 1368 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1369 ID.AddInteger(RegNo); 1370 void *IP = 0; 1371 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1372 return SDValue(E, 0); 1373 1374 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1375 CSEMap.InsertNode(N, IP); 1376 AllNodes.push_back(N); 1377 return SDValue(N, 0); 1378} 1379 1380SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) { 1381 FoldingSetNodeID ID; 1382 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0); 1383 ID.AddPointer(RegMask); 1384 void *IP = 0; 1385 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1386 return SDValue(E, 0); 1387 1388 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask); 1389 CSEMap.InsertNode(N, IP); 1390 AllNodes.push_back(N); 1391 return SDValue(N, 0); 1392} 1393 1394SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1395 FoldingSetNodeID ID; 1396 SDValue Ops[] = { Root }; 1397 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1398 ID.AddPointer(Label); 1399 void *IP = 0; 1400 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1401 return SDValue(E, 0); 1402 1403 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1404 CSEMap.InsertNode(N, IP); 1405 AllNodes.push_back(N); 1406 return SDValue(N, 0); 1407} 1408 1409 1410SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1411 bool isTarget, 1412 unsigned char TargetFlags) { 1413 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1414 1415 FoldingSetNodeID ID; 1416 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1417 ID.AddPointer(BA); 1418 ID.AddInteger(TargetFlags); 1419 void *IP = 0; 1420 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1421 return SDValue(E, 0); 1422 1423 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1424 CSEMap.InsertNode(N, IP); 1425 AllNodes.push_back(N); 1426 return SDValue(N, 0); 1427} 1428 1429SDValue SelectionDAG::getSrcValue(const Value *V) { 1430 assert((!V || V->getType()->isPointerTy()) && 1431 "SrcValue is not a pointer?"); 1432 1433 FoldingSetNodeID ID; 1434 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1435 ID.AddPointer(V); 1436 1437 void *IP = 0; 1438 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1439 return SDValue(E, 0); 1440 1441 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1442 CSEMap.InsertNode(N, IP); 1443 AllNodes.push_back(N); 1444 return SDValue(N, 0); 1445} 1446 1447/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1448SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1449 FoldingSetNodeID ID; 1450 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1451 ID.AddPointer(MD); 1452 1453 void *IP = 0; 1454 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1455 return SDValue(E, 0); 1456 1457 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1458 CSEMap.InsertNode(N, IP); 1459 AllNodes.push_back(N); 1460 return SDValue(N, 0); 1461} 1462 1463 1464/// getShiftAmountOperand - Return the specified value casted to 1465/// the target's desired shift amount type. 1466SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1467 EVT OpTy = Op.getValueType(); 1468 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1469 if (OpTy == ShTy || OpTy.isVector()) return Op; 1470 1471 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1472 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1473} 1474 1475/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1476/// specified value type. 1477SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1478 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1479 unsigned ByteSize = VT.getStoreSize(); 1480 Type *Ty = VT.getTypeForEVT(*getContext()); 1481 unsigned StackAlign = 1482 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1483 1484 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1485 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1486} 1487 1488/// CreateStackTemporary - Create a stack temporary suitable for holding 1489/// either of the specified value types. 1490SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1491 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1492 VT2.getStoreSizeInBits())/8; 1493 Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1494 Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1495 const TargetData *TD = TLI.getTargetData(); 1496 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1497 TD->getPrefTypeAlignment(Ty2)); 1498 1499 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1500 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1501 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1502} 1503 1504SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1505 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1506 // These setcc operations always fold. 1507 switch (Cond) { 1508 default: break; 1509 case ISD::SETFALSE: 1510 case ISD::SETFALSE2: return getConstant(0, VT); 1511 case ISD::SETTRUE: 1512 case ISD::SETTRUE2: return getConstant(1, VT); 1513 1514 case ISD::SETOEQ: 1515 case ISD::SETOGT: 1516 case ISD::SETOGE: 1517 case ISD::SETOLT: 1518 case ISD::SETOLE: 1519 case ISD::SETONE: 1520 case ISD::SETO: 1521 case ISD::SETUO: 1522 case ISD::SETUEQ: 1523 case ISD::SETUNE: 1524 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1525 break; 1526 } 1527 1528 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1529 const APInt &C2 = N2C->getAPIntValue(); 1530 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1531 const APInt &C1 = N1C->getAPIntValue(); 1532 1533 switch (Cond) { 1534 default: llvm_unreachable("Unknown integer setcc!"); 1535 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1536 case ISD::SETNE: return getConstant(C1 != C2, VT); 1537 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1538 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1539 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1540 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1541 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1542 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1543 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1544 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1545 } 1546 } 1547 } 1548 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1549 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1550 // No compile time operations on this type yet. 1551 if (N1C->getValueType(0) == MVT::ppcf128) 1552 return SDValue(); 1553 1554 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1555 switch (Cond) { 1556 default: break; 1557 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1558 return getUNDEF(VT); 1559 // fall through 1560 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1561 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1562 return getUNDEF(VT); 1563 // fall through 1564 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1565 R==APFloat::cmpLessThan, VT); 1566 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1567 return getUNDEF(VT); 1568 // fall through 1569 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1570 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1571 return getUNDEF(VT); 1572 // fall through 1573 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1574 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1575 return getUNDEF(VT); 1576 // fall through 1577 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1578 R==APFloat::cmpEqual, VT); 1579 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1580 return getUNDEF(VT); 1581 // fall through 1582 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1583 R==APFloat::cmpEqual, VT); 1584 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1585 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1586 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1587 R==APFloat::cmpEqual, VT); 1588 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1589 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1590 R==APFloat::cmpLessThan, VT); 1591 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1592 R==APFloat::cmpUnordered, VT); 1593 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1594 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1595 } 1596 } else { 1597 // Ensure that the constant occurs on the RHS. 1598 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1599 } 1600 } 1601 1602 // Could not fold it. 1603 return SDValue(); 1604} 1605 1606/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1607/// use this predicate to simplify operations downstream. 1608bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1609 // This predicate is not safe for vector operations. 1610 if (Op.getValueType().isVector()) 1611 return false; 1612 1613 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1614 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1615} 1616 1617/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1618/// this predicate to simplify operations downstream. Mask is known to be zero 1619/// for bits that V cannot have. 1620bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1621 unsigned Depth) const { 1622 APInt KnownZero, KnownOne; 1623 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1624 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1625 return (KnownZero & Mask) == Mask; 1626} 1627 1628/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1629/// known to be either zero or one and return them in the KnownZero/KnownOne 1630/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1631/// processing. 1632void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1633 APInt &KnownZero, APInt &KnownOne, 1634 unsigned Depth) const { 1635 unsigned BitWidth = Mask.getBitWidth(); 1636 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1637 "Mask size mismatches value type size!"); 1638 1639 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1640 if (Depth == 6 || Mask == 0) 1641 return; // Limit search depth. 1642 1643 APInt KnownZero2, KnownOne2; 1644 1645 switch (Op.getOpcode()) { 1646 case ISD::Constant: 1647 // We know all of the bits for a constant! 1648 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1649 KnownZero = ~KnownOne & Mask; 1650 return; 1651 case ISD::AND: 1652 // If either the LHS or the RHS are Zero, the result is zero. 1653 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1654 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1655 KnownZero2, KnownOne2, Depth+1); 1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1657 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1658 1659 // Output known-1 bits are only known if set in both the LHS & RHS. 1660 KnownOne &= KnownOne2; 1661 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1662 KnownZero |= KnownZero2; 1663 return; 1664 case ISD::OR: 1665 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1666 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1667 KnownZero2, KnownOne2, Depth+1); 1668 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1669 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1670 1671 // Output known-0 bits are only known if clear in both the LHS & RHS. 1672 KnownZero &= KnownZero2; 1673 // Output known-1 are known to be set if set in either the LHS | RHS. 1674 KnownOne |= KnownOne2; 1675 return; 1676 case ISD::XOR: { 1677 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1678 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1679 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1680 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1681 1682 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1683 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1684 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1685 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1686 KnownZero = KnownZeroOut; 1687 return; 1688 } 1689 case ISD::MUL: { 1690 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1691 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1692 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1695 1696 // If low bits are zero in either operand, output low known-0 bits. 1697 // Also compute a conserative estimate for high known-0 bits. 1698 // More trickiness is possible, but this is sufficient for the 1699 // interesting case of alignment computation. 1700 KnownOne.clearAllBits(); 1701 unsigned TrailZ = KnownZero.countTrailingOnes() + 1702 KnownZero2.countTrailingOnes(); 1703 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1704 KnownZero2.countLeadingOnes(), 1705 BitWidth) - BitWidth; 1706 1707 TrailZ = std::min(TrailZ, BitWidth); 1708 LeadZ = std::min(LeadZ, BitWidth); 1709 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1710 APInt::getHighBitsSet(BitWidth, LeadZ); 1711 KnownZero &= Mask; 1712 return; 1713 } 1714 case ISD::UDIV: { 1715 // For the purposes of computing leading zeros we can conservatively 1716 // treat a udiv as a logical right shift by the power of 2 known to 1717 // be less than the denominator. 1718 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1719 ComputeMaskedBits(Op.getOperand(0), 1720 AllOnes, KnownZero2, KnownOne2, Depth+1); 1721 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1722 1723 KnownOne2.clearAllBits(); 1724 KnownZero2.clearAllBits(); 1725 ComputeMaskedBits(Op.getOperand(1), 1726 AllOnes, KnownZero2, KnownOne2, Depth+1); 1727 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1728 if (RHSUnknownLeadingOnes != BitWidth) 1729 LeadZ = std::min(BitWidth, 1730 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1731 1732 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1733 return; 1734 } 1735 case ISD::SELECT: 1736 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1737 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1738 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1739 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1740 1741 // Only known if known in both the LHS and RHS. 1742 KnownOne &= KnownOne2; 1743 KnownZero &= KnownZero2; 1744 return; 1745 case ISD::SELECT_CC: 1746 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1747 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1748 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1749 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1750 1751 // Only known if known in both the LHS and RHS. 1752 KnownOne &= KnownOne2; 1753 KnownZero &= KnownZero2; 1754 return; 1755 case ISD::SADDO: 1756 case ISD::UADDO: 1757 case ISD::SSUBO: 1758 case ISD::USUBO: 1759 case ISD::SMULO: 1760 case ISD::UMULO: 1761 if (Op.getResNo() != 1) 1762 return; 1763 // The boolean result conforms to getBooleanContents. Fall through. 1764 case ISD::SETCC: 1765 // If we know the result of a setcc has the top bits zero, use this info. 1766 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 1767 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1) 1768 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1769 return; 1770 case ISD::SHL: 1771 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1772 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1773 unsigned ShAmt = SA->getZExtValue(); 1774 1775 // If the shift count is an invalid immediate, don't do anything. 1776 if (ShAmt >= BitWidth) 1777 return; 1778 1779 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1780 KnownZero, KnownOne, Depth+1); 1781 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1782 KnownZero <<= ShAmt; 1783 KnownOne <<= ShAmt; 1784 // low bits known zero. 1785 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1786 } 1787 return; 1788 case ISD::SRL: 1789 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1790 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1791 unsigned ShAmt = SA->getZExtValue(); 1792 1793 // If the shift count is an invalid immediate, don't do anything. 1794 if (ShAmt >= BitWidth) 1795 return; 1796 1797 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1798 KnownZero, KnownOne, Depth+1); 1799 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1800 KnownZero = KnownZero.lshr(ShAmt); 1801 KnownOne = KnownOne.lshr(ShAmt); 1802 1803 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1804 KnownZero |= HighBits; // High bits known zero. 1805 } 1806 return; 1807 case ISD::SRA: 1808 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1809 unsigned ShAmt = SA->getZExtValue(); 1810 1811 // If the shift count is an invalid immediate, don't do anything. 1812 if (ShAmt >= BitWidth) 1813 return; 1814 1815 APInt InDemandedMask = (Mask << ShAmt); 1816 // If any of the demanded bits are produced by the sign extension, we also 1817 // demand the input sign bit. 1818 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1819 if (HighBits.getBoolValue()) 1820 InDemandedMask |= APInt::getSignBit(BitWidth); 1821 1822 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1823 Depth+1); 1824 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1825 KnownZero = KnownZero.lshr(ShAmt); 1826 KnownOne = KnownOne.lshr(ShAmt); 1827 1828 // Handle the sign bits. 1829 APInt SignBit = APInt::getSignBit(BitWidth); 1830 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1831 1832 if (KnownZero.intersects(SignBit)) { 1833 KnownZero |= HighBits; // New bits are known zero. 1834 } else if (KnownOne.intersects(SignBit)) { 1835 KnownOne |= HighBits; // New bits are known one. 1836 } 1837 } 1838 return; 1839 case ISD::SIGN_EXTEND_INREG: { 1840 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1841 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1842 1843 // Sign extension. Compute the demanded bits in the result that are not 1844 // present in the input. 1845 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1846 1847 APInt InSignBit = APInt::getSignBit(EBits); 1848 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1849 1850 // If the sign extended bits are demanded, we know that the sign 1851 // bit is demanded. 1852 InSignBit = InSignBit.zext(BitWidth); 1853 if (NewBits.getBoolValue()) 1854 InputDemandedBits |= InSignBit; 1855 1856 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1857 KnownZero, KnownOne, Depth+1); 1858 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1859 1860 // If the sign bit of the input is known set or clear, then we know the 1861 // top bits of the result. 1862 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1863 KnownZero |= NewBits; 1864 KnownOne &= ~NewBits; 1865 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1866 KnownOne |= NewBits; 1867 KnownZero &= ~NewBits; 1868 } else { // Input sign bit unknown 1869 KnownZero &= ~NewBits; 1870 KnownOne &= ~NewBits; 1871 } 1872 return; 1873 } 1874 case ISD::CTTZ: 1875 case ISD::CTTZ_ZERO_UNDEF: 1876 case ISD::CTLZ: 1877 case ISD::CTLZ_ZERO_UNDEF: 1878 case ISD::CTPOP: { 1879 unsigned LowBits = Log2_32(BitWidth)+1; 1880 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1881 KnownOne.clearAllBits(); 1882 return; 1883 } 1884 case ISD::LOAD: { 1885 if (ISD::isZEXTLoad(Op.getNode())) { 1886 LoadSDNode *LD = cast<LoadSDNode>(Op); 1887 EVT VT = LD->getMemoryVT(); 1888 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1889 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1890 } 1891 return; 1892 } 1893 case ISD::ZERO_EXTEND: { 1894 EVT InVT = Op.getOperand(0).getValueType(); 1895 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1896 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1897 APInt InMask = Mask.trunc(InBits); 1898 KnownZero = KnownZero.trunc(InBits); 1899 KnownOne = KnownOne.trunc(InBits); 1900 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1901 KnownZero = KnownZero.zext(BitWidth); 1902 KnownOne = KnownOne.zext(BitWidth); 1903 KnownZero |= NewBits; 1904 return; 1905 } 1906 case ISD::SIGN_EXTEND: { 1907 EVT InVT = Op.getOperand(0).getValueType(); 1908 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1909 APInt InSignBit = APInt::getSignBit(InBits); 1910 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1911 APInt InMask = Mask.trunc(InBits); 1912 1913 // If any of the sign extended bits are demanded, we know that the sign 1914 // bit is demanded. Temporarily set this bit in the mask for our callee. 1915 if (NewBits.getBoolValue()) 1916 InMask |= InSignBit; 1917 1918 KnownZero = KnownZero.trunc(InBits); 1919 KnownOne = KnownOne.trunc(InBits); 1920 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1921 1922 // Note if the sign bit is known to be zero or one. 1923 bool SignBitKnownZero = KnownZero.isNegative(); 1924 bool SignBitKnownOne = KnownOne.isNegative(); 1925 assert(!(SignBitKnownZero && SignBitKnownOne) && 1926 "Sign bit can't be known to be both zero and one!"); 1927 1928 // If the sign bit wasn't actually demanded by our caller, we don't 1929 // want it set in the KnownZero and KnownOne result values. Reset the 1930 // mask and reapply it to the result values. 1931 InMask = Mask.trunc(InBits); 1932 KnownZero &= InMask; 1933 KnownOne &= InMask; 1934 1935 KnownZero = KnownZero.zext(BitWidth); 1936 KnownOne = KnownOne.zext(BitWidth); 1937 1938 // If the sign bit is known zero or one, the top bits match. 1939 if (SignBitKnownZero) 1940 KnownZero |= NewBits; 1941 else if (SignBitKnownOne) 1942 KnownOne |= NewBits; 1943 return; 1944 } 1945 case ISD::ANY_EXTEND: { 1946 EVT InVT = Op.getOperand(0).getValueType(); 1947 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1948 APInt InMask = Mask.trunc(InBits); 1949 KnownZero = KnownZero.trunc(InBits); 1950 KnownOne = KnownOne.trunc(InBits); 1951 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1952 KnownZero = KnownZero.zext(BitWidth); 1953 KnownOne = KnownOne.zext(BitWidth); 1954 return; 1955 } 1956 case ISD::TRUNCATE: { 1957 EVT InVT = Op.getOperand(0).getValueType(); 1958 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1959 APInt InMask = Mask.zext(InBits); 1960 KnownZero = KnownZero.zext(InBits); 1961 KnownOne = KnownOne.zext(InBits); 1962 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1963 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1964 KnownZero = KnownZero.trunc(BitWidth); 1965 KnownOne = KnownOne.trunc(BitWidth); 1966 break; 1967 } 1968 case ISD::AssertZext: { 1969 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1970 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1971 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1972 KnownOne, Depth+1); 1973 KnownZero |= (~InMask) & Mask; 1974 return; 1975 } 1976 case ISD::FGETSIGN: 1977 // All bits are zero except the low bit. 1978 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1979 return; 1980 1981 case ISD::SUB: { 1982 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1983 // We know that the top bits of C-X are clear if X contains less bits 1984 // than C (i.e. no wrap-around can happen). For example, 20-X is 1985 // positive if we can prove that X is >= 0 and < 16. 1986 if (CLHS->getAPIntValue().isNonNegative()) { 1987 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1988 // NLZ can't be BitWidth with no sign bit 1989 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1990 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1991 Depth+1); 1992 1993 // If all of the MaskV bits are known to be zero, then we know the 1994 // output top bits are zero, because we now know that the output is 1995 // from [0-C]. 1996 if ((KnownZero2 & MaskV) == MaskV) { 1997 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1998 // Top bits known zero. 1999 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 2000 } 2001 } 2002 } 2003 } 2004 // fall through 2005 case ISD::ADD: 2006 case ISD::ADDE: { 2007 // Output known-0 bits are known if clear or set in both the low clear bits 2008 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 2009 // low 3 bits clear. 2010 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 2011 BitWidth - Mask.countLeadingZeros()); 2012 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 2013 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2014 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 2015 2016 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 2017 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 2018 KnownZeroOut = std::min(KnownZeroOut, 2019 KnownZero2.countTrailingOnes()); 2020 2021 if (Op.getOpcode() == ISD::ADD) { 2022 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 2023 return; 2024 } 2025 2026 // With ADDE, a carry bit may be added in, so we can only use this 2027 // information if we know (at least) that the low two bits are clear. We 2028 // then return to the caller that the low bit is unknown but that other bits 2029 // are known zero. 2030 if (KnownZeroOut >= 2) // ADDE 2031 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 2032 return; 2033 } 2034 case ISD::SREM: 2035 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2036 const APInt &RA = Rem->getAPIntValue().abs(); 2037 if (RA.isPowerOf2()) { 2038 APInt LowBits = RA - 1; 2039 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 2040 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 2041 2042 // The low bits of the first operand are unchanged by the srem. 2043 KnownZero = KnownZero2 & LowBits; 2044 KnownOne = KnownOne2 & LowBits; 2045 2046 // If the first operand is non-negative or has all low bits zero, then 2047 // the upper bits are all zero. 2048 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2049 KnownZero |= ~LowBits; 2050 2051 // If the first operand is negative and not all low bits are zero, then 2052 // the upper bits are all one. 2053 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2054 KnownOne |= ~LowBits; 2055 2056 KnownZero &= Mask; 2057 KnownOne &= Mask; 2058 2059 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2060 } 2061 } 2062 return; 2063 case ISD::UREM: { 2064 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2065 const APInt &RA = Rem->getAPIntValue(); 2066 if (RA.isPowerOf2()) { 2067 APInt LowBits = (RA - 1); 2068 APInt Mask2 = LowBits & Mask; 2069 KnownZero |= ~LowBits & Mask; 2070 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 2071 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2072 break; 2073 } 2074 } 2075 2076 // Since the result is less than or equal to either operand, any leading 2077 // zero bits in either operand must also exist in the result. 2078 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 2079 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 2080 Depth+1); 2081 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 2082 Depth+1); 2083 2084 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2085 KnownZero2.countLeadingOnes()); 2086 KnownOne.clearAllBits(); 2087 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2088 return; 2089 } 2090 case ISD::FrameIndex: 2091 case ISD::TargetFrameIndex: 2092 if (unsigned Align = InferPtrAlignment(Op)) { 2093 // The low bits are known zero if the pointer is aligned. 2094 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2095 return; 2096 } 2097 break; 2098 2099 default: 2100 if (Op.getOpcode() < ISD::BUILTIN_OP_END) 2101 break; 2102 // Fallthrough 2103 case ISD::INTRINSIC_WO_CHAIN: 2104 case ISD::INTRINSIC_W_CHAIN: 2105 case ISD::INTRINSIC_VOID: 2106 // Allow the target to implement this method for its nodes. 2107 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2108 Depth); 2109 return; 2110 } 2111} 2112 2113/// ComputeNumSignBits - Return the number of times the sign bit of the 2114/// register is replicated into the other bits. We know that at least 1 bit 2115/// is always equal to the sign bit (itself), but other cases can give us 2116/// information. For example, immediately after an "SRA X, 2", we know that 2117/// the top 3 bits are all equal to each other, so we return 3. 2118unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2119 EVT VT = Op.getValueType(); 2120 assert(VT.isInteger() && "Invalid VT!"); 2121 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2122 unsigned Tmp, Tmp2; 2123 unsigned FirstAnswer = 1; 2124 2125 if (Depth == 6) 2126 return 1; // Limit search depth. 2127 2128 switch (Op.getOpcode()) { 2129 default: break; 2130 case ISD::AssertSext: 2131 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2132 return VTBits-Tmp+1; 2133 case ISD::AssertZext: 2134 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2135 return VTBits-Tmp; 2136 2137 case ISD::Constant: { 2138 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2139 return Val.getNumSignBits(); 2140 } 2141 2142 case ISD::SIGN_EXTEND: 2143 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2144 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2145 2146 case ISD::SIGN_EXTEND_INREG: 2147 // Max of the input and what this extends. 2148 Tmp = 2149 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2150 Tmp = VTBits-Tmp+1; 2151 2152 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2153 return std::max(Tmp, Tmp2); 2154 2155 case ISD::SRA: 2156 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2157 // SRA X, C -> adds C sign bits. 2158 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2159 Tmp += C->getZExtValue(); 2160 if (Tmp > VTBits) Tmp = VTBits; 2161 } 2162 return Tmp; 2163 case ISD::SHL: 2164 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2165 // shl destroys sign bits. 2166 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2167 if (C->getZExtValue() >= VTBits || // Bad shift. 2168 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2169 return Tmp - C->getZExtValue(); 2170 } 2171 break; 2172 case ISD::AND: 2173 case ISD::OR: 2174 case ISD::XOR: // NOT is handled here. 2175 // Logical binary ops preserve the number of sign bits at the worst. 2176 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2177 if (Tmp != 1) { 2178 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2179 FirstAnswer = std::min(Tmp, Tmp2); 2180 // We computed what we know about the sign bits as our first 2181 // answer. Now proceed to the generic code that uses 2182 // ComputeMaskedBits, and pick whichever answer is better. 2183 } 2184 break; 2185 2186 case ISD::SELECT: 2187 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2188 if (Tmp == 1) return 1; // Early out. 2189 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2190 return std::min(Tmp, Tmp2); 2191 2192 case ISD::SADDO: 2193 case ISD::UADDO: 2194 case ISD::SSUBO: 2195 case ISD::USUBO: 2196 case ISD::SMULO: 2197 case ISD::UMULO: 2198 if (Op.getResNo() != 1) 2199 break; 2200 // The boolean result conforms to getBooleanContents. Fall through. 2201 case ISD::SETCC: 2202 // If setcc returns 0/-1, all bits are sign bits. 2203 if (TLI.getBooleanContents(Op.getValueType().isVector()) == 2204 TargetLowering::ZeroOrNegativeOneBooleanContent) 2205 return VTBits; 2206 break; 2207 case ISD::ROTL: 2208 case ISD::ROTR: 2209 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2210 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2211 2212 // Handle rotate right by N like a rotate left by 32-N. 2213 if (Op.getOpcode() == ISD::ROTR) 2214 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2215 2216 // If we aren't rotating out all of the known-in sign bits, return the 2217 // number that are left. This handles rotl(sext(x), 1) for example. 2218 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2219 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2220 } 2221 break; 2222 case ISD::ADD: 2223 // Add can have at most one carry bit. Thus we know that the output 2224 // is, at worst, one more bit than the inputs. 2225 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2226 if (Tmp == 1) return 1; // Early out. 2227 2228 // Special case decrementing a value (ADD X, -1): 2229 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2230 if (CRHS->isAllOnesValue()) { 2231 APInt KnownZero, KnownOne; 2232 APInt Mask = APInt::getAllOnesValue(VTBits); 2233 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2234 2235 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2236 // sign bits set. 2237 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2238 return VTBits; 2239 2240 // If we are subtracting one from a positive number, there is no carry 2241 // out of the result. 2242 if (KnownZero.isNegative()) 2243 return Tmp; 2244 } 2245 2246 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2247 if (Tmp2 == 1) return 1; 2248 return std::min(Tmp, Tmp2)-1; 2249 2250 case ISD::SUB: 2251 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2252 if (Tmp2 == 1) return 1; 2253 2254 // Handle NEG. 2255 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2256 if (CLHS->isNullValue()) { 2257 APInt KnownZero, KnownOne; 2258 APInt Mask = APInt::getAllOnesValue(VTBits); 2259 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2260 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2261 // sign bits set. 2262 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2263 return VTBits; 2264 2265 // If the input is known to be positive (the sign bit is known clear), 2266 // the output of the NEG has the same number of sign bits as the input. 2267 if (KnownZero.isNegative()) 2268 return Tmp2; 2269 2270 // Otherwise, we treat this like a SUB. 2271 } 2272 2273 // Sub can have at most one carry bit. Thus we know that the output 2274 // is, at worst, one more bit than the inputs. 2275 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2276 if (Tmp == 1) return 1; // Early out. 2277 return std::min(Tmp, Tmp2)-1; 2278 case ISD::TRUNCATE: 2279 // FIXME: it's tricky to do anything useful for this, but it is an important 2280 // case for targets like X86. 2281 break; 2282 } 2283 2284 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2285 if (Op.getOpcode() == ISD::LOAD) { 2286 LoadSDNode *LD = cast<LoadSDNode>(Op); 2287 unsigned ExtType = LD->getExtensionType(); 2288 switch (ExtType) { 2289 default: break; 2290 case ISD::SEXTLOAD: // '17' bits known 2291 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2292 return VTBits-Tmp+1; 2293 case ISD::ZEXTLOAD: // '16' bits known 2294 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2295 return VTBits-Tmp; 2296 } 2297 } 2298 2299 // Allow the target to implement this method for its nodes. 2300 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2301 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2302 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2303 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2304 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2305 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2306 } 2307 2308 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2309 // use this information. 2310 APInt KnownZero, KnownOne; 2311 APInt Mask = APInt::getAllOnesValue(VTBits); 2312 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2313 2314 if (KnownZero.isNegative()) { // sign bit is 0 2315 Mask = KnownZero; 2316 } else if (KnownOne.isNegative()) { // sign bit is 1; 2317 Mask = KnownOne; 2318 } else { 2319 // Nothing known. 2320 return FirstAnswer; 2321 } 2322 2323 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2324 // the number of identical bits in the top of the input value. 2325 Mask = ~Mask; 2326 Mask <<= Mask.getBitWidth()-VTBits; 2327 // Return # leading zeros. We use 'min' here in case Val was zero before 2328 // shifting. We don't want to return '64' as for an i32 "0". 2329 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2330} 2331 2332/// isBaseWithConstantOffset - Return true if the specified operand is an 2333/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2334/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2335/// semantics as an ADD. This handles the equivalence: 2336/// X|Cst == X+Cst iff X&Cst = 0. 2337bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2338 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2339 !isa<ConstantSDNode>(Op.getOperand(1))) 2340 return false; 2341 2342 if (Op.getOpcode() == ISD::OR && 2343 !MaskedValueIsZero(Op.getOperand(0), 2344 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2345 return false; 2346 2347 return true; 2348} 2349 2350 2351bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2352 // If we're told that NaNs won't happen, assume they won't. 2353 if (getTarget().Options.NoNaNsFPMath) 2354 return true; 2355 2356 // If the value is a constant, we can obviously see if it is a NaN or not. 2357 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2358 return !C->getValueAPF().isNaN(); 2359 2360 // TODO: Recognize more cases here. 2361 2362 return false; 2363} 2364 2365bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2366 // If the value is a constant, we can obviously see if it is a zero or not. 2367 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2368 return !C->isZero(); 2369 2370 // TODO: Recognize more cases here. 2371 switch (Op.getOpcode()) { 2372 default: break; 2373 case ISD::OR: 2374 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2375 return !C->isNullValue(); 2376 break; 2377 } 2378 2379 return false; 2380} 2381 2382bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2383 // Check the obvious case. 2384 if (A == B) return true; 2385 2386 // For for negative and positive zero. 2387 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2388 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2389 if (CA->isZero() && CB->isZero()) return true; 2390 2391 // Otherwise they may not be equal. 2392 return false; 2393} 2394 2395/// getNode - Gets or creates the specified node. 2396/// 2397SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2398 FoldingSetNodeID ID; 2399 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2400 void *IP = 0; 2401 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2402 return SDValue(E, 0); 2403 2404 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2405 CSEMap.InsertNode(N, IP); 2406 2407 AllNodes.push_back(N); 2408#ifndef NDEBUG 2409 VerifySDNode(N); 2410#endif 2411 return SDValue(N, 0); 2412} 2413 2414SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2415 EVT VT, SDValue Operand) { 2416 // Constant fold unary operations with an integer constant operand. 2417 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2418 const APInt &Val = C->getAPIntValue(); 2419 switch (Opcode) { 2420 default: break; 2421 case ISD::SIGN_EXTEND: 2422 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2423 case ISD::ANY_EXTEND: 2424 case ISD::ZERO_EXTEND: 2425 case ISD::TRUNCATE: 2426 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2427 case ISD::UINT_TO_FP: 2428 case ISD::SINT_TO_FP: { 2429 // No compile time operations on ppcf128. 2430 if (VT == MVT::ppcf128) break; 2431 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2432 (void)apf.convertFromAPInt(Val, 2433 Opcode==ISD::SINT_TO_FP, 2434 APFloat::rmNearestTiesToEven); 2435 return getConstantFP(apf, VT); 2436 } 2437 case ISD::BITCAST: 2438 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2439 return getConstantFP(Val.bitsToFloat(), VT); 2440 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2441 return getConstantFP(Val.bitsToDouble(), VT); 2442 break; 2443 case ISD::BSWAP: 2444 return getConstant(Val.byteSwap(), VT); 2445 case ISD::CTPOP: 2446 return getConstant(Val.countPopulation(), VT); 2447 case ISD::CTLZ: 2448 case ISD::CTLZ_ZERO_UNDEF: 2449 return getConstant(Val.countLeadingZeros(), VT); 2450 case ISD::CTTZ: 2451 case ISD::CTTZ_ZERO_UNDEF: 2452 return getConstant(Val.countTrailingZeros(), VT); 2453 } 2454 } 2455 2456 // Constant fold unary operations with a floating point constant operand. 2457 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2458 APFloat V = C->getValueAPF(); // make copy 2459 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2460 switch (Opcode) { 2461 case ISD::FNEG: 2462 V.changeSign(); 2463 return getConstantFP(V, VT); 2464 case ISD::FABS: 2465 V.clearSign(); 2466 return getConstantFP(V, VT); 2467 case ISD::FP_ROUND: 2468 case ISD::FP_EXTEND: { 2469 bool ignored; 2470 // This can return overflow, underflow, or inexact; we don't care. 2471 // FIXME need to be more flexible about rounding mode. 2472 (void)V.convert(*EVTToAPFloatSemantics(VT), 2473 APFloat::rmNearestTiesToEven, &ignored); 2474 return getConstantFP(V, VT); 2475 } 2476 case ISD::FP_TO_SINT: 2477 case ISD::FP_TO_UINT: { 2478 integerPart x[2]; 2479 bool ignored; 2480 assert(integerPartWidth >= 64); 2481 // FIXME need to be more flexible about rounding mode. 2482 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2483 Opcode==ISD::FP_TO_SINT, 2484 APFloat::rmTowardZero, &ignored); 2485 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2486 break; 2487 APInt api(VT.getSizeInBits(), x); 2488 return getConstant(api, VT); 2489 } 2490 case ISD::BITCAST: 2491 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2492 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2493 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2494 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2495 break; 2496 } 2497 } 2498 } 2499 2500 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2501 switch (Opcode) { 2502 case ISD::TokenFactor: 2503 case ISD::MERGE_VALUES: 2504 case ISD::CONCAT_VECTORS: 2505 return Operand; // Factor, merge or concat of one node? No need. 2506 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2507 case ISD::FP_EXTEND: 2508 assert(VT.isFloatingPoint() && 2509 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2510 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2511 assert((!VT.isVector() || 2512 VT.getVectorNumElements() == 2513 Operand.getValueType().getVectorNumElements()) && 2514 "Vector element count mismatch!"); 2515 if (Operand.getOpcode() == ISD::UNDEF) 2516 return getUNDEF(VT); 2517 break; 2518 case ISD::SIGN_EXTEND: 2519 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2520 "Invalid SIGN_EXTEND!"); 2521 if (Operand.getValueType() == VT) return Operand; // noop extension 2522 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2523 "Invalid sext node, dst < src!"); 2524 assert((!VT.isVector() || 2525 VT.getVectorNumElements() == 2526 Operand.getValueType().getVectorNumElements()) && 2527 "Vector element count mismatch!"); 2528 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2529 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2530 else if (OpOpcode == ISD::UNDEF) 2531 // sext(undef) = 0, because the top bits will all be the same. 2532 return getConstant(0, VT); 2533 break; 2534 case ISD::ZERO_EXTEND: 2535 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2536 "Invalid ZERO_EXTEND!"); 2537 if (Operand.getValueType() == VT) return Operand; // noop extension 2538 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2539 "Invalid zext node, dst < src!"); 2540 assert((!VT.isVector() || 2541 VT.getVectorNumElements() == 2542 Operand.getValueType().getVectorNumElements()) && 2543 "Vector element count mismatch!"); 2544 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2545 return getNode(ISD::ZERO_EXTEND, DL, VT, 2546 Operand.getNode()->getOperand(0)); 2547 else if (OpOpcode == ISD::UNDEF) 2548 // zext(undef) = 0, because the top bits will be zero. 2549 return getConstant(0, VT); 2550 break; 2551 case ISD::ANY_EXTEND: 2552 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2553 "Invalid ANY_EXTEND!"); 2554 if (Operand.getValueType() == VT) return Operand; // noop extension 2555 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2556 "Invalid anyext node, dst < src!"); 2557 assert((!VT.isVector() || 2558 VT.getVectorNumElements() == 2559 Operand.getValueType().getVectorNumElements()) && 2560 "Vector element count mismatch!"); 2561 2562 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2563 OpOpcode == ISD::ANY_EXTEND) 2564 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2565 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2566 else if (OpOpcode == ISD::UNDEF) 2567 return getUNDEF(VT); 2568 2569 // (ext (trunx x)) -> x 2570 if (OpOpcode == ISD::TRUNCATE) { 2571 SDValue OpOp = Operand.getNode()->getOperand(0); 2572 if (OpOp.getValueType() == VT) 2573 return OpOp; 2574 } 2575 break; 2576 case ISD::TRUNCATE: 2577 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2578 "Invalid TRUNCATE!"); 2579 if (Operand.getValueType() == VT) return Operand; // noop truncate 2580 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2581 "Invalid truncate node, src < dst!"); 2582 assert((!VT.isVector() || 2583 VT.getVectorNumElements() == 2584 Operand.getValueType().getVectorNumElements()) && 2585 "Vector element count mismatch!"); 2586 if (OpOpcode == ISD::TRUNCATE) 2587 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2588 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2589 OpOpcode == ISD::ANY_EXTEND) { 2590 // If the source is smaller than the dest, we still need an extend. 2591 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2592 .bitsLT(VT.getScalarType())) 2593 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2594 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2595 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2596 return Operand.getNode()->getOperand(0); 2597 } 2598 if (OpOpcode == ISD::UNDEF) 2599 return getUNDEF(VT); 2600 break; 2601 case ISD::BITCAST: 2602 // Basic sanity checking. 2603 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2604 && "Cannot BITCAST between types of different sizes!"); 2605 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2606 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2607 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2608 if (OpOpcode == ISD::UNDEF) 2609 return getUNDEF(VT); 2610 break; 2611 case ISD::SCALAR_TO_VECTOR: 2612 assert(VT.isVector() && !Operand.getValueType().isVector() && 2613 (VT.getVectorElementType() == Operand.getValueType() || 2614 (VT.getVectorElementType().isInteger() && 2615 Operand.getValueType().isInteger() && 2616 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2617 "Illegal SCALAR_TO_VECTOR node!"); 2618 if (OpOpcode == ISD::UNDEF) 2619 return getUNDEF(VT); 2620 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2621 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2622 isa<ConstantSDNode>(Operand.getOperand(1)) && 2623 Operand.getConstantOperandVal(1) == 0 && 2624 Operand.getOperand(0).getValueType() == VT) 2625 return Operand.getOperand(0); 2626 break; 2627 case ISD::FNEG: 2628 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2629 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB) 2630 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2631 Operand.getNode()->getOperand(0)); 2632 if (OpOpcode == ISD::FNEG) // --X -> X 2633 return Operand.getNode()->getOperand(0); 2634 break; 2635 case ISD::FABS: 2636 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2637 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2638 break; 2639 } 2640 2641 SDNode *N; 2642 SDVTList VTs = getVTList(VT); 2643 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2644 FoldingSetNodeID ID; 2645 SDValue Ops[1] = { Operand }; 2646 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2647 void *IP = 0; 2648 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2649 return SDValue(E, 0); 2650 2651 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2652 CSEMap.InsertNode(N, IP); 2653 } else { 2654 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2655 } 2656 2657 AllNodes.push_back(N); 2658#ifndef NDEBUG 2659 VerifySDNode(N); 2660#endif 2661 return SDValue(N, 0); 2662} 2663 2664SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2665 EVT VT, 2666 ConstantSDNode *Cst1, 2667 ConstantSDNode *Cst2) { 2668 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2669 2670 switch (Opcode) { 2671 case ISD::ADD: return getConstant(C1 + C2, VT); 2672 case ISD::SUB: return getConstant(C1 - C2, VT); 2673 case ISD::MUL: return getConstant(C1 * C2, VT); 2674 case ISD::UDIV: 2675 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2676 break; 2677 case ISD::UREM: 2678 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2679 break; 2680 case ISD::SDIV: 2681 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2682 break; 2683 case ISD::SREM: 2684 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2685 break; 2686 case ISD::AND: return getConstant(C1 & C2, VT); 2687 case ISD::OR: return getConstant(C1 | C2, VT); 2688 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2689 case ISD::SHL: return getConstant(C1 << C2, VT); 2690 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2691 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2692 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2693 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2694 default: break; 2695 } 2696 2697 return SDValue(); 2698} 2699 2700SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2701 SDValue N1, SDValue N2) { 2702 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2703 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2704 switch (Opcode) { 2705 default: break; 2706 case ISD::TokenFactor: 2707 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2708 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2709 // Fold trivial token factors. 2710 if (N1.getOpcode() == ISD::EntryToken) return N2; 2711 if (N2.getOpcode() == ISD::EntryToken) return N1; 2712 if (N1 == N2) return N1; 2713 break; 2714 case ISD::CONCAT_VECTORS: 2715 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2716 // one big BUILD_VECTOR. 2717 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2718 N2.getOpcode() == ISD::BUILD_VECTOR) { 2719 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2720 N1.getNode()->op_end()); 2721 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2722 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2723 } 2724 break; 2725 case ISD::AND: 2726 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2727 assert(N1.getValueType() == N2.getValueType() && 2728 N1.getValueType() == VT && "Binary operator types must match!"); 2729 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2730 // worth handling here. 2731 if (N2C && N2C->isNullValue()) 2732 return N2; 2733 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2734 return N1; 2735 break; 2736 case ISD::OR: 2737 case ISD::XOR: 2738 case ISD::ADD: 2739 case ISD::SUB: 2740 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2741 assert(N1.getValueType() == N2.getValueType() && 2742 N1.getValueType() == VT && "Binary operator types must match!"); 2743 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2744 // it's worth handling here. 2745 if (N2C && N2C->isNullValue()) 2746 return N1; 2747 break; 2748 case ISD::UDIV: 2749 case ISD::UREM: 2750 case ISD::MULHU: 2751 case ISD::MULHS: 2752 case ISD::MUL: 2753 case ISD::SDIV: 2754 case ISD::SREM: 2755 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2756 assert(N1.getValueType() == N2.getValueType() && 2757 N1.getValueType() == VT && "Binary operator types must match!"); 2758 break; 2759 case ISD::FADD: 2760 case ISD::FSUB: 2761 case ISD::FMUL: 2762 case ISD::FDIV: 2763 case ISD::FREM: 2764 if (getTarget().Options.UnsafeFPMath) { 2765 if (Opcode == ISD::FADD) { 2766 // 0+x --> x 2767 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2768 if (CFP->getValueAPF().isZero()) 2769 return N2; 2770 // x+0 --> x 2771 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2772 if (CFP->getValueAPF().isZero()) 2773 return N1; 2774 } else if (Opcode == ISD::FSUB) { 2775 // x-0 --> x 2776 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2777 if (CFP->getValueAPF().isZero()) 2778 return N1; 2779 } 2780 } 2781 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2782 assert(N1.getValueType() == N2.getValueType() && 2783 N1.getValueType() == VT && "Binary operator types must match!"); 2784 break; 2785 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2786 assert(N1.getValueType() == VT && 2787 N1.getValueType().isFloatingPoint() && 2788 N2.getValueType().isFloatingPoint() && 2789 "Invalid FCOPYSIGN!"); 2790 break; 2791 case ISD::SHL: 2792 case ISD::SRA: 2793 case ISD::SRL: 2794 case ISD::ROTL: 2795 case ISD::ROTR: 2796 assert(VT == N1.getValueType() && 2797 "Shift operators return type must be the same as their first arg"); 2798 assert(VT.isInteger() && N2.getValueType().isInteger() && 2799 "Shifts only work on integers"); 2800 // Verify that the shift amount VT is bit enough to hold valid shift 2801 // amounts. This catches things like trying to shift an i1024 value by an 2802 // i8, which is easy to fall into in generic code that uses 2803 // TLI.getShiftAmount(). 2804 assert(N2.getValueType().getSizeInBits() >= 2805 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2806 "Invalid use of small shift amount with oversized value!"); 2807 2808 // Always fold shifts of i1 values so the code generator doesn't need to 2809 // handle them. Since we know the size of the shift has to be less than the 2810 // size of the value, the shift/rotate count is guaranteed to be zero. 2811 if (VT == MVT::i1) 2812 return N1; 2813 if (N2C && N2C->isNullValue()) 2814 return N1; 2815 break; 2816 case ISD::FP_ROUND_INREG: { 2817 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2818 assert(VT == N1.getValueType() && "Not an inreg round!"); 2819 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2820 "Cannot FP_ROUND_INREG integer types"); 2821 assert(EVT.isVector() == VT.isVector() && 2822 "FP_ROUND_INREG type should be vector iff the operand " 2823 "type is vector!"); 2824 assert((!EVT.isVector() || 2825 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2826 "Vector element counts must match in FP_ROUND_INREG"); 2827 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2828 (void)EVT; 2829 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2830 break; 2831 } 2832 case ISD::FP_ROUND: 2833 assert(VT.isFloatingPoint() && 2834 N1.getValueType().isFloatingPoint() && 2835 VT.bitsLE(N1.getValueType()) && 2836 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2837 if (N1.getValueType() == VT) return N1; // noop conversion. 2838 break; 2839 case ISD::AssertSext: 2840 case ISD::AssertZext: { 2841 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2842 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2843 assert(VT.isInteger() && EVT.isInteger() && 2844 "Cannot *_EXTEND_INREG FP types"); 2845 assert(!EVT.isVector() && 2846 "AssertSExt/AssertZExt type should be the vector element type " 2847 "rather than the vector type!"); 2848 assert(EVT.bitsLE(VT) && "Not extending!"); 2849 if (VT == EVT) return N1; // noop assertion. 2850 break; 2851 } 2852 case ISD::SIGN_EXTEND_INREG: { 2853 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2854 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2855 assert(VT.isInteger() && EVT.isInteger() && 2856 "Cannot *_EXTEND_INREG FP types"); 2857 assert(EVT.isVector() == VT.isVector() && 2858 "SIGN_EXTEND_INREG type should be vector iff the operand " 2859 "type is vector!"); 2860 assert((!EVT.isVector() || 2861 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2862 "Vector element counts must match in SIGN_EXTEND_INREG"); 2863 assert(EVT.bitsLE(VT) && "Not extending!"); 2864 if (EVT == VT) return N1; // Not actually extending 2865 2866 if (N1C) { 2867 APInt Val = N1C->getAPIntValue(); 2868 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2869 Val <<= Val.getBitWidth()-FromBits; 2870 Val = Val.ashr(Val.getBitWidth()-FromBits); 2871 return getConstant(Val, VT); 2872 } 2873 break; 2874 } 2875 case ISD::EXTRACT_VECTOR_ELT: 2876 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2877 if (N1.getOpcode() == ISD::UNDEF) 2878 return getUNDEF(VT); 2879 2880 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2881 // expanding copies of large vectors from registers. 2882 if (N2C && 2883 N1.getOpcode() == ISD::CONCAT_VECTORS && 2884 N1.getNumOperands() > 0) { 2885 unsigned Factor = 2886 N1.getOperand(0).getValueType().getVectorNumElements(); 2887 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2888 N1.getOperand(N2C->getZExtValue() / Factor), 2889 getConstant(N2C->getZExtValue() % Factor, 2890 N2.getValueType())); 2891 } 2892 2893 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2894 // expanding large vector constants. 2895 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2896 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2897 EVT VEltTy = N1.getValueType().getVectorElementType(); 2898 if (Elt.getValueType() != VEltTy) { 2899 // If the vector element type is not legal, the BUILD_VECTOR operands 2900 // are promoted and implicitly truncated. Make that explicit here. 2901 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2902 } 2903 if (VT != VEltTy) { 2904 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2905 // result is implicitly extended. 2906 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2907 } 2908 return Elt; 2909 } 2910 2911 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2912 // operations are lowered to scalars. 2913 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2914 // If the indices are the same, return the inserted element else 2915 // if the indices are known different, extract the element from 2916 // the original vector. 2917 SDValue N1Op2 = N1.getOperand(2); 2918 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2919 2920 if (N1Op2C && N2C) { 2921 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2922 if (VT == N1.getOperand(1).getValueType()) 2923 return N1.getOperand(1); 2924 else 2925 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2926 } 2927 2928 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2929 } 2930 } 2931 break; 2932 case ISD::EXTRACT_ELEMENT: 2933 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2934 assert(!N1.getValueType().isVector() && !VT.isVector() && 2935 (N1.getValueType().isInteger() == VT.isInteger()) && 2936 N1.getValueType() != VT && 2937 "Wrong types for EXTRACT_ELEMENT!"); 2938 2939 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2940 // 64-bit integers into 32-bit parts. Instead of building the extract of 2941 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2942 if (N1.getOpcode() == ISD::BUILD_PAIR) 2943 return N1.getOperand(N2C->getZExtValue()); 2944 2945 // EXTRACT_ELEMENT of a constant int is also very common. 2946 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2947 unsigned ElementSize = VT.getSizeInBits(); 2948 unsigned Shift = ElementSize * N2C->getZExtValue(); 2949 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2950 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2951 } 2952 break; 2953 case ISD::EXTRACT_SUBVECTOR: { 2954 SDValue Index = N2; 2955 if (VT.isSimple() && N1.getValueType().isSimple()) { 2956 assert(VT.isVector() && N1.getValueType().isVector() && 2957 "Extract subvector VTs must be a vectors!"); 2958 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2959 "Extract subvector VTs must have the same element type!"); 2960 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2961 "Extract subvector must be from larger vector to smaller vector!"); 2962 2963 if (isa<ConstantSDNode>(Index.getNode())) { 2964 assert((VT.getVectorNumElements() + 2965 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2966 <= N1.getValueType().getVectorNumElements()) 2967 && "Extract subvector overflow!"); 2968 } 2969 2970 // Trivial extraction. 2971 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2972 return N1; 2973 } 2974 break; 2975 } 2976 } 2977 2978 if (N1C) { 2979 if (N2C) { 2980 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2981 if (SV.getNode()) return SV; 2982 } else { // Cannonicalize constant to RHS if commutative 2983 if (isCommutativeBinOp(Opcode)) { 2984 std::swap(N1C, N2C); 2985 std::swap(N1, N2); 2986 } 2987 } 2988 } 2989 2990 // Constant fold FP operations. 2991 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2992 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2993 if (N1CFP) { 2994 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2995 // Cannonicalize constant to RHS if commutative 2996 std::swap(N1CFP, N2CFP); 2997 std::swap(N1, N2); 2998 } else if (N2CFP && VT != MVT::ppcf128) { 2999 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 3000 APFloat::opStatus s; 3001 switch (Opcode) { 3002 case ISD::FADD: 3003 s = V1.add(V2, APFloat::rmNearestTiesToEven); 3004 if (s != APFloat::opInvalidOp) 3005 return getConstantFP(V1, VT); 3006 break; 3007 case ISD::FSUB: 3008 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 3009 if (s!=APFloat::opInvalidOp) 3010 return getConstantFP(V1, VT); 3011 break; 3012 case ISD::FMUL: 3013 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 3014 if (s!=APFloat::opInvalidOp) 3015 return getConstantFP(V1, VT); 3016 break; 3017 case ISD::FDIV: 3018 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 3019 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3020 return getConstantFP(V1, VT); 3021 break; 3022 case ISD::FREM : 3023 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 3024 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 3025 return getConstantFP(V1, VT); 3026 break; 3027 case ISD::FCOPYSIGN: 3028 V1.copySign(V2); 3029 return getConstantFP(V1, VT); 3030 default: break; 3031 } 3032 } 3033 } 3034 3035 // Canonicalize an UNDEF to the RHS, even over a constant. 3036 if (N1.getOpcode() == ISD::UNDEF) { 3037 if (isCommutativeBinOp(Opcode)) { 3038 std::swap(N1, N2); 3039 } else { 3040 switch (Opcode) { 3041 case ISD::FP_ROUND_INREG: 3042 case ISD::SIGN_EXTEND_INREG: 3043 case ISD::SUB: 3044 case ISD::FSUB: 3045 case ISD::FDIV: 3046 case ISD::FREM: 3047 case ISD::SRA: 3048 return N1; // fold op(undef, arg2) -> undef 3049 case ISD::UDIV: 3050 case ISD::SDIV: 3051 case ISD::UREM: 3052 case ISD::SREM: 3053 case ISD::SRL: 3054 case ISD::SHL: 3055 if (!VT.isVector()) 3056 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3057 // For vectors, we can't easily build an all zero vector, just return 3058 // the LHS. 3059 return N2; 3060 } 3061 } 3062 } 3063 3064 // Fold a bunch of operators when the RHS is undef. 3065 if (N2.getOpcode() == ISD::UNDEF) { 3066 switch (Opcode) { 3067 case ISD::XOR: 3068 if (N1.getOpcode() == ISD::UNDEF) 3069 // Handle undef ^ undef -> 0 special case. This is a common 3070 // idiom (misuse). 3071 return getConstant(0, VT); 3072 // fallthrough 3073 case ISD::ADD: 3074 case ISD::ADDC: 3075 case ISD::ADDE: 3076 case ISD::SUB: 3077 case ISD::UDIV: 3078 case ISD::SDIV: 3079 case ISD::UREM: 3080 case ISD::SREM: 3081 return N2; // fold op(arg1, undef) -> undef 3082 case ISD::FADD: 3083 case ISD::FSUB: 3084 case ISD::FMUL: 3085 case ISD::FDIV: 3086 case ISD::FREM: 3087 if (getTarget().Options.UnsafeFPMath) 3088 return N2; 3089 break; 3090 case ISD::MUL: 3091 case ISD::AND: 3092 case ISD::SRL: 3093 case ISD::SHL: 3094 if (!VT.isVector()) 3095 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3096 // For vectors, we can't easily build an all zero vector, just return 3097 // the LHS. 3098 return N1; 3099 case ISD::OR: 3100 if (!VT.isVector()) 3101 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3102 // For vectors, we can't easily build an all one vector, just return 3103 // the LHS. 3104 return N1; 3105 case ISD::SRA: 3106 return N1; 3107 } 3108 } 3109 3110 // Memoize this node if possible. 3111 SDNode *N; 3112 SDVTList VTs = getVTList(VT); 3113 if (VT != MVT::Glue) { 3114 SDValue Ops[] = { N1, N2 }; 3115 FoldingSetNodeID ID; 3116 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3117 void *IP = 0; 3118 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3119 return SDValue(E, 0); 3120 3121 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3122 CSEMap.InsertNode(N, IP); 3123 } else { 3124 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3125 } 3126 3127 AllNodes.push_back(N); 3128#ifndef NDEBUG 3129 VerifySDNode(N); 3130#endif 3131 return SDValue(N, 0); 3132} 3133 3134SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3135 SDValue N1, SDValue N2, SDValue N3) { 3136 // Perform various simplifications. 3137 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3138 switch (Opcode) { 3139 case ISD::CONCAT_VECTORS: 3140 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3141 // one big BUILD_VECTOR. 3142 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3143 N2.getOpcode() == ISD::BUILD_VECTOR && 3144 N3.getOpcode() == ISD::BUILD_VECTOR) { 3145 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3146 N1.getNode()->op_end()); 3147 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3148 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3149 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3150 } 3151 break; 3152 case ISD::SETCC: { 3153 // Use FoldSetCC to simplify SETCC's. 3154 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3155 if (Simp.getNode()) return Simp; 3156 break; 3157 } 3158 case ISD::SELECT: 3159 if (N1C) { 3160 if (N1C->getZExtValue()) 3161 return N2; // select true, X, Y -> X 3162 return N3; // select false, X, Y -> Y 3163 } 3164 3165 if (N2 == N3) return N2; // select C, X, X -> X 3166 break; 3167 case ISD::VECTOR_SHUFFLE: 3168 llvm_unreachable("should use getVectorShuffle constructor!"); 3169 case ISD::INSERT_SUBVECTOR: { 3170 SDValue Index = N3; 3171 if (VT.isSimple() && N1.getValueType().isSimple() 3172 && N2.getValueType().isSimple()) { 3173 assert(VT.isVector() && N1.getValueType().isVector() && 3174 N2.getValueType().isVector() && 3175 "Insert subvector VTs must be a vectors"); 3176 assert(VT == N1.getValueType() && 3177 "Dest and insert subvector source types must match!"); 3178 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3179 "Insert subvector must be from smaller vector to larger vector!"); 3180 if (isa<ConstantSDNode>(Index.getNode())) { 3181 assert((N2.getValueType().getVectorNumElements() + 3182 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3183 <= VT.getVectorNumElements()) 3184 && "Insert subvector overflow!"); 3185 } 3186 3187 // Trivial insertion. 3188 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3189 return N2; 3190 } 3191 break; 3192 } 3193 case ISD::BITCAST: 3194 // Fold bit_convert nodes from a type to themselves. 3195 if (N1.getValueType() == VT) 3196 return N1; 3197 break; 3198 } 3199 3200 // Memoize node if it doesn't produce a flag. 3201 SDNode *N; 3202 SDVTList VTs = getVTList(VT); 3203 if (VT != MVT::Glue) { 3204 SDValue Ops[] = { N1, N2, N3 }; 3205 FoldingSetNodeID ID; 3206 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3207 void *IP = 0; 3208 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3209 return SDValue(E, 0); 3210 3211 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3212 CSEMap.InsertNode(N, IP); 3213 } else { 3214 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3215 } 3216 3217 AllNodes.push_back(N); 3218#ifndef NDEBUG 3219 VerifySDNode(N); 3220#endif 3221 return SDValue(N, 0); 3222} 3223 3224SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3225 SDValue N1, SDValue N2, SDValue N3, 3226 SDValue N4) { 3227 SDValue Ops[] = { N1, N2, N3, N4 }; 3228 return getNode(Opcode, DL, VT, Ops, 4); 3229} 3230 3231SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3232 SDValue N1, SDValue N2, SDValue N3, 3233 SDValue N4, SDValue N5) { 3234 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3235 return getNode(Opcode, DL, VT, Ops, 5); 3236} 3237 3238/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3239/// the incoming stack arguments to be loaded from the stack. 3240SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3241 SmallVector<SDValue, 8> ArgChains; 3242 3243 // Include the original chain at the beginning of the list. When this is 3244 // used by target LowerCall hooks, this helps legalize find the 3245 // CALLSEQ_BEGIN node. 3246 ArgChains.push_back(Chain); 3247 3248 // Add a chain value for each stack argument. 3249 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3250 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3251 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3252 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3253 if (FI->getIndex() < 0) 3254 ArgChains.push_back(SDValue(L, 1)); 3255 3256 // Build a tokenfactor for all the chains. 3257 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3258 &ArgChains[0], ArgChains.size()); 3259} 3260 3261/// SplatByte - Distribute ByteVal over NumBits bits. 3262static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3263 APInt Val = APInt(NumBits, ByteVal); 3264 unsigned Shift = 8; 3265 for (unsigned i = NumBits; i > 8; i >>= 1) { 3266 Val = (Val << Shift) | Val; 3267 Shift <<= 1; 3268 } 3269 return Val; 3270} 3271 3272/// getMemsetValue - Vectorized representation of the memset value 3273/// operand. 3274static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3275 DebugLoc dl) { 3276 assert(Value.getOpcode() != ISD::UNDEF); 3277 3278 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3279 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3280 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3281 if (VT.isInteger()) 3282 return DAG.getConstant(Val, VT); 3283 return DAG.getConstantFP(APFloat(Val), VT); 3284 } 3285 3286 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3287 if (NumBits > 8) { 3288 // Use a multiplication with 0x010101... to extend the input to the 3289 // required length. 3290 APInt Magic = SplatByte(NumBits, 0x01); 3291 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3292 } 3293 3294 return Value; 3295} 3296 3297/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3298/// used when a memcpy is turned into a memset when the source is a constant 3299/// string ptr. 3300static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3301 const TargetLowering &TLI, 3302 std::string &Str, unsigned Offset) { 3303 // Handle vector with all elements zero. 3304 if (Str.empty()) { 3305 if (VT.isInteger()) 3306 return DAG.getConstant(0, VT); 3307 else if (VT == MVT::f32 || VT == MVT::f64) 3308 return DAG.getConstantFP(0.0, VT); 3309 else if (VT.isVector()) { 3310 unsigned NumElts = VT.getVectorNumElements(); 3311 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3312 return DAG.getNode(ISD::BITCAST, dl, VT, 3313 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3314 EltVT, NumElts))); 3315 } else 3316 llvm_unreachable("Expected type!"); 3317 } 3318 3319 assert(!VT.isVector() && "Can't handle vector type here!"); 3320 unsigned NumBits = VT.getSizeInBits(); 3321 unsigned MSB = NumBits / 8; 3322 uint64_t Val = 0; 3323 if (TLI.isLittleEndian()) 3324 Offset = Offset + MSB - 1; 3325 for (unsigned i = 0; i != MSB; ++i) { 3326 Val = (Val << 8) | (unsigned char)Str[Offset]; 3327 Offset += TLI.isLittleEndian() ? -1 : 1; 3328 } 3329 return DAG.getConstant(Val, VT); 3330} 3331 3332/// getMemBasePlusOffset - Returns base and offset node for the 3333/// 3334static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3335 SelectionDAG &DAG) { 3336 EVT VT = Base.getValueType(); 3337 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3338 VT, Base, DAG.getConstant(Offset, VT)); 3339} 3340 3341/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3342/// 3343static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3344 unsigned SrcDelta = 0; 3345 GlobalAddressSDNode *G = NULL; 3346 if (Src.getOpcode() == ISD::GlobalAddress) 3347 G = cast<GlobalAddressSDNode>(Src); 3348 else if (Src.getOpcode() == ISD::ADD && 3349 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3350 Src.getOperand(1).getOpcode() == ISD::Constant) { 3351 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3352 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3353 } 3354 if (!G) 3355 return false; 3356 3357 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3358 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3359 return true; 3360 3361 return false; 3362} 3363 3364/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3365/// to replace the memset / memcpy. Return true if the number of memory ops 3366/// is below the threshold. It returns the types of the sequence of 3367/// memory ops to perform memset / memcpy by reference. 3368static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3369 unsigned Limit, uint64_t Size, 3370 unsigned DstAlign, unsigned SrcAlign, 3371 bool IsZeroVal, 3372 bool MemcpyStrSrc, 3373 SelectionDAG &DAG, 3374 const TargetLowering &TLI) { 3375 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3376 "Expecting memcpy / memset source to meet alignment requirement!"); 3377 // If 'SrcAlign' is zero, that means the memory operation does not need to 3378 // load the value, i.e. memset or memcpy from constant string. Otherwise, 3379 // it's the inferred alignment of the source. 'DstAlign', on the other hand, 3380 // is the specified alignment of the memory operation. If it is zero, that 3381 // means it's possible to change the alignment of the destination. 3382 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does 3383 // not need to be loaded. 3384 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3385 IsZeroVal, MemcpyStrSrc, 3386 DAG.getMachineFunction()); 3387 3388 if (VT == MVT::Other) { 3389 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3390 TLI.allowsUnalignedMemoryAccesses(VT)) { 3391 VT = TLI.getPointerTy(); 3392 } else { 3393 switch (DstAlign & 7) { 3394 case 0: VT = MVT::i64; break; 3395 case 4: VT = MVT::i32; break; 3396 case 2: VT = MVT::i16; break; 3397 default: VT = MVT::i8; break; 3398 } 3399 } 3400 3401 MVT LVT = MVT::i64; 3402 while (!TLI.isTypeLegal(LVT)) 3403 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3404 assert(LVT.isInteger()); 3405 3406 if (VT.bitsGT(LVT)) 3407 VT = LVT; 3408 } 3409 3410 unsigned NumMemOps = 0; 3411 while (Size != 0) { 3412 unsigned VTSize = VT.getSizeInBits() / 8; 3413 while (VTSize > Size) { 3414 // For now, only use non-vector load / store's for the left-over pieces. 3415 if (VT.isVector() || VT.isFloatingPoint()) { 3416 VT = MVT::i64; 3417 while (!TLI.isTypeLegal(VT)) 3418 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3419 VTSize = VT.getSizeInBits() / 8; 3420 } else { 3421 // This can result in a type that is not legal on the target, e.g. 3422 // 1 or 2 bytes on PPC. 3423 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3424 VTSize >>= 1; 3425 } 3426 } 3427 3428 if (++NumMemOps > Limit) 3429 return false; 3430 MemOps.push_back(VT); 3431 Size -= VTSize; 3432 } 3433 3434 return true; 3435} 3436 3437static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3438 SDValue Chain, SDValue Dst, 3439 SDValue Src, uint64_t Size, 3440 unsigned Align, bool isVol, 3441 bool AlwaysInline, 3442 MachinePointerInfo DstPtrInfo, 3443 MachinePointerInfo SrcPtrInfo) { 3444 // Turn a memcpy of undef to nop. 3445 if (Src.getOpcode() == ISD::UNDEF) 3446 return Chain; 3447 3448 // Expand memcpy to a series of load and store ops if the size operand falls 3449 // below a certain threshold. 3450 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3451 // rather than maybe a humongous number of loads and stores. 3452 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3453 std::vector<EVT> MemOps; 3454 bool DstAlignCanChange = false; 3455 MachineFunction &MF = DAG.getMachineFunction(); 3456 MachineFrameInfo *MFI = MF.getFrameInfo(); 3457 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3458 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3459 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3460 DstAlignCanChange = true; 3461 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3462 if (Align > SrcAlign) 3463 SrcAlign = Align; 3464 std::string Str; 3465 bool CopyFromStr = isMemSrcFromString(Src, Str); 3466 bool isZeroStr = CopyFromStr && Str.empty(); 3467 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3468 3469 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3470 (DstAlignCanChange ? 0 : Align), 3471 (isZeroStr ? 0 : SrcAlign), 3472 true, CopyFromStr, DAG, TLI)) 3473 return SDValue(); 3474 3475 if (DstAlignCanChange) { 3476 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3477 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3478 if (NewAlign > Align) { 3479 // Give the stack frame object a larger alignment if needed. 3480 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3481 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3482 Align = NewAlign; 3483 } 3484 } 3485 3486 SmallVector<SDValue, 8> OutChains; 3487 unsigned NumMemOps = MemOps.size(); 3488 uint64_t SrcOff = 0, DstOff = 0; 3489 for (unsigned i = 0; i != NumMemOps; ++i) { 3490 EVT VT = MemOps[i]; 3491 unsigned VTSize = VT.getSizeInBits() / 8; 3492 SDValue Value, Store; 3493 3494 if (CopyFromStr && 3495 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3496 // It's unlikely a store of a vector immediate can be done in a single 3497 // instruction. It would require a load from a constantpool first. 3498 // We only handle zero vectors here. 3499 // FIXME: Handle other cases where store of vector immediate is done in 3500 // a single instruction. 3501 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3502 Store = DAG.getStore(Chain, dl, Value, 3503 getMemBasePlusOffset(Dst, DstOff, DAG), 3504 DstPtrInfo.getWithOffset(DstOff), isVol, 3505 false, Align); 3506 } else { 3507 // The type might not be legal for the target. This should only happen 3508 // if the type is smaller than a legal type, as on PPC, so the right 3509 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3510 // to Load/Store if NVT==VT. 3511 // FIXME does the case above also need this? 3512 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3513 assert(NVT.bitsGE(VT)); 3514 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3515 getMemBasePlusOffset(Src, SrcOff, DAG), 3516 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3517 MinAlign(SrcAlign, SrcOff)); 3518 Store = DAG.getTruncStore(Chain, dl, Value, 3519 getMemBasePlusOffset(Dst, DstOff, DAG), 3520 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3521 false, Align); 3522 } 3523 OutChains.push_back(Store); 3524 SrcOff += VTSize; 3525 DstOff += VTSize; 3526 } 3527 3528 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3529 &OutChains[0], OutChains.size()); 3530} 3531 3532static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3533 SDValue Chain, SDValue Dst, 3534 SDValue Src, uint64_t Size, 3535 unsigned Align, bool isVol, 3536 bool AlwaysInline, 3537 MachinePointerInfo DstPtrInfo, 3538 MachinePointerInfo SrcPtrInfo) { 3539 // Turn a memmove of undef to nop. 3540 if (Src.getOpcode() == ISD::UNDEF) 3541 return Chain; 3542 3543 // Expand memmove to a series of load and store ops if the size operand falls 3544 // below a certain threshold. 3545 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3546 std::vector<EVT> MemOps; 3547 bool DstAlignCanChange = false; 3548 MachineFunction &MF = DAG.getMachineFunction(); 3549 MachineFrameInfo *MFI = MF.getFrameInfo(); 3550 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3551 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3552 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3553 DstAlignCanChange = true; 3554 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3555 if (Align > SrcAlign) 3556 SrcAlign = Align; 3557 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3558 3559 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3560 (DstAlignCanChange ? 0 : Align), 3561 SrcAlign, true, false, DAG, TLI)) 3562 return SDValue(); 3563 3564 if (DstAlignCanChange) { 3565 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3566 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3567 if (NewAlign > Align) { 3568 // Give the stack frame object a larger alignment if needed. 3569 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3570 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3571 Align = NewAlign; 3572 } 3573 } 3574 3575 uint64_t SrcOff = 0, DstOff = 0; 3576 SmallVector<SDValue, 8> LoadValues; 3577 SmallVector<SDValue, 8> LoadChains; 3578 SmallVector<SDValue, 8> OutChains; 3579 unsigned NumMemOps = MemOps.size(); 3580 for (unsigned i = 0; i < NumMemOps; i++) { 3581 EVT VT = MemOps[i]; 3582 unsigned VTSize = VT.getSizeInBits() / 8; 3583 SDValue Value, Store; 3584 3585 Value = DAG.getLoad(VT, dl, Chain, 3586 getMemBasePlusOffset(Src, SrcOff, DAG), 3587 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3588 false, false, SrcAlign); 3589 LoadValues.push_back(Value); 3590 LoadChains.push_back(Value.getValue(1)); 3591 SrcOff += VTSize; 3592 } 3593 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3594 &LoadChains[0], LoadChains.size()); 3595 OutChains.clear(); 3596 for (unsigned i = 0; i < NumMemOps; i++) { 3597 EVT VT = MemOps[i]; 3598 unsigned VTSize = VT.getSizeInBits() / 8; 3599 SDValue Value, Store; 3600 3601 Store = DAG.getStore(Chain, dl, LoadValues[i], 3602 getMemBasePlusOffset(Dst, DstOff, DAG), 3603 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3604 OutChains.push_back(Store); 3605 DstOff += VTSize; 3606 } 3607 3608 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3609 &OutChains[0], OutChains.size()); 3610} 3611 3612static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3613 SDValue Chain, SDValue Dst, 3614 SDValue Src, uint64_t Size, 3615 unsigned Align, bool isVol, 3616 MachinePointerInfo DstPtrInfo) { 3617 // Turn a memset of undef to nop. 3618 if (Src.getOpcode() == ISD::UNDEF) 3619 return Chain; 3620 3621 // Expand memset to a series of load/store ops if the size operand 3622 // falls below a certain threshold. 3623 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3624 std::vector<EVT> MemOps; 3625 bool DstAlignCanChange = false; 3626 MachineFunction &MF = DAG.getMachineFunction(); 3627 MachineFrameInfo *MFI = MF.getFrameInfo(); 3628 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3629 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3630 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3631 DstAlignCanChange = true; 3632 bool IsZeroVal = 3633 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3634 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3635 Size, (DstAlignCanChange ? 0 : Align), 0, 3636 IsZeroVal, false, DAG, TLI)) 3637 return SDValue(); 3638 3639 if (DstAlignCanChange) { 3640 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3641 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3642 if (NewAlign > Align) { 3643 // Give the stack frame object a larger alignment if needed. 3644 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3645 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3646 Align = NewAlign; 3647 } 3648 } 3649 3650 SmallVector<SDValue, 8> OutChains; 3651 uint64_t DstOff = 0; 3652 unsigned NumMemOps = MemOps.size(); 3653 3654 // Find the largest store and generate the bit pattern for it. 3655 EVT LargestVT = MemOps[0]; 3656 for (unsigned i = 1; i < NumMemOps; i++) 3657 if (MemOps[i].bitsGT(LargestVT)) 3658 LargestVT = MemOps[i]; 3659 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3660 3661 for (unsigned i = 0; i < NumMemOps; i++) { 3662 EVT VT = MemOps[i]; 3663 3664 // If this store is smaller than the largest store see whether we can get 3665 // the smaller value for free with a truncate. 3666 SDValue Value = MemSetValue; 3667 if (VT.bitsLT(LargestVT)) { 3668 if (!LargestVT.isVector() && !VT.isVector() && 3669 TLI.isTruncateFree(LargestVT, VT)) 3670 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3671 else 3672 Value = getMemsetValue(Src, VT, DAG, dl); 3673 } 3674 assert(Value.getValueType() == VT && "Value with wrong type."); 3675 SDValue Store = DAG.getStore(Chain, dl, Value, 3676 getMemBasePlusOffset(Dst, DstOff, DAG), 3677 DstPtrInfo.getWithOffset(DstOff), 3678 isVol, false, Align); 3679 OutChains.push_back(Store); 3680 DstOff += VT.getSizeInBits() / 8; 3681 } 3682 3683 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3684 &OutChains[0], OutChains.size()); 3685} 3686 3687SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3688 SDValue Src, SDValue Size, 3689 unsigned Align, bool isVol, bool AlwaysInline, 3690 MachinePointerInfo DstPtrInfo, 3691 MachinePointerInfo SrcPtrInfo) { 3692 3693 // Check to see if we should lower the memcpy to loads and stores first. 3694 // For cases within the target-specified limits, this is the best choice. 3695 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3696 if (ConstantSize) { 3697 // Memcpy with size zero? Just return the original chain. 3698 if (ConstantSize->isNullValue()) 3699 return Chain; 3700 3701 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3702 ConstantSize->getZExtValue(),Align, 3703 isVol, false, DstPtrInfo, SrcPtrInfo); 3704 if (Result.getNode()) 3705 return Result; 3706 } 3707 3708 // Then check to see if we should lower the memcpy with target-specific 3709 // code. If the target chooses to do this, this is the next best. 3710 SDValue Result = 3711 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3712 isVol, AlwaysInline, 3713 DstPtrInfo, SrcPtrInfo); 3714 if (Result.getNode()) 3715 return Result; 3716 3717 // If we really need inline code and the target declined to provide it, 3718 // use a (potentially long) sequence of loads and stores. 3719 if (AlwaysInline) { 3720 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3721 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3722 ConstantSize->getZExtValue(), Align, isVol, 3723 true, DstPtrInfo, SrcPtrInfo); 3724 } 3725 3726 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3727 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3728 // respect volatile, so they may do things like read or write memory 3729 // beyond the given memory regions. But fixing this isn't easy, and most 3730 // people don't care. 3731 3732 // Emit a library call. 3733 TargetLowering::ArgListTy Args; 3734 TargetLowering::ArgListEntry Entry; 3735 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3736 Entry.Node = Dst; Args.push_back(Entry); 3737 Entry.Node = Src; Args.push_back(Entry); 3738 Entry.Node = Size; Args.push_back(Entry); 3739 // FIXME: pass in DebugLoc 3740 std::pair<SDValue,SDValue> CallResult = 3741 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3742 false, false, false, false, 0, 3743 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3744 /*isReturnValueUsed=*/false, 3745 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3746 TLI.getPointerTy()), 3747 Args, *this, dl); 3748 return CallResult.second; 3749} 3750 3751SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3752 SDValue Src, SDValue Size, 3753 unsigned Align, bool isVol, 3754 MachinePointerInfo DstPtrInfo, 3755 MachinePointerInfo SrcPtrInfo) { 3756 3757 // Check to see if we should lower the memmove to loads and stores first. 3758 // For cases within the target-specified limits, this is the best choice. 3759 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3760 if (ConstantSize) { 3761 // Memmove with size zero? Just return the original chain. 3762 if (ConstantSize->isNullValue()) 3763 return Chain; 3764 3765 SDValue Result = 3766 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3767 ConstantSize->getZExtValue(), Align, isVol, 3768 false, DstPtrInfo, SrcPtrInfo); 3769 if (Result.getNode()) 3770 return Result; 3771 } 3772 3773 // Then check to see if we should lower the memmove with target-specific 3774 // code. If the target chooses to do this, this is the next best. 3775 SDValue Result = 3776 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3777 DstPtrInfo, SrcPtrInfo); 3778 if (Result.getNode()) 3779 return Result; 3780 3781 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3782 // not be safe. See memcpy above for more details. 3783 3784 // Emit a library call. 3785 TargetLowering::ArgListTy Args; 3786 TargetLowering::ArgListEntry Entry; 3787 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3788 Entry.Node = Dst; Args.push_back(Entry); 3789 Entry.Node = Src; Args.push_back(Entry); 3790 Entry.Node = Size; Args.push_back(Entry); 3791 // FIXME: pass in DebugLoc 3792 std::pair<SDValue,SDValue> CallResult = 3793 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3794 false, false, false, false, 0, 3795 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3796 /*isReturnValueUsed=*/false, 3797 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3798 TLI.getPointerTy()), 3799 Args, *this, dl); 3800 return CallResult.second; 3801} 3802 3803SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3804 SDValue Src, SDValue Size, 3805 unsigned Align, bool isVol, 3806 MachinePointerInfo DstPtrInfo) { 3807 3808 // Check to see if we should lower the memset to stores first. 3809 // For cases within the target-specified limits, this is the best choice. 3810 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3811 if (ConstantSize) { 3812 // Memset with size zero? Just return the original chain. 3813 if (ConstantSize->isNullValue()) 3814 return Chain; 3815 3816 SDValue Result = 3817 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3818 Align, isVol, DstPtrInfo); 3819 3820 if (Result.getNode()) 3821 return Result; 3822 } 3823 3824 // Then check to see if we should lower the memset with target-specific 3825 // code. If the target chooses to do this, this is the next best. 3826 SDValue Result = 3827 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3828 DstPtrInfo); 3829 if (Result.getNode()) 3830 return Result; 3831 3832 // Emit a library call. 3833 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3834 TargetLowering::ArgListTy Args; 3835 TargetLowering::ArgListEntry Entry; 3836 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3837 Args.push_back(Entry); 3838 // Extend or truncate the argument to be an i32 value for the call. 3839 if (Src.getValueType().bitsGT(MVT::i32)) 3840 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3841 else 3842 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3843 Entry.Node = Src; 3844 Entry.Ty = Type::getInt32Ty(*getContext()); 3845 Entry.isSExt = true; 3846 Args.push_back(Entry); 3847 Entry.Node = Size; 3848 Entry.Ty = IntPtrTy; 3849 Entry.isSExt = false; 3850 Args.push_back(Entry); 3851 // FIXME: pass in DebugLoc 3852 std::pair<SDValue,SDValue> CallResult = 3853 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3854 false, false, false, false, 0, 3855 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3856 /*isReturnValueUsed=*/false, 3857 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3858 TLI.getPointerTy()), 3859 Args, *this, dl); 3860 return CallResult.second; 3861} 3862 3863SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3864 SDValue Chain, SDValue Ptr, SDValue Cmp, 3865 SDValue Swp, MachinePointerInfo PtrInfo, 3866 unsigned Alignment, 3867 AtomicOrdering Ordering, 3868 SynchronizationScope SynchScope) { 3869 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3870 Alignment = getEVTAlignment(MemVT); 3871 3872 MachineFunction &MF = getMachineFunction(); 3873 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3874 3875 // For now, atomics are considered to be volatile always. 3876 // FIXME: Volatile isn't really correct; we should keep track of atomic 3877 // orderings in the memoperand. 3878 Flags |= MachineMemOperand::MOVolatile; 3879 3880 MachineMemOperand *MMO = 3881 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3882 3883 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO, 3884 Ordering, SynchScope); 3885} 3886 3887SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3888 SDValue Chain, 3889 SDValue Ptr, SDValue Cmp, 3890 SDValue Swp, MachineMemOperand *MMO, 3891 AtomicOrdering Ordering, 3892 SynchronizationScope SynchScope) { 3893 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3894 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3895 3896 EVT VT = Cmp.getValueType(); 3897 3898 SDVTList VTs = getVTList(VT, MVT::Other); 3899 FoldingSetNodeID ID; 3900 ID.AddInteger(MemVT.getRawBits()); 3901 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3902 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3903 void* IP = 0; 3904 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3905 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3906 return SDValue(E, 0); 3907 } 3908 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3909 Ptr, Cmp, Swp, MMO, Ordering, 3910 SynchScope); 3911 CSEMap.InsertNode(N, IP); 3912 AllNodes.push_back(N); 3913 return SDValue(N, 0); 3914} 3915 3916SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3917 SDValue Chain, 3918 SDValue Ptr, SDValue Val, 3919 const Value* PtrVal, 3920 unsigned Alignment, 3921 AtomicOrdering Ordering, 3922 SynchronizationScope SynchScope) { 3923 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3924 Alignment = getEVTAlignment(MemVT); 3925 3926 MachineFunction &MF = getMachineFunction(); 3927 // A monotonic store does not load; a release store "loads" in the sense 3928 // that other stores cannot be sunk past it. 3929 // (An atomicrmw obviously both loads and stores.) 3930 unsigned Flags = MachineMemOperand::MOStore; 3931 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic) 3932 Flags |= MachineMemOperand::MOLoad; 3933 3934 // For now, atomics are considered to be volatile always. 3935 // FIXME: Volatile isn't really correct; we should keep track of atomic 3936 // orderings in the memoperand. 3937 Flags |= MachineMemOperand::MOVolatile; 3938 3939 MachineMemOperand *MMO = 3940 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3941 MemVT.getStoreSize(), Alignment); 3942 3943 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO, 3944 Ordering, SynchScope); 3945} 3946 3947SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3948 SDValue Chain, 3949 SDValue Ptr, SDValue Val, 3950 MachineMemOperand *MMO, 3951 AtomicOrdering Ordering, 3952 SynchronizationScope SynchScope) { 3953 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3954 Opcode == ISD::ATOMIC_LOAD_SUB || 3955 Opcode == ISD::ATOMIC_LOAD_AND || 3956 Opcode == ISD::ATOMIC_LOAD_OR || 3957 Opcode == ISD::ATOMIC_LOAD_XOR || 3958 Opcode == ISD::ATOMIC_LOAD_NAND || 3959 Opcode == ISD::ATOMIC_LOAD_MIN || 3960 Opcode == ISD::ATOMIC_LOAD_MAX || 3961 Opcode == ISD::ATOMIC_LOAD_UMIN || 3962 Opcode == ISD::ATOMIC_LOAD_UMAX || 3963 Opcode == ISD::ATOMIC_SWAP || 3964 Opcode == ISD::ATOMIC_STORE) && 3965 "Invalid Atomic Op"); 3966 3967 EVT VT = Val.getValueType(); 3968 3969 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) : 3970 getVTList(VT, MVT::Other); 3971 FoldingSetNodeID ID; 3972 ID.AddInteger(MemVT.getRawBits()); 3973 SDValue Ops[] = {Chain, Ptr, Val}; 3974 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3975 void* IP = 0; 3976 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3977 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3978 return SDValue(E, 0); 3979 } 3980 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3981 Ptr, Val, MMO, 3982 Ordering, SynchScope); 3983 CSEMap.InsertNode(N, IP); 3984 AllNodes.push_back(N); 3985 return SDValue(N, 0); 3986} 3987 3988SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3989 EVT VT, SDValue Chain, 3990 SDValue Ptr, 3991 const Value* PtrVal, 3992 unsigned Alignment, 3993 AtomicOrdering Ordering, 3994 SynchronizationScope SynchScope) { 3995 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3996 Alignment = getEVTAlignment(MemVT); 3997 3998 MachineFunction &MF = getMachineFunction(); 3999 // A monotonic load does not store; an acquire load "stores" in the sense 4000 // that other loads cannot be hoisted past it. 4001 unsigned Flags = MachineMemOperand::MOLoad; 4002 if (Ordering > Monotonic) 4003 Flags |= MachineMemOperand::MOStore; 4004 4005 // For now, atomics are considered to be volatile always. 4006 // FIXME: Volatile isn't really correct; we should keep track of atomic 4007 // orderings in the memoperand. 4008 Flags |= MachineMemOperand::MOVolatile; 4009 4010 MachineMemOperand *MMO = 4011 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 4012 MemVT.getStoreSize(), Alignment); 4013 4014 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO, 4015 Ordering, SynchScope); 4016} 4017 4018SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 4019 EVT VT, SDValue Chain, 4020 SDValue Ptr, 4021 MachineMemOperand *MMO, 4022 AtomicOrdering Ordering, 4023 SynchronizationScope SynchScope) { 4024 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op"); 4025 4026 SDVTList VTs = getVTList(VT, MVT::Other); 4027 FoldingSetNodeID ID; 4028 ID.AddInteger(MemVT.getRawBits()); 4029 SDValue Ops[] = {Chain, Ptr}; 4030 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 4031 void* IP = 0; 4032 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4033 cast<AtomicSDNode>(E)->refineAlignment(MMO); 4034 return SDValue(E, 0); 4035 } 4036 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 4037 Ptr, MMO, Ordering, SynchScope); 4038 CSEMap.InsertNode(N, IP); 4039 AllNodes.push_back(N); 4040 return SDValue(N, 0); 4041} 4042 4043/// getMergeValues - Create a MERGE_VALUES node from the given operands. 4044SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 4045 DebugLoc dl) { 4046 if (NumOps == 1) 4047 return Ops[0]; 4048 4049 SmallVector<EVT, 4> VTs; 4050 VTs.reserve(NumOps); 4051 for (unsigned i = 0; i < NumOps; ++i) 4052 VTs.push_back(Ops[i].getValueType()); 4053 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 4054 Ops, NumOps); 4055} 4056 4057SDValue 4058SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 4059 const EVT *VTs, unsigned NumVTs, 4060 const SDValue *Ops, unsigned NumOps, 4061 EVT MemVT, MachinePointerInfo PtrInfo, 4062 unsigned Align, bool Vol, 4063 bool ReadMem, bool WriteMem) { 4064 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 4065 MemVT, PtrInfo, Align, Vol, 4066 ReadMem, WriteMem); 4067} 4068 4069SDValue 4070SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4071 const SDValue *Ops, unsigned NumOps, 4072 EVT MemVT, MachinePointerInfo PtrInfo, 4073 unsigned Align, bool Vol, 4074 bool ReadMem, bool WriteMem) { 4075 if (Align == 0) // Ensure that codegen never sees alignment 0 4076 Align = getEVTAlignment(MemVT); 4077 4078 MachineFunction &MF = getMachineFunction(); 4079 unsigned Flags = 0; 4080 if (WriteMem) 4081 Flags |= MachineMemOperand::MOStore; 4082 if (ReadMem) 4083 Flags |= MachineMemOperand::MOLoad; 4084 if (Vol) 4085 Flags |= MachineMemOperand::MOVolatile; 4086 MachineMemOperand *MMO = 4087 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 4088 4089 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 4090} 4091 4092SDValue 4093SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 4094 const SDValue *Ops, unsigned NumOps, 4095 EVT MemVT, MachineMemOperand *MMO) { 4096 assert((Opcode == ISD::INTRINSIC_VOID || 4097 Opcode == ISD::INTRINSIC_W_CHAIN || 4098 Opcode == ISD::PREFETCH || 4099 (Opcode <= INT_MAX && 4100 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 4101 "Opcode is not a memory-accessing opcode!"); 4102 4103 // Memoize the node unless it returns a flag. 4104 MemIntrinsicSDNode *N; 4105 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4106 FoldingSetNodeID ID; 4107 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4108 void *IP = 0; 4109 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4110 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 4111 return SDValue(E, 0); 4112 } 4113 4114 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4115 MemVT, MMO); 4116 CSEMap.InsertNode(N, IP); 4117 } else { 4118 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 4119 MemVT, MMO); 4120 } 4121 AllNodes.push_back(N); 4122 return SDValue(N, 0); 4123} 4124 4125/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4126/// MachinePointerInfo record from it. This is particularly useful because the 4127/// code generator has many cases where it doesn't bother passing in a 4128/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4129static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4130 // If this is FI+Offset, we can model it. 4131 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4132 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4133 4134 // If this is (FI+Offset1)+Offset2, we can model it. 4135 if (Ptr.getOpcode() != ISD::ADD || 4136 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4137 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4138 return MachinePointerInfo(); 4139 4140 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4141 return MachinePointerInfo::getFixedStack(FI, Offset+ 4142 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4143} 4144 4145/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4146/// MachinePointerInfo record from it. This is particularly useful because the 4147/// code generator has many cases where it doesn't bother passing in a 4148/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4149static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4150 // If the 'Offset' value isn't a constant, we can't handle this. 4151 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4152 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4153 if (OffsetOp.getOpcode() == ISD::UNDEF) 4154 return InferPointerInfo(Ptr); 4155 return MachinePointerInfo(); 4156} 4157 4158 4159SDValue 4160SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4161 EVT VT, DebugLoc dl, SDValue Chain, 4162 SDValue Ptr, SDValue Offset, 4163 MachinePointerInfo PtrInfo, EVT MemVT, 4164 bool isVolatile, bool isNonTemporal, bool isInvariant, 4165 unsigned Alignment, const MDNode *TBAAInfo) { 4166 assert(Chain.getValueType() == MVT::Other && 4167 "Invalid chain type"); 4168 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4169 Alignment = getEVTAlignment(VT); 4170 4171 unsigned Flags = MachineMemOperand::MOLoad; 4172 if (isVolatile) 4173 Flags |= MachineMemOperand::MOVolatile; 4174 if (isNonTemporal) 4175 Flags |= MachineMemOperand::MONonTemporal; 4176 if (isInvariant) 4177 Flags |= MachineMemOperand::MOInvariant; 4178 4179 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4180 // clients. 4181 if (PtrInfo.V == 0) 4182 PtrInfo = InferPointerInfo(Ptr, Offset); 4183 4184 MachineFunction &MF = getMachineFunction(); 4185 MachineMemOperand *MMO = 4186 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4187 TBAAInfo); 4188 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4189} 4190 4191SDValue 4192SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4193 EVT VT, DebugLoc dl, SDValue Chain, 4194 SDValue Ptr, SDValue Offset, EVT MemVT, 4195 MachineMemOperand *MMO) { 4196 if (VT == MemVT) { 4197 ExtType = ISD::NON_EXTLOAD; 4198 } else if (ExtType == ISD::NON_EXTLOAD) { 4199 assert(VT == MemVT && "Non-extending load from different memory type!"); 4200 } else { 4201 // Extending load. 4202 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4203 "Should only be an extending load, not truncating!"); 4204 assert(VT.isInteger() == MemVT.isInteger() && 4205 "Cannot convert from FP to Int or Int -> FP!"); 4206 assert(VT.isVector() == MemVT.isVector() && 4207 "Cannot use trunc store to convert to or from a vector!"); 4208 assert((!VT.isVector() || 4209 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4210 "Cannot use trunc store to change the number of vector elements!"); 4211 } 4212 4213 bool Indexed = AM != ISD::UNINDEXED; 4214 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4215 "Unindexed load with an offset!"); 4216 4217 SDVTList VTs = Indexed ? 4218 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4219 SDValue Ops[] = { Chain, Ptr, Offset }; 4220 FoldingSetNodeID ID; 4221 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4222 ID.AddInteger(MemVT.getRawBits()); 4223 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4224 MMO->isNonTemporal(), 4225 MMO->isInvariant())); 4226 void *IP = 0; 4227 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4228 cast<LoadSDNode>(E)->refineAlignment(MMO); 4229 return SDValue(E, 0); 4230 } 4231 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4232 MemVT, MMO); 4233 CSEMap.InsertNode(N, IP); 4234 AllNodes.push_back(N); 4235 return SDValue(N, 0); 4236} 4237 4238SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4239 SDValue Chain, SDValue Ptr, 4240 MachinePointerInfo PtrInfo, 4241 bool isVolatile, bool isNonTemporal, 4242 bool isInvariant, unsigned Alignment, 4243 const MDNode *TBAAInfo) { 4244 SDValue Undef = getUNDEF(Ptr.getValueType()); 4245 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4246 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment, 4247 TBAAInfo); 4248} 4249 4250SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4251 SDValue Chain, SDValue Ptr, 4252 MachinePointerInfo PtrInfo, EVT MemVT, 4253 bool isVolatile, bool isNonTemporal, 4254 unsigned Alignment, const MDNode *TBAAInfo) { 4255 SDValue Undef = getUNDEF(Ptr.getValueType()); 4256 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4257 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment, 4258 TBAAInfo); 4259} 4260 4261 4262SDValue 4263SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4264 SDValue Offset, ISD::MemIndexedMode AM) { 4265 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4266 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4267 "Load is already a indexed load!"); 4268 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4269 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4270 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(), 4271 false, LD->getAlignment()); 4272} 4273 4274SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4275 SDValue Ptr, MachinePointerInfo PtrInfo, 4276 bool isVolatile, bool isNonTemporal, 4277 unsigned Alignment, const MDNode *TBAAInfo) { 4278 assert(Chain.getValueType() == MVT::Other && 4279 "Invalid chain type"); 4280 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4281 Alignment = getEVTAlignment(Val.getValueType()); 4282 4283 unsigned Flags = MachineMemOperand::MOStore; 4284 if (isVolatile) 4285 Flags |= MachineMemOperand::MOVolatile; 4286 if (isNonTemporal) 4287 Flags |= MachineMemOperand::MONonTemporal; 4288 4289 if (PtrInfo.V == 0) 4290 PtrInfo = InferPointerInfo(Ptr); 4291 4292 MachineFunction &MF = getMachineFunction(); 4293 MachineMemOperand *MMO = 4294 MF.getMachineMemOperand(PtrInfo, Flags, 4295 Val.getValueType().getStoreSize(), Alignment, 4296 TBAAInfo); 4297 4298 return getStore(Chain, dl, Val, Ptr, MMO); 4299} 4300 4301SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4302 SDValue Ptr, MachineMemOperand *MMO) { 4303 assert(Chain.getValueType() == MVT::Other && 4304 "Invalid chain type"); 4305 EVT VT = Val.getValueType(); 4306 SDVTList VTs = getVTList(MVT::Other); 4307 SDValue Undef = getUNDEF(Ptr.getValueType()); 4308 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4309 FoldingSetNodeID ID; 4310 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4311 ID.AddInteger(VT.getRawBits()); 4312 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4313 MMO->isNonTemporal(), MMO->isInvariant())); 4314 void *IP = 0; 4315 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4316 cast<StoreSDNode>(E)->refineAlignment(MMO); 4317 return SDValue(E, 0); 4318 } 4319 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4320 false, VT, MMO); 4321 CSEMap.InsertNode(N, IP); 4322 AllNodes.push_back(N); 4323 return SDValue(N, 0); 4324} 4325 4326SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4327 SDValue Ptr, MachinePointerInfo PtrInfo, 4328 EVT SVT,bool isVolatile, bool isNonTemporal, 4329 unsigned Alignment, 4330 const MDNode *TBAAInfo) { 4331 assert(Chain.getValueType() == MVT::Other && 4332 "Invalid chain type"); 4333 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4334 Alignment = getEVTAlignment(SVT); 4335 4336 unsigned Flags = MachineMemOperand::MOStore; 4337 if (isVolatile) 4338 Flags |= MachineMemOperand::MOVolatile; 4339 if (isNonTemporal) 4340 Flags |= MachineMemOperand::MONonTemporal; 4341 4342 if (PtrInfo.V == 0) 4343 PtrInfo = InferPointerInfo(Ptr); 4344 4345 MachineFunction &MF = getMachineFunction(); 4346 MachineMemOperand *MMO = 4347 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4348 TBAAInfo); 4349 4350 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4351} 4352 4353SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4354 SDValue Ptr, EVT SVT, 4355 MachineMemOperand *MMO) { 4356 EVT VT = Val.getValueType(); 4357 4358 assert(Chain.getValueType() == MVT::Other && 4359 "Invalid chain type"); 4360 if (VT == SVT) 4361 return getStore(Chain, dl, Val, Ptr, MMO); 4362 4363 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4364 "Should only be a truncating store, not extending!"); 4365 assert(VT.isInteger() == SVT.isInteger() && 4366 "Can't do FP-INT conversion!"); 4367 assert(VT.isVector() == SVT.isVector() && 4368 "Cannot use trunc store to convert to or from a vector!"); 4369 assert((!VT.isVector() || 4370 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4371 "Cannot use trunc store to change the number of vector elements!"); 4372 4373 SDVTList VTs = getVTList(MVT::Other); 4374 SDValue Undef = getUNDEF(Ptr.getValueType()); 4375 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4376 FoldingSetNodeID ID; 4377 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4378 ID.AddInteger(SVT.getRawBits()); 4379 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4380 MMO->isNonTemporal(), MMO->isInvariant())); 4381 void *IP = 0; 4382 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4383 cast<StoreSDNode>(E)->refineAlignment(MMO); 4384 return SDValue(E, 0); 4385 } 4386 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4387 true, SVT, MMO); 4388 CSEMap.InsertNode(N, IP); 4389 AllNodes.push_back(N); 4390 return SDValue(N, 0); 4391} 4392 4393SDValue 4394SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4395 SDValue Offset, ISD::MemIndexedMode AM) { 4396 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4397 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4398 "Store is already a indexed store!"); 4399 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4400 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4401 FoldingSetNodeID ID; 4402 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4403 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4404 ID.AddInteger(ST->getRawSubclassData()); 4405 void *IP = 0; 4406 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4407 return SDValue(E, 0); 4408 4409 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4410 ST->isTruncatingStore(), 4411 ST->getMemoryVT(), 4412 ST->getMemOperand()); 4413 CSEMap.InsertNode(N, IP); 4414 AllNodes.push_back(N); 4415 return SDValue(N, 0); 4416} 4417 4418SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4419 SDValue Chain, SDValue Ptr, 4420 SDValue SV, 4421 unsigned Align) { 4422 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4423 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4424} 4425 4426SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4427 const SDUse *Ops, unsigned NumOps) { 4428 switch (NumOps) { 4429 case 0: return getNode(Opcode, DL, VT); 4430 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4431 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4432 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4433 default: break; 4434 } 4435 4436 // Copy from an SDUse array into an SDValue array for use with 4437 // the regular getNode logic. 4438 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4439 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4440} 4441 4442SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4443 const SDValue *Ops, unsigned NumOps) { 4444 switch (NumOps) { 4445 case 0: return getNode(Opcode, DL, VT); 4446 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4447 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4448 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4449 default: break; 4450 } 4451 4452 switch (Opcode) { 4453 default: break; 4454 case ISD::SELECT_CC: { 4455 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4456 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4457 "LHS and RHS of condition must have same type!"); 4458 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4459 "True and False arms of SelectCC must have same type!"); 4460 assert(Ops[2].getValueType() == VT && 4461 "select_cc node must be of same type as true and false value!"); 4462 break; 4463 } 4464 case ISD::BR_CC: { 4465 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4466 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4467 "LHS/RHS of comparison should match types!"); 4468 break; 4469 } 4470 } 4471 4472 // Memoize nodes. 4473 SDNode *N; 4474 SDVTList VTs = getVTList(VT); 4475 4476 if (VT != MVT::Glue) { 4477 FoldingSetNodeID ID; 4478 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4479 void *IP = 0; 4480 4481 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4482 return SDValue(E, 0); 4483 4484 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4485 CSEMap.InsertNode(N, IP); 4486 } else { 4487 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4488 } 4489 4490 AllNodes.push_back(N); 4491#ifndef NDEBUG 4492 VerifySDNode(N); 4493#endif 4494 return SDValue(N, 0); 4495} 4496 4497SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4498 const std::vector<EVT> &ResultTys, 4499 const SDValue *Ops, unsigned NumOps) { 4500 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4501 Ops, NumOps); 4502} 4503 4504SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4505 const EVT *VTs, unsigned NumVTs, 4506 const SDValue *Ops, unsigned NumOps) { 4507 if (NumVTs == 1) 4508 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4509 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4510} 4511 4512SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4513 const SDValue *Ops, unsigned NumOps) { 4514 if (VTList.NumVTs == 1) 4515 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4516 4517#if 0 4518 switch (Opcode) { 4519 // FIXME: figure out how to safely handle things like 4520 // int foo(int x) { return 1 << (x & 255); } 4521 // int bar() { return foo(256); } 4522 case ISD::SRA_PARTS: 4523 case ISD::SRL_PARTS: 4524 case ISD::SHL_PARTS: 4525 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4526 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4527 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4528 else if (N3.getOpcode() == ISD::AND) 4529 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4530 // If the and is only masking out bits that cannot effect the shift, 4531 // eliminate the and. 4532 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4533 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4534 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4535 } 4536 break; 4537 } 4538#endif 4539 4540 // Memoize the node unless it returns a flag. 4541 SDNode *N; 4542 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4543 FoldingSetNodeID ID; 4544 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4545 void *IP = 0; 4546 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4547 return SDValue(E, 0); 4548 4549 if (NumOps == 1) { 4550 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4551 } else if (NumOps == 2) { 4552 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4553 } else if (NumOps == 3) { 4554 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4555 Ops[2]); 4556 } else { 4557 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4558 } 4559 CSEMap.InsertNode(N, IP); 4560 } else { 4561 if (NumOps == 1) { 4562 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4563 } else if (NumOps == 2) { 4564 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4565 } else if (NumOps == 3) { 4566 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4567 Ops[2]); 4568 } else { 4569 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4570 } 4571 } 4572 AllNodes.push_back(N); 4573#ifndef NDEBUG 4574 VerifySDNode(N); 4575#endif 4576 return SDValue(N, 0); 4577} 4578 4579SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4580 return getNode(Opcode, DL, VTList, 0, 0); 4581} 4582 4583SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4584 SDValue N1) { 4585 SDValue Ops[] = { N1 }; 4586 return getNode(Opcode, DL, VTList, Ops, 1); 4587} 4588 4589SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4590 SDValue N1, SDValue N2) { 4591 SDValue Ops[] = { N1, N2 }; 4592 return getNode(Opcode, DL, VTList, Ops, 2); 4593} 4594 4595SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4596 SDValue N1, SDValue N2, SDValue N3) { 4597 SDValue Ops[] = { N1, N2, N3 }; 4598 return getNode(Opcode, DL, VTList, Ops, 3); 4599} 4600 4601SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4602 SDValue N1, SDValue N2, SDValue N3, 4603 SDValue N4) { 4604 SDValue Ops[] = { N1, N2, N3, N4 }; 4605 return getNode(Opcode, DL, VTList, Ops, 4); 4606} 4607 4608SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4609 SDValue N1, SDValue N2, SDValue N3, 4610 SDValue N4, SDValue N5) { 4611 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4612 return getNode(Opcode, DL, VTList, Ops, 5); 4613} 4614 4615SDVTList SelectionDAG::getVTList(EVT VT) { 4616 return makeVTList(SDNode::getValueTypeList(VT), 1); 4617} 4618 4619SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4620 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4621 E = VTList.rend(); I != E; ++I) 4622 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4623 return *I; 4624 4625 EVT *Array = Allocator.Allocate<EVT>(2); 4626 Array[0] = VT1; 4627 Array[1] = VT2; 4628 SDVTList Result = makeVTList(Array, 2); 4629 VTList.push_back(Result); 4630 return Result; 4631} 4632 4633SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4634 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4635 E = VTList.rend(); I != E; ++I) 4636 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4637 I->VTs[2] == VT3) 4638 return *I; 4639 4640 EVT *Array = Allocator.Allocate<EVT>(3); 4641 Array[0] = VT1; 4642 Array[1] = VT2; 4643 Array[2] = VT3; 4644 SDVTList Result = makeVTList(Array, 3); 4645 VTList.push_back(Result); 4646 return Result; 4647} 4648 4649SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4650 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4651 E = VTList.rend(); I != E; ++I) 4652 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4653 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4654 return *I; 4655 4656 EVT *Array = Allocator.Allocate<EVT>(4); 4657 Array[0] = VT1; 4658 Array[1] = VT2; 4659 Array[2] = VT3; 4660 Array[3] = VT4; 4661 SDVTList Result = makeVTList(Array, 4); 4662 VTList.push_back(Result); 4663 return Result; 4664} 4665 4666SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4667 switch (NumVTs) { 4668 case 0: llvm_unreachable("Cannot have nodes without results!"); 4669 case 1: return getVTList(VTs[0]); 4670 case 2: return getVTList(VTs[0], VTs[1]); 4671 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4672 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4673 default: break; 4674 } 4675 4676 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4677 E = VTList.rend(); I != E; ++I) { 4678 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4679 continue; 4680 4681 bool NoMatch = false; 4682 for (unsigned i = 2; i != NumVTs; ++i) 4683 if (VTs[i] != I->VTs[i]) { 4684 NoMatch = true; 4685 break; 4686 } 4687 if (!NoMatch) 4688 return *I; 4689 } 4690 4691 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4692 std::copy(VTs, VTs+NumVTs, Array); 4693 SDVTList Result = makeVTList(Array, NumVTs); 4694 VTList.push_back(Result); 4695 return Result; 4696} 4697 4698 4699/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4700/// specified operands. If the resultant node already exists in the DAG, 4701/// this does not modify the specified node, instead it returns the node that 4702/// already exists. If the resultant node does not exist in the DAG, the 4703/// input node is returned. As a degenerate case, if you specify the same 4704/// input operands as the node already has, the input node is returned. 4705SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4706 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4707 4708 // Check to see if there is no change. 4709 if (Op == N->getOperand(0)) return N; 4710 4711 // See if the modified node already exists. 4712 void *InsertPos = 0; 4713 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4714 return Existing; 4715 4716 // Nope it doesn't. Remove the node from its current place in the maps. 4717 if (InsertPos) 4718 if (!RemoveNodeFromCSEMaps(N)) 4719 InsertPos = 0; 4720 4721 // Now we update the operands. 4722 N->OperandList[0].set(Op); 4723 4724 // If this gets put into a CSE map, add it. 4725 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4726 return N; 4727} 4728 4729SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4730 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4731 4732 // Check to see if there is no change. 4733 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4734 return N; // No operands changed, just return the input node. 4735 4736 // See if the modified node already exists. 4737 void *InsertPos = 0; 4738 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4739 return Existing; 4740 4741 // Nope it doesn't. Remove the node from its current place in the maps. 4742 if (InsertPos) 4743 if (!RemoveNodeFromCSEMaps(N)) 4744 InsertPos = 0; 4745 4746 // Now we update the operands. 4747 if (N->OperandList[0] != Op1) 4748 N->OperandList[0].set(Op1); 4749 if (N->OperandList[1] != Op2) 4750 N->OperandList[1].set(Op2); 4751 4752 // If this gets put into a CSE map, add it. 4753 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4754 return N; 4755} 4756 4757SDNode *SelectionDAG:: 4758UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4759 SDValue Ops[] = { Op1, Op2, Op3 }; 4760 return UpdateNodeOperands(N, Ops, 3); 4761} 4762 4763SDNode *SelectionDAG:: 4764UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4765 SDValue Op3, SDValue Op4) { 4766 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4767 return UpdateNodeOperands(N, Ops, 4); 4768} 4769 4770SDNode *SelectionDAG:: 4771UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4772 SDValue Op3, SDValue Op4, SDValue Op5) { 4773 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4774 return UpdateNodeOperands(N, Ops, 5); 4775} 4776 4777SDNode *SelectionDAG:: 4778UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4779 assert(N->getNumOperands() == NumOps && 4780 "Update with wrong number of operands"); 4781 4782 // Check to see if there is no change. 4783 bool AnyChange = false; 4784 for (unsigned i = 0; i != NumOps; ++i) { 4785 if (Ops[i] != N->getOperand(i)) { 4786 AnyChange = true; 4787 break; 4788 } 4789 } 4790 4791 // No operands changed, just return the input node. 4792 if (!AnyChange) return N; 4793 4794 // See if the modified node already exists. 4795 void *InsertPos = 0; 4796 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4797 return Existing; 4798 4799 // Nope it doesn't. Remove the node from its current place in the maps. 4800 if (InsertPos) 4801 if (!RemoveNodeFromCSEMaps(N)) 4802 InsertPos = 0; 4803 4804 // Now we update the operands. 4805 for (unsigned i = 0; i != NumOps; ++i) 4806 if (N->OperandList[i] != Ops[i]) 4807 N->OperandList[i].set(Ops[i]); 4808 4809 // If this gets put into a CSE map, add it. 4810 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4811 return N; 4812} 4813 4814/// DropOperands - Release the operands and set this node to have 4815/// zero operands. 4816void SDNode::DropOperands() { 4817 // Unlike the code in MorphNodeTo that does this, we don't need to 4818 // watch for dead nodes here. 4819 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4820 SDUse &Use = *I++; 4821 Use.set(SDValue()); 4822 } 4823} 4824 4825/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4826/// machine opcode. 4827/// 4828SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4829 EVT VT) { 4830 SDVTList VTs = getVTList(VT); 4831 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4832} 4833 4834SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4835 EVT VT, SDValue Op1) { 4836 SDVTList VTs = getVTList(VT); 4837 SDValue Ops[] = { Op1 }; 4838 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4839} 4840 4841SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4842 EVT VT, SDValue Op1, 4843 SDValue Op2) { 4844 SDVTList VTs = getVTList(VT); 4845 SDValue Ops[] = { Op1, Op2 }; 4846 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4847} 4848 4849SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4850 EVT VT, SDValue Op1, 4851 SDValue Op2, SDValue Op3) { 4852 SDVTList VTs = getVTList(VT); 4853 SDValue Ops[] = { Op1, Op2, Op3 }; 4854 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4855} 4856 4857SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4858 EVT VT, const SDValue *Ops, 4859 unsigned NumOps) { 4860 SDVTList VTs = getVTList(VT); 4861 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4862} 4863 4864SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4865 EVT VT1, EVT VT2, const SDValue *Ops, 4866 unsigned NumOps) { 4867 SDVTList VTs = getVTList(VT1, VT2); 4868 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4869} 4870 4871SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4872 EVT VT1, EVT VT2) { 4873 SDVTList VTs = getVTList(VT1, VT2); 4874 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4875} 4876 4877SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4878 EVT VT1, EVT VT2, EVT VT3, 4879 const SDValue *Ops, unsigned NumOps) { 4880 SDVTList VTs = getVTList(VT1, VT2, VT3); 4881 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4882} 4883 4884SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4885 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4886 const SDValue *Ops, unsigned NumOps) { 4887 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4888 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4889} 4890 4891SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4892 EVT VT1, EVT VT2, 4893 SDValue Op1) { 4894 SDVTList VTs = getVTList(VT1, VT2); 4895 SDValue Ops[] = { Op1 }; 4896 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4897} 4898 4899SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4900 EVT VT1, EVT VT2, 4901 SDValue Op1, SDValue Op2) { 4902 SDVTList VTs = getVTList(VT1, VT2); 4903 SDValue Ops[] = { Op1, Op2 }; 4904 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4905} 4906 4907SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4908 EVT VT1, EVT VT2, 4909 SDValue Op1, SDValue Op2, 4910 SDValue Op3) { 4911 SDVTList VTs = getVTList(VT1, VT2); 4912 SDValue Ops[] = { Op1, Op2, Op3 }; 4913 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4914} 4915 4916SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4917 EVT VT1, EVT VT2, EVT VT3, 4918 SDValue Op1, SDValue Op2, 4919 SDValue Op3) { 4920 SDVTList VTs = getVTList(VT1, VT2, VT3); 4921 SDValue Ops[] = { Op1, Op2, Op3 }; 4922 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4923} 4924 4925SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4926 SDVTList VTs, const SDValue *Ops, 4927 unsigned NumOps) { 4928 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4929 // Reset the NodeID to -1. 4930 N->setNodeId(-1); 4931 return N; 4932} 4933 4934/// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away 4935/// the line number information on the merged node since it is not possible to 4936/// preserve the information that operation is associated with multiple lines. 4937/// This will make the debugger working better at -O0, were there is a higher 4938/// probability having other instructions associated with that line. 4939/// 4940SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) { 4941 DebugLoc NLoc = N->getDebugLoc(); 4942 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) { 4943 N->setDebugLoc(DebugLoc()); 4944 } 4945 return N; 4946} 4947 4948/// MorphNodeTo - This *mutates* the specified node to have the specified 4949/// return type, opcode, and operands. 4950/// 4951/// Note that MorphNodeTo returns the resultant node. If there is already a 4952/// node of the specified opcode and operands, it returns that node instead of 4953/// the current one. Note that the DebugLoc need not be the same. 4954/// 4955/// Using MorphNodeTo is faster than creating a new node and swapping it in 4956/// with ReplaceAllUsesWith both because it often avoids allocating a new 4957/// node, and because it doesn't require CSE recalculation for any of 4958/// the node's users. 4959/// 4960SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4961 SDVTList VTs, const SDValue *Ops, 4962 unsigned NumOps) { 4963 // If an identical node already exists, use it. 4964 void *IP = 0; 4965 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4966 FoldingSetNodeID ID; 4967 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4968 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4969 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc()); 4970 } 4971 4972 if (!RemoveNodeFromCSEMaps(N)) 4973 IP = 0; 4974 4975 // Start the morphing. 4976 N->NodeType = Opc; 4977 N->ValueList = VTs.VTs; 4978 N->NumValues = VTs.NumVTs; 4979 4980 // Clear the operands list, updating used nodes to remove this from their 4981 // use list. Keep track of any operands that become dead as a result. 4982 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4983 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4984 SDUse &Use = *I++; 4985 SDNode *Used = Use.getNode(); 4986 Use.set(SDValue()); 4987 if (Used->use_empty()) 4988 DeadNodeSet.insert(Used); 4989 } 4990 4991 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4992 // Initialize the memory references information. 4993 MN->setMemRefs(0, 0); 4994 // If NumOps is larger than the # of operands we can have in a 4995 // MachineSDNode, reallocate the operand list. 4996 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4997 if (MN->OperandsNeedDelete) 4998 delete[] MN->OperandList; 4999 if (NumOps > array_lengthof(MN->LocalOperands)) 5000 // We're creating a final node that will live unmorphed for the 5001 // remainder of the current SelectionDAG iteration, so we can allocate 5002 // the operands directly out of a pool with no recycling metadata. 5003 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5004 Ops, NumOps); 5005 else 5006 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 5007 MN->OperandsNeedDelete = false; 5008 } else 5009 MN->InitOperands(MN->OperandList, Ops, NumOps); 5010 } else { 5011 // If NumOps is larger than the # of operands we currently have, reallocate 5012 // the operand list. 5013 if (NumOps > N->NumOperands) { 5014 if (N->OperandsNeedDelete) 5015 delete[] N->OperandList; 5016 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 5017 N->OperandsNeedDelete = true; 5018 } else 5019 N->InitOperands(N->OperandList, Ops, NumOps); 5020 } 5021 5022 // Delete any nodes that are still dead after adding the uses for the 5023 // new operands. 5024 if (!DeadNodeSet.empty()) { 5025 SmallVector<SDNode *, 16> DeadNodes; 5026 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 5027 E = DeadNodeSet.end(); I != E; ++I) 5028 if ((*I)->use_empty()) 5029 DeadNodes.push_back(*I); 5030 RemoveDeadNodes(DeadNodes); 5031 } 5032 5033 if (IP) 5034 CSEMap.InsertNode(N, IP); // Memoize the new node. 5035 return N; 5036} 5037 5038 5039/// getMachineNode - These are used for target selectors to create a new node 5040/// with specified return type(s), MachineInstr opcode, and operands. 5041/// 5042/// Note that getMachineNode returns the resultant node. If there is already a 5043/// node of the specified opcode and operands, it returns that node instead of 5044/// the current one. 5045MachineSDNode * 5046SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 5047 SDVTList VTs = getVTList(VT); 5048 return getMachineNode(Opcode, dl, VTs, 0, 0); 5049} 5050 5051MachineSDNode * 5052SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 5053 SDVTList VTs = getVTList(VT); 5054 SDValue Ops[] = { Op1 }; 5055 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5056} 5057 5058MachineSDNode * 5059SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5060 SDValue Op1, SDValue Op2) { 5061 SDVTList VTs = getVTList(VT); 5062 SDValue Ops[] = { Op1, Op2 }; 5063 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5064} 5065 5066MachineSDNode * 5067SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5068 SDValue Op1, SDValue Op2, SDValue Op3) { 5069 SDVTList VTs = getVTList(VT); 5070 SDValue Ops[] = { Op1, Op2, Op3 }; 5071 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5072} 5073 5074MachineSDNode * 5075SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 5076 const SDValue *Ops, unsigned NumOps) { 5077 SDVTList VTs = getVTList(VT); 5078 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5079} 5080 5081MachineSDNode * 5082SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 5083 SDVTList VTs = getVTList(VT1, VT2); 5084 return getMachineNode(Opcode, dl, VTs, 0, 0); 5085} 5086 5087MachineSDNode * 5088SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5089 EVT VT1, EVT VT2, SDValue Op1) { 5090 SDVTList VTs = getVTList(VT1, VT2); 5091 SDValue Ops[] = { Op1 }; 5092 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5093} 5094 5095MachineSDNode * 5096SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5097 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 5098 SDVTList VTs = getVTList(VT1, VT2); 5099 SDValue Ops[] = { Op1, Op2 }; 5100 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5101} 5102 5103MachineSDNode * 5104SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5105 EVT VT1, EVT VT2, SDValue Op1, 5106 SDValue Op2, SDValue Op3) { 5107 SDVTList VTs = getVTList(VT1, VT2); 5108 SDValue Ops[] = { Op1, Op2, Op3 }; 5109 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5110} 5111 5112MachineSDNode * 5113SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5114 EVT VT1, EVT VT2, 5115 const SDValue *Ops, unsigned NumOps) { 5116 SDVTList VTs = getVTList(VT1, VT2); 5117 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5118} 5119 5120MachineSDNode * 5121SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5122 EVT VT1, EVT VT2, EVT VT3, 5123 SDValue Op1, SDValue Op2) { 5124 SDVTList VTs = getVTList(VT1, VT2, VT3); 5125 SDValue Ops[] = { Op1, Op2 }; 5126 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5127} 5128 5129MachineSDNode * 5130SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5131 EVT VT1, EVT VT2, EVT VT3, 5132 SDValue Op1, SDValue Op2, SDValue Op3) { 5133 SDVTList VTs = getVTList(VT1, VT2, VT3); 5134 SDValue Ops[] = { Op1, Op2, Op3 }; 5135 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 5136} 5137 5138MachineSDNode * 5139SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5140 EVT VT1, EVT VT2, EVT VT3, 5141 const SDValue *Ops, unsigned NumOps) { 5142 SDVTList VTs = getVTList(VT1, VT2, VT3); 5143 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5144} 5145 5146MachineSDNode * 5147SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 5148 EVT VT2, EVT VT3, EVT VT4, 5149 const SDValue *Ops, unsigned NumOps) { 5150 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 5151 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5152} 5153 5154MachineSDNode * 5155SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5156 const std::vector<EVT> &ResultTys, 5157 const SDValue *Ops, unsigned NumOps) { 5158 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5159 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5160} 5161 5162MachineSDNode * 5163SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5164 const SDValue *Ops, unsigned NumOps) { 5165 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5166 MachineSDNode *N; 5167 void *IP = 0; 5168 5169 if (DoCSE) { 5170 FoldingSetNodeID ID; 5171 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5172 IP = 0; 5173 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 5174 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL)); 5175 } 5176 } 5177 5178 // Allocate a new MachineSDNode. 5179 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5180 5181 // Initialize the operands list. 5182 if (NumOps > array_lengthof(N->LocalOperands)) 5183 // We're creating a final node that will live unmorphed for the 5184 // remainder of the current SelectionDAG iteration, so we can allocate 5185 // the operands directly out of a pool with no recycling metadata. 5186 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5187 Ops, NumOps); 5188 else 5189 N->InitOperands(N->LocalOperands, Ops, NumOps); 5190 N->OperandsNeedDelete = false; 5191 5192 if (DoCSE) 5193 CSEMap.InsertNode(N, IP); 5194 5195 AllNodes.push_back(N); 5196#ifndef NDEBUG 5197 VerifyMachineNode(N); 5198#endif 5199 return N; 5200} 5201 5202/// getTargetExtractSubreg - A convenience function for creating 5203/// TargetOpcode::EXTRACT_SUBREG nodes. 5204SDValue 5205SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5206 SDValue Operand) { 5207 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5208 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5209 VT, Operand, SRIdxVal); 5210 return SDValue(Subreg, 0); 5211} 5212 5213/// getTargetInsertSubreg - A convenience function for creating 5214/// TargetOpcode::INSERT_SUBREG nodes. 5215SDValue 5216SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5217 SDValue Operand, SDValue Subreg) { 5218 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5219 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5220 VT, Operand, Subreg, SRIdxVal); 5221 return SDValue(Result, 0); 5222} 5223 5224/// getNodeIfExists - Get the specified node if it's already available, or 5225/// else return NULL. 5226SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5227 const SDValue *Ops, unsigned NumOps) { 5228 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5229 FoldingSetNodeID ID; 5230 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5231 void *IP = 0; 5232 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5233 return E; 5234 } 5235 return NULL; 5236} 5237 5238/// getDbgValue - Creates a SDDbgValue node. 5239/// 5240SDDbgValue * 5241SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5242 DebugLoc DL, unsigned O) { 5243 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5244} 5245 5246SDDbgValue * 5247SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5248 DebugLoc DL, unsigned O) { 5249 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5250} 5251 5252SDDbgValue * 5253SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5254 DebugLoc DL, unsigned O) { 5255 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5256} 5257 5258namespace { 5259 5260/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5261/// pointed to by a use iterator is deleted, increment the use iterator 5262/// so that it doesn't dangle. 5263/// 5264/// This class also manages a "downlink" DAGUpdateListener, to forward 5265/// messages to ReplaceAllUsesWith's callers. 5266/// 5267class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5268 SelectionDAG::DAGUpdateListener *DownLink; 5269 SDNode::use_iterator &UI; 5270 SDNode::use_iterator &UE; 5271 5272 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5273 // Increment the iterator as needed. 5274 while (UI != UE && N == *UI) 5275 ++UI; 5276 5277 // Then forward the message. 5278 if (DownLink) DownLink->NodeDeleted(N, E); 5279 } 5280 5281 virtual void NodeUpdated(SDNode *N) { 5282 // Just forward the message. 5283 if (DownLink) DownLink->NodeUpdated(N); 5284 } 5285 5286public: 5287 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5288 SDNode::use_iterator &ui, 5289 SDNode::use_iterator &ue) 5290 : DownLink(dl), UI(ui), UE(ue) {} 5291}; 5292 5293} 5294 5295/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5296/// This can cause recursive merging of nodes in the DAG. 5297/// 5298/// This version assumes From has a single result value. 5299/// 5300void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5301 DAGUpdateListener *UpdateListener) { 5302 SDNode *From = FromN.getNode(); 5303 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5304 "Cannot replace with this method!"); 5305 assert(From != To.getNode() && "Cannot replace uses of with self"); 5306 5307 // Iterate over all the existing uses of From. New uses will be added 5308 // to the beginning of the use list, which we avoid visiting. 5309 // This specifically avoids visiting uses of From that arise while the 5310 // replacement is happening, because any such uses would be the result 5311 // of CSE: If an existing node looks like From after one of its operands 5312 // is replaced by To, we don't want to replace of all its users with To 5313 // too. See PR3018 for more info. 5314 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5315 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5316 while (UI != UE) { 5317 SDNode *User = *UI; 5318 5319 // This node is about to morph, remove its old self from the CSE maps. 5320 RemoveNodeFromCSEMaps(User); 5321 5322 // A user can appear in a use list multiple times, and when this 5323 // happens the uses are usually next to each other in the list. 5324 // To help reduce the number of CSE recomputations, process all 5325 // the uses of this user that we can find this way. 5326 do { 5327 SDUse &Use = UI.getUse(); 5328 ++UI; 5329 Use.set(To); 5330 } while (UI != UE && *UI == User); 5331 5332 // Now that we have modified User, add it back to the CSE maps. If it 5333 // already exists there, recursively merge the results together. 5334 AddModifiedNodeToCSEMaps(User, &Listener); 5335 } 5336 5337 // If we just RAUW'd the root, take note. 5338 if (FromN == getRoot()) 5339 setRoot(To); 5340} 5341 5342/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5343/// This can cause recursive merging of nodes in the DAG. 5344/// 5345/// This version assumes that for each value of From, there is a 5346/// corresponding value in To in the same position with the same type. 5347/// 5348void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5349 DAGUpdateListener *UpdateListener) { 5350#ifndef NDEBUG 5351 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5352 assert((!From->hasAnyUseOfValue(i) || 5353 From->getValueType(i) == To->getValueType(i)) && 5354 "Cannot use this version of ReplaceAllUsesWith!"); 5355#endif 5356 5357 // Handle the trivial case. 5358 if (From == To) 5359 return; 5360 5361 // Iterate over just the existing users of From. See the comments in 5362 // the ReplaceAllUsesWith above. 5363 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5364 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5365 while (UI != UE) { 5366 SDNode *User = *UI; 5367 5368 // This node is about to morph, remove its old self from the CSE maps. 5369 RemoveNodeFromCSEMaps(User); 5370 5371 // A user can appear in a use list multiple times, and when this 5372 // happens the uses are usually next to each other in the list. 5373 // To help reduce the number of CSE recomputations, process all 5374 // the uses of this user that we can find this way. 5375 do { 5376 SDUse &Use = UI.getUse(); 5377 ++UI; 5378 Use.setNode(To); 5379 } while (UI != UE && *UI == User); 5380 5381 // Now that we have modified User, add it back to the CSE maps. If it 5382 // already exists there, recursively merge the results together. 5383 AddModifiedNodeToCSEMaps(User, &Listener); 5384 } 5385 5386 // If we just RAUW'd the root, take note. 5387 if (From == getRoot().getNode()) 5388 setRoot(SDValue(To, getRoot().getResNo())); 5389} 5390 5391/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5392/// This can cause recursive merging of nodes in the DAG. 5393/// 5394/// This version can replace From with any result values. To must match the 5395/// number and types of values returned by From. 5396void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5397 const SDValue *To, 5398 DAGUpdateListener *UpdateListener) { 5399 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5400 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5401 5402 // Iterate over just the existing users of From. See the comments in 5403 // the ReplaceAllUsesWith above. 5404 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5405 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5406 while (UI != UE) { 5407 SDNode *User = *UI; 5408 5409 // This node is about to morph, remove its old self from the CSE maps. 5410 RemoveNodeFromCSEMaps(User); 5411 5412 // A user can appear in a use list multiple times, and when this 5413 // happens the uses are usually next to each other in the list. 5414 // To help reduce the number of CSE recomputations, process all 5415 // the uses of this user that we can find this way. 5416 do { 5417 SDUse &Use = UI.getUse(); 5418 const SDValue &ToOp = To[Use.getResNo()]; 5419 ++UI; 5420 Use.set(ToOp); 5421 } while (UI != UE && *UI == User); 5422 5423 // Now that we have modified User, add it back to the CSE maps. If it 5424 // already exists there, recursively merge the results together. 5425 AddModifiedNodeToCSEMaps(User, &Listener); 5426 } 5427 5428 // If we just RAUW'd the root, take note. 5429 if (From == getRoot().getNode()) 5430 setRoot(SDValue(To[getRoot().getResNo()])); 5431} 5432 5433/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5434/// uses of other values produced by From.getNode() alone. The Deleted 5435/// vector is handled the same way as for ReplaceAllUsesWith. 5436void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5437 DAGUpdateListener *UpdateListener){ 5438 // Handle the really simple, really trivial case efficiently. 5439 if (From == To) return; 5440 5441 // Handle the simple, trivial, case efficiently. 5442 if (From.getNode()->getNumValues() == 1) { 5443 ReplaceAllUsesWith(From, To, UpdateListener); 5444 return; 5445 } 5446 5447 // Iterate over just the existing users of From. See the comments in 5448 // the ReplaceAllUsesWith above. 5449 SDNode::use_iterator UI = From.getNode()->use_begin(), 5450 UE = From.getNode()->use_end(); 5451 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5452 while (UI != UE) { 5453 SDNode *User = *UI; 5454 bool UserRemovedFromCSEMaps = false; 5455 5456 // A user can appear in a use list multiple times, and when this 5457 // happens the uses are usually next to each other in the list. 5458 // To help reduce the number of CSE recomputations, process all 5459 // the uses of this user that we can find this way. 5460 do { 5461 SDUse &Use = UI.getUse(); 5462 5463 // Skip uses of different values from the same node. 5464 if (Use.getResNo() != From.getResNo()) { 5465 ++UI; 5466 continue; 5467 } 5468 5469 // If this node hasn't been modified yet, it's still in the CSE maps, 5470 // so remove its old self from the CSE maps. 5471 if (!UserRemovedFromCSEMaps) { 5472 RemoveNodeFromCSEMaps(User); 5473 UserRemovedFromCSEMaps = true; 5474 } 5475 5476 ++UI; 5477 Use.set(To); 5478 } while (UI != UE && *UI == User); 5479 5480 // We are iterating over all uses of the From node, so if a use 5481 // doesn't use the specific value, no changes are made. 5482 if (!UserRemovedFromCSEMaps) 5483 continue; 5484 5485 // Now that we have modified User, add it back to the CSE maps. If it 5486 // already exists there, recursively merge the results together. 5487 AddModifiedNodeToCSEMaps(User, &Listener); 5488 } 5489 5490 // If we just RAUW'd the root, take note. 5491 if (From == getRoot()) 5492 setRoot(To); 5493} 5494 5495namespace { 5496 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5497 /// to record information about a use. 5498 struct UseMemo { 5499 SDNode *User; 5500 unsigned Index; 5501 SDUse *Use; 5502 }; 5503 5504 /// operator< - Sort Memos by User. 5505 bool operator<(const UseMemo &L, const UseMemo &R) { 5506 return (intptr_t)L.User < (intptr_t)R.User; 5507 } 5508} 5509 5510/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5511/// uses of other values produced by From.getNode() alone. The same value 5512/// may appear in both the From and To list. The Deleted vector is 5513/// handled the same way as for ReplaceAllUsesWith. 5514void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5515 const SDValue *To, 5516 unsigned Num, 5517 DAGUpdateListener *UpdateListener){ 5518 // Handle the simple, trivial case efficiently. 5519 if (Num == 1) 5520 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5521 5522 // Read up all the uses and make records of them. This helps 5523 // processing new uses that are introduced during the 5524 // replacement process. 5525 SmallVector<UseMemo, 4> Uses; 5526 for (unsigned i = 0; i != Num; ++i) { 5527 unsigned FromResNo = From[i].getResNo(); 5528 SDNode *FromNode = From[i].getNode(); 5529 for (SDNode::use_iterator UI = FromNode->use_begin(), 5530 E = FromNode->use_end(); UI != E; ++UI) { 5531 SDUse &Use = UI.getUse(); 5532 if (Use.getResNo() == FromResNo) { 5533 UseMemo Memo = { *UI, i, &Use }; 5534 Uses.push_back(Memo); 5535 } 5536 } 5537 } 5538 5539 // Sort the uses, so that all the uses from a given User are together. 5540 std::sort(Uses.begin(), Uses.end()); 5541 5542 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5543 UseIndex != UseIndexEnd; ) { 5544 // We know that this user uses some value of From. If it is the right 5545 // value, update it. 5546 SDNode *User = Uses[UseIndex].User; 5547 5548 // This node is about to morph, remove its old self from the CSE maps. 5549 RemoveNodeFromCSEMaps(User); 5550 5551 // The Uses array is sorted, so all the uses for a given User 5552 // are next to each other in the list. 5553 // To help reduce the number of CSE recomputations, process all 5554 // the uses of this user that we can find this way. 5555 do { 5556 unsigned i = Uses[UseIndex].Index; 5557 SDUse &Use = *Uses[UseIndex].Use; 5558 ++UseIndex; 5559 5560 Use.set(To[i]); 5561 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5562 5563 // Now that we have modified User, add it back to the CSE maps. If it 5564 // already exists there, recursively merge the results together. 5565 AddModifiedNodeToCSEMaps(User, UpdateListener); 5566 } 5567} 5568 5569/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5570/// based on their topological order. It returns the maximum id and a vector 5571/// of the SDNodes* in assigned order by reference. 5572unsigned SelectionDAG::AssignTopologicalOrder() { 5573 5574 unsigned DAGSize = 0; 5575 5576 // SortedPos tracks the progress of the algorithm. Nodes before it are 5577 // sorted, nodes after it are unsorted. When the algorithm completes 5578 // it is at the end of the list. 5579 allnodes_iterator SortedPos = allnodes_begin(); 5580 5581 // Visit all the nodes. Move nodes with no operands to the front of 5582 // the list immediately. Annotate nodes that do have operands with their 5583 // operand count. Before we do this, the Node Id fields of the nodes 5584 // may contain arbitrary values. After, the Node Id fields for nodes 5585 // before SortedPos will contain the topological sort index, and the 5586 // Node Id fields for nodes At SortedPos and after will contain the 5587 // count of outstanding operands. 5588 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5589 SDNode *N = I++; 5590 checkForCycles(N); 5591 unsigned Degree = N->getNumOperands(); 5592 if (Degree == 0) { 5593 // A node with no uses, add it to the result array immediately. 5594 N->setNodeId(DAGSize++); 5595 allnodes_iterator Q = N; 5596 if (Q != SortedPos) 5597 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5598 assert(SortedPos != AllNodes.end() && "Overran node list"); 5599 ++SortedPos; 5600 } else { 5601 // Temporarily use the Node Id as scratch space for the degree count. 5602 N->setNodeId(Degree); 5603 } 5604 } 5605 5606 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5607 // such that by the time the end is reached all nodes will be sorted. 5608 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5609 SDNode *N = I; 5610 checkForCycles(N); 5611 // N is in sorted position, so all its uses have one less operand 5612 // that needs to be sorted. 5613 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5614 UI != UE; ++UI) { 5615 SDNode *P = *UI; 5616 unsigned Degree = P->getNodeId(); 5617 assert(Degree != 0 && "Invalid node degree"); 5618 --Degree; 5619 if (Degree == 0) { 5620 // All of P's operands are sorted, so P may sorted now. 5621 P->setNodeId(DAGSize++); 5622 if (P != SortedPos) 5623 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5624 assert(SortedPos != AllNodes.end() && "Overran node list"); 5625 ++SortedPos; 5626 } else { 5627 // Update P's outstanding operand count. 5628 P->setNodeId(Degree); 5629 } 5630 } 5631 if (I == SortedPos) { 5632#ifndef NDEBUG 5633 SDNode *S = ++I; 5634 dbgs() << "Overran sorted position:\n"; 5635 S->dumprFull(); 5636#endif 5637 llvm_unreachable(0); 5638 } 5639 } 5640 5641 assert(SortedPos == AllNodes.end() && 5642 "Topological sort incomplete!"); 5643 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5644 "First node in topological sort is not the entry token!"); 5645 assert(AllNodes.front().getNodeId() == 0 && 5646 "First node in topological sort has non-zero id!"); 5647 assert(AllNodes.front().getNumOperands() == 0 && 5648 "First node in topological sort has operands!"); 5649 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5650 "Last node in topologic sort has unexpected id!"); 5651 assert(AllNodes.back().use_empty() && 5652 "Last node in topologic sort has users!"); 5653 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5654 return DAGSize; 5655} 5656 5657/// AssignOrdering - Assign an order to the SDNode. 5658void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5659 assert(SD && "Trying to assign an order to a null node!"); 5660 Ordering->add(SD, Order); 5661} 5662 5663/// GetOrdering - Get the order for the SDNode. 5664unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5665 assert(SD && "Trying to get the order of a null node!"); 5666 return Ordering->getOrder(SD); 5667} 5668 5669/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5670/// value is produced by SD. 5671void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5672 DbgInfo->add(DB, SD, isParameter); 5673 if (SD) 5674 SD->setHasDebugValue(true); 5675} 5676 5677/// TransferDbgValues - Transfer SDDbgValues. 5678void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5679 if (From == To || !From.getNode()->getHasDebugValue()) 5680 return; 5681 SDNode *FromNode = From.getNode(); 5682 SDNode *ToNode = To.getNode(); 5683 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode); 5684 SmallVector<SDDbgValue *, 2> ClonedDVs; 5685 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end(); 5686 I != E; ++I) { 5687 SDDbgValue *Dbg = *I; 5688 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5689 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5690 Dbg->getOffset(), Dbg->getDebugLoc(), 5691 Dbg->getOrder()); 5692 ClonedDVs.push_back(Clone); 5693 } 5694 } 5695 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5696 E = ClonedDVs.end(); I != E; ++I) 5697 AddDbgValue(*I, ToNode, false); 5698} 5699 5700//===----------------------------------------------------------------------===// 5701// SDNode Class 5702//===----------------------------------------------------------------------===// 5703 5704HandleSDNode::~HandleSDNode() { 5705 DropOperands(); 5706} 5707 5708GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5709 const GlobalValue *GA, 5710 EVT VT, int64_t o, unsigned char TF) 5711 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5712 TheGlobal = GA; 5713} 5714 5715MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5716 MachineMemOperand *mmo) 5717 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5718 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5719 MMO->isNonTemporal(), MMO->isInvariant()); 5720 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5721 assert(isNonTemporal() == MMO->isNonTemporal() && 5722 "Non-temporal encoding error!"); 5723 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5724} 5725 5726MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5727 const SDValue *Ops, unsigned NumOps, EVT memvt, 5728 MachineMemOperand *mmo) 5729 : SDNode(Opc, dl, VTs, Ops, NumOps), 5730 MemoryVT(memvt), MMO(mmo) { 5731 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5732 MMO->isNonTemporal(), MMO->isInvariant()); 5733 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5734 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5735} 5736 5737/// Profile - Gather unique data for the node. 5738/// 5739void SDNode::Profile(FoldingSetNodeID &ID) const { 5740 AddNodeIDNode(ID, this); 5741} 5742 5743namespace { 5744 struct EVTArray { 5745 std::vector<EVT> VTs; 5746 5747 EVTArray() { 5748 VTs.reserve(MVT::LAST_VALUETYPE); 5749 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5750 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5751 } 5752 }; 5753} 5754 5755static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5756static ManagedStatic<EVTArray> SimpleVTArray; 5757static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5758 5759/// getValueTypeList - Return a pointer to the specified value type. 5760/// 5761const EVT *SDNode::getValueTypeList(EVT VT) { 5762 if (VT.isExtended()) { 5763 sys::SmartScopedLock<true> Lock(*VTMutex); 5764 return &(*EVTs->insert(VT).first); 5765 } else { 5766 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5767 "Value type out of range!"); 5768 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5769 } 5770} 5771 5772/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5773/// indicated value. This method ignores uses of other values defined by this 5774/// operation. 5775bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5776 assert(Value < getNumValues() && "Bad value!"); 5777 5778 // TODO: Only iterate over uses of a given value of the node 5779 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5780 if (UI.getUse().getResNo() == Value) { 5781 if (NUses == 0) 5782 return false; 5783 --NUses; 5784 } 5785 } 5786 5787 // Found exactly the right number of uses? 5788 return NUses == 0; 5789} 5790 5791 5792/// hasAnyUseOfValue - Return true if there are any use of the indicated 5793/// value. This method ignores uses of other values defined by this operation. 5794bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5795 assert(Value < getNumValues() && "Bad value!"); 5796 5797 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5798 if (UI.getUse().getResNo() == Value) 5799 return true; 5800 5801 return false; 5802} 5803 5804 5805/// isOnlyUserOf - Return true if this node is the only use of N. 5806/// 5807bool SDNode::isOnlyUserOf(SDNode *N) const { 5808 bool Seen = false; 5809 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5810 SDNode *User = *I; 5811 if (User == this) 5812 Seen = true; 5813 else 5814 return false; 5815 } 5816 5817 return Seen; 5818} 5819 5820/// isOperand - Return true if this node is an operand of N. 5821/// 5822bool SDValue::isOperandOf(SDNode *N) const { 5823 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5824 if (*this == N->getOperand(i)) 5825 return true; 5826 return false; 5827} 5828 5829bool SDNode::isOperandOf(SDNode *N) const { 5830 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5831 if (this == N->OperandList[i].getNode()) 5832 return true; 5833 return false; 5834} 5835 5836/// reachesChainWithoutSideEffects - Return true if this operand (which must 5837/// be a chain) reaches the specified operand without crossing any 5838/// side-effecting instructions on any chain path. In practice, this looks 5839/// through token factors and non-volatile loads. In order to remain efficient, 5840/// this only looks a couple of nodes in, it does not do an exhaustive search. 5841bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5842 unsigned Depth) const { 5843 if (*this == Dest) return true; 5844 5845 // Don't search too deeply, we just want to be able to see through 5846 // TokenFactor's etc. 5847 if (Depth == 0) return false; 5848 5849 // If this is a token factor, all inputs to the TF happen in parallel. If any 5850 // of the operands of the TF does not reach dest, then we cannot do the xform. 5851 if (getOpcode() == ISD::TokenFactor) { 5852 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5853 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5854 return false; 5855 return true; 5856 } 5857 5858 // Loads don't have side effects, look through them. 5859 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5860 if (!Ld->isVolatile()) 5861 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5862 } 5863 return false; 5864} 5865 5866/// hasPredecessor - Return true if N is a predecessor of this node. 5867/// N is either an operand of this node, or can be reached by recursively 5868/// traversing up the operands. 5869/// NOTE: This is an expensive method. Use it carefully. 5870bool SDNode::hasPredecessor(const SDNode *N) const { 5871 SmallPtrSet<const SDNode *, 32> Visited; 5872 SmallVector<const SDNode *, 16> Worklist; 5873 return hasPredecessorHelper(N, Visited, Worklist); 5874} 5875 5876bool SDNode::hasPredecessorHelper(const SDNode *N, 5877 SmallPtrSet<const SDNode *, 32> &Visited, 5878 SmallVector<const SDNode *, 16> &Worklist) const { 5879 if (Visited.empty()) { 5880 Worklist.push_back(this); 5881 } else { 5882 // Take a look in the visited set. If we've already encountered this node 5883 // we needn't search further. 5884 if (Visited.count(N)) 5885 return true; 5886 } 5887 5888 // Haven't visited N yet. Continue the search. 5889 while (!Worklist.empty()) { 5890 const SDNode *M = Worklist.pop_back_val(); 5891 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) { 5892 SDNode *Op = M->getOperand(i).getNode(); 5893 if (Visited.insert(Op)) 5894 Worklist.push_back(Op); 5895 if (Op == N) 5896 return true; 5897 } 5898 } 5899 5900 return false; 5901} 5902 5903uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5904 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5905 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5906} 5907 5908std::string SDNode::getOperationName(const SelectionDAG *G) const { 5909 switch (getOpcode()) { 5910 default: 5911 if (getOpcode() < ISD::BUILTIN_OP_END) 5912 return "<<Unknown DAG Node>>"; 5913 if (isMachineOpcode()) { 5914 if (G) 5915 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5916 if (getMachineOpcode() < TII->getNumOpcodes()) 5917 return TII->get(getMachineOpcode()).getName(); 5918 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5919 } 5920 if (G) { 5921 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5922 const char *Name = TLI.getTargetNodeName(getOpcode()); 5923 if (Name) return Name; 5924 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5925 } 5926 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5927 5928#ifndef NDEBUG 5929 case ISD::DELETED_NODE: 5930 return "<<Deleted Node!>>"; 5931#endif 5932 case ISD::PREFETCH: return "Prefetch"; 5933 case ISD::MEMBARRIER: return "MemBarrier"; 5934 case ISD::ATOMIC_FENCE: return "AtomicFence"; 5935 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5936 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5937 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5938 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5939 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5940 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5941 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5942 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5943 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5944 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5945 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5946 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5947 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 5948 case ISD::ATOMIC_STORE: return "AtomicStore"; 5949 case ISD::PCMARKER: return "PCMarker"; 5950 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5951 case ISD::SRCVALUE: return "SrcValue"; 5952 case ISD::MDNODE_SDNODE: return "MDNode"; 5953 case ISD::EntryToken: return "EntryToken"; 5954 case ISD::TokenFactor: return "TokenFactor"; 5955 case ISD::AssertSext: return "AssertSext"; 5956 case ISD::AssertZext: return "AssertZext"; 5957 5958 case ISD::BasicBlock: return "BasicBlock"; 5959 case ISD::VALUETYPE: return "ValueType"; 5960 case ISD::Register: return "Register"; 5961 case ISD::RegisterMask: return "RegisterMask"; 5962 case ISD::Constant: return "Constant"; 5963 case ISD::ConstantFP: return "ConstantFP"; 5964 case ISD::GlobalAddress: return "GlobalAddress"; 5965 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5966 case ISD::FrameIndex: return "FrameIndex"; 5967 case ISD::JumpTable: return "JumpTable"; 5968 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5969 case ISD::RETURNADDR: return "RETURNADDR"; 5970 case ISD::FRAMEADDR: return "FRAMEADDR"; 5971 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5972 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5973 case ISD::LSDAADDR: return "LSDAADDR"; 5974 case ISD::EHSELECTION: return "EHSELECTION"; 5975 case ISD::EH_RETURN: return "EH_RETURN"; 5976 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5977 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5978 case ISD::ConstantPool: return "ConstantPool"; 5979 case ISD::ExternalSymbol: return "ExternalSymbol"; 5980 case ISD::BlockAddress: return "BlockAddress"; 5981 case ISD::INTRINSIC_WO_CHAIN: 5982 case ISD::INTRINSIC_VOID: 5983 case ISD::INTRINSIC_W_CHAIN: { 5984 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5985 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5986 if (IID < Intrinsic::num_intrinsics) 5987 return Intrinsic::getName((Intrinsic::ID)IID); 5988 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5989 return TII->getName(IID); 5990 llvm_unreachable("Invalid intrinsic ID"); 5991 } 5992 5993 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5994 case ISD::TargetConstant: return "TargetConstant"; 5995 case ISD::TargetConstantFP:return "TargetConstantFP"; 5996 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5997 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5998 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5999 case ISD::TargetJumpTable: return "TargetJumpTable"; 6000 case ISD::TargetConstantPool: return "TargetConstantPool"; 6001 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 6002 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 6003 6004 case ISD::CopyToReg: return "CopyToReg"; 6005 case ISD::CopyFromReg: return "CopyFromReg"; 6006 case ISD::UNDEF: return "undef"; 6007 case ISD::MERGE_VALUES: return "merge_values"; 6008 case ISD::INLINEASM: return "inlineasm"; 6009 case ISD::EH_LABEL: return "eh_label"; 6010 case ISD::HANDLENODE: return "handlenode"; 6011 6012 // Unary operators 6013 case ISD::FABS: return "fabs"; 6014 case ISD::FNEG: return "fneg"; 6015 case ISD::FSQRT: return "fsqrt"; 6016 case ISD::FSIN: return "fsin"; 6017 case ISD::FCOS: return "fcos"; 6018 case ISD::FTRUNC: return "ftrunc"; 6019 case ISD::FFLOOR: return "ffloor"; 6020 case ISD::FCEIL: return "fceil"; 6021 case ISD::FRINT: return "frint"; 6022 case ISD::FNEARBYINT: return "fnearbyint"; 6023 case ISD::FEXP: return "fexp"; 6024 case ISD::FEXP2: return "fexp2"; 6025 case ISD::FLOG: return "flog"; 6026 case ISD::FLOG2: return "flog2"; 6027 case ISD::FLOG10: return "flog10"; 6028 6029 // Binary operators 6030 case ISD::ADD: return "add"; 6031 case ISD::SUB: return "sub"; 6032 case ISD::MUL: return "mul"; 6033 case ISD::MULHU: return "mulhu"; 6034 case ISD::MULHS: return "mulhs"; 6035 case ISD::SDIV: return "sdiv"; 6036 case ISD::UDIV: return "udiv"; 6037 case ISD::SREM: return "srem"; 6038 case ISD::UREM: return "urem"; 6039 case ISD::SMUL_LOHI: return "smul_lohi"; 6040 case ISD::UMUL_LOHI: return "umul_lohi"; 6041 case ISD::SDIVREM: return "sdivrem"; 6042 case ISD::UDIVREM: return "udivrem"; 6043 case ISD::AND: return "and"; 6044 case ISD::OR: return "or"; 6045 case ISD::XOR: return "xor"; 6046 case ISD::SHL: return "shl"; 6047 case ISD::SRA: return "sra"; 6048 case ISD::SRL: return "srl"; 6049 case ISD::ROTL: return "rotl"; 6050 case ISD::ROTR: return "rotr"; 6051 case ISD::FADD: return "fadd"; 6052 case ISD::FSUB: return "fsub"; 6053 case ISD::FMUL: return "fmul"; 6054 case ISD::FDIV: return "fdiv"; 6055 case ISD::FMA: return "fma"; 6056 case ISD::FREM: return "frem"; 6057 case ISD::FCOPYSIGN: return "fcopysign"; 6058 case ISD::FGETSIGN: return "fgetsign"; 6059 case ISD::FPOW: return "fpow"; 6060 6061 case ISD::FPOWI: return "fpowi"; 6062 case ISD::SETCC: return "setcc"; 6063 case ISD::SELECT: return "select"; 6064 case ISD::VSELECT: return "vselect"; 6065 case ISD::SELECT_CC: return "select_cc"; 6066 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 6067 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 6068 case ISD::CONCAT_VECTORS: return "concat_vectors"; 6069 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 6070 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 6071 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 6072 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 6073 case ISD::CARRY_FALSE: return "carry_false"; 6074 case ISD::ADDC: return "addc"; 6075 case ISD::ADDE: return "adde"; 6076 case ISD::SADDO: return "saddo"; 6077 case ISD::UADDO: return "uaddo"; 6078 case ISD::SSUBO: return "ssubo"; 6079 case ISD::USUBO: return "usubo"; 6080 case ISD::SMULO: return "smulo"; 6081 case ISD::UMULO: return "umulo"; 6082 case ISD::SUBC: return "subc"; 6083 case ISD::SUBE: return "sube"; 6084 case ISD::SHL_PARTS: return "shl_parts"; 6085 case ISD::SRA_PARTS: return "sra_parts"; 6086 case ISD::SRL_PARTS: return "srl_parts"; 6087 6088 // Conversion operators. 6089 case ISD::SIGN_EXTEND: return "sign_extend"; 6090 case ISD::ZERO_EXTEND: return "zero_extend"; 6091 case ISD::ANY_EXTEND: return "any_extend"; 6092 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 6093 case ISD::TRUNCATE: return "truncate"; 6094 case ISD::FP_ROUND: return "fp_round"; 6095 case ISD::FLT_ROUNDS_: return "flt_rounds"; 6096 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 6097 case ISD::FP_EXTEND: return "fp_extend"; 6098 6099 case ISD::SINT_TO_FP: return "sint_to_fp"; 6100 case ISD::UINT_TO_FP: return "uint_to_fp"; 6101 case ISD::FP_TO_SINT: return "fp_to_sint"; 6102 case ISD::FP_TO_UINT: return "fp_to_uint"; 6103 case ISD::BITCAST: return "bitcast"; 6104 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 6105 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 6106 6107 case ISD::CONVERT_RNDSAT: { 6108 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 6109 default: llvm_unreachable("Unknown cvt code!"); 6110 case ISD::CVT_FF: return "cvt_ff"; 6111 case ISD::CVT_FS: return "cvt_fs"; 6112 case ISD::CVT_FU: return "cvt_fu"; 6113 case ISD::CVT_SF: return "cvt_sf"; 6114 case ISD::CVT_UF: return "cvt_uf"; 6115 case ISD::CVT_SS: return "cvt_ss"; 6116 case ISD::CVT_SU: return "cvt_su"; 6117 case ISD::CVT_US: return "cvt_us"; 6118 case ISD::CVT_UU: return "cvt_uu"; 6119 } 6120 } 6121 6122 // Control flow instructions 6123 case ISD::BR: return "br"; 6124 case ISD::BRIND: return "brind"; 6125 case ISD::BR_JT: return "br_jt"; 6126 case ISD::BRCOND: return "brcond"; 6127 case ISD::BR_CC: return "br_cc"; 6128 case ISD::CALLSEQ_START: return "callseq_start"; 6129 case ISD::CALLSEQ_END: return "callseq_end"; 6130 6131 // Other operators 6132 case ISD::LOAD: return "load"; 6133 case ISD::STORE: return "store"; 6134 case ISD::VAARG: return "vaarg"; 6135 case ISD::VACOPY: return "vacopy"; 6136 case ISD::VAEND: return "vaend"; 6137 case ISD::VASTART: return "vastart"; 6138 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 6139 case ISD::EXTRACT_ELEMENT: return "extract_element"; 6140 case ISD::BUILD_PAIR: return "build_pair"; 6141 case ISD::STACKSAVE: return "stacksave"; 6142 case ISD::STACKRESTORE: return "stackrestore"; 6143 case ISD::TRAP: return "trap"; 6144 6145 // Bit manipulation 6146 case ISD::BSWAP: return "bswap"; 6147 case ISD::CTPOP: return "ctpop"; 6148 case ISD::CTTZ: return "cttz"; 6149 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 6150 case ISD::CTLZ: return "ctlz"; 6151 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 6152 6153 // Trampolines 6154 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 6155 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 6156 6157 case ISD::CONDCODE: 6158 switch (cast<CondCodeSDNode>(this)->get()) { 6159 default: llvm_unreachable("Unknown setcc condition!"); 6160 case ISD::SETOEQ: return "setoeq"; 6161 case ISD::SETOGT: return "setogt"; 6162 case ISD::SETOGE: return "setoge"; 6163 case ISD::SETOLT: return "setolt"; 6164 case ISD::SETOLE: return "setole"; 6165 case ISD::SETONE: return "setone"; 6166 6167 case ISD::SETO: return "seto"; 6168 case ISD::SETUO: return "setuo"; 6169 case ISD::SETUEQ: return "setue"; 6170 case ISD::SETUGT: return "setugt"; 6171 case ISD::SETUGE: return "setuge"; 6172 case ISD::SETULT: return "setult"; 6173 case ISD::SETULE: return "setule"; 6174 case ISD::SETUNE: return "setune"; 6175 6176 case ISD::SETEQ: return "seteq"; 6177 case ISD::SETGT: return "setgt"; 6178 case ISD::SETGE: return "setge"; 6179 case ISD::SETLT: return "setlt"; 6180 case ISD::SETLE: return "setle"; 6181 case ISD::SETNE: return "setne"; 6182 6183 case ISD::SETTRUE: return "settrue"; 6184 case ISD::SETTRUE2: return "settrue2"; 6185 case ISD::SETFALSE: return "setfalse"; 6186 case ISD::SETFALSE2: return "setfalse2"; 6187 } 6188 } 6189} 6190 6191const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 6192 switch (AM) { 6193 default: 6194 return ""; 6195 case ISD::PRE_INC: 6196 return "<pre-inc>"; 6197 case ISD::PRE_DEC: 6198 return "<pre-dec>"; 6199 case ISD::POST_INC: 6200 return "<post-inc>"; 6201 case ISD::POST_DEC: 6202 return "<post-dec>"; 6203 } 6204} 6205 6206std::string ISD::ArgFlagsTy::getArgFlagsString() { 6207 std::string S = "< "; 6208 6209 if (isZExt()) 6210 S += "zext "; 6211 if (isSExt()) 6212 S += "sext "; 6213 if (isInReg()) 6214 S += "inreg "; 6215 if (isSRet()) 6216 S += "sret "; 6217 if (isByVal()) 6218 S += "byval "; 6219 if (isNest()) 6220 S += "nest "; 6221 if (getByValAlign()) 6222 S += "byval-align:" + utostr(getByValAlign()) + " "; 6223 if (getOrigAlign()) 6224 S += "orig-align:" + utostr(getOrigAlign()) + " "; 6225 if (getByValSize()) 6226 S += "byval-size:" + utostr(getByValSize()) + " "; 6227 return S + ">"; 6228} 6229 6230void SDNode::dump() const { dump(0); } 6231void SDNode::dump(const SelectionDAG *G) const { 6232 print(dbgs(), G); 6233 dbgs() << '\n'; 6234} 6235 6236void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 6237 OS << (void*)this << ": "; 6238 6239 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 6240 if (i) OS << ","; 6241 if (getValueType(i) == MVT::Other) 6242 OS << "ch"; 6243 else 6244 OS << getValueType(i).getEVTString(); 6245 } 6246 OS << " = " << getOperationName(G); 6247} 6248 6249void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 6250 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 6251 if (!MN->memoperands_empty()) { 6252 OS << "<"; 6253 OS << "Mem:"; 6254 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 6255 e = MN->memoperands_end(); i != e; ++i) { 6256 OS << **i; 6257 if (llvm::next(i) != e) 6258 OS << " "; 6259 } 6260 OS << ">"; 6261 } 6262 } else if (const ShuffleVectorSDNode *SVN = 6263 dyn_cast<ShuffleVectorSDNode>(this)) { 6264 OS << "<"; 6265 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 6266 int Idx = SVN->getMaskElt(i); 6267 if (i) OS << ","; 6268 if (Idx < 0) 6269 OS << "u"; 6270 else 6271 OS << Idx; 6272 } 6273 OS << ">"; 6274 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 6275 OS << '<' << CSDN->getAPIntValue() << '>'; 6276 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 6277 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 6278 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 6279 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 6280 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 6281 else { 6282 OS << "<APFloat("; 6283 CSDN->getValueAPF().bitcastToAPInt().dump(); 6284 OS << ")>"; 6285 } 6286 } else if (const GlobalAddressSDNode *GADN = 6287 dyn_cast<GlobalAddressSDNode>(this)) { 6288 int64_t offset = GADN->getOffset(); 6289 OS << '<'; 6290 WriteAsOperand(OS, GADN->getGlobal()); 6291 OS << '>'; 6292 if (offset > 0) 6293 OS << " + " << offset; 6294 else 6295 OS << " " << offset; 6296 if (unsigned int TF = GADN->getTargetFlags()) 6297 OS << " [TF=" << TF << ']'; 6298 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 6299 OS << "<" << FIDN->getIndex() << ">"; 6300 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 6301 OS << "<" << JTDN->getIndex() << ">"; 6302 if (unsigned int TF = JTDN->getTargetFlags()) 6303 OS << " [TF=" << TF << ']'; 6304 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 6305 int offset = CP->getOffset(); 6306 if (CP->isMachineConstantPoolEntry()) 6307 OS << "<" << *CP->getMachineCPVal() << ">"; 6308 else 6309 OS << "<" << *CP->getConstVal() << ">"; 6310 if (offset > 0) 6311 OS << " + " << offset; 6312 else 6313 OS << " " << offset; 6314 if (unsigned int TF = CP->getTargetFlags()) 6315 OS << " [TF=" << TF << ']'; 6316 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 6317 OS << "<"; 6318 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 6319 if (LBB) 6320 OS << LBB->getName() << " "; 6321 OS << (const void*)BBDN->getBasicBlock() << ">"; 6322 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 6323 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0); 6324 } else if (const ExternalSymbolSDNode *ES = 6325 dyn_cast<ExternalSymbolSDNode>(this)) { 6326 OS << "'" << ES->getSymbol() << "'"; 6327 if (unsigned int TF = ES->getTargetFlags()) 6328 OS << " [TF=" << TF << ']'; 6329 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 6330 if (M->getValue()) 6331 OS << "<" << M->getValue() << ">"; 6332 else 6333 OS << "<null>"; 6334 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 6335 if (MD->getMD()) 6336 OS << "<" << MD->getMD() << ">"; 6337 else 6338 OS << "<null>"; 6339 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6340 OS << ":" << N->getVT().getEVTString(); 6341 } 6342 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6343 OS << "<" << *LD->getMemOperand(); 6344 6345 bool doExt = true; 6346 switch (LD->getExtensionType()) { 6347 default: doExt = false; break; 6348 case ISD::EXTLOAD: OS << ", anyext"; break; 6349 case ISD::SEXTLOAD: OS << ", sext"; break; 6350 case ISD::ZEXTLOAD: OS << ", zext"; break; 6351 } 6352 if (doExt) 6353 OS << " from " << LD->getMemoryVT().getEVTString(); 6354 6355 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6356 if (*AM) 6357 OS << ", " << AM; 6358 6359 OS << ">"; 6360 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6361 OS << "<" << *ST->getMemOperand(); 6362 6363 if (ST->isTruncatingStore()) 6364 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6365 6366 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6367 if (*AM) 6368 OS << ", " << AM; 6369 6370 OS << ">"; 6371 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6372 OS << "<" << *M->getMemOperand() << ">"; 6373 } else if (const BlockAddressSDNode *BA = 6374 dyn_cast<BlockAddressSDNode>(this)) { 6375 OS << "<"; 6376 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6377 OS << ", "; 6378 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6379 OS << ">"; 6380 if (unsigned int TF = BA->getTargetFlags()) 6381 OS << " [TF=" << TF << ']'; 6382 } 6383 6384 if (G) 6385 if (unsigned Order = G->GetOrdering(this)) 6386 OS << " [ORD=" << Order << ']'; 6387 6388 if (getNodeId() != -1) 6389 OS << " [ID=" << getNodeId() << ']'; 6390 6391 DebugLoc dl = getDebugLoc(); 6392 if (G && !dl.isUnknown()) { 6393 DIScope 6394 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6395 OS << " dbg:"; 6396 // Omit the directory, since it's usually long and uninteresting. 6397 if (Scope.Verify()) 6398 OS << Scope.getFilename(); 6399 else 6400 OS << "<unknown>"; 6401 OS << ':' << dl.getLine(); 6402 if (dl.getCol() != 0) 6403 OS << ':' << dl.getCol(); 6404 } 6405} 6406 6407void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6408 print_types(OS, G); 6409 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6410 if (i) OS << ", "; else OS << " "; 6411 OS << (void*)getOperand(i).getNode(); 6412 if (unsigned RN = getOperand(i).getResNo()) 6413 OS << ":" << RN; 6414 } 6415 print_details(OS, G); 6416} 6417 6418static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6419 const SelectionDAG *G, unsigned depth, 6420 unsigned indent) { 6421 if (depth == 0) 6422 return; 6423 6424 OS.indent(indent); 6425 6426 N->print(OS, G); 6427 6428 if (depth < 1) 6429 return; 6430 6431 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6432 // Don't follow chain operands. 6433 if (N->getOperand(i).getValueType() == MVT::Other) 6434 continue; 6435 OS << '\n'; 6436 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6437 } 6438} 6439 6440void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6441 unsigned depth) const { 6442 printrWithDepthHelper(OS, this, G, depth, 0); 6443} 6444 6445void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6446 // Don't print impossibly deep things. 6447 printrWithDepth(OS, G, 10); 6448} 6449 6450void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6451 printrWithDepth(dbgs(), G, depth); 6452} 6453 6454void SDNode::dumprFull(const SelectionDAG *G) const { 6455 // Don't print impossibly deep things. 6456 dumprWithDepth(G, 10); 6457} 6458 6459static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6460 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6461 if (N->getOperand(i).getNode()->hasOneUse()) 6462 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6463 else 6464 dbgs() << "\n" << std::string(indent+2, ' ') 6465 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6466 6467 6468 dbgs() << "\n"; 6469 dbgs().indent(indent); 6470 N->dump(G); 6471} 6472 6473SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6474 assert(N->getNumValues() == 1 && 6475 "Can't unroll a vector with multiple results!"); 6476 6477 EVT VT = N->getValueType(0); 6478 unsigned NE = VT.getVectorNumElements(); 6479 EVT EltVT = VT.getVectorElementType(); 6480 DebugLoc dl = N->getDebugLoc(); 6481 6482 SmallVector<SDValue, 8> Scalars; 6483 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6484 6485 // If ResNE is 0, fully unroll the vector op. 6486 if (ResNE == 0) 6487 ResNE = NE; 6488 else if (NE > ResNE) 6489 NE = ResNE; 6490 6491 unsigned i; 6492 for (i= 0; i != NE; ++i) { 6493 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6494 SDValue Operand = N->getOperand(j); 6495 EVT OperandVT = Operand.getValueType(); 6496 if (OperandVT.isVector()) { 6497 // A vector operand; extract a single element. 6498 EVT OperandEltVT = OperandVT.getVectorElementType(); 6499 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6500 OperandEltVT, 6501 Operand, 6502 getConstant(i, TLI.getPointerTy())); 6503 } else { 6504 // A scalar operand; just use it as is. 6505 Operands[j] = Operand; 6506 } 6507 } 6508 6509 switch (N->getOpcode()) { 6510 default: 6511 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6512 &Operands[0], Operands.size())); 6513 break; 6514 case ISD::VSELECT: 6515 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, 6516 &Operands[0], Operands.size())); 6517 break; 6518 case ISD::SHL: 6519 case ISD::SRA: 6520 case ISD::SRL: 6521 case ISD::ROTL: 6522 case ISD::ROTR: 6523 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6524 getShiftAmountOperand(Operands[0].getValueType(), 6525 Operands[1]))); 6526 break; 6527 case ISD::SIGN_EXTEND_INREG: 6528 case ISD::FP_ROUND_INREG: { 6529 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6530 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6531 Operands[0], 6532 getValueType(ExtVT))); 6533 } 6534 } 6535 } 6536 6537 for (; i < ResNE; ++i) 6538 Scalars.push_back(getUNDEF(EltVT)); 6539 6540 return getNode(ISD::BUILD_VECTOR, dl, 6541 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6542 &Scalars[0], Scalars.size()); 6543} 6544 6545 6546/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6547/// location that is 'Dist' units away from the location that the 'Base' load 6548/// is loading from. 6549bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6550 unsigned Bytes, int Dist) const { 6551 if (LD->getChain() != Base->getChain()) 6552 return false; 6553 EVT VT = LD->getValueType(0); 6554 if (VT.getSizeInBits() / 8 != Bytes) 6555 return false; 6556 6557 SDValue Loc = LD->getOperand(1); 6558 SDValue BaseLoc = Base->getOperand(1); 6559 if (Loc.getOpcode() == ISD::FrameIndex) { 6560 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6561 return false; 6562 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6563 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6564 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6565 int FS = MFI->getObjectSize(FI); 6566 int BFS = MFI->getObjectSize(BFI); 6567 if (FS != BFS || FS != (int)Bytes) return false; 6568 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6569 } 6570 6571 // Handle X+C 6572 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6573 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6574 return true; 6575 6576 const GlobalValue *GV1 = NULL; 6577 const GlobalValue *GV2 = NULL; 6578 int64_t Offset1 = 0; 6579 int64_t Offset2 = 0; 6580 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6581 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6582 if (isGA1 && isGA2 && GV1 == GV2) 6583 return Offset1 == (Offset2 + Dist*Bytes); 6584 return false; 6585} 6586 6587 6588/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6589/// it cannot be inferred. 6590unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6591 // If this is a GlobalAddress + cst, return the alignment. 6592 const GlobalValue *GV; 6593 int64_t GVOffset = 0; 6594 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6595 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits(); 6596 APInt AllOnes = APInt::getAllOnesValue(PtrWidth); 6597 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0); 6598 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), AllOnes, 6599 KnownZero, KnownOne, TLI.getTargetData()); 6600 unsigned AlignBits = KnownZero.countTrailingOnes(); 6601 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0; 6602 if (Align) 6603 return MinAlign(Align, GVOffset); 6604 } 6605 6606 // If this is a direct reference to a stack slot, use information about the 6607 // stack slot's alignment. 6608 int FrameIdx = 1 << 31; 6609 int64_t FrameOffset = 0; 6610 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6611 FrameIdx = FI->getIndex(); 6612 } else if (isBaseWithConstantOffset(Ptr) && 6613 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6614 // Handle FI+Cst 6615 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6616 FrameOffset = Ptr.getConstantOperandVal(1); 6617 } 6618 6619 if (FrameIdx != (1 << 31)) { 6620 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6621 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6622 FrameOffset); 6623 return FIInfoAlign; 6624 } 6625 6626 return 0; 6627} 6628 6629void SelectionDAG::dump() const { 6630 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6631 6632 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6633 I != E; ++I) { 6634 const SDNode *N = I; 6635 if (!N->hasOneUse() && N != getRoot().getNode()) 6636 DumpNodes(N, 2, this); 6637 } 6638 6639 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6640 6641 dbgs() << "\n\n"; 6642} 6643 6644void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6645 print_types(OS, G); 6646 print_details(OS, G); 6647} 6648 6649typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6650static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6651 const SelectionDAG *G, VisitedSDNodeSet &once) { 6652 if (!once.insert(N)) // If we've been here before, return now. 6653 return; 6654 6655 // Dump the current SDNode, but don't end the line yet. 6656 OS.indent(indent); 6657 N->printr(OS, G); 6658 6659 // Having printed this SDNode, walk the children: 6660 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6661 const SDNode *child = N->getOperand(i).getNode(); 6662 6663 if (i) OS << ","; 6664 OS << " "; 6665 6666 if (child->getNumOperands() == 0) { 6667 // This child has no grandchildren; print it inline right here. 6668 child->printr(OS, G); 6669 once.insert(child); 6670 } else { // Just the address. FIXME: also print the child's opcode. 6671 OS << (void*)child; 6672 if (unsigned RN = N->getOperand(i).getResNo()) 6673 OS << ":" << RN; 6674 } 6675 } 6676 6677 OS << "\n"; 6678 6679 // Dump children that have grandchildren on their own line(s). 6680 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6681 const SDNode *child = N->getOperand(i).getNode(); 6682 DumpNodesr(OS, child, indent+2, G, once); 6683 } 6684} 6685 6686void SDNode::dumpr() const { 6687 VisitedSDNodeSet once; 6688 DumpNodesr(dbgs(), this, 0, 0, once); 6689} 6690 6691void SDNode::dumpr(const SelectionDAG *G) const { 6692 VisitedSDNodeSet once; 6693 DumpNodesr(dbgs(), this, 0, G, once); 6694} 6695 6696 6697// getAddressSpace - Return the address space this GlobalAddress belongs to. 6698unsigned GlobalAddressSDNode::getAddressSpace() const { 6699 return getGlobal()->getType()->getAddressSpace(); 6700} 6701 6702 6703Type *ConstantPoolSDNode::getType() const { 6704 if (isMachineConstantPoolEntry()) 6705 return Val.MachineCPVal->getType(); 6706 return Val.ConstVal->getType(); 6707} 6708 6709bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6710 APInt &SplatUndef, 6711 unsigned &SplatBitSize, 6712 bool &HasAnyUndefs, 6713 unsigned MinSplatBits, 6714 bool isBigEndian) { 6715 EVT VT = getValueType(0); 6716 assert(VT.isVector() && "Expected a vector type"); 6717 unsigned sz = VT.getSizeInBits(); 6718 if (MinSplatBits > sz) 6719 return false; 6720 6721 SplatValue = APInt(sz, 0); 6722 SplatUndef = APInt(sz, 0); 6723 6724 // Get the bits. Bits with undefined values (when the corresponding element 6725 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6726 // in SplatValue. If any of the values are not constant, give up and return 6727 // false. 6728 unsigned int nOps = getNumOperands(); 6729 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6730 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6731 6732 for (unsigned j = 0; j < nOps; ++j) { 6733 unsigned i = isBigEndian ? nOps-1-j : j; 6734 SDValue OpVal = getOperand(i); 6735 unsigned BitPos = j * EltBitSize; 6736 6737 if (OpVal.getOpcode() == ISD::UNDEF) 6738 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6739 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6740 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6741 zextOrTrunc(sz) << BitPos; 6742 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6743 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6744 else 6745 return false; 6746 } 6747 6748 // The build_vector is all constants or undefs. Find the smallest element 6749 // size that splats the vector. 6750 6751 HasAnyUndefs = (SplatUndef != 0); 6752 while (sz > 8) { 6753 6754 unsigned HalfSize = sz / 2; 6755 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6756 APInt LowValue = SplatValue.trunc(HalfSize); 6757 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6758 APInt LowUndef = SplatUndef.trunc(HalfSize); 6759 6760 // If the two halves do not match (ignoring undef bits), stop here. 6761 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6762 MinSplatBits > HalfSize) 6763 break; 6764 6765 SplatValue = HighValue | LowValue; 6766 SplatUndef = HighUndef & LowUndef; 6767 6768 sz = HalfSize; 6769 } 6770 6771 SplatBitSize = sz; 6772 return true; 6773} 6774 6775bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6776 // Find the first non-undef value in the shuffle mask. 6777 unsigned i, e; 6778 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6779 /* search */; 6780 6781 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6782 6783 // Make sure all remaining elements are either undef or the same as the first 6784 // non-undef value. 6785 for (int Idx = Mask[i]; i != e; ++i) 6786 if (Mask[i] >= 0 && Mask[i] != Idx) 6787 return false; 6788 return true; 6789} 6790 6791#ifdef XDEBUG 6792static void checkForCyclesHelper(const SDNode *N, 6793 SmallPtrSet<const SDNode*, 32> &Visited, 6794 SmallPtrSet<const SDNode*, 32> &Checked) { 6795 // If this node has already been checked, don't check it again. 6796 if (Checked.count(N)) 6797 return; 6798 6799 // If a node has already been visited on this depth-first walk, reject it as 6800 // a cycle. 6801 if (!Visited.insert(N)) { 6802 dbgs() << "Offending node:\n"; 6803 N->dumprFull(); 6804 errs() << "Detected cycle in SelectionDAG\n"; 6805 abort(); 6806 } 6807 6808 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6809 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6810 6811 Checked.insert(N); 6812 Visited.erase(N); 6813} 6814#endif 6815 6816void llvm::checkForCycles(const llvm::SDNode *N) { 6817#ifdef XDEBUG 6818 assert(N && "Checking nonexistant SDNode"); 6819 SmallPtrSet<const SDNode*, 32> visited; 6820 SmallPtrSet<const SDNode*, 32> checked; 6821 checkForCyclesHelper(N, visited, checked); 6822#endif 6823} 6824 6825void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6826 checkForCycles(DAG->getRoot().getNode()); 6827} 6828