SelectionDAG.cpp revision 9a14a362d0388da3b7a9b866d23f09f6fe080a29
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetSelectionDAGInfo.h" 36#include "llvm/Target/TargetOptions.h" 37#include "llvm/Target/TargetInstrInfo.h" 38#include "llvm/Target/TargetIntrinsicInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Debug.h" 42#include "llvm/Support/ErrorHandling.h" 43#include "llvm/Support/ManagedStatic.h" 44#include "llvm/Support/MathExtras.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/Support/Mutex.h" 47#include "llvm/ADT/SetVector.h" 48#include "llvm/ADT/SmallPtrSet.h" 49#include "llvm/ADT/SmallSet.h" 50#include "llvm/ADT/SmallVector.h" 51#include "llvm/ADT/StringExtras.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BITCAST) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. 129 SDValue NotZero = N->getOperand(i); 130 if (isa<ConstantSDNode>(NotZero)) { 131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 132 return false; 133 } else if (isa<ConstantFPSDNode>(NotZero)) { 134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 135 bitcastToAPInt().isAllOnesValue()) 136 return false; 137 } else 138 return false; 139 140 // Okay, we have at least one ~0 value, check to see if the rest match or are 141 // undefs. 142 for (++i; i != e; ++i) 143 if (N->getOperand(i) != NotZero && 144 N->getOperand(i).getOpcode() != ISD::UNDEF) 145 return false; 146 return true; 147} 148 149 150/// isBuildVectorAllZeros - Return true if the specified node is a 151/// BUILD_VECTOR where all of the elements are 0 or undef. 152bool ISD::isBuildVectorAllZeros(const SDNode *N) { 153 // Look through a bit convert. 154 if (N->getOpcode() == ISD::BITCAST) 155 N = N->getOperand(0).getNode(); 156 157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 158 159 unsigned i = 0, e = N->getNumOperands(); 160 161 // Skip over all of the undef values. 162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 163 ++i; 164 165 // Do not accept an all-undef vector. 166 if (i == e) return false; 167 168 // Do not accept build_vectors that aren't all constants or which have non-0 169 // elements. 170 SDValue Zero = N->getOperand(i); 171 if (isa<ConstantSDNode>(Zero)) { 172 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 173 return false; 174 } else if (isa<ConstantFPSDNode>(Zero)) { 175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 176 return false; 177 } else 178 return false; 179 180 // Okay, we have at least one 0 value, check to see if the rest match or are 181 // undefs. 182 for (++i; i != e; ++i) 183 if (N->getOperand(i) != Zero && 184 N->getOperand(i).getOpcode() != ISD::UNDEF) 185 return false; 186 return true; 187} 188 189/// isScalarToVector - Return true if the specified node is a 190/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 191/// element is not an undef. 192bool ISD::isScalarToVector(const SDNode *N) { 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 194 return true; 195 196 if (N->getOpcode() != ISD::BUILD_VECTOR) 197 return false; 198 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 199 return false; 200 unsigned NumElems = N->getNumOperands(); 201 if (NumElems == 1) 202 return false; 203 for (unsigned i = 1; i < NumElems; ++i) { 204 SDValue V = N->getOperand(i); 205 if (V.getOpcode() != ISD::UNDEF) 206 return false; 207 } 208 return true; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: llvm_unreachable("Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: { 436 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 437 ID.AddInteger(AT->getMemoryVT().getRawBits()); 438 ID.AddInteger(AT->getRawSubclassData()); 439 break; 440 } 441 case ISD::VECTOR_SHUFFLE: { 442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 444 i != e; ++i) 445 ID.AddInteger(SVN->getMaskElt(i)); 446 break; 447 } 448 case ISD::TargetBlockAddress: 449 case ISD::BlockAddress: { 450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 452 break; 453 } 454 } // end switch (N->getOpcode()) 455} 456 457/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 458/// data. 459static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 460 AddNodeIDOpcode(ID, N->getOpcode()); 461 // Add the return value info. 462 AddNodeIDValueTypes(ID, N->getVTList()); 463 // Add the operand info. 464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 465 466 // Handle SDNode leafs with special info. 467 AddNodeIDCustom(ID, N); 468} 469 470/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 471/// the CSE map that carries volatility, temporalness, indexing mode, and 472/// extension/truncation information. 473/// 474static inline unsigned 475encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 476 bool isNonTemporal) { 477 assert((ConvType & 3) == ConvType && 478 "ConvType may not require more than 2 bits!"); 479 assert((AM & 7) == AM && 480 "AM may not require more than 3 bits!"); 481 return ConvType | 482 (AM << 2) | 483 (isVolatile << 5) | 484 (isNonTemporal << 6); 485} 486 487//===----------------------------------------------------------------------===// 488// SelectionDAG Class 489//===----------------------------------------------------------------------===// 490 491/// doNotCSE - Return true if CSE should not be performed for this node. 492static bool doNotCSE(SDNode *N) { 493 if (N->getValueType(0) == MVT::Glue) 494 return true; // Never CSE anything that produces a flag. 495 496 switch (N->getOpcode()) { 497 default: break; 498 case ISD::HANDLENODE: 499 case ISD::EH_LABEL: 500 return true; // Never CSE these nodes. 501 } 502 503 // Check that remaining values produced are not flags. 504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 505 if (N->getValueType(i) == MVT::Glue) 506 return true; // Never CSE anything that produces a flag. 507 508 return false; 509} 510 511/// RemoveDeadNodes - This method deletes all unreachable nodes in the 512/// SelectionDAG. 513void SelectionDAG::RemoveDeadNodes() { 514 // Create a dummy node (which is not added to allnodes), that adds a reference 515 // to the root node, preventing it from being deleted. 516 HandleSDNode Dummy(getRoot()); 517 518 SmallVector<SDNode*, 128> DeadNodes; 519 520 // Add all obviously-dead nodes to the DeadNodes worklist. 521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 522 if (I->use_empty()) 523 DeadNodes.push_back(I); 524 525 RemoveDeadNodes(DeadNodes); 526 527 // If the root changed (e.g. it was a dead load, update the root). 528 setRoot(Dummy.getValue()); 529} 530 531/// RemoveDeadNodes - This method deletes the unreachable nodes in the 532/// given list, and any nodes that become unreachable as a result. 533void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 534 DAGUpdateListener *UpdateListener) { 535 536 // Process the worklist, deleting the nodes and adding their uses to the 537 // worklist. 538 while (!DeadNodes.empty()) { 539 SDNode *N = DeadNodes.pop_back_val(); 540 541 if (UpdateListener) 542 UpdateListener->NodeDeleted(N, 0); 543 544 // Take the node out of the appropriate CSE map. 545 RemoveNodeFromCSEMaps(N); 546 547 // Next, brutally remove the operand list. This is safe to do, as there are 548 // no cycles in the graph. 549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 550 SDUse &Use = *I++; 551 SDNode *Operand = Use.getNode(); 552 Use.set(SDValue()); 553 554 // Now that we removed this operand, see if there are no uses of it left. 555 if (Operand->use_empty()) 556 DeadNodes.push_back(Operand); 557 } 558 559 DeallocateNode(N); 560 } 561} 562 563void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 564 SmallVector<SDNode*, 16> DeadNodes(1, N); 565 RemoveDeadNodes(DeadNodes, UpdateListener); 566} 567 568void SelectionDAG::DeleteNode(SDNode *N) { 569 // First take this out of the appropriate CSE map. 570 RemoveNodeFromCSEMaps(N); 571 572 // Finally, remove uses due to operands of this node, remove from the 573 // AllNodes list, and delete the node. 574 DeleteNodeNotInCSEMaps(N); 575} 576 577void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 578 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 579 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 580 581 // Drop all of the operands and decrement used node's use counts. 582 N->DropOperands(); 583 584 DeallocateNode(N); 585} 586 587void SelectionDAG::DeallocateNode(SDNode *N) { 588 if (N->OperandsNeedDelete) 589 delete[] N->OperandList; 590 591 // Set the opcode to DELETED_NODE to help catch bugs when node 592 // memory is reallocated. 593 N->NodeType = ISD::DELETED_NODE; 594 595 NodeAllocator.Deallocate(AllNodes.remove(N)); 596 597 // Remove the ordering of this node. 598 Ordering->remove(N); 599 600 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 601 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 602 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 603 DbgVals[i]->setIsInvalidated(); 604} 605 606/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 607/// correspond to it. This is useful when we're about to delete or repurpose 608/// the node. We don't want future request for structurally identical nodes 609/// to return N anymore. 610bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 611 bool Erased = false; 612 switch (N->getOpcode()) { 613 case ISD::HANDLENODE: return false; // noop. 614 case ISD::CONDCODE: 615 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 616 "Cond code doesn't exist!"); 617 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 618 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 619 break; 620 case ISD::ExternalSymbol: 621 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 622 break; 623 case ISD::TargetExternalSymbol: { 624 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 625 Erased = TargetExternalSymbols.erase( 626 std::pair<std::string,unsigned char>(ESN->getSymbol(), 627 ESN->getTargetFlags())); 628 break; 629 } 630 case ISD::VALUETYPE: { 631 EVT VT = cast<VTSDNode>(N)->getVT(); 632 if (VT.isExtended()) { 633 Erased = ExtendedValueTypeNodes.erase(VT); 634 } else { 635 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 636 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 637 } 638 break; 639 } 640 default: 641 // Remove it from the CSE Map. 642 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 643 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746#ifndef NDEBUG 747/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 748static void VerifyNodeCommon(SDNode *N) { 749 switch (N->getOpcode()) { 750 default: 751 break; 752 case ISD::BUILD_PAIR: { 753 EVT VT = N->getValueType(0); 754 assert(N->getNumValues() == 1 && "Too many results!"); 755 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 756 "Wrong return type!"); 757 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 758 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 759 "Mismatched operand types!"); 760 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 761 "Wrong operand type!"); 762 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 763 "Wrong return type size"); 764 break; 765 } 766 case ISD::BUILD_VECTOR: { 767 assert(N->getNumValues() == 1 && "Too many results!"); 768 assert(N->getValueType(0).isVector() && "Wrong return type!"); 769 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 770 "Wrong number of operands!"); 771 EVT EltVT = N->getValueType(0).getVectorElementType(); 772 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 773 assert((I->getValueType() == EltVT || 774 (EltVT.isInteger() && I->getValueType().isInteger() && 775 EltVT.bitsLE(I->getValueType()))) && 776 "Wrong operand type!"); 777 break; 778 } 779 } 780} 781 782/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 783static void VerifySDNode(SDNode *N) { 784 // The SDNode allocators cannot be used to allocate nodes with fields that are 785 // not present in an SDNode! 786 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 787 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 788 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 789 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 790 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 791 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 792 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 793 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 794 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 795 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 796 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 797 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 798 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 799 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 800 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 801 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 802 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 803 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 804 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 805 806 VerifyNodeCommon(N); 807} 808 809/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 810/// invalid. 811static void VerifyMachineNode(SDNode *N) { 812 // The MachineNode allocators cannot be used to allocate nodes with fields 813 // that are not present in a MachineNode! 814 // Currently there are no such nodes. 815 816 VerifyNodeCommon(N); 817} 818#endif // NDEBUG 819 820/// getEVTAlignment - Compute the default alignment value for the 821/// given type. 822/// 823unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 824 const Type *Ty = VT == MVT::iPTR ? 825 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 826 VT.getTypeForEVT(*getContext()); 827 828 return TLI.getTargetData()->getABITypeAlignment(Ty); 829} 830 831// EntryNode could meaningfully have debug info if we can find it... 832SelectionDAG::SelectionDAG(const TargetMachine &tm) 833 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 834 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 835 Root(getEntryNode()), Ordering(0) { 836 AllNodes.push_back(&EntryNode); 837 Ordering = new SDNodeOrdering(); 838 DbgInfo = new SDDbgInfo(); 839} 840 841void SelectionDAG::init(MachineFunction &mf) { 842 MF = &mf; 843 Context = &mf.getFunction()->getContext(); 844} 845 846SelectionDAG::~SelectionDAG() { 847 allnodes_clear(); 848 delete Ordering; 849 delete DbgInfo; 850} 851 852void SelectionDAG::allnodes_clear() { 853 assert(&*AllNodes.begin() == &EntryNode); 854 AllNodes.remove(AllNodes.begin()); 855 while (!AllNodes.empty()) 856 DeallocateNode(AllNodes.begin()); 857} 858 859void SelectionDAG::clear() { 860 allnodes_clear(); 861 OperandAllocator.Reset(); 862 CSEMap.clear(); 863 864 ExtendedValueTypeNodes.clear(); 865 ExternalSymbols.clear(); 866 TargetExternalSymbols.clear(); 867 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 868 static_cast<CondCodeSDNode*>(0)); 869 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 870 static_cast<SDNode*>(0)); 871 872 EntryNode.UseList = 0; 873 AllNodes.push_back(&EntryNode); 874 Root = getEntryNode(); 875 Ordering->clear(); 876 DbgInfo->clear(); 877} 878 879SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 880 return VT.bitsGT(Op.getValueType()) ? 881 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 882 getNode(ISD::TRUNCATE, DL, VT, Op); 883} 884 885SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 886 return VT.bitsGT(Op.getValueType()) ? 887 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 888 getNode(ISD::TRUNCATE, DL, VT, Op); 889} 890 891SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 892 assert(!VT.isVector() && 893 "getZeroExtendInReg should use the vector element type instead of " 894 "the vector type!"); 895 if (Op.getValueType() == VT) return Op; 896 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 897 APInt Imm = APInt::getLowBitsSet(BitWidth, 898 VT.getSizeInBits()); 899 return getNode(ISD::AND, DL, Op.getValueType(), Op, 900 getConstant(Imm, Op.getValueType())); 901} 902 903/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 904/// 905SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 906 EVT EltVT = VT.getScalarType(); 907 SDValue NegOne = 908 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 909 return getNode(ISD::XOR, DL, VT, Val, NegOne); 910} 911 912SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 913 EVT EltVT = VT.getScalarType(); 914 assert((EltVT.getSizeInBits() >= 64 || 915 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 916 "getConstant with a uint64_t value that doesn't fit in the type!"); 917 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 918} 919 920SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 921 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 922} 923 924SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 925 assert(VT.isInteger() && "Cannot create FP integer constant!"); 926 927 EVT EltVT = VT.getScalarType(); 928 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 929 "APInt size does not match type size!"); 930 931 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 932 FoldingSetNodeID ID; 933 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 934 ID.AddPointer(&Val); 935 void *IP = 0; 936 SDNode *N = NULL; 937 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 938 if (!VT.isVector()) 939 return SDValue(N, 0); 940 941 if (!N) { 942 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 943 CSEMap.InsertNode(N, IP); 944 AllNodes.push_back(N); 945 } 946 947 SDValue Result(N, 0); 948 if (VT.isVector()) { 949 SmallVector<SDValue, 8> Ops; 950 Ops.assign(VT.getVectorNumElements(), Result); 951 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 952 } 953 return Result; 954} 955 956SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 957 return getConstant(Val, TLI.getPointerTy(), isTarget); 958} 959 960 961SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 962 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 963} 964 965SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 966 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 967 968 EVT EltVT = VT.getScalarType(); 969 970 // Do the map lookup using the actual bit pattern for the floating point 971 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 972 // we don't have issues with SNANs. 973 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 974 FoldingSetNodeID ID; 975 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 976 ID.AddPointer(&V); 977 void *IP = 0; 978 SDNode *N = NULL; 979 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 980 if (!VT.isVector()) 981 return SDValue(N, 0); 982 983 if (!N) { 984 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 985 CSEMap.InsertNode(N, IP); 986 AllNodes.push_back(N); 987 } 988 989 SDValue Result(N, 0); 990 if (VT.isVector()) { 991 SmallVector<SDValue, 8> Ops; 992 Ops.assign(VT.getVectorNumElements(), Result); 993 // FIXME DebugLoc info might be appropriate here 994 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 995 } 996 return Result; 997} 998 999SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1000 EVT EltVT = VT.getScalarType(); 1001 if (EltVT==MVT::f32) 1002 return getConstantFP(APFloat((float)Val), VT, isTarget); 1003 else if (EltVT==MVT::f64) 1004 return getConstantFP(APFloat(Val), VT, isTarget); 1005 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1006 bool ignored; 1007 APFloat apf = APFloat(Val); 1008 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1009 &ignored); 1010 return getConstantFP(apf, VT, isTarget); 1011 } else { 1012 assert(0 && "Unsupported type in getConstantFP"); 1013 return SDValue(); 1014 } 1015} 1016 1017SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1018 EVT VT, int64_t Offset, 1019 bool isTargetGA, 1020 unsigned char TargetFlags) { 1021 assert((TargetFlags == 0 || isTargetGA) && 1022 "Cannot set target flags on target-independent globals"); 1023 1024 // Truncate (with sign-extension) the offset value to the pointer size. 1025 EVT PTy = TLI.getPointerTy(); 1026 unsigned BitWidth = PTy.getSizeInBits(); 1027 if (BitWidth < 64) 1028 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1029 1030 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1031 if (!GVar) { 1032 // If GV is an alias then use the aliasee for determining thread-localness. 1033 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1034 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1035 } 1036 1037 unsigned Opc; 1038 if (GVar && GVar->isThreadLocal()) 1039 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1040 else 1041 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1042 1043 FoldingSetNodeID ID; 1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1045 ID.AddPointer(GV); 1046 ID.AddInteger(Offset); 1047 ID.AddInteger(TargetFlags); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 1052 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1053 Offset, TargetFlags); 1054 CSEMap.InsertNode(N, IP); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1060 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1061 FoldingSetNodeID ID; 1062 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1063 ID.AddInteger(FI); 1064 void *IP = 0; 1065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1066 return SDValue(E, 0); 1067 1068 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1069 CSEMap.InsertNode(N, IP); 1070 AllNodes.push_back(N); 1071 return SDValue(N, 0); 1072} 1073 1074SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1075 unsigned char TargetFlags) { 1076 assert((TargetFlags == 0 || isTarget) && 1077 "Cannot set target flags on target-independent jump tables"); 1078 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1079 FoldingSetNodeID ID; 1080 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1081 ID.AddInteger(JTI); 1082 ID.AddInteger(TargetFlags); 1083 void *IP = 0; 1084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1085 return SDValue(E, 0); 1086 1087 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1088 TargetFlags); 1089 CSEMap.InsertNode(N, IP); 1090 AllNodes.push_back(N); 1091 return SDValue(N, 0); 1092} 1093 1094SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1095 unsigned Alignment, int Offset, 1096 bool isTarget, 1097 unsigned char TargetFlags) { 1098 assert((TargetFlags == 0 || isTarget) && 1099 "Cannot set target flags on target-independent globals"); 1100 if (Alignment == 0) 1101 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1102 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1103 FoldingSetNodeID ID; 1104 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1105 ID.AddInteger(Alignment); 1106 ID.AddInteger(Offset); 1107 ID.AddPointer(C); 1108 ID.AddInteger(TargetFlags); 1109 void *IP = 0; 1110 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1111 return SDValue(E, 0); 1112 1113 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1114 Alignment, TargetFlags); 1115 CSEMap.InsertNode(N, IP); 1116 AllNodes.push_back(N); 1117 return SDValue(N, 0); 1118} 1119 1120 1121SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1122 unsigned Alignment, int Offset, 1123 bool isTarget, 1124 unsigned char TargetFlags) { 1125 assert((TargetFlags == 0 || isTarget) && 1126 "Cannot set target flags on target-independent globals"); 1127 if (Alignment == 0) 1128 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1129 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1130 FoldingSetNodeID ID; 1131 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1132 ID.AddInteger(Alignment); 1133 ID.AddInteger(Offset); 1134 C->AddSelectionDAGCSEId(ID); 1135 ID.AddInteger(TargetFlags); 1136 void *IP = 0; 1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1138 return SDValue(E, 0); 1139 1140 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1141 Alignment, TargetFlags); 1142 CSEMap.InsertNode(N, IP); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1148 FoldingSetNodeID ID; 1149 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1150 ID.AddPointer(MBB); 1151 void *IP = 0; 1152 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1153 return SDValue(E, 0); 1154 1155 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1156 CSEMap.InsertNode(N, IP); 1157 AllNodes.push_back(N); 1158 return SDValue(N, 0); 1159} 1160 1161SDValue SelectionDAG::getValueType(EVT VT) { 1162 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1163 ValueTypeNodes.size()) 1164 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1165 1166 SDNode *&N = VT.isExtended() ? 1167 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1168 1169 if (N) return SDValue(N, 0); 1170 N = new (NodeAllocator) VTSDNode(VT); 1171 AllNodes.push_back(N); 1172 return SDValue(N, 0); 1173} 1174 1175SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1176 SDNode *&N = ExternalSymbols[Sym]; 1177 if (N) return SDValue(N, 0); 1178 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1179 AllNodes.push_back(N); 1180 return SDValue(N, 0); 1181} 1182 1183SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1184 unsigned char TargetFlags) { 1185 SDNode *&N = 1186 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1187 TargetFlags)]; 1188 if (N) return SDValue(N, 0); 1189 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1190 AllNodes.push_back(N); 1191 return SDValue(N, 0); 1192} 1193 1194SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1195 if ((unsigned)Cond >= CondCodeNodes.size()) 1196 CondCodeNodes.resize(Cond+1); 1197 1198 if (CondCodeNodes[Cond] == 0) { 1199 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1200 CondCodeNodes[Cond] = N; 1201 AllNodes.push_back(N); 1202 } 1203 1204 return SDValue(CondCodeNodes[Cond], 0); 1205} 1206 1207// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1208// the shuffle mask M that point at N1 to point at N2, and indices that point 1209// N2 to point at N1. 1210static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1211 std::swap(N1, N2); 1212 int NElts = M.size(); 1213 for (int i = 0; i != NElts; ++i) { 1214 if (M[i] >= NElts) 1215 M[i] -= NElts; 1216 else if (M[i] >= 0) 1217 M[i] += NElts; 1218 } 1219} 1220 1221SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1222 SDValue N2, const int *Mask) { 1223 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1224 assert(VT.isVector() && N1.getValueType().isVector() && 1225 "Vector Shuffle VTs must be a vectors"); 1226 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1227 && "Vector Shuffle VTs must have same element type"); 1228 1229 // Canonicalize shuffle undef, undef -> undef 1230 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1231 return getUNDEF(VT); 1232 1233 // Validate that all indices in Mask are within the range of the elements 1234 // input to the shuffle. 1235 unsigned NElts = VT.getVectorNumElements(); 1236 SmallVector<int, 8> MaskVec; 1237 for (unsigned i = 0; i != NElts; ++i) { 1238 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1239 MaskVec.push_back(Mask[i]); 1240 } 1241 1242 // Canonicalize shuffle v, v -> v, undef 1243 if (N1 == N2) { 1244 N2 = getUNDEF(VT); 1245 for (unsigned i = 0; i != NElts; ++i) 1246 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1247 } 1248 1249 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1250 if (N1.getOpcode() == ISD::UNDEF) 1251 commuteShuffle(N1, N2, MaskVec); 1252 1253 // Canonicalize all index into lhs, -> shuffle lhs, undef 1254 // Canonicalize all index into rhs, -> shuffle rhs, undef 1255 bool AllLHS = true, AllRHS = true; 1256 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1257 for (unsigned i = 0; i != NElts; ++i) { 1258 if (MaskVec[i] >= (int)NElts) { 1259 if (N2Undef) 1260 MaskVec[i] = -1; 1261 else 1262 AllLHS = false; 1263 } else if (MaskVec[i] >= 0) { 1264 AllRHS = false; 1265 } 1266 } 1267 if (AllLHS && AllRHS) 1268 return getUNDEF(VT); 1269 if (AllLHS && !N2Undef) 1270 N2 = getUNDEF(VT); 1271 if (AllRHS) { 1272 N1 = getUNDEF(VT); 1273 commuteShuffle(N1, N2, MaskVec); 1274 } 1275 1276 // If Identity shuffle, or all shuffle in to undef, return that node. 1277 bool AllUndef = true; 1278 bool Identity = true; 1279 for (unsigned i = 0; i != NElts; ++i) { 1280 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1281 if (MaskVec[i] >= 0) AllUndef = false; 1282 } 1283 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1284 return N1; 1285 if (AllUndef) 1286 return getUNDEF(VT); 1287 1288 FoldingSetNodeID ID; 1289 SDValue Ops[2] = { N1, N2 }; 1290 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1291 for (unsigned i = 0; i != NElts; ++i) 1292 ID.AddInteger(MaskVec[i]); 1293 1294 void* IP = 0; 1295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1296 return SDValue(E, 0); 1297 1298 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1299 // SDNode doesn't have access to it. This memory will be "leaked" when 1300 // the node is deallocated, but recovered when the NodeAllocator is released. 1301 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1302 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1303 1304 ShuffleVectorSDNode *N = 1305 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1306 CSEMap.InsertNode(N, IP); 1307 AllNodes.push_back(N); 1308 return SDValue(N, 0); 1309} 1310 1311SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1312 SDValue Val, SDValue DTy, 1313 SDValue STy, SDValue Rnd, SDValue Sat, 1314 ISD::CvtCode Code) { 1315 // If the src and dest types are the same and the conversion is between 1316 // integer types of the same sign or two floats, no conversion is necessary. 1317 if (DTy == STy && 1318 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1319 return Val; 1320 1321 FoldingSetNodeID ID; 1322 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1323 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1324 void* IP = 0; 1325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1326 return SDValue(E, 0); 1327 1328 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1329 Code); 1330 CSEMap.InsertNode(N, IP); 1331 AllNodes.push_back(N); 1332 return SDValue(N, 0); 1333} 1334 1335SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1336 FoldingSetNodeID ID; 1337 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1338 ID.AddInteger(RegNo); 1339 void *IP = 0; 1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1341 return SDValue(E, 0); 1342 1343 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1350 FoldingSetNodeID ID; 1351 SDValue Ops[] = { Root }; 1352 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1353 ID.AddPointer(Label); 1354 void *IP = 0; 1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1356 return SDValue(E, 0); 1357 1358 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1359 CSEMap.InsertNode(N, IP); 1360 AllNodes.push_back(N); 1361 return SDValue(N, 0); 1362} 1363 1364 1365SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1366 bool isTarget, 1367 unsigned char TargetFlags) { 1368 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1369 1370 FoldingSetNodeID ID; 1371 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1372 ID.AddPointer(BA); 1373 ID.AddInteger(TargetFlags); 1374 void *IP = 0; 1375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1376 return SDValue(E, 0); 1377 1378 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1379 CSEMap.InsertNode(N, IP); 1380 AllNodes.push_back(N); 1381 return SDValue(N, 0); 1382} 1383 1384SDValue SelectionDAG::getSrcValue(const Value *V) { 1385 assert((!V || V->getType()->isPointerTy()) && 1386 "SrcValue is not a pointer?"); 1387 1388 FoldingSetNodeID ID; 1389 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1390 ID.AddPointer(V); 1391 1392 void *IP = 0; 1393 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1394 return SDValue(E, 0); 1395 1396 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1397 CSEMap.InsertNode(N, IP); 1398 AllNodes.push_back(N); 1399 return SDValue(N, 0); 1400} 1401 1402/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1403SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1404 FoldingSetNodeID ID; 1405 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1406 ID.AddPointer(MD); 1407 1408 void *IP = 0; 1409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1410 return SDValue(E, 0); 1411 1412 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1413 CSEMap.InsertNode(N, IP); 1414 AllNodes.push_back(N); 1415 return SDValue(N, 0); 1416} 1417 1418 1419/// getShiftAmountOperand - Return the specified value casted to 1420/// the target's desired shift amount type. 1421SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1422 EVT OpTy = Op.getValueType(); 1423 MVT ShTy = TLI.getShiftAmountTy(); 1424 if (OpTy == ShTy || OpTy.isVector()) return Op; 1425 1426 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1427 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1428} 1429 1430/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1431/// specified value type. 1432SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1433 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1434 unsigned ByteSize = VT.getStoreSize(); 1435 const Type *Ty = VT.getTypeForEVT(*getContext()); 1436 unsigned StackAlign = 1437 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1438 1439 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1440 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1441} 1442 1443/// CreateStackTemporary - Create a stack temporary suitable for holding 1444/// either of the specified value types. 1445SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1446 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1447 VT2.getStoreSizeInBits())/8; 1448 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1449 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1450 const TargetData *TD = TLI.getTargetData(); 1451 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1452 TD->getPrefTypeAlignment(Ty2)); 1453 1454 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1455 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1456 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1457} 1458 1459SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1460 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1461 // These setcc operations always fold. 1462 switch (Cond) { 1463 default: break; 1464 case ISD::SETFALSE: 1465 case ISD::SETFALSE2: return getConstant(0, VT); 1466 case ISD::SETTRUE: 1467 case ISD::SETTRUE2: return getConstant(1, VT); 1468 1469 case ISD::SETOEQ: 1470 case ISD::SETOGT: 1471 case ISD::SETOGE: 1472 case ISD::SETOLT: 1473 case ISD::SETOLE: 1474 case ISD::SETONE: 1475 case ISD::SETO: 1476 case ISD::SETUO: 1477 case ISD::SETUEQ: 1478 case ISD::SETUNE: 1479 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1480 break; 1481 } 1482 1483 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1484 const APInt &C2 = N2C->getAPIntValue(); 1485 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1486 const APInt &C1 = N1C->getAPIntValue(); 1487 1488 switch (Cond) { 1489 default: llvm_unreachable("Unknown integer setcc!"); 1490 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1491 case ISD::SETNE: return getConstant(C1 != C2, VT); 1492 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1493 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1494 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1495 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1496 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1497 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1498 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1499 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1500 } 1501 } 1502 } 1503 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1504 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1505 // No compile time operations on this type yet. 1506 if (N1C->getValueType(0) == MVT::ppcf128) 1507 return SDValue(); 1508 1509 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1510 switch (Cond) { 1511 default: break; 1512 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1513 return getUNDEF(VT); 1514 // fall through 1515 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1516 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1517 return getUNDEF(VT); 1518 // fall through 1519 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1520 R==APFloat::cmpLessThan, VT); 1521 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1522 return getUNDEF(VT); 1523 // fall through 1524 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1525 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1526 return getUNDEF(VT); 1527 // fall through 1528 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1529 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1530 return getUNDEF(VT); 1531 // fall through 1532 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1533 R==APFloat::cmpEqual, VT); 1534 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1535 return getUNDEF(VT); 1536 // fall through 1537 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1538 R==APFloat::cmpEqual, VT); 1539 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1540 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1541 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1542 R==APFloat::cmpEqual, VT); 1543 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1544 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1545 R==APFloat::cmpLessThan, VT); 1546 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1547 R==APFloat::cmpUnordered, VT); 1548 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1549 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1550 } 1551 } else { 1552 // Ensure that the constant occurs on the RHS. 1553 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1554 } 1555 } 1556 1557 // Could not fold it. 1558 return SDValue(); 1559} 1560 1561/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1562/// use this predicate to simplify operations downstream. 1563bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1564 // This predicate is not safe for vector operations. 1565 if (Op.getValueType().isVector()) 1566 return false; 1567 1568 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1569 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1570} 1571 1572/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1573/// this predicate to simplify operations downstream. Mask is known to be zero 1574/// for bits that V cannot have. 1575bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1576 unsigned Depth) const { 1577 APInt KnownZero, KnownOne; 1578 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1579 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1580 return (KnownZero & Mask) == Mask; 1581} 1582 1583/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1584/// known to be either zero or one and return them in the KnownZero/KnownOne 1585/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1586/// processing. 1587void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1588 APInt &KnownZero, APInt &KnownOne, 1589 unsigned Depth) const { 1590 unsigned BitWidth = Mask.getBitWidth(); 1591 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1592 "Mask size mismatches value type size!"); 1593 1594 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1595 if (Depth == 6 || Mask == 0) 1596 return; // Limit search depth. 1597 1598 APInt KnownZero2, KnownOne2; 1599 1600 switch (Op.getOpcode()) { 1601 case ISD::Constant: 1602 // We know all of the bits for a constant! 1603 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1604 KnownZero = ~KnownOne & Mask; 1605 return; 1606 case ISD::AND: 1607 // If either the LHS or the RHS are Zero, the result is zero. 1608 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1609 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1610 KnownZero2, KnownOne2, Depth+1); 1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1612 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1613 1614 // Output known-1 bits are only known if set in both the LHS & RHS. 1615 KnownOne &= KnownOne2; 1616 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1617 KnownZero |= KnownZero2; 1618 return; 1619 case ISD::OR: 1620 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1621 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1622 KnownZero2, KnownOne2, Depth+1); 1623 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1624 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1625 1626 // Output known-0 bits are only known if clear in both the LHS & RHS. 1627 KnownZero &= KnownZero2; 1628 // Output known-1 are known to be set if set in either the LHS | RHS. 1629 KnownOne |= KnownOne2; 1630 return; 1631 case ISD::XOR: { 1632 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1633 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1636 1637 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1638 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1639 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1640 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1641 KnownZero = KnownZeroOut; 1642 return; 1643 } 1644 case ISD::MUL: { 1645 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1646 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1647 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1650 1651 // If low bits are zero in either operand, output low known-0 bits. 1652 // Also compute a conserative estimate for high known-0 bits. 1653 // More trickiness is possible, but this is sufficient for the 1654 // interesting case of alignment computation. 1655 KnownOne.clearAllBits(); 1656 unsigned TrailZ = KnownZero.countTrailingOnes() + 1657 KnownZero2.countTrailingOnes(); 1658 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1659 KnownZero2.countLeadingOnes(), 1660 BitWidth) - BitWidth; 1661 1662 TrailZ = std::min(TrailZ, BitWidth); 1663 LeadZ = std::min(LeadZ, BitWidth); 1664 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1665 APInt::getHighBitsSet(BitWidth, LeadZ); 1666 KnownZero &= Mask; 1667 return; 1668 } 1669 case ISD::UDIV: { 1670 // For the purposes of computing leading zeros we can conservatively 1671 // treat a udiv as a logical right shift by the power of 2 known to 1672 // be less than the denominator. 1673 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1674 ComputeMaskedBits(Op.getOperand(0), 1675 AllOnes, KnownZero2, KnownOne2, Depth+1); 1676 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1677 1678 KnownOne2.clearAllBits(); 1679 KnownZero2.clearAllBits(); 1680 ComputeMaskedBits(Op.getOperand(1), 1681 AllOnes, KnownZero2, KnownOne2, Depth+1); 1682 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1683 if (RHSUnknownLeadingOnes != BitWidth) 1684 LeadZ = std::min(BitWidth, 1685 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1686 1687 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1688 return; 1689 } 1690 case ISD::SELECT: 1691 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1692 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1695 1696 // Only known if known in both the LHS and RHS. 1697 KnownOne &= KnownOne2; 1698 KnownZero &= KnownZero2; 1699 return; 1700 case ISD::SELECT_CC: 1701 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1702 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1704 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1705 1706 // Only known if known in both the LHS and RHS. 1707 KnownOne &= KnownOne2; 1708 KnownZero &= KnownZero2; 1709 return; 1710 case ISD::SADDO: 1711 case ISD::UADDO: 1712 case ISD::SSUBO: 1713 case ISD::USUBO: 1714 case ISD::SMULO: 1715 case ISD::UMULO: 1716 if (Op.getResNo() != 1) 1717 return; 1718 // The boolean result conforms to getBooleanContents. Fall through. 1719 case ISD::SETCC: 1720 // If we know the result of a setcc has the top bits zero, use this info. 1721 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1722 BitWidth > 1) 1723 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1724 return; 1725 case ISD::SHL: 1726 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1727 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1728 unsigned ShAmt = SA->getZExtValue(); 1729 1730 // If the shift count is an invalid immediate, don't do anything. 1731 if (ShAmt >= BitWidth) 1732 return; 1733 1734 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1735 KnownZero, KnownOne, Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 KnownZero <<= ShAmt; 1738 KnownOne <<= ShAmt; 1739 // low bits known zero. 1740 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1741 } 1742 return; 1743 case ISD::SRL: 1744 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1745 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1746 unsigned ShAmt = SA->getZExtValue(); 1747 1748 // If the shift count is an invalid immediate, don't do anything. 1749 if (ShAmt >= BitWidth) 1750 return; 1751 1752 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1753 KnownZero, KnownOne, Depth+1); 1754 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1755 KnownZero = KnownZero.lshr(ShAmt); 1756 KnownOne = KnownOne.lshr(ShAmt); 1757 1758 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1759 KnownZero |= HighBits; // High bits known zero. 1760 } 1761 return; 1762 case ISD::SRA: 1763 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1764 unsigned ShAmt = SA->getZExtValue(); 1765 1766 // If the shift count is an invalid immediate, don't do anything. 1767 if (ShAmt >= BitWidth) 1768 return; 1769 1770 APInt InDemandedMask = (Mask << ShAmt); 1771 // If any of the demanded bits are produced by the sign extension, we also 1772 // demand the input sign bit. 1773 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1774 if (HighBits.getBoolValue()) 1775 InDemandedMask |= APInt::getSignBit(BitWidth); 1776 1777 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1778 Depth+1); 1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1780 KnownZero = KnownZero.lshr(ShAmt); 1781 KnownOne = KnownOne.lshr(ShAmt); 1782 1783 // Handle the sign bits. 1784 APInt SignBit = APInt::getSignBit(BitWidth); 1785 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1786 1787 if (KnownZero.intersects(SignBit)) { 1788 KnownZero |= HighBits; // New bits are known zero. 1789 } else if (KnownOne.intersects(SignBit)) { 1790 KnownOne |= HighBits; // New bits are known one. 1791 } 1792 } 1793 return; 1794 case ISD::SIGN_EXTEND_INREG: { 1795 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1796 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1797 1798 // Sign extension. Compute the demanded bits in the result that are not 1799 // present in the input. 1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1801 1802 APInt InSignBit = APInt::getSignBit(EBits); 1803 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1804 1805 // If the sign extended bits are demanded, we know that the sign 1806 // bit is demanded. 1807 InSignBit = InSignBit.zext(BitWidth); 1808 if (NewBits.getBoolValue()) 1809 InputDemandedBits |= InSignBit; 1810 1811 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1812 KnownZero, KnownOne, Depth+1); 1813 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1814 1815 // If the sign bit of the input is known set or clear, then we know the 1816 // top bits of the result. 1817 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1818 KnownZero |= NewBits; 1819 KnownOne &= ~NewBits; 1820 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1821 KnownOne |= NewBits; 1822 KnownZero &= ~NewBits; 1823 } else { // Input sign bit unknown 1824 KnownZero &= ~NewBits; 1825 KnownOne &= ~NewBits; 1826 } 1827 return; 1828 } 1829 case ISD::CTTZ: 1830 case ISD::CTLZ: 1831 case ISD::CTPOP: { 1832 unsigned LowBits = Log2_32(BitWidth)+1; 1833 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1834 KnownOne.clearAllBits(); 1835 return; 1836 } 1837 case ISD::LOAD: { 1838 if (ISD::isZEXTLoad(Op.getNode())) { 1839 LoadSDNode *LD = cast<LoadSDNode>(Op); 1840 EVT VT = LD->getMemoryVT(); 1841 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1842 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1843 } 1844 return; 1845 } 1846 case ISD::ZERO_EXTEND: { 1847 EVT InVT = Op.getOperand(0).getValueType(); 1848 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1849 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1850 APInt InMask = Mask.trunc(InBits); 1851 KnownZero = KnownZero.trunc(InBits); 1852 KnownOne = KnownOne.trunc(InBits); 1853 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1854 KnownZero = KnownZero.zext(BitWidth); 1855 KnownOne = KnownOne.zext(BitWidth); 1856 KnownZero |= NewBits; 1857 return; 1858 } 1859 case ISD::SIGN_EXTEND: { 1860 EVT InVT = Op.getOperand(0).getValueType(); 1861 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1862 APInt InSignBit = APInt::getSignBit(InBits); 1863 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1864 APInt InMask = Mask.trunc(InBits); 1865 1866 // If any of the sign extended bits are demanded, we know that the sign 1867 // bit is demanded. Temporarily set this bit in the mask for our callee. 1868 if (NewBits.getBoolValue()) 1869 InMask |= InSignBit; 1870 1871 KnownZero = KnownZero.trunc(InBits); 1872 KnownOne = KnownOne.trunc(InBits); 1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1874 1875 // Note if the sign bit is known to be zero or one. 1876 bool SignBitKnownZero = KnownZero.isNegative(); 1877 bool SignBitKnownOne = KnownOne.isNegative(); 1878 assert(!(SignBitKnownZero && SignBitKnownOne) && 1879 "Sign bit can't be known to be both zero and one!"); 1880 1881 // If the sign bit wasn't actually demanded by our caller, we don't 1882 // want it set in the KnownZero and KnownOne result values. Reset the 1883 // mask and reapply it to the result values. 1884 InMask = Mask.trunc(InBits); 1885 KnownZero &= InMask; 1886 KnownOne &= InMask; 1887 1888 KnownZero = KnownZero.zext(BitWidth); 1889 KnownOne = KnownOne.zext(BitWidth); 1890 1891 // If the sign bit is known zero or one, the top bits match. 1892 if (SignBitKnownZero) 1893 KnownZero |= NewBits; 1894 else if (SignBitKnownOne) 1895 KnownOne |= NewBits; 1896 return; 1897 } 1898 case ISD::ANY_EXTEND: { 1899 EVT InVT = Op.getOperand(0).getValueType(); 1900 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1901 APInt InMask = Mask.trunc(InBits); 1902 KnownZero = KnownZero.trunc(InBits); 1903 KnownOne = KnownOne.trunc(InBits); 1904 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1905 KnownZero = KnownZero.zext(BitWidth); 1906 KnownOne = KnownOne.zext(BitWidth); 1907 return; 1908 } 1909 case ISD::TRUNCATE: { 1910 EVT InVT = Op.getOperand(0).getValueType(); 1911 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1912 APInt InMask = Mask.zext(InBits); 1913 KnownZero = KnownZero.zext(InBits); 1914 KnownOne = KnownOne.zext(InBits); 1915 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1916 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1917 KnownZero = KnownZero.trunc(BitWidth); 1918 KnownOne = KnownOne.trunc(BitWidth); 1919 break; 1920 } 1921 case ISD::AssertZext: { 1922 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1923 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1924 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1925 KnownOne, Depth+1); 1926 KnownZero |= (~InMask) & Mask; 1927 return; 1928 } 1929 case ISD::FGETSIGN: 1930 // All bits are zero except the low bit. 1931 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1932 return; 1933 1934 case ISD::SUB: { 1935 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1936 // We know that the top bits of C-X are clear if X contains less bits 1937 // than C (i.e. no wrap-around can happen). For example, 20-X is 1938 // positive if we can prove that X is >= 0 and < 16. 1939 if (CLHS->getAPIntValue().isNonNegative()) { 1940 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1941 // NLZ can't be BitWidth with no sign bit 1942 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1943 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1944 Depth+1); 1945 1946 // If all of the MaskV bits are known to be zero, then we know the 1947 // output top bits are zero, because we now know that the output is 1948 // from [0-C]. 1949 if ((KnownZero2 & MaskV) == MaskV) { 1950 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1951 // Top bits known zero. 1952 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1953 } 1954 } 1955 } 1956 } 1957 // fall through 1958 case ISD::ADD: 1959 case ISD::ADDE: { 1960 // Output known-0 bits are known if clear or set in both the low clear bits 1961 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1962 // low 3 bits clear. 1963 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1964 BitWidth - Mask.countLeadingZeros()); 1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1966 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1967 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1968 1969 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1970 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1971 KnownZeroOut = std::min(KnownZeroOut, 1972 KnownZero2.countTrailingOnes()); 1973 1974 if (Op.getOpcode() == ISD::ADD) { 1975 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1976 return; 1977 } 1978 1979 // With ADDE, a carry bit may be added in, so we can only use this 1980 // information if we know (at least) that the low two bits are clear. We 1981 // then return to the caller that the low bit is unknown but that other bits 1982 // are known zero. 1983 if (KnownZeroOut >= 2) // ADDE 1984 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 1985 return; 1986 } 1987 case ISD::SREM: 1988 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1989 const APInt &RA = Rem->getAPIntValue().abs(); 1990 if (RA.isPowerOf2()) { 1991 APInt LowBits = RA - 1; 1992 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1993 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1994 1995 // The low bits of the first operand are unchanged by the srem. 1996 KnownZero = KnownZero2 & LowBits; 1997 KnownOne = KnownOne2 & LowBits; 1998 1999 // If the first operand is non-negative or has all low bits zero, then 2000 // the upper bits are all zero. 2001 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2002 KnownZero |= ~LowBits; 2003 2004 // If the first operand is negative and not all low bits are zero, then 2005 // the upper bits are all one. 2006 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2007 KnownOne |= ~LowBits; 2008 2009 KnownZero &= Mask; 2010 KnownOne &= Mask; 2011 2012 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2013 } 2014 } 2015 return; 2016 case ISD::UREM: { 2017 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2018 const APInt &RA = Rem->getAPIntValue(); 2019 if (RA.isPowerOf2()) { 2020 APInt LowBits = (RA - 1); 2021 APInt Mask2 = LowBits & Mask; 2022 KnownZero |= ~LowBits & Mask; 2023 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 2024 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2025 break; 2026 } 2027 } 2028 2029 // Since the result is less than or equal to either operand, any leading 2030 // zero bits in either operand must also exist in the result. 2031 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 2032 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 2033 Depth+1); 2034 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 2035 Depth+1); 2036 2037 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2038 KnownZero2.countLeadingOnes()); 2039 KnownOne.clearAllBits(); 2040 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2041 return; 2042 } 2043 default: 2044 // Allow the target to implement this method for its nodes. 2045 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2046 case ISD::INTRINSIC_WO_CHAIN: 2047 case ISD::INTRINSIC_W_CHAIN: 2048 case ISD::INTRINSIC_VOID: 2049 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2050 Depth); 2051 } 2052 return; 2053 } 2054} 2055 2056/// ComputeNumSignBits - Return the number of times the sign bit of the 2057/// register is replicated into the other bits. We know that at least 1 bit 2058/// is always equal to the sign bit (itself), but other cases can give us 2059/// information. For example, immediately after an "SRA X, 2", we know that 2060/// the top 3 bits are all equal to each other, so we return 3. 2061unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2062 EVT VT = Op.getValueType(); 2063 assert(VT.isInteger() && "Invalid VT!"); 2064 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2065 unsigned Tmp, Tmp2; 2066 unsigned FirstAnswer = 1; 2067 2068 if (Depth == 6) 2069 return 1; // Limit search depth. 2070 2071 switch (Op.getOpcode()) { 2072 default: break; 2073 case ISD::AssertSext: 2074 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2075 return VTBits-Tmp+1; 2076 case ISD::AssertZext: 2077 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2078 return VTBits-Tmp; 2079 2080 case ISD::Constant: { 2081 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2082 // If negative, return # leading ones. 2083 if (Val.isNegative()) 2084 return Val.countLeadingOnes(); 2085 2086 // Return # leading zeros. 2087 return Val.countLeadingZeros(); 2088 } 2089 2090 case ISD::SIGN_EXTEND: 2091 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2092 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2093 2094 case ISD::SIGN_EXTEND_INREG: 2095 // Max of the input and what this extends. 2096 Tmp = 2097 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2098 Tmp = VTBits-Tmp+1; 2099 2100 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2101 return std::max(Tmp, Tmp2); 2102 2103 case ISD::SRA: 2104 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2105 // SRA X, C -> adds C sign bits. 2106 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2107 Tmp += C->getZExtValue(); 2108 if (Tmp > VTBits) Tmp = VTBits; 2109 } 2110 return Tmp; 2111 case ISD::SHL: 2112 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2113 // shl destroys sign bits. 2114 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2115 if (C->getZExtValue() >= VTBits || // Bad shift. 2116 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2117 return Tmp - C->getZExtValue(); 2118 } 2119 break; 2120 case ISD::AND: 2121 case ISD::OR: 2122 case ISD::XOR: // NOT is handled here. 2123 // Logical binary ops preserve the number of sign bits at the worst. 2124 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2125 if (Tmp != 1) { 2126 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2127 FirstAnswer = std::min(Tmp, Tmp2); 2128 // We computed what we know about the sign bits as our first 2129 // answer. Now proceed to the generic code that uses 2130 // ComputeMaskedBits, and pick whichever answer is better. 2131 } 2132 break; 2133 2134 case ISD::SELECT: 2135 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2136 if (Tmp == 1) return 1; // Early out. 2137 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2138 return std::min(Tmp, Tmp2); 2139 2140 case ISD::SADDO: 2141 case ISD::UADDO: 2142 case ISD::SSUBO: 2143 case ISD::USUBO: 2144 case ISD::SMULO: 2145 case ISD::UMULO: 2146 if (Op.getResNo() != 1) 2147 break; 2148 // The boolean result conforms to getBooleanContents. Fall through. 2149 case ISD::SETCC: 2150 // If setcc returns 0/-1, all bits are sign bits. 2151 if (TLI.getBooleanContents() == 2152 TargetLowering::ZeroOrNegativeOneBooleanContent) 2153 return VTBits; 2154 break; 2155 case ISD::ROTL: 2156 case ISD::ROTR: 2157 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2158 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2159 2160 // Handle rotate right by N like a rotate left by 32-N. 2161 if (Op.getOpcode() == ISD::ROTR) 2162 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2163 2164 // If we aren't rotating out all of the known-in sign bits, return the 2165 // number that are left. This handles rotl(sext(x), 1) for example. 2166 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2167 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2168 } 2169 break; 2170 case ISD::ADD: 2171 // Add can have at most one carry bit. Thus we know that the output 2172 // is, at worst, one more bit than the inputs. 2173 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2174 if (Tmp == 1) return 1; // Early out. 2175 2176 // Special case decrementing a value (ADD X, -1): 2177 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2178 if (CRHS->isAllOnesValue()) { 2179 APInt KnownZero, KnownOne; 2180 APInt Mask = APInt::getAllOnesValue(VTBits); 2181 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2182 2183 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2184 // sign bits set. 2185 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2186 return VTBits; 2187 2188 // If we are subtracting one from a positive number, there is no carry 2189 // out of the result. 2190 if (KnownZero.isNegative()) 2191 return Tmp; 2192 } 2193 2194 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2195 if (Tmp2 == 1) return 1; 2196 return std::min(Tmp, Tmp2)-1; 2197 break; 2198 2199 case ISD::SUB: 2200 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2201 if (Tmp2 == 1) return 1; 2202 2203 // Handle NEG. 2204 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2205 if (CLHS->isNullValue()) { 2206 APInt KnownZero, KnownOne; 2207 APInt Mask = APInt::getAllOnesValue(VTBits); 2208 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2209 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2210 // sign bits set. 2211 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2212 return VTBits; 2213 2214 // If the input is known to be positive (the sign bit is known clear), 2215 // the output of the NEG has the same number of sign bits as the input. 2216 if (KnownZero.isNegative()) 2217 return Tmp2; 2218 2219 // Otherwise, we treat this like a SUB. 2220 } 2221 2222 // Sub can have at most one carry bit. Thus we know that the output 2223 // is, at worst, one more bit than the inputs. 2224 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2225 if (Tmp == 1) return 1; // Early out. 2226 return std::min(Tmp, Tmp2)-1; 2227 break; 2228 case ISD::TRUNCATE: 2229 // FIXME: it's tricky to do anything useful for this, but it is an important 2230 // case for targets like X86. 2231 break; 2232 } 2233 2234 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2235 if (Op.getOpcode() == ISD::LOAD) { 2236 LoadSDNode *LD = cast<LoadSDNode>(Op); 2237 unsigned ExtType = LD->getExtensionType(); 2238 switch (ExtType) { 2239 default: break; 2240 case ISD::SEXTLOAD: // '17' bits known 2241 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2242 return VTBits-Tmp+1; 2243 case ISD::ZEXTLOAD: // '16' bits known 2244 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2245 return VTBits-Tmp; 2246 } 2247 } 2248 2249 // Allow the target to implement this method for its nodes. 2250 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2251 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2252 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2253 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2254 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2255 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2256 } 2257 2258 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2259 // use this information. 2260 APInt KnownZero, KnownOne; 2261 APInt Mask = APInt::getAllOnesValue(VTBits); 2262 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2263 2264 if (KnownZero.isNegative()) { // sign bit is 0 2265 Mask = KnownZero; 2266 } else if (KnownOne.isNegative()) { // sign bit is 1; 2267 Mask = KnownOne; 2268 } else { 2269 // Nothing known. 2270 return FirstAnswer; 2271 } 2272 2273 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2274 // the number of identical bits in the top of the input value. 2275 Mask = ~Mask; 2276 Mask <<= Mask.getBitWidth()-VTBits; 2277 // Return # leading zeros. We use 'min' here in case Val was zero before 2278 // shifting. We don't want to return '64' as for an i32 "0". 2279 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2280} 2281 2282bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2283 // If we're told that NaNs won't happen, assume they won't. 2284 if (NoNaNsFPMath) 2285 return true; 2286 2287 // If the value is a constant, we can obviously see if it is a NaN or not. 2288 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2289 return !C->getValueAPF().isNaN(); 2290 2291 // TODO: Recognize more cases here. 2292 2293 return false; 2294} 2295 2296bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2297 // If the value is a constant, we can obviously see if it is a zero or not. 2298 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2299 return !C->isZero(); 2300 2301 // TODO: Recognize more cases here. 2302 2303 return false; 2304} 2305 2306bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2307 // Check the obvious case. 2308 if (A == B) return true; 2309 2310 // For for negative and positive zero. 2311 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2312 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2313 if (CA->isZero() && CB->isZero()) return true; 2314 2315 // Otherwise they may not be equal. 2316 return false; 2317} 2318 2319bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2320 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2321 if (!GA) return false; 2322 if (GA->getOffset() != 0) return false; 2323 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2324 if (!GV) return false; 2325 return MF->getMMI().hasDebugInfo(); 2326} 2327 2328 2329/// getNode - Gets or creates the specified node. 2330/// 2331SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2332 FoldingSetNodeID ID; 2333 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2334 void *IP = 0; 2335 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2336 return SDValue(E, 0); 2337 2338 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2339 CSEMap.InsertNode(N, IP); 2340 2341 AllNodes.push_back(N); 2342#ifndef NDEBUG 2343 VerifySDNode(N); 2344#endif 2345 return SDValue(N, 0); 2346} 2347 2348SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2349 EVT VT, SDValue Operand) { 2350 // Constant fold unary operations with an integer constant operand. 2351 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2352 const APInt &Val = C->getAPIntValue(); 2353 switch (Opcode) { 2354 default: break; 2355 case ISD::SIGN_EXTEND: 2356 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2357 case ISD::ANY_EXTEND: 2358 case ISD::ZERO_EXTEND: 2359 case ISD::TRUNCATE: 2360 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2361 case ISD::UINT_TO_FP: 2362 case ISD::SINT_TO_FP: { 2363 // No compile time operations on ppcf128. 2364 if (VT == MVT::ppcf128) break; 2365 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2366 (void)apf.convertFromAPInt(Val, 2367 Opcode==ISD::SINT_TO_FP, 2368 APFloat::rmNearestTiesToEven); 2369 return getConstantFP(apf, VT); 2370 } 2371 case ISD::BITCAST: 2372 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2373 return getConstantFP(Val.bitsToFloat(), VT); 2374 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2375 return getConstantFP(Val.bitsToDouble(), VT); 2376 break; 2377 case ISD::BSWAP: 2378 return getConstant(Val.byteSwap(), VT); 2379 case ISD::CTPOP: 2380 return getConstant(Val.countPopulation(), VT); 2381 case ISD::CTLZ: 2382 return getConstant(Val.countLeadingZeros(), VT); 2383 case ISD::CTTZ: 2384 return getConstant(Val.countTrailingZeros(), VT); 2385 } 2386 } 2387 2388 // Constant fold unary operations with a floating point constant operand. 2389 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2390 APFloat V = C->getValueAPF(); // make copy 2391 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2392 switch (Opcode) { 2393 case ISD::FNEG: 2394 V.changeSign(); 2395 return getConstantFP(V, VT); 2396 case ISD::FABS: 2397 V.clearSign(); 2398 return getConstantFP(V, VT); 2399 case ISD::FP_ROUND: 2400 case ISD::FP_EXTEND: { 2401 bool ignored; 2402 // This can return overflow, underflow, or inexact; we don't care. 2403 // FIXME need to be more flexible about rounding mode. 2404 (void)V.convert(*EVTToAPFloatSemantics(VT), 2405 APFloat::rmNearestTiesToEven, &ignored); 2406 return getConstantFP(V, VT); 2407 } 2408 case ISD::FP_TO_SINT: 2409 case ISD::FP_TO_UINT: { 2410 integerPart x[2]; 2411 bool ignored; 2412 assert(integerPartWidth >= 64); 2413 // FIXME need to be more flexible about rounding mode. 2414 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2415 Opcode==ISD::FP_TO_SINT, 2416 APFloat::rmTowardZero, &ignored); 2417 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2418 break; 2419 APInt api(VT.getSizeInBits(), 2, x); 2420 return getConstant(api, VT); 2421 } 2422 case ISD::BITCAST: 2423 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2424 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2425 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2426 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2427 break; 2428 } 2429 } 2430 } 2431 2432 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2433 switch (Opcode) { 2434 case ISD::TokenFactor: 2435 case ISD::MERGE_VALUES: 2436 case ISD::CONCAT_VECTORS: 2437 return Operand; // Factor, merge or concat of one node? No need. 2438 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2439 case ISD::FP_EXTEND: 2440 assert(VT.isFloatingPoint() && 2441 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2442 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2443 assert((!VT.isVector() || 2444 VT.getVectorNumElements() == 2445 Operand.getValueType().getVectorNumElements()) && 2446 "Vector element count mismatch!"); 2447 if (Operand.getOpcode() == ISD::UNDEF) 2448 return getUNDEF(VT); 2449 break; 2450 case ISD::SIGN_EXTEND: 2451 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2452 "Invalid SIGN_EXTEND!"); 2453 if (Operand.getValueType() == VT) return Operand; // noop extension 2454 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2455 "Invalid sext node, dst < src!"); 2456 assert((!VT.isVector() || 2457 VT.getVectorNumElements() == 2458 Operand.getValueType().getVectorNumElements()) && 2459 "Vector element count mismatch!"); 2460 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2461 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2462 break; 2463 case ISD::ZERO_EXTEND: 2464 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2465 "Invalid ZERO_EXTEND!"); 2466 if (Operand.getValueType() == VT) return Operand; // noop extension 2467 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2468 "Invalid zext node, dst < src!"); 2469 assert((!VT.isVector() || 2470 VT.getVectorNumElements() == 2471 Operand.getValueType().getVectorNumElements()) && 2472 "Vector element count mismatch!"); 2473 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2474 return getNode(ISD::ZERO_EXTEND, DL, VT, 2475 Operand.getNode()->getOperand(0)); 2476 break; 2477 case ISD::ANY_EXTEND: 2478 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2479 "Invalid ANY_EXTEND!"); 2480 if (Operand.getValueType() == VT) return Operand; // noop extension 2481 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2482 "Invalid anyext node, dst < src!"); 2483 assert((!VT.isVector() || 2484 VT.getVectorNumElements() == 2485 Operand.getValueType().getVectorNumElements()) && 2486 "Vector element count mismatch!"); 2487 2488 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2489 OpOpcode == ISD::ANY_EXTEND) 2490 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2491 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2492 2493 // (ext (trunx x)) -> x 2494 if (OpOpcode == ISD::TRUNCATE) { 2495 SDValue OpOp = Operand.getNode()->getOperand(0); 2496 if (OpOp.getValueType() == VT) 2497 return OpOp; 2498 } 2499 break; 2500 case ISD::TRUNCATE: 2501 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2502 "Invalid TRUNCATE!"); 2503 if (Operand.getValueType() == VT) return Operand; // noop truncate 2504 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2505 "Invalid truncate node, src < dst!"); 2506 assert((!VT.isVector() || 2507 VT.getVectorNumElements() == 2508 Operand.getValueType().getVectorNumElements()) && 2509 "Vector element count mismatch!"); 2510 if (OpOpcode == ISD::TRUNCATE) 2511 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2512 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2513 OpOpcode == ISD::ANY_EXTEND) { 2514 // If the source is smaller than the dest, we still need an extend. 2515 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2516 .bitsLT(VT.getScalarType())) 2517 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2518 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2519 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2520 else 2521 return Operand.getNode()->getOperand(0); 2522 } 2523 break; 2524 case ISD::BITCAST: 2525 // Basic sanity checking. 2526 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2527 && "Cannot BITCAST between types of different sizes!"); 2528 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2529 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2530 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2531 if (OpOpcode == ISD::UNDEF) 2532 return getUNDEF(VT); 2533 break; 2534 case ISD::SCALAR_TO_VECTOR: 2535 assert(VT.isVector() && !Operand.getValueType().isVector() && 2536 (VT.getVectorElementType() == Operand.getValueType() || 2537 (VT.getVectorElementType().isInteger() && 2538 Operand.getValueType().isInteger() && 2539 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2540 "Illegal SCALAR_TO_VECTOR node!"); 2541 if (OpOpcode == ISD::UNDEF) 2542 return getUNDEF(VT); 2543 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2544 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2545 isa<ConstantSDNode>(Operand.getOperand(1)) && 2546 Operand.getConstantOperandVal(1) == 0 && 2547 Operand.getOperand(0).getValueType() == VT) 2548 return Operand.getOperand(0); 2549 break; 2550 case ISD::FNEG: 2551 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2552 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2553 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2554 Operand.getNode()->getOperand(0)); 2555 if (OpOpcode == ISD::FNEG) // --X -> X 2556 return Operand.getNode()->getOperand(0); 2557 break; 2558 case ISD::FABS: 2559 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2560 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2561 break; 2562 } 2563 2564 SDNode *N; 2565 SDVTList VTs = getVTList(VT); 2566 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2567 FoldingSetNodeID ID; 2568 SDValue Ops[1] = { Operand }; 2569 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2570 void *IP = 0; 2571 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2572 return SDValue(E, 0); 2573 2574 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2575 CSEMap.InsertNode(N, IP); 2576 } else { 2577 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2578 } 2579 2580 AllNodes.push_back(N); 2581#ifndef NDEBUG 2582 VerifySDNode(N); 2583#endif 2584 return SDValue(N, 0); 2585} 2586 2587SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2588 EVT VT, 2589 ConstantSDNode *Cst1, 2590 ConstantSDNode *Cst2) { 2591 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2592 2593 switch (Opcode) { 2594 case ISD::ADD: return getConstant(C1 + C2, VT); 2595 case ISD::SUB: return getConstant(C1 - C2, VT); 2596 case ISD::MUL: return getConstant(C1 * C2, VT); 2597 case ISD::UDIV: 2598 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2599 break; 2600 case ISD::UREM: 2601 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2602 break; 2603 case ISD::SDIV: 2604 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2605 break; 2606 case ISD::SREM: 2607 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2608 break; 2609 case ISD::AND: return getConstant(C1 & C2, VT); 2610 case ISD::OR: return getConstant(C1 | C2, VT); 2611 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2612 case ISD::SHL: return getConstant(C1 << C2, VT); 2613 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2614 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2615 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2616 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2617 default: break; 2618 } 2619 2620 return SDValue(); 2621} 2622 2623SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2624 SDValue N1, SDValue N2) { 2625 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2626 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2627 switch (Opcode) { 2628 default: break; 2629 case ISD::TokenFactor: 2630 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2631 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2632 // Fold trivial token factors. 2633 if (N1.getOpcode() == ISD::EntryToken) return N2; 2634 if (N2.getOpcode() == ISD::EntryToken) return N1; 2635 if (N1 == N2) return N1; 2636 break; 2637 case ISD::CONCAT_VECTORS: 2638 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2639 // one big BUILD_VECTOR. 2640 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2641 N2.getOpcode() == ISD::BUILD_VECTOR) { 2642 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2643 N1.getNode()->op_end()); 2644 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2645 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2646 } 2647 break; 2648 case ISD::AND: 2649 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2650 assert(N1.getValueType() == N2.getValueType() && 2651 N1.getValueType() == VT && "Binary operator types must match!"); 2652 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2653 // worth handling here. 2654 if (N2C && N2C->isNullValue()) 2655 return N2; 2656 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2657 return N1; 2658 break; 2659 case ISD::OR: 2660 case ISD::XOR: 2661 case ISD::ADD: 2662 case ISD::SUB: 2663 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2664 assert(N1.getValueType() == N2.getValueType() && 2665 N1.getValueType() == VT && "Binary operator types must match!"); 2666 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2667 // it's worth handling here. 2668 if (N2C && N2C->isNullValue()) 2669 return N1; 2670 break; 2671 case ISD::UDIV: 2672 case ISD::UREM: 2673 case ISD::MULHU: 2674 case ISD::MULHS: 2675 case ISD::MUL: 2676 case ISD::SDIV: 2677 case ISD::SREM: 2678 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2679 assert(N1.getValueType() == N2.getValueType() && 2680 N1.getValueType() == VT && "Binary operator types must match!"); 2681 break; 2682 case ISD::FADD: 2683 case ISD::FSUB: 2684 case ISD::FMUL: 2685 case ISD::FDIV: 2686 case ISD::FREM: 2687 if (UnsafeFPMath) { 2688 if (Opcode == ISD::FADD) { 2689 // 0+x --> x 2690 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2691 if (CFP->getValueAPF().isZero()) 2692 return N2; 2693 // x+0 --> x 2694 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2695 if (CFP->getValueAPF().isZero()) 2696 return N1; 2697 } else if (Opcode == ISD::FSUB) { 2698 // x-0 --> x 2699 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2700 if (CFP->getValueAPF().isZero()) 2701 return N1; 2702 } 2703 } 2704 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2705 assert(N1.getValueType() == N2.getValueType() && 2706 N1.getValueType() == VT && "Binary operator types must match!"); 2707 break; 2708 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2709 assert(N1.getValueType() == VT && 2710 N1.getValueType().isFloatingPoint() && 2711 N2.getValueType().isFloatingPoint() && 2712 "Invalid FCOPYSIGN!"); 2713 break; 2714 case ISD::SHL: 2715 case ISD::SRA: 2716 case ISD::SRL: 2717 case ISD::ROTL: 2718 case ISD::ROTR: 2719 assert(VT == N1.getValueType() && 2720 "Shift operators return type must be the same as their first arg"); 2721 assert(VT.isInteger() && N2.getValueType().isInteger() && 2722 "Shifts only work on integers"); 2723 2724 // Always fold shifts of i1 values so the code generator doesn't need to 2725 // handle them. Since we know the size of the shift has to be less than the 2726 // size of the value, the shift/rotate count is guaranteed to be zero. 2727 if (VT == MVT::i1) 2728 return N1; 2729 if (N2C && N2C->isNullValue()) 2730 return N1; 2731 break; 2732 case ISD::FP_ROUND_INREG: { 2733 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2734 assert(VT == N1.getValueType() && "Not an inreg round!"); 2735 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2736 "Cannot FP_ROUND_INREG integer types"); 2737 assert(EVT.isVector() == VT.isVector() && 2738 "FP_ROUND_INREG type should be vector iff the operand " 2739 "type is vector!"); 2740 assert((!EVT.isVector() || 2741 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2742 "Vector element counts must match in FP_ROUND_INREG"); 2743 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2744 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2745 break; 2746 } 2747 case ISD::FP_ROUND: 2748 assert(VT.isFloatingPoint() && 2749 N1.getValueType().isFloatingPoint() && 2750 VT.bitsLE(N1.getValueType()) && 2751 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2752 if (N1.getValueType() == VT) return N1; // noop conversion. 2753 break; 2754 case ISD::AssertSext: 2755 case ISD::AssertZext: { 2756 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2757 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2758 assert(VT.isInteger() && EVT.isInteger() && 2759 "Cannot *_EXTEND_INREG FP types"); 2760 assert(!EVT.isVector() && 2761 "AssertSExt/AssertZExt type should be the vector element type " 2762 "rather than the vector type!"); 2763 assert(EVT.bitsLE(VT) && "Not extending!"); 2764 if (VT == EVT) return N1; // noop assertion. 2765 break; 2766 } 2767 case ISD::SIGN_EXTEND_INREG: { 2768 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2769 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2770 assert(VT.isInteger() && EVT.isInteger() && 2771 "Cannot *_EXTEND_INREG FP types"); 2772 assert(EVT.isVector() == VT.isVector() && 2773 "SIGN_EXTEND_INREG type should be vector iff the operand " 2774 "type is vector!"); 2775 assert((!EVT.isVector() || 2776 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2777 "Vector element counts must match in SIGN_EXTEND_INREG"); 2778 assert(EVT.bitsLE(VT) && "Not extending!"); 2779 if (EVT == VT) return N1; // Not actually extending 2780 2781 if (N1C) { 2782 APInt Val = N1C->getAPIntValue(); 2783 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2784 Val <<= Val.getBitWidth()-FromBits; 2785 Val = Val.ashr(Val.getBitWidth()-FromBits); 2786 return getConstant(Val, VT); 2787 } 2788 break; 2789 } 2790 case ISD::EXTRACT_VECTOR_ELT: 2791 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2792 if (N1.getOpcode() == ISD::UNDEF) 2793 return getUNDEF(VT); 2794 2795 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2796 // expanding copies of large vectors from registers. 2797 if (N2C && 2798 N1.getOpcode() == ISD::CONCAT_VECTORS && 2799 N1.getNumOperands() > 0) { 2800 unsigned Factor = 2801 N1.getOperand(0).getValueType().getVectorNumElements(); 2802 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2803 N1.getOperand(N2C->getZExtValue() / Factor), 2804 getConstant(N2C->getZExtValue() % Factor, 2805 N2.getValueType())); 2806 } 2807 2808 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2809 // expanding large vector constants. 2810 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2811 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2812 EVT VEltTy = N1.getValueType().getVectorElementType(); 2813 if (Elt.getValueType() != VEltTy) { 2814 // If the vector element type is not legal, the BUILD_VECTOR operands 2815 // are promoted and implicitly truncated. Make that explicit here. 2816 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2817 } 2818 if (VT != VEltTy) { 2819 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2820 // result is implicitly extended. 2821 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2822 } 2823 return Elt; 2824 } 2825 2826 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2827 // operations are lowered to scalars. 2828 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2829 // If the indices are the same, return the inserted element else 2830 // if the indices are known different, extract the element from 2831 // the original vector. 2832 SDValue N1Op2 = N1.getOperand(2); 2833 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2834 2835 if (N1Op2C && N2C) { 2836 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2837 if (VT == N1.getOperand(1).getValueType()) 2838 return N1.getOperand(1); 2839 else 2840 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2841 } 2842 2843 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2844 } 2845 } 2846 break; 2847 case ISD::EXTRACT_ELEMENT: 2848 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2849 assert(!N1.getValueType().isVector() && !VT.isVector() && 2850 (N1.getValueType().isInteger() == VT.isInteger()) && 2851 "Wrong types for EXTRACT_ELEMENT!"); 2852 2853 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2854 // 64-bit integers into 32-bit parts. Instead of building the extract of 2855 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2856 if (N1.getOpcode() == ISD::BUILD_PAIR) 2857 return N1.getOperand(N2C->getZExtValue()); 2858 2859 // EXTRACT_ELEMENT of a constant int is also very common. 2860 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2861 unsigned ElementSize = VT.getSizeInBits(); 2862 unsigned Shift = ElementSize * N2C->getZExtValue(); 2863 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2864 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2865 } 2866 break; 2867 case ISD::EXTRACT_SUBVECTOR: { 2868 SDValue Index = N2; 2869 if (VT.isSimple() && N1.getValueType().isSimple()) { 2870 assert(VT.isVector() && N1.getValueType().isVector() && 2871 "Extract subvector VTs must be a vectors!"); 2872 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2873 "Extract subvector VTs must have the same element type!"); 2874 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2875 "Extract subvector must be from larger vector to smaller vector!"); 2876 2877 if (isa<ConstantSDNode>(Index.getNode())) { 2878 assert((VT.getVectorNumElements() + 2879 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2880 <= N1.getValueType().getVectorNumElements()) 2881 && "Extract subvector overflow!"); 2882 } 2883 2884 // Trivial extraction. 2885 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2886 return N1; 2887 } 2888 break; 2889 } 2890 } 2891 2892 if (N1C) { 2893 if (N2C) { 2894 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2895 if (SV.getNode()) return SV; 2896 } else { // Cannonicalize constant to RHS if commutative 2897 if (isCommutativeBinOp(Opcode)) { 2898 std::swap(N1C, N2C); 2899 std::swap(N1, N2); 2900 } 2901 } 2902 } 2903 2904 // Constant fold FP operations. 2905 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2906 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2907 if (N1CFP) { 2908 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2909 // Cannonicalize constant to RHS if commutative 2910 std::swap(N1CFP, N2CFP); 2911 std::swap(N1, N2); 2912 } else if (N2CFP && VT != MVT::ppcf128) { 2913 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2914 APFloat::opStatus s; 2915 switch (Opcode) { 2916 case ISD::FADD: 2917 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2918 if (s != APFloat::opInvalidOp) 2919 return getConstantFP(V1, VT); 2920 break; 2921 case ISD::FSUB: 2922 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2923 if (s!=APFloat::opInvalidOp) 2924 return getConstantFP(V1, VT); 2925 break; 2926 case ISD::FMUL: 2927 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2928 if (s!=APFloat::opInvalidOp) 2929 return getConstantFP(V1, VT); 2930 break; 2931 case ISD::FDIV: 2932 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2933 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2934 return getConstantFP(V1, VT); 2935 break; 2936 case ISD::FREM : 2937 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2938 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2939 return getConstantFP(V1, VT); 2940 break; 2941 case ISD::FCOPYSIGN: 2942 V1.copySign(V2); 2943 return getConstantFP(V1, VT); 2944 default: break; 2945 } 2946 } 2947 } 2948 2949 // Canonicalize an UNDEF to the RHS, even over a constant. 2950 if (N1.getOpcode() == ISD::UNDEF) { 2951 if (isCommutativeBinOp(Opcode)) { 2952 std::swap(N1, N2); 2953 } else { 2954 switch (Opcode) { 2955 case ISD::FP_ROUND_INREG: 2956 case ISD::SIGN_EXTEND_INREG: 2957 case ISD::SUB: 2958 case ISD::FSUB: 2959 case ISD::FDIV: 2960 case ISD::FREM: 2961 case ISD::SRA: 2962 return N1; // fold op(undef, arg2) -> undef 2963 case ISD::UDIV: 2964 case ISD::SDIV: 2965 case ISD::UREM: 2966 case ISD::SREM: 2967 case ISD::SRL: 2968 case ISD::SHL: 2969 if (!VT.isVector()) 2970 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2971 // For vectors, we can't easily build an all zero vector, just return 2972 // the LHS. 2973 return N2; 2974 } 2975 } 2976 } 2977 2978 // Fold a bunch of operators when the RHS is undef. 2979 if (N2.getOpcode() == ISD::UNDEF) { 2980 switch (Opcode) { 2981 case ISD::XOR: 2982 if (N1.getOpcode() == ISD::UNDEF) 2983 // Handle undef ^ undef -> 0 special case. This is a common 2984 // idiom (misuse). 2985 return getConstant(0, VT); 2986 // fallthrough 2987 case ISD::ADD: 2988 case ISD::ADDC: 2989 case ISD::ADDE: 2990 case ISD::SUB: 2991 case ISD::UDIV: 2992 case ISD::SDIV: 2993 case ISD::UREM: 2994 case ISD::SREM: 2995 return N2; // fold op(arg1, undef) -> undef 2996 case ISD::FADD: 2997 case ISD::FSUB: 2998 case ISD::FMUL: 2999 case ISD::FDIV: 3000 case ISD::FREM: 3001 if (UnsafeFPMath) 3002 return N2; 3003 break; 3004 case ISD::MUL: 3005 case ISD::AND: 3006 case ISD::SRL: 3007 case ISD::SHL: 3008 if (!VT.isVector()) 3009 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3010 // For vectors, we can't easily build an all zero vector, just return 3011 // the LHS. 3012 return N1; 3013 case ISD::OR: 3014 if (!VT.isVector()) 3015 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3016 // For vectors, we can't easily build an all one vector, just return 3017 // the LHS. 3018 return N1; 3019 case ISD::SRA: 3020 return N1; 3021 } 3022 } 3023 3024 // Memoize this node if possible. 3025 SDNode *N; 3026 SDVTList VTs = getVTList(VT); 3027 if (VT != MVT::Glue) { 3028 SDValue Ops[] = { N1, N2 }; 3029 FoldingSetNodeID ID; 3030 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3031 void *IP = 0; 3032 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3033 return SDValue(E, 0); 3034 3035 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3036 CSEMap.InsertNode(N, IP); 3037 } else { 3038 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3039 } 3040 3041 AllNodes.push_back(N); 3042#ifndef NDEBUG 3043 VerifySDNode(N); 3044#endif 3045 return SDValue(N, 0); 3046} 3047 3048SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3049 SDValue N1, SDValue N2, SDValue N3) { 3050 // Perform various simplifications. 3051 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3052 switch (Opcode) { 3053 case ISD::CONCAT_VECTORS: 3054 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3055 // one big BUILD_VECTOR. 3056 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3057 N2.getOpcode() == ISD::BUILD_VECTOR && 3058 N3.getOpcode() == ISD::BUILD_VECTOR) { 3059 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3060 N1.getNode()->op_end()); 3061 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3062 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3063 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3064 } 3065 break; 3066 case ISD::SETCC: { 3067 // Use FoldSetCC to simplify SETCC's. 3068 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3069 if (Simp.getNode()) return Simp; 3070 break; 3071 } 3072 case ISD::SELECT: 3073 if (N1C) { 3074 if (N1C->getZExtValue()) 3075 return N2; // select true, X, Y -> X 3076 else 3077 return N3; // select false, X, Y -> Y 3078 } 3079 3080 if (N2 == N3) return N2; // select C, X, X -> X 3081 break; 3082 case ISD::VECTOR_SHUFFLE: 3083 llvm_unreachable("should use getVectorShuffle constructor!"); 3084 break; 3085 case ISD::INSERT_SUBVECTOR: { 3086 SDValue Index = N3; 3087 if (VT.isSimple() && N1.getValueType().isSimple() 3088 && N2.getValueType().isSimple()) { 3089 assert(VT.isVector() && N1.getValueType().isVector() && 3090 N2.getValueType().isVector() && 3091 "Insert subvector VTs must be a vectors"); 3092 assert(VT == N1.getValueType() && 3093 "Dest and insert subvector source types must match!"); 3094 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3095 "Insert subvector must be from smaller vector to larger vector!"); 3096 if (isa<ConstantSDNode>(Index.getNode())) { 3097 assert((N2.getValueType().getVectorNumElements() + 3098 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3099 <= VT.getVectorNumElements()) 3100 && "Insert subvector overflow!"); 3101 } 3102 3103 // Trivial insertion. 3104 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3105 return N2; 3106 } 3107 break; 3108 } 3109 case ISD::BITCAST: 3110 // Fold bit_convert nodes from a type to themselves. 3111 if (N1.getValueType() == VT) 3112 return N1; 3113 break; 3114 } 3115 3116 // Memoize node if it doesn't produce a flag. 3117 SDNode *N; 3118 SDVTList VTs = getVTList(VT); 3119 if (VT != MVT::Glue) { 3120 SDValue Ops[] = { N1, N2, N3 }; 3121 FoldingSetNodeID ID; 3122 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3123 void *IP = 0; 3124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3125 return SDValue(E, 0); 3126 3127 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3128 CSEMap.InsertNode(N, IP); 3129 } else { 3130 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3131 } 3132 3133 AllNodes.push_back(N); 3134#ifndef NDEBUG 3135 VerifySDNode(N); 3136#endif 3137 return SDValue(N, 0); 3138} 3139 3140SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3141 SDValue N1, SDValue N2, SDValue N3, 3142 SDValue N4) { 3143 SDValue Ops[] = { N1, N2, N3, N4 }; 3144 return getNode(Opcode, DL, VT, Ops, 4); 3145} 3146 3147SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3148 SDValue N1, SDValue N2, SDValue N3, 3149 SDValue N4, SDValue N5) { 3150 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3151 return getNode(Opcode, DL, VT, Ops, 5); 3152} 3153 3154/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3155/// the incoming stack arguments to be loaded from the stack. 3156SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3157 SmallVector<SDValue, 8> ArgChains; 3158 3159 // Include the original chain at the beginning of the list. When this is 3160 // used by target LowerCall hooks, this helps legalize find the 3161 // CALLSEQ_BEGIN node. 3162 ArgChains.push_back(Chain); 3163 3164 // Add a chain value for each stack argument. 3165 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3166 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3167 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3168 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3169 if (FI->getIndex() < 0) 3170 ArgChains.push_back(SDValue(L, 1)); 3171 3172 // Build a tokenfactor for all the chains. 3173 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3174 &ArgChains[0], ArgChains.size()); 3175} 3176 3177/// SplatByte - Distribute ByteVal over NumBits bits. 3178static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3179 APInt Val = APInt(NumBits, ByteVal); 3180 unsigned Shift = 8; 3181 for (unsigned i = NumBits; i > 8; i >>= 1) { 3182 Val = (Val << Shift) | Val; 3183 Shift <<= 1; 3184 } 3185 return Val; 3186} 3187 3188/// getMemsetValue - Vectorized representation of the memset value 3189/// operand. 3190static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3191 DebugLoc dl) { 3192 assert(Value.getOpcode() != ISD::UNDEF); 3193 3194 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3195 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3196 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3197 if (VT.isInteger()) 3198 return DAG.getConstant(Val, VT); 3199 return DAG.getConstantFP(APFloat(Val), VT); 3200 } 3201 3202 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3203 if (NumBits > 8) { 3204 // Use a multiplication with 0x010101... to extend the input to the 3205 // required length. 3206 APInt Magic = SplatByte(NumBits, 0x01); 3207 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3208 } 3209 3210 return Value; 3211} 3212 3213/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3214/// used when a memcpy is turned into a memset when the source is a constant 3215/// string ptr. 3216static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3217 const TargetLowering &TLI, 3218 std::string &Str, unsigned Offset) { 3219 // Handle vector with all elements zero. 3220 if (Str.empty()) { 3221 if (VT.isInteger()) 3222 return DAG.getConstant(0, VT); 3223 else if (VT == MVT::f32 || VT == MVT::f64) 3224 return DAG.getConstantFP(0.0, VT); 3225 else if (VT.isVector()) { 3226 unsigned NumElts = VT.getVectorNumElements(); 3227 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3228 return DAG.getNode(ISD::BITCAST, dl, VT, 3229 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3230 EltVT, NumElts))); 3231 } else 3232 llvm_unreachable("Expected type!"); 3233 } 3234 3235 assert(!VT.isVector() && "Can't handle vector type here!"); 3236 unsigned NumBits = VT.getSizeInBits(); 3237 unsigned MSB = NumBits / 8; 3238 uint64_t Val = 0; 3239 if (TLI.isLittleEndian()) 3240 Offset = Offset + MSB - 1; 3241 for (unsigned i = 0; i != MSB; ++i) { 3242 Val = (Val << 8) | (unsigned char)Str[Offset]; 3243 Offset += TLI.isLittleEndian() ? -1 : 1; 3244 } 3245 return DAG.getConstant(Val, VT); 3246} 3247 3248/// getMemBasePlusOffset - Returns base and offset node for the 3249/// 3250static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3251 SelectionDAG &DAG) { 3252 EVT VT = Base.getValueType(); 3253 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3254 VT, Base, DAG.getConstant(Offset, VT)); 3255} 3256 3257/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3258/// 3259static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3260 unsigned SrcDelta = 0; 3261 GlobalAddressSDNode *G = NULL; 3262 if (Src.getOpcode() == ISD::GlobalAddress) 3263 G = cast<GlobalAddressSDNode>(Src); 3264 else if (Src.getOpcode() == ISD::ADD && 3265 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3266 Src.getOperand(1).getOpcode() == ISD::Constant) { 3267 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3268 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3269 } 3270 if (!G) 3271 return false; 3272 3273 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3274 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3275 return true; 3276 3277 return false; 3278} 3279 3280/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3281/// to replace the memset / memcpy. Return true if the number of memory ops 3282/// is below the threshold. It returns the types of the sequence of 3283/// memory ops to perform memset / memcpy by reference. 3284static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3285 unsigned Limit, uint64_t Size, 3286 unsigned DstAlign, unsigned SrcAlign, 3287 bool NonScalarIntSafe, 3288 bool MemcpyStrSrc, 3289 SelectionDAG &DAG, 3290 const TargetLowering &TLI) { 3291 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3292 "Expecting memcpy / memset source to meet alignment requirement!"); 3293 // If 'SrcAlign' is zero, that means the memory operation does not need load 3294 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3295 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3296 // specified alignment of the memory operation. If it is zero, that means 3297 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3298 // indicates whether the memcpy source is constant so it does not need to be 3299 // loaded. 3300 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3301 NonScalarIntSafe, MemcpyStrSrc, 3302 DAG.getMachineFunction()); 3303 3304 if (VT == MVT::Other) { 3305 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3306 TLI.allowsUnalignedMemoryAccesses(VT)) { 3307 VT = TLI.getPointerTy(); 3308 } else { 3309 switch (DstAlign & 7) { 3310 case 0: VT = MVT::i64; break; 3311 case 4: VT = MVT::i32; break; 3312 case 2: VT = MVT::i16; break; 3313 default: VT = MVT::i8; break; 3314 } 3315 } 3316 3317 MVT LVT = MVT::i64; 3318 while (!TLI.isTypeLegal(LVT)) 3319 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3320 assert(LVT.isInteger()); 3321 3322 if (VT.bitsGT(LVT)) 3323 VT = LVT; 3324 } 3325 3326 unsigned NumMemOps = 0; 3327 while (Size != 0) { 3328 unsigned VTSize = VT.getSizeInBits() / 8; 3329 while (VTSize > Size) { 3330 // For now, only use non-vector load / store's for the left-over pieces. 3331 if (VT.isVector() || VT.isFloatingPoint()) { 3332 VT = MVT::i64; 3333 while (!TLI.isTypeLegal(VT)) 3334 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3335 VTSize = VT.getSizeInBits() / 8; 3336 } else { 3337 // This can result in a type that is not legal on the target, e.g. 3338 // 1 or 2 bytes on PPC. 3339 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3340 VTSize >>= 1; 3341 } 3342 } 3343 3344 if (++NumMemOps > Limit) 3345 return false; 3346 MemOps.push_back(VT); 3347 Size -= VTSize; 3348 } 3349 3350 return true; 3351} 3352 3353static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3354 SDValue Chain, SDValue Dst, 3355 SDValue Src, uint64_t Size, 3356 unsigned Align, bool isVol, 3357 bool AlwaysInline, 3358 MachinePointerInfo DstPtrInfo, 3359 MachinePointerInfo SrcPtrInfo) { 3360 // Turn a memcpy of undef to nop. 3361 if (Src.getOpcode() == ISD::UNDEF) 3362 return Chain; 3363 3364 // Expand memcpy to a series of load and store ops if the size operand falls 3365 // below a certain threshold. 3366 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3367 // rather than maybe a humongous number of loads and stores. 3368 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3369 std::vector<EVT> MemOps; 3370 bool DstAlignCanChange = false; 3371 MachineFunction &MF = DAG.getMachineFunction(); 3372 MachineFrameInfo *MFI = MF.getFrameInfo(); 3373 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3374 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3375 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3376 DstAlignCanChange = true; 3377 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3378 if (Align > SrcAlign) 3379 SrcAlign = Align; 3380 std::string Str; 3381 bool CopyFromStr = isMemSrcFromString(Src, Str); 3382 bool isZeroStr = CopyFromStr && Str.empty(); 3383 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3384 3385 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3386 (DstAlignCanChange ? 0 : Align), 3387 (isZeroStr ? 0 : SrcAlign), 3388 true, CopyFromStr, DAG, TLI)) 3389 return SDValue(); 3390 3391 if (DstAlignCanChange) { 3392 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3393 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3394 if (NewAlign > Align) { 3395 // Give the stack frame object a larger alignment if needed. 3396 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3397 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3398 Align = NewAlign; 3399 } 3400 } 3401 3402 SmallVector<SDValue, 8> OutChains; 3403 unsigned NumMemOps = MemOps.size(); 3404 uint64_t SrcOff = 0, DstOff = 0; 3405 for (unsigned i = 0; i != NumMemOps; ++i) { 3406 EVT VT = MemOps[i]; 3407 unsigned VTSize = VT.getSizeInBits() / 8; 3408 SDValue Value, Store; 3409 3410 if (CopyFromStr && 3411 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3412 // It's unlikely a store of a vector immediate can be done in a single 3413 // instruction. It would require a load from a constantpool first. 3414 // We only handle zero vectors here. 3415 // FIXME: Handle other cases where store of vector immediate is done in 3416 // a single instruction. 3417 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3418 Store = DAG.getStore(Chain, dl, Value, 3419 getMemBasePlusOffset(Dst, DstOff, DAG), 3420 DstPtrInfo.getWithOffset(DstOff), isVol, 3421 false, Align); 3422 } else { 3423 // The type might not be legal for the target. This should only happen 3424 // if the type is smaller than a legal type, as on PPC, so the right 3425 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3426 // to Load/Store if NVT==VT. 3427 // FIXME does the case above also need this? 3428 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3429 assert(NVT.bitsGE(VT)); 3430 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain, 3431 getMemBasePlusOffset(Src, SrcOff, DAG), 3432 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3433 MinAlign(SrcAlign, SrcOff)); 3434 Store = DAG.getTruncStore(Chain, dl, Value, 3435 getMemBasePlusOffset(Dst, DstOff, DAG), 3436 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3437 false, Align); 3438 } 3439 OutChains.push_back(Store); 3440 SrcOff += VTSize; 3441 DstOff += VTSize; 3442 } 3443 3444 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3445 &OutChains[0], OutChains.size()); 3446} 3447 3448static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3449 SDValue Chain, SDValue Dst, 3450 SDValue Src, uint64_t Size, 3451 unsigned Align, bool isVol, 3452 bool AlwaysInline, 3453 MachinePointerInfo DstPtrInfo, 3454 MachinePointerInfo SrcPtrInfo) { 3455 // Turn a memmove of undef to nop. 3456 if (Src.getOpcode() == ISD::UNDEF) 3457 return Chain; 3458 3459 // Expand memmove to a series of load and store ops if the size operand falls 3460 // below a certain threshold. 3461 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3462 std::vector<EVT> MemOps; 3463 bool DstAlignCanChange = false; 3464 MachineFunction &MF = DAG.getMachineFunction(); 3465 MachineFrameInfo *MFI = MF.getFrameInfo(); 3466 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3467 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3468 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3469 DstAlignCanChange = true; 3470 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3471 if (Align > SrcAlign) 3472 SrcAlign = Align; 3473 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3474 3475 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3476 (DstAlignCanChange ? 0 : Align), 3477 SrcAlign, true, false, DAG, TLI)) 3478 return SDValue(); 3479 3480 if (DstAlignCanChange) { 3481 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3482 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3483 if (NewAlign > Align) { 3484 // Give the stack frame object a larger alignment if needed. 3485 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3486 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3487 Align = NewAlign; 3488 } 3489 } 3490 3491 uint64_t SrcOff = 0, DstOff = 0; 3492 SmallVector<SDValue, 8> LoadValues; 3493 SmallVector<SDValue, 8> LoadChains; 3494 SmallVector<SDValue, 8> OutChains; 3495 unsigned NumMemOps = MemOps.size(); 3496 for (unsigned i = 0; i < NumMemOps; i++) { 3497 EVT VT = MemOps[i]; 3498 unsigned VTSize = VT.getSizeInBits() / 8; 3499 SDValue Value, Store; 3500 3501 Value = DAG.getLoad(VT, dl, Chain, 3502 getMemBasePlusOffset(Src, SrcOff, DAG), 3503 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3504 false, SrcAlign); 3505 LoadValues.push_back(Value); 3506 LoadChains.push_back(Value.getValue(1)); 3507 SrcOff += VTSize; 3508 } 3509 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3510 &LoadChains[0], LoadChains.size()); 3511 OutChains.clear(); 3512 for (unsigned i = 0; i < NumMemOps; i++) { 3513 EVT VT = MemOps[i]; 3514 unsigned VTSize = VT.getSizeInBits() / 8; 3515 SDValue Value, Store; 3516 3517 Store = DAG.getStore(Chain, dl, LoadValues[i], 3518 getMemBasePlusOffset(Dst, DstOff, DAG), 3519 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3520 OutChains.push_back(Store); 3521 DstOff += VTSize; 3522 } 3523 3524 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3525 &OutChains[0], OutChains.size()); 3526} 3527 3528static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3529 SDValue Chain, SDValue Dst, 3530 SDValue Src, uint64_t Size, 3531 unsigned Align, bool isVol, 3532 MachinePointerInfo DstPtrInfo) { 3533 // Turn a memset of undef to nop. 3534 if (Src.getOpcode() == ISD::UNDEF) 3535 return Chain; 3536 3537 // Expand memset to a series of load/store ops if the size operand 3538 // falls below a certain threshold. 3539 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3540 std::vector<EVT> MemOps; 3541 bool DstAlignCanChange = false; 3542 MachineFunction &MF = DAG.getMachineFunction(); 3543 MachineFrameInfo *MFI = MF.getFrameInfo(); 3544 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3545 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3546 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3547 DstAlignCanChange = true; 3548 bool NonScalarIntSafe = 3549 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3550 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3551 Size, (DstAlignCanChange ? 0 : Align), 0, 3552 NonScalarIntSafe, false, DAG, TLI)) 3553 return SDValue(); 3554 3555 if (DstAlignCanChange) { 3556 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3557 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3558 if (NewAlign > Align) { 3559 // Give the stack frame object a larger alignment if needed. 3560 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3561 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3562 Align = NewAlign; 3563 } 3564 } 3565 3566 SmallVector<SDValue, 8> OutChains; 3567 uint64_t DstOff = 0; 3568 unsigned NumMemOps = MemOps.size(); 3569 3570 // Find the largest store and generate the bit pattern for it. 3571 EVT LargestVT = MemOps[0]; 3572 for (unsigned i = 1; i < NumMemOps; i++) 3573 if (MemOps[i].bitsGT(LargestVT)) 3574 LargestVT = MemOps[i]; 3575 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3576 3577 for (unsigned i = 0; i < NumMemOps; i++) { 3578 EVT VT = MemOps[i]; 3579 3580 // If this store is smaller than the largest store see whether we can get 3581 // the smaller value for free with a truncate. 3582 SDValue Value = MemSetValue; 3583 if (VT.bitsLT(LargestVT)) { 3584 if (!LargestVT.isVector() && !VT.isVector() && 3585 TLI.isTruncateFree(LargestVT, VT)) 3586 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3587 else 3588 Value = getMemsetValue(Src, VT, DAG, dl); 3589 } 3590 assert(Value.getValueType() == VT && "Value with wrong type."); 3591 SDValue Store = DAG.getStore(Chain, dl, Value, 3592 getMemBasePlusOffset(Dst, DstOff, DAG), 3593 DstPtrInfo.getWithOffset(DstOff), 3594 isVol, false, Align); 3595 OutChains.push_back(Store); 3596 DstOff += VT.getSizeInBits() / 8; 3597 } 3598 3599 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3600 &OutChains[0], OutChains.size()); 3601} 3602 3603SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3604 SDValue Src, SDValue Size, 3605 unsigned Align, bool isVol, bool AlwaysInline, 3606 MachinePointerInfo DstPtrInfo, 3607 MachinePointerInfo SrcPtrInfo) { 3608 3609 // Check to see if we should lower the memcpy to loads and stores first. 3610 // For cases within the target-specified limits, this is the best choice. 3611 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3612 if (ConstantSize) { 3613 // Memcpy with size zero? Just return the original chain. 3614 if (ConstantSize->isNullValue()) 3615 return Chain; 3616 3617 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3618 ConstantSize->getZExtValue(),Align, 3619 isVol, false, DstPtrInfo, SrcPtrInfo); 3620 if (Result.getNode()) 3621 return Result; 3622 } 3623 3624 // Then check to see if we should lower the memcpy with target-specific 3625 // code. If the target chooses to do this, this is the next best. 3626 SDValue Result = 3627 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3628 isVol, AlwaysInline, 3629 DstPtrInfo, SrcPtrInfo); 3630 if (Result.getNode()) 3631 return Result; 3632 3633 // If we really need inline code and the target declined to provide it, 3634 // use a (potentially long) sequence of loads and stores. 3635 if (AlwaysInline) { 3636 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3637 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3638 ConstantSize->getZExtValue(), Align, isVol, 3639 true, DstPtrInfo, SrcPtrInfo); 3640 } 3641 3642 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3643 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3644 // respect volatile, so they may do things like read or write memory 3645 // beyond the given memory regions. But fixing this isn't easy, and most 3646 // people don't care. 3647 3648 // Emit a library call. 3649 TargetLowering::ArgListTy Args; 3650 TargetLowering::ArgListEntry Entry; 3651 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3652 Entry.Node = Dst; Args.push_back(Entry); 3653 Entry.Node = Src; Args.push_back(Entry); 3654 Entry.Node = Size; Args.push_back(Entry); 3655 // FIXME: pass in DebugLoc 3656 std::pair<SDValue,SDValue> CallResult = 3657 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3658 false, false, false, false, 0, 3659 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3660 /*isReturnValueUsed=*/false, 3661 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3662 TLI.getPointerTy()), 3663 Args, *this, dl); 3664 return CallResult.second; 3665} 3666 3667SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3668 SDValue Src, SDValue Size, 3669 unsigned Align, bool isVol, 3670 MachinePointerInfo DstPtrInfo, 3671 MachinePointerInfo SrcPtrInfo) { 3672 3673 // Check to see if we should lower the memmove to loads and stores first. 3674 // For cases within the target-specified limits, this is the best choice. 3675 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3676 if (ConstantSize) { 3677 // Memmove with size zero? Just return the original chain. 3678 if (ConstantSize->isNullValue()) 3679 return Chain; 3680 3681 SDValue Result = 3682 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3683 ConstantSize->getZExtValue(), Align, isVol, 3684 false, DstPtrInfo, SrcPtrInfo); 3685 if (Result.getNode()) 3686 return Result; 3687 } 3688 3689 // Then check to see if we should lower the memmove with target-specific 3690 // code. If the target chooses to do this, this is the next best. 3691 SDValue Result = 3692 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3693 DstPtrInfo, SrcPtrInfo); 3694 if (Result.getNode()) 3695 return Result; 3696 3697 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3698 // not be safe. See memcpy above for more details. 3699 3700 // Emit a library call. 3701 TargetLowering::ArgListTy Args; 3702 TargetLowering::ArgListEntry Entry; 3703 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3704 Entry.Node = Dst; Args.push_back(Entry); 3705 Entry.Node = Src; Args.push_back(Entry); 3706 Entry.Node = Size; Args.push_back(Entry); 3707 // FIXME: pass in DebugLoc 3708 std::pair<SDValue,SDValue> CallResult = 3709 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3710 false, false, false, false, 0, 3711 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3712 /*isReturnValueUsed=*/false, 3713 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3714 TLI.getPointerTy()), 3715 Args, *this, dl); 3716 return CallResult.second; 3717} 3718 3719SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3720 SDValue Src, SDValue Size, 3721 unsigned Align, bool isVol, 3722 MachinePointerInfo DstPtrInfo) { 3723 3724 // Check to see if we should lower the memset to stores first. 3725 // For cases within the target-specified limits, this is the best choice. 3726 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3727 if (ConstantSize) { 3728 // Memset with size zero? Just return the original chain. 3729 if (ConstantSize->isNullValue()) 3730 return Chain; 3731 3732 SDValue Result = 3733 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3734 Align, isVol, DstPtrInfo); 3735 3736 if (Result.getNode()) 3737 return Result; 3738 } 3739 3740 // Then check to see if we should lower the memset with target-specific 3741 // code. If the target chooses to do this, this is the next best. 3742 SDValue Result = 3743 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3744 DstPtrInfo); 3745 if (Result.getNode()) 3746 return Result; 3747 3748 // Emit a library call. 3749 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3750 TargetLowering::ArgListTy Args; 3751 TargetLowering::ArgListEntry Entry; 3752 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3753 Args.push_back(Entry); 3754 // Extend or truncate the argument to be an i32 value for the call. 3755 if (Src.getValueType().bitsGT(MVT::i32)) 3756 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3757 else 3758 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3759 Entry.Node = Src; 3760 Entry.Ty = Type::getInt32Ty(*getContext()); 3761 Entry.isSExt = true; 3762 Args.push_back(Entry); 3763 Entry.Node = Size; 3764 Entry.Ty = IntPtrTy; 3765 Entry.isSExt = false; 3766 Args.push_back(Entry); 3767 // FIXME: pass in DebugLoc 3768 std::pair<SDValue,SDValue> CallResult = 3769 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3770 false, false, false, false, 0, 3771 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3772 /*isReturnValueUsed=*/false, 3773 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3774 TLI.getPointerTy()), 3775 Args, *this, dl); 3776 return CallResult.second; 3777} 3778 3779SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3780 SDValue Chain, SDValue Ptr, SDValue Cmp, 3781 SDValue Swp, MachinePointerInfo PtrInfo, 3782 unsigned Alignment) { 3783 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3784 Alignment = getEVTAlignment(MemVT); 3785 3786 MachineFunction &MF = getMachineFunction(); 3787 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3788 3789 // For now, atomics are considered to be volatile always. 3790 Flags |= MachineMemOperand::MOVolatile; 3791 3792 MachineMemOperand *MMO = 3793 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3794 3795 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3796} 3797 3798SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3799 SDValue Chain, 3800 SDValue Ptr, SDValue Cmp, 3801 SDValue Swp, MachineMemOperand *MMO) { 3802 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3803 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3804 3805 EVT VT = Cmp.getValueType(); 3806 3807 SDVTList VTs = getVTList(VT, MVT::Other); 3808 FoldingSetNodeID ID; 3809 ID.AddInteger(MemVT.getRawBits()); 3810 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3811 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3812 void* IP = 0; 3813 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3814 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3815 return SDValue(E, 0); 3816 } 3817 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3818 Ptr, Cmp, Swp, MMO); 3819 CSEMap.InsertNode(N, IP); 3820 AllNodes.push_back(N); 3821 return SDValue(N, 0); 3822} 3823 3824SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3825 SDValue Chain, 3826 SDValue Ptr, SDValue Val, 3827 const Value* PtrVal, 3828 unsigned Alignment) { 3829 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3830 Alignment = getEVTAlignment(MemVT); 3831 3832 MachineFunction &MF = getMachineFunction(); 3833 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3834 3835 // For now, atomics are considered to be volatile always. 3836 Flags |= MachineMemOperand::MOVolatile; 3837 3838 MachineMemOperand *MMO = 3839 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3840 MemVT.getStoreSize(), Alignment); 3841 3842 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3843} 3844 3845SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3846 SDValue Chain, 3847 SDValue Ptr, SDValue Val, 3848 MachineMemOperand *MMO) { 3849 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3850 Opcode == ISD::ATOMIC_LOAD_SUB || 3851 Opcode == ISD::ATOMIC_LOAD_AND || 3852 Opcode == ISD::ATOMIC_LOAD_OR || 3853 Opcode == ISD::ATOMIC_LOAD_XOR || 3854 Opcode == ISD::ATOMIC_LOAD_NAND || 3855 Opcode == ISD::ATOMIC_LOAD_MIN || 3856 Opcode == ISD::ATOMIC_LOAD_MAX || 3857 Opcode == ISD::ATOMIC_LOAD_UMIN || 3858 Opcode == ISD::ATOMIC_LOAD_UMAX || 3859 Opcode == ISD::ATOMIC_SWAP) && 3860 "Invalid Atomic Op"); 3861 3862 EVT VT = Val.getValueType(); 3863 3864 SDVTList VTs = getVTList(VT, MVT::Other); 3865 FoldingSetNodeID ID; 3866 ID.AddInteger(MemVT.getRawBits()); 3867 SDValue Ops[] = {Chain, Ptr, Val}; 3868 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3869 void* IP = 0; 3870 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3871 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3872 return SDValue(E, 0); 3873 } 3874 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3875 Ptr, Val, MMO); 3876 CSEMap.InsertNode(N, IP); 3877 AllNodes.push_back(N); 3878 return SDValue(N, 0); 3879} 3880 3881/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3882/// Allowed to return something different (and simpler) if Simplify is true. 3883SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3884 DebugLoc dl) { 3885 if (NumOps == 1) 3886 return Ops[0]; 3887 3888 SmallVector<EVT, 4> VTs; 3889 VTs.reserve(NumOps); 3890 for (unsigned i = 0; i < NumOps; ++i) 3891 VTs.push_back(Ops[i].getValueType()); 3892 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3893 Ops, NumOps); 3894} 3895 3896SDValue 3897SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3898 const EVT *VTs, unsigned NumVTs, 3899 const SDValue *Ops, unsigned NumOps, 3900 EVT MemVT, MachinePointerInfo PtrInfo, 3901 unsigned Align, bool Vol, 3902 bool ReadMem, bool WriteMem) { 3903 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3904 MemVT, PtrInfo, Align, Vol, 3905 ReadMem, WriteMem); 3906} 3907 3908SDValue 3909SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3910 const SDValue *Ops, unsigned NumOps, 3911 EVT MemVT, MachinePointerInfo PtrInfo, 3912 unsigned Align, bool Vol, 3913 bool ReadMem, bool WriteMem) { 3914 if (Align == 0) // Ensure that codegen never sees alignment 0 3915 Align = getEVTAlignment(MemVT); 3916 3917 MachineFunction &MF = getMachineFunction(); 3918 unsigned Flags = 0; 3919 if (WriteMem) 3920 Flags |= MachineMemOperand::MOStore; 3921 if (ReadMem) 3922 Flags |= MachineMemOperand::MOLoad; 3923 if (Vol) 3924 Flags |= MachineMemOperand::MOVolatile; 3925 MachineMemOperand *MMO = 3926 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 3927 3928 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3929} 3930 3931SDValue 3932SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3933 const SDValue *Ops, unsigned NumOps, 3934 EVT MemVT, MachineMemOperand *MMO) { 3935 assert((Opcode == ISD::INTRINSIC_VOID || 3936 Opcode == ISD::INTRINSIC_W_CHAIN || 3937 Opcode == ISD::PREFETCH || 3938 (Opcode <= INT_MAX && 3939 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3940 "Opcode is not a memory-accessing opcode!"); 3941 3942 // Memoize the node unless it returns a flag. 3943 MemIntrinsicSDNode *N; 3944 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 3945 FoldingSetNodeID ID; 3946 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3947 void *IP = 0; 3948 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3949 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3950 return SDValue(E, 0); 3951 } 3952 3953 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3954 MemVT, MMO); 3955 CSEMap.InsertNode(N, IP); 3956 } else { 3957 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3958 MemVT, MMO); 3959 } 3960 AllNodes.push_back(N); 3961 return SDValue(N, 0); 3962} 3963 3964/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 3965/// MachinePointerInfo record from it. This is particularly useful because the 3966/// code generator has many cases where it doesn't bother passing in a 3967/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 3968static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 3969 // If this is FI+Offset, we can model it. 3970 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 3971 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 3972 3973 // If this is (FI+Offset1)+Offset2, we can model it. 3974 if (Ptr.getOpcode() != ISD::ADD || 3975 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 3976 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 3977 return MachinePointerInfo(); 3978 3979 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 3980 return MachinePointerInfo::getFixedStack(FI, Offset+ 3981 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 3982} 3983 3984/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 3985/// MachinePointerInfo record from it. This is particularly useful because the 3986/// code generator has many cases where it doesn't bother passing in a 3987/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 3988static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 3989 // If the 'Offset' value isn't a constant, we can't handle this. 3990 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 3991 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 3992 if (OffsetOp.getOpcode() == ISD::UNDEF) 3993 return InferPointerInfo(Ptr); 3994 return MachinePointerInfo(); 3995} 3996 3997 3998SDValue 3999SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4000 EVT VT, DebugLoc dl, SDValue Chain, 4001 SDValue Ptr, SDValue Offset, 4002 MachinePointerInfo PtrInfo, EVT MemVT, 4003 bool isVolatile, bool isNonTemporal, 4004 unsigned Alignment, const MDNode *TBAAInfo) { 4005 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4006 Alignment = getEVTAlignment(VT); 4007 4008 unsigned Flags = MachineMemOperand::MOLoad; 4009 if (isVolatile) 4010 Flags |= MachineMemOperand::MOVolatile; 4011 if (isNonTemporal) 4012 Flags |= MachineMemOperand::MONonTemporal; 4013 4014 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4015 // clients. 4016 if (PtrInfo.V == 0) 4017 PtrInfo = InferPointerInfo(Ptr, Offset); 4018 4019 MachineFunction &MF = getMachineFunction(); 4020 MachineMemOperand *MMO = 4021 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4022 TBAAInfo); 4023 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4024} 4025 4026SDValue 4027SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4028 EVT VT, DebugLoc dl, SDValue Chain, 4029 SDValue Ptr, SDValue Offset, EVT MemVT, 4030 MachineMemOperand *MMO) { 4031 if (VT == MemVT) { 4032 ExtType = ISD::NON_EXTLOAD; 4033 } else if (ExtType == ISD::NON_EXTLOAD) { 4034 assert(VT == MemVT && "Non-extending load from different memory type!"); 4035 } else { 4036 // Extending load. 4037 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4038 "Should only be an extending load, not truncating!"); 4039 assert(VT.isInteger() == MemVT.isInteger() && 4040 "Cannot convert from FP to Int or Int -> FP!"); 4041 assert(VT.isVector() == MemVT.isVector() && 4042 "Cannot use trunc store to convert to or from a vector!"); 4043 assert((!VT.isVector() || 4044 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4045 "Cannot use trunc store to change the number of vector elements!"); 4046 } 4047 4048 bool Indexed = AM != ISD::UNINDEXED; 4049 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4050 "Unindexed load with an offset!"); 4051 4052 SDVTList VTs = Indexed ? 4053 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4054 SDValue Ops[] = { Chain, Ptr, Offset }; 4055 FoldingSetNodeID ID; 4056 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4057 ID.AddInteger(MemVT.getRawBits()); 4058 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4059 MMO->isNonTemporal())); 4060 void *IP = 0; 4061 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4062 cast<LoadSDNode>(E)->refineAlignment(MMO); 4063 return SDValue(E, 0); 4064 } 4065 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4066 MemVT, MMO); 4067 CSEMap.InsertNode(N, IP); 4068 AllNodes.push_back(N); 4069 return SDValue(N, 0); 4070} 4071 4072SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4073 SDValue Chain, SDValue Ptr, 4074 MachinePointerInfo PtrInfo, 4075 bool isVolatile, bool isNonTemporal, 4076 unsigned Alignment, const MDNode *TBAAInfo) { 4077 SDValue Undef = getUNDEF(Ptr.getValueType()); 4078 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4079 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 4080} 4081 4082SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl, 4083 SDValue Chain, SDValue Ptr, 4084 MachinePointerInfo PtrInfo, EVT MemVT, 4085 bool isVolatile, bool isNonTemporal, 4086 unsigned Alignment, const MDNode *TBAAInfo) { 4087 SDValue Undef = getUNDEF(Ptr.getValueType()); 4088 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4089 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment, 4090 TBAAInfo); 4091} 4092 4093 4094SDValue 4095SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4096 SDValue Offset, ISD::MemIndexedMode AM) { 4097 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4098 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4099 "Load is already a indexed load!"); 4100 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4101 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4102 LD->getMemoryVT(), 4103 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4104} 4105 4106SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4107 SDValue Ptr, MachinePointerInfo PtrInfo, 4108 bool isVolatile, bool isNonTemporal, 4109 unsigned Alignment, const MDNode *TBAAInfo) { 4110 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4111 Alignment = getEVTAlignment(Val.getValueType()); 4112 4113 unsigned Flags = MachineMemOperand::MOStore; 4114 if (isVolatile) 4115 Flags |= MachineMemOperand::MOVolatile; 4116 if (isNonTemporal) 4117 Flags |= MachineMemOperand::MONonTemporal; 4118 4119 if (PtrInfo.V == 0) 4120 PtrInfo = InferPointerInfo(Ptr); 4121 4122 MachineFunction &MF = getMachineFunction(); 4123 MachineMemOperand *MMO = 4124 MF.getMachineMemOperand(PtrInfo, Flags, 4125 Val.getValueType().getStoreSize(), Alignment, 4126 TBAAInfo); 4127 4128 return getStore(Chain, dl, Val, Ptr, MMO); 4129} 4130 4131SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4132 SDValue Ptr, MachineMemOperand *MMO) { 4133 EVT VT = Val.getValueType(); 4134 SDVTList VTs = getVTList(MVT::Other); 4135 SDValue Undef = getUNDEF(Ptr.getValueType()); 4136 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4137 FoldingSetNodeID ID; 4138 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4139 ID.AddInteger(VT.getRawBits()); 4140 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4141 MMO->isNonTemporal())); 4142 void *IP = 0; 4143 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4144 cast<StoreSDNode>(E)->refineAlignment(MMO); 4145 return SDValue(E, 0); 4146 } 4147 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4148 false, VT, MMO); 4149 CSEMap.InsertNode(N, IP); 4150 AllNodes.push_back(N); 4151 return SDValue(N, 0); 4152} 4153 4154SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4155 SDValue Ptr, MachinePointerInfo PtrInfo, 4156 EVT SVT,bool isVolatile, bool isNonTemporal, 4157 unsigned Alignment, 4158 const MDNode *TBAAInfo) { 4159 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4160 Alignment = getEVTAlignment(SVT); 4161 4162 unsigned Flags = MachineMemOperand::MOStore; 4163 if (isVolatile) 4164 Flags |= MachineMemOperand::MOVolatile; 4165 if (isNonTemporal) 4166 Flags |= MachineMemOperand::MONonTemporal; 4167 4168 if (PtrInfo.V == 0) 4169 PtrInfo = InferPointerInfo(Ptr); 4170 4171 MachineFunction &MF = getMachineFunction(); 4172 MachineMemOperand *MMO = 4173 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4174 TBAAInfo); 4175 4176 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4177} 4178 4179SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4180 SDValue Ptr, EVT SVT, 4181 MachineMemOperand *MMO) { 4182 EVT VT = Val.getValueType(); 4183 4184 if (VT == SVT) 4185 return getStore(Chain, dl, Val, Ptr, MMO); 4186 4187 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4188 "Should only be a truncating store, not extending!"); 4189 assert(VT.isInteger() == SVT.isInteger() && 4190 "Can't do FP-INT conversion!"); 4191 assert(VT.isVector() == SVT.isVector() && 4192 "Cannot use trunc store to convert to or from a vector!"); 4193 assert((!VT.isVector() || 4194 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4195 "Cannot use trunc store to change the number of vector elements!"); 4196 4197 SDVTList VTs = getVTList(MVT::Other); 4198 SDValue Undef = getUNDEF(Ptr.getValueType()); 4199 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4200 FoldingSetNodeID ID; 4201 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4202 ID.AddInteger(SVT.getRawBits()); 4203 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4204 MMO->isNonTemporal())); 4205 void *IP = 0; 4206 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4207 cast<StoreSDNode>(E)->refineAlignment(MMO); 4208 return SDValue(E, 0); 4209 } 4210 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4211 true, SVT, MMO); 4212 CSEMap.InsertNode(N, IP); 4213 AllNodes.push_back(N); 4214 return SDValue(N, 0); 4215} 4216 4217SDValue 4218SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4219 SDValue Offset, ISD::MemIndexedMode AM) { 4220 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4221 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4222 "Store is already a indexed store!"); 4223 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4224 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4225 FoldingSetNodeID ID; 4226 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4227 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4228 ID.AddInteger(ST->getRawSubclassData()); 4229 void *IP = 0; 4230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4231 return SDValue(E, 0); 4232 4233 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4234 ST->isTruncatingStore(), 4235 ST->getMemoryVT(), 4236 ST->getMemOperand()); 4237 CSEMap.InsertNode(N, IP); 4238 AllNodes.push_back(N); 4239 return SDValue(N, 0); 4240} 4241 4242SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4243 SDValue Chain, SDValue Ptr, 4244 SDValue SV, 4245 unsigned Align) { 4246 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4247 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4248} 4249 4250SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4251 const SDUse *Ops, unsigned NumOps) { 4252 switch (NumOps) { 4253 case 0: return getNode(Opcode, DL, VT); 4254 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4255 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4256 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4257 default: break; 4258 } 4259 4260 // Copy from an SDUse array into an SDValue array for use with 4261 // the regular getNode logic. 4262 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4263 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4264} 4265 4266SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4267 const SDValue *Ops, unsigned NumOps) { 4268 switch (NumOps) { 4269 case 0: return getNode(Opcode, DL, VT); 4270 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4271 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4272 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4273 default: break; 4274 } 4275 4276 switch (Opcode) { 4277 default: break; 4278 case ISD::SELECT_CC: { 4279 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4280 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4281 "LHS and RHS of condition must have same type!"); 4282 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4283 "True and False arms of SelectCC must have same type!"); 4284 assert(Ops[2].getValueType() == VT && 4285 "select_cc node must be of same type as true and false value!"); 4286 break; 4287 } 4288 case ISD::BR_CC: { 4289 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4290 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4291 "LHS/RHS of comparison should match types!"); 4292 break; 4293 } 4294 } 4295 4296 // Memoize nodes. 4297 SDNode *N; 4298 SDVTList VTs = getVTList(VT); 4299 4300 if (VT != MVT::Glue) { 4301 FoldingSetNodeID ID; 4302 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4303 void *IP = 0; 4304 4305 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4306 return SDValue(E, 0); 4307 4308 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4309 CSEMap.InsertNode(N, IP); 4310 } else { 4311 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4312 } 4313 4314 AllNodes.push_back(N); 4315#ifndef NDEBUG 4316 VerifySDNode(N); 4317#endif 4318 return SDValue(N, 0); 4319} 4320 4321SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4322 const std::vector<EVT> &ResultTys, 4323 const SDValue *Ops, unsigned NumOps) { 4324 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4325 Ops, NumOps); 4326} 4327 4328SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4329 const EVT *VTs, unsigned NumVTs, 4330 const SDValue *Ops, unsigned NumOps) { 4331 if (NumVTs == 1) 4332 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4333 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4334} 4335 4336SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4337 const SDValue *Ops, unsigned NumOps) { 4338 if (VTList.NumVTs == 1) 4339 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4340 4341#if 0 4342 switch (Opcode) { 4343 // FIXME: figure out how to safely handle things like 4344 // int foo(int x) { return 1 << (x & 255); } 4345 // int bar() { return foo(256); } 4346 case ISD::SRA_PARTS: 4347 case ISD::SRL_PARTS: 4348 case ISD::SHL_PARTS: 4349 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4350 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4351 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4352 else if (N3.getOpcode() == ISD::AND) 4353 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4354 // If the and is only masking out bits that cannot effect the shift, 4355 // eliminate the and. 4356 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4357 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4358 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4359 } 4360 break; 4361 } 4362#endif 4363 4364 // Memoize the node unless it returns a flag. 4365 SDNode *N; 4366 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4367 FoldingSetNodeID ID; 4368 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4369 void *IP = 0; 4370 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4371 return SDValue(E, 0); 4372 4373 if (NumOps == 1) { 4374 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4375 } else if (NumOps == 2) { 4376 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4377 } else if (NumOps == 3) { 4378 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4379 Ops[2]); 4380 } else { 4381 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4382 } 4383 CSEMap.InsertNode(N, IP); 4384 } else { 4385 if (NumOps == 1) { 4386 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4387 } else if (NumOps == 2) { 4388 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4389 } else if (NumOps == 3) { 4390 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4391 Ops[2]); 4392 } else { 4393 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4394 } 4395 } 4396 AllNodes.push_back(N); 4397#ifndef NDEBUG 4398 VerifySDNode(N); 4399#endif 4400 return SDValue(N, 0); 4401} 4402 4403SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4404 return getNode(Opcode, DL, VTList, 0, 0); 4405} 4406 4407SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4408 SDValue N1) { 4409 SDValue Ops[] = { N1 }; 4410 return getNode(Opcode, DL, VTList, Ops, 1); 4411} 4412 4413SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4414 SDValue N1, SDValue N2) { 4415 SDValue Ops[] = { N1, N2 }; 4416 return getNode(Opcode, DL, VTList, Ops, 2); 4417} 4418 4419SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4420 SDValue N1, SDValue N2, SDValue N3) { 4421 SDValue Ops[] = { N1, N2, N3 }; 4422 return getNode(Opcode, DL, VTList, Ops, 3); 4423} 4424 4425SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4426 SDValue N1, SDValue N2, SDValue N3, 4427 SDValue N4) { 4428 SDValue Ops[] = { N1, N2, N3, N4 }; 4429 return getNode(Opcode, DL, VTList, Ops, 4); 4430} 4431 4432SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4433 SDValue N1, SDValue N2, SDValue N3, 4434 SDValue N4, SDValue N5) { 4435 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4436 return getNode(Opcode, DL, VTList, Ops, 5); 4437} 4438 4439SDVTList SelectionDAG::getVTList(EVT VT) { 4440 return makeVTList(SDNode::getValueTypeList(VT), 1); 4441} 4442 4443SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4444 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4445 E = VTList.rend(); I != E; ++I) 4446 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4447 return *I; 4448 4449 EVT *Array = Allocator.Allocate<EVT>(2); 4450 Array[0] = VT1; 4451 Array[1] = VT2; 4452 SDVTList Result = makeVTList(Array, 2); 4453 VTList.push_back(Result); 4454 return Result; 4455} 4456 4457SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4458 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4459 E = VTList.rend(); I != E; ++I) 4460 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4461 I->VTs[2] == VT3) 4462 return *I; 4463 4464 EVT *Array = Allocator.Allocate<EVT>(3); 4465 Array[0] = VT1; 4466 Array[1] = VT2; 4467 Array[2] = VT3; 4468 SDVTList Result = makeVTList(Array, 3); 4469 VTList.push_back(Result); 4470 return Result; 4471} 4472 4473SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4474 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4475 E = VTList.rend(); I != E; ++I) 4476 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4477 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4478 return *I; 4479 4480 EVT *Array = Allocator.Allocate<EVT>(4); 4481 Array[0] = VT1; 4482 Array[1] = VT2; 4483 Array[2] = VT3; 4484 Array[3] = VT4; 4485 SDVTList Result = makeVTList(Array, 4); 4486 VTList.push_back(Result); 4487 return Result; 4488} 4489 4490SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4491 switch (NumVTs) { 4492 case 0: llvm_unreachable("Cannot have nodes without results!"); 4493 case 1: return getVTList(VTs[0]); 4494 case 2: return getVTList(VTs[0], VTs[1]); 4495 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4496 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4497 default: break; 4498 } 4499 4500 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4501 E = VTList.rend(); I != E; ++I) { 4502 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4503 continue; 4504 4505 bool NoMatch = false; 4506 for (unsigned i = 2; i != NumVTs; ++i) 4507 if (VTs[i] != I->VTs[i]) { 4508 NoMatch = true; 4509 break; 4510 } 4511 if (!NoMatch) 4512 return *I; 4513 } 4514 4515 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4516 std::copy(VTs, VTs+NumVTs, Array); 4517 SDVTList Result = makeVTList(Array, NumVTs); 4518 VTList.push_back(Result); 4519 return Result; 4520} 4521 4522 4523/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4524/// specified operands. If the resultant node already exists in the DAG, 4525/// this does not modify the specified node, instead it returns the node that 4526/// already exists. If the resultant node does not exist in the DAG, the 4527/// input node is returned. As a degenerate case, if you specify the same 4528/// input operands as the node already has, the input node is returned. 4529SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4530 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4531 4532 // Check to see if there is no change. 4533 if (Op == N->getOperand(0)) return N; 4534 4535 // See if the modified node already exists. 4536 void *InsertPos = 0; 4537 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4538 return Existing; 4539 4540 // Nope it doesn't. Remove the node from its current place in the maps. 4541 if (InsertPos) 4542 if (!RemoveNodeFromCSEMaps(N)) 4543 InsertPos = 0; 4544 4545 // Now we update the operands. 4546 N->OperandList[0].set(Op); 4547 4548 // If this gets put into a CSE map, add it. 4549 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4550 return N; 4551} 4552 4553SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4554 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4555 4556 // Check to see if there is no change. 4557 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4558 return N; // No operands changed, just return the input node. 4559 4560 // See if the modified node already exists. 4561 void *InsertPos = 0; 4562 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4563 return Existing; 4564 4565 // Nope it doesn't. Remove the node from its current place in the maps. 4566 if (InsertPos) 4567 if (!RemoveNodeFromCSEMaps(N)) 4568 InsertPos = 0; 4569 4570 // Now we update the operands. 4571 if (N->OperandList[0] != Op1) 4572 N->OperandList[0].set(Op1); 4573 if (N->OperandList[1] != Op2) 4574 N->OperandList[1].set(Op2); 4575 4576 // If this gets put into a CSE map, add it. 4577 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4578 return N; 4579} 4580 4581SDNode *SelectionDAG:: 4582UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4583 SDValue Ops[] = { Op1, Op2, Op3 }; 4584 return UpdateNodeOperands(N, Ops, 3); 4585} 4586 4587SDNode *SelectionDAG:: 4588UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4589 SDValue Op3, SDValue Op4) { 4590 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4591 return UpdateNodeOperands(N, Ops, 4); 4592} 4593 4594SDNode *SelectionDAG:: 4595UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4596 SDValue Op3, SDValue Op4, SDValue Op5) { 4597 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4598 return UpdateNodeOperands(N, Ops, 5); 4599} 4600 4601SDNode *SelectionDAG:: 4602UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4603 assert(N->getNumOperands() == NumOps && 4604 "Update with wrong number of operands"); 4605 4606 // Check to see if there is no change. 4607 bool AnyChange = false; 4608 for (unsigned i = 0; i != NumOps; ++i) { 4609 if (Ops[i] != N->getOperand(i)) { 4610 AnyChange = true; 4611 break; 4612 } 4613 } 4614 4615 // No operands changed, just return the input node. 4616 if (!AnyChange) return N; 4617 4618 // See if the modified node already exists. 4619 void *InsertPos = 0; 4620 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4621 return Existing; 4622 4623 // Nope it doesn't. Remove the node from its current place in the maps. 4624 if (InsertPos) 4625 if (!RemoveNodeFromCSEMaps(N)) 4626 InsertPos = 0; 4627 4628 // Now we update the operands. 4629 for (unsigned i = 0; i != NumOps; ++i) 4630 if (N->OperandList[i] != Ops[i]) 4631 N->OperandList[i].set(Ops[i]); 4632 4633 // If this gets put into a CSE map, add it. 4634 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4635 return N; 4636} 4637 4638/// DropOperands - Release the operands and set this node to have 4639/// zero operands. 4640void SDNode::DropOperands() { 4641 // Unlike the code in MorphNodeTo that does this, we don't need to 4642 // watch for dead nodes here. 4643 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4644 SDUse &Use = *I++; 4645 Use.set(SDValue()); 4646 } 4647} 4648 4649/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4650/// machine opcode. 4651/// 4652SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4653 EVT VT) { 4654 SDVTList VTs = getVTList(VT); 4655 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4656} 4657 4658SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4659 EVT VT, SDValue Op1) { 4660 SDVTList VTs = getVTList(VT); 4661 SDValue Ops[] = { Op1 }; 4662 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4663} 4664 4665SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4666 EVT VT, SDValue Op1, 4667 SDValue Op2) { 4668 SDVTList VTs = getVTList(VT); 4669 SDValue Ops[] = { Op1, Op2 }; 4670 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4671} 4672 4673SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4674 EVT VT, SDValue Op1, 4675 SDValue Op2, SDValue Op3) { 4676 SDVTList VTs = getVTList(VT); 4677 SDValue Ops[] = { Op1, Op2, Op3 }; 4678 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4679} 4680 4681SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4682 EVT VT, const SDValue *Ops, 4683 unsigned NumOps) { 4684 SDVTList VTs = getVTList(VT); 4685 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4686} 4687 4688SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4689 EVT VT1, EVT VT2, const SDValue *Ops, 4690 unsigned NumOps) { 4691 SDVTList VTs = getVTList(VT1, VT2); 4692 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4693} 4694 4695SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4696 EVT VT1, EVT VT2) { 4697 SDVTList VTs = getVTList(VT1, VT2); 4698 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4699} 4700 4701SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4702 EVT VT1, EVT VT2, EVT VT3, 4703 const SDValue *Ops, unsigned NumOps) { 4704 SDVTList VTs = getVTList(VT1, VT2, VT3); 4705 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4706} 4707 4708SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4709 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4710 const SDValue *Ops, unsigned NumOps) { 4711 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4712 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4713} 4714 4715SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4716 EVT VT1, EVT VT2, 4717 SDValue Op1) { 4718 SDVTList VTs = getVTList(VT1, VT2); 4719 SDValue Ops[] = { Op1 }; 4720 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4721} 4722 4723SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4724 EVT VT1, EVT VT2, 4725 SDValue Op1, SDValue Op2) { 4726 SDVTList VTs = getVTList(VT1, VT2); 4727 SDValue Ops[] = { Op1, Op2 }; 4728 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4729} 4730 4731SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4732 EVT VT1, EVT VT2, 4733 SDValue Op1, SDValue Op2, 4734 SDValue Op3) { 4735 SDVTList VTs = getVTList(VT1, VT2); 4736 SDValue Ops[] = { Op1, Op2, Op3 }; 4737 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4738} 4739 4740SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4741 EVT VT1, EVT VT2, EVT VT3, 4742 SDValue Op1, SDValue Op2, 4743 SDValue Op3) { 4744 SDVTList VTs = getVTList(VT1, VT2, VT3); 4745 SDValue Ops[] = { Op1, Op2, Op3 }; 4746 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4747} 4748 4749SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4750 SDVTList VTs, const SDValue *Ops, 4751 unsigned NumOps) { 4752 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4753 // Reset the NodeID to -1. 4754 N->setNodeId(-1); 4755 return N; 4756} 4757 4758/// MorphNodeTo - This *mutates* the specified node to have the specified 4759/// return type, opcode, and operands. 4760/// 4761/// Note that MorphNodeTo returns the resultant node. If there is already a 4762/// node of the specified opcode and operands, it returns that node instead of 4763/// the current one. Note that the DebugLoc need not be the same. 4764/// 4765/// Using MorphNodeTo is faster than creating a new node and swapping it in 4766/// with ReplaceAllUsesWith both because it often avoids allocating a new 4767/// node, and because it doesn't require CSE recalculation for any of 4768/// the node's users. 4769/// 4770SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4771 SDVTList VTs, const SDValue *Ops, 4772 unsigned NumOps) { 4773 // If an identical node already exists, use it. 4774 void *IP = 0; 4775 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4776 FoldingSetNodeID ID; 4777 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4778 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4779 return ON; 4780 } 4781 4782 if (!RemoveNodeFromCSEMaps(N)) 4783 IP = 0; 4784 4785 // Start the morphing. 4786 N->NodeType = Opc; 4787 N->ValueList = VTs.VTs; 4788 N->NumValues = VTs.NumVTs; 4789 4790 // Clear the operands list, updating used nodes to remove this from their 4791 // use list. Keep track of any operands that become dead as a result. 4792 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4793 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4794 SDUse &Use = *I++; 4795 SDNode *Used = Use.getNode(); 4796 Use.set(SDValue()); 4797 if (Used->use_empty()) 4798 DeadNodeSet.insert(Used); 4799 } 4800 4801 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4802 // Initialize the memory references information. 4803 MN->setMemRefs(0, 0); 4804 // If NumOps is larger than the # of operands we can have in a 4805 // MachineSDNode, reallocate the operand list. 4806 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4807 if (MN->OperandsNeedDelete) 4808 delete[] MN->OperandList; 4809 if (NumOps > array_lengthof(MN->LocalOperands)) 4810 // We're creating a final node that will live unmorphed for the 4811 // remainder of the current SelectionDAG iteration, so we can allocate 4812 // the operands directly out of a pool with no recycling metadata. 4813 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4814 Ops, NumOps); 4815 else 4816 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4817 MN->OperandsNeedDelete = false; 4818 } else 4819 MN->InitOperands(MN->OperandList, Ops, NumOps); 4820 } else { 4821 // If NumOps is larger than the # of operands we currently have, reallocate 4822 // the operand list. 4823 if (NumOps > N->NumOperands) { 4824 if (N->OperandsNeedDelete) 4825 delete[] N->OperandList; 4826 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4827 N->OperandsNeedDelete = true; 4828 } else 4829 N->InitOperands(N->OperandList, Ops, NumOps); 4830 } 4831 4832 // Delete any nodes that are still dead after adding the uses for the 4833 // new operands. 4834 if (!DeadNodeSet.empty()) { 4835 SmallVector<SDNode *, 16> DeadNodes; 4836 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4837 E = DeadNodeSet.end(); I != E; ++I) 4838 if ((*I)->use_empty()) 4839 DeadNodes.push_back(*I); 4840 RemoveDeadNodes(DeadNodes); 4841 } 4842 4843 if (IP) 4844 CSEMap.InsertNode(N, IP); // Memoize the new node. 4845 return N; 4846} 4847 4848 4849/// getMachineNode - These are used for target selectors to create a new node 4850/// with specified return type(s), MachineInstr opcode, and operands. 4851/// 4852/// Note that getMachineNode returns the resultant node. If there is already a 4853/// node of the specified opcode and operands, it returns that node instead of 4854/// the current one. 4855MachineSDNode * 4856SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4857 SDVTList VTs = getVTList(VT); 4858 return getMachineNode(Opcode, dl, VTs, 0, 0); 4859} 4860 4861MachineSDNode * 4862SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4863 SDVTList VTs = getVTList(VT); 4864 SDValue Ops[] = { Op1 }; 4865 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4866} 4867 4868MachineSDNode * 4869SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4870 SDValue Op1, SDValue Op2) { 4871 SDVTList VTs = getVTList(VT); 4872 SDValue Ops[] = { Op1, Op2 }; 4873 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4874} 4875 4876MachineSDNode * 4877SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4878 SDValue Op1, SDValue Op2, SDValue Op3) { 4879 SDVTList VTs = getVTList(VT); 4880 SDValue Ops[] = { Op1, Op2, Op3 }; 4881 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4882} 4883 4884MachineSDNode * 4885SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4886 const SDValue *Ops, unsigned NumOps) { 4887 SDVTList VTs = getVTList(VT); 4888 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4889} 4890 4891MachineSDNode * 4892SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4893 SDVTList VTs = getVTList(VT1, VT2); 4894 return getMachineNode(Opcode, dl, VTs, 0, 0); 4895} 4896 4897MachineSDNode * 4898SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4899 EVT VT1, EVT VT2, SDValue Op1) { 4900 SDVTList VTs = getVTList(VT1, VT2); 4901 SDValue Ops[] = { Op1 }; 4902 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4903} 4904 4905MachineSDNode * 4906SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4907 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4908 SDVTList VTs = getVTList(VT1, VT2); 4909 SDValue Ops[] = { Op1, Op2 }; 4910 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4911} 4912 4913MachineSDNode * 4914SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4915 EVT VT1, EVT VT2, SDValue Op1, 4916 SDValue Op2, SDValue Op3) { 4917 SDVTList VTs = getVTList(VT1, VT2); 4918 SDValue Ops[] = { Op1, Op2, Op3 }; 4919 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4920} 4921 4922MachineSDNode * 4923SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4924 EVT VT1, EVT VT2, 4925 const SDValue *Ops, unsigned NumOps) { 4926 SDVTList VTs = getVTList(VT1, VT2); 4927 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4928} 4929 4930MachineSDNode * 4931SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4932 EVT VT1, EVT VT2, EVT VT3, 4933 SDValue Op1, SDValue Op2) { 4934 SDVTList VTs = getVTList(VT1, VT2, VT3); 4935 SDValue Ops[] = { Op1, Op2 }; 4936 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4937} 4938 4939MachineSDNode * 4940SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4941 EVT VT1, EVT VT2, EVT VT3, 4942 SDValue Op1, SDValue Op2, SDValue Op3) { 4943 SDVTList VTs = getVTList(VT1, VT2, VT3); 4944 SDValue Ops[] = { Op1, Op2, Op3 }; 4945 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4946} 4947 4948MachineSDNode * 4949SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4950 EVT VT1, EVT VT2, EVT VT3, 4951 const SDValue *Ops, unsigned NumOps) { 4952 SDVTList VTs = getVTList(VT1, VT2, VT3); 4953 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4954} 4955 4956MachineSDNode * 4957SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4958 EVT VT2, EVT VT3, EVT VT4, 4959 const SDValue *Ops, unsigned NumOps) { 4960 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4961 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4962} 4963 4964MachineSDNode * 4965SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4966 const std::vector<EVT> &ResultTys, 4967 const SDValue *Ops, unsigned NumOps) { 4968 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4969 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4970} 4971 4972MachineSDNode * 4973SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4974 const SDValue *Ops, unsigned NumOps) { 4975 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 4976 MachineSDNode *N; 4977 void *IP = 0; 4978 4979 if (DoCSE) { 4980 FoldingSetNodeID ID; 4981 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4982 IP = 0; 4983 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4984 return cast<MachineSDNode>(E); 4985 } 4986 4987 // Allocate a new MachineSDNode. 4988 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4989 4990 // Initialize the operands list. 4991 if (NumOps > array_lengthof(N->LocalOperands)) 4992 // We're creating a final node that will live unmorphed for the 4993 // remainder of the current SelectionDAG iteration, so we can allocate 4994 // the operands directly out of a pool with no recycling metadata. 4995 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4996 Ops, NumOps); 4997 else 4998 N->InitOperands(N->LocalOperands, Ops, NumOps); 4999 N->OperandsNeedDelete = false; 5000 5001 if (DoCSE) 5002 CSEMap.InsertNode(N, IP); 5003 5004 AllNodes.push_back(N); 5005#ifndef NDEBUG 5006 VerifyMachineNode(N); 5007#endif 5008 return N; 5009} 5010 5011/// getTargetExtractSubreg - A convenience function for creating 5012/// TargetOpcode::EXTRACT_SUBREG nodes. 5013SDValue 5014SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5015 SDValue Operand) { 5016 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5017 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5018 VT, Operand, SRIdxVal); 5019 return SDValue(Subreg, 0); 5020} 5021 5022/// getTargetInsertSubreg - A convenience function for creating 5023/// TargetOpcode::INSERT_SUBREG nodes. 5024SDValue 5025SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5026 SDValue Operand, SDValue Subreg) { 5027 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5028 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5029 VT, Operand, Subreg, SRIdxVal); 5030 return SDValue(Result, 0); 5031} 5032 5033/// getNodeIfExists - Get the specified node if it's already available, or 5034/// else return NULL. 5035SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5036 const SDValue *Ops, unsigned NumOps) { 5037 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5038 FoldingSetNodeID ID; 5039 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5040 void *IP = 0; 5041 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5042 return E; 5043 } 5044 return NULL; 5045} 5046 5047/// getDbgValue - Creates a SDDbgValue node. 5048/// 5049SDDbgValue * 5050SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5051 DebugLoc DL, unsigned O) { 5052 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5053} 5054 5055SDDbgValue * 5056SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5057 DebugLoc DL, unsigned O) { 5058 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5059} 5060 5061SDDbgValue * 5062SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5063 DebugLoc DL, unsigned O) { 5064 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5065} 5066 5067namespace { 5068 5069/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5070/// pointed to by a use iterator is deleted, increment the use iterator 5071/// so that it doesn't dangle. 5072/// 5073/// This class also manages a "downlink" DAGUpdateListener, to forward 5074/// messages to ReplaceAllUsesWith's callers. 5075/// 5076class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5077 SelectionDAG::DAGUpdateListener *DownLink; 5078 SDNode::use_iterator &UI; 5079 SDNode::use_iterator &UE; 5080 5081 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5082 // Increment the iterator as needed. 5083 while (UI != UE && N == *UI) 5084 ++UI; 5085 5086 // Then forward the message. 5087 if (DownLink) DownLink->NodeDeleted(N, E); 5088 } 5089 5090 virtual void NodeUpdated(SDNode *N) { 5091 // Just forward the message. 5092 if (DownLink) DownLink->NodeUpdated(N); 5093 } 5094 5095public: 5096 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5097 SDNode::use_iterator &ui, 5098 SDNode::use_iterator &ue) 5099 : DownLink(dl), UI(ui), UE(ue) {} 5100}; 5101 5102} 5103 5104/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5105/// This can cause recursive merging of nodes in the DAG. 5106/// 5107/// This version assumes From has a single result value. 5108/// 5109void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5110 DAGUpdateListener *UpdateListener) { 5111 SDNode *From = FromN.getNode(); 5112 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5113 "Cannot replace with this method!"); 5114 assert(From != To.getNode() && "Cannot replace uses of with self"); 5115 5116 // Iterate over all the existing uses of From. New uses will be added 5117 // to the beginning of the use list, which we avoid visiting. 5118 // This specifically avoids visiting uses of From that arise while the 5119 // replacement is happening, because any such uses would be the result 5120 // of CSE: If an existing node looks like From after one of its operands 5121 // is replaced by To, we don't want to replace of all its users with To 5122 // too. See PR3018 for more info. 5123 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5124 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5125 while (UI != UE) { 5126 SDNode *User = *UI; 5127 5128 // This node is about to morph, remove its old self from the CSE maps. 5129 RemoveNodeFromCSEMaps(User); 5130 5131 // A user can appear in a use list multiple times, and when this 5132 // happens the uses are usually next to each other in the list. 5133 // To help reduce the number of CSE recomputations, process all 5134 // the uses of this user that we can find this way. 5135 do { 5136 SDUse &Use = UI.getUse(); 5137 ++UI; 5138 Use.set(To); 5139 } while (UI != UE && *UI == User); 5140 5141 // Now that we have modified User, add it back to the CSE maps. If it 5142 // already exists there, recursively merge the results together. 5143 AddModifiedNodeToCSEMaps(User, &Listener); 5144 } 5145} 5146 5147/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5148/// This can cause recursive merging of nodes in the DAG. 5149/// 5150/// This version assumes that for each value of From, there is a 5151/// corresponding value in To in the same position with the same type. 5152/// 5153void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5154 DAGUpdateListener *UpdateListener) { 5155#ifndef NDEBUG 5156 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5157 assert((!From->hasAnyUseOfValue(i) || 5158 From->getValueType(i) == To->getValueType(i)) && 5159 "Cannot use this version of ReplaceAllUsesWith!"); 5160#endif 5161 5162 // Handle the trivial case. 5163 if (From == To) 5164 return; 5165 5166 // Iterate over just the existing users of From. See the comments in 5167 // the ReplaceAllUsesWith above. 5168 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5169 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5170 while (UI != UE) { 5171 SDNode *User = *UI; 5172 5173 // This node is about to morph, remove its old self from the CSE maps. 5174 RemoveNodeFromCSEMaps(User); 5175 5176 // A user can appear in a use list multiple times, and when this 5177 // happens the uses are usually next to each other in the list. 5178 // To help reduce the number of CSE recomputations, process all 5179 // the uses of this user that we can find this way. 5180 do { 5181 SDUse &Use = UI.getUse(); 5182 ++UI; 5183 Use.setNode(To); 5184 } while (UI != UE && *UI == User); 5185 5186 // Now that we have modified User, add it back to the CSE maps. If it 5187 // already exists there, recursively merge the results together. 5188 AddModifiedNodeToCSEMaps(User, &Listener); 5189 } 5190} 5191 5192/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5193/// This can cause recursive merging of nodes in the DAG. 5194/// 5195/// This version can replace From with any result values. To must match the 5196/// number and types of values returned by From. 5197void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5198 const SDValue *To, 5199 DAGUpdateListener *UpdateListener) { 5200 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5201 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5202 5203 // Iterate over just the existing users of From. See the comments in 5204 // the ReplaceAllUsesWith above. 5205 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5206 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5207 while (UI != UE) { 5208 SDNode *User = *UI; 5209 5210 // This node is about to morph, remove its old self from the CSE maps. 5211 RemoveNodeFromCSEMaps(User); 5212 5213 // A user can appear in a use list multiple times, and when this 5214 // happens the uses are usually next to each other in the list. 5215 // To help reduce the number of CSE recomputations, process all 5216 // the uses of this user that we can find this way. 5217 do { 5218 SDUse &Use = UI.getUse(); 5219 const SDValue &ToOp = To[Use.getResNo()]; 5220 ++UI; 5221 Use.set(ToOp); 5222 } while (UI != UE && *UI == User); 5223 5224 // Now that we have modified User, add it back to the CSE maps. If it 5225 // already exists there, recursively merge the results together. 5226 AddModifiedNodeToCSEMaps(User, &Listener); 5227 } 5228} 5229 5230/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5231/// uses of other values produced by From.getNode() alone. The Deleted 5232/// vector is handled the same way as for ReplaceAllUsesWith. 5233void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5234 DAGUpdateListener *UpdateListener){ 5235 // Handle the really simple, really trivial case efficiently. 5236 if (From == To) return; 5237 5238 // Handle the simple, trivial, case efficiently. 5239 if (From.getNode()->getNumValues() == 1) { 5240 ReplaceAllUsesWith(From, To, UpdateListener); 5241 return; 5242 } 5243 5244 // Iterate over just the existing users of From. See the comments in 5245 // the ReplaceAllUsesWith above. 5246 SDNode::use_iterator UI = From.getNode()->use_begin(), 5247 UE = From.getNode()->use_end(); 5248 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5249 while (UI != UE) { 5250 SDNode *User = *UI; 5251 bool UserRemovedFromCSEMaps = false; 5252 5253 // A user can appear in a use list multiple times, and when this 5254 // happens the uses are usually next to each other in the list. 5255 // To help reduce the number of CSE recomputations, process all 5256 // the uses of this user that we can find this way. 5257 do { 5258 SDUse &Use = UI.getUse(); 5259 5260 // Skip uses of different values from the same node. 5261 if (Use.getResNo() != From.getResNo()) { 5262 ++UI; 5263 continue; 5264 } 5265 5266 // If this node hasn't been modified yet, it's still in the CSE maps, 5267 // so remove its old self from the CSE maps. 5268 if (!UserRemovedFromCSEMaps) { 5269 RemoveNodeFromCSEMaps(User); 5270 UserRemovedFromCSEMaps = true; 5271 } 5272 5273 ++UI; 5274 Use.set(To); 5275 } while (UI != UE && *UI == User); 5276 5277 // We are iterating over all uses of the From node, so if a use 5278 // doesn't use the specific value, no changes are made. 5279 if (!UserRemovedFromCSEMaps) 5280 continue; 5281 5282 // Now that we have modified User, add it back to the CSE maps. If it 5283 // already exists there, recursively merge the results together. 5284 AddModifiedNodeToCSEMaps(User, &Listener); 5285 } 5286} 5287 5288namespace { 5289 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5290 /// to record information about a use. 5291 struct UseMemo { 5292 SDNode *User; 5293 unsigned Index; 5294 SDUse *Use; 5295 }; 5296 5297 /// operator< - Sort Memos by User. 5298 bool operator<(const UseMemo &L, const UseMemo &R) { 5299 return (intptr_t)L.User < (intptr_t)R.User; 5300 } 5301} 5302 5303/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5304/// uses of other values produced by From.getNode() alone. The same value 5305/// may appear in both the From and To list. The Deleted vector is 5306/// handled the same way as for ReplaceAllUsesWith. 5307void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5308 const SDValue *To, 5309 unsigned Num, 5310 DAGUpdateListener *UpdateListener){ 5311 // Handle the simple, trivial case efficiently. 5312 if (Num == 1) 5313 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5314 5315 // Read up all the uses and make records of them. This helps 5316 // processing new uses that are introduced during the 5317 // replacement process. 5318 SmallVector<UseMemo, 4> Uses; 5319 for (unsigned i = 0; i != Num; ++i) { 5320 unsigned FromResNo = From[i].getResNo(); 5321 SDNode *FromNode = From[i].getNode(); 5322 for (SDNode::use_iterator UI = FromNode->use_begin(), 5323 E = FromNode->use_end(); UI != E; ++UI) { 5324 SDUse &Use = UI.getUse(); 5325 if (Use.getResNo() == FromResNo) { 5326 UseMemo Memo = { *UI, i, &Use }; 5327 Uses.push_back(Memo); 5328 } 5329 } 5330 } 5331 5332 // Sort the uses, so that all the uses from a given User are together. 5333 std::sort(Uses.begin(), Uses.end()); 5334 5335 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5336 UseIndex != UseIndexEnd; ) { 5337 // We know that this user uses some value of From. If it is the right 5338 // value, update it. 5339 SDNode *User = Uses[UseIndex].User; 5340 5341 // This node is about to morph, remove its old self from the CSE maps. 5342 RemoveNodeFromCSEMaps(User); 5343 5344 // The Uses array is sorted, so all the uses for a given User 5345 // are next to each other in the list. 5346 // To help reduce the number of CSE recomputations, process all 5347 // the uses of this user that we can find this way. 5348 do { 5349 unsigned i = Uses[UseIndex].Index; 5350 SDUse &Use = *Uses[UseIndex].Use; 5351 ++UseIndex; 5352 5353 Use.set(To[i]); 5354 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5355 5356 // Now that we have modified User, add it back to the CSE maps. If it 5357 // already exists there, recursively merge the results together. 5358 AddModifiedNodeToCSEMaps(User, UpdateListener); 5359 } 5360} 5361 5362/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5363/// based on their topological order. It returns the maximum id and a vector 5364/// of the SDNodes* in assigned order by reference. 5365unsigned SelectionDAG::AssignTopologicalOrder() { 5366 5367 unsigned DAGSize = 0; 5368 5369 // SortedPos tracks the progress of the algorithm. Nodes before it are 5370 // sorted, nodes after it are unsorted. When the algorithm completes 5371 // it is at the end of the list. 5372 allnodes_iterator SortedPos = allnodes_begin(); 5373 5374 // Visit all the nodes. Move nodes with no operands to the front of 5375 // the list immediately. Annotate nodes that do have operands with their 5376 // operand count. Before we do this, the Node Id fields of the nodes 5377 // may contain arbitrary values. After, the Node Id fields for nodes 5378 // before SortedPos will contain the topological sort index, and the 5379 // Node Id fields for nodes At SortedPos and after will contain the 5380 // count of outstanding operands. 5381 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5382 SDNode *N = I++; 5383 checkForCycles(N); 5384 unsigned Degree = N->getNumOperands(); 5385 if (Degree == 0) { 5386 // A node with no uses, add it to the result array immediately. 5387 N->setNodeId(DAGSize++); 5388 allnodes_iterator Q = N; 5389 if (Q != SortedPos) 5390 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5391 assert(SortedPos != AllNodes.end() && "Overran node list"); 5392 ++SortedPos; 5393 } else { 5394 // Temporarily use the Node Id as scratch space for the degree count. 5395 N->setNodeId(Degree); 5396 } 5397 } 5398 5399 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5400 // such that by the time the end is reached all nodes will be sorted. 5401 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5402 SDNode *N = I; 5403 checkForCycles(N); 5404 // N is in sorted position, so all its uses have one less operand 5405 // that needs to be sorted. 5406 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5407 UI != UE; ++UI) { 5408 SDNode *P = *UI; 5409 unsigned Degree = P->getNodeId(); 5410 assert(Degree != 0 && "Invalid node degree"); 5411 --Degree; 5412 if (Degree == 0) { 5413 // All of P's operands are sorted, so P may sorted now. 5414 P->setNodeId(DAGSize++); 5415 if (P != SortedPos) 5416 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5417 assert(SortedPos != AllNodes.end() && "Overran node list"); 5418 ++SortedPos; 5419 } else { 5420 // Update P's outstanding operand count. 5421 P->setNodeId(Degree); 5422 } 5423 } 5424 if (I == SortedPos) { 5425#ifndef NDEBUG 5426 SDNode *S = ++I; 5427 dbgs() << "Overran sorted position:\n"; 5428 S->dumprFull(); 5429#endif 5430 llvm_unreachable(0); 5431 } 5432 } 5433 5434 assert(SortedPos == AllNodes.end() && 5435 "Topological sort incomplete!"); 5436 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5437 "First node in topological sort is not the entry token!"); 5438 assert(AllNodes.front().getNodeId() == 0 && 5439 "First node in topological sort has non-zero id!"); 5440 assert(AllNodes.front().getNumOperands() == 0 && 5441 "First node in topological sort has operands!"); 5442 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5443 "Last node in topologic sort has unexpected id!"); 5444 assert(AllNodes.back().use_empty() && 5445 "Last node in topologic sort has users!"); 5446 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5447 return DAGSize; 5448} 5449 5450/// AssignOrdering - Assign an order to the SDNode. 5451void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5452 assert(SD && "Trying to assign an order to a null node!"); 5453 Ordering->add(SD, Order); 5454} 5455 5456/// GetOrdering - Get the order for the SDNode. 5457unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5458 assert(SD && "Trying to get the order of a null node!"); 5459 return Ordering->getOrder(SD); 5460} 5461 5462/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5463/// value is produced by SD. 5464void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5465 DbgInfo->add(DB, SD, isParameter); 5466 if (SD) 5467 SD->setHasDebugValue(true); 5468} 5469 5470/// TransferDbgValues - Transfer SDDbgValues. 5471void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5472 if (From == To || !From.getNode()->getHasDebugValue()) 5473 return; 5474 SDNode *FromNode = From.getNode(); 5475 SDNode *ToNode = To.getNode(); 5476 SmallVector<SDDbgValue*,2> &DVs = GetDbgValues(FromNode); 5477 DbgInfo->removeSDDbgValues(FromNode); 5478 for (SmallVector<SDDbgValue *, 2>::iterator I = DVs.begin(), E = DVs.end(); 5479 I != E; ++I) { 5480 if ((*I)->getKind() == SDDbgValue::SDNODE) { 5481 AddDbgValue(*I, ToNode, false); 5482 (*I)->setSDNode(ToNode, To.getResNo()); 5483 } 5484 } 5485} 5486 5487//===----------------------------------------------------------------------===// 5488// SDNode Class 5489//===----------------------------------------------------------------------===// 5490 5491HandleSDNode::~HandleSDNode() { 5492 DropOperands(); 5493} 5494 5495GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5496 const GlobalValue *GA, 5497 EVT VT, int64_t o, unsigned char TF) 5498 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5499 TheGlobal = GA; 5500} 5501 5502MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5503 MachineMemOperand *mmo) 5504 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5505 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5506 MMO->isNonTemporal()); 5507 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5508 assert(isNonTemporal() == MMO->isNonTemporal() && 5509 "Non-temporal encoding error!"); 5510 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5511} 5512 5513MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5514 const SDValue *Ops, unsigned NumOps, EVT memvt, 5515 MachineMemOperand *mmo) 5516 : SDNode(Opc, dl, VTs, Ops, NumOps), 5517 MemoryVT(memvt), MMO(mmo) { 5518 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5519 MMO->isNonTemporal()); 5520 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5521 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5522} 5523 5524/// Profile - Gather unique data for the node. 5525/// 5526void SDNode::Profile(FoldingSetNodeID &ID) const { 5527 AddNodeIDNode(ID, this); 5528} 5529 5530namespace { 5531 struct EVTArray { 5532 std::vector<EVT> VTs; 5533 5534 EVTArray() { 5535 VTs.reserve(MVT::LAST_VALUETYPE); 5536 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5537 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5538 } 5539 }; 5540} 5541 5542static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5543static ManagedStatic<EVTArray> SimpleVTArray; 5544static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5545 5546/// getValueTypeList - Return a pointer to the specified value type. 5547/// 5548const EVT *SDNode::getValueTypeList(EVT VT) { 5549 if (VT.isExtended()) { 5550 sys::SmartScopedLock<true> Lock(*VTMutex); 5551 return &(*EVTs->insert(VT).first); 5552 } else { 5553 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5554 "Value type out of range!"); 5555 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5556 } 5557} 5558 5559/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5560/// indicated value. This method ignores uses of other values defined by this 5561/// operation. 5562bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5563 assert(Value < getNumValues() && "Bad value!"); 5564 5565 // TODO: Only iterate over uses of a given value of the node 5566 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5567 if (UI.getUse().getResNo() == Value) { 5568 if (NUses == 0) 5569 return false; 5570 --NUses; 5571 } 5572 } 5573 5574 // Found exactly the right number of uses? 5575 return NUses == 0; 5576} 5577 5578 5579/// hasAnyUseOfValue - Return true if there are any use of the indicated 5580/// value. This method ignores uses of other values defined by this operation. 5581bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5582 assert(Value < getNumValues() && "Bad value!"); 5583 5584 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5585 if (UI.getUse().getResNo() == Value) 5586 return true; 5587 5588 return false; 5589} 5590 5591 5592/// isOnlyUserOf - Return true if this node is the only use of N. 5593/// 5594bool SDNode::isOnlyUserOf(SDNode *N) const { 5595 bool Seen = false; 5596 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5597 SDNode *User = *I; 5598 if (User == this) 5599 Seen = true; 5600 else 5601 return false; 5602 } 5603 5604 return Seen; 5605} 5606 5607/// isOperand - Return true if this node is an operand of N. 5608/// 5609bool SDValue::isOperandOf(SDNode *N) const { 5610 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5611 if (*this == N->getOperand(i)) 5612 return true; 5613 return false; 5614} 5615 5616bool SDNode::isOperandOf(SDNode *N) const { 5617 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5618 if (this == N->OperandList[i].getNode()) 5619 return true; 5620 return false; 5621} 5622 5623/// reachesChainWithoutSideEffects - Return true if this operand (which must 5624/// be a chain) reaches the specified operand without crossing any 5625/// side-effecting instructions on any chain path. In practice, this looks 5626/// through token factors and non-volatile loads. In order to remain efficient, 5627/// this only looks a couple of nodes in, it does not do an exhaustive search. 5628bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5629 unsigned Depth) const { 5630 if (*this == Dest) return true; 5631 5632 // Don't search too deeply, we just want to be able to see through 5633 // TokenFactor's etc. 5634 if (Depth == 0) return false; 5635 5636 // If this is a token factor, all inputs to the TF happen in parallel. If any 5637 // of the operands of the TF does not reach dest, then we cannot do the xform. 5638 if (getOpcode() == ISD::TokenFactor) { 5639 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5640 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5641 return false; 5642 return true; 5643 } 5644 5645 // Loads don't have side effects, look through them. 5646 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5647 if (!Ld->isVolatile()) 5648 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5649 } 5650 return false; 5651} 5652 5653/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5654/// is either an operand of N or it can be reached by traversing up the operands. 5655/// NOTE: this is an expensive method. Use it carefully. 5656bool SDNode::isPredecessorOf(SDNode *N) const { 5657 SmallPtrSet<SDNode *, 32> Visited; 5658 SmallVector<SDNode *, 16> Worklist; 5659 Worklist.push_back(N); 5660 5661 do { 5662 N = Worklist.pop_back_val(); 5663 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5664 SDNode *Op = N->getOperand(i).getNode(); 5665 if (Op == this) 5666 return true; 5667 if (Visited.insert(Op)) 5668 Worklist.push_back(Op); 5669 } 5670 } while (!Worklist.empty()); 5671 5672 return false; 5673} 5674 5675uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5676 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5677 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5678} 5679 5680std::string SDNode::getOperationName(const SelectionDAG *G) const { 5681 switch (getOpcode()) { 5682 default: 5683 if (getOpcode() < ISD::BUILTIN_OP_END) 5684 return "<<Unknown DAG Node>>"; 5685 if (isMachineOpcode()) { 5686 if (G) 5687 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5688 if (getMachineOpcode() < TII->getNumOpcodes()) 5689 return TII->get(getMachineOpcode()).getName(); 5690 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5691 } 5692 if (G) { 5693 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5694 const char *Name = TLI.getTargetNodeName(getOpcode()); 5695 if (Name) return Name; 5696 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5697 } 5698 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5699 5700#ifndef NDEBUG 5701 case ISD::DELETED_NODE: 5702 return "<<Deleted Node!>>"; 5703#endif 5704 case ISD::PREFETCH: return "Prefetch"; 5705 case ISD::MEMBARRIER: return "MemBarrier"; 5706 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5707 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5708 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5709 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5710 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5711 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5712 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5713 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5714 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5715 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5716 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5717 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5718 case ISD::PCMARKER: return "PCMarker"; 5719 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5720 case ISD::SRCVALUE: return "SrcValue"; 5721 case ISD::MDNODE_SDNODE: return "MDNode"; 5722 case ISD::EntryToken: return "EntryToken"; 5723 case ISD::TokenFactor: return "TokenFactor"; 5724 case ISD::AssertSext: return "AssertSext"; 5725 case ISD::AssertZext: return "AssertZext"; 5726 5727 case ISD::BasicBlock: return "BasicBlock"; 5728 case ISD::VALUETYPE: return "ValueType"; 5729 case ISD::Register: return "Register"; 5730 5731 case ISD::Constant: return "Constant"; 5732 case ISD::ConstantFP: return "ConstantFP"; 5733 case ISD::GlobalAddress: return "GlobalAddress"; 5734 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5735 case ISD::FrameIndex: return "FrameIndex"; 5736 case ISD::JumpTable: return "JumpTable"; 5737 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5738 case ISD::RETURNADDR: return "RETURNADDR"; 5739 case ISD::FRAMEADDR: return "FRAMEADDR"; 5740 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5741 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5742 case ISD::LSDAADDR: return "LSDAADDR"; 5743 case ISD::EHSELECTION: return "EHSELECTION"; 5744 case ISD::EH_RETURN: return "EH_RETURN"; 5745 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5746 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5747 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP"; 5748 case ISD::ConstantPool: return "ConstantPool"; 5749 case ISD::ExternalSymbol: return "ExternalSymbol"; 5750 case ISD::BlockAddress: return "BlockAddress"; 5751 case ISD::INTRINSIC_WO_CHAIN: 5752 case ISD::INTRINSIC_VOID: 5753 case ISD::INTRINSIC_W_CHAIN: { 5754 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5755 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5756 if (IID < Intrinsic::num_intrinsics) 5757 return Intrinsic::getName((Intrinsic::ID)IID); 5758 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5759 return TII->getName(IID); 5760 llvm_unreachable("Invalid intrinsic ID"); 5761 } 5762 5763 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5764 case ISD::TargetConstant: return "TargetConstant"; 5765 case ISD::TargetConstantFP:return "TargetConstantFP"; 5766 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5767 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5768 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5769 case ISD::TargetJumpTable: return "TargetJumpTable"; 5770 case ISD::TargetConstantPool: return "TargetConstantPool"; 5771 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5772 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5773 5774 case ISD::CopyToReg: return "CopyToReg"; 5775 case ISD::CopyFromReg: return "CopyFromReg"; 5776 case ISD::UNDEF: return "undef"; 5777 case ISD::MERGE_VALUES: return "merge_values"; 5778 case ISD::INLINEASM: return "inlineasm"; 5779 case ISD::EH_LABEL: return "eh_label"; 5780 case ISD::HANDLENODE: return "handlenode"; 5781 5782 // Unary operators 5783 case ISD::FABS: return "fabs"; 5784 case ISD::FNEG: return "fneg"; 5785 case ISD::FSQRT: return "fsqrt"; 5786 case ISD::FSIN: return "fsin"; 5787 case ISD::FCOS: return "fcos"; 5788 case ISD::FTRUNC: return "ftrunc"; 5789 case ISD::FFLOOR: return "ffloor"; 5790 case ISD::FCEIL: return "fceil"; 5791 case ISD::FRINT: return "frint"; 5792 case ISD::FNEARBYINT: return "fnearbyint"; 5793 case ISD::FEXP: return "fexp"; 5794 case ISD::FEXP2: return "fexp2"; 5795 case ISD::FLOG: return "flog"; 5796 case ISD::FLOG2: return "flog2"; 5797 case ISD::FLOG10: return "flog10"; 5798 5799 // Binary operators 5800 case ISD::ADD: return "add"; 5801 case ISD::SUB: return "sub"; 5802 case ISD::MUL: return "mul"; 5803 case ISD::MULHU: return "mulhu"; 5804 case ISD::MULHS: return "mulhs"; 5805 case ISD::SDIV: return "sdiv"; 5806 case ISD::UDIV: return "udiv"; 5807 case ISD::SREM: return "srem"; 5808 case ISD::UREM: return "urem"; 5809 case ISD::SMUL_LOHI: return "smul_lohi"; 5810 case ISD::UMUL_LOHI: return "umul_lohi"; 5811 case ISD::SDIVREM: return "sdivrem"; 5812 case ISD::UDIVREM: return "udivrem"; 5813 case ISD::AND: return "and"; 5814 case ISD::OR: return "or"; 5815 case ISD::XOR: return "xor"; 5816 case ISD::SHL: return "shl"; 5817 case ISD::SRA: return "sra"; 5818 case ISD::SRL: return "srl"; 5819 case ISD::ROTL: return "rotl"; 5820 case ISD::ROTR: return "rotr"; 5821 case ISD::FADD: return "fadd"; 5822 case ISD::FSUB: return "fsub"; 5823 case ISD::FMUL: return "fmul"; 5824 case ISD::FDIV: return "fdiv"; 5825 case ISD::FREM: return "frem"; 5826 case ISD::FCOPYSIGN: return "fcopysign"; 5827 case ISD::FGETSIGN: return "fgetsign"; 5828 case ISD::FPOW: return "fpow"; 5829 5830 case ISD::FPOWI: return "fpowi"; 5831 case ISD::SETCC: return "setcc"; 5832 case ISD::VSETCC: return "vsetcc"; 5833 case ISD::SELECT: return "select"; 5834 case ISD::SELECT_CC: return "select_cc"; 5835 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5836 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5837 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5838 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 5839 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5840 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5841 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5842 case ISD::CARRY_FALSE: return "carry_false"; 5843 case ISD::ADDC: return "addc"; 5844 case ISD::ADDE: return "adde"; 5845 case ISD::SADDO: return "saddo"; 5846 case ISD::UADDO: return "uaddo"; 5847 case ISD::SSUBO: return "ssubo"; 5848 case ISD::USUBO: return "usubo"; 5849 case ISD::SMULO: return "smulo"; 5850 case ISD::UMULO: return "umulo"; 5851 case ISD::SUBC: return "subc"; 5852 case ISD::SUBE: return "sube"; 5853 case ISD::SHL_PARTS: return "shl_parts"; 5854 case ISD::SRA_PARTS: return "sra_parts"; 5855 case ISD::SRL_PARTS: return "srl_parts"; 5856 5857 // Conversion operators. 5858 case ISD::SIGN_EXTEND: return "sign_extend"; 5859 case ISD::ZERO_EXTEND: return "zero_extend"; 5860 case ISD::ANY_EXTEND: return "any_extend"; 5861 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5862 case ISD::TRUNCATE: return "truncate"; 5863 case ISD::FP_ROUND: return "fp_round"; 5864 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5865 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5866 case ISD::FP_EXTEND: return "fp_extend"; 5867 5868 case ISD::SINT_TO_FP: return "sint_to_fp"; 5869 case ISD::UINT_TO_FP: return "uint_to_fp"; 5870 case ISD::FP_TO_SINT: return "fp_to_sint"; 5871 case ISD::FP_TO_UINT: return "fp_to_uint"; 5872 case ISD::BITCAST: return "bit_convert"; 5873 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5874 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5875 5876 case ISD::CONVERT_RNDSAT: { 5877 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5878 default: llvm_unreachable("Unknown cvt code!"); 5879 case ISD::CVT_FF: return "cvt_ff"; 5880 case ISD::CVT_FS: return "cvt_fs"; 5881 case ISD::CVT_FU: return "cvt_fu"; 5882 case ISD::CVT_SF: return "cvt_sf"; 5883 case ISD::CVT_UF: return "cvt_uf"; 5884 case ISD::CVT_SS: return "cvt_ss"; 5885 case ISD::CVT_SU: return "cvt_su"; 5886 case ISD::CVT_US: return "cvt_us"; 5887 case ISD::CVT_UU: return "cvt_uu"; 5888 } 5889 } 5890 5891 // Control flow instructions 5892 case ISD::BR: return "br"; 5893 case ISD::BRIND: return "brind"; 5894 case ISD::BR_JT: return "br_jt"; 5895 case ISD::BRCOND: return "brcond"; 5896 case ISD::BR_CC: return "br_cc"; 5897 case ISD::CALLSEQ_START: return "callseq_start"; 5898 case ISD::CALLSEQ_END: return "callseq_end"; 5899 5900 // Other operators 5901 case ISD::LOAD: return "load"; 5902 case ISD::STORE: return "store"; 5903 case ISD::VAARG: return "vaarg"; 5904 case ISD::VACOPY: return "vacopy"; 5905 case ISD::VAEND: return "vaend"; 5906 case ISD::VASTART: return "vastart"; 5907 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5908 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5909 case ISD::BUILD_PAIR: return "build_pair"; 5910 case ISD::STACKSAVE: return "stacksave"; 5911 case ISD::STACKRESTORE: return "stackrestore"; 5912 case ISD::TRAP: return "trap"; 5913 5914 // Bit manipulation 5915 case ISD::BSWAP: return "bswap"; 5916 case ISD::CTPOP: return "ctpop"; 5917 case ISD::CTTZ: return "cttz"; 5918 case ISD::CTLZ: return "ctlz"; 5919 5920 // Trampolines 5921 case ISD::TRAMPOLINE: return "trampoline"; 5922 5923 case ISD::CONDCODE: 5924 switch (cast<CondCodeSDNode>(this)->get()) { 5925 default: llvm_unreachable("Unknown setcc condition!"); 5926 case ISD::SETOEQ: return "setoeq"; 5927 case ISD::SETOGT: return "setogt"; 5928 case ISD::SETOGE: return "setoge"; 5929 case ISD::SETOLT: return "setolt"; 5930 case ISD::SETOLE: return "setole"; 5931 case ISD::SETONE: return "setone"; 5932 5933 case ISD::SETO: return "seto"; 5934 case ISD::SETUO: return "setuo"; 5935 case ISD::SETUEQ: return "setue"; 5936 case ISD::SETUGT: return "setugt"; 5937 case ISD::SETUGE: return "setuge"; 5938 case ISD::SETULT: return "setult"; 5939 case ISD::SETULE: return "setule"; 5940 case ISD::SETUNE: return "setune"; 5941 5942 case ISD::SETEQ: return "seteq"; 5943 case ISD::SETGT: return "setgt"; 5944 case ISD::SETGE: return "setge"; 5945 case ISD::SETLT: return "setlt"; 5946 case ISD::SETLE: return "setle"; 5947 case ISD::SETNE: return "setne"; 5948 } 5949 } 5950} 5951 5952const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5953 switch (AM) { 5954 default: 5955 return ""; 5956 case ISD::PRE_INC: 5957 return "<pre-inc>"; 5958 case ISD::PRE_DEC: 5959 return "<pre-dec>"; 5960 case ISD::POST_INC: 5961 return "<post-inc>"; 5962 case ISD::POST_DEC: 5963 return "<post-dec>"; 5964 } 5965} 5966 5967std::string ISD::ArgFlagsTy::getArgFlagsString() { 5968 std::string S = "< "; 5969 5970 if (isZExt()) 5971 S += "zext "; 5972 if (isSExt()) 5973 S += "sext "; 5974 if (isInReg()) 5975 S += "inreg "; 5976 if (isSRet()) 5977 S += "sret "; 5978 if (isByVal()) 5979 S += "byval "; 5980 if (isNest()) 5981 S += "nest "; 5982 if (getByValAlign()) 5983 S += "byval-align:" + utostr(getByValAlign()) + " "; 5984 if (getOrigAlign()) 5985 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5986 if (getByValSize()) 5987 S += "byval-size:" + utostr(getByValSize()) + " "; 5988 return S + ">"; 5989} 5990 5991void SDNode::dump() const { dump(0); } 5992void SDNode::dump(const SelectionDAG *G) const { 5993 print(dbgs(), G); 5994 dbgs() << '\n'; 5995} 5996 5997void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5998 OS << (void*)this << ": "; 5999 6000 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 6001 if (i) OS << ","; 6002 if (getValueType(i) == MVT::Other) 6003 OS << "ch"; 6004 else 6005 OS << getValueType(i).getEVTString(); 6006 } 6007 OS << " = " << getOperationName(G); 6008} 6009 6010void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 6011 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 6012 if (!MN->memoperands_empty()) { 6013 OS << "<"; 6014 OS << "Mem:"; 6015 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 6016 e = MN->memoperands_end(); i != e; ++i) { 6017 OS << **i; 6018 if (llvm::next(i) != e) 6019 OS << " "; 6020 } 6021 OS << ">"; 6022 } 6023 } else if (const ShuffleVectorSDNode *SVN = 6024 dyn_cast<ShuffleVectorSDNode>(this)) { 6025 OS << "<"; 6026 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 6027 int Idx = SVN->getMaskElt(i); 6028 if (i) OS << ","; 6029 if (Idx < 0) 6030 OS << "u"; 6031 else 6032 OS << Idx; 6033 } 6034 OS << ">"; 6035 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 6036 OS << '<' << CSDN->getAPIntValue() << '>'; 6037 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 6038 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 6039 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 6040 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 6041 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 6042 else { 6043 OS << "<APFloat("; 6044 CSDN->getValueAPF().bitcastToAPInt().dump(); 6045 OS << ")>"; 6046 } 6047 } else if (const GlobalAddressSDNode *GADN = 6048 dyn_cast<GlobalAddressSDNode>(this)) { 6049 int64_t offset = GADN->getOffset(); 6050 OS << '<'; 6051 WriteAsOperand(OS, GADN->getGlobal()); 6052 OS << '>'; 6053 if (offset > 0) 6054 OS << " + " << offset; 6055 else 6056 OS << " " << offset; 6057 if (unsigned int TF = GADN->getTargetFlags()) 6058 OS << " [TF=" << TF << ']'; 6059 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 6060 OS << "<" << FIDN->getIndex() << ">"; 6061 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 6062 OS << "<" << JTDN->getIndex() << ">"; 6063 if (unsigned int TF = JTDN->getTargetFlags()) 6064 OS << " [TF=" << TF << ']'; 6065 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 6066 int offset = CP->getOffset(); 6067 if (CP->isMachineConstantPoolEntry()) 6068 OS << "<" << *CP->getMachineCPVal() << ">"; 6069 else 6070 OS << "<" << *CP->getConstVal() << ">"; 6071 if (offset > 0) 6072 OS << " + " << offset; 6073 else 6074 OS << " " << offset; 6075 if (unsigned int TF = CP->getTargetFlags()) 6076 OS << " [TF=" << TF << ']'; 6077 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 6078 OS << "<"; 6079 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 6080 if (LBB) 6081 OS << LBB->getName() << " "; 6082 OS << (const void*)BBDN->getBasicBlock() << ">"; 6083 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 6084 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0); 6085 } else if (const ExternalSymbolSDNode *ES = 6086 dyn_cast<ExternalSymbolSDNode>(this)) { 6087 OS << "'" << ES->getSymbol() << "'"; 6088 if (unsigned int TF = ES->getTargetFlags()) 6089 OS << " [TF=" << TF << ']'; 6090 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 6091 if (M->getValue()) 6092 OS << "<" << M->getValue() << ">"; 6093 else 6094 OS << "<null>"; 6095 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 6096 if (MD->getMD()) 6097 OS << "<" << MD->getMD() << ">"; 6098 else 6099 OS << "<null>"; 6100 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6101 OS << ":" << N->getVT().getEVTString(); 6102 } 6103 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6104 OS << "<" << *LD->getMemOperand(); 6105 6106 bool doExt = true; 6107 switch (LD->getExtensionType()) { 6108 default: doExt = false; break; 6109 case ISD::EXTLOAD: OS << ", anyext"; break; 6110 case ISD::SEXTLOAD: OS << ", sext"; break; 6111 case ISD::ZEXTLOAD: OS << ", zext"; break; 6112 } 6113 if (doExt) 6114 OS << " from " << LD->getMemoryVT().getEVTString(); 6115 6116 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6117 if (*AM) 6118 OS << ", " << AM; 6119 6120 OS << ">"; 6121 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6122 OS << "<" << *ST->getMemOperand(); 6123 6124 if (ST->isTruncatingStore()) 6125 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6126 6127 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6128 if (*AM) 6129 OS << ", " << AM; 6130 6131 OS << ">"; 6132 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6133 OS << "<" << *M->getMemOperand() << ">"; 6134 } else if (const BlockAddressSDNode *BA = 6135 dyn_cast<BlockAddressSDNode>(this)) { 6136 OS << "<"; 6137 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6138 OS << ", "; 6139 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6140 OS << ">"; 6141 if (unsigned int TF = BA->getTargetFlags()) 6142 OS << " [TF=" << TF << ']'; 6143 } 6144 6145 if (G) 6146 if (unsigned Order = G->GetOrdering(this)) 6147 OS << " [ORD=" << Order << ']'; 6148 6149 if (getNodeId() != -1) 6150 OS << " [ID=" << getNodeId() << ']'; 6151 6152 DebugLoc dl = getDebugLoc(); 6153 if (G && !dl.isUnknown()) { 6154 DIScope 6155 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6156 OS << " dbg:"; 6157 // Omit the directory, since it's usually long and uninteresting. 6158 if (Scope.Verify()) 6159 OS << Scope.getFilename(); 6160 else 6161 OS << "<unknown>"; 6162 OS << ':' << dl.getLine(); 6163 if (dl.getCol() != 0) 6164 OS << ':' << dl.getCol(); 6165 } 6166} 6167 6168void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6169 print_types(OS, G); 6170 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6171 if (i) OS << ", "; else OS << " "; 6172 OS << (void*)getOperand(i).getNode(); 6173 if (unsigned RN = getOperand(i).getResNo()) 6174 OS << ":" << RN; 6175 } 6176 print_details(OS, G); 6177} 6178 6179static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6180 const SelectionDAG *G, unsigned depth, 6181 unsigned indent) 6182{ 6183 if (depth == 0) 6184 return; 6185 6186 OS.indent(indent); 6187 6188 N->print(OS, G); 6189 6190 if (depth < 1) 6191 return; 6192 6193 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6194 OS << '\n'; 6195 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6196 } 6197} 6198 6199void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6200 unsigned depth) const { 6201 printrWithDepthHelper(OS, this, G, depth, 0); 6202} 6203 6204void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6205 // Don't print impossibly deep things. 6206 printrWithDepth(OS, G, 100); 6207} 6208 6209void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6210 printrWithDepth(dbgs(), G, depth); 6211} 6212 6213void SDNode::dumprFull(const SelectionDAG *G) const { 6214 // Don't print impossibly deep things. 6215 dumprWithDepth(G, 100); 6216} 6217 6218static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6219 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6220 if (N->getOperand(i).getNode()->hasOneUse()) 6221 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6222 else 6223 dbgs() << "\n" << std::string(indent+2, ' ') 6224 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6225 6226 6227 dbgs() << "\n"; 6228 dbgs().indent(indent); 6229 N->dump(G); 6230} 6231 6232SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6233 assert(N->getNumValues() == 1 && 6234 "Can't unroll a vector with multiple results!"); 6235 6236 EVT VT = N->getValueType(0); 6237 unsigned NE = VT.getVectorNumElements(); 6238 EVT EltVT = VT.getVectorElementType(); 6239 DebugLoc dl = N->getDebugLoc(); 6240 6241 SmallVector<SDValue, 8> Scalars; 6242 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6243 6244 // If ResNE is 0, fully unroll the vector op. 6245 if (ResNE == 0) 6246 ResNE = NE; 6247 else if (NE > ResNE) 6248 NE = ResNE; 6249 6250 unsigned i; 6251 for (i= 0; i != NE; ++i) { 6252 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6253 SDValue Operand = N->getOperand(j); 6254 EVT OperandVT = Operand.getValueType(); 6255 if (OperandVT.isVector()) { 6256 // A vector operand; extract a single element. 6257 EVT OperandEltVT = OperandVT.getVectorElementType(); 6258 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6259 OperandEltVT, 6260 Operand, 6261 getConstant(i, MVT::i32)); 6262 } else { 6263 // A scalar operand; just use it as is. 6264 Operands[j] = Operand; 6265 } 6266 } 6267 6268 switch (N->getOpcode()) { 6269 default: 6270 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6271 &Operands[0], Operands.size())); 6272 break; 6273 case ISD::SHL: 6274 case ISD::SRA: 6275 case ISD::SRL: 6276 case ISD::ROTL: 6277 case ISD::ROTR: 6278 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6279 getShiftAmountOperand(Operands[1]))); 6280 break; 6281 case ISD::SIGN_EXTEND_INREG: 6282 case ISD::FP_ROUND_INREG: { 6283 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6284 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6285 Operands[0], 6286 getValueType(ExtVT))); 6287 } 6288 } 6289 } 6290 6291 for (; i < ResNE; ++i) 6292 Scalars.push_back(getUNDEF(EltVT)); 6293 6294 return getNode(ISD::BUILD_VECTOR, dl, 6295 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6296 &Scalars[0], Scalars.size()); 6297} 6298 6299 6300/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6301/// location that is 'Dist' units away from the location that the 'Base' load 6302/// is loading from. 6303bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6304 unsigned Bytes, int Dist) const { 6305 if (LD->getChain() != Base->getChain()) 6306 return false; 6307 EVT VT = LD->getValueType(0); 6308 if (VT.getSizeInBits() / 8 != Bytes) 6309 return false; 6310 6311 SDValue Loc = LD->getOperand(1); 6312 SDValue BaseLoc = Base->getOperand(1); 6313 if (Loc.getOpcode() == ISD::FrameIndex) { 6314 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6315 return false; 6316 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6317 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6318 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6319 int FS = MFI->getObjectSize(FI); 6320 int BFS = MFI->getObjectSize(BFI); 6321 if (FS != BFS || FS != (int)Bytes) return false; 6322 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6323 } 6324 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6325 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6326 if (V && (V->getSExtValue() == Dist*Bytes)) 6327 return true; 6328 } 6329 6330 const GlobalValue *GV1 = NULL; 6331 const GlobalValue *GV2 = NULL; 6332 int64_t Offset1 = 0; 6333 int64_t Offset2 = 0; 6334 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6335 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6336 if (isGA1 && isGA2 && GV1 == GV2) 6337 return Offset1 == (Offset2 + Dist*Bytes); 6338 return false; 6339} 6340 6341 6342/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6343/// it cannot be inferred. 6344unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6345 // If this is a GlobalAddress + cst, return the alignment. 6346 const GlobalValue *GV; 6347 int64_t GVOffset = 0; 6348 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6349 // If GV has specified alignment, then use it. Otherwise, use the preferred 6350 // alignment. 6351 unsigned Align = GV->getAlignment(); 6352 if (!Align) { 6353 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6354 if (GVar->hasInitializer()) { 6355 const TargetData *TD = TLI.getTargetData(); 6356 Align = TD->getPreferredAlignment(GVar); 6357 } 6358 } 6359 } 6360 return MinAlign(Align, GVOffset); 6361 } 6362 6363 // If this is a direct reference to a stack slot, use information about the 6364 // stack slot's alignment. 6365 int FrameIdx = 1 << 31; 6366 int64_t FrameOffset = 0; 6367 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6368 FrameIdx = FI->getIndex(); 6369 } else if (Ptr.getOpcode() == ISD::ADD && 6370 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6371 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6372 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6373 FrameOffset = Ptr.getConstantOperandVal(1); 6374 } 6375 6376 if (FrameIdx != (1 << 31)) { 6377 // FIXME: Handle FI+CST. 6378 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6379 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6380 FrameOffset); 6381 return FIInfoAlign; 6382 } 6383 6384 return 0; 6385} 6386 6387void SelectionDAG::dump() const { 6388 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6389 6390 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6391 I != E; ++I) { 6392 const SDNode *N = I; 6393 if (!N->hasOneUse() && N != getRoot().getNode()) 6394 DumpNodes(N, 2, this); 6395 } 6396 6397 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6398 6399 dbgs() << "\n\n"; 6400} 6401 6402void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6403 print_types(OS, G); 6404 print_details(OS, G); 6405} 6406 6407typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6408static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6409 const SelectionDAG *G, VisitedSDNodeSet &once) { 6410 if (!once.insert(N)) // If we've been here before, return now. 6411 return; 6412 6413 // Dump the current SDNode, but don't end the line yet. 6414 OS << std::string(indent, ' '); 6415 N->printr(OS, G); 6416 6417 // Having printed this SDNode, walk the children: 6418 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6419 const SDNode *child = N->getOperand(i).getNode(); 6420 6421 if (i) OS << ","; 6422 OS << " "; 6423 6424 if (child->getNumOperands() == 0) { 6425 // This child has no grandchildren; print it inline right here. 6426 child->printr(OS, G); 6427 once.insert(child); 6428 } else { // Just the address. FIXME: also print the child's opcode. 6429 OS << (void*)child; 6430 if (unsigned RN = N->getOperand(i).getResNo()) 6431 OS << ":" << RN; 6432 } 6433 } 6434 6435 OS << "\n"; 6436 6437 // Dump children that have grandchildren on their own line(s). 6438 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6439 const SDNode *child = N->getOperand(i).getNode(); 6440 DumpNodesr(OS, child, indent+2, G, once); 6441 } 6442} 6443 6444void SDNode::dumpr() const { 6445 VisitedSDNodeSet once; 6446 DumpNodesr(dbgs(), this, 0, 0, once); 6447} 6448 6449void SDNode::dumpr(const SelectionDAG *G) const { 6450 VisitedSDNodeSet once; 6451 DumpNodesr(dbgs(), this, 0, G, once); 6452} 6453 6454 6455// getAddressSpace - Return the address space this GlobalAddress belongs to. 6456unsigned GlobalAddressSDNode::getAddressSpace() const { 6457 return getGlobal()->getType()->getAddressSpace(); 6458} 6459 6460 6461const Type *ConstantPoolSDNode::getType() const { 6462 if (isMachineConstantPoolEntry()) 6463 return Val.MachineCPVal->getType(); 6464 return Val.ConstVal->getType(); 6465} 6466 6467bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6468 APInt &SplatUndef, 6469 unsigned &SplatBitSize, 6470 bool &HasAnyUndefs, 6471 unsigned MinSplatBits, 6472 bool isBigEndian) { 6473 EVT VT = getValueType(0); 6474 assert(VT.isVector() && "Expected a vector type"); 6475 unsigned sz = VT.getSizeInBits(); 6476 if (MinSplatBits > sz) 6477 return false; 6478 6479 SplatValue = APInt(sz, 0); 6480 SplatUndef = APInt(sz, 0); 6481 6482 // Get the bits. Bits with undefined values (when the corresponding element 6483 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6484 // in SplatValue. If any of the values are not constant, give up and return 6485 // false. 6486 unsigned int nOps = getNumOperands(); 6487 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6488 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6489 6490 for (unsigned j = 0; j < nOps; ++j) { 6491 unsigned i = isBigEndian ? nOps-1-j : j; 6492 SDValue OpVal = getOperand(i); 6493 unsigned BitPos = j * EltBitSize; 6494 6495 if (OpVal.getOpcode() == ISD::UNDEF) 6496 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6497 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6498 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6499 zextOrTrunc(sz) << BitPos; 6500 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6501 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6502 else 6503 return false; 6504 } 6505 6506 // The build_vector is all constants or undefs. Find the smallest element 6507 // size that splats the vector. 6508 6509 HasAnyUndefs = (SplatUndef != 0); 6510 while (sz > 8) { 6511 6512 unsigned HalfSize = sz / 2; 6513 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6514 APInt LowValue = SplatValue.trunc(HalfSize); 6515 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6516 APInt LowUndef = SplatUndef.trunc(HalfSize); 6517 6518 // If the two halves do not match (ignoring undef bits), stop here. 6519 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6520 MinSplatBits > HalfSize) 6521 break; 6522 6523 SplatValue = HighValue | LowValue; 6524 SplatUndef = HighUndef & LowUndef; 6525 6526 sz = HalfSize; 6527 } 6528 6529 SplatBitSize = sz; 6530 return true; 6531} 6532 6533bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6534 // Find the first non-undef value in the shuffle mask. 6535 unsigned i, e; 6536 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6537 /* search */; 6538 6539 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6540 6541 // Make sure all remaining elements are either undef or the same as the first 6542 // non-undef value. 6543 for (int Idx = Mask[i]; i != e; ++i) 6544 if (Mask[i] >= 0 && Mask[i] != Idx) 6545 return false; 6546 return true; 6547} 6548 6549#ifdef XDEBUG 6550static void checkForCyclesHelper(const SDNode *N, 6551 SmallPtrSet<const SDNode*, 32> &Visited, 6552 SmallPtrSet<const SDNode*, 32> &Checked) { 6553 // If this node has already been checked, don't check it again. 6554 if (Checked.count(N)) 6555 return; 6556 6557 // If a node has already been visited on this depth-first walk, reject it as 6558 // a cycle. 6559 if (!Visited.insert(N)) { 6560 dbgs() << "Offending node:\n"; 6561 N->dumprFull(); 6562 errs() << "Detected cycle in SelectionDAG\n"; 6563 abort(); 6564 } 6565 6566 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6567 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6568 6569 Checked.insert(N); 6570 Visited.erase(N); 6571} 6572#endif 6573 6574void llvm::checkForCycles(const llvm::SDNode *N) { 6575#ifdef XDEBUG 6576 assert(N && "Checking nonexistant SDNode"); 6577 SmallPtrSet<const SDNode*, 32> visited; 6578 SmallPtrSet<const SDNode*, 32> checked; 6579 checkForCyclesHelper(N, visited, checked); 6580#endif 6581} 6582 6583void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6584 checkForCycles(DAG->getRoot().getNode()); 6585} 6586