SelectionDAG.cpp revision a7ce741ff0ab02510833854bfa6a1c8c265faee3
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetOptions.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/Support/CommandLine.h" 34#include "llvm/Support/MathExtras.h" 35#include "llvm/Support/raw_ostream.h" 36#include "llvm/ADT/SetVector.h" 37#include "llvm/ADT/SmallPtrSet.h" 38#include "llvm/ADT/SmallSet.h" 39#include "llvm/ADT/SmallVector.h" 40#include "llvm/ADT/StringExtras.h" 41#include <algorithm> 42#include <cmath> 43using namespace llvm; 44 45/// makeVTList - Return an instance of the SDVTList struct initialized with the 46/// specified members. 47static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 48 SDVTList Res = {VTs, NumVTs}; 49 return Res; 50} 51 52static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 53 switch (VT.getSimpleVT()) { 54 default: assert(0 && "Unknown FP format"); 55 case MVT::f32: return &APFloat::IEEEsingle; 56 case MVT::f64: return &APFloat::IEEEdouble; 57 case MVT::f80: return &APFloat::x87DoubleExtended; 58 case MVT::f128: return &APFloat::IEEEquad; 59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 60 } 61} 62 63SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 64 65//===----------------------------------------------------------------------===// 66// ConstantFPSDNode Class 67//===----------------------------------------------------------------------===// 68 69/// isExactlyValue - We don't rely on operator== working on double values, as 70/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 71/// As such, this method can be used to do an exact bit-for-bit comparison of 72/// two floating point values. 73bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 74 return getValueAPF().bitwiseIsEqual(V); 75} 76 77bool ConstantFPSDNode::isValueValidForType(MVT VT, 78 const APFloat& Val) { 79 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 80 81 // PPC long double cannot be converted to any other type. 82 if (VT == MVT::ppcf128 || 83 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 84 return false; 85 86 // convert modifies in place, so make a copy. 87 APFloat Val2 = APFloat(Val); 88 bool losesInfo; 89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 90 &losesInfo); 91 return !losesInfo; 92} 93 94//===----------------------------------------------------------------------===// 95// ISD Namespace 96//===----------------------------------------------------------------------===// 97 98/// isBuildVectorAllOnes - Return true if the specified node is a 99/// BUILD_VECTOR where all of the elements are ~0 or undef. 100bool ISD::isBuildVectorAllOnes(const SDNode *N) { 101 // Look through a bit convert. 102 if (N->getOpcode() == ISD::BIT_CONVERT) 103 N = N->getOperand(0).getNode(); 104 105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 106 107 unsigned i = 0, e = N->getNumOperands(); 108 109 // Skip over all of the undef values. 110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 111 ++i; 112 113 // Do not accept an all-undef vector. 114 if (i == e) return false; 115 116 // Do not accept build_vectors that aren't all constants or which have non-~0 117 // elements. 118 SDValue NotZero = N->getOperand(i); 119 if (isa<ConstantSDNode>(NotZero)) { 120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 121 return false; 122 } else if (isa<ConstantFPSDNode>(NotZero)) { 123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 124 bitcastToAPInt().isAllOnesValue()) 125 return false; 126 } else 127 return false; 128 129 // Okay, we have at least one ~0 value, check to see if the rest match or are 130 // undefs. 131 for (++i; i != e; ++i) 132 if (N->getOperand(i) != NotZero && 133 N->getOperand(i).getOpcode() != ISD::UNDEF) 134 return false; 135 return true; 136} 137 138 139/// isBuildVectorAllZeros - Return true if the specified node is a 140/// BUILD_VECTOR where all of the elements are 0 or undef. 141bool ISD::isBuildVectorAllZeros(const SDNode *N) { 142 // Look through a bit convert. 143 if (N->getOpcode() == ISD::BIT_CONVERT) 144 N = N->getOperand(0).getNode(); 145 146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 147 148 unsigned i = 0, e = N->getNumOperands(); 149 150 // Skip over all of the undef values. 151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 152 ++i; 153 154 // Do not accept an all-undef vector. 155 if (i == e) return false; 156 157 // Do not accept build_vectors that aren't all constants or which have non-~0 158 // elements. 159 SDValue Zero = N->getOperand(i); 160 if (isa<ConstantSDNode>(Zero)) { 161 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 162 return false; 163 } else if (isa<ConstantFPSDNode>(Zero)) { 164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 165 return false; 166 } else 167 return false; 168 169 // Okay, we have at least one ~0 value, check to see if the rest match or are 170 // undefs. 171 for (++i; i != e; ++i) 172 if (N->getOperand(i) != Zero && 173 N->getOperand(i).getOpcode() != ISD::UNDEF) 174 return false; 175 return true; 176} 177 178/// isScalarToVector - Return true if the specified node is a 179/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 180/// element is not an undef. 181bool ISD::isScalarToVector(const SDNode *N) { 182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 183 return true; 184 185 if (N->getOpcode() != ISD::BUILD_VECTOR) 186 return false; 187 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 188 return false; 189 unsigned NumElems = N->getNumOperands(); 190 for (unsigned i = 1; i < NumElems; ++i) { 191 SDValue V = N->getOperand(i); 192 if (V.getOpcode() != ISD::UNDEF) 193 return false; 194 } 195 return true; 196} 197 198 199/// isDebugLabel - Return true if the specified node represents a debug 200/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 201bool ISD::isDebugLabel(const SDNode *N) { 202 SDValue Zero; 203 if (N->getOpcode() == ISD::DBG_LABEL) 204 return true; 205 if (N->isMachineOpcode() && 206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 207 return true; 208 return false; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: assert(0 && "Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310const TargetMachine &SelectionDAG::getTarget() const { 311 return MF->getTarget(); 312} 313 314//===----------------------------------------------------------------------===// 315// SDNode Profile Support 316//===----------------------------------------------------------------------===// 317 318/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 319/// 320static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 321 ID.AddInteger(OpC); 322} 323 324/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 325/// solely with their pointer. 326static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 327 ID.AddPointer(VTList.VTs); 328} 329 330/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 331/// 332static void AddNodeIDOperands(FoldingSetNodeID &ID, 333 const SDValue *Ops, unsigned NumOps) { 334 for (; NumOps; --NumOps, ++Ops) { 335 ID.AddPointer(Ops->getNode()); 336 ID.AddInteger(Ops->getResNo()); 337 } 338} 339 340/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 341/// 342static void AddNodeIDOperands(FoldingSetNodeID &ID, 343 const SDUse *Ops, unsigned NumOps) { 344 for (; NumOps; --NumOps, ++Ops) { 345 ID.AddPointer(Ops->getNode()); 346 ID.AddInteger(Ops->getResNo()); 347 } 348} 349 350static void AddNodeIDNode(FoldingSetNodeID &ID, 351 unsigned short OpC, SDVTList VTList, 352 const SDValue *OpList, unsigned N) { 353 AddNodeIDOpcode(ID, OpC); 354 AddNodeIDValueTypes(ID, VTList); 355 AddNodeIDOperands(ID, OpList, N); 356} 357 358/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 359/// the NodeID data. 360static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 361 switch (N->getOpcode()) { 362 default: break; // Normal nodes don't need extra info. 363 case ISD::ARG_FLAGS: 364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 365 break; 366 case ISD::TargetConstant: 367 case ISD::Constant: 368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 369 break; 370 case ISD::TargetConstantFP: 371 case ISD::ConstantFP: { 372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 373 break; 374 } 375 case ISD::TargetGlobalAddress: 376 case ISD::GlobalAddress: 377 case ISD::TargetGlobalTLSAddress: 378 case ISD::GlobalTLSAddress: { 379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 380 ID.AddPointer(GA->getGlobal()); 381 ID.AddInteger(GA->getOffset()); 382 break; 383 } 384 case ISD::BasicBlock: 385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 386 break; 387 case ISD::Register: 388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 389 break; 390 case ISD::DBG_STOPPOINT: { 391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 392 ID.AddInteger(DSP->getLine()); 393 ID.AddInteger(DSP->getColumn()); 394 ID.AddPointer(DSP->getCompileUnit()); 395 break; 396 } 397 case ISD::SRCVALUE: 398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 399 break; 400 case ISD::MEMOPERAND: { 401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 402 MO.Profile(ID); 403 break; 404 } 405 case ISD::FrameIndex: 406 case ISD::TargetFrameIndex: 407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 408 break; 409 case ISD::JumpTable: 410 case ISD::TargetJumpTable: 411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 412 break; 413 case ISD::ConstantPool: 414 case ISD::TargetConstantPool: { 415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 416 ID.AddInteger(CP->getAlignment()); 417 ID.AddInteger(CP->getOffset()); 418 if (CP->isMachineConstantPoolEntry()) 419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 420 else 421 ID.AddPointer(CP->getConstVal()); 422 break; 423 } 424 case ISD::CALL: { 425 const CallSDNode *Call = cast<CallSDNode>(N); 426 ID.AddInteger(Call->getCallingConv()); 427 ID.AddInteger(Call->isVarArg()); 428 break; 429 } 430 case ISD::LOAD: { 431 const LoadSDNode *LD = cast<LoadSDNode>(N); 432 ID.AddInteger(LD->getMemoryVT().getRawBits()); 433 ID.AddInteger(LD->getRawSubclassData()); 434 break; 435 } 436 case ISD::STORE: { 437 const StoreSDNode *ST = cast<StoreSDNode>(N); 438 ID.AddInteger(ST->getMemoryVT().getRawBits()); 439 ID.AddInteger(ST->getRawSubclassData()); 440 break; 441 } 442 case ISD::ATOMIC_CMP_SWAP: 443 case ISD::ATOMIC_SWAP: 444 case ISD::ATOMIC_LOAD_ADD: 445 case ISD::ATOMIC_LOAD_SUB: 446 case ISD::ATOMIC_LOAD_AND: 447 case ISD::ATOMIC_LOAD_OR: 448 case ISD::ATOMIC_LOAD_XOR: 449 case ISD::ATOMIC_LOAD_NAND: 450 case ISD::ATOMIC_LOAD_MIN: 451 case ISD::ATOMIC_LOAD_MAX: 452 case ISD::ATOMIC_LOAD_UMIN: 453 case ISD::ATOMIC_LOAD_UMAX: { 454 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 455 ID.AddInteger(AT->getMemoryVT().getRawBits()); 456 ID.AddInteger(AT->getRawSubclassData()); 457 break; 458 } 459 } // end switch (N->getOpcode()) 460} 461 462/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 463/// data. 464static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 465 AddNodeIDOpcode(ID, N->getOpcode()); 466 // Add the return value info. 467 AddNodeIDValueTypes(ID, N->getVTList()); 468 // Add the operand info. 469 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 470 471 // Handle SDNode leafs with special info. 472 AddNodeIDCustom(ID, N); 473} 474 475/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 476/// the CSE map that carries alignment, volatility, indexing mode, and 477/// extension/truncation information. 478/// 479static inline unsigned 480encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, 481 bool isVolatile, unsigned Alignment) { 482 assert((ConvType & 3) == ConvType && 483 "ConvType may not require more than 2 bits!"); 484 assert((AM & 7) == AM && 485 "AM may not require more than 3 bits!"); 486 return ConvType | 487 (AM << 2) | 488 (isVolatile << 5) | 489 ((Log2_32(Alignment) + 1) << 6); 490} 491 492//===----------------------------------------------------------------------===// 493// SelectionDAG Class 494//===----------------------------------------------------------------------===// 495 496/// doNotCSE - Return true if CSE should not be performed for this node. 497static bool doNotCSE(SDNode *N) { 498 if (N->getValueType(0) == MVT::Flag) 499 return true; // Never CSE anything that produces a flag. 500 501 switch (N->getOpcode()) { 502 default: break; 503 case ISD::HANDLENODE: 504 case ISD::DBG_LABEL: 505 case ISD::DBG_STOPPOINT: 506 case ISD::EH_LABEL: 507 case ISD::DECLARE: 508 return true; // Never CSE these nodes. 509 } 510 511 // Check that remaining values produced are not flags. 512 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 513 if (N->getValueType(i) == MVT::Flag) 514 return true; // Never CSE anything that produces a flag. 515 516 return false; 517} 518 519/// RemoveDeadNodes - This method deletes all unreachable nodes in the 520/// SelectionDAG. 521void SelectionDAG::RemoveDeadNodes() { 522 // Create a dummy node (which is not added to allnodes), that adds a reference 523 // to the root node, preventing it from being deleted. 524 HandleSDNode Dummy(getRoot()); 525 526 SmallVector<SDNode*, 128> DeadNodes; 527 528 // Add all obviously-dead nodes to the DeadNodes worklist. 529 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 530 if (I->use_empty()) 531 DeadNodes.push_back(I); 532 533 RemoveDeadNodes(DeadNodes); 534 535 // If the root changed (e.g. it was a dead load, update the root). 536 setRoot(Dummy.getValue()); 537} 538 539/// RemoveDeadNodes - This method deletes the unreachable nodes in the 540/// given list, and any nodes that become unreachable as a result. 541void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 542 DAGUpdateListener *UpdateListener) { 543 544 // Process the worklist, deleting the nodes and adding their uses to the 545 // worklist. 546 while (!DeadNodes.empty()) { 547 SDNode *N = DeadNodes.pop_back_val(); 548 549 if (UpdateListener) 550 UpdateListener->NodeDeleted(N, 0); 551 552 // Take the node out of the appropriate CSE map. 553 RemoveNodeFromCSEMaps(N); 554 555 // Next, brutally remove the operand list. This is safe to do, as there are 556 // no cycles in the graph. 557 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 558 SDUse &Use = *I++; 559 SDNode *Operand = Use.getNode(); 560 Use.set(SDValue()); 561 562 // Now that we removed this operand, see if there are no uses of it left. 563 if (Operand->use_empty()) 564 DeadNodes.push_back(Operand); 565 } 566 567 DeallocateNode(N); 568 } 569} 570 571void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 572 SmallVector<SDNode*, 16> DeadNodes(1, N); 573 RemoveDeadNodes(DeadNodes, UpdateListener); 574} 575 576void SelectionDAG::DeleteNode(SDNode *N) { 577 // First take this out of the appropriate CSE map. 578 RemoveNodeFromCSEMaps(N); 579 580 // Finally, remove uses due to operands of this node, remove from the 581 // AllNodes list, and delete the node. 582 DeleteNodeNotInCSEMaps(N); 583} 584 585void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 586 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 587 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 588 589 // Drop all of the operands and decrement used node's use counts. 590 N->DropOperands(); 591 592 DeallocateNode(N); 593} 594 595void SelectionDAG::DeallocateNode(SDNode *N) { 596 if (N->OperandsNeedDelete) 597 delete[] N->OperandList; 598 599 // Set the opcode to DELETED_NODE to help catch bugs when node 600 // memory is reallocated. 601 N->NodeType = ISD::DELETED_NODE; 602 603 NodeAllocator.Deallocate(AllNodes.remove(N)); 604} 605 606/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 607/// correspond to it. This is useful when we're about to delete or repurpose 608/// the node. We don't want future request for structurally identical nodes 609/// to return N anymore. 610bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 611 bool Erased = false; 612 switch (N->getOpcode()) { 613 case ISD::EntryToken: 614 assert(0 && "EntryToken should not be in CSEMaps!"); 615 return false; 616 case ISD::HANDLENODE: return false; // noop. 617 case ISD::CONDCODE: 618 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 619 "Cond code doesn't exist!"); 620 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 621 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 622 break; 623 case ISD::ExternalSymbol: 624 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 625 break; 626 case ISD::TargetExternalSymbol: 627 Erased = 628 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 629 break; 630 case ISD::VALUETYPE: { 631 MVT VT = cast<VTSDNode>(N)->getVT(); 632 if (VT.isExtended()) { 633 Erased = ExtendedValueTypeNodes.erase(VT); 634 } else { 635 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 636 ValueTypeNodes[VT.getSimpleVT()] = 0; 637 } 638 break; 639 } 640 default: 641 // Remove it from the CSE Map. 642 Erased = CSEMap.RemoveNode(N); 643 break; 644 } 645#ifndef NDEBUG 646 // Verify that the node was actually in one of the CSE maps, unless it has a 647 // flag result (which cannot be CSE'd) or is one of the special cases that are 648 // not subject to CSE. 649 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 650 !N->isMachineOpcode() && !doNotCSE(N)) { 651 N->dump(this); 652 cerr << "\n"; 653 assert(0 && "Node is not in map!"); 654 } 655#endif 656 return Erased; 657} 658 659/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 660/// maps and modified in place. Add it back to the CSE maps, unless an identical 661/// node already exists, in which case transfer all its users to the existing 662/// node. This transfer can potentially trigger recursive merging. 663/// 664void 665SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 666 DAGUpdateListener *UpdateListener) { 667 // For node types that aren't CSE'd, just act as if no identical node 668 // already exists. 669 if (!doNotCSE(N)) { 670 SDNode *Existing = CSEMap.GetOrInsertNode(N); 671 if (Existing != N) { 672 // If there was already an existing matching node, use ReplaceAllUsesWith 673 // to replace the dead one with the existing one. This can cause 674 // recursive merging of other unrelated nodes down the line. 675 ReplaceAllUsesWith(N, Existing, UpdateListener); 676 677 // N is now dead. Inform the listener if it exists and delete it. 678 if (UpdateListener) 679 UpdateListener->NodeDeleted(N, Existing); 680 DeleteNodeNotInCSEMaps(N); 681 return; 682 } 683 } 684 685 // If the node doesn't already exist, we updated it. Inform a listener if 686 // it exists. 687 if (UpdateListener) 688 UpdateListener->NodeUpdated(N); 689} 690 691/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 692/// were replaced with those specified. If this node is never memoized, 693/// return null, otherwise return a pointer to the slot it would take. If a 694/// node already exists with these operands, the slot will be non-null. 695SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 696 void *&InsertPos) { 697 if (doNotCSE(N)) 698 return 0; 699 700 SDValue Ops[] = { Op }; 701 FoldingSetNodeID ID; 702 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 703 AddNodeIDCustom(ID, N); 704 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 705} 706 707/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 708/// were replaced with those specified. If this node is never memoized, 709/// return null, otherwise return a pointer to the slot it would take. If a 710/// node already exists with these operands, the slot will be non-null. 711SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 712 SDValue Op1, SDValue Op2, 713 void *&InsertPos) { 714 if (doNotCSE(N)) 715 return 0; 716 717 SDValue Ops[] = { Op1, Op2 }; 718 FoldingSetNodeID ID; 719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 720 AddNodeIDCustom(ID, N); 721 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 722} 723 724 725/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 726/// were replaced with those specified. If this node is never memoized, 727/// return null, otherwise return a pointer to the slot it would take. If a 728/// node already exists with these operands, the slot will be non-null. 729SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 730 const SDValue *Ops,unsigned NumOps, 731 void *&InsertPos) { 732 if (doNotCSE(N)) 733 return 0; 734 735 FoldingSetNodeID ID; 736 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 737 AddNodeIDCustom(ID, N); 738 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 739} 740 741/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 742void SelectionDAG::VerifyNode(SDNode *N) { 743 switch (N->getOpcode()) { 744 default: 745 break; 746 case ISD::BUILD_PAIR: { 747 MVT VT = N->getValueType(0); 748 assert(N->getNumValues() == 1 && "Too many results!"); 749 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 750 "Wrong return type!"); 751 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 752 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 753 "Mismatched operand types!"); 754 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 755 "Wrong operand type!"); 756 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 757 "Wrong return type size"); 758 break; 759 } 760 case ISD::BUILD_VECTOR: { 761 assert(N->getNumValues() == 1 && "Too many results!"); 762 assert(N->getValueType(0).isVector() && "Wrong return type!"); 763 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 764 "Wrong number of operands!"); 765 // FIXME: Change vector_shuffle to a variadic node with mask elements being 766 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an 767 // operand, and it is not always possible to legalize it. Turning off the 768 // following checks at least makes it possible to legalize most of the time. 769// MVT EltVT = N->getValueType(0).getVectorElementType(); 770// for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 771// assert(I->getValueType() == EltVT && 772// "Wrong operand type!"); 773 break; 774 } 775 } 776} 777 778/// getMVTAlignment - Compute the default alignment value for the 779/// given type. 780/// 781unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 782 const Type *Ty = VT == MVT::iPTR ? 783 PointerType::get(Type::Int8Ty, 0) : 784 VT.getTypeForMVT(); 785 786 return TLI.getTargetData()->getABITypeAlignment(Ty); 787} 788 789SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 790 : TLI(tli), FLI(fli), 791 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 792 Root(getEntryNode()) { 793 AllNodes.push_back(&EntryNode); 794} 795 796void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 797 DwarfWriter *dw) { 798 MF = &mf; 799 MMI = mmi; 800 DW = dw; 801} 802 803SelectionDAG::~SelectionDAG() { 804 allnodes_clear(); 805} 806 807void SelectionDAG::allnodes_clear() { 808 assert(&*AllNodes.begin() == &EntryNode); 809 AllNodes.remove(AllNodes.begin()); 810 while (!AllNodes.empty()) 811 DeallocateNode(AllNodes.begin()); 812} 813 814void SelectionDAG::clear() { 815 allnodes_clear(); 816 OperandAllocator.Reset(); 817 CSEMap.clear(); 818 819 ExtendedValueTypeNodes.clear(); 820 ExternalSymbols.clear(); 821 TargetExternalSymbols.clear(); 822 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 823 static_cast<CondCodeSDNode*>(0)); 824 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 825 static_cast<SDNode*>(0)); 826 827 EntryNode.UseList = 0; 828 AllNodes.push_back(&EntryNode); 829 Root = getEntryNode(); 830} 831 832SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 833 if (Op.getValueType() == VT) return Op; 834 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 835 VT.getSizeInBits()); 836 return getNode(ISD::AND, Op.getValueType(), Op, 837 getConstant(Imm, Op.getValueType())); 838} 839 840SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) { 841 if (Op.getValueType() == VT) return Op; 842 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 843 VT.getSizeInBits()); 844 return getNode(ISD::AND, DL, Op.getValueType(), Op, 845 getConstant(Imm, Op.getValueType())); 846} 847 848/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 849/// 850SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) { 851 SDValue NegOne; 852 if (VT.isVector()) { 853 MVT EltVT = VT.getVectorElementType(); 854 SDValue NegOneElt = 855 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), EltVT); 856 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt); 857 NegOne = getNode(ISD::BUILD_VECTOR, DebugLoc::getUnknownLoc(), VT, 858 &NegOnes[0], NegOnes.size()); 859 } else { 860 NegOne = getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 861 } 862 return getNode(ISD::XOR, DL, VT, Val, NegOne); 863} 864 865SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 866 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 867 assert((EltVT.getSizeInBits() >= 64 || 868 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 869 "getConstant with a uint64_t value that doesn't fit in the type!"); 870 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 871} 872 873SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 874 return getConstant(*ConstantInt::get(Val), VT, isT); 875} 876 877SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 878 assert(VT.isInteger() && "Cannot create FP integer constant!"); 879 880 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 881 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 882 "APInt size does not match type size!"); 883 884 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 885 FoldingSetNodeID ID; 886 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 887 ID.AddPointer(&Val); 888 void *IP = 0; 889 SDNode *N = NULL; 890 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 891 if (!VT.isVector()) 892 return SDValue(N, 0); 893 if (!N) { 894 N = NodeAllocator.Allocate<ConstantSDNode>(); 895 new (N) ConstantSDNode(isT, &Val, EltVT); 896 CSEMap.InsertNode(N, IP); 897 AllNodes.push_back(N); 898 } 899 900 SDValue Result(N, 0); 901 if (VT.isVector()) { 902 SmallVector<SDValue, 8> Ops; 903 Ops.assign(VT.getVectorNumElements(), Result); 904 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 905 } 906 return Result; 907} 908 909SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 910 return getConstant(Val, TLI.getPointerTy(), isTarget); 911} 912 913 914SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 915 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 916} 917 918SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 919 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 920 921 MVT EltVT = 922 VT.isVector() ? VT.getVectorElementType() : VT; 923 924 // Do the map lookup using the actual bit pattern for the floating point 925 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 926 // we don't have issues with SNANs. 927 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 928 FoldingSetNodeID ID; 929 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 930 ID.AddPointer(&V); 931 void *IP = 0; 932 SDNode *N = NULL; 933 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 934 if (!VT.isVector()) 935 return SDValue(N, 0); 936 if (!N) { 937 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 938 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 939 CSEMap.InsertNode(N, IP); 940 AllNodes.push_back(N); 941 } 942 943 SDValue Result(N, 0); 944 if (VT.isVector()) { 945 SmallVector<SDValue, 8> Ops; 946 Ops.assign(VT.getVectorNumElements(), Result); 947 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 948 } 949 return Result; 950} 951 952SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 953 MVT EltVT = 954 VT.isVector() ? VT.getVectorElementType() : VT; 955 if (EltVT==MVT::f32) 956 return getConstantFP(APFloat((float)Val), VT, isTarget); 957 else 958 return getConstantFP(APFloat(Val), VT, isTarget); 959} 960 961SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 962 MVT VT, int64_t Offset, 963 bool isTargetGA) { 964 unsigned Opc; 965 966 // Truncate (with sign-extension) the offset value to the pointer size. 967 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 968 if (BitWidth < 64) 969 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 970 971 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 972 if (!GVar) { 973 // If GV is an alias then use the aliasee for determining thread-localness. 974 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 975 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 976 } 977 978 if (GVar && GVar->isThreadLocal()) 979 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 980 else 981 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 982 983 FoldingSetNodeID ID; 984 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 985 ID.AddPointer(GV); 986 ID.AddInteger(Offset); 987 void *IP = 0; 988 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 989 return SDValue(E, 0); 990 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 991 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 992 CSEMap.InsertNode(N, IP); 993 AllNodes.push_back(N); 994 return SDValue(N, 0); 995} 996 997SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 998 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 999 FoldingSetNodeID ID; 1000 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1001 ID.AddInteger(FI); 1002 void *IP = 0; 1003 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1004 return SDValue(E, 0); 1005 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1006 new (N) FrameIndexSDNode(FI, VT, isTarget); 1007 CSEMap.InsertNode(N, IP); 1008 AllNodes.push_back(N); 1009 return SDValue(N, 0); 1010} 1011 1012SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 1013 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1014 FoldingSetNodeID ID; 1015 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1016 ID.AddInteger(JTI); 1017 void *IP = 0; 1018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1019 return SDValue(E, 0); 1020 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1021 new (N) JumpTableSDNode(JTI, VT, isTarget); 1022 CSEMap.InsertNode(N, IP); 1023 AllNodes.push_back(N); 1024 return SDValue(N, 0); 1025} 1026 1027SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 1028 unsigned Alignment, int Offset, 1029 bool isTarget) { 1030 if (Alignment == 0) 1031 Alignment = 1032 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1033 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1034 FoldingSetNodeID ID; 1035 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1036 ID.AddInteger(Alignment); 1037 ID.AddInteger(Offset); 1038 ID.AddPointer(C); 1039 void *IP = 0; 1040 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1041 return SDValue(E, 0); 1042 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1043 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1044 CSEMap.InsertNode(N, IP); 1045 AllNodes.push_back(N); 1046 return SDValue(N, 0); 1047} 1048 1049 1050SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1051 unsigned Alignment, int Offset, 1052 bool isTarget) { 1053 if (Alignment == 0) 1054 Alignment = 1055 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1056 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1057 FoldingSetNodeID ID; 1058 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1059 ID.AddInteger(Alignment); 1060 ID.AddInteger(Offset); 1061 C->AddSelectionDAGCSEId(ID); 1062 void *IP = 0; 1063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1064 return SDValue(E, 0); 1065 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1066 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1067 CSEMap.InsertNode(N, IP); 1068 AllNodes.push_back(N); 1069 return SDValue(N, 0); 1070} 1071 1072 1073SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1074 FoldingSetNodeID ID; 1075 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1076 ID.AddPointer(MBB); 1077 void *IP = 0; 1078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1079 return SDValue(E, 0); 1080 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1081 new (N) BasicBlockSDNode(MBB); 1082 CSEMap.InsertNode(N, IP); 1083 AllNodes.push_back(N); 1084 return SDValue(N, 0); 1085} 1086 1087SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB, DebugLoc dl) { 1088 FoldingSetNodeID ID; 1089 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1090 ID.AddPointer(MBB); 1091 void *IP = 0; 1092 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1093 return SDValue(E, 0); 1094 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1095 new (N) BasicBlockSDNode(MBB, dl); 1096 CSEMap.InsertNode(N, IP); 1097 AllNodes.push_back(N); 1098 return SDValue(N, 0); 1099} 1100 1101SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1102 FoldingSetNodeID ID; 1103 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1104 ID.AddInteger(Flags.getRawBits()); 1105 void *IP = 0; 1106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1107 return SDValue(E, 0); 1108 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1109 new (N) ARG_FLAGSSDNode(Flags); 1110 CSEMap.InsertNode(N, IP); 1111 AllNodes.push_back(N); 1112 return SDValue(N, 0); 1113} 1114 1115SDValue SelectionDAG::getValueType(MVT VT) { 1116 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1117 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1118 1119 SDNode *&N = VT.isExtended() ? 1120 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1121 1122 if (N) return SDValue(N, 0); 1123 N = NodeAllocator.Allocate<VTSDNode>(); 1124 new (N) VTSDNode(VT); 1125 AllNodes.push_back(N); 1126 return SDValue(N, 0); 1127} 1128 1129SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1130 SDNode *&N = ExternalSymbols[Sym]; 1131 if (N) return SDValue(N, 0); 1132 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1133 new (N) ExternalSymbolSDNode(false, Sym, VT); 1134 AllNodes.push_back(N); 1135 return SDValue(N, 0); 1136} 1137 1138SDValue SelectionDAG::getExternalSymbol(const char *Sym, DebugLoc dl, MVT VT) { 1139 SDNode *&N = ExternalSymbols[Sym]; 1140 if (N) return SDValue(N, 0); 1141 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1142 new (N) ExternalSymbolSDNode(false, dl, Sym, VT); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1148 SDNode *&N = TargetExternalSymbols[Sym]; 1149 if (N) return SDValue(N, 0); 1150 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1151 new (N) ExternalSymbolSDNode(true, Sym, VT); 1152 AllNodes.push_back(N); 1153 return SDValue(N, 0); 1154} 1155 1156SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, DebugLoc dl, 1157 MVT VT) { 1158 SDNode *&N = TargetExternalSymbols[Sym]; 1159 if (N) return SDValue(N, 0); 1160 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1161 new (N) ExternalSymbolSDNode(true, dl, Sym, VT); 1162 AllNodes.push_back(N); 1163 return SDValue(N, 0); 1164} 1165 1166SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1167 if ((unsigned)Cond >= CondCodeNodes.size()) 1168 CondCodeNodes.resize(Cond+1); 1169 1170 if (CondCodeNodes[Cond] == 0) { 1171 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1172 new (N) CondCodeSDNode(Cond); 1173 CondCodeNodes[Cond] = N; 1174 AllNodes.push_back(N); 1175 } 1176 return SDValue(CondCodeNodes[Cond], 0); 1177} 1178 1179SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, 1180 SDValue STy, SDValue Rnd, SDValue Sat, 1181 ISD::CvtCode Code) { 1182 // If the src and dest types are the same, no conversion is necessary. 1183 if (DTy == STy) 1184 return Val; 1185 1186 FoldingSetNodeID ID; 1187 void* IP = 0; 1188 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1189 return SDValue(E, 0); 1190 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1191 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1192 new (N) CvtRndSatSDNode(VT, Ops, 5, Code); 1193 CSEMap.InsertNode(N, IP); 1194 AllNodes.push_back(N); 1195 return SDValue(N, 0); 1196} 1197 1198SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1199 FoldingSetNodeID ID; 1200 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1201 ID.AddInteger(RegNo); 1202 void *IP = 0; 1203 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1204 return SDValue(E, 0); 1205 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1206 new (N) RegisterSDNode(RegNo, VT); 1207 CSEMap.InsertNode(N, IP); 1208 AllNodes.push_back(N); 1209 return SDValue(N, 0); 1210} 1211 1212SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1213 unsigned Line, unsigned Col, 1214 Value *CU) { 1215 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1216 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1217 AllNodes.push_back(N); 1218 return SDValue(N, 0); 1219} 1220 1221SDValue SelectionDAG::getLabel(unsigned Opcode, 1222 SDValue Root, 1223 unsigned LabelID) { 1224 FoldingSetNodeID ID; 1225 SDValue Ops[] = { Root }; 1226 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1227 ID.AddInteger(LabelID); 1228 void *IP = 0; 1229 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1230 return SDValue(E, 0); 1231 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1232 new (N) LabelSDNode(Opcode, Root, LabelID); 1233 CSEMap.InsertNode(N, IP); 1234 AllNodes.push_back(N); 1235 return SDValue(N, 0); 1236} 1237 1238SDValue SelectionDAG::getLabel(unsigned Opcode, DebugLoc dl, 1239 SDValue Root, 1240 unsigned LabelID) { 1241 FoldingSetNodeID ID; 1242 SDValue Ops[] = { Root }; 1243 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1244 ID.AddInteger(LabelID); 1245 void *IP = 0; 1246 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1247 return SDValue(E, 0); 1248 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1249 new (N) LabelSDNode(Opcode, dl, Root, LabelID); 1250 CSEMap.InsertNode(N, IP); 1251 AllNodes.push_back(N); 1252 return SDValue(N, 0); 1253} 1254 1255SDValue SelectionDAG::getSrcValue(const Value *V) { 1256 assert((!V || isa<PointerType>(V->getType())) && 1257 "SrcValue is not a pointer?"); 1258 1259 FoldingSetNodeID ID; 1260 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1261 ID.AddPointer(V); 1262 1263 void *IP = 0; 1264 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1265 return SDValue(E, 0); 1266 1267 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1268 new (N) SrcValueSDNode(V); 1269 CSEMap.InsertNode(N, IP); 1270 AllNodes.push_back(N); 1271 return SDValue(N, 0); 1272} 1273 1274SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1275#ifndef NDEBUG 1276 const Value *v = MO.getValue(); 1277 assert((!v || isa<PointerType>(v->getType())) && 1278 "SrcValue is not a pointer?"); 1279#endif 1280 1281 FoldingSetNodeID ID; 1282 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1283 MO.Profile(ID); 1284 1285 void *IP = 0; 1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1287 return SDValue(E, 0); 1288 1289 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1290 new (N) MemOperandSDNode(MO); 1291 CSEMap.InsertNode(N, IP); 1292 AllNodes.push_back(N); 1293 return SDValue(N, 0); 1294} 1295 1296/// getShiftAmountOperand - Return the specified value casted to 1297/// the target's desired shift amount type. 1298SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1299 MVT OpTy = Op.getValueType(); 1300 MVT ShTy = TLI.getShiftAmountTy(); 1301 if (OpTy == ShTy || OpTy.isVector()) return Op; 1302 1303 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1304 return getNode(Opcode, ShTy, Op); 1305} 1306 1307/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1308/// specified value type. 1309SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1310 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1311 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1312 const Type *Ty = VT.getTypeForMVT(); 1313 unsigned StackAlign = 1314 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1315 1316 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1317 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1318} 1319 1320/// CreateStackTemporary - Create a stack temporary suitable for holding 1321/// either of the specified value types. 1322SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) { 1323 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1324 VT2.getStoreSizeInBits())/8; 1325 const Type *Ty1 = VT1.getTypeForMVT(); 1326 const Type *Ty2 = VT2.getTypeForMVT(); 1327 const TargetData *TD = TLI.getTargetData(); 1328 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1329 TD->getPrefTypeAlignment(Ty2)); 1330 1331 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1332 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1333 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1334} 1335 1336SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1337 SDValue N2, ISD::CondCode Cond) { 1338 // These setcc operations always fold. 1339 switch (Cond) { 1340 default: break; 1341 case ISD::SETFALSE: 1342 case ISD::SETFALSE2: return getConstant(0, VT); 1343 case ISD::SETTRUE: 1344 case ISD::SETTRUE2: return getConstant(1, VT); 1345 1346 case ISD::SETOEQ: 1347 case ISD::SETOGT: 1348 case ISD::SETOGE: 1349 case ISD::SETOLT: 1350 case ISD::SETOLE: 1351 case ISD::SETONE: 1352 case ISD::SETO: 1353 case ISD::SETUO: 1354 case ISD::SETUEQ: 1355 case ISD::SETUNE: 1356 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1357 break; 1358 } 1359 1360 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1361 const APInt &C2 = N2C->getAPIntValue(); 1362 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1363 const APInt &C1 = N1C->getAPIntValue(); 1364 1365 switch (Cond) { 1366 default: assert(0 && "Unknown integer setcc!"); 1367 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1368 case ISD::SETNE: return getConstant(C1 != C2, VT); 1369 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1370 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1371 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1372 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1373 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1374 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1375 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1376 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1377 } 1378 } 1379 } 1380 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1381 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1382 // No compile time operations on this type yet. 1383 if (N1C->getValueType(0) == MVT::ppcf128) 1384 return SDValue(); 1385 1386 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1387 switch (Cond) { 1388 default: break; 1389 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1390 return getNode(ISD::UNDEF, VT); 1391 // fall through 1392 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1393 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1394 return getNode(ISD::UNDEF, VT); 1395 // fall through 1396 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1397 R==APFloat::cmpLessThan, VT); 1398 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1399 return getNode(ISD::UNDEF, VT); 1400 // fall through 1401 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1402 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1403 return getNode(ISD::UNDEF, VT); 1404 // fall through 1405 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1406 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1407 return getNode(ISD::UNDEF, VT); 1408 // fall through 1409 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1410 R==APFloat::cmpEqual, VT); 1411 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1412 return getNode(ISD::UNDEF, VT); 1413 // fall through 1414 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1415 R==APFloat::cmpEqual, VT); 1416 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1417 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1418 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1419 R==APFloat::cmpEqual, VT); 1420 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1421 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1422 R==APFloat::cmpLessThan, VT); 1423 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1424 R==APFloat::cmpUnordered, VT); 1425 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1426 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1427 } 1428 } else { 1429 // Ensure that the constant occurs on the RHS. 1430 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1431 } 1432 } 1433 1434 // Could not fold it. 1435 return SDValue(); 1436} 1437 1438/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1439/// use this predicate to simplify operations downstream. 1440bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1441 unsigned BitWidth = Op.getValueSizeInBits(); 1442 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1443} 1444 1445/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1446/// this predicate to simplify operations downstream. Mask is known to be zero 1447/// for bits that V cannot have. 1448bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1449 unsigned Depth) const { 1450 APInt KnownZero, KnownOne; 1451 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1452 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1453 return (KnownZero & Mask) == Mask; 1454} 1455 1456/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1457/// known to be either zero or one and return them in the KnownZero/KnownOne 1458/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1459/// processing. 1460void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1461 APInt &KnownZero, APInt &KnownOne, 1462 unsigned Depth) const { 1463 unsigned BitWidth = Mask.getBitWidth(); 1464 assert(BitWidth == Op.getValueType().getSizeInBits() && 1465 "Mask size mismatches value type size!"); 1466 1467 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1468 if (Depth == 6 || Mask == 0) 1469 return; // Limit search depth. 1470 1471 APInt KnownZero2, KnownOne2; 1472 1473 switch (Op.getOpcode()) { 1474 case ISD::Constant: 1475 // We know all of the bits for a constant! 1476 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1477 KnownZero = ~KnownOne & Mask; 1478 return; 1479 case ISD::AND: 1480 // If either the LHS or the RHS are Zero, the result is zero. 1481 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1482 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1483 KnownZero2, KnownOne2, Depth+1); 1484 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1485 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1486 1487 // Output known-1 bits are only known if set in both the LHS & RHS. 1488 KnownOne &= KnownOne2; 1489 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1490 KnownZero |= KnownZero2; 1491 return; 1492 case ISD::OR: 1493 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1494 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1495 KnownZero2, KnownOne2, Depth+1); 1496 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1497 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1498 1499 // Output known-0 bits are only known if clear in both the LHS & RHS. 1500 KnownZero &= KnownZero2; 1501 // Output known-1 are known to be set if set in either the LHS | RHS. 1502 KnownOne |= KnownOne2; 1503 return; 1504 case ISD::XOR: { 1505 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1506 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1507 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1508 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1509 1510 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1511 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1512 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1513 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1514 KnownZero = KnownZeroOut; 1515 return; 1516 } 1517 case ISD::MUL: { 1518 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1519 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1520 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1521 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1522 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1523 1524 // If low bits are zero in either operand, output low known-0 bits. 1525 // Also compute a conserative estimate for high known-0 bits. 1526 // More trickiness is possible, but this is sufficient for the 1527 // interesting case of alignment computation. 1528 KnownOne.clear(); 1529 unsigned TrailZ = KnownZero.countTrailingOnes() + 1530 KnownZero2.countTrailingOnes(); 1531 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1532 KnownZero2.countLeadingOnes(), 1533 BitWidth) - BitWidth; 1534 1535 TrailZ = std::min(TrailZ, BitWidth); 1536 LeadZ = std::min(LeadZ, BitWidth); 1537 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1538 APInt::getHighBitsSet(BitWidth, LeadZ); 1539 KnownZero &= Mask; 1540 return; 1541 } 1542 case ISD::UDIV: { 1543 // For the purposes of computing leading zeros we can conservatively 1544 // treat a udiv as a logical right shift by the power of 2 known to 1545 // be less than the denominator. 1546 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1547 ComputeMaskedBits(Op.getOperand(0), 1548 AllOnes, KnownZero2, KnownOne2, Depth+1); 1549 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1550 1551 KnownOne2.clear(); 1552 KnownZero2.clear(); 1553 ComputeMaskedBits(Op.getOperand(1), 1554 AllOnes, KnownZero2, KnownOne2, Depth+1); 1555 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1556 if (RHSUnknownLeadingOnes != BitWidth) 1557 LeadZ = std::min(BitWidth, 1558 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1559 1560 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1561 return; 1562 } 1563 case ISD::SELECT: 1564 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1565 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1566 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1567 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1568 1569 // Only known if known in both the LHS and RHS. 1570 KnownOne &= KnownOne2; 1571 KnownZero &= KnownZero2; 1572 return; 1573 case ISD::SELECT_CC: 1574 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1575 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1576 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1577 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1578 1579 // Only known if known in both the LHS and RHS. 1580 KnownOne &= KnownOne2; 1581 KnownZero &= KnownZero2; 1582 return; 1583 case ISD::SADDO: 1584 case ISD::UADDO: 1585 case ISD::SSUBO: 1586 case ISD::USUBO: 1587 case ISD::SMULO: 1588 case ISD::UMULO: 1589 if (Op.getResNo() != 1) 1590 return; 1591 // The boolean result conforms to getBooleanContents. Fall through. 1592 case ISD::SETCC: 1593 // If we know the result of a setcc has the top bits zero, use this info. 1594 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1595 BitWidth > 1) 1596 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1597 return; 1598 case ISD::SHL: 1599 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1600 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1601 unsigned ShAmt = SA->getZExtValue(); 1602 1603 // If the shift count is an invalid immediate, don't do anything. 1604 if (ShAmt >= BitWidth) 1605 return; 1606 1607 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1608 KnownZero, KnownOne, Depth+1); 1609 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1610 KnownZero <<= ShAmt; 1611 KnownOne <<= ShAmt; 1612 // low bits known zero. 1613 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1614 } 1615 return; 1616 case ISD::SRL: 1617 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1618 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1619 unsigned ShAmt = SA->getZExtValue(); 1620 1621 // If the shift count is an invalid immediate, don't do anything. 1622 if (ShAmt >= BitWidth) 1623 return; 1624 1625 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1626 KnownZero, KnownOne, Depth+1); 1627 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1628 KnownZero = KnownZero.lshr(ShAmt); 1629 KnownOne = KnownOne.lshr(ShAmt); 1630 1631 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1632 KnownZero |= HighBits; // High bits known zero. 1633 } 1634 return; 1635 case ISD::SRA: 1636 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1637 unsigned ShAmt = SA->getZExtValue(); 1638 1639 // If the shift count is an invalid immediate, don't do anything. 1640 if (ShAmt >= BitWidth) 1641 return; 1642 1643 APInt InDemandedMask = (Mask << ShAmt); 1644 // If any of the demanded bits are produced by the sign extension, we also 1645 // demand the input sign bit. 1646 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1647 if (HighBits.getBoolValue()) 1648 InDemandedMask |= APInt::getSignBit(BitWidth); 1649 1650 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1651 Depth+1); 1652 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1653 KnownZero = KnownZero.lshr(ShAmt); 1654 KnownOne = KnownOne.lshr(ShAmt); 1655 1656 // Handle the sign bits. 1657 APInt SignBit = APInt::getSignBit(BitWidth); 1658 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1659 1660 if (KnownZero.intersects(SignBit)) { 1661 KnownZero |= HighBits; // New bits are known zero. 1662 } else if (KnownOne.intersects(SignBit)) { 1663 KnownOne |= HighBits; // New bits are known one. 1664 } 1665 } 1666 return; 1667 case ISD::SIGN_EXTEND_INREG: { 1668 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1669 unsigned EBits = EVT.getSizeInBits(); 1670 1671 // Sign extension. Compute the demanded bits in the result that are not 1672 // present in the input. 1673 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1674 1675 APInt InSignBit = APInt::getSignBit(EBits); 1676 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1677 1678 // If the sign extended bits are demanded, we know that the sign 1679 // bit is demanded. 1680 InSignBit.zext(BitWidth); 1681 if (NewBits.getBoolValue()) 1682 InputDemandedBits |= InSignBit; 1683 1684 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1685 KnownZero, KnownOne, Depth+1); 1686 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1687 1688 // If the sign bit of the input is known set or clear, then we know the 1689 // top bits of the result. 1690 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1691 KnownZero |= NewBits; 1692 KnownOne &= ~NewBits; 1693 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1694 KnownOne |= NewBits; 1695 KnownZero &= ~NewBits; 1696 } else { // Input sign bit unknown 1697 KnownZero &= ~NewBits; 1698 KnownOne &= ~NewBits; 1699 } 1700 return; 1701 } 1702 case ISD::CTTZ: 1703 case ISD::CTLZ: 1704 case ISD::CTPOP: { 1705 unsigned LowBits = Log2_32(BitWidth)+1; 1706 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1707 KnownOne.clear(); 1708 return; 1709 } 1710 case ISD::LOAD: { 1711 if (ISD::isZEXTLoad(Op.getNode())) { 1712 LoadSDNode *LD = cast<LoadSDNode>(Op); 1713 MVT VT = LD->getMemoryVT(); 1714 unsigned MemBits = VT.getSizeInBits(); 1715 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1716 } 1717 return; 1718 } 1719 case ISD::ZERO_EXTEND: { 1720 MVT InVT = Op.getOperand(0).getValueType(); 1721 unsigned InBits = InVT.getSizeInBits(); 1722 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1723 APInt InMask = Mask; 1724 InMask.trunc(InBits); 1725 KnownZero.trunc(InBits); 1726 KnownOne.trunc(InBits); 1727 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1728 KnownZero.zext(BitWidth); 1729 KnownOne.zext(BitWidth); 1730 KnownZero |= NewBits; 1731 return; 1732 } 1733 case ISD::SIGN_EXTEND: { 1734 MVT InVT = Op.getOperand(0).getValueType(); 1735 unsigned InBits = InVT.getSizeInBits(); 1736 APInt InSignBit = APInt::getSignBit(InBits); 1737 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1738 APInt InMask = Mask; 1739 InMask.trunc(InBits); 1740 1741 // If any of the sign extended bits are demanded, we know that the sign 1742 // bit is demanded. Temporarily set this bit in the mask for our callee. 1743 if (NewBits.getBoolValue()) 1744 InMask |= InSignBit; 1745 1746 KnownZero.trunc(InBits); 1747 KnownOne.trunc(InBits); 1748 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1749 1750 // Note if the sign bit is known to be zero or one. 1751 bool SignBitKnownZero = KnownZero.isNegative(); 1752 bool SignBitKnownOne = KnownOne.isNegative(); 1753 assert(!(SignBitKnownZero && SignBitKnownOne) && 1754 "Sign bit can't be known to be both zero and one!"); 1755 1756 // If the sign bit wasn't actually demanded by our caller, we don't 1757 // want it set in the KnownZero and KnownOne result values. Reset the 1758 // mask and reapply it to the result values. 1759 InMask = Mask; 1760 InMask.trunc(InBits); 1761 KnownZero &= InMask; 1762 KnownOne &= InMask; 1763 1764 KnownZero.zext(BitWidth); 1765 KnownOne.zext(BitWidth); 1766 1767 // If the sign bit is known zero or one, the top bits match. 1768 if (SignBitKnownZero) 1769 KnownZero |= NewBits; 1770 else if (SignBitKnownOne) 1771 KnownOne |= NewBits; 1772 return; 1773 } 1774 case ISD::ANY_EXTEND: { 1775 MVT InVT = Op.getOperand(0).getValueType(); 1776 unsigned InBits = InVT.getSizeInBits(); 1777 APInt InMask = Mask; 1778 InMask.trunc(InBits); 1779 KnownZero.trunc(InBits); 1780 KnownOne.trunc(InBits); 1781 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1782 KnownZero.zext(BitWidth); 1783 KnownOne.zext(BitWidth); 1784 return; 1785 } 1786 case ISD::TRUNCATE: { 1787 MVT InVT = Op.getOperand(0).getValueType(); 1788 unsigned InBits = InVT.getSizeInBits(); 1789 APInt InMask = Mask; 1790 InMask.zext(InBits); 1791 KnownZero.zext(InBits); 1792 KnownOne.zext(InBits); 1793 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1794 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1795 KnownZero.trunc(BitWidth); 1796 KnownOne.trunc(BitWidth); 1797 break; 1798 } 1799 case ISD::AssertZext: { 1800 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1801 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1802 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1803 KnownOne, Depth+1); 1804 KnownZero |= (~InMask) & Mask; 1805 return; 1806 } 1807 case ISD::FGETSIGN: 1808 // All bits are zero except the low bit. 1809 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1810 return; 1811 1812 case ISD::SUB: { 1813 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1814 // We know that the top bits of C-X are clear if X contains less bits 1815 // than C (i.e. no wrap-around can happen). For example, 20-X is 1816 // positive if we can prove that X is >= 0 and < 16. 1817 if (CLHS->getAPIntValue().isNonNegative()) { 1818 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1819 // NLZ can't be BitWidth with no sign bit 1820 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1821 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1822 Depth+1); 1823 1824 // If all of the MaskV bits are known to be zero, then we know the 1825 // output top bits are zero, because we now know that the output is 1826 // from [0-C]. 1827 if ((KnownZero2 & MaskV) == MaskV) { 1828 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1829 // Top bits known zero. 1830 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1831 } 1832 } 1833 } 1834 } 1835 // fall through 1836 case ISD::ADD: { 1837 // Output known-0 bits are known if clear or set in both the low clear bits 1838 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1839 // low 3 bits clear. 1840 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1841 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1842 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1843 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1844 1845 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1846 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1847 KnownZeroOut = std::min(KnownZeroOut, 1848 KnownZero2.countTrailingOnes()); 1849 1850 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1851 return; 1852 } 1853 case ISD::SREM: 1854 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1855 const APInt &RA = Rem->getAPIntValue(); 1856 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1857 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1858 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1859 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1860 1861 // If the sign bit of the first operand is zero, the sign bit of 1862 // the result is zero. If the first operand has no one bits below 1863 // the second operand's single 1 bit, its sign will be zero. 1864 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1865 KnownZero2 |= ~LowBits; 1866 1867 KnownZero |= KnownZero2 & Mask; 1868 1869 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1870 } 1871 } 1872 return; 1873 case ISD::UREM: { 1874 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1875 const APInt &RA = Rem->getAPIntValue(); 1876 if (RA.isPowerOf2()) { 1877 APInt LowBits = (RA - 1); 1878 APInt Mask2 = LowBits & Mask; 1879 KnownZero |= ~LowBits & Mask; 1880 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1881 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1882 break; 1883 } 1884 } 1885 1886 // Since the result is less than or equal to either operand, any leading 1887 // zero bits in either operand must also exist in the result. 1888 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1889 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1890 Depth+1); 1891 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1892 Depth+1); 1893 1894 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1895 KnownZero2.countLeadingOnes()); 1896 KnownOne.clear(); 1897 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1898 return; 1899 } 1900 default: 1901 // Allow the target to implement this method for its nodes. 1902 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1903 case ISD::INTRINSIC_WO_CHAIN: 1904 case ISD::INTRINSIC_W_CHAIN: 1905 case ISD::INTRINSIC_VOID: 1906 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1907 } 1908 return; 1909 } 1910} 1911 1912/// ComputeNumSignBits - Return the number of times the sign bit of the 1913/// register is replicated into the other bits. We know that at least 1 bit 1914/// is always equal to the sign bit (itself), but other cases can give us 1915/// information. For example, immediately after an "SRA X, 2", we know that 1916/// the top 3 bits are all equal to each other, so we return 3. 1917unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1918 MVT VT = Op.getValueType(); 1919 assert(VT.isInteger() && "Invalid VT!"); 1920 unsigned VTBits = VT.getSizeInBits(); 1921 unsigned Tmp, Tmp2; 1922 unsigned FirstAnswer = 1; 1923 1924 if (Depth == 6) 1925 return 1; // Limit search depth. 1926 1927 switch (Op.getOpcode()) { 1928 default: break; 1929 case ISD::AssertSext: 1930 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1931 return VTBits-Tmp+1; 1932 case ISD::AssertZext: 1933 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1934 return VTBits-Tmp; 1935 1936 case ISD::Constant: { 1937 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1938 // If negative, return # leading ones. 1939 if (Val.isNegative()) 1940 return Val.countLeadingOnes(); 1941 1942 // Return # leading zeros. 1943 return Val.countLeadingZeros(); 1944 } 1945 1946 case ISD::SIGN_EXTEND: 1947 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1948 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1949 1950 case ISD::SIGN_EXTEND_INREG: 1951 // Max of the input and what this extends. 1952 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1953 Tmp = VTBits-Tmp+1; 1954 1955 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1956 return std::max(Tmp, Tmp2); 1957 1958 case ISD::SRA: 1959 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1960 // SRA X, C -> adds C sign bits. 1961 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1962 Tmp += C->getZExtValue(); 1963 if (Tmp > VTBits) Tmp = VTBits; 1964 } 1965 return Tmp; 1966 case ISD::SHL: 1967 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1968 // shl destroys sign bits. 1969 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1970 if (C->getZExtValue() >= VTBits || // Bad shift. 1971 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1972 return Tmp - C->getZExtValue(); 1973 } 1974 break; 1975 case ISD::AND: 1976 case ISD::OR: 1977 case ISD::XOR: // NOT is handled here. 1978 // Logical binary ops preserve the number of sign bits at the worst. 1979 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1980 if (Tmp != 1) { 1981 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1982 FirstAnswer = std::min(Tmp, Tmp2); 1983 // We computed what we know about the sign bits as our first 1984 // answer. Now proceed to the generic code that uses 1985 // ComputeMaskedBits, and pick whichever answer is better. 1986 } 1987 break; 1988 1989 case ISD::SELECT: 1990 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1991 if (Tmp == 1) return 1; // Early out. 1992 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1993 return std::min(Tmp, Tmp2); 1994 1995 case ISD::SADDO: 1996 case ISD::UADDO: 1997 case ISD::SSUBO: 1998 case ISD::USUBO: 1999 case ISD::SMULO: 2000 case ISD::UMULO: 2001 if (Op.getResNo() != 1) 2002 break; 2003 // The boolean result conforms to getBooleanContents. Fall through. 2004 case ISD::SETCC: 2005 // If setcc returns 0/-1, all bits are sign bits. 2006 if (TLI.getBooleanContents() == 2007 TargetLowering::ZeroOrNegativeOneBooleanContent) 2008 return VTBits; 2009 break; 2010 case ISD::ROTL: 2011 case ISD::ROTR: 2012 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2013 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2014 2015 // Handle rotate right by N like a rotate left by 32-N. 2016 if (Op.getOpcode() == ISD::ROTR) 2017 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2018 2019 // If we aren't rotating out all of the known-in sign bits, return the 2020 // number that are left. This handles rotl(sext(x), 1) for example. 2021 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2022 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2023 } 2024 break; 2025 case ISD::ADD: 2026 // Add can have at most one carry bit. Thus we know that the output 2027 // is, at worst, one more bit than the inputs. 2028 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2029 if (Tmp == 1) return 1; // Early out. 2030 2031 // Special case decrementing a value (ADD X, -1): 2032 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2033 if (CRHS->isAllOnesValue()) { 2034 APInt KnownZero, KnownOne; 2035 APInt Mask = APInt::getAllOnesValue(VTBits); 2036 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2037 2038 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2039 // sign bits set. 2040 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2041 return VTBits; 2042 2043 // If we are subtracting one from a positive number, there is no carry 2044 // out of the result. 2045 if (KnownZero.isNegative()) 2046 return Tmp; 2047 } 2048 2049 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2050 if (Tmp2 == 1) return 1; 2051 return std::min(Tmp, Tmp2)-1; 2052 break; 2053 2054 case ISD::SUB: 2055 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2056 if (Tmp2 == 1) return 1; 2057 2058 // Handle NEG. 2059 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2060 if (CLHS->isNullValue()) { 2061 APInt KnownZero, KnownOne; 2062 APInt Mask = APInt::getAllOnesValue(VTBits); 2063 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2064 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2065 // sign bits set. 2066 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2067 return VTBits; 2068 2069 // If the input is known to be positive (the sign bit is known clear), 2070 // the output of the NEG has the same number of sign bits as the input. 2071 if (KnownZero.isNegative()) 2072 return Tmp2; 2073 2074 // Otherwise, we treat this like a SUB. 2075 } 2076 2077 // Sub can have at most one carry bit. Thus we know that the output 2078 // is, at worst, one more bit than the inputs. 2079 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2080 if (Tmp == 1) return 1; // Early out. 2081 return std::min(Tmp, Tmp2)-1; 2082 break; 2083 case ISD::TRUNCATE: 2084 // FIXME: it's tricky to do anything useful for this, but it is an important 2085 // case for targets like X86. 2086 break; 2087 } 2088 2089 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2090 if (Op.getOpcode() == ISD::LOAD) { 2091 LoadSDNode *LD = cast<LoadSDNode>(Op); 2092 unsigned ExtType = LD->getExtensionType(); 2093 switch (ExtType) { 2094 default: break; 2095 case ISD::SEXTLOAD: // '17' bits known 2096 Tmp = LD->getMemoryVT().getSizeInBits(); 2097 return VTBits-Tmp+1; 2098 case ISD::ZEXTLOAD: // '16' bits known 2099 Tmp = LD->getMemoryVT().getSizeInBits(); 2100 return VTBits-Tmp; 2101 } 2102 } 2103 2104 // Allow the target to implement this method for its nodes. 2105 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2106 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2107 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2108 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2109 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2110 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2111 } 2112 2113 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2114 // use this information. 2115 APInt KnownZero, KnownOne; 2116 APInt Mask = APInt::getAllOnesValue(VTBits); 2117 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2118 2119 if (KnownZero.isNegative()) { // sign bit is 0 2120 Mask = KnownZero; 2121 } else if (KnownOne.isNegative()) { // sign bit is 1; 2122 Mask = KnownOne; 2123 } else { 2124 // Nothing known. 2125 return FirstAnswer; 2126 } 2127 2128 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2129 // the number of identical bits in the top of the input value. 2130 Mask = ~Mask; 2131 Mask <<= Mask.getBitWidth()-VTBits; 2132 // Return # leading zeros. We use 'min' here in case Val was zero before 2133 // shifting. We don't want to return '64' as for an i32 "0". 2134 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2135} 2136 2137 2138bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2139 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2140 if (!GA) return false; 2141 if (GA->getOffset() != 0) return false; 2142 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2143 if (!GV) return false; 2144 MachineModuleInfo *MMI = getMachineModuleInfo(); 2145 return MMI && MMI->hasDebugInfo(); 2146} 2147 2148 2149/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2150/// element of the result of the vector shuffle. 2151SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2152 MVT VT = N->getValueType(0); 2153 SDValue PermMask = N->getOperand(2); 2154 SDValue Idx = PermMask.getOperand(i); 2155 if (Idx.getOpcode() == ISD::UNDEF) 2156 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2157 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2158 unsigned NumElems = PermMask.getNumOperands(); 2159 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2160 Index %= NumElems; 2161 2162 if (V.getOpcode() == ISD::BIT_CONVERT) { 2163 V = V.getOperand(0); 2164 MVT VVT = V.getValueType(); 2165 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems) 2166 return SDValue(); 2167 } 2168 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2169 return (Index == 0) ? V.getOperand(0) 2170 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2171 if (V.getOpcode() == ISD::BUILD_VECTOR) 2172 return V.getOperand(Index); 2173 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2174 return getShuffleScalarElt(V.getNode(), Index); 2175 return SDValue(); 2176} 2177 2178 2179/// getNode - Gets or creates the specified node. 2180/// 2181SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2182 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT); 2183} 2184 2185SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) { 2186 FoldingSetNodeID ID; 2187 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2188 void *IP = 0; 2189 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2190 return SDValue(E, 0); 2191 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2192 new (N) SDNode(Opcode, DL, SDNode::getSDVTList(VT)); 2193 CSEMap.InsertNode(N, IP); 2194 2195 AllNodes.push_back(N); 2196#ifndef NDEBUG 2197 VerifyNode(N); 2198#endif 2199 return SDValue(N, 0); 2200} 2201 2202SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2203 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Operand); 2204} 2205 2206SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2207 MVT VT, SDValue Operand) { 2208 // Constant fold unary operations with an integer constant operand. 2209 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2210 const APInt &Val = C->getAPIntValue(); 2211 unsigned BitWidth = VT.getSizeInBits(); 2212 switch (Opcode) { 2213 default: break; 2214 case ISD::SIGN_EXTEND: 2215 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2216 case ISD::ANY_EXTEND: 2217 case ISD::ZERO_EXTEND: 2218 case ISD::TRUNCATE: 2219 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2220 case ISD::UINT_TO_FP: 2221 case ISD::SINT_TO_FP: { 2222 const uint64_t zero[] = {0, 0}; 2223 // No compile time operations on this type. 2224 if (VT==MVT::ppcf128) 2225 break; 2226 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2227 (void)apf.convertFromAPInt(Val, 2228 Opcode==ISD::SINT_TO_FP, 2229 APFloat::rmNearestTiesToEven); 2230 return getConstantFP(apf, VT); 2231 } 2232 case ISD::BIT_CONVERT: 2233 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2234 return getConstantFP(Val.bitsToFloat(), VT); 2235 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2236 return getConstantFP(Val.bitsToDouble(), VT); 2237 break; 2238 case ISD::BSWAP: 2239 return getConstant(Val.byteSwap(), VT); 2240 case ISD::CTPOP: 2241 return getConstant(Val.countPopulation(), VT); 2242 case ISD::CTLZ: 2243 return getConstant(Val.countLeadingZeros(), VT); 2244 case ISD::CTTZ: 2245 return getConstant(Val.countTrailingZeros(), VT); 2246 } 2247 } 2248 2249 // Constant fold unary operations with a floating point constant operand. 2250 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2251 APFloat V = C->getValueAPF(); // make copy 2252 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2253 switch (Opcode) { 2254 case ISD::FNEG: 2255 V.changeSign(); 2256 return getConstantFP(V, VT); 2257 case ISD::FABS: 2258 V.clearSign(); 2259 return getConstantFP(V, VT); 2260 case ISD::FP_ROUND: 2261 case ISD::FP_EXTEND: { 2262 bool ignored; 2263 // This can return overflow, underflow, or inexact; we don't care. 2264 // FIXME need to be more flexible about rounding mode. 2265 (void)V.convert(*MVTToAPFloatSemantics(VT), 2266 APFloat::rmNearestTiesToEven, &ignored); 2267 return getConstantFP(V, VT); 2268 } 2269 case ISD::FP_TO_SINT: 2270 case ISD::FP_TO_UINT: { 2271 integerPart x; 2272 bool ignored; 2273 assert(integerPartWidth >= 64); 2274 // FIXME need to be more flexible about rounding mode. 2275 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2276 Opcode==ISD::FP_TO_SINT, 2277 APFloat::rmTowardZero, &ignored); 2278 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2279 break; 2280 return getConstant(x, VT); 2281 } 2282 case ISD::BIT_CONVERT: 2283 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2284 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2285 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2286 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2287 break; 2288 } 2289 } 2290 } 2291 2292 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2293 switch (Opcode) { 2294 case ISD::TokenFactor: 2295 case ISD::MERGE_VALUES: 2296 case ISD::CONCAT_VECTORS: 2297 return Operand; // Factor, merge or concat of one node? No need. 2298 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2299 case ISD::FP_EXTEND: 2300 assert(VT.isFloatingPoint() && 2301 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2302 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2303 if (Operand.getOpcode() == ISD::UNDEF) 2304 return getNode(ISD::UNDEF, VT); 2305 break; 2306 case ISD::SIGN_EXTEND: 2307 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2308 "Invalid SIGN_EXTEND!"); 2309 if (Operand.getValueType() == VT) return Operand; // noop extension 2310 assert(Operand.getValueType().bitsLT(VT) 2311 && "Invalid sext node, dst < src!"); 2312 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2313 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2314 break; 2315 case ISD::ZERO_EXTEND: 2316 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2317 "Invalid ZERO_EXTEND!"); 2318 if (Operand.getValueType() == VT) return Operand; // noop extension 2319 assert(Operand.getValueType().bitsLT(VT) 2320 && "Invalid zext node, dst < src!"); 2321 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2322 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2323 break; 2324 case ISD::ANY_EXTEND: 2325 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2326 "Invalid ANY_EXTEND!"); 2327 if (Operand.getValueType() == VT) return Operand; // noop extension 2328 assert(Operand.getValueType().bitsLT(VT) 2329 && "Invalid anyext node, dst < src!"); 2330 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2331 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2332 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2333 break; 2334 case ISD::TRUNCATE: 2335 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2336 "Invalid TRUNCATE!"); 2337 if (Operand.getValueType() == VT) return Operand; // noop truncate 2338 assert(Operand.getValueType().bitsGT(VT) 2339 && "Invalid truncate node, src < dst!"); 2340 if (OpOpcode == ISD::TRUNCATE) 2341 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2342 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2343 OpOpcode == ISD::ANY_EXTEND) { 2344 // If the source is smaller than the dest, we still need an extend. 2345 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2346 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2347 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2348 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2349 else 2350 return Operand.getNode()->getOperand(0); 2351 } 2352 break; 2353 case ISD::BIT_CONVERT: 2354 // Basic sanity checking. 2355 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2356 && "Cannot BIT_CONVERT between types of different sizes!"); 2357 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2358 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2359 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2360 if (OpOpcode == ISD::UNDEF) 2361 return getNode(ISD::UNDEF, VT); 2362 break; 2363 case ISD::SCALAR_TO_VECTOR: 2364 assert(VT.isVector() && !Operand.getValueType().isVector() && 2365 VT.getVectorElementType() == Operand.getValueType() && 2366 "Illegal SCALAR_TO_VECTOR node!"); 2367 if (OpOpcode == ISD::UNDEF) 2368 return getNode(ISD::UNDEF, VT); 2369 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2370 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2371 isa<ConstantSDNode>(Operand.getOperand(1)) && 2372 Operand.getConstantOperandVal(1) == 0 && 2373 Operand.getOperand(0).getValueType() == VT) 2374 return Operand.getOperand(0); 2375 break; 2376 case ISD::FNEG: 2377 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2378 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2379 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2380 Operand.getNode()->getOperand(0)); 2381 if (OpOpcode == ISD::FNEG) // --X -> X 2382 return Operand.getNode()->getOperand(0); 2383 break; 2384 case ISD::FABS: 2385 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2386 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2387 break; 2388 } 2389 2390 SDNode *N; 2391 SDVTList VTs = getVTList(VT); 2392 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2393 FoldingSetNodeID ID; 2394 SDValue Ops[1] = { Operand }; 2395 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2396 void *IP = 0; 2397 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2398 return SDValue(E, 0); 2399 N = NodeAllocator.Allocate<UnarySDNode>(); 2400 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2401 CSEMap.InsertNode(N, IP); 2402 } else { 2403 N = NodeAllocator.Allocate<UnarySDNode>(); 2404 new (N) UnarySDNode(Opcode, DL, VTs, Operand); 2405 } 2406 2407 AllNodes.push_back(N); 2408#ifndef NDEBUG 2409 VerifyNode(N); 2410#endif 2411 return SDValue(N, 0); 2412} 2413 2414SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2415 MVT VT, 2416 ConstantSDNode *Cst1, 2417 ConstantSDNode *Cst2) { 2418 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2419 2420 switch (Opcode) { 2421 case ISD::ADD: return getConstant(C1 + C2, VT); 2422 case ISD::SUB: return getConstant(C1 - C2, VT); 2423 case ISD::MUL: return getConstant(C1 * C2, VT); 2424 case ISD::UDIV: 2425 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2426 break; 2427 case ISD::UREM: 2428 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2429 break; 2430 case ISD::SDIV: 2431 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2432 break; 2433 case ISD::SREM: 2434 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2435 break; 2436 case ISD::AND: return getConstant(C1 & C2, VT); 2437 case ISD::OR: return getConstant(C1 | C2, VT); 2438 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2439 case ISD::SHL: return getConstant(C1 << C2, VT); 2440 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2441 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2442 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2443 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2444 default: break; 2445 } 2446 2447 return SDValue(); 2448} 2449 2450SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2451 SDValue N1, SDValue N2) { 2452 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2); 2453} 2454 2455SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2456 SDValue N1, SDValue N2) { 2457 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2458 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2459 switch (Opcode) { 2460 default: break; 2461 case ISD::TokenFactor: 2462 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2463 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2464 // Fold trivial token factors. 2465 if (N1.getOpcode() == ISD::EntryToken) return N2; 2466 if (N2.getOpcode() == ISD::EntryToken) return N1; 2467 if (N1 == N2) return N1; 2468 break; 2469 case ISD::CONCAT_VECTORS: 2470 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2471 // one big BUILD_VECTOR. 2472 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2473 N2.getOpcode() == ISD::BUILD_VECTOR) { 2474 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2475 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2476 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2477 } 2478 break; 2479 case ISD::AND: 2480 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2481 N1.getValueType() == VT && "Binary operator types must match!"); 2482 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2483 // worth handling here. 2484 if (N2C && N2C->isNullValue()) 2485 return N2; 2486 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2487 return N1; 2488 break; 2489 case ISD::OR: 2490 case ISD::XOR: 2491 case ISD::ADD: 2492 case ISD::SUB: 2493 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2494 N1.getValueType() == VT && "Binary operator types must match!"); 2495 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2496 // it's worth handling here. 2497 if (N2C && N2C->isNullValue()) 2498 return N1; 2499 break; 2500 case ISD::UDIV: 2501 case ISD::UREM: 2502 case ISD::MULHU: 2503 case ISD::MULHS: 2504 case ISD::MUL: 2505 case ISD::SDIV: 2506 case ISD::SREM: 2507 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2508 // fall through 2509 case ISD::FADD: 2510 case ISD::FSUB: 2511 case ISD::FMUL: 2512 case ISD::FDIV: 2513 case ISD::FREM: 2514 if (UnsafeFPMath) { 2515 if (Opcode == ISD::FADD) { 2516 // 0+x --> x 2517 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2518 if (CFP->getValueAPF().isZero()) 2519 return N2; 2520 // x+0 --> x 2521 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2522 if (CFP->getValueAPF().isZero()) 2523 return N1; 2524 } else if (Opcode == ISD::FSUB) { 2525 // x-0 --> x 2526 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2527 if (CFP->getValueAPF().isZero()) 2528 return N1; 2529 } 2530 } 2531 assert(N1.getValueType() == N2.getValueType() && 2532 N1.getValueType() == VT && "Binary operator types must match!"); 2533 break; 2534 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2535 assert(N1.getValueType() == VT && 2536 N1.getValueType().isFloatingPoint() && 2537 N2.getValueType().isFloatingPoint() && 2538 "Invalid FCOPYSIGN!"); 2539 break; 2540 case ISD::SHL: 2541 case ISD::SRA: 2542 case ISD::SRL: 2543 case ISD::ROTL: 2544 case ISD::ROTR: 2545 assert(VT == N1.getValueType() && 2546 "Shift operators return type must be the same as their first arg"); 2547 assert(VT.isInteger() && N2.getValueType().isInteger() && 2548 "Shifts only work on integers"); 2549 2550 // Always fold shifts of i1 values so the code generator doesn't need to 2551 // handle them. Since we know the size of the shift has to be less than the 2552 // size of the value, the shift/rotate count is guaranteed to be zero. 2553 if (VT == MVT::i1) 2554 return N1; 2555 break; 2556 case ISD::FP_ROUND_INREG: { 2557 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2558 assert(VT == N1.getValueType() && "Not an inreg round!"); 2559 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2560 "Cannot FP_ROUND_INREG integer types"); 2561 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2562 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2563 break; 2564 } 2565 case ISD::FP_ROUND: 2566 assert(VT.isFloatingPoint() && 2567 N1.getValueType().isFloatingPoint() && 2568 VT.bitsLE(N1.getValueType()) && 2569 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2570 if (N1.getValueType() == VT) return N1; // noop conversion. 2571 break; 2572 case ISD::AssertSext: 2573 case ISD::AssertZext: { 2574 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2575 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2576 assert(VT.isInteger() && EVT.isInteger() && 2577 "Cannot *_EXTEND_INREG FP types"); 2578 assert(EVT.bitsLE(VT) && "Not extending!"); 2579 if (VT == EVT) return N1; // noop assertion. 2580 break; 2581 } 2582 case ISD::SIGN_EXTEND_INREG: { 2583 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2584 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2585 assert(VT.isInteger() && EVT.isInteger() && 2586 "Cannot *_EXTEND_INREG FP types"); 2587 assert(EVT.bitsLE(VT) && "Not extending!"); 2588 if (EVT == VT) return N1; // Not actually extending 2589 2590 if (N1C) { 2591 APInt Val = N1C->getAPIntValue(); 2592 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2593 Val <<= Val.getBitWidth()-FromBits; 2594 Val = Val.ashr(Val.getBitWidth()-FromBits); 2595 return getConstant(Val, VT); 2596 } 2597 break; 2598 } 2599 case ISD::EXTRACT_VECTOR_ELT: 2600 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2601 if (N1.getOpcode() == ISD::UNDEF) 2602 return getNode(ISD::UNDEF, VT); 2603 2604 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2605 // expanding copies of large vectors from registers. 2606 if (N2C && 2607 N1.getOpcode() == ISD::CONCAT_VECTORS && 2608 N1.getNumOperands() > 0) { 2609 unsigned Factor = 2610 N1.getOperand(0).getValueType().getVectorNumElements(); 2611 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2612 N1.getOperand(N2C->getZExtValue() / Factor), 2613 getConstant(N2C->getZExtValue() % Factor, 2614 N2.getValueType())); 2615 } 2616 2617 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2618 // expanding large vector constants. 2619 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2620 return N1.getOperand(N2C->getZExtValue()); 2621 2622 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2623 // operations are lowered to scalars. 2624 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2625 // If the indices are the same, return the inserted element. 2626 if (N1.getOperand(2) == N2) 2627 return N1.getOperand(1); 2628 // If the indices are known different, extract the element from 2629 // the original vector. 2630 else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2631 isa<ConstantSDNode>(N2)) 2632 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2633 } 2634 break; 2635 case ISD::EXTRACT_ELEMENT: 2636 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2637 assert(!N1.getValueType().isVector() && !VT.isVector() && 2638 (N1.getValueType().isInteger() == VT.isInteger()) && 2639 "Wrong types for EXTRACT_ELEMENT!"); 2640 2641 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2642 // 64-bit integers into 32-bit parts. Instead of building the extract of 2643 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2644 if (N1.getOpcode() == ISD::BUILD_PAIR) 2645 return N1.getOperand(N2C->getZExtValue()); 2646 2647 // EXTRACT_ELEMENT of a constant int is also very common. 2648 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2649 unsigned ElementSize = VT.getSizeInBits(); 2650 unsigned Shift = ElementSize * N2C->getZExtValue(); 2651 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2652 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2653 } 2654 break; 2655 case ISD::EXTRACT_SUBVECTOR: 2656 if (N1.getValueType() == VT) // Trivial extraction. 2657 return N1; 2658 break; 2659 } 2660 2661 if (N1C) { 2662 if (N2C) { 2663 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2664 if (SV.getNode()) return SV; 2665 } else { // Cannonicalize constant to RHS if commutative 2666 if (isCommutativeBinOp(Opcode)) { 2667 std::swap(N1C, N2C); 2668 std::swap(N1, N2); 2669 } 2670 } 2671 } 2672 2673 // Constant fold FP operations. 2674 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2675 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2676 if (N1CFP) { 2677 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2678 // Cannonicalize constant to RHS if commutative 2679 std::swap(N1CFP, N2CFP); 2680 std::swap(N1, N2); 2681 } else if (N2CFP && VT != MVT::ppcf128) { 2682 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2683 APFloat::opStatus s; 2684 switch (Opcode) { 2685 case ISD::FADD: 2686 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2687 if (s != APFloat::opInvalidOp) 2688 return getConstantFP(V1, VT); 2689 break; 2690 case ISD::FSUB: 2691 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2692 if (s!=APFloat::opInvalidOp) 2693 return getConstantFP(V1, VT); 2694 break; 2695 case ISD::FMUL: 2696 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2697 if (s!=APFloat::opInvalidOp) 2698 return getConstantFP(V1, VT); 2699 break; 2700 case ISD::FDIV: 2701 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2702 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2703 return getConstantFP(V1, VT); 2704 break; 2705 case ISD::FREM : 2706 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2707 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2708 return getConstantFP(V1, VT); 2709 break; 2710 case ISD::FCOPYSIGN: 2711 V1.copySign(V2); 2712 return getConstantFP(V1, VT); 2713 default: break; 2714 } 2715 } 2716 } 2717 2718 // Canonicalize an UNDEF to the RHS, even over a constant. 2719 if (N1.getOpcode() == ISD::UNDEF) { 2720 if (isCommutativeBinOp(Opcode)) { 2721 std::swap(N1, N2); 2722 } else { 2723 switch (Opcode) { 2724 case ISD::FP_ROUND_INREG: 2725 case ISD::SIGN_EXTEND_INREG: 2726 case ISD::SUB: 2727 case ISD::FSUB: 2728 case ISD::FDIV: 2729 case ISD::FREM: 2730 case ISD::SRA: 2731 return N1; // fold op(undef, arg2) -> undef 2732 case ISD::UDIV: 2733 case ISD::SDIV: 2734 case ISD::UREM: 2735 case ISD::SREM: 2736 case ISD::SRL: 2737 case ISD::SHL: 2738 if (!VT.isVector()) 2739 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2740 // For vectors, we can't easily build an all zero vector, just return 2741 // the LHS. 2742 return N2; 2743 } 2744 } 2745 } 2746 2747 // Fold a bunch of operators when the RHS is undef. 2748 if (N2.getOpcode() == ISD::UNDEF) { 2749 switch (Opcode) { 2750 case ISD::XOR: 2751 if (N1.getOpcode() == ISD::UNDEF) 2752 // Handle undef ^ undef -> 0 special case. This is a common 2753 // idiom (misuse). 2754 return getConstant(0, VT); 2755 // fallthrough 2756 case ISD::ADD: 2757 case ISD::ADDC: 2758 case ISD::ADDE: 2759 case ISD::SUB: 2760 case ISD::FADD: 2761 case ISD::FSUB: 2762 case ISD::FMUL: 2763 case ISD::FDIV: 2764 case ISD::FREM: 2765 case ISD::UDIV: 2766 case ISD::SDIV: 2767 case ISD::UREM: 2768 case ISD::SREM: 2769 return N2; // fold op(arg1, undef) -> undef 2770 case ISD::MUL: 2771 case ISD::AND: 2772 case ISD::SRL: 2773 case ISD::SHL: 2774 if (!VT.isVector()) 2775 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2776 // For vectors, we can't easily build an all zero vector, just return 2777 // the LHS. 2778 return N1; 2779 case ISD::OR: 2780 if (!VT.isVector()) 2781 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2782 // For vectors, we can't easily build an all one vector, just return 2783 // the LHS. 2784 return N1; 2785 case ISD::SRA: 2786 return N1; 2787 } 2788 } 2789 2790 // Memoize this node if possible. 2791 SDNode *N; 2792 SDVTList VTs = getVTList(VT); 2793 if (VT != MVT::Flag) { 2794 SDValue Ops[] = { N1, N2 }; 2795 FoldingSetNodeID ID; 2796 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2797 void *IP = 0; 2798 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2799 return SDValue(E, 0); 2800 N = NodeAllocator.Allocate<BinarySDNode>(); 2801 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2802 CSEMap.InsertNode(N, IP); 2803 } else { 2804 N = NodeAllocator.Allocate<BinarySDNode>(); 2805 new (N) BinarySDNode(Opcode, DL, VTs, N1, N2); 2806 } 2807 2808 AllNodes.push_back(N); 2809#ifndef NDEBUG 2810 VerifyNode(N); 2811#endif 2812 return SDValue(N, 0); 2813} 2814 2815SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2816 SDValue N1, SDValue N2, SDValue N3) { 2817 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3); 2818} 2819 2820SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2821 SDValue N1, SDValue N2, SDValue N3) { 2822 // Perform various simplifications. 2823 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2824 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2825 switch (Opcode) { 2826 case ISD::CONCAT_VECTORS: 2827 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2828 // one big BUILD_VECTOR. 2829 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2830 N2.getOpcode() == ISD::BUILD_VECTOR && 2831 N3.getOpcode() == ISD::BUILD_VECTOR) { 2832 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2833 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2834 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2835 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2836 } 2837 break; 2838 case ISD::SETCC: { 2839 // Use FoldSetCC to simplify SETCC's. 2840 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2841 if (Simp.getNode()) return Simp; 2842 break; 2843 } 2844 case ISD::SELECT: 2845 if (N1C) { 2846 if (N1C->getZExtValue()) 2847 return N2; // select true, X, Y -> X 2848 else 2849 return N3; // select false, X, Y -> Y 2850 } 2851 2852 if (N2 == N3) return N2; // select C, X, X -> X 2853 break; 2854 case ISD::BRCOND: 2855 if (N2C) { 2856 if (N2C->getZExtValue()) // Unconditional branch 2857 return getNode(ISD::BR, MVT::Other, N1, N3); 2858 else 2859 return N1; // Never-taken branch 2860 } 2861 break; 2862 case ISD::VECTOR_SHUFFLE: 2863 assert(N1.getValueType() == N2.getValueType() && 2864 N1.getValueType().isVector() && 2865 VT.isVector() && N3.getValueType().isVector() && 2866 N3.getOpcode() == ISD::BUILD_VECTOR && 2867 VT.getVectorNumElements() == N3.getNumOperands() && 2868 "Illegal VECTOR_SHUFFLE node!"); 2869 break; 2870 case ISD::BIT_CONVERT: 2871 // Fold bit_convert nodes from a type to themselves. 2872 if (N1.getValueType() == VT) 2873 return N1; 2874 break; 2875 } 2876 2877 // Memoize node if it doesn't produce a flag. 2878 SDNode *N; 2879 SDVTList VTs = getVTList(VT); 2880 if (VT != MVT::Flag) { 2881 SDValue Ops[] = { N1, N2, N3 }; 2882 FoldingSetNodeID ID; 2883 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2884 void *IP = 0; 2885 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2886 return SDValue(E, 0); 2887 N = NodeAllocator.Allocate<TernarySDNode>(); 2888 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2889 CSEMap.InsertNode(N, IP); 2890 } else { 2891 N = NodeAllocator.Allocate<TernarySDNode>(); 2892 new (N) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 2893 } 2894 AllNodes.push_back(N); 2895#ifndef NDEBUG 2896 VerifyNode(N); 2897#endif 2898 return SDValue(N, 0); 2899} 2900 2901SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2902 SDValue N1, SDValue N2, SDValue N3, 2903 SDValue N4) { 2904 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4); 2905} 2906 2907SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2908 SDValue N1, SDValue N2, SDValue N3, 2909 SDValue N4) { 2910 SDValue Ops[] = { N1, N2, N3, N4 }; 2911 return getNode(Opcode, DL, VT, Ops, 4); 2912} 2913 2914SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2915 SDValue N1, SDValue N2, SDValue N3, 2916 SDValue N4, SDValue N5) { 2917 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, N1, N2, N3, N4, N5); 2918} 2919 2920SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 2921 SDValue N1, SDValue N2, SDValue N3, 2922 SDValue N4, SDValue N5) { 2923 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2924 return getNode(Opcode, DL, VT, Ops, 5); 2925} 2926 2927/// getMemsetValue - Vectorized representation of the memset value 2928/// operand. 2929static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2930 unsigned NumBits = VT.isVector() ? 2931 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2932 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2933 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2934 unsigned Shift = 8; 2935 for (unsigned i = NumBits; i > 8; i >>= 1) { 2936 Val = (Val << Shift) | Val; 2937 Shift <<= 1; 2938 } 2939 if (VT.isInteger()) 2940 return DAG.getConstant(Val, VT); 2941 return DAG.getConstantFP(APFloat(Val), VT); 2942 } 2943 2944 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2945 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2946 unsigned Shift = 8; 2947 for (unsigned i = NumBits; i > 8; i >>= 1) { 2948 Value = DAG.getNode(ISD::OR, VT, 2949 DAG.getNode(ISD::SHL, VT, Value, 2950 DAG.getConstant(Shift, 2951 TLI.getShiftAmountTy())), 2952 Value); 2953 Shift <<= 1; 2954 } 2955 2956 return Value; 2957} 2958 2959/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2960/// used when a memcpy is turned into a memset when the source is a constant 2961/// string ptr. 2962static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2963 const TargetLowering &TLI, 2964 std::string &Str, unsigned Offset) { 2965 // Handle vector with all elements zero. 2966 if (Str.empty()) { 2967 if (VT.isInteger()) 2968 return DAG.getConstant(0, VT); 2969 unsigned NumElts = VT.getVectorNumElements(); 2970 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2971 return DAG.getNode(ISD::BIT_CONVERT, VT, 2972 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2973 } 2974 2975 assert(!VT.isVector() && "Can't handle vector type here!"); 2976 unsigned NumBits = VT.getSizeInBits(); 2977 unsigned MSB = NumBits / 8; 2978 uint64_t Val = 0; 2979 if (TLI.isLittleEndian()) 2980 Offset = Offset + MSB - 1; 2981 for (unsigned i = 0; i != MSB; ++i) { 2982 Val = (Val << 8) | (unsigned char)Str[Offset]; 2983 Offset += TLI.isLittleEndian() ? -1 : 1; 2984 } 2985 return DAG.getConstant(Val, VT); 2986} 2987 2988/// getMemBasePlusOffset - Returns base and offset node for the 2989/// 2990static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2991 SelectionDAG &DAG) { 2992 MVT VT = Base.getValueType(); 2993 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2994} 2995 2996/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2997/// 2998static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2999 unsigned SrcDelta = 0; 3000 GlobalAddressSDNode *G = NULL; 3001 if (Src.getOpcode() == ISD::GlobalAddress) 3002 G = cast<GlobalAddressSDNode>(Src); 3003 else if (Src.getOpcode() == ISD::ADD && 3004 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3005 Src.getOperand(1).getOpcode() == ISD::Constant) { 3006 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3007 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3008 } 3009 if (!G) 3010 return false; 3011 3012 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3013 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3014 return true; 3015 3016 return false; 3017} 3018 3019/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 3020/// to replace the memset / memcpy is below the threshold. It also returns the 3021/// types of the sequence of memory ops to perform memset / memcpy. 3022static 3023bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 3024 SDValue Dst, SDValue Src, 3025 unsigned Limit, uint64_t Size, unsigned &Align, 3026 std::string &Str, bool &isSrcStr, 3027 SelectionDAG &DAG, 3028 const TargetLowering &TLI) { 3029 isSrcStr = isMemSrcFromString(Src, Str); 3030 bool isSrcConst = isa<ConstantSDNode>(Src); 3031 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 3032 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 3033 if (VT != MVT::iAny) { 3034 unsigned NewAlign = (unsigned) 3035 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 3036 // If source is a string constant, this will require an unaligned load. 3037 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 3038 if (Dst.getOpcode() != ISD::FrameIndex) { 3039 // Can't change destination alignment. It requires a unaligned store. 3040 if (AllowUnalign) 3041 VT = MVT::iAny; 3042 } else { 3043 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 3044 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3045 if (MFI->isFixedObjectIndex(FI)) { 3046 // Can't change destination alignment. It requires a unaligned store. 3047 if (AllowUnalign) 3048 VT = MVT::iAny; 3049 } else { 3050 // Give the stack frame object a larger alignment if needed. 3051 if (MFI->getObjectAlignment(FI) < NewAlign) 3052 MFI->setObjectAlignment(FI, NewAlign); 3053 Align = NewAlign; 3054 } 3055 } 3056 } 3057 } 3058 3059 if (VT == MVT::iAny) { 3060 if (AllowUnalign) { 3061 VT = MVT::i64; 3062 } else { 3063 switch (Align & 7) { 3064 case 0: VT = MVT::i64; break; 3065 case 4: VT = MVT::i32; break; 3066 case 2: VT = MVT::i16; break; 3067 default: VT = MVT::i8; break; 3068 } 3069 } 3070 3071 MVT LVT = MVT::i64; 3072 while (!TLI.isTypeLegal(LVT)) 3073 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 3074 assert(LVT.isInteger()); 3075 3076 if (VT.bitsGT(LVT)) 3077 VT = LVT; 3078 } 3079 3080 unsigned NumMemOps = 0; 3081 while (Size != 0) { 3082 unsigned VTSize = VT.getSizeInBits() / 8; 3083 while (VTSize > Size) { 3084 // For now, only use non-vector load / store's for the left-over pieces. 3085 if (VT.isVector()) { 3086 VT = MVT::i64; 3087 while (!TLI.isTypeLegal(VT)) 3088 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 3089 VTSize = VT.getSizeInBits() / 8; 3090 } else { 3091 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 3092 VTSize >>= 1; 3093 } 3094 } 3095 3096 if (++NumMemOps > Limit) 3097 return false; 3098 MemOps.push_back(VT); 3099 Size -= VTSize; 3100 } 3101 3102 return true; 3103} 3104 3105static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 3106 SDValue Chain, SDValue Dst, 3107 SDValue Src, uint64_t Size, 3108 unsigned Align, bool AlwaysInline, 3109 const Value *DstSV, uint64_t DstSVOff, 3110 const Value *SrcSV, uint64_t SrcSVOff){ 3111 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3112 3113 // Expand memcpy to a series of load and store ops if the size operand falls 3114 // below a certain threshold. 3115 std::vector<MVT> MemOps; 3116 uint64_t Limit = -1ULL; 3117 if (!AlwaysInline) 3118 Limit = TLI.getMaxStoresPerMemcpy(); 3119 unsigned DstAlign = Align; // Destination alignment can change. 3120 std::string Str; 3121 bool CopyFromStr; 3122 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3123 Str, CopyFromStr, DAG, TLI)) 3124 return SDValue(); 3125 3126 3127 bool isZeroStr = CopyFromStr && Str.empty(); 3128 SmallVector<SDValue, 8> OutChains; 3129 unsigned NumMemOps = MemOps.size(); 3130 uint64_t SrcOff = 0, DstOff = 0; 3131 for (unsigned i = 0; i < NumMemOps; i++) { 3132 MVT VT = MemOps[i]; 3133 unsigned VTSize = VT.getSizeInBits() / 8; 3134 SDValue Value, Store; 3135 3136 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3137 // It's unlikely a store of a vector immediate can be done in a single 3138 // instruction. It would require a load from a constantpool first. 3139 // We also handle store a vector with all zero's. 3140 // FIXME: Handle other cases where store of vector immediate is done in 3141 // a single instruction. 3142 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 3143 Store = DAG.getStore(Chain, Value, 3144 getMemBasePlusOffset(Dst, DstOff, DAG), 3145 DstSV, DstSVOff + DstOff, false, DstAlign); 3146 } else { 3147 Value = DAG.getLoad(VT, Chain, 3148 getMemBasePlusOffset(Src, SrcOff, DAG), 3149 SrcSV, SrcSVOff + SrcOff, false, Align); 3150 Store = DAG.getStore(Chain, Value, 3151 getMemBasePlusOffset(Dst, DstOff, DAG), 3152 DstSV, DstSVOff + DstOff, false, DstAlign); 3153 } 3154 OutChains.push_back(Store); 3155 SrcOff += VTSize; 3156 DstOff += VTSize; 3157 } 3158 3159 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3160 &OutChains[0], OutChains.size()); 3161} 3162 3163static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 3164 SDValue Chain, SDValue Dst, 3165 SDValue Src, uint64_t Size, 3166 unsigned Align, bool AlwaysInline, 3167 const Value *DstSV, uint64_t DstSVOff, 3168 const Value *SrcSV, uint64_t SrcSVOff){ 3169 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3170 3171 // Expand memmove to a series of load and store ops if the size operand falls 3172 // below a certain threshold. 3173 std::vector<MVT> MemOps; 3174 uint64_t Limit = -1ULL; 3175 if (!AlwaysInline) 3176 Limit = TLI.getMaxStoresPerMemmove(); 3177 unsigned DstAlign = Align; // Destination alignment can change. 3178 std::string Str; 3179 bool CopyFromStr; 3180 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3181 Str, CopyFromStr, DAG, TLI)) 3182 return SDValue(); 3183 3184 uint64_t SrcOff = 0, DstOff = 0; 3185 3186 SmallVector<SDValue, 8> LoadValues; 3187 SmallVector<SDValue, 8> LoadChains; 3188 SmallVector<SDValue, 8> OutChains; 3189 unsigned NumMemOps = MemOps.size(); 3190 for (unsigned i = 0; i < NumMemOps; i++) { 3191 MVT VT = MemOps[i]; 3192 unsigned VTSize = VT.getSizeInBits() / 8; 3193 SDValue Value, Store; 3194 3195 Value = DAG.getLoad(VT, Chain, 3196 getMemBasePlusOffset(Src, SrcOff, DAG), 3197 SrcSV, SrcSVOff + SrcOff, false, Align); 3198 LoadValues.push_back(Value); 3199 LoadChains.push_back(Value.getValue(1)); 3200 SrcOff += VTSize; 3201 } 3202 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 3203 &LoadChains[0], LoadChains.size()); 3204 OutChains.clear(); 3205 for (unsigned i = 0; i < NumMemOps; i++) { 3206 MVT VT = MemOps[i]; 3207 unsigned VTSize = VT.getSizeInBits() / 8; 3208 SDValue Value, Store; 3209 3210 Store = DAG.getStore(Chain, LoadValues[i], 3211 getMemBasePlusOffset(Dst, DstOff, DAG), 3212 DstSV, DstSVOff + DstOff, false, DstAlign); 3213 OutChains.push_back(Store); 3214 DstOff += VTSize; 3215 } 3216 3217 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3218 &OutChains[0], OutChains.size()); 3219} 3220 3221static SDValue getMemsetStores(SelectionDAG &DAG, 3222 SDValue Chain, SDValue Dst, 3223 SDValue Src, uint64_t Size, 3224 unsigned Align, 3225 const Value *DstSV, uint64_t DstSVOff) { 3226 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3227 3228 // Expand memset to a series of load/store ops if the size operand 3229 // falls below a certain threshold. 3230 std::vector<MVT> MemOps; 3231 std::string Str; 3232 bool CopyFromStr; 3233 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3234 Size, Align, Str, CopyFromStr, DAG, TLI)) 3235 return SDValue(); 3236 3237 SmallVector<SDValue, 8> OutChains; 3238 uint64_t DstOff = 0; 3239 3240 unsigned NumMemOps = MemOps.size(); 3241 for (unsigned i = 0; i < NumMemOps; i++) { 3242 MVT VT = MemOps[i]; 3243 unsigned VTSize = VT.getSizeInBits() / 8; 3244 SDValue Value = getMemsetValue(Src, VT, DAG); 3245 SDValue Store = DAG.getStore(Chain, Value, 3246 getMemBasePlusOffset(Dst, DstOff, DAG), 3247 DstSV, DstSVOff + DstOff); 3248 OutChains.push_back(Store); 3249 DstOff += VTSize; 3250 } 3251 3252 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3253 &OutChains[0], OutChains.size()); 3254} 3255 3256SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3257 SDValue Src, SDValue Size, 3258 unsigned Align, bool AlwaysInline, 3259 const Value *DstSV, uint64_t DstSVOff, 3260 const Value *SrcSV, uint64_t SrcSVOff) { 3261 3262 // Check to see if we should lower the memcpy to loads and stores first. 3263 // For cases within the target-specified limits, this is the best choice. 3264 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3265 if (ConstantSize) { 3266 // Memcpy with size zero? Just return the original chain. 3267 if (ConstantSize->isNullValue()) 3268 return Chain; 3269 3270 SDValue Result = 3271 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3272 ConstantSize->getZExtValue(), 3273 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3274 if (Result.getNode()) 3275 return Result; 3276 } 3277 3278 // Then check to see if we should lower the memcpy with target-specific 3279 // code. If the target chooses to do this, this is the next best. 3280 SDValue Result = 3281 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3282 AlwaysInline, 3283 DstSV, DstSVOff, SrcSV, SrcSVOff); 3284 if (Result.getNode()) 3285 return Result; 3286 3287 // If we really need inline code and the target declined to provide it, 3288 // use a (potentially long) sequence of loads and stores. 3289 if (AlwaysInline) { 3290 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3291 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3292 ConstantSize->getZExtValue(), Align, true, 3293 DstSV, DstSVOff, SrcSV, SrcSVOff); 3294 } 3295 3296 // Emit a library call. 3297 TargetLowering::ArgListTy Args; 3298 TargetLowering::ArgListEntry Entry; 3299 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3300 Entry.Node = Dst; Args.push_back(Entry); 3301 Entry.Node = Src; Args.push_back(Entry); 3302 Entry.Node = Size; Args.push_back(Entry); 3303 // FIXME: pass in DebugLoc 3304 std::pair<SDValue,SDValue> CallResult = 3305 TLI.LowerCallTo(Chain, Type::VoidTy, 3306 false, false, false, false, CallingConv::C, false, 3307 getExternalSymbol("memcpy", TLI.getPointerTy()), 3308 Args, *this, DebugLoc::getUnknownLoc()); 3309 return CallResult.second; 3310} 3311 3312SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3313 SDValue Src, SDValue Size, 3314 unsigned Align, 3315 const Value *DstSV, uint64_t DstSVOff, 3316 const Value *SrcSV, uint64_t SrcSVOff) { 3317 3318 // Check to see if we should lower the memmove to loads and stores first. 3319 // For cases within the target-specified limits, this is the best choice. 3320 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3321 if (ConstantSize) { 3322 // Memmove with size zero? Just return the original chain. 3323 if (ConstantSize->isNullValue()) 3324 return Chain; 3325 3326 SDValue Result = 3327 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3328 ConstantSize->getZExtValue(), 3329 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3330 if (Result.getNode()) 3331 return Result; 3332 } 3333 3334 // Then check to see if we should lower the memmove with target-specific 3335 // code. If the target chooses to do this, this is the next best. 3336 SDValue Result = 3337 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3338 DstSV, DstSVOff, SrcSV, SrcSVOff); 3339 if (Result.getNode()) 3340 return Result; 3341 3342 // Emit a library call. 3343 TargetLowering::ArgListTy Args; 3344 TargetLowering::ArgListEntry Entry; 3345 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3346 Entry.Node = Dst; Args.push_back(Entry); 3347 Entry.Node = Src; Args.push_back(Entry); 3348 Entry.Node = Size; Args.push_back(Entry); 3349 // FIXME: pass in DebugLoc 3350 std::pair<SDValue,SDValue> CallResult = 3351 TLI.LowerCallTo(Chain, Type::VoidTy, 3352 false, false, false, false, CallingConv::C, false, 3353 getExternalSymbol("memmove", TLI.getPointerTy()), 3354 Args, *this, DebugLoc::getUnknownLoc()); 3355 return CallResult.second; 3356} 3357 3358SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3359 SDValue Src, SDValue Size, 3360 unsigned Align, 3361 const Value *DstSV, uint64_t DstSVOff) { 3362 3363 // Check to see if we should lower the memset to stores first. 3364 // For cases within the target-specified limits, this is the best choice. 3365 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3366 if (ConstantSize) { 3367 // Memset with size zero? Just return the original chain. 3368 if (ConstantSize->isNullValue()) 3369 return Chain; 3370 3371 SDValue Result = 3372 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3373 Align, DstSV, DstSVOff); 3374 if (Result.getNode()) 3375 return Result; 3376 } 3377 3378 // Then check to see if we should lower the memset with target-specific 3379 // code. If the target chooses to do this, this is the next best. 3380 SDValue Result = 3381 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3382 DstSV, DstSVOff); 3383 if (Result.getNode()) 3384 return Result; 3385 3386 // Emit a library call. 3387 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3388 TargetLowering::ArgListTy Args; 3389 TargetLowering::ArgListEntry Entry; 3390 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3391 Args.push_back(Entry); 3392 // Extend or truncate the argument to be an i32 value for the call. 3393 if (Src.getValueType().bitsGT(MVT::i32)) 3394 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3395 else 3396 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3397 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3398 Args.push_back(Entry); 3399 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3400 Args.push_back(Entry); 3401 // FIXME: pass in DebugLoc 3402 std::pair<SDValue,SDValue> CallResult = 3403 TLI.LowerCallTo(Chain, Type::VoidTy, 3404 false, false, false, false, CallingConv::C, false, 3405 getExternalSymbol("memset", TLI.getPointerTy()), 3406 Args, *this, DebugLoc::getUnknownLoc()); 3407 return CallResult.second; 3408} 3409 3410SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3411 SDValue Chain, 3412 SDValue Ptr, SDValue Cmp, 3413 SDValue Swp, const Value* PtrVal, 3414 unsigned Alignment) { 3415 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3416 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3417 3418 MVT VT = Cmp.getValueType(); 3419 3420 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3421 Alignment = getMVTAlignment(MemVT); 3422 3423 SDVTList VTs = getVTList(VT, MVT::Other); 3424 FoldingSetNodeID ID; 3425 ID.AddInteger(MemVT.getRawBits()); 3426 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3427 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3428 void* IP = 0; 3429 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3430 return SDValue(E, 0); 3431 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3432 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3433 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3434 CSEMap.InsertNode(N, IP); 3435 AllNodes.push_back(N); 3436 return SDValue(N, 0); 3437} 3438 3439SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, 3440 SDValue Chain, 3441 SDValue Ptr, SDValue Cmp, 3442 SDValue Swp, const Value* PtrVal, 3443 unsigned Alignment) { 3444 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3445 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3446 3447 MVT VT = Cmp.getValueType(); 3448 3449 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3450 Alignment = getMVTAlignment(MemVT); 3451 3452 SDVTList VTs = getVTList(VT, MVT::Other); 3453 FoldingSetNodeID ID; 3454 ID.AddInteger(MemVT.getRawBits()); 3455 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3456 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3457 void* IP = 0; 3458 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3459 return SDValue(E, 0); 3460 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3461 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3462 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3463 CSEMap.InsertNode(N, IP); 3464 AllNodes.push_back(N); 3465 return SDValue(N, 0); 3466} 3467 3468SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3469 SDValue Chain, 3470 SDValue Ptr, SDValue Val, 3471 const Value* PtrVal, 3472 unsigned Alignment) { 3473 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3474 Opcode == ISD::ATOMIC_LOAD_SUB || 3475 Opcode == ISD::ATOMIC_LOAD_AND || 3476 Opcode == ISD::ATOMIC_LOAD_OR || 3477 Opcode == ISD::ATOMIC_LOAD_XOR || 3478 Opcode == ISD::ATOMIC_LOAD_NAND || 3479 Opcode == ISD::ATOMIC_LOAD_MIN || 3480 Opcode == ISD::ATOMIC_LOAD_MAX || 3481 Opcode == ISD::ATOMIC_LOAD_UMIN || 3482 Opcode == ISD::ATOMIC_LOAD_UMAX || 3483 Opcode == ISD::ATOMIC_SWAP) && 3484 "Invalid Atomic Op"); 3485 3486 MVT VT = Val.getValueType(); 3487 3488 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3489 Alignment = getMVTAlignment(MemVT); 3490 3491 SDVTList VTs = getVTList(VT, MVT::Other); 3492 FoldingSetNodeID ID; 3493 ID.AddInteger(MemVT.getRawBits()); 3494 SDValue Ops[] = {Chain, Ptr, Val}; 3495 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3496 void* IP = 0; 3497 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3498 return SDValue(E, 0); 3499 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3500 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3501 Chain, Ptr, Val, PtrVal, Alignment); 3502 CSEMap.InsertNode(N, IP); 3503 AllNodes.push_back(N); 3504 return SDValue(N, 0); 3505} 3506 3507SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT, 3508 SDValue Chain, 3509 SDValue Ptr, SDValue Val, 3510 const Value* PtrVal, 3511 unsigned Alignment) { 3512 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3513 Opcode == ISD::ATOMIC_LOAD_SUB || 3514 Opcode == ISD::ATOMIC_LOAD_AND || 3515 Opcode == ISD::ATOMIC_LOAD_OR || 3516 Opcode == ISD::ATOMIC_LOAD_XOR || 3517 Opcode == ISD::ATOMIC_LOAD_NAND || 3518 Opcode == ISD::ATOMIC_LOAD_MIN || 3519 Opcode == ISD::ATOMIC_LOAD_MAX || 3520 Opcode == ISD::ATOMIC_LOAD_UMIN || 3521 Opcode == ISD::ATOMIC_LOAD_UMAX || 3522 Opcode == ISD::ATOMIC_SWAP) && 3523 "Invalid Atomic Op"); 3524 3525 MVT VT = Val.getValueType(); 3526 3527 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3528 Alignment = getMVTAlignment(MemVT); 3529 3530 SDVTList VTs = getVTList(VT, MVT::Other); 3531 FoldingSetNodeID ID; 3532 ID.AddInteger(MemVT.getRawBits()); 3533 SDValue Ops[] = {Chain, Ptr, Val}; 3534 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3535 void* IP = 0; 3536 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3537 return SDValue(E, 0); 3538 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3539 new (N) AtomicSDNode(Opcode, dl, VTs, MemVT, 3540 Chain, Ptr, Val, PtrVal, Alignment); 3541 CSEMap.InsertNode(N, IP); 3542 AllNodes.push_back(N); 3543 return SDValue(N, 0); 3544} 3545 3546/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3547/// Allowed to return something different (and simpler) if Simplify is true. 3548SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) { 3549 if (NumOps == 1) 3550 return Ops[0]; 3551 3552 SmallVector<MVT, 4> VTs; 3553 VTs.reserve(NumOps); 3554 for (unsigned i = 0; i < NumOps; ++i) 3555 VTs.push_back(Ops[i].getValueType()); 3556 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3557} 3558 3559/// DebugLoc-aware version. 3560SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3561 DebugLoc dl) { 3562 if (NumOps == 1) 3563 return Ops[0]; 3564 3565 SmallVector<MVT, 4> VTs; 3566 VTs.reserve(NumOps); 3567 for (unsigned i = 0; i < NumOps; ++i) 3568 VTs.push_back(Ops[i].getValueType()); 3569 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3570 Ops, NumOps); 3571} 3572 3573SDValue 3574SelectionDAG::getMemIntrinsicNode(unsigned Opcode, 3575 const MVT *VTs, unsigned NumVTs, 3576 const SDValue *Ops, unsigned NumOps, 3577 MVT MemVT, const Value *srcValue, int SVOff, 3578 unsigned Align, bool Vol, 3579 bool ReadMem, bool WriteMem) { 3580 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps, 3581 MemVT, srcValue, SVOff, Align, Vol, 3582 ReadMem, WriteMem); 3583} 3584 3585SDValue 3586SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3587 const MVT *VTs, unsigned NumVTs, 3588 const SDValue *Ops, unsigned NumOps, 3589 MVT MemVT, const Value *srcValue, int SVOff, 3590 unsigned Align, bool Vol, 3591 bool ReadMem, bool WriteMem) { 3592 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3593 MemVT, srcValue, SVOff, Align, Vol, 3594 ReadMem, WriteMem); 3595} 3596 3597SDValue 3598SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList, 3599 const SDValue *Ops, unsigned NumOps, 3600 MVT MemVT, const Value *srcValue, int SVOff, 3601 unsigned Align, bool Vol, 3602 bool ReadMem, bool WriteMem) { 3603 // Memoize the node unless it returns a flag. 3604 MemIntrinsicSDNode *N; 3605 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3606 FoldingSetNodeID ID; 3607 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3608 void *IP = 0; 3609 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3610 return SDValue(E, 0); 3611 3612 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3613 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3614 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3615 CSEMap.InsertNode(N, IP); 3616 } else { 3617 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3618 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3619 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3620 } 3621 AllNodes.push_back(N); 3622 return SDValue(N, 0); 3623} 3624 3625SDValue 3626SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3627 const SDValue *Ops, unsigned NumOps, 3628 MVT MemVT, const Value *srcValue, int SVOff, 3629 unsigned Align, bool Vol, 3630 bool ReadMem, bool WriteMem) { 3631 // Memoize the node unless it returns a flag. 3632 MemIntrinsicSDNode *N; 3633 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3634 FoldingSetNodeID ID; 3635 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3636 void *IP = 0; 3637 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3638 return SDValue(E, 0); 3639 3640 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3641 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3642 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3643 CSEMap.InsertNode(N, IP); 3644 } else { 3645 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3646 new (N) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, MemVT, 3647 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3648 } 3649 AllNodes.push_back(N); 3650 return SDValue(N, 0); 3651} 3652 3653SDValue 3654SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3655 bool IsInreg, SDVTList VTs, 3656 const SDValue *Operands, unsigned NumOperands) { 3657 // Do not include isTailCall in the folding set profile. 3658 FoldingSetNodeID ID; 3659 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3660 ID.AddInteger(CallingConv); 3661 ID.AddInteger(IsVarArgs); 3662 void *IP = 0; 3663 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3664 // Instead of including isTailCall in the folding set, we just 3665 // set the flag of the existing node. 3666 if (!IsTailCall) 3667 cast<CallSDNode>(E)->setNotTailCall(); 3668 return SDValue(E, 0); 3669 } 3670 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3671 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg, 3672 VTs, Operands, NumOperands); 3673 CSEMap.InsertNode(N, IP); 3674 AllNodes.push_back(N); 3675 return SDValue(N, 0); 3676} 3677 3678SDValue 3679SelectionDAG::getCall(unsigned CallingConv, DebugLoc dl, bool IsVarArgs, 3680 bool IsTailCall, bool IsInreg, SDVTList VTs, 3681 const SDValue *Operands, unsigned NumOperands) { 3682 // Do not include isTailCall in the folding set profile. 3683 FoldingSetNodeID ID; 3684 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3685 ID.AddInteger(CallingConv); 3686 ID.AddInteger(IsVarArgs); 3687 void *IP = 0; 3688 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3689 // Instead of including isTailCall in the folding set, we just 3690 // set the flag of the existing node. 3691 if (!IsTailCall) 3692 cast<CallSDNode>(E)->setNotTailCall(); 3693 return SDValue(E, 0); 3694 } 3695 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3696 new (N) CallSDNode(CallingConv, dl, IsVarArgs, IsTailCall, IsInreg, 3697 VTs, Operands, NumOperands); 3698 CSEMap.InsertNode(N, IP); 3699 AllNodes.push_back(N); 3700 return SDValue(N, 0); 3701} 3702 3703SDValue 3704SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3705 MVT VT, SDValue Chain, 3706 SDValue Ptr, SDValue Offset, 3707 const Value *SV, int SVOffset, MVT EVT, 3708 bool isVolatile, unsigned Alignment) { 3709 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3710 Alignment = getMVTAlignment(VT); 3711 3712 if (VT == EVT) { 3713 ExtType = ISD::NON_EXTLOAD; 3714 } else if (ExtType == ISD::NON_EXTLOAD) { 3715 assert(VT == EVT && "Non-extending load from different memory type!"); 3716 } else { 3717 // Extending load. 3718 if (VT.isVector()) 3719 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3720 "Invalid vector extload!"); 3721 else 3722 assert(EVT.bitsLT(VT) && 3723 "Should only be an extending load, not truncating!"); 3724 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3725 "Cannot sign/zero extend a FP/Vector load!"); 3726 assert(VT.isInteger() == EVT.isInteger() && 3727 "Cannot convert from FP to Int or Int -> FP!"); 3728 } 3729 3730 bool Indexed = AM != ISD::UNINDEXED; 3731 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3732 "Unindexed load with an offset!"); 3733 3734 SDVTList VTs = Indexed ? 3735 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3736 SDValue Ops[] = { Chain, Ptr, Offset }; 3737 FoldingSetNodeID ID; 3738 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3739 ID.AddInteger(EVT.getRawBits()); 3740 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment)); 3741 void *IP = 0; 3742 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3743 return SDValue(E, 0); 3744 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3745 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3746 Alignment, isVolatile); 3747 CSEMap.InsertNode(N, IP); 3748 AllNodes.push_back(N); 3749 return SDValue(N, 0); 3750} 3751 3752SDValue 3753SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3754 ISD::LoadExtType ExtType, MVT VT, SDValue Chain, 3755 SDValue Ptr, SDValue Offset, 3756 const Value *SV, int SVOffset, MVT EVT, 3757 bool isVolatile, unsigned Alignment) { 3758 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3759 Alignment = getMVTAlignment(VT); 3760 3761 if (VT == EVT) { 3762 ExtType = ISD::NON_EXTLOAD; 3763 } else if (ExtType == ISD::NON_EXTLOAD) { 3764 assert(VT == EVT && "Non-extending load from different memory type!"); 3765 } else { 3766 // Extending load. 3767 if (VT.isVector()) 3768 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3769 "Invalid vector extload!"); 3770 else 3771 assert(EVT.bitsLT(VT) && 3772 "Should only be an extending load, not truncating!"); 3773 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3774 "Cannot sign/zero extend a FP/Vector load!"); 3775 assert(VT.isInteger() == EVT.isInteger() && 3776 "Cannot convert from FP to Int or Int -> FP!"); 3777 } 3778 3779 bool Indexed = AM != ISD::UNINDEXED; 3780 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3781 "Unindexed load with an offset!"); 3782 3783 SDVTList VTs = Indexed ? 3784 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3785 SDValue Ops[] = { Chain, Ptr, Offset }; 3786 FoldingSetNodeID ID; 3787 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3788 ID.AddInteger(EVT.getRawBits()); 3789 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, isVolatile, Alignment)); 3790 void *IP = 0; 3791 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3792 return SDValue(E, 0); 3793 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3794 new (N) LoadSDNode(Ops, dl, VTs, AM, ExtType, EVT, SV, SVOffset, 3795 Alignment, isVolatile); 3796 CSEMap.InsertNode(N, IP); 3797 AllNodes.push_back(N); 3798 return SDValue(N, 0); 3799} 3800 3801SDValue SelectionDAG::getLoad(MVT VT, 3802 SDValue Chain, SDValue Ptr, 3803 const Value *SV, int SVOffset, 3804 bool isVolatile, unsigned Alignment) { 3805 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3806 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3807 SV, SVOffset, VT, isVolatile, Alignment); 3808} 3809 3810SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl, 3811 SDValue Chain, SDValue Ptr, 3812 const Value *SV, int SVOffset, 3813 bool isVolatile, unsigned Alignment) { 3814 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3815 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3816 SV, SVOffset, VT, isVolatile, Alignment); 3817} 3818 3819SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3820 SDValue Chain, SDValue Ptr, 3821 const Value *SV, 3822 int SVOffset, MVT EVT, 3823 bool isVolatile, unsigned Alignment) { 3824 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3825 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3826 SV, SVOffset, EVT, isVolatile, Alignment); 3827} 3828 3829SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT, 3830 SDValue Chain, SDValue Ptr, 3831 const Value *SV, 3832 int SVOffset, MVT EVT, 3833 bool isVolatile, unsigned Alignment) { 3834 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3835 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3836 SV, SVOffset, EVT, isVolatile, Alignment); 3837} 3838 3839SDValue 3840SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3841 SDValue Offset, ISD::MemIndexedMode AM) { 3842 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3843 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3844 "Load is already a indexed load!"); 3845 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3846 LD->getChain(), Base, Offset, LD->getSrcValue(), 3847 LD->getSrcValueOffset(), LD->getMemoryVT(), 3848 LD->isVolatile(), LD->getAlignment()); 3849} 3850 3851SDValue 3852SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3853 SDValue Offset, ISD::MemIndexedMode AM) { 3854 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3855 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3856 "Load is already a indexed load!"); 3857 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3858 LD->getChain(), Base, Offset, LD->getSrcValue(), 3859 LD->getSrcValueOffset(), LD->getMemoryVT(), 3860 LD->isVolatile(), LD->getAlignment()); 3861} 3862 3863SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3864 SDValue Ptr, const Value *SV, int SVOffset, 3865 bool isVolatile, unsigned Alignment) { 3866 MVT VT = Val.getValueType(); 3867 3868 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3869 Alignment = getMVTAlignment(VT); 3870 3871 SDVTList VTs = getVTList(MVT::Other); 3872 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3873 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3874 FoldingSetNodeID ID; 3875 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3876 ID.AddInteger(VT.getRawBits()); 3877 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, 3878 isVolatile, Alignment)); 3879 void *IP = 0; 3880 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3881 return SDValue(E, 0); 3882 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3883 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3884 VT, SV, SVOffset, Alignment, isVolatile); 3885 CSEMap.InsertNode(N, IP); 3886 AllNodes.push_back(N); 3887 return SDValue(N, 0); 3888} 3889 3890SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3891 SDValue Ptr, const Value *SV, int SVOffset, 3892 bool isVolatile, unsigned Alignment) { 3893 MVT VT = Val.getValueType(); 3894 3895 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3896 Alignment = getMVTAlignment(VT); 3897 3898 SDVTList VTs = getVTList(MVT::Other); 3899 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3900 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3901 FoldingSetNodeID ID; 3902 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3903 ID.AddInteger(VT.getRawBits()); 3904 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, 3905 isVolatile, Alignment)); 3906 void *IP = 0; 3907 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3908 return SDValue(E, 0); 3909 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3910 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, false, 3911 VT, SV, SVOffset, Alignment, isVolatile); 3912 CSEMap.InsertNode(N, IP); 3913 AllNodes.push_back(N); 3914 return SDValue(N, 0); 3915} 3916 3917SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3918 SDValue Ptr, const Value *SV, 3919 int SVOffset, MVT SVT, 3920 bool isVolatile, unsigned Alignment) { 3921 MVT VT = Val.getValueType(); 3922 3923 if (VT == SVT) 3924 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3925 3926 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3927 assert(VT.isInteger() == SVT.isInteger() && 3928 "Can't do FP-INT conversion!"); 3929 3930 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3931 Alignment = getMVTAlignment(VT); 3932 3933 SDVTList VTs = getVTList(MVT::Other); 3934 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3935 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3936 FoldingSetNodeID ID; 3937 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3938 ID.AddInteger(SVT.getRawBits()); 3939 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, 3940 isVolatile, Alignment)); 3941 void *IP = 0; 3942 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3943 return SDValue(E, 0); 3944 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3945 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3946 SVT, SV, SVOffset, Alignment, isVolatile); 3947 CSEMap.InsertNode(N, IP); 3948 AllNodes.push_back(N); 3949 return SDValue(N, 0); 3950} 3951 3952SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 3953 SDValue Ptr, const Value *SV, 3954 int SVOffset, MVT SVT, 3955 bool isVolatile, unsigned Alignment) { 3956 MVT VT = Val.getValueType(); 3957 3958 if (VT == SVT) 3959 return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3960 3961 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3962 assert(VT.isInteger() == SVT.isInteger() && 3963 "Can't do FP-INT conversion!"); 3964 3965 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3966 Alignment = getMVTAlignment(VT); 3967 3968 SDVTList VTs = getVTList(MVT::Other); 3969 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3970 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3971 FoldingSetNodeID ID; 3972 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3973 ID.AddInteger(SVT.getRawBits()); 3974 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, 3975 isVolatile, Alignment)); 3976 void *IP = 0; 3977 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3978 return SDValue(E, 0); 3979 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3980 new (N) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, true, 3981 SVT, SV, SVOffset, Alignment, isVolatile); 3982 CSEMap.InsertNode(N, IP); 3983 AllNodes.push_back(N); 3984 return SDValue(N, 0); 3985} 3986 3987SDValue 3988SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3989 SDValue Offset, ISD::MemIndexedMode AM) { 3990 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3991 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3992 "Store is already a indexed store!"); 3993 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3994 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3995 FoldingSetNodeID ID; 3996 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3997 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3998 ID.AddInteger(ST->getRawSubclassData()); 3999 void *IP = 0; 4000 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4001 return SDValue(E, 0); 4002 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4003 new (N) StoreSDNode(Ops, VTs, AM, 4004 ST->isTruncatingStore(), ST->getMemoryVT(), 4005 ST->getSrcValue(), ST->getSrcValueOffset(), 4006 ST->getAlignment(), ST->isVolatile()); 4007 CSEMap.InsertNode(N, IP); 4008 AllNodes.push_back(N); 4009 return SDValue(N, 0); 4010} 4011 4012SDValue 4013SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4014 SDValue Offset, ISD::MemIndexedMode AM) { 4015 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4016 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4017 "Store is already a indexed store!"); 4018 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4019 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4020 FoldingSetNodeID ID; 4021 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4022 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4023 ID.AddInteger(ST->getRawSubclassData()); 4024 void *IP = 0; 4025 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4026 return SDValue(E, 0); 4027 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 4028 new (N) StoreSDNode(Ops, dl, VTs, AM, 4029 ST->isTruncatingStore(), ST->getMemoryVT(), 4030 ST->getSrcValue(), ST->getSrcValueOffset(), 4031 ST->getAlignment(), ST->isVolatile()); 4032 CSEMap.InsertNode(N, IP); 4033 AllNodes.push_back(N); 4034 return SDValue(N, 0); 4035} 4036 4037SDValue SelectionDAG::getVAArg(MVT VT, 4038 SDValue Chain, SDValue Ptr, 4039 SDValue SV) { 4040 SDValue Ops[] = { Chain, Ptr, SV }; 4041 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 4042} 4043 4044SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 4045 const SDUse *Ops, unsigned NumOps) { 4046 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps); 4047} 4048 4049SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 4050 const SDUse *Ops, unsigned NumOps) { 4051 switch (NumOps) { 4052 case 0: return getNode(Opcode, DL, VT); 4053 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4054 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4055 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4056 default: break; 4057 } 4058 4059 // Copy from an SDUse array into an SDValue array for use with 4060 // the regular getNode logic. 4061 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4062 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4063} 4064 4065SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 4066 const SDValue *Ops, unsigned NumOps) { 4067 return getNode(Opcode, DebugLoc::getUnknownLoc(), VT, Ops, NumOps); 4068} 4069 4070SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, 4071 const SDValue *Ops, unsigned NumOps) { 4072 switch (NumOps) { 4073 case 0: return getNode(Opcode, DL, VT); 4074 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4075 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4076 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4077 default: break; 4078 } 4079 4080 switch (Opcode) { 4081 default: break; 4082 case ISD::SELECT_CC: { 4083 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4084 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4085 "LHS and RHS of condition must have same type!"); 4086 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4087 "True and False arms of SelectCC must have same type!"); 4088 assert(Ops[2].getValueType() == VT && 4089 "select_cc node must be of same type as true and false value!"); 4090 break; 4091 } 4092 case ISD::BR_CC: { 4093 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4094 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4095 "LHS/RHS of comparison should match types!"); 4096 break; 4097 } 4098 } 4099 4100 // Memoize nodes. 4101 SDNode *N; 4102 SDVTList VTs = getVTList(VT); 4103 4104 if (VT != MVT::Flag) { 4105 FoldingSetNodeID ID; 4106 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4107 void *IP = 0; 4108 4109 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4110 return SDValue(E, 0); 4111 4112 N = NodeAllocator.Allocate<SDNode>(); 4113 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4114 CSEMap.InsertNode(N, IP); 4115 } else { 4116 N = NodeAllocator.Allocate<SDNode>(); 4117 new (N) SDNode(Opcode, DL, VTs, Ops, NumOps); 4118 } 4119 4120 AllNodes.push_back(N); 4121#ifndef NDEBUG 4122 VerifyNode(N); 4123#endif 4124 return SDValue(N, 0); 4125} 4126 4127SDValue SelectionDAG::getNode(unsigned Opcode, 4128 const std::vector<MVT> &ResultTys, 4129 const SDValue *Ops, unsigned NumOps) { 4130 return getNode(Opcode, DebugLoc::getUnknownLoc(), ResultTys, Ops, NumOps); 4131} 4132 4133SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4134 const std::vector<MVT> &ResultTys, 4135 const SDValue *Ops, unsigned NumOps) { 4136 return getNode(Opcode, DL, getNodeValueTypes(ResultTys), ResultTys.size(), 4137 Ops, NumOps); 4138} 4139 4140SDValue SelectionDAG::getNode(unsigned Opcode, 4141 const MVT *VTs, unsigned NumVTs, 4142 const SDValue *Ops, unsigned NumOps) { 4143 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTs, NumVTs, Ops, NumOps); 4144} 4145 4146SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4147 const MVT *VTs, unsigned NumVTs, 4148 const SDValue *Ops, unsigned NumOps) { 4149 if (NumVTs == 1) 4150 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4151 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4152} 4153 4154SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4155 const SDValue *Ops, unsigned NumOps) { 4156 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, Ops, NumOps); 4157} 4158 4159SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4160 const SDValue *Ops, unsigned NumOps) { 4161 if (VTList.NumVTs == 1) 4162 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4163 4164 switch (Opcode) { 4165 // FIXME: figure out how to safely handle things like 4166 // int foo(int x) { return 1 << (x & 255); } 4167 // int bar() { return foo(256); } 4168#if 0 4169 case ISD::SRA_PARTS: 4170 case ISD::SRL_PARTS: 4171 case ISD::SHL_PARTS: 4172 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4173 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4174 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4175 else if (N3.getOpcode() == ISD::AND) 4176 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4177 // If the and is only masking out bits that cannot effect the shift, 4178 // eliminate the and. 4179 unsigned NumBits = VT.getSizeInBits()*2; 4180 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4181 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4182 } 4183 break; 4184#endif 4185 } 4186 4187 // Memoize the node unless it returns a flag. 4188 SDNode *N; 4189 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4190 FoldingSetNodeID ID; 4191 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4192 void *IP = 0; 4193 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4194 return SDValue(E, 0); 4195 if (NumOps == 1) { 4196 N = NodeAllocator.Allocate<UnarySDNode>(); 4197 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4198 } else if (NumOps == 2) { 4199 N = NodeAllocator.Allocate<BinarySDNode>(); 4200 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4201 } else if (NumOps == 3) { 4202 N = NodeAllocator.Allocate<TernarySDNode>(); 4203 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4204 } else { 4205 N = NodeAllocator.Allocate<SDNode>(); 4206 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4207 } 4208 CSEMap.InsertNode(N, IP); 4209 } else { 4210 if (NumOps == 1) { 4211 N = NodeAllocator.Allocate<UnarySDNode>(); 4212 new (N) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4213 } else if (NumOps == 2) { 4214 N = NodeAllocator.Allocate<BinarySDNode>(); 4215 new (N) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4216 } else if (NumOps == 3) { 4217 N = NodeAllocator.Allocate<TernarySDNode>(); 4218 new (N) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], Ops[2]); 4219 } else { 4220 N = NodeAllocator.Allocate<SDNode>(); 4221 new (N) SDNode(Opcode, DL, VTList, Ops, NumOps); 4222 } 4223 } 4224 AllNodes.push_back(N); 4225#ifndef NDEBUG 4226 VerifyNode(N); 4227#endif 4228 return SDValue(N, 0); 4229} 4230 4231SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 4232 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList); 4233} 4234 4235SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4236 return getNode(Opcode, DL, VTList, 0, 0); 4237} 4238 4239SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4240 SDValue N1) { 4241 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1); 4242} 4243 4244SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4245 SDValue N1) { 4246 SDValue Ops[] = { N1 }; 4247 return getNode(Opcode, DL, VTList, Ops, 1); 4248} 4249 4250SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4251 SDValue N1, SDValue N2) { 4252 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2); 4253} 4254 4255SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4256 SDValue N1, SDValue N2) { 4257 SDValue Ops[] = { N1, N2 }; 4258 return getNode(Opcode, DL, VTList, Ops, 2); 4259} 4260 4261SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4262 SDValue N1, SDValue N2, SDValue N3) { 4263 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3); 4264} 4265 4266SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4267 SDValue N1, SDValue N2, SDValue N3) { 4268 SDValue Ops[] = { N1, N2, N3 }; 4269 return getNode(Opcode, DL, VTList, Ops, 3); 4270} 4271 4272SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4273 SDValue N1, SDValue N2, SDValue N3, 4274 SDValue N4) { 4275 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4); 4276} 4277 4278SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4279 SDValue N1, SDValue N2, SDValue N3, 4280 SDValue N4) { 4281 SDValue Ops[] = { N1, N2, N3, N4 }; 4282 return getNode(Opcode, DL, VTList, Ops, 4); 4283} 4284 4285SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 4286 SDValue N1, SDValue N2, SDValue N3, 4287 SDValue N4, SDValue N5) { 4288 return getNode(Opcode, DebugLoc::getUnknownLoc(), VTList, N1, N2, N3, N4, N5); 4289} 4290 4291SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4292 SDValue N1, SDValue N2, SDValue N3, 4293 SDValue N4, SDValue N5) { 4294 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4295 return getNode(Opcode, DL, VTList, Ops, 5); 4296} 4297 4298SDVTList SelectionDAG::getVTList(MVT VT) { 4299 return makeVTList(SDNode::getValueTypeList(VT), 1); 4300} 4301 4302SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 4303 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4304 E = VTList.rend(); I != E; ++I) 4305 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4306 return *I; 4307 4308 MVT *Array = Allocator.Allocate<MVT>(2); 4309 Array[0] = VT1; 4310 Array[1] = VT2; 4311 SDVTList Result = makeVTList(Array, 2); 4312 VTList.push_back(Result); 4313 return Result; 4314} 4315 4316SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 4317 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4318 E = VTList.rend(); I != E; ++I) 4319 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4320 I->VTs[2] == VT3) 4321 return *I; 4322 4323 MVT *Array = Allocator.Allocate<MVT>(3); 4324 Array[0] = VT1; 4325 Array[1] = VT2; 4326 Array[2] = VT3; 4327 SDVTList Result = makeVTList(Array, 3); 4328 VTList.push_back(Result); 4329 return Result; 4330} 4331 4332SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) { 4333 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4334 E = VTList.rend(); I != E; ++I) 4335 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4336 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4337 return *I; 4338 4339 MVT *Array = Allocator.Allocate<MVT>(3); 4340 Array[0] = VT1; 4341 Array[1] = VT2; 4342 Array[2] = VT3; 4343 Array[3] = VT4; 4344 SDVTList Result = makeVTList(Array, 4); 4345 VTList.push_back(Result); 4346 return Result; 4347} 4348 4349SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 4350 switch (NumVTs) { 4351 case 0: assert(0 && "Cannot have nodes without results!"); 4352 case 1: return getVTList(VTs[0]); 4353 case 2: return getVTList(VTs[0], VTs[1]); 4354 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4355 default: break; 4356 } 4357 4358 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4359 E = VTList.rend(); I != E; ++I) { 4360 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4361 continue; 4362 4363 bool NoMatch = false; 4364 for (unsigned i = 2; i != NumVTs; ++i) 4365 if (VTs[i] != I->VTs[i]) { 4366 NoMatch = true; 4367 break; 4368 } 4369 if (!NoMatch) 4370 return *I; 4371 } 4372 4373 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 4374 std::copy(VTs, VTs+NumVTs, Array); 4375 SDVTList Result = makeVTList(Array, NumVTs); 4376 VTList.push_back(Result); 4377 return Result; 4378} 4379 4380 4381/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4382/// specified operands. If the resultant node already exists in the DAG, 4383/// this does not modify the specified node, instead it returns the node that 4384/// already exists. If the resultant node does not exist in the DAG, the 4385/// input node is returned. As a degenerate case, if you specify the same 4386/// input operands as the node already has, the input node is returned. 4387SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4388 SDNode *N = InN.getNode(); 4389 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4390 4391 // Check to see if there is no change. 4392 if (Op == N->getOperand(0)) return InN; 4393 4394 // See if the modified node already exists. 4395 void *InsertPos = 0; 4396 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4397 return SDValue(Existing, InN.getResNo()); 4398 4399 // Nope it doesn't. Remove the node from its current place in the maps. 4400 if (InsertPos) 4401 if (!RemoveNodeFromCSEMaps(N)) 4402 InsertPos = 0; 4403 4404 // Now we update the operands. 4405 N->OperandList[0].set(Op); 4406 4407 // If this gets put into a CSE map, add it. 4408 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4409 return InN; 4410} 4411 4412SDValue SelectionDAG:: 4413UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4414 SDNode *N = InN.getNode(); 4415 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4416 4417 // Check to see if there is no change. 4418 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4419 return InN; // No operands changed, just return the input node. 4420 4421 // See if the modified node already exists. 4422 void *InsertPos = 0; 4423 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4424 return SDValue(Existing, InN.getResNo()); 4425 4426 // Nope it doesn't. Remove the node from its current place in the maps. 4427 if (InsertPos) 4428 if (!RemoveNodeFromCSEMaps(N)) 4429 InsertPos = 0; 4430 4431 // Now we update the operands. 4432 if (N->OperandList[0] != Op1) 4433 N->OperandList[0].set(Op1); 4434 if (N->OperandList[1] != Op2) 4435 N->OperandList[1].set(Op2); 4436 4437 // If this gets put into a CSE map, add it. 4438 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4439 return InN; 4440} 4441 4442SDValue SelectionDAG:: 4443UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4444 SDValue Ops[] = { Op1, Op2, Op3 }; 4445 return UpdateNodeOperands(N, Ops, 3); 4446} 4447 4448SDValue SelectionDAG:: 4449UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4450 SDValue Op3, SDValue Op4) { 4451 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4452 return UpdateNodeOperands(N, Ops, 4); 4453} 4454 4455SDValue SelectionDAG:: 4456UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4457 SDValue Op3, SDValue Op4, SDValue Op5) { 4458 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4459 return UpdateNodeOperands(N, Ops, 5); 4460} 4461 4462SDValue SelectionDAG:: 4463UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4464 SDNode *N = InN.getNode(); 4465 assert(N->getNumOperands() == NumOps && 4466 "Update with wrong number of operands"); 4467 4468 // Check to see if there is no change. 4469 bool AnyChange = false; 4470 for (unsigned i = 0; i != NumOps; ++i) { 4471 if (Ops[i] != N->getOperand(i)) { 4472 AnyChange = true; 4473 break; 4474 } 4475 } 4476 4477 // No operands changed, just return the input node. 4478 if (!AnyChange) return InN; 4479 4480 // See if the modified node already exists. 4481 void *InsertPos = 0; 4482 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4483 return SDValue(Existing, InN.getResNo()); 4484 4485 // Nope it doesn't. Remove the node from its current place in the maps. 4486 if (InsertPos) 4487 if (!RemoveNodeFromCSEMaps(N)) 4488 InsertPos = 0; 4489 4490 // Now we update the operands. 4491 for (unsigned i = 0; i != NumOps; ++i) 4492 if (N->OperandList[i] != Ops[i]) 4493 N->OperandList[i].set(Ops[i]); 4494 4495 // If this gets put into a CSE map, add it. 4496 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4497 return InN; 4498} 4499 4500/// DropOperands - Release the operands and set this node to have 4501/// zero operands. 4502void SDNode::DropOperands() { 4503 // Unlike the code in MorphNodeTo that does this, we don't need to 4504 // watch for dead nodes here. 4505 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4506 SDUse &Use = *I++; 4507 Use.set(SDValue()); 4508 } 4509} 4510 4511/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4512/// machine opcode. 4513/// 4514SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4515 MVT VT) { 4516 SDVTList VTs = getVTList(VT); 4517 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4518} 4519 4520SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4521 MVT VT, SDValue Op1) { 4522 SDVTList VTs = getVTList(VT); 4523 SDValue Ops[] = { Op1 }; 4524 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4525} 4526 4527SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4528 MVT VT, SDValue Op1, 4529 SDValue Op2) { 4530 SDVTList VTs = getVTList(VT); 4531 SDValue Ops[] = { Op1, Op2 }; 4532 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4533} 4534 4535SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4536 MVT VT, SDValue Op1, 4537 SDValue Op2, SDValue Op3) { 4538 SDVTList VTs = getVTList(VT); 4539 SDValue Ops[] = { Op1, Op2, Op3 }; 4540 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4541} 4542 4543SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4544 MVT VT, const SDValue *Ops, 4545 unsigned NumOps) { 4546 SDVTList VTs = getVTList(VT); 4547 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4548} 4549 4550SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4551 MVT VT1, MVT VT2, const SDValue *Ops, 4552 unsigned NumOps) { 4553 SDVTList VTs = getVTList(VT1, VT2); 4554 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4555} 4556 4557SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4558 MVT VT1, MVT VT2) { 4559 SDVTList VTs = getVTList(VT1, VT2); 4560 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4561} 4562 4563SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4564 MVT VT1, MVT VT2, MVT VT3, 4565 const SDValue *Ops, unsigned NumOps) { 4566 SDVTList VTs = getVTList(VT1, VT2, VT3); 4567 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4568} 4569 4570SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4571 MVT VT1, MVT VT2, MVT VT3, MVT VT4, 4572 const SDValue *Ops, unsigned NumOps) { 4573 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4574 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4575} 4576 4577SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4578 MVT VT1, MVT VT2, 4579 SDValue Op1) { 4580 SDVTList VTs = getVTList(VT1, VT2); 4581 SDValue Ops[] = { Op1 }; 4582 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4583} 4584 4585SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4586 MVT VT1, MVT VT2, 4587 SDValue Op1, SDValue Op2) { 4588 SDVTList VTs = getVTList(VT1, VT2); 4589 SDValue Ops[] = { Op1, Op2 }; 4590 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4591} 4592 4593SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4594 MVT VT1, MVT VT2, 4595 SDValue Op1, SDValue Op2, 4596 SDValue Op3) { 4597 SDVTList VTs = getVTList(VT1, VT2); 4598 SDValue Ops[] = { Op1, Op2, Op3 }; 4599 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4600} 4601 4602SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4603 MVT VT1, MVT VT2, MVT VT3, 4604 SDValue Op1, SDValue Op2, 4605 SDValue Op3) { 4606 SDVTList VTs = getVTList(VT1, VT2, VT3); 4607 SDValue Ops[] = { Op1, Op2, Op3 }; 4608 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4609} 4610 4611SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4612 SDVTList VTs, const SDValue *Ops, 4613 unsigned NumOps) { 4614 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4615} 4616 4617SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4618 MVT VT) { 4619 SDVTList VTs = getVTList(VT); 4620 return MorphNodeTo(N, Opc, VTs, 0, 0); 4621} 4622 4623SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4624 MVT VT, SDValue Op1) { 4625 SDVTList VTs = getVTList(VT); 4626 SDValue Ops[] = { Op1 }; 4627 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4628} 4629 4630SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4631 MVT VT, SDValue Op1, 4632 SDValue Op2) { 4633 SDVTList VTs = getVTList(VT); 4634 SDValue Ops[] = { Op1, Op2 }; 4635 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4636} 4637 4638SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4639 MVT VT, SDValue Op1, 4640 SDValue Op2, SDValue Op3) { 4641 SDVTList VTs = getVTList(VT); 4642 SDValue Ops[] = { Op1, Op2, Op3 }; 4643 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4644} 4645 4646SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4647 MVT VT, const SDValue *Ops, 4648 unsigned NumOps) { 4649 SDVTList VTs = getVTList(VT); 4650 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4651} 4652 4653SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4654 MVT VT1, MVT VT2, const SDValue *Ops, 4655 unsigned NumOps) { 4656 SDVTList VTs = getVTList(VT1, VT2); 4657 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4658} 4659 4660SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4661 MVT VT1, MVT VT2) { 4662 SDVTList VTs = getVTList(VT1, VT2); 4663 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4664} 4665 4666SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4667 MVT VT1, MVT VT2, MVT VT3, 4668 const SDValue *Ops, unsigned NumOps) { 4669 SDVTList VTs = getVTList(VT1, VT2, VT3); 4670 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4671} 4672 4673SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4674 MVT VT1, MVT VT2, 4675 SDValue Op1) { 4676 SDVTList VTs = getVTList(VT1, VT2); 4677 SDValue Ops[] = { Op1 }; 4678 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4679} 4680 4681SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4682 MVT VT1, MVT VT2, 4683 SDValue Op1, SDValue Op2) { 4684 SDVTList VTs = getVTList(VT1, VT2); 4685 SDValue Ops[] = { Op1, Op2 }; 4686 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4687} 4688 4689SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4690 MVT VT1, MVT VT2, 4691 SDValue Op1, SDValue Op2, 4692 SDValue Op3) { 4693 SDVTList VTs = getVTList(VT1, VT2); 4694 SDValue Ops[] = { Op1, Op2, Op3 }; 4695 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4696} 4697 4698/// MorphNodeTo - These *mutate* the specified node to have the specified 4699/// return type, opcode, and operands. 4700/// 4701/// Note that MorphNodeTo returns the resultant node. If there is already a 4702/// node of the specified opcode and operands, it returns that node instead of 4703/// the current one. 4704/// 4705/// Using MorphNodeTo is faster than creating a new node and swapping it in 4706/// with ReplaceAllUsesWith both because it often avoids allocating a new 4707/// node, and because it doesn't require CSE recalculation for any of 4708/// the node's users. 4709/// 4710SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4711 SDVTList VTs, const SDValue *Ops, 4712 unsigned NumOps) { 4713 // If an identical node already exists, use it. 4714 void *IP = 0; 4715 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4716 FoldingSetNodeID ID; 4717 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4718 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4719 return ON; 4720 } 4721 4722 if (!RemoveNodeFromCSEMaps(N)) 4723 IP = 0; 4724 4725 // Start the morphing. 4726 N->NodeType = Opc; 4727 N->ValueList = VTs.VTs; 4728 N->NumValues = VTs.NumVTs; 4729 4730 // Clear the operands list, updating used nodes to remove this from their 4731 // use list. Keep track of any operands that become dead as a result. 4732 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4733 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4734 SDUse &Use = *I++; 4735 SDNode *Used = Use.getNode(); 4736 Use.set(SDValue()); 4737 if (Used->use_empty()) 4738 DeadNodeSet.insert(Used); 4739 } 4740 4741 // If NumOps is larger than the # of operands we currently have, reallocate 4742 // the operand list. 4743 if (NumOps > N->NumOperands) { 4744 if (N->OperandsNeedDelete) 4745 delete[] N->OperandList; 4746 4747 if (N->isMachineOpcode()) { 4748 // We're creating a final node that will live unmorphed for the 4749 // remainder of the current SelectionDAG iteration, so we can allocate 4750 // the operands directly out of a pool with no recycling metadata. 4751 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4752 N->OperandsNeedDelete = false; 4753 } else { 4754 N->OperandList = new SDUse[NumOps]; 4755 N->OperandsNeedDelete = true; 4756 } 4757 } 4758 4759 // Assign the new operands. 4760 N->NumOperands = NumOps; 4761 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4762 N->OperandList[i].setUser(N); 4763 N->OperandList[i].setInitial(Ops[i]); 4764 } 4765 4766 // Delete any nodes that are still dead after adding the uses for the 4767 // new operands. 4768 SmallVector<SDNode *, 16> DeadNodes; 4769 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4770 E = DeadNodeSet.end(); I != E; ++I) 4771 if ((*I)->use_empty()) 4772 DeadNodes.push_back(*I); 4773 RemoveDeadNodes(DeadNodes); 4774 4775 if (IP) 4776 CSEMap.InsertNode(N, IP); // Memoize the new node. 4777 return N; 4778} 4779 4780 4781/// getTargetNode - These are used for target selectors to create a new node 4782/// with specified return type(s), target opcode, and operands. 4783/// 4784/// Note that getTargetNode returns the resultant node. If there is already a 4785/// node of the specified opcode and operands, it returns that node instead of 4786/// the current one. 4787SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4788 return getNode(~Opcode, VT).getNode(); 4789} 4790SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) { 4791 return getNode(~Opcode, dl, VT).getNode(); 4792} 4793 4794SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4795 return getNode(~Opcode, VT, Op1).getNode(); 4796} 4797SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4798 SDValue Op1) { 4799 return getNode(~Opcode, dl, VT, Op1).getNode(); 4800} 4801 4802SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4803 SDValue Op1, SDValue Op2) { 4804 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4805} 4806SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4807 SDValue Op1, SDValue Op2) { 4808 return getNode(~Opcode, dl, VT, Op1, Op2).getNode(); 4809} 4810 4811SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4812 SDValue Op1, SDValue Op2, 4813 SDValue Op3) { 4814 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4815} 4816SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4817 SDValue Op1, SDValue Op2, 4818 SDValue Op3) { 4819 return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode(); 4820} 4821 4822SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4823 const SDValue *Ops, unsigned NumOps) { 4824 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4825} 4826SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT, 4827 const SDValue *Ops, unsigned NumOps) { 4828 return getNode(~Opcode, dl, VT, Ops, NumOps).getNode(); 4829} 4830 4831SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4832 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4833 SDValue Op; 4834 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4835} 4836SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4837 MVT VT1, MVT VT2) { 4838 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4839 SDValue Op; 4840 return getNode(~Opcode, dl, VTs, 2, &Op, 0).getNode(); 4841} 4842 4843SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4844 MVT VT2, SDValue Op1) { 4845 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4846 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4847} 4848SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4849 MVT VT2, SDValue Op1) { 4850 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4851 return getNode(~Opcode, dl, VTs, 2, &Op1, 1).getNode(); 4852} 4853 4854SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4855 MVT VT2, SDValue Op1, 4856 SDValue Op2) { 4857 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4858 SDValue Ops[] = { Op1, Op2 }; 4859 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4860} 4861SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4862 MVT VT2, SDValue Op1, 4863 SDValue Op2) { 4864 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4865 SDValue Ops[] = { Op1, Op2 }; 4866 return getNode(~Opcode, dl, VTs, 2, Ops, 2).getNode(); 4867} 4868 4869SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4870 MVT VT2, SDValue Op1, 4871 SDValue Op2, SDValue Op3) { 4872 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4873 SDValue Ops[] = { Op1, Op2, Op3 }; 4874 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4875} 4876SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4877 MVT VT2, SDValue Op1, 4878 SDValue Op2, SDValue Op3) { 4879 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4880 SDValue Ops[] = { Op1, Op2, Op3 }; 4881 return getNode(~Opcode, dl, VTs, 2, Ops, 3).getNode(); 4882} 4883 4884SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4885 const SDValue *Ops, unsigned NumOps) { 4886 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4887 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4888} 4889SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4890 MVT VT1, MVT VT2, 4891 const SDValue *Ops, unsigned NumOps) { 4892 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4893 return getNode(~Opcode, dl, VTs, 2, Ops, NumOps).getNode(); 4894} 4895 4896SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4897 SDValue Op1, SDValue Op2) { 4898 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4899 SDValue Ops[] = { Op1, Op2 }; 4900 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4901} 4902SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4903 MVT VT1, MVT VT2, MVT VT3, 4904 SDValue Op1, SDValue Op2) { 4905 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4906 SDValue Ops[] = { Op1, Op2 }; 4907 return getNode(~Opcode, dl, VTs, 3, Ops, 2).getNode(); 4908} 4909 4910SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4911 SDValue Op1, SDValue Op2, 4912 SDValue Op3) { 4913 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4914 SDValue Ops[] = { Op1, Op2, Op3 }; 4915 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4916} 4917SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4918 MVT VT1, MVT VT2, MVT VT3, 4919 SDValue Op1, SDValue Op2, 4920 SDValue Op3) { 4921 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4922 SDValue Ops[] = { Op1, Op2, Op3 }; 4923 return getNode(~Opcode, dl, VTs, 3, Ops, 3).getNode(); 4924} 4925 4926SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4927 const SDValue *Ops, unsigned NumOps) { 4928 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4929 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4930} 4931SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4932 MVT VT1, MVT VT2, MVT VT3, 4933 const SDValue *Ops, unsigned NumOps) { 4934 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4935 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4936} 4937 4938SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4939 MVT VT2, MVT VT3, MVT VT4, 4940 const SDValue *Ops, unsigned NumOps) { 4941 std::vector<MVT> VTList; 4942 VTList.push_back(VT1); 4943 VTList.push_back(VT2); 4944 VTList.push_back(VT3); 4945 VTList.push_back(VT4); 4946 const MVT *VTs = getNodeValueTypes(VTList); 4947 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4948} 4949SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1, 4950 MVT VT2, MVT VT3, MVT VT4, 4951 const SDValue *Ops, unsigned NumOps) { 4952 std::vector<MVT> VTList; 4953 VTList.push_back(VT1); 4954 VTList.push_back(VT2); 4955 VTList.push_back(VT3); 4956 VTList.push_back(VT4); 4957 const MVT *VTs = getNodeValueTypes(VTList); 4958 return getNode(~Opcode, dl, VTs, 4, Ops, NumOps).getNode(); 4959} 4960 4961SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4962 const std::vector<MVT> &ResultTys, 4963 const SDValue *Ops, unsigned NumOps) { 4964 const MVT *VTs = getNodeValueTypes(ResultTys); 4965 return getNode(~Opcode, VTs, ResultTys.size(), 4966 Ops, NumOps).getNode(); 4967} 4968SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, 4969 const std::vector<MVT> &ResultTys, 4970 const SDValue *Ops, unsigned NumOps) { 4971 const MVT *VTs = getNodeValueTypes(ResultTys); 4972 return getNode(~Opcode, dl, VTs, ResultTys.size(), 4973 Ops, NumOps).getNode(); 4974} 4975 4976/// getNodeIfExists - Get the specified node if it's already available, or 4977/// else return NULL. 4978SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4979 const SDValue *Ops, unsigned NumOps) { 4980 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4981 FoldingSetNodeID ID; 4982 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4983 void *IP = 0; 4984 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4985 return E; 4986 } 4987 return NULL; 4988} 4989 4990/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4991/// This can cause recursive merging of nodes in the DAG. 4992/// 4993/// This version assumes From has a single result value. 4994/// 4995void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4996 DAGUpdateListener *UpdateListener) { 4997 SDNode *From = FromN.getNode(); 4998 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4999 "Cannot replace with this method!"); 5000 assert(From != To.getNode() && "Cannot replace uses of with self"); 5001 5002 // Iterate over all the existing uses of From. New uses will be added 5003 // to the beginning of the use list, which we avoid visiting. 5004 // This specifically avoids visiting uses of From that arise while the 5005 // replacement is happening, because any such uses would be the result 5006 // of CSE: If an existing node looks like From after one of its operands 5007 // is replaced by To, we don't want to replace of all its users with To 5008 // too. See PR3018 for more info. 5009 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5010 while (UI != UE) { 5011 SDNode *User = *UI; 5012 5013 // This node is about to morph, remove its old self from the CSE maps. 5014 RemoveNodeFromCSEMaps(User); 5015 5016 // A user can appear in a use list multiple times, and when this 5017 // happens the uses are usually next to each other in the list. 5018 // To help reduce the number of CSE recomputations, process all 5019 // the uses of this user that we can find this way. 5020 do { 5021 SDUse &Use = UI.getUse(); 5022 ++UI; 5023 Use.set(To); 5024 } while (UI != UE && *UI == User); 5025 5026 // Now that we have modified User, add it back to the CSE maps. If it 5027 // already exists there, recursively merge the results together. 5028 AddModifiedNodeToCSEMaps(User, UpdateListener); 5029 } 5030} 5031 5032/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5033/// This can cause recursive merging of nodes in the DAG. 5034/// 5035/// This version assumes From/To have matching types and numbers of result 5036/// values. 5037/// 5038void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5039 DAGUpdateListener *UpdateListener) { 5040 assert(From->getVTList().VTs == To->getVTList().VTs && 5041 From->getNumValues() == To->getNumValues() && 5042 "Cannot use this version of ReplaceAllUsesWith!"); 5043 5044 // Handle the trivial case. 5045 if (From == To) 5046 return; 5047 5048 // Iterate over just the existing users of From. See the comments in 5049 // the ReplaceAllUsesWith above. 5050 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5051 while (UI != UE) { 5052 SDNode *User = *UI; 5053 5054 // This node is about to morph, remove its old self from the CSE maps. 5055 RemoveNodeFromCSEMaps(User); 5056 5057 // A user can appear in a use list multiple times, and when this 5058 // happens the uses are usually next to each other in the list. 5059 // To help reduce the number of CSE recomputations, process all 5060 // the uses of this user that we can find this way. 5061 do { 5062 SDUse &Use = UI.getUse(); 5063 ++UI; 5064 Use.setNode(To); 5065 } while (UI != UE && *UI == User); 5066 5067 // Now that we have modified User, add it back to the CSE maps. If it 5068 // already exists there, recursively merge the results together. 5069 AddModifiedNodeToCSEMaps(User, UpdateListener); 5070 } 5071} 5072 5073/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5074/// This can cause recursive merging of nodes in the DAG. 5075/// 5076/// This version can replace From with any result values. To must match the 5077/// number and types of values returned by From. 5078void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5079 const SDValue *To, 5080 DAGUpdateListener *UpdateListener) { 5081 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5082 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5083 5084 // Iterate over just the existing users of From. See the comments in 5085 // the ReplaceAllUsesWith above. 5086 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5087 while (UI != UE) { 5088 SDNode *User = *UI; 5089 5090 // This node is about to morph, remove its old self from the CSE maps. 5091 RemoveNodeFromCSEMaps(User); 5092 5093 // A user can appear in a use list multiple times, and when this 5094 // happens the uses are usually next to each other in the list. 5095 // To help reduce the number of CSE recomputations, process all 5096 // the uses of this user that we can find this way. 5097 do { 5098 SDUse &Use = UI.getUse(); 5099 const SDValue &ToOp = To[Use.getResNo()]; 5100 ++UI; 5101 Use.set(ToOp); 5102 } while (UI != UE && *UI == User); 5103 5104 // Now that we have modified User, add it back to the CSE maps. If it 5105 // already exists there, recursively merge the results together. 5106 AddModifiedNodeToCSEMaps(User, UpdateListener); 5107 } 5108} 5109 5110/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5111/// uses of other values produced by From.getNode() alone. The Deleted 5112/// vector is handled the same way as for ReplaceAllUsesWith. 5113void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5114 DAGUpdateListener *UpdateListener){ 5115 // Handle the really simple, really trivial case efficiently. 5116 if (From == To) return; 5117 5118 // Handle the simple, trivial, case efficiently. 5119 if (From.getNode()->getNumValues() == 1) { 5120 ReplaceAllUsesWith(From, To, UpdateListener); 5121 return; 5122 } 5123 5124 // Iterate over just the existing users of From. See the comments in 5125 // the ReplaceAllUsesWith above. 5126 SDNode::use_iterator UI = From.getNode()->use_begin(), 5127 UE = From.getNode()->use_end(); 5128 while (UI != UE) { 5129 SDNode *User = *UI; 5130 bool UserRemovedFromCSEMaps = false; 5131 5132 // A user can appear in a use list multiple times, and when this 5133 // happens the uses are usually next to each other in the list. 5134 // To help reduce the number of CSE recomputations, process all 5135 // the uses of this user that we can find this way. 5136 do { 5137 SDUse &Use = UI.getUse(); 5138 5139 // Skip uses of different values from the same node. 5140 if (Use.getResNo() != From.getResNo()) { 5141 ++UI; 5142 continue; 5143 } 5144 5145 // If this node hasn't been modified yet, it's still in the CSE maps, 5146 // so remove its old self from the CSE maps. 5147 if (!UserRemovedFromCSEMaps) { 5148 RemoveNodeFromCSEMaps(User); 5149 UserRemovedFromCSEMaps = true; 5150 } 5151 5152 ++UI; 5153 Use.set(To); 5154 } while (UI != UE && *UI == User); 5155 5156 // We are iterating over all uses of the From node, so if a use 5157 // doesn't use the specific value, no changes are made. 5158 if (!UserRemovedFromCSEMaps) 5159 continue; 5160 5161 // Now that we have modified User, add it back to the CSE maps. If it 5162 // already exists there, recursively merge the results together. 5163 AddModifiedNodeToCSEMaps(User, UpdateListener); 5164 } 5165} 5166 5167namespace { 5168 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5169 /// to record information about a use. 5170 struct UseMemo { 5171 SDNode *User; 5172 unsigned Index; 5173 SDUse *Use; 5174 }; 5175 5176 /// operator< - Sort Memos by User. 5177 bool operator<(const UseMemo &L, const UseMemo &R) { 5178 return (intptr_t)L.User < (intptr_t)R.User; 5179 } 5180} 5181 5182/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5183/// uses of other values produced by From.getNode() alone. The same value 5184/// may appear in both the From and To list. The Deleted vector is 5185/// handled the same way as for ReplaceAllUsesWith. 5186void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5187 const SDValue *To, 5188 unsigned Num, 5189 DAGUpdateListener *UpdateListener){ 5190 // Handle the simple, trivial case efficiently. 5191 if (Num == 1) 5192 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5193 5194 // Read up all the uses and make records of them. This helps 5195 // processing new uses that are introduced during the 5196 // replacement process. 5197 SmallVector<UseMemo, 4> Uses; 5198 for (unsigned i = 0; i != Num; ++i) { 5199 unsigned FromResNo = From[i].getResNo(); 5200 SDNode *FromNode = From[i].getNode(); 5201 for (SDNode::use_iterator UI = FromNode->use_begin(), 5202 E = FromNode->use_end(); UI != E; ++UI) { 5203 SDUse &Use = UI.getUse(); 5204 if (Use.getResNo() == FromResNo) { 5205 UseMemo Memo = { *UI, i, &Use }; 5206 Uses.push_back(Memo); 5207 } 5208 } 5209 } 5210 5211 // Sort the uses, so that all the uses from a given User are together. 5212 std::sort(Uses.begin(), Uses.end()); 5213 5214 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5215 UseIndex != UseIndexEnd; ) { 5216 // We know that this user uses some value of From. If it is the right 5217 // value, update it. 5218 SDNode *User = Uses[UseIndex].User; 5219 5220 // This node is about to morph, remove its old self from the CSE maps. 5221 RemoveNodeFromCSEMaps(User); 5222 5223 // The Uses array is sorted, so all the uses for a given User 5224 // are next to each other in the list. 5225 // To help reduce the number of CSE recomputations, process all 5226 // the uses of this user that we can find this way. 5227 do { 5228 unsigned i = Uses[UseIndex].Index; 5229 SDUse &Use = *Uses[UseIndex].Use; 5230 ++UseIndex; 5231 5232 Use.set(To[i]); 5233 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5234 5235 // Now that we have modified User, add it back to the CSE maps. If it 5236 // already exists there, recursively merge the results together. 5237 AddModifiedNodeToCSEMaps(User, UpdateListener); 5238 } 5239} 5240 5241/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5242/// based on their topological order. It returns the maximum id and a vector 5243/// of the SDNodes* in assigned order by reference. 5244unsigned SelectionDAG::AssignTopologicalOrder() { 5245 5246 unsigned DAGSize = 0; 5247 5248 // SortedPos tracks the progress of the algorithm. Nodes before it are 5249 // sorted, nodes after it are unsorted. When the algorithm completes 5250 // it is at the end of the list. 5251 allnodes_iterator SortedPos = allnodes_begin(); 5252 5253 // Visit all the nodes. Move nodes with no operands to the front of 5254 // the list immediately. Annotate nodes that do have operands with their 5255 // operand count. Before we do this, the Node Id fields of the nodes 5256 // may contain arbitrary values. After, the Node Id fields for nodes 5257 // before SortedPos will contain the topological sort index, and the 5258 // Node Id fields for nodes At SortedPos and after will contain the 5259 // count of outstanding operands. 5260 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5261 SDNode *N = I++; 5262 unsigned Degree = N->getNumOperands(); 5263 if (Degree == 0) { 5264 // A node with no uses, add it to the result array immediately. 5265 N->setNodeId(DAGSize++); 5266 allnodes_iterator Q = N; 5267 if (Q != SortedPos) 5268 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5269 ++SortedPos; 5270 } else { 5271 // Temporarily use the Node Id as scratch space for the degree count. 5272 N->setNodeId(Degree); 5273 } 5274 } 5275 5276 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5277 // such that by the time the end is reached all nodes will be sorted. 5278 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5279 SDNode *N = I; 5280 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5281 UI != UE; ++UI) { 5282 SDNode *P = *UI; 5283 unsigned Degree = P->getNodeId(); 5284 --Degree; 5285 if (Degree == 0) { 5286 // All of P's operands are sorted, so P may sorted now. 5287 P->setNodeId(DAGSize++); 5288 if (P != SortedPos) 5289 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5290 ++SortedPos; 5291 } else { 5292 // Update P's outstanding operand count. 5293 P->setNodeId(Degree); 5294 } 5295 } 5296 } 5297 5298 assert(SortedPos == AllNodes.end() && 5299 "Topological sort incomplete!"); 5300 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5301 "First node in topological sort is not the entry token!"); 5302 assert(AllNodes.front().getNodeId() == 0 && 5303 "First node in topological sort has non-zero id!"); 5304 assert(AllNodes.front().getNumOperands() == 0 && 5305 "First node in topological sort has operands!"); 5306 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5307 "Last node in topologic sort has unexpected id!"); 5308 assert(AllNodes.back().use_empty() && 5309 "Last node in topologic sort has users!"); 5310 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5311 return DAGSize; 5312} 5313 5314 5315 5316//===----------------------------------------------------------------------===// 5317// SDNode Class 5318//===----------------------------------------------------------------------===// 5319 5320HandleSDNode::~HandleSDNode() { 5321 DropOperands(); 5322} 5323 5324GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 5325 MVT VT, int64_t o) 5326 : SDNode(isa<GlobalVariable>(GA) && 5327 cast<GlobalVariable>(GA)->isThreadLocal() ? 5328 // Thread Local 5329 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 5330 // Non Thread Local 5331 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 5332 getSDVTList(VT)), Offset(o) { 5333 TheGlobal = const_cast<GlobalValue*>(GA); 5334} 5335 5336MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 5337 const Value *srcValue, int SVO, 5338 unsigned alignment, bool vol) 5339 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 5340 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 5341 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5342 assert(getAlignment() == alignment && "Alignment representation error!"); 5343 assert(isVolatile() == vol && "Volatile representation error!"); 5344} 5345 5346MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops, 5347 unsigned NumOps, MVT memvt, const Value *srcValue, 5348 int SVO, unsigned alignment, bool vol) 5349 : SDNode(Opc, VTs, Ops, NumOps), 5350 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 5351 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 5352 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5353 assert(getAlignment() == alignment && "Alignment representation error!"); 5354 assert(isVolatile() == vol && "Volatile representation error!"); 5355} 5356 5357MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt, 5358 const Value *srcValue, int SVO, 5359 unsigned alignment, bool vol) 5360 : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 5361 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 5362 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5363 assert(getAlignment() == alignment && "Alignment representation error!"); 5364 assert(isVolatile() == vol && "Volatile representation error!"); 5365} 5366 5367MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5368 const SDValue *Ops, 5369 unsigned NumOps, MVT memvt, const Value *srcValue, 5370 int SVO, unsigned alignment, bool vol) 5371 : SDNode(Opc, dl, VTs, Ops, NumOps), 5372 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) { 5373 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, vol, alignment); 5374 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 5375 assert(getAlignment() == alignment && "Alignment representation error!"); 5376 assert(isVolatile() == vol && "Volatile representation error!"); 5377} 5378 5379/// getMemOperand - Return a MachineMemOperand object describing the memory 5380/// reference performed by this memory reference. 5381MachineMemOperand MemSDNode::getMemOperand() const { 5382 int Flags = 0; 5383 if (isa<LoadSDNode>(this)) 5384 Flags = MachineMemOperand::MOLoad; 5385 else if (isa<StoreSDNode>(this)) 5386 Flags = MachineMemOperand::MOStore; 5387 else if (isa<AtomicSDNode>(this)) { 5388 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 5389 } 5390 else { 5391 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 5392 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 5393 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 5394 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 5395 } 5396 5397 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 5398 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 5399 5400 // Check if the memory reference references a frame index 5401 const FrameIndexSDNode *FI = 5402 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 5403 if (!getSrcValue() && FI) 5404 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 5405 Flags, 0, Size, getAlignment()); 5406 else 5407 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 5408 Size, getAlignment()); 5409} 5410 5411/// Profile - Gather unique data for the node. 5412/// 5413void SDNode::Profile(FoldingSetNodeID &ID) const { 5414 AddNodeIDNode(ID, this); 5415} 5416 5417/// getValueTypeList - Return a pointer to the specified value type. 5418/// 5419const MVT *SDNode::getValueTypeList(MVT VT) { 5420 if (VT.isExtended()) { 5421 static std::set<MVT, MVT::compareRawBits> EVTs; 5422 return &(*EVTs.insert(VT).first); 5423 } else { 5424 static MVT VTs[MVT::LAST_VALUETYPE]; 5425 VTs[VT.getSimpleVT()] = VT; 5426 return &VTs[VT.getSimpleVT()]; 5427 } 5428} 5429 5430/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5431/// indicated value. This method ignores uses of other values defined by this 5432/// operation. 5433bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5434 assert(Value < getNumValues() && "Bad value!"); 5435 5436 // TODO: Only iterate over uses of a given value of the node 5437 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5438 if (UI.getUse().getResNo() == Value) { 5439 if (NUses == 0) 5440 return false; 5441 --NUses; 5442 } 5443 } 5444 5445 // Found exactly the right number of uses? 5446 return NUses == 0; 5447} 5448 5449 5450/// hasAnyUseOfValue - Return true if there are any use of the indicated 5451/// value. This method ignores uses of other values defined by this operation. 5452bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5453 assert(Value < getNumValues() && "Bad value!"); 5454 5455 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5456 if (UI.getUse().getResNo() == Value) 5457 return true; 5458 5459 return false; 5460} 5461 5462 5463/// isOnlyUserOf - Return true if this node is the only use of N. 5464/// 5465bool SDNode::isOnlyUserOf(SDNode *N) const { 5466 bool Seen = false; 5467 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5468 SDNode *User = *I; 5469 if (User == this) 5470 Seen = true; 5471 else 5472 return false; 5473 } 5474 5475 return Seen; 5476} 5477 5478/// isOperand - Return true if this node is an operand of N. 5479/// 5480bool SDValue::isOperandOf(SDNode *N) const { 5481 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5482 if (*this == N->getOperand(i)) 5483 return true; 5484 return false; 5485} 5486 5487bool SDNode::isOperandOf(SDNode *N) const { 5488 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5489 if (this == N->OperandList[i].getNode()) 5490 return true; 5491 return false; 5492} 5493 5494/// reachesChainWithoutSideEffects - Return true if this operand (which must 5495/// be a chain) reaches the specified operand without crossing any 5496/// side-effecting instructions. In practice, this looks through token 5497/// factors and non-volatile loads. In order to remain efficient, this only 5498/// looks a couple of nodes in, it does not do an exhaustive search. 5499bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5500 unsigned Depth) const { 5501 if (*this == Dest) return true; 5502 5503 // Don't search too deeply, we just want to be able to see through 5504 // TokenFactor's etc. 5505 if (Depth == 0) return false; 5506 5507 // If this is a token factor, all inputs to the TF happen in parallel. If any 5508 // of the operands of the TF reach dest, then we can do the xform. 5509 if (getOpcode() == ISD::TokenFactor) { 5510 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5511 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5512 return true; 5513 return false; 5514 } 5515 5516 // Loads don't have side effects, look through them. 5517 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5518 if (!Ld->isVolatile()) 5519 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5520 } 5521 return false; 5522} 5523 5524 5525static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 5526 SmallPtrSet<SDNode *, 32> &Visited) { 5527 if (found || !Visited.insert(N)) 5528 return; 5529 5530 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 5531 SDNode *Op = N->getOperand(i).getNode(); 5532 if (Op == P) { 5533 found = true; 5534 return; 5535 } 5536 findPredecessor(Op, P, found, Visited); 5537 } 5538} 5539 5540/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5541/// is either an operand of N or it can be reached by recursively traversing 5542/// up the operands. 5543/// NOTE: this is an expensive method. Use it carefully. 5544bool SDNode::isPredecessorOf(SDNode *N) const { 5545 SmallPtrSet<SDNode *, 32> Visited; 5546 bool found = false; 5547 findPredecessor(N, this, found, Visited); 5548 return found; 5549} 5550 5551uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5552 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5553 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5554} 5555 5556std::string SDNode::getOperationName(const SelectionDAG *G) const { 5557 switch (getOpcode()) { 5558 default: 5559 if (getOpcode() < ISD::BUILTIN_OP_END) 5560 return "<<Unknown DAG Node>>"; 5561 if (isMachineOpcode()) { 5562 if (G) 5563 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5564 if (getMachineOpcode() < TII->getNumOpcodes()) 5565 return TII->get(getMachineOpcode()).getName(); 5566 return "<<Unknown Machine Node>>"; 5567 } 5568 if (G) { 5569 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5570 const char *Name = TLI.getTargetNodeName(getOpcode()); 5571 if (Name) return Name; 5572 return "<<Unknown Target Node>>"; 5573 } 5574 return "<<Unknown Node>>"; 5575 5576#ifndef NDEBUG 5577 case ISD::DELETED_NODE: 5578 return "<<Deleted Node!>>"; 5579#endif 5580 case ISD::PREFETCH: return "Prefetch"; 5581 case ISD::MEMBARRIER: return "MemBarrier"; 5582 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5583 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5584 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5585 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5586 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5587 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5588 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5589 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5590 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5591 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5592 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5593 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5594 case ISD::PCMARKER: return "PCMarker"; 5595 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5596 case ISD::SRCVALUE: return "SrcValue"; 5597 case ISD::MEMOPERAND: return "MemOperand"; 5598 case ISD::EntryToken: return "EntryToken"; 5599 case ISD::TokenFactor: return "TokenFactor"; 5600 case ISD::AssertSext: return "AssertSext"; 5601 case ISD::AssertZext: return "AssertZext"; 5602 5603 case ISD::BasicBlock: return "BasicBlock"; 5604 case ISD::ARG_FLAGS: return "ArgFlags"; 5605 case ISD::VALUETYPE: return "ValueType"; 5606 case ISD::Register: return "Register"; 5607 5608 case ISD::Constant: return "Constant"; 5609 case ISD::ConstantFP: return "ConstantFP"; 5610 case ISD::GlobalAddress: return "GlobalAddress"; 5611 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5612 case ISD::FrameIndex: return "FrameIndex"; 5613 case ISD::JumpTable: return "JumpTable"; 5614 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5615 case ISD::RETURNADDR: return "RETURNADDR"; 5616 case ISD::FRAMEADDR: return "FRAMEADDR"; 5617 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5618 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5619 case ISD::EHSELECTION: return "EHSELECTION"; 5620 case ISD::EH_RETURN: return "EH_RETURN"; 5621 case ISD::ConstantPool: return "ConstantPool"; 5622 case ISD::ExternalSymbol: return "ExternalSymbol"; 5623 case ISD::INTRINSIC_WO_CHAIN: { 5624 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5625 return Intrinsic::getName((Intrinsic::ID)IID); 5626 } 5627 case ISD::INTRINSIC_VOID: 5628 case ISD::INTRINSIC_W_CHAIN: { 5629 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5630 return Intrinsic::getName((Intrinsic::ID)IID); 5631 } 5632 5633 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5634 case ISD::TargetConstant: return "TargetConstant"; 5635 case ISD::TargetConstantFP:return "TargetConstantFP"; 5636 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5637 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5638 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5639 case ISD::TargetJumpTable: return "TargetJumpTable"; 5640 case ISD::TargetConstantPool: return "TargetConstantPool"; 5641 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5642 5643 case ISD::CopyToReg: return "CopyToReg"; 5644 case ISD::CopyFromReg: return "CopyFromReg"; 5645 case ISD::UNDEF: return "undef"; 5646 case ISD::MERGE_VALUES: return "merge_values"; 5647 case ISD::INLINEASM: return "inlineasm"; 5648 case ISD::DBG_LABEL: return "dbg_label"; 5649 case ISD::EH_LABEL: return "eh_label"; 5650 case ISD::DECLARE: return "declare"; 5651 case ISD::HANDLENODE: return "handlenode"; 5652 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 5653 case ISD::CALL: return "call"; 5654 5655 // Unary operators 5656 case ISD::FABS: return "fabs"; 5657 case ISD::FNEG: return "fneg"; 5658 case ISD::FSQRT: return "fsqrt"; 5659 case ISD::FSIN: return "fsin"; 5660 case ISD::FCOS: return "fcos"; 5661 case ISD::FPOWI: return "fpowi"; 5662 case ISD::FPOW: return "fpow"; 5663 case ISD::FTRUNC: return "ftrunc"; 5664 case ISD::FFLOOR: return "ffloor"; 5665 case ISD::FCEIL: return "fceil"; 5666 case ISD::FRINT: return "frint"; 5667 case ISD::FNEARBYINT: return "fnearbyint"; 5668 5669 // Binary operators 5670 case ISD::ADD: return "add"; 5671 case ISD::SUB: return "sub"; 5672 case ISD::MUL: return "mul"; 5673 case ISD::MULHU: return "mulhu"; 5674 case ISD::MULHS: return "mulhs"; 5675 case ISD::SDIV: return "sdiv"; 5676 case ISD::UDIV: return "udiv"; 5677 case ISD::SREM: return "srem"; 5678 case ISD::UREM: return "urem"; 5679 case ISD::SMUL_LOHI: return "smul_lohi"; 5680 case ISD::UMUL_LOHI: return "umul_lohi"; 5681 case ISD::SDIVREM: return "sdivrem"; 5682 case ISD::UDIVREM: return "udivrem"; 5683 case ISD::AND: return "and"; 5684 case ISD::OR: return "or"; 5685 case ISD::XOR: return "xor"; 5686 case ISD::SHL: return "shl"; 5687 case ISD::SRA: return "sra"; 5688 case ISD::SRL: return "srl"; 5689 case ISD::ROTL: return "rotl"; 5690 case ISD::ROTR: return "rotr"; 5691 case ISD::FADD: return "fadd"; 5692 case ISD::FSUB: return "fsub"; 5693 case ISD::FMUL: return "fmul"; 5694 case ISD::FDIV: return "fdiv"; 5695 case ISD::FREM: return "frem"; 5696 case ISD::FCOPYSIGN: return "fcopysign"; 5697 case ISD::FGETSIGN: return "fgetsign"; 5698 5699 case ISD::SETCC: return "setcc"; 5700 case ISD::VSETCC: return "vsetcc"; 5701 case ISD::SELECT: return "select"; 5702 case ISD::SELECT_CC: return "select_cc"; 5703 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5704 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5705 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5706 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5707 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5708 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5709 case ISD::CARRY_FALSE: return "carry_false"; 5710 case ISD::ADDC: return "addc"; 5711 case ISD::ADDE: return "adde"; 5712 case ISD::SADDO: return "saddo"; 5713 case ISD::UADDO: return "uaddo"; 5714 case ISD::SSUBO: return "ssubo"; 5715 case ISD::USUBO: return "usubo"; 5716 case ISD::SMULO: return "smulo"; 5717 case ISD::UMULO: return "umulo"; 5718 case ISD::SUBC: return "subc"; 5719 case ISD::SUBE: return "sube"; 5720 case ISD::SHL_PARTS: return "shl_parts"; 5721 case ISD::SRA_PARTS: return "sra_parts"; 5722 case ISD::SRL_PARTS: return "srl_parts"; 5723 5724 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5725 case ISD::INSERT_SUBREG: return "insert_subreg"; 5726 5727 // Conversion operators. 5728 case ISD::SIGN_EXTEND: return "sign_extend"; 5729 case ISD::ZERO_EXTEND: return "zero_extend"; 5730 case ISD::ANY_EXTEND: return "any_extend"; 5731 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5732 case ISD::TRUNCATE: return "truncate"; 5733 case ISD::FP_ROUND: return "fp_round"; 5734 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5735 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5736 case ISD::FP_EXTEND: return "fp_extend"; 5737 5738 case ISD::SINT_TO_FP: return "sint_to_fp"; 5739 case ISD::UINT_TO_FP: return "uint_to_fp"; 5740 case ISD::FP_TO_SINT: return "fp_to_sint"; 5741 case ISD::FP_TO_UINT: return "fp_to_uint"; 5742 case ISD::BIT_CONVERT: return "bit_convert"; 5743 5744 case ISD::CONVERT_RNDSAT: { 5745 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5746 default: assert(0 && "Unknown cvt code!"); 5747 case ISD::CVT_FF: return "cvt_ff"; 5748 case ISD::CVT_FS: return "cvt_fs"; 5749 case ISD::CVT_FU: return "cvt_fu"; 5750 case ISD::CVT_SF: return "cvt_sf"; 5751 case ISD::CVT_UF: return "cvt_uf"; 5752 case ISD::CVT_SS: return "cvt_ss"; 5753 case ISD::CVT_SU: return "cvt_su"; 5754 case ISD::CVT_US: return "cvt_us"; 5755 case ISD::CVT_UU: return "cvt_uu"; 5756 } 5757 } 5758 5759 // Control flow instructions 5760 case ISD::BR: return "br"; 5761 case ISD::BRIND: return "brind"; 5762 case ISD::BR_JT: return "br_jt"; 5763 case ISD::BRCOND: return "brcond"; 5764 case ISD::BR_CC: return "br_cc"; 5765 case ISD::RET: return "ret"; 5766 case ISD::CALLSEQ_START: return "callseq_start"; 5767 case ISD::CALLSEQ_END: return "callseq_end"; 5768 5769 // Other operators 5770 case ISD::LOAD: return "load"; 5771 case ISD::STORE: return "store"; 5772 case ISD::VAARG: return "vaarg"; 5773 case ISD::VACOPY: return "vacopy"; 5774 case ISD::VAEND: return "vaend"; 5775 case ISD::VASTART: return "vastart"; 5776 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5777 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5778 case ISD::BUILD_PAIR: return "build_pair"; 5779 case ISD::STACKSAVE: return "stacksave"; 5780 case ISD::STACKRESTORE: return "stackrestore"; 5781 case ISD::TRAP: return "trap"; 5782 5783 // Bit manipulation 5784 case ISD::BSWAP: return "bswap"; 5785 case ISD::CTPOP: return "ctpop"; 5786 case ISD::CTTZ: return "cttz"; 5787 case ISD::CTLZ: return "ctlz"; 5788 5789 // Debug info 5790 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5791 case ISD::DEBUG_LOC: return "debug_loc"; 5792 5793 // Trampolines 5794 case ISD::TRAMPOLINE: return "trampoline"; 5795 5796 case ISD::CONDCODE: 5797 switch (cast<CondCodeSDNode>(this)->get()) { 5798 default: assert(0 && "Unknown setcc condition!"); 5799 case ISD::SETOEQ: return "setoeq"; 5800 case ISD::SETOGT: return "setogt"; 5801 case ISD::SETOGE: return "setoge"; 5802 case ISD::SETOLT: return "setolt"; 5803 case ISD::SETOLE: return "setole"; 5804 case ISD::SETONE: return "setone"; 5805 5806 case ISD::SETO: return "seto"; 5807 case ISD::SETUO: return "setuo"; 5808 case ISD::SETUEQ: return "setue"; 5809 case ISD::SETUGT: return "setugt"; 5810 case ISD::SETUGE: return "setuge"; 5811 case ISD::SETULT: return "setult"; 5812 case ISD::SETULE: return "setule"; 5813 case ISD::SETUNE: return "setune"; 5814 5815 case ISD::SETEQ: return "seteq"; 5816 case ISD::SETGT: return "setgt"; 5817 case ISD::SETGE: return "setge"; 5818 case ISD::SETLT: return "setlt"; 5819 case ISD::SETLE: return "setle"; 5820 case ISD::SETNE: return "setne"; 5821 } 5822 } 5823} 5824 5825const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5826 switch (AM) { 5827 default: 5828 return ""; 5829 case ISD::PRE_INC: 5830 return "<pre-inc>"; 5831 case ISD::PRE_DEC: 5832 return "<pre-dec>"; 5833 case ISD::POST_INC: 5834 return "<post-inc>"; 5835 case ISD::POST_DEC: 5836 return "<post-dec>"; 5837 } 5838} 5839 5840std::string ISD::ArgFlagsTy::getArgFlagsString() { 5841 std::string S = "< "; 5842 5843 if (isZExt()) 5844 S += "zext "; 5845 if (isSExt()) 5846 S += "sext "; 5847 if (isInReg()) 5848 S += "inreg "; 5849 if (isSRet()) 5850 S += "sret "; 5851 if (isByVal()) 5852 S += "byval "; 5853 if (isNest()) 5854 S += "nest "; 5855 if (getByValAlign()) 5856 S += "byval-align:" + utostr(getByValAlign()) + " "; 5857 if (getOrigAlign()) 5858 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5859 if (getByValSize()) 5860 S += "byval-size:" + utostr(getByValSize()) + " "; 5861 return S + ">"; 5862} 5863 5864void SDNode::dump() const { dump(0); } 5865void SDNode::dump(const SelectionDAG *G) const { 5866 print(errs(), G); 5867 errs().flush(); 5868} 5869 5870void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5871 OS << (void*)this << ": "; 5872 5873 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5874 if (i) OS << ","; 5875 if (getValueType(i) == MVT::Other) 5876 OS << "ch"; 5877 else 5878 OS << getValueType(i).getMVTString(); 5879 } 5880 OS << " = " << getOperationName(G); 5881 5882 OS << " "; 5883 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5884 if (i) OS << ", "; 5885 OS << (void*)getOperand(i).getNode(); 5886 if (unsigned RN = getOperand(i).getResNo()) 5887 OS << ":" << RN; 5888 } 5889 5890 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5891 SDNode *Mask = getOperand(2).getNode(); 5892 OS << "<"; 5893 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5894 if (i) OS << ","; 5895 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5896 OS << "u"; 5897 else 5898 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5899 } 5900 OS << ">"; 5901 } 5902 5903 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5904 OS << '<' << CSDN->getAPIntValue() << '>'; 5905 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5906 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5907 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5908 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5909 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5910 else { 5911 OS << "<APFloat("; 5912 CSDN->getValueAPF().bitcastToAPInt().dump(); 5913 OS << ")>"; 5914 } 5915 } else if (const GlobalAddressSDNode *GADN = 5916 dyn_cast<GlobalAddressSDNode>(this)) { 5917 int64_t offset = GADN->getOffset(); 5918 OS << '<'; 5919 WriteAsOperand(OS, GADN->getGlobal()); 5920 OS << '>'; 5921 if (offset > 0) 5922 OS << " + " << offset; 5923 else 5924 OS << " " << offset; 5925 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5926 OS << "<" << FIDN->getIndex() << ">"; 5927 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5928 OS << "<" << JTDN->getIndex() << ">"; 5929 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5930 int offset = CP->getOffset(); 5931 if (CP->isMachineConstantPoolEntry()) 5932 OS << "<" << *CP->getMachineCPVal() << ">"; 5933 else 5934 OS << "<" << *CP->getConstVal() << ">"; 5935 if (offset > 0) 5936 OS << " + " << offset; 5937 else 5938 OS << " " << offset; 5939 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5940 OS << "<"; 5941 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5942 if (LBB) 5943 OS << LBB->getName() << " "; 5944 OS << (const void*)BBDN->getBasicBlock() << ">"; 5945 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5946 if (G && R->getReg() && 5947 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5948 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5949 } else { 5950 OS << " #" << R->getReg(); 5951 } 5952 } else if (const ExternalSymbolSDNode *ES = 5953 dyn_cast<ExternalSymbolSDNode>(this)) { 5954 OS << "'" << ES->getSymbol() << "'"; 5955 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5956 if (M->getValue()) 5957 OS << "<" << M->getValue() << ">"; 5958 else 5959 OS << "<null>"; 5960 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5961 if (M->MO.getValue()) 5962 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5963 else 5964 OS << "<null:" << M->MO.getOffset() << ">"; 5965 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5966 OS << N->getArgFlags().getArgFlagsString(); 5967 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5968 OS << ":" << N->getVT().getMVTString(); 5969 } 5970 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5971 const Value *SrcValue = LD->getSrcValue(); 5972 int SrcOffset = LD->getSrcValueOffset(); 5973 OS << " <"; 5974 if (SrcValue) 5975 OS << SrcValue; 5976 else 5977 OS << "null"; 5978 OS << ":" << SrcOffset << ">"; 5979 5980 bool doExt = true; 5981 switch (LD->getExtensionType()) { 5982 default: doExt = false; break; 5983 case ISD::EXTLOAD: OS << " <anyext "; break; 5984 case ISD::SEXTLOAD: OS << " <sext "; break; 5985 case ISD::ZEXTLOAD: OS << " <zext "; break; 5986 } 5987 if (doExt) 5988 OS << LD->getMemoryVT().getMVTString() << ">"; 5989 5990 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5991 if (*AM) 5992 OS << " " << AM; 5993 if (LD->isVolatile()) 5994 OS << " <volatile>"; 5995 OS << " alignment=" << LD->getAlignment(); 5996 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5997 const Value *SrcValue = ST->getSrcValue(); 5998 int SrcOffset = ST->getSrcValueOffset(); 5999 OS << " <"; 6000 if (SrcValue) 6001 OS << SrcValue; 6002 else 6003 OS << "null"; 6004 OS << ":" << SrcOffset << ">"; 6005 6006 if (ST->isTruncatingStore()) 6007 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 6008 6009 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6010 if (*AM) 6011 OS << " " << AM; 6012 if (ST->isVolatile()) 6013 OS << " <volatile>"; 6014 OS << " alignment=" << ST->getAlignment(); 6015 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 6016 const Value *SrcValue = AT->getSrcValue(); 6017 int SrcOffset = AT->getSrcValueOffset(); 6018 OS << " <"; 6019 if (SrcValue) 6020 OS << SrcValue; 6021 else 6022 OS << "null"; 6023 OS << ":" << SrcOffset << ">"; 6024 if (AT->isVolatile()) 6025 OS << " <volatile>"; 6026 OS << " alignment=" << AT->getAlignment(); 6027 } 6028} 6029 6030static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6031 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6032 if (N->getOperand(i).getNode()->hasOneUse()) 6033 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6034 else 6035 cerr << "\n" << std::string(indent+2, ' ') 6036 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6037 6038 6039 cerr << "\n" << std::string(indent, ' '); 6040 N->dump(G); 6041} 6042 6043void SelectionDAG::dump() const { 6044 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6045 6046 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6047 I != E; ++I) { 6048 const SDNode *N = I; 6049 if (!N->hasOneUse() && N != getRoot().getNode()) 6050 DumpNodes(N, 2, this); 6051 } 6052 6053 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6054 6055 cerr << "\n\n"; 6056} 6057 6058const Type *ConstantPoolSDNode::getType() const { 6059 if (isMachineConstantPoolEntry()) 6060 return Val.MachineCPVal->getType(); 6061 return Val.ConstVal->getType(); 6062} 6063