SelectionDAG.cpp revision a90c8e690bd9103bb4a5d943f98279a55bf42ad1
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetOptions.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/Support/CommandLine.h" 34#include "llvm/Support/MathExtras.h" 35#include "llvm/Support/raw_ostream.h" 36#include "llvm/ADT/SetVector.h" 37#include "llvm/ADT/SmallPtrSet.h" 38#include "llvm/ADT/SmallSet.h" 39#include "llvm/ADT/SmallVector.h" 40#include "llvm/ADT/StringExtras.h" 41#include <algorithm> 42#include <cmath> 43using namespace llvm; 44 45/// makeVTList - Return an instance of the SDVTList struct initialized with the 46/// specified members. 47static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 48 SDVTList Res = {VTs, NumVTs}; 49 return Res; 50} 51 52static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 53 switch (VT.getSimpleVT()) { 54 default: assert(0 && "Unknown FP format"); 55 case MVT::f32: return &APFloat::IEEEsingle; 56 case MVT::f64: return &APFloat::IEEEdouble; 57 case MVT::f80: return &APFloat::x87DoubleExtended; 58 case MVT::f128: return &APFloat::IEEEquad; 59 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 60 } 61} 62 63SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 64 65//===----------------------------------------------------------------------===// 66// ConstantFPSDNode Class 67//===----------------------------------------------------------------------===// 68 69/// isExactlyValue - We don't rely on operator== working on double values, as 70/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 71/// As such, this method can be used to do an exact bit-for-bit comparison of 72/// two floating point values. 73bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 74 return getValueAPF().bitwiseIsEqual(V); 75} 76 77bool ConstantFPSDNode::isValueValidForType(MVT VT, 78 const APFloat& Val) { 79 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 80 81 // PPC long double cannot be converted to any other type. 82 if (VT == MVT::ppcf128 || 83 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 84 return false; 85 86 // convert modifies in place, so make a copy. 87 APFloat Val2 = APFloat(Val); 88 bool losesInfo; 89 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 90 &losesInfo); 91 return !losesInfo; 92} 93 94//===----------------------------------------------------------------------===// 95// ISD Namespace 96//===----------------------------------------------------------------------===// 97 98/// isBuildVectorAllOnes - Return true if the specified node is a 99/// BUILD_VECTOR where all of the elements are ~0 or undef. 100bool ISD::isBuildVectorAllOnes(const SDNode *N) { 101 // Look through a bit convert. 102 if (N->getOpcode() == ISD::BIT_CONVERT) 103 N = N->getOperand(0).getNode(); 104 105 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 106 107 unsigned i = 0, e = N->getNumOperands(); 108 109 // Skip over all of the undef values. 110 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 111 ++i; 112 113 // Do not accept an all-undef vector. 114 if (i == e) return false; 115 116 // Do not accept build_vectors that aren't all constants or which have non-~0 117 // elements. 118 SDValue NotZero = N->getOperand(i); 119 if (isa<ConstantSDNode>(NotZero)) { 120 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 121 return false; 122 } else if (isa<ConstantFPSDNode>(NotZero)) { 123 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 124 bitcastToAPInt().isAllOnesValue()) 125 return false; 126 } else 127 return false; 128 129 // Okay, we have at least one ~0 value, check to see if the rest match or are 130 // undefs. 131 for (++i; i != e; ++i) 132 if (N->getOperand(i) != NotZero && 133 N->getOperand(i).getOpcode() != ISD::UNDEF) 134 return false; 135 return true; 136} 137 138 139/// isBuildVectorAllZeros - Return true if the specified node is a 140/// BUILD_VECTOR where all of the elements are 0 or undef. 141bool ISD::isBuildVectorAllZeros(const SDNode *N) { 142 // Look through a bit convert. 143 if (N->getOpcode() == ISD::BIT_CONVERT) 144 N = N->getOperand(0).getNode(); 145 146 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 147 148 unsigned i = 0, e = N->getNumOperands(); 149 150 // Skip over all of the undef values. 151 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 152 ++i; 153 154 // Do not accept an all-undef vector. 155 if (i == e) return false; 156 157 // Do not accept build_vectors that aren't all constants or which have non-~0 158 // elements. 159 SDValue Zero = N->getOperand(i); 160 if (isa<ConstantSDNode>(Zero)) { 161 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 162 return false; 163 } else if (isa<ConstantFPSDNode>(Zero)) { 164 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 165 return false; 166 } else 167 return false; 168 169 // Okay, we have at least one ~0 value, check to see if the rest match or are 170 // undefs. 171 for (++i; i != e; ++i) 172 if (N->getOperand(i) != Zero && 173 N->getOperand(i).getOpcode() != ISD::UNDEF) 174 return false; 175 return true; 176} 177 178/// isScalarToVector - Return true if the specified node is a 179/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 180/// element is not an undef. 181bool ISD::isScalarToVector(const SDNode *N) { 182 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 183 return true; 184 185 if (N->getOpcode() != ISD::BUILD_VECTOR) 186 return false; 187 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 188 return false; 189 unsigned NumElems = N->getNumOperands(); 190 for (unsigned i = 1; i < NumElems; ++i) { 191 SDValue V = N->getOperand(i); 192 if (V.getOpcode() != ISD::UNDEF) 193 return false; 194 } 195 return true; 196} 197 198 199/// isDebugLabel - Return true if the specified node represents a debug 200/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 201bool ISD::isDebugLabel(const SDNode *N) { 202 SDValue Zero; 203 if (N->getOpcode() == ISD::DBG_LABEL) 204 return true; 205 if (N->isMachineOpcode() && 206 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 207 return true; 208 return false; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: assert(0 && "Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310const TargetMachine &SelectionDAG::getTarget() const { 311 return MF->getTarget(); 312} 313 314//===----------------------------------------------------------------------===// 315// SDNode Profile Support 316//===----------------------------------------------------------------------===// 317 318/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 319/// 320static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 321 ID.AddInteger(OpC); 322} 323 324/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 325/// solely with their pointer. 326static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 327 ID.AddPointer(VTList.VTs); 328} 329 330/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 331/// 332static void AddNodeIDOperands(FoldingSetNodeID &ID, 333 const SDValue *Ops, unsigned NumOps) { 334 for (; NumOps; --NumOps, ++Ops) { 335 ID.AddPointer(Ops->getNode()); 336 ID.AddInteger(Ops->getResNo()); 337 } 338} 339 340/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 341/// 342static void AddNodeIDOperands(FoldingSetNodeID &ID, 343 const SDUse *Ops, unsigned NumOps) { 344 for (; NumOps; --NumOps, ++Ops) { 345 ID.AddPointer(Ops->getVal()); 346 ID.AddInteger(Ops->getSDValue().getResNo()); 347 } 348} 349 350static void AddNodeIDNode(FoldingSetNodeID &ID, 351 unsigned short OpC, SDVTList VTList, 352 const SDValue *OpList, unsigned N) { 353 AddNodeIDOpcode(ID, OpC); 354 AddNodeIDValueTypes(ID, VTList); 355 AddNodeIDOperands(ID, OpList, N); 356} 357 358/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 359/// the NodeID data. 360static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 361 switch (N->getOpcode()) { 362 default: break; // Normal nodes don't need extra info. 363 case ISD::ARG_FLAGS: 364 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 365 break; 366 case ISD::TargetConstant: 367 case ISD::Constant: 368 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 369 break; 370 case ISD::TargetConstantFP: 371 case ISD::ConstantFP: { 372 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 373 break; 374 } 375 case ISD::TargetGlobalAddress: 376 case ISD::GlobalAddress: 377 case ISD::TargetGlobalTLSAddress: 378 case ISD::GlobalTLSAddress: { 379 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 380 ID.AddPointer(GA->getGlobal()); 381 ID.AddInteger(GA->getOffset()); 382 break; 383 } 384 case ISD::BasicBlock: 385 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 386 break; 387 case ISD::Register: 388 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 389 break; 390 case ISD::DBG_STOPPOINT: { 391 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 392 ID.AddInteger(DSP->getLine()); 393 ID.AddInteger(DSP->getColumn()); 394 ID.AddPointer(DSP->getCompileUnit()); 395 break; 396 } 397 case ISD::SRCVALUE: 398 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 399 break; 400 case ISD::MEMOPERAND: { 401 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 402 MO.Profile(ID); 403 break; 404 } 405 case ISD::FrameIndex: 406 case ISD::TargetFrameIndex: 407 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 408 break; 409 case ISD::JumpTable: 410 case ISD::TargetJumpTable: 411 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 412 break; 413 case ISD::ConstantPool: 414 case ISD::TargetConstantPool: { 415 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 416 ID.AddInteger(CP->getAlignment()); 417 ID.AddInteger(CP->getOffset()); 418 if (CP->isMachineConstantPoolEntry()) 419 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 420 else 421 ID.AddPointer(CP->getConstVal()); 422 break; 423 } 424 case ISD::CALL: { 425 const CallSDNode *Call = cast<CallSDNode>(N); 426 ID.AddInteger(Call->getCallingConv()); 427 ID.AddInteger(Call->isVarArg()); 428 break; 429 } 430 case ISD::LOAD: { 431 const LoadSDNode *LD = cast<LoadSDNode>(N); 432 ID.AddInteger(LD->getAddressingMode()); 433 ID.AddInteger(LD->getExtensionType()); 434 ID.AddInteger(LD->getMemoryVT().getRawBits()); 435 ID.AddInteger(LD->getRawFlags()); 436 break; 437 } 438 case ISD::STORE: { 439 const StoreSDNode *ST = cast<StoreSDNode>(N); 440 ID.AddInteger(ST->getAddressingMode()); 441 ID.AddInteger(ST->isTruncatingStore()); 442 ID.AddInteger(ST->getMemoryVT().getRawBits()); 443 ID.AddInteger(ST->getRawFlags()); 444 break; 445 } 446 case ISD::ATOMIC_CMP_SWAP: 447 case ISD::ATOMIC_SWAP: 448 case ISD::ATOMIC_LOAD_ADD: 449 case ISD::ATOMIC_LOAD_SUB: 450 case ISD::ATOMIC_LOAD_AND: 451 case ISD::ATOMIC_LOAD_OR: 452 case ISD::ATOMIC_LOAD_XOR: 453 case ISD::ATOMIC_LOAD_NAND: 454 case ISD::ATOMIC_LOAD_MIN: 455 case ISD::ATOMIC_LOAD_MAX: 456 case ISD::ATOMIC_LOAD_UMIN: 457 case ISD::ATOMIC_LOAD_UMAX: { 458 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 459 ID.AddInteger(AT->getRawFlags()); 460 break; 461 } 462 } // end switch (N->getOpcode()) 463} 464 465/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 466/// data. 467static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 468 AddNodeIDOpcode(ID, N->getOpcode()); 469 // Add the return value info. 470 AddNodeIDValueTypes(ID, N->getVTList()); 471 // Add the operand info. 472 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 473 474 // Handle SDNode leafs with special info. 475 AddNodeIDCustom(ID, N); 476} 477 478/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 479/// the CSE map that carries both alignment and volatility information. 480/// 481static inline unsigned 482encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 483 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::DBG_LABEL: 499 case ISD::DBG_STOPPOINT: 500 case ISD::EH_LABEL: 501 case ISD::DECLARE: 502 return true; // Never CSE these nodes. 503 } 504 505 // Check that remaining values produced are not flags. 506 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 507 if (N->getValueType(i) == MVT::Flag) 508 return true; // Never CSE anything that produces a flag. 509 510 return false; 511} 512 513/// RemoveDeadNodes - This method deletes all unreachable nodes in the 514/// SelectionDAG. 515void SelectionDAG::RemoveDeadNodes() { 516 // Create a dummy node (which is not added to allnodes), that adds a reference 517 // to the root node, preventing it from being deleted. 518 HandleSDNode Dummy(getRoot()); 519 520 SmallVector<SDNode*, 128> DeadNodes; 521 522 // Add all obviously-dead nodes to the DeadNodes worklist. 523 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 524 if (I->use_empty()) 525 DeadNodes.push_back(I); 526 527 RemoveDeadNodes(DeadNodes); 528 529 // If the root changed (e.g. it was a dead load, update the root). 530 setRoot(Dummy.getValue()); 531} 532 533/// RemoveDeadNodes - This method deletes the unreachable nodes in the 534/// given list, and any nodes that become unreachable as a result. 535void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 536 DAGUpdateListener *UpdateListener) { 537 538 // Process the worklist, deleting the nodes and adding their uses to the 539 // worklist. 540 while (!DeadNodes.empty()) { 541 SDNode *N = DeadNodes.back(); 542 DeadNodes.pop_back(); 543 544 if (UpdateListener) 545 UpdateListener->NodeDeleted(N, 0); 546 547 // Take the node out of the appropriate CSE map. 548 RemoveNodeFromCSEMaps(N); 549 550 // Next, brutally remove the operand list. This is safe to do, as there are 551 // no cycles in the graph. 552 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 553 SDNode *Operand = I->getVal(); 554 Operand->removeUser(std::distance(N->op_begin(), I), N); 555 556 // Now that we removed this operand, see if there are no uses of it left. 557 if (Operand->use_empty()) 558 DeadNodes.push_back(Operand); 559 } 560 561 DeallocateNode(N); 562 } 563} 564 565void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 566 SmallVector<SDNode*, 16> DeadNodes(1, N); 567 RemoveDeadNodes(DeadNodes, UpdateListener); 568} 569 570void SelectionDAG::DeleteNode(SDNode *N) { 571 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 572 573 // First take this out of the appropriate CSE map. 574 RemoveNodeFromCSEMaps(N); 575 576 // Finally, remove uses due to operands of this node, remove from the 577 // AllNodes list, and delete the node. 578 DeleteNodeNotInCSEMaps(N); 579} 580 581void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 582 assert(N != AllNodes.begin()); 583 584 // Drop all of the operands and decrement used node's use counts. 585 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 586 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 587 588 DeallocateNode(N); 589} 590 591void SelectionDAG::DeallocateNode(SDNode *N) { 592 if (N->OperandsNeedDelete) 593 delete[] N->OperandList; 594 595 // Set the opcode to DELETED_NODE to help catch bugs when node 596 // memory is reallocated. 597 N->NodeType = ISD::DELETED_NODE; 598 599 NodeAllocator.Deallocate(AllNodes.remove(N)); 600} 601 602/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 603/// correspond to it. This is useful when we're about to delete or repurpose 604/// the node. We don't want future request for structurally identical nodes 605/// to return N anymore. 606bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 607 bool Erased = false; 608 switch (N->getOpcode()) { 609 case ISD::EntryToken: 610 assert(0 && "EntryToken should not be in CSEMaps!"); 611 return false; 612 case ISD::HANDLENODE: return false; // noop. 613 case ISD::CONDCODE: 614 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 615 "Cond code doesn't exist!"); 616 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 617 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 618 break; 619 case ISD::ExternalSymbol: 620 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 621 break; 622 case ISD::TargetExternalSymbol: 623 Erased = 624 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 625 break; 626 case ISD::VALUETYPE: { 627 MVT VT = cast<VTSDNode>(N)->getVT(); 628 if (VT.isExtended()) { 629 Erased = ExtendedValueTypeNodes.erase(VT); 630 } else { 631 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 632 ValueTypeNodes[VT.getSimpleVT()] = 0; 633 } 634 break; 635 } 636 default: 637 // Remove it from the CSE Map. 638 Erased = CSEMap.RemoveNode(N); 639 break; 640 } 641#ifndef NDEBUG 642 // Verify that the node was actually in one of the CSE maps, unless it has a 643 // flag result (which cannot be CSE'd) or is one of the special cases that are 644 // not subject to CSE. 645 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 646 !N->isMachineOpcode() && !doNotCSE(N)) { 647 N->dump(this); 648 cerr << "\n"; 649 assert(0 && "Node is not in map!"); 650 } 651#endif 652 return Erased; 653} 654 655/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 656/// has been taken out and modified in some way. If the specified node already 657/// exists in the CSE maps, do not modify the maps, but return the existing node 658/// instead. If it doesn't exist, add it and return null. 659/// 660SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 661 assert(N->getNumOperands() && "This is a leaf node!"); 662 663 if (doNotCSE(N)) 664 return 0; 665 666 SDNode *New = CSEMap.GetOrInsertNode(N); 667 if (New != N) return New; // Node already existed. 668 return 0; 669} 670 671/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 672/// were replaced with those specified. If this node is never memoized, 673/// return null, otherwise return a pointer to the slot it would take. If a 674/// node already exists with these operands, the slot will be non-null. 675SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 676 void *&InsertPos) { 677 if (doNotCSE(N)) 678 return 0; 679 680 SDValue Ops[] = { Op }; 681 FoldingSetNodeID ID; 682 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 683 AddNodeIDCustom(ID, N); 684 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 685} 686 687/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 688/// were replaced with those specified. If this node is never memoized, 689/// return null, otherwise return a pointer to the slot it would take. If a 690/// node already exists with these operands, the slot will be non-null. 691SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 692 SDValue Op1, SDValue Op2, 693 void *&InsertPos) { 694 if (doNotCSE(N)) 695 return 0; 696 697 SDValue Ops[] = { Op1, Op2 }; 698 FoldingSetNodeID ID; 699 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 700 AddNodeIDCustom(ID, N); 701 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 702} 703 704 705/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 706/// were replaced with those specified. If this node is never memoized, 707/// return null, otherwise return a pointer to the slot it would take. If a 708/// node already exists with these operands, the slot will be non-null. 709SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 710 const SDValue *Ops,unsigned NumOps, 711 void *&InsertPos) { 712 if (doNotCSE(N)) 713 return 0; 714 715 FoldingSetNodeID ID; 716 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 717 AddNodeIDCustom(ID, N); 718 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 719} 720 721/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 722void SelectionDAG::VerifyNode(SDNode *N) { 723 switch (N->getOpcode()) { 724 default: 725 break; 726 case ISD::BUILD_PAIR: { 727 MVT VT = N->getValueType(0); 728 assert(N->getNumValues() == 1 && "Too many results!"); 729 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 730 "Wrong return type!"); 731 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 732 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 733 "Mismatched operand types!"); 734 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 735 "Wrong operand type!"); 736 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 737 "Wrong return type size"); 738 break; 739 } 740 case ISD::BUILD_VECTOR: { 741 assert(N->getNumValues() == 1 && "Too many results!"); 742 assert(N->getValueType(0).isVector() && "Wrong return type!"); 743 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 744 "Wrong number of operands!"); 745 // FIXME: Change vector_shuffle to a variadic node with mask elements being 746 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an 747 // operand, and it is not always possible to legalize it. Turning off the 748 // following checks at least makes it possible to legalize most of the time. 749// MVT EltVT = N->getValueType(0).getVectorElementType(); 750// for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 751// assert(I->getSDValue().getValueType() == EltVT && 752// "Wrong operand type!"); 753 break; 754 } 755 } 756} 757 758/// getMVTAlignment - Compute the default alignment value for the 759/// given type. 760/// 761unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 762 const Type *Ty = VT == MVT::iPTR ? 763 PointerType::get(Type::Int8Ty, 0) : 764 VT.getTypeForMVT(); 765 766 return TLI.getTargetData()->getABITypeAlignment(Ty); 767} 768 769SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 770 : TLI(tli), FLI(fli), 771 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 772 Root(getEntryNode()) { 773 AllNodes.push_back(&EntryNode); 774} 775 776void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi, 777 DwarfWriter *dw) { 778 MF = &mf; 779 MMI = mmi; 780 DW = dw; 781} 782 783SelectionDAG::~SelectionDAG() { 784 allnodes_clear(); 785} 786 787void SelectionDAG::allnodes_clear() { 788 assert(&*AllNodes.begin() == &EntryNode); 789 AllNodes.remove(AllNodes.begin()); 790 while (!AllNodes.empty()) 791 DeallocateNode(AllNodes.begin()); 792} 793 794void SelectionDAG::clear() { 795 allnodes_clear(); 796 OperandAllocator.Reset(); 797 CSEMap.clear(); 798 799 ExtendedValueTypeNodes.clear(); 800 ExternalSymbols.clear(); 801 TargetExternalSymbols.clear(); 802 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 803 static_cast<CondCodeSDNode*>(0)); 804 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 805 static_cast<SDNode*>(0)); 806 807 EntryNode.Uses = 0; 808 AllNodes.push_back(&EntryNode); 809 Root = getEntryNode(); 810} 811 812SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 813 if (Op.getValueType() == VT) return Op; 814 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 815 VT.getSizeInBits()); 816 return getNode(ISD::AND, Op.getValueType(), Op, 817 getConstant(Imm, Op.getValueType())); 818} 819 820/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 821/// 822SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) { 823 SDValue NegOne; 824 if (VT.isVector()) { 825 MVT EltVT = VT.getVectorElementType(); 826 SDValue NegOneElt = getConstant(EltVT.getIntegerVTBitMask(), EltVT); 827 std::vector<SDValue> NegOnes(VT.getVectorNumElements(), NegOneElt); 828 NegOne = getNode(ISD::BUILD_VECTOR, VT, &NegOnes[0], NegOnes.size()); 829 } else 830 NegOne = getConstant(VT.getIntegerVTBitMask(), VT); 831 832 return getNode(ISD::XOR, VT, Val, NegOne); 833} 834 835SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 836 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 837 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 838} 839 840SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 841 return getConstant(*ConstantInt::get(Val), VT, isT); 842} 843 844SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 845 assert(VT.isInteger() && "Cannot create FP integer constant!"); 846 847 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 848 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 849 "APInt size does not match type size!"); 850 851 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 852 FoldingSetNodeID ID; 853 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 854 ID.AddPointer(&Val); 855 void *IP = 0; 856 SDNode *N = NULL; 857 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 858 if (!VT.isVector()) 859 return SDValue(N, 0); 860 if (!N) { 861 N = NodeAllocator.Allocate<ConstantSDNode>(); 862 new (N) ConstantSDNode(isT, &Val, EltVT); 863 CSEMap.InsertNode(N, IP); 864 AllNodes.push_back(N); 865 } 866 867 SDValue Result(N, 0); 868 if (VT.isVector()) { 869 SmallVector<SDValue, 8> Ops; 870 Ops.assign(VT.getVectorNumElements(), Result); 871 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 872 } 873 return Result; 874} 875 876SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 877 return getConstant(Val, TLI.getPointerTy(), isTarget); 878} 879 880 881SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 882 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 883} 884 885SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 886 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 887 888 MVT EltVT = 889 VT.isVector() ? VT.getVectorElementType() : VT; 890 891 // Do the map lookup using the actual bit pattern for the floating point 892 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 893 // we don't have issues with SNANs. 894 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 895 FoldingSetNodeID ID; 896 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 897 ID.AddPointer(&V); 898 void *IP = 0; 899 SDNode *N = NULL; 900 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 901 if (!VT.isVector()) 902 return SDValue(N, 0); 903 if (!N) { 904 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 905 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 906 CSEMap.InsertNode(N, IP); 907 AllNodes.push_back(N); 908 } 909 910 SDValue Result(N, 0); 911 if (VT.isVector()) { 912 SmallVector<SDValue, 8> Ops; 913 Ops.assign(VT.getVectorNumElements(), Result); 914 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 915 } 916 return Result; 917} 918 919SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 920 MVT EltVT = 921 VT.isVector() ? VT.getVectorElementType() : VT; 922 if (EltVT==MVT::f32) 923 return getConstantFP(APFloat((float)Val), VT, isTarget); 924 else 925 return getConstantFP(APFloat(Val), VT, isTarget); 926} 927 928SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 929 MVT VT, int64_t Offset, 930 bool isTargetGA) { 931 unsigned Opc; 932 933 // Truncate (with sign-extension) the offset value to the pointer size. 934 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 935 if (BitWidth < 64) 936 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 937 938 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 939 if (!GVar) { 940 // If GV is an alias then use the aliasee for determining thread-localness. 941 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 942 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 943 } 944 945 if (GVar && GVar->isThreadLocal()) 946 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 947 else 948 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 949 950 FoldingSetNodeID ID; 951 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 952 ID.AddPointer(GV); 953 ID.AddInteger(Offset); 954 void *IP = 0; 955 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 956 return SDValue(E, 0); 957 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 958 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 959 CSEMap.InsertNode(N, IP); 960 AllNodes.push_back(N); 961 return SDValue(N, 0); 962} 963 964SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 965 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 966 FoldingSetNodeID ID; 967 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 968 ID.AddInteger(FI); 969 void *IP = 0; 970 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 971 return SDValue(E, 0); 972 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 973 new (N) FrameIndexSDNode(FI, VT, isTarget); 974 CSEMap.InsertNode(N, IP); 975 AllNodes.push_back(N); 976 return SDValue(N, 0); 977} 978 979SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 980 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 981 FoldingSetNodeID ID; 982 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 983 ID.AddInteger(JTI); 984 void *IP = 0; 985 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 986 return SDValue(E, 0); 987 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 988 new (N) JumpTableSDNode(JTI, VT, isTarget); 989 CSEMap.InsertNode(N, IP); 990 AllNodes.push_back(N); 991 return SDValue(N, 0); 992} 993 994SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 995 unsigned Alignment, int Offset, 996 bool isTarget) { 997 if (Alignment == 0) 998 Alignment = 999 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1000 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1001 FoldingSetNodeID ID; 1002 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1003 ID.AddInteger(Alignment); 1004 ID.AddInteger(Offset); 1005 ID.AddPointer(C); 1006 void *IP = 0; 1007 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1008 return SDValue(E, 0); 1009 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1010 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1011 CSEMap.InsertNode(N, IP); 1012 AllNodes.push_back(N); 1013 return SDValue(N, 0); 1014} 1015 1016 1017SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1018 unsigned Alignment, int Offset, 1019 bool isTarget) { 1020 if (Alignment == 0) 1021 Alignment = 1022 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1023 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1024 FoldingSetNodeID ID; 1025 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1026 ID.AddInteger(Alignment); 1027 ID.AddInteger(Offset); 1028 C->AddSelectionDAGCSEId(ID); 1029 void *IP = 0; 1030 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1031 return SDValue(E, 0); 1032 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1033 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1034 CSEMap.InsertNode(N, IP); 1035 AllNodes.push_back(N); 1036 return SDValue(N, 0); 1037} 1038 1039 1040SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1041 FoldingSetNodeID ID; 1042 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1043 ID.AddPointer(MBB); 1044 void *IP = 0; 1045 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1046 return SDValue(E, 0); 1047 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1048 new (N) BasicBlockSDNode(MBB); 1049 CSEMap.InsertNode(N, IP); 1050 AllNodes.push_back(N); 1051 return SDValue(N, 0); 1052} 1053 1054SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1055 FoldingSetNodeID ID; 1056 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1057 ID.AddInteger(Flags.getRawBits()); 1058 void *IP = 0; 1059 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1060 return SDValue(E, 0); 1061 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1062 new (N) ARG_FLAGSSDNode(Flags); 1063 CSEMap.InsertNode(N, IP); 1064 AllNodes.push_back(N); 1065 return SDValue(N, 0); 1066} 1067 1068SDValue SelectionDAG::getValueType(MVT VT) { 1069 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1070 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1071 1072 SDNode *&N = VT.isExtended() ? 1073 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1074 1075 if (N) return SDValue(N, 0); 1076 N = NodeAllocator.Allocate<VTSDNode>(); 1077 new (N) VTSDNode(VT); 1078 AllNodes.push_back(N); 1079 return SDValue(N, 0); 1080} 1081 1082SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1083 SDNode *&N = ExternalSymbols[Sym]; 1084 if (N) return SDValue(N, 0); 1085 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1086 new (N) ExternalSymbolSDNode(false, Sym, VT); 1087 AllNodes.push_back(N); 1088 return SDValue(N, 0); 1089} 1090 1091SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1092 SDNode *&N = TargetExternalSymbols[Sym]; 1093 if (N) return SDValue(N, 0); 1094 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1095 new (N) ExternalSymbolSDNode(true, Sym, VT); 1096 AllNodes.push_back(N); 1097 return SDValue(N, 0); 1098} 1099 1100SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1101 if ((unsigned)Cond >= CondCodeNodes.size()) 1102 CondCodeNodes.resize(Cond+1); 1103 1104 if (CondCodeNodes[Cond] == 0) { 1105 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1106 new (N) CondCodeSDNode(Cond); 1107 CondCodeNodes[Cond] = N; 1108 AllNodes.push_back(N); 1109 } 1110 return SDValue(CondCodeNodes[Cond], 0); 1111} 1112 1113SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, 1114 SDValue STy, SDValue Rnd, SDValue Sat, 1115 ISD::CvtCode Code) { 1116 // If the src and dest types are the same, no conversion is necessary. 1117 if (DTy == STy) 1118 return Val; 1119 1120 FoldingSetNodeID ID; 1121 void* IP = 0; 1122 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1123 return SDValue(E, 0); 1124 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1125 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1126 new (N) CvtRndSatSDNode(VT, Ops, 5, Code); 1127 CSEMap.InsertNode(N, IP); 1128 AllNodes.push_back(N); 1129 return SDValue(N, 0); 1130} 1131 1132SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1133 FoldingSetNodeID ID; 1134 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1135 ID.AddInteger(RegNo); 1136 void *IP = 0; 1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1138 return SDValue(E, 0); 1139 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1140 new (N) RegisterSDNode(RegNo, VT); 1141 CSEMap.InsertNode(N, IP); 1142 AllNodes.push_back(N); 1143 return SDValue(N, 0); 1144} 1145 1146SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1147 unsigned Line, unsigned Col, 1148 Value *CU) { 1149 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1150 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1151 AllNodes.push_back(N); 1152 return SDValue(N, 0); 1153} 1154 1155SDValue SelectionDAG::getLabel(unsigned Opcode, 1156 SDValue Root, 1157 unsigned LabelID) { 1158 FoldingSetNodeID ID; 1159 SDValue Ops[] = { Root }; 1160 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1161 ID.AddInteger(LabelID); 1162 void *IP = 0; 1163 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1164 return SDValue(E, 0); 1165 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1166 new (N) LabelSDNode(Opcode, Root, LabelID); 1167 CSEMap.InsertNode(N, IP); 1168 AllNodes.push_back(N); 1169 return SDValue(N, 0); 1170} 1171 1172SDValue SelectionDAG::getSrcValue(const Value *V) { 1173 assert((!V || isa<PointerType>(V->getType())) && 1174 "SrcValue is not a pointer?"); 1175 1176 FoldingSetNodeID ID; 1177 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1178 ID.AddPointer(V); 1179 1180 void *IP = 0; 1181 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1182 return SDValue(E, 0); 1183 1184 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1185 new (N) SrcValueSDNode(V); 1186 CSEMap.InsertNode(N, IP); 1187 AllNodes.push_back(N); 1188 return SDValue(N, 0); 1189} 1190 1191SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1192#ifndef NDEBUG 1193 const Value *v = MO.getValue(); 1194 assert((!v || isa<PointerType>(v->getType())) && 1195 "SrcValue is not a pointer?"); 1196#endif 1197 1198 FoldingSetNodeID ID; 1199 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1200 MO.Profile(ID); 1201 1202 void *IP = 0; 1203 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1204 return SDValue(E, 0); 1205 1206 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1207 new (N) MemOperandSDNode(MO); 1208 CSEMap.InsertNode(N, IP); 1209 AllNodes.push_back(N); 1210 return SDValue(N, 0); 1211} 1212 1213/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1214/// specified value type. 1215SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1216 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1217 unsigned ByteSize = VT.getStoreSizeInBits()/8; 1218 const Type *Ty = VT.getTypeForMVT(); 1219 unsigned StackAlign = 1220 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1221 1222 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1223 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1224} 1225 1226/// CreateStackTemporary - Create a stack temporary suitable for holding 1227/// either of the specified value types. 1228SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) { 1229 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1230 VT2.getStoreSizeInBits())/8; 1231 const Type *Ty1 = VT1.getTypeForMVT(); 1232 const Type *Ty2 = VT2.getTypeForMVT(); 1233 const TargetData *TD = TLI.getTargetData(); 1234 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1235 TD->getPrefTypeAlignment(Ty2)); 1236 1237 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1238 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align); 1239 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1240} 1241 1242SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1243 SDValue N2, ISD::CondCode Cond) { 1244 // These setcc operations always fold. 1245 switch (Cond) { 1246 default: break; 1247 case ISD::SETFALSE: 1248 case ISD::SETFALSE2: return getConstant(0, VT); 1249 case ISD::SETTRUE: 1250 case ISD::SETTRUE2: return getConstant(1, VT); 1251 1252 case ISD::SETOEQ: 1253 case ISD::SETOGT: 1254 case ISD::SETOGE: 1255 case ISD::SETOLT: 1256 case ISD::SETOLE: 1257 case ISD::SETONE: 1258 case ISD::SETO: 1259 case ISD::SETUO: 1260 case ISD::SETUEQ: 1261 case ISD::SETUNE: 1262 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1263 break; 1264 } 1265 1266 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1267 const APInt &C2 = N2C->getAPIntValue(); 1268 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1269 const APInt &C1 = N1C->getAPIntValue(); 1270 1271 switch (Cond) { 1272 default: assert(0 && "Unknown integer setcc!"); 1273 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1274 case ISD::SETNE: return getConstant(C1 != C2, VT); 1275 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1276 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1277 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1278 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1279 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1280 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1281 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1282 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1283 } 1284 } 1285 } 1286 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1287 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1288 // No compile time operations on this type yet. 1289 if (N1C->getValueType(0) == MVT::ppcf128) 1290 return SDValue(); 1291 1292 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1293 switch (Cond) { 1294 default: break; 1295 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1296 return getNode(ISD::UNDEF, VT); 1297 // fall through 1298 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1299 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1300 return getNode(ISD::UNDEF, VT); 1301 // fall through 1302 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1303 R==APFloat::cmpLessThan, VT); 1304 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1305 return getNode(ISD::UNDEF, VT); 1306 // fall through 1307 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1308 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1309 return getNode(ISD::UNDEF, VT); 1310 // fall through 1311 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1312 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1313 return getNode(ISD::UNDEF, VT); 1314 // fall through 1315 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1316 R==APFloat::cmpEqual, VT); 1317 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1318 return getNode(ISD::UNDEF, VT); 1319 // fall through 1320 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1321 R==APFloat::cmpEqual, VT); 1322 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1323 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1324 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1325 R==APFloat::cmpEqual, VT); 1326 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1327 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1328 R==APFloat::cmpLessThan, VT); 1329 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1330 R==APFloat::cmpUnordered, VT); 1331 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1332 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1333 } 1334 } else { 1335 // Ensure that the constant occurs on the RHS. 1336 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1337 } 1338 } 1339 1340 // Could not fold it. 1341 return SDValue(); 1342} 1343 1344/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1345/// use this predicate to simplify operations downstream. 1346bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1347 unsigned BitWidth = Op.getValueSizeInBits(); 1348 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1349} 1350 1351/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1352/// this predicate to simplify operations downstream. Mask is known to be zero 1353/// for bits that V cannot have. 1354bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1355 unsigned Depth) const { 1356 APInt KnownZero, KnownOne; 1357 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1358 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1359 return (KnownZero & Mask) == Mask; 1360} 1361 1362/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1363/// known to be either zero or one and return them in the KnownZero/KnownOne 1364/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1365/// processing. 1366void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1367 APInt &KnownZero, APInt &KnownOne, 1368 unsigned Depth) const { 1369 unsigned BitWidth = Mask.getBitWidth(); 1370 assert(BitWidth == Op.getValueType().getSizeInBits() && 1371 "Mask size mismatches value type size!"); 1372 1373 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1374 if (Depth == 6 || Mask == 0) 1375 return; // Limit search depth. 1376 1377 APInt KnownZero2, KnownOne2; 1378 1379 switch (Op.getOpcode()) { 1380 case ISD::Constant: 1381 // We know all of the bits for a constant! 1382 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1383 KnownZero = ~KnownOne & Mask; 1384 return; 1385 case ISD::AND: 1386 // If either the LHS or the RHS are Zero, the result is zero. 1387 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1388 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1389 KnownZero2, KnownOne2, Depth+1); 1390 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1391 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1392 1393 // Output known-1 bits are only known if set in both the LHS & RHS. 1394 KnownOne &= KnownOne2; 1395 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1396 KnownZero |= KnownZero2; 1397 return; 1398 case ISD::OR: 1399 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1400 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1401 KnownZero2, KnownOne2, Depth+1); 1402 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1403 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1404 1405 // Output known-0 bits are only known if clear in both the LHS & RHS. 1406 KnownZero &= KnownZero2; 1407 // Output known-1 are known to be set if set in either the LHS | RHS. 1408 KnownOne |= KnownOne2; 1409 return; 1410 case ISD::XOR: { 1411 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1412 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1413 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1414 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1415 1416 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1417 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1418 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1419 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1420 KnownZero = KnownZeroOut; 1421 return; 1422 } 1423 case ISD::MUL: { 1424 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1425 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1426 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1427 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1428 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1429 1430 // If low bits are zero in either operand, output low known-0 bits. 1431 // Also compute a conserative estimate for high known-0 bits. 1432 // More trickiness is possible, but this is sufficient for the 1433 // interesting case of alignment computation. 1434 KnownOne.clear(); 1435 unsigned TrailZ = KnownZero.countTrailingOnes() + 1436 KnownZero2.countTrailingOnes(); 1437 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1438 KnownZero2.countLeadingOnes(), 1439 BitWidth) - BitWidth; 1440 1441 TrailZ = std::min(TrailZ, BitWidth); 1442 LeadZ = std::min(LeadZ, BitWidth); 1443 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1444 APInt::getHighBitsSet(BitWidth, LeadZ); 1445 KnownZero &= Mask; 1446 return; 1447 } 1448 case ISD::UDIV: { 1449 // For the purposes of computing leading zeros we can conservatively 1450 // treat a udiv as a logical right shift by the power of 2 known to 1451 // be less than the denominator. 1452 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1453 ComputeMaskedBits(Op.getOperand(0), 1454 AllOnes, KnownZero2, KnownOne2, Depth+1); 1455 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1456 1457 KnownOne2.clear(); 1458 KnownZero2.clear(); 1459 ComputeMaskedBits(Op.getOperand(1), 1460 AllOnes, KnownZero2, KnownOne2, Depth+1); 1461 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1462 if (RHSUnknownLeadingOnes != BitWidth) 1463 LeadZ = std::min(BitWidth, 1464 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1465 1466 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1467 return; 1468 } 1469 case ISD::SELECT: 1470 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1471 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1472 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1473 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1474 1475 // Only known if known in both the LHS and RHS. 1476 KnownOne &= KnownOne2; 1477 KnownZero &= KnownZero2; 1478 return; 1479 case ISD::SELECT_CC: 1480 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1481 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1482 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1483 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1484 1485 // Only known if known in both the LHS and RHS. 1486 KnownOne &= KnownOne2; 1487 KnownZero &= KnownZero2; 1488 return; 1489 case ISD::SADDO: 1490 case ISD::UADDO: 1491 case ISD::SSUBO: 1492 case ISD::USUBO: 1493 case ISD::SMULO: 1494 case ISD::UMULO: 1495 if (Op.getResNo() != 1) 1496 return; 1497 // The boolean result conforms to getBooleanContents. Fall through. 1498 case ISD::SETCC: 1499 // If we know the result of a setcc has the top bits zero, use this info. 1500 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1501 BitWidth > 1) 1502 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1503 return; 1504 case ISD::SHL: 1505 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1506 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1507 unsigned ShAmt = SA->getZExtValue(); 1508 1509 // If the shift count is an invalid immediate, don't do anything. 1510 if (ShAmt >= BitWidth) 1511 return; 1512 1513 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1514 KnownZero, KnownOne, Depth+1); 1515 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1516 KnownZero <<= ShAmt; 1517 KnownOne <<= ShAmt; 1518 // low bits known zero. 1519 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1520 } 1521 return; 1522 case ISD::SRL: 1523 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1524 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1525 unsigned ShAmt = SA->getZExtValue(); 1526 1527 // If the shift count is an invalid immediate, don't do anything. 1528 if (ShAmt >= BitWidth) 1529 return; 1530 1531 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1532 KnownZero, KnownOne, Depth+1); 1533 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1534 KnownZero = KnownZero.lshr(ShAmt); 1535 KnownOne = KnownOne.lshr(ShAmt); 1536 1537 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1538 KnownZero |= HighBits; // High bits known zero. 1539 } 1540 return; 1541 case ISD::SRA: 1542 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1543 unsigned ShAmt = SA->getZExtValue(); 1544 1545 // If the shift count is an invalid immediate, don't do anything. 1546 if (ShAmt >= BitWidth) 1547 return; 1548 1549 APInt InDemandedMask = (Mask << ShAmt); 1550 // If any of the demanded bits are produced by the sign extension, we also 1551 // demand the input sign bit. 1552 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1553 if (HighBits.getBoolValue()) 1554 InDemandedMask |= APInt::getSignBit(BitWidth); 1555 1556 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1557 Depth+1); 1558 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1559 KnownZero = KnownZero.lshr(ShAmt); 1560 KnownOne = KnownOne.lshr(ShAmt); 1561 1562 // Handle the sign bits. 1563 APInt SignBit = APInt::getSignBit(BitWidth); 1564 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1565 1566 if (KnownZero.intersects(SignBit)) { 1567 KnownZero |= HighBits; // New bits are known zero. 1568 } else if (KnownOne.intersects(SignBit)) { 1569 KnownOne |= HighBits; // New bits are known one. 1570 } 1571 } 1572 return; 1573 case ISD::SIGN_EXTEND_INREG: { 1574 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1575 unsigned EBits = EVT.getSizeInBits(); 1576 1577 // Sign extension. Compute the demanded bits in the result that are not 1578 // present in the input. 1579 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1580 1581 APInt InSignBit = APInt::getSignBit(EBits); 1582 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1583 1584 // If the sign extended bits are demanded, we know that the sign 1585 // bit is demanded. 1586 InSignBit.zext(BitWidth); 1587 if (NewBits.getBoolValue()) 1588 InputDemandedBits |= InSignBit; 1589 1590 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1591 KnownZero, KnownOne, Depth+1); 1592 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1593 1594 // If the sign bit of the input is known set or clear, then we know the 1595 // top bits of the result. 1596 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1597 KnownZero |= NewBits; 1598 KnownOne &= ~NewBits; 1599 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1600 KnownOne |= NewBits; 1601 KnownZero &= ~NewBits; 1602 } else { // Input sign bit unknown 1603 KnownZero &= ~NewBits; 1604 KnownOne &= ~NewBits; 1605 } 1606 return; 1607 } 1608 case ISD::CTTZ: 1609 case ISD::CTLZ: 1610 case ISD::CTPOP: { 1611 unsigned LowBits = Log2_32(BitWidth)+1; 1612 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1613 KnownOne.clear(); 1614 return; 1615 } 1616 case ISD::LOAD: { 1617 if (ISD::isZEXTLoad(Op.getNode())) { 1618 LoadSDNode *LD = cast<LoadSDNode>(Op); 1619 MVT VT = LD->getMemoryVT(); 1620 unsigned MemBits = VT.getSizeInBits(); 1621 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1622 } 1623 return; 1624 } 1625 case ISD::ZERO_EXTEND: { 1626 MVT InVT = Op.getOperand(0).getValueType(); 1627 unsigned InBits = InVT.getSizeInBits(); 1628 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1629 APInt InMask = Mask; 1630 InMask.trunc(InBits); 1631 KnownZero.trunc(InBits); 1632 KnownOne.trunc(InBits); 1633 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1634 KnownZero.zext(BitWidth); 1635 KnownOne.zext(BitWidth); 1636 KnownZero |= NewBits; 1637 return; 1638 } 1639 case ISD::SIGN_EXTEND: { 1640 MVT InVT = Op.getOperand(0).getValueType(); 1641 unsigned InBits = InVT.getSizeInBits(); 1642 APInt InSignBit = APInt::getSignBit(InBits); 1643 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1644 APInt InMask = Mask; 1645 InMask.trunc(InBits); 1646 1647 // If any of the sign extended bits are demanded, we know that the sign 1648 // bit is demanded. Temporarily set this bit in the mask for our callee. 1649 if (NewBits.getBoolValue()) 1650 InMask |= InSignBit; 1651 1652 KnownZero.trunc(InBits); 1653 KnownOne.trunc(InBits); 1654 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1655 1656 // Note if the sign bit is known to be zero or one. 1657 bool SignBitKnownZero = KnownZero.isNegative(); 1658 bool SignBitKnownOne = KnownOne.isNegative(); 1659 assert(!(SignBitKnownZero && SignBitKnownOne) && 1660 "Sign bit can't be known to be both zero and one!"); 1661 1662 // If the sign bit wasn't actually demanded by our caller, we don't 1663 // want it set in the KnownZero and KnownOne result values. Reset the 1664 // mask and reapply it to the result values. 1665 InMask = Mask; 1666 InMask.trunc(InBits); 1667 KnownZero &= InMask; 1668 KnownOne &= InMask; 1669 1670 KnownZero.zext(BitWidth); 1671 KnownOne.zext(BitWidth); 1672 1673 // If the sign bit is known zero or one, the top bits match. 1674 if (SignBitKnownZero) 1675 KnownZero |= NewBits; 1676 else if (SignBitKnownOne) 1677 KnownOne |= NewBits; 1678 return; 1679 } 1680 case ISD::ANY_EXTEND: { 1681 MVT InVT = Op.getOperand(0).getValueType(); 1682 unsigned InBits = InVT.getSizeInBits(); 1683 APInt InMask = Mask; 1684 InMask.trunc(InBits); 1685 KnownZero.trunc(InBits); 1686 KnownOne.trunc(InBits); 1687 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1688 KnownZero.zext(BitWidth); 1689 KnownOne.zext(BitWidth); 1690 return; 1691 } 1692 case ISD::TRUNCATE: { 1693 MVT InVT = Op.getOperand(0).getValueType(); 1694 unsigned InBits = InVT.getSizeInBits(); 1695 APInt InMask = Mask; 1696 InMask.zext(InBits); 1697 KnownZero.zext(InBits); 1698 KnownOne.zext(InBits); 1699 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1700 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1701 KnownZero.trunc(BitWidth); 1702 KnownOne.trunc(BitWidth); 1703 break; 1704 } 1705 case ISD::AssertZext: { 1706 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1707 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1708 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1709 KnownOne, Depth+1); 1710 KnownZero |= (~InMask) & Mask; 1711 return; 1712 } 1713 case ISD::FGETSIGN: 1714 // All bits are zero except the low bit. 1715 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1716 return; 1717 1718 case ISD::SUB: { 1719 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1720 // We know that the top bits of C-X are clear if X contains less bits 1721 // than C (i.e. no wrap-around can happen). For example, 20-X is 1722 // positive if we can prove that X is >= 0 and < 16. 1723 if (CLHS->getAPIntValue().isNonNegative()) { 1724 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1725 // NLZ can't be BitWidth with no sign bit 1726 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1727 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1728 Depth+1); 1729 1730 // If all of the MaskV bits are known to be zero, then we know the 1731 // output top bits are zero, because we now know that the output is 1732 // from [0-C]. 1733 if ((KnownZero2 & MaskV) == MaskV) { 1734 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1735 // Top bits known zero. 1736 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1737 } 1738 } 1739 } 1740 } 1741 // fall through 1742 case ISD::ADD: { 1743 // Output known-0 bits are known if clear or set in both the low clear bits 1744 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1745 // low 3 bits clear. 1746 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1747 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1748 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1749 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1750 1751 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1752 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1753 KnownZeroOut = std::min(KnownZeroOut, 1754 KnownZero2.countTrailingOnes()); 1755 1756 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1757 return; 1758 } 1759 case ISD::SREM: 1760 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1761 const APInt &RA = Rem->getAPIntValue(); 1762 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1763 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1764 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1765 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1766 1767 // If the sign bit of the first operand is zero, the sign bit of 1768 // the result is zero. If the first operand has no one bits below 1769 // the second operand's single 1 bit, its sign will be zero. 1770 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1771 KnownZero2 |= ~LowBits; 1772 1773 KnownZero |= KnownZero2 & Mask; 1774 1775 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1776 } 1777 } 1778 return; 1779 case ISD::UREM: { 1780 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1781 const APInt &RA = Rem->getAPIntValue(); 1782 if (RA.isPowerOf2()) { 1783 APInt LowBits = (RA - 1); 1784 APInt Mask2 = LowBits & Mask; 1785 KnownZero |= ~LowBits & Mask; 1786 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1787 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1788 break; 1789 } 1790 } 1791 1792 // Since the result is less than or equal to either operand, any leading 1793 // zero bits in either operand must also exist in the result. 1794 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1795 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1796 Depth+1); 1797 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1798 Depth+1); 1799 1800 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1801 KnownZero2.countLeadingOnes()); 1802 KnownOne.clear(); 1803 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1804 return; 1805 } 1806 default: 1807 // Allow the target to implement this method for its nodes. 1808 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1809 case ISD::INTRINSIC_WO_CHAIN: 1810 case ISD::INTRINSIC_W_CHAIN: 1811 case ISD::INTRINSIC_VOID: 1812 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1813 } 1814 return; 1815 } 1816} 1817 1818/// ComputeNumSignBits - Return the number of times the sign bit of the 1819/// register is replicated into the other bits. We know that at least 1 bit 1820/// is always equal to the sign bit (itself), but other cases can give us 1821/// information. For example, immediately after an "SRA X, 2", we know that 1822/// the top 3 bits are all equal to each other, so we return 3. 1823unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1824 MVT VT = Op.getValueType(); 1825 assert(VT.isInteger() && "Invalid VT!"); 1826 unsigned VTBits = VT.getSizeInBits(); 1827 unsigned Tmp, Tmp2; 1828 unsigned FirstAnswer = 1; 1829 1830 if (Depth == 6) 1831 return 1; // Limit search depth. 1832 1833 switch (Op.getOpcode()) { 1834 default: break; 1835 case ISD::AssertSext: 1836 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1837 return VTBits-Tmp+1; 1838 case ISD::AssertZext: 1839 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1840 return VTBits-Tmp; 1841 1842 case ISD::Constant: { 1843 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1844 // If negative, return # leading ones. 1845 if (Val.isNegative()) 1846 return Val.countLeadingOnes(); 1847 1848 // Return # leading zeros. 1849 return Val.countLeadingZeros(); 1850 } 1851 1852 case ISD::SIGN_EXTEND: 1853 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1854 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1855 1856 case ISD::SIGN_EXTEND_INREG: 1857 // Max of the input and what this extends. 1858 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1859 Tmp = VTBits-Tmp+1; 1860 1861 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1862 return std::max(Tmp, Tmp2); 1863 1864 case ISD::SRA: 1865 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1866 // SRA X, C -> adds C sign bits. 1867 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1868 Tmp += C->getZExtValue(); 1869 if (Tmp > VTBits) Tmp = VTBits; 1870 } 1871 return Tmp; 1872 case ISD::SHL: 1873 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1874 // shl destroys sign bits. 1875 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1876 if (C->getZExtValue() >= VTBits || // Bad shift. 1877 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1878 return Tmp - C->getZExtValue(); 1879 } 1880 break; 1881 case ISD::AND: 1882 case ISD::OR: 1883 case ISD::XOR: // NOT is handled here. 1884 // Logical binary ops preserve the number of sign bits at the worst. 1885 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1886 if (Tmp != 1) { 1887 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1888 FirstAnswer = std::min(Tmp, Tmp2); 1889 // We computed what we know about the sign bits as our first 1890 // answer. Now proceed to the generic code that uses 1891 // ComputeMaskedBits, and pick whichever answer is better. 1892 } 1893 break; 1894 1895 case ISD::SELECT: 1896 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1897 if (Tmp == 1) return 1; // Early out. 1898 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1899 return std::min(Tmp, Tmp2); 1900 1901 case ISD::SADDO: 1902 case ISD::UADDO: 1903 case ISD::SSUBO: 1904 case ISD::USUBO: 1905 case ISD::SMULO: 1906 case ISD::UMULO: 1907 if (Op.getResNo() != 1) 1908 break; 1909 // The boolean result conforms to getBooleanContents. Fall through. 1910 case ISD::SETCC: 1911 // If setcc returns 0/-1, all bits are sign bits. 1912 if (TLI.getBooleanContents() == 1913 TargetLowering::ZeroOrNegativeOneBooleanContent) 1914 return VTBits; 1915 break; 1916 case ISD::ROTL: 1917 case ISD::ROTR: 1918 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1919 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 1920 1921 // Handle rotate right by N like a rotate left by 32-N. 1922 if (Op.getOpcode() == ISD::ROTR) 1923 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1924 1925 // If we aren't rotating out all of the known-in sign bits, return the 1926 // number that are left. This handles rotl(sext(x), 1) for example. 1927 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1928 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1929 } 1930 break; 1931 case ISD::ADD: 1932 // Add can have at most one carry bit. Thus we know that the output 1933 // is, at worst, one more bit than the inputs. 1934 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1935 if (Tmp == 1) return 1; // Early out. 1936 1937 // Special case decrementing a value (ADD X, -1): 1938 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1939 if (CRHS->isAllOnesValue()) { 1940 APInt KnownZero, KnownOne; 1941 APInt Mask = APInt::getAllOnesValue(VTBits); 1942 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1943 1944 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1945 // sign bits set. 1946 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1947 return VTBits; 1948 1949 // If we are subtracting one from a positive number, there is no carry 1950 // out of the result. 1951 if (KnownZero.isNegative()) 1952 return Tmp; 1953 } 1954 1955 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1956 if (Tmp2 == 1) return 1; 1957 return std::min(Tmp, Tmp2)-1; 1958 break; 1959 1960 case ISD::SUB: 1961 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1962 if (Tmp2 == 1) return 1; 1963 1964 // Handle NEG. 1965 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1966 if (CLHS->isNullValue()) { 1967 APInt KnownZero, KnownOne; 1968 APInt Mask = APInt::getAllOnesValue(VTBits); 1969 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1970 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1971 // sign bits set. 1972 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1973 return VTBits; 1974 1975 // If the input is known to be positive (the sign bit is known clear), 1976 // the output of the NEG has the same number of sign bits as the input. 1977 if (KnownZero.isNegative()) 1978 return Tmp2; 1979 1980 // Otherwise, we treat this like a SUB. 1981 } 1982 1983 // Sub can have at most one carry bit. Thus we know that the output 1984 // is, at worst, one more bit than the inputs. 1985 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1986 if (Tmp == 1) return 1; // Early out. 1987 return std::min(Tmp, Tmp2)-1; 1988 break; 1989 case ISD::TRUNCATE: 1990 // FIXME: it's tricky to do anything useful for this, but it is an important 1991 // case for targets like X86. 1992 break; 1993 } 1994 1995 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1996 if (Op.getOpcode() == ISD::LOAD) { 1997 LoadSDNode *LD = cast<LoadSDNode>(Op); 1998 unsigned ExtType = LD->getExtensionType(); 1999 switch (ExtType) { 2000 default: break; 2001 case ISD::SEXTLOAD: // '17' bits known 2002 Tmp = LD->getMemoryVT().getSizeInBits(); 2003 return VTBits-Tmp+1; 2004 case ISD::ZEXTLOAD: // '16' bits known 2005 Tmp = LD->getMemoryVT().getSizeInBits(); 2006 return VTBits-Tmp; 2007 } 2008 } 2009 2010 // Allow the target to implement this method for its nodes. 2011 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2012 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2013 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2014 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2015 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2016 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2017 } 2018 2019 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2020 // use this information. 2021 APInt KnownZero, KnownOne; 2022 APInt Mask = APInt::getAllOnesValue(VTBits); 2023 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2024 2025 if (KnownZero.isNegative()) { // sign bit is 0 2026 Mask = KnownZero; 2027 } else if (KnownOne.isNegative()) { // sign bit is 1; 2028 Mask = KnownOne; 2029 } else { 2030 // Nothing known. 2031 return FirstAnswer; 2032 } 2033 2034 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2035 // the number of identical bits in the top of the input value. 2036 Mask = ~Mask; 2037 Mask <<= Mask.getBitWidth()-VTBits; 2038 // Return # leading zeros. We use 'min' here in case Val was zero before 2039 // shifting. We don't want to return '64' as for an i32 "0". 2040 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2041} 2042 2043 2044bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2045 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2046 if (!GA) return false; 2047 if (GA->getOffset() != 0) return false; 2048 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2049 if (!GV) return false; 2050 MachineModuleInfo *MMI = getMachineModuleInfo(); 2051 return MMI && MMI->hasDebugInfo(); 2052} 2053 2054 2055/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2056/// element of the result of the vector shuffle. 2057SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2058 MVT VT = N->getValueType(0); 2059 SDValue PermMask = N->getOperand(2); 2060 SDValue Idx = PermMask.getOperand(i); 2061 if (Idx.getOpcode() == ISD::UNDEF) 2062 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2063 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2064 unsigned NumElems = PermMask.getNumOperands(); 2065 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2066 Index %= NumElems; 2067 2068 if (V.getOpcode() == ISD::BIT_CONVERT) { 2069 V = V.getOperand(0); 2070 MVT VVT = V.getValueType(); 2071 if (!VVT.isVector() || VVT.getVectorNumElements() != NumElems) 2072 return SDValue(); 2073 } 2074 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2075 return (Index == 0) ? V.getOperand(0) 2076 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2077 if (V.getOpcode() == ISD::BUILD_VECTOR) 2078 return V.getOperand(Index); 2079 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2080 return getShuffleScalarElt(V.getNode(), Index); 2081 return SDValue(); 2082} 2083 2084 2085/// getNode - Gets or creates the specified node. 2086/// 2087SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2088 FoldingSetNodeID ID; 2089 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2090 void *IP = 0; 2091 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2092 return SDValue(E, 0); 2093 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2094 new (N) SDNode(Opcode, SDNode::getSDVTList(VT)); 2095 CSEMap.InsertNode(N, IP); 2096 2097 AllNodes.push_back(N); 2098#ifndef NDEBUG 2099 VerifyNode(N); 2100#endif 2101 return SDValue(N, 0); 2102} 2103 2104SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2105 // Constant fold unary operations with an integer constant operand. 2106 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2107 const APInt &Val = C->getAPIntValue(); 2108 unsigned BitWidth = VT.getSizeInBits(); 2109 switch (Opcode) { 2110 default: break; 2111 case ISD::SIGN_EXTEND: 2112 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2113 case ISD::ANY_EXTEND: 2114 case ISD::ZERO_EXTEND: 2115 case ISD::TRUNCATE: 2116 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2117 case ISD::UINT_TO_FP: 2118 case ISD::SINT_TO_FP: { 2119 const uint64_t zero[] = {0, 0}; 2120 // No compile time operations on this type. 2121 if (VT==MVT::ppcf128) 2122 break; 2123 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2124 (void)apf.convertFromAPInt(Val, 2125 Opcode==ISD::SINT_TO_FP, 2126 APFloat::rmNearestTiesToEven); 2127 return getConstantFP(apf, VT); 2128 } 2129 case ISD::BIT_CONVERT: 2130 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2131 return getConstantFP(Val.bitsToFloat(), VT); 2132 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2133 return getConstantFP(Val.bitsToDouble(), VT); 2134 break; 2135 case ISD::BSWAP: 2136 return getConstant(Val.byteSwap(), VT); 2137 case ISD::CTPOP: 2138 return getConstant(Val.countPopulation(), VT); 2139 case ISD::CTLZ: 2140 return getConstant(Val.countLeadingZeros(), VT); 2141 case ISD::CTTZ: 2142 return getConstant(Val.countTrailingZeros(), VT); 2143 } 2144 } 2145 2146 // Constant fold unary operations with a floating point constant operand. 2147 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2148 APFloat V = C->getValueAPF(); // make copy 2149 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2150 switch (Opcode) { 2151 case ISD::FNEG: 2152 V.changeSign(); 2153 return getConstantFP(V, VT); 2154 case ISD::FABS: 2155 V.clearSign(); 2156 return getConstantFP(V, VT); 2157 case ISD::FP_ROUND: 2158 case ISD::FP_EXTEND: { 2159 bool ignored; 2160 // This can return overflow, underflow, or inexact; we don't care. 2161 // FIXME need to be more flexible about rounding mode. 2162 (void)V.convert(*MVTToAPFloatSemantics(VT), 2163 APFloat::rmNearestTiesToEven, &ignored); 2164 return getConstantFP(V, VT); 2165 } 2166 case ISD::FP_TO_SINT: 2167 case ISD::FP_TO_UINT: { 2168 integerPart x; 2169 bool ignored; 2170 assert(integerPartWidth >= 64); 2171 // FIXME need to be more flexible about rounding mode. 2172 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2173 Opcode==ISD::FP_TO_SINT, 2174 APFloat::rmTowardZero, &ignored); 2175 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2176 break; 2177 return getConstant(x, VT); 2178 } 2179 case ISD::BIT_CONVERT: 2180 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2181 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2182 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2183 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2184 break; 2185 } 2186 } 2187 } 2188 2189 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2190 switch (Opcode) { 2191 case ISD::TokenFactor: 2192 case ISD::MERGE_VALUES: 2193 case ISD::CONCAT_VECTORS: 2194 return Operand; // Factor, merge or concat of one node? No need. 2195 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2196 case ISD::FP_EXTEND: 2197 assert(VT.isFloatingPoint() && 2198 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2199 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2200 if (Operand.getOpcode() == ISD::UNDEF) 2201 return getNode(ISD::UNDEF, VT); 2202 break; 2203 case ISD::SIGN_EXTEND: 2204 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2205 "Invalid SIGN_EXTEND!"); 2206 if (Operand.getValueType() == VT) return Operand; // noop extension 2207 assert(Operand.getValueType().bitsLT(VT) 2208 && "Invalid sext node, dst < src!"); 2209 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2210 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2211 break; 2212 case ISD::ZERO_EXTEND: 2213 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2214 "Invalid ZERO_EXTEND!"); 2215 if (Operand.getValueType() == VT) return Operand; // noop extension 2216 assert(Operand.getValueType().bitsLT(VT) 2217 && "Invalid zext node, dst < src!"); 2218 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2219 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2220 break; 2221 case ISD::ANY_EXTEND: 2222 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2223 "Invalid ANY_EXTEND!"); 2224 if (Operand.getValueType() == VT) return Operand; // noop extension 2225 assert(Operand.getValueType().bitsLT(VT) 2226 && "Invalid anyext node, dst < src!"); 2227 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2228 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2229 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2230 break; 2231 case ISD::TRUNCATE: 2232 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2233 "Invalid TRUNCATE!"); 2234 if (Operand.getValueType() == VT) return Operand; // noop truncate 2235 assert(Operand.getValueType().bitsGT(VT) 2236 && "Invalid truncate node, src < dst!"); 2237 if (OpOpcode == ISD::TRUNCATE) 2238 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2239 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2240 OpOpcode == ISD::ANY_EXTEND) { 2241 // If the source is smaller than the dest, we still need an extend. 2242 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2243 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2244 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2245 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2246 else 2247 return Operand.getNode()->getOperand(0); 2248 } 2249 break; 2250 case ISD::BIT_CONVERT: 2251 // Basic sanity checking. 2252 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2253 && "Cannot BIT_CONVERT between types of different sizes!"); 2254 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2255 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2256 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2257 if (OpOpcode == ISD::UNDEF) 2258 return getNode(ISD::UNDEF, VT); 2259 break; 2260 case ISD::SCALAR_TO_VECTOR: 2261 assert(VT.isVector() && !Operand.getValueType().isVector() && 2262 VT.getVectorElementType() == Operand.getValueType() && 2263 "Illegal SCALAR_TO_VECTOR node!"); 2264 if (OpOpcode == ISD::UNDEF) 2265 return getNode(ISD::UNDEF, VT); 2266 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2267 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2268 isa<ConstantSDNode>(Operand.getOperand(1)) && 2269 Operand.getConstantOperandVal(1) == 0 && 2270 Operand.getOperand(0).getValueType() == VT) 2271 return Operand.getOperand(0); 2272 break; 2273 case ISD::FNEG: 2274 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2275 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2276 Operand.getNode()->getOperand(0)); 2277 if (OpOpcode == ISD::FNEG) // --X -> X 2278 return Operand.getNode()->getOperand(0); 2279 break; 2280 case ISD::FABS: 2281 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2282 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2283 break; 2284 } 2285 2286 SDNode *N; 2287 SDVTList VTs = getVTList(VT); 2288 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2289 FoldingSetNodeID ID; 2290 SDValue Ops[1] = { Operand }; 2291 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2292 void *IP = 0; 2293 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2294 return SDValue(E, 0); 2295 N = NodeAllocator.Allocate<UnarySDNode>(); 2296 new (N) UnarySDNode(Opcode, VTs, Operand); 2297 CSEMap.InsertNode(N, IP); 2298 } else { 2299 N = NodeAllocator.Allocate<UnarySDNode>(); 2300 new (N) UnarySDNode(Opcode, VTs, Operand); 2301 } 2302 2303 AllNodes.push_back(N); 2304#ifndef NDEBUG 2305 VerifyNode(N); 2306#endif 2307 return SDValue(N, 0); 2308} 2309 2310SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2311 MVT VT, 2312 ConstantSDNode *Cst1, 2313 ConstantSDNode *Cst2) { 2314 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2315 2316 switch (Opcode) { 2317 case ISD::ADD: return getConstant(C1 + C2, VT); 2318 case ISD::SUB: return getConstant(C1 - C2, VT); 2319 case ISD::MUL: return getConstant(C1 * C2, VT); 2320 case ISD::UDIV: 2321 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2322 break; 2323 case ISD::UREM: 2324 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2325 break; 2326 case ISD::SDIV: 2327 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2328 break; 2329 case ISD::SREM: 2330 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2331 break; 2332 case ISD::AND: return getConstant(C1 & C2, VT); 2333 case ISD::OR: return getConstant(C1 | C2, VT); 2334 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2335 case ISD::SHL: return getConstant(C1 << C2, VT); 2336 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2337 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2338 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2339 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2340 default: break; 2341 } 2342 2343 return SDValue(); 2344} 2345 2346SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2347 SDValue N1, SDValue N2) { 2348 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2349 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2350 switch (Opcode) { 2351 default: break; 2352 case ISD::TokenFactor: 2353 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2354 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2355 // Fold trivial token factors. 2356 if (N1.getOpcode() == ISD::EntryToken) return N2; 2357 if (N2.getOpcode() == ISD::EntryToken) return N1; 2358 if (N1 == N2) return N1; 2359 break; 2360 case ISD::CONCAT_VECTORS: 2361 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2362 // one big BUILD_VECTOR. 2363 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2364 N2.getOpcode() == ISD::BUILD_VECTOR) { 2365 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2366 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2367 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2368 } 2369 break; 2370 case ISD::AND: 2371 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2372 N1.getValueType() == VT && "Binary operator types must match!"); 2373 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2374 // worth handling here. 2375 if (N2C && N2C->isNullValue()) 2376 return N2; 2377 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2378 return N1; 2379 break; 2380 case ISD::OR: 2381 case ISD::XOR: 2382 case ISD::ADD: 2383 case ISD::SUB: 2384 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2385 N1.getValueType() == VT && "Binary operator types must match!"); 2386 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2387 // it's worth handling here. 2388 if (N2C && N2C->isNullValue()) 2389 return N1; 2390 break; 2391 case ISD::UDIV: 2392 case ISD::UREM: 2393 case ISD::MULHU: 2394 case ISD::MULHS: 2395 case ISD::MUL: 2396 case ISD::SDIV: 2397 case ISD::SREM: 2398 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2399 // fall through 2400 case ISD::FADD: 2401 case ISD::FSUB: 2402 case ISD::FMUL: 2403 case ISD::FDIV: 2404 case ISD::FREM: 2405 if (UnsafeFPMath) { 2406 if (Opcode == ISD::FADD) { 2407 // 0+x --> x 2408 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2409 if (CFP->getValueAPF().isZero()) 2410 return N2; 2411 // x+0 --> x 2412 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2413 if (CFP->getValueAPF().isZero()) 2414 return N1; 2415 } else if (Opcode == ISD::FSUB) { 2416 // x-0 --> x 2417 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2418 if (CFP->getValueAPF().isZero()) 2419 return N1; 2420 } 2421 } 2422 assert(N1.getValueType() == N2.getValueType() && 2423 N1.getValueType() == VT && "Binary operator types must match!"); 2424 break; 2425 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2426 assert(N1.getValueType() == VT && 2427 N1.getValueType().isFloatingPoint() && 2428 N2.getValueType().isFloatingPoint() && 2429 "Invalid FCOPYSIGN!"); 2430 break; 2431 case ISD::SHL: 2432 case ISD::SRA: 2433 case ISD::SRL: 2434 case ISD::ROTL: 2435 case ISD::ROTR: 2436 assert(VT == N1.getValueType() && 2437 "Shift operators return type must be the same as their first arg"); 2438 assert(VT.isInteger() && N2.getValueType().isInteger() && 2439 "Shifts only work on integers"); 2440 assert((N2.getValueType() == TLI.getShiftAmountTy() || 2441 (N2.getValueType().isVector() && N2.getValueType().isInteger())) && 2442 "Wrong type for shift amount"); 2443 2444 // Always fold shifts of i1 values so the code generator doesn't need to 2445 // handle them. Since we know the size of the shift has to be less than the 2446 // size of the value, the shift/rotate count is guaranteed to be zero. 2447 if (VT == MVT::i1) 2448 return N1; 2449 break; 2450 case ISD::FP_ROUND_INREG: { 2451 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2452 assert(VT == N1.getValueType() && "Not an inreg round!"); 2453 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2454 "Cannot FP_ROUND_INREG integer types"); 2455 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2456 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2457 break; 2458 } 2459 case ISD::FP_ROUND: 2460 assert(VT.isFloatingPoint() && 2461 N1.getValueType().isFloatingPoint() && 2462 VT.bitsLE(N1.getValueType()) && 2463 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2464 if (N1.getValueType() == VT) return N1; // noop conversion. 2465 break; 2466 case ISD::AssertSext: 2467 case ISD::AssertZext: { 2468 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2469 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2470 assert(VT.isInteger() && EVT.isInteger() && 2471 "Cannot *_EXTEND_INREG FP types"); 2472 assert(EVT.bitsLE(VT) && "Not extending!"); 2473 if (VT == EVT) return N1; // noop assertion. 2474 break; 2475 } 2476 case ISD::SIGN_EXTEND_INREG: { 2477 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2478 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2479 assert(VT.isInteger() && EVT.isInteger() && 2480 "Cannot *_EXTEND_INREG FP types"); 2481 assert(EVT.bitsLE(VT) && "Not extending!"); 2482 if (EVT == VT) return N1; // Not actually extending 2483 2484 if (N1C) { 2485 APInt Val = N1C->getAPIntValue(); 2486 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2487 Val <<= Val.getBitWidth()-FromBits; 2488 Val = Val.ashr(Val.getBitWidth()-FromBits); 2489 return getConstant(Val, VT); 2490 } 2491 break; 2492 } 2493 case ISD::EXTRACT_VECTOR_ELT: 2494 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2495 if (N1.getOpcode() == ISD::UNDEF) 2496 return getNode(ISD::UNDEF, VT); 2497 2498 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2499 // expanding copies of large vectors from registers. 2500 if (N2C && 2501 N1.getOpcode() == ISD::CONCAT_VECTORS && 2502 N1.getNumOperands() > 0) { 2503 unsigned Factor = 2504 N1.getOperand(0).getValueType().getVectorNumElements(); 2505 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2506 N1.getOperand(N2C->getZExtValue() / Factor), 2507 getConstant(N2C->getZExtValue() % Factor, 2508 N2.getValueType())); 2509 } 2510 2511 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2512 // expanding large vector constants. 2513 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2514 return N1.getOperand(N2C->getZExtValue()); 2515 2516 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2517 // operations are lowered to scalars. 2518 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2519 if (N1.getOperand(2) == N2) 2520 return N1.getOperand(1); 2521 else 2522 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2523 } 2524 break; 2525 case ISD::EXTRACT_ELEMENT: 2526 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2527 assert(!N1.getValueType().isVector() && !VT.isVector() && 2528 (N1.getValueType().isInteger() == VT.isInteger()) && 2529 "Wrong types for EXTRACT_ELEMENT!"); 2530 2531 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2532 // 64-bit integers into 32-bit parts. Instead of building the extract of 2533 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2534 if (N1.getOpcode() == ISD::BUILD_PAIR) 2535 return N1.getOperand(N2C->getZExtValue()); 2536 2537 // EXTRACT_ELEMENT of a constant int is also very common. 2538 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2539 unsigned ElementSize = VT.getSizeInBits(); 2540 unsigned Shift = ElementSize * N2C->getZExtValue(); 2541 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2542 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2543 } 2544 break; 2545 case ISD::EXTRACT_SUBVECTOR: 2546 if (N1.getValueType() == VT) // Trivial extraction. 2547 return N1; 2548 break; 2549 } 2550 2551 if (N1C) { 2552 if (N2C) { 2553 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2554 if (SV.getNode()) return SV; 2555 } else { // Cannonicalize constant to RHS if commutative 2556 if (isCommutativeBinOp(Opcode)) { 2557 std::swap(N1C, N2C); 2558 std::swap(N1, N2); 2559 } 2560 } 2561 } 2562 2563 // Constant fold FP operations. 2564 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2565 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2566 if (N1CFP) { 2567 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2568 // Cannonicalize constant to RHS if commutative 2569 std::swap(N1CFP, N2CFP); 2570 std::swap(N1, N2); 2571 } else if (N2CFP && VT != MVT::ppcf128) { 2572 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2573 APFloat::opStatus s; 2574 switch (Opcode) { 2575 case ISD::FADD: 2576 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2577 if (s != APFloat::opInvalidOp) 2578 return getConstantFP(V1, VT); 2579 break; 2580 case ISD::FSUB: 2581 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2582 if (s!=APFloat::opInvalidOp) 2583 return getConstantFP(V1, VT); 2584 break; 2585 case ISD::FMUL: 2586 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2587 if (s!=APFloat::opInvalidOp) 2588 return getConstantFP(V1, VT); 2589 break; 2590 case ISD::FDIV: 2591 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2592 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2593 return getConstantFP(V1, VT); 2594 break; 2595 case ISD::FREM : 2596 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2597 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2598 return getConstantFP(V1, VT); 2599 break; 2600 case ISD::FCOPYSIGN: 2601 V1.copySign(V2); 2602 return getConstantFP(V1, VT); 2603 default: break; 2604 } 2605 } 2606 } 2607 2608 // Canonicalize an UNDEF to the RHS, even over a constant. 2609 if (N1.getOpcode() == ISD::UNDEF) { 2610 if (isCommutativeBinOp(Opcode)) { 2611 std::swap(N1, N2); 2612 } else { 2613 switch (Opcode) { 2614 case ISD::FP_ROUND_INREG: 2615 case ISD::SIGN_EXTEND_INREG: 2616 case ISD::SUB: 2617 case ISD::FSUB: 2618 case ISD::FDIV: 2619 case ISD::FREM: 2620 case ISD::SRA: 2621 return N1; // fold op(undef, arg2) -> undef 2622 case ISD::UDIV: 2623 case ISD::SDIV: 2624 case ISD::UREM: 2625 case ISD::SREM: 2626 case ISD::SRL: 2627 case ISD::SHL: 2628 if (!VT.isVector()) 2629 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2630 // For vectors, we can't easily build an all zero vector, just return 2631 // the LHS. 2632 return N2; 2633 } 2634 } 2635 } 2636 2637 // Fold a bunch of operators when the RHS is undef. 2638 if (N2.getOpcode() == ISD::UNDEF) { 2639 switch (Opcode) { 2640 case ISD::XOR: 2641 if (N1.getOpcode() == ISD::UNDEF) 2642 // Handle undef ^ undef -> 0 special case. This is a common 2643 // idiom (misuse). 2644 return getConstant(0, VT); 2645 // fallthrough 2646 case ISD::ADD: 2647 case ISD::ADDC: 2648 case ISD::ADDE: 2649 case ISD::SUB: 2650 case ISD::FADD: 2651 case ISD::FSUB: 2652 case ISD::FMUL: 2653 case ISD::FDIV: 2654 case ISD::FREM: 2655 case ISD::UDIV: 2656 case ISD::SDIV: 2657 case ISD::UREM: 2658 case ISD::SREM: 2659 return N2; // fold op(arg1, undef) -> undef 2660 case ISD::MUL: 2661 case ISD::AND: 2662 case ISD::SRL: 2663 case ISD::SHL: 2664 if (!VT.isVector()) 2665 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2666 // For vectors, we can't easily build an all zero vector, just return 2667 // the LHS. 2668 return N1; 2669 case ISD::OR: 2670 if (!VT.isVector()) 2671 return getConstant(VT.getIntegerVTBitMask(), VT); 2672 // For vectors, we can't easily build an all one vector, just return 2673 // the LHS. 2674 return N1; 2675 case ISD::SRA: 2676 return N1; 2677 } 2678 } 2679 2680 // Memoize this node if possible. 2681 SDNode *N; 2682 SDVTList VTs = getVTList(VT); 2683 if (VT != MVT::Flag) { 2684 SDValue Ops[] = { N1, N2 }; 2685 FoldingSetNodeID ID; 2686 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2687 void *IP = 0; 2688 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2689 return SDValue(E, 0); 2690 N = NodeAllocator.Allocate<BinarySDNode>(); 2691 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2692 CSEMap.InsertNode(N, IP); 2693 } else { 2694 N = NodeAllocator.Allocate<BinarySDNode>(); 2695 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2696 } 2697 2698 AllNodes.push_back(N); 2699#ifndef NDEBUG 2700 VerifyNode(N); 2701#endif 2702 return SDValue(N, 0); 2703} 2704 2705SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2706 SDValue N1, SDValue N2, SDValue N3) { 2707 // Perform various simplifications. 2708 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2709 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2710 switch (Opcode) { 2711 case ISD::CONCAT_VECTORS: 2712 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2713 // one big BUILD_VECTOR. 2714 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2715 N2.getOpcode() == ISD::BUILD_VECTOR && 2716 N3.getOpcode() == ISD::BUILD_VECTOR) { 2717 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2718 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2719 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2720 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2721 } 2722 break; 2723 case ISD::SETCC: { 2724 // Use FoldSetCC to simplify SETCC's. 2725 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2726 if (Simp.getNode()) return Simp; 2727 break; 2728 } 2729 case ISD::SELECT: 2730 if (N1C) { 2731 if (N1C->getZExtValue()) 2732 return N2; // select true, X, Y -> X 2733 else 2734 return N3; // select false, X, Y -> Y 2735 } 2736 2737 if (N2 == N3) return N2; // select C, X, X -> X 2738 break; 2739 case ISD::BRCOND: 2740 if (N2C) { 2741 if (N2C->getZExtValue()) // Unconditional branch 2742 return getNode(ISD::BR, MVT::Other, N1, N3); 2743 else 2744 return N1; // Never-taken branch 2745 } 2746 break; 2747 case ISD::VECTOR_SHUFFLE: 2748 assert(N1.getValueType() == N2.getValueType() && 2749 N1.getValueType().isVector() && 2750 VT.isVector() && N3.getValueType().isVector() && 2751 N3.getOpcode() == ISD::BUILD_VECTOR && 2752 VT.getVectorNumElements() == N3.getNumOperands() && 2753 "Illegal VECTOR_SHUFFLE node!"); 2754 break; 2755 case ISD::BIT_CONVERT: 2756 // Fold bit_convert nodes from a type to themselves. 2757 if (N1.getValueType() == VT) 2758 return N1; 2759 break; 2760 } 2761 2762 // Memoize node if it doesn't produce a flag. 2763 SDNode *N; 2764 SDVTList VTs = getVTList(VT); 2765 if (VT != MVT::Flag) { 2766 SDValue Ops[] = { N1, N2, N3 }; 2767 FoldingSetNodeID ID; 2768 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2769 void *IP = 0; 2770 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2771 return SDValue(E, 0); 2772 N = NodeAllocator.Allocate<TernarySDNode>(); 2773 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2774 CSEMap.InsertNode(N, IP); 2775 } else { 2776 N = NodeAllocator.Allocate<TernarySDNode>(); 2777 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2778 } 2779 AllNodes.push_back(N); 2780#ifndef NDEBUG 2781 VerifyNode(N); 2782#endif 2783 return SDValue(N, 0); 2784} 2785 2786SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2787 SDValue N1, SDValue N2, SDValue N3, 2788 SDValue N4) { 2789 SDValue Ops[] = { N1, N2, N3, N4 }; 2790 return getNode(Opcode, VT, Ops, 4); 2791} 2792 2793SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2794 SDValue N1, SDValue N2, SDValue N3, 2795 SDValue N4, SDValue N5) { 2796 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2797 return getNode(Opcode, VT, Ops, 5); 2798} 2799 2800/// getMemsetValue - Vectorized representation of the memset value 2801/// operand. 2802static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2803 unsigned NumBits = VT.isVector() ? 2804 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2805 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2806 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2807 unsigned Shift = 8; 2808 for (unsigned i = NumBits; i > 8; i >>= 1) { 2809 Val = (Val << Shift) | Val; 2810 Shift <<= 1; 2811 } 2812 if (VT.isInteger()) 2813 return DAG.getConstant(Val, VT); 2814 return DAG.getConstantFP(APFloat(Val), VT); 2815 } 2816 2817 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2818 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2819 unsigned Shift = 8; 2820 for (unsigned i = NumBits; i > 8; i >>= 1) { 2821 Value = DAG.getNode(ISD::OR, VT, 2822 DAG.getNode(ISD::SHL, VT, Value, 2823 DAG.getConstant(Shift, 2824 TLI.getShiftAmountTy())), 2825 Value); 2826 Shift <<= 1; 2827 } 2828 2829 return Value; 2830} 2831 2832/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2833/// used when a memcpy is turned into a memset when the source is a constant 2834/// string ptr. 2835static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2836 const TargetLowering &TLI, 2837 std::string &Str, unsigned Offset) { 2838 // Handle vector with all elements zero. 2839 if (Str.empty()) { 2840 if (VT.isInteger()) 2841 return DAG.getConstant(0, VT); 2842 unsigned NumElts = VT.getVectorNumElements(); 2843 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2844 return DAG.getNode(ISD::BIT_CONVERT, VT, 2845 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2846 } 2847 2848 assert(!VT.isVector() && "Can't handle vector type here!"); 2849 unsigned NumBits = VT.getSizeInBits(); 2850 unsigned MSB = NumBits / 8; 2851 uint64_t Val = 0; 2852 if (TLI.isLittleEndian()) 2853 Offset = Offset + MSB - 1; 2854 for (unsigned i = 0; i != MSB; ++i) { 2855 Val = (Val << 8) | (unsigned char)Str[Offset]; 2856 Offset += TLI.isLittleEndian() ? -1 : 1; 2857 } 2858 return DAG.getConstant(Val, VT); 2859} 2860 2861/// getMemBasePlusOffset - Returns base and offset node for the 2862/// 2863static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2864 SelectionDAG &DAG) { 2865 MVT VT = Base.getValueType(); 2866 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2867} 2868 2869/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2870/// 2871static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2872 unsigned SrcDelta = 0; 2873 GlobalAddressSDNode *G = NULL; 2874 if (Src.getOpcode() == ISD::GlobalAddress) 2875 G = cast<GlobalAddressSDNode>(Src); 2876 else if (Src.getOpcode() == ISD::ADD && 2877 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2878 Src.getOperand(1).getOpcode() == ISD::Constant) { 2879 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2880 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 2881 } 2882 if (!G) 2883 return false; 2884 2885 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2886 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2887 return true; 2888 2889 return false; 2890} 2891 2892/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2893/// to replace the memset / memcpy is below the threshold. It also returns the 2894/// types of the sequence of memory ops to perform memset / memcpy. 2895static 2896bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2897 SDValue Dst, SDValue Src, 2898 unsigned Limit, uint64_t Size, unsigned &Align, 2899 std::string &Str, bool &isSrcStr, 2900 SelectionDAG &DAG, 2901 const TargetLowering &TLI) { 2902 isSrcStr = isMemSrcFromString(Src, Str); 2903 bool isSrcConst = isa<ConstantSDNode>(Src); 2904 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2905 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2906 if (VT != MVT::iAny) { 2907 unsigned NewAlign = (unsigned) 2908 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2909 // If source is a string constant, this will require an unaligned load. 2910 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2911 if (Dst.getOpcode() != ISD::FrameIndex) { 2912 // Can't change destination alignment. It requires a unaligned store. 2913 if (AllowUnalign) 2914 VT = MVT::iAny; 2915 } else { 2916 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2917 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2918 if (MFI->isFixedObjectIndex(FI)) { 2919 // Can't change destination alignment. It requires a unaligned store. 2920 if (AllowUnalign) 2921 VT = MVT::iAny; 2922 } else { 2923 // Give the stack frame object a larger alignment if needed. 2924 if (MFI->getObjectAlignment(FI) < NewAlign) 2925 MFI->setObjectAlignment(FI, NewAlign); 2926 Align = NewAlign; 2927 } 2928 } 2929 } 2930 } 2931 2932 if (VT == MVT::iAny) { 2933 if (AllowUnalign) { 2934 VT = MVT::i64; 2935 } else { 2936 switch (Align & 7) { 2937 case 0: VT = MVT::i64; break; 2938 case 4: VT = MVT::i32; break; 2939 case 2: VT = MVT::i16; break; 2940 default: VT = MVT::i8; break; 2941 } 2942 } 2943 2944 MVT LVT = MVT::i64; 2945 while (!TLI.isTypeLegal(LVT)) 2946 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2947 assert(LVT.isInteger()); 2948 2949 if (VT.bitsGT(LVT)) 2950 VT = LVT; 2951 } 2952 2953 unsigned NumMemOps = 0; 2954 while (Size != 0) { 2955 unsigned VTSize = VT.getSizeInBits() / 8; 2956 while (VTSize > Size) { 2957 // For now, only use non-vector load / store's for the left-over pieces. 2958 if (VT.isVector()) { 2959 VT = MVT::i64; 2960 while (!TLI.isTypeLegal(VT)) 2961 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2962 VTSize = VT.getSizeInBits() / 8; 2963 } else { 2964 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2965 VTSize >>= 1; 2966 } 2967 } 2968 2969 if (++NumMemOps > Limit) 2970 return false; 2971 MemOps.push_back(VT); 2972 Size -= VTSize; 2973 } 2974 2975 return true; 2976} 2977 2978static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 2979 SDValue Chain, SDValue Dst, 2980 SDValue Src, uint64_t Size, 2981 unsigned Align, bool AlwaysInline, 2982 const Value *DstSV, uint64_t DstSVOff, 2983 const Value *SrcSV, uint64_t SrcSVOff){ 2984 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2985 2986 // Expand memcpy to a series of load and store ops if the size operand falls 2987 // below a certain threshold. 2988 std::vector<MVT> MemOps; 2989 uint64_t Limit = -1ULL; 2990 if (!AlwaysInline) 2991 Limit = TLI.getMaxStoresPerMemcpy(); 2992 unsigned DstAlign = Align; // Destination alignment can change. 2993 std::string Str; 2994 bool CopyFromStr; 2995 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2996 Str, CopyFromStr, DAG, TLI)) 2997 return SDValue(); 2998 2999 3000 bool isZeroStr = CopyFromStr && Str.empty(); 3001 SmallVector<SDValue, 8> OutChains; 3002 unsigned NumMemOps = MemOps.size(); 3003 uint64_t SrcOff = 0, DstOff = 0; 3004 for (unsigned i = 0; i < NumMemOps; i++) { 3005 MVT VT = MemOps[i]; 3006 unsigned VTSize = VT.getSizeInBits() / 8; 3007 SDValue Value, Store; 3008 3009 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 3010 // It's unlikely a store of a vector immediate can be done in a single 3011 // instruction. It would require a load from a constantpool first. 3012 // We also handle store a vector with all zero's. 3013 // FIXME: Handle other cases where store of vector immediate is done in 3014 // a single instruction. 3015 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 3016 Store = DAG.getStore(Chain, Value, 3017 getMemBasePlusOffset(Dst, DstOff, DAG), 3018 DstSV, DstSVOff + DstOff, false, DstAlign); 3019 } else { 3020 Value = DAG.getLoad(VT, Chain, 3021 getMemBasePlusOffset(Src, SrcOff, DAG), 3022 SrcSV, SrcSVOff + SrcOff, false, Align); 3023 Store = DAG.getStore(Chain, Value, 3024 getMemBasePlusOffset(Dst, DstOff, DAG), 3025 DstSV, DstSVOff + DstOff, false, DstAlign); 3026 } 3027 OutChains.push_back(Store); 3028 SrcOff += VTSize; 3029 DstOff += VTSize; 3030 } 3031 3032 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3033 &OutChains[0], OutChains.size()); 3034} 3035 3036static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 3037 SDValue Chain, SDValue Dst, 3038 SDValue Src, uint64_t Size, 3039 unsigned Align, bool AlwaysInline, 3040 const Value *DstSV, uint64_t DstSVOff, 3041 const Value *SrcSV, uint64_t SrcSVOff){ 3042 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3043 3044 // Expand memmove to a series of load and store ops if the size operand falls 3045 // below a certain threshold. 3046 std::vector<MVT> MemOps; 3047 uint64_t Limit = -1ULL; 3048 if (!AlwaysInline) 3049 Limit = TLI.getMaxStoresPerMemmove(); 3050 unsigned DstAlign = Align; // Destination alignment can change. 3051 std::string Str; 3052 bool CopyFromStr; 3053 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3054 Str, CopyFromStr, DAG, TLI)) 3055 return SDValue(); 3056 3057 uint64_t SrcOff = 0, DstOff = 0; 3058 3059 SmallVector<SDValue, 8> LoadValues; 3060 SmallVector<SDValue, 8> LoadChains; 3061 SmallVector<SDValue, 8> OutChains; 3062 unsigned NumMemOps = MemOps.size(); 3063 for (unsigned i = 0; i < NumMemOps; i++) { 3064 MVT VT = MemOps[i]; 3065 unsigned VTSize = VT.getSizeInBits() / 8; 3066 SDValue Value, Store; 3067 3068 Value = DAG.getLoad(VT, Chain, 3069 getMemBasePlusOffset(Src, SrcOff, DAG), 3070 SrcSV, SrcSVOff + SrcOff, false, Align); 3071 LoadValues.push_back(Value); 3072 LoadChains.push_back(Value.getValue(1)); 3073 SrcOff += VTSize; 3074 } 3075 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 3076 &LoadChains[0], LoadChains.size()); 3077 OutChains.clear(); 3078 for (unsigned i = 0; i < NumMemOps; i++) { 3079 MVT VT = MemOps[i]; 3080 unsigned VTSize = VT.getSizeInBits() / 8; 3081 SDValue Value, Store; 3082 3083 Store = DAG.getStore(Chain, LoadValues[i], 3084 getMemBasePlusOffset(Dst, DstOff, DAG), 3085 DstSV, DstSVOff + DstOff, false, DstAlign); 3086 OutChains.push_back(Store); 3087 DstOff += VTSize; 3088 } 3089 3090 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3091 &OutChains[0], OutChains.size()); 3092} 3093 3094static SDValue getMemsetStores(SelectionDAG &DAG, 3095 SDValue Chain, SDValue Dst, 3096 SDValue Src, uint64_t Size, 3097 unsigned Align, 3098 const Value *DstSV, uint64_t DstSVOff) { 3099 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3100 3101 // Expand memset to a series of load/store ops if the size operand 3102 // falls below a certain threshold. 3103 std::vector<MVT> MemOps; 3104 std::string Str; 3105 bool CopyFromStr; 3106 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3107 Size, Align, Str, CopyFromStr, DAG, TLI)) 3108 return SDValue(); 3109 3110 SmallVector<SDValue, 8> OutChains; 3111 uint64_t DstOff = 0; 3112 3113 unsigned NumMemOps = MemOps.size(); 3114 for (unsigned i = 0; i < NumMemOps; i++) { 3115 MVT VT = MemOps[i]; 3116 unsigned VTSize = VT.getSizeInBits() / 8; 3117 SDValue Value = getMemsetValue(Src, VT, DAG); 3118 SDValue Store = DAG.getStore(Chain, Value, 3119 getMemBasePlusOffset(Dst, DstOff, DAG), 3120 DstSV, DstSVOff + DstOff); 3121 OutChains.push_back(Store); 3122 DstOff += VTSize; 3123 } 3124 3125 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3126 &OutChains[0], OutChains.size()); 3127} 3128 3129SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3130 SDValue Src, SDValue Size, 3131 unsigned Align, bool AlwaysInline, 3132 const Value *DstSV, uint64_t DstSVOff, 3133 const Value *SrcSV, uint64_t SrcSVOff) { 3134 3135 // Check to see if we should lower the memcpy to loads and stores first. 3136 // For cases within the target-specified limits, this is the best choice. 3137 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3138 if (ConstantSize) { 3139 // Memcpy with size zero? Just return the original chain. 3140 if (ConstantSize->isNullValue()) 3141 return Chain; 3142 3143 SDValue Result = 3144 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3145 ConstantSize->getZExtValue(), 3146 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3147 if (Result.getNode()) 3148 return Result; 3149 } 3150 3151 // Then check to see if we should lower the memcpy with target-specific 3152 // code. If the target chooses to do this, this is the next best. 3153 SDValue Result = 3154 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3155 AlwaysInline, 3156 DstSV, DstSVOff, SrcSV, SrcSVOff); 3157 if (Result.getNode()) 3158 return Result; 3159 3160 // If we really need inline code and the target declined to provide it, 3161 // use a (potentially long) sequence of loads and stores. 3162 if (AlwaysInline) { 3163 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3164 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3165 ConstantSize->getZExtValue(), Align, true, 3166 DstSV, DstSVOff, SrcSV, SrcSVOff); 3167 } 3168 3169 // Emit a library call. 3170 TargetLowering::ArgListTy Args; 3171 TargetLowering::ArgListEntry Entry; 3172 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3173 Entry.Node = Dst; Args.push_back(Entry); 3174 Entry.Node = Src; Args.push_back(Entry); 3175 Entry.Node = Size; Args.push_back(Entry); 3176 std::pair<SDValue,SDValue> CallResult = 3177 TLI.LowerCallTo(Chain, Type::VoidTy, 3178 false, false, false, false, CallingConv::C, false, 3179 getExternalSymbol("memcpy", TLI.getPointerTy()), 3180 Args, *this); 3181 return CallResult.second; 3182} 3183 3184SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3185 SDValue Src, SDValue Size, 3186 unsigned Align, 3187 const Value *DstSV, uint64_t DstSVOff, 3188 const Value *SrcSV, uint64_t SrcSVOff) { 3189 3190 // Check to see if we should lower the memmove to loads and stores first. 3191 // For cases within the target-specified limits, this is the best choice. 3192 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3193 if (ConstantSize) { 3194 // Memmove with size zero? Just return the original chain. 3195 if (ConstantSize->isNullValue()) 3196 return Chain; 3197 3198 SDValue Result = 3199 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3200 ConstantSize->getZExtValue(), 3201 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3202 if (Result.getNode()) 3203 return Result; 3204 } 3205 3206 // Then check to see if we should lower the memmove with target-specific 3207 // code. If the target chooses to do this, this is the next best. 3208 SDValue Result = 3209 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3210 DstSV, DstSVOff, SrcSV, SrcSVOff); 3211 if (Result.getNode()) 3212 return Result; 3213 3214 // Emit a library call. 3215 TargetLowering::ArgListTy Args; 3216 TargetLowering::ArgListEntry Entry; 3217 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3218 Entry.Node = Dst; Args.push_back(Entry); 3219 Entry.Node = Src; Args.push_back(Entry); 3220 Entry.Node = Size; Args.push_back(Entry); 3221 std::pair<SDValue,SDValue> CallResult = 3222 TLI.LowerCallTo(Chain, Type::VoidTy, 3223 false, false, false, false, CallingConv::C, false, 3224 getExternalSymbol("memmove", TLI.getPointerTy()), 3225 Args, *this); 3226 return CallResult.second; 3227} 3228 3229SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3230 SDValue Src, SDValue Size, 3231 unsigned Align, 3232 const Value *DstSV, uint64_t DstSVOff) { 3233 3234 // Check to see if we should lower the memset to stores first. 3235 // For cases within the target-specified limits, this is the best choice. 3236 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3237 if (ConstantSize) { 3238 // Memset with size zero? Just return the original chain. 3239 if (ConstantSize->isNullValue()) 3240 return Chain; 3241 3242 SDValue Result = 3243 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3244 Align, DstSV, DstSVOff); 3245 if (Result.getNode()) 3246 return Result; 3247 } 3248 3249 // Then check to see if we should lower the memset with target-specific 3250 // code. If the target chooses to do this, this is the next best. 3251 SDValue Result = 3252 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3253 DstSV, DstSVOff); 3254 if (Result.getNode()) 3255 return Result; 3256 3257 // Emit a library call. 3258 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3259 TargetLowering::ArgListTy Args; 3260 TargetLowering::ArgListEntry Entry; 3261 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3262 Args.push_back(Entry); 3263 // Extend or truncate the argument to be an i32 value for the call. 3264 if (Src.getValueType().bitsGT(MVT::i32)) 3265 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3266 else 3267 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3268 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3269 Args.push_back(Entry); 3270 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3271 Args.push_back(Entry); 3272 std::pair<SDValue,SDValue> CallResult = 3273 TLI.LowerCallTo(Chain, Type::VoidTy, 3274 false, false, false, false, CallingConv::C, false, 3275 getExternalSymbol("memset", TLI.getPointerTy()), 3276 Args, *this); 3277 return CallResult.second; 3278} 3279 3280SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3281 SDValue Chain, 3282 SDValue Ptr, SDValue Cmp, 3283 SDValue Swp, const Value* PtrVal, 3284 unsigned Alignment) { 3285 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3286 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3287 3288 MVT VT = Cmp.getValueType(); 3289 3290 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3291 Alignment = getMVTAlignment(MemVT); 3292 3293 SDVTList VTs = getVTList(VT, MVT::Other); 3294 FoldingSetNodeID ID; 3295 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3296 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3297 void* IP = 0; 3298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3299 return SDValue(E, 0); 3300 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3301 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3302 Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3303 CSEMap.InsertNode(N, IP); 3304 AllNodes.push_back(N); 3305 return SDValue(N, 0); 3306} 3307 3308SDValue SelectionDAG::getAtomic(unsigned Opcode, MVT MemVT, 3309 SDValue Chain, 3310 SDValue Ptr, SDValue Val, 3311 const Value* PtrVal, 3312 unsigned Alignment) { 3313 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3314 Opcode == ISD::ATOMIC_LOAD_SUB || 3315 Opcode == ISD::ATOMIC_LOAD_AND || 3316 Opcode == ISD::ATOMIC_LOAD_OR || 3317 Opcode == ISD::ATOMIC_LOAD_XOR || 3318 Opcode == ISD::ATOMIC_LOAD_NAND || 3319 Opcode == ISD::ATOMIC_LOAD_MIN || 3320 Opcode == ISD::ATOMIC_LOAD_MAX || 3321 Opcode == ISD::ATOMIC_LOAD_UMIN || 3322 Opcode == ISD::ATOMIC_LOAD_UMAX || 3323 Opcode == ISD::ATOMIC_SWAP) && 3324 "Invalid Atomic Op"); 3325 3326 MVT VT = Val.getValueType(); 3327 3328 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3329 Alignment = getMVTAlignment(MemVT); 3330 3331 SDVTList VTs = getVTList(VT, MVT::Other); 3332 FoldingSetNodeID ID; 3333 SDValue Ops[] = {Chain, Ptr, Val}; 3334 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3335 void* IP = 0; 3336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3337 return SDValue(E, 0); 3338 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3339 new (N) AtomicSDNode(Opcode, VTs, MemVT, 3340 Chain, Ptr, Val, PtrVal, Alignment); 3341 CSEMap.InsertNode(N, IP); 3342 AllNodes.push_back(N); 3343 return SDValue(N, 0); 3344} 3345 3346/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3347/// Allowed to return something different (and simpler) if Simplify is true. 3348SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps) { 3349 if (NumOps == 1) 3350 return Ops[0]; 3351 3352 SmallVector<MVT, 4> VTs; 3353 VTs.reserve(NumOps); 3354 for (unsigned i = 0; i < NumOps; ++i) 3355 VTs.push_back(Ops[i].getValueType()); 3356 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3357} 3358 3359SDValue 3360SelectionDAG::getMemIntrinsicNode(unsigned Opcode, 3361 const MVT *VTs, unsigned NumVTs, 3362 const SDValue *Ops, unsigned NumOps, 3363 MVT MemVT, const Value *srcValue, int SVOff, 3364 unsigned Align, bool Vol, 3365 bool ReadMem, bool WriteMem) { 3366 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps, 3367 MemVT, srcValue, SVOff, Align, Vol, 3368 ReadMem, WriteMem); 3369} 3370 3371SDValue 3372SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList, 3373 const SDValue *Ops, unsigned NumOps, 3374 MVT MemVT, const Value *srcValue, int SVOff, 3375 unsigned Align, bool Vol, 3376 bool ReadMem, bool WriteMem) { 3377 // Memoize the node unless it returns a flag. 3378 MemIntrinsicSDNode *N; 3379 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3380 FoldingSetNodeID ID; 3381 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3382 void *IP = 0; 3383 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3384 return SDValue(E, 0); 3385 3386 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3387 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3388 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3389 CSEMap.InsertNode(N, IP); 3390 } else { 3391 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3392 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3393 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3394 } 3395 AllNodes.push_back(N); 3396 return SDValue(N, 0); 3397} 3398 3399SDValue 3400SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3401 bool IsInreg, SDVTList VTs, 3402 const SDValue *Operands, unsigned NumOperands) { 3403 // Do not include isTailCall in the folding set profile. 3404 FoldingSetNodeID ID; 3405 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3406 ID.AddInteger(CallingConv); 3407 ID.AddInteger(IsVarArgs); 3408 void *IP = 0; 3409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3410 // Instead of including isTailCall in the folding set, we just 3411 // set the flag of the existing node. 3412 if (!IsTailCall) 3413 cast<CallSDNode>(E)->setNotTailCall(); 3414 return SDValue(E, 0); 3415 } 3416 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3417 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg, 3418 VTs, Operands, NumOperands); 3419 CSEMap.InsertNode(N, IP); 3420 AllNodes.push_back(N); 3421 return SDValue(N, 0); 3422} 3423 3424SDValue 3425SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3426 MVT VT, SDValue Chain, 3427 SDValue Ptr, SDValue Offset, 3428 const Value *SV, int SVOffset, MVT EVT, 3429 bool isVolatile, unsigned Alignment) { 3430 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3431 Alignment = getMVTAlignment(VT); 3432 3433 if (VT == EVT) { 3434 ExtType = ISD::NON_EXTLOAD; 3435 } else if (ExtType == ISD::NON_EXTLOAD) { 3436 assert(VT == EVT && "Non-extending load from different memory type!"); 3437 } else { 3438 // Extending load. 3439 if (VT.isVector()) 3440 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3441 "Invalid vector extload!"); 3442 else 3443 assert(EVT.bitsLT(VT) && 3444 "Should only be an extending load, not truncating!"); 3445 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3446 "Cannot sign/zero extend a FP/Vector load!"); 3447 assert(VT.isInteger() == EVT.isInteger() && 3448 "Cannot convert from FP to Int or Int -> FP!"); 3449 } 3450 3451 bool Indexed = AM != ISD::UNINDEXED; 3452 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3453 "Unindexed load with an offset!"); 3454 3455 SDVTList VTs = Indexed ? 3456 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3457 SDValue Ops[] = { Chain, Ptr, Offset }; 3458 FoldingSetNodeID ID; 3459 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3460 ID.AddInteger(AM); 3461 ID.AddInteger(ExtType); 3462 ID.AddInteger(EVT.getRawBits()); 3463 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3464 void *IP = 0; 3465 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3466 return SDValue(E, 0); 3467 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3468 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3469 Alignment, isVolatile); 3470 CSEMap.InsertNode(N, IP); 3471 AllNodes.push_back(N); 3472 return SDValue(N, 0); 3473} 3474 3475SDValue SelectionDAG::getLoad(MVT VT, 3476 SDValue Chain, SDValue Ptr, 3477 const Value *SV, int SVOffset, 3478 bool isVolatile, unsigned Alignment) { 3479 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3480 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3481 SV, SVOffset, VT, isVolatile, Alignment); 3482} 3483 3484SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3485 SDValue Chain, SDValue Ptr, 3486 const Value *SV, 3487 int SVOffset, MVT EVT, 3488 bool isVolatile, unsigned Alignment) { 3489 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3490 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3491 SV, SVOffset, EVT, isVolatile, Alignment); 3492} 3493 3494SDValue 3495SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3496 SDValue Offset, ISD::MemIndexedMode AM) { 3497 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3498 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3499 "Load is already a indexed load!"); 3500 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3501 LD->getChain(), Base, Offset, LD->getSrcValue(), 3502 LD->getSrcValueOffset(), LD->getMemoryVT(), 3503 LD->isVolatile(), LD->getAlignment()); 3504} 3505 3506SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3507 SDValue Ptr, const Value *SV, int SVOffset, 3508 bool isVolatile, unsigned Alignment) { 3509 MVT VT = Val.getValueType(); 3510 3511 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3512 Alignment = getMVTAlignment(VT); 3513 3514 SDVTList VTs = getVTList(MVT::Other); 3515 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3516 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3517 FoldingSetNodeID ID; 3518 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3519 ID.AddInteger(ISD::UNINDEXED); 3520 ID.AddInteger(false); 3521 ID.AddInteger(VT.getRawBits()); 3522 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3523 void *IP = 0; 3524 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3525 return SDValue(E, 0); 3526 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3527 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3528 VT, SV, SVOffset, Alignment, isVolatile); 3529 CSEMap.InsertNode(N, IP); 3530 AllNodes.push_back(N); 3531 return SDValue(N, 0); 3532} 3533 3534SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3535 SDValue Ptr, const Value *SV, 3536 int SVOffset, MVT SVT, 3537 bool isVolatile, unsigned Alignment) { 3538 MVT VT = Val.getValueType(); 3539 3540 if (VT == SVT) 3541 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3542 3543 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3544 assert(VT.isInteger() == SVT.isInteger() && 3545 "Can't do FP-INT conversion!"); 3546 3547 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3548 Alignment = getMVTAlignment(VT); 3549 3550 SDVTList VTs = getVTList(MVT::Other); 3551 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3552 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3553 FoldingSetNodeID ID; 3554 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3555 ID.AddInteger(ISD::UNINDEXED); 3556 ID.AddInteger(1); 3557 ID.AddInteger(SVT.getRawBits()); 3558 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3559 void *IP = 0; 3560 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3561 return SDValue(E, 0); 3562 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3563 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3564 SVT, SV, SVOffset, Alignment, isVolatile); 3565 CSEMap.InsertNode(N, IP); 3566 AllNodes.push_back(N); 3567 return SDValue(N, 0); 3568} 3569 3570SDValue 3571SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3572 SDValue Offset, ISD::MemIndexedMode AM) { 3573 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3574 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3575 "Store is already a indexed store!"); 3576 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3577 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3578 FoldingSetNodeID ID; 3579 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3580 ID.AddInteger(AM); 3581 ID.AddInteger(ST->isTruncatingStore()); 3582 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3583 ID.AddInteger(ST->getRawFlags()); 3584 void *IP = 0; 3585 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3586 return SDValue(E, 0); 3587 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3588 new (N) StoreSDNode(Ops, VTs, AM, 3589 ST->isTruncatingStore(), ST->getMemoryVT(), 3590 ST->getSrcValue(), ST->getSrcValueOffset(), 3591 ST->getAlignment(), ST->isVolatile()); 3592 CSEMap.InsertNode(N, IP); 3593 AllNodes.push_back(N); 3594 return SDValue(N, 0); 3595} 3596 3597SDValue SelectionDAG::getVAArg(MVT VT, 3598 SDValue Chain, SDValue Ptr, 3599 SDValue SV) { 3600 SDValue Ops[] = { Chain, Ptr, SV }; 3601 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3602} 3603 3604SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3605 const SDUse *Ops, unsigned NumOps) { 3606 switch (NumOps) { 3607 case 0: return getNode(Opcode, VT); 3608 case 1: return getNode(Opcode, VT, Ops[0]); 3609 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3610 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3611 default: break; 3612 } 3613 3614 // Copy from an SDUse array into an SDValue array for use with 3615 // the regular getNode logic. 3616 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3617 return getNode(Opcode, VT, &NewOps[0], NumOps); 3618} 3619 3620SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3621 const SDValue *Ops, unsigned NumOps) { 3622 switch (NumOps) { 3623 case 0: return getNode(Opcode, VT); 3624 case 1: return getNode(Opcode, VT, Ops[0]); 3625 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3626 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3627 default: break; 3628 } 3629 3630 switch (Opcode) { 3631 default: break; 3632 case ISD::SELECT_CC: { 3633 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3634 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3635 "LHS and RHS of condition must have same type!"); 3636 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3637 "True and False arms of SelectCC must have same type!"); 3638 assert(Ops[2].getValueType() == VT && 3639 "select_cc node must be of same type as true and false value!"); 3640 break; 3641 } 3642 case ISD::BR_CC: { 3643 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3644 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3645 "LHS/RHS of comparison should match types!"); 3646 break; 3647 } 3648 } 3649 3650 // Memoize nodes. 3651 SDNode *N; 3652 SDVTList VTs = getVTList(VT); 3653 if (VT != MVT::Flag) { 3654 FoldingSetNodeID ID; 3655 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3656 void *IP = 0; 3657 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3658 return SDValue(E, 0); 3659 N = NodeAllocator.Allocate<SDNode>(); 3660 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3661 CSEMap.InsertNode(N, IP); 3662 } else { 3663 N = NodeAllocator.Allocate<SDNode>(); 3664 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3665 } 3666 AllNodes.push_back(N); 3667#ifndef NDEBUG 3668 VerifyNode(N); 3669#endif 3670 return SDValue(N, 0); 3671} 3672 3673SDValue SelectionDAG::getNode(unsigned Opcode, 3674 const std::vector<MVT> &ResultTys, 3675 const SDValue *Ops, unsigned NumOps) { 3676 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3677 Ops, NumOps); 3678} 3679 3680SDValue SelectionDAG::getNode(unsigned Opcode, 3681 const MVT *VTs, unsigned NumVTs, 3682 const SDValue *Ops, unsigned NumOps) { 3683 if (NumVTs == 1) 3684 return getNode(Opcode, VTs[0], Ops, NumOps); 3685 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3686} 3687 3688SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3689 const SDValue *Ops, unsigned NumOps) { 3690 if (VTList.NumVTs == 1) 3691 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3692 3693 switch (Opcode) { 3694 // FIXME: figure out how to safely handle things like 3695 // int foo(int x) { return 1 << (x & 255); } 3696 // int bar() { return foo(256); } 3697#if 0 3698 case ISD::SRA_PARTS: 3699 case ISD::SRL_PARTS: 3700 case ISD::SHL_PARTS: 3701 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3702 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3703 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3704 else if (N3.getOpcode() == ISD::AND) 3705 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3706 // If the and is only masking out bits that cannot effect the shift, 3707 // eliminate the and. 3708 unsigned NumBits = VT.getSizeInBits()*2; 3709 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3710 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3711 } 3712 break; 3713#endif 3714 } 3715 3716 // Memoize the node unless it returns a flag. 3717 SDNode *N; 3718 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3719 FoldingSetNodeID ID; 3720 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3721 void *IP = 0; 3722 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3723 return SDValue(E, 0); 3724 if (NumOps == 1) { 3725 N = NodeAllocator.Allocate<UnarySDNode>(); 3726 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3727 } else if (NumOps == 2) { 3728 N = NodeAllocator.Allocate<BinarySDNode>(); 3729 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3730 } else if (NumOps == 3) { 3731 N = NodeAllocator.Allocate<TernarySDNode>(); 3732 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3733 } else { 3734 N = NodeAllocator.Allocate<SDNode>(); 3735 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3736 } 3737 CSEMap.InsertNode(N, IP); 3738 } else { 3739 if (NumOps == 1) { 3740 N = NodeAllocator.Allocate<UnarySDNode>(); 3741 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3742 } else if (NumOps == 2) { 3743 N = NodeAllocator.Allocate<BinarySDNode>(); 3744 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3745 } else if (NumOps == 3) { 3746 N = NodeAllocator.Allocate<TernarySDNode>(); 3747 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3748 } else { 3749 N = NodeAllocator.Allocate<SDNode>(); 3750 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3751 } 3752 } 3753 AllNodes.push_back(N); 3754#ifndef NDEBUG 3755 VerifyNode(N); 3756#endif 3757 return SDValue(N, 0); 3758} 3759 3760SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3761 return getNode(Opcode, VTList, 0, 0); 3762} 3763 3764SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3765 SDValue N1) { 3766 SDValue Ops[] = { N1 }; 3767 return getNode(Opcode, VTList, Ops, 1); 3768} 3769 3770SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3771 SDValue N1, SDValue N2) { 3772 SDValue Ops[] = { N1, N2 }; 3773 return getNode(Opcode, VTList, Ops, 2); 3774} 3775 3776SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3777 SDValue N1, SDValue N2, SDValue N3) { 3778 SDValue Ops[] = { N1, N2, N3 }; 3779 return getNode(Opcode, VTList, Ops, 3); 3780} 3781 3782SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3783 SDValue N1, SDValue N2, SDValue N3, 3784 SDValue N4) { 3785 SDValue Ops[] = { N1, N2, N3, N4 }; 3786 return getNode(Opcode, VTList, Ops, 4); 3787} 3788 3789SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3790 SDValue N1, SDValue N2, SDValue N3, 3791 SDValue N4, SDValue N5) { 3792 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3793 return getNode(Opcode, VTList, Ops, 5); 3794} 3795 3796SDVTList SelectionDAG::getVTList(MVT VT) { 3797 return makeVTList(SDNode::getValueTypeList(VT), 1); 3798} 3799 3800SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3801 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3802 E = VTList.rend(); I != E; ++I) 3803 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 3804 return *I; 3805 3806 MVT *Array = Allocator.Allocate<MVT>(2); 3807 Array[0] = VT1; 3808 Array[1] = VT2; 3809 SDVTList Result = makeVTList(Array, 2); 3810 VTList.push_back(Result); 3811 return Result; 3812} 3813 3814SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 3815 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3816 E = VTList.rend(); I != E; ++I) 3817 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3818 I->VTs[2] == VT3) 3819 return *I; 3820 3821 MVT *Array = Allocator.Allocate<MVT>(3); 3822 Array[0] = VT1; 3823 Array[1] = VT2; 3824 Array[2] = VT3; 3825 SDVTList Result = makeVTList(Array, 3); 3826 VTList.push_back(Result); 3827 return Result; 3828} 3829 3830SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) { 3831 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3832 E = VTList.rend(); I != E; ++I) 3833 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3834 I->VTs[2] == VT3 && I->VTs[3] == VT4) 3835 return *I; 3836 3837 MVT *Array = Allocator.Allocate<MVT>(3); 3838 Array[0] = VT1; 3839 Array[1] = VT2; 3840 Array[2] = VT3; 3841 Array[3] = VT4; 3842 SDVTList Result = makeVTList(Array, 4); 3843 VTList.push_back(Result); 3844 return Result; 3845} 3846 3847SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3848 switch (NumVTs) { 3849 case 0: assert(0 && "Cannot have nodes without results!"); 3850 case 1: return getVTList(VTs[0]); 3851 case 2: return getVTList(VTs[0], VTs[1]); 3852 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3853 default: break; 3854 } 3855 3856 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3857 E = VTList.rend(); I != E; ++I) { 3858 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 3859 continue; 3860 3861 bool NoMatch = false; 3862 for (unsigned i = 2; i != NumVTs; ++i) 3863 if (VTs[i] != I->VTs[i]) { 3864 NoMatch = true; 3865 break; 3866 } 3867 if (!NoMatch) 3868 return *I; 3869 } 3870 3871 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 3872 std::copy(VTs, VTs+NumVTs, Array); 3873 SDVTList Result = makeVTList(Array, NumVTs); 3874 VTList.push_back(Result); 3875 return Result; 3876} 3877 3878 3879/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3880/// specified operands. If the resultant node already exists in the DAG, 3881/// this does not modify the specified node, instead it returns the node that 3882/// already exists. If the resultant node does not exist in the DAG, the 3883/// input node is returned. As a degenerate case, if you specify the same 3884/// input operands as the node already has, the input node is returned. 3885SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 3886 SDNode *N = InN.getNode(); 3887 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3888 3889 // Check to see if there is no change. 3890 if (Op == N->getOperand(0)) return InN; 3891 3892 // See if the modified node already exists. 3893 void *InsertPos = 0; 3894 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3895 return SDValue(Existing, InN.getResNo()); 3896 3897 // Nope it doesn't. Remove the node from its current place in the maps. 3898 if (InsertPos) 3899 if (!RemoveNodeFromCSEMaps(N)) 3900 InsertPos = 0; 3901 3902 // Now we update the operands. 3903 N->OperandList[0].getVal()->removeUser(0, N); 3904 N->OperandList[0] = Op; 3905 N->OperandList[0].setUser(N); 3906 Op.getNode()->addUser(0, N); 3907 3908 // If this gets put into a CSE map, add it. 3909 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3910 return InN; 3911} 3912 3913SDValue SelectionDAG:: 3914UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 3915 SDNode *N = InN.getNode(); 3916 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3917 3918 // Check to see if there is no change. 3919 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3920 return InN; // No operands changed, just return the input node. 3921 3922 // See if the modified node already exists. 3923 void *InsertPos = 0; 3924 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3925 return SDValue(Existing, InN.getResNo()); 3926 3927 // Nope it doesn't. Remove the node from its current place in the maps. 3928 if (InsertPos) 3929 if (!RemoveNodeFromCSEMaps(N)) 3930 InsertPos = 0; 3931 3932 // Now we update the operands. 3933 if (N->OperandList[0] != Op1) { 3934 N->OperandList[0].getVal()->removeUser(0, N); 3935 N->OperandList[0] = Op1; 3936 N->OperandList[0].setUser(N); 3937 Op1.getNode()->addUser(0, N); 3938 } 3939 if (N->OperandList[1] != Op2) { 3940 N->OperandList[1].getVal()->removeUser(1, N); 3941 N->OperandList[1] = Op2; 3942 N->OperandList[1].setUser(N); 3943 Op2.getNode()->addUser(1, N); 3944 } 3945 3946 // If this gets put into a CSE map, add it. 3947 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3948 return InN; 3949} 3950 3951SDValue SelectionDAG:: 3952UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 3953 SDValue Ops[] = { Op1, Op2, Op3 }; 3954 return UpdateNodeOperands(N, Ops, 3); 3955} 3956 3957SDValue SelectionDAG:: 3958UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3959 SDValue Op3, SDValue Op4) { 3960 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 3961 return UpdateNodeOperands(N, Ops, 4); 3962} 3963 3964SDValue SelectionDAG:: 3965UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3966 SDValue Op3, SDValue Op4, SDValue Op5) { 3967 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3968 return UpdateNodeOperands(N, Ops, 5); 3969} 3970 3971SDValue SelectionDAG:: 3972UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 3973 SDNode *N = InN.getNode(); 3974 assert(N->getNumOperands() == NumOps && 3975 "Update with wrong number of operands"); 3976 3977 // Check to see if there is no change. 3978 bool AnyChange = false; 3979 for (unsigned i = 0; i != NumOps; ++i) { 3980 if (Ops[i] != N->getOperand(i)) { 3981 AnyChange = true; 3982 break; 3983 } 3984 } 3985 3986 // No operands changed, just return the input node. 3987 if (!AnyChange) return InN; 3988 3989 // See if the modified node already exists. 3990 void *InsertPos = 0; 3991 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3992 return SDValue(Existing, InN.getResNo()); 3993 3994 // Nope it doesn't. Remove the node from its current place in the maps. 3995 if (InsertPos) 3996 if (!RemoveNodeFromCSEMaps(N)) 3997 InsertPos = 0; 3998 3999 // Now we update the operands. 4000 for (unsigned i = 0; i != NumOps; ++i) { 4001 if (N->OperandList[i] != Ops[i]) { 4002 N->OperandList[i].getVal()->removeUser(i, N); 4003 N->OperandList[i] = Ops[i]; 4004 N->OperandList[i].setUser(N); 4005 Ops[i].getNode()->addUser(i, N); 4006 } 4007 } 4008 4009 // If this gets put into a CSE map, add it. 4010 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4011 return InN; 4012} 4013 4014/// DropOperands - Release the operands and set this node to have 4015/// zero operands. 4016void SDNode::DropOperands() { 4017 // Unlike the code in MorphNodeTo that does this, we don't need to 4018 // watch for dead nodes here. 4019 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 4020 I->getVal()->removeUser(std::distance(op_begin(), I), this); 4021 4022 NumOperands = 0; 4023} 4024 4025/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4026/// machine opcode. 4027/// 4028SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4029 MVT VT) { 4030 SDVTList VTs = getVTList(VT); 4031 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4032} 4033 4034SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4035 MVT VT, SDValue Op1) { 4036 SDVTList VTs = getVTList(VT); 4037 SDValue Ops[] = { Op1 }; 4038 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4039} 4040 4041SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4042 MVT VT, SDValue Op1, 4043 SDValue Op2) { 4044 SDVTList VTs = getVTList(VT); 4045 SDValue Ops[] = { Op1, Op2 }; 4046 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4047} 4048 4049SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4050 MVT VT, SDValue Op1, 4051 SDValue Op2, SDValue Op3) { 4052 SDVTList VTs = getVTList(VT); 4053 SDValue Ops[] = { Op1, Op2, Op3 }; 4054 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4055} 4056 4057SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4058 MVT VT, const SDValue *Ops, 4059 unsigned NumOps) { 4060 SDVTList VTs = getVTList(VT); 4061 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4062} 4063 4064SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4065 MVT VT1, MVT VT2, const SDValue *Ops, 4066 unsigned NumOps) { 4067 SDVTList VTs = getVTList(VT1, VT2); 4068 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4069} 4070 4071SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4072 MVT VT1, MVT VT2) { 4073 SDVTList VTs = getVTList(VT1, VT2); 4074 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4075} 4076 4077SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4078 MVT VT1, MVT VT2, MVT VT3, 4079 const SDValue *Ops, unsigned NumOps) { 4080 SDVTList VTs = getVTList(VT1, VT2, VT3); 4081 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4082} 4083 4084SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4085 MVT VT1, MVT VT2, MVT VT3, MVT VT4, 4086 const SDValue *Ops, unsigned NumOps) { 4087 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4088 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4089} 4090 4091SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4092 MVT VT1, MVT VT2, 4093 SDValue Op1) { 4094 SDVTList VTs = getVTList(VT1, VT2); 4095 SDValue Ops[] = { Op1 }; 4096 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4097} 4098 4099SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4100 MVT VT1, MVT VT2, 4101 SDValue Op1, SDValue Op2) { 4102 SDVTList VTs = getVTList(VT1, VT2); 4103 SDValue Ops[] = { Op1, Op2 }; 4104 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4105} 4106 4107SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4108 MVT VT1, MVT VT2, 4109 SDValue Op1, SDValue Op2, 4110 SDValue Op3) { 4111 SDVTList VTs = getVTList(VT1, VT2); 4112 SDValue Ops[] = { Op1, Op2, Op3 }; 4113 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4114} 4115 4116SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4117 MVT VT1, MVT VT2, MVT VT3, 4118 SDValue Op1, SDValue Op2, 4119 SDValue Op3) { 4120 SDVTList VTs = getVTList(VT1, VT2, VT3); 4121 SDValue Ops[] = { Op1, Op2, Op3 }; 4122 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4123} 4124 4125SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4126 SDVTList VTs, const SDValue *Ops, 4127 unsigned NumOps) { 4128 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4129} 4130 4131SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4132 MVT VT) { 4133 SDVTList VTs = getVTList(VT); 4134 return MorphNodeTo(N, Opc, VTs, 0, 0); 4135} 4136 4137SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4138 MVT VT, SDValue Op1) { 4139 SDVTList VTs = getVTList(VT); 4140 SDValue Ops[] = { Op1 }; 4141 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4142} 4143 4144SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4145 MVT VT, SDValue Op1, 4146 SDValue Op2) { 4147 SDVTList VTs = getVTList(VT); 4148 SDValue Ops[] = { Op1, Op2 }; 4149 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4150} 4151 4152SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4153 MVT VT, SDValue Op1, 4154 SDValue Op2, SDValue Op3) { 4155 SDVTList VTs = getVTList(VT); 4156 SDValue Ops[] = { Op1, Op2, Op3 }; 4157 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4158} 4159 4160SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4161 MVT VT, const SDValue *Ops, 4162 unsigned NumOps) { 4163 SDVTList VTs = getVTList(VT); 4164 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4165} 4166 4167SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4168 MVT VT1, MVT VT2, const SDValue *Ops, 4169 unsigned NumOps) { 4170 SDVTList VTs = getVTList(VT1, VT2); 4171 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4172} 4173 4174SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4175 MVT VT1, MVT VT2) { 4176 SDVTList VTs = getVTList(VT1, VT2); 4177 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4178} 4179 4180SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4181 MVT VT1, MVT VT2, MVT VT3, 4182 const SDValue *Ops, unsigned NumOps) { 4183 SDVTList VTs = getVTList(VT1, VT2, VT3); 4184 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4185} 4186 4187SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4188 MVT VT1, MVT VT2, 4189 SDValue Op1) { 4190 SDVTList VTs = getVTList(VT1, VT2); 4191 SDValue Ops[] = { Op1 }; 4192 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4193} 4194 4195SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4196 MVT VT1, MVT VT2, 4197 SDValue Op1, SDValue Op2) { 4198 SDVTList VTs = getVTList(VT1, VT2); 4199 SDValue Ops[] = { Op1, Op2 }; 4200 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4201} 4202 4203SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4204 MVT VT1, MVT VT2, 4205 SDValue Op1, SDValue Op2, 4206 SDValue Op3) { 4207 SDVTList VTs = getVTList(VT1, VT2); 4208 SDValue Ops[] = { Op1, Op2, Op3 }; 4209 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4210} 4211 4212/// MorphNodeTo - These *mutate* the specified node to have the specified 4213/// return type, opcode, and operands. 4214/// 4215/// Note that MorphNodeTo returns the resultant node. If there is already a 4216/// node of the specified opcode and operands, it returns that node instead of 4217/// the current one. 4218/// 4219/// Using MorphNodeTo is faster than creating a new node and swapping it in 4220/// with ReplaceAllUsesWith both because it often avoids allocating a new 4221/// node, and because it doesn't require CSE recalculation for any of 4222/// the node's users. 4223/// 4224SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4225 SDVTList VTs, const SDValue *Ops, 4226 unsigned NumOps) { 4227 // If an identical node already exists, use it. 4228 void *IP = 0; 4229 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4230 FoldingSetNodeID ID; 4231 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4232 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4233 return ON; 4234 } 4235 4236 if (!RemoveNodeFromCSEMaps(N)) 4237 IP = 0; 4238 4239 // Start the morphing. 4240 N->NodeType = Opc; 4241 N->ValueList = VTs.VTs; 4242 N->NumValues = VTs.NumVTs; 4243 4244 // Clear the operands list, updating used nodes to remove this from their 4245 // use list. Keep track of any operands that become dead as a result. 4246 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4247 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end(); 4248 I != E; ++I) { 4249 SDNode *Used = I->getVal(); 4250 Used->removeUser(std::distance(B, I), N); 4251 if (Used->use_empty()) 4252 DeadNodeSet.insert(Used); 4253 } 4254 4255 // If NumOps is larger than the # of operands we currently have, reallocate 4256 // the operand list. 4257 if (NumOps > N->NumOperands) { 4258 if (N->OperandsNeedDelete) 4259 delete[] N->OperandList; 4260 4261 if (N->isMachineOpcode()) { 4262 // We're creating a final node that will live unmorphed for the 4263 // remainder of the current SelectionDAG iteration, so we can allocate 4264 // the operands directly out of a pool with no recycling metadata. 4265 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4266 N->OperandsNeedDelete = false; 4267 } else { 4268 N->OperandList = new SDUse[NumOps]; 4269 N->OperandsNeedDelete = true; 4270 } 4271 } 4272 4273 // Assign the new operands. 4274 N->NumOperands = NumOps; 4275 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4276 N->OperandList[i] = Ops[i]; 4277 N->OperandList[i].setUser(N); 4278 SDNode *ToUse = N->OperandList[i].getVal(); 4279 ToUse->addUser(i, N); 4280 } 4281 4282 // Delete any nodes that are still dead after adding the uses for the 4283 // new operands. 4284 SmallVector<SDNode *, 16> DeadNodes; 4285 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4286 E = DeadNodeSet.end(); I != E; ++I) 4287 if ((*I)->use_empty()) 4288 DeadNodes.push_back(*I); 4289 RemoveDeadNodes(DeadNodes); 4290 4291 if (IP) 4292 CSEMap.InsertNode(N, IP); // Memoize the new node. 4293 return N; 4294} 4295 4296 4297/// getTargetNode - These are used for target selectors to create a new node 4298/// with specified return type(s), target opcode, and operands. 4299/// 4300/// Note that getTargetNode returns the resultant node. If there is already a 4301/// node of the specified opcode and operands, it returns that node instead of 4302/// the current one. 4303SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4304 return getNode(~Opcode, VT).getNode(); 4305} 4306SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4307 return getNode(~Opcode, VT, Op1).getNode(); 4308} 4309SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4310 SDValue Op1, SDValue Op2) { 4311 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4312} 4313SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4314 SDValue Op1, SDValue Op2, 4315 SDValue Op3) { 4316 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4317} 4318SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4319 const SDValue *Ops, unsigned NumOps) { 4320 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4321} 4322SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4323 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4324 SDValue Op; 4325 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4326} 4327SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4328 MVT VT2, SDValue Op1) { 4329 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4330 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4331} 4332SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4333 MVT VT2, SDValue Op1, 4334 SDValue Op2) { 4335 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4336 SDValue Ops[] = { Op1, Op2 }; 4337 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4338} 4339SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4340 MVT VT2, SDValue Op1, 4341 SDValue Op2, SDValue Op3) { 4342 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4343 SDValue Ops[] = { Op1, Op2, Op3 }; 4344 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4345} 4346SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4347 const SDValue *Ops, unsigned NumOps) { 4348 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4349 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4350} 4351SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4352 SDValue Op1, SDValue Op2) { 4353 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4354 SDValue Ops[] = { Op1, Op2 }; 4355 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4356} 4357SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4358 SDValue Op1, SDValue Op2, 4359 SDValue Op3) { 4360 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4361 SDValue Ops[] = { Op1, Op2, Op3 }; 4362 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4363} 4364SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4365 const SDValue *Ops, unsigned NumOps) { 4366 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4367 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4368} 4369SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4370 MVT VT2, MVT VT3, MVT VT4, 4371 const SDValue *Ops, unsigned NumOps) { 4372 std::vector<MVT> VTList; 4373 VTList.push_back(VT1); 4374 VTList.push_back(VT2); 4375 VTList.push_back(VT3); 4376 VTList.push_back(VT4); 4377 const MVT *VTs = getNodeValueTypes(VTList); 4378 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4379} 4380SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4381 const std::vector<MVT> &ResultTys, 4382 const SDValue *Ops, unsigned NumOps) { 4383 const MVT *VTs = getNodeValueTypes(ResultTys); 4384 return getNode(~Opcode, VTs, ResultTys.size(), 4385 Ops, NumOps).getNode(); 4386} 4387 4388/// getNodeIfExists - Get the specified node if it's already available, or 4389/// else return NULL. 4390SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4391 const SDValue *Ops, unsigned NumOps) { 4392 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4393 FoldingSetNodeID ID; 4394 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4395 void *IP = 0; 4396 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4397 return E; 4398 } 4399 return NULL; 4400} 4401 4402 4403/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4404/// This can cause recursive merging of nodes in the DAG. 4405/// 4406/// This version assumes From has a single result value. 4407/// 4408void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4409 DAGUpdateListener *UpdateListener) { 4410 SDNode *From = FromN.getNode(); 4411 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4412 "Cannot replace with this method!"); 4413 assert(From != To.getNode() && "Cannot replace uses of with self"); 4414 4415 // Iterate over all the existing uses of From. This specifically avoids 4416 // visiting any new uses of From that arise while the replacement is 4417 // happening, because any such uses would be the result of CSE: If an 4418 // existing node looks like From after one of its operands is replaced 4419 // by To, we don't want to replace of all its users with To too. 4420 // See PR3018 for more info. 4421 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4422 while (UI != UE) { 4423 SDNode *U = *UI; 4424 do ++UI; while (UI != UE && *UI == U); 4425 4426 // This node is about to morph, remove its old self from the CSE maps. 4427 RemoveNodeFromCSEMaps(U); 4428 int operandNum = 0; 4429 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4430 I != E; ++I, ++operandNum) 4431 if (I->getVal() == From) { 4432 From->removeUser(operandNum, U); 4433 *I = To; 4434 I->setUser(U); 4435 To.getNode()->addUser(operandNum, U); 4436 } 4437 4438 // Now that we have modified U, add it back to the CSE maps. If it already 4439 // exists there, recursively merge the results together. 4440 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4441 ReplaceAllUsesWith(U, Existing, UpdateListener); 4442 // U is now dead. Inform the listener if it exists and delete it. 4443 if (UpdateListener) 4444 UpdateListener->NodeDeleted(U, Existing); 4445 DeleteNodeNotInCSEMaps(U); 4446 } else { 4447 // If the node doesn't already exist, we updated it. Inform a listener if 4448 // it exists. 4449 if (UpdateListener) 4450 UpdateListener->NodeUpdated(U); 4451 } 4452 } 4453} 4454 4455/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4456/// This can cause recursive merging of nodes in the DAG. 4457/// 4458/// This version assumes From/To have matching types and numbers of result 4459/// values. 4460/// 4461void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4462 DAGUpdateListener *UpdateListener) { 4463 assert(From->getVTList().VTs == To->getVTList().VTs && 4464 From->getNumValues() == To->getNumValues() && 4465 "Cannot use this version of ReplaceAllUsesWith!"); 4466 4467 // Handle the trivial case. 4468 if (From == To) 4469 return; 4470 4471 // Iterate over just the existing users of From. See the comments in 4472 // the ReplaceAllUsesWith above. 4473 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4474 while (UI != UE) { 4475 SDNode *U = *UI; 4476 do ++UI; while (UI != UE && *UI == U); 4477 4478 // This node is about to morph, remove its old self from the CSE maps. 4479 RemoveNodeFromCSEMaps(U); 4480 int operandNum = 0; 4481 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4482 I != E; ++I, ++operandNum) 4483 if (I->getVal() == From) { 4484 From->removeUser(operandNum, U); 4485 I->getSDValue().setNode(To); 4486 To->addUser(operandNum, U); 4487 } 4488 4489 // Now that we have modified U, add it back to the CSE maps. If it already 4490 // exists there, recursively merge the results together. 4491 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4492 ReplaceAllUsesWith(U, Existing, UpdateListener); 4493 // U is now dead. Inform the listener if it exists and delete it. 4494 if (UpdateListener) 4495 UpdateListener->NodeDeleted(U, Existing); 4496 DeleteNodeNotInCSEMaps(U); 4497 } else { 4498 // If the node doesn't already exist, we updated it. Inform a listener if 4499 // it exists. 4500 if (UpdateListener) 4501 UpdateListener->NodeUpdated(U); 4502 } 4503 } 4504} 4505 4506/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4507/// This can cause recursive merging of nodes in the DAG. 4508/// 4509/// This version can replace From with any result values. To must match the 4510/// number and types of values returned by From. 4511void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4512 const SDValue *To, 4513 DAGUpdateListener *UpdateListener) { 4514 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4515 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4516 4517 // Iterate over just the existing users of From. See the comments in 4518 // the ReplaceAllUsesWith above. 4519 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4520 while (UI != UE) { 4521 SDNode *U = *UI; 4522 do ++UI; while (UI != UE && *UI == U); 4523 4524 // This node is about to morph, remove its old self from the CSE maps. 4525 RemoveNodeFromCSEMaps(U); 4526 int operandNum = 0; 4527 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4528 I != E; ++I, ++operandNum) 4529 if (I->getVal() == From) { 4530 const SDValue &ToOp = To[I->getSDValue().getResNo()]; 4531 From->removeUser(operandNum, U); 4532 *I = ToOp; 4533 I->setUser(U); 4534 ToOp.getNode()->addUser(operandNum, U); 4535 } 4536 4537 // Now that we have modified U, add it back to the CSE maps. If it already 4538 // exists there, recursively merge the results together. 4539 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4540 ReplaceAllUsesWith(U, Existing, UpdateListener); 4541 // U is now dead. Inform the listener if it exists and delete it. 4542 if (UpdateListener) 4543 UpdateListener->NodeDeleted(U, Existing); 4544 DeleteNodeNotInCSEMaps(U); 4545 } else { 4546 // If the node doesn't already exist, we updated it. Inform a listener if 4547 // it exists. 4548 if (UpdateListener) 4549 UpdateListener->NodeUpdated(U); 4550 } 4551 } 4552} 4553 4554/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4555/// uses of other values produced by From.getVal() alone. The Deleted vector is 4556/// handled the same way as for ReplaceAllUsesWith. 4557void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4558 DAGUpdateListener *UpdateListener){ 4559 // Handle the really simple, really trivial case efficiently. 4560 if (From == To) return; 4561 4562 // Handle the simple, trivial, case efficiently. 4563 if (From.getNode()->getNumValues() == 1) { 4564 ReplaceAllUsesWith(From, To, UpdateListener); 4565 return; 4566 } 4567 4568 // Get all of the users of From.getNode(). We want these in a nice, 4569 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4570 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end()); 4571 4572 while (!Users.empty()) { 4573 // We know that this user uses some value of From. If it is the right 4574 // value, update it. 4575 SDNode *User = Users.back(); 4576 Users.pop_back(); 4577 4578 // Scan for an operand that matches From. 4579 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4580 for (; Op != E; ++Op) 4581 if (*Op == From) break; 4582 4583 // If there are no matches, the user must use some other result of From. 4584 if (Op == E) continue; 4585 4586 // Okay, we know this user needs to be updated. Remove its old self 4587 // from the CSE maps. 4588 RemoveNodeFromCSEMaps(User); 4589 4590 // Update all operands that match "From" in case there are multiple uses. 4591 for (; Op != E; ++Op) { 4592 if (*Op == From) { 4593 From.getNode()->removeUser(Op-User->op_begin(), User); 4594 *Op = To; 4595 Op->setUser(User); 4596 To.getNode()->addUser(Op-User->op_begin(), User); 4597 } 4598 } 4599 4600 // Now that we have modified User, add it back to the CSE maps. If it 4601 // already exists there, recursively merge the results together. 4602 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4603 if (!Existing) { 4604 if (UpdateListener) UpdateListener->NodeUpdated(User); 4605 continue; // Continue on to next user. 4606 } 4607 4608 // If there was already an existing matching node, use ReplaceAllUsesWith 4609 // to replace the dead one with the existing one. This can cause 4610 // recursive merging of other unrelated nodes down the line. 4611 ReplaceAllUsesWith(User, Existing, UpdateListener); 4612 4613 // User is now dead. Notify a listener if present. 4614 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4615 DeleteNodeNotInCSEMaps(User); 4616 } 4617} 4618 4619/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4620/// uses of other values produced by From.getVal() alone. The same value may 4621/// appear in both the From and To list. The Deleted vector is 4622/// handled the same way as for ReplaceAllUsesWith. 4623void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4624 const SDValue *To, 4625 unsigned Num, 4626 DAGUpdateListener *UpdateListener){ 4627 // Handle the simple, trivial case efficiently. 4628 if (Num == 1) 4629 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4630 4631 SmallVector<std::pair<SDNode *, unsigned>, 16> Users; 4632 for (unsigned i = 0; i != Num; ++i) 4633 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(), 4634 E = From[i].getNode()->use_end(); UI != E; ++UI) 4635 Users.push_back(std::make_pair(*UI, i)); 4636 4637 while (!Users.empty()) { 4638 // We know that this user uses some value of From. If it is the right 4639 // value, update it. 4640 SDNode *User = Users.back().first; 4641 unsigned i = Users.back().second; 4642 Users.pop_back(); 4643 4644 // Scan for an operand that matches From. 4645 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4646 for (; Op != E; ++Op) 4647 if (*Op == From[i]) break; 4648 4649 // If there are no matches, the user must use some other result of From. 4650 if (Op == E) continue; 4651 4652 // Okay, we know this user needs to be updated. Remove its old self 4653 // from the CSE maps. 4654 RemoveNodeFromCSEMaps(User); 4655 4656 // Update all operands that match "From" in case there are multiple uses. 4657 for (; Op != E; ++Op) { 4658 if (*Op == From[i]) { 4659 From[i].getNode()->removeUser(Op-User->op_begin(), User); 4660 *Op = To[i]; 4661 Op->setUser(User); 4662 To[i].getNode()->addUser(Op-User->op_begin(), User); 4663 } 4664 } 4665 4666 // Now that we have modified User, add it back to the CSE maps. If it 4667 // already exists there, recursively merge the results together. 4668 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4669 if (!Existing) { 4670 if (UpdateListener) UpdateListener->NodeUpdated(User); 4671 continue; // Continue on to next user. 4672 } 4673 4674 // If there was already an existing matching node, use ReplaceAllUsesWith 4675 // to replace the dead one with the existing one. This can cause 4676 // recursive merging of other unrelated nodes down the line. 4677 ReplaceAllUsesWith(User, Existing, UpdateListener); 4678 4679 // User is now dead. Notify a listener if present. 4680 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4681 DeleteNodeNotInCSEMaps(User); 4682 } 4683} 4684 4685/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4686/// based on their topological order. It returns the maximum id and a vector 4687/// of the SDNodes* in assigned order by reference. 4688unsigned SelectionDAG::AssignTopologicalOrder() { 4689 4690 unsigned DAGSize = 0; 4691 4692 // SortedPos tracks the progress of the algorithm. Nodes before it are 4693 // sorted, nodes after it are unsorted. When the algorithm completes 4694 // it is at the end of the list. 4695 allnodes_iterator SortedPos = allnodes_begin(); 4696 4697 // Visit all the nodes. Move nodes with no operands to the front of 4698 // the list immediately. Annotate nodes that do have operands with their 4699 // operand count. Before we do this, the Node Id fields of the nodes 4700 // may contain arbitrary values. After, the Node Id fields for nodes 4701 // before SortedPos will contain the topological sort index, and the 4702 // Node Id fields for nodes At SortedPos and after will contain the 4703 // count of outstanding operands. 4704 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 4705 SDNode *N = I++; 4706 unsigned Degree = N->getNumOperands(); 4707 if (Degree == 0) { 4708 // A node with no uses, add it to the result array immediately. 4709 N->setNodeId(DAGSize++); 4710 allnodes_iterator Q = N; 4711 if (Q != SortedPos) 4712 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 4713 ++SortedPos; 4714 } else { 4715 // Temporarily use the Node Id as scratch space for the degree count. 4716 N->setNodeId(Degree); 4717 } 4718 } 4719 4720 // Visit all the nodes. As we iterate, moves nodes into sorted order, 4721 // such that by the time the end is reached all nodes will be sorted. 4722 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 4723 SDNode *N = I; 4724 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 4725 UI != UE; ++UI) { 4726 SDNode *P = *UI; 4727 unsigned Degree = P->getNodeId(); 4728 --Degree; 4729 if (Degree == 0) { 4730 // All of P's operands are sorted, so P may sorted now. 4731 P->setNodeId(DAGSize++); 4732 if (P != SortedPos) 4733 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 4734 ++SortedPos; 4735 } else { 4736 // Update P's outstanding operand count. 4737 P->setNodeId(Degree); 4738 } 4739 } 4740 } 4741 4742 assert(SortedPos == AllNodes.end() && 4743 "Topological sort incomplete!"); 4744 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 4745 "First node in topological sort is not the entry token!"); 4746 assert(AllNodes.front().getNodeId() == 0 && 4747 "First node in topological sort has non-zero id!"); 4748 assert(AllNodes.front().getNumOperands() == 0 && 4749 "First node in topological sort has operands!"); 4750 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 4751 "Last node in topologic sort has unexpected id!"); 4752 assert(AllNodes.back().use_empty() && 4753 "Last node in topologic sort has users!"); 4754 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 4755 return DAGSize; 4756} 4757 4758 4759 4760//===----------------------------------------------------------------------===// 4761// SDNode Class 4762//===----------------------------------------------------------------------===// 4763 4764HandleSDNode::~HandleSDNode() { 4765 DropOperands(); 4766} 4767 4768GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4769 MVT VT, int64_t o) 4770 : SDNode(isa<GlobalVariable>(GA) && 4771 cast<GlobalVariable>(GA)->isThreadLocal() ? 4772 // Thread Local 4773 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4774 // Non Thread Local 4775 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4776 getSDVTList(VT)), Offset(o) { 4777 TheGlobal = const_cast<GlobalValue*>(GA); 4778} 4779 4780MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 4781 const Value *srcValue, int SVO, 4782 unsigned alignment, bool vol) 4783 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4784 Flags(encodeMemSDNodeFlags(vol, alignment)) { 4785 4786 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4787 assert(getAlignment() == alignment && "Alignment representation error!"); 4788 assert(isVolatile() == vol && "Volatile representation error!"); 4789} 4790 4791MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops, 4792 unsigned NumOps, MVT memvt, const Value *srcValue, 4793 int SVO, unsigned alignment, bool vol) 4794 : SDNode(Opc, VTs, Ops, NumOps), 4795 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4796 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 4797 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4798 assert(getAlignment() == alignment && "Alignment representation error!"); 4799 assert(isVolatile() == vol && "Volatile representation error!"); 4800} 4801 4802/// getMemOperand - Return a MachineMemOperand object describing the memory 4803/// reference performed by this memory reference. 4804MachineMemOperand MemSDNode::getMemOperand() const { 4805 int Flags = 0; 4806 if (isa<LoadSDNode>(this)) 4807 Flags = MachineMemOperand::MOLoad; 4808 else if (isa<StoreSDNode>(this)) 4809 Flags = MachineMemOperand::MOStore; 4810 else if (isa<AtomicSDNode>(this)) { 4811 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4812 } 4813 else { 4814 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 4815 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 4816 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 4817 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 4818 } 4819 4820 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4821 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4822 4823 // Check if the memory reference references a frame index 4824 const FrameIndexSDNode *FI = 4825 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 4826 if (!getSrcValue() && FI) 4827 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4828 Flags, 0, Size, getAlignment()); 4829 else 4830 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4831 Size, getAlignment()); 4832} 4833 4834/// Profile - Gather unique data for the node. 4835/// 4836void SDNode::Profile(FoldingSetNodeID &ID) const { 4837 AddNodeIDNode(ID, this); 4838} 4839 4840/// getValueTypeList - Return a pointer to the specified value type. 4841/// 4842const MVT *SDNode::getValueTypeList(MVT VT) { 4843 if (VT.isExtended()) { 4844 static std::set<MVT, MVT::compareRawBits> EVTs; 4845 return &(*EVTs.insert(VT).first); 4846 } else { 4847 static MVT VTs[MVT::LAST_VALUETYPE]; 4848 VTs[VT.getSimpleVT()] = VT; 4849 return &VTs[VT.getSimpleVT()]; 4850 } 4851} 4852 4853/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4854/// indicated value. This method ignores uses of other values defined by this 4855/// operation. 4856bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4857 assert(Value < getNumValues() && "Bad value!"); 4858 4859 // TODO: Only iterate over uses of a given value of the node 4860 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4861 if (UI.getUse().getSDValue().getResNo() == Value) { 4862 if (NUses == 0) 4863 return false; 4864 --NUses; 4865 } 4866 } 4867 4868 // Found exactly the right number of uses? 4869 return NUses == 0; 4870} 4871 4872 4873/// hasAnyUseOfValue - Return true if there are any use of the indicated 4874/// value. This method ignores uses of other values defined by this operation. 4875bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4876 assert(Value < getNumValues() && "Bad value!"); 4877 4878 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 4879 if (UI.getUse().getSDValue().getResNo() == Value) 4880 return true; 4881 4882 return false; 4883} 4884 4885 4886/// isOnlyUserOf - Return true if this node is the only use of N. 4887/// 4888bool SDNode::isOnlyUserOf(SDNode *N) const { 4889 bool Seen = false; 4890 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4891 SDNode *User = *I; 4892 if (User == this) 4893 Seen = true; 4894 else 4895 return false; 4896 } 4897 4898 return Seen; 4899} 4900 4901/// isOperand - Return true if this node is an operand of N. 4902/// 4903bool SDValue::isOperandOf(SDNode *N) const { 4904 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4905 if (*this == N->getOperand(i)) 4906 return true; 4907 return false; 4908} 4909 4910bool SDNode::isOperandOf(SDNode *N) const { 4911 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4912 if (this == N->OperandList[i].getVal()) 4913 return true; 4914 return false; 4915} 4916 4917/// reachesChainWithoutSideEffects - Return true if this operand (which must 4918/// be a chain) reaches the specified operand without crossing any 4919/// side-effecting instructions. In practice, this looks through token 4920/// factors and non-volatile loads. In order to remain efficient, this only 4921/// looks a couple of nodes in, it does not do an exhaustive search. 4922bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 4923 unsigned Depth) const { 4924 if (*this == Dest) return true; 4925 4926 // Don't search too deeply, we just want to be able to see through 4927 // TokenFactor's etc. 4928 if (Depth == 0) return false; 4929 4930 // If this is a token factor, all inputs to the TF happen in parallel. If any 4931 // of the operands of the TF reach dest, then we can do the xform. 4932 if (getOpcode() == ISD::TokenFactor) { 4933 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4934 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4935 return true; 4936 return false; 4937 } 4938 4939 // Loads don't have side effects, look through them. 4940 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4941 if (!Ld->isVolatile()) 4942 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4943 } 4944 return false; 4945} 4946 4947 4948static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4949 SmallPtrSet<SDNode *, 32> &Visited) { 4950 if (found || !Visited.insert(N)) 4951 return; 4952 4953 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4954 SDNode *Op = N->getOperand(i).getNode(); 4955 if (Op == P) { 4956 found = true; 4957 return; 4958 } 4959 findPredecessor(Op, P, found, Visited); 4960 } 4961} 4962 4963/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4964/// is either an operand of N or it can be reached by recursively traversing 4965/// up the operands. 4966/// NOTE: this is an expensive method. Use it carefully. 4967bool SDNode::isPredecessorOf(SDNode *N) const { 4968 SmallPtrSet<SDNode *, 32> Visited; 4969 bool found = false; 4970 findPredecessor(N, this, found, Visited); 4971 return found; 4972} 4973 4974uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4975 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4976 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 4977} 4978 4979std::string SDNode::getOperationName(const SelectionDAG *G) const { 4980 switch (getOpcode()) { 4981 default: 4982 if (getOpcode() < ISD::BUILTIN_OP_END) 4983 return "<<Unknown DAG Node>>"; 4984 if (isMachineOpcode()) { 4985 if (G) 4986 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4987 if (getMachineOpcode() < TII->getNumOpcodes()) 4988 return TII->get(getMachineOpcode()).getName(); 4989 return "<<Unknown Machine Node>>"; 4990 } 4991 if (G) { 4992 const TargetLowering &TLI = G->getTargetLoweringInfo(); 4993 const char *Name = TLI.getTargetNodeName(getOpcode()); 4994 if (Name) return Name; 4995 return "<<Unknown Target Node>>"; 4996 } 4997 return "<<Unknown Node>>"; 4998 4999#ifndef NDEBUG 5000 case ISD::DELETED_NODE: 5001 return "<<Deleted Node!>>"; 5002#endif 5003 case ISD::PREFETCH: return "Prefetch"; 5004 case ISD::MEMBARRIER: return "MemBarrier"; 5005 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5006 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5007 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5008 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5009 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5010 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5011 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5012 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5013 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5014 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5015 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5016 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5017 case ISD::PCMARKER: return "PCMarker"; 5018 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5019 case ISD::SRCVALUE: return "SrcValue"; 5020 case ISD::MEMOPERAND: return "MemOperand"; 5021 case ISD::EntryToken: return "EntryToken"; 5022 case ISD::TokenFactor: return "TokenFactor"; 5023 case ISD::AssertSext: return "AssertSext"; 5024 case ISD::AssertZext: return "AssertZext"; 5025 5026 case ISD::BasicBlock: return "BasicBlock"; 5027 case ISD::ARG_FLAGS: return "ArgFlags"; 5028 case ISD::VALUETYPE: return "ValueType"; 5029 case ISD::Register: return "Register"; 5030 5031 case ISD::Constant: return "Constant"; 5032 case ISD::ConstantFP: return "ConstantFP"; 5033 case ISD::GlobalAddress: return "GlobalAddress"; 5034 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5035 case ISD::FrameIndex: return "FrameIndex"; 5036 case ISD::JumpTable: return "JumpTable"; 5037 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5038 case ISD::RETURNADDR: return "RETURNADDR"; 5039 case ISD::FRAMEADDR: return "FRAMEADDR"; 5040 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5041 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5042 case ISD::EHSELECTION: return "EHSELECTION"; 5043 case ISD::EH_RETURN: return "EH_RETURN"; 5044 case ISD::ConstantPool: return "ConstantPool"; 5045 case ISD::ExternalSymbol: return "ExternalSymbol"; 5046 case ISD::INTRINSIC_WO_CHAIN: { 5047 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5048 return Intrinsic::getName((Intrinsic::ID)IID); 5049 } 5050 case ISD::INTRINSIC_VOID: 5051 case ISD::INTRINSIC_W_CHAIN: { 5052 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5053 return Intrinsic::getName((Intrinsic::ID)IID); 5054 } 5055 5056 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5057 case ISD::TargetConstant: return "TargetConstant"; 5058 case ISD::TargetConstantFP:return "TargetConstantFP"; 5059 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5060 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5061 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5062 case ISD::TargetJumpTable: return "TargetJumpTable"; 5063 case ISD::TargetConstantPool: return "TargetConstantPool"; 5064 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5065 5066 case ISD::CopyToReg: return "CopyToReg"; 5067 case ISD::CopyFromReg: return "CopyFromReg"; 5068 case ISD::UNDEF: return "undef"; 5069 case ISD::MERGE_VALUES: return "merge_values"; 5070 case ISD::INLINEASM: return "inlineasm"; 5071 case ISD::DBG_LABEL: return "dbg_label"; 5072 case ISD::EH_LABEL: return "eh_label"; 5073 case ISD::DECLARE: return "declare"; 5074 case ISD::HANDLENODE: return "handlenode"; 5075 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 5076 case ISD::CALL: return "call"; 5077 5078 // Unary operators 5079 case ISD::FABS: return "fabs"; 5080 case ISD::FNEG: return "fneg"; 5081 case ISD::FSQRT: return "fsqrt"; 5082 case ISD::FSIN: return "fsin"; 5083 case ISD::FCOS: return "fcos"; 5084 case ISD::FPOWI: return "fpowi"; 5085 case ISD::FPOW: return "fpow"; 5086 case ISD::FTRUNC: return "ftrunc"; 5087 case ISD::FFLOOR: return "ffloor"; 5088 case ISD::FCEIL: return "fceil"; 5089 case ISD::FRINT: return "frint"; 5090 case ISD::FNEARBYINT: return "fnearbyint"; 5091 5092 // Binary operators 5093 case ISD::ADD: return "add"; 5094 case ISD::SUB: return "sub"; 5095 case ISD::MUL: return "mul"; 5096 case ISD::MULHU: return "mulhu"; 5097 case ISD::MULHS: return "mulhs"; 5098 case ISD::SDIV: return "sdiv"; 5099 case ISD::UDIV: return "udiv"; 5100 case ISD::SREM: return "srem"; 5101 case ISD::UREM: return "urem"; 5102 case ISD::SMUL_LOHI: return "smul_lohi"; 5103 case ISD::UMUL_LOHI: return "umul_lohi"; 5104 case ISD::SDIVREM: return "sdivrem"; 5105 case ISD::UDIVREM: return "udivrem"; 5106 case ISD::AND: return "and"; 5107 case ISD::OR: return "or"; 5108 case ISD::XOR: return "xor"; 5109 case ISD::SHL: return "shl"; 5110 case ISD::SRA: return "sra"; 5111 case ISD::SRL: return "srl"; 5112 case ISD::ROTL: return "rotl"; 5113 case ISD::ROTR: return "rotr"; 5114 case ISD::FADD: return "fadd"; 5115 case ISD::FSUB: return "fsub"; 5116 case ISD::FMUL: return "fmul"; 5117 case ISD::FDIV: return "fdiv"; 5118 case ISD::FREM: return "frem"; 5119 case ISD::FCOPYSIGN: return "fcopysign"; 5120 case ISD::FGETSIGN: return "fgetsign"; 5121 5122 case ISD::SETCC: return "setcc"; 5123 case ISD::VSETCC: return "vsetcc"; 5124 case ISD::SELECT: return "select"; 5125 case ISD::SELECT_CC: return "select_cc"; 5126 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5127 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5128 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5129 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5130 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5131 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5132 case ISD::CARRY_FALSE: return "carry_false"; 5133 case ISD::ADDC: return "addc"; 5134 case ISD::ADDE: return "adde"; 5135 case ISD::SADDO: return "saddo"; 5136 case ISD::UADDO: return "uaddo"; 5137 case ISD::SSUBO: return "ssubo"; 5138 case ISD::USUBO: return "usubo"; 5139 case ISD::SMULO: return "smulo"; 5140 case ISD::UMULO: return "umulo"; 5141 case ISD::SUBC: return "subc"; 5142 case ISD::SUBE: return "sube"; 5143 case ISD::SHL_PARTS: return "shl_parts"; 5144 case ISD::SRA_PARTS: return "sra_parts"; 5145 case ISD::SRL_PARTS: return "srl_parts"; 5146 5147 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5148 case ISD::INSERT_SUBREG: return "insert_subreg"; 5149 5150 // Conversion operators. 5151 case ISD::SIGN_EXTEND: return "sign_extend"; 5152 case ISD::ZERO_EXTEND: return "zero_extend"; 5153 case ISD::ANY_EXTEND: return "any_extend"; 5154 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5155 case ISD::TRUNCATE: return "truncate"; 5156 case ISD::FP_ROUND: return "fp_round"; 5157 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5158 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5159 case ISD::FP_EXTEND: return "fp_extend"; 5160 5161 case ISD::SINT_TO_FP: return "sint_to_fp"; 5162 case ISD::UINT_TO_FP: return "uint_to_fp"; 5163 case ISD::FP_TO_SINT: return "fp_to_sint"; 5164 case ISD::FP_TO_UINT: return "fp_to_uint"; 5165 case ISD::BIT_CONVERT: return "bit_convert"; 5166 5167 case ISD::CONVERT_RNDSAT: { 5168 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5169 default: assert(0 && "Unknown cvt code!"); 5170 case ISD::CVT_FF: return "cvt_ff"; 5171 case ISD::CVT_FS: return "cvt_fs"; 5172 case ISD::CVT_FU: return "cvt_fu"; 5173 case ISD::CVT_SF: return "cvt_sf"; 5174 case ISD::CVT_UF: return "cvt_uf"; 5175 case ISD::CVT_SS: return "cvt_ss"; 5176 case ISD::CVT_SU: return "cvt_su"; 5177 case ISD::CVT_US: return "cvt_us"; 5178 case ISD::CVT_UU: return "cvt_uu"; 5179 } 5180 } 5181 5182 // Control flow instructions 5183 case ISD::BR: return "br"; 5184 case ISD::BRIND: return "brind"; 5185 case ISD::BR_JT: return "br_jt"; 5186 case ISD::BRCOND: return "brcond"; 5187 case ISD::BR_CC: return "br_cc"; 5188 case ISD::RET: return "ret"; 5189 case ISD::CALLSEQ_START: return "callseq_start"; 5190 case ISD::CALLSEQ_END: return "callseq_end"; 5191 5192 // Other operators 5193 case ISD::LOAD: return "load"; 5194 case ISD::STORE: return "store"; 5195 case ISD::VAARG: return "vaarg"; 5196 case ISD::VACOPY: return "vacopy"; 5197 case ISD::VAEND: return "vaend"; 5198 case ISD::VASTART: return "vastart"; 5199 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5200 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5201 case ISD::BUILD_PAIR: return "build_pair"; 5202 case ISD::STACKSAVE: return "stacksave"; 5203 case ISD::STACKRESTORE: return "stackrestore"; 5204 case ISD::TRAP: return "trap"; 5205 5206 // Bit manipulation 5207 case ISD::BSWAP: return "bswap"; 5208 case ISD::CTPOP: return "ctpop"; 5209 case ISD::CTTZ: return "cttz"; 5210 case ISD::CTLZ: return "ctlz"; 5211 5212 // Debug info 5213 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5214 case ISD::DEBUG_LOC: return "debug_loc"; 5215 5216 // Trampolines 5217 case ISD::TRAMPOLINE: return "trampoline"; 5218 5219 case ISD::CONDCODE: 5220 switch (cast<CondCodeSDNode>(this)->get()) { 5221 default: assert(0 && "Unknown setcc condition!"); 5222 case ISD::SETOEQ: return "setoeq"; 5223 case ISD::SETOGT: return "setogt"; 5224 case ISD::SETOGE: return "setoge"; 5225 case ISD::SETOLT: return "setolt"; 5226 case ISD::SETOLE: return "setole"; 5227 case ISD::SETONE: return "setone"; 5228 5229 case ISD::SETO: return "seto"; 5230 case ISD::SETUO: return "setuo"; 5231 case ISD::SETUEQ: return "setue"; 5232 case ISD::SETUGT: return "setugt"; 5233 case ISD::SETUGE: return "setuge"; 5234 case ISD::SETULT: return "setult"; 5235 case ISD::SETULE: return "setule"; 5236 case ISD::SETUNE: return "setune"; 5237 5238 case ISD::SETEQ: return "seteq"; 5239 case ISD::SETGT: return "setgt"; 5240 case ISD::SETGE: return "setge"; 5241 case ISD::SETLT: return "setlt"; 5242 case ISD::SETLE: return "setle"; 5243 case ISD::SETNE: return "setne"; 5244 } 5245 } 5246} 5247 5248const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5249 switch (AM) { 5250 default: 5251 return ""; 5252 case ISD::PRE_INC: 5253 return "<pre-inc>"; 5254 case ISD::PRE_DEC: 5255 return "<pre-dec>"; 5256 case ISD::POST_INC: 5257 return "<post-inc>"; 5258 case ISD::POST_DEC: 5259 return "<post-dec>"; 5260 } 5261} 5262 5263std::string ISD::ArgFlagsTy::getArgFlagsString() { 5264 std::string S = "< "; 5265 5266 if (isZExt()) 5267 S += "zext "; 5268 if (isSExt()) 5269 S += "sext "; 5270 if (isInReg()) 5271 S += "inreg "; 5272 if (isSRet()) 5273 S += "sret "; 5274 if (isByVal()) 5275 S += "byval "; 5276 if (isNest()) 5277 S += "nest "; 5278 if (getByValAlign()) 5279 S += "byval-align:" + utostr(getByValAlign()) + " "; 5280 if (getOrigAlign()) 5281 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5282 if (getByValSize()) 5283 S += "byval-size:" + utostr(getByValSize()) + " "; 5284 return S + ">"; 5285} 5286 5287void SDNode::dump() const { dump(0); } 5288void SDNode::dump(const SelectionDAG *G) const { 5289 print(errs(), G); 5290 errs().flush(); 5291} 5292 5293void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5294 OS << (void*)this << ": "; 5295 5296 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5297 if (i) OS << ","; 5298 if (getValueType(i) == MVT::Other) 5299 OS << "ch"; 5300 else 5301 OS << getValueType(i).getMVTString(); 5302 } 5303 OS << " = " << getOperationName(G); 5304 5305 OS << " "; 5306 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5307 if (i) OS << ", "; 5308 OS << (void*)getOperand(i).getNode(); 5309 if (unsigned RN = getOperand(i).getResNo()) 5310 OS << ":" << RN; 5311 } 5312 5313 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5314 SDNode *Mask = getOperand(2).getNode(); 5315 OS << "<"; 5316 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5317 if (i) OS << ","; 5318 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5319 OS << "u"; 5320 else 5321 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5322 } 5323 OS << ">"; 5324 } 5325 5326 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5327 OS << '<' << CSDN->getAPIntValue() << '>'; 5328 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5329 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5330 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5331 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5332 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5333 else { 5334 OS << "<APFloat("; 5335 CSDN->getValueAPF().bitcastToAPInt().dump(); 5336 OS << ")>"; 5337 } 5338 } else if (const GlobalAddressSDNode *GADN = 5339 dyn_cast<GlobalAddressSDNode>(this)) { 5340 int64_t offset = GADN->getOffset(); 5341 OS << '<'; 5342 WriteAsOperand(OS, GADN->getGlobal()); 5343 OS << '>'; 5344 if (offset > 0) 5345 OS << " + " << offset; 5346 else 5347 OS << " " << offset; 5348 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5349 OS << "<" << FIDN->getIndex() << ">"; 5350 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5351 OS << "<" << JTDN->getIndex() << ">"; 5352 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5353 int offset = CP->getOffset(); 5354 if (CP->isMachineConstantPoolEntry()) 5355 OS << "<" << *CP->getMachineCPVal() << ">"; 5356 else 5357 OS << "<" << *CP->getConstVal() << ">"; 5358 if (offset > 0) 5359 OS << " + " << offset; 5360 else 5361 OS << " " << offset; 5362 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5363 OS << "<"; 5364 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5365 if (LBB) 5366 OS << LBB->getName() << " "; 5367 OS << (const void*)BBDN->getBasicBlock() << ">"; 5368 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5369 if (G && R->getReg() && 5370 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5371 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5372 } else { 5373 OS << " #" << R->getReg(); 5374 } 5375 } else if (const ExternalSymbolSDNode *ES = 5376 dyn_cast<ExternalSymbolSDNode>(this)) { 5377 OS << "'" << ES->getSymbol() << "'"; 5378 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5379 if (M->getValue()) 5380 OS << "<" << M->getValue() << ">"; 5381 else 5382 OS << "<null>"; 5383 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5384 if (M->MO.getValue()) 5385 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5386 else 5387 OS << "<null:" << M->MO.getOffset() << ">"; 5388 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5389 OS << N->getArgFlags().getArgFlagsString(); 5390 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5391 OS << ":" << N->getVT().getMVTString(); 5392 } 5393 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5394 const Value *SrcValue = LD->getSrcValue(); 5395 int SrcOffset = LD->getSrcValueOffset(); 5396 OS << " <"; 5397 if (SrcValue) 5398 OS << SrcValue; 5399 else 5400 OS << "null"; 5401 OS << ":" << SrcOffset << ">"; 5402 5403 bool doExt = true; 5404 switch (LD->getExtensionType()) { 5405 default: doExt = false; break; 5406 case ISD::EXTLOAD: OS << " <anyext "; break; 5407 case ISD::SEXTLOAD: OS << " <sext "; break; 5408 case ISD::ZEXTLOAD: OS << " <zext "; break; 5409 } 5410 if (doExt) 5411 OS << LD->getMemoryVT().getMVTString() << ">"; 5412 5413 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5414 if (*AM) 5415 OS << " " << AM; 5416 if (LD->isVolatile()) 5417 OS << " <volatile>"; 5418 OS << " alignment=" << LD->getAlignment(); 5419 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5420 const Value *SrcValue = ST->getSrcValue(); 5421 int SrcOffset = ST->getSrcValueOffset(); 5422 OS << " <"; 5423 if (SrcValue) 5424 OS << SrcValue; 5425 else 5426 OS << "null"; 5427 OS << ":" << SrcOffset << ">"; 5428 5429 if (ST->isTruncatingStore()) 5430 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 5431 5432 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5433 if (*AM) 5434 OS << " " << AM; 5435 if (ST->isVolatile()) 5436 OS << " <volatile>"; 5437 OS << " alignment=" << ST->getAlignment(); 5438 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5439 const Value *SrcValue = AT->getSrcValue(); 5440 int SrcOffset = AT->getSrcValueOffset(); 5441 OS << " <"; 5442 if (SrcValue) 5443 OS << SrcValue; 5444 else 5445 OS << "null"; 5446 OS << ":" << SrcOffset << ">"; 5447 if (AT->isVolatile()) 5448 OS << " <volatile>"; 5449 OS << " alignment=" << AT->getAlignment(); 5450 } 5451} 5452 5453static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5454 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5455 if (N->getOperand(i).getNode()->hasOneUse()) 5456 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5457 else 5458 cerr << "\n" << std::string(indent+2, ' ') 5459 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5460 5461 5462 cerr << "\n" << std::string(indent, ' '); 5463 N->dump(G); 5464} 5465 5466void SelectionDAG::dump() const { 5467 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5468 5469 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5470 I != E; ++I) { 5471 const SDNode *N = I; 5472 if (!N->hasOneUse() && N != getRoot().getNode()) 5473 DumpNodes(N, 2, this); 5474 } 5475 5476 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5477 5478 cerr << "\n\n"; 5479} 5480 5481const Type *ConstantPoolSDNode::getType() const { 5482 if (isMachineConstantPoolEntry()) 5483 return Val.MachineCPVal->getType(); 5484 return Val.ConstVal->getType(); 5485} 5486