SelectionDAG.cpp revision af21d55aee8d6852fedfd630395a3c7c95df8f12
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "llvm/Constants.h" 16#include "llvm/GlobalValue.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/MachineBasicBlock.h" 19#include "llvm/Support/MathExtras.h" 20#include "llvm/Target/MRegisterInfo.h" 21#include "llvm/Target/TargetLowering.h" 22#include "llvm/Target/TargetInstrInfo.h" 23#include "llvm/Target/TargetMachine.h" 24#include <iostream> 25#include <set> 26#include <cmath> 27#include <algorithm> 28using namespace llvm; 29 30static bool isCommutativeBinOp(unsigned Opcode) { 31 switch (Opcode) { 32 case ISD::ADD: 33 case ISD::MUL: 34 case ISD::FADD: 35 case ISD::FMUL: 36 case ISD::AND: 37 case ISD::OR: 38 case ISD::XOR: return true; 39 default: return false; // FIXME: Need commutative info for user ops! 40 } 41} 42 43static bool isAssociativeBinOp(unsigned Opcode) { 44 switch (Opcode) { 45 case ISD::ADD: 46 case ISD::MUL: 47 case ISD::AND: 48 case ISD::OR: 49 case ISD::XOR: return true; 50 default: return false; // FIXME: Need associative info for user ops! 51 } 52} 53 54// isInvertibleForFree - Return true if there is no cost to emitting the logical 55// inverse of this node. 56static bool isInvertibleForFree(SDOperand N) { 57 if (isa<ConstantSDNode>(N.Val)) return true; 58 if (N.Val->getOpcode() == ISD::SETCC && N.Val->hasOneUse()) 59 return true; 60 return false; 61} 62 63//===----------------------------------------------------------------------===// 64// ConstantFPSDNode Class 65//===----------------------------------------------------------------------===// 66 67/// isExactlyValue - We don't rely on operator== working on double values, as 68/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 69/// As such, this method can be used to do an exact bit-for-bit comparison of 70/// two floating point values. 71bool ConstantFPSDNode::isExactlyValue(double V) const { 72 return DoubleToBits(V) == DoubleToBits(Value); 73} 74 75//===----------------------------------------------------------------------===// 76// ISD Class 77//===----------------------------------------------------------------------===// 78 79/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 80/// when given the operation for (X op Y). 81ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 82 // To perform this operation, we just need to swap the L and G bits of the 83 // operation. 84 unsigned OldL = (Operation >> 2) & 1; 85 unsigned OldG = (Operation >> 1) & 1; 86 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 87 (OldL << 1) | // New G bit 88 (OldG << 2)); // New L bit. 89} 90 91/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 92/// 'op' is a valid SetCC operation. 93ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 94 unsigned Operation = Op; 95 if (isInteger) 96 Operation ^= 7; // Flip L, G, E bits, but not U. 97 else 98 Operation ^= 15; // Flip all of the condition bits. 99 if (Operation > ISD::SETTRUE2) 100 Operation &= ~8; // Don't let N and U bits get set. 101 return ISD::CondCode(Operation); 102} 103 104 105/// isSignedOp - For an integer comparison, return 1 if the comparison is a 106/// signed operation and 2 if the result is an unsigned comparison. Return zero 107/// if the operation does not depend on the sign of the input (setne and seteq). 108static int isSignedOp(ISD::CondCode Opcode) { 109 switch (Opcode) { 110 default: assert(0 && "Illegal integer setcc operation!"); 111 case ISD::SETEQ: 112 case ISD::SETNE: return 0; 113 case ISD::SETLT: 114 case ISD::SETLE: 115 case ISD::SETGT: 116 case ISD::SETGE: return 1; 117 case ISD::SETULT: 118 case ISD::SETULE: 119 case ISD::SETUGT: 120 case ISD::SETUGE: return 2; 121 } 122} 123 124/// getSetCCOrOperation - Return the result of a logical OR between different 125/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 126/// returns SETCC_INVALID if it is not possible to represent the resultant 127/// comparison. 128ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 129 bool isInteger) { 130 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 131 // Cannot fold a signed integer setcc with an unsigned integer setcc. 132 return ISD::SETCC_INVALID; 133 134 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 135 136 // If the N and U bits get set then the resultant comparison DOES suddenly 137 // care about orderedness, and is true when ordered. 138 if (Op > ISD::SETTRUE2) 139 Op &= ~16; // Clear the N bit. 140 return ISD::CondCode(Op); 141} 142 143/// getSetCCAndOperation - Return the result of a logical AND between different 144/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 145/// function returns zero if it is not possible to represent the resultant 146/// comparison. 147ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 148 bool isInteger) { 149 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 150 // Cannot fold a signed setcc with an unsigned setcc. 151 return ISD::SETCC_INVALID; 152 153 // Combine all of the condition bits. 154 return ISD::CondCode(Op1 & Op2); 155} 156 157const TargetMachine &SelectionDAG::getTarget() const { 158 return TLI.getTargetMachine(); 159} 160 161//===----------------------------------------------------------------------===// 162// SelectionDAG Class 163//===----------------------------------------------------------------------===// 164 165/// RemoveDeadNodes - This method deletes all unreachable nodes in the 166/// SelectionDAG, including nodes (like loads) that have uses of their token 167/// chain but no other uses and no side effect. If a node is passed in as an 168/// argument, it is used as the seed for node deletion. 169void SelectionDAG::RemoveDeadNodes(SDNode *N) { 170 std::set<SDNode*> AllNodeSet(AllNodes.begin(), AllNodes.end()); 171 172 // Create a dummy node (which is not added to allnodes), that adds a reference 173 // to the root node, preventing it from being deleted. 174 HandleSDNode Dummy(getRoot()); 175 176 // If we have a hint to start from, use it. 177 if (N) DeleteNodeIfDead(N, &AllNodeSet); 178 179 Restart: 180 unsigned NumNodes = AllNodeSet.size(); 181 for (std::set<SDNode*>::iterator I = AllNodeSet.begin(), E = AllNodeSet.end(); 182 I != E; ++I) { 183 // Try to delete this node. 184 DeleteNodeIfDead(*I, &AllNodeSet); 185 186 // If we actually deleted any nodes, do not use invalid iterators in 187 // AllNodeSet. 188 if (AllNodeSet.size() != NumNodes) 189 goto Restart; 190 } 191 192 // Restore AllNodes. 193 if (AllNodes.size() != NumNodes) 194 AllNodes.assign(AllNodeSet.begin(), AllNodeSet.end()); 195 196 // If the root changed (e.g. it was a dead load, update the root). 197 setRoot(Dummy.getValue()); 198} 199 200 201void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { 202 if (!N->use_empty()) 203 return; 204 205 // Okay, we really are going to delete this node. First take this out of the 206 // appropriate CSE map. 207 RemoveNodeFromCSEMaps(N); 208 209 // Next, brutally remove the operand list. This is safe to do, as there are 210 // no cycles in the graph. 211 while (!N->Operands.empty()) { 212 SDNode *O = N->Operands.back().Val; 213 N->Operands.pop_back(); 214 O->removeUser(N); 215 216 // Now that we removed this operand, see if there are no uses of it left. 217 DeleteNodeIfDead(O, NodeSet); 218 } 219 220 // Remove the node from the nodes set and delete it. 221 std::set<SDNode*> &AllNodeSet = *(std::set<SDNode*>*)NodeSet; 222 AllNodeSet.erase(N); 223 224 // Now that the node is gone, check to see if any of the operands of this node 225 // are dead now. 226 delete N; 227} 228 229void SelectionDAG::DeleteNode(SDNode *N) { 230 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 231 232 // First take this out of the appropriate CSE map. 233 RemoveNodeFromCSEMaps(N); 234 235 // Finally, remove uses due to operands of this node, remove from the 236 // AllNodes list, and delete the node. 237 DeleteNodeNotInCSEMaps(N); 238} 239 240void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 241 242 // Remove it from the AllNodes list. 243 for (std::vector<SDNode*>::iterator I = AllNodes.begin(); ; ++I) { 244 assert(I != AllNodes.end() && "Node not in AllNodes list??"); 245 if (*I == N) { 246 // Erase from the vector, which is not ordered. 247 std::swap(*I, AllNodes.back()); 248 AllNodes.pop_back(); 249 break; 250 } 251 } 252 253 // Drop all of the operands and decrement used nodes use counts. 254 while (!N->Operands.empty()) { 255 SDNode *O = N->Operands.back().Val; 256 N->Operands.pop_back(); 257 O->removeUser(N); 258 } 259 260 delete N; 261} 262 263/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 264/// correspond to it. This is useful when we're about to delete or repurpose 265/// the node. We don't want future request for structurally identical nodes 266/// to return N anymore. 267void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 268 bool Erased = false; 269 switch (N->getOpcode()) { 270 case ISD::HANDLENODE: return; // noop. 271 case ISD::Constant: 272 Erased = Constants.erase(std::make_pair(cast<ConstantSDNode>(N)->getValue(), 273 N->getValueType(0))); 274 break; 275 case ISD::TargetConstant: 276 Erased = TargetConstants.erase(std::make_pair( 277 cast<ConstantSDNode>(N)->getValue(), 278 N->getValueType(0))); 279 break; 280 case ISD::ConstantFP: { 281 uint64_t V = DoubleToBits(cast<ConstantFPSDNode>(N)->getValue()); 282 Erased = ConstantFPs.erase(std::make_pair(V, N->getValueType(0))); 283 break; 284 } 285 case ISD::CONDCODE: 286 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 287 "Cond code doesn't exist!"); 288 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 289 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 290 break; 291 case ISD::GlobalAddress: 292 Erased = GlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 293 break; 294 case ISD::TargetGlobalAddress: 295 Erased =TargetGlobalValues.erase(cast<GlobalAddressSDNode>(N)->getGlobal()); 296 break; 297 case ISD::FrameIndex: 298 Erased = FrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 299 break; 300 case ISD::TargetFrameIndex: 301 Erased = TargetFrameIndices.erase(cast<FrameIndexSDNode>(N)->getIndex()); 302 break; 303 case ISD::ConstantPool: 304 Erased = ConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get()); 305 break; 306 case ISD::TargetConstantPool: 307 Erased =TargetConstantPoolIndices.erase(cast<ConstantPoolSDNode>(N)->get()); 308 break; 309 case ISD::BasicBlock: 310 Erased = BBNodes.erase(cast<BasicBlockSDNode>(N)->getBasicBlock()); 311 break; 312 case ISD::ExternalSymbol: 313 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 314 break; 315 case ISD::VALUETYPE: 316 Erased = ValueTypeNodes[cast<VTSDNode>(N)->getVT()] != 0; 317 ValueTypeNodes[cast<VTSDNode>(N)->getVT()] = 0; 318 break; 319 case ISD::Register: 320 Erased = RegNodes.erase(std::make_pair(cast<RegisterSDNode>(N)->getReg(), 321 N->getValueType(0))); 322 break; 323 case ISD::SRCVALUE: { 324 SrcValueSDNode *SVN = cast<SrcValueSDNode>(N); 325 Erased =ValueNodes.erase(std::make_pair(SVN->getValue(), SVN->getOffset())); 326 break; 327 } 328 case ISD::LOAD: 329 Erased = Loads.erase(std::make_pair(N->getOperand(1), 330 std::make_pair(N->getOperand(0), 331 N->getValueType(0)))); 332 break; 333 default: 334 if (N->getNumValues() == 1) { 335 if (N->getNumOperands() == 0) { 336 Erased = NullaryOps.erase(std::make_pair(N->getOpcode(), 337 N->getValueType(0))); 338 } else if (N->getNumOperands() == 1) { 339 Erased = 340 UnaryOps.erase(std::make_pair(N->getOpcode(), 341 std::make_pair(N->getOperand(0), 342 N->getValueType(0)))); 343 } else if (N->getNumOperands() == 2) { 344 Erased = 345 BinaryOps.erase(std::make_pair(N->getOpcode(), 346 std::make_pair(N->getOperand(0), 347 N->getOperand(1)))); 348 } else { 349 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 350 Erased = 351 OneResultNodes.erase(std::make_pair(N->getOpcode(), 352 std::make_pair(N->getValueType(0), 353 Ops))); 354 } 355 } else { 356 // Remove the node from the ArbitraryNodes map. 357 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 358 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 359 Erased = 360 ArbitraryNodes.erase(std::make_pair(N->getOpcode(), 361 std::make_pair(RV, Ops))); 362 } 363 break; 364 } 365#ifndef NDEBUG 366 // Verify that the node was actually in one of the CSE maps, unless it has a 367 // flag result (which cannot be CSE'd) or is one of the special cases that are 368 // not subject to CSE. 369 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 370 N->getOpcode() != ISD::CALL && N->getOpcode() != ISD::CALLSEQ_START && 371 N->getOpcode() != ISD::CALLSEQ_END && !N->isTargetOpcode()) { 372 373 N->dump(); 374 assert(0 && "Node is not in map!"); 375 } 376#endif 377} 378 379/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 380/// has been taken out and modified in some way. If the specified node already 381/// exists in the CSE maps, do not modify the maps, but return the existing node 382/// instead. If it doesn't exist, add it and return null. 383/// 384SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 385 assert(N->getNumOperands() && "This is a leaf node!"); 386 if (N->getOpcode() == ISD::LOAD) { 387 SDNode *&L = Loads[std::make_pair(N->getOperand(1), 388 std::make_pair(N->getOperand(0), 389 N->getValueType(0)))]; 390 if (L) return L; 391 L = N; 392 } else if (N->getOpcode() == ISD::HANDLENODE) { 393 return 0; // never add it. 394 } else if (N->getNumOperands() == 1) { 395 SDNode *&U = UnaryOps[std::make_pair(N->getOpcode(), 396 std::make_pair(N->getOperand(0), 397 N->getValueType(0)))]; 398 if (U) return U; 399 U = N; 400 } else if (N->getNumOperands() == 2) { 401 SDNode *&B = BinaryOps[std::make_pair(N->getOpcode(), 402 std::make_pair(N->getOperand(0), 403 N->getOperand(1)))]; 404 if (B) return B; 405 B = N; 406 } else if (N->getNumValues() == 1) { 407 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 408 SDNode *&ORN = OneResultNodes[std::make_pair(N->getOpcode(), 409 std::make_pair(N->getValueType(0), Ops))]; 410 if (ORN) return ORN; 411 ORN = N; 412 } else { 413 // Remove the node from the ArbitraryNodes map. 414 std::vector<MVT::ValueType> RV(N->value_begin(), N->value_end()); 415 std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); 416 SDNode *&AN = ArbitraryNodes[std::make_pair(N->getOpcode(), 417 std::make_pair(RV, Ops))]; 418 if (AN) return AN; 419 AN = N; 420 } 421 return 0; 422 423} 424 425 426 427SelectionDAG::~SelectionDAG() { 428 for (unsigned i = 0, e = AllNodes.size(); i != e; ++i) 429 delete AllNodes[i]; 430} 431 432SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT::ValueType VT) { 433 if (Op.getValueType() == VT) return Op; 434 int64_t Imm = ~0ULL >> (64-MVT::getSizeInBits(VT)); 435 return getNode(ISD::AND, Op.getValueType(), Op, 436 getConstant(Imm, Op.getValueType())); 437} 438 439SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { 440 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 441 // Mask out any bits that are not valid for this constant. 442 if (VT != MVT::i64) 443 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 444 445 SDNode *&N = Constants[std::make_pair(Val, VT)]; 446 if (N) return SDOperand(N, 0); 447 N = new ConstantSDNode(false, Val, VT); 448 AllNodes.push_back(N); 449 return SDOperand(N, 0); 450} 451 452SDOperand SelectionDAG::getTargetConstant(uint64_t Val, MVT::ValueType VT) { 453 assert(MVT::isInteger(VT) && "Cannot create FP integer constant!"); 454 // Mask out any bits that are not valid for this constant. 455 if (VT != MVT::i64) 456 Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; 457 458 SDNode *&N = TargetConstants[std::make_pair(Val, VT)]; 459 if (N) return SDOperand(N, 0); 460 N = new ConstantSDNode(true, Val, VT); 461 AllNodes.push_back(N); 462 return SDOperand(N, 0); 463} 464 465SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { 466 assert(MVT::isFloatingPoint(VT) && "Cannot create integer FP constant!"); 467 if (VT == MVT::f32) 468 Val = (float)Val; // Mask out extra precision. 469 470 // Do the map lookup using the actual bit pattern for the floating point 471 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 472 // we don't have issues with SNANs. 473 SDNode *&N = ConstantFPs[std::make_pair(DoubleToBits(Val), VT)]; 474 if (N) return SDOperand(N, 0); 475 N = new ConstantFPSDNode(Val, VT); 476 AllNodes.push_back(N); 477 return SDOperand(N, 0); 478} 479 480 481 482SDOperand SelectionDAG::getGlobalAddress(const GlobalValue *GV, 483 MVT::ValueType VT) { 484 SDNode *&N = GlobalValues[GV]; 485 if (N) return SDOperand(N, 0); 486 N = new GlobalAddressSDNode(false, GV, VT); 487 AllNodes.push_back(N); 488 return SDOperand(N, 0); 489} 490 491SDOperand SelectionDAG::getTargetGlobalAddress(const GlobalValue *GV, 492 MVT::ValueType VT) { 493 SDNode *&N = TargetGlobalValues[GV]; 494 if (N) return SDOperand(N, 0); 495 N = new GlobalAddressSDNode(true, GV, VT); 496 AllNodes.push_back(N); 497 return SDOperand(N, 0); 498} 499 500SDOperand SelectionDAG::getFrameIndex(int FI, MVT::ValueType VT) { 501 SDNode *&N = FrameIndices[FI]; 502 if (N) return SDOperand(N, 0); 503 N = new FrameIndexSDNode(FI, VT, false); 504 AllNodes.push_back(N); 505 return SDOperand(N, 0); 506} 507 508SDOperand SelectionDAG::getTargetFrameIndex(int FI, MVT::ValueType VT) { 509 SDNode *&N = TargetFrameIndices[FI]; 510 if (N) return SDOperand(N, 0); 511 N = new FrameIndexSDNode(FI, VT, true); 512 AllNodes.push_back(N); 513 return SDOperand(N, 0); 514} 515 516SDOperand SelectionDAG::getConstantPool(Constant *C, MVT::ValueType VT) { 517 SDNode *&N = ConstantPoolIndices[C]; 518 if (N) return SDOperand(N, 0); 519 N = new ConstantPoolSDNode(C, VT, false); 520 AllNodes.push_back(N); 521 return SDOperand(N, 0); 522} 523 524SDOperand SelectionDAG::getTargetConstantPool(Constant *C, MVT::ValueType VT) { 525 SDNode *&N = TargetConstantPoolIndices[C]; 526 if (N) return SDOperand(N, 0); 527 N = new ConstantPoolSDNode(C, VT, true); 528 AllNodes.push_back(N); 529 return SDOperand(N, 0); 530} 531 532SDOperand SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 533 SDNode *&N = BBNodes[MBB]; 534 if (N) return SDOperand(N, 0); 535 N = new BasicBlockSDNode(MBB); 536 AllNodes.push_back(N); 537 return SDOperand(N, 0); 538} 539 540SDOperand SelectionDAG::getValueType(MVT::ValueType VT) { 541 if ((unsigned)VT >= ValueTypeNodes.size()) 542 ValueTypeNodes.resize(VT+1); 543 if (ValueTypeNodes[VT] == 0) { 544 ValueTypeNodes[VT] = new VTSDNode(VT); 545 AllNodes.push_back(ValueTypeNodes[VT]); 546 } 547 548 return SDOperand(ValueTypeNodes[VT], 0); 549} 550 551SDOperand SelectionDAG::getExternalSymbol(const char *Sym, MVT::ValueType VT) { 552 SDNode *&N = ExternalSymbols[Sym]; 553 if (N) return SDOperand(N, 0); 554 N = new ExternalSymbolSDNode(Sym, VT); 555 AllNodes.push_back(N); 556 return SDOperand(N, 0); 557} 558 559SDOperand SelectionDAG::getCondCode(ISD::CondCode Cond) { 560 if ((unsigned)Cond >= CondCodeNodes.size()) 561 CondCodeNodes.resize(Cond+1); 562 563 if (CondCodeNodes[Cond] == 0) { 564 CondCodeNodes[Cond] = new CondCodeSDNode(Cond); 565 AllNodes.push_back(CondCodeNodes[Cond]); 566 } 567 return SDOperand(CondCodeNodes[Cond], 0); 568} 569 570SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT::ValueType VT) { 571 RegisterSDNode *&Reg = RegNodes[std::make_pair(RegNo, VT)]; 572 if (!Reg) { 573 Reg = new RegisterSDNode(RegNo, VT); 574 AllNodes.push_back(Reg); 575 } 576 return SDOperand(Reg, 0); 577} 578 579/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 580/// this predicate to simplify operations downstream. V and Mask are known to 581/// be the same type. 582static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, 583 const TargetLowering &TLI) { 584 unsigned SrcBits; 585 if (Mask == 0) return true; 586 587 // If we know the result of a setcc has the top bits zero, use this info. 588 switch (Op.getOpcode()) { 589 case ISD::Constant: 590 return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0; 591 592 case ISD::SETCC: 593 return ((Mask & 1) == 0) && 594 TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; 595 596 case ISD::ZEXTLOAD: 597 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT()); 598 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 599 case ISD::ZERO_EXTEND: 600 SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType()); 601 return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); 602 case ISD::AssertZext: 603 SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT()); 604 return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits. 605 case ISD::AND: 606 // If either of the operands has zero bits, the result will too. 607 if (MaskedValueIsZero(Op.getOperand(1), Mask, TLI) || 608 MaskedValueIsZero(Op.getOperand(0), Mask, TLI)) 609 return true; 610 611 // (X & C1) & C2 == 0 iff C1 & C2 == 0. 612 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 613 return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI); 614 return false; 615 case ISD::OR: 616 case ISD::XOR: 617 return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 618 MaskedValueIsZero(Op.getOperand(1), Mask, TLI); 619 case ISD::SELECT: 620 return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) && 621 MaskedValueIsZero(Op.getOperand(2), Mask, TLI); 622 case ISD::SELECT_CC: 623 return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) && 624 MaskedValueIsZero(Op.getOperand(3), Mask, TLI); 625 case ISD::SRL: 626 // (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0 627 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 628 uint64_t NewVal = Mask << ShAmt->getValue(); 629 SrcBits = MVT::getSizeInBits(Op.getValueType()); 630 if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1; 631 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 632 } 633 return false; 634 case ISD::SHL: 635 // (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0 636 if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 637 uint64_t NewVal = Mask >> ShAmt->getValue(); 638 return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI); 639 } 640 return false; 641 case ISD::ADD: 642 // (add X, Y) & C == 0 iff (X&C)|(Y&C) == 0 and all bits are low bits. 643 if ((Mask&(Mask+1)) == 0) { // All low bits 644 if (MaskedValueIsZero(Op.getOperand(0), Mask, TLI) && 645 MaskedValueIsZero(Op.getOperand(1), Mask, TLI)) { 646 std::cerr << "MASK: "; 647 Op.getOperand(0).Val->dump(); 648 std::cerr << " - "; 649 Op.getOperand(1).Val->dump(); 650 std::cerr << "\n"; 651 return true; 652 } 653 } 654 break; 655 case ISD::SUB: 656 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 657 // We know that the top bits of C-X are clear if X contains less bits 658 // than C (i.e. no wrap-around can happen). For example, 20-X is 659 // positive if we can prove that X is >= 0 and < 16. 660 unsigned Bits = MVT::getSizeInBits(CLHS->getValueType(0)); 661 if ((CLHS->getValue() & (1 << (Bits-1))) == 0) { // sign bit clear 662 unsigned NLZ = CountLeadingZeros_64(CLHS->getValue()+1); 663 uint64_t MaskV = (1ULL << (63-NLZ))-1; 664 if (MaskedValueIsZero(Op.getOperand(1), ~MaskV, TLI)) { 665 // High bits are clear this value is known to be >= C. 666 unsigned NLZ2 = CountLeadingZeros_64(CLHS->getValue()); 667 if ((Mask & ((1ULL << (64-NLZ2))-1)) == 0) 668 return true; 669 } 670 } 671 } 672 break; 673 case ISD::CTTZ: 674 case ISD::CTLZ: 675 case ISD::CTPOP: 676 // Bit counting instructions can not set the high bits of the result 677 // register. The max number of bits sets depends on the input. 678 return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0; 679 680 // TODO we could handle some SRA cases here. 681 default: break; 682 } 683 684 return false; 685} 686 687 688 689SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1, 690 SDOperand N2, ISD::CondCode Cond) { 691 // These setcc operations always fold. 692 switch (Cond) { 693 default: break; 694 case ISD::SETFALSE: 695 case ISD::SETFALSE2: return getConstant(0, VT); 696 case ISD::SETTRUE: 697 case ISD::SETTRUE2: return getConstant(1, VT); 698 } 699 700 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 701 uint64_t C2 = N2C->getValue(); 702 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 703 uint64_t C1 = N1C->getValue(); 704 705 // Sign extend the operands if required 706 if (ISD::isSignedIntSetCC(Cond)) { 707 C1 = N1C->getSignExtended(); 708 C2 = N2C->getSignExtended(); 709 } 710 711 switch (Cond) { 712 default: assert(0 && "Unknown integer setcc!"); 713 case ISD::SETEQ: return getConstant(C1 == C2, VT); 714 case ISD::SETNE: return getConstant(C1 != C2, VT); 715 case ISD::SETULT: return getConstant(C1 < C2, VT); 716 case ISD::SETUGT: return getConstant(C1 > C2, VT); 717 case ISD::SETULE: return getConstant(C1 <= C2, VT); 718 case ISD::SETUGE: return getConstant(C1 >= C2, VT); 719 case ISD::SETLT: return getConstant((int64_t)C1 < (int64_t)C2, VT); 720 case ISD::SETGT: return getConstant((int64_t)C1 > (int64_t)C2, VT); 721 case ISD::SETLE: return getConstant((int64_t)C1 <= (int64_t)C2, VT); 722 case ISD::SETGE: return getConstant((int64_t)C1 >= (int64_t)C2, VT); 723 } 724 } else { 725 // If the LHS is a ZERO_EXTEND, perform the comparison on the input. 726 if (N1.getOpcode() == ISD::ZERO_EXTEND) { 727 unsigned InSize = MVT::getSizeInBits(N1.getOperand(0).getValueType()); 728 729 // If the comparison constant has bits in the upper part, the 730 // zero-extended value could never match. 731 if (C2 & (~0ULL << InSize)) { 732 unsigned VSize = MVT::getSizeInBits(N1.getValueType()); 733 switch (Cond) { 734 case ISD::SETUGT: 735 case ISD::SETUGE: 736 case ISD::SETEQ: return getConstant(0, VT); 737 case ISD::SETULT: 738 case ISD::SETULE: 739 case ISD::SETNE: return getConstant(1, VT); 740 case ISD::SETGT: 741 case ISD::SETGE: 742 // True if the sign bit of C2 is set. 743 return getConstant((C2 & (1ULL << VSize)) != 0, VT); 744 case ISD::SETLT: 745 case ISD::SETLE: 746 // True if the sign bit of C2 isn't set. 747 return getConstant((C2 & (1ULL << VSize)) == 0, VT); 748 default: 749 break; 750 } 751 } 752 753 // Otherwise, we can perform the comparison with the low bits. 754 switch (Cond) { 755 case ISD::SETEQ: 756 case ISD::SETNE: 757 case ISD::SETUGT: 758 case ISD::SETUGE: 759 case ISD::SETULT: 760 case ISD::SETULE: 761 return getSetCC(VT, N1.getOperand(0), 762 getConstant(C2, N1.getOperand(0).getValueType()), 763 Cond); 764 default: 765 break; // todo, be more careful with signed comparisons 766 } 767 } else if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG && 768 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { 769 MVT::ValueType ExtSrcTy = cast<VTSDNode>(N1.getOperand(1))->getVT(); 770 unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy); 771 MVT::ValueType ExtDstTy = N1.getValueType(); 772 unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy); 773 774 // If the extended part has any inconsistent bits, it cannot ever 775 // compare equal. In other words, they have to be all ones or all 776 // zeros. 777 uint64_t ExtBits = 778 (~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1)); 779 if ((C2 & ExtBits) != 0 && (C2 & ExtBits) != ExtBits) 780 return getConstant(Cond == ISD::SETNE, VT); 781 782 // Otherwise, make this a use of a zext. 783 return getSetCC(VT, getZeroExtendInReg(N1.getOperand(0), ExtSrcTy), 784 getConstant(C2 & (~0ULL>>(64-ExtSrcTyBits)), ExtDstTy), 785 Cond); 786 } 787 788 uint64_t MinVal, MaxVal; 789 unsigned OperandBitSize = MVT::getSizeInBits(N2C->getValueType(0)); 790 if (ISD::isSignedIntSetCC(Cond)) { 791 MinVal = 1ULL << (OperandBitSize-1); 792 if (OperandBitSize != 1) // Avoid X >> 64, which is undefined. 793 MaxVal = ~0ULL >> (65-OperandBitSize); 794 else 795 MaxVal = 0; 796 } else { 797 MinVal = 0; 798 MaxVal = ~0ULL >> (64-OperandBitSize); 799 } 800 801 // Canonicalize GE/LE comparisons to use GT/LT comparisons. 802 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { 803 if (C2 == MinVal) return getConstant(1, VT); // X >= MIN --> true 804 --C2; // X >= C1 --> X > (C1-1) 805 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 806 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); 807 } 808 809 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { 810 if (C2 == MaxVal) return getConstant(1, VT); // X <= MAX --> true 811 ++C2; // X <= C1 --> X < (C1+1) 812 return getSetCC(VT, N1, getConstant(C2, N2.getValueType()), 813 (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT); 814 } 815 816 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) 817 return getConstant(0, VT); // X < MIN --> false 818 819 // Canonicalize setgt X, Min --> setne X, Min 820 if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) 821 return getSetCC(VT, N1, N2, ISD::SETNE); 822 823 // If we have setult X, 1, turn it into seteq X, 0 824 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) 825 return getSetCC(VT, N1, getConstant(MinVal, N1.getValueType()), 826 ISD::SETEQ); 827 // If we have setugt X, Max-1, turn it into seteq X, Max 828 else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MaxVal-1) 829 return getSetCC(VT, N1, getConstant(MaxVal, N1.getValueType()), 830 ISD::SETEQ); 831 832 // If we have "setcc X, C1", check to see if we can shrink the immediate 833 // by changing cc. 834 835 // SETUGT X, SINTMAX -> SETLT X, 0 836 if (Cond == ISD::SETUGT && OperandBitSize != 1 && 837 C2 == (~0ULL >> (65-OperandBitSize))) 838 return getSetCC(VT, N1, getConstant(0, N2.getValueType()), ISD::SETLT); 839 840 // FIXME: Implement the rest of these. 841 842 843 // Fold bit comparisons when we can. 844 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && 845 VT == N1.getValueType() && N1.getOpcode() == ISD::AND) 846 if (ConstantSDNode *AndRHS = 847 dyn_cast<ConstantSDNode>(N1.getOperand(1))) { 848 if (Cond == ISD::SETNE && C2 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 849 // Perform the xform if the AND RHS is a single bit. 850 if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) { 851 return getNode(ISD::SRL, VT, N1, 852 getConstant(Log2_64(AndRHS->getValue()), 853 TLI.getShiftAmountTy())); 854 } 855 } else if (Cond == ISD::SETEQ && C2 == AndRHS->getValue()) { 856 // (X & 8) == 8 --> (X & 8) >> 3 857 // Perform the xform if C2 is a single bit. 858 if ((C2 & (C2-1)) == 0) { 859 return getNode(ISD::SRL, VT, N1, 860 getConstant(Log2_64(C2),TLI.getShiftAmountTy())); 861 } 862 } 863 } 864 } 865 } else if (isa<ConstantSDNode>(N1.Val)) { 866 // Ensure that the constant occurs on the RHS. 867 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 868 } 869 870 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) 871 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 872 double C1 = N1C->getValue(), C2 = N2C->getValue(); 873 874 switch (Cond) { 875 default: break; // FIXME: Implement the rest of these! 876 case ISD::SETEQ: return getConstant(C1 == C2, VT); 877 case ISD::SETNE: return getConstant(C1 != C2, VT); 878 case ISD::SETLT: return getConstant(C1 < C2, VT); 879 case ISD::SETGT: return getConstant(C1 > C2, VT); 880 case ISD::SETLE: return getConstant(C1 <= C2, VT); 881 case ISD::SETGE: return getConstant(C1 >= C2, VT); 882 } 883 } else { 884 // Ensure that the constant occurs on the RHS. 885 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 886 } 887 888 // Could not fold it. 889 return SDOperand(); 890} 891 892SDOperand SelectionDAG::SimplifySelectCC(SDOperand N1, SDOperand N2, 893 SDOperand N3, SDOperand N4, 894 ISD::CondCode CC) { 895 MVT::ValueType VT = N3.getValueType(); 896 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 897 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 898 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 899 ConstantSDNode *N4C = dyn_cast<ConstantSDNode>(N4.Val); 900 901 // Check to see if we can simplify the select into an fabs node 902 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) { 903 // Allow either -0.0 or 0.0 904 if (CFP->getValue() == 0.0) { 905 // select (setg[te] X, +/-0.0), X, fneg(X) -> fabs 906 if ((CC == ISD::SETGE || CC == ISD::SETGT) && 907 N1 == N3 && N4.getOpcode() == ISD::FNEG && 908 N1 == N4.getOperand(0)) 909 return getNode(ISD::FABS, VT, N1); 910 911 // select (setl[te] X, +/-0.0), fneg(X), X -> fabs 912 if ((CC == ISD::SETLT || CC == ISD::SETLE) && 913 N1 == N4 && N3.getOpcode() == ISD::FNEG && 914 N3.getOperand(0) == N4) 915 return getNode(ISD::FABS, VT, N4); 916 } 917 } 918 919 // check to see if we're select_cc'ing a select_cc. 920 // this allows us to turn: 921 // select_cc set[eq,ne] (select_cc cc, lhs, rhs, 1, 0), 0, true, false -> 922 // select_cc cc, lhs, rhs, true, false 923 if ((N1C && N1C->isNullValue() && N2.getOpcode() == ISD::SELECT_CC) || 924 (N2C && N2C->isNullValue() && N1.getOpcode() == ISD::SELECT_CC) && 925 (CC == ISD::SETEQ || CC == ISD::SETNE)) { 926 SDOperand SCC = N1C ? N2 : N1; 927 ConstantSDNode *SCCT = dyn_cast<ConstantSDNode>(SCC.getOperand(2)); 928 ConstantSDNode *SCCF = dyn_cast<ConstantSDNode>(SCC.getOperand(3)); 929 if (SCCT && SCCF && SCCF->isNullValue() && SCCT->getValue() == 1ULL) { 930 if (CC == ISD::SETEQ) std::swap(N3, N4); 931 return getNode(ISD::SELECT_CC, N3.getValueType(), SCC.getOperand(0), 932 SCC.getOperand(1), N3, N4, SCC.getOperand(4)); 933 } 934 } 935 936 // Check to see if we can perform the "gzip trick", transforming 937 // select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A 938 if (N2C && N2C->isNullValue() && N4C && N4C->isNullValue() && 939 MVT::isInteger(N1.getValueType()) && 940 MVT::isInteger(N3.getValueType()) && CC == ISD::SETLT) { 941 MVT::ValueType XType = N1.getValueType(); 942 MVT::ValueType AType = N3.getValueType(); 943 if (XType >= AType) { 944 // and (sra X, size(X)-1, A) -> "and (srl X, C2), A" iff A is a 945 // single-bit constant. FIXME: remove once the dag combiner 946 // exists. 947 if (N3C && ((N3C->getValue() & (N3C->getValue()-1)) == 0)) { 948 unsigned ShCtV = Log2_64(N3C->getValue()); 949 ShCtV = MVT::getSizeInBits(XType)-ShCtV-1; 950 SDOperand ShCt = getConstant(ShCtV, TLI.getShiftAmountTy()); 951 SDOperand Shift = getNode(ISD::SRL, XType, N1, ShCt); 952 if (XType > AType) 953 Shift = getNode(ISD::TRUNCATE, AType, Shift); 954 return getNode(ISD::AND, AType, Shift, N3); 955 } 956 SDOperand Shift = getNode(ISD::SRA, XType, N1, 957 getConstant(MVT::getSizeInBits(XType)-1, 958 TLI.getShiftAmountTy())); 959 if (XType > AType) 960 Shift = getNode(ISD::TRUNCATE, AType, Shift); 961 return getNode(ISD::AND, AType, Shift, N3); 962 } 963 } 964 965 // Check to see if this is the equivalent of setcc 966 if (N4C && N4C->isNullValue() && N3C && (N3C->getValue() == 1ULL)) { 967 MVT::ValueType XType = N1.getValueType(); 968 if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultTy())) { 969 SDOperand Res = getSetCC(TLI.getSetCCResultTy(), N1, N2, CC); 970 if (Res.getValueType() != VT) 971 Res = getNode(ISD::ZERO_EXTEND, VT, Res); 972 return Res; 973 } 974 975 // seteq X, 0 -> srl (ctlz X, log2(size(X))) 976 if (N2C && N2C->isNullValue() && CC == ISD::SETEQ && 977 TLI.isOperationLegal(ISD::CTLZ, XType)) { 978 SDOperand Ctlz = getNode(ISD::CTLZ, XType, N1); 979 return getNode(ISD::SRL, XType, Ctlz, 980 getConstant(Log2_32(MVT::getSizeInBits(XType)), 981 TLI.getShiftAmountTy())); 982 } 983 // setgt X, 0 -> srl (and (-X, ~X), size(X)-1) 984 if (N2C && N2C->isNullValue() && CC == ISD::SETGT) { 985 SDOperand NegN1 = getNode(ISD::SUB, XType, getConstant(0, XType), N1); 986 SDOperand NotN1 = getNode(ISD::XOR, XType, N1, getConstant(~0ULL, XType)); 987 return getNode(ISD::SRL, XType, getNode(ISD::AND, XType, NegN1, NotN1), 988 getConstant(MVT::getSizeInBits(XType)-1, 989 TLI.getShiftAmountTy())); 990 } 991 // setgt X, -1 -> xor (srl (X, size(X)-1), 1) 992 if (N2C && N2C->isAllOnesValue() && CC == ISD::SETGT) { 993 SDOperand Sign = getNode(ISD::SRL, XType, N1, 994 getConstant(MVT::getSizeInBits(XType)-1, 995 TLI.getShiftAmountTy())); 996 return getNode(ISD::XOR, XType, Sign, getConstant(1, XType)); 997 } 998 } 999 1000 // Check to see if this is an integer abs. select_cc setl[te] X, 0, -X, X -> 1001 // Y = sra (X, size(X)-1); xor (add (X, Y), Y) 1002 if (N2C && N2C->isNullValue() && (CC == ISD::SETLT || CC == ISD::SETLE) && 1003 N1 == N4 && N3.getOpcode() == ISD::SUB && N1 == N3.getOperand(1)) { 1004 if (ConstantSDNode *SubC = dyn_cast<ConstantSDNode>(N3.getOperand(0))) { 1005 MVT::ValueType XType = N1.getValueType(); 1006 if (SubC->isNullValue() && MVT::isInteger(XType)) { 1007 SDOperand Shift = getNode(ISD::SRA, XType, N1, 1008 getConstant(MVT::getSizeInBits(XType)-1, 1009 TLI.getShiftAmountTy())); 1010 return getNode(ISD::XOR, XType, getNode(ISD::ADD, XType, N1, Shift), 1011 Shift); 1012 } 1013 } 1014 } 1015 1016 // Could not fold it. 1017 return SDOperand(); 1018} 1019 1020/// getNode - Gets or creates the specified node. 1021/// 1022SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT) { 1023 SDNode *&N = NullaryOps[std::make_pair(Opcode, VT)]; 1024 if (!N) { 1025 N = new SDNode(Opcode, VT); 1026 AllNodes.push_back(N); 1027 } 1028 return SDOperand(N, 0); 1029} 1030 1031SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1032 SDOperand Operand) { 1033 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 1034 uint64_t Val = C->getValue(); 1035 switch (Opcode) { 1036 default: break; 1037 case ISD::SIGN_EXTEND: return getConstant(C->getSignExtended(), VT); 1038 case ISD::ANY_EXTEND: 1039 case ISD::ZERO_EXTEND: return getConstant(Val, VT); 1040 case ISD::TRUNCATE: return getConstant(Val, VT); 1041 case ISD::SINT_TO_FP: return getConstantFP(C->getSignExtended(), VT); 1042 case ISD::UINT_TO_FP: return getConstantFP(C->getValue(), VT); 1043 } 1044 } 1045 1046 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) 1047 switch (Opcode) { 1048 case ISD::FNEG: 1049 return getConstantFP(-C->getValue(), VT); 1050 case ISD::FP_ROUND: 1051 case ISD::FP_EXTEND: 1052 return getConstantFP(C->getValue(), VT); 1053 case ISD::FP_TO_SINT: 1054 return getConstant((int64_t)C->getValue(), VT); 1055 case ISD::FP_TO_UINT: 1056 return getConstant((uint64_t)C->getValue(), VT); 1057 } 1058 1059 unsigned OpOpcode = Operand.Val->getOpcode(); 1060 switch (Opcode) { 1061 case ISD::TokenFactor: 1062 return Operand; // Factor of one node? No factor. 1063 case ISD::SIGN_EXTEND: 1064 if (Operand.getValueType() == VT) return Operand; // noop extension 1065 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 1066 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1067 break; 1068 case ISD::ZERO_EXTEND: 1069 if (Operand.getValueType() == VT) return Operand; // noop extension 1070 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 1071 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 1072 break; 1073 case ISD::ANY_EXTEND: 1074 if (Operand.getValueType() == VT) return Operand; // noop extension 1075 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 1076 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 1077 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1078 break; 1079 case ISD::TRUNCATE: 1080 if (Operand.getValueType() == VT) return Operand; // noop truncate 1081 if (OpOpcode == ISD::TRUNCATE) 1082 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 1083 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 1084 OpOpcode == ISD::ANY_EXTEND) { 1085 // If the source is smaller than the dest, we still need an extend. 1086 if (Operand.Val->getOperand(0).getValueType() < VT) 1087 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 1088 else if (Operand.Val->getOperand(0).getValueType() > VT) 1089 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 1090 else 1091 return Operand.Val->getOperand(0); 1092 } 1093 break; 1094 case ISD::FNEG: 1095 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 1096 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), 1097 Operand.Val->getOperand(0)); 1098 if (OpOpcode == ISD::FNEG) // --X -> X 1099 return Operand.Val->getOperand(0); 1100 break; 1101 case ISD::FABS: 1102 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 1103 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 1104 break; 1105 } 1106 1107 SDNode *N; 1108 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 1109 SDNode *&E = UnaryOps[std::make_pair(Opcode, std::make_pair(Operand, VT))]; 1110 if (E) return SDOperand(E, 0); 1111 E = N = new SDNode(Opcode, Operand); 1112 } else { 1113 N = new SDNode(Opcode, Operand); 1114 } 1115 N->setValueTypes(VT); 1116 AllNodes.push_back(N); 1117 return SDOperand(N, 0); 1118} 1119 1120 1121 1122SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1123 SDOperand N1, SDOperand N2) { 1124#ifndef NDEBUG 1125 switch (Opcode) { 1126 case ISD::TokenFactor: 1127 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 1128 N2.getValueType() == MVT::Other && "Invalid token factor!"); 1129 break; 1130 case ISD::AND: 1131 case ISD::OR: 1132 case ISD::XOR: 1133 case ISD::UDIV: 1134 case ISD::UREM: 1135 case ISD::MULHU: 1136 case ISD::MULHS: 1137 assert(MVT::isInteger(VT) && "This operator does not apply to FP types!"); 1138 // fall through 1139 case ISD::ADD: 1140 case ISD::SUB: 1141 case ISD::MUL: 1142 case ISD::SDIV: 1143 case ISD::SREM: 1144 assert(MVT::isInteger(N1.getValueType()) && "Should use F* for FP ops"); 1145 // fall through. 1146 case ISD::FADD: 1147 case ISD::FSUB: 1148 case ISD::FMUL: 1149 case ISD::FDIV: 1150 case ISD::FREM: 1151 assert(N1.getValueType() == N2.getValueType() && 1152 N1.getValueType() == VT && "Binary operator types must match!"); 1153 break; 1154 1155 case ISD::SHL: 1156 case ISD::SRA: 1157 case ISD::SRL: 1158 assert(VT == N1.getValueType() && 1159 "Shift operators return type must be the same as their first arg"); 1160 assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && 1161 VT != MVT::i1 && "Shifts only work on integers"); 1162 break; 1163 case ISD::FP_ROUND_INREG: { 1164 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1165 assert(VT == N1.getValueType() && "Not an inreg round!"); 1166 assert(MVT::isFloatingPoint(VT) && MVT::isFloatingPoint(EVT) && 1167 "Cannot FP_ROUND_INREG integer types"); 1168 assert(EVT <= VT && "Not rounding down!"); 1169 break; 1170 } 1171 case ISD::AssertSext: 1172 case ISD::AssertZext: 1173 case ISD::SIGN_EXTEND_INREG: { 1174 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1175 assert(VT == N1.getValueType() && "Not an inreg extend!"); 1176 assert(MVT::isInteger(VT) && MVT::isInteger(EVT) && 1177 "Cannot *_EXTEND_INREG FP types"); 1178 assert(EVT <= VT && "Not extending!"); 1179 } 1180 1181 default: break; 1182 } 1183#endif 1184 1185 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1186 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1187 if (N1C) { 1188 if (N2C) { 1189 uint64_t C1 = N1C->getValue(), C2 = N2C->getValue(); 1190 switch (Opcode) { 1191 case ISD::ADD: return getConstant(C1 + C2, VT); 1192 case ISD::SUB: return getConstant(C1 - C2, VT); 1193 case ISD::MUL: return getConstant(C1 * C2, VT); 1194 case ISD::UDIV: 1195 if (C2) return getConstant(C1 / C2, VT); 1196 break; 1197 case ISD::UREM : 1198 if (C2) return getConstant(C1 % C2, VT); 1199 break; 1200 case ISD::SDIV : 1201 if (C2) return getConstant(N1C->getSignExtended() / 1202 N2C->getSignExtended(), VT); 1203 break; 1204 case ISD::SREM : 1205 if (C2) return getConstant(N1C->getSignExtended() % 1206 N2C->getSignExtended(), VT); 1207 break; 1208 case ISD::AND : return getConstant(C1 & C2, VT); 1209 case ISD::OR : return getConstant(C1 | C2, VT); 1210 case ISD::XOR : return getConstant(C1 ^ C2, VT); 1211 case ISD::SHL : return getConstant(C1 << C2, VT); 1212 case ISD::SRL : return getConstant(C1 >> C2, VT); 1213 case ISD::SRA : return getConstant(N1C->getSignExtended() >>(int)C2, VT); 1214 default: break; 1215 } 1216 } else { // Cannonicalize constant to RHS if commutative 1217 if (isCommutativeBinOp(Opcode)) { 1218 std::swap(N1C, N2C); 1219 std::swap(N1, N2); 1220 } 1221 } 1222 } 1223 1224 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 1225 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 1226 if (N1CFP) { 1227 if (N2CFP) { 1228 double C1 = N1CFP->getValue(), C2 = N2CFP->getValue(); 1229 switch (Opcode) { 1230 case ISD::FADD: return getConstantFP(C1 + C2, VT); 1231 case ISD::FSUB: return getConstantFP(C1 - C2, VT); 1232 case ISD::FMUL: return getConstantFP(C1 * C2, VT); 1233 case ISD::FDIV: 1234 if (C2) return getConstantFP(C1 / C2, VT); 1235 break; 1236 case ISD::FREM : 1237 if (C2) return getConstantFP(fmod(C1, C2), VT); 1238 break; 1239 default: break; 1240 } 1241 } else { // Cannonicalize constant to RHS if commutative 1242 if (isCommutativeBinOp(Opcode)) { 1243 std::swap(N1CFP, N2CFP); 1244 std::swap(N1, N2); 1245 } 1246 } 1247 } 1248 1249 // Finally, fold operations that do not require constants. 1250 switch (Opcode) { 1251 case ISD::FP_ROUND_INREG: 1252 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 1253 break; 1254 case ISD::SIGN_EXTEND_INREG: { 1255 MVT::ValueType EVT = cast<VTSDNode>(N2)->getVT(); 1256 if (EVT == VT) return N1; // Not actually extending 1257 break; 1258 } 1259 1260 // FIXME: figure out how to safely handle things like 1261 // int foo(int x) { return 1 << (x & 255); } 1262 // int bar() { return foo(256); } 1263#if 0 1264 case ISD::SHL: 1265 case ISD::SRL: 1266 case ISD::SRA: 1267 if (N2.getOpcode() == ISD::SIGN_EXTEND_INREG && 1268 cast<VTSDNode>(N2.getOperand(1))->getVT() != MVT::i1) 1269 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1270 else if (N2.getOpcode() == ISD::AND) 1271 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N2.getOperand(1))) { 1272 // If the and is only masking out bits that cannot effect the shift, 1273 // eliminate the and. 1274 unsigned NumBits = MVT::getSizeInBits(VT); 1275 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1276 return getNode(Opcode, VT, N1, N2.getOperand(0)); 1277 } 1278 break; 1279#endif 1280 } 1281 1282 // Memoize this node if possible. 1283 SDNode *N; 1284 if (Opcode != ISD::CALLSEQ_START && Opcode != ISD::CALLSEQ_END && 1285 VT != MVT::Flag) { 1286 SDNode *&BON = BinaryOps[std::make_pair(Opcode, std::make_pair(N1, N2))]; 1287 if (BON) return SDOperand(BON, 0); 1288 1289 BON = N = new SDNode(Opcode, N1, N2); 1290 } else { 1291 N = new SDNode(Opcode, N1, N2); 1292 } 1293 1294 N->setValueTypes(VT); 1295 AllNodes.push_back(N); 1296 return SDOperand(N, 0); 1297} 1298 1299// setAdjCallChain - This method changes the token chain of an 1300// CALLSEQ_START/END node to be the specified operand. 1301void SDNode::setAdjCallChain(SDOperand N) { 1302 assert(N.getValueType() == MVT::Other); 1303 assert((getOpcode() == ISD::CALLSEQ_START || 1304 getOpcode() == ISD::CALLSEQ_END) && "Cannot adjust this node!"); 1305 1306 Operands[0].Val->removeUser(this); 1307 Operands[0] = N; 1308 N.Val->Uses.push_back(this); 1309} 1310 1311 1312 1313SDOperand SelectionDAG::getLoad(MVT::ValueType VT, 1314 SDOperand Chain, SDOperand Ptr, 1315 SDOperand SV) { 1316 SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))]; 1317 if (N) return SDOperand(N, 0); 1318 N = new SDNode(ISD::LOAD, Chain, Ptr, SV); 1319 1320 // Loads have a token chain. 1321 N->setValueTypes(VT, MVT::Other); 1322 AllNodes.push_back(N); 1323 return SDOperand(N, 0); 1324} 1325 1326 1327SDOperand SelectionDAG::getExtLoad(unsigned Opcode, MVT::ValueType VT, 1328 SDOperand Chain, SDOperand Ptr, SDOperand SV, 1329 MVT::ValueType EVT) { 1330 std::vector<SDOperand> Ops; 1331 Ops.reserve(4); 1332 Ops.push_back(Chain); 1333 Ops.push_back(Ptr); 1334 Ops.push_back(SV); 1335 Ops.push_back(getValueType(EVT)); 1336 std::vector<MVT::ValueType> VTs; 1337 VTs.reserve(2); 1338 VTs.push_back(VT); VTs.push_back(MVT::Other); // Add token chain. 1339 return getNode(Opcode, VTs, Ops); 1340} 1341 1342SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1343 SDOperand N1, SDOperand N2, SDOperand N3) { 1344 // Perform various simplifications. 1345 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 1346 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 1347 ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3.Val); 1348 switch (Opcode) { 1349 case ISD::SETCC: { 1350 // Use SimplifySetCC to simplify SETCC's. 1351 SDOperand Simp = SimplifySetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 1352 if (Simp.Val) return Simp; 1353 break; 1354 } 1355 case ISD::SELECT: 1356 if (N1C) 1357 if (N1C->getValue()) 1358 return N2; // select true, X, Y -> X 1359 else 1360 return N3; // select false, X, Y -> Y 1361 1362 if (N2 == N3) return N2; // select C, X, X -> X 1363 break; 1364 case ISD::BRCOND: 1365 if (N2C) 1366 if (N2C->getValue()) // Unconditional branch 1367 return getNode(ISD::BR, MVT::Other, N1, N3); 1368 else 1369 return N1; // Never-taken branch 1370 break; 1371 } 1372 1373 std::vector<SDOperand> Ops; 1374 Ops.reserve(3); 1375 Ops.push_back(N1); 1376 Ops.push_back(N2); 1377 Ops.push_back(N3); 1378 1379 // Memoize node if it doesn't produce a flag. 1380 SDNode *N; 1381 if (VT != MVT::Flag) { 1382 SDNode *&E = OneResultNodes[std::make_pair(Opcode,std::make_pair(VT, Ops))]; 1383 if (E) return SDOperand(E, 0); 1384 E = N = new SDNode(Opcode, N1, N2, N3); 1385 } else { 1386 N = new SDNode(Opcode, N1, N2, N3); 1387 } 1388 N->setValueTypes(VT); 1389 AllNodes.push_back(N); 1390 return SDOperand(N, 0); 1391} 1392 1393SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1394 SDOperand N1, SDOperand N2, SDOperand N3, 1395 SDOperand N4) { 1396 std::vector<SDOperand> Ops; 1397 Ops.reserve(4); 1398 Ops.push_back(N1); 1399 Ops.push_back(N2); 1400 Ops.push_back(N3); 1401 Ops.push_back(N4); 1402 return getNode(Opcode, VT, Ops); 1403} 1404 1405SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1406 SDOperand N1, SDOperand N2, SDOperand N3, 1407 SDOperand N4, SDOperand N5) { 1408 std::vector<SDOperand> Ops; 1409 Ops.reserve(5); 1410 Ops.push_back(N1); 1411 Ops.push_back(N2); 1412 Ops.push_back(N3); 1413 Ops.push_back(N4); 1414 Ops.push_back(N5); 1415 return getNode(Opcode, VT, Ops); 1416} 1417 1418 1419SDOperand SelectionDAG::getSrcValue(const Value *V, int Offset) { 1420 assert((!V || isa<PointerType>(V->getType())) && 1421 "SrcValue is not a pointer?"); 1422 SDNode *&N = ValueNodes[std::make_pair(V, Offset)]; 1423 if (N) return SDOperand(N, 0); 1424 1425 N = new SrcValueSDNode(V, Offset); 1426 AllNodes.push_back(N); 1427 return SDOperand(N, 0); 1428} 1429 1430SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, 1431 std::vector<SDOperand> &Ops) { 1432 switch (Ops.size()) { 1433 case 0: return getNode(Opcode, VT); 1434 case 1: return getNode(Opcode, VT, Ops[0]); 1435 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 1436 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 1437 default: break; 1438 } 1439 1440 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(Ops[1].Val); 1441 switch (Opcode) { 1442 default: break; 1443 case ISD::BRCONDTWOWAY: 1444 if (N1C) 1445 if (N1C->getValue()) // Unconditional branch to true dest. 1446 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[2]); 1447 else // Unconditional branch to false dest. 1448 return getNode(ISD::BR, MVT::Other, Ops[0], Ops[3]); 1449 break; 1450 case ISD::BRTWOWAY_CC: 1451 assert(Ops.size() == 6 && "BRTWOWAY_CC takes 6 operands!"); 1452 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1453 "LHS and RHS of comparison must have same type!"); 1454 break; 1455 case ISD::TRUNCSTORE: { 1456 assert(Ops.size() == 5 && "TRUNCSTORE takes 5 operands!"); 1457 MVT::ValueType EVT = cast<VTSDNode>(Ops[4])->getVT(); 1458#if 0 // FIXME: If the target supports EVT natively, convert to a truncate/store 1459 // If this is a truncating store of a constant, convert to the desired type 1460 // and store it instead. 1461 if (isa<Constant>(Ops[0])) { 1462 SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); 1463 if (isa<Constant>(Op)) 1464 N1 = Op; 1465 } 1466 // Also for ConstantFP? 1467#endif 1468 if (Ops[0].getValueType() == EVT) // Normal store? 1469 return getNode(ISD::STORE, VT, Ops[0], Ops[1], Ops[2], Ops[3]); 1470 assert(Ops[1].getValueType() > EVT && "Not a truncation?"); 1471 assert(MVT::isInteger(Ops[1].getValueType()) == MVT::isInteger(EVT) && 1472 "Can't do FP-INT conversion!"); 1473 break; 1474 } 1475 case ISD::SELECT_CC: { 1476 assert(Ops.size() == 5 && "SELECT_CC takes 5 operands!"); 1477 assert(Ops[0].getValueType() == Ops[1].getValueType() && 1478 "LHS and RHS of condition must have same type!"); 1479 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1480 "True and False arms of SelectCC must have same type!"); 1481 assert(Ops[2].getValueType() == VT && 1482 "select_cc node must be of same type as true and false value!"); 1483 SDOperand Simp = SimplifySelectCC(Ops[0], Ops[1], Ops[2], Ops[3], 1484 cast<CondCodeSDNode>(Ops[4])->get()); 1485 if (Simp.Val) return Simp; 1486 break; 1487 } 1488 case ISD::BR_CC: { 1489 assert(Ops.size() == 5 && "BR_CC takes 5 operands!"); 1490 assert(Ops[2].getValueType() == Ops[3].getValueType() && 1491 "LHS/RHS of comparison should match types!"); 1492 break; 1493 } 1494 } 1495 1496 // Memoize nodes. 1497 SDNode *N; 1498 if (VT != MVT::Flag) { 1499 SDNode *&E = 1500 OneResultNodes[std::make_pair(Opcode, std::make_pair(VT, Ops))]; 1501 if (E) return SDOperand(E, 0); 1502 E = N = new SDNode(Opcode, Ops); 1503 } else { 1504 N = new SDNode(Opcode, Ops); 1505 } 1506 N->setValueTypes(VT); 1507 AllNodes.push_back(N); 1508 return SDOperand(N, 0); 1509} 1510 1511SDOperand SelectionDAG::getNode(unsigned Opcode, 1512 std::vector<MVT::ValueType> &ResultTys, 1513 std::vector<SDOperand> &Ops) { 1514 if (ResultTys.size() == 1) 1515 return getNode(Opcode, ResultTys[0], Ops); 1516 1517 switch (Opcode) { 1518 case ISD::EXTLOAD: 1519 case ISD::SEXTLOAD: 1520 case ISD::ZEXTLOAD: { 1521 MVT::ValueType EVT = cast<VTSDNode>(Ops[3])->getVT(); 1522 assert(Ops.size() == 4 && ResultTys.size() == 2 && "Bad *EXTLOAD!"); 1523 // If they are asking for an extending load from/to the same thing, return a 1524 // normal load. 1525 if (ResultTys[0] == EVT) 1526 return getLoad(ResultTys[0], Ops[0], Ops[1], Ops[2]); 1527 assert(EVT < ResultTys[0] && 1528 "Should only be an extending load, not truncating!"); 1529 assert((Opcode == ISD::EXTLOAD || MVT::isInteger(ResultTys[0])) && 1530 "Cannot sign/zero extend a FP load!"); 1531 assert(MVT::isInteger(ResultTys[0]) == MVT::isInteger(EVT) && 1532 "Cannot convert from FP to Int or Int -> FP!"); 1533 break; 1534 } 1535 1536 // FIXME: figure out how to safely handle things like 1537 // int foo(int x) { return 1 << (x & 255); } 1538 // int bar() { return foo(256); } 1539#if 0 1540 case ISD::SRA_PARTS: 1541 case ISD::SRL_PARTS: 1542 case ISD::SHL_PARTS: 1543 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 1544 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 1545 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1546 else if (N3.getOpcode() == ISD::AND) 1547 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 1548 // If the and is only masking out bits that cannot effect the shift, 1549 // eliminate the and. 1550 unsigned NumBits = MVT::getSizeInBits(VT)*2; 1551 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 1552 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 1553 } 1554 break; 1555#endif 1556 } 1557 1558 // Memoize the node unless it returns a flag. 1559 SDNode *N; 1560 if (ResultTys.back() != MVT::Flag) { 1561 SDNode *&E = 1562 ArbitraryNodes[std::make_pair(Opcode, std::make_pair(ResultTys, Ops))]; 1563 if (E) return SDOperand(E, 0); 1564 E = N = new SDNode(Opcode, Ops); 1565 } else { 1566 N = new SDNode(Opcode, Ops); 1567 } 1568 N->setValueTypes(ResultTys); 1569 AllNodes.push_back(N); 1570 return SDOperand(N, 0); 1571} 1572 1573 1574/// SelectNodeTo - These are used for target selectors to *mutate* the 1575/// specified node to have the specified return type, Target opcode, and 1576/// operands. Note that target opcodes are stored as 1577/// ISD::BUILTIN_OP_END+TargetOpcode in the node opcode field. 1578void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 1579 MVT::ValueType VT) { 1580 RemoveNodeFromCSEMaps(N); 1581 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1582 N->setValueTypes(VT); 1583} 1584void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 1585 MVT::ValueType VT, SDOperand Op1) { 1586 RemoveNodeFromCSEMaps(N); 1587 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1588 N->setValueTypes(VT); 1589 N->setOperands(Op1); 1590} 1591void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 1592 MVT::ValueType VT, SDOperand Op1, 1593 SDOperand Op2) { 1594 RemoveNodeFromCSEMaps(N); 1595 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1596 N->setValueTypes(VT); 1597 N->setOperands(Op1, Op2); 1598} 1599void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 1600 MVT::ValueType VT1, MVT::ValueType VT2, 1601 SDOperand Op1, SDOperand Op2) { 1602 RemoveNodeFromCSEMaps(N); 1603 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1604 N->setValueTypes(VT1, VT2); 1605 N->setOperands(Op1, Op2); 1606} 1607void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 1608 MVT::ValueType VT, SDOperand Op1, 1609 SDOperand Op2, SDOperand Op3) { 1610 RemoveNodeFromCSEMaps(N); 1611 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1612 N->setValueTypes(VT); 1613 N->setOperands(Op1, Op2, Op3); 1614} 1615void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 1616 MVT::ValueType VT1, MVT::ValueType VT2, 1617 SDOperand Op1, SDOperand Op2, SDOperand Op3) { 1618 RemoveNodeFromCSEMaps(N); 1619 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1620 N->setValueTypes(VT1, VT2); 1621 N->setOperands(Op1, Op2, Op3); 1622} 1623 1624void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 1625 MVT::ValueType VT, SDOperand Op1, 1626 SDOperand Op2, SDOperand Op3, SDOperand Op4) { 1627 RemoveNodeFromCSEMaps(N); 1628 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1629 N->setValueTypes(VT); 1630 N->setOperands(Op1, Op2, Op3, Op4); 1631} 1632void SelectionDAG::SelectNodeTo(SDNode *N, unsigned TargetOpc, 1633 MVT::ValueType VT, SDOperand Op1, 1634 SDOperand Op2, SDOperand Op3, SDOperand Op4, 1635 SDOperand Op5) { 1636 RemoveNodeFromCSEMaps(N); 1637 N->MorphNodeTo(ISD::BUILTIN_OP_END+TargetOpc); 1638 N->setValueTypes(VT); 1639 N->setOperands(Op1, Op2, Op3, Op4, Op5); 1640} 1641 1642/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 1643/// This can cause recursive merging of nodes in the DAG. 1644/// 1645/// This version assumes From/To have a single result value. 1646/// 1647void SelectionDAG::ReplaceAllUsesWith(SDOperand FromN, SDOperand ToN, 1648 std::vector<SDNode*> *Deleted) { 1649 SDNode *From = FromN.Val, *To = ToN.Val; 1650 assert(From->getNumValues() == 1 && To->getNumValues() == 1 && 1651 "Cannot replace with this method!"); 1652 assert(From != To && "Cannot replace uses of with self"); 1653 1654 while (!From->use_empty()) { 1655 // Process users until they are all gone. 1656 SDNode *U = *From->use_begin(); 1657 1658 // This node is about to morph, remove its old self from the CSE maps. 1659 RemoveNodeFromCSEMaps(U); 1660 1661 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 1662 if (U->getOperand(i).Val == From) { 1663 From->removeUser(U); 1664 U->Operands[i].Val = To; 1665 To->addUser(U); 1666 } 1667 1668 // Now that we have modified U, add it back to the CSE maps. If it already 1669 // exists there, recursively merge the results together. 1670 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 1671 ReplaceAllUsesWith(U, Existing, Deleted); 1672 // U is now dead. 1673 if (Deleted) Deleted->push_back(U); 1674 DeleteNodeNotInCSEMaps(U); 1675 } 1676 } 1677} 1678 1679/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 1680/// This can cause recursive merging of nodes in the DAG. 1681/// 1682/// This version assumes From/To have matching types and numbers of result 1683/// values. 1684/// 1685void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 1686 std::vector<SDNode*> *Deleted) { 1687 assert(From != To && "Cannot replace uses of with self"); 1688 assert(From->getNumValues() == To->getNumValues() && 1689 "Cannot use this version of ReplaceAllUsesWith!"); 1690 if (From->getNumValues() == 1) { // If possible, use the faster version. 1691 ReplaceAllUsesWith(SDOperand(From, 0), SDOperand(To, 0), Deleted); 1692 return; 1693 } 1694 1695 while (!From->use_empty()) { 1696 // Process users until they are all gone. 1697 SDNode *U = *From->use_begin(); 1698 1699 // This node is about to morph, remove its old self from the CSE maps. 1700 RemoveNodeFromCSEMaps(U); 1701 1702 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 1703 if (U->getOperand(i).Val == From) { 1704 From->removeUser(U); 1705 U->Operands[i].Val = To; 1706 To->addUser(U); 1707 } 1708 1709 // Now that we have modified U, add it back to the CSE maps. If it already 1710 // exists there, recursively merge the results together. 1711 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 1712 ReplaceAllUsesWith(U, Existing, Deleted); 1713 // U is now dead. 1714 if (Deleted) Deleted->push_back(U); 1715 DeleteNodeNotInCSEMaps(U); 1716 } 1717 } 1718} 1719 1720/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 1721/// This can cause recursive merging of nodes in the DAG. 1722/// 1723/// This version can replace From with any result values. To must match the 1724/// number and types of values returned by From. 1725void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 1726 const std::vector<SDOperand> &To, 1727 std::vector<SDNode*> *Deleted) { 1728 assert(From->getNumValues() == To.size() && 1729 "Incorrect number of values to replace with!"); 1730 if (To.size() == 1 && To[0].Val->getNumValues() == 1) { 1731 // Degenerate case handled above. 1732 ReplaceAllUsesWith(SDOperand(From, 0), To[0], Deleted); 1733 return; 1734 } 1735 1736 while (!From->use_empty()) { 1737 // Process users until they are all gone. 1738 SDNode *U = *From->use_begin(); 1739 1740 // This node is about to morph, remove its old self from the CSE maps. 1741 RemoveNodeFromCSEMaps(U); 1742 1743 for (unsigned i = 0, e = U->getNumOperands(); i != e; ++i) 1744 if (U->getOperand(i).Val == From) { 1745 const SDOperand &ToOp = To[U->getOperand(i).ResNo]; 1746 From->removeUser(U); 1747 U->Operands[i] = ToOp; 1748 ToOp.Val->addUser(U); 1749 } 1750 1751 // Now that we have modified U, add it back to the CSE maps. If it already 1752 // exists there, recursively merge the results together. 1753 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 1754 ReplaceAllUsesWith(U, Existing, Deleted); 1755 // U is now dead. 1756 if (Deleted) Deleted->push_back(U); 1757 DeleteNodeNotInCSEMaps(U); 1758 } 1759 } 1760} 1761 1762 1763//===----------------------------------------------------------------------===// 1764// SDNode Class 1765//===----------------------------------------------------------------------===// 1766 1767/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 1768/// indicated value. This method ignores uses of other values defined by this 1769/// operation. 1770bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) { 1771 assert(Value < getNumValues() && "Bad value!"); 1772 1773 // If there is only one value, this is easy. 1774 if (getNumValues() == 1) 1775 return use_size() == NUses; 1776 if (Uses.size() < NUses) return false; 1777 1778 SDOperand TheValue(this, Value); 1779 1780 std::set<SDNode*> UsersHandled; 1781 1782 for (std::vector<SDNode*>::iterator UI = Uses.begin(), E = Uses.end(); 1783 UI != E; ++UI) { 1784 SDNode *User = *UI; 1785 if (User->getNumOperands() == 1 || 1786 UsersHandled.insert(User).second) // First time we've seen this? 1787 for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) 1788 if (User->getOperand(i) == TheValue) { 1789 if (NUses == 0) 1790 return false; // too many uses 1791 --NUses; 1792 } 1793 } 1794 1795 // Found exactly the right number of uses? 1796 return NUses == 0; 1797} 1798 1799 1800const char *SDNode::getOperationName(const SelectionDAG *G) const { 1801 switch (getOpcode()) { 1802 default: 1803 if (getOpcode() < ISD::BUILTIN_OP_END) 1804 return "<<Unknown DAG Node>>"; 1805 else { 1806 if (G) 1807 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 1808 if (getOpcode()-ISD::BUILTIN_OP_END < TII->getNumOpcodes()) 1809 return TII->getName(getOpcode()-ISD::BUILTIN_OP_END); 1810 return "<<Unknown Target Node>>"; 1811 } 1812 1813 case ISD::PCMARKER: return "PCMarker"; 1814 case ISD::SRCVALUE: return "SrcValue"; 1815 case ISD::VALUETYPE: return "ValueType"; 1816 case ISD::EntryToken: return "EntryToken"; 1817 case ISD::TokenFactor: return "TokenFactor"; 1818 case ISD::AssertSext: return "AssertSext"; 1819 case ISD::AssertZext: return "AssertZext"; 1820 case ISD::Constant: return "Constant"; 1821 case ISD::TargetConstant: return "TargetConstant"; 1822 case ISD::ConstantFP: return "ConstantFP"; 1823 case ISD::GlobalAddress: return "GlobalAddress"; 1824 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 1825 case ISD::FrameIndex: return "FrameIndex"; 1826 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 1827 case ISD::BasicBlock: return "BasicBlock"; 1828 case ISD::Register: return "Register"; 1829 case ISD::ExternalSymbol: return "ExternalSymbol"; 1830 case ISD::ConstantPool: return "ConstantPool"; 1831 case ISD::TargetConstantPool: return "TargetConstantPool"; 1832 case ISD::CopyToReg: return "CopyToReg"; 1833 case ISD::CopyFromReg: return "CopyFromReg"; 1834 case ISD::ImplicitDef: return "ImplicitDef"; 1835 case ISD::UNDEF: return "undef"; 1836 1837 // Unary operators 1838 case ISD::FABS: return "fabs"; 1839 case ISD::FNEG: return "fneg"; 1840 case ISD::FSQRT: return "fsqrt"; 1841 case ISD::FSIN: return "fsin"; 1842 case ISD::FCOS: return "fcos"; 1843 1844 // Binary operators 1845 case ISD::ADD: return "add"; 1846 case ISD::SUB: return "sub"; 1847 case ISD::MUL: return "mul"; 1848 case ISD::MULHU: return "mulhu"; 1849 case ISD::MULHS: return "mulhs"; 1850 case ISD::SDIV: return "sdiv"; 1851 case ISD::UDIV: return "udiv"; 1852 case ISD::SREM: return "srem"; 1853 case ISD::UREM: return "urem"; 1854 case ISD::AND: return "and"; 1855 case ISD::OR: return "or"; 1856 case ISD::XOR: return "xor"; 1857 case ISD::SHL: return "shl"; 1858 case ISD::SRA: return "sra"; 1859 case ISD::SRL: return "srl"; 1860 case ISD::FADD: return "fadd"; 1861 case ISD::FSUB: return "fsub"; 1862 case ISD::FMUL: return "fmul"; 1863 case ISD::FDIV: return "fdiv"; 1864 case ISD::FREM: return "frem"; 1865 1866 case ISD::SETCC: return "setcc"; 1867 case ISD::SELECT: return "select"; 1868 case ISD::SELECT_CC: return "select_cc"; 1869 case ISD::ADD_PARTS: return "add_parts"; 1870 case ISD::SUB_PARTS: return "sub_parts"; 1871 case ISD::SHL_PARTS: return "shl_parts"; 1872 case ISD::SRA_PARTS: return "sra_parts"; 1873 case ISD::SRL_PARTS: return "srl_parts"; 1874 1875 // Conversion operators. 1876 case ISD::SIGN_EXTEND: return "sign_extend"; 1877 case ISD::ZERO_EXTEND: return "zero_extend"; 1878 case ISD::ANY_EXTEND: return "any_extend"; 1879 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 1880 case ISD::TRUNCATE: return "truncate"; 1881 case ISD::FP_ROUND: return "fp_round"; 1882 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 1883 case ISD::FP_EXTEND: return "fp_extend"; 1884 1885 case ISD::SINT_TO_FP: return "sint_to_fp"; 1886 case ISD::UINT_TO_FP: return "uint_to_fp"; 1887 case ISD::FP_TO_SINT: return "fp_to_sint"; 1888 case ISD::FP_TO_UINT: return "fp_to_uint"; 1889 1890 // Control flow instructions 1891 case ISD::BR: return "br"; 1892 case ISD::BRCOND: return "brcond"; 1893 case ISD::BRCONDTWOWAY: return "brcondtwoway"; 1894 case ISD::BR_CC: return "br_cc"; 1895 case ISD::BRTWOWAY_CC: return "brtwoway_cc"; 1896 case ISD::RET: return "ret"; 1897 case ISD::CALL: return "call"; 1898 case ISD::TAILCALL:return "tailcall"; 1899 case ISD::CALLSEQ_START: return "callseq_start"; 1900 case ISD::CALLSEQ_END: return "callseq_end"; 1901 1902 // Other operators 1903 case ISD::LOAD: return "load"; 1904 case ISD::STORE: return "store"; 1905 case ISD::EXTLOAD: return "extload"; 1906 case ISD::SEXTLOAD: return "sextload"; 1907 case ISD::ZEXTLOAD: return "zextload"; 1908 case ISD::TRUNCSTORE: return "truncstore"; 1909 1910 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 1911 case ISD::EXTRACT_ELEMENT: return "extract_element"; 1912 case ISD::BUILD_PAIR: return "build_pair"; 1913 case ISD::MEMSET: return "memset"; 1914 case ISD::MEMCPY: return "memcpy"; 1915 case ISD::MEMMOVE: return "memmove"; 1916 1917 // Bit counting 1918 case ISD::CTPOP: return "ctpop"; 1919 case ISD::CTTZ: return "cttz"; 1920 case ISD::CTLZ: return "ctlz"; 1921 1922 // IO Intrinsics 1923 case ISD::READPORT: return "readport"; 1924 case ISD::WRITEPORT: return "writeport"; 1925 case ISD::READIO: return "readio"; 1926 case ISD::WRITEIO: return "writeio"; 1927 1928 case ISD::CONDCODE: 1929 switch (cast<CondCodeSDNode>(this)->get()) { 1930 default: assert(0 && "Unknown setcc condition!"); 1931 case ISD::SETOEQ: return "setoeq"; 1932 case ISD::SETOGT: return "setogt"; 1933 case ISD::SETOGE: return "setoge"; 1934 case ISD::SETOLT: return "setolt"; 1935 case ISD::SETOLE: return "setole"; 1936 case ISD::SETONE: return "setone"; 1937 1938 case ISD::SETO: return "seto"; 1939 case ISD::SETUO: return "setuo"; 1940 case ISD::SETUEQ: return "setue"; 1941 case ISD::SETUGT: return "setugt"; 1942 case ISD::SETUGE: return "setuge"; 1943 case ISD::SETULT: return "setult"; 1944 case ISD::SETULE: return "setule"; 1945 case ISD::SETUNE: return "setune"; 1946 1947 case ISD::SETEQ: return "seteq"; 1948 case ISD::SETGT: return "setgt"; 1949 case ISD::SETGE: return "setge"; 1950 case ISD::SETLT: return "setlt"; 1951 case ISD::SETLE: return "setle"; 1952 case ISD::SETNE: return "setne"; 1953 } 1954 } 1955} 1956 1957void SDNode::dump() const { dump(0); } 1958void SDNode::dump(const SelectionDAG *G) const { 1959 std::cerr << (void*)this << ": "; 1960 1961 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 1962 if (i) std::cerr << ","; 1963 if (getValueType(i) == MVT::Other) 1964 std::cerr << "ch"; 1965 else 1966 std::cerr << MVT::getValueTypeString(getValueType(i)); 1967 } 1968 std::cerr << " = " << getOperationName(G); 1969 1970 std::cerr << " "; 1971 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1972 if (i) std::cerr << ", "; 1973 std::cerr << (void*)getOperand(i).Val; 1974 if (unsigned RN = getOperand(i).ResNo) 1975 std::cerr << ":" << RN; 1976 } 1977 1978 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 1979 std::cerr << "<" << CSDN->getValue() << ">"; 1980 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 1981 std::cerr << "<" << CSDN->getValue() << ">"; 1982 } else if (const GlobalAddressSDNode *GADN = 1983 dyn_cast<GlobalAddressSDNode>(this)) { 1984 std::cerr << "<"; 1985 WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; 1986 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 1987 std::cerr << "<" << FIDN->getIndex() << ">"; 1988 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 1989 std::cerr << "<" << *CP->get() << ">"; 1990 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 1991 std::cerr << "<"; 1992 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 1993 if (LBB) 1994 std::cerr << LBB->getName() << " "; 1995 std::cerr << (const void*)BBDN->getBasicBlock() << ">"; 1996 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 1997 if (G && MRegisterInfo::isPhysicalRegister(R->getReg())) { 1998 std::cerr << " " <<G->getTarget().getRegisterInfo()->getName(R->getReg()); 1999 } else { 2000 std::cerr << " #" << R->getReg(); 2001 } 2002 } else if (const ExternalSymbolSDNode *ES = 2003 dyn_cast<ExternalSymbolSDNode>(this)) { 2004 std::cerr << "'" << ES->getSymbol() << "'"; 2005 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 2006 if (M->getValue()) 2007 std::cerr << "<" << M->getValue() << ":" << M->getOffset() << ">"; 2008 else 2009 std::cerr << "<null:" << M->getOffset() << ">"; 2010 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 2011 std::cerr << ":" << getValueTypeString(N->getVT()); 2012 } 2013} 2014 2015static void DumpNodes(SDNode *N, unsigned indent, const SelectionDAG *G) { 2016 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 2017 if (N->getOperand(i).Val->hasOneUse()) 2018 DumpNodes(N->getOperand(i).Val, indent+2, G); 2019 else 2020 std::cerr << "\n" << std::string(indent+2, ' ') 2021 << (void*)N->getOperand(i).Val << ": <multiple use>"; 2022 2023 2024 std::cerr << "\n" << std::string(indent, ' '); 2025 N->dump(G); 2026} 2027 2028void SelectionDAG::dump() const { 2029 std::cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 2030 std::vector<SDNode*> Nodes(AllNodes); 2031 std::sort(Nodes.begin(), Nodes.end()); 2032 2033 for (unsigned i = 0, e = Nodes.size(); i != e; ++i) { 2034 if (!Nodes[i]->hasOneUse() && Nodes[i] != getRoot().Val) 2035 DumpNodes(Nodes[i], 2, this); 2036 } 2037 2038 DumpNodes(getRoot().Val, 2, this); 2039 2040 std::cerr << "\n\n"; 2041} 2042 2043