SelectionDAG.cpp revision cab98e3168558a40675a06bc830eb87b8e40070e
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetSelectionDAGInfo.h" 37#include "llvm/Target/TargetOptions.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetIntrinsicInfo.h" 40#include "llvm/Target/TargetMachine.h" 41#include "llvm/Support/CommandLine.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ErrorHandling.h" 44#include "llvm/Support/ManagedStatic.h" 45#include "llvm/Support/MathExtras.h" 46#include "llvm/Support/raw_ostream.h" 47#include "llvm/System/Mutex.h" 48#include "llvm/ADT/SetVector.h" 49#include "llvm/ADT/SmallPtrSet.h" 50#include "llvm/ADT/SmallSet.h" 51#include "llvm/ADT/SmallVector.h" 52#include "llvm/ADT/StringExtras.h" 53#include <algorithm> 54#include <cmath> 55using namespace llvm; 56 57/// makeVTList - Return an instance of the SDVTList struct initialized with the 58/// specified members. 59static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 60 SDVTList Res = {VTs, NumVTs}; 61 return Res; 62} 63 64static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 65 switch (VT.getSimpleVT().SimpleTy) { 66 default: llvm_unreachable("Unknown FP format"); 67 case MVT::f32: return &APFloat::IEEEsingle; 68 case MVT::f64: return &APFloat::IEEEdouble; 69 case MVT::f80: return &APFloat::x87DoubleExtended; 70 case MVT::f128: return &APFloat::IEEEquad; 71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 72 } 73} 74 75SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 76 77//===----------------------------------------------------------------------===// 78// ConstantFPSDNode Class 79//===----------------------------------------------------------------------===// 80 81/// isExactlyValue - We don't rely on operator== working on double values, as 82/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 83/// As such, this method can be used to do an exact bit-for-bit comparison of 84/// two floating point values. 85bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 86 return getValueAPF().bitwiseIsEqual(V); 87} 88 89bool ConstantFPSDNode::isValueValidForType(EVT VT, 90 const APFloat& Val) { 91 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 92 93 // PPC long double cannot be converted to any other type. 94 if (VT == MVT::ppcf128 || 95 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 96 return false; 97 98 // convert modifies in place, so make a copy. 99 APFloat Val2 = APFloat(Val); 100 bool losesInfo; 101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 102 &losesInfo); 103 return !losesInfo; 104} 105 106//===----------------------------------------------------------------------===// 107// ISD Namespace 108//===----------------------------------------------------------------------===// 109 110/// isBuildVectorAllOnes - Return true if the specified node is a 111/// BUILD_VECTOR where all of the elements are ~0 or undef. 112bool ISD::isBuildVectorAllOnes(const SDNode *N) { 113 // Look through a bit convert. 114 if (N->getOpcode() == ISD::BIT_CONVERT) 115 N = N->getOperand(0).getNode(); 116 117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 118 119 unsigned i = 0, e = N->getNumOperands(); 120 121 // Skip over all of the undef values. 122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 123 ++i; 124 125 // Do not accept an all-undef vector. 126 if (i == e) return false; 127 128 // Do not accept build_vectors that aren't all constants or which have non-~0 129 // elements. 130 SDValue NotZero = N->getOperand(i); 131 if (isa<ConstantSDNode>(NotZero)) { 132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 133 return false; 134 } else if (isa<ConstantFPSDNode>(NotZero)) { 135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 136 bitcastToAPInt().isAllOnesValue()) 137 return false; 138 } else 139 return false; 140 141 // Okay, we have at least one ~0 value, check to see if the rest match or are 142 // undefs. 143 for (++i; i != e; ++i) 144 if (N->getOperand(i) != NotZero && 145 N->getOperand(i).getOpcode() != ISD::UNDEF) 146 return false; 147 return true; 148} 149 150 151/// isBuildVectorAllZeros - Return true if the specified node is a 152/// BUILD_VECTOR where all of the elements are 0 or undef. 153bool ISD::isBuildVectorAllZeros(const SDNode *N) { 154 // Look through a bit convert. 155 if (N->getOpcode() == ISD::BIT_CONVERT) 156 N = N->getOperand(0).getNode(); 157 158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 159 160 unsigned i = 0, e = N->getNumOperands(); 161 162 // Skip over all of the undef values. 163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 164 ++i; 165 166 // Do not accept an all-undef vector. 167 if (i == e) return false; 168 169 // Do not accept build_vectors that aren't all constants or which have non-0 170 // elements. 171 SDValue Zero = N->getOperand(i); 172 if (isa<ConstantSDNode>(Zero)) { 173 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 174 return false; 175 } else if (isa<ConstantFPSDNode>(Zero)) { 176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 177 return false; 178 } else 179 return false; 180 181 // Okay, we have at least one 0 value, check to see if the rest match or are 182 // undefs. 183 for (++i; i != e; ++i) 184 if (N->getOperand(i) != Zero && 185 N->getOperand(i).getOpcode() != ISD::UNDEF) 186 return false; 187 return true; 188} 189 190/// isScalarToVector - Return true if the specified node is a 191/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 192/// element is not an undef. 193bool ISD::isScalarToVector(const SDNode *N) { 194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 195 return true; 196 197 if (N->getOpcode() != ISD::BUILD_VECTOR) 198 return false; 199 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 200 return false; 201 unsigned NumElems = N->getNumOperands(); 202 if (NumElems == 1) 203 return false; 204 for (unsigned i = 1; i < NumElems; ++i) { 205 SDValue V = N->getOperand(i); 206 if (V.getOpcode() != ISD::UNDEF) 207 return false; 208 } 209 return true; 210} 211 212/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 213/// when given the operation for (X op Y). 214ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 215 // To perform this operation, we just need to swap the L and G bits of the 216 // operation. 217 unsigned OldL = (Operation >> 2) & 1; 218 unsigned OldG = (Operation >> 1) & 1; 219 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 220 (OldL << 1) | // New G bit 221 (OldG << 2)); // New L bit. 222} 223 224/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 225/// 'op' is a valid SetCC operation. 226ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 227 unsigned Operation = Op; 228 if (isInteger) 229 Operation ^= 7; // Flip L, G, E bits, but not U. 230 else 231 Operation ^= 15; // Flip all of the condition bits. 232 233 if (Operation > ISD::SETTRUE2) 234 Operation &= ~8; // Don't let N and U bits get set. 235 236 return ISD::CondCode(Operation); 237} 238 239 240/// isSignedOp - For an integer comparison, return 1 if the comparison is a 241/// signed operation and 2 if the result is an unsigned comparison. Return zero 242/// if the operation does not depend on the sign of the input (setne and seteq). 243static int isSignedOp(ISD::CondCode Opcode) { 244 switch (Opcode) { 245 default: llvm_unreachable("Illegal integer setcc operation!"); 246 case ISD::SETEQ: 247 case ISD::SETNE: return 0; 248 case ISD::SETLT: 249 case ISD::SETLE: 250 case ISD::SETGT: 251 case ISD::SETGE: return 1; 252 case ISD::SETULT: 253 case ISD::SETULE: 254 case ISD::SETUGT: 255 case ISD::SETUGE: return 2; 256 } 257} 258 259/// getSetCCOrOperation - Return the result of a logical OR between different 260/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 261/// returns SETCC_INVALID if it is not possible to represent the resultant 262/// comparison. 263ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 264 bool isInteger) { 265 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 266 // Cannot fold a signed integer setcc with an unsigned integer setcc. 267 return ISD::SETCC_INVALID; 268 269 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 270 271 // If the N and U bits get set then the resultant comparison DOES suddenly 272 // care about orderedness, and is true when ordered. 273 if (Op > ISD::SETTRUE2) 274 Op &= ~16; // Clear the U bit if the N bit is set. 275 276 // Canonicalize illegal integer setcc's. 277 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 278 Op = ISD::SETNE; 279 280 return ISD::CondCode(Op); 281} 282 283/// getSetCCAndOperation - Return the result of a logical AND between different 284/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 285/// function returns zero if it is not possible to represent the resultant 286/// comparison. 287ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 288 bool isInteger) { 289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 290 // Cannot fold a signed setcc with an unsigned setcc. 291 return ISD::SETCC_INVALID; 292 293 // Combine all of the condition bits. 294 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 295 296 // Canonicalize illegal integer setcc's. 297 if (isInteger) { 298 switch (Result) { 299 default: break; 300 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 301 case ISD::SETOEQ: // SETEQ & SETU[LG]E 302 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 303 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 304 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 305 } 306 } 307 308 return Result; 309} 310 311//===----------------------------------------------------------------------===// 312// SDNode Profile Support 313//===----------------------------------------------------------------------===// 314 315/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 316/// 317static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 318 ID.AddInteger(OpC); 319} 320 321/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 322/// solely with their pointer. 323static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 324 ID.AddPointer(VTList.VTs); 325} 326 327/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 328/// 329static void AddNodeIDOperands(FoldingSetNodeID &ID, 330 const SDValue *Ops, unsigned NumOps) { 331 for (; NumOps; --NumOps, ++Ops) { 332 ID.AddPointer(Ops->getNode()); 333 ID.AddInteger(Ops->getResNo()); 334 } 335} 336 337/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 338/// 339static void AddNodeIDOperands(FoldingSetNodeID &ID, 340 const SDUse *Ops, unsigned NumOps) { 341 for (; NumOps; --NumOps, ++Ops) { 342 ID.AddPointer(Ops->getNode()); 343 ID.AddInteger(Ops->getResNo()); 344 } 345} 346 347static void AddNodeIDNode(FoldingSetNodeID &ID, 348 unsigned short OpC, SDVTList VTList, 349 const SDValue *OpList, unsigned N) { 350 AddNodeIDOpcode(ID, OpC); 351 AddNodeIDValueTypes(ID, VTList); 352 AddNodeIDOperands(ID, OpList, N); 353} 354 355/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 356/// the NodeID data. 357static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 358 switch (N->getOpcode()) { 359 case ISD::TargetExternalSymbol: 360 case ISD::ExternalSymbol: 361 llvm_unreachable("Should only be used on nodes with operands"); 362 default: break; // Normal nodes don't need extra info. 363 case ISD::TargetConstant: 364 case ISD::Constant: 365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 366 break; 367 case ISD::TargetConstantFP: 368 case ISD::ConstantFP: { 369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 370 break; 371 } 372 case ISD::TargetGlobalAddress: 373 case ISD::GlobalAddress: 374 case ISD::TargetGlobalTLSAddress: 375 case ISD::GlobalTLSAddress: { 376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 377 ID.AddPointer(GA->getGlobal()); 378 ID.AddInteger(GA->getOffset()); 379 ID.AddInteger(GA->getTargetFlags()); 380 break; 381 } 382 case ISD::BasicBlock: 383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 384 break; 385 case ISD::Register: 386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 387 break; 388 389 case ISD::SRCVALUE: 390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 391 break; 392 case ISD::FrameIndex: 393 case ISD::TargetFrameIndex: 394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 395 break; 396 case ISD::JumpTable: 397 case ISD::TargetJumpTable: 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 400 break; 401 case ISD::ConstantPool: 402 case ISD::TargetConstantPool: { 403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 404 ID.AddInteger(CP->getAlignment()); 405 ID.AddInteger(CP->getOffset()); 406 if (CP->isMachineConstantPoolEntry()) 407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 408 else 409 ID.AddPointer(CP->getConstVal()); 410 ID.AddInteger(CP->getTargetFlags()); 411 break; 412 } 413 case ISD::LOAD: { 414 const LoadSDNode *LD = cast<LoadSDNode>(N); 415 ID.AddInteger(LD->getMemoryVT().getRawBits()); 416 ID.AddInteger(LD->getRawSubclassData()); 417 break; 418 } 419 case ISD::STORE: { 420 const StoreSDNode *ST = cast<StoreSDNode>(N); 421 ID.AddInteger(ST->getMemoryVT().getRawBits()); 422 ID.AddInteger(ST->getRawSubclassData()); 423 break; 424 } 425 case ISD::ATOMIC_CMP_SWAP: 426 case ISD::ATOMIC_SWAP: 427 case ISD::ATOMIC_LOAD_ADD: 428 case ISD::ATOMIC_LOAD_SUB: 429 case ISD::ATOMIC_LOAD_AND: 430 case ISD::ATOMIC_LOAD_OR: 431 case ISD::ATOMIC_LOAD_XOR: 432 case ISD::ATOMIC_LOAD_NAND: 433 case ISD::ATOMIC_LOAD_MIN: 434 case ISD::ATOMIC_LOAD_MAX: 435 case ISD::ATOMIC_LOAD_UMIN: 436 case ISD::ATOMIC_LOAD_UMAX: { 437 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 438 ID.AddInteger(AT->getMemoryVT().getRawBits()); 439 ID.AddInteger(AT->getRawSubclassData()); 440 break; 441 } 442 case ISD::VECTOR_SHUFFLE: { 443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 445 i != e; ++i) 446 ID.AddInteger(SVN->getMaskElt(i)); 447 break; 448 } 449 case ISD::TargetBlockAddress: 450 case ISD::BlockAddress: { 451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 453 break; 454 } 455 } // end switch (N->getOpcode()) 456} 457 458/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 459/// data. 460static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 461 AddNodeIDOpcode(ID, N->getOpcode()); 462 // Add the return value info. 463 AddNodeIDValueTypes(ID, N->getVTList()); 464 // Add the operand info. 465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 466 467 // Handle SDNode leafs with special info. 468 AddNodeIDCustom(ID, N); 469} 470 471/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 472/// the CSE map that carries volatility, temporalness, indexing mode, and 473/// extension/truncation information. 474/// 475static inline unsigned 476encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 477 bool isNonTemporal) { 478 assert((ConvType & 3) == ConvType && 479 "ConvType may not require more than 2 bits!"); 480 assert((AM & 7) == AM && 481 "AM may not require more than 3 bits!"); 482 return ConvType | 483 (AM << 2) | 484 (isVolatile << 5) | 485 (isNonTemporal << 6); 486} 487 488//===----------------------------------------------------------------------===// 489// SelectionDAG Class 490//===----------------------------------------------------------------------===// 491 492/// doNotCSE - Return true if CSE should not be performed for this node. 493static bool doNotCSE(SDNode *N) { 494 if (N->getValueType(0) == MVT::Flag) 495 return true; // Never CSE anything that produces a flag. 496 497 switch (N->getOpcode()) { 498 default: break; 499 case ISD::HANDLENODE: 500 case ISD::EH_LABEL: 501 return true; // Never CSE these nodes. 502 } 503 504 // Check that remaining values produced are not flags. 505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 506 if (N->getValueType(i) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 return false; 510} 511 512/// RemoveDeadNodes - This method deletes all unreachable nodes in the 513/// SelectionDAG. 514void SelectionDAG::RemoveDeadNodes() { 515 // Create a dummy node (which is not added to allnodes), that adds a reference 516 // to the root node, preventing it from being deleted. 517 HandleSDNode Dummy(getRoot()); 518 519 SmallVector<SDNode*, 128> DeadNodes; 520 521 // Add all obviously-dead nodes to the DeadNodes worklist. 522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 523 if (I->use_empty()) 524 DeadNodes.push_back(I); 525 526 RemoveDeadNodes(DeadNodes); 527 528 // If the root changed (e.g. it was a dead load, update the root). 529 setRoot(Dummy.getValue()); 530} 531 532/// RemoveDeadNodes - This method deletes the unreachable nodes in the 533/// given list, and any nodes that become unreachable as a result. 534void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 535 DAGUpdateListener *UpdateListener) { 536 537 // Process the worklist, deleting the nodes and adding their uses to the 538 // worklist. 539 while (!DeadNodes.empty()) { 540 SDNode *N = DeadNodes.pop_back_val(); 541 542 if (UpdateListener) 543 UpdateListener->NodeDeleted(N, 0); 544 545 // Take the node out of the appropriate CSE map. 546 RemoveNodeFromCSEMaps(N); 547 548 // Next, brutally remove the operand list. This is safe to do, as there are 549 // no cycles in the graph. 550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 551 SDUse &Use = *I++; 552 SDNode *Operand = Use.getNode(); 553 Use.set(SDValue()); 554 555 // Now that we removed this operand, see if there are no uses of it left. 556 if (Operand->use_empty()) 557 DeadNodes.push_back(Operand); 558 } 559 560 DeallocateNode(N); 561 } 562} 563 564void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 565 SmallVector<SDNode*, 16> DeadNodes(1, N); 566 RemoveDeadNodes(DeadNodes, UpdateListener); 567} 568 569void SelectionDAG::DeleteNode(SDNode *N) { 570 // First take this out of the appropriate CSE map. 571 RemoveNodeFromCSEMaps(N); 572 573 // Finally, remove uses due to operands of this node, remove from the 574 // AllNodes list, and delete the node. 575 DeleteNodeNotInCSEMaps(N); 576} 577 578void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 579 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 580 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 581 582 // Drop all of the operands and decrement used node's use counts. 583 N->DropOperands(); 584 585 DeallocateNode(N); 586} 587 588void SelectionDAG::DeallocateNode(SDNode *N) { 589 if (N->OperandsNeedDelete) 590 delete[] N->OperandList; 591 592 // Set the opcode to DELETED_NODE to help catch bugs when node 593 // memory is reallocated. 594 N->NodeType = ISD::DELETED_NODE; 595 596 NodeAllocator.Deallocate(AllNodes.remove(N)); 597 598 // Remove the ordering of this node. 599 Ordering->remove(N); 600 601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 604 DbgVals[i]->setIsInvalidated(); 605} 606 607/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 608/// correspond to it. This is useful when we're about to delete or repurpose 609/// the node. We don't want future request for structurally identical nodes 610/// to return N anymore. 611bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 612 bool Erased = false; 613 switch (N->getOpcode()) { 614 case ISD::EntryToken: 615 llvm_unreachable("EntryToken should not be in CSEMaps!"); 616 return false; 617 case ISD::HANDLENODE: return false; // noop. 618 case ISD::CONDCODE: 619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 620 "Cond code doesn't exist!"); 621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 623 break; 624 case ISD::ExternalSymbol: 625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 626 break; 627 case ISD::TargetExternalSymbol: { 628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 629 Erased = TargetExternalSymbols.erase( 630 std::pair<std::string,unsigned char>(ESN->getSymbol(), 631 ESN->getTargetFlags())); 632 break; 633 } 634 case ISD::VALUETYPE: { 635 EVT VT = cast<VTSDNode>(N)->getVT(); 636 if (VT.isExtended()) { 637 Erased = ExtendedValueTypeNodes.erase(VT); 638 } else { 639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 641 } 642 break; 643 } 644 default: 645 // Remove it from the CSE Map. 646 Erased = CSEMap.RemoveNode(N); 647 break; 648 } 649#ifndef NDEBUG 650 // Verify that the node was actually in one of the CSE maps, unless it has a 651 // flag result (which cannot be CSE'd) or is one of the special cases that are 652 // not subject to CSE. 653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 654 !N->isMachineOpcode() && !doNotCSE(N)) { 655 N->dump(this); 656 dbgs() << "\n"; 657 llvm_unreachable("Node is not in map!"); 658 } 659#endif 660 return Erased; 661} 662 663/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 664/// maps and modified in place. Add it back to the CSE maps, unless an identical 665/// node already exists, in which case transfer all its users to the existing 666/// node. This transfer can potentially trigger recursive merging. 667/// 668void 669SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 670 DAGUpdateListener *UpdateListener) { 671 // For node types that aren't CSE'd, just act as if no identical node 672 // already exists. 673 if (!doNotCSE(N)) { 674 SDNode *Existing = CSEMap.GetOrInsertNode(N); 675 if (Existing != N) { 676 // If there was already an existing matching node, use ReplaceAllUsesWith 677 // to replace the dead one with the existing one. This can cause 678 // recursive merging of other unrelated nodes down the line. 679 ReplaceAllUsesWith(N, Existing, UpdateListener); 680 681 // N is now dead. Inform the listener if it exists and delete it. 682 if (UpdateListener) 683 UpdateListener->NodeDeleted(N, Existing); 684 DeleteNodeNotInCSEMaps(N); 685 return; 686 } 687 } 688 689 // If the node doesn't already exist, we updated it. Inform a listener if 690 // it exists. 691 if (UpdateListener) 692 UpdateListener->NodeUpdated(N); 693} 694 695/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 696/// were replaced with those specified. If this node is never memoized, 697/// return null, otherwise return a pointer to the slot it would take. If a 698/// node already exists with these operands, the slot will be non-null. 699SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 700 void *&InsertPos) { 701 if (doNotCSE(N)) 702 return 0; 703 704 SDValue Ops[] = { Op }; 705 FoldingSetNodeID ID; 706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 707 AddNodeIDCustom(ID, N); 708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 709 return Node; 710} 711 712/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 713/// were replaced with those specified. If this node is never memoized, 714/// return null, otherwise return a pointer to the slot it would take. If a 715/// node already exists with these operands, the slot will be non-null. 716SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 717 SDValue Op1, SDValue Op2, 718 void *&InsertPos) { 719 if (doNotCSE(N)) 720 return 0; 721 722 SDValue Ops[] = { Op1, Op2 }; 723 FoldingSetNodeID ID; 724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 725 AddNodeIDCustom(ID, N); 726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 727 return Node; 728} 729 730 731/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 732/// were replaced with those specified. If this node is never memoized, 733/// return null, otherwise return a pointer to the slot it would take. If a 734/// node already exists with these operands, the slot will be non-null. 735SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 736 const SDValue *Ops,unsigned NumOps, 737 void *&InsertPos) { 738 if (doNotCSE(N)) 739 return 0; 740 741 FoldingSetNodeID ID; 742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 743 AddNodeIDCustom(ID, N); 744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 745 return Node; 746} 747 748/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 749void SelectionDAG::VerifyNode(SDNode *N) { 750 switch (N->getOpcode()) { 751 default: 752 break; 753 case ISD::BUILD_PAIR: { 754 EVT VT = N->getValueType(0); 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 757 "Wrong return type!"); 758 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 760 "Mismatched operand types!"); 761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 762 "Wrong operand type!"); 763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 764 "Wrong return type size"); 765 break; 766 } 767 case ISD::BUILD_VECTOR: { 768 assert(N->getNumValues() == 1 && "Too many results!"); 769 assert(N->getValueType(0).isVector() && "Wrong return type!"); 770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 771 "Wrong number of operands!"); 772 EVT EltVT = N->getValueType(0).getVectorElementType(); 773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 774 assert((I->getValueType() == EltVT || 775 (EltVT.isInteger() && I->getValueType().isInteger() && 776 EltVT.bitsLE(I->getValueType()))) && 777 "Wrong operand type!"); 778 break; 779 } 780 } 781} 782 783/// getEVTAlignment - Compute the default alignment value for the 784/// given type. 785/// 786unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 787 const Type *Ty = VT == MVT::iPTR ? 788 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 789 VT.getTypeForEVT(*getContext()); 790 791 return TLI.getTargetData()->getABITypeAlignment(Ty); 792} 793 794// EntryNode could meaningfully have debug info if we can find it... 795SelectionDAG::SelectionDAG(const TargetMachine &tm) 796 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 797 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 798 Root(getEntryNode()), Ordering(0) { 799 AllNodes.push_back(&EntryNode); 800 Ordering = new SDNodeOrdering(); 801 DbgInfo = new SDDbgInfo(); 802} 803 804void SelectionDAG::init(MachineFunction &mf) { 805 MF = &mf; 806 Context = &mf.getFunction()->getContext(); 807} 808 809SelectionDAG::~SelectionDAG() { 810 allnodes_clear(); 811 delete Ordering; 812 delete DbgInfo; 813} 814 815void SelectionDAG::allnodes_clear() { 816 assert(&*AllNodes.begin() == &EntryNode); 817 AllNodes.remove(AllNodes.begin()); 818 while (!AllNodes.empty()) 819 DeallocateNode(AllNodes.begin()); 820} 821 822void SelectionDAG::clear() { 823 allnodes_clear(); 824 OperandAllocator.Reset(); 825 CSEMap.clear(); 826 827 ExtendedValueTypeNodes.clear(); 828 ExternalSymbols.clear(); 829 TargetExternalSymbols.clear(); 830 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 831 static_cast<CondCodeSDNode*>(0)); 832 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 833 static_cast<SDNode*>(0)); 834 835 EntryNode.UseList = 0; 836 AllNodes.push_back(&EntryNode); 837 Root = getEntryNode(); 838 Ordering->clear(); 839 DbgInfo->clear(); 840} 841 842SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 843 return VT.bitsGT(Op.getValueType()) ? 844 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 845 getNode(ISD::TRUNCATE, DL, VT, Op); 846} 847 848SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 849 return VT.bitsGT(Op.getValueType()) ? 850 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 851 getNode(ISD::TRUNCATE, DL, VT, Op); 852} 853 854SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 855 assert(!VT.isVector() && 856 "getZeroExtendInReg should use the vector element type instead of " 857 "the vector type!"); 858 if (Op.getValueType() == VT) return Op; 859 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 860 APInt Imm = APInt::getLowBitsSet(BitWidth, 861 VT.getSizeInBits()); 862 return getNode(ISD::AND, DL, Op.getValueType(), Op, 863 getConstant(Imm, Op.getValueType())); 864} 865 866/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 867/// 868SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 869 EVT EltVT = VT.getScalarType(); 870 SDValue NegOne = 871 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 872 return getNode(ISD::XOR, DL, VT, Val, NegOne); 873} 874 875SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 876 EVT EltVT = VT.getScalarType(); 877 assert((EltVT.getSizeInBits() >= 64 || 878 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 879 "getConstant with a uint64_t value that doesn't fit in the type!"); 880 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 881} 882 883SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 884 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 885} 886 887SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 888 assert(VT.isInteger() && "Cannot create FP integer constant!"); 889 890 EVT EltVT = VT.getScalarType(); 891 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 892 "APInt size does not match type size!"); 893 894 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 895 FoldingSetNodeID ID; 896 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 897 ID.AddPointer(&Val); 898 void *IP = 0; 899 SDNode *N = NULL; 900 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 901 if (!VT.isVector()) 902 return SDValue(N, 0); 903 904 if (!N) { 905 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 906 CSEMap.InsertNode(N, IP); 907 AllNodes.push_back(N); 908 } 909 910 SDValue Result(N, 0); 911 if (VT.isVector()) { 912 SmallVector<SDValue, 8> Ops; 913 Ops.assign(VT.getVectorNumElements(), Result); 914 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 915 } 916 return Result; 917} 918 919SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 920 return getConstant(Val, TLI.getPointerTy(), isTarget); 921} 922 923 924SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 925 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 926} 927 928SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 929 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 930 931 EVT EltVT = VT.getScalarType(); 932 933 // Do the map lookup using the actual bit pattern for the floating point 934 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 935 // we don't have issues with SNANs. 936 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 937 FoldingSetNodeID ID; 938 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 939 ID.AddPointer(&V); 940 void *IP = 0; 941 SDNode *N = NULL; 942 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 943 if (!VT.isVector()) 944 return SDValue(N, 0); 945 946 if (!N) { 947 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 948 CSEMap.InsertNode(N, IP); 949 AllNodes.push_back(N); 950 } 951 952 SDValue Result(N, 0); 953 if (VT.isVector()) { 954 SmallVector<SDValue, 8> Ops; 955 Ops.assign(VT.getVectorNumElements(), Result); 956 // FIXME DebugLoc info might be appropriate here 957 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 958 } 959 return Result; 960} 961 962SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 963 EVT EltVT = VT.getScalarType(); 964 if (EltVT==MVT::f32) 965 return getConstantFP(APFloat((float)Val), VT, isTarget); 966 else if (EltVT==MVT::f64) 967 return getConstantFP(APFloat(Val), VT, isTarget); 968 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 969 bool ignored; 970 APFloat apf = APFloat(Val); 971 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 972 &ignored); 973 return getConstantFP(apf, VT, isTarget); 974 } else { 975 assert(0 && "Unsupported type in getConstantFP"); 976 return SDValue(); 977 } 978} 979 980SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 981 EVT VT, int64_t Offset, 982 bool isTargetGA, 983 unsigned char TargetFlags) { 984 assert((TargetFlags == 0 || isTargetGA) && 985 "Cannot set target flags on target-independent globals"); 986 987 // Truncate (with sign-extension) the offset value to the pointer size. 988 EVT PTy = TLI.getPointerTy(); 989 unsigned BitWidth = PTy.getSizeInBits(); 990 if (BitWidth < 64) 991 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 992 993 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 994 if (!GVar) { 995 // If GV is an alias then use the aliasee for determining thread-localness. 996 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 997 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 998 } 999 1000 unsigned Opc; 1001 if (GVar && GVar->isThreadLocal()) 1002 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1003 else 1004 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1005 1006 FoldingSetNodeID ID; 1007 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1008 ID.AddPointer(GV); 1009 ID.AddInteger(Offset); 1010 ID.AddInteger(TargetFlags); 1011 void *IP = 0; 1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1013 return SDValue(E, 0); 1014 1015 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1016 Offset, TargetFlags); 1017 CSEMap.InsertNode(N, IP); 1018 AllNodes.push_back(N); 1019 return SDValue(N, 0); 1020} 1021 1022SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1023 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1024 FoldingSetNodeID ID; 1025 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1026 ID.AddInteger(FI); 1027 void *IP = 0; 1028 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1029 return SDValue(E, 0); 1030 1031 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1032 CSEMap.InsertNode(N, IP); 1033 AllNodes.push_back(N); 1034 return SDValue(N, 0); 1035} 1036 1037SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1038 unsigned char TargetFlags) { 1039 assert((TargetFlags == 0 || isTarget) && 1040 "Cannot set target flags on target-independent jump tables"); 1041 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1042 FoldingSetNodeID ID; 1043 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1044 ID.AddInteger(JTI); 1045 ID.AddInteger(TargetFlags); 1046 void *IP = 0; 1047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1048 return SDValue(E, 0); 1049 1050 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1051 TargetFlags); 1052 CSEMap.InsertNode(N, IP); 1053 AllNodes.push_back(N); 1054 return SDValue(N, 0); 1055} 1056 1057SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1058 unsigned Alignment, int Offset, 1059 bool isTarget, 1060 unsigned char TargetFlags) { 1061 assert((TargetFlags == 0 || isTarget) && 1062 "Cannot set target flags on target-independent globals"); 1063 if (Alignment == 0) 1064 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1065 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1066 FoldingSetNodeID ID; 1067 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1068 ID.AddInteger(Alignment); 1069 ID.AddInteger(Offset); 1070 ID.AddPointer(C); 1071 ID.AddInteger(TargetFlags); 1072 void *IP = 0; 1073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1074 return SDValue(E, 0); 1075 1076 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1077 Alignment, TargetFlags); 1078 CSEMap.InsertNode(N, IP); 1079 AllNodes.push_back(N); 1080 return SDValue(N, 0); 1081} 1082 1083 1084SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1085 unsigned Alignment, int Offset, 1086 bool isTarget, 1087 unsigned char TargetFlags) { 1088 assert((TargetFlags == 0 || isTarget) && 1089 "Cannot set target flags on target-independent globals"); 1090 if (Alignment == 0) 1091 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1092 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1093 FoldingSetNodeID ID; 1094 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1095 ID.AddInteger(Alignment); 1096 ID.AddInteger(Offset); 1097 C->AddSelectionDAGCSEId(ID); 1098 ID.AddInteger(TargetFlags); 1099 void *IP = 0; 1100 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1101 return SDValue(E, 0); 1102 1103 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1104 Alignment, TargetFlags); 1105 CSEMap.InsertNode(N, IP); 1106 AllNodes.push_back(N); 1107 return SDValue(N, 0); 1108} 1109 1110SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1111 FoldingSetNodeID ID; 1112 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1113 ID.AddPointer(MBB); 1114 void *IP = 0; 1115 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1116 return SDValue(E, 0); 1117 1118 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1119 CSEMap.InsertNode(N, IP); 1120 AllNodes.push_back(N); 1121 return SDValue(N, 0); 1122} 1123 1124SDValue SelectionDAG::getValueType(EVT VT) { 1125 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1126 ValueTypeNodes.size()) 1127 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1128 1129 SDNode *&N = VT.isExtended() ? 1130 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1131 1132 if (N) return SDValue(N, 0); 1133 N = new (NodeAllocator) VTSDNode(VT); 1134 AllNodes.push_back(N); 1135 return SDValue(N, 0); 1136} 1137 1138SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1139 SDNode *&N = ExternalSymbols[Sym]; 1140 if (N) return SDValue(N, 0); 1141 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1142 AllNodes.push_back(N); 1143 return SDValue(N, 0); 1144} 1145 1146SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1147 unsigned char TargetFlags) { 1148 SDNode *&N = 1149 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1150 TargetFlags)]; 1151 if (N) return SDValue(N, 0); 1152 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1153 AllNodes.push_back(N); 1154 return SDValue(N, 0); 1155} 1156 1157SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1158 if ((unsigned)Cond >= CondCodeNodes.size()) 1159 CondCodeNodes.resize(Cond+1); 1160 1161 if (CondCodeNodes[Cond] == 0) { 1162 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1163 CondCodeNodes[Cond] = N; 1164 AllNodes.push_back(N); 1165 } 1166 1167 return SDValue(CondCodeNodes[Cond], 0); 1168} 1169 1170// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1171// the shuffle mask M that point at N1 to point at N2, and indices that point 1172// N2 to point at N1. 1173static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1174 std::swap(N1, N2); 1175 int NElts = M.size(); 1176 for (int i = 0; i != NElts; ++i) { 1177 if (M[i] >= NElts) 1178 M[i] -= NElts; 1179 else if (M[i] >= 0) 1180 M[i] += NElts; 1181 } 1182} 1183 1184SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1185 SDValue N2, const int *Mask) { 1186 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1187 assert(VT.isVector() && N1.getValueType().isVector() && 1188 "Vector Shuffle VTs must be a vectors"); 1189 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1190 && "Vector Shuffle VTs must have same element type"); 1191 1192 // Canonicalize shuffle undef, undef -> undef 1193 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1194 return getUNDEF(VT); 1195 1196 // Validate that all indices in Mask are within the range of the elements 1197 // input to the shuffle. 1198 unsigned NElts = VT.getVectorNumElements(); 1199 SmallVector<int, 8> MaskVec; 1200 for (unsigned i = 0; i != NElts; ++i) { 1201 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1202 MaskVec.push_back(Mask[i]); 1203 } 1204 1205 // Canonicalize shuffle v, v -> v, undef 1206 if (N1 == N2) { 1207 N2 = getUNDEF(VT); 1208 for (unsigned i = 0; i != NElts; ++i) 1209 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1210 } 1211 1212 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1213 if (N1.getOpcode() == ISD::UNDEF) 1214 commuteShuffle(N1, N2, MaskVec); 1215 1216 // Canonicalize all index into lhs, -> shuffle lhs, undef 1217 // Canonicalize all index into rhs, -> shuffle rhs, undef 1218 bool AllLHS = true, AllRHS = true; 1219 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1220 for (unsigned i = 0; i != NElts; ++i) { 1221 if (MaskVec[i] >= (int)NElts) { 1222 if (N2Undef) 1223 MaskVec[i] = -1; 1224 else 1225 AllLHS = false; 1226 } else if (MaskVec[i] >= 0) { 1227 AllRHS = false; 1228 } 1229 } 1230 if (AllLHS && AllRHS) 1231 return getUNDEF(VT); 1232 if (AllLHS && !N2Undef) 1233 N2 = getUNDEF(VT); 1234 if (AllRHS) { 1235 N1 = getUNDEF(VT); 1236 commuteShuffle(N1, N2, MaskVec); 1237 } 1238 1239 // If Identity shuffle, or all shuffle in to undef, return that node. 1240 bool AllUndef = true; 1241 bool Identity = true; 1242 for (unsigned i = 0; i != NElts; ++i) { 1243 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1244 if (MaskVec[i] >= 0) AllUndef = false; 1245 } 1246 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1247 return N1; 1248 if (AllUndef) 1249 return getUNDEF(VT); 1250 1251 FoldingSetNodeID ID; 1252 SDValue Ops[2] = { N1, N2 }; 1253 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1254 for (unsigned i = 0; i != NElts; ++i) 1255 ID.AddInteger(MaskVec[i]); 1256 1257 void* IP = 0; 1258 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1259 return SDValue(E, 0); 1260 1261 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1262 // SDNode doesn't have access to it. This memory will be "leaked" when 1263 // the node is deallocated, but recovered when the NodeAllocator is released. 1264 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1265 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1266 1267 ShuffleVectorSDNode *N = 1268 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1269 CSEMap.InsertNode(N, IP); 1270 AllNodes.push_back(N); 1271 return SDValue(N, 0); 1272} 1273 1274SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1275 SDValue Val, SDValue DTy, 1276 SDValue STy, SDValue Rnd, SDValue Sat, 1277 ISD::CvtCode Code) { 1278 // If the src and dest types are the same and the conversion is between 1279 // integer types of the same sign or two floats, no conversion is necessary. 1280 if (DTy == STy && 1281 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1282 return Val; 1283 1284 FoldingSetNodeID ID; 1285 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1286 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1287 void* IP = 0; 1288 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1289 return SDValue(E, 0); 1290 1291 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1292 Code); 1293 CSEMap.InsertNode(N, IP); 1294 AllNodes.push_back(N); 1295 return SDValue(N, 0); 1296} 1297 1298SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1299 FoldingSetNodeID ID; 1300 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1301 ID.AddInteger(RegNo); 1302 void *IP = 0; 1303 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1304 return SDValue(E, 0); 1305 1306 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1307 CSEMap.InsertNode(N, IP); 1308 AllNodes.push_back(N); 1309 return SDValue(N, 0); 1310} 1311 1312SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1313 FoldingSetNodeID ID; 1314 SDValue Ops[] = { Root }; 1315 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1316 ID.AddPointer(Label); 1317 void *IP = 0; 1318 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1319 return SDValue(E, 0); 1320 1321 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1322 CSEMap.InsertNode(N, IP); 1323 AllNodes.push_back(N); 1324 return SDValue(N, 0); 1325} 1326 1327 1328SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1329 bool isTarget, 1330 unsigned char TargetFlags) { 1331 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1332 1333 FoldingSetNodeID ID; 1334 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1335 ID.AddPointer(BA); 1336 ID.AddInteger(TargetFlags); 1337 void *IP = 0; 1338 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1339 return SDValue(E, 0); 1340 1341 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1342 CSEMap.InsertNode(N, IP); 1343 AllNodes.push_back(N); 1344 return SDValue(N, 0); 1345} 1346 1347SDValue SelectionDAG::getSrcValue(const Value *V) { 1348 assert((!V || V->getType()->isPointerTy()) && 1349 "SrcValue is not a pointer?"); 1350 1351 FoldingSetNodeID ID; 1352 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1353 ID.AddPointer(V); 1354 1355 void *IP = 0; 1356 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1357 return SDValue(E, 0); 1358 1359 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1360 CSEMap.InsertNode(N, IP); 1361 AllNodes.push_back(N); 1362 return SDValue(N, 0); 1363} 1364 1365/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1366SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1367 FoldingSetNodeID ID; 1368 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1369 ID.AddPointer(MD); 1370 1371 void *IP = 0; 1372 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1373 return SDValue(E, 0); 1374 1375 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1376 CSEMap.InsertNode(N, IP); 1377 AllNodes.push_back(N); 1378 return SDValue(N, 0); 1379} 1380 1381 1382/// getShiftAmountOperand - Return the specified value casted to 1383/// the target's desired shift amount type. 1384SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1385 EVT OpTy = Op.getValueType(); 1386 MVT ShTy = TLI.getShiftAmountTy(); 1387 if (OpTy == ShTy || OpTy.isVector()) return Op; 1388 1389 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1390 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1391} 1392 1393/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1394/// specified value type. 1395SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1396 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1397 unsigned ByteSize = VT.getStoreSize(); 1398 const Type *Ty = VT.getTypeForEVT(*getContext()); 1399 unsigned StackAlign = 1400 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1401 1402 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1403 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1404} 1405 1406/// CreateStackTemporary - Create a stack temporary suitable for holding 1407/// either of the specified value types. 1408SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1409 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1410 VT2.getStoreSizeInBits())/8; 1411 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1412 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1413 const TargetData *TD = TLI.getTargetData(); 1414 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1415 TD->getPrefTypeAlignment(Ty2)); 1416 1417 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1418 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1419 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1420} 1421 1422SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1423 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1424 // These setcc operations always fold. 1425 switch (Cond) { 1426 default: break; 1427 case ISD::SETFALSE: 1428 case ISD::SETFALSE2: return getConstant(0, VT); 1429 case ISD::SETTRUE: 1430 case ISD::SETTRUE2: return getConstant(1, VT); 1431 1432 case ISD::SETOEQ: 1433 case ISD::SETOGT: 1434 case ISD::SETOGE: 1435 case ISD::SETOLT: 1436 case ISD::SETOLE: 1437 case ISD::SETONE: 1438 case ISD::SETO: 1439 case ISD::SETUO: 1440 case ISD::SETUEQ: 1441 case ISD::SETUNE: 1442 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1443 break; 1444 } 1445 1446 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1447 const APInt &C2 = N2C->getAPIntValue(); 1448 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1449 const APInt &C1 = N1C->getAPIntValue(); 1450 1451 switch (Cond) { 1452 default: llvm_unreachable("Unknown integer setcc!"); 1453 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1454 case ISD::SETNE: return getConstant(C1 != C2, VT); 1455 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1456 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1457 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1458 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1459 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1460 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1461 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1462 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1463 } 1464 } 1465 } 1466 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1467 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1468 // No compile time operations on this type yet. 1469 if (N1C->getValueType(0) == MVT::ppcf128) 1470 return SDValue(); 1471 1472 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1473 switch (Cond) { 1474 default: break; 1475 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1476 return getUNDEF(VT); 1477 // fall through 1478 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1479 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1480 return getUNDEF(VT); 1481 // fall through 1482 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1483 R==APFloat::cmpLessThan, VT); 1484 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1485 return getUNDEF(VT); 1486 // fall through 1487 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1488 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1489 return getUNDEF(VT); 1490 // fall through 1491 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1492 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1493 return getUNDEF(VT); 1494 // fall through 1495 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1496 R==APFloat::cmpEqual, VT); 1497 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1498 return getUNDEF(VT); 1499 // fall through 1500 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1501 R==APFloat::cmpEqual, VT); 1502 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1503 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1504 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1505 R==APFloat::cmpEqual, VT); 1506 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1507 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1508 R==APFloat::cmpLessThan, VT); 1509 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1510 R==APFloat::cmpUnordered, VT); 1511 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1512 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1513 } 1514 } else { 1515 // Ensure that the constant occurs on the RHS. 1516 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1517 } 1518 } 1519 1520 // Could not fold it. 1521 return SDValue(); 1522} 1523 1524/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1525/// use this predicate to simplify operations downstream. 1526bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1527 // This predicate is not safe for vector operations. 1528 if (Op.getValueType().isVector()) 1529 return false; 1530 1531 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1532 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1533} 1534 1535/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1536/// this predicate to simplify operations downstream. Mask is known to be zero 1537/// for bits that V cannot have. 1538bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1539 unsigned Depth) const { 1540 APInt KnownZero, KnownOne; 1541 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1542 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1543 return (KnownZero & Mask) == Mask; 1544} 1545 1546/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1547/// known to be either zero or one and return them in the KnownZero/KnownOne 1548/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1549/// processing. 1550void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1551 APInt &KnownZero, APInt &KnownOne, 1552 unsigned Depth) const { 1553 unsigned BitWidth = Mask.getBitWidth(); 1554 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1555 "Mask size mismatches value type size!"); 1556 1557 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1558 if (Depth == 6 || Mask == 0) 1559 return; // Limit search depth. 1560 1561 APInt KnownZero2, KnownOne2; 1562 1563 switch (Op.getOpcode()) { 1564 case ISD::Constant: 1565 // We know all of the bits for a constant! 1566 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1567 KnownZero = ~KnownOne & Mask; 1568 return; 1569 case ISD::AND: 1570 // If either the LHS or the RHS are Zero, the result is zero. 1571 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1572 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1573 KnownZero2, KnownOne2, Depth+1); 1574 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1575 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1576 1577 // Output known-1 bits are only known if set in both the LHS & RHS. 1578 KnownOne &= KnownOne2; 1579 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1580 KnownZero |= KnownZero2; 1581 return; 1582 case ISD::OR: 1583 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1584 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1585 KnownZero2, KnownOne2, Depth+1); 1586 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1587 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1588 1589 // Output known-0 bits are only known if clear in both the LHS & RHS. 1590 KnownZero &= KnownZero2; 1591 // Output known-1 are known to be set if set in either the LHS | RHS. 1592 KnownOne |= KnownOne2; 1593 return; 1594 case ISD::XOR: { 1595 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1596 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1597 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1598 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1599 1600 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1601 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1602 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1603 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1604 KnownZero = KnownZeroOut; 1605 return; 1606 } 1607 case ISD::MUL: { 1608 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1609 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1610 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1612 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1613 1614 // If low bits are zero in either operand, output low known-0 bits. 1615 // Also compute a conserative estimate for high known-0 bits. 1616 // More trickiness is possible, but this is sufficient for the 1617 // interesting case of alignment computation. 1618 KnownOne.clear(); 1619 unsigned TrailZ = KnownZero.countTrailingOnes() + 1620 KnownZero2.countTrailingOnes(); 1621 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1622 KnownZero2.countLeadingOnes(), 1623 BitWidth) - BitWidth; 1624 1625 TrailZ = std::min(TrailZ, BitWidth); 1626 LeadZ = std::min(LeadZ, BitWidth); 1627 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1628 APInt::getHighBitsSet(BitWidth, LeadZ); 1629 KnownZero &= Mask; 1630 return; 1631 } 1632 case ISD::UDIV: { 1633 // For the purposes of computing leading zeros we can conservatively 1634 // treat a udiv as a logical right shift by the power of 2 known to 1635 // be less than the denominator. 1636 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1637 ComputeMaskedBits(Op.getOperand(0), 1638 AllOnes, KnownZero2, KnownOne2, Depth+1); 1639 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1640 1641 KnownOne2.clear(); 1642 KnownZero2.clear(); 1643 ComputeMaskedBits(Op.getOperand(1), 1644 AllOnes, KnownZero2, KnownOne2, Depth+1); 1645 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1646 if (RHSUnknownLeadingOnes != BitWidth) 1647 LeadZ = std::min(BitWidth, 1648 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1649 1650 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1651 return; 1652 } 1653 case ISD::SELECT: 1654 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1655 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1656 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1657 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1658 1659 // Only known if known in both the LHS and RHS. 1660 KnownOne &= KnownOne2; 1661 KnownZero &= KnownZero2; 1662 return; 1663 case ISD::SELECT_CC: 1664 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1665 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1666 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1667 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1668 1669 // Only known if known in both the LHS and RHS. 1670 KnownOne &= KnownOne2; 1671 KnownZero &= KnownZero2; 1672 return; 1673 case ISD::SADDO: 1674 case ISD::UADDO: 1675 case ISD::SSUBO: 1676 case ISD::USUBO: 1677 case ISD::SMULO: 1678 case ISD::UMULO: 1679 if (Op.getResNo() != 1) 1680 return; 1681 // The boolean result conforms to getBooleanContents. Fall through. 1682 case ISD::SETCC: 1683 // If we know the result of a setcc has the top bits zero, use this info. 1684 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1685 BitWidth > 1) 1686 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1687 return; 1688 case ISD::SHL: 1689 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1690 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1691 unsigned ShAmt = SA->getZExtValue(); 1692 1693 // If the shift count is an invalid immediate, don't do anything. 1694 if (ShAmt >= BitWidth) 1695 return; 1696 1697 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1698 KnownZero, KnownOne, Depth+1); 1699 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1700 KnownZero <<= ShAmt; 1701 KnownOne <<= ShAmt; 1702 // low bits known zero. 1703 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1704 } 1705 return; 1706 case ISD::SRL: 1707 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1708 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1709 unsigned ShAmt = SA->getZExtValue(); 1710 1711 // If the shift count is an invalid immediate, don't do anything. 1712 if (ShAmt >= BitWidth) 1713 return; 1714 1715 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1716 KnownZero, KnownOne, Depth+1); 1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1718 KnownZero = KnownZero.lshr(ShAmt); 1719 KnownOne = KnownOne.lshr(ShAmt); 1720 1721 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1722 KnownZero |= HighBits; // High bits known zero. 1723 } 1724 return; 1725 case ISD::SRA: 1726 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1727 unsigned ShAmt = SA->getZExtValue(); 1728 1729 // If the shift count is an invalid immediate, don't do anything. 1730 if (ShAmt >= BitWidth) 1731 return; 1732 1733 APInt InDemandedMask = (Mask << ShAmt); 1734 // If any of the demanded bits are produced by the sign extension, we also 1735 // demand the input sign bit. 1736 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1737 if (HighBits.getBoolValue()) 1738 InDemandedMask |= APInt::getSignBit(BitWidth); 1739 1740 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1741 Depth+1); 1742 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1743 KnownZero = KnownZero.lshr(ShAmt); 1744 KnownOne = KnownOne.lshr(ShAmt); 1745 1746 // Handle the sign bits. 1747 APInt SignBit = APInt::getSignBit(BitWidth); 1748 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1749 1750 if (KnownZero.intersects(SignBit)) { 1751 KnownZero |= HighBits; // New bits are known zero. 1752 } else if (KnownOne.intersects(SignBit)) { 1753 KnownOne |= HighBits; // New bits are known one. 1754 } 1755 } 1756 return; 1757 case ISD::SIGN_EXTEND_INREG: { 1758 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1759 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1760 1761 // Sign extension. Compute the demanded bits in the result that are not 1762 // present in the input. 1763 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1764 1765 APInt InSignBit = APInt::getSignBit(EBits); 1766 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1767 1768 // If the sign extended bits are demanded, we know that the sign 1769 // bit is demanded. 1770 InSignBit.zext(BitWidth); 1771 if (NewBits.getBoolValue()) 1772 InputDemandedBits |= InSignBit; 1773 1774 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1775 KnownZero, KnownOne, Depth+1); 1776 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1777 1778 // If the sign bit of the input is known set or clear, then we know the 1779 // top bits of the result. 1780 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1781 KnownZero |= NewBits; 1782 KnownOne &= ~NewBits; 1783 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1784 KnownOne |= NewBits; 1785 KnownZero &= ~NewBits; 1786 } else { // Input sign bit unknown 1787 KnownZero &= ~NewBits; 1788 KnownOne &= ~NewBits; 1789 } 1790 return; 1791 } 1792 case ISD::CTTZ: 1793 case ISD::CTLZ: 1794 case ISD::CTPOP: { 1795 unsigned LowBits = Log2_32(BitWidth)+1; 1796 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1797 KnownOne.clear(); 1798 return; 1799 } 1800 case ISD::LOAD: { 1801 if (ISD::isZEXTLoad(Op.getNode())) { 1802 LoadSDNode *LD = cast<LoadSDNode>(Op); 1803 EVT VT = LD->getMemoryVT(); 1804 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1805 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1806 } 1807 return; 1808 } 1809 case ISD::ZERO_EXTEND: { 1810 EVT InVT = Op.getOperand(0).getValueType(); 1811 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1812 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1813 APInt InMask = Mask; 1814 InMask.trunc(InBits); 1815 KnownZero.trunc(InBits); 1816 KnownOne.trunc(InBits); 1817 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1818 KnownZero.zext(BitWidth); 1819 KnownOne.zext(BitWidth); 1820 KnownZero |= NewBits; 1821 return; 1822 } 1823 case ISD::SIGN_EXTEND: { 1824 EVT InVT = Op.getOperand(0).getValueType(); 1825 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1826 APInt InSignBit = APInt::getSignBit(InBits); 1827 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1828 APInt InMask = Mask; 1829 InMask.trunc(InBits); 1830 1831 // If any of the sign extended bits are demanded, we know that the sign 1832 // bit is demanded. Temporarily set this bit in the mask for our callee. 1833 if (NewBits.getBoolValue()) 1834 InMask |= InSignBit; 1835 1836 KnownZero.trunc(InBits); 1837 KnownOne.trunc(InBits); 1838 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1839 1840 // Note if the sign bit is known to be zero or one. 1841 bool SignBitKnownZero = KnownZero.isNegative(); 1842 bool SignBitKnownOne = KnownOne.isNegative(); 1843 assert(!(SignBitKnownZero && SignBitKnownOne) && 1844 "Sign bit can't be known to be both zero and one!"); 1845 1846 // If the sign bit wasn't actually demanded by our caller, we don't 1847 // want it set in the KnownZero and KnownOne result values. Reset the 1848 // mask and reapply it to the result values. 1849 InMask = Mask; 1850 InMask.trunc(InBits); 1851 KnownZero &= InMask; 1852 KnownOne &= InMask; 1853 1854 KnownZero.zext(BitWidth); 1855 KnownOne.zext(BitWidth); 1856 1857 // If the sign bit is known zero or one, the top bits match. 1858 if (SignBitKnownZero) 1859 KnownZero |= NewBits; 1860 else if (SignBitKnownOne) 1861 KnownOne |= NewBits; 1862 return; 1863 } 1864 case ISD::ANY_EXTEND: { 1865 EVT InVT = Op.getOperand(0).getValueType(); 1866 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1867 APInt InMask = Mask; 1868 InMask.trunc(InBits); 1869 KnownZero.trunc(InBits); 1870 KnownOne.trunc(InBits); 1871 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1872 KnownZero.zext(BitWidth); 1873 KnownOne.zext(BitWidth); 1874 return; 1875 } 1876 case ISD::TRUNCATE: { 1877 EVT InVT = Op.getOperand(0).getValueType(); 1878 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1879 APInt InMask = Mask; 1880 InMask.zext(InBits); 1881 KnownZero.zext(InBits); 1882 KnownOne.zext(InBits); 1883 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1884 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1885 KnownZero.trunc(BitWidth); 1886 KnownOne.trunc(BitWidth); 1887 break; 1888 } 1889 case ISD::AssertZext: { 1890 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1891 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1892 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1893 KnownOne, Depth+1); 1894 KnownZero |= (~InMask) & Mask; 1895 return; 1896 } 1897 case ISD::FGETSIGN: 1898 // All bits are zero except the low bit. 1899 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1900 return; 1901 1902 case ISD::SUB: { 1903 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1904 // We know that the top bits of C-X are clear if X contains less bits 1905 // than C (i.e. no wrap-around can happen). For example, 20-X is 1906 // positive if we can prove that X is >= 0 and < 16. 1907 if (CLHS->getAPIntValue().isNonNegative()) { 1908 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1909 // NLZ can't be BitWidth with no sign bit 1910 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1911 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1912 Depth+1); 1913 1914 // If all of the MaskV bits are known to be zero, then we know the 1915 // output top bits are zero, because we now know that the output is 1916 // from [0-C]. 1917 if ((KnownZero2 & MaskV) == MaskV) { 1918 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1919 // Top bits known zero. 1920 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1921 } 1922 } 1923 } 1924 } 1925 // fall through 1926 case ISD::ADD: { 1927 // Output known-0 bits are known if clear or set in both the low clear bits 1928 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1929 // low 3 bits clear. 1930 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1931 BitWidth - Mask.countLeadingZeros()); 1932 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1933 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1934 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1935 1936 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1937 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1938 KnownZeroOut = std::min(KnownZeroOut, 1939 KnownZero2.countTrailingOnes()); 1940 1941 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1942 return; 1943 } 1944 case ISD::SREM: 1945 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1946 const APInt &RA = Rem->getAPIntValue().abs(); 1947 if (RA.isPowerOf2()) { 1948 APInt LowBits = RA - 1; 1949 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1950 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1951 1952 // The low bits of the first operand are unchanged by the srem. 1953 KnownZero = KnownZero2 & LowBits; 1954 KnownOne = KnownOne2 & LowBits; 1955 1956 // If the first operand is non-negative or has all low bits zero, then 1957 // the upper bits are all zero. 1958 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1959 KnownZero |= ~LowBits; 1960 1961 // If the first operand is negative and not all low bits are zero, then 1962 // the upper bits are all one. 1963 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1964 KnownOne |= ~LowBits; 1965 1966 KnownZero &= Mask; 1967 KnownOne &= Mask; 1968 1969 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1970 } 1971 } 1972 return; 1973 case ISD::UREM: { 1974 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1975 const APInt &RA = Rem->getAPIntValue(); 1976 if (RA.isPowerOf2()) { 1977 APInt LowBits = (RA - 1); 1978 APInt Mask2 = LowBits & Mask; 1979 KnownZero |= ~LowBits & Mask; 1980 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1981 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1982 break; 1983 } 1984 } 1985 1986 // Since the result is less than or equal to either operand, any leading 1987 // zero bits in either operand must also exist in the result. 1988 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1989 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1990 Depth+1); 1991 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1992 Depth+1); 1993 1994 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1995 KnownZero2.countLeadingOnes()); 1996 KnownOne.clear(); 1997 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1998 return; 1999 } 2000 default: 2001 // Allow the target to implement this method for its nodes. 2002 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2003 case ISD::INTRINSIC_WO_CHAIN: 2004 case ISD::INTRINSIC_W_CHAIN: 2005 case ISD::INTRINSIC_VOID: 2006 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2007 Depth); 2008 } 2009 return; 2010 } 2011} 2012 2013/// ComputeNumSignBits - Return the number of times the sign bit of the 2014/// register is replicated into the other bits. We know that at least 1 bit 2015/// is always equal to the sign bit (itself), but other cases can give us 2016/// information. For example, immediately after an "SRA X, 2", we know that 2017/// the top 3 bits are all equal to each other, so we return 3. 2018unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2019 EVT VT = Op.getValueType(); 2020 assert(VT.isInteger() && "Invalid VT!"); 2021 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2022 unsigned Tmp, Tmp2; 2023 unsigned FirstAnswer = 1; 2024 2025 if (Depth == 6) 2026 return 1; // Limit search depth. 2027 2028 switch (Op.getOpcode()) { 2029 default: break; 2030 case ISD::AssertSext: 2031 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2032 return VTBits-Tmp+1; 2033 case ISD::AssertZext: 2034 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2035 return VTBits-Tmp; 2036 2037 case ISD::Constant: { 2038 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2039 // If negative, return # leading ones. 2040 if (Val.isNegative()) 2041 return Val.countLeadingOnes(); 2042 2043 // Return # leading zeros. 2044 return Val.countLeadingZeros(); 2045 } 2046 2047 case ISD::SIGN_EXTEND: 2048 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2049 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2050 2051 case ISD::SIGN_EXTEND_INREG: 2052 // Max of the input and what this extends. 2053 Tmp = 2054 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2055 Tmp = VTBits-Tmp+1; 2056 2057 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2058 return std::max(Tmp, Tmp2); 2059 2060 case ISD::SRA: 2061 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2062 // SRA X, C -> adds C sign bits. 2063 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2064 Tmp += C->getZExtValue(); 2065 if (Tmp > VTBits) Tmp = VTBits; 2066 } 2067 return Tmp; 2068 case ISD::SHL: 2069 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2070 // shl destroys sign bits. 2071 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2072 if (C->getZExtValue() >= VTBits || // Bad shift. 2073 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2074 return Tmp - C->getZExtValue(); 2075 } 2076 break; 2077 case ISD::AND: 2078 case ISD::OR: 2079 case ISD::XOR: // NOT is handled here. 2080 // Logical binary ops preserve the number of sign bits at the worst. 2081 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2082 if (Tmp != 1) { 2083 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2084 FirstAnswer = std::min(Tmp, Tmp2); 2085 // We computed what we know about the sign bits as our first 2086 // answer. Now proceed to the generic code that uses 2087 // ComputeMaskedBits, and pick whichever answer is better. 2088 } 2089 break; 2090 2091 case ISD::SELECT: 2092 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2093 if (Tmp == 1) return 1; // Early out. 2094 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2095 return std::min(Tmp, Tmp2); 2096 2097 case ISD::SADDO: 2098 case ISD::UADDO: 2099 case ISD::SSUBO: 2100 case ISD::USUBO: 2101 case ISD::SMULO: 2102 case ISD::UMULO: 2103 if (Op.getResNo() != 1) 2104 break; 2105 // The boolean result conforms to getBooleanContents. Fall through. 2106 case ISD::SETCC: 2107 // If setcc returns 0/-1, all bits are sign bits. 2108 if (TLI.getBooleanContents() == 2109 TargetLowering::ZeroOrNegativeOneBooleanContent) 2110 return VTBits; 2111 break; 2112 case ISD::ROTL: 2113 case ISD::ROTR: 2114 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2115 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2116 2117 // Handle rotate right by N like a rotate left by 32-N. 2118 if (Op.getOpcode() == ISD::ROTR) 2119 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2120 2121 // If we aren't rotating out all of the known-in sign bits, return the 2122 // number that are left. This handles rotl(sext(x), 1) for example. 2123 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2124 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2125 } 2126 break; 2127 case ISD::ADD: 2128 // Add can have at most one carry bit. Thus we know that the output 2129 // is, at worst, one more bit than the inputs. 2130 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2131 if (Tmp == 1) return 1; // Early out. 2132 2133 // Special case decrementing a value (ADD X, -1): 2134 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2135 if (CRHS->isAllOnesValue()) { 2136 APInt KnownZero, KnownOne; 2137 APInt Mask = APInt::getAllOnesValue(VTBits); 2138 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2139 2140 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2141 // sign bits set. 2142 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2143 return VTBits; 2144 2145 // If we are subtracting one from a positive number, there is no carry 2146 // out of the result. 2147 if (KnownZero.isNegative()) 2148 return Tmp; 2149 } 2150 2151 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2152 if (Tmp2 == 1) return 1; 2153 return std::min(Tmp, Tmp2)-1; 2154 break; 2155 2156 case ISD::SUB: 2157 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2158 if (Tmp2 == 1) return 1; 2159 2160 // Handle NEG. 2161 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2162 if (CLHS->isNullValue()) { 2163 APInt KnownZero, KnownOne; 2164 APInt Mask = APInt::getAllOnesValue(VTBits); 2165 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2166 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2167 // sign bits set. 2168 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2169 return VTBits; 2170 2171 // If the input is known to be positive (the sign bit is known clear), 2172 // the output of the NEG has the same number of sign bits as the input. 2173 if (KnownZero.isNegative()) 2174 return Tmp2; 2175 2176 // Otherwise, we treat this like a SUB. 2177 } 2178 2179 // Sub can have at most one carry bit. Thus we know that the output 2180 // is, at worst, one more bit than the inputs. 2181 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2182 if (Tmp == 1) return 1; // Early out. 2183 return std::min(Tmp, Tmp2)-1; 2184 break; 2185 case ISD::TRUNCATE: 2186 // FIXME: it's tricky to do anything useful for this, but it is an important 2187 // case for targets like X86. 2188 break; 2189 } 2190 2191 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2192 if (Op.getOpcode() == ISD::LOAD) { 2193 LoadSDNode *LD = cast<LoadSDNode>(Op); 2194 unsigned ExtType = LD->getExtensionType(); 2195 switch (ExtType) { 2196 default: break; 2197 case ISD::SEXTLOAD: // '17' bits known 2198 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2199 return VTBits-Tmp+1; 2200 case ISD::ZEXTLOAD: // '16' bits known 2201 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2202 return VTBits-Tmp; 2203 } 2204 } 2205 2206 // Allow the target to implement this method for its nodes. 2207 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2208 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2209 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2210 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2211 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2212 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2213 } 2214 2215 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2216 // use this information. 2217 APInt KnownZero, KnownOne; 2218 APInt Mask = APInt::getAllOnesValue(VTBits); 2219 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2220 2221 if (KnownZero.isNegative()) { // sign bit is 0 2222 Mask = KnownZero; 2223 } else if (KnownOne.isNegative()) { // sign bit is 1; 2224 Mask = KnownOne; 2225 } else { 2226 // Nothing known. 2227 return FirstAnswer; 2228 } 2229 2230 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2231 // the number of identical bits in the top of the input value. 2232 Mask = ~Mask; 2233 Mask <<= Mask.getBitWidth()-VTBits; 2234 // Return # leading zeros. We use 'min' here in case Val was zero before 2235 // shifting. We don't want to return '64' as for an i32 "0". 2236 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2237} 2238 2239bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2240 // If we're told that NaNs won't happen, assume they won't. 2241 if (NoNaNsFPMath) 2242 return true; 2243 2244 // If the value is a constant, we can obviously see if it is a NaN or not. 2245 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2246 return !C->getValueAPF().isNaN(); 2247 2248 // TODO: Recognize more cases here. 2249 2250 return false; 2251} 2252 2253bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2254 // If the value is a constant, we can obviously see if it is a zero or not. 2255 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2256 return !C->isZero(); 2257 2258 // TODO: Recognize more cases here. 2259 2260 return false; 2261} 2262 2263bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2264 // Check the obvious case. 2265 if (A == B) return true; 2266 2267 // For for negative and positive zero. 2268 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2269 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2270 if (CA->isZero() && CB->isZero()) return true; 2271 2272 // Otherwise they may not be equal. 2273 return false; 2274} 2275 2276bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2277 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2278 if (!GA) return false; 2279 if (GA->getOffset() != 0) return false; 2280 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2281 if (!GV) return false; 2282 return MF->getMMI().hasDebugInfo(); 2283} 2284 2285 2286/// getNode - Gets or creates the specified node. 2287/// 2288SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2289 FoldingSetNodeID ID; 2290 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2291 void *IP = 0; 2292 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2293 return SDValue(E, 0); 2294 2295 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2296 CSEMap.InsertNode(N, IP); 2297 2298 AllNodes.push_back(N); 2299#ifndef NDEBUG 2300 VerifyNode(N); 2301#endif 2302 return SDValue(N, 0); 2303} 2304 2305SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2306 EVT VT, SDValue Operand) { 2307 // Constant fold unary operations with an integer constant operand. 2308 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2309 const APInt &Val = C->getAPIntValue(); 2310 switch (Opcode) { 2311 default: break; 2312 case ISD::SIGN_EXTEND: 2313 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2314 case ISD::ANY_EXTEND: 2315 case ISD::ZERO_EXTEND: 2316 case ISD::TRUNCATE: 2317 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2318 case ISD::UINT_TO_FP: 2319 case ISD::SINT_TO_FP: { 2320 const uint64_t zero[] = {0, 0}; 2321 // No compile time operations on ppcf128. 2322 if (VT == MVT::ppcf128) break; 2323 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2324 (void)apf.convertFromAPInt(Val, 2325 Opcode==ISD::SINT_TO_FP, 2326 APFloat::rmNearestTiesToEven); 2327 return getConstantFP(apf, VT); 2328 } 2329 case ISD::BIT_CONVERT: 2330 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2331 return getConstantFP(Val.bitsToFloat(), VT); 2332 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2333 return getConstantFP(Val.bitsToDouble(), VT); 2334 break; 2335 case ISD::BSWAP: 2336 return getConstant(Val.byteSwap(), VT); 2337 case ISD::CTPOP: 2338 return getConstant(Val.countPopulation(), VT); 2339 case ISD::CTLZ: 2340 return getConstant(Val.countLeadingZeros(), VT); 2341 case ISD::CTTZ: 2342 return getConstant(Val.countTrailingZeros(), VT); 2343 } 2344 } 2345 2346 // Constant fold unary operations with a floating point constant operand. 2347 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2348 APFloat V = C->getValueAPF(); // make copy 2349 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2350 switch (Opcode) { 2351 case ISD::FNEG: 2352 V.changeSign(); 2353 return getConstantFP(V, VT); 2354 case ISD::FABS: 2355 V.clearSign(); 2356 return getConstantFP(V, VT); 2357 case ISD::FP_ROUND: 2358 case ISD::FP_EXTEND: { 2359 bool ignored; 2360 // This can return overflow, underflow, or inexact; we don't care. 2361 // FIXME need to be more flexible about rounding mode. 2362 (void)V.convert(*EVTToAPFloatSemantics(VT), 2363 APFloat::rmNearestTiesToEven, &ignored); 2364 return getConstantFP(V, VT); 2365 } 2366 case ISD::FP_TO_SINT: 2367 case ISD::FP_TO_UINT: { 2368 integerPart x[2]; 2369 bool ignored; 2370 assert(integerPartWidth >= 64); 2371 // FIXME need to be more flexible about rounding mode. 2372 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2373 Opcode==ISD::FP_TO_SINT, 2374 APFloat::rmTowardZero, &ignored); 2375 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2376 break; 2377 APInt api(VT.getSizeInBits(), 2, x); 2378 return getConstant(api, VT); 2379 } 2380 case ISD::BIT_CONVERT: 2381 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2382 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2383 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2384 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2385 break; 2386 } 2387 } 2388 } 2389 2390 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2391 switch (Opcode) { 2392 case ISD::TokenFactor: 2393 case ISD::MERGE_VALUES: 2394 case ISD::CONCAT_VECTORS: 2395 return Operand; // Factor, merge or concat of one node? No need. 2396 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2397 case ISD::FP_EXTEND: 2398 assert(VT.isFloatingPoint() && 2399 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2400 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2401 assert((!VT.isVector() || 2402 VT.getVectorNumElements() == 2403 Operand.getValueType().getVectorNumElements()) && 2404 "Vector element count mismatch!"); 2405 if (Operand.getOpcode() == ISD::UNDEF) 2406 return getUNDEF(VT); 2407 break; 2408 case ISD::SIGN_EXTEND: 2409 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2410 "Invalid SIGN_EXTEND!"); 2411 if (Operand.getValueType() == VT) return Operand; // noop extension 2412 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2413 "Invalid sext node, dst < src!"); 2414 assert((!VT.isVector() || 2415 VT.getVectorNumElements() == 2416 Operand.getValueType().getVectorNumElements()) && 2417 "Vector element count mismatch!"); 2418 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2419 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2420 break; 2421 case ISD::ZERO_EXTEND: 2422 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2423 "Invalid ZERO_EXTEND!"); 2424 if (Operand.getValueType() == VT) return Operand; // noop extension 2425 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2426 "Invalid zext node, dst < src!"); 2427 assert((!VT.isVector() || 2428 VT.getVectorNumElements() == 2429 Operand.getValueType().getVectorNumElements()) && 2430 "Vector element count mismatch!"); 2431 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2432 return getNode(ISD::ZERO_EXTEND, DL, VT, 2433 Operand.getNode()->getOperand(0)); 2434 break; 2435 case ISD::ANY_EXTEND: 2436 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2437 "Invalid ANY_EXTEND!"); 2438 if (Operand.getValueType() == VT) return Operand; // noop extension 2439 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2440 "Invalid anyext node, dst < src!"); 2441 assert((!VT.isVector() || 2442 VT.getVectorNumElements() == 2443 Operand.getValueType().getVectorNumElements()) && 2444 "Vector element count mismatch!"); 2445 2446 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2447 OpOpcode == ISD::ANY_EXTEND) 2448 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2449 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2450 2451 // (ext (trunx x)) -> x 2452 if (OpOpcode == ISD::TRUNCATE) { 2453 SDValue OpOp = Operand.getNode()->getOperand(0); 2454 if (OpOp.getValueType() == VT) 2455 return OpOp; 2456 } 2457 break; 2458 case ISD::TRUNCATE: 2459 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2460 "Invalid TRUNCATE!"); 2461 if (Operand.getValueType() == VT) return Operand; // noop truncate 2462 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2463 "Invalid truncate node, src < dst!"); 2464 assert((!VT.isVector() || 2465 VT.getVectorNumElements() == 2466 Operand.getValueType().getVectorNumElements()) && 2467 "Vector element count mismatch!"); 2468 if (OpOpcode == ISD::TRUNCATE) 2469 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2470 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2471 OpOpcode == ISD::ANY_EXTEND) { 2472 // If the source is smaller than the dest, we still need an extend. 2473 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2474 .bitsLT(VT.getScalarType())) 2475 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2476 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2477 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2478 else 2479 return Operand.getNode()->getOperand(0); 2480 } 2481 break; 2482 case ISD::BIT_CONVERT: 2483 // Basic sanity checking. 2484 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2485 && "Cannot BIT_CONVERT between types of different sizes!"); 2486 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2487 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2488 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2489 if (OpOpcode == ISD::UNDEF) 2490 return getUNDEF(VT); 2491 break; 2492 case ISD::SCALAR_TO_VECTOR: 2493 assert(VT.isVector() && !Operand.getValueType().isVector() && 2494 (VT.getVectorElementType() == Operand.getValueType() || 2495 (VT.getVectorElementType().isInteger() && 2496 Operand.getValueType().isInteger() && 2497 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2498 "Illegal SCALAR_TO_VECTOR node!"); 2499 if (OpOpcode == ISD::UNDEF) 2500 return getUNDEF(VT); 2501 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2502 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2503 isa<ConstantSDNode>(Operand.getOperand(1)) && 2504 Operand.getConstantOperandVal(1) == 0 && 2505 Operand.getOperand(0).getValueType() == VT) 2506 return Operand.getOperand(0); 2507 break; 2508 case ISD::FNEG: 2509 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2510 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2511 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2512 Operand.getNode()->getOperand(0)); 2513 if (OpOpcode == ISD::FNEG) // --X -> X 2514 return Operand.getNode()->getOperand(0); 2515 break; 2516 case ISD::FABS: 2517 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2518 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2519 break; 2520 } 2521 2522 SDNode *N; 2523 SDVTList VTs = getVTList(VT); 2524 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2525 FoldingSetNodeID ID; 2526 SDValue Ops[1] = { Operand }; 2527 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2528 void *IP = 0; 2529 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2530 return SDValue(E, 0); 2531 2532 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2533 CSEMap.InsertNode(N, IP); 2534 } else { 2535 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2536 } 2537 2538 AllNodes.push_back(N); 2539#ifndef NDEBUG 2540 VerifyNode(N); 2541#endif 2542 return SDValue(N, 0); 2543} 2544 2545SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2546 EVT VT, 2547 ConstantSDNode *Cst1, 2548 ConstantSDNode *Cst2) { 2549 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2550 2551 switch (Opcode) { 2552 case ISD::ADD: return getConstant(C1 + C2, VT); 2553 case ISD::SUB: return getConstant(C1 - C2, VT); 2554 case ISD::MUL: return getConstant(C1 * C2, VT); 2555 case ISD::UDIV: 2556 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2557 break; 2558 case ISD::UREM: 2559 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2560 break; 2561 case ISD::SDIV: 2562 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2563 break; 2564 case ISD::SREM: 2565 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2566 break; 2567 case ISD::AND: return getConstant(C1 & C2, VT); 2568 case ISD::OR: return getConstant(C1 | C2, VT); 2569 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2570 case ISD::SHL: return getConstant(C1 << C2, VT); 2571 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2572 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2573 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2574 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2575 default: break; 2576 } 2577 2578 return SDValue(); 2579} 2580 2581SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2582 SDValue N1, SDValue N2) { 2583 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2584 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2585 switch (Opcode) { 2586 default: break; 2587 case ISD::TokenFactor: 2588 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2589 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2590 // Fold trivial token factors. 2591 if (N1.getOpcode() == ISD::EntryToken) return N2; 2592 if (N2.getOpcode() == ISD::EntryToken) return N1; 2593 if (N1 == N2) return N1; 2594 break; 2595 case ISD::CONCAT_VECTORS: 2596 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2597 // one big BUILD_VECTOR. 2598 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2599 N2.getOpcode() == ISD::BUILD_VECTOR) { 2600 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2601 N1.getNode()->op_end()); 2602 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2603 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2604 } 2605 break; 2606 case ISD::AND: 2607 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2608 assert(N1.getValueType() == N2.getValueType() && 2609 N1.getValueType() == VT && "Binary operator types must match!"); 2610 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2611 // worth handling here. 2612 if (N2C && N2C->isNullValue()) 2613 return N2; 2614 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2615 return N1; 2616 break; 2617 case ISD::OR: 2618 case ISD::XOR: 2619 case ISD::ADD: 2620 case ISD::SUB: 2621 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2622 assert(N1.getValueType() == N2.getValueType() && 2623 N1.getValueType() == VT && "Binary operator types must match!"); 2624 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2625 // it's worth handling here. 2626 if (N2C && N2C->isNullValue()) 2627 return N1; 2628 break; 2629 case ISD::UDIV: 2630 case ISD::UREM: 2631 case ISD::MULHU: 2632 case ISD::MULHS: 2633 case ISD::MUL: 2634 case ISD::SDIV: 2635 case ISD::SREM: 2636 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2637 assert(N1.getValueType() == N2.getValueType() && 2638 N1.getValueType() == VT && "Binary operator types must match!"); 2639 break; 2640 case ISD::FADD: 2641 case ISD::FSUB: 2642 case ISD::FMUL: 2643 case ISD::FDIV: 2644 case ISD::FREM: 2645 if (UnsafeFPMath) { 2646 if (Opcode == ISD::FADD) { 2647 // 0+x --> x 2648 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2649 if (CFP->getValueAPF().isZero()) 2650 return N2; 2651 // x+0 --> x 2652 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2653 if (CFP->getValueAPF().isZero()) 2654 return N1; 2655 } else if (Opcode == ISD::FSUB) { 2656 // x-0 --> x 2657 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2658 if (CFP->getValueAPF().isZero()) 2659 return N1; 2660 } 2661 } 2662 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2663 assert(N1.getValueType() == N2.getValueType() && 2664 N1.getValueType() == VT && "Binary operator types must match!"); 2665 break; 2666 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2667 assert(N1.getValueType() == VT && 2668 N1.getValueType().isFloatingPoint() && 2669 N2.getValueType().isFloatingPoint() && 2670 "Invalid FCOPYSIGN!"); 2671 break; 2672 case ISD::SHL: 2673 case ISD::SRA: 2674 case ISD::SRL: 2675 case ISD::ROTL: 2676 case ISD::ROTR: 2677 assert(VT == N1.getValueType() && 2678 "Shift operators return type must be the same as their first arg"); 2679 assert(VT.isInteger() && N2.getValueType().isInteger() && 2680 "Shifts only work on integers"); 2681 2682 // Always fold shifts of i1 values so the code generator doesn't need to 2683 // handle them. Since we know the size of the shift has to be less than the 2684 // size of the value, the shift/rotate count is guaranteed to be zero. 2685 if (VT == MVT::i1) 2686 return N1; 2687 if (N2C && N2C->isNullValue()) 2688 return N1; 2689 break; 2690 case ISD::FP_ROUND_INREG: { 2691 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2692 assert(VT == N1.getValueType() && "Not an inreg round!"); 2693 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2694 "Cannot FP_ROUND_INREG integer types"); 2695 assert(EVT.isVector() == VT.isVector() && 2696 "FP_ROUND_INREG type should be vector iff the operand " 2697 "type is vector!"); 2698 assert((!EVT.isVector() || 2699 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2700 "Vector element counts must match in FP_ROUND_INREG"); 2701 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2702 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2703 break; 2704 } 2705 case ISD::FP_ROUND: 2706 assert(VT.isFloatingPoint() && 2707 N1.getValueType().isFloatingPoint() && 2708 VT.bitsLE(N1.getValueType()) && 2709 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2710 if (N1.getValueType() == VT) return N1; // noop conversion. 2711 break; 2712 case ISD::AssertSext: 2713 case ISD::AssertZext: { 2714 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2715 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2716 assert(VT.isInteger() && EVT.isInteger() && 2717 "Cannot *_EXTEND_INREG FP types"); 2718 assert(!EVT.isVector() && 2719 "AssertSExt/AssertZExt type should be the vector element type " 2720 "rather than the vector type!"); 2721 assert(EVT.bitsLE(VT) && "Not extending!"); 2722 if (VT == EVT) return N1; // noop assertion. 2723 break; 2724 } 2725 case ISD::SIGN_EXTEND_INREG: { 2726 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2727 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2728 assert(VT.isInteger() && EVT.isInteger() && 2729 "Cannot *_EXTEND_INREG FP types"); 2730 assert(EVT.isVector() == VT.isVector() && 2731 "SIGN_EXTEND_INREG type should be vector iff the operand " 2732 "type is vector!"); 2733 assert((!EVT.isVector() || 2734 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2735 "Vector element counts must match in SIGN_EXTEND_INREG"); 2736 assert(EVT.bitsLE(VT) && "Not extending!"); 2737 if (EVT == VT) return N1; // Not actually extending 2738 2739 if (N1C) { 2740 APInt Val = N1C->getAPIntValue(); 2741 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2742 Val <<= Val.getBitWidth()-FromBits; 2743 Val = Val.ashr(Val.getBitWidth()-FromBits); 2744 return getConstant(Val, VT); 2745 } 2746 break; 2747 } 2748 case ISD::EXTRACT_VECTOR_ELT: 2749 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2750 if (N1.getOpcode() == ISD::UNDEF) 2751 return getUNDEF(VT); 2752 2753 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2754 // expanding copies of large vectors from registers. 2755 if (N2C && 2756 N1.getOpcode() == ISD::CONCAT_VECTORS && 2757 N1.getNumOperands() > 0) { 2758 unsigned Factor = 2759 N1.getOperand(0).getValueType().getVectorNumElements(); 2760 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2761 N1.getOperand(N2C->getZExtValue() / Factor), 2762 getConstant(N2C->getZExtValue() % Factor, 2763 N2.getValueType())); 2764 } 2765 2766 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2767 // expanding large vector constants. 2768 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2769 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2770 EVT VEltTy = N1.getValueType().getVectorElementType(); 2771 if (Elt.getValueType() != VEltTy) { 2772 // If the vector element type is not legal, the BUILD_VECTOR operands 2773 // are promoted and implicitly truncated. Make that explicit here. 2774 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2775 } 2776 if (VT != VEltTy) { 2777 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2778 // result is implicitly extended. 2779 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2780 } 2781 return Elt; 2782 } 2783 2784 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2785 // operations are lowered to scalars. 2786 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2787 // If the indices are the same, return the inserted element else 2788 // if the indices are known different, extract the element from 2789 // the original vector. 2790 SDValue N1Op2 = N1.getOperand(2); 2791 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2792 2793 if (N1Op2C && N2C) { 2794 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2795 if (VT == N1.getOperand(1).getValueType()) 2796 return N1.getOperand(1); 2797 else 2798 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2799 } 2800 2801 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2802 } 2803 } 2804 break; 2805 case ISD::EXTRACT_ELEMENT: 2806 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2807 assert(!N1.getValueType().isVector() && !VT.isVector() && 2808 (N1.getValueType().isInteger() == VT.isInteger()) && 2809 "Wrong types for EXTRACT_ELEMENT!"); 2810 2811 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2812 // 64-bit integers into 32-bit parts. Instead of building the extract of 2813 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2814 if (N1.getOpcode() == ISD::BUILD_PAIR) 2815 return N1.getOperand(N2C->getZExtValue()); 2816 2817 // EXTRACT_ELEMENT of a constant int is also very common. 2818 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2819 unsigned ElementSize = VT.getSizeInBits(); 2820 unsigned Shift = ElementSize * N2C->getZExtValue(); 2821 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2822 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2823 } 2824 break; 2825 case ISD::EXTRACT_SUBVECTOR: 2826 if (N1.getValueType() == VT) // Trivial extraction. 2827 return N1; 2828 break; 2829 } 2830 2831 if (N1C) { 2832 if (N2C) { 2833 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2834 if (SV.getNode()) return SV; 2835 } else { // Cannonicalize constant to RHS if commutative 2836 if (isCommutativeBinOp(Opcode)) { 2837 std::swap(N1C, N2C); 2838 std::swap(N1, N2); 2839 } 2840 } 2841 } 2842 2843 // Constant fold FP operations. 2844 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2845 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2846 if (N1CFP) { 2847 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2848 // Cannonicalize constant to RHS if commutative 2849 std::swap(N1CFP, N2CFP); 2850 std::swap(N1, N2); 2851 } else if (N2CFP && VT != MVT::ppcf128) { 2852 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2853 APFloat::opStatus s; 2854 switch (Opcode) { 2855 case ISD::FADD: 2856 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2857 if (s != APFloat::opInvalidOp) 2858 return getConstantFP(V1, VT); 2859 break; 2860 case ISD::FSUB: 2861 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2862 if (s!=APFloat::opInvalidOp) 2863 return getConstantFP(V1, VT); 2864 break; 2865 case ISD::FMUL: 2866 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2867 if (s!=APFloat::opInvalidOp) 2868 return getConstantFP(V1, VT); 2869 break; 2870 case ISD::FDIV: 2871 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2872 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2873 return getConstantFP(V1, VT); 2874 break; 2875 case ISD::FREM : 2876 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2877 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2878 return getConstantFP(V1, VT); 2879 break; 2880 case ISD::FCOPYSIGN: 2881 V1.copySign(V2); 2882 return getConstantFP(V1, VT); 2883 default: break; 2884 } 2885 } 2886 } 2887 2888 // Canonicalize an UNDEF to the RHS, even over a constant. 2889 if (N1.getOpcode() == ISD::UNDEF) { 2890 if (isCommutativeBinOp(Opcode)) { 2891 std::swap(N1, N2); 2892 } else { 2893 switch (Opcode) { 2894 case ISD::FP_ROUND_INREG: 2895 case ISD::SIGN_EXTEND_INREG: 2896 case ISD::SUB: 2897 case ISD::FSUB: 2898 case ISD::FDIV: 2899 case ISD::FREM: 2900 case ISD::SRA: 2901 return N1; // fold op(undef, arg2) -> undef 2902 case ISD::UDIV: 2903 case ISD::SDIV: 2904 case ISD::UREM: 2905 case ISD::SREM: 2906 case ISD::SRL: 2907 case ISD::SHL: 2908 if (!VT.isVector()) 2909 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2910 // For vectors, we can't easily build an all zero vector, just return 2911 // the LHS. 2912 return N2; 2913 } 2914 } 2915 } 2916 2917 // Fold a bunch of operators when the RHS is undef. 2918 if (N2.getOpcode() == ISD::UNDEF) { 2919 switch (Opcode) { 2920 case ISD::XOR: 2921 if (N1.getOpcode() == ISD::UNDEF) 2922 // Handle undef ^ undef -> 0 special case. This is a common 2923 // idiom (misuse). 2924 return getConstant(0, VT); 2925 // fallthrough 2926 case ISD::ADD: 2927 case ISD::ADDC: 2928 case ISD::ADDE: 2929 case ISD::SUB: 2930 case ISD::UDIV: 2931 case ISD::SDIV: 2932 case ISD::UREM: 2933 case ISD::SREM: 2934 return N2; // fold op(arg1, undef) -> undef 2935 case ISD::FADD: 2936 case ISD::FSUB: 2937 case ISD::FMUL: 2938 case ISD::FDIV: 2939 case ISD::FREM: 2940 if (UnsafeFPMath) 2941 return N2; 2942 break; 2943 case ISD::MUL: 2944 case ISD::AND: 2945 case ISD::SRL: 2946 case ISD::SHL: 2947 if (!VT.isVector()) 2948 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2949 // For vectors, we can't easily build an all zero vector, just return 2950 // the LHS. 2951 return N1; 2952 case ISD::OR: 2953 if (!VT.isVector()) 2954 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2955 // For vectors, we can't easily build an all one vector, just return 2956 // the LHS. 2957 return N1; 2958 case ISD::SRA: 2959 return N1; 2960 } 2961 } 2962 2963 // Memoize this node if possible. 2964 SDNode *N; 2965 SDVTList VTs = getVTList(VT); 2966 if (VT != MVT::Flag) { 2967 SDValue Ops[] = { N1, N2 }; 2968 FoldingSetNodeID ID; 2969 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2970 void *IP = 0; 2971 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2972 return SDValue(E, 0); 2973 2974 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2975 CSEMap.InsertNode(N, IP); 2976 } else { 2977 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2978 } 2979 2980 AllNodes.push_back(N); 2981#ifndef NDEBUG 2982 VerifyNode(N); 2983#endif 2984 return SDValue(N, 0); 2985} 2986 2987SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2988 SDValue N1, SDValue N2, SDValue N3) { 2989 // Perform various simplifications. 2990 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2991 switch (Opcode) { 2992 case ISD::CONCAT_VECTORS: 2993 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2994 // one big BUILD_VECTOR. 2995 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2996 N2.getOpcode() == ISD::BUILD_VECTOR && 2997 N3.getOpcode() == ISD::BUILD_VECTOR) { 2998 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2999 N1.getNode()->op_end()); 3000 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3001 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3002 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3003 } 3004 break; 3005 case ISD::SETCC: { 3006 // Use FoldSetCC to simplify SETCC's. 3007 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3008 if (Simp.getNode()) return Simp; 3009 break; 3010 } 3011 case ISD::SELECT: 3012 if (N1C) { 3013 if (N1C->getZExtValue()) 3014 return N2; // select true, X, Y -> X 3015 else 3016 return N3; // select false, X, Y -> Y 3017 } 3018 3019 if (N2 == N3) return N2; // select C, X, X -> X 3020 break; 3021 case ISD::VECTOR_SHUFFLE: 3022 llvm_unreachable("should use getVectorShuffle constructor!"); 3023 break; 3024 case ISD::BIT_CONVERT: 3025 // Fold bit_convert nodes from a type to themselves. 3026 if (N1.getValueType() == VT) 3027 return N1; 3028 break; 3029 } 3030 3031 // Memoize node if it doesn't produce a flag. 3032 SDNode *N; 3033 SDVTList VTs = getVTList(VT); 3034 if (VT != MVT::Flag) { 3035 SDValue Ops[] = { N1, N2, N3 }; 3036 FoldingSetNodeID ID; 3037 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3038 void *IP = 0; 3039 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3040 return SDValue(E, 0); 3041 3042 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3043 CSEMap.InsertNode(N, IP); 3044 } else { 3045 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3046 } 3047 3048 AllNodes.push_back(N); 3049#ifndef NDEBUG 3050 VerifyNode(N); 3051#endif 3052 return SDValue(N, 0); 3053} 3054 3055SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3056 SDValue N1, SDValue N2, SDValue N3, 3057 SDValue N4) { 3058 SDValue Ops[] = { N1, N2, N3, N4 }; 3059 return getNode(Opcode, DL, VT, Ops, 4); 3060} 3061 3062SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3063 SDValue N1, SDValue N2, SDValue N3, 3064 SDValue N4, SDValue N5) { 3065 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3066 return getNode(Opcode, DL, VT, Ops, 5); 3067} 3068 3069/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3070/// the incoming stack arguments to be loaded from the stack. 3071SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3072 SmallVector<SDValue, 8> ArgChains; 3073 3074 // Include the original chain at the beginning of the list. When this is 3075 // used by target LowerCall hooks, this helps legalize find the 3076 // CALLSEQ_BEGIN node. 3077 ArgChains.push_back(Chain); 3078 3079 // Add a chain value for each stack argument. 3080 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3081 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3082 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3083 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3084 if (FI->getIndex() < 0) 3085 ArgChains.push_back(SDValue(L, 1)); 3086 3087 // Build a tokenfactor for all the chains. 3088 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3089 &ArgChains[0], ArgChains.size()); 3090} 3091 3092/// getMemsetValue - Vectorized representation of the memset value 3093/// operand. 3094static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3095 DebugLoc dl) { 3096 assert(Value.getOpcode() != ISD::UNDEF); 3097 3098 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3099 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3100 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3101 unsigned Shift = 8; 3102 for (unsigned i = NumBits; i > 8; i >>= 1) { 3103 Val = (Val << Shift) | Val; 3104 Shift <<= 1; 3105 } 3106 if (VT.isInteger()) 3107 return DAG.getConstant(Val, VT); 3108 return DAG.getConstantFP(APFloat(Val), VT); 3109 } 3110 3111 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3112 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3113 unsigned Shift = 8; 3114 for (unsigned i = NumBits; i > 8; i >>= 1) { 3115 Value = DAG.getNode(ISD::OR, dl, VT, 3116 DAG.getNode(ISD::SHL, dl, VT, Value, 3117 DAG.getConstant(Shift, 3118 TLI.getShiftAmountTy())), 3119 Value); 3120 Shift <<= 1; 3121 } 3122 3123 return Value; 3124} 3125 3126/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3127/// used when a memcpy is turned into a memset when the source is a constant 3128/// string ptr. 3129static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3130 const TargetLowering &TLI, 3131 std::string &Str, unsigned Offset) { 3132 // Handle vector with all elements zero. 3133 if (Str.empty()) { 3134 if (VT.isInteger()) 3135 return DAG.getConstant(0, VT); 3136 else if (VT == MVT::f32 || VT == MVT::f64) 3137 return DAG.getConstantFP(0.0, VT); 3138 else if (VT.isVector()) { 3139 unsigned NumElts = VT.getVectorNumElements(); 3140 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3141 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3142 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3143 EltVT, NumElts))); 3144 } else 3145 llvm_unreachable("Expected type!"); 3146 } 3147 3148 assert(!VT.isVector() && "Can't handle vector type here!"); 3149 unsigned NumBits = VT.getSizeInBits(); 3150 unsigned MSB = NumBits / 8; 3151 uint64_t Val = 0; 3152 if (TLI.isLittleEndian()) 3153 Offset = Offset + MSB - 1; 3154 for (unsigned i = 0; i != MSB; ++i) { 3155 Val = (Val << 8) | (unsigned char)Str[Offset]; 3156 Offset += TLI.isLittleEndian() ? -1 : 1; 3157 } 3158 return DAG.getConstant(Val, VT); 3159} 3160 3161/// getMemBasePlusOffset - Returns base and offset node for the 3162/// 3163static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3164 SelectionDAG &DAG) { 3165 EVT VT = Base.getValueType(); 3166 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3167 VT, Base, DAG.getConstant(Offset, VT)); 3168} 3169 3170/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3171/// 3172static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3173 unsigned SrcDelta = 0; 3174 GlobalAddressSDNode *G = NULL; 3175 if (Src.getOpcode() == ISD::GlobalAddress) 3176 G = cast<GlobalAddressSDNode>(Src); 3177 else if (Src.getOpcode() == ISD::ADD && 3178 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3179 Src.getOperand(1).getOpcode() == ISD::Constant) { 3180 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3181 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3182 } 3183 if (!G) 3184 return false; 3185 3186 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3187 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3188 return true; 3189 3190 return false; 3191} 3192 3193/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3194/// to replace the memset / memcpy. Return true if the number of memory ops 3195/// is below the threshold. It returns the types of the sequence of 3196/// memory ops to perform memset / memcpy by reference. 3197static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3198 unsigned Limit, uint64_t Size, 3199 unsigned DstAlign, unsigned SrcAlign, 3200 bool NonScalarIntSafe, 3201 bool MemcpyStrSrc, 3202 SelectionDAG &DAG, 3203 const TargetLowering &TLI) { 3204 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3205 "Expecting memcpy / memset source to meet alignment requirement!"); 3206 // If 'SrcAlign' is zero, that means the memory operation does not need load 3207 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3208 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3209 // specified alignment of the memory operation. If it is zero, that means 3210 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3211 // indicates whether the memcpy source is constant so it does not need to be 3212 // loaded. 3213 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3214 NonScalarIntSafe, MemcpyStrSrc, 3215 DAG.getMachineFunction()); 3216 3217 if (VT == MVT::Other) { 3218 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3219 TLI.allowsUnalignedMemoryAccesses(VT)) { 3220 VT = TLI.getPointerTy(); 3221 } else { 3222 switch (DstAlign & 7) { 3223 case 0: VT = MVT::i64; break; 3224 case 4: VT = MVT::i32; break; 3225 case 2: VT = MVT::i16; break; 3226 default: VT = MVT::i8; break; 3227 } 3228 } 3229 3230 MVT LVT = MVT::i64; 3231 while (!TLI.isTypeLegal(LVT)) 3232 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3233 assert(LVT.isInteger()); 3234 3235 if (VT.bitsGT(LVT)) 3236 VT = LVT; 3237 } 3238 3239 // If we're optimizing for size, and there is a limit, bump the maximum number 3240 // of operations inserted down to 4. This is a wild guess that approximates 3241 // the size of a call to memcpy or memset (3 arguments + call). 3242 if (Limit != ~0U) { 3243 const Function *F = DAG.getMachineFunction().getFunction(); 3244 if (F->hasFnAttr(Attribute::OptimizeForSize)) 3245 Limit = 4; 3246 } 3247 3248 unsigned NumMemOps = 0; 3249 while (Size != 0) { 3250 unsigned VTSize = VT.getSizeInBits() / 8; 3251 while (VTSize > Size) { 3252 // For now, only use non-vector load / store's for the left-over pieces. 3253 if (VT.isVector() || VT.isFloatingPoint()) { 3254 VT = MVT::i64; 3255 while (!TLI.isTypeLegal(VT)) 3256 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3257 VTSize = VT.getSizeInBits() / 8; 3258 } else { 3259 // This can result in a type that is not legal on the target, e.g. 3260 // 1 or 2 bytes on PPC. 3261 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3262 VTSize >>= 1; 3263 } 3264 } 3265 3266 if (++NumMemOps > Limit) 3267 return false; 3268 MemOps.push_back(VT); 3269 Size -= VTSize; 3270 } 3271 3272 return true; 3273} 3274 3275static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3276 SDValue Chain, SDValue Dst, 3277 SDValue Src, uint64_t Size, 3278 unsigned Align, bool isVol, 3279 bool AlwaysInline, 3280 MachinePointerInfo DstPtrInfo, 3281 MachinePointerInfo SrcPtrInfo) { 3282 // Turn a memcpy of undef to nop. 3283 if (Src.getOpcode() == ISD::UNDEF) 3284 return Chain; 3285 3286 // Expand memcpy to a series of load and store ops if the size operand falls 3287 // below a certain threshold. 3288 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3289 // rather than maybe a humongous number of loads and stores. 3290 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3291 std::vector<EVT> MemOps; 3292 bool DstAlignCanChange = false; 3293 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3294 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3295 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3296 DstAlignCanChange = true; 3297 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3298 if (Align > SrcAlign) 3299 SrcAlign = Align; 3300 std::string Str; 3301 bool CopyFromStr = isMemSrcFromString(Src, Str); 3302 bool isZeroStr = CopyFromStr && Str.empty(); 3303 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(); 3304 3305 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3306 (DstAlignCanChange ? 0 : Align), 3307 (isZeroStr ? 0 : SrcAlign), 3308 true, CopyFromStr, DAG, TLI)) 3309 return SDValue(); 3310 3311 if (DstAlignCanChange) { 3312 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3313 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3314 if (NewAlign > Align) { 3315 // Give the stack frame object a larger alignment if needed. 3316 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3317 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3318 Align = NewAlign; 3319 } 3320 } 3321 3322 SmallVector<SDValue, 8> OutChains; 3323 unsigned NumMemOps = MemOps.size(); 3324 uint64_t SrcOff = 0, DstOff = 0; 3325 for (unsigned i = 0; i != NumMemOps; ++i) { 3326 EVT VT = MemOps[i]; 3327 unsigned VTSize = VT.getSizeInBits() / 8; 3328 SDValue Value, Store; 3329 3330 if (CopyFromStr && 3331 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3332 // It's unlikely a store of a vector immediate can be done in a single 3333 // instruction. It would require a load from a constantpool first. 3334 // We only handle zero vectors here. 3335 // FIXME: Handle other cases where store of vector immediate is done in 3336 // a single instruction. 3337 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3338 Store = DAG.getStore(Chain, dl, Value, 3339 getMemBasePlusOffset(Dst, DstOff, DAG), 3340 DstPtrInfo.getWithOffset(DstOff), isVol, 3341 false, Align); 3342 } else { 3343 // The type might not be legal for the target. This should only happen 3344 // if the type is smaller than a legal type, as on PPC, so the right 3345 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3346 // to Load/Store if NVT==VT. 3347 // FIXME does the case above also need this? 3348 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3349 assert(NVT.bitsGE(VT)); 3350 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain, 3351 getMemBasePlusOffset(Src, SrcOff, DAG), 3352 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3353 MinAlign(SrcAlign, SrcOff)); 3354 Store = DAG.getTruncStore(Chain, dl, Value, 3355 getMemBasePlusOffset(Dst, DstOff, DAG), 3356 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3357 false, Align); 3358 } 3359 OutChains.push_back(Store); 3360 SrcOff += VTSize; 3361 DstOff += VTSize; 3362 } 3363 3364 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3365 &OutChains[0], OutChains.size()); 3366} 3367 3368static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3369 SDValue Chain, SDValue Dst, 3370 SDValue Src, uint64_t Size, 3371 unsigned Align, bool isVol, 3372 bool AlwaysInline, 3373 MachinePointerInfo DstPtrInfo, 3374 MachinePointerInfo SrcPtrInfo) { 3375 // Turn a memmove of undef to nop. 3376 if (Src.getOpcode() == ISD::UNDEF) 3377 return Chain; 3378 3379 // Expand memmove to a series of load and store ops if the size operand falls 3380 // below a certain threshold. 3381 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3382 std::vector<EVT> MemOps; 3383 bool DstAlignCanChange = false; 3384 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3385 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3386 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3387 DstAlignCanChange = true; 3388 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3389 if (Align > SrcAlign) 3390 SrcAlign = Align; 3391 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(); 3392 3393 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3394 (DstAlignCanChange ? 0 : Align), 3395 SrcAlign, true, false, DAG, TLI)) 3396 return SDValue(); 3397 3398 if (DstAlignCanChange) { 3399 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3400 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3401 if (NewAlign > Align) { 3402 // Give the stack frame object a larger alignment if needed. 3403 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3404 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3405 Align = NewAlign; 3406 } 3407 } 3408 3409 uint64_t SrcOff = 0, DstOff = 0; 3410 SmallVector<SDValue, 8> LoadValues; 3411 SmallVector<SDValue, 8> LoadChains; 3412 SmallVector<SDValue, 8> OutChains; 3413 unsigned NumMemOps = MemOps.size(); 3414 for (unsigned i = 0; i < NumMemOps; i++) { 3415 EVT VT = MemOps[i]; 3416 unsigned VTSize = VT.getSizeInBits() / 8; 3417 SDValue Value, Store; 3418 3419 Value = DAG.getLoad(VT, dl, Chain, 3420 getMemBasePlusOffset(Src, SrcOff, DAG), 3421 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3422 false, SrcAlign); 3423 LoadValues.push_back(Value); 3424 LoadChains.push_back(Value.getValue(1)); 3425 SrcOff += VTSize; 3426 } 3427 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3428 &LoadChains[0], LoadChains.size()); 3429 OutChains.clear(); 3430 for (unsigned i = 0; i < NumMemOps; i++) { 3431 EVT VT = MemOps[i]; 3432 unsigned VTSize = VT.getSizeInBits() / 8; 3433 SDValue Value, Store; 3434 3435 Store = DAG.getStore(Chain, dl, LoadValues[i], 3436 getMemBasePlusOffset(Dst, DstOff, DAG), 3437 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3438 OutChains.push_back(Store); 3439 DstOff += VTSize; 3440 } 3441 3442 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3443 &OutChains[0], OutChains.size()); 3444} 3445 3446static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3447 SDValue Chain, SDValue Dst, 3448 SDValue Src, uint64_t Size, 3449 unsigned Align, bool isVol, 3450 MachinePointerInfo DstPtrInfo) { 3451 // Turn a memset of undef to nop. 3452 if (Src.getOpcode() == ISD::UNDEF) 3453 return Chain; 3454 3455 // Expand memset to a series of load/store ops if the size operand 3456 // falls below a certain threshold. 3457 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3458 std::vector<EVT> MemOps; 3459 bool DstAlignCanChange = false; 3460 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3461 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3462 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3463 DstAlignCanChange = true; 3464 bool NonScalarIntSafe = 3465 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3466 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3467 Size, (DstAlignCanChange ? 0 : Align), 0, 3468 NonScalarIntSafe, false, DAG, TLI)) 3469 return SDValue(); 3470 3471 if (DstAlignCanChange) { 3472 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3473 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3474 if (NewAlign > Align) { 3475 // Give the stack frame object a larger alignment if needed. 3476 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3477 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3478 Align = NewAlign; 3479 } 3480 } 3481 3482 SmallVector<SDValue, 8> OutChains; 3483 uint64_t DstOff = 0; 3484 unsigned NumMemOps = MemOps.size(); 3485 for (unsigned i = 0; i < NumMemOps; i++) { 3486 EVT VT = MemOps[i]; 3487 unsigned VTSize = VT.getSizeInBits() / 8; 3488 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3489 SDValue Store = DAG.getStore(Chain, dl, Value, 3490 getMemBasePlusOffset(Dst, DstOff, DAG), 3491 DstPtrInfo.getWithOffset(DstOff), 3492 isVol, false, Align); 3493 OutChains.push_back(Store); 3494 DstOff += VTSize; 3495 } 3496 3497 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3498 &OutChains[0], OutChains.size()); 3499} 3500 3501SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3502 SDValue Src, SDValue Size, 3503 unsigned Align, bool isVol, bool AlwaysInline, 3504 MachinePointerInfo DstPtrInfo, 3505 MachinePointerInfo SrcPtrInfo) { 3506 3507 // Check to see if we should lower the memcpy to loads and stores first. 3508 // For cases within the target-specified limits, this is the best choice. 3509 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3510 if (ConstantSize) { 3511 // Memcpy with size zero? Just return the original chain. 3512 if (ConstantSize->isNullValue()) 3513 return Chain; 3514 3515 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3516 ConstantSize->getZExtValue(),Align, 3517 isVol, false, DstPtrInfo, SrcPtrInfo); 3518 if (Result.getNode()) 3519 return Result; 3520 } 3521 3522 // Then check to see if we should lower the memcpy with target-specific 3523 // code. If the target chooses to do this, this is the next best. 3524 SDValue Result = 3525 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3526 isVol, AlwaysInline, 3527 DstPtrInfo, SrcPtrInfo); 3528 if (Result.getNode()) 3529 return Result; 3530 3531 // If we really need inline code and the target declined to provide it, 3532 // use a (potentially long) sequence of loads and stores. 3533 if (AlwaysInline) { 3534 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3535 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3536 ConstantSize->getZExtValue(), Align, isVol, 3537 true, DstPtrInfo, SrcPtrInfo); 3538 } 3539 3540 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3541 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3542 // respect volatile, so they may do things like read or write memory 3543 // beyond the given memory regions. But fixing this isn't easy, and most 3544 // people don't care. 3545 3546 // Emit a library call. 3547 TargetLowering::ArgListTy Args; 3548 TargetLowering::ArgListEntry Entry; 3549 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3550 Entry.Node = Dst; Args.push_back(Entry); 3551 Entry.Node = Src; Args.push_back(Entry); 3552 Entry.Node = Size; Args.push_back(Entry); 3553 // FIXME: pass in DebugLoc 3554 std::pair<SDValue,SDValue> CallResult = 3555 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3556 false, false, false, false, 0, 3557 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3558 /*isReturnValueUsed=*/false, 3559 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3560 TLI.getPointerTy()), 3561 Args, *this, dl); 3562 return CallResult.second; 3563} 3564 3565SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3566 SDValue Src, SDValue Size, 3567 unsigned Align, bool isVol, 3568 MachinePointerInfo DstPtrInfo, 3569 MachinePointerInfo SrcPtrInfo) { 3570 3571 // Check to see if we should lower the memmove to loads and stores first. 3572 // For cases within the target-specified limits, this is the best choice. 3573 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3574 if (ConstantSize) { 3575 // Memmove with size zero? Just return the original chain. 3576 if (ConstantSize->isNullValue()) 3577 return Chain; 3578 3579 SDValue Result = 3580 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3581 ConstantSize->getZExtValue(), Align, isVol, 3582 false, DstPtrInfo, SrcPtrInfo); 3583 if (Result.getNode()) 3584 return Result; 3585 } 3586 3587 // Then check to see if we should lower the memmove with target-specific 3588 // code. If the target chooses to do this, this is the next best. 3589 SDValue Result = 3590 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3591 DstPtrInfo, SrcPtrInfo); 3592 if (Result.getNode()) 3593 return Result; 3594 3595 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3596 // not be safe. See memcpy above for more details. 3597 3598 // Emit a library call. 3599 TargetLowering::ArgListTy Args; 3600 TargetLowering::ArgListEntry Entry; 3601 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3602 Entry.Node = Dst; Args.push_back(Entry); 3603 Entry.Node = Src; Args.push_back(Entry); 3604 Entry.Node = Size; Args.push_back(Entry); 3605 // FIXME: pass in DebugLoc 3606 std::pair<SDValue,SDValue> CallResult = 3607 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3608 false, false, false, false, 0, 3609 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3610 /*isReturnValueUsed=*/false, 3611 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3612 TLI.getPointerTy()), 3613 Args, *this, dl); 3614 return CallResult.second; 3615} 3616 3617SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3618 SDValue Src, SDValue Size, 3619 unsigned Align, bool isVol, 3620 MachinePointerInfo DstPtrInfo) { 3621 3622 // Check to see if we should lower the memset to stores first. 3623 // For cases within the target-specified limits, this is the best choice. 3624 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3625 if (ConstantSize) { 3626 // Memset with size zero? Just return the original chain. 3627 if (ConstantSize->isNullValue()) 3628 return Chain; 3629 3630 SDValue Result = 3631 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3632 Align, isVol, DstPtrInfo); 3633 3634 if (Result.getNode()) 3635 return Result; 3636 } 3637 3638 // Then check to see if we should lower the memset with target-specific 3639 // code. If the target chooses to do this, this is the next best. 3640 SDValue Result = 3641 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3642 DstPtrInfo); 3643 if (Result.getNode()) 3644 return Result; 3645 3646 // Emit a library call. 3647 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3648 TargetLowering::ArgListTy Args; 3649 TargetLowering::ArgListEntry Entry; 3650 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3651 Args.push_back(Entry); 3652 // Extend or truncate the argument to be an i32 value for the call. 3653 if (Src.getValueType().bitsGT(MVT::i32)) 3654 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3655 else 3656 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3657 Entry.Node = Src; 3658 Entry.Ty = Type::getInt32Ty(*getContext()); 3659 Entry.isSExt = true; 3660 Args.push_back(Entry); 3661 Entry.Node = Size; 3662 Entry.Ty = IntPtrTy; 3663 Entry.isSExt = false; 3664 Args.push_back(Entry); 3665 // FIXME: pass in DebugLoc 3666 std::pair<SDValue,SDValue> CallResult = 3667 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3668 false, false, false, false, 0, 3669 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3670 /*isReturnValueUsed=*/false, 3671 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3672 TLI.getPointerTy()), 3673 Args, *this, dl); 3674 return CallResult.second; 3675} 3676 3677SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3678 SDValue Chain, SDValue Ptr, SDValue Cmp, 3679 SDValue Swp, MachinePointerInfo PtrInfo, 3680 unsigned Alignment) { 3681 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3682 Alignment = getEVTAlignment(MemVT); 3683 3684 MachineFunction &MF = getMachineFunction(); 3685 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3686 3687 // For now, atomics are considered to be volatile always. 3688 Flags |= MachineMemOperand::MOVolatile; 3689 3690 MachineMemOperand *MMO = 3691 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3692 3693 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3694} 3695 3696SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3697 SDValue Chain, 3698 SDValue Ptr, SDValue Cmp, 3699 SDValue Swp, MachineMemOperand *MMO) { 3700 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3701 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3702 3703 EVT VT = Cmp.getValueType(); 3704 3705 SDVTList VTs = getVTList(VT, MVT::Other); 3706 FoldingSetNodeID ID; 3707 ID.AddInteger(MemVT.getRawBits()); 3708 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3709 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3710 void* IP = 0; 3711 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3712 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3713 return SDValue(E, 0); 3714 } 3715 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3716 Ptr, Cmp, Swp, MMO); 3717 CSEMap.InsertNode(N, IP); 3718 AllNodes.push_back(N); 3719 return SDValue(N, 0); 3720} 3721 3722SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3723 SDValue Chain, 3724 SDValue Ptr, SDValue Val, 3725 const Value* PtrVal, 3726 unsigned Alignment) { 3727 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3728 Alignment = getEVTAlignment(MemVT); 3729 3730 MachineFunction &MF = getMachineFunction(); 3731 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3732 3733 // For now, atomics are considered to be volatile always. 3734 Flags |= MachineMemOperand::MOVolatile; 3735 3736 MachineMemOperand *MMO = 3737 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3738 MemVT.getStoreSize(), Alignment); 3739 3740 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3741} 3742 3743SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3744 SDValue Chain, 3745 SDValue Ptr, SDValue Val, 3746 MachineMemOperand *MMO) { 3747 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3748 Opcode == ISD::ATOMIC_LOAD_SUB || 3749 Opcode == ISD::ATOMIC_LOAD_AND || 3750 Opcode == ISD::ATOMIC_LOAD_OR || 3751 Opcode == ISD::ATOMIC_LOAD_XOR || 3752 Opcode == ISD::ATOMIC_LOAD_NAND || 3753 Opcode == ISD::ATOMIC_LOAD_MIN || 3754 Opcode == ISD::ATOMIC_LOAD_MAX || 3755 Opcode == ISD::ATOMIC_LOAD_UMIN || 3756 Opcode == ISD::ATOMIC_LOAD_UMAX || 3757 Opcode == ISD::ATOMIC_SWAP) && 3758 "Invalid Atomic Op"); 3759 3760 EVT VT = Val.getValueType(); 3761 3762 SDVTList VTs = getVTList(VT, MVT::Other); 3763 FoldingSetNodeID ID; 3764 ID.AddInteger(MemVT.getRawBits()); 3765 SDValue Ops[] = {Chain, Ptr, Val}; 3766 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3767 void* IP = 0; 3768 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3769 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3770 return SDValue(E, 0); 3771 } 3772 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3773 Ptr, Val, MMO); 3774 CSEMap.InsertNode(N, IP); 3775 AllNodes.push_back(N); 3776 return SDValue(N, 0); 3777} 3778 3779/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3780/// Allowed to return something different (and simpler) if Simplify is true. 3781SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3782 DebugLoc dl) { 3783 if (NumOps == 1) 3784 return Ops[0]; 3785 3786 SmallVector<EVT, 4> VTs; 3787 VTs.reserve(NumOps); 3788 for (unsigned i = 0; i < NumOps; ++i) 3789 VTs.push_back(Ops[i].getValueType()); 3790 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3791 Ops, NumOps); 3792} 3793 3794SDValue 3795SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3796 const EVT *VTs, unsigned NumVTs, 3797 const SDValue *Ops, unsigned NumOps, 3798 EVT MemVT, MachinePointerInfo PtrInfo, 3799 unsigned Align, bool Vol, 3800 bool ReadMem, bool WriteMem) { 3801 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3802 MemVT, PtrInfo, Align, Vol, 3803 ReadMem, WriteMem); 3804} 3805 3806SDValue 3807SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3808 const SDValue *Ops, unsigned NumOps, 3809 EVT MemVT, MachinePointerInfo PtrInfo, 3810 unsigned Align, bool Vol, 3811 bool ReadMem, bool WriteMem) { 3812 if (Align == 0) // Ensure that codegen never sees alignment 0 3813 Align = getEVTAlignment(MemVT); 3814 3815 MachineFunction &MF = getMachineFunction(); 3816 unsigned Flags = 0; 3817 if (WriteMem) 3818 Flags |= MachineMemOperand::MOStore; 3819 if (ReadMem) 3820 Flags |= MachineMemOperand::MOLoad; 3821 if (Vol) 3822 Flags |= MachineMemOperand::MOVolatile; 3823 MachineMemOperand *MMO = 3824 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 3825 3826 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3827} 3828 3829SDValue 3830SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3831 const SDValue *Ops, unsigned NumOps, 3832 EVT MemVT, MachineMemOperand *MMO) { 3833 assert((Opcode == ISD::INTRINSIC_VOID || 3834 Opcode == ISD::INTRINSIC_W_CHAIN || 3835 Opcode == ISD::PREFETCH || 3836 (Opcode <= INT_MAX && 3837 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3838 "Opcode is not a memory-accessing opcode!"); 3839 3840 // Memoize the node unless it returns a flag. 3841 MemIntrinsicSDNode *N; 3842 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3843 FoldingSetNodeID ID; 3844 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3845 void *IP = 0; 3846 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3847 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3848 return SDValue(E, 0); 3849 } 3850 3851 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3852 MemVT, MMO); 3853 CSEMap.InsertNode(N, IP); 3854 } else { 3855 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3856 MemVT, MMO); 3857 } 3858 AllNodes.push_back(N); 3859 return SDValue(N, 0); 3860} 3861 3862/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 3863/// MachinePointerInfo record from it. This is particularly useful because the 3864/// code generator has many cases where it doesn't bother passing in a 3865/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 3866static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 3867 // If this is FI+Offset, we can model it. 3868 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 3869 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 3870 3871 // If this is (FI+Offset1)+Offset2, we can model it. 3872 if (Ptr.getOpcode() != ISD::ADD || 3873 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 3874 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 3875 return MachinePointerInfo(); 3876 3877 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 3878 return MachinePointerInfo::getFixedStack(FI, Offset+ 3879 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 3880} 3881 3882/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 3883/// MachinePointerInfo record from it. This is particularly useful because the 3884/// code generator has many cases where it doesn't bother passing in a 3885/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 3886static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 3887 // If the 'Offset' value isn't a constant, we can't handle this. 3888 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 3889 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 3890 if (OffsetOp.getOpcode() == ISD::UNDEF) 3891 return InferPointerInfo(Ptr); 3892 return MachinePointerInfo(); 3893} 3894 3895 3896SDValue 3897SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3898 EVT VT, DebugLoc dl, SDValue Chain, 3899 SDValue Ptr, SDValue Offset, 3900 MachinePointerInfo PtrInfo, EVT MemVT, 3901 bool isVolatile, bool isNonTemporal, 3902 unsigned Alignment, const MDNode *TBAAInfo) { 3903 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3904 Alignment = getEVTAlignment(VT); 3905 3906 unsigned Flags = MachineMemOperand::MOLoad; 3907 if (isVolatile) 3908 Flags |= MachineMemOperand::MOVolatile; 3909 if (isNonTemporal) 3910 Flags |= MachineMemOperand::MONonTemporal; 3911 3912 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 3913 // clients. 3914 if (PtrInfo.V == 0) 3915 PtrInfo = InferPointerInfo(Ptr, Offset); 3916 3917 MachineFunction &MF = getMachineFunction(); 3918 MachineMemOperand *MMO = 3919 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 3920 TBAAInfo); 3921 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 3922} 3923 3924SDValue 3925SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3926 EVT VT, DebugLoc dl, SDValue Chain, 3927 SDValue Ptr, SDValue Offset, EVT MemVT, 3928 MachineMemOperand *MMO) { 3929 if (VT == MemVT) { 3930 ExtType = ISD::NON_EXTLOAD; 3931 } else if (ExtType == ISD::NON_EXTLOAD) { 3932 assert(VT == MemVT && "Non-extending load from different memory type!"); 3933 } else { 3934 // Extending load. 3935 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3936 "Should only be an extending load, not truncating!"); 3937 assert(VT.isInteger() == MemVT.isInteger() && 3938 "Cannot convert from FP to Int or Int -> FP!"); 3939 assert(VT.isVector() == MemVT.isVector() && 3940 "Cannot use trunc store to convert to or from a vector!"); 3941 assert((!VT.isVector() || 3942 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3943 "Cannot use trunc store to change the number of vector elements!"); 3944 } 3945 3946 bool Indexed = AM != ISD::UNINDEXED; 3947 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3948 "Unindexed load with an offset!"); 3949 3950 SDVTList VTs = Indexed ? 3951 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3952 SDValue Ops[] = { Chain, Ptr, Offset }; 3953 FoldingSetNodeID ID; 3954 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3955 ID.AddInteger(MemVT.getRawBits()); 3956 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3957 MMO->isNonTemporal())); 3958 void *IP = 0; 3959 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3960 cast<LoadSDNode>(E)->refineAlignment(MMO); 3961 return SDValue(E, 0); 3962 } 3963 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3964 MemVT, MMO); 3965 CSEMap.InsertNode(N, IP); 3966 AllNodes.push_back(N); 3967 return SDValue(N, 0); 3968} 3969 3970SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3971 SDValue Chain, SDValue Ptr, 3972 MachinePointerInfo PtrInfo, 3973 bool isVolatile, bool isNonTemporal, 3974 unsigned Alignment, const MDNode *TBAAInfo) { 3975 SDValue Undef = getUNDEF(Ptr.getValueType()); 3976 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 3977 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 3978} 3979 3980SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl, 3981 SDValue Chain, SDValue Ptr, 3982 MachinePointerInfo PtrInfo, EVT MemVT, 3983 bool isVolatile, bool isNonTemporal, 3984 unsigned Alignment, const MDNode *TBAAInfo) { 3985 SDValue Undef = getUNDEF(Ptr.getValueType()); 3986 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 3987 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment, 3988 TBAAInfo); 3989} 3990 3991 3992SDValue 3993SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3994 SDValue Offset, ISD::MemIndexedMode AM) { 3995 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3996 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3997 "Load is already a indexed load!"); 3998 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 3999 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4000 LD->getMemoryVT(), 4001 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4002} 4003 4004SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4005 SDValue Ptr, MachinePointerInfo PtrInfo, 4006 bool isVolatile, bool isNonTemporal, 4007 unsigned Alignment, const MDNode *TBAAInfo) { 4008 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4009 Alignment = getEVTAlignment(Val.getValueType()); 4010 4011 unsigned Flags = MachineMemOperand::MOStore; 4012 if (isVolatile) 4013 Flags |= MachineMemOperand::MOVolatile; 4014 if (isNonTemporal) 4015 Flags |= MachineMemOperand::MONonTemporal; 4016 4017 if (PtrInfo.V == 0) 4018 PtrInfo = InferPointerInfo(Ptr); 4019 4020 MachineFunction &MF = getMachineFunction(); 4021 MachineMemOperand *MMO = 4022 MF.getMachineMemOperand(PtrInfo, Flags, 4023 Val.getValueType().getStoreSize(), Alignment, 4024 TBAAInfo); 4025 4026 return getStore(Chain, dl, Val, Ptr, MMO); 4027} 4028 4029SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4030 SDValue Ptr, MachineMemOperand *MMO) { 4031 EVT VT = Val.getValueType(); 4032 SDVTList VTs = getVTList(MVT::Other); 4033 SDValue Undef = getUNDEF(Ptr.getValueType()); 4034 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4035 FoldingSetNodeID ID; 4036 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4037 ID.AddInteger(VT.getRawBits()); 4038 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4039 MMO->isNonTemporal())); 4040 void *IP = 0; 4041 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4042 cast<StoreSDNode>(E)->refineAlignment(MMO); 4043 return SDValue(E, 0); 4044 } 4045 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4046 false, VT, MMO); 4047 CSEMap.InsertNode(N, IP); 4048 AllNodes.push_back(N); 4049 return SDValue(N, 0); 4050} 4051 4052SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4053 SDValue Ptr, MachinePointerInfo PtrInfo, 4054 EVT SVT,bool isVolatile, bool isNonTemporal, 4055 unsigned Alignment, 4056 const MDNode *TBAAInfo) { 4057 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4058 Alignment = getEVTAlignment(SVT); 4059 4060 unsigned Flags = MachineMemOperand::MOStore; 4061 if (isVolatile) 4062 Flags |= MachineMemOperand::MOVolatile; 4063 if (isNonTemporal) 4064 Flags |= MachineMemOperand::MONonTemporal; 4065 4066 if (PtrInfo.V == 0) 4067 PtrInfo = InferPointerInfo(Ptr); 4068 4069 MachineFunction &MF = getMachineFunction(); 4070 MachineMemOperand *MMO = 4071 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4072 TBAAInfo); 4073 4074 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4075} 4076 4077SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4078 SDValue Ptr, EVT SVT, 4079 MachineMemOperand *MMO) { 4080 EVT VT = Val.getValueType(); 4081 4082 if (VT == SVT) 4083 return getStore(Chain, dl, Val, Ptr, MMO); 4084 4085 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4086 "Should only be a truncating store, not extending!"); 4087 assert(VT.isInteger() == SVT.isInteger() && 4088 "Can't do FP-INT conversion!"); 4089 assert(VT.isVector() == SVT.isVector() && 4090 "Cannot use trunc store to convert to or from a vector!"); 4091 assert((!VT.isVector() || 4092 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4093 "Cannot use trunc store to change the number of vector elements!"); 4094 4095 SDVTList VTs = getVTList(MVT::Other); 4096 SDValue Undef = getUNDEF(Ptr.getValueType()); 4097 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4098 FoldingSetNodeID ID; 4099 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4100 ID.AddInteger(SVT.getRawBits()); 4101 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4102 MMO->isNonTemporal())); 4103 void *IP = 0; 4104 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4105 cast<StoreSDNode>(E)->refineAlignment(MMO); 4106 return SDValue(E, 0); 4107 } 4108 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4109 true, SVT, MMO); 4110 CSEMap.InsertNode(N, IP); 4111 AllNodes.push_back(N); 4112 return SDValue(N, 0); 4113} 4114 4115SDValue 4116SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4117 SDValue Offset, ISD::MemIndexedMode AM) { 4118 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4119 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4120 "Store is already a indexed store!"); 4121 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4122 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4123 FoldingSetNodeID ID; 4124 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4125 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4126 ID.AddInteger(ST->getRawSubclassData()); 4127 void *IP = 0; 4128 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4129 return SDValue(E, 0); 4130 4131 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4132 ST->isTruncatingStore(), 4133 ST->getMemoryVT(), 4134 ST->getMemOperand()); 4135 CSEMap.InsertNode(N, IP); 4136 AllNodes.push_back(N); 4137 return SDValue(N, 0); 4138} 4139 4140SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4141 SDValue Chain, SDValue Ptr, 4142 SDValue SV, 4143 unsigned Align) { 4144 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4145 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4146} 4147 4148SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4149 const SDUse *Ops, unsigned NumOps) { 4150 switch (NumOps) { 4151 case 0: return getNode(Opcode, DL, VT); 4152 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4153 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4154 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4155 default: break; 4156 } 4157 4158 // Copy from an SDUse array into an SDValue array for use with 4159 // the regular getNode logic. 4160 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4161 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4162} 4163 4164SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4165 const SDValue *Ops, unsigned NumOps) { 4166 switch (NumOps) { 4167 case 0: return getNode(Opcode, DL, VT); 4168 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4169 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4170 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4171 default: break; 4172 } 4173 4174 switch (Opcode) { 4175 default: break; 4176 case ISD::SELECT_CC: { 4177 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4178 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4179 "LHS and RHS of condition must have same type!"); 4180 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4181 "True and False arms of SelectCC must have same type!"); 4182 assert(Ops[2].getValueType() == VT && 4183 "select_cc node must be of same type as true and false value!"); 4184 break; 4185 } 4186 case ISD::BR_CC: { 4187 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4188 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4189 "LHS/RHS of comparison should match types!"); 4190 break; 4191 } 4192 } 4193 4194 // Memoize nodes. 4195 SDNode *N; 4196 SDVTList VTs = getVTList(VT); 4197 4198 if (VT != MVT::Flag) { 4199 FoldingSetNodeID ID; 4200 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4201 void *IP = 0; 4202 4203 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4204 return SDValue(E, 0); 4205 4206 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4207 CSEMap.InsertNode(N, IP); 4208 } else { 4209 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4210 } 4211 4212 AllNodes.push_back(N); 4213#ifndef NDEBUG 4214 VerifyNode(N); 4215#endif 4216 return SDValue(N, 0); 4217} 4218 4219SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4220 const std::vector<EVT> &ResultTys, 4221 const SDValue *Ops, unsigned NumOps) { 4222 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4223 Ops, NumOps); 4224} 4225 4226SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4227 const EVT *VTs, unsigned NumVTs, 4228 const SDValue *Ops, unsigned NumOps) { 4229 if (NumVTs == 1) 4230 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4231 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4232} 4233 4234SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4235 const SDValue *Ops, unsigned NumOps) { 4236 if (VTList.NumVTs == 1) 4237 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4238 4239#if 0 4240 switch (Opcode) { 4241 // FIXME: figure out how to safely handle things like 4242 // int foo(int x) { return 1 << (x & 255); } 4243 // int bar() { return foo(256); } 4244 case ISD::SRA_PARTS: 4245 case ISD::SRL_PARTS: 4246 case ISD::SHL_PARTS: 4247 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4248 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4249 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4250 else if (N3.getOpcode() == ISD::AND) 4251 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4252 // If the and is only masking out bits that cannot effect the shift, 4253 // eliminate the and. 4254 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4255 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4256 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4257 } 4258 break; 4259 } 4260#endif 4261 4262 // Memoize the node unless it returns a flag. 4263 SDNode *N; 4264 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4265 FoldingSetNodeID ID; 4266 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4267 void *IP = 0; 4268 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4269 return SDValue(E, 0); 4270 4271 if (NumOps == 1) { 4272 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4273 } else if (NumOps == 2) { 4274 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4275 } else if (NumOps == 3) { 4276 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4277 Ops[2]); 4278 } else { 4279 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4280 } 4281 CSEMap.InsertNode(N, IP); 4282 } else { 4283 if (NumOps == 1) { 4284 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4285 } else if (NumOps == 2) { 4286 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4287 } else if (NumOps == 3) { 4288 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4289 Ops[2]); 4290 } else { 4291 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4292 } 4293 } 4294 AllNodes.push_back(N); 4295#ifndef NDEBUG 4296 VerifyNode(N); 4297#endif 4298 return SDValue(N, 0); 4299} 4300 4301SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4302 return getNode(Opcode, DL, VTList, 0, 0); 4303} 4304 4305SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4306 SDValue N1) { 4307 SDValue Ops[] = { N1 }; 4308 return getNode(Opcode, DL, VTList, Ops, 1); 4309} 4310 4311SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4312 SDValue N1, SDValue N2) { 4313 SDValue Ops[] = { N1, N2 }; 4314 return getNode(Opcode, DL, VTList, Ops, 2); 4315} 4316 4317SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4318 SDValue N1, SDValue N2, SDValue N3) { 4319 SDValue Ops[] = { N1, N2, N3 }; 4320 return getNode(Opcode, DL, VTList, Ops, 3); 4321} 4322 4323SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4324 SDValue N1, SDValue N2, SDValue N3, 4325 SDValue N4) { 4326 SDValue Ops[] = { N1, N2, N3, N4 }; 4327 return getNode(Opcode, DL, VTList, Ops, 4); 4328} 4329 4330SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4331 SDValue N1, SDValue N2, SDValue N3, 4332 SDValue N4, SDValue N5) { 4333 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4334 return getNode(Opcode, DL, VTList, Ops, 5); 4335} 4336 4337SDVTList SelectionDAG::getVTList(EVT VT) { 4338 return makeVTList(SDNode::getValueTypeList(VT), 1); 4339} 4340 4341SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4342 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4343 E = VTList.rend(); I != E; ++I) 4344 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4345 return *I; 4346 4347 EVT *Array = Allocator.Allocate<EVT>(2); 4348 Array[0] = VT1; 4349 Array[1] = VT2; 4350 SDVTList Result = makeVTList(Array, 2); 4351 VTList.push_back(Result); 4352 return Result; 4353} 4354 4355SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4356 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4357 E = VTList.rend(); I != E; ++I) 4358 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4359 I->VTs[2] == VT3) 4360 return *I; 4361 4362 EVT *Array = Allocator.Allocate<EVT>(3); 4363 Array[0] = VT1; 4364 Array[1] = VT2; 4365 Array[2] = VT3; 4366 SDVTList Result = makeVTList(Array, 3); 4367 VTList.push_back(Result); 4368 return Result; 4369} 4370 4371SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4372 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4373 E = VTList.rend(); I != E; ++I) 4374 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4375 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4376 return *I; 4377 4378 EVT *Array = Allocator.Allocate<EVT>(4); 4379 Array[0] = VT1; 4380 Array[1] = VT2; 4381 Array[2] = VT3; 4382 Array[3] = VT4; 4383 SDVTList Result = makeVTList(Array, 4); 4384 VTList.push_back(Result); 4385 return Result; 4386} 4387 4388SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4389 switch (NumVTs) { 4390 case 0: llvm_unreachable("Cannot have nodes without results!"); 4391 case 1: return getVTList(VTs[0]); 4392 case 2: return getVTList(VTs[0], VTs[1]); 4393 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4394 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4395 default: break; 4396 } 4397 4398 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4399 E = VTList.rend(); I != E; ++I) { 4400 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4401 continue; 4402 4403 bool NoMatch = false; 4404 for (unsigned i = 2; i != NumVTs; ++i) 4405 if (VTs[i] != I->VTs[i]) { 4406 NoMatch = true; 4407 break; 4408 } 4409 if (!NoMatch) 4410 return *I; 4411 } 4412 4413 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4414 std::copy(VTs, VTs+NumVTs, Array); 4415 SDVTList Result = makeVTList(Array, NumVTs); 4416 VTList.push_back(Result); 4417 return Result; 4418} 4419 4420 4421/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4422/// specified operands. If the resultant node already exists in the DAG, 4423/// this does not modify the specified node, instead it returns the node that 4424/// already exists. If the resultant node does not exist in the DAG, the 4425/// input node is returned. As a degenerate case, if you specify the same 4426/// input operands as the node already has, the input node is returned. 4427SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4428 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4429 4430 // Check to see if there is no change. 4431 if (Op == N->getOperand(0)) return N; 4432 4433 // See if the modified node already exists. 4434 void *InsertPos = 0; 4435 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4436 return Existing; 4437 4438 // Nope it doesn't. Remove the node from its current place in the maps. 4439 if (InsertPos) 4440 if (!RemoveNodeFromCSEMaps(N)) 4441 InsertPos = 0; 4442 4443 // Now we update the operands. 4444 N->OperandList[0].set(Op); 4445 4446 // If this gets put into a CSE map, add it. 4447 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4448 return N; 4449} 4450 4451SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4452 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4453 4454 // Check to see if there is no change. 4455 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4456 return N; // No operands changed, just return the input node. 4457 4458 // See if the modified node already exists. 4459 void *InsertPos = 0; 4460 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4461 return Existing; 4462 4463 // Nope it doesn't. Remove the node from its current place in the maps. 4464 if (InsertPos) 4465 if (!RemoveNodeFromCSEMaps(N)) 4466 InsertPos = 0; 4467 4468 // Now we update the operands. 4469 if (N->OperandList[0] != Op1) 4470 N->OperandList[0].set(Op1); 4471 if (N->OperandList[1] != Op2) 4472 N->OperandList[1].set(Op2); 4473 4474 // If this gets put into a CSE map, add it. 4475 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4476 return N; 4477} 4478 4479SDNode *SelectionDAG:: 4480UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4481 SDValue Ops[] = { Op1, Op2, Op3 }; 4482 return UpdateNodeOperands(N, Ops, 3); 4483} 4484 4485SDNode *SelectionDAG:: 4486UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4487 SDValue Op3, SDValue Op4) { 4488 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4489 return UpdateNodeOperands(N, Ops, 4); 4490} 4491 4492SDNode *SelectionDAG:: 4493UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4494 SDValue Op3, SDValue Op4, SDValue Op5) { 4495 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4496 return UpdateNodeOperands(N, Ops, 5); 4497} 4498 4499SDNode *SelectionDAG:: 4500UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4501 assert(N->getNumOperands() == NumOps && 4502 "Update with wrong number of operands"); 4503 4504 // Check to see if there is no change. 4505 bool AnyChange = false; 4506 for (unsigned i = 0; i != NumOps; ++i) { 4507 if (Ops[i] != N->getOperand(i)) { 4508 AnyChange = true; 4509 break; 4510 } 4511 } 4512 4513 // No operands changed, just return the input node. 4514 if (!AnyChange) return N; 4515 4516 // See if the modified node already exists. 4517 void *InsertPos = 0; 4518 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4519 return Existing; 4520 4521 // Nope it doesn't. Remove the node from its current place in the maps. 4522 if (InsertPos) 4523 if (!RemoveNodeFromCSEMaps(N)) 4524 InsertPos = 0; 4525 4526 // Now we update the operands. 4527 for (unsigned i = 0; i != NumOps; ++i) 4528 if (N->OperandList[i] != Ops[i]) 4529 N->OperandList[i].set(Ops[i]); 4530 4531 // If this gets put into a CSE map, add it. 4532 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4533 return N; 4534} 4535 4536/// DropOperands - Release the operands and set this node to have 4537/// zero operands. 4538void SDNode::DropOperands() { 4539 // Unlike the code in MorphNodeTo that does this, we don't need to 4540 // watch for dead nodes here. 4541 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4542 SDUse &Use = *I++; 4543 Use.set(SDValue()); 4544 } 4545} 4546 4547/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4548/// machine opcode. 4549/// 4550SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4551 EVT VT) { 4552 SDVTList VTs = getVTList(VT); 4553 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4554} 4555 4556SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4557 EVT VT, SDValue Op1) { 4558 SDVTList VTs = getVTList(VT); 4559 SDValue Ops[] = { Op1 }; 4560 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4561} 4562 4563SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4564 EVT VT, SDValue Op1, 4565 SDValue Op2) { 4566 SDVTList VTs = getVTList(VT); 4567 SDValue Ops[] = { Op1, Op2 }; 4568 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4569} 4570 4571SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4572 EVT VT, SDValue Op1, 4573 SDValue Op2, SDValue Op3) { 4574 SDVTList VTs = getVTList(VT); 4575 SDValue Ops[] = { Op1, Op2, Op3 }; 4576 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4577} 4578 4579SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4580 EVT VT, const SDValue *Ops, 4581 unsigned NumOps) { 4582 SDVTList VTs = getVTList(VT); 4583 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4584} 4585 4586SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4587 EVT VT1, EVT VT2, const SDValue *Ops, 4588 unsigned NumOps) { 4589 SDVTList VTs = getVTList(VT1, VT2); 4590 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4591} 4592 4593SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4594 EVT VT1, EVT VT2) { 4595 SDVTList VTs = getVTList(VT1, VT2); 4596 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4597} 4598 4599SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4600 EVT VT1, EVT VT2, EVT VT3, 4601 const SDValue *Ops, unsigned NumOps) { 4602 SDVTList VTs = getVTList(VT1, VT2, VT3); 4603 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4604} 4605 4606SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4607 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4608 const SDValue *Ops, unsigned NumOps) { 4609 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4610 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4611} 4612 4613SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4614 EVT VT1, EVT VT2, 4615 SDValue Op1) { 4616 SDVTList VTs = getVTList(VT1, VT2); 4617 SDValue Ops[] = { Op1 }; 4618 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4619} 4620 4621SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4622 EVT VT1, EVT VT2, 4623 SDValue Op1, SDValue Op2) { 4624 SDVTList VTs = getVTList(VT1, VT2); 4625 SDValue Ops[] = { Op1, Op2 }; 4626 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4627} 4628 4629SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4630 EVT VT1, EVT VT2, 4631 SDValue Op1, SDValue Op2, 4632 SDValue Op3) { 4633 SDVTList VTs = getVTList(VT1, VT2); 4634 SDValue Ops[] = { Op1, Op2, Op3 }; 4635 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4636} 4637 4638SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4639 EVT VT1, EVT VT2, EVT VT3, 4640 SDValue Op1, SDValue Op2, 4641 SDValue Op3) { 4642 SDVTList VTs = getVTList(VT1, VT2, VT3); 4643 SDValue Ops[] = { Op1, Op2, Op3 }; 4644 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4645} 4646 4647SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4648 SDVTList VTs, const SDValue *Ops, 4649 unsigned NumOps) { 4650 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4651 // Reset the NodeID to -1. 4652 N->setNodeId(-1); 4653 return N; 4654} 4655 4656/// MorphNodeTo - This *mutates* the specified node to have the specified 4657/// return type, opcode, and operands. 4658/// 4659/// Note that MorphNodeTo returns the resultant node. If there is already a 4660/// node of the specified opcode and operands, it returns that node instead of 4661/// the current one. Note that the DebugLoc need not be the same. 4662/// 4663/// Using MorphNodeTo is faster than creating a new node and swapping it in 4664/// with ReplaceAllUsesWith both because it often avoids allocating a new 4665/// node, and because it doesn't require CSE recalculation for any of 4666/// the node's users. 4667/// 4668SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4669 SDVTList VTs, const SDValue *Ops, 4670 unsigned NumOps) { 4671 // If an identical node already exists, use it. 4672 void *IP = 0; 4673 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4674 FoldingSetNodeID ID; 4675 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4676 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4677 return ON; 4678 } 4679 4680 if (!RemoveNodeFromCSEMaps(N)) 4681 IP = 0; 4682 4683 // Start the morphing. 4684 N->NodeType = Opc; 4685 N->ValueList = VTs.VTs; 4686 N->NumValues = VTs.NumVTs; 4687 4688 // Clear the operands list, updating used nodes to remove this from their 4689 // use list. Keep track of any operands that become dead as a result. 4690 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4691 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4692 SDUse &Use = *I++; 4693 SDNode *Used = Use.getNode(); 4694 Use.set(SDValue()); 4695 if (Used->use_empty()) 4696 DeadNodeSet.insert(Used); 4697 } 4698 4699 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4700 // Initialize the memory references information. 4701 MN->setMemRefs(0, 0); 4702 // If NumOps is larger than the # of operands we can have in a 4703 // MachineSDNode, reallocate the operand list. 4704 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4705 if (MN->OperandsNeedDelete) 4706 delete[] MN->OperandList; 4707 if (NumOps > array_lengthof(MN->LocalOperands)) 4708 // We're creating a final node that will live unmorphed for the 4709 // remainder of the current SelectionDAG iteration, so we can allocate 4710 // the operands directly out of a pool with no recycling metadata. 4711 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4712 Ops, NumOps); 4713 else 4714 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4715 MN->OperandsNeedDelete = false; 4716 } else 4717 MN->InitOperands(MN->OperandList, Ops, NumOps); 4718 } else { 4719 // If NumOps is larger than the # of operands we currently have, reallocate 4720 // the operand list. 4721 if (NumOps > N->NumOperands) { 4722 if (N->OperandsNeedDelete) 4723 delete[] N->OperandList; 4724 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4725 N->OperandsNeedDelete = true; 4726 } else 4727 N->InitOperands(N->OperandList, Ops, NumOps); 4728 } 4729 4730 // Delete any nodes that are still dead after adding the uses for the 4731 // new operands. 4732 if (!DeadNodeSet.empty()) { 4733 SmallVector<SDNode *, 16> DeadNodes; 4734 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4735 E = DeadNodeSet.end(); I != E; ++I) 4736 if ((*I)->use_empty()) 4737 DeadNodes.push_back(*I); 4738 RemoveDeadNodes(DeadNodes); 4739 } 4740 4741 if (IP) 4742 CSEMap.InsertNode(N, IP); // Memoize the new node. 4743 return N; 4744} 4745 4746 4747/// getMachineNode - These are used for target selectors to create a new node 4748/// with specified return type(s), MachineInstr opcode, and operands. 4749/// 4750/// Note that getMachineNode returns the resultant node. If there is already a 4751/// node of the specified opcode and operands, it returns that node instead of 4752/// the current one. 4753MachineSDNode * 4754SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4755 SDVTList VTs = getVTList(VT); 4756 return getMachineNode(Opcode, dl, VTs, 0, 0); 4757} 4758 4759MachineSDNode * 4760SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4761 SDVTList VTs = getVTList(VT); 4762 SDValue Ops[] = { Op1 }; 4763 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4764} 4765 4766MachineSDNode * 4767SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4768 SDValue Op1, SDValue Op2) { 4769 SDVTList VTs = getVTList(VT); 4770 SDValue Ops[] = { Op1, Op2 }; 4771 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4772} 4773 4774MachineSDNode * 4775SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4776 SDValue Op1, SDValue Op2, SDValue Op3) { 4777 SDVTList VTs = getVTList(VT); 4778 SDValue Ops[] = { Op1, Op2, Op3 }; 4779 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4780} 4781 4782MachineSDNode * 4783SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4784 const SDValue *Ops, unsigned NumOps) { 4785 SDVTList VTs = getVTList(VT); 4786 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4787} 4788 4789MachineSDNode * 4790SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4791 SDVTList VTs = getVTList(VT1, VT2); 4792 return getMachineNode(Opcode, dl, VTs, 0, 0); 4793} 4794 4795MachineSDNode * 4796SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4797 EVT VT1, EVT VT2, SDValue Op1) { 4798 SDVTList VTs = getVTList(VT1, VT2); 4799 SDValue Ops[] = { Op1 }; 4800 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4801} 4802 4803MachineSDNode * 4804SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4805 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4806 SDVTList VTs = getVTList(VT1, VT2); 4807 SDValue Ops[] = { Op1, Op2 }; 4808 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4809} 4810 4811MachineSDNode * 4812SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4813 EVT VT1, EVT VT2, SDValue Op1, 4814 SDValue Op2, SDValue Op3) { 4815 SDVTList VTs = getVTList(VT1, VT2); 4816 SDValue Ops[] = { Op1, Op2, Op3 }; 4817 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4818} 4819 4820MachineSDNode * 4821SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4822 EVT VT1, EVT VT2, 4823 const SDValue *Ops, unsigned NumOps) { 4824 SDVTList VTs = getVTList(VT1, VT2); 4825 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4826} 4827 4828MachineSDNode * 4829SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4830 EVT VT1, EVT VT2, EVT VT3, 4831 SDValue Op1, SDValue Op2) { 4832 SDVTList VTs = getVTList(VT1, VT2, VT3); 4833 SDValue Ops[] = { Op1, Op2 }; 4834 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4835} 4836 4837MachineSDNode * 4838SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4839 EVT VT1, EVT VT2, EVT VT3, 4840 SDValue Op1, SDValue Op2, SDValue Op3) { 4841 SDVTList VTs = getVTList(VT1, VT2, VT3); 4842 SDValue Ops[] = { Op1, Op2, Op3 }; 4843 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4844} 4845 4846MachineSDNode * 4847SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4848 EVT VT1, EVT VT2, EVT VT3, 4849 const SDValue *Ops, unsigned NumOps) { 4850 SDVTList VTs = getVTList(VT1, VT2, VT3); 4851 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4852} 4853 4854MachineSDNode * 4855SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4856 EVT VT2, EVT VT3, EVT VT4, 4857 const SDValue *Ops, unsigned NumOps) { 4858 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4859 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4860} 4861 4862MachineSDNode * 4863SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4864 const std::vector<EVT> &ResultTys, 4865 const SDValue *Ops, unsigned NumOps) { 4866 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4867 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4868} 4869 4870MachineSDNode * 4871SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4872 const SDValue *Ops, unsigned NumOps) { 4873 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4874 MachineSDNode *N; 4875 void *IP; 4876 4877 if (DoCSE) { 4878 FoldingSetNodeID ID; 4879 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4880 IP = 0; 4881 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4882 return cast<MachineSDNode>(E); 4883 } 4884 4885 // Allocate a new MachineSDNode. 4886 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4887 4888 // Initialize the operands list. 4889 if (NumOps > array_lengthof(N->LocalOperands)) 4890 // We're creating a final node that will live unmorphed for the 4891 // remainder of the current SelectionDAG iteration, so we can allocate 4892 // the operands directly out of a pool with no recycling metadata. 4893 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4894 Ops, NumOps); 4895 else 4896 N->InitOperands(N->LocalOperands, Ops, NumOps); 4897 N->OperandsNeedDelete = false; 4898 4899 if (DoCSE) 4900 CSEMap.InsertNode(N, IP); 4901 4902 AllNodes.push_back(N); 4903#ifndef NDEBUG 4904 VerifyNode(N); 4905#endif 4906 return N; 4907} 4908 4909/// getTargetExtractSubreg - A convenience function for creating 4910/// TargetOpcode::EXTRACT_SUBREG nodes. 4911SDValue 4912SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4913 SDValue Operand) { 4914 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4915 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4916 VT, Operand, SRIdxVal); 4917 return SDValue(Subreg, 0); 4918} 4919 4920/// getTargetInsertSubreg - A convenience function for creating 4921/// TargetOpcode::INSERT_SUBREG nodes. 4922SDValue 4923SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4924 SDValue Operand, SDValue Subreg) { 4925 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4926 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4927 VT, Operand, Subreg, SRIdxVal); 4928 return SDValue(Result, 0); 4929} 4930 4931/// getNodeIfExists - Get the specified node if it's already available, or 4932/// else return NULL. 4933SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4934 const SDValue *Ops, unsigned NumOps) { 4935 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4936 FoldingSetNodeID ID; 4937 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4938 void *IP = 0; 4939 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4940 return E; 4941 } 4942 return NULL; 4943} 4944 4945/// getDbgValue - Creates a SDDbgValue node. 4946/// 4947SDDbgValue * 4948SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4949 DebugLoc DL, unsigned O) { 4950 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4951} 4952 4953SDDbgValue * 4954SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4955 DebugLoc DL, unsigned O) { 4956 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4957} 4958 4959SDDbgValue * 4960SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4961 DebugLoc DL, unsigned O) { 4962 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4963} 4964 4965namespace { 4966 4967/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4968/// pointed to by a use iterator is deleted, increment the use iterator 4969/// so that it doesn't dangle. 4970/// 4971/// This class also manages a "downlink" DAGUpdateListener, to forward 4972/// messages to ReplaceAllUsesWith's callers. 4973/// 4974class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4975 SelectionDAG::DAGUpdateListener *DownLink; 4976 SDNode::use_iterator &UI; 4977 SDNode::use_iterator &UE; 4978 4979 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4980 // Increment the iterator as needed. 4981 while (UI != UE && N == *UI) 4982 ++UI; 4983 4984 // Then forward the message. 4985 if (DownLink) DownLink->NodeDeleted(N, E); 4986 } 4987 4988 virtual void NodeUpdated(SDNode *N) { 4989 // Just forward the message. 4990 if (DownLink) DownLink->NodeUpdated(N); 4991 } 4992 4993public: 4994 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4995 SDNode::use_iterator &ui, 4996 SDNode::use_iterator &ue) 4997 : DownLink(dl), UI(ui), UE(ue) {} 4998}; 4999 5000} 5001 5002/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5003/// This can cause recursive merging of nodes in the DAG. 5004/// 5005/// This version assumes From has a single result value. 5006/// 5007void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5008 DAGUpdateListener *UpdateListener) { 5009 SDNode *From = FromN.getNode(); 5010 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5011 "Cannot replace with this method!"); 5012 assert(From != To.getNode() && "Cannot replace uses of with self"); 5013 5014 // Iterate over all the existing uses of From. New uses will be added 5015 // to the beginning of the use list, which we avoid visiting. 5016 // This specifically avoids visiting uses of From that arise while the 5017 // replacement is happening, because any such uses would be the result 5018 // of CSE: If an existing node looks like From after one of its operands 5019 // is replaced by To, we don't want to replace of all its users with To 5020 // too. See PR3018 for more info. 5021 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5022 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5023 while (UI != UE) { 5024 SDNode *User = *UI; 5025 5026 // This node is about to morph, remove its old self from the CSE maps. 5027 RemoveNodeFromCSEMaps(User); 5028 5029 // A user can appear in a use list multiple times, and when this 5030 // happens the uses are usually next to each other in the list. 5031 // To help reduce the number of CSE recomputations, process all 5032 // the uses of this user that we can find this way. 5033 do { 5034 SDUse &Use = UI.getUse(); 5035 ++UI; 5036 Use.set(To); 5037 } while (UI != UE && *UI == User); 5038 5039 // Now that we have modified User, add it back to the CSE maps. If it 5040 // already exists there, recursively merge the results together. 5041 AddModifiedNodeToCSEMaps(User, &Listener); 5042 } 5043} 5044 5045/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5046/// This can cause recursive merging of nodes in the DAG. 5047/// 5048/// This version assumes that for each value of From, there is a 5049/// corresponding value in To in the same position with the same type. 5050/// 5051void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5052 DAGUpdateListener *UpdateListener) { 5053#ifndef NDEBUG 5054 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5055 assert((!From->hasAnyUseOfValue(i) || 5056 From->getValueType(i) == To->getValueType(i)) && 5057 "Cannot use this version of ReplaceAllUsesWith!"); 5058#endif 5059 5060 // Handle the trivial case. 5061 if (From == To) 5062 return; 5063 5064 // Iterate over just the existing users of From. See the comments in 5065 // the ReplaceAllUsesWith above. 5066 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5067 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5068 while (UI != UE) { 5069 SDNode *User = *UI; 5070 5071 // This node is about to morph, remove its old self from the CSE maps. 5072 RemoveNodeFromCSEMaps(User); 5073 5074 // A user can appear in a use list multiple times, and when this 5075 // happens the uses are usually next to each other in the list. 5076 // To help reduce the number of CSE recomputations, process all 5077 // the uses of this user that we can find this way. 5078 do { 5079 SDUse &Use = UI.getUse(); 5080 ++UI; 5081 Use.setNode(To); 5082 } while (UI != UE && *UI == User); 5083 5084 // Now that we have modified User, add it back to the CSE maps. If it 5085 // already exists there, recursively merge the results together. 5086 AddModifiedNodeToCSEMaps(User, &Listener); 5087 } 5088} 5089 5090/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5091/// This can cause recursive merging of nodes in the DAG. 5092/// 5093/// This version can replace From with any result values. To must match the 5094/// number and types of values returned by From. 5095void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5096 const SDValue *To, 5097 DAGUpdateListener *UpdateListener) { 5098 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5099 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5100 5101 // Iterate over just the existing users of From. See the comments in 5102 // the ReplaceAllUsesWith above. 5103 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5104 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5105 while (UI != UE) { 5106 SDNode *User = *UI; 5107 5108 // This node is about to morph, remove its old self from the CSE maps. 5109 RemoveNodeFromCSEMaps(User); 5110 5111 // A user can appear in a use list multiple times, and when this 5112 // happens the uses are usually next to each other in the list. 5113 // To help reduce the number of CSE recomputations, process all 5114 // the uses of this user that we can find this way. 5115 do { 5116 SDUse &Use = UI.getUse(); 5117 const SDValue &ToOp = To[Use.getResNo()]; 5118 ++UI; 5119 Use.set(ToOp); 5120 } while (UI != UE && *UI == User); 5121 5122 // Now that we have modified User, add it back to the CSE maps. If it 5123 // already exists there, recursively merge the results together. 5124 AddModifiedNodeToCSEMaps(User, &Listener); 5125 } 5126} 5127 5128/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5129/// uses of other values produced by From.getNode() alone. The Deleted 5130/// vector is handled the same way as for ReplaceAllUsesWith. 5131void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5132 DAGUpdateListener *UpdateListener){ 5133 // Handle the really simple, really trivial case efficiently. 5134 if (From == To) return; 5135 5136 // Handle the simple, trivial, case efficiently. 5137 if (From.getNode()->getNumValues() == 1) { 5138 ReplaceAllUsesWith(From, To, UpdateListener); 5139 return; 5140 } 5141 5142 // Iterate over just the existing users of From. See the comments in 5143 // the ReplaceAllUsesWith above. 5144 SDNode::use_iterator UI = From.getNode()->use_begin(), 5145 UE = From.getNode()->use_end(); 5146 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5147 while (UI != UE) { 5148 SDNode *User = *UI; 5149 bool UserRemovedFromCSEMaps = false; 5150 5151 // A user can appear in a use list multiple times, and when this 5152 // happens the uses are usually next to each other in the list. 5153 // To help reduce the number of CSE recomputations, process all 5154 // the uses of this user that we can find this way. 5155 do { 5156 SDUse &Use = UI.getUse(); 5157 5158 // Skip uses of different values from the same node. 5159 if (Use.getResNo() != From.getResNo()) { 5160 ++UI; 5161 continue; 5162 } 5163 5164 // If this node hasn't been modified yet, it's still in the CSE maps, 5165 // so remove its old self from the CSE maps. 5166 if (!UserRemovedFromCSEMaps) { 5167 RemoveNodeFromCSEMaps(User); 5168 UserRemovedFromCSEMaps = true; 5169 } 5170 5171 ++UI; 5172 Use.set(To); 5173 } while (UI != UE && *UI == User); 5174 5175 // We are iterating over all uses of the From node, so if a use 5176 // doesn't use the specific value, no changes are made. 5177 if (!UserRemovedFromCSEMaps) 5178 continue; 5179 5180 // Now that we have modified User, add it back to the CSE maps. If it 5181 // already exists there, recursively merge the results together. 5182 AddModifiedNodeToCSEMaps(User, &Listener); 5183 } 5184} 5185 5186namespace { 5187 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5188 /// to record information about a use. 5189 struct UseMemo { 5190 SDNode *User; 5191 unsigned Index; 5192 SDUse *Use; 5193 }; 5194 5195 /// operator< - Sort Memos by User. 5196 bool operator<(const UseMemo &L, const UseMemo &R) { 5197 return (intptr_t)L.User < (intptr_t)R.User; 5198 } 5199} 5200 5201/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5202/// uses of other values produced by From.getNode() alone. The same value 5203/// may appear in both the From and To list. The Deleted vector is 5204/// handled the same way as for ReplaceAllUsesWith. 5205void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5206 const SDValue *To, 5207 unsigned Num, 5208 DAGUpdateListener *UpdateListener){ 5209 // Handle the simple, trivial case efficiently. 5210 if (Num == 1) 5211 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5212 5213 // Read up all the uses and make records of them. This helps 5214 // processing new uses that are introduced during the 5215 // replacement process. 5216 SmallVector<UseMemo, 4> Uses; 5217 for (unsigned i = 0; i != Num; ++i) { 5218 unsigned FromResNo = From[i].getResNo(); 5219 SDNode *FromNode = From[i].getNode(); 5220 for (SDNode::use_iterator UI = FromNode->use_begin(), 5221 E = FromNode->use_end(); UI != E; ++UI) { 5222 SDUse &Use = UI.getUse(); 5223 if (Use.getResNo() == FromResNo) { 5224 UseMemo Memo = { *UI, i, &Use }; 5225 Uses.push_back(Memo); 5226 } 5227 } 5228 } 5229 5230 // Sort the uses, so that all the uses from a given User are together. 5231 std::sort(Uses.begin(), Uses.end()); 5232 5233 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5234 UseIndex != UseIndexEnd; ) { 5235 // We know that this user uses some value of From. If it is the right 5236 // value, update it. 5237 SDNode *User = Uses[UseIndex].User; 5238 5239 // This node is about to morph, remove its old self from the CSE maps. 5240 RemoveNodeFromCSEMaps(User); 5241 5242 // The Uses array is sorted, so all the uses for a given User 5243 // are next to each other in the list. 5244 // To help reduce the number of CSE recomputations, process all 5245 // the uses of this user that we can find this way. 5246 do { 5247 unsigned i = Uses[UseIndex].Index; 5248 SDUse &Use = *Uses[UseIndex].Use; 5249 ++UseIndex; 5250 5251 Use.set(To[i]); 5252 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5253 5254 // Now that we have modified User, add it back to the CSE maps. If it 5255 // already exists there, recursively merge the results together. 5256 AddModifiedNodeToCSEMaps(User, UpdateListener); 5257 } 5258} 5259 5260/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5261/// based on their topological order. It returns the maximum id and a vector 5262/// of the SDNodes* in assigned order by reference. 5263unsigned SelectionDAG::AssignTopologicalOrder() { 5264 5265 unsigned DAGSize = 0; 5266 5267 // SortedPos tracks the progress of the algorithm. Nodes before it are 5268 // sorted, nodes after it are unsorted. When the algorithm completes 5269 // it is at the end of the list. 5270 allnodes_iterator SortedPos = allnodes_begin(); 5271 5272 // Visit all the nodes. Move nodes with no operands to the front of 5273 // the list immediately. Annotate nodes that do have operands with their 5274 // operand count. Before we do this, the Node Id fields of the nodes 5275 // may contain arbitrary values. After, the Node Id fields for nodes 5276 // before SortedPos will contain the topological sort index, and the 5277 // Node Id fields for nodes At SortedPos and after will contain the 5278 // count of outstanding operands. 5279 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5280 SDNode *N = I++; 5281 checkForCycles(N); 5282 unsigned Degree = N->getNumOperands(); 5283 if (Degree == 0) { 5284 // A node with no uses, add it to the result array immediately. 5285 N->setNodeId(DAGSize++); 5286 allnodes_iterator Q = N; 5287 if (Q != SortedPos) 5288 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5289 assert(SortedPos != AllNodes.end() && "Overran node list"); 5290 ++SortedPos; 5291 } else { 5292 // Temporarily use the Node Id as scratch space for the degree count. 5293 N->setNodeId(Degree); 5294 } 5295 } 5296 5297 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5298 // such that by the time the end is reached all nodes will be sorted. 5299 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5300 SDNode *N = I; 5301 checkForCycles(N); 5302 // N is in sorted position, so all its uses have one less operand 5303 // that needs to be sorted. 5304 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5305 UI != UE; ++UI) { 5306 SDNode *P = *UI; 5307 unsigned Degree = P->getNodeId(); 5308 assert(Degree != 0 && "Invalid node degree"); 5309 --Degree; 5310 if (Degree == 0) { 5311 // All of P's operands are sorted, so P may sorted now. 5312 P->setNodeId(DAGSize++); 5313 if (P != SortedPos) 5314 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5315 assert(SortedPos != AllNodes.end() && "Overran node list"); 5316 ++SortedPos; 5317 } else { 5318 // Update P's outstanding operand count. 5319 P->setNodeId(Degree); 5320 } 5321 } 5322 if (I == SortedPos) { 5323#ifndef NDEBUG 5324 SDNode *S = ++I; 5325 dbgs() << "Overran sorted position:\n"; 5326 S->dumprFull(); 5327#endif 5328 llvm_unreachable(0); 5329 } 5330 } 5331 5332 assert(SortedPos == AllNodes.end() && 5333 "Topological sort incomplete!"); 5334 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5335 "First node in topological sort is not the entry token!"); 5336 assert(AllNodes.front().getNodeId() == 0 && 5337 "First node in topological sort has non-zero id!"); 5338 assert(AllNodes.front().getNumOperands() == 0 && 5339 "First node in topological sort has operands!"); 5340 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5341 "Last node in topologic sort has unexpected id!"); 5342 assert(AllNodes.back().use_empty() && 5343 "Last node in topologic sort has users!"); 5344 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5345 return DAGSize; 5346} 5347 5348/// AssignOrdering - Assign an order to the SDNode. 5349void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5350 assert(SD && "Trying to assign an order to a null node!"); 5351 Ordering->add(SD, Order); 5352} 5353 5354/// GetOrdering - Get the order for the SDNode. 5355unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5356 assert(SD && "Trying to get the order of a null node!"); 5357 return Ordering->getOrder(SD); 5358} 5359 5360/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5361/// value is produced by SD. 5362void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5363 DbgInfo->add(DB, SD, isParameter); 5364 if (SD) 5365 SD->setHasDebugValue(true); 5366} 5367 5368//===----------------------------------------------------------------------===// 5369// SDNode Class 5370//===----------------------------------------------------------------------===// 5371 5372HandleSDNode::~HandleSDNode() { 5373 DropOperands(); 5374} 5375 5376GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5377 const GlobalValue *GA, 5378 EVT VT, int64_t o, unsigned char TF) 5379 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5380 TheGlobal = GA; 5381} 5382 5383MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5384 MachineMemOperand *mmo) 5385 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5386 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5387 MMO->isNonTemporal()); 5388 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5389 assert(isNonTemporal() == MMO->isNonTemporal() && 5390 "Non-temporal encoding error!"); 5391 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5392} 5393 5394MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5395 const SDValue *Ops, unsigned NumOps, EVT memvt, 5396 MachineMemOperand *mmo) 5397 : SDNode(Opc, dl, VTs, Ops, NumOps), 5398 MemoryVT(memvt), MMO(mmo) { 5399 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5400 MMO->isNonTemporal()); 5401 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5402 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5403} 5404 5405/// Profile - Gather unique data for the node. 5406/// 5407void SDNode::Profile(FoldingSetNodeID &ID) const { 5408 AddNodeIDNode(ID, this); 5409} 5410 5411namespace { 5412 struct EVTArray { 5413 std::vector<EVT> VTs; 5414 5415 EVTArray() { 5416 VTs.reserve(MVT::LAST_VALUETYPE); 5417 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5418 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5419 } 5420 }; 5421} 5422 5423static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5424static ManagedStatic<EVTArray> SimpleVTArray; 5425static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5426 5427/// getValueTypeList - Return a pointer to the specified value type. 5428/// 5429const EVT *SDNode::getValueTypeList(EVT VT) { 5430 if (VT.isExtended()) { 5431 sys::SmartScopedLock<true> Lock(*VTMutex); 5432 return &(*EVTs->insert(VT).first); 5433 } else { 5434 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5435 "Value type out of range!"); 5436 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5437 } 5438} 5439 5440/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5441/// indicated value. This method ignores uses of other values defined by this 5442/// operation. 5443bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5444 assert(Value < getNumValues() && "Bad value!"); 5445 5446 // TODO: Only iterate over uses of a given value of the node 5447 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5448 if (UI.getUse().getResNo() == Value) { 5449 if (NUses == 0) 5450 return false; 5451 --NUses; 5452 } 5453 } 5454 5455 // Found exactly the right number of uses? 5456 return NUses == 0; 5457} 5458 5459 5460/// hasAnyUseOfValue - Return true if there are any use of the indicated 5461/// value. This method ignores uses of other values defined by this operation. 5462bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5463 assert(Value < getNumValues() && "Bad value!"); 5464 5465 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5466 if (UI.getUse().getResNo() == Value) 5467 return true; 5468 5469 return false; 5470} 5471 5472 5473/// isOnlyUserOf - Return true if this node is the only use of N. 5474/// 5475bool SDNode::isOnlyUserOf(SDNode *N) const { 5476 bool Seen = false; 5477 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5478 SDNode *User = *I; 5479 if (User == this) 5480 Seen = true; 5481 else 5482 return false; 5483 } 5484 5485 return Seen; 5486} 5487 5488/// isOperand - Return true if this node is an operand of N. 5489/// 5490bool SDValue::isOperandOf(SDNode *N) const { 5491 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5492 if (*this == N->getOperand(i)) 5493 return true; 5494 return false; 5495} 5496 5497bool SDNode::isOperandOf(SDNode *N) const { 5498 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5499 if (this == N->OperandList[i].getNode()) 5500 return true; 5501 return false; 5502} 5503 5504/// reachesChainWithoutSideEffects - Return true if this operand (which must 5505/// be a chain) reaches the specified operand without crossing any 5506/// side-effecting instructions on any chain path. In practice, this looks 5507/// through token factors and non-volatile loads. In order to remain efficient, 5508/// this only looks a couple of nodes in, it does not do an exhaustive search. 5509bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5510 unsigned Depth) const { 5511 if (*this == Dest) return true; 5512 5513 // Don't search too deeply, we just want to be able to see through 5514 // TokenFactor's etc. 5515 if (Depth == 0) return false; 5516 5517 // If this is a token factor, all inputs to the TF happen in parallel. If any 5518 // of the operands of the TF does not reach dest, then we cannot do the xform. 5519 if (getOpcode() == ISD::TokenFactor) { 5520 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5521 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5522 return false; 5523 return true; 5524 } 5525 5526 // Loads don't have side effects, look through them. 5527 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5528 if (!Ld->isVolatile()) 5529 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5530 } 5531 return false; 5532} 5533 5534/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5535/// is either an operand of N or it can be reached by traversing up the operands. 5536/// NOTE: this is an expensive method. Use it carefully. 5537bool SDNode::isPredecessorOf(SDNode *N) const { 5538 SmallPtrSet<SDNode *, 32> Visited; 5539 SmallVector<SDNode *, 16> Worklist; 5540 Worklist.push_back(N); 5541 5542 do { 5543 N = Worklist.pop_back_val(); 5544 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5545 SDNode *Op = N->getOperand(i).getNode(); 5546 if (Op == this) 5547 return true; 5548 if (Visited.insert(Op)) 5549 Worklist.push_back(Op); 5550 } 5551 } while (!Worklist.empty()); 5552 5553 return false; 5554} 5555 5556uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5557 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5558 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5559} 5560 5561std::string SDNode::getOperationName(const SelectionDAG *G) const { 5562 switch (getOpcode()) { 5563 default: 5564 if (getOpcode() < ISD::BUILTIN_OP_END) 5565 return "<<Unknown DAG Node>>"; 5566 if (isMachineOpcode()) { 5567 if (G) 5568 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5569 if (getMachineOpcode() < TII->getNumOpcodes()) 5570 return TII->get(getMachineOpcode()).getName(); 5571 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5572 } 5573 if (G) { 5574 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5575 const char *Name = TLI.getTargetNodeName(getOpcode()); 5576 if (Name) return Name; 5577 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5578 } 5579 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5580 5581#ifndef NDEBUG 5582 case ISD::DELETED_NODE: 5583 return "<<Deleted Node!>>"; 5584#endif 5585 case ISD::PREFETCH: return "Prefetch"; 5586 case ISD::MEMBARRIER: return "MemBarrier"; 5587 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5588 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5589 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5590 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5591 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5592 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5593 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5594 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5595 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5596 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5597 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5598 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5599 case ISD::PCMARKER: return "PCMarker"; 5600 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5601 case ISD::SRCVALUE: return "SrcValue"; 5602 case ISD::MDNODE_SDNODE: return "MDNode"; 5603 case ISD::EntryToken: return "EntryToken"; 5604 case ISD::TokenFactor: return "TokenFactor"; 5605 case ISD::AssertSext: return "AssertSext"; 5606 case ISD::AssertZext: return "AssertZext"; 5607 5608 case ISD::BasicBlock: return "BasicBlock"; 5609 case ISD::VALUETYPE: return "ValueType"; 5610 case ISD::Register: return "Register"; 5611 5612 case ISD::Constant: return "Constant"; 5613 case ISD::ConstantFP: return "ConstantFP"; 5614 case ISD::GlobalAddress: return "GlobalAddress"; 5615 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5616 case ISD::FrameIndex: return "FrameIndex"; 5617 case ISD::JumpTable: return "JumpTable"; 5618 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5619 case ISD::RETURNADDR: return "RETURNADDR"; 5620 case ISD::FRAMEADDR: return "FRAMEADDR"; 5621 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5622 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5623 case ISD::LSDAADDR: return "LSDAADDR"; 5624 case ISD::EHSELECTION: return "EHSELECTION"; 5625 case ISD::EH_RETURN: return "EH_RETURN"; 5626 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5627 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5628 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP"; 5629 case ISD::ConstantPool: return "ConstantPool"; 5630 case ISD::ExternalSymbol: return "ExternalSymbol"; 5631 case ISD::BlockAddress: return "BlockAddress"; 5632 case ISD::INTRINSIC_WO_CHAIN: 5633 case ISD::INTRINSIC_VOID: 5634 case ISD::INTRINSIC_W_CHAIN: { 5635 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5636 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5637 if (IID < Intrinsic::num_intrinsics) 5638 return Intrinsic::getName((Intrinsic::ID)IID); 5639 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5640 return TII->getName(IID); 5641 llvm_unreachable("Invalid intrinsic ID"); 5642 } 5643 5644 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5645 case ISD::TargetConstant: return "TargetConstant"; 5646 case ISD::TargetConstantFP:return "TargetConstantFP"; 5647 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5648 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5649 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5650 case ISD::TargetJumpTable: return "TargetJumpTable"; 5651 case ISD::TargetConstantPool: return "TargetConstantPool"; 5652 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5653 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5654 5655 case ISD::CopyToReg: return "CopyToReg"; 5656 case ISD::CopyFromReg: return "CopyFromReg"; 5657 case ISD::UNDEF: return "undef"; 5658 case ISD::MERGE_VALUES: return "merge_values"; 5659 case ISD::INLINEASM: return "inlineasm"; 5660 case ISD::EH_LABEL: return "eh_label"; 5661 case ISD::HANDLENODE: return "handlenode"; 5662 5663 // Unary operators 5664 case ISD::FABS: return "fabs"; 5665 case ISD::FNEG: return "fneg"; 5666 case ISD::FSQRT: return "fsqrt"; 5667 case ISD::FSIN: return "fsin"; 5668 case ISD::FCOS: return "fcos"; 5669 case ISD::FTRUNC: return "ftrunc"; 5670 case ISD::FFLOOR: return "ffloor"; 5671 case ISD::FCEIL: return "fceil"; 5672 case ISD::FRINT: return "frint"; 5673 case ISD::FNEARBYINT: return "fnearbyint"; 5674 case ISD::FEXP: return "fexp"; 5675 case ISD::FEXP2: return "fexp2"; 5676 case ISD::FLOG: return "flog"; 5677 case ISD::FLOG2: return "flog2"; 5678 case ISD::FLOG10: return "flog10"; 5679 5680 // Binary operators 5681 case ISD::ADD: return "add"; 5682 case ISD::SUB: return "sub"; 5683 case ISD::MUL: return "mul"; 5684 case ISD::MULHU: return "mulhu"; 5685 case ISD::MULHS: return "mulhs"; 5686 case ISD::SDIV: return "sdiv"; 5687 case ISD::UDIV: return "udiv"; 5688 case ISD::SREM: return "srem"; 5689 case ISD::UREM: return "urem"; 5690 case ISD::SMUL_LOHI: return "smul_lohi"; 5691 case ISD::UMUL_LOHI: return "umul_lohi"; 5692 case ISD::SDIVREM: return "sdivrem"; 5693 case ISD::UDIVREM: return "udivrem"; 5694 case ISD::AND: return "and"; 5695 case ISD::OR: return "or"; 5696 case ISD::XOR: return "xor"; 5697 case ISD::SHL: return "shl"; 5698 case ISD::SRA: return "sra"; 5699 case ISD::SRL: return "srl"; 5700 case ISD::ROTL: return "rotl"; 5701 case ISD::ROTR: return "rotr"; 5702 case ISD::FADD: return "fadd"; 5703 case ISD::FSUB: return "fsub"; 5704 case ISD::FMUL: return "fmul"; 5705 case ISD::FDIV: return "fdiv"; 5706 case ISD::FREM: return "frem"; 5707 case ISD::FCOPYSIGN: return "fcopysign"; 5708 case ISD::FGETSIGN: return "fgetsign"; 5709 case ISD::FPOW: return "fpow"; 5710 5711 case ISD::FPOWI: return "fpowi"; 5712 case ISD::SETCC: return "setcc"; 5713 case ISD::VSETCC: return "vsetcc"; 5714 case ISD::SELECT: return "select"; 5715 case ISD::SELECT_CC: return "select_cc"; 5716 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5717 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5718 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5719 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5720 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5721 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5722 case ISD::CARRY_FALSE: return "carry_false"; 5723 case ISD::ADDC: return "addc"; 5724 case ISD::ADDE: return "adde"; 5725 case ISD::SADDO: return "saddo"; 5726 case ISD::UADDO: return "uaddo"; 5727 case ISD::SSUBO: return "ssubo"; 5728 case ISD::USUBO: return "usubo"; 5729 case ISD::SMULO: return "smulo"; 5730 case ISD::UMULO: return "umulo"; 5731 case ISD::SUBC: return "subc"; 5732 case ISD::SUBE: return "sube"; 5733 case ISD::SHL_PARTS: return "shl_parts"; 5734 case ISD::SRA_PARTS: return "sra_parts"; 5735 case ISD::SRL_PARTS: return "srl_parts"; 5736 5737 // Conversion operators. 5738 case ISD::SIGN_EXTEND: return "sign_extend"; 5739 case ISD::ZERO_EXTEND: return "zero_extend"; 5740 case ISD::ANY_EXTEND: return "any_extend"; 5741 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5742 case ISD::TRUNCATE: return "truncate"; 5743 case ISD::FP_ROUND: return "fp_round"; 5744 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5745 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5746 case ISD::FP_EXTEND: return "fp_extend"; 5747 5748 case ISD::SINT_TO_FP: return "sint_to_fp"; 5749 case ISD::UINT_TO_FP: return "uint_to_fp"; 5750 case ISD::FP_TO_SINT: return "fp_to_sint"; 5751 case ISD::FP_TO_UINT: return "fp_to_uint"; 5752 case ISD::BIT_CONVERT: return "bit_convert"; 5753 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5754 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5755 5756 case ISD::CONVERT_RNDSAT: { 5757 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5758 default: llvm_unreachable("Unknown cvt code!"); 5759 case ISD::CVT_FF: return "cvt_ff"; 5760 case ISD::CVT_FS: return "cvt_fs"; 5761 case ISD::CVT_FU: return "cvt_fu"; 5762 case ISD::CVT_SF: return "cvt_sf"; 5763 case ISD::CVT_UF: return "cvt_uf"; 5764 case ISD::CVT_SS: return "cvt_ss"; 5765 case ISD::CVT_SU: return "cvt_su"; 5766 case ISD::CVT_US: return "cvt_us"; 5767 case ISD::CVT_UU: return "cvt_uu"; 5768 } 5769 } 5770 5771 // Control flow instructions 5772 case ISD::BR: return "br"; 5773 case ISD::BRIND: return "brind"; 5774 case ISD::BR_JT: return "br_jt"; 5775 case ISD::BRCOND: return "brcond"; 5776 case ISD::BR_CC: return "br_cc"; 5777 case ISD::CALLSEQ_START: return "callseq_start"; 5778 case ISD::CALLSEQ_END: return "callseq_end"; 5779 5780 // Other operators 5781 case ISD::LOAD: return "load"; 5782 case ISD::STORE: return "store"; 5783 case ISD::VAARG: return "vaarg"; 5784 case ISD::VACOPY: return "vacopy"; 5785 case ISD::VAEND: return "vaend"; 5786 case ISD::VASTART: return "vastart"; 5787 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5788 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5789 case ISD::BUILD_PAIR: return "build_pair"; 5790 case ISD::STACKSAVE: return "stacksave"; 5791 case ISD::STACKRESTORE: return "stackrestore"; 5792 case ISD::TRAP: return "trap"; 5793 5794 // Bit manipulation 5795 case ISD::BSWAP: return "bswap"; 5796 case ISD::CTPOP: return "ctpop"; 5797 case ISD::CTTZ: return "cttz"; 5798 case ISD::CTLZ: return "ctlz"; 5799 5800 // Trampolines 5801 case ISD::TRAMPOLINE: return "trampoline"; 5802 5803 case ISD::CONDCODE: 5804 switch (cast<CondCodeSDNode>(this)->get()) { 5805 default: llvm_unreachable("Unknown setcc condition!"); 5806 case ISD::SETOEQ: return "setoeq"; 5807 case ISD::SETOGT: return "setogt"; 5808 case ISD::SETOGE: return "setoge"; 5809 case ISD::SETOLT: return "setolt"; 5810 case ISD::SETOLE: return "setole"; 5811 case ISD::SETONE: return "setone"; 5812 5813 case ISD::SETO: return "seto"; 5814 case ISD::SETUO: return "setuo"; 5815 case ISD::SETUEQ: return "setue"; 5816 case ISD::SETUGT: return "setugt"; 5817 case ISD::SETUGE: return "setuge"; 5818 case ISD::SETULT: return "setult"; 5819 case ISD::SETULE: return "setule"; 5820 case ISD::SETUNE: return "setune"; 5821 5822 case ISD::SETEQ: return "seteq"; 5823 case ISD::SETGT: return "setgt"; 5824 case ISD::SETGE: return "setge"; 5825 case ISD::SETLT: return "setlt"; 5826 case ISD::SETLE: return "setle"; 5827 case ISD::SETNE: return "setne"; 5828 } 5829 } 5830} 5831 5832const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5833 switch (AM) { 5834 default: 5835 return ""; 5836 case ISD::PRE_INC: 5837 return "<pre-inc>"; 5838 case ISD::PRE_DEC: 5839 return "<pre-dec>"; 5840 case ISD::POST_INC: 5841 return "<post-inc>"; 5842 case ISD::POST_DEC: 5843 return "<post-dec>"; 5844 } 5845} 5846 5847std::string ISD::ArgFlagsTy::getArgFlagsString() { 5848 std::string S = "< "; 5849 5850 if (isZExt()) 5851 S += "zext "; 5852 if (isSExt()) 5853 S += "sext "; 5854 if (isInReg()) 5855 S += "inreg "; 5856 if (isSRet()) 5857 S += "sret "; 5858 if (isByVal()) 5859 S += "byval "; 5860 if (isNest()) 5861 S += "nest "; 5862 if (getByValAlign()) 5863 S += "byval-align:" + utostr(getByValAlign()) + " "; 5864 if (getOrigAlign()) 5865 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5866 if (getByValSize()) 5867 S += "byval-size:" + utostr(getByValSize()) + " "; 5868 return S + ">"; 5869} 5870 5871void SDNode::dump() const { dump(0); } 5872void SDNode::dump(const SelectionDAG *G) const { 5873 print(dbgs(), G); 5874 dbgs() << '\n'; 5875} 5876 5877void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5878 OS << (void*)this << ": "; 5879 5880 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5881 if (i) OS << ","; 5882 if (getValueType(i) == MVT::Other) 5883 OS << "ch"; 5884 else 5885 OS << getValueType(i).getEVTString(); 5886 } 5887 OS << " = " << getOperationName(G); 5888} 5889 5890void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5891 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5892 if (!MN->memoperands_empty()) { 5893 OS << "<"; 5894 OS << "Mem:"; 5895 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5896 e = MN->memoperands_end(); i != e; ++i) { 5897 OS << **i; 5898 if (llvm::next(i) != e) 5899 OS << " "; 5900 } 5901 OS << ">"; 5902 } 5903 } else if (const ShuffleVectorSDNode *SVN = 5904 dyn_cast<ShuffleVectorSDNode>(this)) { 5905 OS << "<"; 5906 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5907 int Idx = SVN->getMaskElt(i); 5908 if (i) OS << ","; 5909 if (Idx < 0) 5910 OS << "u"; 5911 else 5912 OS << Idx; 5913 } 5914 OS << ">"; 5915 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5916 OS << '<' << CSDN->getAPIntValue() << '>'; 5917 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5918 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5919 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5920 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5921 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5922 else { 5923 OS << "<APFloat("; 5924 CSDN->getValueAPF().bitcastToAPInt().dump(); 5925 OS << ")>"; 5926 } 5927 } else if (const GlobalAddressSDNode *GADN = 5928 dyn_cast<GlobalAddressSDNode>(this)) { 5929 int64_t offset = GADN->getOffset(); 5930 OS << '<'; 5931 WriteAsOperand(OS, GADN->getGlobal()); 5932 OS << '>'; 5933 if (offset > 0) 5934 OS << " + " << offset; 5935 else 5936 OS << " " << offset; 5937 if (unsigned int TF = GADN->getTargetFlags()) 5938 OS << " [TF=" << TF << ']'; 5939 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5940 OS << "<" << FIDN->getIndex() << ">"; 5941 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5942 OS << "<" << JTDN->getIndex() << ">"; 5943 if (unsigned int TF = JTDN->getTargetFlags()) 5944 OS << " [TF=" << TF << ']'; 5945 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5946 int offset = CP->getOffset(); 5947 if (CP->isMachineConstantPoolEntry()) 5948 OS << "<" << *CP->getMachineCPVal() << ">"; 5949 else 5950 OS << "<" << *CP->getConstVal() << ">"; 5951 if (offset > 0) 5952 OS << " + " << offset; 5953 else 5954 OS << " " << offset; 5955 if (unsigned int TF = CP->getTargetFlags()) 5956 OS << " [TF=" << TF << ']'; 5957 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5958 OS << "<"; 5959 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5960 if (LBB) 5961 OS << LBB->getName() << " "; 5962 OS << (const void*)BBDN->getBasicBlock() << ">"; 5963 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5964 if (G && R->getReg() && 5965 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5966 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5967 } else { 5968 OS << " %reg" << R->getReg(); 5969 } 5970 } else if (const ExternalSymbolSDNode *ES = 5971 dyn_cast<ExternalSymbolSDNode>(this)) { 5972 OS << "'" << ES->getSymbol() << "'"; 5973 if (unsigned int TF = ES->getTargetFlags()) 5974 OS << " [TF=" << TF << ']'; 5975 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5976 if (M->getValue()) 5977 OS << "<" << M->getValue() << ">"; 5978 else 5979 OS << "<null>"; 5980 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5981 if (MD->getMD()) 5982 OS << "<" << MD->getMD() << ">"; 5983 else 5984 OS << "<null>"; 5985 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5986 OS << ":" << N->getVT().getEVTString(); 5987 } 5988 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5989 OS << "<" << *LD->getMemOperand(); 5990 5991 bool doExt = true; 5992 switch (LD->getExtensionType()) { 5993 default: doExt = false; break; 5994 case ISD::EXTLOAD: OS << ", anyext"; break; 5995 case ISD::SEXTLOAD: OS << ", sext"; break; 5996 case ISD::ZEXTLOAD: OS << ", zext"; break; 5997 } 5998 if (doExt) 5999 OS << " from " << LD->getMemoryVT().getEVTString(); 6000 6001 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6002 if (*AM) 6003 OS << ", " << AM; 6004 6005 OS << ">"; 6006 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6007 OS << "<" << *ST->getMemOperand(); 6008 6009 if (ST->isTruncatingStore()) 6010 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6011 6012 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6013 if (*AM) 6014 OS << ", " << AM; 6015 6016 OS << ">"; 6017 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6018 OS << "<" << *M->getMemOperand() << ">"; 6019 } else if (const BlockAddressSDNode *BA = 6020 dyn_cast<BlockAddressSDNode>(this)) { 6021 OS << "<"; 6022 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6023 OS << ", "; 6024 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6025 OS << ">"; 6026 if (unsigned int TF = BA->getTargetFlags()) 6027 OS << " [TF=" << TF << ']'; 6028 } 6029 6030 if (G) 6031 if (unsigned Order = G->GetOrdering(this)) 6032 OS << " [ORD=" << Order << ']'; 6033 6034 if (getNodeId() != -1) 6035 OS << " [ID=" << getNodeId() << ']'; 6036 6037 DebugLoc dl = getDebugLoc(); 6038 if (G && !dl.isUnknown()) { 6039 DIScope 6040 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6041 OS << " dbg:"; 6042 // Omit the directory, since it's usually long and uninteresting. 6043 if (Scope.Verify()) 6044 OS << Scope.getFilename(); 6045 else 6046 OS << "<unknown>"; 6047 OS << ':' << dl.getLine(); 6048 if (dl.getCol() != 0) 6049 OS << ':' << dl.getCol(); 6050 } 6051} 6052 6053void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6054 print_types(OS, G); 6055 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6056 if (i) OS << ", "; else OS << " "; 6057 OS << (void*)getOperand(i).getNode(); 6058 if (unsigned RN = getOperand(i).getResNo()) 6059 OS << ":" << RN; 6060 } 6061 print_details(OS, G); 6062} 6063 6064static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6065 const SelectionDAG *G, unsigned depth, 6066 unsigned indent) 6067{ 6068 if (depth == 0) 6069 return; 6070 6071 OS.indent(indent); 6072 6073 N->print(OS, G); 6074 6075 if (depth < 1) 6076 return; 6077 6078 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6079 OS << '\n'; 6080 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6081 } 6082} 6083 6084void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6085 unsigned depth) const { 6086 printrWithDepthHelper(OS, this, G, depth, 0); 6087} 6088 6089void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6090 // Don't print impossibly deep things. 6091 printrWithDepth(OS, G, 100); 6092} 6093 6094void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6095 printrWithDepth(dbgs(), G, depth); 6096} 6097 6098void SDNode::dumprFull(const SelectionDAG *G) const { 6099 // Don't print impossibly deep things. 6100 dumprWithDepth(G, 100); 6101} 6102 6103static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6104 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6105 if (N->getOperand(i).getNode()->hasOneUse()) 6106 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6107 else 6108 dbgs() << "\n" << std::string(indent+2, ' ') 6109 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6110 6111 6112 dbgs() << "\n"; 6113 dbgs().indent(indent); 6114 N->dump(G); 6115} 6116 6117SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6118 assert(N->getNumValues() == 1 && 6119 "Can't unroll a vector with multiple results!"); 6120 6121 EVT VT = N->getValueType(0); 6122 unsigned NE = VT.getVectorNumElements(); 6123 EVT EltVT = VT.getVectorElementType(); 6124 DebugLoc dl = N->getDebugLoc(); 6125 6126 SmallVector<SDValue, 8> Scalars; 6127 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6128 6129 // If ResNE is 0, fully unroll the vector op. 6130 if (ResNE == 0) 6131 ResNE = NE; 6132 else if (NE > ResNE) 6133 NE = ResNE; 6134 6135 unsigned i; 6136 for (i= 0; i != NE; ++i) { 6137 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6138 SDValue Operand = N->getOperand(j); 6139 EVT OperandVT = Operand.getValueType(); 6140 if (OperandVT.isVector()) { 6141 // A vector operand; extract a single element. 6142 EVT OperandEltVT = OperandVT.getVectorElementType(); 6143 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6144 OperandEltVT, 6145 Operand, 6146 getConstant(i, MVT::i32)); 6147 } else { 6148 // A scalar operand; just use it as is. 6149 Operands[j] = Operand; 6150 } 6151 } 6152 6153 switch (N->getOpcode()) { 6154 default: 6155 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6156 &Operands[0], Operands.size())); 6157 break; 6158 case ISD::SHL: 6159 case ISD::SRA: 6160 case ISD::SRL: 6161 case ISD::ROTL: 6162 case ISD::ROTR: 6163 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6164 getShiftAmountOperand(Operands[1]))); 6165 break; 6166 case ISD::SIGN_EXTEND_INREG: 6167 case ISD::FP_ROUND_INREG: { 6168 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6169 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6170 Operands[0], 6171 getValueType(ExtVT))); 6172 } 6173 } 6174 } 6175 6176 for (; i < ResNE; ++i) 6177 Scalars.push_back(getUNDEF(EltVT)); 6178 6179 return getNode(ISD::BUILD_VECTOR, dl, 6180 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6181 &Scalars[0], Scalars.size()); 6182} 6183 6184 6185/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6186/// location that is 'Dist' units away from the location that the 'Base' load 6187/// is loading from. 6188bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6189 unsigned Bytes, int Dist) const { 6190 if (LD->getChain() != Base->getChain()) 6191 return false; 6192 EVT VT = LD->getValueType(0); 6193 if (VT.getSizeInBits() / 8 != Bytes) 6194 return false; 6195 6196 SDValue Loc = LD->getOperand(1); 6197 SDValue BaseLoc = Base->getOperand(1); 6198 if (Loc.getOpcode() == ISD::FrameIndex) { 6199 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6200 return false; 6201 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6202 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6203 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6204 int FS = MFI->getObjectSize(FI); 6205 int BFS = MFI->getObjectSize(BFI); 6206 if (FS != BFS || FS != (int)Bytes) return false; 6207 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6208 } 6209 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6210 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6211 if (V && (V->getSExtValue() == Dist*Bytes)) 6212 return true; 6213 } 6214 6215 const GlobalValue *GV1 = NULL; 6216 const GlobalValue *GV2 = NULL; 6217 int64_t Offset1 = 0; 6218 int64_t Offset2 = 0; 6219 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6220 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6221 if (isGA1 && isGA2 && GV1 == GV2) 6222 return Offset1 == (Offset2 + Dist*Bytes); 6223 return false; 6224} 6225 6226 6227/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6228/// it cannot be inferred. 6229unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6230 // If this is a GlobalAddress + cst, return the alignment. 6231 const GlobalValue *GV; 6232 int64_t GVOffset = 0; 6233 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6234 // If GV has specified alignment, then use it. Otherwise, use the preferred 6235 // alignment. 6236 unsigned Align = GV->getAlignment(); 6237 if (!Align) { 6238 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6239 if (GVar->hasInitializer()) { 6240 const TargetData *TD = TLI.getTargetData(); 6241 Align = TD->getPreferredAlignment(GVar); 6242 } 6243 } 6244 } 6245 return MinAlign(Align, GVOffset); 6246 } 6247 6248 // If this is a direct reference to a stack slot, use information about the 6249 // stack slot's alignment. 6250 int FrameIdx = 1 << 31; 6251 int64_t FrameOffset = 0; 6252 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6253 FrameIdx = FI->getIndex(); 6254 } else if (Ptr.getOpcode() == ISD::ADD && 6255 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6256 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6257 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6258 FrameOffset = Ptr.getConstantOperandVal(1); 6259 } 6260 6261 if (FrameIdx != (1 << 31)) { 6262 // FIXME: Handle FI+CST. 6263 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6264 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6265 FrameOffset); 6266 return FIInfoAlign; 6267 } 6268 6269 return 0; 6270} 6271 6272void SelectionDAG::dump() const { 6273 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6274 6275 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6276 I != E; ++I) { 6277 const SDNode *N = I; 6278 if (!N->hasOneUse() && N != getRoot().getNode()) 6279 DumpNodes(N, 2, this); 6280 } 6281 6282 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6283 6284 dbgs() << "\n\n"; 6285} 6286 6287void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6288 print_types(OS, G); 6289 print_details(OS, G); 6290} 6291 6292typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6293static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6294 const SelectionDAG *G, VisitedSDNodeSet &once) { 6295 if (!once.insert(N)) // If we've been here before, return now. 6296 return; 6297 6298 // Dump the current SDNode, but don't end the line yet. 6299 OS << std::string(indent, ' '); 6300 N->printr(OS, G); 6301 6302 // Having printed this SDNode, walk the children: 6303 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6304 const SDNode *child = N->getOperand(i).getNode(); 6305 6306 if (i) OS << ","; 6307 OS << " "; 6308 6309 if (child->getNumOperands() == 0) { 6310 // This child has no grandchildren; print it inline right here. 6311 child->printr(OS, G); 6312 once.insert(child); 6313 } else { // Just the address. FIXME: also print the child's opcode. 6314 OS << (void*)child; 6315 if (unsigned RN = N->getOperand(i).getResNo()) 6316 OS << ":" << RN; 6317 } 6318 } 6319 6320 OS << "\n"; 6321 6322 // Dump children that have grandchildren on their own line(s). 6323 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6324 const SDNode *child = N->getOperand(i).getNode(); 6325 DumpNodesr(OS, child, indent+2, G, once); 6326 } 6327} 6328 6329void SDNode::dumpr() const { 6330 VisitedSDNodeSet once; 6331 DumpNodesr(dbgs(), this, 0, 0, once); 6332} 6333 6334void SDNode::dumpr(const SelectionDAG *G) const { 6335 VisitedSDNodeSet once; 6336 DumpNodesr(dbgs(), this, 0, G, once); 6337} 6338 6339 6340// getAddressSpace - Return the address space this GlobalAddress belongs to. 6341unsigned GlobalAddressSDNode::getAddressSpace() const { 6342 return getGlobal()->getType()->getAddressSpace(); 6343} 6344 6345 6346const Type *ConstantPoolSDNode::getType() const { 6347 if (isMachineConstantPoolEntry()) 6348 return Val.MachineCPVal->getType(); 6349 return Val.ConstVal->getType(); 6350} 6351 6352bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6353 APInt &SplatUndef, 6354 unsigned &SplatBitSize, 6355 bool &HasAnyUndefs, 6356 unsigned MinSplatBits, 6357 bool isBigEndian) { 6358 EVT VT = getValueType(0); 6359 assert(VT.isVector() && "Expected a vector type"); 6360 unsigned sz = VT.getSizeInBits(); 6361 if (MinSplatBits > sz) 6362 return false; 6363 6364 SplatValue = APInt(sz, 0); 6365 SplatUndef = APInt(sz, 0); 6366 6367 // Get the bits. Bits with undefined values (when the corresponding element 6368 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6369 // in SplatValue. If any of the values are not constant, give up and return 6370 // false. 6371 unsigned int nOps = getNumOperands(); 6372 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6373 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6374 6375 for (unsigned j = 0; j < nOps; ++j) { 6376 unsigned i = isBigEndian ? nOps-1-j : j; 6377 SDValue OpVal = getOperand(i); 6378 unsigned BitPos = j * EltBitSize; 6379 6380 if (OpVal.getOpcode() == ISD::UNDEF) 6381 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6382 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6383 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6384 zextOrTrunc(sz) << BitPos; 6385 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6386 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6387 else 6388 return false; 6389 } 6390 6391 // The build_vector is all constants or undefs. Find the smallest element 6392 // size that splats the vector. 6393 6394 HasAnyUndefs = (SplatUndef != 0); 6395 while (sz > 8) { 6396 6397 unsigned HalfSize = sz / 2; 6398 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6399 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6400 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6401 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6402 6403 // If the two halves do not match (ignoring undef bits), stop here. 6404 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6405 MinSplatBits > HalfSize) 6406 break; 6407 6408 SplatValue = HighValue | LowValue; 6409 SplatUndef = HighUndef & LowUndef; 6410 6411 sz = HalfSize; 6412 } 6413 6414 SplatBitSize = sz; 6415 return true; 6416} 6417 6418bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6419 // Find the first non-undef value in the shuffle mask. 6420 unsigned i, e; 6421 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6422 /* search */; 6423 6424 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6425 6426 // Make sure all remaining elements are either undef or the same as the first 6427 // non-undef value. 6428 for (int Idx = Mask[i]; i != e; ++i) 6429 if (Mask[i] >= 0 && Mask[i] != Idx) 6430 return false; 6431 return true; 6432} 6433 6434#ifdef XDEBUG 6435static void checkForCyclesHelper(const SDNode *N, 6436 SmallPtrSet<const SDNode*, 32> &Visited, 6437 SmallPtrSet<const SDNode*, 32> &Checked) { 6438 // If this node has already been checked, don't check it again. 6439 if (Checked.count(N)) 6440 return; 6441 6442 // If a node has already been visited on this depth-first walk, reject it as 6443 // a cycle. 6444 if (!Visited.insert(N)) { 6445 dbgs() << "Offending node:\n"; 6446 N->dumprFull(); 6447 errs() << "Detected cycle in SelectionDAG\n"; 6448 abort(); 6449 } 6450 6451 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6452 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6453 6454 Checked.insert(N); 6455 Visited.erase(N); 6456} 6457#endif 6458 6459void llvm::checkForCycles(const llvm::SDNode *N) { 6460#ifdef XDEBUG 6461 assert(N && "Checking nonexistant SDNode"); 6462 SmallPtrSet<const SDNode*, 32> visited; 6463 SmallPtrSet<const SDNode*, 32> checked; 6464 checkForCyclesHelper(N, visited, checked); 6465#endif 6466} 6467 6468void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6469 checkForCycles(DAG->getRoot().getNode()); 6470} 6471