SelectionDAG.cpp revision cdfad36b401be6fc709ea4051f9de58e1a30bcc9
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetFrameInfo.h" 35#include "llvm/Target/TargetLowering.h" 36#include "llvm/Target/TargetSelectionDAGInfo.h" 37#include "llvm/Target/TargetOptions.h" 38#include "llvm/Target/TargetInstrInfo.h" 39#include "llvm/Target/TargetIntrinsicInfo.h" 40#include "llvm/Target/TargetMachine.h" 41#include "llvm/Support/CommandLine.h" 42#include "llvm/Support/Debug.h" 43#include "llvm/Support/ErrorHandling.h" 44#include "llvm/Support/ManagedStatic.h" 45#include "llvm/Support/MathExtras.h" 46#include "llvm/Support/raw_ostream.h" 47#include "llvm/System/Mutex.h" 48#include "llvm/ADT/SetVector.h" 49#include "llvm/ADT/SmallPtrSet.h" 50#include "llvm/ADT/SmallSet.h" 51#include "llvm/ADT/SmallVector.h" 52#include "llvm/ADT/StringExtras.h" 53#include <algorithm> 54#include <cmath> 55using namespace llvm; 56 57/// makeVTList - Return an instance of the SDVTList struct initialized with the 58/// specified members. 59static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 60 SDVTList Res = {VTs, NumVTs}; 61 return Res; 62} 63 64static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 65 switch (VT.getSimpleVT().SimpleTy) { 66 default: llvm_unreachable("Unknown FP format"); 67 case MVT::f32: return &APFloat::IEEEsingle; 68 case MVT::f64: return &APFloat::IEEEdouble; 69 case MVT::f80: return &APFloat::x87DoubleExtended; 70 case MVT::f128: return &APFloat::IEEEquad; 71 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 72 } 73} 74 75SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 76 77//===----------------------------------------------------------------------===// 78// ConstantFPSDNode Class 79//===----------------------------------------------------------------------===// 80 81/// isExactlyValue - We don't rely on operator== working on double values, as 82/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 83/// As such, this method can be used to do an exact bit-for-bit comparison of 84/// two floating point values. 85bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 86 return getValueAPF().bitwiseIsEqual(V); 87} 88 89bool ConstantFPSDNode::isValueValidForType(EVT VT, 90 const APFloat& Val) { 91 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 92 93 // PPC long double cannot be converted to any other type. 94 if (VT == MVT::ppcf128 || 95 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 96 return false; 97 98 // convert modifies in place, so make a copy. 99 APFloat Val2 = APFloat(Val); 100 bool losesInfo; 101 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 102 &losesInfo); 103 return !losesInfo; 104} 105 106//===----------------------------------------------------------------------===// 107// ISD Namespace 108//===----------------------------------------------------------------------===// 109 110/// isBuildVectorAllOnes - Return true if the specified node is a 111/// BUILD_VECTOR where all of the elements are ~0 or undef. 112bool ISD::isBuildVectorAllOnes(const SDNode *N) { 113 // Look through a bit convert. 114 if (N->getOpcode() == ISD::BIT_CONVERT) 115 N = N->getOperand(0).getNode(); 116 117 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 118 119 unsigned i = 0, e = N->getNumOperands(); 120 121 // Skip over all of the undef values. 122 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 123 ++i; 124 125 // Do not accept an all-undef vector. 126 if (i == e) return false; 127 128 // Do not accept build_vectors that aren't all constants or which have non-~0 129 // elements. 130 SDValue NotZero = N->getOperand(i); 131 if (isa<ConstantSDNode>(NotZero)) { 132 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 133 return false; 134 } else if (isa<ConstantFPSDNode>(NotZero)) { 135 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 136 bitcastToAPInt().isAllOnesValue()) 137 return false; 138 } else 139 return false; 140 141 // Okay, we have at least one ~0 value, check to see if the rest match or are 142 // undefs. 143 for (++i; i != e; ++i) 144 if (N->getOperand(i) != NotZero && 145 N->getOperand(i).getOpcode() != ISD::UNDEF) 146 return false; 147 return true; 148} 149 150 151/// isBuildVectorAllZeros - Return true if the specified node is a 152/// BUILD_VECTOR where all of the elements are 0 or undef. 153bool ISD::isBuildVectorAllZeros(const SDNode *N) { 154 // Look through a bit convert. 155 if (N->getOpcode() == ISD::BIT_CONVERT) 156 N = N->getOperand(0).getNode(); 157 158 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 159 160 unsigned i = 0, e = N->getNumOperands(); 161 162 // Skip over all of the undef values. 163 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 164 ++i; 165 166 // Do not accept an all-undef vector. 167 if (i == e) return false; 168 169 // Do not accept build_vectors that aren't all constants or which have non-0 170 // elements. 171 SDValue Zero = N->getOperand(i); 172 if (isa<ConstantSDNode>(Zero)) { 173 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 174 return false; 175 } else if (isa<ConstantFPSDNode>(Zero)) { 176 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 177 return false; 178 } else 179 return false; 180 181 // Okay, we have at least one 0 value, check to see if the rest match or are 182 // undefs. 183 for (++i; i != e; ++i) 184 if (N->getOperand(i) != Zero && 185 N->getOperand(i).getOpcode() != ISD::UNDEF) 186 return false; 187 return true; 188} 189 190/// isScalarToVector - Return true if the specified node is a 191/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 192/// element is not an undef. 193bool ISD::isScalarToVector(const SDNode *N) { 194 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 195 return true; 196 197 if (N->getOpcode() != ISD::BUILD_VECTOR) 198 return false; 199 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 200 return false; 201 unsigned NumElems = N->getNumOperands(); 202 for (unsigned i = 1; i < NumElems; ++i) { 203 SDValue V = N->getOperand(i); 204 if (V.getOpcode() != ISD::UNDEF) 205 return false; 206 } 207 return true; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: llvm_unreachable("Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309//===----------------------------------------------------------------------===// 310// SDNode Profile Support 311//===----------------------------------------------------------------------===// 312 313/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 314/// 315static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 316 ID.AddInteger(OpC); 317} 318 319/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 320/// solely with their pointer. 321static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 322 ID.AddPointer(VTList.VTs); 323} 324 325/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 326/// 327static void AddNodeIDOperands(FoldingSetNodeID &ID, 328 const SDValue *Ops, unsigned NumOps) { 329 for (; NumOps; --NumOps, ++Ops) { 330 ID.AddPointer(Ops->getNode()); 331 ID.AddInteger(Ops->getResNo()); 332 } 333} 334 335/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 336/// 337static void AddNodeIDOperands(FoldingSetNodeID &ID, 338 const SDUse *Ops, unsigned NumOps) { 339 for (; NumOps; --NumOps, ++Ops) { 340 ID.AddPointer(Ops->getNode()); 341 ID.AddInteger(Ops->getResNo()); 342 } 343} 344 345static void AddNodeIDNode(FoldingSetNodeID &ID, 346 unsigned short OpC, SDVTList VTList, 347 const SDValue *OpList, unsigned N) { 348 AddNodeIDOpcode(ID, OpC); 349 AddNodeIDValueTypes(ID, VTList); 350 AddNodeIDOperands(ID, OpList, N); 351} 352 353/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 354/// the NodeID data. 355static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 356 switch (N->getOpcode()) { 357 case ISD::TargetExternalSymbol: 358 case ISD::ExternalSymbol: 359 llvm_unreachable("Should only be used on nodes with operands"); 360 default: break; // Normal nodes don't need extra info. 361 case ISD::TargetConstant: 362 case ISD::Constant: 363 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 364 break; 365 case ISD::TargetConstantFP: 366 case ISD::ConstantFP: { 367 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 368 break; 369 } 370 case ISD::TargetGlobalAddress: 371 case ISD::GlobalAddress: 372 case ISD::TargetGlobalTLSAddress: 373 case ISD::GlobalTLSAddress: { 374 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 375 ID.AddPointer(GA->getGlobal()); 376 ID.AddInteger(GA->getOffset()); 377 ID.AddInteger(GA->getTargetFlags()); 378 break; 379 } 380 case ISD::BasicBlock: 381 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 382 break; 383 case ISD::Register: 384 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 385 break; 386 387 case ISD::SRCVALUE: 388 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 389 break; 390 case ISD::FrameIndex: 391 case ISD::TargetFrameIndex: 392 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 393 break; 394 case ISD::JumpTable: 395 case ISD::TargetJumpTable: 396 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 398 break; 399 case ISD::ConstantPool: 400 case ISD::TargetConstantPool: { 401 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 402 ID.AddInteger(CP->getAlignment()); 403 ID.AddInteger(CP->getOffset()); 404 if (CP->isMachineConstantPoolEntry()) 405 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 406 else 407 ID.AddPointer(CP->getConstVal()); 408 ID.AddInteger(CP->getTargetFlags()); 409 break; 410 } 411 case ISD::LOAD: { 412 const LoadSDNode *LD = cast<LoadSDNode>(N); 413 ID.AddInteger(LD->getMemoryVT().getRawBits()); 414 ID.AddInteger(LD->getRawSubclassData()); 415 break; 416 } 417 case ISD::STORE: { 418 const StoreSDNode *ST = cast<StoreSDNode>(N); 419 ID.AddInteger(ST->getMemoryVT().getRawBits()); 420 ID.AddInteger(ST->getRawSubclassData()); 421 break; 422 } 423 case ISD::ATOMIC_CMP_SWAP: 424 case ISD::ATOMIC_SWAP: 425 case ISD::ATOMIC_LOAD_ADD: 426 case ISD::ATOMIC_LOAD_SUB: 427 case ISD::ATOMIC_LOAD_AND: 428 case ISD::ATOMIC_LOAD_OR: 429 case ISD::ATOMIC_LOAD_XOR: 430 case ISD::ATOMIC_LOAD_NAND: 431 case ISD::ATOMIC_LOAD_MIN: 432 case ISD::ATOMIC_LOAD_MAX: 433 case ISD::ATOMIC_LOAD_UMIN: 434 case ISD::ATOMIC_LOAD_UMAX: { 435 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 436 ID.AddInteger(AT->getMemoryVT().getRawBits()); 437 ID.AddInteger(AT->getRawSubclassData()); 438 break; 439 } 440 case ISD::VECTOR_SHUFFLE: { 441 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 442 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 443 i != e; ++i) 444 ID.AddInteger(SVN->getMaskElt(i)); 445 break; 446 } 447 case ISD::TargetBlockAddress: 448 case ISD::BlockAddress: { 449 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 450 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 451 break; 452 } 453 } // end switch (N->getOpcode()) 454} 455 456/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 457/// data. 458static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 459 AddNodeIDOpcode(ID, N->getOpcode()); 460 // Add the return value info. 461 AddNodeIDValueTypes(ID, N->getVTList()); 462 // Add the operand info. 463 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 464 465 // Handle SDNode leafs with special info. 466 AddNodeIDCustom(ID, N); 467} 468 469/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 470/// the CSE map that carries volatility, temporalness, indexing mode, and 471/// extension/truncation information. 472/// 473static inline unsigned 474encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 475 bool isNonTemporal) { 476 assert((ConvType & 3) == ConvType && 477 "ConvType may not require more than 2 bits!"); 478 assert((AM & 7) == AM && 479 "AM may not require more than 3 bits!"); 480 return ConvType | 481 (AM << 2) | 482 (isVolatile << 5) | 483 (isNonTemporal << 6); 484} 485 486//===----------------------------------------------------------------------===// 487// SelectionDAG Class 488//===----------------------------------------------------------------------===// 489 490/// doNotCSE - Return true if CSE should not be performed for this node. 491static bool doNotCSE(SDNode *N) { 492 if (N->getValueType(0) == MVT::Flag) 493 return true; // Never CSE anything that produces a flag. 494 495 switch (N->getOpcode()) { 496 default: break; 497 case ISD::HANDLENODE: 498 case ISD::EH_LABEL: 499 return true; // Never CSE these nodes. 500 } 501 502 // Check that remaining values produced are not flags. 503 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 504 if (N->getValueType(i) == MVT::Flag) 505 return true; // Never CSE anything that produces a flag. 506 507 return false; 508} 509 510/// RemoveDeadNodes - This method deletes all unreachable nodes in the 511/// SelectionDAG. 512void SelectionDAG::RemoveDeadNodes() { 513 // Create a dummy node (which is not added to allnodes), that adds a reference 514 // to the root node, preventing it from being deleted. 515 HandleSDNode Dummy(getRoot()); 516 517 SmallVector<SDNode*, 128> DeadNodes; 518 519 // Add all obviously-dead nodes to the DeadNodes worklist. 520 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 521 if (I->use_empty()) 522 DeadNodes.push_back(I); 523 524 RemoveDeadNodes(DeadNodes); 525 526 // If the root changed (e.g. it was a dead load, update the root). 527 setRoot(Dummy.getValue()); 528} 529 530/// RemoveDeadNodes - This method deletes the unreachable nodes in the 531/// given list, and any nodes that become unreachable as a result. 532void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 533 DAGUpdateListener *UpdateListener) { 534 535 // Process the worklist, deleting the nodes and adding their uses to the 536 // worklist. 537 while (!DeadNodes.empty()) { 538 SDNode *N = DeadNodes.pop_back_val(); 539 540 if (UpdateListener) 541 UpdateListener->NodeDeleted(N, 0); 542 543 // Take the node out of the appropriate CSE map. 544 RemoveNodeFromCSEMaps(N); 545 546 // Next, brutally remove the operand list. This is safe to do, as there are 547 // no cycles in the graph. 548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 549 SDUse &Use = *I++; 550 SDNode *Operand = Use.getNode(); 551 Use.set(SDValue()); 552 553 // Now that we removed this operand, see if there are no uses of it left. 554 if (Operand->use_empty()) 555 DeadNodes.push_back(Operand); 556 } 557 558 DeallocateNode(N); 559 } 560} 561 562void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 563 SmallVector<SDNode*, 16> DeadNodes(1, N); 564 RemoveDeadNodes(DeadNodes, UpdateListener); 565} 566 567void SelectionDAG::DeleteNode(SDNode *N) { 568 // First take this out of the appropriate CSE map. 569 RemoveNodeFromCSEMaps(N); 570 571 // Finally, remove uses due to operands of this node, remove from the 572 // AllNodes list, and delete the node. 573 DeleteNodeNotInCSEMaps(N); 574} 575 576void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 577 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 578 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 579 580 // Drop all of the operands and decrement used node's use counts. 581 N->DropOperands(); 582 583 DeallocateNode(N); 584} 585 586void SelectionDAG::DeallocateNode(SDNode *N) { 587 if (N->OperandsNeedDelete) 588 delete[] N->OperandList; 589 590 // Set the opcode to DELETED_NODE to help catch bugs when node 591 // memory is reallocated. 592 N->NodeType = ISD::DELETED_NODE; 593 594 NodeAllocator.Deallocate(AllNodes.remove(N)); 595 596 // Remove the ordering of this node. 597 Ordering->remove(N); 598 599 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 600 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 601 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 602 DbgVals[i]->setIsInvalidated(); 603} 604 605/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 606/// correspond to it. This is useful when we're about to delete or repurpose 607/// the node. We don't want future request for structurally identical nodes 608/// to return N anymore. 609bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 610 bool Erased = false; 611 switch (N->getOpcode()) { 612 case ISD::EntryToken: 613 llvm_unreachable("EntryToken should not be in CSEMaps!"); 614 return false; 615 case ISD::HANDLENODE: return false; // noop. 616 case ISD::CONDCODE: 617 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 618 "Cond code doesn't exist!"); 619 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 620 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 621 break; 622 case ISD::ExternalSymbol: 623 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 624 break; 625 case ISD::TargetExternalSymbol: { 626 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 627 Erased = TargetExternalSymbols.erase( 628 std::pair<std::string,unsigned char>(ESN->getSymbol(), 629 ESN->getTargetFlags())); 630 break; 631 } 632 case ISD::VALUETYPE: { 633 EVT VT = cast<VTSDNode>(N)->getVT(); 634 if (VT.isExtended()) { 635 Erased = ExtendedValueTypeNodes.erase(VT); 636 } else { 637 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 638 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 639 } 640 break; 641 } 642 default: 643 // Remove it from the CSE Map. 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 747void SelectionDAG::VerifyNode(SDNode *N) { 748 switch (N->getOpcode()) { 749 default: 750 break; 751 case ISD::BUILD_PAIR: { 752 EVT VT = N->getValueType(0); 753 assert(N->getNumValues() == 1 && "Too many results!"); 754 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 755 "Wrong return type!"); 756 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 757 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 758 "Mismatched operand types!"); 759 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 760 "Wrong operand type!"); 761 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 762 "Wrong return type size"); 763 break; 764 } 765 case ISD::BUILD_VECTOR: { 766 assert(N->getNumValues() == 1 && "Too many results!"); 767 assert(N->getValueType(0).isVector() && "Wrong return type!"); 768 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 769 "Wrong number of operands!"); 770 EVT EltVT = N->getValueType(0).getVectorElementType(); 771 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 772 assert((I->getValueType() == EltVT || 773 (EltVT.isInteger() && I->getValueType().isInteger() && 774 EltVT.bitsLE(I->getValueType()))) && 775 "Wrong operand type!"); 776 break; 777 } 778 } 779} 780 781/// getEVTAlignment - Compute the default alignment value for the 782/// given type. 783/// 784unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 785 const Type *Ty = VT == MVT::iPTR ? 786 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 787 VT.getTypeForEVT(*getContext()); 788 789 return TLI.getTargetData()->getABITypeAlignment(Ty); 790} 791 792// EntryNode could meaningfully have debug info if we can find it... 793SelectionDAG::SelectionDAG(const TargetMachine &tm) 794 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 795 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 796 Root(getEntryNode()), Ordering(0) { 797 AllNodes.push_back(&EntryNode); 798 Ordering = new SDNodeOrdering(); 799 DbgInfo = new SDDbgInfo(); 800} 801 802void SelectionDAG::init(MachineFunction &mf) { 803 MF = &mf; 804 Context = &mf.getFunction()->getContext(); 805} 806 807SelectionDAG::~SelectionDAG() { 808 allnodes_clear(); 809 delete Ordering; 810 delete DbgInfo; 811} 812 813void SelectionDAG::allnodes_clear() { 814 assert(&*AllNodes.begin() == &EntryNode); 815 AllNodes.remove(AllNodes.begin()); 816 while (!AllNodes.empty()) 817 DeallocateNode(AllNodes.begin()); 818} 819 820void SelectionDAG::clear() { 821 allnodes_clear(); 822 OperandAllocator.Reset(); 823 CSEMap.clear(); 824 825 ExtendedValueTypeNodes.clear(); 826 ExternalSymbols.clear(); 827 TargetExternalSymbols.clear(); 828 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 829 static_cast<CondCodeSDNode*>(0)); 830 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 831 static_cast<SDNode*>(0)); 832 833 EntryNode.UseList = 0; 834 AllNodes.push_back(&EntryNode); 835 Root = getEntryNode(); 836 Ordering->clear(); 837 DbgInfo->clear(); 838} 839 840SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 841 return VT.bitsGT(Op.getValueType()) ? 842 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 843 getNode(ISD::TRUNCATE, DL, VT, Op); 844} 845 846SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 847 return VT.bitsGT(Op.getValueType()) ? 848 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 849 getNode(ISD::TRUNCATE, DL, VT, Op); 850} 851 852SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 853 assert(!VT.isVector() && 854 "getZeroExtendInReg should use the vector element type instead of " 855 "the vector type!"); 856 if (Op.getValueType() == VT) return Op; 857 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 858 APInt Imm = APInt::getLowBitsSet(BitWidth, 859 VT.getSizeInBits()); 860 return getNode(ISD::AND, DL, Op.getValueType(), Op, 861 getConstant(Imm, Op.getValueType())); 862} 863 864/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 865/// 866SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 867 EVT EltVT = VT.getScalarType(); 868 SDValue NegOne = 869 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 870 return getNode(ISD::XOR, DL, VT, Val, NegOne); 871} 872 873SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 874 EVT EltVT = VT.getScalarType(); 875 assert((EltVT.getSizeInBits() >= 64 || 876 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 877 "getConstant with a uint64_t value that doesn't fit in the type!"); 878 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 879} 880 881SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 882 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 883} 884 885SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 886 assert(VT.isInteger() && "Cannot create FP integer constant!"); 887 888 EVT EltVT = VT.getScalarType(); 889 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 890 "APInt size does not match type size!"); 891 892 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 893 FoldingSetNodeID ID; 894 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 895 ID.AddPointer(&Val); 896 void *IP = 0; 897 SDNode *N = NULL; 898 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 899 if (!VT.isVector()) 900 return SDValue(N, 0); 901 902 if (!N) { 903 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 904 CSEMap.InsertNode(N, IP); 905 AllNodes.push_back(N); 906 } 907 908 SDValue Result(N, 0); 909 if (VT.isVector()) { 910 SmallVector<SDValue, 8> Ops; 911 Ops.assign(VT.getVectorNumElements(), Result); 912 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 913 } 914 return Result; 915} 916 917SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 918 return getConstant(Val, TLI.getPointerTy(), isTarget); 919} 920 921 922SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 923 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 924} 925 926SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 927 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 928 929 EVT EltVT = VT.getScalarType(); 930 931 // Do the map lookup using the actual bit pattern for the floating point 932 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 933 // we don't have issues with SNANs. 934 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 935 FoldingSetNodeID ID; 936 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 937 ID.AddPointer(&V); 938 void *IP = 0; 939 SDNode *N = NULL; 940 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 941 if (!VT.isVector()) 942 return SDValue(N, 0); 943 944 if (!N) { 945 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 946 CSEMap.InsertNode(N, IP); 947 AllNodes.push_back(N); 948 } 949 950 SDValue Result(N, 0); 951 if (VT.isVector()) { 952 SmallVector<SDValue, 8> Ops; 953 Ops.assign(VT.getVectorNumElements(), Result); 954 // FIXME DebugLoc info might be appropriate here 955 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 956 } 957 return Result; 958} 959 960SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 961 EVT EltVT = VT.getScalarType(); 962 if (EltVT==MVT::f32) 963 return getConstantFP(APFloat((float)Val), VT, isTarget); 964 else if (EltVT==MVT::f64) 965 return getConstantFP(APFloat(Val), VT, isTarget); 966 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 967 bool ignored; 968 APFloat apf = APFloat(Val); 969 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 970 &ignored); 971 return getConstantFP(apf, VT, isTarget); 972 } else { 973 assert(0 && "Unsupported type in getConstantFP"); 974 return SDValue(); 975 } 976} 977 978SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 979 EVT VT, int64_t Offset, 980 bool isTargetGA, 981 unsigned char TargetFlags) { 982 assert((TargetFlags == 0 || isTargetGA) && 983 "Cannot set target flags on target-independent globals"); 984 985 // Truncate (with sign-extension) the offset value to the pointer size. 986 EVT PTy = TLI.getPointerTy(); 987 unsigned BitWidth = PTy.getSizeInBits(); 988 if (BitWidth < 64) 989 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 990 991 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 992 if (!GVar) { 993 // If GV is an alias then use the aliasee for determining thread-localness. 994 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 995 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 996 } 997 998 unsigned Opc; 999 if (GVar && GVar->isThreadLocal()) 1000 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1001 else 1002 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1003 1004 FoldingSetNodeID ID; 1005 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1006 ID.AddPointer(GV); 1007 ID.AddInteger(Offset); 1008 ID.AddInteger(TargetFlags); 1009 void *IP = 0; 1010 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1011 return SDValue(E, 0); 1012 1013 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1014 Offset, TargetFlags); 1015 CSEMap.InsertNode(N, IP); 1016 AllNodes.push_back(N); 1017 return SDValue(N, 0); 1018} 1019 1020SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1021 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1022 FoldingSetNodeID ID; 1023 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1024 ID.AddInteger(FI); 1025 void *IP = 0; 1026 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1027 return SDValue(E, 0); 1028 1029 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1030 CSEMap.InsertNode(N, IP); 1031 AllNodes.push_back(N); 1032 return SDValue(N, 0); 1033} 1034 1035SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1036 unsigned char TargetFlags) { 1037 assert((TargetFlags == 0 || isTarget) && 1038 "Cannot set target flags on target-independent jump tables"); 1039 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1040 FoldingSetNodeID ID; 1041 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1042 ID.AddInteger(JTI); 1043 ID.AddInteger(TargetFlags); 1044 void *IP = 0; 1045 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1046 return SDValue(E, 0); 1047 1048 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1049 TargetFlags); 1050 CSEMap.InsertNode(N, IP); 1051 AllNodes.push_back(N); 1052 return SDValue(N, 0); 1053} 1054 1055SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1056 unsigned Alignment, int Offset, 1057 bool isTarget, 1058 unsigned char TargetFlags) { 1059 assert((TargetFlags == 0 || isTarget) && 1060 "Cannot set target flags on target-independent globals"); 1061 if (Alignment == 0) 1062 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1063 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1064 FoldingSetNodeID ID; 1065 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1066 ID.AddInteger(Alignment); 1067 ID.AddInteger(Offset); 1068 ID.AddPointer(C); 1069 ID.AddInteger(TargetFlags); 1070 void *IP = 0; 1071 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1072 return SDValue(E, 0); 1073 1074 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1075 Alignment, TargetFlags); 1076 CSEMap.InsertNode(N, IP); 1077 AllNodes.push_back(N); 1078 return SDValue(N, 0); 1079} 1080 1081 1082SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1083 unsigned Alignment, int Offset, 1084 bool isTarget, 1085 unsigned char TargetFlags) { 1086 assert((TargetFlags == 0 || isTarget) && 1087 "Cannot set target flags on target-independent globals"); 1088 if (Alignment == 0) 1089 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1090 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1091 FoldingSetNodeID ID; 1092 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1093 ID.AddInteger(Alignment); 1094 ID.AddInteger(Offset); 1095 C->AddSelectionDAGCSEId(ID); 1096 ID.AddInteger(TargetFlags); 1097 void *IP = 0; 1098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1099 return SDValue(E, 0); 1100 1101 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1102 Alignment, TargetFlags); 1103 CSEMap.InsertNode(N, IP); 1104 AllNodes.push_back(N); 1105 return SDValue(N, 0); 1106} 1107 1108SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1109 FoldingSetNodeID ID; 1110 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1111 ID.AddPointer(MBB); 1112 void *IP = 0; 1113 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1114 return SDValue(E, 0); 1115 1116 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1117 CSEMap.InsertNode(N, IP); 1118 AllNodes.push_back(N); 1119 return SDValue(N, 0); 1120} 1121 1122SDValue SelectionDAG::getValueType(EVT VT) { 1123 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1124 ValueTypeNodes.size()) 1125 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1126 1127 SDNode *&N = VT.isExtended() ? 1128 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1129 1130 if (N) return SDValue(N, 0); 1131 N = new (NodeAllocator) VTSDNode(VT); 1132 AllNodes.push_back(N); 1133 return SDValue(N, 0); 1134} 1135 1136SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1137 SDNode *&N = ExternalSymbols[Sym]; 1138 if (N) return SDValue(N, 0); 1139 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1140 AllNodes.push_back(N); 1141 return SDValue(N, 0); 1142} 1143 1144SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1145 unsigned char TargetFlags) { 1146 SDNode *&N = 1147 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1148 TargetFlags)]; 1149 if (N) return SDValue(N, 0); 1150 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1151 AllNodes.push_back(N); 1152 return SDValue(N, 0); 1153} 1154 1155SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1156 if ((unsigned)Cond >= CondCodeNodes.size()) 1157 CondCodeNodes.resize(Cond+1); 1158 1159 if (CondCodeNodes[Cond] == 0) { 1160 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1161 CondCodeNodes[Cond] = N; 1162 AllNodes.push_back(N); 1163 } 1164 1165 return SDValue(CondCodeNodes[Cond], 0); 1166} 1167 1168// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1169// the shuffle mask M that point at N1 to point at N2, and indices that point 1170// N2 to point at N1. 1171static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1172 std::swap(N1, N2); 1173 int NElts = M.size(); 1174 for (int i = 0; i != NElts; ++i) { 1175 if (M[i] >= NElts) 1176 M[i] -= NElts; 1177 else if (M[i] >= 0) 1178 M[i] += NElts; 1179 } 1180} 1181 1182SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1183 SDValue N2, const int *Mask) { 1184 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1185 assert(VT.isVector() && N1.getValueType().isVector() && 1186 "Vector Shuffle VTs must be a vectors"); 1187 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1188 && "Vector Shuffle VTs must have same element type"); 1189 1190 // Canonicalize shuffle undef, undef -> undef 1191 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1192 return getUNDEF(VT); 1193 1194 // Validate that all indices in Mask are within the range of the elements 1195 // input to the shuffle. 1196 unsigned NElts = VT.getVectorNumElements(); 1197 SmallVector<int, 8> MaskVec; 1198 for (unsigned i = 0; i != NElts; ++i) { 1199 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1200 MaskVec.push_back(Mask[i]); 1201 } 1202 1203 // Canonicalize shuffle v, v -> v, undef 1204 if (N1 == N2) { 1205 N2 = getUNDEF(VT); 1206 for (unsigned i = 0; i != NElts; ++i) 1207 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1208 } 1209 1210 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1211 if (N1.getOpcode() == ISD::UNDEF) 1212 commuteShuffle(N1, N2, MaskVec); 1213 1214 // Canonicalize all index into lhs, -> shuffle lhs, undef 1215 // Canonicalize all index into rhs, -> shuffle rhs, undef 1216 bool AllLHS = true, AllRHS = true; 1217 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1218 for (unsigned i = 0; i != NElts; ++i) { 1219 if (MaskVec[i] >= (int)NElts) { 1220 if (N2Undef) 1221 MaskVec[i] = -1; 1222 else 1223 AllLHS = false; 1224 } else if (MaskVec[i] >= 0) { 1225 AllRHS = false; 1226 } 1227 } 1228 if (AllLHS && AllRHS) 1229 return getUNDEF(VT); 1230 if (AllLHS && !N2Undef) 1231 N2 = getUNDEF(VT); 1232 if (AllRHS) { 1233 N1 = getUNDEF(VT); 1234 commuteShuffle(N1, N2, MaskVec); 1235 } 1236 1237 // If Identity shuffle, or all shuffle in to undef, return that node. 1238 bool AllUndef = true; 1239 bool Identity = true; 1240 for (unsigned i = 0; i != NElts; ++i) { 1241 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1242 if (MaskVec[i] >= 0) AllUndef = false; 1243 } 1244 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1245 return N1; 1246 if (AllUndef) 1247 return getUNDEF(VT); 1248 1249 FoldingSetNodeID ID; 1250 SDValue Ops[2] = { N1, N2 }; 1251 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1252 for (unsigned i = 0; i != NElts; ++i) 1253 ID.AddInteger(MaskVec[i]); 1254 1255 void* IP = 0; 1256 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1257 return SDValue(E, 0); 1258 1259 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1260 // SDNode doesn't have access to it. This memory will be "leaked" when 1261 // the node is deallocated, but recovered when the NodeAllocator is released. 1262 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1263 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1264 1265 ShuffleVectorSDNode *N = 1266 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1267 CSEMap.InsertNode(N, IP); 1268 AllNodes.push_back(N); 1269 return SDValue(N, 0); 1270} 1271 1272SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1273 SDValue Val, SDValue DTy, 1274 SDValue STy, SDValue Rnd, SDValue Sat, 1275 ISD::CvtCode Code) { 1276 // If the src and dest types are the same and the conversion is between 1277 // integer types of the same sign or two floats, no conversion is necessary. 1278 if (DTy == STy && 1279 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1280 return Val; 1281 1282 FoldingSetNodeID ID; 1283 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1284 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1285 void* IP = 0; 1286 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1287 return SDValue(E, 0); 1288 1289 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1290 Code); 1291 CSEMap.InsertNode(N, IP); 1292 AllNodes.push_back(N); 1293 return SDValue(N, 0); 1294} 1295 1296SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1297 FoldingSetNodeID ID; 1298 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1299 ID.AddInteger(RegNo); 1300 void *IP = 0; 1301 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1302 return SDValue(E, 0); 1303 1304 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1305 CSEMap.InsertNode(N, IP); 1306 AllNodes.push_back(N); 1307 return SDValue(N, 0); 1308} 1309 1310SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1311 FoldingSetNodeID ID; 1312 SDValue Ops[] = { Root }; 1313 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1314 ID.AddPointer(Label); 1315 void *IP = 0; 1316 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1317 return SDValue(E, 0); 1318 1319 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1320 CSEMap.InsertNode(N, IP); 1321 AllNodes.push_back(N); 1322 return SDValue(N, 0); 1323} 1324 1325 1326SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1327 bool isTarget, 1328 unsigned char TargetFlags) { 1329 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1330 1331 FoldingSetNodeID ID; 1332 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1333 ID.AddPointer(BA); 1334 ID.AddInteger(TargetFlags); 1335 void *IP = 0; 1336 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1337 return SDValue(E, 0); 1338 1339 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1340 CSEMap.InsertNode(N, IP); 1341 AllNodes.push_back(N); 1342 return SDValue(N, 0); 1343} 1344 1345SDValue SelectionDAG::getSrcValue(const Value *V) { 1346 assert((!V || V->getType()->isPointerTy()) && 1347 "SrcValue is not a pointer?"); 1348 1349 FoldingSetNodeID ID; 1350 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1351 ID.AddPointer(V); 1352 1353 void *IP = 0; 1354 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1355 return SDValue(E, 0); 1356 1357 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1358 CSEMap.InsertNode(N, IP); 1359 AllNodes.push_back(N); 1360 return SDValue(N, 0); 1361} 1362 1363/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1364SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1365 FoldingSetNodeID ID; 1366 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1367 ID.AddPointer(MD); 1368 1369 void *IP = 0; 1370 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1371 return SDValue(E, 0); 1372 1373 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1374 CSEMap.InsertNode(N, IP); 1375 AllNodes.push_back(N); 1376 return SDValue(N, 0); 1377} 1378 1379 1380/// getShiftAmountOperand - Return the specified value casted to 1381/// the target's desired shift amount type. 1382SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1383 EVT OpTy = Op.getValueType(); 1384 MVT ShTy = TLI.getShiftAmountTy(); 1385 if (OpTy == ShTy || OpTy.isVector()) return Op; 1386 1387 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1388 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1389} 1390 1391/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1392/// specified value type. 1393SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1394 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1395 unsigned ByteSize = VT.getStoreSize(); 1396 const Type *Ty = VT.getTypeForEVT(*getContext()); 1397 unsigned StackAlign = 1398 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1399 1400 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1401 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1402} 1403 1404/// CreateStackTemporary - Create a stack temporary suitable for holding 1405/// either of the specified value types. 1406SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1407 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1408 VT2.getStoreSizeInBits())/8; 1409 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1410 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1411 const TargetData *TD = TLI.getTargetData(); 1412 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1413 TD->getPrefTypeAlignment(Ty2)); 1414 1415 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1416 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1417 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1418} 1419 1420SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1421 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1422 // These setcc operations always fold. 1423 switch (Cond) { 1424 default: break; 1425 case ISD::SETFALSE: 1426 case ISD::SETFALSE2: return getConstant(0, VT); 1427 case ISD::SETTRUE: 1428 case ISD::SETTRUE2: return getConstant(1, VT); 1429 1430 case ISD::SETOEQ: 1431 case ISD::SETOGT: 1432 case ISD::SETOGE: 1433 case ISD::SETOLT: 1434 case ISD::SETOLE: 1435 case ISD::SETONE: 1436 case ISD::SETO: 1437 case ISD::SETUO: 1438 case ISD::SETUEQ: 1439 case ISD::SETUNE: 1440 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1441 break; 1442 } 1443 1444 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1445 const APInt &C2 = N2C->getAPIntValue(); 1446 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1447 const APInt &C1 = N1C->getAPIntValue(); 1448 1449 switch (Cond) { 1450 default: llvm_unreachable("Unknown integer setcc!"); 1451 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1452 case ISD::SETNE: return getConstant(C1 != C2, VT); 1453 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1454 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1455 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1456 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1457 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1458 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1459 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1460 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1461 } 1462 } 1463 } 1464 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1465 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1466 // No compile time operations on this type yet. 1467 if (N1C->getValueType(0) == MVT::ppcf128) 1468 return SDValue(); 1469 1470 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1471 switch (Cond) { 1472 default: break; 1473 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1474 return getUNDEF(VT); 1475 // fall through 1476 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1477 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1478 return getUNDEF(VT); 1479 // fall through 1480 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1481 R==APFloat::cmpLessThan, VT); 1482 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1483 return getUNDEF(VT); 1484 // fall through 1485 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1486 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1487 return getUNDEF(VT); 1488 // fall through 1489 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1490 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1491 return getUNDEF(VT); 1492 // fall through 1493 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1494 R==APFloat::cmpEqual, VT); 1495 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1496 return getUNDEF(VT); 1497 // fall through 1498 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1499 R==APFloat::cmpEqual, VT); 1500 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1501 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1502 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1503 R==APFloat::cmpEqual, VT); 1504 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1505 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1506 R==APFloat::cmpLessThan, VT); 1507 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1508 R==APFloat::cmpUnordered, VT); 1509 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1510 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1511 } 1512 } else { 1513 // Ensure that the constant occurs on the RHS. 1514 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1515 } 1516 } 1517 1518 // Could not fold it. 1519 return SDValue(); 1520} 1521 1522/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1523/// use this predicate to simplify operations downstream. 1524bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1525 // This predicate is not safe for vector operations. 1526 if (Op.getValueType().isVector()) 1527 return false; 1528 1529 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1530 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1531} 1532 1533/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1534/// this predicate to simplify operations downstream. Mask is known to be zero 1535/// for bits that V cannot have. 1536bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1537 unsigned Depth) const { 1538 APInt KnownZero, KnownOne; 1539 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1540 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1541 return (KnownZero & Mask) == Mask; 1542} 1543 1544/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1545/// known to be either zero or one and return them in the KnownZero/KnownOne 1546/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1547/// processing. 1548void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1549 APInt &KnownZero, APInt &KnownOne, 1550 unsigned Depth) const { 1551 unsigned BitWidth = Mask.getBitWidth(); 1552 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1553 "Mask size mismatches value type size!"); 1554 1555 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1556 if (Depth == 6 || Mask == 0) 1557 return; // Limit search depth. 1558 1559 APInt KnownZero2, KnownOne2; 1560 1561 switch (Op.getOpcode()) { 1562 case ISD::Constant: 1563 // We know all of the bits for a constant! 1564 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1565 KnownZero = ~KnownOne & Mask; 1566 return; 1567 case ISD::AND: 1568 // If either the LHS or the RHS are Zero, the result is zero. 1569 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1570 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1571 KnownZero2, KnownOne2, Depth+1); 1572 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1573 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1574 1575 // Output known-1 bits are only known if set in both the LHS & RHS. 1576 KnownOne &= KnownOne2; 1577 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1578 KnownZero |= KnownZero2; 1579 return; 1580 case ISD::OR: 1581 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1582 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1583 KnownZero2, KnownOne2, Depth+1); 1584 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1585 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1586 1587 // Output known-0 bits are only known if clear in both the LHS & RHS. 1588 KnownZero &= KnownZero2; 1589 // Output known-1 are known to be set if set in either the LHS | RHS. 1590 KnownOne |= KnownOne2; 1591 return; 1592 case ISD::XOR: { 1593 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1594 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1595 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1596 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1597 1598 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1599 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1600 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1601 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1602 KnownZero = KnownZeroOut; 1603 return; 1604 } 1605 case ISD::MUL: { 1606 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1607 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1608 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1609 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1610 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1611 1612 // If low bits are zero in either operand, output low known-0 bits. 1613 // Also compute a conserative estimate for high known-0 bits. 1614 // More trickiness is possible, but this is sufficient for the 1615 // interesting case of alignment computation. 1616 KnownOne.clear(); 1617 unsigned TrailZ = KnownZero.countTrailingOnes() + 1618 KnownZero2.countTrailingOnes(); 1619 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1620 KnownZero2.countLeadingOnes(), 1621 BitWidth) - BitWidth; 1622 1623 TrailZ = std::min(TrailZ, BitWidth); 1624 LeadZ = std::min(LeadZ, BitWidth); 1625 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1626 APInt::getHighBitsSet(BitWidth, LeadZ); 1627 KnownZero &= Mask; 1628 return; 1629 } 1630 case ISD::UDIV: { 1631 // For the purposes of computing leading zeros we can conservatively 1632 // treat a udiv as a logical right shift by the power of 2 known to 1633 // be less than the denominator. 1634 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1635 ComputeMaskedBits(Op.getOperand(0), 1636 AllOnes, KnownZero2, KnownOne2, Depth+1); 1637 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1638 1639 KnownOne2.clear(); 1640 KnownZero2.clear(); 1641 ComputeMaskedBits(Op.getOperand(1), 1642 AllOnes, KnownZero2, KnownOne2, Depth+1); 1643 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1644 if (RHSUnknownLeadingOnes != BitWidth) 1645 LeadZ = std::min(BitWidth, 1646 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1647 1648 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1649 return; 1650 } 1651 case ISD::SELECT: 1652 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1653 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1654 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1655 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1656 1657 // Only known if known in both the LHS and RHS. 1658 KnownOne &= KnownOne2; 1659 KnownZero &= KnownZero2; 1660 return; 1661 case ISD::SELECT_CC: 1662 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1663 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1664 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1665 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1666 1667 // Only known if known in both the LHS and RHS. 1668 KnownOne &= KnownOne2; 1669 KnownZero &= KnownZero2; 1670 return; 1671 case ISD::SADDO: 1672 case ISD::UADDO: 1673 case ISD::SSUBO: 1674 case ISD::USUBO: 1675 case ISD::SMULO: 1676 case ISD::UMULO: 1677 if (Op.getResNo() != 1) 1678 return; 1679 // The boolean result conforms to getBooleanContents. Fall through. 1680 case ISD::SETCC: 1681 // If we know the result of a setcc has the top bits zero, use this info. 1682 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1683 BitWidth > 1) 1684 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1685 return; 1686 case ISD::SHL: 1687 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1688 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1689 unsigned ShAmt = SA->getZExtValue(); 1690 1691 // If the shift count is an invalid immediate, don't do anything. 1692 if (ShAmt >= BitWidth) 1693 return; 1694 1695 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1696 KnownZero, KnownOne, Depth+1); 1697 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1698 KnownZero <<= ShAmt; 1699 KnownOne <<= ShAmt; 1700 // low bits known zero. 1701 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1702 } 1703 return; 1704 case ISD::SRL: 1705 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1706 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1707 unsigned ShAmt = SA->getZExtValue(); 1708 1709 // If the shift count is an invalid immediate, don't do anything. 1710 if (ShAmt >= BitWidth) 1711 return; 1712 1713 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1714 KnownZero, KnownOne, Depth+1); 1715 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1716 KnownZero = KnownZero.lshr(ShAmt); 1717 KnownOne = KnownOne.lshr(ShAmt); 1718 1719 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1720 KnownZero |= HighBits; // High bits known zero. 1721 } 1722 return; 1723 case ISD::SRA: 1724 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1725 unsigned ShAmt = SA->getZExtValue(); 1726 1727 // If the shift count is an invalid immediate, don't do anything. 1728 if (ShAmt >= BitWidth) 1729 return; 1730 1731 APInt InDemandedMask = (Mask << ShAmt); 1732 // If any of the demanded bits are produced by the sign extension, we also 1733 // demand the input sign bit. 1734 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1735 if (HighBits.getBoolValue()) 1736 InDemandedMask |= APInt::getSignBit(BitWidth); 1737 1738 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1739 Depth+1); 1740 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1741 KnownZero = KnownZero.lshr(ShAmt); 1742 KnownOne = KnownOne.lshr(ShAmt); 1743 1744 // Handle the sign bits. 1745 APInt SignBit = APInt::getSignBit(BitWidth); 1746 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1747 1748 if (KnownZero.intersects(SignBit)) { 1749 KnownZero |= HighBits; // New bits are known zero. 1750 } else if (KnownOne.intersects(SignBit)) { 1751 KnownOne |= HighBits; // New bits are known one. 1752 } 1753 } 1754 return; 1755 case ISD::SIGN_EXTEND_INREG: { 1756 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1757 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1758 1759 // Sign extension. Compute the demanded bits in the result that are not 1760 // present in the input. 1761 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1762 1763 APInt InSignBit = APInt::getSignBit(EBits); 1764 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1765 1766 // If the sign extended bits are demanded, we know that the sign 1767 // bit is demanded. 1768 InSignBit.zext(BitWidth); 1769 if (NewBits.getBoolValue()) 1770 InputDemandedBits |= InSignBit; 1771 1772 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1773 KnownZero, KnownOne, Depth+1); 1774 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1775 1776 // If the sign bit of the input is known set or clear, then we know the 1777 // top bits of the result. 1778 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1779 KnownZero |= NewBits; 1780 KnownOne &= ~NewBits; 1781 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1782 KnownOne |= NewBits; 1783 KnownZero &= ~NewBits; 1784 } else { // Input sign bit unknown 1785 KnownZero &= ~NewBits; 1786 KnownOne &= ~NewBits; 1787 } 1788 return; 1789 } 1790 case ISD::CTTZ: 1791 case ISD::CTLZ: 1792 case ISD::CTPOP: { 1793 unsigned LowBits = Log2_32(BitWidth)+1; 1794 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1795 KnownOne.clear(); 1796 return; 1797 } 1798 case ISD::LOAD: { 1799 if (ISD::isZEXTLoad(Op.getNode())) { 1800 LoadSDNode *LD = cast<LoadSDNode>(Op); 1801 EVT VT = LD->getMemoryVT(); 1802 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1803 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1804 } 1805 return; 1806 } 1807 case ISD::ZERO_EXTEND: { 1808 EVT InVT = Op.getOperand(0).getValueType(); 1809 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1810 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1811 APInt InMask = Mask; 1812 InMask.trunc(InBits); 1813 KnownZero.trunc(InBits); 1814 KnownOne.trunc(InBits); 1815 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1816 KnownZero.zext(BitWidth); 1817 KnownOne.zext(BitWidth); 1818 KnownZero |= NewBits; 1819 return; 1820 } 1821 case ISD::SIGN_EXTEND: { 1822 EVT InVT = Op.getOperand(0).getValueType(); 1823 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1824 APInt InSignBit = APInt::getSignBit(InBits); 1825 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1826 APInt InMask = Mask; 1827 InMask.trunc(InBits); 1828 1829 // If any of the sign extended bits are demanded, we know that the sign 1830 // bit is demanded. Temporarily set this bit in the mask for our callee. 1831 if (NewBits.getBoolValue()) 1832 InMask |= InSignBit; 1833 1834 KnownZero.trunc(InBits); 1835 KnownOne.trunc(InBits); 1836 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1837 1838 // Note if the sign bit is known to be zero or one. 1839 bool SignBitKnownZero = KnownZero.isNegative(); 1840 bool SignBitKnownOne = KnownOne.isNegative(); 1841 assert(!(SignBitKnownZero && SignBitKnownOne) && 1842 "Sign bit can't be known to be both zero and one!"); 1843 1844 // If the sign bit wasn't actually demanded by our caller, we don't 1845 // want it set in the KnownZero and KnownOne result values. Reset the 1846 // mask and reapply it to the result values. 1847 InMask = Mask; 1848 InMask.trunc(InBits); 1849 KnownZero &= InMask; 1850 KnownOne &= InMask; 1851 1852 KnownZero.zext(BitWidth); 1853 KnownOne.zext(BitWidth); 1854 1855 // If the sign bit is known zero or one, the top bits match. 1856 if (SignBitKnownZero) 1857 KnownZero |= NewBits; 1858 else if (SignBitKnownOne) 1859 KnownOne |= NewBits; 1860 return; 1861 } 1862 case ISD::ANY_EXTEND: { 1863 EVT InVT = Op.getOperand(0).getValueType(); 1864 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1865 APInt InMask = Mask; 1866 InMask.trunc(InBits); 1867 KnownZero.trunc(InBits); 1868 KnownOne.trunc(InBits); 1869 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1870 KnownZero.zext(BitWidth); 1871 KnownOne.zext(BitWidth); 1872 return; 1873 } 1874 case ISD::TRUNCATE: { 1875 EVT InVT = Op.getOperand(0).getValueType(); 1876 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1877 APInt InMask = Mask; 1878 InMask.zext(InBits); 1879 KnownZero.zext(InBits); 1880 KnownOne.zext(InBits); 1881 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1882 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1883 KnownZero.trunc(BitWidth); 1884 KnownOne.trunc(BitWidth); 1885 break; 1886 } 1887 case ISD::AssertZext: { 1888 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1889 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1890 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1891 KnownOne, Depth+1); 1892 KnownZero |= (~InMask) & Mask; 1893 return; 1894 } 1895 case ISD::FGETSIGN: 1896 // All bits are zero except the low bit. 1897 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1898 return; 1899 1900 case ISD::SUB: { 1901 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1902 // We know that the top bits of C-X are clear if X contains less bits 1903 // than C (i.e. no wrap-around can happen). For example, 20-X is 1904 // positive if we can prove that X is >= 0 and < 16. 1905 if (CLHS->getAPIntValue().isNonNegative()) { 1906 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1907 // NLZ can't be BitWidth with no sign bit 1908 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1909 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1910 Depth+1); 1911 1912 // If all of the MaskV bits are known to be zero, then we know the 1913 // output top bits are zero, because we now know that the output is 1914 // from [0-C]. 1915 if ((KnownZero2 & MaskV) == MaskV) { 1916 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1917 // Top bits known zero. 1918 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1919 } 1920 } 1921 } 1922 } 1923 // fall through 1924 case ISD::ADD: { 1925 // Output known-0 bits are known if clear or set in both the low clear bits 1926 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1927 // low 3 bits clear. 1928 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1929 BitWidth - Mask.countLeadingZeros()); 1930 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1931 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1932 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1933 1934 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1935 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1936 KnownZeroOut = std::min(KnownZeroOut, 1937 KnownZero2.countTrailingOnes()); 1938 1939 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1940 return; 1941 } 1942 case ISD::SREM: 1943 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1944 const APInt &RA = Rem->getAPIntValue().abs(); 1945 if (RA.isPowerOf2()) { 1946 APInt LowBits = RA - 1; 1947 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1948 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1949 1950 // The low bits of the first operand are unchanged by the srem. 1951 KnownZero = KnownZero2 & LowBits; 1952 KnownOne = KnownOne2 & LowBits; 1953 1954 // If the first operand is non-negative or has all low bits zero, then 1955 // the upper bits are all zero. 1956 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1957 KnownZero |= ~LowBits; 1958 1959 // If the first operand is negative and not all low bits are zero, then 1960 // the upper bits are all one. 1961 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1962 KnownOne |= ~LowBits; 1963 1964 KnownZero &= Mask; 1965 KnownOne &= Mask; 1966 1967 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1968 } 1969 } 1970 return; 1971 case ISD::UREM: { 1972 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1973 const APInt &RA = Rem->getAPIntValue(); 1974 if (RA.isPowerOf2()) { 1975 APInt LowBits = (RA - 1); 1976 APInt Mask2 = LowBits & Mask; 1977 KnownZero |= ~LowBits & Mask; 1978 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1979 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1980 break; 1981 } 1982 } 1983 1984 // Since the result is less than or equal to either operand, any leading 1985 // zero bits in either operand must also exist in the result. 1986 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1987 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1988 Depth+1); 1989 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1990 Depth+1); 1991 1992 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1993 KnownZero2.countLeadingOnes()); 1994 KnownOne.clear(); 1995 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1996 return; 1997 } 1998 default: 1999 // Allow the target to implement this method for its nodes. 2000 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2001 case ISD::INTRINSIC_WO_CHAIN: 2002 case ISD::INTRINSIC_W_CHAIN: 2003 case ISD::INTRINSIC_VOID: 2004 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2005 Depth); 2006 } 2007 return; 2008 } 2009} 2010 2011/// ComputeNumSignBits - Return the number of times the sign bit of the 2012/// register is replicated into the other bits. We know that at least 1 bit 2013/// is always equal to the sign bit (itself), but other cases can give us 2014/// information. For example, immediately after an "SRA X, 2", we know that 2015/// the top 3 bits are all equal to each other, so we return 3. 2016unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2017 EVT VT = Op.getValueType(); 2018 assert(VT.isInteger() && "Invalid VT!"); 2019 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2020 unsigned Tmp, Tmp2; 2021 unsigned FirstAnswer = 1; 2022 2023 if (Depth == 6) 2024 return 1; // Limit search depth. 2025 2026 switch (Op.getOpcode()) { 2027 default: break; 2028 case ISD::AssertSext: 2029 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2030 return VTBits-Tmp+1; 2031 case ISD::AssertZext: 2032 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2033 return VTBits-Tmp; 2034 2035 case ISD::Constant: { 2036 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2037 // If negative, return # leading ones. 2038 if (Val.isNegative()) 2039 return Val.countLeadingOnes(); 2040 2041 // Return # leading zeros. 2042 return Val.countLeadingZeros(); 2043 } 2044 2045 case ISD::SIGN_EXTEND: 2046 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2047 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2048 2049 case ISD::SIGN_EXTEND_INREG: 2050 // Max of the input and what this extends. 2051 Tmp = 2052 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2053 Tmp = VTBits-Tmp+1; 2054 2055 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2056 return std::max(Tmp, Tmp2); 2057 2058 case ISD::SRA: 2059 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2060 // SRA X, C -> adds C sign bits. 2061 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2062 Tmp += C->getZExtValue(); 2063 if (Tmp > VTBits) Tmp = VTBits; 2064 } 2065 return Tmp; 2066 case ISD::SHL: 2067 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2068 // shl destroys sign bits. 2069 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2070 if (C->getZExtValue() >= VTBits || // Bad shift. 2071 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2072 return Tmp - C->getZExtValue(); 2073 } 2074 break; 2075 case ISD::AND: 2076 case ISD::OR: 2077 case ISD::XOR: // NOT is handled here. 2078 // Logical binary ops preserve the number of sign bits at the worst. 2079 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2080 if (Tmp != 1) { 2081 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2082 FirstAnswer = std::min(Tmp, Tmp2); 2083 // We computed what we know about the sign bits as our first 2084 // answer. Now proceed to the generic code that uses 2085 // ComputeMaskedBits, and pick whichever answer is better. 2086 } 2087 break; 2088 2089 case ISD::SELECT: 2090 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2091 if (Tmp == 1) return 1; // Early out. 2092 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2093 return std::min(Tmp, Tmp2); 2094 2095 case ISD::SADDO: 2096 case ISD::UADDO: 2097 case ISD::SSUBO: 2098 case ISD::USUBO: 2099 case ISD::SMULO: 2100 case ISD::UMULO: 2101 if (Op.getResNo() != 1) 2102 break; 2103 // The boolean result conforms to getBooleanContents. Fall through. 2104 case ISD::SETCC: 2105 // If setcc returns 0/-1, all bits are sign bits. 2106 if (TLI.getBooleanContents() == 2107 TargetLowering::ZeroOrNegativeOneBooleanContent) 2108 return VTBits; 2109 break; 2110 case ISD::ROTL: 2111 case ISD::ROTR: 2112 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2113 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2114 2115 // Handle rotate right by N like a rotate left by 32-N. 2116 if (Op.getOpcode() == ISD::ROTR) 2117 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2118 2119 // If we aren't rotating out all of the known-in sign bits, return the 2120 // number that are left. This handles rotl(sext(x), 1) for example. 2121 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2122 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2123 } 2124 break; 2125 case ISD::ADD: 2126 // Add can have at most one carry bit. Thus we know that the output 2127 // is, at worst, one more bit than the inputs. 2128 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2129 if (Tmp == 1) return 1; // Early out. 2130 2131 // Special case decrementing a value (ADD X, -1): 2132 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2133 if (CRHS->isAllOnesValue()) { 2134 APInt KnownZero, KnownOne; 2135 APInt Mask = APInt::getAllOnesValue(VTBits); 2136 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2137 2138 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2139 // sign bits set. 2140 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2141 return VTBits; 2142 2143 // If we are subtracting one from a positive number, there is no carry 2144 // out of the result. 2145 if (KnownZero.isNegative()) 2146 return Tmp; 2147 } 2148 2149 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2150 if (Tmp2 == 1) return 1; 2151 return std::min(Tmp, Tmp2)-1; 2152 break; 2153 2154 case ISD::SUB: 2155 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2156 if (Tmp2 == 1) return 1; 2157 2158 // Handle NEG. 2159 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2160 if (CLHS->isNullValue()) { 2161 APInt KnownZero, KnownOne; 2162 APInt Mask = APInt::getAllOnesValue(VTBits); 2163 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2164 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2165 // sign bits set. 2166 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2167 return VTBits; 2168 2169 // If the input is known to be positive (the sign bit is known clear), 2170 // the output of the NEG has the same number of sign bits as the input. 2171 if (KnownZero.isNegative()) 2172 return Tmp2; 2173 2174 // Otherwise, we treat this like a SUB. 2175 } 2176 2177 // Sub can have at most one carry bit. Thus we know that the output 2178 // is, at worst, one more bit than the inputs. 2179 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2180 if (Tmp == 1) return 1; // Early out. 2181 return std::min(Tmp, Tmp2)-1; 2182 break; 2183 case ISD::TRUNCATE: 2184 // FIXME: it's tricky to do anything useful for this, but it is an important 2185 // case for targets like X86. 2186 break; 2187 } 2188 2189 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2190 if (Op.getOpcode() == ISD::LOAD) { 2191 LoadSDNode *LD = cast<LoadSDNode>(Op); 2192 unsigned ExtType = LD->getExtensionType(); 2193 switch (ExtType) { 2194 default: break; 2195 case ISD::SEXTLOAD: // '17' bits known 2196 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2197 return VTBits-Tmp+1; 2198 case ISD::ZEXTLOAD: // '16' bits known 2199 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2200 return VTBits-Tmp; 2201 } 2202 } 2203 2204 // Allow the target to implement this method for its nodes. 2205 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2206 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2207 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2208 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2209 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2210 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2211 } 2212 2213 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2214 // use this information. 2215 APInt KnownZero, KnownOne; 2216 APInt Mask = APInt::getAllOnesValue(VTBits); 2217 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2218 2219 if (KnownZero.isNegative()) { // sign bit is 0 2220 Mask = KnownZero; 2221 } else if (KnownOne.isNegative()) { // sign bit is 1; 2222 Mask = KnownOne; 2223 } else { 2224 // Nothing known. 2225 return FirstAnswer; 2226 } 2227 2228 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2229 // the number of identical bits in the top of the input value. 2230 Mask = ~Mask; 2231 Mask <<= Mask.getBitWidth()-VTBits; 2232 // Return # leading zeros. We use 'min' here in case Val was zero before 2233 // shifting. We don't want to return '64' as for an i32 "0". 2234 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2235} 2236 2237bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2238 // If we're told that NaNs won't happen, assume they won't. 2239 if (NoNaNsFPMath) 2240 return true; 2241 2242 // If the value is a constant, we can obviously see if it is a NaN or not. 2243 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2244 return !C->getValueAPF().isNaN(); 2245 2246 // TODO: Recognize more cases here. 2247 2248 return false; 2249} 2250 2251bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2252 // If the value is a constant, we can obviously see if it is a zero or not. 2253 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2254 return !C->isZero(); 2255 2256 // TODO: Recognize more cases here. 2257 2258 return false; 2259} 2260 2261bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2262 // Check the obvious case. 2263 if (A == B) return true; 2264 2265 // For for negative and positive zero. 2266 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2267 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2268 if (CA->isZero() && CB->isZero()) return true; 2269 2270 // Otherwise they may not be equal. 2271 return false; 2272} 2273 2274bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2275 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2276 if (!GA) return false; 2277 if (GA->getOffset() != 0) return false; 2278 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2279 if (!GV) return false; 2280 return MF->getMMI().hasDebugInfo(); 2281} 2282 2283 2284/// getNode - Gets or creates the specified node. 2285/// 2286SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2287 FoldingSetNodeID ID; 2288 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2289 void *IP = 0; 2290 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2291 return SDValue(E, 0); 2292 2293 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2294 CSEMap.InsertNode(N, IP); 2295 2296 AllNodes.push_back(N); 2297#ifndef NDEBUG 2298 VerifyNode(N); 2299#endif 2300 return SDValue(N, 0); 2301} 2302 2303SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2304 EVT VT, SDValue Operand) { 2305 // Constant fold unary operations with an integer constant operand. 2306 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2307 const APInt &Val = C->getAPIntValue(); 2308 switch (Opcode) { 2309 default: break; 2310 case ISD::SIGN_EXTEND: 2311 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2312 case ISD::ANY_EXTEND: 2313 case ISD::ZERO_EXTEND: 2314 case ISD::TRUNCATE: 2315 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2316 case ISD::UINT_TO_FP: 2317 case ISD::SINT_TO_FP: { 2318 const uint64_t zero[] = {0, 0}; 2319 // No compile time operations on ppcf128. 2320 if (VT == MVT::ppcf128) break; 2321 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2322 (void)apf.convertFromAPInt(Val, 2323 Opcode==ISD::SINT_TO_FP, 2324 APFloat::rmNearestTiesToEven); 2325 return getConstantFP(apf, VT); 2326 } 2327 case ISD::BIT_CONVERT: 2328 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2329 return getConstantFP(Val.bitsToFloat(), VT); 2330 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2331 return getConstantFP(Val.bitsToDouble(), VT); 2332 break; 2333 case ISD::BSWAP: 2334 return getConstant(Val.byteSwap(), VT); 2335 case ISD::CTPOP: 2336 return getConstant(Val.countPopulation(), VT); 2337 case ISD::CTLZ: 2338 return getConstant(Val.countLeadingZeros(), VT); 2339 case ISD::CTTZ: 2340 return getConstant(Val.countTrailingZeros(), VT); 2341 } 2342 } 2343 2344 // Constant fold unary operations with a floating point constant operand. 2345 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2346 APFloat V = C->getValueAPF(); // make copy 2347 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2348 switch (Opcode) { 2349 case ISD::FNEG: 2350 V.changeSign(); 2351 return getConstantFP(V, VT); 2352 case ISD::FABS: 2353 V.clearSign(); 2354 return getConstantFP(V, VT); 2355 case ISD::FP_ROUND: 2356 case ISD::FP_EXTEND: { 2357 bool ignored; 2358 // This can return overflow, underflow, or inexact; we don't care. 2359 // FIXME need to be more flexible about rounding mode. 2360 (void)V.convert(*EVTToAPFloatSemantics(VT), 2361 APFloat::rmNearestTiesToEven, &ignored); 2362 return getConstantFP(V, VT); 2363 } 2364 case ISD::FP_TO_SINT: 2365 case ISD::FP_TO_UINT: { 2366 integerPart x[2]; 2367 bool ignored; 2368 assert(integerPartWidth >= 64); 2369 // FIXME need to be more flexible about rounding mode. 2370 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2371 Opcode==ISD::FP_TO_SINT, 2372 APFloat::rmTowardZero, &ignored); 2373 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2374 break; 2375 APInt api(VT.getSizeInBits(), 2, x); 2376 return getConstant(api, VT); 2377 } 2378 case ISD::BIT_CONVERT: 2379 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2380 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2381 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2382 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2383 break; 2384 } 2385 } 2386 } 2387 2388 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2389 switch (Opcode) { 2390 case ISD::TokenFactor: 2391 case ISD::MERGE_VALUES: 2392 case ISD::CONCAT_VECTORS: 2393 return Operand; // Factor, merge or concat of one node? No need. 2394 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2395 case ISD::FP_EXTEND: 2396 assert(VT.isFloatingPoint() && 2397 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2398 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2399 assert((!VT.isVector() || 2400 VT.getVectorNumElements() == 2401 Operand.getValueType().getVectorNumElements()) && 2402 "Vector element count mismatch!"); 2403 if (Operand.getOpcode() == ISD::UNDEF) 2404 return getUNDEF(VT); 2405 break; 2406 case ISD::SIGN_EXTEND: 2407 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2408 "Invalid SIGN_EXTEND!"); 2409 if (Operand.getValueType() == VT) return Operand; // noop extension 2410 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2411 "Invalid sext node, dst < src!"); 2412 assert((!VT.isVector() || 2413 VT.getVectorNumElements() == 2414 Operand.getValueType().getVectorNumElements()) && 2415 "Vector element count mismatch!"); 2416 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2417 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2418 break; 2419 case ISD::ZERO_EXTEND: 2420 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2421 "Invalid ZERO_EXTEND!"); 2422 if (Operand.getValueType() == VT) return Operand; // noop extension 2423 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2424 "Invalid zext node, dst < src!"); 2425 assert((!VT.isVector() || 2426 VT.getVectorNumElements() == 2427 Operand.getValueType().getVectorNumElements()) && 2428 "Vector element count mismatch!"); 2429 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2430 return getNode(ISD::ZERO_EXTEND, DL, VT, 2431 Operand.getNode()->getOperand(0)); 2432 break; 2433 case ISD::ANY_EXTEND: 2434 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2435 "Invalid ANY_EXTEND!"); 2436 if (Operand.getValueType() == VT) return Operand; // noop extension 2437 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2438 "Invalid anyext node, dst < src!"); 2439 assert((!VT.isVector() || 2440 VT.getVectorNumElements() == 2441 Operand.getValueType().getVectorNumElements()) && 2442 "Vector element count mismatch!"); 2443 2444 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2445 OpOpcode == ISD::ANY_EXTEND) 2446 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2447 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2448 2449 // (ext (trunx x)) -> x 2450 if (OpOpcode == ISD::TRUNCATE) { 2451 SDValue OpOp = Operand.getNode()->getOperand(0); 2452 if (OpOp.getValueType() == VT) 2453 return OpOp; 2454 } 2455 break; 2456 case ISD::TRUNCATE: 2457 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2458 "Invalid TRUNCATE!"); 2459 if (Operand.getValueType() == VT) return Operand; // noop truncate 2460 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2461 "Invalid truncate node, src < dst!"); 2462 assert((!VT.isVector() || 2463 VT.getVectorNumElements() == 2464 Operand.getValueType().getVectorNumElements()) && 2465 "Vector element count mismatch!"); 2466 if (OpOpcode == ISD::TRUNCATE) 2467 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2468 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2469 OpOpcode == ISD::ANY_EXTEND) { 2470 // If the source is smaller than the dest, we still need an extend. 2471 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2472 .bitsLT(VT.getScalarType())) 2473 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2474 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2475 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2476 else 2477 return Operand.getNode()->getOperand(0); 2478 } 2479 break; 2480 case ISD::BIT_CONVERT: 2481 // Basic sanity checking. 2482 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2483 && "Cannot BIT_CONVERT between types of different sizes!"); 2484 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2485 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2486 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2487 if (OpOpcode == ISD::UNDEF) 2488 return getUNDEF(VT); 2489 break; 2490 case ISD::SCALAR_TO_VECTOR: 2491 assert(VT.isVector() && !Operand.getValueType().isVector() && 2492 (VT.getVectorElementType() == Operand.getValueType() || 2493 (VT.getVectorElementType().isInteger() && 2494 Operand.getValueType().isInteger() && 2495 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2496 "Illegal SCALAR_TO_VECTOR node!"); 2497 if (OpOpcode == ISD::UNDEF) 2498 return getUNDEF(VT); 2499 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2500 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2501 isa<ConstantSDNode>(Operand.getOperand(1)) && 2502 Operand.getConstantOperandVal(1) == 0 && 2503 Operand.getOperand(0).getValueType() == VT) 2504 return Operand.getOperand(0); 2505 break; 2506 case ISD::FNEG: 2507 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2508 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2509 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2510 Operand.getNode()->getOperand(0)); 2511 if (OpOpcode == ISD::FNEG) // --X -> X 2512 return Operand.getNode()->getOperand(0); 2513 break; 2514 case ISD::FABS: 2515 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2516 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2517 break; 2518 } 2519 2520 SDNode *N; 2521 SDVTList VTs = getVTList(VT); 2522 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2523 FoldingSetNodeID ID; 2524 SDValue Ops[1] = { Operand }; 2525 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2526 void *IP = 0; 2527 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2528 return SDValue(E, 0); 2529 2530 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2531 CSEMap.InsertNode(N, IP); 2532 } else { 2533 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2534 } 2535 2536 AllNodes.push_back(N); 2537#ifndef NDEBUG 2538 VerifyNode(N); 2539#endif 2540 return SDValue(N, 0); 2541} 2542 2543SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2544 EVT VT, 2545 ConstantSDNode *Cst1, 2546 ConstantSDNode *Cst2) { 2547 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2548 2549 switch (Opcode) { 2550 case ISD::ADD: return getConstant(C1 + C2, VT); 2551 case ISD::SUB: return getConstant(C1 - C2, VT); 2552 case ISD::MUL: return getConstant(C1 * C2, VT); 2553 case ISD::UDIV: 2554 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2555 break; 2556 case ISD::UREM: 2557 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2558 break; 2559 case ISD::SDIV: 2560 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2561 break; 2562 case ISD::SREM: 2563 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2564 break; 2565 case ISD::AND: return getConstant(C1 & C2, VT); 2566 case ISD::OR: return getConstant(C1 | C2, VT); 2567 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2568 case ISD::SHL: return getConstant(C1 << C2, VT); 2569 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2570 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2571 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2572 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2573 default: break; 2574 } 2575 2576 return SDValue(); 2577} 2578 2579SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2580 SDValue N1, SDValue N2) { 2581 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2582 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2583 switch (Opcode) { 2584 default: break; 2585 case ISD::TokenFactor: 2586 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2587 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2588 // Fold trivial token factors. 2589 if (N1.getOpcode() == ISD::EntryToken) return N2; 2590 if (N2.getOpcode() == ISD::EntryToken) return N1; 2591 if (N1 == N2) return N1; 2592 break; 2593 case ISD::CONCAT_VECTORS: 2594 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2595 // one big BUILD_VECTOR. 2596 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2597 N2.getOpcode() == ISD::BUILD_VECTOR) { 2598 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2599 N1.getNode()->op_end()); 2600 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2601 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2602 } 2603 break; 2604 case ISD::AND: 2605 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2606 assert(N1.getValueType() == N2.getValueType() && 2607 N1.getValueType() == VT && "Binary operator types must match!"); 2608 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2609 // worth handling here. 2610 if (N2C && N2C->isNullValue()) 2611 return N2; 2612 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2613 return N1; 2614 break; 2615 case ISD::OR: 2616 case ISD::XOR: 2617 case ISD::ADD: 2618 case ISD::SUB: 2619 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2620 assert(N1.getValueType() == N2.getValueType() && 2621 N1.getValueType() == VT && "Binary operator types must match!"); 2622 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2623 // it's worth handling here. 2624 if (N2C && N2C->isNullValue()) 2625 return N1; 2626 break; 2627 case ISD::UDIV: 2628 case ISD::UREM: 2629 case ISD::MULHU: 2630 case ISD::MULHS: 2631 case ISD::MUL: 2632 case ISD::SDIV: 2633 case ISD::SREM: 2634 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2635 assert(N1.getValueType() == N2.getValueType() && 2636 N1.getValueType() == VT && "Binary operator types must match!"); 2637 break; 2638 case ISD::FADD: 2639 case ISD::FSUB: 2640 case ISD::FMUL: 2641 case ISD::FDIV: 2642 case ISD::FREM: 2643 if (UnsafeFPMath) { 2644 if (Opcode == ISD::FADD) { 2645 // 0+x --> x 2646 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2647 if (CFP->getValueAPF().isZero()) 2648 return N2; 2649 // x+0 --> x 2650 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2651 if (CFP->getValueAPF().isZero()) 2652 return N1; 2653 } else if (Opcode == ISD::FSUB) { 2654 // x-0 --> x 2655 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2656 if (CFP->getValueAPF().isZero()) 2657 return N1; 2658 } 2659 } 2660 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2661 assert(N1.getValueType() == N2.getValueType() && 2662 N1.getValueType() == VT && "Binary operator types must match!"); 2663 break; 2664 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2665 assert(N1.getValueType() == VT && 2666 N1.getValueType().isFloatingPoint() && 2667 N2.getValueType().isFloatingPoint() && 2668 "Invalid FCOPYSIGN!"); 2669 break; 2670 case ISD::SHL: 2671 case ISD::SRA: 2672 case ISD::SRL: 2673 case ISD::ROTL: 2674 case ISD::ROTR: 2675 assert(VT == N1.getValueType() && 2676 "Shift operators return type must be the same as their first arg"); 2677 assert(VT.isInteger() && N2.getValueType().isInteger() && 2678 "Shifts only work on integers"); 2679 2680 // Always fold shifts of i1 values so the code generator doesn't need to 2681 // handle them. Since we know the size of the shift has to be less than the 2682 // size of the value, the shift/rotate count is guaranteed to be zero. 2683 if (VT == MVT::i1) 2684 return N1; 2685 if (N2C && N2C->isNullValue()) 2686 return N1; 2687 break; 2688 case ISD::FP_ROUND_INREG: { 2689 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2690 assert(VT == N1.getValueType() && "Not an inreg round!"); 2691 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2692 "Cannot FP_ROUND_INREG integer types"); 2693 assert(EVT.isVector() == VT.isVector() && 2694 "FP_ROUND_INREG type should be vector iff the operand " 2695 "type is vector!"); 2696 assert((!EVT.isVector() || 2697 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2698 "Vector element counts must match in FP_ROUND_INREG"); 2699 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2700 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2701 break; 2702 } 2703 case ISD::FP_ROUND: 2704 assert(VT.isFloatingPoint() && 2705 N1.getValueType().isFloatingPoint() && 2706 VT.bitsLE(N1.getValueType()) && 2707 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2708 if (N1.getValueType() == VT) return N1; // noop conversion. 2709 break; 2710 case ISD::AssertSext: 2711 case ISD::AssertZext: { 2712 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2713 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2714 assert(VT.isInteger() && EVT.isInteger() && 2715 "Cannot *_EXTEND_INREG FP types"); 2716 assert(!EVT.isVector() && 2717 "AssertSExt/AssertZExt type should be the vector element type " 2718 "rather than the vector type!"); 2719 assert(EVT.bitsLE(VT) && "Not extending!"); 2720 if (VT == EVT) return N1; // noop assertion. 2721 break; 2722 } 2723 case ISD::SIGN_EXTEND_INREG: { 2724 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2725 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2726 assert(VT.isInteger() && EVT.isInteger() && 2727 "Cannot *_EXTEND_INREG FP types"); 2728 assert(EVT.isVector() == VT.isVector() && 2729 "SIGN_EXTEND_INREG type should be vector iff the operand " 2730 "type is vector!"); 2731 assert((!EVT.isVector() || 2732 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2733 "Vector element counts must match in SIGN_EXTEND_INREG"); 2734 assert(EVT.bitsLE(VT) && "Not extending!"); 2735 if (EVT == VT) return N1; // Not actually extending 2736 2737 if (N1C) { 2738 APInt Val = N1C->getAPIntValue(); 2739 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2740 Val <<= Val.getBitWidth()-FromBits; 2741 Val = Val.ashr(Val.getBitWidth()-FromBits); 2742 return getConstant(Val, VT); 2743 } 2744 break; 2745 } 2746 case ISD::EXTRACT_VECTOR_ELT: 2747 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2748 if (N1.getOpcode() == ISD::UNDEF) 2749 return getUNDEF(VT); 2750 2751 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2752 // expanding copies of large vectors from registers. 2753 if (N2C && 2754 N1.getOpcode() == ISD::CONCAT_VECTORS && 2755 N1.getNumOperands() > 0) { 2756 unsigned Factor = 2757 N1.getOperand(0).getValueType().getVectorNumElements(); 2758 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2759 N1.getOperand(N2C->getZExtValue() / Factor), 2760 getConstant(N2C->getZExtValue() % Factor, 2761 N2.getValueType())); 2762 } 2763 2764 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2765 // expanding large vector constants. 2766 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2767 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2768 EVT VEltTy = N1.getValueType().getVectorElementType(); 2769 if (Elt.getValueType() != VEltTy) { 2770 // If the vector element type is not legal, the BUILD_VECTOR operands 2771 // are promoted and implicitly truncated. Make that explicit here. 2772 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2773 } 2774 if (VT != VEltTy) { 2775 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2776 // result is implicitly extended. 2777 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2778 } 2779 return Elt; 2780 } 2781 2782 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2783 // operations are lowered to scalars. 2784 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2785 // If the indices are the same, return the inserted element else 2786 // if the indices are known different, extract the element from 2787 // the original vector. 2788 SDValue N1Op2 = N1.getOperand(2); 2789 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2790 2791 if (N1Op2C && N2C) { 2792 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2793 if (VT == N1.getOperand(1).getValueType()) 2794 return N1.getOperand(1); 2795 else 2796 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2797 } 2798 2799 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2800 } 2801 } 2802 break; 2803 case ISD::EXTRACT_ELEMENT: 2804 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2805 assert(!N1.getValueType().isVector() && !VT.isVector() && 2806 (N1.getValueType().isInteger() == VT.isInteger()) && 2807 "Wrong types for EXTRACT_ELEMENT!"); 2808 2809 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2810 // 64-bit integers into 32-bit parts. Instead of building the extract of 2811 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2812 if (N1.getOpcode() == ISD::BUILD_PAIR) 2813 return N1.getOperand(N2C->getZExtValue()); 2814 2815 // EXTRACT_ELEMENT of a constant int is also very common. 2816 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2817 unsigned ElementSize = VT.getSizeInBits(); 2818 unsigned Shift = ElementSize * N2C->getZExtValue(); 2819 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2820 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2821 } 2822 break; 2823 case ISD::EXTRACT_SUBVECTOR: 2824 if (N1.getValueType() == VT) // Trivial extraction. 2825 return N1; 2826 break; 2827 } 2828 2829 if (N1C) { 2830 if (N2C) { 2831 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2832 if (SV.getNode()) return SV; 2833 } else { // Cannonicalize constant to RHS if commutative 2834 if (isCommutativeBinOp(Opcode)) { 2835 std::swap(N1C, N2C); 2836 std::swap(N1, N2); 2837 } 2838 } 2839 } 2840 2841 // Constant fold FP operations. 2842 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2843 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2844 if (N1CFP) { 2845 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2846 // Cannonicalize constant to RHS if commutative 2847 std::swap(N1CFP, N2CFP); 2848 std::swap(N1, N2); 2849 } else if (N2CFP && VT != MVT::ppcf128) { 2850 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2851 APFloat::opStatus s; 2852 switch (Opcode) { 2853 case ISD::FADD: 2854 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2855 if (s != APFloat::opInvalidOp) 2856 return getConstantFP(V1, VT); 2857 break; 2858 case ISD::FSUB: 2859 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2860 if (s!=APFloat::opInvalidOp) 2861 return getConstantFP(V1, VT); 2862 break; 2863 case ISD::FMUL: 2864 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2865 if (s!=APFloat::opInvalidOp) 2866 return getConstantFP(V1, VT); 2867 break; 2868 case ISD::FDIV: 2869 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2870 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2871 return getConstantFP(V1, VT); 2872 break; 2873 case ISD::FREM : 2874 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2875 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2876 return getConstantFP(V1, VT); 2877 break; 2878 case ISD::FCOPYSIGN: 2879 V1.copySign(V2); 2880 return getConstantFP(V1, VT); 2881 default: break; 2882 } 2883 } 2884 } 2885 2886 // Canonicalize an UNDEF to the RHS, even over a constant. 2887 if (N1.getOpcode() == ISD::UNDEF) { 2888 if (isCommutativeBinOp(Opcode)) { 2889 std::swap(N1, N2); 2890 } else { 2891 switch (Opcode) { 2892 case ISD::FP_ROUND_INREG: 2893 case ISD::SIGN_EXTEND_INREG: 2894 case ISD::SUB: 2895 case ISD::FSUB: 2896 case ISD::FDIV: 2897 case ISD::FREM: 2898 case ISD::SRA: 2899 return N1; // fold op(undef, arg2) -> undef 2900 case ISD::UDIV: 2901 case ISD::SDIV: 2902 case ISD::UREM: 2903 case ISD::SREM: 2904 case ISD::SRL: 2905 case ISD::SHL: 2906 if (!VT.isVector()) 2907 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2908 // For vectors, we can't easily build an all zero vector, just return 2909 // the LHS. 2910 return N2; 2911 } 2912 } 2913 } 2914 2915 // Fold a bunch of operators when the RHS is undef. 2916 if (N2.getOpcode() == ISD::UNDEF) { 2917 switch (Opcode) { 2918 case ISD::XOR: 2919 if (N1.getOpcode() == ISD::UNDEF) 2920 // Handle undef ^ undef -> 0 special case. This is a common 2921 // idiom (misuse). 2922 return getConstant(0, VT); 2923 // fallthrough 2924 case ISD::ADD: 2925 case ISD::ADDC: 2926 case ISD::ADDE: 2927 case ISD::SUB: 2928 case ISD::UDIV: 2929 case ISD::SDIV: 2930 case ISD::UREM: 2931 case ISD::SREM: 2932 return N2; // fold op(arg1, undef) -> undef 2933 case ISD::FADD: 2934 case ISD::FSUB: 2935 case ISD::FMUL: 2936 case ISD::FDIV: 2937 case ISD::FREM: 2938 if (UnsafeFPMath) 2939 return N2; 2940 break; 2941 case ISD::MUL: 2942 case ISD::AND: 2943 case ISD::SRL: 2944 case ISD::SHL: 2945 if (!VT.isVector()) 2946 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2947 // For vectors, we can't easily build an all zero vector, just return 2948 // the LHS. 2949 return N1; 2950 case ISD::OR: 2951 if (!VT.isVector()) 2952 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2953 // For vectors, we can't easily build an all one vector, just return 2954 // the LHS. 2955 return N1; 2956 case ISD::SRA: 2957 return N1; 2958 } 2959 } 2960 2961 // Memoize this node if possible. 2962 SDNode *N; 2963 SDVTList VTs = getVTList(VT); 2964 if (VT != MVT::Flag) { 2965 SDValue Ops[] = { N1, N2 }; 2966 FoldingSetNodeID ID; 2967 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2968 void *IP = 0; 2969 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2970 return SDValue(E, 0); 2971 2972 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2973 CSEMap.InsertNode(N, IP); 2974 } else { 2975 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2976 } 2977 2978 AllNodes.push_back(N); 2979#ifndef NDEBUG 2980 VerifyNode(N); 2981#endif 2982 return SDValue(N, 0); 2983} 2984 2985SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2986 SDValue N1, SDValue N2, SDValue N3) { 2987 // Perform various simplifications. 2988 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2989 switch (Opcode) { 2990 case ISD::CONCAT_VECTORS: 2991 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2992 // one big BUILD_VECTOR. 2993 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2994 N2.getOpcode() == ISD::BUILD_VECTOR && 2995 N3.getOpcode() == ISD::BUILD_VECTOR) { 2996 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2997 N1.getNode()->op_end()); 2998 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2999 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3000 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3001 } 3002 break; 3003 case ISD::SETCC: { 3004 // Use FoldSetCC to simplify SETCC's. 3005 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3006 if (Simp.getNode()) return Simp; 3007 break; 3008 } 3009 case ISD::SELECT: 3010 if (N1C) { 3011 if (N1C->getZExtValue()) 3012 return N2; // select true, X, Y -> X 3013 else 3014 return N3; // select false, X, Y -> Y 3015 } 3016 3017 if (N2 == N3) return N2; // select C, X, X -> X 3018 break; 3019 case ISD::VECTOR_SHUFFLE: 3020 llvm_unreachable("should use getVectorShuffle constructor!"); 3021 break; 3022 case ISD::BIT_CONVERT: 3023 // Fold bit_convert nodes from a type to themselves. 3024 if (N1.getValueType() == VT) 3025 return N1; 3026 break; 3027 } 3028 3029 // Memoize node if it doesn't produce a flag. 3030 SDNode *N; 3031 SDVTList VTs = getVTList(VT); 3032 if (VT != MVT::Flag) { 3033 SDValue Ops[] = { N1, N2, N3 }; 3034 FoldingSetNodeID ID; 3035 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3036 void *IP = 0; 3037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3038 return SDValue(E, 0); 3039 3040 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3041 CSEMap.InsertNode(N, IP); 3042 } else { 3043 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3044 } 3045 3046 AllNodes.push_back(N); 3047#ifndef NDEBUG 3048 VerifyNode(N); 3049#endif 3050 return SDValue(N, 0); 3051} 3052 3053SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3054 SDValue N1, SDValue N2, SDValue N3, 3055 SDValue N4) { 3056 SDValue Ops[] = { N1, N2, N3, N4 }; 3057 return getNode(Opcode, DL, VT, Ops, 4); 3058} 3059 3060SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3061 SDValue N1, SDValue N2, SDValue N3, 3062 SDValue N4, SDValue N5) { 3063 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3064 return getNode(Opcode, DL, VT, Ops, 5); 3065} 3066 3067/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3068/// the incoming stack arguments to be loaded from the stack. 3069SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3070 SmallVector<SDValue, 8> ArgChains; 3071 3072 // Include the original chain at the beginning of the list. When this is 3073 // used by target LowerCall hooks, this helps legalize find the 3074 // CALLSEQ_BEGIN node. 3075 ArgChains.push_back(Chain); 3076 3077 // Add a chain value for each stack argument. 3078 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3079 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3080 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3081 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3082 if (FI->getIndex() < 0) 3083 ArgChains.push_back(SDValue(L, 1)); 3084 3085 // Build a tokenfactor for all the chains. 3086 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3087 &ArgChains[0], ArgChains.size()); 3088} 3089 3090/// getMemsetValue - Vectorized representation of the memset value 3091/// operand. 3092static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3093 DebugLoc dl) { 3094 assert(Value.getOpcode() != ISD::UNDEF); 3095 3096 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3097 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3098 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3099 unsigned Shift = 8; 3100 for (unsigned i = NumBits; i > 8; i >>= 1) { 3101 Val = (Val << Shift) | Val; 3102 Shift <<= 1; 3103 } 3104 if (VT.isInteger()) 3105 return DAG.getConstant(Val, VT); 3106 return DAG.getConstantFP(APFloat(Val), VT); 3107 } 3108 3109 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3110 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3111 unsigned Shift = 8; 3112 for (unsigned i = NumBits; i > 8; i >>= 1) { 3113 Value = DAG.getNode(ISD::OR, dl, VT, 3114 DAG.getNode(ISD::SHL, dl, VT, Value, 3115 DAG.getConstant(Shift, 3116 TLI.getShiftAmountTy())), 3117 Value); 3118 Shift <<= 1; 3119 } 3120 3121 return Value; 3122} 3123 3124/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3125/// used when a memcpy is turned into a memset when the source is a constant 3126/// string ptr. 3127static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3128 const TargetLowering &TLI, 3129 std::string &Str, unsigned Offset) { 3130 // Handle vector with all elements zero. 3131 if (Str.empty()) { 3132 if (VT.isInteger()) 3133 return DAG.getConstant(0, VT); 3134 else if (VT == MVT::f32 || VT == MVT::f64) 3135 return DAG.getConstantFP(0.0, VT); 3136 else if (VT.isVector()) { 3137 unsigned NumElts = VT.getVectorNumElements(); 3138 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3139 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3140 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3141 EltVT, NumElts))); 3142 } else 3143 llvm_unreachable("Expected type!"); 3144 } 3145 3146 assert(!VT.isVector() && "Can't handle vector type here!"); 3147 unsigned NumBits = VT.getSizeInBits(); 3148 unsigned MSB = NumBits / 8; 3149 uint64_t Val = 0; 3150 if (TLI.isLittleEndian()) 3151 Offset = Offset + MSB - 1; 3152 for (unsigned i = 0; i != MSB; ++i) { 3153 Val = (Val << 8) | (unsigned char)Str[Offset]; 3154 Offset += TLI.isLittleEndian() ? -1 : 1; 3155 } 3156 return DAG.getConstant(Val, VT); 3157} 3158 3159/// getMemBasePlusOffset - Returns base and offset node for the 3160/// 3161static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3162 SelectionDAG &DAG) { 3163 EVT VT = Base.getValueType(); 3164 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3165 VT, Base, DAG.getConstant(Offset, VT)); 3166} 3167 3168/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3169/// 3170static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3171 unsigned SrcDelta = 0; 3172 GlobalAddressSDNode *G = NULL; 3173 if (Src.getOpcode() == ISD::GlobalAddress) 3174 G = cast<GlobalAddressSDNode>(Src); 3175 else if (Src.getOpcode() == ISD::ADD && 3176 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3177 Src.getOperand(1).getOpcode() == ISD::Constant) { 3178 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3179 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3180 } 3181 if (!G) 3182 return false; 3183 3184 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3185 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3186 return true; 3187 3188 return false; 3189} 3190 3191/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3192/// to replace the memset / memcpy. Return true if the number of memory ops 3193/// is below the threshold. It returns the types of the sequence of 3194/// memory ops to perform memset / memcpy by reference. 3195static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3196 unsigned Limit, uint64_t Size, 3197 unsigned DstAlign, unsigned SrcAlign, 3198 bool NonScalarIntSafe, 3199 bool MemcpyStrSrc, 3200 SelectionDAG &DAG, 3201 const TargetLowering &TLI) { 3202 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3203 "Expecting memcpy / memset source to meet alignment requirement!"); 3204 // If 'SrcAlign' is zero, that means the memory operation does not need load 3205 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3206 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3207 // specified alignment of the memory operation. If it is zero, that means 3208 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3209 // indicates whether the memcpy source is constant so it does not need to be 3210 // loaded. 3211 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3212 NonScalarIntSafe, MemcpyStrSrc, 3213 DAG.getMachineFunction()); 3214 3215 if (VT == MVT::Other) { 3216 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3217 TLI.allowsUnalignedMemoryAccesses(VT)) { 3218 VT = TLI.getPointerTy(); 3219 } else { 3220 switch (DstAlign & 7) { 3221 case 0: VT = MVT::i64; break; 3222 case 4: VT = MVT::i32; break; 3223 case 2: VT = MVT::i16; break; 3224 default: VT = MVT::i8; break; 3225 } 3226 } 3227 3228 MVT LVT = MVT::i64; 3229 while (!TLI.isTypeLegal(LVT)) 3230 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3231 assert(LVT.isInteger()); 3232 3233 if (VT.bitsGT(LVT)) 3234 VT = LVT; 3235 } 3236 3237 // If we're optimizing for size, and there is a limit, bump the maximum number 3238 // of operations inserted down to 4. This is a wild guess that approximates 3239 // the size of a call to memcpy or memset (3 arguments + call). 3240 if (Limit != ~0U) { 3241 const Function *F = DAG.getMachineFunction().getFunction(); 3242 if (F->hasFnAttr(Attribute::OptimizeForSize)) 3243 Limit = 4; 3244 } 3245 3246 unsigned NumMemOps = 0; 3247 while (Size != 0) { 3248 unsigned VTSize = VT.getSizeInBits() / 8; 3249 while (VTSize > Size) { 3250 // For now, only use non-vector load / store's for the left-over pieces. 3251 if (VT.isVector() || VT.isFloatingPoint()) { 3252 VT = MVT::i64; 3253 while (!TLI.isTypeLegal(VT)) 3254 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3255 VTSize = VT.getSizeInBits() / 8; 3256 } else { 3257 // This can result in a type that is not legal on the target, e.g. 3258 // 1 or 2 bytes on PPC. 3259 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3260 VTSize >>= 1; 3261 } 3262 } 3263 3264 if (++NumMemOps > Limit) 3265 return false; 3266 MemOps.push_back(VT); 3267 Size -= VTSize; 3268 } 3269 3270 return true; 3271} 3272 3273static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3274 SDValue Chain, SDValue Dst, 3275 SDValue Src, uint64_t Size, 3276 unsigned Align, bool isVol, 3277 bool AlwaysInline, 3278 MachinePointerInfo DstPtrInfo, 3279 MachinePointerInfo SrcPtrInfo) { 3280 // Turn a memcpy of undef to nop. 3281 if (Src.getOpcode() == ISD::UNDEF) 3282 return Chain; 3283 3284 // Expand memcpy to a series of load and store ops if the size operand falls 3285 // below a certain threshold. 3286 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3287 std::vector<EVT> MemOps; 3288 bool DstAlignCanChange = false; 3289 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3290 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3291 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3292 DstAlignCanChange = true; 3293 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3294 if (Align > SrcAlign) 3295 SrcAlign = Align; 3296 std::string Str; 3297 bool CopyFromStr = isMemSrcFromString(Src, Str); 3298 bool isZeroStr = CopyFromStr && Str.empty(); 3299 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(); 3300 3301 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3302 (DstAlignCanChange ? 0 : Align), 3303 (isZeroStr ? 0 : SrcAlign), 3304 true, CopyFromStr, DAG, TLI)) 3305 return SDValue(); 3306 3307 if (DstAlignCanChange) { 3308 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3309 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3310 if (NewAlign > Align) { 3311 // Give the stack frame object a larger alignment if needed. 3312 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3313 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3314 Align = NewAlign; 3315 } 3316 } 3317 3318 SmallVector<SDValue, 8> OutChains; 3319 unsigned NumMemOps = MemOps.size(); 3320 uint64_t SrcOff = 0, DstOff = 0; 3321 for (unsigned i = 0; i != NumMemOps; ++i) { 3322 EVT VT = MemOps[i]; 3323 unsigned VTSize = VT.getSizeInBits() / 8; 3324 SDValue Value, Store; 3325 3326 if (CopyFromStr && 3327 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3328 // It's unlikely a store of a vector immediate can be done in a single 3329 // instruction. It would require a load from a constantpool first. 3330 // We only handle zero vectors here. 3331 // FIXME: Handle other cases where store of vector immediate is done in 3332 // a single instruction. 3333 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3334 Store = DAG.getStore(Chain, dl, Value, 3335 getMemBasePlusOffset(Dst, DstOff, DAG), 3336 DstPtrInfo.getWithOffset(DstOff), isVol, 3337 false, Align); 3338 } else { 3339 // The type might not be legal for the target. This should only happen 3340 // if the type is smaller than a legal type, as on PPC, so the right 3341 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3342 // to Load/Store if NVT==VT. 3343 // FIXME does the case above also need this? 3344 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3345 assert(NVT.bitsGE(VT)); 3346 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain, 3347 getMemBasePlusOffset(Src, SrcOff, DAG), 3348 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3349 MinAlign(SrcAlign, SrcOff)); 3350 Store = DAG.getTruncStore(Chain, dl, Value, 3351 getMemBasePlusOffset(Dst, DstOff, DAG), 3352 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3353 false, Align); 3354 } 3355 OutChains.push_back(Store); 3356 SrcOff += VTSize; 3357 DstOff += VTSize; 3358 } 3359 3360 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3361 &OutChains[0], OutChains.size()); 3362} 3363 3364static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3365 SDValue Chain, SDValue Dst, 3366 SDValue Src, uint64_t Size, 3367 unsigned Align, bool isVol, 3368 bool AlwaysInline, 3369 MachinePointerInfo DstPtrInfo, 3370 MachinePointerInfo SrcPtrInfo) { 3371 // Turn a memmove of undef to nop. 3372 if (Src.getOpcode() == ISD::UNDEF) 3373 return Chain; 3374 3375 // Expand memmove to a series of load and store ops if the size operand falls 3376 // below a certain threshold. 3377 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3378 std::vector<EVT> MemOps; 3379 bool DstAlignCanChange = false; 3380 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3381 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3382 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3383 DstAlignCanChange = true; 3384 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3385 if (Align > SrcAlign) 3386 SrcAlign = Align; 3387 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(); 3388 3389 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3390 (DstAlignCanChange ? 0 : Align), 3391 SrcAlign, true, false, DAG, TLI)) 3392 return SDValue(); 3393 3394 if (DstAlignCanChange) { 3395 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3396 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3397 if (NewAlign > Align) { 3398 // Give the stack frame object a larger alignment if needed. 3399 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3400 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3401 Align = NewAlign; 3402 } 3403 } 3404 3405 uint64_t SrcOff = 0, DstOff = 0; 3406 SmallVector<SDValue, 8> LoadValues; 3407 SmallVector<SDValue, 8> LoadChains; 3408 SmallVector<SDValue, 8> OutChains; 3409 unsigned NumMemOps = MemOps.size(); 3410 for (unsigned i = 0; i < NumMemOps; i++) { 3411 EVT VT = MemOps[i]; 3412 unsigned VTSize = VT.getSizeInBits() / 8; 3413 SDValue Value, Store; 3414 3415 Value = DAG.getLoad(VT, dl, Chain, 3416 getMemBasePlusOffset(Src, SrcOff, DAG), 3417 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3418 false, SrcAlign); 3419 LoadValues.push_back(Value); 3420 LoadChains.push_back(Value.getValue(1)); 3421 SrcOff += VTSize; 3422 } 3423 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3424 &LoadChains[0], LoadChains.size()); 3425 OutChains.clear(); 3426 for (unsigned i = 0; i < NumMemOps; i++) { 3427 EVT VT = MemOps[i]; 3428 unsigned VTSize = VT.getSizeInBits() / 8; 3429 SDValue Value, Store; 3430 3431 Store = DAG.getStore(Chain, dl, LoadValues[i], 3432 getMemBasePlusOffset(Dst, DstOff, DAG), 3433 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3434 OutChains.push_back(Store); 3435 DstOff += VTSize; 3436 } 3437 3438 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3439 &OutChains[0], OutChains.size()); 3440} 3441 3442static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3443 SDValue Chain, SDValue Dst, 3444 SDValue Src, uint64_t Size, 3445 unsigned Align, bool isVol, 3446 MachinePointerInfo DstPtrInfo) { 3447 // Turn a memset of undef to nop. 3448 if (Src.getOpcode() == ISD::UNDEF) 3449 return Chain; 3450 3451 // Expand memset to a series of load/store ops if the size operand 3452 // falls below a certain threshold. 3453 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3454 std::vector<EVT> MemOps; 3455 bool DstAlignCanChange = false; 3456 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3457 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3458 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3459 DstAlignCanChange = true; 3460 bool NonScalarIntSafe = 3461 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3462 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3463 Size, (DstAlignCanChange ? 0 : Align), 0, 3464 NonScalarIntSafe, false, DAG, TLI)) 3465 return SDValue(); 3466 3467 if (DstAlignCanChange) { 3468 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3469 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3470 if (NewAlign > Align) { 3471 // Give the stack frame object a larger alignment if needed. 3472 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3473 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3474 Align = NewAlign; 3475 } 3476 } 3477 3478 SmallVector<SDValue, 8> OutChains; 3479 uint64_t DstOff = 0; 3480 unsigned NumMemOps = MemOps.size(); 3481 for (unsigned i = 0; i < NumMemOps; i++) { 3482 EVT VT = MemOps[i]; 3483 unsigned VTSize = VT.getSizeInBits() / 8; 3484 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3485 SDValue Store = DAG.getStore(Chain, dl, Value, 3486 getMemBasePlusOffset(Dst, DstOff, DAG), 3487 DstPtrInfo.getWithOffset(DstOff), 3488 isVol, false, 0); 3489 OutChains.push_back(Store); 3490 DstOff += VTSize; 3491 } 3492 3493 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3494 &OutChains[0], OutChains.size()); 3495} 3496 3497SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3498 SDValue Src, SDValue Size, 3499 unsigned Align, bool isVol, bool AlwaysInline, 3500 MachinePointerInfo DstPtrInfo, 3501 MachinePointerInfo SrcPtrInfo) { 3502 3503 // Check to see if we should lower the memcpy to loads and stores first. 3504 // For cases within the target-specified limits, this is the best choice. 3505 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3506 if (ConstantSize) { 3507 // Memcpy with size zero? Just return the original chain. 3508 if (ConstantSize->isNullValue()) 3509 return Chain; 3510 3511 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3512 ConstantSize->getZExtValue(),Align, 3513 isVol, false, DstPtrInfo, SrcPtrInfo); 3514 if (Result.getNode()) 3515 return Result; 3516 } 3517 3518 // Then check to see if we should lower the memcpy with target-specific 3519 // code. If the target chooses to do this, this is the next best. 3520 SDValue Result = 3521 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3522 isVol, AlwaysInline, 3523 DstPtrInfo, SrcPtrInfo); 3524 if (Result.getNode()) 3525 return Result; 3526 3527 // If we really need inline code and the target declined to provide it, 3528 // use a (potentially long) sequence of loads and stores. 3529 if (AlwaysInline) { 3530 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3531 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3532 ConstantSize->getZExtValue(), Align, isVol, 3533 true, DstPtrInfo, SrcPtrInfo); 3534 } 3535 3536 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3537 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3538 // respect volatile, so they may do things like read or write memory 3539 // beyond the given memory regions. But fixing this isn't easy, and most 3540 // people don't care. 3541 3542 // Emit a library call. 3543 TargetLowering::ArgListTy Args; 3544 TargetLowering::ArgListEntry Entry; 3545 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3546 Entry.Node = Dst; Args.push_back(Entry); 3547 Entry.Node = Src; Args.push_back(Entry); 3548 Entry.Node = Size; Args.push_back(Entry); 3549 // FIXME: pass in DebugLoc 3550 std::pair<SDValue,SDValue> CallResult = 3551 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3552 false, false, false, false, 0, 3553 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3554 /*isReturnValueUsed=*/false, 3555 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3556 TLI.getPointerTy()), 3557 Args, *this, dl); 3558 return CallResult.second; 3559} 3560 3561SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3562 SDValue Src, SDValue Size, 3563 unsigned Align, bool isVol, 3564 MachinePointerInfo DstPtrInfo, 3565 MachinePointerInfo SrcPtrInfo) { 3566 3567 // Check to see if we should lower the memmove to loads and stores first. 3568 // For cases within the target-specified limits, this is the best choice. 3569 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3570 if (ConstantSize) { 3571 // Memmove with size zero? Just return the original chain. 3572 if (ConstantSize->isNullValue()) 3573 return Chain; 3574 3575 SDValue Result = 3576 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3577 ConstantSize->getZExtValue(), Align, isVol, 3578 false, DstPtrInfo, SrcPtrInfo); 3579 if (Result.getNode()) 3580 return Result; 3581 } 3582 3583 // Then check to see if we should lower the memmove with target-specific 3584 // code. If the target chooses to do this, this is the next best. 3585 SDValue Result = 3586 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3587 DstPtrInfo, SrcPtrInfo); 3588 if (Result.getNode()) 3589 return Result; 3590 3591 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3592 // not be safe. See memcpy above for more details. 3593 3594 // Emit a library call. 3595 TargetLowering::ArgListTy Args; 3596 TargetLowering::ArgListEntry Entry; 3597 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3598 Entry.Node = Dst; Args.push_back(Entry); 3599 Entry.Node = Src; Args.push_back(Entry); 3600 Entry.Node = Size; Args.push_back(Entry); 3601 // FIXME: pass in DebugLoc 3602 std::pair<SDValue,SDValue> CallResult = 3603 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3604 false, false, false, false, 0, 3605 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3606 /*isReturnValueUsed=*/false, 3607 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3608 TLI.getPointerTy()), 3609 Args, *this, dl); 3610 return CallResult.second; 3611} 3612 3613SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3614 SDValue Src, SDValue Size, 3615 unsigned Align, bool isVol, 3616 MachinePointerInfo DstPtrInfo) { 3617 3618 // Check to see if we should lower the memset to stores first. 3619 // For cases within the target-specified limits, this is the best choice. 3620 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3621 if (ConstantSize) { 3622 // Memset with size zero? Just return the original chain. 3623 if (ConstantSize->isNullValue()) 3624 return Chain; 3625 3626 SDValue Result = 3627 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3628 Align, isVol, DstPtrInfo); 3629 3630 if (Result.getNode()) 3631 return Result; 3632 } 3633 3634 // Then check to see if we should lower the memset with target-specific 3635 // code. If the target chooses to do this, this is the next best. 3636 SDValue Result = 3637 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3638 DstPtrInfo); 3639 if (Result.getNode()) 3640 return Result; 3641 3642 // Emit a library call. 3643 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3644 TargetLowering::ArgListTy Args; 3645 TargetLowering::ArgListEntry Entry; 3646 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3647 Args.push_back(Entry); 3648 // Extend or truncate the argument to be an i32 value for the call. 3649 if (Src.getValueType().bitsGT(MVT::i32)) 3650 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3651 else 3652 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3653 Entry.Node = Src; 3654 Entry.Ty = Type::getInt32Ty(*getContext()); 3655 Entry.isSExt = true; 3656 Args.push_back(Entry); 3657 Entry.Node = Size; 3658 Entry.Ty = IntPtrTy; 3659 Entry.isSExt = false; 3660 Args.push_back(Entry); 3661 // FIXME: pass in DebugLoc 3662 std::pair<SDValue,SDValue> CallResult = 3663 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3664 false, false, false, false, 0, 3665 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3666 /*isReturnValueUsed=*/false, 3667 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3668 TLI.getPointerTy()), 3669 Args, *this, dl); 3670 return CallResult.second; 3671} 3672 3673SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3674 SDValue Chain, SDValue Ptr, SDValue Cmp, 3675 SDValue Swp, MachinePointerInfo PtrInfo, 3676 unsigned Alignment) { 3677 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3678 Alignment = getEVTAlignment(MemVT); 3679 3680 MachineFunction &MF = getMachineFunction(); 3681 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3682 3683 // For now, atomics are considered to be volatile always. 3684 Flags |= MachineMemOperand::MOVolatile; 3685 3686 MachineMemOperand *MMO = 3687 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3688 3689 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3690} 3691 3692SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3693 SDValue Chain, 3694 SDValue Ptr, SDValue Cmp, 3695 SDValue Swp, MachineMemOperand *MMO) { 3696 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3697 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3698 3699 EVT VT = Cmp.getValueType(); 3700 3701 SDVTList VTs = getVTList(VT, MVT::Other); 3702 FoldingSetNodeID ID; 3703 ID.AddInteger(MemVT.getRawBits()); 3704 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3705 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3706 void* IP = 0; 3707 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3708 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3709 return SDValue(E, 0); 3710 } 3711 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3712 Ptr, Cmp, Swp, MMO); 3713 CSEMap.InsertNode(N, IP); 3714 AllNodes.push_back(N); 3715 return SDValue(N, 0); 3716} 3717 3718SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3719 SDValue Chain, 3720 SDValue Ptr, SDValue Val, 3721 const Value* PtrVal, 3722 unsigned Alignment) { 3723 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3724 Alignment = getEVTAlignment(MemVT); 3725 3726 MachineFunction &MF = getMachineFunction(); 3727 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3728 3729 // For now, atomics are considered to be volatile always. 3730 Flags |= MachineMemOperand::MOVolatile; 3731 3732 MachineMemOperand *MMO = 3733 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3734 MemVT.getStoreSize(), Alignment); 3735 3736 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3737} 3738 3739SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3740 SDValue Chain, 3741 SDValue Ptr, SDValue Val, 3742 MachineMemOperand *MMO) { 3743 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3744 Opcode == ISD::ATOMIC_LOAD_SUB || 3745 Opcode == ISD::ATOMIC_LOAD_AND || 3746 Opcode == ISD::ATOMIC_LOAD_OR || 3747 Opcode == ISD::ATOMIC_LOAD_XOR || 3748 Opcode == ISD::ATOMIC_LOAD_NAND || 3749 Opcode == ISD::ATOMIC_LOAD_MIN || 3750 Opcode == ISD::ATOMIC_LOAD_MAX || 3751 Opcode == ISD::ATOMIC_LOAD_UMIN || 3752 Opcode == ISD::ATOMIC_LOAD_UMAX || 3753 Opcode == ISD::ATOMIC_SWAP) && 3754 "Invalid Atomic Op"); 3755 3756 EVT VT = Val.getValueType(); 3757 3758 SDVTList VTs = getVTList(VT, MVT::Other); 3759 FoldingSetNodeID ID; 3760 ID.AddInteger(MemVT.getRawBits()); 3761 SDValue Ops[] = {Chain, Ptr, Val}; 3762 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3763 void* IP = 0; 3764 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3765 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3766 return SDValue(E, 0); 3767 } 3768 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3769 Ptr, Val, MMO); 3770 CSEMap.InsertNode(N, IP); 3771 AllNodes.push_back(N); 3772 return SDValue(N, 0); 3773} 3774 3775/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3776/// Allowed to return something different (and simpler) if Simplify is true. 3777SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3778 DebugLoc dl) { 3779 if (NumOps == 1) 3780 return Ops[0]; 3781 3782 SmallVector<EVT, 4> VTs; 3783 VTs.reserve(NumOps); 3784 for (unsigned i = 0; i < NumOps; ++i) 3785 VTs.push_back(Ops[i].getValueType()); 3786 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3787 Ops, NumOps); 3788} 3789 3790SDValue 3791SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3792 const EVT *VTs, unsigned NumVTs, 3793 const SDValue *Ops, unsigned NumOps, 3794 EVT MemVT, MachinePointerInfo PtrInfo, 3795 unsigned Align, bool Vol, 3796 bool ReadMem, bool WriteMem) { 3797 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3798 MemVT, PtrInfo, Align, Vol, 3799 ReadMem, WriteMem); 3800} 3801 3802SDValue 3803SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3804 const SDValue *Ops, unsigned NumOps, 3805 EVT MemVT, MachinePointerInfo PtrInfo, 3806 unsigned Align, bool Vol, 3807 bool ReadMem, bool WriteMem) { 3808 if (Align == 0) // Ensure that codegen never sees alignment 0 3809 Align = getEVTAlignment(MemVT); 3810 3811 MachineFunction &MF = getMachineFunction(); 3812 unsigned Flags = 0; 3813 if (WriteMem) 3814 Flags |= MachineMemOperand::MOStore; 3815 if (ReadMem) 3816 Flags |= MachineMemOperand::MOLoad; 3817 if (Vol) 3818 Flags |= MachineMemOperand::MOVolatile; 3819 MachineMemOperand *MMO = 3820 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 3821 3822 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3823} 3824 3825SDValue 3826SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3827 const SDValue *Ops, unsigned NumOps, 3828 EVT MemVT, MachineMemOperand *MMO) { 3829 assert((Opcode == ISD::INTRINSIC_VOID || 3830 Opcode == ISD::INTRINSIC_W_CHAIN || 3831 Opcode == ISD::PREFETCH || 3832 (Opcode <= INT_MAX && 3833 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3834 "Opcode is not a memory-accessing opcode!"); 3835 3836 // Memoize the node unless it returns a flag. 3837 MemIntrinsicSDNode *N; 3838 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3839 FoldingSetNodeID ID; 3840 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3841 void *IP = 0; 3842 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3843 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3844 return SDValue(E, 0); 3845 } 3846 3847 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3848 MemVT, MMO); 3849 CSEMap.InsertNode(N, IP); 3850 } else { 3851 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3852 MemVT, MMO); 3853 } 3854 AllNodes.push_back(N); 3855 return SDValue(N, 0); 3856} 3857 3858/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 3859/// MachinePointerInfo record from it. This is particularly useful because the 3860/// code generator has many cases where it doesn't bother passing in a 3861/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 3862static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 3863 // If this is FI+Offset, we can model it. 3864 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 3865 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 3866 3867 // If this is (FI+Offset1)+Offset2, we can model it. 3868 if (Ptr.getOpcode() != ISD::ADD || 3869 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 3870 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 3871 return MachinePointerInfo(); 3872 3873 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 3874 return MachinePointerInfo::getFixedStack(FI, Offset+ 3875 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 3876} 3877 3878/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 3879/// MachinePointerInfo record from it. This is particularly useful because the 3880/// code generator has many cases where it doesn't bother passing in a 3881/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 3882static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 3883 // If the 'Offset' value isn't a constant, we can't handle this. 3884 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 3885 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 3886 if (OffsetOp.getOpcode() == ISD::UNDEF) 3887 return InferPointerInfo(Ptr); 3888 return MachinePointerInfo(); 3889} 3890 3891 3892SDValue 3893SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3894 EVT VT, DebugLoc dl, SDValue Chain, 3895 SDValue Ptr, SDValue Offset, 3896 MachinePointerInfo PtrInfo, EVT MemVT, 3897 bool isVolatile, bool isNonTemporal, 3898 unsigned Alignment, const MDNode *TBAAInfo) { 3899 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3900 Alignment = getEVTAlignment(VT); 3901 3902 unsigned Flags = MachineMemOperand::MOLoad; 3903 if (isVolatile) 3904 Flags |= MachineMemOperand::MOVolatile; 3905 if (isNonTemporal) 3906 Flags |= MachineMemOperand::MONonTemporal; 3907 3908 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 3909 // clients. 3910 if (PtrInfo.V == 0) 3911 PtrInfo = InferPointerInfo(Ptr, Offset); 3912 3913 MachineFunction &MF = getMachineFunction(); 3914 MachineMemOperand *MMO = 3915 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 3916 TBAAInfo); 3917 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 3918} 3919 3920SDValue 3921SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3922 EVT VT, DebugLoc dl, SDValue Chain, 3923 SDValue Ptr, SDValue Offset, EVT MemVT, 3924 MachineMemOperand *MMO) { 3925 if (VT == MemVT) { 3926 ExtType = ISD::NON_EXTLOAD; 3927 } else if (ExtType == ISD::NON_EXTLOAD) { 3928 assert(VT == MemVT && "Non-extending load from different memory type!"); 3929 } else { 3930 // Extending load. 3931 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3932 "Should only be an extending load, not truncating!"); 3933 assert(VT.isInteger() == MemVT.isInteger() && 3934 "Cannot convert from FP to Int or Int -> FP!"); 3935 assert(VT.isVector() == MemVT.isVector() && 3936 "Cannot use trunc store to convert to or from a vector!"); 3937 assert((!VT.isVector() || 3938 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3939 "Cannot use trunc store to change the number of vector elements!"); 3940 } 3941 3942 bool Indexed = AM != ISD::UNINDEXED; 3943 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3944 "Unindexed load with an offset!"); 3945 3946 SDVTList VTs = Indexed ? 3947 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3948 SDValue Ops[] = { Chain, Ptr, Offset }; 3949 FoldingSetNodeID ID; 3950 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3951 ID.AddInteger(MemVT.getRawBits()); 3952 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3953 MMO->isNonTemporal())); 3954 void *IP = 0; 3955 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3956 cast<LoadSDNode>(E)->refineAlignment(MMO); 3957 return SDValue(E, 0); 3958 } 3959 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3960 MemVT, MMO); 3961 CSEMap.InsertNode(N, IP); 3962 AllNodes.push_back(N); 3963 return SDValue(N, 0); 3964} 3965 3966SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3967 SDValue Chain, SDValue Ptr, 3968 MachinePointerInfo PtrInfo, 3969 bool isVolatile, bool isNonTemporal, 3970 unsigned Alignment, const MDNode *TBAAInfo) { 3971 SDValue Undef = getUNDEF(Ptr.getValueType()); 3972 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 3973 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 3974} 3975 3976SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl, 3977 SDValue Chain, SDValue Ptr, 3978 MachinePointerInfo PtrInfo, EVT MemVT, 3979 bool isVolatile, bool isNonTemporal, 3980 unsigned Alignment, const MDNode *TBAAInfo) { 3981 SDValue Undef = getUNDEF(Ptr.getValueType()); 3982 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 3983 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment, 3984 TBAAInfo); 3985} 3986 3987 3988SDValue 3989SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3990 SDValue Offset, ISD::MemIndexedMode AM) { 3991 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3992 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3993 "Load is already a indexed load!"); 3994 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 3995 LD->getChain(), Base, Offset, LD->getPointerInfo(), 3996 LD->getMemoryVT(), 3997 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3998} 3999 4000SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4001 SDValue Ptr, MachinePointerInfo PtrInfo, 4002 bool isVolatile, bool isNonTemporal, 4003 unsigned Alignment, const MDNode *TBAAInfo) { 4004 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4005 Alignment = getEVTAlignment(Val.getValueType()); 4006 4007 unsigned Flags = MachineMemOperand::MOStore; 4008 if (isVolatile) 4009 Flags |= MachineMemOperand::MOVolatile; 4010 if (isNonTemporal) 4011 Flags |= MachineMemOperand::MONonTemporal; 4012 4013 if (PtrInfo.V == 0) 4014 PtrInfo = InferPointerInfo(Ptr); 4015 4016 MachineFunction &MF = getMachineFunction(); 4017 MachineMemOperand *MMO = 4018 MF.getMachineMemOperand(PtrInfo, Flags, 4019 Val.getValueType().getStoreSize(), Alignment, 4020 TBAAInfo); 4021 4022 return getStore(Chain, dl, Val, Ptr, MMO); 4023} 4024 4025SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4026 SDValue Ptr, MachineMemOperand *MMO) { 4027 EVT VT = Val.getValueType(); 4028 SDVTList VTs = getVTList(MVT::Other); 4029 SDValue Undef = getUNDEF(Ptr.getValueType()); 4030 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4031 FoldingSetNodeID ID; 4032 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4033 ID.AddInteger(VT.getRawBits()); 4034 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4035 MMO->isNonTemporal())); 4036 void *IP = 0; 4037 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4038 cast<StoreSDNode>(E)->refineAlignment(MMO); 4039 return SDValue(E, 0); 4040 } 4041 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4042 false, VT, MMO); 4043 CSEMap.InsertNode(N, IP); 4044 AllNodes.push_back(N); 4045 return SDValue(N, 0); 4046} 4047 4048SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4049 SDValue Ptr, MachinePointerInfo PtrInfo, 4050 EVT SVT,bool isVolatile, bool isNonTemporal, 4051 unsigned Alignment, 4052 const MDNode *TBAAInfo) { 4053 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4054 Alignment = getEVTAlignment(SVT); 4055 4056 unsigned Flags = MachineMemOperand::MOStore; 4057 if (isVolatile) 4058 Flags |= MachineMemOperand::MOVolatile; 4059 if (isNonTemporal) 4060 Flags |= MachineMemOperand::MONonTemporal; 4061 4062 if (PtrInfo.V == 0) 4063 PtrInfo = InferPointerInfo(Ptr); 4064 4065 MachineFunction &MF = getMachineFunction(); 4066 MachineMemOperand *MMO = 4067 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4068 TBAAInfo); 4069 4070 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4071} 4072 4073SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4074 SDValue Ptr, EVT SVT, 4075 MachineMemOperand *MMO) { 4076 EVT VT = Val.getValueType(); 4077 4078 if (VT == SVT) 4079 return getStore(Chain, dl, Val, Ptr, MMO); 4080 4081 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4082 "Should only be a truncating store, not extending!"); 4083 assert(VT.isInteger() == SVT.isInteger() && 4084 "Can't do FP-INT conversion!"); 4085 assert(VT.isVector() == SVT.isVector() && 4086 "Cannot use trunc store to convert to or from a vector!"); 4087 assert((!VT.isVector() || 4088 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4089 "Cannot use trunc store to change the number of vector elements!"); 4090 4091 SDVTList VTs = getVTList(MVT::Other); 4092 SDValue Undef = getUNDEF(Ptr.getValueType()); 4093 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4094 FoldingSetNodeID ID; 4095 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4096 ID.AddInteger(SVT.getRawBits()); 4097 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4098 MMO->isNonTemporal())); 4099 void *IP = 0; 4100 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4101 cast<StoreSDNode>(E)->refineAlignment(MMO); 4102 return SDValue(E, 0); 4103 } 4104 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4105 true, SVT, MMO); 4106 CSEMap.InsertNode(N, IP); 4107 AllNodes.push_back(N); 4108 return SDValue(N, 0); 4109} 4110 4111SDValue 4112SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4113 SDValue Offset, ISD::MemIndexedMode AM) { 4114 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4115 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4116 "Store is already a indexed store!"); 4117 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4118 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4119 FoldingSetNodeID ID; 4120 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4121 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4122 ID.AddInteger(ST->getRawSubclassData()); 4123 void *IP = 0; 4124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4125 return SDValue(E, 0); 4126 4127 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4128 ST->isTruncatingStore(), 4129 ST->getMemoryVT(), 4130 ST->getMemOperand()); 4131 CSEMap.InsertNode(N, IP); 4132 AllNodes.push_back(N); 4133 return SDValue(N, 0); 4134} 4135 4136SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4137 SDValue Chain, SDValue Ptr, 4138 SDValue SV, 4139 unsigned Align) { 4140 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4141 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4142} 4143 4144SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4145 const SDUse *Ops, unsigned NumOps) { 4146 switch (NumOps) { 4147 case 0: return getNode(Opcode, DL, VT); 4148 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4149 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4150 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4151 default: break; 4152 } 4153 4154 // Copy from an SDUse array into an SDValue array for use with 4155 // the regular getNode logic. 4156 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4157 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4158} 4159 4160SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4161 const SDValue *Ops, unsigned NumOps) { 4162 switch (NumOps) { 4163 case 0: return getNode(Opcode, DL, VT); 4164 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4165 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4166 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4167 default: break; 4168 } 4169 4170 switch (Opcode) { 4171 default: break; 4172 case ISD::SELECT_CC: { 4173 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4174 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4175 "LHS and RHS of condition must have same type!"); 4176 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4177 "True and False arms of SelectCC must have same type!"); 4178 assert(Ops[2].getValueType() == VT && 4179 "select_cc node must be of same type as true and false value!"); 4180 break; 4181 } 4182 case ISD::BR_CC: { 4183 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4184 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4185 "LHS/RHS of comparison should match types!"); 4186 break; 4187 } 4188 } 4189 4190 // Memoize nodes. 4191 SDNode *N; 4192 SDVTList VTs = getVTList(VT); 4193 4194 if (VT != MVT::Flag) { 4195 FoldingSetNodeID ID; 4196 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4197 void *IP = 0; 4198 4199 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4200 return SDValue(E, 0); 4201 4202 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4203 CSEMap.InsertNode(N, IP); 4204 } else { 4205 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4206 } 4207 4208 AllNodes.push_back(N); 4209#ifndef NDEBUG 4210 VerifyNode(N); 4211#endif 4212 return SDValue(N, 0); 4213} 4214 4215SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4216 const std::vector<EVT> &ResultTys, 4217 const SDValue *Ops, unsigned NumOps) { 4218 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4219 Ops, NumOps); 4220} 4221 4222SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4223 const EVT *VTs, unsigned NumVTs, 4224 const SDValue *Ops, unsigned NumOps) { 4225 if (NumVTs == 1) 4226 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4227 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4228} 4229 4230SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4231 const SDValue *Ops, unsigned NumOps) { 4232 if (VTList.NumVTs == 1) 4233 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4234 4235#if 0 4236 switch (Opcode) { 4237 // FIXME: figure out how to safely handle things like 4238 // int foo(int x) { return 1 << (x & 255); } 4239 // int bar() { return foo(256); } 4240 case ISD::SRA_PARTS: 4241 case ISD::SRL_PARTS: 4242 case ISD::SHL_PARTS: 4243 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4244 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4245 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4246 else if (N3.getOpcode() == ISD::AND) 4247 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4248 // If the and is only masking out bits that cannot effect the shift, 4249 // eliminate the and. 4250 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4251 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4252 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4253 } 4254 break; 4255 } 4256#endif 4257 4258 // Memoize the node unless it returns a flag. 4259 SDNode *N; 4260 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4261 FoldingSetNodeID ID; 4262 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4263 void *IP = 0; 4264 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4265 return SDValue(E, 0); 4266 4267 if (NumOps == 1) { 4268 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4269 } else if (NumOps == 2) { 4270 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4271 } else if (NumOps == 3) { 4272 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4273 Ops[2]); 4274 } else { 4275 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4276 } 4277 CSEMap.InsertNode(N, IP); 4278 } else { 4279 if (NumOps == 1) { 4280 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4281 } else if (NumOps == 2) { 4282 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4283 } else if (NumOps == 3) { 4284 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4285 Ops[2]); 4286 } else { 4287 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4288 } 4289 } 4290 AllNodes.push_back(N); 4291#ifndef NDEBUG 4292 VerifyNode(N); 4293#endif 4294 return SDValue(N, 0); 4295} 4296 4297SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4298 return getNode(Opcode, DL, VTList, 0, 0); 4299} 4300 4301SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4302 SDValue N1) { 4303 SDValue Ops[] = { N1 }; 4304 return getNode(Opcode, DL, VTList, Ops, 1); 4305} 4306 4307SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4308 SDValue N1, SDValue N2) { 4309 SDValue Ops[] = { N1, N2 }; 4310 return getNode(Opcode, DL, VTList, Ops, 2); 4311} 4312 4313SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4314 SDValue N1, SDValue N2, SDValue N3) { 4315 SDValue Ops[] = { N1, N2, N3 }; 4316 return getNode(Opcode, DL, VTList, Ops, 3); 4317} 4318 4319SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4320 SDValue N1, SDValue N2, SDValue N3, 4321 SDValue N4) { 4322 SDValue Ops[] = { N1, N2, N3, N4 }; 4323 return getNode(Opcode, DL, VTList, Ops, 4); 4324} 4325 4326SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4327 SDValue N1, SDValue N2, SDValue N3, 4328 SDValue N4, SDValue N5) { 4329 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4330 return getNode(Opcode, DL, VTList, Ops, 5); 4331} 4332 4333SDVTList SelectionDAG::getVTList(EVT VT) { 4334 return makeVTList(SDNode::getValueTypeList(VT), 1); 4335} 4336 4337SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4338 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4339 E = VTList.rend(); I != E; ++I) 4340 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4341 return *I; 4342 4343 EVT *Array = Allocator.Allocate<EVT>(2); 4344 Array[0] = VT1; 4345 Array[1] = VT2; 4346 SDVTList Result = makeVTList(Array, 2); 4347 VTList.push_back(Result); 4348 return Result; 4349} 4350 4351SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4352 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4353 E = VTList.rend(); I != E; ++I) 4354 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4355 I->VTs[2] == VT3) 4356 return *I; 4357 4358 EVT *Array = Allocator.Allocate<EVT>(3); 4359 Array[0] = VT1; 4360 Array[1] = VT2; 4361 Array[2] = VT3; 4362 SDVTList Result = makeVTList(Array, 3); 4363 VTList.push_back(Result); 4364 return Result; 4365} 4366 4367SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4368 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4369 E = VTList.rend(); I != E; ++I) 4370 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4371 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4372 return *I; 4373 4374 EVT *Array = Allocator.Allocate<EVT>(4); 4375 Array[0] = VT1; 4376 Array[1] = VT2; 4377 Array[2] = VT3; 4378 Array[3] = VT4; 4379 SDVTList Result = makeVTList(Array, 4); 4380 VTList.push_back(Result); 4381 return Result; 4382} 4383 4384SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4385 switch (NumVTs) { 4386 case 0: llvm_unreachable("Cannot have nodes without results!"); 4387 case 1: return getVTList(VTs[0]); 4388 case 2: return getVTList(VTs[0], VTs[1]); 4389 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4390 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4391 default: break; 4392 } 4393 4394 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4395 E = VTList.rend(); I != E; ++I) { 4396 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4397 continue; 4398 4399 bool NoMatch = false; 4400 for (unsigned i = 2; i != NumVTs; ++i) 4401 if (VTs[i] != I->VTs[i]) { 4402 NoMatch = true; 4403 break; 4404 } 4405 if (!NoMatch) 4406 return *I; 4407 } 4408 4409 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4410 std::copy(VTs, VTs+NumVTs, Array); 4411 SDVTList Result = makeVTList(Array, NumVTs); 4412 VTList.push_back(Result); 4413 return Result; 4414} 4415 4416 4417/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4418/// specified operands. If the resultant node already exists in the DAG, 4419/// this does not modify the specified node, instead it returns the node that 4420/// already exists. If the resultant node does not exist in the DAG, the 4421/// input node is returned. As a degenerate case, if you specify the same 4422/// input operands as the node already has, the input node is returned. 4423SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4424 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4425 4426 // Check to see if there is no change. 4427 if (Op == N->getOperand(0)) return N; 4428 4429 // See if the modified node already exists. 4430 void *InsertPos = 0; 4431 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4432 return Existing; 4433 4434 // Nope it doesn't. Remove the node from its current place in the maps. 4435 if (InsertPos) 4436 if (!RemoveNodeFromCSEMaps(N)) 4437 InsertPos = 0; 4438 4439 // Now we update the operands. 4440 N->OperandList[0].set(Op); 4441 4442 // If this gets put into a CSE map, add it. 4443 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4444 return N; 4445} 4446 4447SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4448 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4449 4450 // Check to see if there is no change. 4451 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4452 return N; // No operands changed, just return the input node. 4453 4454 // See if the modified node already exists. 4455 void *InsertPos = 0; 4456 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4457 return Existing; 4458 4459 // Nope it doesn't. Remove the node from its current place in the maps. 4460 if (InsertPos) 4461 if (!RemoveNodeFromCSEMaps(N)) 4462 InsertPos = 0; 4463 4464 // Now we update the operands. 4465 if (N->OperandList[0] != Op1) 4466 N->OperandList[0].set(Op1); 4467 if (N->OperandList[1] != Op2) 4468 N->OperandList[1].set(Op2); 4469 4470 // If this gets put into a CSE map, add it. 4471 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4472 return N; 4473} 4474 4475SDNode *SelectionDAG:: 4476UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4477 SDValue Ops[] = { Op1, Op2, Op3 }; 4478 return UpdateNodeOperands(N, Ops, 3); 4479} 4480 4481SDNode *SelectionDAG:: 4482UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4483 SDValue Op3, SDValue Op4) { 4484 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4485 return UpdateNodeOperands(N, Ops, 4); 4486} 4487 4488SDNode *SelectionDAG:: 4489UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4490 SDValue Op3, SDValue Op4, SDValue Op5) { 4491 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4492 return UpdateNodeOperands(N, Ops, 5); 4493} 4494 4495SDNode *SelectionDAG:: 4496UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4497 assert(N->getNumOperands() == NumOps && 4498 "Update with wrong number of operands"); 4499 4500 // Check to see if there is no change. 4501 bool AnyChange = false; 4502 for (unsigned i = 0; i != NumOps; ++i) { 4503 if (Ops[i] != N->getOperand(i)) { 4504 AnyChange = true; 4505 break; 4506 } 4507 } 4508 4509 // No operands changed, just return the input node. 4510 if (!AnyChange) return N; 4511 4512 // See if the modified node already exists. 4513 void *InsertPos = 0; 4514 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4515 return Existing; 4516 4517 // Nope it doesn't. Remove the node from its current place in the maps. 4518 if (InsertPos) 4519 if (!RemoveNodeFromCSEMaps(N)) 4520 InsertPos = 0; 4521 4522 // Now we update the operands. 4523 for (unsigned i = 0; i != NumOps; ++i) 4524 if (N->OperandList[i] != Ops[i]) 4525 N->OperandList[i].set(Ops[i]); 4526 4527 // If this gets put into a CSE map, add it. 4528 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4529 return N; 4530} 4531 4532/// DropOperands - Release the operands and set this node to have 4533/// zero operands. 4534void SDNode::DropOperands() { 4535 // Unlike the code in MorphNodeTo that does this, we don't need to 4536 // watch for dead nodes here. 4537 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4538 SDUse &Use = *I++; 4539 Use.set(SDValue()); 4540 } 4541} 4542 4543/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4544/// machine opcode. 4545/// 4546SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4547 EVT VT) { 4548 SDVTList VTs = getVTList(VT); 4549 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4550} 4551 4552SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4553 EVT VT, SDValue Op1) { 4554 SDVTList VTs = getVTList(VT); 4555 SDValue Ops[] = { Op1 }; 4556 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4557} 4558 4559SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4560 EVT VT, SDValue Op1, 4561 SDValue Op2) { 4562 SDVTList VTs = getVTList(VT); 4563 SDValue Ops[] = { Op1, Op2 }; 4564 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4565} 4566 4567SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4568 EVT VT, SDValue Op1, 4569 SDValue Op2, SDValue Op3) { 4570 SDVTList VTs = getVTList(VT); 4571 SDValue Ops[] = { Op1, Op2, Op3 }; 4572 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4573} 4574 4575SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4576 EVT VT, const SDValue *Ops, 4577 unsigned NumOps) { 4578 SDVTList VTs = getVTList(VT); 4579 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4580} 4581 4582SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4583 EVT VT1, EVT VT2, const SDValue *Ops, 4584 unsigned NumOps) { 4585 SDVTList VTs = getVTList(VT1, VT2); 4586 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4587} 4588 4589SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4590 EVT VT1, EVT VT2) { 4591 SDVTList VTs = getVTList(VT1, VT2); 4592 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4593} 4594 4595SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4596 EVT VT1, EVT VT2, EVT VT3, 4597 const SDValue *Ops, unsigned NumOps) { 4598 SDVTList VTs = getVTList(VT1, VT2, VT3); 4599 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4600} 4601 4602SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4603 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4604 const SDValue *Ops, unsigned NumOps) { 4605 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4606 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4607} 4608 4609SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4610 EVT VT1, EVT VT2, 4611 SDValue Op1) { 4612 SDVTList VTs = getVTList(VT1, VT2); 4613 SDValue Ops[] = { Op1 }; 4614 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4615} 4616 4617SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4618 EVT VT1, EVT VT2, 4619 SDValue Op1, SDValue Op2) { 4620 SDVTList VTs = getVTList(VT1, VT2); 4621 SDValue Ops[] = { Op1, Op2 }; 4622 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4623} 4624 4625SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4626 EVT VT1, EVT VT2, 4627 SDValue Op1, SDValue Op2, 4628 SDValue Op3) { 4629 SDVTList VTs = getVTList(VT1, VT2); 4630 SDValue Ops[] = { Op1, Op2, Op3 }; 4631 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4632} 4633 4634SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4635 EVT VT1, EVT VT2, EVT VT3, 4636 SDValue Op1, SDValue Op2, 4637 SDValue Op3) { 4638 SDVTList VTs = getVTList(VT1, VT2, VT3); 4639 SDValue Ops[] = { Op1, Op2, Op3 }; 4640 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4641} 4642 4643SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4644 SDVTList VTs, const SDValue *Ops, 4645 unsigned NumOps) { 4646 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4647 // Reset the NodeID to -1. 4648 N->setNodeId(-1); 4649 return N; 4650} 4651 4652/// MorphNodeTo - This *mutates* the specified node to have the specified 4653/// return type, opcode, and operands. 4654/// 4655/// Note that MorphNodeTo returns the resultant node. If there is already a 4656/// node of the specified opcode and operands, it returns that node instead of 4657/// the current one. Note that the DebugLoc need not be the same. 4658/// 4659/// Using MorphNodeTo is faster than creating a new node and swapping it in 4660/// with ReplaceAllUsesWith both because it often avoids allocating a new 4661/// node, and because it doesn't require CSE recalculation for any of 4662/// the node's users. 4663/// 4664SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4665 SDVTList VTs, const SDValue *Ops, 4666 unsigned NumOps) { 4667 // If an identical node already exists, use it. 4668 void *IP = 0; 4669 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4670 FoldingSetNodeID ID; 4671 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4672 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4673 return ON; 4674 } 4675 4676 if (!RemoveNodeFromCSEMaps(N)) 4677 IP = 0; 4678 4679 // Start the morphing. 4680 N->NodeType = Opc; 4681 N->ValueList = VTs.VTs; 4682 N->NumValues = VTs.NumVTs; 4683 4684 // Clear the operands list, updating used nodes to remove this from their 4685 // use list. Keep track of any operands that become dead as a result. 4686 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4687 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4688 SDUse &Use = *I++; 4689 SDNode *Used = Use.getNode(); 4690 Use.set(SDValue()); 4691 if (Used->use_empty()) 4692 DeadNodeSet.insert(Used); 4693 } 4694 4695 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4696 // Initialize the memory references information. 4697 MN->setMemRefs(0, 0); 4698 // If NumOps is larger than the # of operands we can have in a 4699 // MachineSDNode, reallocate the operand list. 4700 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4701 if (MN->OperandsNeedDelete) 4702 delete[] MN->OperandList; 4703 if (NumOps > array_lengthof(MN->LocalOperands)) 4704 // We're creating a final node that will live unmorphed for the 4705 // remainder of the current SelectionDAG iteration, so we can allocate 4706 // the operands directly out of a pool with no recycling metadata. 4707 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4708 Ops, NumOps); 4709 else 4710 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4711 MN->OperandsNeedDelete = false; 4712 } else 4713 MN->InitOperands(MN->OperandList, Ops, NumOps); 4714 } else { 4715 // If NumOps is larger than the # of operands we currently have, reallocate 4716 // the operand list. 4717 if (NumOps > N->NumOperands) { 4718 if (N->OperandsNeedDelete) 4719 delete[] N->OperandList; 4720 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4721 N->OperandsNeedDelete = true; 4722 } else 4723 N->InitOperands(N->OperandList, Ops, NumOps); 4724 } 4725 4726 // Delete any nodes that are still dead after adding the uses for the 4727 // new operands. 4728 if (!DeadNodeSet.empty()) { 4729 SmallVector<SDNode *, 16> DeadNodes; 4730 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4731 E = DeadNodeSet.end(); I != E; ++I) 4732 if ((*I)->use_empty()) 4733 DeadNodes.push_back(*I); 4734 RemoveDeadNodes(DeadNodes); 4735 } 4736 4737 if (IP) 4738 CSEMap.InsertNode(N, IP); // Memoize the new node. 4739 return N; 4740} 4741 4742 4743/// getMachineNode - These are used for target selectors to create a new node 4744/// with specified return type(s), MachineInstr opcode, and operands. 4745/// 4746/// Note that getMachineNode returns the resultant node. If there is already a 4747/// node of the specified opcode and operands, it returns that node instead of 4748/// the current one. 4749MachineSDNode * 4750SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4751 SDVTList VTs = getVTList(VT); 4752 return getMachineNode(Opcode, dl, VTs, 0, 0); 4753} 4754 4755MachineSDNode * 4756SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4757 SDVTList VTs = getVTList(VT); 4758 SDValue Ops[] = { Op1 }; 4759 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4760} 4761 4762MachineSDNode * 4763SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4764 SDValue Op1, SDValue Op2) { 4765 SDVTList VTs = getVTList(VT); 4766 SDValue Ops[] = { Op1, Op2 }; 4767 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4768} 4769 4770MachineSDNode * 4771SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4772 SDValue Op1, SDValue Op2, SDValue Op3) { 4773 SDVTList VTs = getVTList(VT); 4774 SDValue Ops[] = { Op1, Op2, Op3 }; 4775 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4776} 4777 4778MachineSDNode * 4779SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4780 const SDValue *Ops, unsigned NumOps) { 4781 SDVTList VTs = getVTList(VT); 4782 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4783} 4784 4785MachineSDNode * 4786SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4787 SDVTList VTs = getVTList(VT1, VT2); 4788 return getMachineNode(Opcode, dl, VTs, 0, 0); 4789} 4790 4791MachineSDNode * 4792SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4793 EVT VT1, EVT VT2, SDValue Op1) { 4794 SDVTList VTs = getVTList(VT1, VT2); 4795 SDValue Ops[] = { Op1 }; 4796 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4797} 4798 4799MachineSDNode * 4800SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4801 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4802 SDVTList VTs = getVTList(VT1, VT2); 4803 SDValue Ops[] = { Op1, Op2 }; 4804 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4805} 4806 4807MachineSDNode * 4808SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4809 EVT VT1, EVT VT2, SDValue Op1, 4810 SDValue Op2, SDValue Op3) { 4811 SDVTList VTs = getVTList(VT1, VT2); 4812 SDValue Ops[] = { Op1, Op2, Op3 }; 4813 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4814} 4815 4816MachineSDNode * 4817SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4818 EVT VT1, EVT VT2, 4819 const SDValue *Ops, unsigned NumOps) { 4820 SDVTList VTs = getVTList(VT1, VT2); 4821 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4822} 4823 4824MachineSDNode * 4825SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4826 EVT VT1, EVT VT2, EVT VT3, 4827 SDValue Op1, SDValue Op2) { 4828 SDVTList VTs = getVTList(VT1, VT2, VT3); 4829 SDValue Ops[] = { Op1, Op2 }; 4830 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4831} 4832 4833MachineSDNode * 4834SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4835 EVT VT1, EVT VT2, EVT VT3, 4836 SDValue Op1, SDValue Op2, SDValue Op3) { 4837 SDVTList VTs = getVTList(VT1, VT2, VT3); 4838 SDValue Ops[] = { Op1, Op2, Op3 }; 4839 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4840} 4841 4842MachineSDNode * 4843SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4844 EVT VT1, EVT VT2, EVT VT3, 4845 const SDValue *Ops, unsigned NumOps) { 4846 SDVTList VTs = getVTList(VT1, VT2, VT3); 4847 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4848} 4849 4850MachineSDNode * 4851SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4852 EVT VT2, EVT VT3, EVT VT4, 4853 const SDValue *Ops, unsigned NumOps) { 4854 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4855 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4856} 4857 4858MachineSDNode * 4859SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4860 const std::vector<EVT> &ResultTys, 4861 const SDValue *Ops, unsigned NumOps) { 4862 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4863 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4864} 4865 4866MachineSDNode * 4867SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4868 const SDValue *Ops, unsigned NumOps) { 4869 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4870 MachineSDNode *N; 4871 void *IP; 4872 4873 if (DoCSE) { 4874 FoldingSetNodeID ID; 4875 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4876 IP = 0; 4877 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4878 return cast<MachineSDNode>(E); 4879 } 4880 4881 // Allocate a new MachineSDNode. 4882 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4883 4884 // Initialize the operands list. 4885 if (NumOps > array_lengthof(N->LocalOperands)) 4886 // We're creating a final node that will live unmorphed for the 4887 // remainder of the current SelectionDAG iteration, so we can allocate 4888 // the operands directly out of a pool with no recycling metadata. 4889 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4890 Ops, NumOps); 4891 else 4892 N->InitOperands(N->LocalOperands, Ops, NumOps); 4893 N->OperandsNeedDelete = false; 4894 4895 if (DoCSE) 4896 CSEMap.InsertNode(N, IP); 4897 4898 AllNodes.push_back(N); 4899#ifndef NDEBUG 4900 VerifyNode(N); 4901#endif 4902 return N; 4903} 4904 4905/// getTargetExtractSubreg - A convenience function for creating 4906/// TargetOpcode::EXTRACT_SUBREG nodes. 4907SDValue 4908SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4909 SDValue Operand) { 4910 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4911 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4912 VT, Operand, SRIdxVal); 4913 return SDValue(Subreg, 0); 4914} 4915 4916/// getTargetInsertSubreg - A convenience function for creating 4917/// TargetOpcode::INSERT_SUBREG nodes. 4918SDValue 4919SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4920 SDValue Operand, SDValue Subreg) { 4921 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4922 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4923 VT, Operand, Subreg, SRIdxVal); 4924 return SDValue(Result, 0); 4925} 4926 4927/// getNodeIfExists - Get the specified node if it's already available, or 4928/// else return NULL. 4929SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4930 const SDValue *Ops, unsigned NumOps) { 4931 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4932 FoldingSetNodeID ID; 4933 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4934 void *IP = 0; 4935 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4936 return E; 4937 } 4938 return NULL; 4939} 4940 4941/// getDbgValue - Creates a SDDbgValue node. 4942/// 4943SDDbgValue * 4944SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4945 DebugLoc DL, unsigned O) { 4946 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4947} 4948 4949SDDbgValue * 4950SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 4951 DebugLoc DL, unsigned O) { 4952 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4953} 4954 4955SDDbgValue * 4956SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4957 DebugLoc DL, unsigned O) { 4958 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4959} 4960 4961namespace { 4962 4963/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4964/// pointed to by a use iterator is deleted, increment the use iterator 4965/// so that it doesn't dangle. 4966/// 4967/// This class also manages a "downlink" DAGUpdateListener, to forward 4968/// messages to ReplaceAllUsesWith's callers. 4969/// 4970class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4971 SelectionDAG::DAGUpdateListener *DownLink; 4972 SDNode::use_iterator &UI; 4973 SDNode::use_iterator &UE; 4974 4975 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4976 // Increment the iterator as needed. 4977 while (UI != UE && N == *UI) 4978 ++UI; 4979 4980 // Then forward the message. 4981 if (DownLink) DownLink->NodeDeleted(N, E); 4982 } 4983 4984 virtual void NodeUpdated(SDNode *N) { 4985 // Just forward the message. 4986 if (DownLink) DownLink->NodeUpdated(N); 4987 } 4988 4989public: 4990 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4991 SDNode::use_iterator &ui, 4992 SDNode::use_iterator &ue) 4993 : DownLink(dl), UI(ui), UE(ue) {} 4994}; 4995 4996} 4997 4998/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4999/// This can cause recursive merging of nodes in the DAG. 5000/// 5001/// This version assumes From has a single result value. 5002/// 5003void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5004 DAGUpdateListener *UpdateListener) { 5005 SDNode *From = FromN.getNode(); 5006 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5007 "Cannot replace with this method!"); 5008 assert(From != To.getNode() && "Cannot replace uses of with self"); 5009 5010 // Iterate over all the existing uses of From. New uses will be added 5011 // to the beginning of the use list, which we avoid visiting. 5012 // This specifically avoids visiting uses of From that arise while the 5013 // replacement is happening, because any such uses would be the result 5014 // of CSE: If an existing node looks like From after one of its operands 5015 // is replaced by To, we don't want to replace of all its users with To 5016 // too. See PR3018 for more info. 5017 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5018 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5019 while (UI != UE) { 5020 SDNode *User = *UI; 5021 5022 // This node is about to morph, remove its old self from the CSE maps. 5023 RemoveNodeFromCSEMaps(User); 5024 5025 // A user can appear in a use list multiple times, and when this 5026 // happens the uses are usually next to each other in the list. 5027 // To help reduce the number of CSE recomputations, process all 5028 // the uses of this user that we can find this way. 5029 do { 5030 SDUse &Use = UI.getUse(); 5031 ++UI; 5032 Use.set(To); 5033 } while (UI != UE && *UI == User); 5034 5035 // Now that we have modified User, add it back to the CSE maps. If it 5036 // already exists there, recursively merge the results together. 5037 AddModifiedNodeToCSEMaps(User, &Listener); 5038 } 5039} 5040 5041/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5042/// This can cause recursive merging of nodes in the DAG. 5043/// 5044/// This version assumes that for each value of From, there is a 5045/// corresponding value in To in the same position with the same type. 5046/// 5047void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5048 DAGUpdateListener *UpdateListener) { 5049#ifndef NDEBUG 5050 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5051 assert((!From->hasAnyUseOfValue(i) || 5052 From->getValueType(i) == To->getValueType(i)) && 5053 "Cannot use this version of ReplaceAllUsesWith!"); 5054#endif 5055 5056 // Handle the trivial case. 5057 if (From == To) 5058 return; 5059 5060 // Iterate over just the existing users of From. See the comments in 5061 // the ReplaceAllUsesWith above. 5062 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5063 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5064 while (UI != UE) { 5065 SDNode *User = *UI; 5066 5067 // This node is about to morph, remove its old self from the CSE maps. 5068 RemoveNodeFromCSEMaps(User); 5069 5070 // A user can appear in a use list multiple times, and when this 5071 // happens the uses are usually next to each other in the list. 5072 // To help reduce the number of CSE recomputations, process all 5073 // the uses of this user that we can find this way. 5074 do { 5075 SDUse &Use = UI.getUse(); 5076 ++UI; 5077 Use.setNode(To); 5078 } while (UI != UE && *UI == User); 5079 5080 // Now that we have modified User, add it back to the CSE maps. If it 5081 // already exists there, recursively merge the results together. 5082 AddModifiedNodeToCSEMaps(User, &Listener); 5083 } 5084} 5085 5086/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5087/// This can cause recursive merging of nodes in the DAG. 5088/// 5089/// This version can replace From with any result values. To must match the 5090/// number and types of values returned by From. 5091void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5092 const SDValue *To, 5093 DAGUpdateListener *UpdateListener) { 5094 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5095 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5096 5097 // Iterate over just the existing users of From. See the comments in 5098 // the ReplaceAllUsesWith above. 5099 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5100 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5101 while (UI != UE) { 5102 SDNode *User = *UI; 5103 5104 // This node is about to morph, remove its old self from the CSE maps. 5105 RemoveNodeFromCSEMaps(User); 5106 5107 // A user can appear in a use list multiple times, and when this 5108 // happens the uses are usually next to each other in the list. 5109 // To help reduce the number of CSE recomputations, process all 5110 // the uses of this user that we can find this way. 5111 do { 5112 SDUse &Use = UI.getUse(); 5113 const SDValue &ToOp = To[Use.getResNo()]; 5114 ++UI; 5115 Use.set(ToOp); 5116 } while (UI != UE && *UI == User); 5117 5118 // Now that we have modified User, add it back to the CSE maps. If it 5119 // already exists there, recursively merge the results together. 5120 AddModifiedNodeToCSEMaps(User, &Listener); 5121 } 5122} 5123 5124/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5125/// uses of other values produced by From.getNode() alone. The Deleted 5126/// vector is handled the same way as for ReplaceAllUsesWith. 5127void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5128 DAGUpdateListener *UpdateListener){ 5129 // Handle the really simple, really trivial case efficiently. 5130 if (From == To) return; 5131 5132 // Handle the simple, trivial, case efficiently. 5133 if (From.getNode()->getNumValues() == 1) { 5134 ReplaceAllUsesWith(From, To, UpdateListener); 5135 return; 5136 } 5137 5138 // Iterate over just the existing users of From. See the comments in 5139 // the ReplaceAllUsesWith above. 5140 SDNode::use_iterator UI = From.getNode()->use_begin(), 5141 UE = From.getNode()->use_end(); 5142 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5143 while (UI != UE) { 5144 SDNode *User = *UI; 5145 bool UserRemovedFromCSEMaps = false; 5146 5147 // A user can appear in a use list multiple times, and when this 5148 // happens the uses are usually next to each other in the list. 5149 // To help reduce the number of CSE recomputations, process all 5150 // the uses of this user that we can find this way. 5151 do { 5152 SDUse &Use = UI.getUse(); 5153 5154 // Skip uses of different values from the same node. 5155 if (Use.getResNo() != From.getResNo()) { 5156 ++UI; 5157 continue; 5158 } 5159 5160 // If this node hasn't been modified yet, it's still in the CSE maps, 5161 // so remove its old self from the CSE maps. 5162 if (!UserRemovedFromCSEMaps) { 5163 RemoveNodeFromCSEMaps(User); 5164 UserRemovedFromCSEMaps = true; 5165 } 5166 5167 ++UI; 5168 Use.set(To); 5169 } while (UI != UE && *UI == User); 5170 5171 // We are iterating over all uses of the From node, so if a use 5172 // doesn't use the specific value, no changes are made. 5173 if (!UserRemovedFromCSEMaps) 5174 continue; 5175 5176 // Now that we have modified User, add it back to the CSE maps. If it 5177 // already exists there, recursively merge the results together. 5178 AddModifiedNodeToCSEMaps(User, &Listener); 5179 } 5180} 5181 5182namespace { 5183 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5184 /// to record information about a use. 5185 struct UseMemo { 5186 SDNode *User; 5187 unsigned Index; 5188 SDUse *Use; 5189 }; 5190 5191 /// operator< - Sort Memos by User. 5192 bool operator<(const UseMemo &L, const UseMemo &R) { 5193 return (intptr_t)L.User < (intptr_t)R.User; 5194 } 5195} 5196 5197/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5198/// uses of other values produced by From.getNode() alone. The same value 5199/// may appear in both the From and To list. The Deleted vector is 5200/// handled the same way as for ReplaceAllUsesWith. 5201void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5202 const SDValue *To, 5203 unsigned Num, 5204 DAGUpdateListener *UpdateListener){ 5205 // Handle the simple, trivial case efficiently. 5206 if (Num == 1) 5207 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5208 5209 // Read up all the uses and make records of them. This helps 5210 // processing new uses that are introduced during the 5211 // replacement process. 5212 SmallVector<UseMemo, 4> Uses; 5213 for (unsigned i = 0; i != Num; ++i) { 5214 unsigned FromResNo = From[i].getResNo(); 5215 SDNode *FromNode = From[i].getNode(); 5216 for (SDNode::use_iterator UI = FromNode->use_begin(), 5217 E = FromNode->use_end(); UI != E; ++UI) { 5218 SDUse &Use = UI.getUse(); 5219 if (Use.getResNo() == FromResNo) { 5220 UseMemo Memo = { *UI, i, &Use }; 5221 Uses.push_back(Memo); 5222 } 5223 } 5224 } 5225 5226 // Sort the uses, so that all the uses from a given User are together. 5227 std::sort(Uses.begin(), Uses.end()); 5228 5229 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5230 UseIndex != UseIndexEnd; ) { 5231 // We know that this user uses some value of From. If it is the right 5232 // value, update it. 5233 SDNode *User = Uses[UseIndex].User; 5234 5235 // This node is about to morph, remove its old self from the CSE maps. 5236 RemoveNodeFromCSEMaps(User); 5237 5238 // The Uses array is sorted, so all the uses for a given User 5239 // are next to each other in the list. 5240 // To help reduce the number of CSE recomputations, process all 5241 // the uses of this user that we can find this way. 5242 do { 5243 unsigned i = Uses[UseIndex].Index; 5244 SDUse &Use = *Uses[UseIndex].Use; 5245 ++UseIndex; 5246 5247 Use.set(To[i]); 5248 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5249 5250 // Now that we have modified User, add it back to the CSE maps. If it 5251 // already exists there, recursively merge the results together. 5252 AddModifiedNodeToCSEMaps(User, UpdateListener); 5253 } 5254} 5255 5256/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5257/// based on their topological order. It returns the maximum id and a vector 5258/// of the SDNodes* in assigned order by reference. 5259unsigned SelectionDAG::AssignTopologicalOrder() { 5260 5261 unsigned DAGSize = 0; 5262 5263 // SortedPos tracks the progress of the algorithm. Nodes before it are 5264 // sorted, nodes after it are unsorted. When the algorithm completes 5265 // it is at the end of the list. 5266 allnodes_iterator SortedPos = allnodes_begin(); 5267 5268 // Visit all the nodes. Move nodes with no operands to the front of 5269 // the list immediately. Annotate nodes that do have operands with their 5270 // operand count. Before we do this, the Node Id fields of the nodes 5271 // may contain arbitrary values. After, the Node Id fields for nodes 5272 // before SortedPos will contain the topological sort index, and the 5273 // Node Id fields for nodes At SortedPos and after will contain the 5274 // count of outstanding operands. 5275 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5276 SDNode *N = I++; 5277 checkForCycles(N); 5278 unsigned Degree = N->getNumOperands(); 5279 if (Degree == 0) { 5280 // A node with no uses, add it to the result array immediately. 5281 N->setNodeId(DAGSize++); 5282 allnodes_iterator Q = N; 5283 if (Q != SortedPos) 5284 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5285 assert(SortedPos != AllNodes.end() && "Overran node list"); 5286 ++SortedPos; 5287 } else { 5288 // Temporarily use the Node Id as scratch space for the degree count. 5289 N->setNodeId(Degree); 5290 } 5291 } 5292 5293 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5294 // such that by the time the end is reached all nodes will be sorted. 5295 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5296 SDNode *N = I; 5297 checkForCycles(N); 5298 // N is in sorted position, so all its uses have one less operand 5299 // that needs to be sorted. 5300 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5301 UI != UE; ++UI) { 5302 SDNode *P = *UI; 5303 unsigned Degree = P->getNodeId(); 5304 assert(Degree != 0 && "Invalid node degree"); 5305 --Degree; 5306 if (Degree == 0) { 5307 // All of P's operands are sorted, so P may sorted now. 5308 P->setNodeId(DAGSize++); 5309 if (P != SortedPos) 5310 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5311 assert(SortedPos != AllNodes.end() && "Overran node list"); 5312 ++SortedPos; 5313 } else { 5314 // Update P's outstanding operand count. 5315 P->setNodeId(Degree); 5316 } 5317 } 5318 if (I == SortedPos) { 5319#ifndef NDEBUG 5320 SDNode *S = ++I; 5321 dbgs() << "Overran sorted position:\n"; 5322 S->dumprFull(); 5323#endif 5324 llvm_unreachable(0); 5325 } 5326 } 5327 5328 assert(SortedPos == AllNodes.end() && 5329 "Topological sort incomplete!"); 5330 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5331 "First node in topological sort is not the entry token!"); 5332 assert(AllNodes.front().getNodeId() == 0 && 5333 "First node in topological sort has non-zero id!"); 5334 assert(AllNodes.front().getNumOperands() == 0 && 5335 "First node in topological sort has operands!"); 5336 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5337 "Last node in topologic sort has unexpected id!"); 5338 assert(AllNodes.back().use_empty() && 5339 "Last node in topologic sort has users!"); 5340 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5341 return DAGSize; 5342} 5343 5344/// AssignOrdering - Assign an order to the SDNode. 5345void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5346 assert(SD && "Trying to assign an order to a null node!"); 5347 Ordering->add(SD, Order); 5348} 5349 5350/// GetOrdering - Get the order for the SDNode. 5351unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5352 assert(SD && "Trying to get the order of a null node!"); 5353 return Ordering->getOrder(SD); 5354} 5355 5356/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5357/// value is produced by SD. 5358void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5359 DbgInfo->add(DB, SD, isParameter); 5360 if (SD) 5361 SD->setHasDebugValue(true); 5362} 5363 5364//===----------------------------------------------------------------------===// 5365// SDNode Class 5366//===----------------------------------------------------------------------===// 5367 5368HandleSDNode::~HandleSDNode() { 5369 DropOperands(); 5370} 5371 5372GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5373 const GlobalValue *GA, 5374 EVT VT, int64_t o, unsigned char TF) 5375 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5376 TheGlobal = GA; 5377} 5378 5379MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5380 MachineMemOperand *mmo) 5381 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5382 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5383 MMO->isNonTemporal()); 5384 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5385 assert(isNonTemporal() == MMO->isNonTemporal() && 5386 "Non-temporal encoding error!"); 5387 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5388} 5389 5390MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5391 const SDValue *Ops, unsigned NumOps, EVT memvt, 5392 MachineMemOperand *mmo) 5393 : SDNode(Opc, dl, VTs, Ops, NumOps), 5394 MemoryVT(memvt), MMO(mmo) { 5395 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5396 MMO->isNonTemporal()); 5397 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5398 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5399} 5400 5401/// Profile - Gather unique data for the node. 5402/// 5403void SDNode::Profile(FoldingSetNodeID &ID) const { 5404 AddNodeIDNode(ID, this); 5405} 5406 5407namespace { 5408 struct EVTArray { 5409 std::vector<EVT> VTs; 5410 5411 EVTArray() { 5412 VTs.reserve(MVT::LAST_VALUETYPE); 5413 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5414 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5415 } 5416 }; 5417} 5418 5419static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5420static ManagedStatic<EVTArray> SimpleVTArray; 5421static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5422 5423/// getValueTypeList - Return a pointer to the specified value type. 5424/// 5425const EVT *SDNode::getValueTypeList(EVT VT) { 5426 if (VT.isExtended()) { 5427 sys::SmartScopedLock<true> Lock(*VTMutex); 5428 return &(*EVTs->insert(VT).first); 5429 } else { 5430 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5431 "Value type out of range!"); 5432 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5433 } 5434} 5435 5436/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5437/// indicated value. This method ignores uses of other values defined by this 5438/// operation. 5439bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5440 assert(Value < getNumValues() && "Bad value!"); 5441 5442 // TODO: Only iterate over uses of a given value of the node 5443 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5444 if (UI.getUse().getResNo() == Value) { 5445 if (NUses == 0) 5446 return false; 5447 --NUses; 5448 } 5449 } 5450 5451 // Found exactly the right number of uses? 5452 return NUses == 0; 5453} 5454 5455 5456/// hasAnyUseOfValue - Return true if there are any use of the indicated 5457/// value. This method ignores uses of other values defined by this operation. 5458bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5459 assert(Value < getNumValues() && "Bad value!"); 5460 5461 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5462 if (UI.getUse().getResNo() == Value) 5463 return true; 5464 5465 return false; 5466} 5467 5468 5469/// isOnlyUserOf - Return true if this node is the only use of N. 5470/// 5471bool SDNode::isOnlyUserOf(SDNode *N) const { 5472 bool Seen = false; 5473 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5474 SDNode *User = *I; 5475 if (User == this) 5476 Seen = true; 5477 else 5478 return false; 5479 } 5480 5481 return Seen; 5482} 5483 5484/// isOperand - Return true if this node is an operand of N. 5485/// 5486bool SDValue::isOperandOf(SDNode *N) const { 5487 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5488 if (*this == N->getOperand(i)) 5489 return true; 5490 return false; 5491} 5492 5493bool SDNode::isOperandOf(SDNode *N) const { 5494 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5495 if (this == N->OperandList[i].getNode()) 5496 return true; 5497 return false; 5498} 5499 5500/// reachesChainWithoutSideEffects - Return true if this operand (which must 5501/// be a chain) reaches the specified operand without crossing any 5502/// side-effecting instructions on any chain path. In practice, this looks 5503/// through token factors and non-volatile loads. In order to remain efficient, 5504/// this only looks a couple of nodes in, it does not do an exhaustive search. 5505bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5506 unsigned Depth) const { 5507 if (*this == Dest) return true; 5508 5509 // Don't search too deeply, we just want to be able to see through 5510 // TokenFactor's etc. 5511 if (Depth == 0) return false; 5512 5513 // If this is a token factor, all inputs to the TF happen in parallel. If any 5514 // of the operands of the TF does not reach dest, then we cannot do the xform. 5515 if (getOpcode() == ISD::TokenFactor) { 5516 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5517 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5518 return false; 5519 return true; 5520 } 5521 5522 // Loads don't have side effects, look through them. 5523 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5524 if (!Ld->isVolatile()) 5525 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5526 } 5527 return false; 5528} 5529 5530/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5531/// is either an operand of N or it can be reached by traversing up the operands. 5532/// NOTE: this is an expensive method. Use it carefully. 5533bool SDNode::isPredecessorOf(SDNode *N) const { 5534 SmallPtrSet<SDNode *, 32> Visited; 5535 SmallVector<SDNode *, 16> Worklist; 5536 Worklist.push_back(N); 5537 5538 do { 5539 N = Worklist.pop_back_val(); 5540 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5541 SDNode *Op = N->getOperand(i).getNode(); 5542 if (Op == this) 5543 return true; 5544 if (Visited.insert(Op)) 5545 Worklist.push_back(Op); 5546 } 5547 } while (!Worklist.empty()); 5548 5549 return false; 5550} 5551 5552uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5553 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5554 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5555} 5556 5557std::string SDNode::getOperationName(const SelectionDAG *G) const { 5558 switch (getOpcode()) { 5559 default: 5560 if (getOpcode() < ISD::BUILTIN_OP_END) 5561 return "<<Unknown DAG Node>>"; 5562 if (isMachineOpcode()) { 5563 if (G) 5564 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5565 if (getMachineOpcode() < TII->getNumOpcodes()) 5566 return TII->get(getMachineOpcode()).getName(); 5567 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5568 } 5569 if (G) { 5570 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5571 const char *Name = TLI.getTargetNodeName(getOpcode()); 5572 if (Name) return Name; 5573 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5574 } 5575 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5576 5577#ifndef NDEBUG 5578 case ISD::DELETED_NODE: 5579 return "<<Deleted Node!>>"; 5580#endif 5581 case ISD::PREFETCH: return "Prefetch"; 5582 case ISD::MEMBARRIER: return "MemBarrier"; 5583 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5584 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5585 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5586 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5587 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5588 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5589 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5590 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5591 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5592 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5593 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5594 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5595 case ISD::PCMARKER: return "PCMarker"; 5596 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5597 case ISD::SRCVALUE: return "SrcValue"; 5598 case ISD::MDNODE_SDNODE: return "MDNode"; 5599 case ISD::EntryToken: return "EntryToken"; 5600 case ISD::TokenFactor: return "TokenFactor"; 5601 case ISD::AssertSext: return "AssertSext"; 5602 case ISD::AssertZext: return "AssertZext"; 5603 5604 case ISD::BasicBlock: return "BasicBlock"; 5605 case ISD::VALUETYPE: return "ValueType"; 5606 case ISD::Register: return "Register"; 5607 5608 case ISD::Constant: return "Constant"; 5609 case ISD::ConstantFP: return "ConstantFP"; 5610 case ISD::GlobalAddress: return "GlobalAddress"; 5611 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5612 case ISD::FrameIndex: return "FrameIndex"; 5613 case ISD::JumpTable: return "JumpTable"; 5614 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5615 case ISD::RETURNADDR: return "RETURNADDR"; 5616 case ISD::FRAMEADDR: return "FRAMEADDR"; 5617 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5618 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5619 case ISD::LSDAADDR: return "LSDAADDR"; 5620 case ISD::EHSELECTION: return "EHSELECTION"; 5621 case ISD::EH_RETURN: return "EH_RETURN"; 5622 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5623 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5624 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP"; 5625 case ISD::ConstantPool: return "ConstantPool"; 5626 case ISD::ExternalSymbol: return "ExternalSymbol"; 5627 case ISD::BlockAddress: return "BlockAddress"; 5628 case ISD::INTRINSIC_WO_CHAIN: 5629 case ISD::INTRINSIC_VOID: 5630 case ISD::INTRINSIC_W_CHAIN: { 5631 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5632 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5633 if (IID < Intrinsic::num_intrinsics) 5634 return Intrinsic::getName((Intrinsic::ID)IID); 5635 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5636 return TII->getName(IID); 5637 llvm_unreachable("Invalid intrinsic ID"); 5638 } 5639 5640 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5641 case ISD::TargetConstant: return "TargetConstant"; 5642 case ISD::TargetConstantFP:return "TargetConstantFP"; 5643 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5644 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5645 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5646 case ISD::TargetJumpTable: return "TargetJumpTable"; 5647 case ISD::TargetConstantPool: return "TargetConstantPool"; 5648 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5649 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5650 5651 case ISD::CopyToReg: return "CopyToReg"; 5652 case ISD::CopyFromReg: return "CopyFromReg"; 5653 case ISD::UNDEF: return "undef"; 5654 case ISD::MERGE_VALUES: return "merge_values"; 5655 case ISD::INLINEASM: return "inlineasm"; 5656 case ISD::EH_LABEL: return "eh_label"; 5657 case ISD::HANDLENODE: return "handlenode"; 5658 5659 // Unary operators 5660 case ISD::FABS: return "fabs"; 5661 case ISD::FNEG: return "fneg"; 5662 case ISD::FSQRT: return "fsqrt"; 5663 case ISD::FSIN: return "fsin"; 5664 case ISD::FCOS: return "fcos"; 5665 case ISD::FTRUNC: return "ftrunc"; 5666 case ISD::FFLOOR: return "ffloor"; 5667 case ISD::FCEIL: return "fceil"; 5668 case ISD::FRINT: return "frint"; 5669 case ISD::FNEARBYINT: return "fnearbyint"; 5670 case ISD::FEXP: return "fexp"; 5671 case ISD::FEXP2: return "fexp2"; 5672 case ISD::FLOG: return "flog"; 5673 case ISD::FLOG2: return "flog2"; 5674 case ISD::FLOG10: return "flog10"; 5675 5676 // Binary operators 5677 case ISD::ADD: return "add"; 5678 case ISD::SUB: return "sub"; 5679 case ISD::MUL: return "mul"; 5680 case ISD::MULHU: return "mulhu"; 5681 case ISD::MULHS: return "mulhs"; 5682 case ISD::SDIV: return "sdiv"; 5683 case ISD::UDIV: return "udiv"; 5684 case ISD::SREM: return "srem"; 5685 case ISD::UREM: return "urem"; 5686 case ISD::SMUL_LOHI: return "smul_lohi"; 5687 case ISD::UMUL_LOHI: return "umul_lohi"; 5688 case ISD::SDIVREM: return "sdivrem"; 5689 case ISD::UDIVREM: return "udivrem"; 5690 case ISD::AND: return "and"; 5691 case ISD::OR: return "or"; 5692 case ISD::XOR: return "xor"; 5693 case ISD::SHL: return "shl"; 5694 case ISD::SRA: return "sra"; 5695 case ISD::SRL: return "srl"; 5696 case ISD::ROTL: return "rotl"; 5697 case ISD::ROTR: return "rotr"; 5698 case ISD::FADD: return "fadd"; 5699 case ISD::FSUB: return "fsub"; 5700 case ISD::FMUL: return "fmul"; 5701 case ISD::FDIV: return "fdiv"; 5702 case ISD::FREM: return "frem"; 5703 case ISD::FCOPYSIGN: return "fcopysign"; 5704 case ISD::FGETSIGN: return "fgetsign"; 5705 case ISD::FPOW: return "fpow"; 5706 5707 case ISD::FPOWI: return "fpowi"; 5708 case ISD::SETCC: return "setcc"; 5709 case ISD::VSETCC: return "vsetcc"; 5710 case ISD::SELECT: return "select"; 5711 case ISD::SELECT_CC: return "select_cc"; 5712 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5713 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5714 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5715 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5716 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5717 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5718 case ISD::CARRY_FALSE: return "carry_false"; 5719 case ISD::ADDC: return "addc"; 5720 case ISD::ADDE: return "adde"; 5721 case ISD::SADDO: return "saddo"; 5722 case ISD::UADDO: return "uaddo"; 5723 case ISD::SSUBO: return "ssubo"; 5724 case ISD::USUBO: return "usubo"; 5725 case ISD::SMULO: return "smulo"; 5726 case ISD::UMULO: return "umulo"; 5727 case ISD::SUBC: return "subc"; 5728 case ISD::SUBE: return "sube"; 5729 case ISD::SHL_PARTS: return "shl_parts"; 5730 case ISD::SRA_PARTS: return "sra_parts"; 5731 case ISD::SRL_PARTS: return "srl_parts"; 5732 5733 // Conversion operators. 5734 case ISD::SIGN_EXTEND: return "sign_extend"; 5735 case ISD::ZERO_EXTEND: return "zero_extend"; 5736 case ISD::ANY_EXTEND: return "any_extend"; 5737 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5738 case ISD::TRUNCATE: return "truncate"; 5739 case ISD::FP_ROUND: return "fp_round"; 5740 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5741 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5742 case ISD::FP_EXTEND: return "fp_extend"; 5743 5744 case ISD::SINT_TO_FP: return "sint_to_fp"; 5745 case ISD::UINT_TO_FP: return "uint_to_fp"; 5746 case ISD::FP_TO_SINT: return "fp_to_sint"; 5747 case ISD::FP_TO_UINT: return "fp_to_uint"; 5748 case ISD::BIT_CONVERT: return "bit_convert"; 5749 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5750 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5751 5752 case ISD::CONVERT_RNDSAT: { 5753 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5754 default: llvm_unreachable("Unknown cvt code!"); 5755 case ISD::CVT_FF: return "cvt_ff"; 5756 case ISD::CVT_FS: return "cvt_fs"; 5757 case ISD::CVT_FU: return "cvt_fu"; 5758 case ISD::CVT_SF: return "cvt_sf"; 5759 case ISD::CVT_UF: return "cvt_uf"; 5760 case ISD::CVT_SS: return "cvt_ss"; 5761 case ISD::CVT_SU: return "cvt_su"; 5762 case ISD::CVT_US: return "cvt_us"; 5763 case ISD::CVT_UU: return "cvt_uu"; 5764 } 5765 } 5766 5767 // Control flow instructions 5768 case ISD::BR: return "br"; 5769 case ISD::BRIND: return "brind"; 5770 case ISD::BR_JT: return "br_jt"; 5771 case ISD::BRCOND: return "brcond"; 5772 case ISD::BR_CC: return "br_cc"; 5773 case ISD::CALLSEQ_START: return "callseq_start"; 5774 case ISD::CALLSEQ_END: return "callseq_end"; 5775 5776 // Other operators 5777 case ISD::LOAD: return "load"; 5778 case ISD::STORE: return "store"; 5779 case ISD::VAARG: return "vaarg"; 5780 case ISD::VACOPY: return "vacopy"; 5781 case ISD::VAEND: return "vaend"; 5782 case ISD::VASTART: return "vastart"; 5783 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5784 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5785 case ISD::BUILD_PAIR: return "build_pair"; 5786 case ISD::STACKSAVE: return "stacksave"; 5787 case ISD::STACKRESTORE: return "stackrestore"; 5788 case ISD::TRAP: return "trap"; 5789 5790 // Bit manipulation 5791 case ISD::BSWAP: return "bswap"; 5792 case ISD::CTPOP: return "ctpop"; 5793 case ISD::CTTZ: return "cttz"; 5794 case ISD::CTLZ: return "ctlz"; 5795 5796 // Trampolines 5797 case ISD::TRAMPOLINE: return "trampoline"; 5798 5799 case ISD::CONDCODE: 5800 switch (cast<CondCodeSDNode>(this)->get()) { 5801 default: llvm_unreachable("Unknown setcc condition!"); 5802 case ISD::SETOEQ: return "setoeq"; 5803 case ISD::SETOGT: return "setogt"; 5804 case ISD::SETOGE: return "setoge"; 5805 case ISD::SETOLT: return "setolt"; 5806 case ISD::SETOLE: return "setole"; 5807 case ISD::SETONE: return "setone"; 5808 5809 case ISD::SETO: return "seto"; 5810 case ISD::SETUO: return "setuo"; 5811 case ISD::SETUEQ: return "setue"; 5812 case ISD::SETUGT: return "setugt"; 5813 case ISD::SETUGE: return "setuge"; 5814 case ISD::SETULT: return "setult"; 5815 case ISD::SETULE: return "setule"; 5816 case ISD::SETUNE: return "setune"; 5817 5818 case ISD::SETEQ: return "seteq"; 5819 case ISD::SETGT: return "setgt"; 5820 case ISD::SETGE: return "setge"; 5821 case ISD::SETLT: return "setlt"; 5822 case ISD::SETLE: return "setle"; 5823 case ISD::SETNE: return "setne"; 5824 } 5825 } 5826} 5827 5828const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5829 switch (AM) { 5830 default: 5831 return ""; 5832 case ISD::PRE_INC: 5833 return "<pre-inc>"; 5834 case ISD::PRE_DEC: 5835 return "<pre-dec>"; 5836 case ISD::POST_INC: 5837 return "<post-inc>"; 5838 case ISD::POST_DEC: 5839 return "<post-dec>"; 5840 } 5841} 5842 5843std::string ISD::ArgFlagsTy::getArgFlagsString() { 5844 std::string S = "< "; 5845 5846 if (isZExt()) 5847 S += "zext "; 5848 if (isSExt()) 5849 S += "sext "; 5850 if (isInReg()) 5851 S += "inreg "; 5852 if (isSRet()) 5853 S += "sret "; 5854 if (isByVal()) 5855 S += "byval "; 5856 if (isNest()) 5857 S += "nest "; 5858 if (getByValAlign()) 5859 S += "byval-align:" + utostr(getByValAlign()) + " "; 5860 if (getOrigAlign()) 5861 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5862 if (getByValSize()) 5863 S += "byval-size:" + utostr(getByValSize()) + " "; 5864 return S + ">"; 5865} 5866 5867void SDNode::dump() const { dump(0); } 5868void SDNode::dump(const SelectionDAG *G) const { 5869 print(dbgs(), G); 5870 dbgs() << '\n'; 5871} 5872 5873void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5874 OS << (void*)this << ": "; 5875 5876 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5877 if (i) OS << ","; 5878 if (getValueType(i) == MVT::Other) 5879 OS << "ch"; 5880 else 5881 OS << getValueType(i).getEVTString(); 5882 } 5883 OS << " = " << getOperationName(G); 5884} 5885 5886void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5887 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5888 if (!MN->memoperands_empty()) { 5889 OS << "<"; 5890 OS << "Mem:"; 5891 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5892 e = MN->memoperands_end(); i != e; ++i) { 5893 OS << **i; 5894 if (llvm::next(i) != e) 5895 OS << " "; 5896 } 5897 OS << ">"; 5898 } 5899 } else if (const ShuffleVectorSDNode *SVN = 5900 dyn_cast<ShuffleVectorSDNode>(this)) { 5901 OS << "<"; 5902 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5903 int Idx = SVN->getMaskElt(i); 5904 if (i) OS << ","; 5905 if (Idx < 0) 5906 OS << "u"; 5907 else 5908 OS << Idx; 5909 } 5910 OS << ">"; 5911 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5912 OS << '<' << CSDN->getAPIntValue() << '>'; 5913 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5914 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5915 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5916 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5917 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5918 else { 5919 OS << "<APFloat("; 5920 CSDN->getValueAPF().bitcastToAPInt().dump(); 5921 OS << ")>"; 5922 } 5923 } else if (const GlobalAddressSDNode *GADN = 5924 dyn_cast<GlobalAddressSDNode>(this)) { 5925 int64_t offset = GADN->getOffset(); 5926 OS << '<'; 5927 WriteAsOperand(OS, GADN->getGlobal()); 5928 OS << '>'; 5929 if (offset > 0) 5930 OS << " + " << offset; 5931 else 5932 OS << " " << offset; 5933 if (unsigned int TF = GADN->getTargetFlags()) 5934 OS << " [TF=" << TF << ']'; 5935 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5936 OS << "<" << FIDN->getIndex() << ">"; 5937 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5938 OS << "<" << JTDN->getIndex() << ">"; 5939 if (unsigned int TF = JTDN->getTargetFlags()) 5940 OS << " [TF=" << TF << ']'; 5941 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5942 int offset = CP->getOffset(); 5943 if (CP->isMachineConstantPoolEntry()) 5944 OS << "<" << *CP->getMachineCPVal() << ">"; 5945 else 5946 OS << "<" << *CP->getConstVal() << ">"; 5947 if (offset > 0) 5948 OS << " + " << offset; 5949 else 5950 OS << " " << offset; 5951 if (unsigned int TF = CP->getTargetFlags()) 5952 OS << " [TF=" << TF << ']'; 5953 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5954 OS << "<"; 5955 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5956 if (LBB) 5957 OS << LBB->getName() << " "; 5958 OS << (const void*)BBDN->getBasicBlock() << ">"; 5959 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5960 if (G && R->getReg() && 5961 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5962 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5963 } else { 5964 OS << " %reg" << R->getReg(); 5965 } 5966 } else if (const ExternalSymbolSDNode *ES = 5967 dyn_cast<ExternalSymbolSDNode>(this)) { 5968 OS << "'" << ES->getSymbol() << "'"; 5969 if (unsigned int TF = ES->getTargetFlags()) 5970 OS << " [TF=" << TF << ']'; 5971 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5972 if (M->getValue()) 5973 OS << "<" << M->getValue() << ">"; 5974 else 5975 OS << "<null>"; 5976 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 5977 if (MD->getMD()) 5978 OS << "<" << MD->getMD() << ">"; 5979 else 5980 OS << "<null>"; 5981 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5982 OS << ":" << N->getVT().getEVTString(); 5983 } 5984 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5985 OS << "<" << *LD->getMemOperand(); 5986 5987 bool doExt = true; 5988 switch (LD->getExtensionType()) { 5989 default: doExt = false; break; 5990 case ISD::EXTLOAD: OS << ", anyext"; break; 5991 case ISD::SEXTLOAD: OS << ", sext"; break; 5992 case ISD::ZEXTLOAD: OS << ", zext"; break; 5993 } 5994 if (doExt) 5995 OS << " from " << LD->getMemoryVT().getEVTString(); 5996 5997 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5998 if (*AM) 5999 OS << ", " << AM; 6000 6001 OS << ">"; 6002 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6003 OS << "<" << *ST->getMemOperand(); 6004 6005 if (ST->isTruncatingStore()) 6006 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6007 6008 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6009 if (*AM) 6010 OS << ", " << AM; 6011 6012 OS << ">"; 6013 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6014 OS << "<" << *M->getMemOperand() << ">"; 6015 } else if (const BlockAddressSDNode *BA = 6016 dyn_cast<BlockAddressSDNode>(this)) { 6017 OS << "<"; 6018 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6019 OS << ", "; 6020 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6021 OS << ">"; 6022 if (unsigned int TF = BA->getTargetFlags()) 6023 OS << " [TF=" << TF << ']'; 6024 } 6025 6026 if (G) 6027 if (unsigned Order = G->GetOrdering(this)) 6028 OS << " [ORD=" << Order << ']'; 6029 6030 if (getNodeId() != -1) 6031 OS << " [ID=" << getNodeId() << ']'; 6032 6033 DebugLoc dl = getDebugLoc(); 6034 if (G && !dl.isUnknown()) { 6035 DIScope 6036 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6037 OS << " dbg:"; 6038 // Omit the directory, since it's usually long and uninteresting. 6039 if (Scope.Verify()) 6040 OS << Scope.getFilename(); 6041 else 6042 OS << "<unknown>"; 6043 OS << ':' << dl.getLine(); 6044 if (dl.getCol() != 0) 6045 OS << ':' << dl.getCol(); 6046 } 6047} 6048 6049void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6050 print_types(OS, G); 6051 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6052 if (i) OS << ", "; else OS << " "; 6053 OS << (void*)getOperand(i).getNode(); 6054 if (unsigned RN = getOperand(i).getResNo()) 6055 OS << ":" << RN; 6056 } 6057 print_details(OS, G); 6058} 6059 6060static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6061 const SelectionDAG *G, unsigned depth, 6062 unsigned indent) 6063{ 6064 if (depth == 0) 6065 return; 6066 6067 OS.indent(indent); 6068 6069 N->print(OS, G); 6070 6071 if (depth < 1) 6072 return; 6073 6074 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6075 OS << '\n'; 6076 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6077 } 6078} 6079 6080void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6081 unsigned depth) const { 6082 printrWithDepthHelper(OS, this, G, depth, 0); 6083} 6084 6085void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6086 // Don't print impossibly deep things. 6087 printrWithDepth(OS, G, 100); 6088} 6089 6090void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6091 printrWithDepth(dbgs(), G, depth); 6092} 6093 6094void SDNode::dumprFull(const SelectionDAG *G) const { 6095 // Don't print impossibly deep things. 6096 dumprWithDepth(G, 100); 6097} 6098 6099static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6100 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6101 if (N->getOperand(i).getNode()->hasOneUse()) 6102 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6103 else 6104 dbgs() << "\n" << std::string(indent+2, ' ') 6105 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6106 6107 6108 dbgs() << "\n"; 6109 dbgs().indent(indent); 6110 N->dump(G); 6111} 6112 6113SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6114 assert(N->getNumValues() == 1 && 6115 "Can't unroll a vector with multiple results!"); 6116 6117 EVT VT = N->getValueType(0); 6118 unsigned NE = VT.getVectorNumElements(); 6119 EVT EltVT = VT.getVectorElementType(); 6120 DebugLoc dl = N->getDebugLoc(); 6121 6122 SmallVector<SDValue, 8> Scalars; 6123 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6124 6125 // If ResNE is 0, fully unroll the vector op. 6126 if (ResNE == 0) 6127 ResNE = NE; 6128 else if (NE > ResNE) 6129 NE = ResNE; 6130 6131 unsigned i; 6132 for (i= 0; i != NE; ++i) { 6133 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6134 SDValue Operand = N->getOperand(j); 6135 EVT OperandVT = Operand.getValueType(); 6136 if (OperandVT.isVector()) { 6137 // A vector operand; extract a single element. 6138 EVT OperandEltVT = OperandVT.getVectorElementType(); 6139 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6140 OperandEltVT, 6141 Operand, 6142 getConstant(i, MVT::i32)); 6143 } else { 6144 // A scalar operand; just use it as is. 6145 Operands[j] = Operand; 6146 } 6147 } 6148 6149 switch (N->getOpcode()) { 6150 default: 6151 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6152 &Operands[0], Operands.size())); 6153 break; 6154 case ISD::SHL: 6155 case ISD::SRA: 6156 case ISD::SRL: 6157 case ISD::ROTL: 6158 case ISD::ROTR: 6159 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6160 getShiftAmountOperand(Operands[1]))); 6161 break; 6162 case ISD::SIGN_EXTEND_INREG: 6163 case ISD::FP_ROUND_INREG: { 6164 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6165 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6166 Operands[0], 6167 getValueType(ExtVT))); 6168 } 6169 } 6170 } 6171 6172 for (; i < ResNE; ++i) 6173 Scalars.push_back(getUNDEF(EltVT)); 6174 6175 return getNode(ISD::BUILD_VECTOR, dl, 6176 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6177 &Scalars[0], Scalars.size()); 6178} 6179 6180 6181/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6182/// location that is 'Dist' units away from the location that the 'Base' load 6183/// is loading from. 6184bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6185 unsigned Bytes, int Dist) const { 6186 if (LD->getChain() != Base->getChain()) 6187 return false; 6188 EVT VT = LD->getValueType(0); 6189 if (VT.getSizeInBits() / 8 != Bytes) 6190 return false; 6191 6192 SDValue Loc = LD->getOperand(1); 6193 SDValue BaseLoc = Base->getOperand(1); 6194 if (Loc.getOpcode() == ISD::FrameIndex) { 6195 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6196 return false; 6197 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6198 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6199 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6200 int FS = MFI->getObjectSize(FI); 6201 int BFS = MFI->getObjectSize(BFI); 6202 if (FS != BFS || FS != (int)Bytes) return false; 6203 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6204 } 6205 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6206 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6207 if (V && (V->getSExtValue() == Dist*Bytes)) 6208 return true; 6209 } 6210 6211 const GlobalValue *GV1 = NULL; 6212 const GlobalValue *GV2 = NULL; 6213 int64_t Offset1 = 0; 6214 int64_t Offset2 = 0; 6215 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6216 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6217 if (isGA1 && isGA2 && GV1 == GV2) 6218 return Offset1 == (Offset2 + Dist*Bytes); 6219 return false; 6220} 6221 6222 6223/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6224/// it cannot be inferred. 6225unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6226 // If this is a GlobalAddress + cst, return the alignment. 6227 const GlobalValue *GV; 6228 int64_t GVOffset = 0; 6229 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6230 // If GV has specified alignment, then use it. Otherwise, use the preferred 6231 // alignment. 6232 unsigned Align = GV->getAlignment(); 6233 if (!Align) { 6234 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6235 if (GVar->hasInitializer()) { 6236 const TargetData *TD = TLI.getTargetData(); 6237 Align = TD->getPreferredAlignment(GVar); 6238 } 6239 } 6240 } 6241 return MinAlign(Align, GVOffset); 6242 } 6243 6244 // If this is a direct reference to a stack slot, use information about the 6245 // stack slot's alignment. 6246 int FrameIdx = 1 << 31; 6247 int64_t FrameOffset = 0; 6248 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6249 FrameIdx = FI->getIndex(); 6250 } else if (Ptr.getOpcode() == ISD::ADD && 6251 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6252 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6253 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6254 FrameOffset = Ptr.getConstantOperandVal(1); 6255 } 6256 6257 if (FrameIdx != (1 << 31)) { 6258 // FIXME: Handle FI+CST. 6259 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6260 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6261 FrameOffset); 6262 return FIInfoAlign; 6263 } 6264 6265 return 0; 6266} 6267 6268void SelectionDAG::dump() const { 6269 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6270 6271 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6272 I != E; ++I) { 6273 const SDNode *N = I; 6274 if (!N->hasOneUse() && N != getRoot().getNode()) 6275 DumpNodes(N, 2, this); 6276 } 6277 6278 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6279 6280 dbgs() << "\n\n"; 6281} 6282 6283void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6284 print_types(OS, G); 6285 print_details(OS, G); 6286} 6287 6288typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6289static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6290 const SelectionDAG *G, VisitedSDNodeSet &once) { 6291 if (!once.insert(N)) // If we've been here before, return now. 6292 return; 6293 6294 // Dump the current SDNode, but don't end the line yet. 6295 OS << std::string(indent, ' '); 6296 N->printr(OS, G); 6297 6298 // Having printed this SDNode, walk the children: 6299 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6300 const SDNode *child = N->getOperand(i).getNode(); 6301 6302 if (i) OS << ","; 6303 OS << " "; 6304 6305 if (child->getNumOperands() == 0) { 6306 // This child has no grandchildren; print it inline right here. 6307 child->printr(OS, G); 6308 once.insert(child); 6309 } else { // Just the address. FIXME: also print the child's opcode. 6310 OS << (void*)child; 6311 if (unsigned RN = N->getOperand(i).getResNo()) 6312 OS << ":" << RN; 6313 } 6314 } 6315 6316 OS << "\n"; 6317 6318 // Dump children that have grandchildren on their own line(s). 6319 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6320 const SDNode *child = N->getOperand(i).getNode(); 6321 DumpNodesr(OS, child, indent+2, G, once); 6322 } 6323} 6324 6325void SDNode::dumpr() const { 6326 VisitedSDNodeSet once; 6327 DumpNodesr(dbgs(), this, 0, 0, once); 6328} 6329 6330void SDNode::dumpr(const SelectionDAG *G) const { 6331 VisitedSDNodeSet once; 6332 DumpNodesr(dbgs(), this, 0, G, once); 6333} 6334 6335 6336// getAddressSpace - Return the address space this GlobalAddress belongs to. 6337unsigned GlobalAddressSDNode::getAddressSpace() const { 6338 return getGlobal()->getType()->getAddressSpace(); 6339} 6340 6341 6342const Type *ConstantPoolSDNode::getType() const { 6343 if (isMachineConstantPoolEntry()) 6344 return Val.MachineCPVal->getType(); 6345 return Val.ConstVal->getType(); 6346} 6347 6348bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6349 APInt &SplatUndef, 6350 unsigned &SplatBitSize, 6351 bool &HasAnyUndefs, 6352 unsigned MinSplatBits, 6353 bool isBigEndian) { 6354 EVT VT = getValueType(0); 6355 assert(VT.isVector() && "Expected a vector type"); 6356 unsigned sz = VT.getSizeInBits(); 6357 if (MinSplatBits > sz) 6358 return false; 6359 6360 SplatValue = APInt(sz, 0); 6361 SplatUndef = APInt(sz, 0); 6362 6363 // Get the bits. Bits with undefined values (when the corresponding element 6364 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6365 // in SplatValue. If any of the values are not constant, give up and return 6366 // false. 6367 unsigned int nOps = getNumOperands(); 6368 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6369 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6370 6371 for (unsigned j = 0; j < nOps; ++j) { 6372 unsigned i = isBigEndian ? nOps-1-j : j; 6373 SDValue OpVal = getOperand(i); 6374 unsigned BitPos = j * EltBitSize; 6375 6376 if (OpVal.getOpcode() == ISD::UNDEF) 6377 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6378 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6379 SplatValue |= APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6380 zextOrTrunc(sz) << BitPos; 6381 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6382 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6383 else 6384 return false; 6385 } 6386 6387 // The build_vector is all constants or undefs. Find the smallest element 6388 // size that splats the vector. 6389 6390 HasAnyUndefs = (SplatUndef != 0); 6391 while (sz > 8) { 6392 6393 unsigned HalfSize = sz / 2; 6394 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6395 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6396 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6397 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6398 6399 // If the two halves do not match (ignoring undef bits), stop here. 6400 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6401 MinSplatBits > HalfSize) 6402 break; 6403 6404 SplatValue = HighValue | LowValue; 6405 SplatUndef = HighUndef & LowUndef; 6406 6407 sz = HalfSize; 6408 } 6409 6410 SplatBitSize = sz; 6411 return true; 6412} 6413 6414bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6415 // Find the first non-undef value in the shuffle mask. 6416 unsigned i, e; 6417 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6418 /* search */; 6419 6420 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6421 6422 // Make sure all remaining elements are either undef or the same as the first 6423 // non-undef value. 6424 for (int Idx = Mask[i]; i != e; ++i) 6425 if (Mask[i] >= 0 && Mask[i] != Idx) 6426 return false; 6427 return true; 6428} 6429 6430#ifdef XDEBUG 6431static void checkForCyclesHelper(const SDNode *N, 6432 SmallPtrSet<const SDNode*, 32> &Visited, 6433 SmallPtrSet<const SDNode*, 32> &Checked) { 6434 // If this node has already been checked, don't check it again. 6435 if (Checked.count(N)) 6436 return; 6437 6438 // If a node has already been visited on this depth-first walk, reject it as 6439 // a cycle. 6440 if (!Visited.insert(N)) { 6441 dbgs() << "Offending node:\n"; 6442 N->dumprFull(); 6443 errs() << "Detected cycle in SelectionDAG\n"; 6444 abort(); 6445 } 6446 6447 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6448 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6449 6450 Checked.insert(N); 6451 Visited.erase(N); 6452} 6453#endif 6454 6455void llvm::checkForCycles(const llvm::SDNode *N) { 6456#ifdef XDEBUG 6457 assert(N && "Checking nonexistant SDNode"); 6458 SmallPtrSet<const SDNode*, 32> visited; 6459 SmallPtrSet<const SDNode*, 32> checked; 6460 checkForCyclesHelper(N, visited, checked); 6461#endif 6462} 6463 6464void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6465 checkForCycles(DAG->getRoot().getNode()); 6466} 6467