SelectionDAG.cpp revision de6e783b2490447866b592cd39855e6f4d25efff
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/ValueTracking.h" 19#include "llvm/Function.h" 20#include "llvm/GlobalAlias.h" 21#include "llvm/GlobalVariable.h" 22#include "llvm/Intrinsics.h" 23#include "llvm/DerivedTypes.h" 24#include "llvm/Assembly/Writer.h" 25#include "llvm/CallingConv.h" 26#include "llvm/CodeGen/MachineBasicBlock.h" 27#include "llvm/CodeGen/MachineConstantPool.h" 28#include "llvm/CodeGen/MachineFrameInfo.h" 29#include "llvm/CodeGen/MachineModuleInfo.h" 30#include "llvm/CodeGen/PseudoSourceValue.h" 31#include "llvm/Target/TargetRegisterInfo.h" 32#include "llvm/Target/TargetData.h" 33#include "llvm/Target/TargetFrameInfo.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetOptions.h" 36#include "llvm/Target/TargetInstrInfo.h" 37#include "llvm/Target/TargetIntrinsicInfo.h" 38#include "llvm/Target/TargetMachine.h" 39#include "llvm/Support/CommandLine.h" 40#include "llvm/Support/Debug.h" 41#include "llvm/Support/ErrorHandling.h" 42#include "llvm/Support/ManagedStatic.h" 43#include "llvm/Support/MathExtras.h" 44#include "llvm/Support/raw_ostream.h" 45#include "llvm/System/Mutex.h" 46#include "llvm/ADT/SetVector.h" 47#include "llvm/ADT/SmallPtrSet.h" 48#include "llvm/ADT/SmallSet.h" 49#include "llvm/ADT/SmallVector.h" 50#include "llvm/ADT/StringExtras.h" 51#include <algorithm> 52#include <cmath> 53using namespace llvm; 54 55/// makeVTList - Return an instance of the SDVTList struct initialized with the 56/// specified members. 57static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 59 return Res; 60} 61 62static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 63 switch (VT.getSimpleVT().SimpleTy) { 64 default: llvm_unreachable("Unknown FP format"); 65 case MVT::f32: return &APFloat::IEEEsingle; 66 case MVT::f64: return &APFloat::IEEEdouble; 67 case MVT::f80: return &APFloat::x87DoubleExtended; 68 case MVT::f128: return &APFloat::IEEEquad; 69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 70 } 71} 72 73SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 74 75//===----------------------------------------------------------------------===// 76// ConstantFPSDNode Class 77//===----------------------------------------------------------------------===// 78 79/// isExactlyValue - We don't rely on operator== working on double values, as 80/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 81/// As such, this method can be used to do an exact bit-for-bit comparison of 82/// two floating point values. 83bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 84 return getValueAPF().bitwiseIsEqual(V); 85} 86 87bool ConstantFPSDNode::isValueValidForType(EVT VT, 88 const APFloat& Val) { 89 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 90 91 // PPC long double cannot be converted to any other type. 92 if (VT == MVT::ppcf128 || 93 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 94 return false; 95 96 // convert modifies in place, so make a copy. 97 APFloat Val2 = APFloat(Val); 98 bool losesInfo; 99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 100 &losesInfo); 101 return !losesInfo; 102} 103 104//===----------------------------------------------------------------------===// 105// ISD Namespace 106//===----------------------------------------------------------------------===// 107 108/// isBuildVectorAllOnes - Return true if the specified node is a 109/// BUILD_VECTOR where all of the elements are ~0 or undef. 110bool ISD::isBuildVectorAllOnes(const SDNode *N) { 111 // Look through a bit convert. 112 if (N->getOpcode() == ISD::BIT_CONVERT) 113 N = N->getOperand(0).getNode(); 114 115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 116 117 unsigned i = 0, e = N->getNumOperands(); 118 119 // Skip over all of the undef values. 120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 121 ++i; 122 123 // Do not accept an all-undef vector. 124 if (i == e) return false; 125 126 // Do not accept build_vectors that aren't all constants or which have non-~0 127 // elements. 128 SDValue NotZero = N->getOperand(i); 129 if (isa<ConstantSDNode>(NotZero)) { 130 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 131 return false; 132 } else if (isa<ConstantFPSDNode>(NotZero)) { 133 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 134 bitcastToAPInt().isAllOnesValue()) 135 return false; 136 } else 137 return false; 138 139 // Okay, we have at least one ~0 value, check to see if the rest match or are 140 // undefs. 141 for (++i; i != e; ++i) 142 if (N->getOperand(i) != NotZero && 143 N->getOperand(i).getOpcode() != ISD::UNDEF) 144 return false; 145 return true; 146} 147 148 149/// isBuildVectorAllZeros - Return true if the specified node is a 150/// BUILD_VECTOR where all of the elements are 0 or undef. 151bool ISD::isBuildVectorAllZeros(const SDNode *N) { 152 // Look through a bit convert. 153 if (N->getOpcode() == ISD::BIT_CONVERT) 154 N = N->getOperand(0).getNode(); 155 156 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 157 158 unsigned i = 0, e = N->getNumOperands(); 159 160 // Skip over all of the undef values. 161 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 162 ++i; 163 164 // Do not accept an all-undef vector. 165 if (i == e) return false; 166 167 // Do not accept build_vectors that aren't all constants or which have non-0 168 // elements. 169 SDValue Zero = N->getOperand(i); 170 if (isa<ConstantSDNode>(Zero)) { 171 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 172 return false; 173 } else if (isa<ConstantFPSDNode>(Zero)) { 174 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 175 return false; 176 } else 177 return false; 178 179 // Okay, we have at least one 0 value, check to see if the rest match or are 180 // undefs. 181 for (++i; i != e; ++i) 182 if (N->getOperand(i) != Zero && 183 N->getOperand(i).getOpcode() != ISD::UNDEF) 184 return false; 185 return true; 186} 187 188/// isScalarToVector - Return true if the specified node is a 189/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 190/// element is not an undef. 191bool ISD::isScalarToVector(const SDNode *N) { 192 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 193 return true; 194 195 if (N->getOpcode() != ISD::BUILD_VECTOR) 196 return false; 197 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 198 return false; 199 unsigned NumElems = N->getNumOperands(); 200 for (unsigned i = 1; i < NumElems; ++i) { 201 SDValue V = N->getOperand(i); 202 if (V.getOpcode() != ISD::UNDEF) 203 return false; 204 } 205 return true; 206} 207 208/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 209/// when given the operation for (X op Y). 210ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 211 // To perform this operation, we just need to swap the L and G bits of the 212 // operation. 213 unsigned OldL = (Operation >> 2) & 1; 214 unsigned OldG = (Operation >> 1) & 1; 215 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 216 (OldL << 1) | // New G bit 217 (OldG << 2)); // New L bit. 218} 219 220/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 221/// 'op' is a valid SetCC operation. 222ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 223 unsigned Operation = Op; 224 if (isInteger) 225 Operation ^= 7; // Flip L, G, E bits, but not U. 226 else 227 Operation ^= 15; // Flip all of the condition bits. 228 229 if (Operation > ISD::SETTRUE2) 230 Operation &= ~8; // Don't let N and U bits get set. 231 232 return ISD::CondCode(Operation); 233} 234 235 236/// isSignedOp - For an integer comparison, return 1 if the comparison is a 237/// signed operation and 2 if the result is an unsigned comparison. Return zero 238/// if the operation does not depend on the sign of the input (setne and seteq). 239static int isSignedOp(ISD::CondCode Opcode) { 240 switch (Opcode) { 241 default: llvm_unreachable("Illegal integer setcc operation!"); 242 case ISD::SETEQ: 243 case ISD::SETNE: return 0; 244 case ISD::SETLT: 245 case ISD::SETLE: 246 case ISD::SETGT: 247 case ISD::SETGE: return 1; 248 case ISD::SETULT: 249 case ISD::SETULE: 250 case ISD::SETUGT: 251 case ISD::SETUGE: return 2; 252 } 253} 254 255/// getSetCCOrOperation - Return the result of a logical OR between different 256/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 257/// returns SETCC_INVALID if it is not possible to represent the resultant 258/// comparison. 259ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 260 bool isInteger) { 261 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 262 // Cannot fold a signed integer setcc with an unsigned integer setcc. 263 return ISD::SETCC_INVALID; 264 265 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 266 267 // If the N and U bits get set then the resultant comparison DOES suddenly 268 // care about orderedness, and is true when ordered. 269 if (Op > ISD::SETTRUE2) 270 Op &= ~16; // Clear the U bit if the N bit is set. 271 272 // Canonicalize illegal integer setcc's. 273 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 274 Op = ISD::SETNE; 275 276 return ISD::CondCode(Op); 277} 278 279/// getSetCCAndOperation - Return the result of a logical AND between different 280/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 281/// function returns zero if it is not possible to represent the resultant 282/// comparison. 283ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 284 bool isInteger) { 285 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 286 // Cannot fold a signed setcc with an unsigned setcc. 287 return ISD::SETCC_INVALID; 288 289 // Combine all of the condition bits. 290 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 291 292 // Canonicalize illegal integer setcc's. 293 if (isInteger) { 294 switch (Result) { 295 default: break; 296 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 297 case ISD::SETOEQ: // SETEQ & SETU[LG]E 298 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 299 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 300 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 301 } 302 } 303 304 return Result; 305} 306 307const TargetMachine &SelectionDAG::getTarget() const { 308 return MF->getTarget(); 309} 310 311//===----------------------------------------------------------------------===// 312// SDNode Profile Support 313//===----------------------------------------------------------------------===// 314 315/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 316/// 317static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 318 ID.AddInteger(OpC); 319} 320 321/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 322/// solely with their pointer. 323static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 324 ID.AddPointer(VTList.VTs); 325} 326 327/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 328/// 329static void AddNodeIDOperands(FoldingSetNodeID &ID, 330 const SDValue *Ops, unsigned NumOps) { 331 for (; NumOps; --NumOps, ++Ops) { 332 ID.AddPointer(Ops->getNode()); 333 ID.AddInteger(Ops->getResNo()); 334 } 335} 336 337/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 338/// 339static void AddNodeIDOperands(FoldingSetNodeID &ID, 340 const SDUse *Ops, unsigned NumOps) { 341 for (; NumOps; --NumOps, ++Ops) { 342 ID.AddPointer(Ops->getNode()); 343 ID.AddInteger(Ops->getResNo()); 344 } 345} 346 347static void AddNodeIDNode(FoldingSetNodeID &ID, 348 unsigned short OpC, SDVTList VTList, 349 const SDValue *OpList, unsigned N) { 350 AddNodeIDOpcode(ID, OpC); 351 AddNodeIDValueTypes(ID, VTList); 352 AddNodeIDOperands(ID, OpList, N); 353} 354 355/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 356/// the NodeID data. 357static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 358 switch (N->getOpcode()) { 359 case ISD::TargetExternalSymbol: 360 case ISD::ExternalSymbol: 361 llvm_unreachable("Should only be used on nodes with operands"); 362 default: break; // Normal nodes don't need extra info. 363 case ISD::TargetConstant: 364 case ISD::Constant: 365 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 366 break; 367 case ISD::TargetConstantFP: 368 case ISD::ConstantFP: { 369 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 370 break; 371 } 372 case ISD::TargetGlobalAddress: 373 case ISD::GlobalAddress: 374 case ISD::TargetGlobalTLSAddress: 375 case ISD::GlobalTLSAddress: { 376 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 377 ID.AddPointer(GA->getGlobal()); 378 ID.AddInteger(GA->getOffset()); 379 ID.AddInteger(GA->getTargetFlags()); 380 break; 381 } 382 case ISD::BasicBlock: 383 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 384 break; 385 case ISD::Register: 386 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 387 break; 388 389 case ISD::SRCVALUE: 390 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 391 break; 392 case ISD::FrameIndex: 393 case ISD::TargetFrameIndex: 394 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 395 break; 396 case ISD::JumpTable: 397 case ISD::TargetJumpTable: 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 399 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 400 break; 401 case ISD::ConstantPool: 402 case ISD::TargetConstantPool: { 403 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 404 ID.AddInteger(CP->getAlignment()); 405 ID.AddInteger(CP->getOffset()); 406 if (CP->isMachineConstantPoolEntry()) 407 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 408 else 409 ID.AddPointer(CP->getConstVal()); 410 ID.AddInteger(CP->getTargetFlags()); 411 break; 412 } 413 case ISD::LOAD: { 414 const LoadSDNode *LD = cast<LoadSDNode>(N); 415 ID.AddInteger(LD->getMemoryVT().getRawBits()); 416 ID.AddInteger(LD->getRawSubclassData()); 417 break; 418 } 419 case ISD::STORE: { 420 const StoreSDNode *ST = cast<StoreSDNode>(N); 421 ID.AddInteger(ST->getMemoryVT().getRawBits()); 422 ID.AddInteger(ST->getRawSubclassData()); 423 break; 424 } 425 case ISD::ATOMIC_CMP_SWAP: 426 case ISD::ATOMIC_SWAP: 427 case ISD::ATOMIC_LOAD_ADD: 428 case ISD::ATOMIC_LOAD_SUB: 429 case ISD::ATOMIC_LOAD_AND: 430 case ISD::ATOMIC_LOAD_OR: 431 case ISD::ATOMIC_LOAD_XOR: 432 case ISD::ATOMIC_LOAD_NAND: 433 case ISD::ATOMIC_LOAD_MIN: 434 case ISD::ATOMIC_LOAD_MAX: 435 case ISD::ATOMIC_LOAD_UMIN: 436 case ISD::ATOMIC_LOAD_UMAX: { 437 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 438 ID.AddInteger(AT->getMemoryVT().getRawBits()); 439 ID.AddInteger(AT->getRawSubclassData()); 440 break; 441 } 442 case ISD::VECTOR_SHUFFLE: { 443 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 444 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 445 i != e; ++i) 446 ID.AddInteger(SVN->getMaskElt(i)); 447 break; 448 } 449 case ISD::TargetBlockAddress: 450 case ISD::BlockAddress: { 451 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 452 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 453 break; 454 } 455 } // end switch (N->getOpcode()) 456} 457 458/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 459/// data. 460static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 461 AddNodeIDOpcode(ID, N->getOpcode()); 462 // Add the return value info. 463 AddNodeIDValueTypes(ID, N->getVTList()); 464 // Add the operand info. 465 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 466 467 // Handle SDNode leafs with special info. 468 AddNodeIDCustom(ID, N); 469} 470 471/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 472/// the CSE map that carries volatility, temporalness, indexing mode, and 473/// extension/truncation information. 474/// 475static inline unsigned 476encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 477 bool isNonTemporal) { 478 assert((ConvType & 3) == ConvType && 479 "ConvType may not require more than 2 bits!"); 480 assert((AM & 7) == AM && 481 "AM may not require more than 3 bits!"); 482 return ConvType | 483 (AM << 2) | 484 (isVolatile << 5) | 485 (isNonTemporal << 6); 486} 487 488//===----------------------------------------------------------------------===// 489// SelectionDAG Class 490//===----------------------------------------------------------------------===// 491 492/// doNotCSE - Return true if CSE should not be performed for this node. 493static bool doNotCSE(SDNode *N) { 494 if (N->getValueType(0) == MVT::Flag) 495 return true; // Never CSE anything that produces a flag. 496 497 switch (N->getOpcode()) { 498 default: break; 499 case ISD::HANDLENODE: 500 case ISD::EH_LABEL: 501 return true; // Never CSE these nodes. 502 } 503 504 // Check that remaining values produced are not flags. 505 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 506 if (N->getValueType(i) == MVT::Flag) 507 return true; // Never CSE anything that produces a flag. 508 509 return false; 510} 511 512/// RemoveDeadNodes - This method deletes all unreachable nodes in the 513/// SelectionDAG. 514void SelectionDAG::RemoveDeadNodes() { 515 // Create a dummy node (which is not added to allnodes), that adds a reference 516 // to the root node, preventing it from being deleted. 517 HandleSDNode Dummy(getRoot()); 518 519 SmallVector<SDNode*, 128> DeadNodes; 520 521 // Add all obviously-dead nodes to the DeadNodes worklist. 522 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 523 if (I->use_empty()) 524 DeadNodes.push_back(I); 525 526 RemoveDeadNodes(DeadNodes); 527 528 // If the root changed (e.g. it was a dead load, update the root). 529 setRoot(Dummy.getValue()); 530} 531 532/// RemoveDeadNodes - This method deletes the unreachable nodes in the 533/// given list, and any nodes that become unreachable as a result. 534void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 535 DAGUpdateListener *UpdateListener) { 536 537 // Process the worklist, deleting the nodes and adding their uses to the 538 // worklist. 539 while (!DeadNodes.empty()) { 540 SDNode *N = DeadNodes.pop_back_val(); 541 542 if (UpdateListener) 543 UpdateListener->NodeDeleted(N, 0); 544 545 // Take the node out of the appropriate CSE map. 546 RemoveNodeFromCSEMaps(N); 547 548 // Next, brutally remove the operand list. This is safe to do, as there are 549 // no cycles in the graph. 550 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 551 SDUse &Use = *I++; 552 SDNode *Operand = Use.getNode(); 553 Use.set(SDValue()); 554 555 // Now that we removed this operand, see if there are no uses of it left. 556 if (Operand->use_empty()) 557 DeadNodes.push_back(Operand); 558 } 559 560 DeallocateNode(N); 561 } 562} 563 564void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 565 SmallVector<SDNode*, 16> DeadNodes(1, N); 566 RemoveDeadNodes(DeadNodes, UpdateListener); 567} 568 569void SelectionDAG::DeleteNode(SDNode *N) { 570 // First take this out of the appropriate CSE map. 571 RemoveNodeFromCSEMaps(N); 572 573 // Finally, remove uses due to operands of this node, remove from the 574 // AllNodes list, and delete the node. 575 DeleteNodeNotInCSEMaps(N); 576} 577 578void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 579 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 580 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 581 582 // Drop all of the operands and decrement used node's use counts. 583 N->DropOperands(); 584 585 DeallocateNode(N); 586} 587 588void SelectionDAG::DeallocateNode(SDNode *N) { 589 if (N->OperandsNeedDelete) 590 delete[] N->OperandList; 591 592 // Set the opcode to DELETED_NODE to help catch bugs when node 593 // memory is reallocated. 594 N->NodeType = ISD::DELETED_NODE; 595 596 NodeAllocator.Deallocate(AllNodes.remove(N)); 597 598 // Remove the ordering of this node. 599 Ordering->remove(N); 600 601 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 602 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 603 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 604 DbgVals[i]->setIsInvalidated(); 605} 606 607/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 608/// correspond to it. This is useful when we're about to delete or repurpose 609/// the node. We don't want future request for structurally identical nodes 610/// to return N anymore. 611bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 612 bool Erased = false; 613 switch (N->getOpcode()) { 614 case ISD::EntryToken: 615 llvm_unreachable("EntryToken should not be in CSEMaps!"); 616 return false; 617 case ISD::HANDLENODE: return false; // noop. 618 case ISD::CONDCODE: 619 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 620 "Cond code doesn't exist!"); 621 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 622 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 623 break; 624 case ISD::ExternalSymbol: 625 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 626 break; 627 case ISD::TargetExternalSymbol: { 628 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 629 Erased = TargetExternalSymbols.erase( 630 std::pair<std::string,unsigned char>(ESN->getSymbol(), 631 ESN->getTargetFlags())); 632 break; 633 } 634 case ISD::VALUETYPE: { 635 EVT VT = cast<VTSDNode>(N)->getVT(); 636 if (VT.isExtended()) { 637 Erased = ExtendedValueTypeNodes.erase(VT); 638 } else { 639 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 640 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 641 } 642 break; 643 } 644 default: 645 // Remove it from the CSE Map. 646 Erased = CSEMap.RemoveNode(N); 647 break; 648 } 649#ifndef NDEBUG 650 // Verify that the node was actually in one of the CSE maps, unless it has a 651 // flag result (which cannot be CSE'd) or is one of the special cases that are 652 // not subject to CSE. 653 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 654 !N->isMachineOpcode() && !doNotCSE(N)) { 655 N->dump(this); 656 dbgs() << "\n"; 657 llvm_unreachable("Node is not in map!"); 658 } 659#endif 660 return Erased; 661} 662 663/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 664/// maps and modified in place. Add it back to the CSE maps, unless an identical 665/// node already exists, in which case transfer all its users to the existing 666/// node. This transfer can potentially trigger recursive merging. 667/// 668void 669SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 670 DAGUpdateListener *UpdateListener) { 671 // For node types that aren't CSE'd, just act as if no identical node 672 // already exists. 673 if (!doNotCSE(N)) { 674 SDNode *Existing = CSEMap.GetOrInsertNode(N); 675 if (Existing != N) { 676 // If there was already an existing matching node, use ReplaceAllUsesWith 677 // to replace the dead one with the existing one. This can cause 678 // recursive merging of other unrelated nodes down the line. 679 ReplaceAllUsesWith(N, Existing, UpdateListener); 680 681 // N is now dead. Inform the listener if it exists and delete it. 682 if (UpdateListener) 683 UpdateListener->NodeDeleted(N, Existing); 684 DeleteNodeNotInCSEMaps(N); 685 return; 686 } 687 } 688 689 // If the node doesn't already exist, we updated it. Inform a listener if 690 // it exists. 691 if (UpdateListener) 692 UpdateListener->NodeUpdated(N); 693} 694 695/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 696/// were replaced with those specified. If this node is never memoized, 697/// return null, otherwise return a pointer to the slot it would take. If a 698/// node already exists with these operands, the slot will be non-null. 699SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 700 void *&InsertPos) { 701 if (doNotCSE(N)) 702 return 0; 703 704 SDValue Ops[] = { Op }; 705 FoldingSetNodeID ID; 706 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 707 AddNodeIDCustom(ID, N); 708 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 709 return Node; 710} 711 712/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 713/// were replaced with those specified. If this node is never memoized, 714/// return null, otherwise return a pointer to the slot it would take. If a 715/// node already exists with these operands, the slot will be non-null. 716SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 717 SDValue Op1, SDValue Op2, 718 void *&InsertPos) { 719 if (doNotCSE(N)) 720 return 0; 721 722 SDValue Ops[] = { Op1, Op2 }; 723 FoldingSetNodeID ID; 724 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 725 AddNodeIDCustom(ID, N); 726 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 727 return Node; 728} 729 730 731/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 732/// were replaced with those specified. If this node is never memoized, 733/// return null, otherwise return a pointer to the slot it would take. If a 734/// node already exists with these operands, the slot will be non-null. 735SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 736 const SDValue *Ops,unsigned NumOps, 737 void *&InsertPos) { 738 if (doNotCSE(N)) 739 return 0; 740 741 FoldingSetNodeID ID; 742 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 743 AddNodeIDCustom(ID, N); 744 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 745 return Node; 746} 747 748/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 749void SelectionDAG::VerifyNode(SDNode *N) { 750 switch (N->getOpcode()) { 751 default: 752 break; 753 case ISD::BUILD_PAIR: { 754 EVT VT = N->getValueType(0); 755 assert(N->getNumValues() == 1 && "Too many results!"); 756 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 757 "Wrong return type!"); 758 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 759 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 760 "Mismatched operand types!"); 761 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 762 "Wrong operand type!"); 763 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 764 "Wrong return type size"); 765 break; 766 } 767 case ISD::BUILD_VECTOR: { 768 assert(N->getNumValues() == 1 && "Too many results!"); 769 assert(N->getValueType(0).isVector() && "Wrong return type!"); 770 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 771 "Wrong number of operands!"); 772 EVT EltVT = N->getValueType(0).getVectorElementType(); 773 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 774 assert((I->getValueType() == EltVT || 775 (EltVT.isInteger() && I->getValueType().isInteger() && 776 EltVT.bitsLE(I->getValueType()))) && 777 "Wrong operand type!"); 778 break; 779 } 780 } 781} 782 783/// getEVTAlignment - Compute the default alignment value for the 784/// given type. 785/// 786unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 787 const Type *Ty = VT == MVT::iPTR ? 788 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 789 VT.getTypeForEVT(*getContext()); 790 791 return TLI.getTargetData()->getABITypeAlignment(Ty); 792} 793 794// EntryNode could meaningfully have debug info if we can find it... 795SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 796 : TLI(tli), FLI(fli), 797 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 798 Root(getEntryNode()), Ordering(0) { 799 AllNodes.push_back(&EntryNode); 800 Ordering = new SDNodeOrdering(); 801 DbgInfo = new SDDbgInfo(); 802} 803 804void SelectionDAG::init(MachineFunction &mf) { 805 MF = &mf; 806 MMI = &mf.getMMI(); 807 Context = &mf.getFunction()->getContext(); 808} 809 810SelectionDAG::~SelectionDAG() { 811 allnodes_clear(); 812 delete Ordering; 813 DbgInfo->clear(); 814 delete DbgInfo; 815} 816 817void SelectionDAG::allnodes_clear() { 818 assert(&*AllNodes.begin() == &EntryNode); 819 AllNodes.remove(AllNodes.begin()); 820 while (!AllNodes.empty()) 821 DeallocateNode(AllNodes.begin()); 822} 823 824void SelectionDAG::clear() { 825 allnodes_clear(); 826 OperandAllocator.Reset(); 827 CSEMap.clear(); 828 829 ExtendedValueTypeNodes.clear(); 830 ExternalSymbols.clear(); 831 TargetExternalSymbols.clear(); 832 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 833 static_cast<CondCodeSDNode*>(0)); 834 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 835 static_cast<SDNode*>(0)); 836 837 EntryNode.UseList = 0; 838 AllNodes.push_back(&EntryNode); 839 Root = getEntryNode(); 840 delete Ordering; 841 Ordering = new SDNodeOrdering(); 842 DbgInfo->clear(); 843 delete DbgInfo; 844 DbgInfo = new SDDbgInfo(); 845} 846 847SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 848 return VT.bitsGT(Op.getValueType()) ? 849 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 850 getNode(ISD::TRUNCATE, DL, VT, Op); 851} 852 853SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 854 return VT.bitsGT(Op.getValueType()) ? 855 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 856 getNode(ISD::TRUNCATE, DL, VT, Op); 857} 858 859SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 860 assert(!VT.isVector() && 861 "getZeroExtendInReg should use the vector element type instead of " 862 "the vector type!"); 863 if (Op.getValueType() == VT) return Op; 864 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 865 APInt Imm = APInt::getLowBitsSet(BitWidth, 866 VT.getSizeInBits()); 867 return getNode(ISD::AND, DL, Op.getValueType(), Op, 868 getConstant(Imm, Op.getValueType())); 869} 870 871/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 872/// 873SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 874 EVT EltVT = VT.getScalarType(); 875 SDValue NegOne = 876 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 877 return getNode(ISD::XOR, DL, VT, Val, NegOne); 878} 879 880SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 881 EVT EltVT = VT.getScalarType(); 882 assert((EltVT.getSizeInBits() >= 64 || 883 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 884 "getConstant with a uint64_t value that doesn't fit in the type!"); 885 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 886} 887 888SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 889 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 890} 891 892SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 893 assert(VT.isInteger() && "Cannot create FP integer constant!"); 894 895 EVT EltVT = VT.getScalarType(); 896 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 897 "APInt size does not match type size!"); 898 899 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 900 FoldingSetNodeID ID; 901 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 902 ID.AddPointer(&Val); 903 void *IP = 0; 904 SDNode *N = NULL; 905 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 906 if (!VT.isVector()) 907 return SDValue(N, 0); 908 909 if (!N) { 910 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 911 CSEMap.InsertNode(N, IP); 912 AllNodes.push_back(N); 913 } 914 915 SDValue Result(N, 0); 916 if (VT.isVector()) { 917 SmallVector<SDValue, 8> Ops; 918 Ops.assign(VT.getVectorNumElements(), Result); 919 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 920 } 921 return Result; 922} 923 924SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 925 return getConstant(Val, TLI.getPointerTy(), isTarget); 926} 927 928 929SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 930 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 931} 932 933SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 934 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 935 936 EVT EltVT = VT.getScalarType(); 937 938 // Do the map lookup using the actual bit pattern for the floating point 939 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 940 // we don't have issues with SNANs. 941 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 942 FoldingSetNodeID ID; 943 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 944 ID.AddPointer(&V); 945 void *IP = 0; 946 SDNode *N = NULL; 947 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 948 if (!VT.isVector()) 949 return SDValue(N, 0); 950 951 if (!N) { 952 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 953 CSEMap.InsertNode(N, IP); 954 AllNodes.push_back(N); 955 } 956 957 SDValue Result(N, 0); 958 if (VT.isVector()) { 959 SmallVector<SDValue, 8> Ops; 960 Ops.assign(VT.getVectorNumElements(), Result); 961 // FIXME DebugLoc info might be appropriate here 962 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 963 } 964 return Result; 965} 966 967SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 968 EVT EltVT = VT.getScalarType(); 969 if (EltVT==MVT::f32) 970 return getConstantFP(APFloat((float)Val), VT, isTarget); 971 else 972 return getConstantFP(APFloat(Val), VT, isTarget); 973} 974 975SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 976 EVT VT, int64_t Offset, 977 bool isTargetGA, 978 unsigned char TargetFlags) { 979 assert((TargetFlags == 0 || isTargetGA) && 980 "Cannot set target flags on target-independent globals"); 981 982 // Truncate (with sign-extension) the offset value to the pointer size. 983 EVT PTy = TLI.getPointerTy(); 984 unsigned BitWidth = PTy.getSizeInBits(); 985 if (BitWidth < 64) 986 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 987 988 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 989 if (!GVar) { 990 // If GV is an alias then use the aliasee for determining thread-localness. 991 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 992 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 993 } 994 995 unsigned Opc; 996 if (GVar && GVar->isThreadLocal()) 997 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 998 else 999 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1000 1001 FoldingSetNodeID ID; 1002 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1003 ID.AddPointer(GV); 1004 ID.AddInteger(Offset); 1005 ID.AddInteger(TargetFlags); 1006 void *IP = 0; 1007 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1008 return SDValue(E, 0); 1009 1010 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, GV, VT, 1011 Offset, TargetFlags); 1012 CSEMap.InsertNode(N, IP); 1013 AllNodes.push_back(N); 1014 return SDValue(N, 0); 1015} 1016 1017SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1018 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1019 FoldingSetNodeID ID; 1020 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1021 ID.AddInteger(FI); 1022 void *IP = 0; 1023 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1024 return SDValue(E, 0); 1025 1026 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1027 CSEMap.InsertNode(N, IP); 1028 AllNodes.push_back(N); 1029 return SDValue(N, 0); 1030} 1031 1032SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1033 unsigned char TargetFlags) { 1034 assert((TargetFlags == 0 || isTarget) && 1035 "Cannot set target flags on target-independent jump tables"); 1036 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1037 FoldingSetNodeID ID; 1038 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1039 ID.AddInteger(JTI); 1040 ID.AddInteger(TargetFlags); 1041 void *IP = 0; 1042 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1043 return SDValue(E, 0); 1044 1045 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1046 TargetFlags); 1047 CSEMap.InsertNode(N, IP); 1048 AllNodes.push_back(N); 1049 return SDValue(N, 0); 1050} 1051 1052SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT, 1053 unsigned Alignment, int Offset, 1054 bool isTarget, 1055 unsigned char TargetFlags) { 1056 assert((TargetFlags == 0 || isTarget) && 1057 "Cannot set target flags on target-independent globals"); 1058 if (Alignment == 0) 1059 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1060 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1061 FoldingSetNodeID ID; 1062 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1063 ID.AddInteger(Alignment); 1064 ID.AddInteger(Offset); 1065 ID.AddPointer(C); 1066 ID.AddInteger(TargetFlags); 1067 void *IP = 0; 1068 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1069 return SDValue(E, 0); 1070 1071 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1072 Alignment, TargetFlags); 1073 CSEMap.InsertNode(N, IP); 1074 AllNodes.push_back(N); 1075 return SDValue(N, 0); 1076} 1077 1078 1079SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1080 unsigned Alignment, int Offset, 1081 bool isTarget, 1082 unsigned char TargetFlags) { 1083 assert((TargetFlags == 0 || isTarget) && 1084 "Cannot set target flags on target-independent globals"); 1085 if (Alignment == 0) 1086 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1087 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1088 FoldingSetNodeID ID; 1089 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1090 ID.AddInteger(Alignment); 1091 ID.AddInteger(Offset); 1092 C->AddSelectionDAGCSEId(ID); 1093 ID.AddInteger(TargetFlags); 1094 void *IP = 0; 1095 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1096 return SDValue(E, 0); 1097 1098 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1099 Alignment, TargetFlags); 1100 CSEMap.InsertNode(N, IP); 1101 AllNodes.push_back(N); 1102 return SDValue(N, 0); 1103} 1104 1105SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1106 FoldingSetNodeID ID; 1107 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1108 ID.AddPointer(MBB); 1109 void *IP = 0; 1110 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1111 return SDValue(E, 0); 1112 1113 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1114 CSEMap.InsertNode(N, IP); 1115 AllNodes.push_back(N); 1116 return SDValue(N, 0); 1117} 1118 1119SDValue SelectionDAG::getValueType(EVT VT) { 1120 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1121 ValueTypeNodes.size()) 1122 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1123 1124 SDNode *&N = VT.isExtended() ? 1125 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1126 1127 if (N) return SDValue(N, 0); 1128 N = new (NodeAllocator) VTSDNode(VT); 1129 AllNodes.push_back(N); 1130 return SDValue(N, 0); 1131} 1132 1133SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1134 SDNode *&N = ExternalSymbols[Sym]; 1135 if (N) return SDValue(N, 0); 1136 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1137 AllNodes.push_back(N); 1138 return SDValue(N, 0); 1139} 1140 1141SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1142 unsigned char TargetFlags) { 1143 SDNode *&N = 1144 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1145 TargetFlags)]; 1146 if (N) return SDValue(N, 0); 1147 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1148 AllNodes.push_back(N); 1149 return SDValue(N, 0); 1150} 1151 1152SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1153 if ((unsigned)Cond >= CondCodeNodes.size()) 1154 CondCodeNodes.resize(Cond+1); 1155 1156 if (CondCodeNodes[Cond] == 0) { 1157 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1158 CondCodeNodes[Cond] = N; 1159 AllNodes.push_back(N); 1160 } 1161 1162 return SDValue(CondCodeNodes[Cond], 0); 1163} 1164 1165// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1166// the shuffle mask M that point at N1 to point at N2, and indices that point 1167// N2 to point at N1. 1168static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1169 std::swap(N1, N2); 1170 int NElts = M.size(); 1171 for (int i = 0; i != NElts; ++i) { 1172 if (M[i] >= NElts) 1173 M[i] -= NElts; 1174 else if (M[i] >= 0) 1175 M[i] += NElts; 1176 } 1177} 1178 1179SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1180 SDValue N2, const int *Mask) { 1181 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1182 assert(VT.isVector() && N1.getValueType().isVector() && 1183 "Vector Shuffle VTs must be a vectors"); 1184 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1185 && "Vector Shuffle VTs must have same element type"); 1186 1187 // Canonicalize shuffle undef, undef -> undef 1188 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1189 return getUNDEF(VT); 1190 1191 // Validate that all indices in Mask are within the range of the elements 1192 // input to the shuffle. 1193 unsigned NElts = VT.getVectorNumElements(); 1194 SmallVector<int, 8> MaskVec; 1195 for (unsigned i = 0; i != NElts; ++i) { 1196 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1197 MaskVec.push_back(Mask[i]); 1198 } 1199 1200 // Canonicalize shuffle v, v -> v, undef 1201 if (N1 == N2) { 1202 N2 = getUNDEF(VT); 1203 for (unsigned i = 0; i != NElts; ++i) 1204 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1205 } 1206 1207 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1208 if (N1.getOpcode() == ISD::UNDEF) 1209 commuteShuffle(N1, N2, MaskVec); 1210 1211 // Canonicalize all index into lhs, -> shuffle lhs, undef 1212 // Canonicalize all index into rhs, -> shuffle rhs, undef 1213 bool AllLHS = true, AllRHS = true; 1214 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1215 for (unsigned i = 0; i != NElts; ++i) { 1216 if (MaskVec[i] >= (int)NElts) { 1217 if (N2Undef) 1218 MaskVec[i] = -1; 1219 else 1220 AllLHS = false; 1221 } else if (MaskVec[i] >= 0) { 1222 AllRHS = false; 1223 } 1224 } 1225 if (AllLHS && AllRHS) 1226 return getUNDEF(VT); 1227 if (AllLHS && !N2Undef) 1228 N2 = getUNDEF(VT); 1229 if (AllRHS) { 1230 N1 = getUNDEF(VT); 1231 commuteShuffle(N1, N2, MaskVec); 1232 } 1233 1234 // If Identity shuffle, or all shuffle in to undef, return that node. 1235 bool AllUndef = true; 1236 bool Identity = true; 1237 for (unsigned i = 0; i != NElts; ++i) { 1238 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1239 if (MaskVec[i] >= 0) AllUndef = false; 1240 } 1241 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1242 return N1; 1243 if (AllUndef) 1244 return getUNDEF(VT); 1245 1246 FoldingSetNodeID ID; 1247 SDValue Ops[2] = { N1, N2 }; 1248 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1249 for (unsigned i = 0; i != NElts; ++i) 1250 ID.AddInteger(MaskVec[i]); 1251 1252 void* IP = 0; 1253 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1254 return SDValue(E, 0); 1255 1256 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1257 // SDNode doesn't have access to it. This memory will be "leaked" when 1258 // the node is deallocated, but recovered when the NodeAllocator is released. 1259 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1260 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1261 1262 ShuffleVectorSDNode *N = 1263 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1264 CSEMap.InsertNode(N, IP); 1265 AllNodes.push_back(N); 1266 return SDValue(N, 0); 1267} 1268 1269SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1270 SDValue Val, SDValue DTy, 1271 SDValue STy, SDValue Rnd, SDValue Sat, 1272 ISD::CvtCode Code) { 1273 // If the src and dest types are the same and the conversion is between 1274 // integer types of the same sign or two floats, no conversion is necessary. 1275 if (DTy == STy && 1276 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1277 return Val; 1278 1279 FoldingSetNodeID ID; 1280 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1281 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1282 void* IP = 0; 1283 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1284 return SDValue(E, 0); 1285 1286 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1287 Code); 1288 CSEMap.InsertNode(N, IP); 1289 AllNodes.push_back(N); 1290 return SDValue(N, 0); 1291} 1292 1293SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1294 FoldingSetNodeID ID; 1295 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1296 ID.AddInteger(RegNo); 1297 void *IP = 0; 1298 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1299 return SDValue(E, 0); 1300 1301 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1302 CSEMap.InsertNode(N, IP); 1303 AllNodes.push_back(N); 1304 return SDValue(N, 0); 1305} 1306 1307SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1308 FoldingSetNodeID ID; 1309 SDValue Ops[] = { Root }; 1310 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1311 ID.AddPointer(Label); 1312 void *IP = 0; 1313 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1314 return SDValue(E, 0); 1315 1316 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1317 CSEMap.InsertNode(N, IP); 1318 AllNodes.push_back(N); 1319 return SDValue(N, 0); 1320} 1321 1322 1323SDValue SelectionDAG::getBlockAddress(BlockAddress *BA, EVT VT, 1324 bool isTarget, 1325 unsigned char TargetFlags) { 1326 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1327 1328 FoldingSetNodeID ID; 1329 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1330 ID.AddPointer(BA); 1331 ID.AddInteger(TargetFlags); 1332 void *IP = 0; 1333 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1334 return SDValue(E, 0); 1335 1336 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1337 CSEMap.InsertNode(N, IP); 1338 AllNodes.push_back(N); 1339 return SDValue(N, 0); 1340} 1341 1342SDValue SelectionDAG::getSrcValue(const Value *V) { 1343 assert((!V || V->getType()->isPointerTy()) && 1344 "SrcValue is not a pointer?"); 1345 1346 FoldingSetNodeID ID; 1347 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1348 ID.AddPointer(V); 1349 1350 void *IP = 0; 1351 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1352 return SDValue(E, 0); 1353 1354 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1355 CSEMap.InsertNode(N, IP); 1356 AllNodes.push_back(N); 1357 return SDValue(N, 0); 1358} 1359 1360/// getShiftAmountOperand - Return the specified value casted to 1361/// the target's desired shift amount type. 1362SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1363 EVT OpTy = Op.getValueType(); 1364 MVT ShTy = TLI.getShiftAmountTy(); 1365 if (OpTy == ShTy || OpTy.isVector()) return Op; 1366 1367 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1368 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1369} 1370 1371/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1372/// specified value type. 1373SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1374 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1375 unsigned ByteSize = VT.getStoreSize(); 1376 const Type *Ty = VT.getTypeForEVT(*getContext()); 1377 unsigned StackAlign = 1378 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1379 1380 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1381 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1382} 1383 1384/// CreateStackTemporary - Create a stack temporary suitable for holding 1385/// either of the specified value types. 1386SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1387 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1388 VT2.getStoreSizeInBits())/8; 1389 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1390 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1391 const TargetData *TD = TLI.getTargetData(); 1392 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1393 TD->getPrefTypeAlignment(Ty2)); 1394 1395 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1396 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1397 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1398} 1399 1400SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1401 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1402 // These setcc operations always fold. 1403 switch (Cond) { 1404 default: break; 1405 case ISD::SETFALSE: 1406 case ISD::SETFALSE2: return getConstant(0, VT); 1407 case ISD::SETTRUE: 1408 case ISD::SETTRUE2: return getConstant(1, VT); 1409 1410 case ISD::SETOEQ: 1411 case ISD::SETOGT: 1412 case ISD::SETOGE: 1413 case ISD::SETOLT: 1414 case ISD::SETOLE: 1415 case ISD::SETONE: 1416 case ISD::SETO: 1417 case ISD::SETUO: 1418 case ISD::SETUEQ: 1419 case ISD::SETUNE: 1420 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1421 break; 1422 } 1423 1424 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1425 const APInt &C2 = N2C->getAPIntValue(); 1426 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1427 const APInt &C1 = N1C->getAPIntValue(); 1428 1429 switch (Cond) { 1430 default: llvm_unreachable("Unknown integer setcc!"); 1431 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1432 case ISD::SETNE: return getConstant(C1 != C2, VT); 1433 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1434 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1435 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1436 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1437 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1438 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1439 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1440 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1441 } 1442 } 1443 } 1444 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1445 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1446 // No compile time operations on this type yet. 1447 if (N1C->getValueType(0) == MVT::ppcf128) 1448 return SDValue(); 1449 1450 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1451 switch (Cond) { 1452 default: break; 1453 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1454 return getUNDEF(VT); 1455 // fall through 1456 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1457 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1458 return getUNDEF(VT); 1459 // fall through 1460 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1461 R==APFloat::cmpLessThan, VT); 1462 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1463 return getUNDEF(VT); 1464 // fall through 1465 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1466 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1467 return getUNDEF(VT); 1468 // fall through 1469 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1470 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1471 return getUNDEF(VT); 1472 // fall through 1473 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1474 R==APFloat::cmpEqual, VT); 1475 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1476 return getUNDEF(VT); 1477 // fall through 1478 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1479 R==APFloat::cmpEqual, VT); 1480 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1481 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1482 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1483 R==APFloat::cmpEqual, VT); 1484 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1485 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1486 R==APFloat::cmpLessThan, VT); 1487 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1488 R==APFloat::cmpUnordered, VT); 1489 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1490 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1491 } 1492 } else { 1493 // Ensure that the constant occurs on the RHS. 1494 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1495 } 1496 } 1497 1498 // Could not fold it. 1499 return SDValue(); 1500} 1501 1502/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1503/// use this predicate to simplify operations downstream. 1504bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1505 // This predicate is not safe for vector operations. 1506 if (Op.getValueType().isVector()) 1507 return false; 1508 1509 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1510 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1511} 1512 1513/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1514/// this predicate to simplify operations downstream. Mask is known to be zero 1515/// for bits that V cannot have. 1516bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1517 unsigned Depth) const { 1518 APInt KnownZero, KnownOne; 1519 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1520 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1521 return (KnownZero & Mask) == Mask; 1522} 1523 1524/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1525/// known to be either zero or one and return them in the KnownZero/KnownOne 1526/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1527/// processing. 1528void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1529 APInt &KnownZero, APInt &KnownOne, 1530 unsigned Depth) const { 1531 unsigned BitWidth = Mask.getBitWidth(); 1532 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1533 "Mask size mismatches value type size!"); 1534 1535 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1536 if (Depth == 6 || Mask == 0) 1537 return; // Limit search depth. 1538 1539 APInt KnownZero2, KnownOne2; 1540 1541 switch (Op.getOpcode()) { 1542 case ISD::Constant: 1543 // We know all of the bits for a constant! 1544 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1545 KnownZero = ~KnownOne & Mask; 1546 return; 1547 case ISD::AND: 1548 // If either the LHS or the RHS are Zero, the result is zero. 1549 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1550 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1551 KnownZero2, KnownOne2, Depth+1); 1552 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1553 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1554 1555 // Output known-1 bits are only known if set in both the LHS & RHS. 1556 KnownOne &= KnownOne2; 1557 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1558 KnownZero |= KnownZero2; 1559 return; 1560 case ISD::OR: 1561 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1562 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1563 KnownZero2, KnownOne2, Depth+1); 1564 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1565 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1566 1567 // Output known-0 bits are only known if clear in both the LHS & RHS. 1568 KnownZero &= KnownZero2; 1569 // Output known-1 are known to be set if set in either the LHS | RHS. 1570 KnownOne |= KnownOne2; 1571 return; 1572 case ISD::XOR: { 1573 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1574 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1575 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1576 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1577 1578 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1579 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1580 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1581 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1582 KnownZero = KnownZeroOut; 1583 return; 1584 } 1585 case ISD::MUL: { 1586 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1587 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1588 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1589 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1590 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1591 1592 // If low bits are zero in either operand, output low known-0 bits. 1593 // Also compute a conserative estimate for high known-0 bits. 1594 // More trickiness is possible, but this is sufficient for the 1595 // interesting case of alignment computation. 1596 KnownOne.clear(); 1597 unsigned TrailZ = KnownZero.countTrailingOnes() + 1598 KnownZero2.countTrailingOnes(); 1599 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1600 KnownZero2.countLeadingOnes(), 1601 BitWidth) - BitWidth; 1602 1603 TrailZ = std::min(TrailZ, BitWidth); 1604 LeadZ = std::min(LeadZ, BitWidth); 1605 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1606 APInt::getHighBitsSet(BitWidth, LeadZ); 1607 KnownZero &= Mask; 1608 return; 1609 } 1610 case ISD::UDIV: { 1611 // For the purposes of computing leading zeros we can conservatively 1612 // treat a udiv as a logical right shift by the power of 2 known to 1613 // be less than the denominator. 1614 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1615 ComputeMaskedBits(Op.getOperand(0), 1616 AllOnes, KnownZero2, KnownOne2, Depth+1); 1617 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1618 1619 KnownOne2.clear(); 1620 KnownZero2.clear(); 1621 ComputeMaskedBits(Op.getOperand(1), 1622 AllOnes, KnownZero2, KnownOne2, Depth+1); 1623 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1624 if (RHSUnknownLeadingOnes != BitWidth) 1625 LeadZ = std::min(BitWidth, 1626 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1627 1628 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1629 return; 1630 } 1631 case ISD::SELECT: 1632 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1633 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1636 1637 // Only known if known in both the LHS and RHS. 1638 KnownOne &= KnownOne2; 1639 KnownZero &= KnownZero2; 1640 return; 1641 case ISD::SELECT_CC: 1642 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1643 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1644 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1645 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1646 1647 // Only known if known in both the LHS and RHS. 1648 KnownOne &= KnownOne2; 1649 KnownZero &= KnownZero2; 1650 return; 1651 case ISD::SADDO: 1652 case ISD::UADDO: 1653 case ISD::SSUBO: 1654 case ISD::USUBO: 1655 case ISD::SMULO: 1656 case ISD::UMULO: 1657 if (Op.getResNo() != 1) 1658 return; 1659 // The boolean result conforms to getBooleanContents. Fall through. 1660 case ISD::SETCC: 1661 // If we know the result of a setcc has the top bits zero, use this info. 1662 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1663 BitWidth > 1) 1664 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1665 return; 1666 case ISD::SHL: 1667 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1668 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1669 unsigned ShAmt = SA->getZExtValue(); 1670 1671 // If the shift count is an invalid immediate, don't do anything. 1672 if (ShAmt >= BitWidth) 1673 return; 1674 1675 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1676 KnownZero, KnownOne, Depth+1); 1677 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1678 KnownZero <<= ShAmt; 1679 KnownOne <<= ShAmt; 1680 // low bits known zero. 1681 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1682 } 1683 return; 1684 case ISD::SRL: 1685 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1686 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1687 unsigned ShAmt = SA->getZExtValue(); 1688 1689 // If the shift count is an invalid immediate, don't do anything. 1690 if (ShAmt >= BitWidth) 1691 return; 1692 1693 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1694 KnownZero, KnownOne, Depth+1); 1695 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1696 KnownZero = KnownZero.lshr(ShAmt); 1697 KnownOne = KnownOne.lshr(ShAmt); 1698 1699 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1700 KnownZero |= HighBits; // High bits known zero. 1701 } 1702 return; 1703 case ISD::SRA: 1704 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1705 unsigned ShAmt = SA->getZExtValue(); 1706 1707 // If the shift count is an invalid immediate, don't do anything. 1708 if (ShAmt >= BitWidth) 1709 return; 1710 1711 APInt InDemandedMask = (Mask << ShAmt); 1712 // If any of the demanded bits are produced by the sign extension, we also 1713 // demand the input sign bit. 1714 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1715 if (HighBits.getBoolValue()) 1716 InDemandedMask |= APInt::getSignBit(BitWidth); 1717 1718 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1719 Depth+1); 1720 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1721 KnownZero = KnownZero.lshr(ShAmt); 1722 KnownOne = KnownOne.lshr(ShAmt); 1723 1724 // Handle the sign bits. 1725 APInt SignBit = APInt::getSignBit(BitWidth); 1726 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1727 1728 if (KnownZero.intersects(SignBit)) { 1729 KnownZero |= HighBits; // New bits are known zero. 1730 } else if (KnownOne.intersects(SignBit)) { 1731 KnownOne |= HighBits; // New bits are known one. 1732 } 1733 } 1734 return; 1735 case ISD::SIGN_EXTEND_INREG: { 1736 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1737 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1738 1739 // Sign extension. Compute the demanded bits in the result that are not 1740 // present in the input. 1741 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1742 1743 APInt InSignBit = APInt::getSignBit(EBits); 1744 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1745 1746 // If the sign extended bits are demanded, we know that the sign 1747 // bit is demanded. 1748 InSignBit.zext(BitWidth); 1749 if (NewBits.getBoolValue()) 1750 InputDemandedBits |= InSignBit; 1751 1752 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1753 KnownZero, KnownOne, Depth+1); 1754 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1755 1756 // If the sign bit of the input is known set or clear, then we know the 1757 // top bits of the result. 1758 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1759 KnownZero |= NewBits; 1760 KnownOne &= ~NewBits; 1761 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1762 KnownOne |= NewBits; 1763 KnownZero &= ~NewBits; 1764 } else { // Input sign bit unknown 1765 KnownZero &= ~NewBits; 1766 KnownOne &= ~NewBits; 1767 } 1768 return; 1769 } 1770 case ISD::CTTZ: 1771 case ISD::CTLZ: 1772 case ISD::CTPOP: { 1773 unsigned LowBits = Log2_32(BitWidth)+1; 1774 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1775 KnownOne.clear(); 1776 return; 1777 } 1778 case ISD::LOAD: { 1779 if (ISD::isZEXTLoad(Op.getNode())) { 1780 LoadSDNode *LD = cast<LoadSDNode>(Op); 1781 EVT VT = LD->getMemoryVT(); 1782 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1783 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1784 } 1785 return; 1786 } 1787 case ISD::ZERO_EXTEND: { 1788 EVT InVT = Op.getOperand(0).getValueType(); 1789 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1790 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1791 APInt InMask = Mask; 1792 InMask.trunc(InBits); 1793 KnownZero.trunc(InBits); 1794 KnownOne.trunc(InBits); 1795 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1796 KnownZero.zext(BitWidth); 1797 KnownOne.zext(BitWidth); 1798 KnownZero |= NewBits; 1799 return; 1800 } 1801 case ISD::SIGN_EXTEND: { 1802 EVT InVT = Op.getOperand(0).getValueType(); 1803 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1804 APInt InSignBit = APInt::getSignBit(InBits); 1805 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1806 APInt InMask = Mask; 1807 InMask.trunc(InBits); 1808 1809 // If any of the sign extended bits are demanded, we know that the sign 1810 // bit is demanded. Temporarily set this bit in the mask for our callee. 1811 if (NewBits.getBoolValue()) 1812 InMask |= InSignBit; 1813 1814 KnownZero.trunc(InBits); 1815 KnownOne.trunc(InBits); 1816 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1817 1818 // Note if the sign bit is known to be zero or one. 1819 bool SignBitKnownZero = KnownZero.isNegative(); 1820 bool SignBitKnownOne = KnownOne.isNegative(); 1821 assert(!(SignBitKnownZero && SignBitKnownOne) && 1822 "Sign bit can't be known to be both zero and one!"); 1823 1824 // If the sign bit wasn't actually demanded by our caller, we don't 1825 // want it set in the KnownZero and KnownOne result values. Reset the 1826 // mask and reapply it to the result values. 1827 InMask = Mask; 1828 InMask.trunc(InBits); 1829 KnownZero &= InMask; 1830 KnownOne &= InMask; 1831 1832 KnownZero.zext(BitWidth); 1833 KnownOne.zext(BitWidth); 1834 1835 // If the sign bit is known zero or one, the top bits match. 1836 if (SignBitKnownZero) 1837 KnownZero |= NewBits; 1838 else if (SignBitKnownOne) 1839 KnownOne |= NewBits; 1840 return; 1841 } 1842 case ISD::ANY_EXTEND: { 1843 EVT InVT = Op.getOperand(0).getValueType(); 1844 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1845 APInt InMask = Mask; 1846 InMask.trunc(InBits); 1847 KnownZero.trunc(InBits); 1848 KnownOne.trunc(InBits); 1849 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1850 KnownZero.zext(BitWidth); 1851 KnownOne.zext(BitWidth); 1852 return; 1853 } 1854 case ISD::TRUNCATE: { 1855 EVT InVT = Op.getOperand(0).getValueType(); 1856 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1857 APInt InMask = Mask; 1858 InMask.zext(InBits); 1859 KnownZero.zext(InBits); 1860 KnownOne.zext(InBits); 1861 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1862 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1863 KnownZero.trunc(BitWidth); 1864 KnownOne.trunc(BitWidth); 1865 break; 1866 } 1867 case ISD::AssertZext: { 1868 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1869 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1870 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1871 KnownOne, Depth+1); 1872 KnownZero |= (~InMask) & Mask; 1873 return; 1874 } 1875 case ISD::FGETSIGN: 1876 // All bits are zero except the low bit. 1877 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1878 return; 1879 1880 case ISD::SUB: { 1881 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1882 // We know that the top bits of C-X are clear if X contains less bits 1883 // than C (i.e. no wrap-around can happen). For example, 20-X is 1884 // positive if we can prove that X is >= 0 and < 16. 1885 if (CLHS->getAPIntValue().isNonNegative()) { 1886 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1887 // NLZ can't be BitWidth with no sign bit 1888 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1889 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1890 Depth+1); 1891 1892 // If all of the MaskV bits are known to be zero, then we know the 1893 // output top bits are zero, because we now know that the output is 1894 // from [0-C]. 1895 if ((KnownZero2 & MaskV) == MaskV) { 1896 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1897 // Top bits known zero. 1898 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1899 } 1900 } 1901 } 1902 } 1903 // fall through 1904 case ISD::ADD: { 1905 // Output known-0 bits are known if clear or set in both the low clear bits 1906 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1907 // low 3 bits clear. 1908 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1909 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1910 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1911 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1912 1913 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1914 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1915 KnownZeroOut = std::min(KnownZeroOut, 1916 KnownZero2.countTrailingOnes()); 1917 1918 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1919 return; 1920 } 1921 case ISD::SREM: 1922 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1923 const APInt &RA = Rem->getAPIntValue().abs(); 1924 if (RA.isPowerOf2()) { 1925 APInt LowBits = RA - 1; 1926 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1927 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1928 1929 // The low bits of the first operand are unchanged by the srem. 1930 KnownZero = KnownZero2 & LowBits; 1931 KnownOne = KnownOne2 & LowBits; 1932 1933 // If the first operand is non-negative or has all low bits zero, then 1934 // the upper bits are all zero. 1935 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1936 KnownZero |= ~LowBits; 1937 1938 // If the first operand is negative and not all low bits are zero, then 1939 // the upper bits are all one. 1940 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 1941 KnownOne |= ~LowBits; 1942 1943 KnownZero &= Mask; 1944 KnownOne &= Mask; 1945 1946 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1947 } 1948 } 1949 return; 1950 case ISD::UREM: { 1951 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1952 const APInt &RA = Rem->getAPIntValue(); 1953 if (RA.isPowerOf2()) { 1954 APInt LowBits = (RA - 1); 1955 APInt Mask2 = LowBits & Mask; 1956 KnownZero |= ~LowBits & Mask; 1957 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1958 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1959 break; 1960 } 1961 } 1962 1963 // Since the result is less than or equal to either operand, any leading 1964 // zero bits in either operand must also exist in the result. 1965 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1966 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1967 Depth+1); 1968 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1969 Depth+1); 1970 1971 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1972 KnownZero2.countLeadingOnes()); 1973 KnownOne.clear(); 1974 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1975 return; 1976 } 1977 default: 1978 // Allow the target to implement this method for its nodes. 1979 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1980 case ISD::INTRINSIC_WO_CHAIN: 1981 case ISD::INTRINSIC_W_CHAIN: 1982 case ISD::INTRINSIC_VOID: 1983 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 1984 Depth); 1985 } 1986 return; 1987 } 1988} 1989 1990/// ComputeNumSignBits - Return the number of times the sign bit of the 1991/// register is replicated into the other bits. We know that at least 1 bit 1992/// is always equal to the sign bit (itself), but other cases can give us 1993/// information. For example, immediately after an "SRA X, 2", we know that 1994/// the top 3 bits are all equal to each other, so we return 3. 1995unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1996 EVT VT = Op.getValueType(); 1997 assert(VT.isInteger() && "Invalid VT!"); 1998 unsigned VTBits = VT.getScalarType().getSizeInBits(); 1999 unsigned Tmp, Tmp2; 2000 unsigned FirstAnswer = 1; 2001 2002 if (Depth == 6) 2003 return 1; // Limit search depth. 2004 2005 switch (Op.getOpcode()) { 2006 default: break; 2007 case ISD::AssertSext: 2008 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2009 return VTBits-Tmp+1; 2010 case ISD::AssertZext: 2011 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2012 return VTBits-Tmp; 2013 2014 case ISD::Constant: { 2015 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2016 // If negative, return # leading ones. 2017 if (Val.isNegative()) 2018 return Val.countLeadingOnes(); 2019 2020 // Return # leading zeros. 2021 return Val.countLeadingZeros(); 2022 } 2023 2024 case ISD::SIGN_EXTEND: 2025 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2026 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2027 2028 case ISD::SIGN_EXTEND_INREG: 2029 // Max of the input and what this extends. 2030 Tmp = 2031 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2032 Tmp = VTBits-Tmp+1; 2033 2034 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2035 return std::max(Tmp, Tmp2); 2036 2037 case ISD::SRA: 2038 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2039 // SRA X, C -> adds C sign bits. 2040 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2041 Tmp += C->getZExtValue(); 2042 if (Tmp > VTBits) Tmp = VTBits; 2043 } 2044 return Tmp; 2045 case ISD::SHL: 2046 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2047 // shl destroys sign bits. 2048 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2049 if (C->getZExtValue() >= VTBits || // Bad shift. 2050 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2051 return Tmp - C->getZExtValue(); 2052 } 2053 break; 2054 case ISD::AND: 2055 case ISD::OR: 2056 case ISD::XOR: // NOT is handled here. 2057 // Logical binary ops preserve the number of sign bits at the worst. 2058 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2059 if (Tmp != 1) { 2060 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2061 FirstAnswer = std::min(Tmp, Tmp2); 2062 // We computed what we know about the sign bits as our first 2063 // answer. Now proceed to the generic code that uses 2064 // ComputeMaskedBits, and pick whichever answer is better. 2065 } 2066 break; 2067 2068 case ISD::SELECT: 2069 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2070 if (Tmp == 1) return 1; // Early out. 2071 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2072 return std::min(Tmp, Tmp2); 2073 2074 case ISD::SADDO: 2075 case ISD::UADDO: 2076 case ISD::SSUBO: 2077 case ISD::USUBO: 2078 case ISD::SMULO: 2079 case ISD::UMULO: 2080 if (Op.getResNo() != 1) 2081 break; 2082 // The boolean result conforms to getBooleanContents. Fall through. 2083 case ISD::SETCC: 2084 // If setcc returns 0/-1, all bits are sign bits. 2085 if (TLI.getBooleanContents() == 2086 TargetLowering::ZeroOrNegativeOneBooleanContent) 2087 return VTBits; 2088 break; 2089 case ISD::ROTL: 2090 case ISD::ROTR: 2091 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2092 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2093 2094 // Handle rotate right by N like a rotate left by 32-N. 2095 if (Op.getOpcode() == ISD::ROTR) 2096 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2097 2098 // If we aren't rotating out all of the known-in sign bits, return the 2099 // number that are left. This handles rotl(sext(x), 1) for example. 2100 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2101 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2102 } 2103 break; 2104 case ISD::ADD: 2105 // Add can have at most one carry bit. Thus we know that the output 2106 // is, at worst, one more bit than the inputs. 2107 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2108 if (Tmp == 1) return 1; // Early out. 2109 2110 // Special case decrementing a value (ADD X, -1): 2111 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2112 if (CRHS->isAllOnesValue()) { 2113 APInt KnownZero, KnownOne; 2114 APInt Mask = APInt::getAllOnesValue(VTBits); 2115 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2116 2117 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2118 // sign bits set. 2119 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2120 return VTBits; 2121 2122 // If we are subtracting one from a positive number, there is no carry 2123 // out of the result. 2124 if (KnownZero.isNegative()) 2125 return Tmp; 2126 } 2127 2128 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2129 if (Tmp2 == 1) return 1; 2130 return std::min(Tmp, Tmp2)-1; 2131 break; 2132 2133 case ISD::SUB: 2134 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2135 if (Tmp2 == 1) return 1; 2136 2137 // Handle NEG. 2138 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2139 if (CLHS->isNullValue()) { 2140 APInt KnownZero, KnownOne; 2141 APInt Mask = APInt::getAllOnesValue(VTBits); 2142 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2143 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2144 // sign bits set. 2145 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2146 return VTBits; 2147 2148 // If the input is known to be positive (the sign bit is known clear), 2149 // the output of the NEG has the same number of sign bits as the input. 2150 if (KnownZero.isNegative()) 2151 return Tmp2; 2152 2153 // Otherwise, we treat this like a SUB. 2154 } 2155 2156 // Sub can have at most one carry bit. Thus we know that the output 2157 // is, at worst, one more bit than the inputs. 2158 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2159 if (Tmp == 1) return 1; // Early out. 2160 return std::min(Tmp, Tmp2)-1; 2161 break; 2162 case ISD::TRUNCATE: 2163 // FIXME: it's tricky to do anything useful for this, but it is an important 2164 // case for targets like X86. 2165 break; 2166 } 2167 2168 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2169 if (Op.getOpcode() == ISD::LOAD) { 2170 LoadSDNode *LD = cast<LoadSDNode>(Op); 2171 unsigned ExtType = LD->getExtensionType(); 2172 switch (ExtType) { 2173 default: break; 2174 case ISD::SEXTLOAD: // '17' bits known 2175 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2176 return VTBits-Tmp+1; 2177 case ISD::ZEXTLOAD: // '16' bits known 2178 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2179 return VTBits-Tmp; 2180 } 2181 } 2182 2183 // Allow the target to implement this method for its nodes. 2184 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2185 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2186 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2187 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2188 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2189 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2190 } 2191 2192 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2193 // use this information. 2194 APInt KnownZero, KnownOne; 2195 APInt Mask = APInt::getAllOnesValue(VTBits); 2196 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2197 2198 if (KnownZero.isNegative()) { // sign bit is 0 2199 Mask = KnownZero; 2200 } else if (KnownOne.isNegative()) { // sign bit is 1; 2201 Mask = KnownOne; 2202 } else { 2203 // Nothing known. 2204 return FirstAnswer; 2205 } 2206 2207 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2208 // the number of identical bits in the top of the input value. 2209 Mask = ~Mask; 2210 Mask <<= Mask.getBitWidth()-VTBits; 2211 // Return # leading zeros. We use 'min' here in case Val was zero before 2212 // shifting. We don't want to return '64' as for an i32 "0". 2213 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2214} 2215 2216bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2217 // If we're told that NaNs won't happen, assume they won't. 2218 if (FiniteOnlyFPMath()) 2219 return true; 2220 2221 // If the value is a constant, we can obviously see if it is a NaN or not. 2222 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2223 return !C->getValueAPF().isNaN(); 2224 2225 // TODO: Recognize more cases here. 2226 2227 return false; 2228} 2229 2230bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2231 // If the value is a constant, we can obviously see if it is a zero or not. 2232 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2233 return !C->isZero(); 2234 2235 // TODO: Recognize more cases here. 2236 2237 return false; 2238} 2239 2240bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2241 // Check the obvious case. 2242 if (A == B) return true; 2243 2244 // For for negative and positive zero. 2245 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2246 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2247 if (CA->isZero() && CB->isZero()) return true; 2248 2249 // Otherwise they may not be equal. 2250 return false; 2251} 2252 2253bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2254 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2255 if (!GA) return false; 2256 if (GA->getOffset() != 0) return false; 2257 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2258 if (!GV) return false; 2259 return MMI->hasDebugInfo(); 2260} 2261 2262 2263/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2264/// element of the result of the vector shuffle. 2265SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N, 2266 unsigned i) { 2267 EVT VT = N->getValueType(0); 2268 DebugLoc dl = N->getDebugLoc(); 2269 if (N->getMaskElt(i) < 0) 2270 return getUNDEF(VT.getVectorElementType()); 2271 unsigned Index = N->getMaskElt(i); 2272 unsigned NumElems = VT.getVectorNumElements(); 2273 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2274 Index %= NumElems; 2275 2276 if (V.getOpcode() == ISD::BIT_CONVERT) { 2277 V = V.getOperand(0); 2278 EVT VVT = V.getValueType(); 2279 if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems) 2280 return SDValue(); 2281 } 2282 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2283 return (Index == 0) ? V.getOperand(0) 2284 : getUNDEF(VT.getVectorElementType()); 2285 if (V.getOpcode() == ISD::BUILD_VECTOR) 2286 return V.getOperand(Index); 2287 if (const ShuffleVectorSDNode *SVN = dyn_cast<ShuffleVectorSDNode>(V)) 2288 return getShuffleScalarElt(SVN, Index); 2289 return SDValue(); 2290} 2291 2292 2293/// getNode - Gets or creates the specified node. 2294/// 2295SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2296 FoldingSetNodeID ID; 2297 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2298 void *IP = 0; 2299 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2300 return SDValue(E, 0); 2301 2302 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2303 CSEMap.InsertNode(N, IP); 2304 2305 AllNodes.push_back(N); 2306#ifndef NDEBUG 2307 VerifyNode(N); 2308#endif 2309 return SDValue(N, 0); 2310} 2311 2312SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2313 EVT VT, SDValue Operand) { 2314 // Constant fold unary operations with an integer constant operand. 2315 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2316 const APInt &Val = C->getAPIntValue(); 2317 switch (Opcode) { 2318 default: break; 2319 case ISD::SIGN_EXTEND: 2320 return getConstant(APInt(Val).sextOrTrunc(VT.getSizeInBits()), VT); 2321 case ISD::ANY_EXTEND: 2322 case ISD::ZERO_EXTEND: 2323 case ISD::TRUNCATE: 2324 return getConstant(APInt(Val).zextOrTrunc(VT.getSizeInBits()), VT); 2325 case ISD::UINT_TO_FP: 2326 case ISD::SINT_TO_FP: { 2327 const uint64_t zero[] = {0, 0}; 2328 // No compile time operations on ppcf128. 2329 if (VT == MVT::ppcf128) break; 2330 APFloat apf = APFloat(APInt(VT.getSizeInBits(), 2, zero)); 2331 (void)apf.convertFromAPInt(Val, 2332 Opcode==ISD::SINT_TO_FP, 2333 APFloat::rmNearestTiesToEven); 2334 return getConstantFP(apf, VT); 2335 } 2336 case ISD::BIT_CONVERT: 2337 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2338 return getConstantFP(Val.bitsToFloat(), VT); 2339 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2340 return getConstantFP(Val.bitsToDouble(), VT); 2341 break; 2342 case ISD::BSWAP: 2343 return getConstant(Val.byteSwap(), VT); 2344 case ISD::CTPOP: 2345 return getConstant(Val.countPopulation(), VT); 2346 case ISD::CTLZ: 2347 return getConstant(Val.countLeadingZeros(), VT); 2348 case ISD::CTTZ: 2349 return getConstant(Val.countTrailingZeros(), VT); 2350 } 2351 } 2352 2353 // Constant fold unary operations with a floating point constant operand. 2354 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2355 APFloat V = C->getValueAPF(); // make copy 2356 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2357 switch (Opcode) { 2358 case ISD::FNEG: 2359 V.changeSign(); 2360 return getConstantFP(V, VT); 2361 case ISD::FABS: 2362 V.clearSign(); 2363 return getConstantFP(V, VT); 2364 case ISD::FP_ROUND: 2365 case ISD::FP_EXTEND: { 2366 bool ignored; 2367 // This can return overflow, underflow, or inexact; we don't care. 2368 // FIXME need to be more flexible about rounding mode. 2369 (void)V.convert(*EVTToAPFloatSemantics(VT), 2370 APFloat::rmNearestTiesToEven, &ignored); 2371 return getConstantFP(V, VT); 2372 } 2373 case ISD::FP_TO_SINT: 2374 case ISD::FP_TO_UINT: { 2375 integerPart x[2]; 2376 bool ignored; 2377 assert(integerPartWidth >= 64); 2378 // FIXME need to be more flexible about rounding mode. 2379 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2380 Opcode==ISD::FP_TO_SINT, 2381 APFloat::rmTowardZero, &ignored); 2382 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2383 break; 2384 APInt api(VT.getSizeInBits(), 2, x); 2385 return getConstant(api, VT); 2386 } 2387 case ISD::BIT_CONVERT: 2388 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2389 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2390 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2391 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2392 break; 2393 } 2394 } 2395 } 2396 2397 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2398 switch (Opcode) { 2399 case ISD::TokenFactor: 2400 case ISD::MERGE_VALUES: 2401 case ISD::CONCAT_VECTORS: 2402 return Operand; // Factor, merge or concat of one node? No need. 2403 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2404 case ISD::FP_EXTEND: 2405 assert(VT.isFloatingPoint() && 2406 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2407 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2408 assert((!VT.isVector() || 2409 VT.getVectorNumElements() == 2410 Operand.getValueType().getVectorNumElements()) && 2411 "Vector element count mismatch!"); 2412 if (Operand.getOpcode() == ISD::UNDEF) 2413 return getUNDEF(VT); 2414 break; 2415 case ISD::SIGN_EXTEND: 2416 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2417 "Invalid SIGN_EXTEND!"); 2418 if (Operand.getValueType() == VT) return Operand; // noop extension 2419 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2420 "Invalid sext node, dst < src!"); 2421 assert((!VT.isVector() || 2422 VT.getVectorNumElements() == 2423 Operand.getValueType().getVectorNumElements()) && 2424 "Vector element count mismatch!"); 2425 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2426 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2427 break; 2428 case ISD::ZERO_EXTEND: 2429 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2430 "Invalid ZERO_EXTEND!"); 2431 if (Operand.getValueType() == VT) return Operand; // noop extension 2432 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2433 "Invalid zext node, dst < src!"); 2434 assert((!VT.isVector() || 2435 VT.getVectorNumElements() == 2436 Operand.getValueType().getVectorNumElements()) && 2437 "Vector element count mismatch!"); 2438 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2439 return getNode(ISD::ZERO_EXTEND, DL, VT, 2440 Operand.getNode()->getOperand(0)); 2441 break; 2442 case ISD::ANY_EXTEND: 2443 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2444 "Invalid ANY_EXTEND!"); 2445 if (Operand.getValueType() == VT) return Operand; // noop extension 2446 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2447 "Invalid anyext node, dst < src!"); 2448 assert((!VT.isVector() || 2449 VT.getVectorNumElements() == 2450 Operand.getValueType().getVectorNumElements()) && 2451 "Vector element count mismatch!"); 2452 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2453 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2454 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2455 break; 2456 case ISD::TRUNCATE: 2457 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2458 "Invalid TRUNCATE!"); 2459 if (Operand.getValueType() == VT) return Operand; // noop truncate 2460 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2461 "Invalid truncate node, src < dst!"); 2462 assert((!VT.isVector() || 2463 VT.getVectorNumElements() == 2464 Operand.getValueType().getVectorNumElements()) && 2465 "Vector element count mismatch!"); 2466 if (OpOpcode == ISD::TRUNCATE) 2467 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2468 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2469 OpOpcode == ISD::ANY_EXTEND) { 2470 // If the source is smaller than the dest, we still need an extend. 2471 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2472 .bitsLT(VT.getScalarType())) 2473 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2474 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2475 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2476 else 2477 return Operand.getNode()->getOperand(0); 2478 } 2479 break; 2480 case ISD::BIT_CONVERT: 2481 // Basic sanity checking. 2482 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2483 && "Cannot BIT_CONVERT between types of different sizes!"); 2484 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2485 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2486 return getNode(ISD::BIT_CONVERT, DL, VT, Operand.getOperand(0)); 2487 if (OpOpcode == ISD::UNDEF) 2488 return getUNDEF(VT); 2489 break; 2490 case ISD::SCALAR_TO_VECTOR: 2491 assert(VT.isVector() && !Operand.getValueType().isVector() && 2492 (VT.getVectorElementType() == Operand.getValueType() || 2493 (VT.getVectorElementType().isInteger() && 2494 Operand.getValueType().isInteger() && 2495 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2496 "Illegal SCALAR_TO_VECTOR node!"); 2497 if (OpOpcode == ISD::UNDEF) 2498 return getUNDEF(VT); 2499 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2500 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2501 isa<ConstantSDNode>(Operand.getOperand(1)) && 2502 Operand.getConstantOperandVal(1) == 0 && 2503 Operand.getOperand(0).getValueType() == VT) 2504 return Operand.getOperand(0); 2505 break; 2506 case ISD::FNEG: 2507 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2508 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2509 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2510 Operand.getNode()->getOperand(0)); 2511 if (OpOpcode == ISD::FNEG) // --X -> X 2512 return Operand.getNode()->getOperand(0); 2513 break; 2514 case ISD::FABS: 2515 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2516 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2517 break; 2518 } 2519 2520 SDNode *N; 2521 SDVTList VTs = getVTList(VT); 2522 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2523 FoldingSetNodeID ID; 2524 SDValue Ops[1] = { Operand }; 2525 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2526 void *IP = 0; 2527 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2528 return SDValue(E, 0); 2529 2530 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2531 CSEMap.InsertNode(N, IP); 2532 } else { 2533 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2534 } 2535 2536 AllNodes.push_back(N); 2537#ifndef NDEBUG 2538 VerifyNode(N); 2539#endif 2540 return SDValue(N, 0); 2541} 2542 2543SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2544 EVT VT, 2545 ConstantSDNode *Cst1, 2546 ConstantSDNode *Cst2) { 2547 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2548 2549 switch (Opcode) { 2550 case ISD::ADD: return getConstant(C1 + C2, VT); 2551 case ISD::SUB: return getConstant(C1 - C2, VT); 2552 case ISD::MUL: return getConstant(C1 * C2, VT); 2553 case ISD::UDIV: 2554 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2555 break; 2556 case ISD::UREM: 2557 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2558 break; 2559 case ISD::SDIV: 2560 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2561 break; 2562 case ISD::SREM: 2563 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2564 break; 2565 case ISD::AND: return getConstant(C1 & C2, VT); 2566 case ISD::OR: return getConstant(C1 | C2, VT); 2567 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2568 case ISD::SHL: return getConstant(C1 << C2, VT); 2569 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2570 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2571 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2572 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2573 default: break; 2574 } 2575 2576 return SDValue(); 2577} 2578 2579SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2580 SDValue N1, SDValue N2) { 2581 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2582 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2583 switch (Opcode) { 2584 default: break; 2585 case ISD::TokenFactor: 2586 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2587 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2588 // Fold trivial token factors. 2589 if (N1.getOpcode() == ISD::EntryToken) return N2; 2590 if (N2.getOpcode() == ISD::EntryToken) return N1; 2591 if (N1 == N2) return N1; 2592 break; 2593 case ISD::CONCAT_VECTORS: 2594 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2595 // one big BUILD_VECTOR. 2596 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2597 N2.getOpcode() == ISD::BUILD_VECTOR) { 2598 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2599 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2600 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2601 } 2602 break; 2603 case ISD::AND: 2604 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2605 N1.getValueType() == VT && "Binary operator types must match!"); 2606 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2607 // worth handling here. 2608 if (N2C && N2C->isNullValue()) 2609 return N2; 2610 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2611 return N1; 2612 break; 2613 case ISD::OR: 2614 case ISD::XOR: 2615 case ISD::ADD: 2616 case ISD::SUB: 2617 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2618 N1.getValueType() == VT && "Binary operator types must match!"); 2619 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2620 // it's worth handling here. 2621 if (N2C && N2C->isNullValue()) 2622 return N1; 2623 break; 2624 case ISD::UDIV: 2625 case ISD::UREM: 2626 case ISD::MULHU: 2627 case ISD::MULHS: 2628 case ISD::MUL: 2629 case ISD::SDIV: 2630 case ISD::SREM: 2631 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2632 // fall through 2633 case ISD::FADD: 2634 case ISD::FSUB: 2635 case ISD::FMUL: 2636 case ISD::FDIV: 2637 case ISD::FREM: 2638 if (UnsafeFPMath) { 2639 if (Opcode == ISD::FADD) { 2640 // 0+x --> x 2641 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2642 if (CFP->getValueAPF().isZero()) 2643 return N2; 2644 // x+0 --> x 2645 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2646 if (CFP->getValueAPF().isZero()) 2647 return N1; 2648 } else if (Opcode == ISD::FSUB) { 2649 // x-0 --> x 2650 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2651 if (CFP->getValueAPF().isZero()) 2652 return N1; 2653 } 2654 } 2655 assert(N1.getValueType() == N2.getValueType() && 2656 N1.getValueType() == VT && "Binary operator types must match!"); 2657 break; 2658 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2659 assert(N1.getValueType() == VT && 2660 N1.getValueType().isFloatingPoint() && 2661 N2.getValueType().isFloatingPoint() && 2662 "Invalid FCOPYSIGN!"); 2663 break; 2664 case ISD::SHL: 2665 case ISD::SRA: 2666 case ISD::SRL: 2667 case ISD::ROTL: 2668 case ISD::ROTR: 2669 assert(VT == N1.getValueType() && 2670 "Shift operators return type must be the same as their first arg"); 2671 assert(VT.isInteger() && N2.getValueType().isInteger() && 2672 "Shifts only work on integers"); 2673 2674 // Always fold shifts of i1 values so the code generator doesn't need to 2675 // handle them. Since we know the size of the shift has to be less than the 2676 // size of the value, the shift/rotate count is guaranteed to be zero. 2677 if (VT == MVT::i1) 2678 return N1; 2679 if (N2C && N2C->isNullValue()) 2680 return N1; 2681 break; 2682 case ISD::FP_ROUND_INREG: { 2683 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2684 assert(VT == N1.getValueType() && "Not an inreg round!"); 2685 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2686 "Cannot FP_ROUND_INREG integer types"); 2687 assert(EVT.isVector() == VT.isVector() && 2688 "FP_ROUND_INREG type should be vector iff the operand " 2689 "type is vector!"); 2690 assert((!EVT.isVector() || 2691 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2692 "Vector element counts must match in FP_ROUND_INREG"); 2693 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2694 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2695 break; 2696 } 2697 case ISD::FP_ROUND: 2698 assert(VT.isFloatingPoint() && 2699 N1.getValueType().isFloatingPoint() && 2700 VT.bitsLE(N1.getValueType()) && 2701 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2702 if (N1.getValueType() == VT) return N1; // noop conversion. 2703 break; 2704 case ISD::AssertSext: 2705 case ISD::AssertZext: { 2706 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2707 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2708 assert(VT.isInteger() && EVT.isInteger() && 2709 "Cannot *_EXTEND_INREG FP types"); 2710 assert(!EVT.isVector() && 2711 "AssertSExt/AssertZExt type should be the vector element type " 2712 "rather than the vector type!"); 2713 assert(EVT.bitsLE(VT) && "Not extending!"); 2714 if (VT == EVT) return N1; // noop assertion. 2715 break; 2716 } 2717 case ISD::SIGN_EXTEND_INREG: { 2718 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2719 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2720 assert(VT.isInteger() && EVT.isInteger() && 2721 "Cannot *_EXTEND_INREG FP types"); 2722 assert(EVT.isVector() == VT.isVector() && 2723 "SIGN_EXTEND_INREG type should be vector iff the operand " 2724 "type is vector!"); 2725 assert((!EVT.isVector() || 2726 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2727 "Vector element counts must match in SIGN_EXTEND_INREG"); 2728 assert(EVT.bitsLE(VT) && "Not extending!"); 2729 if (EVT == VT) return N1; // Not actually extending 2730 2731 if (N1C) { 2732 APInt Val = N1C->getAPIntValue(); 2733 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2734 Val <<= Val.getBitWidth()-FromBits; 2735 Val = Val.ashr(Val.getBitWidth()-FromBits); 2736 return getConstant(Val, VT); 2737 } 2738 break; 2739 } 2740 case ISD::EXTRACT_VECTOR_ELT: 2741 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2742 if (N1.getOpcode() == ISD::UNDEF) 2743 return getUNDEF(VT); 2744 2745 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2746 // expanding copies of large vectors from registers. 2747 if (N2C && 2748 N1.getOpcode() == ISD::CONCAT_VECTORS && 2749 N1.getNumOperands() > 0) { 2750 unsigned Factor = 2751 N1.getOperand(0).getValueType().getVectorNumElements(); 2752 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2753 N1.getOperand(N2C->getZExtValue() / Factor), 2754 getConstant(N2C->getZExtValue() % Factor, 2755 N2.getValueType())); 2756 } 2757 2758 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2759 // expanding large vector constants. 2760 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2761 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2762 EVT VEltTy = N1.getValueType().getVectorElementType(); 2763 if (Elt.getValueType() != VEltTy) { 2764 // If the vector element type is not legal, the BUILD_VECTOR operands 2765 // are promoted and implicitly truncated. Make that explicit here. 2766 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2767 } 2768 if (VT != VEltTy) { 2769 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2770 // result is implicitly extended. 2771 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2772 } 2773 return Elt; 2774 } 2775 2776 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2777 // operations are lowered to scalars. 2778 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2779 // If the indices are the same, return the inserted element else 2780 // if the indices are known different, extract the element from 2781 // the original vector. 2782 if (N1.getOperand(2) == N2) { 2783 if (VT == N1.getOperand(1).getValueType()) 2784 return N1.getOperand(1); 2785 else 2786 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2787 } else if (isa<ConstantSDNode>(N1.getOperand(2)) && 2788 isa<ConstantSDNode>(N2)) 2789 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2790 } 2791 break; 2792 case ISD::EXTRACT_ELEMENT: 2793 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2794 assert(!N1.getValueType().isVector() && !VT.isVector() && 2795 (N1.getValueType().isInteger() == VT.isInteger()) && 2796 "Wrong types for EXTRACT_ELEMENT!"); 2797 2798 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2799 // 64-bit integers into 32-bit parts. Instead of building the extract of 2800 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2801 if (N1.getOpcode() == ISD::BUILD_PAIR) 2802 return N1.getOperand(N2C->getZExtValue()); 2803 2804 // EXTRACT_ELEMENT of a constant int is also very common. 2805 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2806 unsigned ElementSize = VT.getSizeInBits(); 2807 unsigned Shift = ElementSize * N2C->getZExtValue(); 2808 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2809 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2810 } 2811 break; 2812 case ISD::EXTRACT_SUBVECTOR: 2813 if (N1.getValueType() == VT) // Trivial extraction. 2814 return N1; 2815 break; 2816 } 2817 2818 if (N1C) { 2819 if (N2C) { 2820 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2821 if (SV.getNode()) return SV; 2822 } else { // Cannonicalize constant to RHS if commutative 2823 if (isCommutativeBinOp(Opcode)) { 2824 std::swap(N1C, N2C); 2825 std::swap(N1, N2); 2826 } 2827 } 2828 } 2829 2830 // Constant fold FP operations. 2831 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2832 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2833 if (N1CFP) { 2834 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2835 // Cannonicalize constant to RHS if commutative 2836 std::swap(N1CFP, N2CFP); 2837 std::swap(N1, N2); 2838 } else if (N2CFP && VT != MVT::ppcf128) { 2839 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2840 APFloat::opStatus s; 2841 switch (Opcode) { 2842 case ISD::FADD: 2843 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2844 if (s != APFloat::opInvalidOp) 2845 return getConstantFP(V1, VT); 2846 break; 2847 case ISD::FSUB: 2848 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2849 if (s!=APFloat::opInvalidOp) 2850 return getConstantFP(V1, VT); 2851 break; 2852 case ISD::FMUL: 2853 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2854 if (s!=APFloat::opInvalidOp) 2855 return getConstantFP(V1, VT); 2856 break; 2857 case ISD::FDIV: 2858 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2859 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2860 return getConstantFP(V1, VT); 2861 break; 2862 case ISD::FREM : 2863 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2864 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2865 return getConstantFP(V1, VT); 2866 break; 2867 case ISD::FCOPYSIGN: 2868 V1.copySign(V2); 2869 return getConstantFP(V1, VT); 2870 default: break; 2871 } 2872 } 2873 } 2874 2875 // Canonicalize an UNDEF to the RHS, even over a constant. 2876 if (N1.getOpcode() == ISD::UNDEF) { 2877 if (isCommutativeBinOp(Opcode)) { 2878 std::swap(N1, N2); 2879 } else { 2880 switch (Opcode) { 2881 case ISD::FP_ROUND_INREG: 2882 case ISD::SIGN_EXTEND_INREG: 2883 case ISD::SUB: 2884 case ISD::FSUB: 2885 case ISD::FDIV: 2886 case ISD::FREM: 2887 case ISD::SRA: 2888 return N1; // fold op(undef, arg2) -> undef 2889 case ISD::UDIV: 2890 case ISD::SDIV: 2891 case ISD::UREM: 2892 case ISD::SREM: 2893 case ISD::SRL: 2894 case ISD::SHL: 2895 if (!VT.isVector()) 2896 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2897 // For vectors, we can't easily build an all zero vector, just return 2898 // the LHS. 2899 return N2; 2900 } 2901 } 2902 } 2903 2904 // Fold a bunch of operators when the RHS is undef. 2905 if (N2.getOpcode() == ISD::UNDEF) { 2906 switch (Opcode) { 2907 case ISD::XOR: 2908 if (N1.getOpcode() == ISD::UNDEF) 2909 // Handle undef ^ undef -> 0 special case. This is a common 2910 // idiom (misuse). 2911 return getConstant(0, VT); 2912 // fallthrough 2913 case ISD::ADD: 2914 case ISD::ADDC: 2915 case ISD::ADDE: 2916 case ISD::SUB: 2917 case ISD::UDIV: 2918 case ISD::SDIV: 2919 case ISD::UREM: 2920 case ISD::SREM: 2921 return N2; // fold op(arg1, undef) -> undef 2922 case ISD::FADD: 2923 case ISD::FSUB: 2924 case ISD::FMUL: 2925 case ISD::FDIV: 2926 case ISD::FREM: 2927 if (UnsafeFPMath) 2928 return N2; 2929 break; 2930 case ISD::MUL: 2931 case ISD::AND: 2932 case ISD::SRL: 2933 case ISD::SHL: 2934 if (!VT.isVector()) 2935 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2936 // For vectors, we can't easily build an all zero vector, just return 2937 // the LHS. 2938 return N1; 2939 case ISD::OR: 2940 if (!VT.isVector()) 2941 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 2942 // For vectors, we can't easily build an all one vector, just return 2943 // the LHS. 2944 return N1; 2945 case ISD::SRA: 2946 return N1; 2947 } 2948 } 2949 2950 // Memoize this node if possible. 2951 SDNode *N; 2952 SDVTList VTs = getVTList(VT); 2953 if (VT != MVT::Flag) { 2954 SDValue Ops[] = { N1, N2 }; 2955 FoldingSetNodeID ID; 2956 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2957 void *IP = 0; 2958 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2959 return SDValue(E, 0); 2960 2961 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2962 CSEMap.InsertNode(N, IP); 2963 } else { 2964 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 2965 } 2966 2967 AllNodes.push_back(N); 2968#ifndef NDEBUG 2969 VerifyNode(N); 2970#endif 2971 return SDValue(N, 0); 2972} 2973 2974SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2975 SDValue N1, SDValue N2, SDValue N3) { 2976 // Perform various simplifications. 2977 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2978 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2979 switch (Opcode) { 2980 case ISD::CONCAT_VECTORS: 2981 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2982 // one big BUILD_VECTOR. 2983 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2984 N2.getOpcode() == ISD::BUILD_VECTOR && 2985 N3.getOpcode() == ISD::BUILD_VECTOR) { 2986 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2987 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2988 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2989 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2990 } 2991 break; 2992 case ISD::SETCC: { 2993 // Use FoldSetCC to simplify SETCC's. 2994 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 2995 if (Simp.getNode()) return Simp; 2996 break; 2997 } 2998 case ISD::SELECT: 2999 if (N1C) { 3000 if (N1C->getZExtValue()) 3001 return N2; // select true, X, Y -> X 3002 else 3003 return N3; // select false, X, Y -> Y 3004 } 3005 3006 if (N2 == N3) return N2; // select C, X, X -> X 3007 break; 3008 case ISD::BRCOND: 3009 if (N2C) { 3010 if (N2C->getZExtValue()) // Unconditional branch 3011 return getNode(ISD::BR, DL, MVT::Other, N1, N3); 3012 else 3013 return N1; // Never-taken branch 3014 } 3015 break; 3016 case ISD::VECTOR_SHUFFLE: 3017 llvm_unreachable("should use getVectorShuffle constructor!"); 3018 break; 3019 case ISD::BIT_CONVERT: 3020 // Fold bit_convert nodes from a type to themselves. 3021 if (N1.getValueType() == VT) 3022 return N1; 3023 break; 3024 } 3025 3026 // Memoize node if it doesn't produce a flag. 3027 SDNode *N; 3028 SDVTList VTs = getVTList(VT); 3029 if (VT != MVT::Flag) { 3030 SDValue Ops[] = { N1, N2, N3 }; 3031 FoldingSetNodeID ID; 3032 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3033 void *IP = 0; 3034 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3035 return SDValue(E, 0); 3036 3037 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3038 CSEMap.InsertNode(N, IP); 3039 } else { 3040 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3041 } 3042 3043 AllNodes.push_back(N); 3044#ifndef NDEBUG 3045 VerifyNode(N); 3046#endif 3047 return SDValue(N, 0); 3048} 3049 3050SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3051 SDValue N1, SDValue N2, SDValue N3, 3052 SDValue N4) { 3053 SDValue Ops[] = { N1, N2, N3, N4 }; 3054 return getNode(Opcode, DL, VT, Ops, 4); 3055} 3056 3057SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3058 SDValue N1, SDValue N2, SDValue N3, 3059 SDValue N4, SDValue N5) { 3060 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3061 return getNode(Opcode, DL, VT, Ops, 5); 3062} 3063 3064/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3065/// the incoming stack arguments to be loaded from the stack. 3066SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3067 SmallVector<SDValue, 8> ArgChains; 3068 3069 // Include the original chain at the beginning of the list. When this is 3070 // used by target LowerCall hooks, this helps legalize find the 3071 // CALLSEQ_BEGIN node. 3072 ArgChains.push_back(Chain); 3073 3074 // Add a chain value for each stack argument. 3075 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3076 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3077 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3078 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3079 if (FI->getIndex() < 0) 3080 ArgChains.push_back(SDValue(L, 1)); 3081 3082 // Build a tokenfactor for all the chains. 3083 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3084 &ArgChains[0], ArgChains.size()); 3085} 3086 3087/// getMemsetValue - Vectorized representation of the memset value 3088/// operand. 3089static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3090 DebugLoc dl) { 3091 assert(Value.getOpcode() != ISD::UNDEF); 3092 3093 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3094 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3095 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 3096 unsigned Shift = 8; 3097 for (unsigned i = NumBits; i > 8; i >>= 1) { 3098 Val = (Val << Shift) | Val; 3099 Shift <<= 1; 3100 } 3101 if (VT.isInteger()) 3102 return DAG.getConstant(Val, VT); 3103 return DAG.getConstantFP(APFloat(Val), VT); 3104 } 3105 3106 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3107 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3108 unsigned Shift = 8; 3109 for (unsigned i = NumBits; i > 8; i >>= 1) { 3110 Value = DAG.getNode(ISD::OR, dl, VT, 3111 DAG.getNode(ISD::SHL, dl, VT, Value, 3112 DAG.getConstant(Shift, 3113 TLI.getShiftAmountTy())), 3114 Value); 3115 Shift <<= 1; 3116 } 3117 3118 return Value; 3119} 3120 3121/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3122/// used when a memcpy is turned into a memset when the source is a constant 3123/// string ptr. 3124static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3125 const TargetLowering &TLI, 3126 std::string &Str, unsigned Offset) { 3127 // Handle vector with all elements zero. 3128 if (Str.empty()) { 3129 if (VT.isInteger()) 3130 return DAG.getConstant(0, VT); 3131 else if (VT.getSimpleVT().SimpleTy == MVT::f32 || 3132 VT.getSimpleVT().SimpleTy == MVT::f64) 3133 return DAG.getConstantFP(0.0, VT); 3134 else if (VT.isVector()) { 3135 unsigned NumElts = VT.getVectorNumElements(); 3136 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3137 return DAG.getNode(ISD::BIT_CONVERT, dl, VT, 3138 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3139 EltVT, NumElts))); 3140 } else 3141 llvm_unreachable("Expected type!"); 3142 } 3143 3144 assert(!VT.isVector() && "Can't handle vector type here!"); 3145 unsigned NumBits = VT.getSizeInBits(); 3146 unsigned MSB = NumBits / 8; 3147 uint64_t Val = 0; 3148 if (TLI.isLittleEndian()) 3149 Offset = Offset + MSB - 1; 3150 for (unsigned i = 0; i != MSB; ++i) { 3151 Val = (Val << 8) | (unsigned char)Str[Offset]; 3152 Offset += TLI.isLittleEndian() ? -1 : 1; 3153 } 3154 return DAG.getConstant(Val, VT); 3155} 3156 3157/// getMemBasePlusOffset - Returns base and offset node for the 3158/// 3159static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3160 SelectionDAG &DAG) { 3161 EVT VT = Base.getValueType(); 3162 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3163 VT, Base, DAG.getConstant(Offset, VT)); 3164} 3165 3166/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3167/// 3168static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3169 unsigned SrcDelta = 0; 3170 GlobalAddressSDNode *G = NULL; 3171 if (Src.getOpcode() == ISD::GlobalAddress) 3172 G = cast<GlobalAddressSDNode>(Src); 3173 else if (Src.getOpcode() == ISD::ADD && 3174 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3175 Src.getOperand(1).getOpcode() == ISD::Constant) { 3176 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3177 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3178 } 3179 if (!G) 3180 return false; 3181 3182 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3183 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3184 return true; 3185 3186 return false; 3187} 3188 3189/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3190/// to replace the memset / memcpy. Return true if the number of memory ops 3191/// is below the threshold. It returns the types of the sequence of 3192/// memory ops to perform memset / memcpy by reference. 3193static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3194 unsigned Limit, uint64_t Size, 3195 unsigned DstAlign, unsigned SrcAlign, 3196 bool NonScalarIntSafe, 3197 SelectionDAG &DAG, 3198 const TargetLowering &TLI) { 3199 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3200 "Expecting memcpy / memset source to meet alignment requirement!"); 3201 // If 'SrcAlign' is zero, that means the memory operation does not need load 3202 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3203 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3204 // specified alignment of the memory operation. If it is zero, that means 3205 // it's possible to change the alignment of the destination. 3206 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3207 NonScalarIntSafe, DAG); 3208 3209 if (VT == MVT::Other) { 3210 VT = TLI.getPointerTy(); 3211 const Type *Ty = VT.getTypeForEVT(*DAG.getContext()); 3212 if (DstAlign >= TLI.getTargetData()->getABITypeAlignment(Ty) || 3213 TLI.allowsUnalignedMemoryAccesses(VT)) { 3214 VT = MVT::i64; 3215 } else { 3216 switch (DstAlign & 7) { 3217 case 0: VT = MVT::i64; break; 3218 case 4: VT = MVT::i32; break; 3219 case 2: VT = MVT::i16; break; 3220 default: VT = MVT::i8; break; 3221 } 3222 } 3223 3224 MVT LVT = MVT::i64; 3225 while (!TLI.isTypeLegal(LVT)) 3226 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3227 assert(LVT.isInteger()); 3228 3229 if (VT.bitsGT(LVT)) 3230 VT = LVT; 3231 } 3232 3233 unsigned NumMemOps = 0; 3234 while (Size != 0) { 3235 unsigned VTSize = VT.getSizeInBits() / 8; 3236 while (VTSize > Size) { 3237 // For now, only use non-vector load / store's for the left-over pieces. 3238 if (VT.isVector() || VT.isFloatingPoint()) { 3239 VT = MVT::i64; 3240 while (!TLI.isTypeLegal(VT)) 3241 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3242 VTSize = VT.getSizeInBits() / 8; 3243 } else { 3244 // This can result in a type that is not legal on the target, e.g. 3245 // 1 or 2 bytes on PPC. 3246 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3247 VTSize >>= 1; 3248 } 3249 } 3250 3251 if (++NumMemOps > Limit) 3252 return false; 3253 MemOps.push_back(VT); 3254 Size -= VTSize; 3255 } 3256 3257 return true; 3258} 3259 3260static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3261 SDValue Chain, SDValue Dst, 3262 SDValue Src, uint64_t Size, 3263 unsigned Align, bool isVol, 3264 bool AlwaysInline, 3265 const Value *DstSV, uint64_t DstSVOff, 3266 const Value *SrcSV, uint64_t SrcSVOff) { 3267 // Turn a memcpy of undef to nop. 3268 if (Src.getOpcode() == ISD::UNDEF) 3269 return Chain; 3270 3271 // Expand memcpy to a series of load and store ops if the size operand falls 3272 // below a certain threshold. 3273 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3274 std::vector<EVT> MemOps; 3275 uint64_t Limit = -1ULL; 3276 if (!AlwaysInline) 3277 Limit = TLI.getMaxStoresPerMemcpy(); 3278 bool DstAlignCanChange = false; 3279 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3280 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3281 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3282 DstAlignCanChange = true; 3283 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3284 if (Align > SrcAlign) 3285 SrcAlign = Align; 3286 std::string Str; 3287 bool CopyFromStr = isMemSrcFromString(Src, Str); 3288 bool isZeroStr = CopyFromStr && Str.empty(); 3289 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3290 (DstAlignCanChange ? 0 : Align), 3291 (isZeroStr ? 0 : SrcAlign), true, DAG, TLI)) 3292 return SDValue(); 3293 3294 if (DstAlignCanChange) { 3295 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3296 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3297 if (NewAlign > Align) { 3298 // Give the stack frame object a larger alignment if needed. 3299 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3300 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3301 Align = NewAlign; 3302 } 3303 } 3304 3305 SmallVector<SDValue, 8> OutChains; 3306 unsigned NumMemOps = MemOps.size(); 3307 uint64_t SrcOff = 0, DstOff = 0; 3308 for (unsigned i = 0; i != NumMemOps; ++i) { 3309 EVT VT = MemOps[i]; 3310 unsigned VTSize = VT.getSizeInBits() / 8; 3311 SDValue Value, Store; 3312 3313 if (CopyFromStr && 3314 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3315 // It's unlikely a store of a vector immediate can be done in a single 3316 // instruction. It would require a load from a constantpool first. 3317 // We only handle zero vectors here. 3318 // FIXME: Handle other cases where store of vector immediate is done in 3319 // a single instruction. 3320 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3321 Store = DAG.getStore(Chain, dl, Value, 3322 getMemBasePlusOffset(Dst, DstOff, DAG), 3323 DstSV, DstSVOff + DstOff, isVol, false, Align); 3324 } else { 3325 // The type might not be legal for the target. This should only happen 3326 // if the type is smaller than a legal type, as on PPC, so the right 3327 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3328 // to Load/Store if NVT==VT. 3329 // FIXME does the case above also need this? 3330 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3331 assert(NVT.bitsGE(VT)); 3332 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3333 getMemBasePlusOffset(Src, SrcOff, DAG), 3334 SrcSV, SrcSVOff + SrcOff, VT, isVol, false, 3335 MinAlign(SrcAlign, SrcOff)); 3336 Store = DAG.getTruncStore(Chain, dl, Value, 3337 getMemBasePlusOffset(Dst, DstOff, DAG), 3338 DstSV, DstSVOff + DstOff, VT, isVol, false, 3339 Align); 3340 } 3341 OutChains.push_back(Store); 3342 SrcOff += VTSize; 3343 DstOff += VTSize; 3344 } 3345 3346 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3347 &OutChains[0], OutChains.size()); 3348} 3349 3350static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3351 SDValue Chain, SDValue Dst, 3352 SDValue Src, uint64_t Size, 3353 unsigned Align, bool isVol, 3354 bool AlwaysInline, 3355 const Value *DstSV, uint64_t DstSVOff, 3356 const Value *SrcSV, uint64_t SrcSVOff) { 3357 // Turn a memmove of undef to nop. 3358 if (Src.getOpcode() == ISD::UNDEF) 3359 return Chain; 3360 3361 // Expand memmove to a series of load and store ops if the size operand falls 3362 // below a certain threshold. 3363 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3364 std::vector<EVT> MemOps; 3365 uint64_t Limit = -1ULL; 3366 if (!AlwaysInline) 3367 Limit = TLI.getMaxStoresPerMemmove(); 3368 bool DstAlignCanChange = false; 3369 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3370 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3371 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3372 DstAlignCanChange = true; 3373 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3374 if (Align > SrcAlign) 3375 SrcAlign = Align; 3376 3377 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3378 (DstAlignCanChange ? 0 : Align), 3379 SrcAlign, true, DAG, TLI)) 3380 return SDValue(); 3381 3382 if (DstAlignCanChange) { 3383 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3384 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3385 if (NewAlign > Align) { 3386 // Give the stack frame object a larger alignment if needed. 3387 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3388 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3389 Align = NewAlign; 3390 } 3391 } 3392 3393 uint64_t SrcOff = 0, DstOff = 0; 3394 SmallVector<SDValue, 8> LoadValues; 3395 SmallVector<SDValue, 8> LoadChains; 3396 SmallVector<SDValue, 8> OutChains; 3397 unsigned NumMemOps = MemOps.size(); 3398 for (unsigned i = 0; i < NumMemOps; i++) { 3399 EVT VT = MemOps[i]; 3400 unsigned VTSize = VT.getSizeInBits() / 8; 3401 SDValue Value, Store; 3402 3403 Value = DAG.getLoad(VT, dl, Chain, 3404 getMemBasePlusOffset(Src, SrcOff, DAG), 3405 SrcSV, SrcSVOff + SrcOff, isVol, false, SrcAlign); 3406 LoadValues.push_back(Value); 3407 LoadChains.push_back(Value.getValue(1)); 3408 SrcOff += VTSize; 3409 } 3410 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3411 &LoadChains[0], LoadChains.size()); 3412 OutChains.clear(); 3413 for (unsigned i = 0; i < NumMemOps; i++) { 3414 EVT VT = MemOps[i]; 3415 unsigned VTSize = VT.getSizeInBits() / 8; 3416 SDValue Value, Store; 3417 3418 Store = DAG.getStore(Chain, dl, LoadValues[i], 3419 getMemBasePlusOffset(Dst, DstOff, DAG), 3420 DstSV, DstSVOff + DstOff, isVol, false, Align); 3421 OutChains.push_back(Store); 3422 DstOff += VTSize; 3423 } 3424 3425 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3426 &OutChains[0], OutChains.size()); 3427} 3428 3429static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3430 SDValue Chain, SDValue Dst, 3431 SDValue Src, uint64_t Size, 3432 unsigned Align, bool isVol, 3433 const Value *DstSV, uint64_t DstSVOff) { 3434 // Turn a memset of undef to nop. 3435 if (Src.getOpcode() == ISD::UNDEF) 3436 return Chain; 3437 3438 // Expand memset to a series of load/store ops if the size operand 3439 // falls below a certain threshold. 3440 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3441 std::vector<EVT> MemOps; 3442 bool DstAlignCanChange = false; 3443 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3444 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3445 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3446 DstAlignCanChange = true; 3447 bool NonScalarIntSafe = 3448 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3449 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(), 3450 Size, (DstAlignCanChange ? 0 : Align), 0, 3451 NonScalarIntSafe, DAG, TLI)) 3452 return SDValue(); 3453 3454 if (DstAlignCanChange) { 3455 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3456 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3457 if (NewAlign > Align) { 3458 // Give the stack frame object a larger alignment if needed. 3459 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3460 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3461 Align = NewAlign; 3462 } 3463 } 3464 3465 SmallVector<SDValue, 8> OutChains; 3466 uint64_t DstOff = 0; 3467 unsigned NumMemOps = MemOps.size(); 3468 for (unsigned i = 0; i < NumMemOps; i++) { 3469 EVT VT = MemOps[i]; 3470 unsigned VTSize = VT.getSizeInBits() / 8; 3471 SDValue Value = getMemsetValue(Src, VT, DAG, dl); 3472 SDValue Store = DAG.getStore(Chain, dl, Value, 3473 getMemBasePlusOffset(Dst, DstOff, DAG), 3474 DstSV, DstSVOff + DstOff, isVol, false, 0); 3475 OutChains.push_back(Store); 3476 DstOff += VTSize; 3477 } 3478 3479 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3480 &OutChains[0], OutChains.size()); 3481} 3482 3483SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3484 SDValue Src, SDValue Size, 3485 unsigned Align, bool isVol, bool AlwaysInline, 3486 const Value *DstSV, uint64_t DstSVOff, 3487 const Value *SrcSV, uint64_t SrcSVOff) { 3488 3489 // Check to see if we should lower the memcpy to loads and stores first. 3490 // For cases within the target-specified limits, this is the best choice. 3491 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3492 if (ConstantSize) { 3493 // Memcpy with size zero? Just return the original chain. 3494 if (ConstantSize->isNullValue()) 3495 return Chain; 3496 3497 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3498 ConstantSize->getZExtValue(),Align, 3499 isVol, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3500 if (Result.getNode()) 3501 return Result; 3502 } 3503 3504 // Then check to see if we should lower the memcpy with target-specific 3505 // code. If the target chooses to do this, this is the next best. 3506 SDValue Result = 3507 TLI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3508 isVol, AlwaysInline, 3509 DstSV, DstSVOff, SrcSV, SrcSVOff); 3510 if (Result.getNode()) 3511 return Result; 3512 3513 // If we really need inline code and the target declined to provide it, 3514 // use a (potentially long) sequence of loads and stores. 3515 if (AlwaysInline) { 3516 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3517 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3518 ConstantSize->getZExtValue(), Align, isVol, 3519 true, DstSV, DstSVOff, SrcSV, SrcSVOff); 3520 } 3521 3522 // Emit a library call. 3523 assert(!isVol && "library memcpy does not support volatile"); 3524 TargetLowering::ArgListTy Args; 3525 TargetLowering::ArgListEntry Entry; 3526 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3527 Entry.Node = Dst; Args.push_back(Entry); 3528 Entry.Node = Src; Args.push_back(Entry); 3529 Entry.Node = Size; Args.push_back(Entry); 3530 // FIXME: pass in DebugLoc 3531 std::pair<SDValue,SDValue> CallResult = 3532 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3533 false, false, false, false, 0, 3534 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3535 /*isReturnValueUsed=*/false, 3536 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3537 TLI.getPointerTy()), 3538 Args, *this, dl); 3539 return CallResult.second; 3540} 3541 3542SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3543 SDValue Src, SDValue Size, 3544 unsigned Align, bool isVol, 3545 const Value *DstSV, uint64_t DstSVOff, 3546 const Value *SrcSV, uint64_t SrcSVOff) { 3547 3548 // Check to see if we should lower the memmove to loads and stores first. 3549 // For cases within the target-specified limits, this is the best choice. 3550 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3551 if (ConstantSize) { 3552 // Memmove with size zero? Just return the original chain. 3553 if (ConstantSize->isNullValue()) 3554 return Chain; 3555 3556 SDValue Result = 3557 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3558 ConstantSize->getZExtValue(), Align, isVol, 3559 false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3560 if (Result.getNode()) 3561 return Result; 3562 } 3563 3564 // Then check to see if we should lower the memmove with target-specific 3565 // code. If the target chooses to do this, this is the next best. 3566 SDValue Result = 3567 TLI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3568 DstSV, DstSVOff, SrcSV, SrcSVOff); 3569 if (Result.getNode()) 3570 return Result; 3571 3572 // Emit a library call. 3573 assert(!isVol && "library memmove does not support volatile"); 3574 TargetLowering::ArgListTy Args; 3575 TargetLowering::ArgListEntry Entry; 3576 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3577 Entry.Node = Dst; Args.push_back(Entry); 3578 Entry.Node = Src; Args.push_back(Entry); 3579 Entry.Node = Size; Args.push_back(Entry); 3580 // FIXME: pass in DebugLoc 3581 std::pair<SDValue,SDValue> CallResult = 3582 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3583 false, false, false, false, 0, 3584 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3585 /*isReturnValueUsed=*/false, 3586 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3587 TLI.getPointerTy()), 3588 Args, *this, dl); 3589 return CallResult.second; 3590} 3591 3592SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3593 SDValue Src, SDValue Size, 3594 unsigned Align, bool isVol, 3595 const Value *DstSV, uint64_t DstSVOff) { 3596 3597 // Check to see if we should lower the memset to stores first. 3598 // For cases within the target-specified limits, this is the best choice. 3599 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3600 if (ConstantSize) { 3601 // Memset with size zero? Just return the original chain. 3602 if (ConstantSize->isNullValue()) 3603 return Chain; 3604 3605 SDValue Result = 3606 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3607 Align, isVol, DstSV, DstSVOff); 3608 3609 if (Result.getNode()) 3610 return Result; 3611 } 3612 3613 // Then check to see if we should lower the memset with target-specific 3614 // code. If the target chooses to do this, this is the next best. 3615 SDValue Result = 3616 TLI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3617 DstSV, DstSVOff); 3618 if (Result.getNode()) 3619 return Result; 3620 3621 // Emit a library call. 3622 assert(!isVol && "library memset does not support volatile"); 3623 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3624 TargetLowering::ArgListTy Args; 3625 TargetLowering::ArgListEntry Entry; 3626 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3627 Args.push_back(Entry); 3628 // Extend or truncate the argument to be an i32 value for the call. 3629 if (Src.getValueType().bitsGT(MVT::i32)) 3630 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3631 else 3632 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3633 Entry.Node = Src; 3634 Entry.Ty = Type::getInt32Ty(*getContext()); 3635 Entry.isSExt = true; 3636 Args.push_back(Entry); 3637 Entry.Node = Size; 3638 Entry.Ty = IntPtrTy; 3639 Entry.isSExt = false; 3640 Args.push_back(Entry); 3641 // FIXME: pass in DebugLoc 3642 std::pair<SDValue,SDValue> CallResult = 3643 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3644 false, false, false, false, 0, 3645 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3646 /*isReturnValueUsed=*/false, 3647 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3648 TLI.getPointerTy()), 3649 Args, *this, dl); 3650 return CallResult.second; 3651} 3652 3653SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3654 SDValue Chain, 3655 SDValue Ptr, SDValue Cmp, 3656 SDValue Swp, const Value* PtrVal, 3657 unsigned Alignment) { 3658 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3659 Alignment = getEVTAlignment(MemVT); 3660 3661 // Check if the memory reference references a frame index 3662 if (!PtrVal) 3663 if (const FrameIndexSDNode *FI = 3664 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3665 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3666 3667 MachineFunction &MF = getMachineFunction(); 3668 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3669 3670 // For now, atomics are considered to be volatile always. 3671 Flags |= MachineMemOperand::MOVolatile; 3672 3673 MachineMemOperand *MMO = 3674 MF.getMachineMemOperand(PtrVal, Flags, 0, 3675 MemVT.getStoreSize(), Alignment); 3676 3677 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3678} 3679 3680SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3681 SDValue Chain, 3682 SDValue Ptr, SDValue Cmp, 3683 SDValue Swp, MachineMemOperand *MMO) { 3684 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3685 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3686 3687 EVT VT = Cmp.getValueType(); 3688 3689 SDVTList VTs = getVTList(VT, MVT::Other); 3690 FoldingSetNodeID ID; 3691 ID.AddInteger(MemVT.getRawBits()); 3692 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3693 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3694 void* IP = 0; 3695 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3696 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3697 return SDValue(E, 0); 3698 } 3699 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3700 Ptr, Cmp, Swp, MMO); 3701 CSEMap.InsertNode(N, IP); 3702 AllNodes.push_back(N); 3703 return SDValue(N, 0); 3704} 3705 3706SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3707 SDValue Chain, 3708 SDValue Ptr, SDValue Val, 3709 const Value* PtrVal, 3710 unsigned Alignment) { 3711 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3712 Alignment = getEVTAlignment(MemVT); 3713 3714 // Check if the memory reference references a frame index 3715 if (!PtrVal) 3716 if (const FrameIndexSDNode *FI = 3717 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3718 PtrVal = PseudoSourceValue::getFixedStack(FI->getIndex()); 3719 3720 MachineFunction &MF = getMachineFunction(); 3721 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3722 3723 // For now, atomics are considered to be volatile always. 3724 Flags |= MachineMemOperand::MOVolatile; 3725 3726 MachineMemOperand *MMO = 3727 MF.getMachineMemOperand(PtrVal, Flags, 0, 3728 MemVT.getStoreSize(), Alignment); 3729 3730 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3731} 3732 3733SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3734 SDValue Chain, 3735 SDValue Ptr, SDValue Val, 3736 MachineMemOperand *MMO) { 3737 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3738 Opcode == ISD::ATOMIC_LOAD_SUB || 3739 Opcode == ISD::ATOMIC_LOAD_AND || 3740 Opcode == ISD::ATOMIC_LOAD_OR || 3741 Opcode == ISD::ATOMIC_LOAD_XOR || 3742 Opcode == ISD::ATOMIC_LOAD_NAND || 3743 Opcode == ISD::ATOMIC_LOAD_MIN || 3744 Opcode == ISD::ATOMIC_LOAD_MAX || 3745 Opcode == ISD::ATOMIC_LOAD_UMIN || 3746 Opcode == ISD::ATOMIC_LOAD_UMAX || 3747 Opcode == ISD::ATOMIC_SWAP) && 3748 "Invalid Atomic Op"); 3749 3750 EVT VT = Val.getValueType(); 3751 3752 SDVTList VTs = getVTList(VT, MVT::Other); 3753 FoldingSetNodeID ID; 3754 ID.AddInteger(MemVT.getRawBits()); 3755 SDValue Ops[] = {Chain, Ptr, Val}; 3756 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3757 void* IP = 0; 3758 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3759 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3760 return SDValue(E, 0); 3761 } 3762 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3763 Ptr, Val, MMO); 3764 CSEMap.InsertNode(N, IP); 3765 AllNodes.push_back(N); 3766 return SDValue(N, 0); 3767} 3768 3769/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3770/// Allowed to return something different (and simpler) if Simplify is true. 3771SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3772 DebugLoc dl) { 3773 if (NumOps == 1) 3774 return Ops[0]; 3775 3776 SmallVector<EVT, 4> VTs; 3777 VTs.reserve(NumOps); 3778 for (unsigned i = 0; i < NumOps; ++i) 3779 VTs.push_back(Ops[i].getValueType()); 3780 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3781 Ops, NumOps); 3782} 3783 3784SDValue 3785SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3786 const EVT *VTs, unsigned NumVTs, 3787 const SDValue *Ops, unsigned NumOps, 3788 EVT MemVT, const Value *srcValue, int SVOff, 3789 unsigned Align, bool Vol, 3790 bool ReadMem, bool WriteMem) { 3791 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3792 MemVT, srcValue, SVOff, Align, Vol, 3793 ReadMem, WriteMem); 3794} 3795 3796SDValue 3797SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3798 const SDValue *Ops, unsigned NumOps, 3799 EVT MemVT, const Value *srcValue, int SVOff, 3800 unsigned Align, bool Vol, 3801 bool ReadMem, bool WriteMem) { 3802 if (Align == 0) // Ensure that codegen never sees alignment 0 3803 Align = getEVTAlignment(MemVT); 3804 3805 MachineFunction &MF = getMachineFunction(); 3806 unsigned Flags = 0; 3807 if (WriteMem) 3808 Flags |= MachineMemOperand::MOStore; 3809 if (ReadMem) 3810 Flags |= MachineMemOperand::MOLoad; 3811 if (Vol) 3812 Flags |= MachineMemOperand::MOVolatile; 3813 MachineMemOperand *MMO = 3814 MF.getMachineMemOperand(srcValue, Flags, SVOff, 3815 MemVT.getStoreSize(), Align); 3816 3817 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3818} 3819 3820SDValue 3821SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3822 const SDValue *Ops, unsigned NumOps, 3823 EVT MemVT, MachineMemOperand *MMO) { 3824 assert((Opcode == ISD::INTRINSIC_VOID || 3825 Opcode == ISD::INTRINSIC_W_CHAIN || 3826 (Opcode <= INT_MAX && 3827 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3828 "Opcode is not a memory-accessing opcode!"); 3829 3830 // Memoize the node unless it returns a flag. 3831 MemIntrinsicSDNode *N; 3832 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3833 FoldingSetNodeID ID; 3834 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3835 void *IP = 0; 3836 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3837 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3838 return SDValue(E, 0); 3839 } 3840 3841 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3842 MemVT, MMO); 3843 CSEMap.InsertNode(N, IP); 3844 } else { 3845 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3846 MemVT, MMO); 3847 } 3848 AllNodes.push_back(N); 3849 return SDValue(N, 0); 3850} 3851 3852SDValue 3853SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3854 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3855 SDValue Ptr, SDValue Offset, 3856 const Value *SV, int SVOffset, EVT MemVT, 3857 bool isVolatile, bool isNonTemporal, 3858 unsigned Alignment) { 3859 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3860 Alignment = getEVTAlignment(VT); 3861 3862 // Check if the memory reference references a frame index 3863 if (!SV) 3864 if (const FrameIndexSDNode *FI = 3865 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3866 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3867 3868 MachineFunction &MF = getMachineFunction(); 3869 unsigned Flags = MachineMemOperand::MOLoad; 3870 if (isVolatile) 3871 Flags |= MachineMemOperand::MOVolatile; 3872 if (isNonTemporal) 3873 Flags |= MachineMemOperand::MONonTemporal; 3874 MachineMemOperand *MMO = 3875 MF.getMachineMemOperand(SV, Flags, SVOffset, 3876 MemVT.getStoreSize(), Alignment); 3877 return getLoad(AM, dl, ExtType, VT, Chain, Ptr, Offset, MemVT, MMO); 3878} 3879 3880SDValue 3881SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl, 3882 ISD::LoadExtType ExtType, EVT VT, SDValue Chain, 3883 SDValue Ptr, SDValue Offset, EVT MemVT, 3884 MachineMemOperand *MMO) { 3885 if (VT == MemVT) { 3886 ExtType = ISD::NON_EXTLOAD; 3887 } else if (ExtType == ISD::NON_EXTLOAD) { 3888 assert(VT == MemVT && "Non-extending load from different memory type!"); 3889 } else { 3890 // Extending load. 3891 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 3892 "Should only be an extending load, not truncating!"); 3893 assert(VT.isInteger() == MemVT.isInteger() && 3894 "Cannot convert from FP to Int or Int -> FP!"); 3895 assert(VT.isVector() == MemVT.isVector() && 3896 "Cannot use trunc store to convert to or from a vector!"); 3897 assert((!VT.isVector() || 3898 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 3899 "Cannot use trunc store to change the number of vector elements!"); 3900 } 3901 3902 bool Indexed = AM != ISD::UNINDEXED; 3903 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3904 "Unindexed load with an offset!"); 3905 3906 SDVTList VTs = Indexed ? 3907 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3908 SDValue Ops[] = { Chain, Ptr, Offset }; 3909 FoldingSetNodeID ID; 3910 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3911 ID.AddInteger(MemVT.getRawBits()); 3912 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 3913 MMO->isNonTemporal())); 3914 void *IP = 0; 3915 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3916 cast<LoadSDNode>(E)->refineAlignment(MMO); 3917 return SDValue(E, 0); 3918 } 3919 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 3920 MemVT, MMO); 3921 CSEMap.InsertNode(N, IP); 3922 AllNodes.push_back(N); 3923 return SDValue(N, 0); 3924} 3925 3926SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 3927 SDValue Chain, SDValue Ptr, 3928 const Value *SV, int SVOffset, 3929 bool isVolatile, bool isNonTemporal, 3930 unsigned Alignment) { 3931 SDValue Undef = getUNDEF(Ptr.getValueType()); 3932 return getLoad(ISD::UNINDEXED, dl, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3933 SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment); 3934} 3935 3936SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 3937 SDValue Chain, SDValue Ptr, 3938 const Value *SV, 3939 int SVOffset, EVT MemVT, 3940 bool isVolatile, bool isNonTemporal, 3941 unsigned Alignment) { 3942 SDValue Undef = getUNDEF(Ptr.getValueType()); 3943 return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef, 3944 SV, SVOffset, MemVT, isVolatile, isNonTemporal, Alignment); 3945} 3946 3947SDValue 3948SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 3949 SDValue Offset, ISD::MemIndexedMode AM) { 3950 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3951 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3952 "Load is already a indexed load!"); 3953 return getLoad(AM, dl, LD->getExtensionType(), OrigLoad.getValueType(), 3954 LD->getChain(), Base, Offset, LD->getSrcValue(), 3955 LD->getSrcValueOffset(), LD->getMemoryVT(), 3956 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 3957} 3958 3959SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3960 SDValue Ptr, const Value *SV, int SVOffset, 3961 bool isVolatile, bool isNonTemporal, 3962 unsigned Alignment) { 3963 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3964 Alignment = getEVTAlignment(Val.getValueType()); 3965 3966 // Check if the memory reference references a frame index 3967 if (!SV) 3968 if (const FrameIndexSDNode *FI = 3969 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 3970 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 3971 3972 MachineFunction &MF = getMachineFunction(); 3973 unsigned Flags = MachineMemOperand::MOStore; 3974 if (isVolatile) 3975 Flags |= MachineMemOperand::MOVolatile; 3976 if (isNonTemporal) 3977 Flags |= MachineMemOperand::MONonTemporal; 3978 MachineMemOperand *MMO = 3979 MF.getMachineMemOperand(SV, Flags, SVOffset, 3980 Val.getValueType().getStoreSize(), Alignment); 3981 3982 return getStore(Chain, dl, Val, Ptr, MMO); 3983} 3984 3985SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 3986 SDValue Ptr, MachineMemOperand *MMO) { 3987 EVT VT = Val.getValueType(); 3988 SDVTList VTs = getVTList(MVT::Other); 3989 SDValue Undef = getUNDEF(Ptr.getValueType()); 3990 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3991 FoldingSetNodeID ID; 3992 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3993 ID.AddInteger(VT.getRawBits()); 3994 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 3995 MMO->isNonTemporal())); 3996 void *IP = 0; 3997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3998 cast<StoreSDNode>(E)->refineAlignment(MMO); 3999 return SDValue(E, 0); 4000 } 4001 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4002 false, VT, MMO); 4003 CSEMap.InsertNode(N, IP); 4004 AllNodes.push_back(N); 4005 return SDValue(N, 0); 4006} 4007 4008SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4009 SDValue Ptr, const Value *SV, 4010 int SVOffset, EVT SVT, 4011 bool isVolatile, bool isNonTemporal, 4012 unsigned Alignment) { 4013 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4014 Alignment = getEVTAlignment(SVT); 4015 4016 // Check if the memory reference references a frame index 4017 if (!SV) 4018 if (const FrameIndexSDNode *FI = 4019 dyn_cast<const FrameIndexSDNode>(Ptr.getNode())) 4020 SV = PseudoSourceValue::getFixedStack(FI->getIndex()); 4021 4022 MachineFunction &MF = getMachineFunction(); 4023 unsigned Flags = MachineMemOperand::MOStore; 4024 if (isVolatile) 4025 Flags |= MachineMemOperand::MOVolatile; 4026 if (isNonTemporal) 4027 Flags |= MachineMemOperand::MONonTemporal; 4028 MachineMemOperand *MMO = 4029 MF.getMachineMemOperand(SV, Flags, SVOffset, SVT.getStoreSize(), Alignment); 4030 4031 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4032} 4033 4034SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4035 SDValue Ptr, EVT SVT, 4036 MachineMemOperand *MMO) { 4037 EVT VT = Val.getValueType(); 4038 4039 if (VT == SVT) 4040 return getStore(Chain, dl, Val, Ptr, MMO); 4041 4042 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4043 "Should only be a truncating store, not extending!"); 4044 assert(VT.isInteger() == SVT.isInteger() && 4045 "Can't do FP-INT conversion!"); 4046 assert(VT.isVector() == SVT.isVector() && 4047 "Cannot use trunc store to convert to or from a vector!"); 4048 assert((!VT.isVector() || 4049 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4050 "Cannot use trunc store to change the number of vector elements!"); 4051 4052 SDVTList VTs = getVTList(MVT::Other); 4053 SDValue Undef = getUNDEF(Ptr.getValueType()); 4054 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4055 FoldingSetNodeID ID; 4056 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4057 ID.AddInteger(SVT.getRawBits()); 4058 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4059 MMO->isNonTemporal())); 4060 void *IP = 0; 4061 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4062 cast<StoreSDNode>(E)->refineAlignment(MMO); 4063 return SDValue(E, 0); 4064 } 4065 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4066 true, SVT, MMO); 4067 CSEMap.InsertNode(N, IP); 4068 AllNodes.push_back(N); 4069 return SDValue(N, 0); 4070} 4071 4072SDValue 4073SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4074 SDValue Offset, ISD::MemIndexedMode AM) { 4075 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4076 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4077 "Store is already a indexed store!"); 4078 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4079 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4080 FoldingSetNodeID ID; 4081 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4082 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4083 ID.AddInteger(ST->getRawSubclassData()); 4084 void *IP = 0; 4085 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4086 return SDValue(E, 0); 4087 4088 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4089 ST->isTruncatingStore(), 4090 ST->getMemoryVT(), 4091 ST->getMemOperand()); 4092 CSEMap.InsertNode(N, IP); 4093 AllNodes.push_back(N); 4094 return SDValue(N, 0); 4095} 4096 4097SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4098 SDValue Chain, SDValue Ptr, 4099 SDValue SV) { 4100 SDValue Ops[] = { Chain, Ptr, SV }; 4101 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3); 4102} 4103 4104SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4105 const SDUse *Ops, unsigned NumOps) { 4106 switch (NumOps) { 4107 case 0: return getNode(Opcode, DL, VT); 4108 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4109 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4110 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4111 default: break; 4112 } 4113 4114 // Copy from an SDUse array into an SDValue array for use with 4115 // the regular getNode logic. 4116 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4117 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4118} 4119 4120SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4121 const SDValue *Ops, unsigned NumOps) { 4122 switch (NumOps) { 4123 case 0: return getNode(Opcode, DL, VT); 4124 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4125 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4126 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4127 default: break; 4128 } 4129 4130 switch (Opcode) { 4131 default: break; 4132 case ISD::SELECT_CC: { 4133 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4134 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4135 "LHS and RHS of condition must have same type!"); 4136 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4137 "True and False arms of SelectCC must have same type!"); 4138 assert(Ops[2].getValueType() == VT && 4139 "select_cc node must be of same type as true and false value!"); 4140 break; 4141 } 4142 case ISD::BR_CC: { 4143 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4144 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4145 "LHS/RHS of comparison should match types!"); 4146 break; 4147 } 4148 } 4149 4150 // Memoize nodes. 4151 SDNode *N; 4152 SDVTList VTs = getVTList(VT); 4153 4154 if (VT != MVT::Flag) { 4155 FoldingSetNodeID ID; 4156 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4157 void *IP = 0; 4158 4159 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4160 return SDValue(E, 0); 4161 4162 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4163 CSEMap.InsertNode(N, IP); 4164 } else { 4165 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4166 } 4167 4168 AllNodes.push_back(N); 4169#ifndef NDEBUG 4170 VerifyNode(N); 4171#endif 4172 return SDValue(N, 0); 4173} 4174 4175SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4176 const std::vector<EVT> &ResultTys, 4177 const SDValue *Ops, unsigned NumOps) { 4178 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4179 Ops, NumOps); 4180} 4181 4182SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4183 const EVT *VTs, unsigned NumVTs, 4184 const SDValue *Ops, unsigned NumOps) { 4185 if (NumVTs == 1) 4186 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4187 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4188} 4189 4190SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4191 const SDValue *Ops, unsigned NumOps) { 4192 if (VTList.NumVTs == 1) 4193 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4194 4195#if 0 4196 switch (Opcode) { 4197 // FIXME: figure out how to safely handle things like 4198 // int foo(int x) { return 1 << (x & 255); } 4199 // int bar() { return foo(256); } 4200 case ISD::SRA_PARTS: 4201 case ISD::SRL_PARTS: 4202 case ISD::SHL_PARTS: 4203 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4204 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4205 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4206 else if (N3.getOpcode() == ISD::AND) 4207 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4208 // If the and is only masking out bits that cannot effect the shift, 4209 // eliminate the and. 4210 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4211 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4212 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4213 } 4214 break; 4215 } 4216#endif 4217 4218 // Memoize the node unless it returns a flag. 4219 SDNode *N; 4220 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4221 FoldingSetNodeID ID; 4222 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4223 void *IP = 0; 4224 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4225 return SDValue(E, 0); 4226 4227 if (NumOps == 1) { 4228 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4229 } else if (NumOps == 2) { 4230 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4231 } else if (NumOps == 3) { 4232 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4233 Ops[2]); 4234 } else { 4235 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4236 } 4237 CSEMap.InsertNode(N, IP); 4238 } else { 4239 if (NumOps == 1) { 4240 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4241 } else if (NumOps == 2) { 4242 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4243 } else if (NumOps == 3) { 4244 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4245 Ops[2]); 4246 } else { 4247 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4248 } 4249 } 4250 AllNodes.push_back(N); 4251#ifndef NDEBUG 4252 VerifyNode(N); 4253#endif 4254 return SDValue(N, 0); 4255} 4256 4257SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4258 return getNode(Opcode, DL, VTList, 0, 0); 4259} 4260 4261SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4262 SDValue N1) { 4263 SDValue Ops[] = { N1 }; 4264 return getNode(Opcode, DL, VTList, Ops, 1); 4265} 4266 4267SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4268 SDValue N1, SDValue N2) { 4269 SDValue Ops[] = { N1, N2 }; 4270 return getNode(Opcode, DL, VTList, Ops, 2); 4271} 4272 4273SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4274 SDValue N1, SDValue N2, SDValue N3) { 4275 SDValue Ops[] = { N1, N2, N3 }; 4276 return getNode(Opcode, DL, VTList, Ops, 3); 4277} 4278 4279SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4280 SDValue N1, SDValue N2, SDValue N3, 4281 SDValue N4) { 4282 SDValue Ops[] = { N1, N2, N3, N4 }; 4283 return getNode(Opcode, DL, VTList, Ops, 4); 4284} 4285 4286SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4287 SDValue N1, SDValue N2, SDValue N3, 4288 SDValue N4, SDValue N5) { 4289 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4290 return getNode(Opcode, DL, VTList, Ops, 5); 4291} 4292 4293SDVTList SelectionDAG::getVTList(EVT VT) { 4294 return makeVTList(SDNode::getValueTypeList(VT), 1); 4295} 4296 4297SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4298 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4299 E = VTList.rend(); I != E; ++I) 4300 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4301 return *I; 4302 4303 EVT *Array = Allocator.Allocate<EVT>(2); 4304 Array[0] = VT1; 4305 Array[1] = VT2; 4306 SDVTList Result = makeVTList(Array, 2); 4307 VTList.push_back(Result); 4308 return Result; 4309} 4310 4311SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4312 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4313 E = VTList.rend(); I != E; ++I) 4314 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4315 I->VTs[2] == VT3) 4316 return *I; 4317 4318 EVT *Array = Allocator.Allocate<EVT>(3); 4319 Array[0] = VT1; 4320 Array[1] = VT2; 4321 Array[2] = VT3; 4322 SDVTList Result = makeVTList(Array, 3); 4323 VTList.push_back(Result); 4324 return Result; 4325} 4326 4327SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4328 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4329 E = VTList.rend(); I != E; ++I) 4330 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4331 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4332 return *I; 4333 4334 EVT *Array = Allocator.Allocate<EVT>(4); 4335 Array[0] = VT1; 4336 Array[1] = VT2; 4337 Array[2] = VT3; 4338 Array[3] = VT4; 4339 SDVTList Result = makeVTList(Array, 4); 4340 VTList.push_back(Result); 4341 return Result; 4342} 4343 4344SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4345 switch (NumVTs) { 4346 case 0: llvm_unreachable("Cannot have nodes without results!"); 4347 case 1: return getVTList(VTs[0]); 4348 case 2: return getVTList(VTs[0], VTs[1]); 4349 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4350 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4351 default: break; 4352 } 4353 4354 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4355 E = VTList.rend(); I != E; ++I) { 4356 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4357 continue; 4358 4359 bool NoMatch = false; 4360 for (unsigned i = 2; i != NumVTs; ++i) 4361 if (VTs[i] != I->VTs[i]) { 4362 NoMatch = true; 4363 break; 4364 } 4365 if (!NoMatch) 4366 return *I; 4367 } 4368 4369 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4370 std::copy(VTs, VTs+NumVTs, Array); 4371 SDVTList Result = makeVTList(Array, NumVTs); 4372 VTList.push_back(Result); 4373 return Result; 4374} 4375 4376 4377/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4378/// specified operands. If the resultant node already exists in the DAG, 4379/// this does not modify the specified node, instead it returns the node that 4380/// already exists. If the resultant node does not exist in the DAG, the 4381/// input node is returned. As a degenerate case, if you specify the same 4382/// input operands as the node already has, the input node is returned. 4383SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 4384 SDNode *N = InN.getNode(); 4385 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4386 4387 // Check to see if there is no change. 4388 if (Op == N->getOperand(0)) return InN; 4389 4390 // See if the modified node already exists. 4391 void *InsertPos = 0; 4392 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4393 return SDValue(Existing, InN.getResNo()); 4394 4395 // Nope it doesn't. Remove the node from its current place in the maps. 4396 if (InsertPos) 4397 if (!RemoveNodeFromCSEMaps(N)) 4398 InsertPos = 0; 4399 4400 // Now we update the operands. 4401 N->OperandList[0].set(Op); 4402 4403 // If this gets put into a CSE map, add it. 4404 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4405 return InN; 4406} 4407 4408SDValue SelectionDAG:: 4409UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 4410 SDNode *N = InN.getNode(); 4411 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4412 4413 // Check to see if there is no change. 4414 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4415 return InN; // No operands changed, just return the input node. 4416 4417 // See if the modified node already exists. 4418 void *InsertPos = 0; 4419 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4420 return SDValue(Existing, InN.getResNo()); 4421 4422 // Nope it doesn't. Remove the node from its current place in the maps. 4423 if (InsertPos) 4424 if (!RemoveNodeFromCSEMaps(N)) 4425 InsertPos = 0; 4426 4427 // Now we update the operands. 4428 if (N->OperandList[0] != Op1) 4429 N->OperandList[0].set(Op1); 4430 if (N->OperandList[1] != Op2) 4431 N->OperandList[1].set(Op2); 4432 4433 // If this gets put into a CSE map, add it. 4434 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4435 return InN; 4436} 4437 4438SDValue SelectionDAG:: 4439UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 4440 SDValue Ops[] = { Op1, Op2, Op3 }; 4441 return UpdateNodeOperands(N, Ops, 3); 4442} 4443 4444SDValue SelectionDAG:: 4445UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4446 SDValue Op3, SDValue Op4) { 4447 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4448 return UpdateNodeOperands(N, Ops, 4); 4449} 4450 4451SDValue SelectionDAG:: 4452UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 4453 SDValue Op3, SDValue Op4, SDValue Op5) { 4454 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4455 return UpdateNodeOperands(N, Ops, 5); 4456} 4457 4458SDValue SelectionDAG:: 4459UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 4460 SDNode *N = InN.getNode(); 4461 assert(N->getNumOperands() == NumOps && 4462 "Update with wrong number of operands"); 4463 4464 // Check to see if there is no change. 4465 bool AnyChange = false; 4466 for (unsigned i = 0; i != NumOps; ++i) { 4467 if (Ops[i] != N->getOperand(i)) { 4468 AnyChange = true; 4469 break; 4470 } 4471 } 4472 4473 // No operands changed, just return the input node. 4474 if (!AnyChange) return InN; 4475 4476 // See if the modified node already exists. 4477 void *InsertPos = 0; 4478 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4479 return SDValue(Existing, InN.getResNo()); 4480 4481 // Nope it doesn't. Remove the node from its current place in the maps. 4482 if (InsertPos) 4483 if (!RemoveNodeFromCSEMaps(N)) 4484 InsertPos = 0; 4485 4486 // Now we update the operands. 4487 for (unsigned i = 0; i != NumOps; ++i) 4488 if (N->OperandList[i] != Ops[i]) 4489 N->OperandList[i].set(Ops[i]); 4490 4491 // If this gets put into a CSE map, add it. 4492 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4493 return InN; 4494} 4495 4496/// DropOperands - Release the operands and set this node to have 4497/// zero operands. 4498void SDNode::DropOperands() { 4499 // Unlike the code in MorphNodeTo that does this, we don't need to 4500 // watch for dead nodes here. 4501 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4502 SDUse &Use = *I++; 4503 Use.set(SDValue()); 4504 } 4505} 4506 4507/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4508/// machine opcode. 4509/// 4510SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4511 EVT VT) { 4512 SDVTList VTs = getVTList(VT); 4513 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4514} 4515 4516SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4517 EVT VT, SDValue Op1) { 4518 SDVTList VTs = getVTList(VT); 4519 SDValue Ops[] = { Op1 }; 4520 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4521} 4522 4523SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4524 EVT VT, SDValue Op1, 4525 SDValue Op2) { 4526 SDVTList VTs = getVTList(VT); 4527 SDValue Ops[] = { Op1, Op2 }; 4528 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4529} 4530 4531SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4532 EVT VT, SDValue Op1, 4533 SDValue Op2, SDValue Op3) { 4534 SDVTList VTs = getVTList(VT); 4535 SDValue Ops[] = { Op1, Op2, Op3 }; 4536 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4537} 4538 4539SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4540 EVT VT, const SDValue *Ops, 4541 unsigned NumOps) { 4542 SDVTList VTs = getVTList(VT); 4543 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4544} 4545 4546SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4547 EVT VT1, EVT VT2, const SDValue *Ops, 4548 unsigned NumOps) { 4549 SDVTList VTs = getVTList(VT1, VT2); 4550 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4551} 4552 4553SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4554 EVT VT1, EVT VT2) { 4555 SDVTList VTs = getVTList(VT1, VT2); 4556 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4557} 4558 4559SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4560 EVT VT1, EVT VT2, EVT VT3, 4561 const SDValue *Ops, unsigned NumOps) { 4562 SDVTList VTs = getVTList(VT1, VT2, VT3); 4563 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4564} 4565 4566SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4567 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4568 const SDValue *Ops, unsigned NumOps) { 4569 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4570 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4571} 4572 4573SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4574 EVT VT1, EVT VT2, 4575 SDValue Op1) { 4576 SDVTList VTs = getVTList(VT1, VT2); 4577 SDValue Ops[] = { Op1 }; 4578 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4579} 4580 4581SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4582 EVT VT1, EVT VT2, 4583 SDValue Op1, SDValue Op2) { 4584 SDVTList VTs = getVTList(VT1, VT2); 4585 SDValue Ops[] = { Op1, Op2 }; 4586 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4587} 4588 4589SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4590 EVT VT1, EVT VT2, 4591 SDValue Op1, SDValue Op2, 4592 SDValue Op3) { 4593 SDVTList VTs = getVTList(VT1, VT2); 4594 SDValue Ops[] = { Op1, Op2, Op3 }; 4595 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4596} 4597 4598SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4599 EVT VT1, EVT VT2, EVT VT3, 4600 SDValue Op1, SDValue Op2, 4601 SDValue Op3) { 4602 SDVTList VTs = getVTList(VT1, VT2, VT3); 4603 SDValue Ops[] = { Op1, Op2, Op3 }; 4604 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4605} 4606 4607SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4608 SDVTList VTs, const SDValue *Ops, 4609 unsigned NumOps) { 4610 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4611 // Reset the NodeID to -1. 4612 N->setNodeId(-1); 4613 return N; 4614} 4615 4616/// MorphNodeTo - This *mutates* the specified node to have the specified 4617/// return type, opcode, and operands. 4618/// 4619/// Note that MorphNodeTo returns the resultant node. If there is already a 4620/// node of the specified opcode and operands, it returns that node instead of 4621/// the current one. Note that the DebugLoc need not be the same. 4622/// 4623/// Using MorphNodeTo is faster than creating a new node and swapping it in 4624/// with ReplaceAllUsesWith both because it often avoids allocating a new 4625/// node, and because it doesn't require CSE recalculation for any of 4626/// the node's users. 4627/// 4628SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4629 SDVTList VTs, const SDValue *Ops, 4630 unsigned NumOps) { 4631 // If an identical node already exists, use it. 4632 void *IP = 0; 4633 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4634 FoldingSetNodeID ID; 4635 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4636 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4637 return ON; 4638 } 4639 4640 if (!RemoveNodeFromCSEMaps(N)) 4641 IP = 0; 4642 4643 // Start the morphing. 4644 N->NodeType = Opc; 4645 N->ValueList = VTs.VTs; 4646 N->NumValues = VTs.NumVTs; 4647 4648 // Clear the operands list, updating used nodes to remove this from their 4649 // use list. Keep track of any operands that become dead as a result. 4650 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4651 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4652 SDUse &Use = *I++; 4653 SDNode *Used = Use.getNode(); 4654 Use.set(SDValue()); 4655 if (Used->use_empty()) 4656 DeadNodeSet.insert(Used); 4657 } 4658 4659 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4660 // Initialize the memory references information. 4661 MN->setMemRefs(0, 0); 4662 // If NumOps is larger than the # of operands we can have in a 4663 // MachineSDNode, reallocate the operand list. 4664 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4665 if (MN->OperandsNeedDelete) 4666 delete[] MN->OperandList; 4667 if (NumOps > array_lengthof(MN->LocalOperands)) 4668 // We're creating a final node that will live unmorphed for the 4669 // remainder of the current SelectionDAG iteration, so we can allocate 4670 // the operands directly out of a pool with no recycling metadata. 4671 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4672 Ops, NumOps); 4673 else 4674 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4675 MN->OperandsNeedDelete = false; 4676 } else 4677 MN->InitOperands(MN->OperandList, Ops, NumOps); 4678 } else { 4679 // If NumOps is larger than the # of operands we currently have, reallocate 4680 // the operand list. 4681 if (NumOps > N->NumOperands) { 4682 if (N->OperandsNeedDelete) 4683 delete[] N->OperandList; 4684 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4685 N->OperandsNeedDelete = true; 4686 } else 4687 N->InitOperands(N->OperandList, Ops, NumOps); 4688 } 4689 4690 // Delete any nodes that are still dead after adding the uses for the 4691 // new operands. 4692 if (!DeadNodeSet.empty()) { 4693 SmallVector<SDNode *, 16> DeadNodes; 4694 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4695 E = DeadNodeSet.end(); I != E; ++I) 4696 if ((*I)->use_empty()) 4697 DeadNodes.push_back(*I); 4698 RemoveDeadNodes(DeadNodes); 4699 } 4700 4701 if (IP) 4702 CSEMap.InsertNode(N, IP); // Memoize the new node. 4703 return N; 4704} 4705 4706 4707/// getMachineNode - These are used for target selectors to create a new node 4708/// with specified return type(s), MachineInstr opcode, and operands. 4709/// 4710/// Note that getMachineNode returns the resultant node. If there is already a 4711/// node of the specified opcode and operands, it returns that node instead of 4712/// the current one. 4713MachineSDNode * 4714SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4715 SDVTList VTs = getVTList(VT); 4716 return getMachineNode(Opcode, dl, VTs, 0, 0); 4717} 4718 4719MachineSDNode * 4720SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4721 SDVTList VTs = getVTList(VT); 4722 SDValue Ops[] = { Op1 }; 4723 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4724} 4725 4726MachineSDNode * 4727SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4728 SDValue Op1, SDValue Op2) { 4729 SDVTList VTs = getVTList(VT); 4730 SDValue Ops[] = { Op1, Op2 }; 4731 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4732} 4733 4734MachineSDNode * 4735SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4736 SDValue Op1, SDValue Op2, SDValue Op3) { 4737 SDVTList VTs = getVTList(VT); 4738 SDValue Ops[] = { Op1, Op2, Op3 }; 4739 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4740} 4741 4742MachineSDNode * 4743SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4744 const SDValue *Ops, unsigned NumOps) { 4745 SDVTList VTs = getVTList(VT); 4746 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4747} 4748 4749MachineSDNode * 4750SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4751 SDVTList VTs = getVTList(VT1, VT2); 4752 return getMachineNode(Opcode, dl, VTs, 0, 0); 4753} 4754 4755MachineSDNode * 4756SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4757 EVT VT1, EVT VT2, SDValue Op1) { 4758 SDVTList VTs = getVTList(VT1, VT2); 4759 SDValue Ops[] = { Op1 }; 4760 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4761} 4762 4763MachineSDNode * 4764SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4765 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4766 SDVTList VTs = getVTList(VT1, VT2); 4767 SDValue Ops[] = { Op1, Op2 }; 4768 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4769} 4770 4771MachineSDNode * 4772SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4773 EVT VT1, EVT VT2, SDValue Op1, 4774 SDValue Op2, SDValue Op3) { 4775 SDVTList VTs = getVTList(VT1, VT2); 4776 SDValue Ops[] = { Op1, Op2, Op3 }; 4777 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4778} 4779 4780MachineSDNode * 4781SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4782 EVT VT1, EVT VT2, 4783 const SDValue *Ops, unsigned NumOps) { 4784 SDVTList VTs = getVTList(VT1, VT2); 4785 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4786} 4787 4788MachineSDNode * 4789SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4790 EVT VT1, EVT VT2, EVT VT3, 4791 SDValue Op1, SDValue Op2) { 4792 SDVTList VTs = getVTList(VT1, VT2, VT3); 4793 SDValue Ops[] = { Op1, Op2 }; 4794 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4795} 4796 4797MachineSDNode * 4798SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4799 EVT VT1, EVT VT2, EVT VT3, 4800 SDValue Op1, SDValue Op2, SDValue Op3) { 4801 SDVTList VTs = getVTList(VT1, VT2, VT3); 4802 SDValue Ops[] = { Op1, Op2, Op3 }; 4803 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4804} 4805 4806MachineSDNode * 4807SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4808 EVT VT1, EVT VT2, EVT VT3, 4809 const SDValue *Ops, unsigned NumOps) { 4810 SDVTList VTs = getVTList(VT1, VT2, VT3); 4811 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4812} 4813 4814MachineSDNode * 4815SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4816 EVT VT2, EVT VT3, EVT VT4, 4817 const SDValue *Ops, unsigned NumOps) { 4818 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4819 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4820} 4821 4822MachineSDNode * 4823SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4824 const std::vector<EVT> &ResultTys, 4825 const SDValue *Ops, unsigned NumOps) { 4826 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4827 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4828} 4829 4830MachineSDNode * 4831SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4832 const SDValue *Ops, unsigned NumOps) { 4833 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag; 4834 MachineSDNode *N; 4835 void *IP; 4836 4837 if (DoCSE) { 4838 FoldingSetNodeID ID; 4839 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4840 IP = 0; 4841 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4842 return cast<MachineSDNode>(E); 4843 } 4844 4845 // Allocate a new MachineSDNode. 4846 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4847 4848 // Initialize the operands list. 4849 if (NumOps > array_lengthof(N->LocalOperands)) 4850 // We're creating a final node that will live unmorphed for the 4851 // remainder of the current SelectionDAG iteration, so we can allocate 4852 // the operands directly out of a pool with no recycling metadata. 4853 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4854 Ops, NumOps); 4855 else 4856 N->InitOperands(N->LocalOperands, Ops, NumOps); 4857 N->OperandsNeedDelete = false; 4858 4859 if (DoCSE) 4860 CSEMap.InsertNode(N, IP); 4861 4862 AllNodes.push_back(N); 4863#ifndef NDEBUG 4864 VerifyNode(N); 4865#endif 4866 return N; 4867} 4868 4869/// getTargetExtractSubreg - A convenience function for creating 4870/// TargetOpcode::EXTRACT_SUBREG nodes. 4871SDValue 4872SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 4873 SDValue Operand) { 4874 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4875 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 4876 VT, Operand, SRIdxVal); 4877 return SDValue(Subreg, 0); 4878} 4879 4880/// getTargetInsertSubreg - A convenience function for creating 4881/// TargetOpcode::INSERT_SUBREG nodes. 4882SDValue 4883SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 4884 SDValue Operand, SDValue Subreg) { 4885 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 4886 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 4887 VT, Operand, Subreg, SRIdxVal); 4888 return SDValue(Result, 0); 4889} 4890 4891/// getNodeIfExists - Get the specified node if it's already available, or 4892/// else return NULL. 4893SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4894 const SDValue *Ops, unsigned NumOps) { 4895 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4896 FoldingSetNodeID ID; 4897 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4898 void *IP = 0; 4899 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4900 return E; 4901 } 4902 return NULL; 4903} 4904 4905/// getDbgValue - Creates a SDDbgValue node. 4906/// 4907SDDbgValue * 4908SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 4909 DebugLoc DL, unsigned O) { 4910 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 4911} 4912 4913SDDbgValue * 4914SelectionDAG::getDbgValue(MDNode *MDPtr, Value *C, uint64_t Off, 4915 DebugLoc DL, unsigned O) { 4916 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 4917} 4918 4919SDDbgValue * 4920SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 4921 DebugLoc DL, unsigned O) { 4922 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 4923} 4924 4925namespace { 4926 4927/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 4928/// pointed to by a use iterator is deleted, increment the use iterator 4929/// so that it doesn't dangle. 4930/// 4931/// This class also manages a "downlink" DAGUpdateListener, to forward 4932/// messages to ReplaceAllUsesWith's callers. 4933/// 4934class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 4935 SelectionDAG::DAGUpdateListener *DownLink; 4936 SDNode::use_iterator &UI; 4937 SDNode::use_iterator &UE; 4938 4939 virtual void NodeDeleted(SDNode *N, SDNode *E) { 4940 // Increment the iterator as needed. 4941 while (UI != UE && N == *UI) 4942 ++UI; 4943 4944 // Then forward the message. 4945 if (DownLink) DownLink->NodeDeleted(N, E); 4946 } 4947 4948 virtual void NodeUpdated(SDNode *N) { 4949 // Just forward the message. 4950 if (DownLink) DownLink->NodeUpdated(N); 4951 } 4952 4953public: 4954 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 4955 SDNode::use_iterator &ui, 4956 SDNode::use_iterator &ue) 4957 : DownLink(dl), UI(ui), UE(ue) {} 4958}; 4959 4960} 4961 4962/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4963/// This can cause recursive merging of nodes in the DAG. 4964/// 4965/// This version assumes From has a single result value. 4966/// 4967void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4968 DAGUpdateListener *UpdateListener) { 4969 SDNode *From = FromN.getNode(); 4970 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4971 "Cannot replace with this method!"); 4972 assert(From != To.getNode() && "Cannot replace uses of with self"); 4973 4974 // Iterate over all the existing uses of From. New uses will be added 4975 // to the beginning of the use list, which we avoid visiting. 4976 // This specifically avoids visiting uses of From that arise while the 4977 // replacement is happening, because any such uses would be the result 4978 // of CSE: If an existing node looks like From after one of its operands 4979 // is replaced by To, we don't want to replace of all its users with To 4980 // too. See PR3018 for more info. 4981 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 4982 RAUWUpdateListener Listener(UpdateListener, UI, UE); 4983 while (UI != UE) { 4984 SDNode *User = *UI; 4985 4986 // This node is about to morph, remove its old self from the CSE maps. 4987 RemoveNodeFromCSEMaps(User); 4988 4989 // A user can appear in a use list multiple times, and when this 4990 // happens the uses are usually next to each other in the list. 4991 // To help reduce the number of CSE recomputations, process all 4992 // the uses of this user that we can find this way. 4993 do { 4994 SDUse &Use = UI.getUse(); 4995 ++UI; 4996 Use.set(To); 4997 } while (UI != UE && *UI == User); 4998 4999 // Now that we have modified User, add it back to the CSE maps. If it 5000 // already exists there, recursively merge the results together. 5001 AddModifiedNodeToCSEMaps(User, &Listener); 5002 } 5003} 5004 5005/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5006/// This can cause recursive merging of nodes in the DAG. 5007/// 5008/// This version assumes that for each value of From, there is a 5009/// corresponding value in To in the same position with the same type. 5010/// 5011void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5012 DAGUpdateListener *UpdateListener) { 5013#ifndef NDEBUG 5014 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5015 assert((!From->hasAnyUseOfValue(i) || 5016 From->getValueType(i) == To->getValueType(i)) && 5017 "Cannot use this version of ReplaceAllUsesWith!"); 5018#endif 5019 5020 // Handle the trivial case. 5021 if (From == To) 5022 return; 5023 5024 // Iterate over just the existing users of From. See the comments in 5025 // the ReplaceAllUsesWith above. 5026 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5027 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5028 while (UI != UE) { 5029 SDNode *User = *UI; 5030 5031 // This node is about to morph, remove its old self from the CSE maps. 5032 RemoveNodeFromCSEMaps(User); 5033 5034 // A user can appear in a use list multiple times, and when this 5035 // happens the uses are usually next to each other in the list. 5036 // To help reduce the number of CSE recomputations, process all 5037 // the uses of this user that we can find this way. 5038 do { 5039 SDUse &Use = UI.getUse(); 5040 ++UI; 5041 Use.setNode(To); 5042 } while (UI != UE && *UI == User); 5043 5044 // Now that we have modified User, add it back to the CSE maps. If it 5045 // already exists there, recursively merge the results together. 5046 AddModifiedNodeToCSEMaps(User, &Listener); 5047 } 5048} 5049 5050/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5051/// This can cause recursive merging of nodes in the DAG. 5052/// 5053/// This version can replace From with any result values. To must match the 5054/// number and types of values returned by From. 5055void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5056 const SDValue *To, 5057 DAGUpdateListener *UpdateListener) { 5058 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5059 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5060 5061 // Iterate over just the existing users of From. See the comments in 5062 // the ReplaceAllUsesWith above. 5063 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5064 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5065 while (UI != UE) { 5066 SDNode *User = *UI; 5067 5068 // This node is about to morph, remove its old self from the CSE maps. 5069 RemoveNodeFromCSEMaps(User); 5070 5071 // A user can appear in a use list multiple times, and when this 5072 // happens the uses are usually next to each other in the list. 5073 // To help reduce the number of CSE recomputations, process all 5074 // the uses of this user that we can find this way. 5075 do { 5076 SDUse &Use = UI.getUse(); 5077 const SDValue &ToOp = To[Use.getResNo()]; 5078 ++UI; 5079 Use.set(ToOp); 5080 } while (UI != UE && *UI == User); 5081 5082 // Now that we have modified User, add it back to the CSE maps. If it 5083 // already exists there, recursively merge the results together. 5084 AddModifiedNodeToCSEMaps(User, &Listener); 5085 } 5086} 5087 5088/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5089/// uses of other values produced by From.getNode() alone. The Deleted 5090/// vector is handled the same way as for ReplaceAllUsesWith. 5091void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5092 DAGUpdateListener *UpdateListener){ 5093 // Handle the really simple, really trivial case efficiently. 5094 if (From == To) return; 5095 5096 // Handle the simple, trivial, case efficiently. 5097 if (From.getNode()->getNumValues() == 1) { 5098 ReplaceAllUsesWith(From, To, UpdateListener); 5099 return; 5100 } 5101 5102 // Iterate over just the existing users of From. See the comments in 5103 // the ReplaceAllUsesWith above. 5104 SDNode::use_iterator UI = From.getNode()->use_begin(), 5105 UE = From.getNode()->use_end(); 5106 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5107 while (UI != UE) { 5108 SDNode *User = *UI; 5109 bool UserRemovedFromCSEMaps = false; 5110 5111 // A user can appear in a use list multiple times, and when this 5112 // happens the uses are usually next to each other in the list. 5113 // To help reduce the number of CSE recomputations, process all 5114 // the uses of this user that we can find this way. 5115 do { 5116 SDUse &Use = UI.getUse(); 5117 5118 // Skip uses of different values from the same node. 5119 if (Use.getResNo() != From.getResNo()) { 5120 ++UI; 5121 continue; 5122 } 5123 5124 // If this node hasn't been modified yet, it's still in the CSE maps, 5125 // so remove its old self from the CSE maps. 5126 if (!UserRemovedFromCSEMaps) { 5127 RemoveNodeFromCSEMaps(User); 5128 UserRemovedFromCSEMaps = true; 5129 } 5130 5131 ++UI; 5132 Use.set(To); 5133 } while (UI != UE && *UI == User); 5134 5135 // We are iterating over all uses of the From node, so if a use 5136 // doesn't use the specific value, no changes are made. 5137 if (!UserRemovedFromCSEMaps) 5138 continue; 5139 5140 // Now that we have modified User, add it back to the CSE maps. If it 5141 // already exists there, recursively merge the results together. 5142 AddModifiedNodeToCSEMaps(User, &Listener); 5143 } 5144} 5145 5146namespace { 5147 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5148 /// to record information about a use. 5149 struct UseMemo { 5150 SDNode *User; 5151 unsigned Index; 5152 SDUse *Use; 5153 }; 5154 5155 /// operator< - Sort Memos by User. 5156 bool operator<(const UseMemo &L, const UseMemo &R) { 5157 return (intptr_t)L.User < (intptr_t)R.User; 5158 } 5159} 5160 5161/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5162/// uses of other values produced by From.getNode() alone. The same value 5163/// may appear in both the From and To list. The Deleted vector is 5164/// handled the same way as for ReplaceAllUsesWith. 5165void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5166 const SDValue *To, 5167 unsigned Num, 5168 DAGUpdateListener *UpdateListener){ 5169 // Handle the simple, trivial case efficiently. 5170 if (Num == 1) 5171 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5172 5173 // Read up all the uses and make records of them. This helps 5174 // processing new uses that are introduced during the 5175 // replacement process. 5176 SmallVector<UseMemo, 4> Uses; 5177 for (unsigned i = 0; i != Num; ++i) { 5178 unsigned FromResNo = From[i].getResNo(); 5179 SDNode *FromNode = From[i].getNode(); 5180 for (SDNode::use_iterator UI = FromNode->use_begin(), 5181 E = FromNode->use_end(); UI != E; ++UI) { 5182 SDUse &Use = UI.getUse(); 5183 if (Use.getResNo() == FromResNo) { 5184 UseMemo Memo = { *UI, i, &Use }; 5185 Uses.push_back(Memo); 5186 } 5187 } 5188 } 5189 5190 // Sort the uses, so that all the uses from a given User are together. 5191 std::sort(Uses.begin(), Uses.end()); 5192 5193 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5194 UseIndex != UseIndexEnd; ) { 5195 // We know that this user uses some value of From. If it is the right 5196 // value, update it. 5197 SDNode *User = Uses[UseIndex].User; 5198 5199 // This node is about to morph, remove its old self from the CSE maps. 5200 RemoveNodeFromCSEMaps(User); 5201 5202 // The Uses array is sorted, so all the uses for a given User 5203 // are next to each other in the list. 5204 // To help reduce the number of CSE recomputations, process all 5205 // the uses of this user that we can find this way. 5206 do { 5207 unsigned i = Uses[UseIndex].Index; 5208 SDUse &Use = *Uses[UseIndex].Use; 5209 ++UseIndex; 5210 5211 Use.set(To[i]); 5212 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5213 5214 // Now that we have modified User, add it back to the CSE maps. If it 5215 // already exists there, recursively merge the results together. 5216 AddModifiedNodeToCSEMaps(User, UpdateListener); 5217 } 5218} 5219 5220/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5221/// based on their topological order. It returns the maximum id and a vector 5222/// of the SDNodes* in assigned order by reference. 5223unsigned SelectionDAG::AssignTopologicalOrder() { 5224 5225 unsigned DAGSize = 0; 5226 5227 // SortedPos tracks the progress of the algorithm. Nodes before it are 5228 // sorted, nodes after it are unsorted. When the algorithm completes 5229 // it is at the end of the list. 5230 allnodes_iterator SortedPos = allnodes_begin(); 5231 5232 // Visit all the nodes. Move nodes with no operands to the front of 5233 // the list immediately. Annotate nodes that do have operands with their 5234 // operand count. Before we do this, the Node Id fields of the nodes 5235 // may contain arbitrary values. After, the Node Id fields for nodes 5236 // before SortedPos will contain the topological sort index, and the 5237 // Node Id fields for nodes At SortedPos and after will contain the 5238 // count of outstanding operands. 5239 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5240 SDNode *N = I++; 5241 checkForCycles(N); 5242 unsigned Degree = N->getNumOperands(); 5243 if (Degree == 0) { 5244 // A node with no uses, add it to the result array immediately. 5245 N->setNodeId(DAGSize++); 5246 allnodes_iterator Q = N; 5247 if (Q != SortedPos) 5248 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5249 assert(SortedPos != AllNodes.end() && "Overran node list"); 5250 ++SortedPos; 5251 } else { 5252 // Temporarily use the Node Id as scratch space for the degree count. 5253 N->setNodeId(Degree); 5254 } 5255 } 5256 5257 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5258 // such that by the time the end is reached all nodes will be sorted. 5259 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5260 SDNode *N = I; 5261 checkForCycles(N); 5262 // N is in sorted position, so all its uses have one less operand 5263 // that needs to be sorted. 5264 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5265 UI != UE; ++UI) { 5266 SDNode *P = *UI; 5267 unsigned Degree = P->getNodeId(); 5268 assert(Degree != 0 && "Invalid node degree"); 5269 --Degree; 5270 if (Degree == 0) { 5271 // All of P's operands are sorted, so P may sorted now. 5272 P->setNodeId(DAGSize++); 5273 if (P != SortedPos) 5274 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5275 assert(SortedPos != AllNodes.end() && "Overran node list"); 5276 ++SortedPos; 5277 } else { 5278 // Update P's outstanding operand count. 5279 P->setNodeId(Degree); 5280 } 5281 } 5282 if (I == SortedPos) { 5283#ifndef NDEBUG 5284 SDNode *S = ++I; 5285 dbgs() << "Overran sorted position:\n"; 5286 S->dumprFull(); 5287#endif 5288 llvm_unreachable(0); 5289 } 5290 } 5291 5292 assert(SortedPos == AllNodes.end() && 5293 "Topological sort incomplete!"); 5294 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5295 "First node in topological sort is not the entry token!"); 5296 assert(AllNodes.front().getNodeId() == 0 && 5297 "First node in topological sort has non-zero id!"); 5298 assert(AllNodes.front().getNumOperands() == 0 && 5299 "First node in topological sort has operands!"); 5300 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5301 "Last node in topologic sort has unexpected id!"); 5302 assert(AllNodes.back().use_empty() && 5303 "Last node in topologic sort has users!"); 5304 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5305 return DAGSize; 5306} 5307 5308/// AssignOrdering - Assign an order to the SDNode. 5309void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5310 assert(SD && "Trying to assign an order to a null node!"); 5311 Ordering->add(SD, Order); 5312} 5313 5314/// GetOrdering - Get the order for the SDNode. 5315unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5316 assert(SD && "Trying to get the order of a null node!"); 5317 return Ordering->getOrder(SD); 5318} 5319 5320/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5321/// value is produced by SD. 5322void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD) { 5323 DbgInfo->add(DB, SD); 5324 if (SD) 5325 SD->setHasDebugValue(true); 5326} 5327 5328//===----------------------------------------------------------------------===// 5329// SDNode Class 5330//===----------------------------------------------------------------------===// 5331 5332HandleSDNode::~HandleSDNode() { 5333 DropOperands(); 5334} 5335 5336GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA, 5337 EVT VT, int64_t o, unsigned char TF) 5338 : SDNode(Opc, DebugLoc(), getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5339 TheGlobal = const_cast<GlobalValue*>(GA); 5340} 5341 5342MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5343 MachineMemOperand *mmo) 5344 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5345 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5346 MMO->isNonTemporal()); 5347 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5348 assert(isNonTemporal() == MMO->isNonTemporal() && 5349 "Non-temporal encoding error!"); 5350 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5351} 5352 5353MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5354 const SDValue *Ops, unsigned NumOps, EVT memvt, 5355 MachineMemOperand *mmo) 5356 : SDNode(Opc, dl, VTs, Ops, NumOps), 5357 MemoryVT(memvt), MMO(mmo) { 5358 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5359 MMO->isNonTemporal()); 5360 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5361 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5362} 5363 5364/// Profile - Gather unique data for the node. 5365/// 5366void SDNode::Profile(FoldingSetNodeID &ID) const { 5367 AddNodeIDNode(ID, this); 5368} 5369 5370namespace { 5371 struct EVTArray { 5372 std::vector<EVT> VTs; 5373 5374 EVTArray() { 5375 VTs.reserve(MVT::LAST_VALUETYPE); 5376 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5377 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5378 } 5379 }; 5380} 5381 5382static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5383static ManagedStatic<EVTArray> SimpleVTArray; 5384static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5385 5386/// getValueTypeList - Return a pointer to the specified value type. 5387/// 5388const EVT *SDNode::getValueTypeList(EVT VT) { 5389 if (VT.isExtended()) { 5390 sys::SmartScopedLock<true> Lock(*VTMutex); 5391 return &(*EVTs->insert(VT).first); 5392 } else { 5393 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5394 } 5395} 5396 5397/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5398/// indicated value. This method ignores uses of other values defined by this 5399/// operation. 5400bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5401 assert(Value < getNumValues() && "Bad value!"); 5402 5403 // TODO: Only iterate over uses of a given value of the node 5404 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5405 if (UI.getUse().getResNo() == Value) { 5406 if (NUses == 0) 5407 return false; 5408 --NUses; 5409 } 5410 } 5411 5412 // Found exactly the right number of uses? 5413 return NUses == 0; 5414} 5415 5416 5417/// hasAnyUseOfValue - Return true if there are any use of the indicated 5418/// value. This method ignores uses of other values defined by this operation. 5419bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5420 assert(Value < getNumValues() && "Bad value!"); 5421 5422 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5423 if (UI.getUse().getResNo() == Value) 5424 return true; 5425 5426 return false; 5427} 5428 5429 5430/// isOnlyUserOf - Return true if this node is the only use of N. 5431/// 5432bool SDNode::isOnlyUserOf(SDNode *N) const { 5433 bool Seen = false; 5434 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5435 SDNode *User = *I; 5436 if (User == this) 5437 Seen = true; 5438 else 5439 return false; 5440 } 5441 5442 return Seen; 5443} 5444 5445/// isOperand - Return true if this node is an operand of N. 5446/// 5447bool SDValue::isOperandOf(SDNode *N) const { 5448 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5449 if (*this == N->getOperand(i)) 5450 return true; 5451 return false; 5452} 5453 5454bool SDNode::isOperandOf(SDNode *N) const { 5455 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5456 if (this == N->OperandList[i].getNode()) 5457 return true; 5458 return false; 5459} 5460 5461/// reachesChainWithoutSideEffects - Return true if this operand (which must 5462/// be a chain) reaches the specified operand without crossing any 5463/// side-effecting instructions. In practice, this looks through token 5464/// factors and non-volatile loads. In order to remain efficient, this only 5465/// looks a couple of nodes in, it does not do an exhaustive search. 5466bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5467 unsigned Depth) const { 5468 if (*this == Dest) return true; 5469 5470 // Don't search too deeply, we just want to be able to see through 5471 // TokenFactor's etc. 5472 if (Depth == 0) return false; 5473 5474 // If this is a token factor, all inputs to the TF happen in parallel. If any 5475 // of the operands of the TF reach dest, then we can do the xform. 5476 if (getOpcode() == ISD::TokenFactor) { 5477 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5478 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5479 return true; 5480 return false; 5481 } 5482 5483 // Loads don't have side effects, look through them. 5484 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5485 if (!Ld->isVolatile()) 5486 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5487 } 5488 return false; 5489} 5490 5491/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5492/// is either an operand of N or it can be reached by traversing up the operands. 5493/// NOTE: this is an expensive method. Use it carefully. 5494bool SDNode::isPredecessorOf(SDNode *N) const { 5495 SmallPtrSet<SDNode *, 32> Visited; 5496 SmallVector<SDNode *, 16> Worklist; 5497 Worklist.push_back(N); 5498 5499 do { 5500 N = Worklist.pop_back_val(); 5501 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5502 SDNode *Op = N->getOperand(i).getNode(); 5503 if (Op == this) 5504 return true; 5505 if (Visited.insert(Op)) 5506 Worklist.push_back(Op); 5507 } 5508 } while (!Worklist.empty()); 5509 5510 return false; 5511} 5512 5513uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5514 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5515 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5516} 5517 5518std::string SDNode::getOperationName(const SelectionDAG *G) const { 5519 switch (getOpcode()) { 5520 default: 5521 if (getOpcode() < ISD::BUILTIN_OP_END) 5522 return "<<Unknown DAG Node>>"; 5523 if (isMachineOpcode()) { 5524 if (G) 5525 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5526 if (getMachineOpcode() < TII->getNumOpcodes()) 5527 return TII->get(getMachineOpcode()).getName(); 5528 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5529 } 5530 if (G) { 5531 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5532 const char *Name = TLI.getTargetNodeName(getOpcode()); 5533 if (Name) return Name; 5534 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5535 } 5536 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5537 5538#ifndef NDEBUG 5539 case ISD::DELETED_NODE: 5540 return "<<Deleted Node!>>"; 5541#endif 5542 case ISD::PREFETCH: return "Prefetch"; 5543 case ISD::MEMBARRIER: return "MemBarrier"; 5544 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5545 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5546 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5547 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5548 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5549 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5550 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5551 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5552 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5553 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5554 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5555 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5556 case ISD::PCMARKER: return "PCMarker"; 5557 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5558 case ISD::SRCVALUE: return "SrcValue"; 5559 case ISD::EntryToken: return "EntryToken"; 5560 case ISD::TokenFactor: return "TokenFactor"; 5561 case ISD::AssertSext: return "AssertSext"; 5562 case ISD::AssertZext: return "AssertZext"; 5563 5564 case ISD::BasicBlock: return "BasicBlock"; 5565 case ISD::VALUETYPE: return "ValueType"; 5566 case ISD::Register: return "Register"; 5567 5568 case ISD::Constant: return "Constant"; 5569 case ISD::ConstantFP: return "ConstantFP"; 5570 case ISD::GlobalAddress: return "GlobalAddress"; 5571 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5572 case ISD::FrameIndex: return "FrameIndex"; 5573 case ISD::JumpTable: return "JumpTable"; 5574 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5575 case ISD::RETURNADDR: return "RETURNADDR"; 5576 case ISD::FRAMEADDR: return "FRAMEADDR"; 5577 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5578 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5579 case ISD::LSDAADDR: return "LSDAADDR"; 5580 case ISD::EHSELECTION: return "EHSELECTION"; 5581 case ISD::EH_RETURN: return "EH_RETURN"; 5582 case ISD::ConstantPool: return "ConstantPool"; 5583 case ISD::ExternalSymbol: return "ExternalSymbol"; 5584 case ISD::BlockAddress: return "BlockAddress"; 5585 case ISD::INTRINSIC_WO_CHAIN: 5586 case ISD::INTRINSIC_VOID: 5587 case ISD::INTRINSIC_W_CHAIN: { 5588 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5589 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5590 if (IID < Intrinsic::num_intrinsics) 5591 return Intrinsic::getName((Intrinsic::ID)IID); 5592 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5593 return TII->getName(IID); 5594 llvm_unreachable("Invalid intrinsic ID"); 5595 } 5596 5597 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5598 case ISD::TargetConstant: return "TargetConstant"; 5599 case ISD::TargetConstantFP:return "TargetConstantFP"; 5600 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5601 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5602 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5603 case ISD::TargetJumpTable: return "TargetJumpTable"; 5604 case ISD::TargetConstantPool: return "TargetConstantPool"; 5605 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5606 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5607 5608 case ISD::CopyToReg: return "CopyToReg"; 5609 case ISD::CopyFromReg: return "CopyFromReg"; 5610 case ISD::UNDEF: return "undef"; 5611 case ISD::MERGE_VALUES: return "merge_values"; 5612 case ISD::INLINEASM: return "inlineasm"; 5613 case ISD::EH_LABEL: return "eh_label"; 5614 case ISD::HANDLENODE: return "handlenode"; 5615 5616 // Unary operators 5617 case ISD::FABS: return "fabs"; 5618 case ISD::FNEG: return "fneg"; 5619 case ISD::FSQRT: return "fsqrt"; 5620 case ISD::FSIN: return "fsin"; 5621 case ISD::FCOS: return "fcos"; 5622 case ISD::FPOWI: return "fpowi"; 5623 case ISD::FPOW: return "fpow"; 5624 case ISD::FTRUNC: return "ftrunc"; 5625 case ISD::FFLOOR: return "ffloor"; 5626 case ISD::FCEIL: return "fceil"; 5627 case ISD::FRINT: return "frint"; 5628 case ISD::FNEARBYINT: return "fnearbyint"; 5629 5630 // Binary operators 5631 case ISD::ADD: return "add"; 5632 case ISD::SUB: return "sub"; 5633 case ISD::MUL: return "mul"; 5634 case ISD::MULHU: return "mulhu"; 5635 case ISD::MULHS: return "mulhs"; 5636 case ISD::SDIV: return "sdiv"; 5637 case ISD::UDIV: return "udiv"; 5638 case ISD::SREM: return "srem"; 5639 case ISD::UREM: return "urem"; 5640 case ISD::SMUL_LOHI: return "smul_lohi"; 5641 case ISD::UMUL_LOHI: return "umul_lohi"; 5642 case ISD::SDIVREM: return "sdivrem"; 5643 case ISD::UDIVREM: return "udivrem"; 5644 case ISD::AND: return "and"; 5645 case ISD::OR: return "or"; 5646 case ISD::XOR: return "xor"; 5647 case ISD::SHL: return "shl"; 5648 case ISD::SRA: return "sra"; 5649 case ISD::SRL: return "srl"; 5650 case ISD::ROTL: return "rotl"; 5651 case ISD::ROTR: return "rotr"; 5652 case ISD::FADD: return "fadd"; 5653 case ISD::FSUB: return "fsub"; 5654 case ISD::FMUL: return "fmul"; 5655 case ISD::FDIV: return "fdiv"; 5656 case ISD::FREM: return "frem"; 5657 case ISD::FCOPYSIGN: return "fcopysign"; 5658 case ISD::FGETSIGN: return "fgetsign"; 5659 5660 case ISD::SETCC: return "setcc"; 5661 case ISD::VSETCC: return "vsetcc"; 5662 case ISD::SELECT: return "select"; 5663 case ISD::SELECT_CC: return "select_cc"; 5664 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5665 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5666 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5667 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5668 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5669 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5670 case ISD::CARRY_FALSE: return "carry_false"; 5671 case ISD::ADDC: return "addc"; 5672 case ISD::ADDE: return "adde"; 5673 case ISD::SADDO: return "saddo"; 5674 case ISD::UADDO: return "uaddo"; 5675 case ISD::SSUBO: return "ssubo"; 5676 case ISD::USUBO: return "usubo"; 5677 case ISD::SMULO: return "smulo"; 5678 case ISD::UMULO: return "umulo"; 5679 case ISD::SUBC: return "subc"; 5680 case ISD::SUBE: return "sube"; 5681 case ISD::SHL_PARTS: return "shl_parts"; 5682 case ISD::SRA_PARTS: return "sra_parts"; 5683 case ISD::SRL_PARTS: return "srl_parts"; 5684 5685 // Conversion operators. 5686 case ISD::SIGN_EXTEND: return "sign_extend"; 5687 case ISD::ZERO_EXTEND: return "zero_extend"; 5688 case ISD::ANY_EXTEND: return "any_extend"; 5689 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5690 case ISD::TRUNCATE: return "truncate"; 5691 case ISD::FP_ROUND: return "fp_round"; 5692 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5693 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5694 case ISD::FP_EXTEND: return "fp_extend"; 5695 5696 case ISD::SINT_TO_FP: return "sint_to_fp"; 5697 case ISD::UINT_TO_FP: return "uint_to_fp"; 5698 case ISD::FP_TO_SINT: return "fp_to_sint"; 5699 case ISD::FP_TO_UINT: return "fp_to_uint"; 5700 case ISD::BIT_CONVERT: return "bit_convert"; 5701 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5702 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5703 5704 case ISD::CONVERT_RNDSAT: { 5705 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5706 default: llvm_unreachable("Unknown cvt code!"); 5707 case ISD::CVT_FF: return "cvt_ff"; 5708 case ISD::CVT_FS: return "cvt_fs"; 5709 case ISD::CVT_FU: return "cvt_fu"; 5710 case ISD::CVT_SF: return "cvt_sf"; 5711 case ISD::CVT_UF: return "cvt_uf"; 5712 case ISD::CVT_SS: return "cvt_ss"; 5713 case ISD::CVT_SU: return "cvt_su"; 5714 case ISD::CVT_US: return "cvt_us"; 5715 case ISD::CVT_UU: return "cvt_uu"; 5716 } 5717 } 5718 5719 // Control flow instructions 5720 case ISD::BR: return "br"; 5721 case ISD::BRIND: return "brind"; 5722 case ISD::BR_JT: return "br_jt"; 5723 case ISD::BRCOND: return "brcond"; 5724 case ISD::BR_CC: return "br_cc"; 5725 case ISD::CALLSEQ_START: return "callseq_start"; 5726 case ISD::CALLSEQ_END: return "callseq_end"; 5727 5728 // Other operators 5729 case ISD::LOAD: return "load"; 5730 case ISD::STORE: return "store"; 5731 case ISD::VAARG: return "vaarg"; 5732 case ISD::VACOPY: return "vacopy"; 5733 case ISD::VAEND: return "vaend"; 5734 case ISD::VASTART: return "vastart"; 5735 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5736 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5737 case ISD::BUILD_PAIR: return "build_pair"; 5738 case ISD::STACKSAVE: return "stacksave"; 5739 case ISD::STACKRESTORE: return "stackrestore"; 5740 case ISD::TRAP: return "trap"; 5741 5742 // Bit manipulation 5743 case ISD::BSWAP: return "bswap"; 5744 case ISD::CTPOP: return "ctpop"; 5745 case ISD::CTTZ: return "cttz"; 5746 case ISD::CTLZ: return "ctlz"; 5747 5748 // Trampolines 5749 case ISD::TRAMPOLINE: return "trampoline"; 5750 5751 case ISD::CONDCODE: 5752 switch (cast<CondCodeSDNode>(this)->get()) { 5753 default: llvm_unreachable("Unknown setcc condition!"); 5754 case ISD::SETOEQ: return "setoeq"; 5755 case ISD::SETOGT: return "setogt"; 5756 case ISD::SETOGE: return "setoge"; 5757 case ISD::SETOLT: return "setolt"; 5758 case ISD::SETOLE: return "setole"; 5759 case ISD::SETONE: return "setone"; 5760 5761 case ISD::SETO: return "seto"; 5762 case ISD::SETUO: return "setuo"; 5763 case ISD::SETUEQ: return "setue"; 5764 case ISD::SETUGT: return "setugt"; 5765 case ISD::SETUGE: return "setuge"; 5766 case ISD::SETULT: return "setult"; 5767 case ISD::SETULE: return "setule"; 5768 case ISD::SETUNE: return "setune"; 5769 5770 case ISD::SETEQ: return "seteq"; 5771 case ISD::SETGT: return "setgt"; 5772 case ISD::SETGE: return "setge"; 5773 case ISD::SETLT: return "setlt"; 5774 case ISD::SETLE: return "setle"; 5775 case ISD::SETNE: return "setne"; 5776 } 5777 } 5778} 5779 5780const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5781 switch (AM) { 5782 default: 5783 return ""; 5784 case ISD::PRE_INC: 5785 return "<pre-inc>"; 5786 case ISD::PRE_DEC: 5787 return "<pre-dec>"; 5788 case ISD::POST_INC: 5789 return "<post-inc>"; 5790 case ISD::POST_DEC: 5791 return "<post-dec>"; 5792 } 5793} 5794 5795std::string ISD::ArgFlagsTy::getArgFlagsString() { 5796 std::string S = "< "; 5797 5798 if (isZExt()) 5799 S += "zext "; 5800 if (isSExt()) 5801 S += "sext "; 5802 if (isInReg()) 5803 S += "inreg "; 5804 if (isSRet()) 5805 S += "sret "; 5806 if (isByVal()) 5807 S += "byval "; 5808 if (isNest()) 5809 S += "nest "; 5810 if (getByValAlign()) 5811 S += "byval-align:" + utostr(getByValAlign()) + " "; 5812 if (getOrigAlign()) 5813 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5814 if (getByValSize()) 5815 S += "byval-size:" + utostr(getByValSize()) + " "; 5816 return S + ">"; 5817} 5818 5819void SDNode::dump() const { dump(0); } 5820void SDNode::dump(const SelectionDAG *G) const { 5821 print(dbgs(), G); 5822} 5823 5824void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 5825 OS << (void*)this << ": "; 5826 5827 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5828 if (i) OS << ","; 5829 if (getValueType(i) == MVT::Other) 5830 OS << "ch"; 5831 else 5832 OS << getValueType(i).getEVTString(); 5833 } 5834 OS << " = " << getOperationName(G); 5835} 5836 5837void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 5838 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 5839 if (!MN->memoperands_empty()) { 5840 OS << "<"; 5841 OS << "Mem:"; 5842 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 5843 e = MN->memoperands_end(); i != e; ++i) { 5844 OS << **i; 5845 if (next(i) != e) 5846 OS << " "; 5847 } 5848 OS << ">"; 5849 } 5850 } else if (const ShuffleVectorSDNode *SVN = 5851 dyn_cast<ShuffleVectorSDNode>(this)) { 5852 OS << "<"; 5853 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 5854 int Idx = SVN->getMaskElt(i); 5855 if (i) OS << ","; 5856 if (Idx < 0) 5857 OS << "u"; 5858 else 5859 OS << Idx; 5860 } 5861 OS << ">"; 5862 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5863 OS << '<' << CSDN->getAPIntValue() << '>'; 5864 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5865 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5866 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5867 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5868 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5869 else { 5870 OS << "<APFloat("; 5871 CSDN->getValueAPF().bitcastToAPInt().dump(); 5872 OS << ")>"; 5873 } 5874 } else if (const GlobalAddressSDNode *GADN = 5875 dyn_cast<GlobalAddressSDNode>(this)) { 5876 int64_t offset = GADN->getOffset(); 5877 OS << '<'; 5878 WriteAsOperand(OS, GADN->getGlobal()); 5879 OS << '>'; 5880 if (offset > 0) 5881 OS << " + " << offset; 5882 else 5883 OS << " " << offset; 5884 if (unsigned int TF = GADN->getTargetFlags()) 5885 OS << " [TF=" << TF << ']'; 5886 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5887 OS << "<" << FIDN->getIndex() << ">"; 5888 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5889 OS << "<" << JTDN->getIndex() << ">"; 5890 if (unsigned int TF = JTDN->getTargetFlags()) 5891 OS << " [TF=" << TF << ']'; 5892 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5893 int offset = CP->getOffset(); 5894 if (CP->isMachineConstantPoolEntry()) 5895 OS << "<" << *CP->getMachineCPVal() << ">"; 5896 else 5897 OS << "<" << *CP->getConstVal() << ">"; 5898 if (offset > 0) 5899 OS << " + " << offset; 5900 else 5901 OS << " " << offset; 5902 if (unsigned int TF = CP->getTargetFlags()) 5903 OS << " [TF=" << TF << ']'; 5904 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5905 OS << "<"; 5906 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5907 if (LBB) 5908 OS << LBB->getName() << " "; 5909 OS << (const void*)BBDN->getBasicBlock() << ">"; 5910 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5911 if (G && R->getReg() && 5912 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5913 OS << " %" << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5914 } else { 5915 OS << " %reg" << R->getReg(); 5916 } 5917 } else if (const ExternalSymbolSDNode *ES = 5918 dyn_cast<ExternalSymbolSDNode>(this)) { 5919 OS << "'" << ES->getSymbol() << "'"; 5920 if (unsigned int TF = ES->getTargetFlags()) 5921 OS << " [TF=" << TF << ']'; 5922 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5923 if (M->getValue()) 5924 OS << "<" << M->getValue() << ">"; 5925 else 5926 OS << "<null>"; 5927 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5928 OS << ":" << N->getVT().getEVTString(); 5929 } 5930 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5931 OS << "<" << *LD->getMemOperand(); 5932 5933 bool doExt = true; 5934 switch (LD->getExtensionType()) { 5935 default: doExt = false; break; 5936 case ISD::EXTLOAD: OS << ", anyext"; break; 5937 case ISD::SEXTLOAD: OS << ", sext"; break; 5938 case ISD::ZEXTLOAD: OS << ", zext"; break; 5939 } 5940 if (doExt) 5941 OS << " from " << LD->getMemoryVT().getEVTString(); 5942 5943 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5944 if (*AM) 5945 OS << ", " << AM; 5946 5947 OS << ">"; 5948 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5949 OS << "<" << *ST->getMemOperand(); 5950 5951 if (ST->isTruncatingStore()) 5952 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 5953 5954 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5955 if (*AM) 5956 OS << ", " << AM; 5957 5958 OS << ">"; 5959 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 5960 OS << "<" << *M->getMemOperand() << ">"; 5961 } else if (const BlockAddressSDNode *BA = 5962 dyn_cast<BlockAddressSDNode>(this)) { 5963 OS << "<"; 5964 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 5965 OS << ", "; 5966 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 5967 OS << ">"; 5968 if (unsigned int TF = BA->getTargetFlags()) 5969 OS << " [TF=" << TF << ']'; 5970 } 5971 5972 if (G) 5973 if (unsigned Order = G->GetOrdering(this)) 5974 OS << " [ORD=" << Order << ']'; 5975 5976 if (getNodeId() != -1) 5977 OS << " [ID=" << getNodeId() << ']'; 5978} 5979 5980void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5981 print_types(OS, G); 5982 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5983 if (i) OS << ", "; else OS << " "; 5984 OS << (void*)getOperand(i).getNode(); 5985 if (unsigned RN = getOperand(i).getResNo()) 5986 OS << ":" << RN; 5987 } 5988 print_details(OS, G); 5989} 5990 5991static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 5992 const SelectionDAG *G, unsigned depth, 5993 unsigned indent) 5994{ 5995 if (depth == 0) 5996 return; 5997 5998 OS.indent(indent); 5999 6000 N->print(OS, G); 6001 6002 if (depth < 1) 6003 return; 6004 6005 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6006 OS << '\n'; 6007 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6008 } 6009} 6010 6011void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6012 unsigned depth) const { 6013 printrWithDepthHelper(OS, this, G, depth, 0); 6014} 6015 6016void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6017 // Don't print impossibly deep things. 6018 printrWithDepth(OS, G, 100); 6019} 6020 6021void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6022 printrWithDepth(dbgs(), G, depth); 6023} 6024 6025void SDNode::dumprFull(const SelectionDAG *G) const { 6026 // Don't print impossibly deep things. 6027 dumprWithDepth(G, 100); 6028} 6029 6030static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6031 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6032 if (N->getOperand(i).getNode()->hasOneUse()) 6033 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6034 else 6035 dbgs() << "\n" << std::string(indent+2, ' ') 6036 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6037 6038 6039 dbgs() << "\n"; 6040 dbgs().indent(indent); 6041 N->dump(G); 6042} 6043 6044SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6045 assert(N->getNumValues() == 1 && 6046 "Can't unroll a vector with multiple results!"); 6047 6048 EVT VT = N->getValueType(0); 6049 unsigned NE = VT.getVectorNumElements(); 6050 EVT EltVT = VT.getVectorElementType(); 6051 DebugLoc dl = N->getDebugLoc(); 6052 6053 SmallVector<SDValue, 8> Scalars; 6054 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6055 6056 // If ResNE is 0, fully unroll the vector op. 6057 if (ResNE == 0) 6058 ResNE = NE; 6059 else if (NE > ResNE) 6060 NE = ResNE; 6061 6062 unsigned i; 6063 for (i= 0; i != NE; ++i) { 6064 for (unsigned j = 0; j != N->getNumOperands(); ++j) { 6065 SDValue Operand = N->getOperand(j); 6066 EVT OperandVT = Operand.getValueType(); 6067 if (OperandVT.isVector()) { 6068 // A vector operand; extract a single element. 6069 EVT OperandEltVT = OperandVT.getVectorElementType(); 6070 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6071 OperandEltVT, 6072 Operand, 6073 getConstant(i, MVT::i32)); 6074 } else { 6075 // A scalar operand; just use it as is. 6076 Operands[j] = Operand; 6077 } 6078 } 6079 6080 switch (N->getOpcode()) { 6081 default: 6082 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6083 &Operands[0], Operands.size())); 6084 break; 6085 case ISD::SHL: 6086 case ISD::SRA: 6087 case ISD::SRL: 6088 case ISD::ROTL: 6089 case ISD::ROTR: 6090 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6091 getShiftAmountOperand(Operands[1]))); 6092 break; 6093 case ISD::SIGN_EXTEND_INREG: 6094 case ISD::FP_ROUND_INREG: { 6095 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6096 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6097 Operands[0], 6098 getValueType(ExtVT))); 6099 } 6100 } 6101 } 6102 6103 for (; i < ResNE; ++i) 6104 Scalars.push_back(getUNDEF(EltVT)); 6105 6106 return getNode(ISD::BUILD_VECTOR, dl, 6107 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6108 &Scalars[0], Scalars.size()); 6109} 6110 6111 6112/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6113/// location that is 'Dist' units away from the location that the 'Base' load 6114/// is loading from. 6115bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6116 unsigned Bytes, int Dist) const { 6117 if (LD->getChain() != Base->getChain()) 6118 return false; 6119 EVT VT = LD->getValueType(0); 6120 if (VT.getSizeInBits() / 8 != Bytes) 6121 return false; 6122 6123 SDValue Loc = LD->getOperand(1); 6124 SDValue BaseLoc = Base->getOperand(1); 6125 if (Loc.getOpcode() == ISD::FrameIndex) { 6126 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6127 return false; 6128 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6129 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6130 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6131 int FS = MFI->getObjectSize(FI); 6132 int BFS = MFI->getObjectSize(BFI); 6133 if (FS != BFS || FS != (int)Bytes) return false; 6134 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6135 } 6136 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6137 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6138 if (V && (V->getSExtValue() == Dist*Bytes)) 6139 return true; 6140 } 6141 6142 GlobalValue *GV1 = NULL; 6143 GlobalValue *GV2 = NULL; 6144 int64_t Offset1 = 0; 6145 int64_t Offset2 = 0; 6146 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6147 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6148 if (isGA1 && isGA2 && GV1 == GV2) 6149 return Offset1 == (Offset2 + Dist*Bytes); 6150 return false; 6151} 6152 6153 6154/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6155/// it cannot be inferred. 6156unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6157 // If this is a GlobalAddress + cst, return the alignment. 6158 GlobalValue *GV; 6159 int64_t GVOffset = 0; 6160 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6161 // If GV has specified alignment, then use it. Otherwise, use the preferred 6162 // alignment. 6163 unsigned Align = GV->getAlignment(); 6164 if (!Align) { 6165 if (GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6166 if (GVar->hasInitializer()) { 6167 const TargetData *TD = TLI.getTargetData(); 6168 Align = TD->getPreferredAlignment(GVar); 6169 } 6170 } 6171 } 6172 return MinAlign(Align, GVOffset); 6173 } 6174 6175 // If this is a direct reference to a stack slot, use information about the 6176 // stack slot's alignment. 6177 int FrameIdx = 1 << 31; 6178 int64_t FrameOffset = 0; 6179 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6180 FrameIdx = FI->getIndex(); 6181 } else if (Ptr.getOpcode() == ISD::ADD && 6182 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6183 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6184 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6185 FrameOffset = Ptr.getConstantOperandVal(1); 6186 } 6187 6188 if (FrameIdx != (1 << 31)) { 6189 // FIXME: Handle FI+CST. 6190 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6191 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6192 FrameOffset); 6193 if (MFI.isFixedObjectIndex(FrameIdx)) { 6194 int64_t ObjectOffset = MFI.getObjectOffset(FrameIdx) + FrameOffset; 6195 6196 // The alignment of the frame index can be determined from its offset from 6197 // the incoming frame position. If the frame object is at offset 32 and 6198 // the stack is guaranteed to be 16-byte aligned, then we know that the 6199 // object is 16-byte aligned. 6200 unsigned StackAlign = getTarget().getFrameInfo()->getStackAlignment(); 6201 unsigned Align = MinAlign(ObjectOffset, StackAlign); 6202 6203 // Finally, the frame object itself may have a known alignment. Factor 6204 // the alignment + offset into a new alignment. For example, if we know 6205 // the FI is 8 byte aligned, but the pointer is 4 off, we really have a 6206 // 4-byte alignment of the resultant pointer. Likewise align 4 + 4-byte 6207 // offset = 4-byte alignment, align 4 + 1-byte offset = align 1, etc. 6208 return std::max(Align, FIInfoAlign); 6209 } 6210 return FIInfoAlign; 6211 } 6212 6213 return 0; 6214} 6215 6216void SelectionDAG::dump() const { 6217 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6218 6219 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6220 I != E; ++I) { 6221 const SDNode *N = I; 6222 if (!N->hasOneUse() && N != getRoot().getNode()) 6223 DumpNodes(N, 2, this); 6224 } 6225 6226 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6227 6228 dbgs() << "\n\n"; 6229} 6230 6231void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6232 print_types(OS, G); 6233 print_details(OS, G); 6234} 6235 6236typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6237static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6238 const SelectionDAG *G, VisitedSDNodeSet &once) { 6239 if (!once.insert(N)) // If we've been here before, return now. 6240 return; 6241 6242 // Dump the current SDNode, but don't end the line yet. 6243 OS << std::string(indent, ' '); 6244 N->printr(OS, G); 6245 6246 // Having printed this SDNode, walk the children: 6247 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6248 const SDNode *child = N->getOperand(i).getNode(); 6249 6250 if (i) OS << ","; 6251 OS << " "; 6252 6253 if (child->getNumOperands() == 0) { 6254 // This child has no grandchildren; print it inline right here. 6255 child->printr(OS, G); 6256 once.insert(child); 6257 } else { // Just the address. FIXME: also print the child's opcode. 6258 OS << (void*)child; 6259 if (unsigned RN = N->getOperand(i).getResNo()) 6260 OS << ":" << RN; 6261 } 6262 } 6263 6264 OS << "\n"; 6265 6266 // Dump children that have grandchildren on their own line(s). 6267 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6268 const SDNode *child = N->getOperand(i).getNode(); 6269 DumpNodesr(OS, child, indent+2, G, once); 6270 } 6271} 6272 6273void SDNode::dumpr() const { 6274 VisitedSDNodeSet once; 6275 DumpNodesr(dbgs(), this, 0, 0, once); 6276} 6277 6278void SDNode::dumpr(const SelectionDAG *G) const { 6279 VisitedSDNodeSet once; 6280 DumpNodesr(dbgs(), this, 0, G, once); 6281} 6282 6283 6284// getAddressSpace - Return the address space this GlobalAddress belongs to. 6285unsigned GlobalAddressSDNode::getAddressSpace() const { 6286 return getGlobal()->getType()->getAddressSpace(); 6287} 6288 6289 6290const Type *ConstantPoolSDNode::getType() const { 6291 if (isMachineConstantPoolEntry()) 6292 return Val.MachineCPVal->getType(); 6293 return Val.ConstVal->getType(); 6294} 6295 6296bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6297 APInt &SplatUndef, 6298 unsigned &SplatBitSize, 6299 bool &HasAnyUndefs, 6300 unsigned MinSplatBits, 6301 bool isBigEndian) { 6302 EVT VT = getValueType(0); 6303 assert(VT.isVector() && "Expected a vector type"); 6304 unsigned sz = VT.getSizeInBits(); 6305 if (MinSplatBits > sz) 6306 return false; 6307 6308 SplatValue = APInt(sz, 0); 6309 SplatUndef = APInt(sz, 0); 6310 6311 // Get the bits. Bits with undefined values (when the corresponding element 6312 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6313 // in SplatValue. If any of the values are not constant, give up and return 6314 // false. 6315 unsigned int nOps = getNumOperands(); 6316 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6317 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6318 6319 for (unsigned j = 0; j < nOps; ++j) { 6320 unsigned i = isBigEndian ? nOps-1-j : j; 6321 SDValue OpVal = getOperand(i); 6322 unsigned BitPos = j * EltBitSize; 6323 6324 if (OpVal.getOpcode() == ISD::UNDEF) 6325 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6326 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6327 SplatValue |= (APInt(CN->getAPIntValue()).zextOrTrunc(EltBitSize). 6328 zextOrTrunc(sz) << BitPos); 6329 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6330 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6331 else 6332 return false; 6333 } 6334 6335 // The build_vector is all constants or undefs. Find the smallest element 6336 // size that splats the vector. 6337 6338 HasAnyUndefs = (SplatUndef != 0); 6339 while (sz > 8) { 6340 6341 unsigned HalfSize = sz / 2; 6342 APInt HighValue = APInt(SplatValue).lshr(HalfSize).trunc(HalfSize); 6343 APInt LowValue = APInt(SplatValue).trunc(HalfSize); 6344 APInt HighUndef = APInt(SplatUndef).lshr(HalfSize).trunc(HalfSize); 6345 APInt LowUndef = APInt(SplatUndef).trunc(HalfSize); 6346 6347 // If the two halves do not match (ignoring undef bits), stop here. 6348 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6349 MinSplatBits > HalfSize) 6350 break; 6351 6352 SplatValue = HighValue | LowValue; 6353 SplatUndef = HighUndef & LowUndef; 6354 6355 sz = HalfSize; 6356 } 6357 6358 SplatBitSize = sz; 6359 return true; 6360} 6361 6362bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6363 // Find the first non-undef value in the shuffle mask. 6364 unsigned i, e; 6365 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6366 /* search */; 6367 6368 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6369 6370 // Make sure all remaining elements are either undef or the same as the first 6371 // non-undef value. 6372 for (int Idx = Mask[i]; i != e; ++i) 6373 if (Mask[i] >= 0 && Mask[i] != Idx) 6374 return false; 6375 return true; 6376} 6377 6378#ifdef XDEBUG 6379static void checkForCyclesHelper(const SDNode *N, 6380 SmallPtrSet<const SDNode*, 32> &Visited, 6381 SmallPtrSet<const SDNode*, 32> &Checked) { 6382 // If this node has already been checked, don't check it again. 6383 if (Checked.count(N)) 6384 return; 6385 6386 // If a node has already been visited on this depth-first walk, reject it as 6387 // a cycle. 6388 if (!Visited.insert(N)) { 6389 dbgs() << "Offending node:\n"; 6390 N->dumprFull(); 6391 errs() << "Detected cycle in SelectionDAG\n"; 6392 abort(); 6393 } 6394 6395 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6396 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6397 6398 Checked.insert(N); 6399 Visited.erase(N); 6400} 6401#endif 6402 6403void llvm::checkForCycles(const llvm::SDNode *N) { 6404#ifdef XDEBUG 6405 assert(N && "Checking nonexistant SDNode"); 6406 SmallPtrSet<const SDNode*, 32> visited; 6407 SmallPtrSet<const SDNode*, 32> checked; 6408 checkForCyclesHelper(N, visited, checked); 6409#endif 6410} 6411 6412void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6413 checkForCycles(DAG->getRoot().getNode()); 6414} 6415