SelectionDAG.cpp revision e075118489baf15a7cea2e7f155b4799b93d6d02
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetSelectionDAGInfo.h" 36#include "llvm/Target/TargetOptions.h" 37#include "llvm/Target/TargetInstrInfo.h" 38#include "llvm/Target/TargetIntrinsicInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Debug.h" 42#include "llvm/Support/ErrorHandling.h" 43#include "llvm/Support/ManagedStatic.h" 44#include "llvm/Support/MathExtras.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/Support/Mutex.h" 47#include "llvm/ADT/SetVector.h" 48#include "llvm/ADT/SmallPtrSet.h" 49#include "llvm/ADT/SmallSet.h" 50#include "llvm/ADT/SmallVector.h" 51#include "llvm/ADT/StringExtras.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BITCAST) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. 129 SDValue NotZero = N->getOperand(i); 130 if (isa<ConstantSDNode>(NotZero)) { 131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 132 return false; 133 } else if (isa<ConstantFPSDNode>(NotZero)) { 134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 135 bitcastToAPInt().isAllOnesValue()) 136 return false; 137 } else 138 return false; 139 140 // Okay, we have at least one ~0 value, check to see if the rest match or are 141 // undefs. 142 for (++i; i != e; ++i) 143 if (N->getOperand(i) != NotZero && 144 N->getOperand(i).getOpcode() != ISD::UNDEF) 145 return false; 146 return true; 147} 148 149 150/// isBuildVectorAllZeros - Return true if the specified node is a 151/// BUILD_VECTOR where all of the elements are 0 or undef. 152bool ISD::isBuildVectorAllZeros(const SDNode *N) { 153 // Look through a bit convert. 154 if (N->getOpcode() == ISD::BITCAST) 155 N = N->getOperand(0).getNode(); 156 157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 158 159 unsigned i = 0, e = N->getNumOperands(); 160 161 // Skip over all of the undef values. 162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 163 ++i; 164 165 // Do not accept an all-undef vector. 166 if (i == e) return false; 167 168 // Do not accept build_vectors that aren't all constants or which have non-0 169 // elements. 170 SDValue Zero = N->getOperand(i); 171 if (isa<ConstantSDNode>(Zero)) { 172 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 173 return false; 174 } else if (isa<ConstantFPSDNode>(Zero)) { 175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 176 return false; 177 } else 178 return false; 179 180 // Okay, we have at least one 0 value, check to see if the rest match or are 181 // undefs. 182 for (++i; i != e; ++i) 183 if (N->getOperand(i) != Zero && 184 N->getOperand(i).getOpcode() != ISD::UNDEF) 185 return false; 186 return true; 187} 188 189/// isScalarToVector - Return true if the specified node is a 190/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 191/// element is not an undef. 192bool ISD::isScalarToVector(const SDNode *N) { 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 194 return true; 195 196 if (N->getOpcode() != ISD::BUILD_VECTOR) 197 return false; 198 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 199 return false; 200 unsigned NumElems = N->getNumOperands(); 201 if (NumElems == 1) 202 return false; 203 for (unsigned i = 1; i < NumElems; ++i) { 204 SDValue V = N->getOperand(i); 205 if (V.getOpcode() != ISD::UNDEF) 206 return false; 207 } 208 return true; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: llvm_unreachable("Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: { 436 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 437 ID.AddInteger(AT->getMemoryVT().getRawBits()); 438 ID.AddInteger(AT->getRawSubclassData()); 439 break; 440 } 441 case ISD::VECTOR_SHUFFLE: { 442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 444 i != e; ++i) 445 ID.AddInteger(SVN->getMaskElt(i)); 446 break; 447 } 448 case ISD::TargetBlockAddress: 449 case ISD::BlockAddress: { 450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 452 break; 453 } 454 } // end switch (N->getOpcode()) 455} 456 457/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 458/// data. 459static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 460 AddNodeIDOpcode(ID, N->getOpcode()); 461 // Add the return value info. 462 AddNodeIDValueTypes(ID, N->getVTList()); 463 // Add the operand info. 464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 465 466 // Handle SDNode leafs with special info. 467 AddNodeIDCustom(ID, N); 468} 469 470/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 471/// the CSE map that carries volatility, temporalness, indexing mode, and 472/// extension/truncation information. 473/// 474static inline unsigned 475encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 476 bool isNonTemporal) { 477 assert((ConvType & 3) == ConvType && 478 "ConvType may not require more than 2 bits!"); 479 assert((AM & 7) == AM && 480 "AM may not require more than 3 bits!"); 481 return ConvType | 482 (AM << 2) | 483 (isVolatile << 5) | 484 (isNonTemporal << 6); 485} 486 487//===----------------------------------------------------------------------===// 488// SelectionDAG Class 489//===----------------------------------------------------------------------===// 490 491/// doNotCSE - Return true if CSE should not be performed for this node. 492static bool doNotCSE(SDNode *N) { 493 if (N->getValueType(0) == MVT::Glue) 494 return true; // Never CSE anything that produces a flag. 495 496 switch (N->getOpcode()) { 497 default: break; 498 case ISD::HANDLENODE: 499 case ISD::EH_LABEL: 500 return true; // Never CSE these nodes. 501 } 502 503 // Check that remaining values produced are not flags. 504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 505 if (N->getValueType(i) == MVT::Glue) 506 return true; // Never CSE anything that produces a flag. 507 508 return false; 509} 510 511/// RemoveDeadNodes - This method deletes all unreachable nodes in the 512/// SelectionDAG. 513void SelectionDAG::RemoveDeadNodes() { 514 // Create a dummy node (which is not added to allnodes), that adds a reference 515 // to the root node, preventing it from being deleted. 516 HandleSDNode Dummy(getRoot()); 517 518 SmallVector<SDNode*, 128> DeadNodes; 519 520 // Add all obviously-dead nodes to the DeadNodes worklist. 521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 522 if (I->use_empty()) 523 DeadNodes.push_back(I); 524 525 RemoveDeadNodes(DeadNodes); 526 527 // If the root changed (e.g. it was a dead load, update the root). 528 setRoot(Dummy.getValue()); 529} 530 531/// RemoveDeadNodes - This method deletes the unreachable nodes in the 532/// given list, and any nodes that become unreachable as a result. 533void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 534 DAGUpdateListener *UpdateListener) { 535 536 // Process the worklist, deleting the nodes and adding their uses to the 537 // worklist. 538 while (!DeadNodes.empty()) { 539 SDNode *N = DeadNodes.pop_back_val(); 540 541 if (UpdateListener) 542 UpdateListener->NodeDeleted(N, 0); 543 544 // Take the node out of the appropriate CSE map. 545 RemoveNodeFromCSEMaps(N); 546 547 // Next, brutally remove the operand list. This is safe to do, as there are 548 // no cycles in the graph. 549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 550 SDUse &Use = *I++; 551 SDNode *Operand = Use.getNode(); 552 Use.set(SDValue()); 553 554 // Now that we removed this operand, see if there are no uses of it left. 555 if (Operand->use_empty()) 556 DeadNodes.push_back(Operand); 557 } 558 559 DeallocateNode(N); 560 } 561} 562 563void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 564 SmallVector<SDNode*, 16> DeadNodes(1, N); 565 RemoveDeadNodes(DeadNodes, UpdateListener); 566} 567 568void SelectionDAG::DeleteNode(SDNode *N) { 569 // First take this out of the appropriate CSE map. 570 RemoveNodeFromCSEMaps(N); 571 572 // Finally, remove uses due to operands of this node, remove from the 573 // AllNodes list, and delete the node. 574 DeleteNodeNotInCSEMaps(N); 575} 576 577void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 578 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 579 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 580 581 // Drop all of the operands and decrement used node's use counts. 582 N->DropOperands(); 583 584 DeallocateNode(N); 585} 586 587void SelectionDAG::DeallocateNode(SDNode *N) { 588 if (N->OperandsNeedDelete) 589 delete[] N->OperandList; 590 591 // Set the opcode to DELETED_NODE to help catch bugs when node 592 // memory is reallocated. 593 N->NodeType = ISD::DELETED_NODE; 594 595 NodeAllocator.Deallocate(AllNodes.remove(N)); 596 597 // Remove the ordering of this node. 598 Ordering->remove(N); 599 600 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 601 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 602 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 603 DbgVals[i]->setIsInvalidated(); 604} 605 606/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 607/// correspond to it. This is useful when we're about to delete or repurpose 608/// the node. We don't want future request for structurally identical nodes 609/// to return N anymore. 610bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 611 bool Erased = false; 612 switch (N->getOpcode()) { 613 case ISD::HANDLENODE: return false; // noop. 614 case ISD::CONDCODE: 615 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 616 "Cond code doesn't exist!"); 617 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 618 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 619 break; 620 case ISD::ExternalSymbol: 621 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 622 break; 623 case ISD::TargetExternalSymbol: { 624 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 625 Erased = TargetExternalSymbols.erase( 626 std::pair<std::string,unsigned char>(ESN->getSymbol(), 627 ESN->getTargetFlags())); 628 break; 629 } 630 case ISD::VALUETYPE: { 631 EVT VT = cast<VTSDNode>(N)->getVT(); 632 if (VT.isExtended()) { 633 Erased = ExtendedValueTypeNodes.erase(VT); 634 } else { 635 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 636 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 637 } 638 break; 639 } 640 default: 641 // Remove it from the CSE Map. 642 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 643 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746#ifndef NDEBUG 747/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 748static void VerifyNodeCommon(SDNode *N) { 749 switch (N->getOpcode()) { 750 default: 751 break; 752 case ISD::BUILD_PAIR: { 753 EVT VT = N->getValueType(0); 754 assert(N->getNumValues() == 1 && "Too many results!"); 755 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 756 "Wrong return type!"); 757 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 758 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 759 "Mismatched operand types!"); 760 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 761 "Wrong operand type!"); 762 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 763 "Wrong return type size"); 764 break; 765 } 766 case ISD::BUILD_VECTOR: { 767 assert(N->getNumValues() == 1 && "Too many results!"); 768 assert(N->getValueType(0).isVector() && "Wrong return type!"); 769 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 770 "Wrong number of operands!"); 771 EVT EltVT = N->getValueType(0).getVectorElementType(); 772 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 773 assert((I->getValueType() == EltVT || 774 (EltVT.isInteger() && I->getValueType().isInteger() && 775 EltVT.bitsLE(I->getValueType()))) && 776 "Wrong operand type!"); 777 break; 778 } 779 } 780} 781 782/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 783static void VerifySDNode(SDNode *N) { 784 // The SDNode allocators cannot be used to allocate nodes with fields that are 785 // not present in an SDNode! 786 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 787 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 788 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 789 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 790 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 791 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 792 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 793 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 794 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 795 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 796 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 797 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 798 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 799 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 800 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 801 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 802 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 803 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 804 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 805 806 VerifyNodeCommon(N); 807} 808 809/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 810/// invalid. 811static void VerifyMachineNode(SDNode *N) { 812 // The MachineNode allocators cannot be used to allocate nodes with fields 813 // that are not present in a MachineNode! 814 // Currently there are no such nodes. 815 816 VerifyNodeCommon(N); 817} 818#endif // NDEBUG 819 820/// getEVTAlignment - Compute the default alignment value for the 821/// given type. 822/// 823unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 824 const Type *Ty = VT == MVT::iPTR ? 825 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 826 VT.getTypeForEVT(*getContext()); 827 828 return TLI.getTargetData()->getABITypeAlignment(Ty); 829} 830 831// EntryNode could meaningfully have debug info if we can find it... 832SelectionDAG::SelectionDAG(const TargetMachine &tm) 833 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 834 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 835 Root(getEntryNode()), Ordering(0) { 836 AllNodes.push_back(&EntryNode); 837 Ordering = new SDNodeOrdering(); 838 DbgInfo = new SDDbgInfo(); 839} 840 841void SelectionDAG::init(MachineFunction &mf) { 842 MF = &mf; 843 Context = &mf.getFunction()->getContext(); 844} 845 846SelectionDAG::~SelectionDAG() { 847 allnodes_clear(); 848 delete Ordering; 849 delete DbgInfo; 850} 851 852void SelectionDAG::allnodes_clear() { 853 assert(&*AllNodes.begin() == &EntryNode); 854 AllNodes.remove(AllNodes.begin()); 855 while (!AllNodes.empty()) 856 DeallocateNode(AllNodes.begin()); 857} 858 859void SelectionDAG::clear() { 860 allnodes_clear(); 861 OperandAllocator.Reset(); 862 CSEMap.clear(); 863 864 ExtendedValueTypeNodes.clear(); 865 ExternalSymbols.clear(); 866 TargetExternalSymbols.clear(); 867 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 868 static_cast<CondCodeSDNode*>(0)); 869 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 870 static_cast<SDNode*>(0)); 871 872 EntryNode.UseList = 0; 873 AllNodes.push_back(&EntryNode); 874 Root = getEntryNode(); 875 Ordering->clear(); 876 DbgInfo->clear(); 877} 878 879SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 880 return VT.bitsGT(Op.getValueType()) ? 881 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 882 getNode(ISD::TRUNCATE, DL, VT, Op); 883} 884 885SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 886 return VT.bitsGT(Op.getValueType()) ? 887 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 888 getNode(ISD::TRUNCATE, DL, VT, Op); 889} 890 891SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 892 assert(!VT.isVector() && 893 "getZeroExtendInReg should use the vector element type instead of " 894 "the vector type!"); 895 if (Op.getValueType() == VT) return Op; 896 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 897 APInt Imm = APInt::getLowBitsSet(BitWidth, 898 VT.getSizeInBits()); 899 return getNode(ISD::AND, DL, Op.getValueType(), Op, 900 getConstant(Imm, Op.getValueType())); 901} 902 903/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 904/// 905SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 906 EVT EltVT = VT.getScalarType(); 907 SDValue NegOne = 908 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 909 return getNode(ISD::XOR, DL, VT, Val, NegOne); 910} 911 912SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 913 EVT EltVT = VT.getScalarType(); 914 assert((EltVT.getSizeInBits() >= 64 || 915 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 916 "getConstant with a uint64_t value that doesn't fit in the type!"); 917 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 918} 919 920SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 921 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 922} 923 924SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 925 assert(VT.isInteger() && "Cannot create FP integer constant!"); 926 927 EVT EltVT = VT.getScalarType(); 928 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 929 "APInt size does not match type size!"); 930 931 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 932 FoldingSetNodeID ID; 933 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 934 ID.AddPointer(&Val); 935 void *IP = 0; 936 SDNode *N = NULL; 937 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 938 if (!VT.isVector()) 939 return SDValue(N, 0); 940 941 if (!N) { 942 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 943 CSEMap.InsertNode(N, IP); 944 AllNodes.push_back(N); 945 } 946 947 SDValue Result(N, 0); 948 if (VT.isVector()) { 949 SmallVector<SDValue, 8> Ops; 950 Ops.assign(VT.getVectorNumElements(), Result); 951 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 952 } 953 return Result; 954} 955 956SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 957 return getConstant(Val, TLI.getPointerTy(), isTarget); 958} 959 960 961SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 962 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 963} 964 965SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 966 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 967 968 EVT EltVT = VT.getScalarType(); 969 970 // Do the map lookup using the actual bit pattern for the floating point 971 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 972 // we don't have issues with SNANs. 973 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 974 FoldingSetNodeID ID; 975 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 976 ID.AddPointer(&V); 977 void *IP = 0; 978 SDNode *N = NULL; 979 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 980 if (!VT.isVector()) 981 return SDValue(N, 0); 982 983 if (!N) { 984 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 985 CSEMap.InsertNode(N, IP); 986 AllNodes.push_back(N); 987 } 988 989 SDValue Result(N, 0); 990 if (VT.isVector()) { 991 SmallVector<SDValue, 8> Ops; 992 Ops.assign(VT.getVectorNumElements(), Result); 993 // FIXME DebugLoc info might be appropriate here 994 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 995 } 996 return Result; 997} 998 999SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1000 EVT EltVT = VT.getScalarType(); 1001 if (EltVT==MVT::f32) 1002 return getConstantFP(APFloat((float)Val), VT, isTarget); 1003 else if (EltVT==MVT::f64) 1004 return getConstantFP(APFloat(Val), VT, isTarget); 1005 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1006 bool ignored; 1007 APFloat apf = APFloat(Val); 1008 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1009 &ignored); 1010 return getConstantFP(apf, VT, isTarget); 1011 } else { 1012 assert(0 && "Unsupported type in getConstantFP"); 1013 return SDValue(); 1014 } 1015} 1016 1017SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1018 EVT VT, int64_t Offset, 1019 bool isTargetGA, 1020 unsigned char TargetFlags) { 1021 assert((TargetFlags == 0 || isTargetGA) && 1022 "Cannot set target flags on target-independent globals"); 1023 1024 // Truncate (with sign-extension) the offset value to the pointer size. 1025 EVT PTy = TLI.getPointerTy(); 1026 unsigned BitWidth = PTy.getSizeInBits(); 1027 if (BitWidth < 64) 1028 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1029 1030 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1031 if (!GVar) { 1032 // If GV is an alias then use the aliasee for determining thread-localness. 1033 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1034 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1035 } 1036 1037 unsigned Opc; 1038 if (GVar && GVar->isThreadLocal()) 1039 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1040 else 1041 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1042 1043 FoldingSetNodeID ID; 1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1045 ID.AddPointer(GV); 1046 ID.AddInteger(Offset); 1047 ID.AddInteger(TargetFlags); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 1052 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1053 Offset, TargetFlags); 1054 CSEMap.InsertNode(N, IP); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1060 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1061 FoldingSetNodeID ID; 1062 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1063 ID.AddInteger(FI); 1064 void *IP = 0; 1065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1066 return SDValue(E, 0); 1067 1068 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1069 CSEMap.InsertNode(N, IP); 1070 AllNodes.push_back(N); 1071 return SDValue(N, 0); 1072} 1073 1074SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1075 unsigned char TargetFlags) { 1076 assert((TargetFlags == 0 || isTarget) && 1077 "Cannot set target flags on target-independent jump tables"); 1078 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1079 FoldingSetNodeID ID; 1080 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1081 ID.AddInteger(JTI); 1082 ID.AddInteger(TargetFlags); 1083 void *IP = 0; 1084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1085 return SDValue(E, 0); 1086 1087 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1088 TargetFlags); 1089 CSEMap.InsertNode(N, IP); 1090 AllNodes.push_back(N); 1091 return SDValue(N, 0); 1092} 1093 1094SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1095 unsigned Alignment, int Offset, 1096 bool isTarget, 1097 unsigned char TargetFlags) { 1098 assert((TargetFlags == 0 || isTarget) && 1099 "Cannot set target flags on target-independent globals"); 1100 if (Alignment == 0) 1101 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1102 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1103 FoldingSetNodeID ID; 1104 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1105 ID.AddInteger(Alignment); 1106 ID.AddInteger(Offset); 1107 ID.AddPointer(C); 1108 ID.AddInteger(TargetFlags); 1109 void *IP = 0; 1110 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1111 return SDValue(E, 0); 1112 1113 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1114 Alignment, TargetFlags); 1115 CSEMap.InsertNode(N, IP); 1116 AllNodes.push_back(N); 1117 return SDValue(N, 0); 1118} 1119 1120 1121SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1122 unsigned Alignment, int Offset, 1123 bool isTarget, 1124 unsigned char TargetFlags) { 1125 assert((TargetFlags == 0 || isTarget) && 1126 "Cannot set target flags on target-independent globals"); 1127 if (Alignment == 0) 1128 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1129 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1130 FoldingSetNodeID ID; 1131 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1132 ID.AddInteger(Alignment); 1133 ID.AddInteger(Offset); 1134 C->AddSelectionDAGCSEId(ID); 1135 ID.AddInteger(TargetFlags); 1136 void *IP = 0; 1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1138 return SDValue(E, 0); 1139 1140 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1141 Alignment, TargetFlags); 1142 CSEMap.InsertNode(N, IP); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1148 FoldingSetNodeID ID; 1149 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1150 ID.AddPointer(MBB); 1151 void *IP = 0; 1152 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1153 return SDValue(E, 0); 1154 1155 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1156 CSEMap.InsertNode(N, IP); 1157 AllNodes.push_back(N); 1158 return SDValue(N, 0); 1159} 1160 1161SDValue SelectionDAG::getValueType(EVT VT) { 1162 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1163 ValueTypeNodes.size()) 1164 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1165 1166 SDNode *&N = VT.isExtended() ? 1167 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1168 1169 if (N) return SDValue(N, 0); 1170 N = new (NodeAllocator) VTSDNode(VT); 1171 AllNodes.push_back(N); 1172 return SDValue(N, 0); 1173} 1174 1175SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1176 SDNode *&N = ExternalSymbols[Sym]; 1177 if (N) return SDValue(N, 0); 1178 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1179 AllNodes.push_back(N); 1180 return SDValue(N, 0); 1181} 1182 1183SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1184 unsigned char TargetFlags) { 1185 SDNode *&N = 1186 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1187 TargetFlags)]; 1188 if (N) return SDValue(N, 0); 1189 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1190 AllNodes.push_back(N); 1191 return SDValue(N, 0); 1192} 1193 1194SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1195 if ((unsigned)Cond >= CondCodeNodes.size()) 1196 CondCodeNodes.resize(Cond+1); 1197 1198 if (CondCodeNodes[Cond] == 0) { 1199 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1200 CondCodeNodes[Cond] = N; 1201 AllNodes.push_back(N); 1202 } 1203 1204 return SDValue(CondCodeNodes[Cond], 0); 1205} 1206 1207// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1208// the shuffle mask M that point at N1 to point at N2, and indices that point 1209// N2 to point at N1. 1210static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1211 std::swap(N1, N2); 1212 int NElts = M.size(); 1213 for (int i = 0; i != NElts; ++i) { 1214 if (M[i] >= NElts) 1215 M[i] -= NElts; 1216 else if (M[i] >= 0) 1217 M[i] += NElts; 1218 } 1219} 1220 1221SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1222 SDValue N2, const int *Mask) { 1223 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1224 assert(VT.isVector() && N1.getValueType().isVector() && 1225 "Vector Shuffle VTs must be a vectors"); 1226 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1227 && "Vector Shuffle VTs must have same element type"); 1228 1229 // Canonicalize shuffle undef, undef -> undef 1230 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1231 return getUNDEF(VT); 1232 1233 // Validate that all indices in Mask are within the range of the elements 1234 // input to the shuffle. 1235 unsigned NElts = VT.getVectorNumElements(); 1236 SmallVector<int, 8> MaskVec; 1237 for (unsigned i = 0; i != NElts; ++i) { 1238 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1239 MaskVec.push_back(Mask[i]); 1240 } 1241 1242 // Canonicalize shuffle v, v -> v, undef 1243 if (N1 == N2) { 1244 N2 = getUNDEF(VT); 1245 for (unsigned i = 0; i != NElts; ++i) 1246 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1247 } 1248 1249 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1250 if (N1.getOpcode() == ISD::UNDEF) 1251 commuteShuffle(N1, N2, MaskVec); 1252 1253 // Canonicalize all index into lhs, -> shuffle lhs, undef 1254 // Canonicalize all index into rhs, -> shuffle rhs, undef 1255 bool AllLHS = true, AllRHS = true; 1256 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1257 for (unsigned i = 0; i != NElts; ++i) { 1258 if (MaskVec[i] >= (int)NElts) { 1259 if (N2Undef) 1260 MaskVec[i] = -1; 1261 else 1262 AllLHS = false; 1263 } else if (MaskVec[i] >= 0) { 1264 AllRHS = false; 1265 } 1266 } 1267 if (AllLHS && AllRHS) 1268 return getUNDEF(VT); 1269 if (AllLHS && !N2Undef) 1270 N2 = getUNDEF(VT); 1271 if (AllRHS) { 1272 N1 = getUNDEF(VT); 1273 commuteShuffle(N1, N2, MaskVec); 1274 } 1275 1276 // If Identity shuffle, or all shuffle in to undef, return that node. 1277 bool AllUndef = true; 1278 bool Identity = true; 1279 for (unsigned i = 0; i != NElts; ++i) { 1280 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1281 if (MaskVec[i] >= 0) AllUndef = false; 1282 } 1283 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1284 return N1; 1285 if (AllUndef) 1286 return getUNDEF(VT); 1287 1288 FoldingSetNodeID ID; 1289 SDValue Ops[2] = { N1, N2 }; 1290 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1291 for (unsigned i = 0; i != NElts; ++i) 1292 ID.AddInteger(MaskVec[i]); 1293 1294 void* IP = 0; 1295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1296 return SDValue(E, 0); 1297 1298 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1299 // SDNode doesn't have access to it. This memory will be "leaked" when 1300 // the node is deallocated, but recovered when the NodeAllocator is released. 1301 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1302 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1303 1304 ShuffleVectorSDNode *N = 1305 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1306 CSEMap.InsertNode(N, IP); 1307 AllNodes.push_back(N); 1308 return SDValue(N, 0); 1309} 1310 1311SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1312 SDValue Val, SDValue DTy, 1313 SDValue STy, SDValue Rnd, SDValue Sat, 1314 ISD::CvtCode Code) { 1315 // If the src and dest types are the same and the conversion is between 1316 // integer types of the same sign or two floats, no conversion is necessary. 1317 if (DTy == STy && 1318 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1319 return Val; 1320 1321 FoldingSetNodeID ID; 1322 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1323 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1324 void* IP = 0; 1325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1326 return SDValue(E, 0); 1327 1328 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1329 Code); 1330 CSEMap.InsertNode(N, IP); 1331 AllNodes.push_back(N); 1332 return SDValue(N, 0); 1333} 1334 1335SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1336 FoldingSetNodeID ID; 1337 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1338 ID.AddInteger(RegNo); 1339 void *IP = 0; 1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1341 return SDValue(E, 0); 1342 1343 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1350 FoldingSetNodeID ID; 1351 SDValue Ops[] = { Root }; 1352 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1353 ID.AddPointer(Label); 1354 void *IP = 0; 1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1356 return SDValue(E, 0); 1357 1358 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1359 CSEMap.InsertNode(N, IP); 1360 AllNodes.push_back(N); 1361 return SDValue(N, 0); 1362} 1363 1364 1365SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1366 bool isTarget, 1367 unsigned char TargetFlags) { 1368 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1369 1370 FoldingSetNodeID ID; 1371 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1372 ID.AddPointer(BA); 1373 ID.AddInteger(TargetFlags); 1374 void *IP = 0; 1375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1376 return SDValue(E, 0); 1377 1378 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1379 CSEMap.InsertNode(N, IP); 1380 AllNodes.push_back(N); 1381 return SDValue(N, 0); 1382} 1383 1384SDValue SelectionDAG::getSrcValue(const Value *V) { 1385 assert((!V || V->getType()->isPointerTy()) && 1386 "SrcValue is not a pointer?"); 1387 1388 FoldingSetNodeID ID; 1389 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1390 ID.AddPointer(V); 1391 1392 void *IP = 0; 1393 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1394 return SDValue(E, 0); 1395 1396 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1397 CSEMap.InsertNode(N, IP); 1398 AllNodes.push_back(N); 1399 return SDValue(N, 0); 1400} 1401 1402/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1403SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1404 FoldingSetNodeID ID; 1405 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1406 ID.AddPointer(MD); 1407 1408 void *IP = 0; 1409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1410 return SDValue(E, 0); 1411 1412 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1413 CSEMap.InsertNode(N, IP); 1414 AllNodes.push_back(N); 1415 return SDValue(N, 0); 1416} 1417 1418 1419/// getShiftAmountOperand - Return the specified value casted to 1420/// the target's desired shift amount type. 1421SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { 1422 EVT OpTy = Op.getValueType(); 1423 MVT ShTy = TLI.getShiftAmountTy(); 1424 if (OpTy == ShTy || OpTy.isVector()) return Op; 1425 1426 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1427 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1428} 1429 1430/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1431/// specified value type. 1432SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1433 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1434 unsigned ByteSize = VT.getStoreSize(); 1435 const Type *Ty = VT.getTypeForEVT(*getContext()); 1436 unsigned StackAlign = 1437 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1438 1439 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1440 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1441} 1442 1443/// CreateStackTemporary - Create a stack temporary suitable for holding 1444/// either of the specified value types. 1445SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1446 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1447 VT2.getStoreSizeInBits())/8; 1448 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1449 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1450 const TargetData *TD = TLI.getTargetData(); 1451 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1452 TD->getPrefTypeAlignment(Ty2)); 1453 1454 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1455 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1456 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1457} 1458 1459SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1460 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1461 // These setcc operations always fold. 1462 switch (Cond) { 1463 default: break; 1464 case ISD::SETFALSE: 1465 case ISD::SETFALSE2: return getConstant(0, VT); 1466 case ISD::SETTRUE: 1467 case ISD::SETTRUE2: return getConstant(1, VT); 1468 1469 case ISD::SETOEQ: 1470 case ISD::SETOGT: 1471 case ISD::SETOGE: 1472 case ISD::SETOLT: 1473 case ISD::SETOLE: 1474 case ISD::SETONE: 1475 case ISD::SETO: 1476 case ISD::SETUO: 1477 case ISD::SETUEQ: 1478 case ISD::SETUNE: 1479 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1480 break; 1481 } 1482 1483 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1484 const APInt &C2 = N2C->getAPIntValue(); 1485 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1486 const APInt &C1 = N1C->getAPIntValue(); 1487 1488 switch (Cond) { 1489 default: llvm_unreachable("Unknown integer setcc!"); 1490 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1491 case ISD::SETNE: return getConstant(C1 != C2, VT); 1492 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1493 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1494 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1495 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1496 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1497 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1498 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1499 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1500 } 1501 } 1502 } 1503 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1504 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1505 // No compile time operations on this type yet. 1506 if (N1C->getValueType(0) == MVT::ppcf128) 1507 return SDValue(); 1508 1509 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1510 switch (Cond) { 1511 default: break; 1512 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1513 return getUNDEF(VT); 1514 // fall through 1515 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1516 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1517 return getUNDEF(VT); 1518 // fall through 1519 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1520 R==APFloat::cmpLessThan, VT); 1521 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1522 return getUNDEF(VT); 1523 // fall through 1524 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1525 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1526 return getUNDEF(VT); 1527 // fall through 1528 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1529 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1530 return getUNDEF(VT); 1531 // fall through 1532 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1533 R==APFloat::cmpEqual, VT); 1534 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1535 return getUNDEF(VT); 1536 // fall through 1537 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1538 R==APFloat::cmpEqual, VT); 1539 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1540 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1541 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1542 R==APFloat::cmpEqual, VT); 1543 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1544 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1545 R==APFloat::cmpLessThan, VT); 1546 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1547 R==APFloat::cmpUnordered, VT); 1548 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1549 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1550 } 1551 } else { 1552 // Ensure that the constant occurs on the RHS. 1553 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1554 } 1555 } 1556 1557 // Could not fold it. 1558 return SDValue(); 1559} 1560 1561/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1562/// use this predicate to simplify operations downstream. 1563bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1564 // This predicate is not safe for vector operations. 1565 if (Op.getValueType().isVector()) 1566 return false; 1567 1568 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1569 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1570} 1571 1572/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1573/// this predicate to simplify operations downstream. Mask is known to be zero 1574/// for bits that V cannot have. 1575bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1576 unsigned Depth) const { 1577 APInt KnownZero, KnownOne; 1578 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1579 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1580 return (KnownZero & Mask) == Mask; 1581} 1582 1583/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1584/// known to be either zero or one and return them in the KnownZero/KnownOne 1585/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1586/// processing. 1587void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1588 APInt &KnownZero, APInt &KnownOne, 1589 unsigned Depth) const { 1590 unsigned BitWidth = Mask.getBitWidth(); 1591 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1592 "Mask size mismatches value type size!"); 1593 1594 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1595 if (Depth == 6 || Mask == 0) 1596 return; // Limit search depth. 1597 1598 APInt KnownZero2, KnownOne2; 1599 1600 switch (Op.getOpcode()) { 1601 case ISD::Constant: 1602 // We know all of the bits for a constant! 1603 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1604 KnownZero = ~KnownOne & Mask; 1605 return; 1606 case ISD::AND: 1607 // If either the LHS or the RHS are Zero, the result is zero. 1608 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1609 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1610 KnownZero2, KnownOne2, Depth+1); 1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1612 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1613 1614 // Output known-1 bits are only known if set in both the LHS & RHS. 1615 KnownOne &= KnownOne2; 1616 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1617 KnownZero |= KnownZero2; 1618 return; 1619 case ISD::OR: 1620 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1621 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1622 KnownZero2, KnownOne2, Depth+1); 1623 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1624 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1625 1626 // Output known-0 bits are only known if clear in both the LHS & RHS. 1627 KnownZero &= KnownZero2; 1628 // Output known-1 are known to be set if set in either the LHS | RHS. 1629 KnownOne |= KnownOne2; 1630 return; 1631 case ISD::XOR: { 1632 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1633 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1636 1637 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1638 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1639 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1640 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1641 KnownZero = KnownZeroOut; 1642 return; 1643 } 1644 case ISD::MUL: { 1645 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1646 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1647 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1650 1651 // If low bits are zero in either operand, output low known-0 bits. 1652 // Also compute a conserative estimate for high known-0 bits. 1653 // More trickiness is possible, but this is sufficient for the 1654 // interesting case of alignment computation. 1655 KnownOne.clearAllBits(); 1656 unsigned TrailZ = KnownZero.countTrailingOnes() + 1657 KnownZero2.countTrailingOnes(); 1658 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1659 KnownZero2.countLeadingOnes(), 1660 BitWidth) - BitWidth; 1661 1662 TrailZ = std::min(TrailZ, BitWidth); 1663 LeadZ = std::min(LeadZ, BitWidth); 1664 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1665 APInt::getHighBitsSet(BitWidth, LeadZ); 1666 KnownZero &= Mask; 1667 return; 1668 } 1669 case ISD::UDIV: { 1670 // For the purposes of computing leading zeros we can conservatively 1671 // treat a udiv as a logical right shift by the power of 2 known to 1672 // be less than the denominator. 1673 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1674 ComputeMaskedBits(Op.getOperand(0), 1675 AllOnes, KnownZero2, KnownOne2, Depth+1); 1676 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1677 1678 KnownOne2.clearAllBits(); 1679 KnownZero2.clearAllBits(); 1680 ComputeMaskedBits(Op.getOperand(1), 1681 AllOnes, KnownZero2, KnownOne2, Depth+1); 1682 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1683 if (RHSUnknownLeadingOnes != BitWidth) 1684 LeadZ = std::min(BitWidth, 1685 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1686 1687 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1688 return; 1689 } 1690 case ISD::SELECT: 1691 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1692 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1695 1696 // Only known if known in both the LHS and RHS. 1697 KnownOne &= KnownOne2; 1698 KnownZero &= KnownZero2; 1699 return; 1700 case ISD::SELECT_CC: 1701 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1702 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1704 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1705 1706 // Only known if known in both the LHS and RHS. 1707 KnownOne &= KnownOne2; 1708 KnownZero &= KnownZero2; 1709 return; 1710 case ISD::SADDO: 1711 case ISD::UADDO: 1712 case ISD::SSUBO: 1713 case ISD::USUBO: 1714 case ISD::SMULO: 1715 case ISD::UMULO: 1716 if (Op.getResNo() != 1) 1717 return; 1718 // The boolean result conforms to getBooleanContents. Fall through. 1719 case ISD::SETCC: 1720 // If we know the result of a setcc has the top bits zero, use this info. 1721 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1722 BitWidth > 1) 1723 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1724 return; 1725 case ISD::SHL: 1726 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1727 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1728 unsigned ShAmt = SA->getZExtValue(); 1729 1730 // If the shift count is an invalid immediate, don't do anything. 1731 if (ShAmt >= BitWidth) 1732 return; 1733 1734 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1735 KnownZero, KnownOne, Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 KnownZero <<= ShAmt; 1738 KnownOne <<= ShAmt; 1739 // low bits known zero. 1740 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1741 } 1742 return; 1743 case ISD::SRL: 1744 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1745 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1746 unsigned ShAmt = SA->getZExtValue(); 1747 1748 // If the shift count is an invalid immediate, don't do anything. 1749 if (ShAmt >= BitWidth) 1750 return; 1751 1752 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1753 KnownZero, KnownOne, Depth+1); 1754 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1755 KnownZero = KnownZero.lshr(ShAmt); 1756 KnownOne = KnownOne.lshr(ShAmt); 1757 1758 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1759 KnownZero |= HighBits; // High bits known zero. 1760 } 1761 return; 1762 case ISD::SRA: 1763 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1764 unsigned ShAmt = SA->getZExtValue(); 1765 1766 // If the shift count is an invalid immediate, don't do anything. 1767 if (ShAmt >= BitWidth) 1768 return; 1769 1770 APInt InDemandedMask = (Mask << ShAmt); 1771 // If any of the demanded bits are produced by the sign extension, we also 1772 // demand the input sign bit. 1773 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1774 if (HighBits.getBoolValue()) 1775 InDemandedMask |= APInt::getSignBit(BitWidth); 1776 1777 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1778 Depth+1); 1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1780 KnownZero = KnownZero.lshr(ShAmt); 1781 KnownOne = KnownOne.lshr(ShAmt); 1782 1783 // Handle the sign bits. 1784 APInt SignBit = APInt::getSignBit(BitWidth); 1785 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1786 1787 if (KnownZero.intersects(SignBit)) { 1788 KnownZero |= HighBits; // New bits are known zero. 1789 } else if (KnownOne.intersects(SignBit)) { 1790 KnownOne |= HighBits; // New bits are known one. 1791 } 1792 } 1793 return; 1794 case ISD::SIGN_EXTEND_INREG: { 1795 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1796 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1797 1798 // Sign extension. Compute the demanded bits in the result that are not 1799 // present in the input. 1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1801 1802 APInt InSignBit = APInt::getSignBit(EBits); 1803 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1804 1805 // If the sign extended bits are demanded, we know that the sign 1806 // bit is demanded. 1807 InSignBit = InSignBit.zext(BitWidth); 1808 if (NewBits.getBoolValue()) 1809 InputDemandedBits |= InSignBit; 1810 1811 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1812 KnownZero, KnownOne, Depth+1); 1813 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1814 1815 // If the sign bit of the input is known set or clear, then we know the 1816 // top bits of the result. 1817 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1818 KnownZero |= NewBits; 1819 KnownOne &= ~NewBits; 1820 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1821 KnownOne |= NewBits; 1822 KnownZero &= ~NewBits; 1823 } else { // Input sign bit unknown 1824 KnownZero &= ~NewBits; 1825 KnownOne &= ~NewBits; 1826 } 1827 return; 1828 } 1829 case ISD::CTTZ: 1830 case ISD::CTLZ: 1831 case ISD::CTPOP: { 1832 unsigned LowBits = Log2_32(BitWidth)+1; 1833 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1834 KnownOne.clearAllBits(); 1835 return; 1836 } 1837 case ISD::LOAD: { 1838 if (ISD::isZEXTLoad(Op.getNode())) { 1839 LoadSDNode *LD = cast<LoadSDNode>(Op); 1840 EVT VT = LD->getMemoryVT(); 1841 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1842 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1843 } 1844 return; 1845 } 1846 case ISD::ZERO_EXTEND: { 1847 EVT InVT = Op.getOperand(0).getValueType(); 1848 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1849 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1850 APInt InMask = Mask.trunc(InBits); 1851 KnownZero = KnownZero.trunc(InBits); 1852 KnownOne = KnownOne.trunc(InBits); 1853 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1854 KnownZero = KnownZero.zext(BitWidth); 1855 KnownOne = KnownOne.zext(BitWidth); 1856 KnownZero |= NewBits; 1857 return; 1858 } 1859 case ISD::SIGN_EXTEND: { 1860 EVT InVT = Op.getOperand(0).getValueType(); 1861 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1862 APInt InSignBit = APInt::getSignBit(InBits); 1863 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1864 APInt InMask = Mask.trunc(InBits); 1865 1866 // If any of the sign extended bits are demanded, we know that the sign 1867 // bit is demanded. Temporarily set this bit in the mask for our callee. 1868 if (NewBits.getBoolValue()) 1869 InMask |= InSignBit; 1870 1871 KnownZero = KnownZero.trunc(InBits); 1872 KnownOne = KnownOne.trunc(InBits); 1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1874 1875 // Note if the sign bit is known to be zero or one. 1876 bool SignBitKnownZero = KnownZero.isNegative(); 1877 bool SignBitKnownOne = KnownOne.isNegative(); 1878 assert(!(SignBitKnownZero && SignBitKnownOne) && 1879 "Sign bit can't be known to be both zero and one!"); 1880 1881 // If the sign bit wasn't actually demanded by our caller, we don't 1882 // want it set in the KnownZero and KnownOne result values. Reset the 1883 // mask and reapply it to the result values. 1884 InMask = Mask.trunc(InBits); 1885 KnownZero &= InMask; 1886 KnownOne &= InMask; 1887 1888 KnownZero = KnownZero.zext(BitWidth); 1889 KnownOne = KnownOne.zext(BitWidth); 1890 1891 // If the sign bit is known zero or one, the top bits match. 1892 if (SignBitKnownZero) 1893 KnownZero |= NewBits; 1894 else if (SignBitKnownOne) 1895 KnownOne |= NewBits; 1896 return; 1897 } 1898 case ISD::ANY_EXTEND: { 1899 EVT InVT = Op.getOperand(0).getValueType(); 1900 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1901 APInt InMask = Mask.trunc(InBits); 1902 KnownZero = KnownZero.trunc(InBits); 1903 KnownOne = KnownOne.trunc(InBits); 1904 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1905 KnownZero = KnownZero.zext(BitWidth); 1906 KnownOne = KnownOne.zext(BitWidth); 1907 return; 1908 } 1909 case ISD::TRUNCATE: { 1910 EVT InVT = Op.getOperand(0).getValueType(); 1911 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1912 APInt InMask = Mask.zext(InBits); 1913 KnownZero = KnownZero.zext(InBits); 1914 KnownOne = KnownOne.zext(InBits); 1915 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1916 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1917 KnownZero = KnownZero.trunc(BitWidth); 1918 KnownOne = KnownOne.trunc(BitWidth); 1919 break; 1920 } 1921 case ISD::AssertZext: { 1922 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1923 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1924 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1925 KnownOne, Depth+1); 1926 KnownZero |= (~InMask) & Mask; 1927 return; 1928 } 1929 case ISD::FGETSIGN: 1930 // All bits are zero except the low bit. 1931 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1932 return; 1933 1934 case ISD::SUB: { 1935 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1936 // We know that the top bits of C-X are clear if X contains less bits 1937 // than C (i.e. no wrap-around can happen). For example, 20-X is 1938 // positive if we can prove that X is >= 0 and < 16. 1939 if (CLHS->getAPIntValue().isNonNegative()) { 1940 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1941 // NLZ can't be BitWidth with no sign bit 1942 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1943 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1944 Depth+1); 1945 1946 // If all of the MaskV bits are known to be zero, then we know the 1947 // output top bits are zero, because we now know that the output is 1948 // from [0-C]. 1949 if ((KnownZero2 & MaskV) == MaskV) { 1950 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1951 // Top bits known zero. 1952 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1953 } 1954 } 1955 } 1956 } 1957 // fall through 1958 case ISD::ADD: 1959 case ISD::ADDE: { 1960 // Output known-0 bits are known if clear or set in both the low clear bits 1961 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1962 // low 3 bits clear. 1963 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1964 BitWidth - Mask.countLeadingZeros()); 1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1966 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1967 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1968 1969 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1970 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1971 KnownZeroOut = std::min(KnownZeroOut, 1972 KnownZero2.countTrailingOnes()); 1973 1974 if (Op.getOpcode() == ISD::ADD) { 1975 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1976 return; 1977 } 1978 1979 // With ADDE, a carry bit may be added in, so we can only use this 1980 // information if we know (at least) that the low two bits are clear. We 1981 // then return to the caller that the low bit is unknown but that other bits 1982 // are known zero. 1983 if (KnownZeroOut >= 2) // ADDE 1984 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 1985 return; 1986 } 1987 case ISD::SREM: 1988 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1989 const APInt &RA = Rem->getAPIntValue().abs(); 1990 if (RA.isPowerOf2()) { 1991 APInt LowBits = RA - 1; 1992 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1993 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1994 1995 // The low bits of the first operand are unchanged by the srem. 1996 KnownZero = KnownZero2 & LowBits; 1997 KnownOne = KnownOne2 & LowBits; 1998 1999 // If the first operand is non-negative or has all low bits zero, then 2000 // the upper bits are all zero. 2001 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2002 KnownZero |= ~LowBits; 2003 2004 // If the first operand is negative and not all low bits are zero, then 2005 // the upper bits are all one. 2006 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2007 KnownOne |= ~LowBits; 2008 2009 KnownZero &= Mask; 2010 KnownOne &= Mask; 2011 2012 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2013 } 2014 } 2015 return; 2016 case ISD::UREM: { 2017 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2018 const APInt &RA = Rem->getAPIntValue(); 2019 if (RA.isPowerOf2()) { 2020 APInt LowBits = (RA - 1); 2021 APInt Mask2 = LowBits & Mask; 2022 KnownZero |= ~LowBits & Mask; 2023 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 2024 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2025 break; 2026 } 2027 } 2028 2029 // Since the result is less than or equal to either operand, any leading 2030 // zero bits in either operand must also exist in the result. 2031 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 2032 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 2033 Depth+1); 2034 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 2035 Depth+1); 2036 2037 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2038 KnownZero2.countLeadingOnes()); 2039 KnownOne.clearAllBits(); 2040 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2041 return; 2042 } 2043 default: 2044 // Allow the target to implement this method for its nodes. 2045 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2046 case ISD::INTRINSIC_WO_CHAIN: 2047 case ISD::INTRINSIC_W_CHAIN: 2048 case ISD::INTRINSIC_VOID: 2049 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2050 Depth); 2051 } 2052 return; 2053 } 2054} 2055 2056/// ComputeNumSignBits - Return the number of times the sign bit of the 2057/// register is replicated into the other bits. We know that at least 1 bit 2058/// is always equal to the sign bit (itself), but other cases can give us 2059/// information. For example, immediately after an "SRA X, 2", we know that 2060/// the top 3 bits are all equal to each other, so we return 3. 2061unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2062 EVT VT = Op.getValueType(); 2063 assert(VT.isInteger() && "Invalid VT!"); 2064 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2065 unsigned Tmp, Tmp2; 2066 unsigned FirstAnswer = 1; 2067 2068 if (Depth == 6) 2069 return 1; // Limit search depth. 2070 2071 switch (Op.getOpcode()) { 2072 default: break; 2073 case ISD::AssertSext: 2074 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2075 return VTBits-Tmp+1; 2076 case ISD::AssertZext: 2077 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2078 return VTBits-Tmp; 2079 2080 case ISD::Constant: { 2081 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2082 // If negative, return # leading ones. 2083 if (Val.isNegative()) 2084 return Val.countLeadingOnes(); 2085 2086 // Return # leading zeros. 2087 return Val.countLeadingZeros(); 2088 } 2089 2090 case ISD::SIGN_EXTEND: 2091 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2092 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2093 2094 case ISD::SIGN_EXTEND_INREG: 2095 // Max of the input and what this extends. 2096 Tmp = 2097 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2098 Tmp = VTBits-Tmp+1; 2099 2100 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2101 return std::max(Tmp, Tmp2); 2102 2103 case ISD::SRA: 2104 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2105 // SRA X, C -> adds C sign bits. 2106 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2107 Tmp += C->getZExtValue(); 2108 if (Tmp > VTBits) Tmp = VTBits; 2109 } 2110 return Tmp; 2111 case ISD::SHL: 2112 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2113 // shl destroys sign bits. 2114 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2115 if (C->getZExtValue() >= VTBits || // Bad shift. 2116 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2117 return Tmp - C->getZExtValue(); 2118 } 2119 break; 2120 case ISD::AND: 2121 case ISD::OR: 2122 case ISD::XOR: // NOT is handled here. 2123 // Logical binary ops preserve the number of sign bits at the worst. 2124 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2125 if (Tmp != 1) { 2126 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2127 FirstAnswer = std::min(Tmp, Tmp2); 2128 // We computed what we know about the sign bits as our first 2129 // answer. Now proceed to the generic code that uses 2130 // ComputeMaskedBits, and pick whichever answer is better. 2131 } 2132 break; 2133 2134 case ISD::SELECT: 2135 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2136 if (Tmp == 1) return 1; // Early out. 2137 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2138 return std::min(Tmp, Tmp2); 2139 2140 case ISD::SADDO: 2141 case ISD::UADDO: 2142 case ISD::SSUBO: 2143 case ISD::USUBO: 2144 case ISD::SMULO: 2145 case ISD::UMULO: 2146 if (Op.getResNo() != 1) 2147 break; 2148 // The boolean result conforms to getBooleanContents. Fall through. 2149 case ISD::SETCC: 2150 // If setcc returns 0/-1, all bits are sign bits. 2151 if (TLI.getBooleanContents() == 2152 TargetLowering::ZeroOrNegativeOneBooleanContent) 2153 return VTBits; 2154 break; 2155 case ISD::ROTL: 2156 case ISD::ROTR: 2157 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2158 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2159 2160 // Handle rotate right by N like a rotate left by 32-N. 2161 if (Op.getOpcode() == ISD::ROTR) 2162 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2163 2164 // If we aren't rotating out all of the known-in sign bits, return the 2165 // number that are left. This handles rotl(sext(x), 1) for example. 2166 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2167 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2168 } 2169 break; 2170 case ISD::ADD: 2171 // Add can have at most one carry bit. Thus we know that the output 2172 // is, at worst, one more bit than the inputs. 2173 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2174 if (Tmp == 1) return 1; // Early out. 2175 2176 // Special case decrementing a value (ADD X, -1): 2177 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2178 if (CRHS->isAllOnesValue()) { 2179 APInt KnownZero, KnownOne; 2180 APInt Mask = APInt::getAllOnesValue(VTBits); 2181 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2182 2183 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2184 // sign bits set. 2185 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2186 return VTBits; 2187 2188 // If we are subtracting one from a positive number, there is no carry 2189 // out of the result. 2190 if (KnownZero.isNegative()) 2191 return Tmp; 2192 } 2193 2194 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2195 if (Tmp2 == 1) return 1; 2196 return std::min(Tmp, Tmp2)-1; 2197 break; 2198 2199 case ISD::SUB: 2200 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2201 if (Tmp2 == 1) return 1; 2202 2203 // Handle NEG. 2204 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2205 if (CLHS->isNullValue()) { 2206 APInt KnownZero, KnownOne; 2207 APInt Mask = APInt::getAllOnesValue(VTBits); 2208 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2209 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2210 // sign bits set. 2211 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2212 return VTBits; 2213 2214 // If the input is known to be positive (the sign bit is known clear), 2215 // the output of the NEG has the same number of sign bits as the input. 2216 if (KnownZero.isNegative()) 2217 return Tmp2; 2218 2219 // Otherwise, we treat this like a SUB. 2220 } 2221 2222 // Sub can have at most one carry bit. Thus we know that the output 2223 // is, at worst, one more bit than the inputs. 2224 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2225 if (Tmp == 1) return 1; // Early out. 2226 return std::min(Tmp, Tmp2)-1; 2227 break; 2228 case ISD::TRUNCATE: 2229 // FIXME: it's tricky to do anything useful for this, but it is an important 2230 // case for targets like X86. 2231 break; 2232 } 2233 2234 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2235 if (Op.getOpcode() == ISD::LOAD) { 2236 LoadSDNode *LD = cast<LoadSDNode>(Op); 2237 unsigned ExtType = LD->getExtensionType(); 2238 switch (ExtType) { 2239 default: break; 2240 case ISD::SEXTLOAD: // '17' bits known 2241 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2242 return VTBits-Tmp+1; 2243 case ISD::ZEXTLOAD: // '16' bits known 2244 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2245 return VTBits-Tmp; 2246 } 2247 } 2248 2249 // Allow the target to implement this method for its nodes. 2250 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2251 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2252 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2253 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2254 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2255 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2256 } 2257 2258 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2259 // use this information. 2260 APInt KnownZero, KnownOne; 2261 APInt Mask = APInt::getAllOnesValue(VTBits); 2262 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2263 2264 if (KnownZero.isNegative()) { // sign bit is 0 2265 Mask = KnownZero; 2266 } else if (KnownOne.isNegative()) { // sign bit is 1; 2267 Mask = KnownOne; 2268 } else { 2269 // Nothing known. 2270 return FirstAnswer; 2271 } 2272 2273 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2274 // the number of identical bits in the top of the input value. 2275 Mask = ~Mask; 2276 Mask <<= Mask.getBitWidth()-VTBits; 2277 // Return # leading zeros. We use 'min' here in case Val was zero before 2278 // shifting. We don't want to return '64' as for an i32 "0". 2279 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2280} 2281 2282bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2283 // If we're told that NaNs won't happen, assume they won't. 2284 if (NoNaNsFPMath) 2285 return true; 2286 2287 // If the value is a constant, we can obviously see if it is a NaN or not. 2288 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2289 return !C->getValueAPF().isNaN(); 2290 2291 // TODO: Recognize more cases here. 2292 2293 return false; 2294} 2295 2296bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2297 // If the value is a constant, we can obviously see if it is a zero or not. 2298 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2299 return !C->isZero(); 2300 2301 // TODO: Recognize more cases here. 2302 2303 return false; 2304} 2305 2306bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2307 // Check the obvious case. 2308 if (A == B) return true; 2309 2310 // For for negative and positive zero. 2311 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2312 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2313 if (CA->isZero() && CB->isZero()) return true; 2314 2315 // Otherwise they may not be equal. 2316 return false; 2317} 2318 2319bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2320 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2321 if (!GA) return false; 2322 if (GA->getOffset() != 0) return false; 2323 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2324 if (!GV) return false; 2325 return MF->getMMI().hasDebugInfo(); 2326} 2327 2328 2329/// getNode - Gets or creates the specified node. 2330/// 2331SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2332 FoldingSetNodeID ID; 2333 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2334 void *IP = 0; 2335 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2336 return SDValue(E, 0); 2337 2338 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2339 CSEMap.InsertNode(N, IP); 2340 2341 AllNodes.push_back(N); 2342#ifndef NDEBUG 2343 VerifySDNode(N); 2344#endif 2345 return SDValue(N, 0); 2346} 2347 2348SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2349 EVT VT, SDValue Operand) { 2350 // Constant fold unary operations with an integer constant operand. 2351 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2352 const APInt &Val = C->getAPIntValue(); 2353 switch (Opcode) { 2354 default: break; 2355 case ISD::SIGN_EXTEND: 2356 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2357 case ISD::ANY_EXTEND: 2358 case ISD::ZERO_EXTEND: 2359 case ISD::TRUNCATE: 2360 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2361 case ISD::UINT_TO_FP: 2362 case ISD::SINT_TO_FP: { 2363 // No compile time operations on ppcf128. 2364 if (VT == MVT::ppcf128) break; 2365 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2366 (void)apf.convertFromAPInt(Val, 2367 Opcode==ISD::SINT_TO_FP, 2368 APFloat::rmNearestTiesToEven); 2369 return getConstantFP(apf, VT); 2370 } 2371 case ISD::BITCAST: 2372 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2373 return getConstantFP(Val.bitsToFloat(), VT); 2374 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2375 return getConstantFP(Val.bitsToDouble(), VT); 2376 break; 2377 case ISD::BSWAP: 2378 return getConstant(Val.byteSwap(), VT); 2379 case ISD::CTPOP: 2380 return getConstant(Val.countPopulation(), VT); 2381 case ISD::CTLZ: 2382 return getConstant(Val.countLeadingZeros(), VT); 2383 case ISD::CTTZ: 2384 return getConstant(Val.countTrailingZeros(), VT); 2385 } 2386 } 2387 2388 // Constant fold unary operations with a floating point constant operand. 2389 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2390 APFloat V = C->getValueAPF(); // make copy 2391 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2392 switch (Opcode) { 2393 case ISD::FNEG: 2394 V.changeSign(); 2395 return getConstantFP(V, VT); 2396 case ISD::FABS: 2397 V.clearSign(); 2398 return getConstantFP(V, VT); 2399 case ISD::FP_ROUND: 2400 case ISD::FP_EXTEND: { 2401 bool ignored; 2402 // This can return overflow, underflow, or inexact; we don't care. 2403 // FIXME need to be more flexible about rounding mode. 2404 (void)V.convert(*EVTToAPFloatSemantics(VT), 2405 APFloat::rmNearestTiesToEven, &ignored); 2406 return getConstantFP(V, VT); 2407 } 2408 case ISD::FP_TO_SINT: 2409 case ISD::FP_TO_UINT: { 2410 integerPart x[2]; 2411 bool ignored; 2412 assert(integerPartWidth >= 64); 2413 // FIXME need to be more flexible about rounding mode. 2414 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2415 Opcode==ISD::FP_TO_SINT, 2416 APFloat::rmTowardZero, &ignored); 2417 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2418 break; 2419 APInt api(VT.getSizeInBits(), 2, x); 2420 return getConstant(api, VT); 2421 } 2422 case ISD::BITCAST: 2423 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2424 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2425 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2426 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2427 break; 2428 } 2429 } 2430 } 2431 2432 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2433 switch (Opcode) { 2434 case ISD::TokenFactor: 2435 case ISD::MERGE_VALUES: 2436 case ISD::CONCAT_VECTORS: 2437 return Operand; // Factor, merge or concat of one node? No need. 2438 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2439 case ISD::FP_EXTEND: 2440 assert(VT.isFloatingPoint() && 2441 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2442 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2443 assert((!VT.isVector() || 2444 VT.getVectorNumElements() == 2445 Operand.getValueType().getVectorNumElements()) && 2446 "Vector element count mismatch!"); 2447 if (Operand.getOpcode() == ISD::UNDEF) 2448 return getUNDEF(VT); 2449 break; 2450 case ISD::SIGN_EXTEND: 2451 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2452 "Invalid SIGN_EXTEND!"); 2453 if (Operand.getValueType() == VT) return Operand; // noop extension 2454 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2455 "Invalid sext node, dst < src!"); 2456 assert((!VT.isVector() || 2457 VT.getVectorNumElements() == 2458 Operand.getValueType().getVectorNumElements()) && 2459 "Vector element count mismatch!"); 2460 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2461 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2462 break; 2463 case ISD::ZERO_EXTEND: 2464 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2465 "Invalid ZERO_EXTEND!"); 2466 if (Operand.getValueType() == VT) return Operand; // noop extension 2467 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2468 "Invalid zext node, dst < src!"); 2469 assert((!VT.isVector() || 2470 VT.getVectorNumElements() == 2471 Operand.getValueType().getVectorNumElements()) && 2472 "Vector element count mismatch!"); 2473 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2474 return getNode(ISD::ZERO_EXTEND, DL, VT, 2475 Operand.getNode()->getOperand(0)); 2476 break; 2477 case ISD::ANY_EXTEND: 2478 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2479 "Invalid ANY_EXTEND!"); 2480 if (Operand.getValueType() == VT) return Operand; // noop extension 2481 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2482 "Invalid anyext node, dst < src!"); 2483 assert((!VT.isVector() || 2484 VT.getVectorNumElements() == 2485 Operand.getValueType().getVectorNumElements()) && 2486 "Vector element count mismatch!"); 2487 2488 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2489 OpOpcode == ISD::ANY_EXTEND) 2490 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2491 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2492 2493 // (ext (trunx x)) -> x 2494 if (OpOpcode == ISD::TRUNCATE) { 2495 SDValue OpOp = Operand.getNode()->getOperand(0); 2496 if (OpOp.getValueType() == VT) 2497 return OpOp; 2498 } 2499 break; 2500 case ISD::TRUNCATE: 2501 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2502 "Invalid TRUNCATE!"); 2503 if (Operand.getValueType() == VT) return Operand; // noop truncate 2504 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2505 "Invalid truncate node, src < dst!"); 2506 assert((!VT.isVector() || 2507 VT.getVectorNumElements() == 2508 Operand.getValueType().getVectorNumElements()) && 2509 "Vector element count mismatch!"); 2510 if (OpOpcode == ISD::TRUNCATE) 2511 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2512 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2513 OpOpcode == ISD::ANY_EXTEND) { 2514 // If the source is smaller than the dest, we still need an extend. 2515 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2516 .bitsLT(VT.getScalarType())) 2517 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2518 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2519 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2520 else 2521 return Operand.getNode()->getOperand(0); 2522 } 2523 break; 2524 case ISD::BITCAST: 2525 // Basic sanity checking. 2526 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2527 && "Cannot BITCAST between types of different sizes!"); 2528 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2529 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2530 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2531 if (OpOpcode == ISD::UNDEF) 2532 return getUNDEF(VT); 2533 break; 2534 case ISD::SCALAR_TO_VECTOR: 2535 assert(VT.isVector() && !Operand.getValueType().isVector() && 2536 (VT.getVectorElementType() == Operand.getValueType() || 2537 (VT.getVectorElementType().isInteger() && 2538 Operand.getValueType().isInteger() && 2539 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2540 "Illegal SCALAR_TO_VECTOR node!"); 2541 if (OpOpcode == ISD::UNDEF) 2542 return getUNDEF(VT); 2543 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2544 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2545 isa<ConstantSDNode>(Operand.getOperand(1)) && 2546 Operand.getConstantOperandVal(1) == 0 && 2547 Operand.getOperand(0).getValueType() == VT) 2548 return Operand.getOperand(0); 2549 break; 2550 case ISD::FNEG: 2551 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2552 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2553 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2554 Operand.getNode()->getOperand(0)); 2555 if (OpOpcode == ISD::FNEG) // --X -> X 2556 return Operand.getNode()->getOperand(0); 2557 break; 2558 case ISD::FABS: 2559 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2560 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2561 break; 2562 } 2563 2564 SDNode *N; 2565 SDVTList VTs = getVTList(VT); 2566 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2567 FoldingSetNodeID ID; 2568 SDValue Ops[1] = { Operand }; 2569 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2570 void *IP = 0; 2571 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2572 return SDValue(E, 0); 2573 2574 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2575 CSEMap.InsertNode(N, IP); 2576 } else { 2577 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2578 } 2579 2580 AllNodes.push_back(N); 2581#ifndef NDEBUG 2582 VerifySDNode(N); 2583#endif 2584 return SDValue(N, 0); 2585} 2586 2587SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2588 EVT VT, 2589 ConstantSDNode *Cst1, 2590 ConstantSDNode *Cst2) { 2591 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2592 2593 switch (Opcode) { 2594 case ISD::ADD: return getConstant(C1 + C2, VT); 2595 case ISD::SUB: return getConstant(C1 - C2, VT); 2596 case ISD::MUL: return getConstant(C1 * C2, VT); 2597 case ISD::UDIV: 2598 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2599 break; 2600 case ISD::UREM: 2601 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2602 break; 2603 case ISD::SDIV: 2604 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2605 break; 2606 case ISD::SREM: 2607 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2608 break; 2609 case ISD::AND: return getConstant(C1 & C2, VT); 2610 case ISD::OR: return getConstant(C1 | C2, VT); 2611 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2612 case ISD::SHL: return getConstant(C1 << C2, VT); 2613 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2614 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2615 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2616 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2617 default: break; 2618 } 2619 2620 return SDValue(); 2621} 2622 2623SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2624 SDValue N1, SDValue N2) { 2625 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2626 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2627 switch (Opcode) { 2628 default: break; 2629 case ISD::TokenFactor: 2630 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2631 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2632 // Fold trivial token factors. 2633 if (N1.getOpcode() == ISD::EntryToken) return N2; 2634 if (N2.getOpcode() == ISD::EntryToken) return N1; 2635 if (N1 == N2) return N1; 2636 break; 2637 case ISD::CONCAT_VECTORS: 2638 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2639 // one big BUILD_VECTOR. 2640 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2641 N2.getOpcode() == ISD::BUILD_VECTOR) { 2642 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2643 N1.getNode()->op_end()); 2644 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2645 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2646 } 2647 break; 2648 case ISD::AND: 2649 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2650 assert(N1.getValueType() == N2.getValueType() && 2651 N1.getValueType() == VT && "Binary operator types must match!"); 2652 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2653 // worth handling here. 2654 if (N2C && N2C->isNullValue()) 2655 return N2; 2656 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2657 return N1; 2658 break; 2659 case ISD::OR: 2660 case ISD::XOR: 2661 case ISD::ADD: 2662 case ISD::SUB: 2663 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2664 assert(N1.getValueType() == N2.getValueType() && 2665 N1.getValueType() == VT && "Binary operator types must match!"); 2666 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2667 // it's worth handling here. 2668 if (N2C && N2C->isNullValue()) 2669 return N1; 2670 break; 2671 case ISD::UDIV: 2672 case ISD::UREM: 2673 case ISD::MULHU: 2674 case ISD::MULHS: 2675 case ISD::MUL: 2676 case ISD::SDIV: 2677 case ISD::SREM: 2678 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2679 assert(N1.getValueType() == N2.getValueType() && 2680 N1.getValueType() == VT && "Binary operator types must match!"); 2681 break; 2682 case ISD::FADD: 2683 case ISD::FSUB: 2684 case ISD::FMUL: 2685 case ISD::FDIV: 2686 case ISD::FREM: 2687 if (UnsafeFPMath) { 2688 if (Opcode == ISD::FADD) { 2689 // 0+x --> x 2690 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2691 if (CFP->getValueAPF().isZero()) 2692 return N2; 2693 // x+0 --> x 2694 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2695 if (CFP->getValueAPF().isZero()) 2696 return N1; 2697 } else if (Opcode == ISD::FSUB) { 2698 // x-0 --> x 2699 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2700 if (CFP->getValueAPF().isZero()) 2701 return N1; 2702 } 2703 } 2704 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2705 assert(N1.getValueType() == N2.getValueType() && 2706 N1.getValueType() == VT && "Binary operator types must match!"); 2707 break; 2708 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2709 assert(N1.getValueType() == VT && 2710 N1.getValueType().isFloatingPoint() && 2711 N2.getValueType().isFloatingPoint() && 2712 "Invalid FCOPYSIGN!"); 2713 break; 2714 case ISD::SHL: 2715 case ISD::SRA: 2716 case ISD::SRL: 2717 case ISD::ROTL: 2718 case ISD::ROTR: 2719 assert(VT == N1.getValueType() && 2720 "Shift operators return type must be the same as their first arg"); 2721 assert(VT.isInteger() && N2.getValueType().isInteger() && 2722 "Shifts only work on integers"); 2723 // Verify that the shift amount VT is bit enough to hold valid shift 2724 // amounts. This catches things like trying to shift an i1024 value by an 2725 // i8, which is easy to fall into in generic code that uses 2726 // TLI.getShiftAmount(). 2727 assert(N2.getValueType().getSizeInBits() >= 2728 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2729 "Invalid use of small shift amount with oversized value!"); 2730 2731 // Always fold shifts of i1 values so the code generator doesn't need to 2732 // handle them. Since we know the size of the shift has to be less than the 2733 // size of the value, the shift/rotate count is guaranteed to be zero. 2734 if (VT == MVT::i1) 2735 return N1; 2736 if (N2C && N2C->isNullValue()) 2737 return N1; 2738 break; 2739 case ISD::FP_ROUND_INREG: { 2740 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2741 assert(VT == N1.getValueType() && "Not an inreg round!"); 2742 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2743 "Cannot FP_ROUND_INREG integer types"); 2744 assert(EVT.isVector() == VT.isVector() && 2745 "FP_ROUND_INREG type should be vector iff the operand " 2746 "type is vector!"); 2747 assert((!EVT.isVector() || 2748 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2749 "Vector element counts must match in FP_ROUND_INREG"); 2750 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2751 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2752 break; 2753 } 2754 case ISD::FP_ROUND: 2755 assert(VT.isFloatingPoint() && 2756 N1.getValueType().isFloatingPoint() && 2757 VT.bitsLE(N1.getValueType()) && 2758 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2759 if (N1.getValueType() == VT) return N1; // noop conversion. 2760 break; 2761 case ISD::AssertSext: 2762 case ISD::AssertZext: { 2763 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2764 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2765 assert(VT.isInteger() && EVT.isInteger() && 2766 "Cannot *_EXTEND_INREG FP types"); 2767 assert(!EVT.isVector() && 2768 "AssertSExt/AssertZExt type should be the vector element type " 2769 "rather than the vector type!"); 2770 assert(EVT.bitsLE(VT) && "Not extending!"); 2771 if (VT == EVT) return N1; // noop assertion. 2772 break; 2773 } 2774 case ISD::SIGN_EXTEND_INREG: { 2775 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2776 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2777 assert(VT.isInteger() && EVT.isInteger() && 2778 "Cannot *_EXTEND_INREG FP types"); 2779 assert(EVT.isVector() == VT.isVector() && 2780 "SIGN_EXTEND_INREG type should be vector iff the operand " 2781 "type is vector!"); 2782 assert((!EVT.isVector() || 2783 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2784 "Vector element counts must match in SIGN_EXTEND_INREG"); 2785 assert(EVT.bitsLE(VT) && "Not extending!"); 2786 if (EVT == VT) return N1; // Not actually extending 2787 2788 if (N1C) { 2789 APInt Val = N1C->getAPIntValue(); 2790 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2791 Val <<= Val.getBitWidth()-FromBits; 2792 Val = Val.ashr(Val.getBitWidth()-FromBits); 2793 return getConstant(Val, VT); 2794 } 2795 break; 2796 } 2797 case ISD::EXTRACT_VECTOR_ELT: 2798 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2799 if (N1.getOpcode() == ISD::UNDEF) 2800 return getUNDEF(VT); 2801 2802 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2803 // expanding copies of large vectors from registers. 2804 if (N2C && 2805 N1.getOpcode() == ISD::CONCAT_VECTORS && 2806 N1.getNumOperands() > 0) { 2807 unsigned Factor = 2808 N1.getOperand(0).getValueType().getVectorNumElements(); 2809 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2810 N1.getOperand(N2C->getZExtValue() / Factor), 2811 getConstant(N2C->getZExtValue() % Factor, 2812 N2.getValueType())); 2813 } 2814 2815 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2816 // expanding large vector constants. 2817 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2818 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2819 EVT VEltTy = N1.getValueType().getVectorElementType(); 2820 if (Elt.getValueType() != VEltTy) { 2821 // If the vector element type is not legal, the BUILD_VECTOR operands 2822 // are promoted and implicitly truncated. Make that explicit here. 2823 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2824 } 2825 if (VT != VEltTy) { 2826 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2827 // result is implicitly extended. 2828 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2829 } 2830 return Elt; 2831 } 2832 2833 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2834 // operations are lowered to scalars. 2835 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2836 // If the indices are the same, return the inserted element else 2837 // if the indices are known different, extract the element from 2838 // the original vector. 2839 SDValue N1Op2 = N1.getOperand(2); 2840 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2841 2842 if (N1Op2C && N2C) { 2843 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2844 if (VT == N1.getOperand(1).getValueType()) 2845 return N1.getOperand(1); 2846 else 2847 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2848 } 2849 2850 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2851 } 2852 } 2853 break; 2854 case ISD::EXTRACT_ELEMENT: 2855 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2856 assert(!N1.getValueType().isVector() && !VT.isVector() && 2857 (N1.getValueType().isInteger() == VT.isInteger()) && 2858 "Wrong types for EXTRACT_ELEMENT!"); 2859 2860 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2861 // 64-bit integers into 32-bit parts. Instead of building the extract of 2862 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2863 if (N1.getOpcode() == ISD::BUILD_PAIR) 2864 return N1.getOperand(N2C->getZExtValue()); 2865 2866 // EXTRACT_ELEMENT of a constant int is also very common. 2867 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2868 unsigned ElementSize = VT.getSizeInBits(); 2869 unsigned Shift = ElementSize * N2C->getZExtValue(); 2870 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2871 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2872 } 2873 break; 2874 case ISD::EXTRACT_SUBVECTOR: { 2875 SDValue Index = N2; 2876 if (VT.isSimple() && N1.getValueType().isSimple()) { 2877 assert(VT.isVector() && N1.getValueType().isVector() && 2878 "Extract subvector VTs must be a vectors!"); 2879 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2880 "Extract subvector VTs must have the same element type!"); 2881 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2882 "Extract subvector must be from larger vector to smaller vector!"); 2883 2884 if (isa<ConstantSDNode>(Index.getNode())) { 2885 assert((VT.getVectorNumElements() + 2886 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2887 <= N1.getValueType().getVectorNumElements()) 2888 && "Extract subvector overflow!"); 2889 } 2890 2891 // Trivial extraction. 2892 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2893 return N1; 2894 } 2895 break; 2896 } 2897 } 2898 2899 if (N1C) { 2900 if (N2C) { 2901 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2902 if (SV.getNode()) return SV; 2903 } else { // Cannonicalize constant to RHS if commutative 2904 if (isCommutativeBinOp(Opcode)) { 2905 std::swap(N1C, N2C); 2906 std::swap(N1, N2); 2907 } 2908 } 2909 } 2910 2911 // Constant fold FP operations. 2912 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2913 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2914 if (N1CFP) { 2915 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2916 // Cannonicalize constant to RHS if commutative 2917 std::swap(N1CFP, N2CFP); 2918 std::swap(N1, N2); 2919 } else if (N2CFP && VT != MVT::ppcf128) { 2920 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2921 APFloat::opStatus s; 2922 switch (Opcode) { 2923 case ISD::FADD: 2924 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2925 if (s != APFloat::opInvalidOp) 2926 return getConstantFP(V1, VT); 2927 break; 2928 case ISD::FSUB: 2929 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2930 if (s!=APFloat::opInvalidOp) 2931 return getConstantFP(V1, VT); 2932 break; 2933 case ISD::FMUL: 2934 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2935 if (s!=APFloat::opInvalidOp) 2936 return getConstantFP(V1, VT); 2937 break; 2938 case ISD::FDIV: 2939 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2940 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2941 return getConstantFP(V1, VT); 2942 break; 2943 case ISD::FREM : 2944 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2945 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2946 return getConstantFP(V1, VT); 2947 break; 2948 case ISD::FCOPYSIGN: 2949 V1.copySign(V2); 2950 return getConstantFP(V1, VT); 2951 default: break; 2952 } 2953 } 2954 } 2955 2956 // Canonicalize an UNDEF to the RHS, even over a constant. 2957 if (N1.getOpcode() == ISD::UNDEF) { 2958 if (isCommutativeBinOp(Opcode)) { 2959 std::swap(N1, N2); 2960 } else { 2961 switch (Opcode) { 2962 case ISD::FP_ROUND_INREG: 2963 case ISD::SIGN_EXTEND_INREG: 2964 case ISD::SUB: 2965 case ISD::FSUB: 2966 case ISD::FDIV: 2967 case ISD::FREM: 2968 case ISD::SRA: 2969 return N1; // fold op(undef, arg2) -> undef 2970 case ISD::UDIV: 2971 case ISD::SDIV: 2972 case ISD::UREM: 2973 case ISD::SREM: 2974 case ISD::SRL: 2975 case ISD::SHL: 2976 if (!VT.isVector()) 2977 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2978 // For vectors, we can't easily build an all zero vector, just return 2979 // the LHS. 2980 return N2; 2981 } 2982 } 2983 } 2984 2985 // Fold a bunch of operators when the RHS is undef. 2986 if (N2.getOpcode() == ISD::UNDEF) { 2987 switch (Opcode) { 2988 case ISD::XOR: 2989 if (N1.getOpcode() == ISD::UNDEF) 2990 // Handle undef ^ undef -> 0 special case. This is a common 2991 // idiom (misuse). 2992 return getConstant(0, VT); 2993 // fallthrough 2994 case ISD::ADD: 2995 case ISD::ADDC: 2996 case ISD::ADDE: 2997 case ISD::SUB: 2998 case ISD::UDIV: 2999 case ISD::SDIV: 3000 case ISD::UREM: 3001 case ISD::SREM: 3002 return N2; // fold op(arg1, undef) -> undef 3003 case ISD::FADD: 3004 case ISD::FSUB: 3005 case ISD::FMUL: 3006 case ISD::FDIV: 3007 case ISD::FREM: 3008 if (UnsafeFPMath) 3009 return N2; 3010 break; 3011 case ISD::MUL: 3012 case ISD::AND: 3013 case ISD::SRL: 3014 case ISD::SHL: 3015 if (!VT.isVector()) 3016 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3017 // For vectors, we can't easily build an all zero vector, just return 3018 // the LHS. 3019 return N1; 3020 case ISD::OR: 3021 if (!VT.isVector()) 3022 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3023 // For vectors, we can't easily build an all one vector, just return 3024 // the LHS. 3025 return N1; 3026 case ISD::SRA: 3027 return N1; 3028 } 3029 } 3030 3031 // Memoize this node if possible. 3032 SDNode *N; 3033 SDVTList VTs = getVTList(VT); 3034 if (VT != MVT::Glue) { 3035 SDValue Ops[] = { N1, N2 }; 3036 FoldingSetNodeID ID; 3037 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3038 void *IP = 0; 3039 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3040 return SDValue(E, 0); 3041 3042 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3043 CSEMap.InsertNode(N, IP); 3044 } else { 3045 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3046 } 3047 3048 AllNodes.push_back(N); 3049#ifndef NDEBUG 3050 VerifySDNode(N); 3051#endif 3052 return SDValue(N, 0); 3053} 3054 3055SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3056 SDValue N1, SDValue N2, SDValue N3) { 3057 // Perform various simplifications. 3058 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3059 switch (Opcode) { 3060 case ISD::CONCAT_VECTORS: 3061 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3062 // one big BUILD_VECTOR. 3063 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3064 N2.getOpcode() == ISD::BUILD_VECTOR && 3065 N3.getOpcode() == ISD::BUILD_VECTOR) { 3066 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3067 N1.getNode()->op_end()); 3068 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3069 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3070 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3071 } 3072 break; 3073 case ISD::SETCC: { 3074 // Use FoldSetCC to simplify SETCC's. 3075 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3076 if (Simp.getNode()) return Simp; 3077 break; 3078 } 3079 case ISD::SELECT: 3080 if (N1C) { 3081 if (N1C->getZExtValue()) 3082 return N2; // select true, X, Y -> X 3083 else 3084 return N3; // select false, X, Y -> Y 3085 } 3086 3087 if (N2 == N3) return N2; // select C, X, X -> X 3088 break; 3089 case ISD::VECTOR_SHUFFLE: 3090 llvm_unreachable("should use getVectorShuffle constructor!"); 3091 break; 3092 case ISD::INSERT_SUBVECTOR: { 3093 SDValue Index = N3; 3094 if (VT.isSimple() && N1.getValueType().isSimple() 3095 && N2.getValueType().isSimple()) { 3096 assert(VT.isVector() && N1.getValueType().isVector() && 3097 N2.getValueType().isVector() && 3098 "Insert subvector VTs must be a vectors"); 3099 assert(VT == N1.getValueType() && 3100 "Dest and insert subvector source types must match!"); 3101 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3102 "Insert subvector must be from smaller vector to larger vector!"); 3103 if (isa<ConstantSDNode>(Index.getNode())) { 3104 assert((N2.getValueType().getVectorNumElements() + 3105 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3106 <= VT.getVectorNumElements()) 3107 && "Insert subvector overflow!"); 3108 } 3109 3110 // Trivial insertion. 3111 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3112 return N2; 3113 } 3114 break; 3115 } 3116 case ISD::BITCAST: 3117 // Fold bit_convert nodes from a type to themselves. 3118 if (N1.getValueType() == VT) 3119 return N1; 3120 break; 3121 } 3122 3123 // Memoize node if it doesn't produce a flag. 3124 SDNode *N; 3125 SDVTList VTs = getVTList(VT); 3126 if (VT != MVT::Glue) { 3127 SDValue Ops[] = { N1, N2, N3 }; 3128 FoldingSetNodeID ID; 3129 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3130 void *IP = 0; 3131 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3132 return SDValue(E, 0); 3133 3134 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3135 CSEMap.InsertNode(N, IP); 3136 } else { 3137 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3138 } 3139 3140 AllNodes.push_back(N); 3141#ifndef NDEBUG 3142 VerifySDNode(N); 3143#endif 3144 return SDValue(N, 0); 3145} 3146 3147SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3148 SDValue N1, SDValue N2, SDValue N3, 3149 SDValue N4) { 3150 SDValue Ops[] = { N1, N2, N3, N4 }; 3151 return getNode(Opcode, DL, VT, Ops, 4); 3152} 3153 3154SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3155 SDValue N1, SDValue N2, SDValue N3, 3156 SDValue N4, SDValue N5) { 3157 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3158 return getNode(Opcode, DL, VT, Ops, 5); 3159} 3160 3161/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3162/// the incoming stack arguments to be loaded from the stack. 3163SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3164 SmallVector<SDValue, 8> ArgChains; 3165 3166 // Include the original chain at the beginning of the list. When this is 3167 // used by target LowerCall hooks, this helps legalize find the 3168 // CALLSEQ_BEGIN node. 3169 ArgChains.push_back(Chain); 3170 3171 // Add a chain value for each stack argument. 3172 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3173 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3174 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3175 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3176 if (FI->getIndex() < 0) 3177 ArgChains.push_back(SDValue(L, 1)); 3178 3179 // Build a tokenfactor for all the chains. 3180 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3181 &ArgChains[0], ArgChains.size()); 3182} 3183 3184/// SplatByte - Distribute ByteVal over NumBits bits. 3185static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3186 APInt Val = APInt(NumBits, ByteVal); 3187 unsigned Shift = 8; 3188 for (unsigned i = NumBits; i > 8; i >>= 1) { 3189 Val = (Val << Shift) | Val; 3190 Shift <<= 1; 3191 } 3192 return Val; 3193} 3194 3195/// getMemsetValue - Vectorized representation of the memset value 3196/// operand. 3197static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3198 DebugLoc dl) { 3199 assert(Value.getOpcode() != ISD::UNDEF); 3200 3201 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3202 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3203 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3204 if (VT.isInteger()) 3205 return DAG.getConstant(Val, VT); 3206 return DAG.getConstantFP(APFloat(Val), VT); 3207 } 3208 3209 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3210 if (NumBits > 8) { 3211 // Use a multiplication with 0x010101... to extend the input to the 3212 // required length. 3213 APInt Magic = SplatByte(NumBits, 0x01); 3214 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3215 } 3216 3217 return Value; 3218} 3219 3220/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3221/// used when a memcpy is turned into a memset when the source is a constant 3222/// string ptr. 3223static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3224 const TargetLowering &TLI, 3225 std::string &Str, unsigned Offset) { 3226 // Handle vector with all elements zero. 3227 if (Str.empty()) { 3228 if (VT.isInteger()) 3229 return DAG.getConstant(0, VT); 3230 else if (VT == MVT::f32 || VT == MVT::f64) 3231 return DAG.getConstantFP(0.0, VT); 3232 else if (VT.isVector()) { 3233 unsigned NumElts = VT.getVectorNumElements(); 3234 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3235 return DAG.getNode(ISD::BITCAST, dl, VT, 3236 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3237 EltVT, NumElts))); 3238 } else 3239 llvm_unreachable("Expected type!"); 3240 } 3241 3242 assert(!VT.isVector() && "Can't handle vector type here!"); 3243 unsigned NumBits = VT.getSizeInBits(); 3244 unsigned MSB = NumBits / 8; 3245 uint64_t Val = 0; 3246 if (TLI.isLittleEndian()) 3247 Offset = Offset + MSB - 1; 3248 for (unsigned i = 0; i != MSB; ++i) { 3249 Val = (Val << 8) | (unsigned char)Str[Offset]; 3250 Offset += TLI.isLittleEndian() ? -1 : 1; 3251 } 3252 return DAG.getConstant(Val, VT); 3253} 3254 3255/// getMemBasePlusOffset - Returns base and offset node for the 3256/// 3257static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3258 SelectionDAG &DAG) { 3259 EVT VT = Base.getValueType(); 3260 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3261 VT, Base, DAG.getConstant(Offset, VT)); 3262} 3263 3264/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3265/// 3266static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3267 unsigned SrcDelta = 0; 3268 GlobalAddressSDNode *G = NULL; 3269 if (Src.getOpcode() == ISD::GlobalAddress) 3270 G = cast<GlobalAddressSDNode>(Src); 3271 else if (Src.getOpcode() == ISD::ADD && 3272 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3273 Src.getOperand(1).getOpcode() == ISD::Constant) { 3274 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3275 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3276 } 3277 if (!G) 3278 return false; 3279 3280 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3281 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3282 return true; 3283 3284 return false; 3285} 3286 3287/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3288/// to replace the memset / memcpy. Return true if the number of memory ops 3289/// is below the threshold. It returns the types of the sequence of 3290/// memory ops to perform memset / memcpy by reference. 3291static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3292 unsigned Limit, uint64_t Size, 3293 unsigned DstAlign, unsigned SrcAlign, 3294 bool NonScalarIntSafe, 3295 bool MemcpyStrSrc, 3296 SelectionDAG &DAG, 3297 const TargetLowering &TLI) { 3298 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3299 "Expecting memcpy / memset source to meet alignment requirement!"); 3300 // If 'SrcAlign' is zero, that means the memory operation does not need load 3301 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3302 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3303 // specified alignment of the memory operation. If it is zero, that means 3304 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3305 // indicates whether the memcpy source is constant so it does not need to be 3306 // loaded. 3307 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3308 NonScalarIntSafe, MemcpyStrSrc, 3309 DAG.getMachineFunction()); 3310 3311 if (VT == MVT::Other) { 3312 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3313 TLI.allowsUnalignedMemoryAccesses(VT)) { 3314 VT = TLI.getPointerTy(); 3315 } else { 3316 switch (DstAlign & 7) { 3317 case 0: VT = MVT::i64; break; 3318 case 4: VT = MVT::i32; break; 3319 case 2: VT = MVT::i16; break; 3320 default: VT = MVT::i8; break; 3321 } 3322 } 3323 3324 MVT LVT = MVT::i64; 3325 while (!TLI.isTypeLegal(LVT)) 3326 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3327 assert(LVT.isInteger()); 3328 3329 if (VT.bitsGT(LVT)) 3330 VT = LVT; 3331 } 3332 3333 unsigned NumMemOps = 0; 3334 while (Size != 0) { 3335 unsigned VTSize = VT.getSizeInBits() / 8; 3336 while (VTSize > Size) { 3337 // For now, only use non-vector load / store's for the left-over pieces. 3338 if (VT.isVector() || VT.isFloatingPoint()) { 3339 VT = MVT::i64; 3340 while (!TLI.isTypeLegal(VT)) 3341 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3342 VTSize = VT.getSizeInBits() / 8; 3343 } else { 3344 // This can result in a type that is not legal on the target, e.g. 3345 // 1 or 2 bytes on PPC. 3346 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3347 VTSize >>= 1; 3348 } 3349 } 3350 3351 if (++NumMemOps > Limit) 3352 return false; 3353 MemOps.push_back(VT); 3354 Size -= VTSize; 3355 } 3356 3357 return true; 3358} 3359 3360static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3361 SDValue Chain, SDValue Dst, 3362 SDValue Src, uint64_t Size, 3363 unsigned Align, bool isVol, 3364 bool AlwaysInline, 3365 MachinePointerInfo DstPtrInfo, 3366 MachinePointerInfo SrcPtrInfo) { 3367 // Turn a memcpy of undef to nop. 3368 if (Src.getOpcode() == ISD::UNDEF) 3369 return Chain; 3370 3371 // Expand memcpy to a series of load and store ops if the size operand falls 3372 // below a certain threshold. 3373 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3374 // rather than maybe a humongous number of loads and stores. 3375 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3376 std::vector<EVT> MemOps; 3377 bool DstAlignCanChange = false; 3378 MachineFunction &MF = DAG.getMachineFunction(); 3379 MachineFrameInfo *MFI = MF.getFrameInfo(); 3380 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3381 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3382 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3383 DstAlignCanChange = true; 3384 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3385 if (Align > SrcAlign) 3386 SrcAlign = Align; 3387 std::string Str; 3388 bool CopyFromStr = isMemSrcFromString(Src, Str); 3389 bool isZeroStr = CopyFromStr && Str.empty(); 3390 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3391 3392 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3393 (DstAlignCanChange ? 0 : Align), 3394 (isZeroStr ? 0 : SrcAlign), 3395 true, CopyFromStr, DAG, TLI)) 3396 return SDValue(); 3397 3398 if (DstAlignCanChange) { 3399 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3400 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3401 if (NewAlign > Align) { 3402 // Give the stack frame object a larger alignment if needed. 3403 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3404 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3405 Align = NewAlign; 3406 } 3407 } 3408 3409 SmallVector<SDValue, 8> OutChains; 3410 unsigned NumMemOps = MemOps.size(); 3411 uint64_t SrcOff = 0, DstOff = 0; 3412 for (unsigned i = 0; i != NumMemOps; ++i) { 3413 EVT VT = MemOps[i]; 3414 unsigned VTSize = VT.getSizeInBits() / 8; 3415 SDValue Value, Store; 3416 3417 if (CopyFromStr && 3418 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3419 // It's unlikely a store of a vector immediate can be done in a single 3420 // instruction. It would require a load from a constantpool first. 3421 // We only handle zero vectors here. 3422 // FIXME: Handle other cases where store of vector immediate is done in 3423 // a single instruction. 3424 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3425 Store = DAG.getStore(Chain, dl, Value, 3426 getMemBasePlusOffset(Dst, DstOff, DAG), 3427 DstPtrInfo.getWithOffset(DstOff), isVol, 3428 false, Align); 3429 } else { 3430 // The type might not be legal for the target. This should only happen 3431 // if the type is smaller than a legal type, as on PPC, so the right 3432 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3433 // to Load/Store if NVT==VT. 3434 // FIXME does the case above also need this? 3435 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3436 assert(NVT.bitsGE(VT)); 3437 Value = DAG.getExtLoad(ISD::EXTLOAD, NVT, dl, Chain, 3438 getMemBasePlusOffset(Src, SrcOff, DAG), 3439 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3440 MinAlign(SrcAlign, SrcOff)); 3441 Store = DAG.getTruncStore(Chain, dl, Value, 3442 getMemBasePlusOffset(Dst, DstOff, DAG), 3443 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3444 false, Align); 3445 } 3446 OutChains.push_back(Store); 3447 SrcOff += VTSize; 3448 DstOff += VTSize; 3449 } 3450 3451 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3452 &OutChains[0], OutChains.size()); 3453} 3454 3455static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3456 SDValue Chain, SDValue Dst, 3457 SDValue Src, uint64_t Size, 3458 unsigned Align, bool isVol, 3459 bool AlwaysInline, 3460 MachinePointerInfo DstPtrInfo, 3461 MachinePointerInfo SrcPtrInfo) { 3462 // Turn a memmove of undef to nop. 3463 if (Src.getOpcode() == ISD::UNDEF) 3464 return Chain; 3465 3466 // Expand memmove to a series of load and store ops if the size operand falls 3467 // below a certain threshold. 3468 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3469 std::vector<EVT> MemOps; 3470 bool DstAlignCanChange = false; 3471 MachineFunction &MF = DAG.getMachineFunction(); 3472 MachineFrameInfo *MFI = MF.getFrameInfo(); 3473 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3474 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3475 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3476 DstAlignCanChange = true; 3477 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3478 if (Align > SrcAlign) 3479 SrcAlign = Align; 3480 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3481 3482 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3483 (DstAlignCanChange ? 0 : Align), 3484 SrcAlign, true, false, DAG, TLI)) 3485 return SDValue(); 3486 3487 if (DstAlignCanChange) { 3488 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3489 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3490 if (NewAlign > Align) { 3491 // Give the stack frame object a larger alignment if needed. 3492 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3493 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3494 Align = NewAlign; 3495 } 3496 } 3497 3498 uint64_t SrcOff = 0, DstOff = 0; 3499 SmallVector<SDValue, 8> LoadValues; 3500 SmallVector<SDValue, 8> LoadChains; 3501 SmallVector<SDValue, 8> OutChains; 3502 unsigned NumMemOps = MemOps.size(); 3503 for (unsigned i = 0; i < NumMemOps; i++) { 3504 EVT VT = MemOps[i]; 3505 unsigned VTSize = VT.getSizeInBits() / 8; 3506 SDValue Value, Store; 3507 3508 Value = DAG.getLoad(VT, dl, Chain, 3509 getMemBasePlusOffset(Src, SrcOff, DAG), 3510 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3511 false, SrcAlign); 3512 LoadValues.push_back(Value); 3513 LoadChains.push_back(Value.getValue(1)); 3514 SrcOff += VTSize; 3515 } 3516 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3517 &LoadChains[0], LoadChains.size()); 3518 OutChains.clear(); 3519 for (unsigned i = 0; i < NumMemOps; i++) { 3520 EVT VT = MemOps[i]; 3521 unsigned VTSize = VT.getSizeInBits() / 8; 3522 SDValue Value, Store; 3523 3524 Store = DAG.getStore(Chain, dl, LoadValues[i], 3525 getMemBasePlusOffset(Dst, DstOff, DAG), 3526 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3527 OutChains.push_back(Store); 3528 DstOff += VTSize; 3529 } 3530 3531 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3532 &OutChains[0], OutChains.size()); 3533} 3534 3535static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3536 SDValue Chain, SDValue Dst, 3537 SDValue Src, uint64_t Size, 3538 unsigned Align, bool isVol, 3539 MachinePointerInfo DstPtrInfo) { 3540 // Turn a memset of undef to nop. 3541 if (Src.getOpcode() == ISD::UNDEF) 3542 return Chain; 3543 3544 // Expand memset to a series of load/store ops if the size operand 3545 // falls below a certain threshold. 3546 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3547 std::vector<EVT> MemOps; 3548 bool DstAlignCanChange = false; 3549 MachineFunction &MF = DAG.getMachineFunction(); 3550 MachineFrameInfo *MFI = MF.getFrameInfo(); 3551 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3552 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3553 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3554 DstAlignCanChange = true; 3555 bool NonScalarIntSafe = 3556 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3557 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3558 Size, (DstAlignCanChange ? 0 : Align), 0, 3559 NonScalarIntSafe, false, DAG, TLI)) 3560 return SDValue(); 3561 3562 if (DstAlignCanChange) { 3563 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3564 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3565 if (NewAlign > Align) { 3566 // Give the stack frame object a larger alignment if needed. 3567 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3568 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3569 Align = NewAlign; 3570 } 3571 } 3572 3573 SmallVector<SDValue, 8> OutChains; 3574 uint64_t DstOff = 0; 3575 unsigned NumMemOps = MemOps.size(); 3576 3577 // Find the largest store and generate the bit pattern for it. 3578 EVT LargestVT = MemOps[0]; 3579 for (unsigned i = 1; i < NumMemOps; i++) 3580 if (MemOps[i].bitsGT(LargestVT)) 3581 LargestVT = MemOps[i]; 3582 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3583 3584 for (unsigned i = 0; i < NumMemOps; i++) { 3585 EVT VT = MemOps[i]; 3586 3587 // If this store is smaller than the largest store see whether we can get 3588 // the smaller value for free with a truncate. 3589 SDValue Value = MemSetValue; 3590 if (VT.bitsLT(LargestVT)) { 3591 if (!LargestVT.isVector() && !VT.isVector() && 3592 TLI.isTruncateFree(LargestVT, VT)) 3593 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3594 else 3595 Value = getMemsetValue(Src, VT, DAG, dl); 3596 } 3597 assert(Value.getValueType() == VT && "Value with wrong type."); 3598 SDValue Store = DAG.getStore(Chain, dl, Value, 3599 getMemBasePlusOffset(Dst, DstOff, DAG), 3600 DstPtrInfo.getWithOffset(DstOff), 3601 isVol, false, Align); 3602 OutChains.push_back(Store); 3603 DstOff += VT.getSizeInBits() / 8; 3604 } 3605 3606 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3607 &OutChains[0], OutChains.size()); 3608} 3609 3610SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3611 SDValue Src, SDValue Size, 3612 unsigned Align, bool isVol, bool AlwaysInline, 3613 MachinePointerInfo DstPtrInfo, 3614 MachinePointerInfo SrcPtrInfo) { 3615 3616 // Check to see if we should lower the memcpy to loads and stores first. 3617 // For cases within the target-specified limits, this is the best choice. 3618 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3619 if (ConstantSize) { 3620 // Memcpy with size zero? Just return the original chain. 3621 if (ConstantSize->isNullValue()) 3622 return Chain; 3623 3624 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3625 ConstantSize->getZExtValue(),Align, 3626 isVol, false, DstPtrInfo, SrcPtrInfo); 3627 if (Result.getNode()) 3628 return Result; 3629 } 3630 3631 // Then check to see if we should lower the memcpy with target-specific 3632 // code. If the target chooses to do this, this is the next best. 3633 SDValue Result = 3634 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3635 isVol, AlwaysInline, 3636 DstPtrInfo, SrcPtrInfo); 3637 if (Result.getNode()) 3638 return Result; 3639 3640 // If we really need inline code and the target declined to provide it, 3641 // use a (potentially long) sequence of loads and stores. 3642 if (AlwaysInline) { 3643 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3644 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3645 ConstantSize->getZExtValue(), Align, isVol, 3646 true, DstPtrInfo, SrcPtrInfo); 3647 } 3648 3649 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3650 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3651 // respect volatile, so they may do things like read or write memory 3652 // beyond the given memory regions. But fixing this isn't easy, and most 3653 // people don't care. 3654 3655 // Emit a library call. 3656 TargetLowering::ArgListTy Args; 3657 TargetLowering::ArgListEntry Entry; 3658 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3659 Entry.Node = Dst; Args.push_back(Entry); 3660 Entry.Node = Src; Args.push_back(Entry); 3661 Entry.Node = Size; Args.push_back(Entry); 3662 // FIXME: pass in DebugLoc 3663 std::pair<SDValue,SDValue> CallResult = 3664 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3665 false, false, false, false, 0, 3666 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3667 /*isReturnValueUsed=*/false, 3668 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3669 TLI.getPointerTy()), 3670 Args, *this, dl); 3671 return CallResult.second; 3672} 3673 3674SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3675 SDValue Src, SDValue Size, 3676 unsigned Align, bool isVol, 3677 MachinePointerInfo DstPtrInfo, 3678 MachinePointerInfo SrcPtrInfo) { 3679 3680 // Check to see if we should lower the memmove to loads and stores first. 3681 // For cases within the target-specified limits, this is the best choice. 3682 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3683 if (ConstantSize) { 3684 // Memmove with size zero? Just return the original chain. 3685 if (ConstantSize->isNullValue()) 3686 return Chain; 3687 3688 SDValue Result = 3689 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3690 ConstantSize->getZExtValue(), Align, isVol, 3691 false, DstPtrInfo, SrcPtrInfo); 3692 if (Result.getNode()) 3693 return Result; 3694 } 3695 3696 // Then check to see if we should lower the memmove with target-specific 3697 // code. If the target chooses to do this, this is the next best. 3698 SDValue Result = 3699 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3700 DstPtrInfo, SrcPtrInfo); 3701 if (Result.getNode()) 3702 return Result; 3703 3704 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3705 // not be safe. See memcpy above for more details. 3706 3707 // Emit a library call. 3708 TargetLowering::ArgListTy Args; 3709 TargetLowering::ArgListEntry Entry; 3710 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3711 Entry.Node = Dst; Args.push_back(Entry); 3712 Entry.Node = Src; Args.push_back(Entry); 3713 Entry.Node = Size; Args.push_back(Entry); 3714 // FIXME: pass in DebugLoc 3715 std::pair<SDValue,SDValue> CallResult = 3716 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3717 false, false, false, false, 0, 3718 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3719 /*isReturnValueUsed=*/false, 3720 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3721 TLI.getPointerTy()), 3722 Args, *this, dl); 3723 return CallResult.second; 3724} 3725 3726SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3727 SDValue Src, SDValue Size, 3728 unsigned Align, bool isVol, 3729 MachinePointerInfo DstPtrInfo) { 3730 3731 // Check to see if we should lower the memset to stores first. 3732 // For cases within the target-specified limits, this is the best choice. 3733 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3734 if (ConstantSize) { 3735 // Memset with size zero? Just return the original chain. 3736 if (ConstantSize->isNullValue()) 3737 return Chain; 3738 3739 SDValue Result = 3740 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3741 Align, isVol, DstPtrInfo); 3742 3743 if (Result.getNode()) 3744 return Result; 3745 } 3746 3747 // Then check to see if we should lower the memset with target-specific 3748 // code. If the target chooses to do this, this is the next best. 3749 SDValue Result = 3750 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3751 DstPtrInfo); 3752 if (Result.getNode()) 3753 return Result; 3754 3755 // Emit a library call. 3756 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3757 TargetLowering::ArgListTy Args; 3758 TargetLowering::ArgListEntry Entry; 3759 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3760 Args.push_back(Entry); 3761 // Extend or truncate the argument to be an i32 value for the call. 3762 if (Src.getValueType().bitsGT(MVT::i32)) 3763 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3764 else 3765 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3766 Entry.Node = Src; 3767 Entry.Ty = Type::getInt32Ty(*getContext()); 3768 Entry.isSExt = true; 3769 Args.push_back(Entry); 3770 Entry.Node = Size; 3771 Entry.Ty = IntPtrTy; 3772 Entry.isSExt = false; 3773 Args.push_back(Entry); 3774 // FIXME: pass in DebugLoc 3775 std::pair<SDValue,SDValue> CallResult = 3776 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3777 false, false, false, false, 0, 3778 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3779 /*isReturnValueUsed=*/false, 3780 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3781 TLI.getPointerTy()), 3782 Args, *this, dl); 3783 return CallResult.second; 3784} 3785 3786SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3787 SDValue Chain, SDValue Ptr, SDValue Cmp, 3788 SDValue Swp, MachinePointerInfo PtrInfo, 3789 unsigned Alignment) { 3790 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3791 Alignment = getEVTAlignment(MemVT); 3792 3793 MachineFunction &MF = getMachineFunction(); 3794 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3795 3796 // For now, atomics are considered to be volatile always. 3797 Flags |= MachineMemOperand::MOVolatile; 3798 3799 MachineMemOperand *MMO = 3800 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3801 3802 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3803} 3804 3805SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3806 SDValue Chain, 3807 SDValue Ptr, SDValue Cmp, 3808 SDValue Swp, MachineMemOperand *MMO) { 3809 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3810 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3811 3812 EVT VT = Cmp.getValueType(); 3813 3814 SDVTList VTs = getVTList(VT, MVT::Other); 3815 FoldingSetNodeID ID; 3816 ID.AddInteger(MemVT.getRawBits()); 3817 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3818 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3819 void* IP = 0; 3820 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3821 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3822 return SDValue(E, 0); 3823 } 3824 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3825 Ptr, Cmp, Swp, MMO); 3826 CSEMap.InsertNode(N, IP); 3827 AllNodes.push_back(N); 3828 return SDValue(N, 0); 3829} 3830 3831SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3832 SDValue Chain, 3833 SDValue Ptr, SDValue Val, 3834 const Value* PtrVal, 3835 unsigned Alignment) { 3836 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3837 Alignment = getEVTAlignment(MemVT); 3838 3839 MachineFunction &MF = getMachineFunction(); 3840 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3841 3842 // For now, atomics are considered to be volatile always. 3843 Flags |= MachineMemOperand::MOVolatile; 3844 3845 MachineMemOperand *MMO = 3846 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3847 MemVT.getStoreSize(), Alignment); 3848 3849 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3850} 3851 3852SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3853 SDValue Chain, 3854 SDValue Ptr, SDValue Val, 3855 MachineMemOperand *MMO) { 3856 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3857 Opcode == ISD::ATOMIC_LOAD_SUB || 3858 Opcode == ISD::ATOMIC_LOAD_AND || 3859 Opcode == ISD::ATOMIC_LOAD_OR || 3860 Opcode == ISD::ATOMIC_LOAD_XOR || 3861 Opcode == ISD::ATOMIC_LOAD_NAND || 3862 Opcode == ISD::ATOMIC_LOAD_MIN || 3863 Opcode == ISD::ATOMIC_LOAD_MAX || 3864 Opcode == ISD::ATOMIC_LOAD_UMIN || 3865 Opcode == ISD::ATOMIC_LOAD_UMAX || 3866 Opcode == ISD::ATOMIC_SWAP) && 3867 "Invalid Atomic Op"); 3868 3869 EVT VT = Val.getValueType(); 3870 3871 SDVTList VTs = getVTList(VT, MVT::Other); 3872 FoldingSetNodeID ID; 3873 ID.AddInteger(MemVT.getRawBits()); 3874 SDValue Ops[] = {Chain, Ptr, Val}; 3875 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3876 void* IP = 0; 3877 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3878 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3879 return SDValue(E, 0); 3880 } 3881 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3882 Ptr, Val, MMO); 3883 CSEMap.InsertNode(N, IP); 3884 AllNodes.push_back(N); 3885 return SDValue(N, 0); 3886} 3887 3888/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3889SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3890 DebugLoc dl) { 3891 if (NumOps == 1) 3892 return Ops[0]; 3893 3894 SmallVector<EVT, 4> VTs; 3895 VTs.reserve(NumOps); 3896 for (unsigned i = 0; i < NumOps; ++i) 3897 VTs.push_back(Ops[i].getValueType()); 3898 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3899 Ops, NumOps); 3900} 3901 3902SDValue 3903SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3904 const EVT *VTs, unsigned NumVTs, 3905 const SDValue *Ops, unsigned NumOps, 3906 EVT MemVT, MachinePointerInfo PtrInfo, 3907 unsigned Align, bool Vol, 3908 bool ReadMem, bool WriteMem) { 3909 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3910 MemVT, PtrInfo, Align, Vol, 3911 ReadMem, WriteMem); 3912} 3913 3914SDValue 3915SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3916 const SDValue *Ops, unsigned NumOps, 3917 EVT MemVT, MachinePointerInfo PtrInfo, 3918 unsigned Align, bool Vol, 3919 bool ReadMem, bool WriteMem) { 3920 if (Align == 0) // Ensure that codegen never sees alignment 0 3921 Align = getEVTAlignment(MemVT); 3922 3923 MachineFunction &MF = getMachineFunction(); 3924 unsigned Flags = 0; 3925 if (WriteMem) 3926 Flags |= MachineMemOperand::MOStore; 3927 if (ReadMem) 3928 Flags |= MachineMemOperand::MOLoad; 3929 if (Vol) 3930 Flags |= MachineMemOperand::MOVolatile; 3931 MachineMemOperand *MMO = 3932 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 3933 3934 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3935} 3936 3937SDValue 3938SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3939 const SDValue *Ops, unsigned NumOps, 3940 EVT MemVT, MachineMemOperand *MMO) { 3941 assert((Opcode == ISD::INTRINSIC_VOID || 3942 Opcode == ISD::INTRINSIC_W_CHAIN || 3943 Opcode == ISD::PREFETCH || 3944 (Opcode <= INT_MAX && 3945 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3946 "Opcode is not a memory-accessing opcode!"); 3947 3948 // Memoize the node unless it returns a flag. 3949 MemIntrinsicSDNode *N; 3950 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 3951 FoldingSetNodeID ID; 3952 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3953 void *IP = 0; 3954 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3955 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3956 return SDValue(E, 0); 3957 } 3958 3959 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3960 MemVT, MMO); 3961 CSEMap.InsertNode(N, IP); 3962 } else { 3963 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3964 MemVT, MMO); 3965 } 3966 AllNodes.push_back(N); 3967 return SDValue(N, 0); 3968} 3969 3970/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 3971/// MachinePointerInfo record from it. This is particularly useful because the 3972/// code generator has many cases where it doesn't bother passing in a 3973/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 3974static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 3975 // If this is FI+Offset, we can model it. 3976 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 3977 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 3978 3979 // If this is (FI+Offset1)+Offset2, we can model it. 3980 if (Ptr.getOpcode() != ISD::ADD || 3981 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 3982 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 3983 return MachinePointerInfo(); 3984 3985 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 3986 return MachinePointerInfo::getFixedStack(FI, Offset+ 3987 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 3988} 3989 3990/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 3991/// MachinePointerInfo record from it. This is particularly useful because the 3992/// code generator has many cases where it doesn't bother passing in a 3993/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 3994static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 3995 // If the 'Offset' value isn't a constant, we can't handle this. 3996 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 3997 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 3998 if (OffsetOp.getOpcode() == ISD::UNDEF) 3999 return InferPointerInfo(Ptr); 4000 return MachinePointerInfo(); 4001} 4002 4003 4004SDValue 4005SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4006 EVT VT, DebugLoc dl, SDValue Chain, 4007 SDValue Ptr, SDValue Offset, 4008 MachinePointerInfo PtrInfo, EVT MemVT, 4009 bool isVolatile, bool isNonTemporal, 4010 unsigned Alignment, const MDNode *TBAAInfo) { 4011 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4012 Alignment = getEVTAlignment(VT); 4013 4014 unsigned Flags = MachineMemOperand::MOLoad; 4015 if (isVolatile) 4016 Flags |= MachineMemOperand::MOVolatile; 4017 if (isNonTemporal) 4018 Flags |= MachineMemOperand::MONonTemporal; 4019 4020 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4021 // clients. 4022 if (PtrInfo.V == 0) 4023 PtrInfo = InferPointerInfo(Ptr, Offset); 4024 4025 MachineFunction &MF = getMachineFunction(); 4026 MachineMemOperand *MMO = 4027 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4028 TBAAInfo); 4029 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4030} 4031 4032SDValue 4033SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4034 EVT VT, DebugLoc dl, SDValue Chain, 4035 SDValue Ptr, SDValue Offset, EVT MemVT, 4036 MachineMemOperand *MMO) { 4037 if (VT == MemVT) { 4038 ExtType = ISD::NON_EXTLOAD; 4039 } else if (ExtType == ISD::NON_EXTLOAD) { 4040 assert(VT == MemVT && "Non-extending load from different memory type!"); 4041 } else { 4042 // Extending load. 4043 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4044 "Should only be an extending load, not truncating!"); 4045 assert(VT.isInteger() == MemVT.isInteger() && 4046 "Cannot convert from FP to Int or Int -> FP!"); 4047 assert(VT.isVector() == MemVT.isVector() && 4048 "Cannot use trunc store to convert to or from a vector!"); 4049 assert((!VT.isVector() || 4050 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4051 "Cannot use trunc store to change the number of vector elements!"); 4052 } 4053 4054 bool Indexed = AM != ISD::UNINDEXED; 4055 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4056 "Unindexed load with an offset!"); 4057 4058 SDVTList VTs = Indexed ? 4059 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4060 SDValue Ops[] = { Chain, Ptr, Offset }; 4061 FoldingSetNodeID ID; 4062 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4063 ID.AddInteger(MemVT.getRawBits()); 4064 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4065 MMO->isNonTemporal())); 4066 void *IP = 0; 4067 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4068 cast<LoadSDNode>(E)->refineAlignment(MMO); 4069 return SDValue(E, 0); 4070 } 4071 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4072 MemVT, MMO); 4073 CSEMap.InsertNode(N, IP); 4074 AllNodes.push_back(N); 4075 return SDValue(N, 0); 4076} 4077 4078SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4079 SDValue Chain, SDValue Ptr, 4080 MachinePointerInfo PtrInfo, 4081 bool isVolatile, bool isNonTemporal, 4082 unsigned Alignment, const MDNode *TBAAInfo) { 4083 SDValue Undef = getUNDEF(Ptr.getValueType()); 4084 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4085 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 4086} 4087 4088SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl, 4089 SDValue Chain, SDValue Ptr, 4090 MachinePointerInfo PtrInfo, EVT MemVT, 4091 bool isVolatile, bool isNonTemporal, 4092 unsigned Alignment, const MDNode *TBAAInfo) { 4093 SDValue Undef = getUNDEF(Ptr.getValueType()); 4094 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4095 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment, 4096 TBAAInfo); 4097} 4098 4099 4100SDValue 4101SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4102 SDValue Offset, ISD::MemIndexedMode AM) { 4103 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4104 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4105 "Load is already a indexed load!"); 4106 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4107 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4108 LD->getMemoryVT(), 4109 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4110} 4111 4112SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4113 SDValue Ptr, MachinePointerInfo PtrInfo, 4114 bool isVolatile, bool isNonTemporal, 4115 unsigned Alignment, const MDNode *TBAAInfo) { 4116 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4117 Alignment = getEVTAlignment(Val.getValueType()); 4118 4119 unsigned Flags = MachineMemOperand::MOStore; 4120 if (isVolatile) 4121 Flags |= MachineMemOperand::MOVolatile; 4122 if (isNonTemporal) 4123 Flags |= MachineMemOperand::MONonTemporal; 4124 4125 if (PtrInfo.V == 0) 4126 PtrInfo = InferPointerInfo(Ptr); 4127 4128 MachineFunction &MF = getMachineFunction(); 4129 MachineMemOperand *MMO = 4130 MF.getMachineMemOperand(PtrInfo, Flags, 4131 Val.getValueType().getStoreSize(), Alignment, 4132 TBAAInfo); 4133 4134 return getStore(Chain, dl, Val, Ptr, MMO); 4135} 4136 4137SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4138 SDValue Ptr, MachineMemOperand *MMO) { 4139 EVT VT = Val.getValueType(); 4140 SDVTList VTs = getVTList(MVT::Other); 4141 SDValue Undef = getUNDEF(Ptr.getValueType()); 4142 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4143 FoldingSetNodeID ID; 4144 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4145 ID.AddInteger(VT.getRawBits()); 4146 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4147 MMO->isNonTemporal())); 4148 void *IP = 0; 4149 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4150 cast<StoreSDNode>(E)->refineAlignment(MMO); 4151 return SDValue(E, 0); 4152 } 4153 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4154 false, VT, MMO); 4155 CSEMap.InsertNode(N, IP); 4156 AllNodes.push_back(N); 4157 return SDValue(N, 0); 4158} 4159 4160SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4161 SDValue Ptr, MachinePointerInfo PtrInfo, 4162 EVT SVT,bool isVolatile, bool isNonTemporal, 4163 unsigned Alignment, 4164 const MDNode *TBAAInfo) { 4165 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4166 Alignment = getEVTAlignment(SVT); 4167 4168 unsigned Flags = MachineMemOperand::MOStore; 4169 if (isVolatile) 4170 Flags |= MachineMemOperand::MOVolatile; 4171 if (isNonTemporal) 4172 Flags |= MachineMemOperand::MONonTemporal; 4173 4174 if (PtrInfo.V == 0) 4175 PtrInfo = InferPointerInfo(Ptr); 4176 4177 MachineFunction &MF = getMachineFunction(); 4178 MachineMemOperand *MMO = 4179 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4180 TBAAInfo); 4181 4182 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4183} 4184 4185SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4186 SDValue Ptr, EVT SVT, 4187 MachineMemOperand *MMO) { 4188 EVT VT = Val.getValueType(); 4189 4190 if (VT == SVT) 4191 return getStore(Chain, dl, Val, Ptr, MMO); 4192 4193 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4194 "Should only be a truncating store, not extending!"); 4195 assert(VT.isInteger() == SVT.isInteger() && 4196 "Can't do FP-INT conversion!"); 4197 assert(VT.isVector() == SVT.isVector() && 4198 "Cannot use trunc store to convert to or from a vector!"); 4199 assert((!VT.isVector() || 4200 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4201 "Cannot use trunc store to change the number of vector elements!"); 4202 4203 SDVTList VTs = getVTList(MVT::Other); 4204 SDValue Undef = getUNDEF(Ptr.getValueType()); 4205 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4206 FoldingSetNodeID ID; 4207 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4208 ID.AddInteger(SVT.getRawBits()); 4209 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4210 MMO->isNonTemporal())); 4211 void *IP = 0; 4212 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4213 cast<StoreSDNode>(E)->refineAlignment(MMO); 4214 return SDValue(E, 0); 4215 } 4216 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4217 true, SVT, MMO); 4218 CSEMap.InsertNode(N, IP); 4219 AllNodes.push_back(N); 4220 return SDValue(N, 0); 4221} 4222 4223SDValue 4224SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4225 SDValue Offset, ISD::MemIndexedMode AM) { 4226 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4227 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4228 "Store is already a indexed store!"); 4229 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4230 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4231 FoldingSetNodeID ID; 4232 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4233 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4234 ID.AddInteger(ST->getRawSubclassData()); 4235 void *IP = 0; 4236 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4237 return SDValue(E, 0); 4238 4239 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4240 ST->isTruncatingStore(), 4241 ST->getMemoryVT(), 4242 ST->getMemOperand()); 4243 CSEMap.InsertNode(N, IP); 4244 AllNodes.push_back(N); 4245 return SDValue(N, 0); 4246} 4247 4248SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4249 SDValue Chain, SDValue Ptr, 4250 SDValue SV, 4251 unsigned Align) { 4252 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4253 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4254} 4255 4256SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4257 const SDUse *Ops, unsigned NumOps) { 4258 switch (NumOps) { 4259 case 0: return getNode(Opcode, DL, VT); 4260 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4261 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4262 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4263 default: break; 4264 } 4265 4266 // Copy from an SDUse array into an SDValue array for use with 4267 // the regular getNode logic. 4268 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4269 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4270} 4271 4272SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4273 const SDValue *Ops, unsigned NumOps) { 4274 switch (NumOps) { 4275 case 0: return getNode(Opcode, DL, VT); 4276 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4277 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4278 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4279 default: break; 4280 } 4281 4282 switch (Opcode) { 4283 default: break; 4284 case ISD::SELECT_CC: { 4285 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4286 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4287 "LHS and RHS of condition must have same type!"); 4288 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4289 "True and False arms of SelectCC must have same type!"); 4290 assert(Ops[2].getValueType() == VT && 4291 "select_cc node must be of same type as true and false value!"); 4292 break; 4293 } 4294 case ISD::BR_CC: { 4295 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4296 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4297 "LHS/RHS of comparison should match types!"); 4298 break; 4299 } 4300 } 4301 4302 // Memoize nodes. 4303 SDNode *N; 4304 SDVTList VTs = getVTList(VT); 4305 4306 if (VT != MVT::Glue) { 4307 FoldingSetNodeID ID; 4308 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4309 void *IP = 0; 4310 4311 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4312 return SDValue(E, 0); 4313 4314 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4315 CSEMap.InsertNode(N, IP); 4316 } else { 4317 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4318 } 4319 4320 AllNodes.push_back(N); 4321#ifndef NDEBUG 4322 VerifySDNode(N); 4323#endif 4324 return SDValue(N, 0); 4325} 4326 4327SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4328 const std::vector<EVT> &ResultTys, 4329 const SDValue *Ops, unsigned NumOps) { 4330 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4331 Ops, NumOps); 4332} 4333 4334SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4335 const EVT *VTs, unsigned NumVTs, 4336 const SDValue *Ops, unsigned NumOps) { 4337 if (NumVTs == 1) 4338 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4339 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4340} 4341 4342SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4343 const SDValue *Ops, unsigned NumOps) { 4344 if (VTList.NumVTs == 1) 4345 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4346 4347#if 0 4348 switch (Opcode) { 4349 // FIXME: figure out how to safely handle things like 4350 // int foo(int x) { return 1 << (x & 255); } 4351 // int bar() { return foo(256); } 4352 case ISD::SRA_PARTS: 4353 case ISD::SRL_PARTS: 4354 case ISD::SHL_PARTS: 4355 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4356 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4357 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4358 else if (N3.getOpcode() == ISD::AND) 4359 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4360 // If the and is only masking out bits that cannot effect the shift, 4361 // eliminate the and. 4362 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4363 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4364 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4365 } 4366 break; 4367 } 4368#endif 4369 4370 // Memoize the node unless it returns a flag. 4371 SDNode *N; 4372 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4373 FoldingSetNodeID ID; 4374 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4375 void *IP = 0; 4376 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4377 return SDValue(E, 0); 4378 4379 if (NumOps == 1) { 4380 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4381 } else if (NumOps == 2) { 4382 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4383 } else if (NumOps == 3) { 4384 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4385 Ops[2]); 4386 } else { 4387 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4388 } 4389 CSEMap.InsertNode(N, IP); 4390 } else { 4391 if (NumOps == 1) { 4392 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4393 } else if (NumOps == 2) { 4394 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4395 } else if (NumOps == 3) { 4396 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4397 Ops[2]); 4398 } else { 4399 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4400 } 4401 } 4402 AllNodes.push_back(N); 4403#ifndef NDEBUG 4404 VerifySDNode(N); 4405#endif 4406 return SDValue(N, 0); 4407} 4408 4409SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4410 return getNode(Opcode, DL, VTList, 0, 0); 4411} 4412 4413SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4414 SDValue N1) { 4415 SDValue Ops[] = { N1 }; 4416 return getNode(Opcode, DL, VTList, Ops, 1); 4417} 4418 4419SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4420 SDValue N1, SDValue N2) { 4421 SDValue Ops[] = { N1, N2 }; 4422 return getNode(Opcode, DL, VTList, Ops, 2); 4423} 4424 4425SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4426 SDValue N1, SDValue N2, SDValue N3) { 4427 SDValue Ops[] = { N1, N2, N3 }; 4428 return getNode(Opcode, DL, VTList, Ops, 3); 4429} 4430 4431SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4432 SDValue N1, SDValue N2, SDValue N3, 4433 SDValue N4) { 4434 SDValue Ops[] = { N1, N2, N3, N4 }; 4435 return getNode(Opcode, DL, VTList, Ops, 4); 4436} 4437 4438SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4439 SDValue N1, SDValue N2, SDValue N3, 4440 SDValue N4, SDValue N5) { 4441 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4442 return getNode(Opcode, DL, VTList, Ops, 5); 4443} 4444 4445SDVTList SelectionDAG::getVTList(EVT VT) { 4446 return makeVTList(SDNode::getValueTypeList(VT), 1); 4447} 4448 4449SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4450 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4451 E = VTList.rend(); I != E; ++I) 4452 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4453 return *I; 4454 4455 EVT *Array = Allocator.Allocate<EVT>(2); 4456 Array[0] = VT1; 4457 Array[1] = VT2; 4458 SDVTList Result = makeVTList(Array, 2); 4459 VTList.push_back(Result); 4460 return Result; 4461} 4462 4463SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4464 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4465 E = VTList.rend(); I != E; ++I) 4466 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4467 I->VTs[2] == VT3) 4468 return *I; 4469 4470 EVT *Array = Allocator.Allocate<EVT>(3); 4471 Array[0] = VT1; 4472 Array[1] = VT2; 4473 Array[2] = VT3; 4474 SDVTList Result = makeVTList(Array, 3); 4475 VTList.push_back(Result); 4476 return Result; 4477} 4478 4479SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4480 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4481 E = VTList.rend(); I != E; ++I) 4482 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4483 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4484 return *I; 4485 4486 EVT *Array = Allocator.Allocate<EVT>(4); 4487 Array[0] = VT1; 4488 Array[1] = VT2; 4489 Array[2] = VT3; 4490 Array[3] = VT4; 4491 SDVTList Result = makeVTList(Array, 4); 4492 VTList.push_back(Result); 4493 return Result; 4494} 4495 4496SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4497 switch (NumVTs) { 4498 case 0: llvm_unreachable("Cannot have nodes without results!"); 4499 case 1: return getVTList(VTs[0]); 4500 case 2: return getVTList(VTs[0], VTs[1]); 4501 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4502 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4503 default: break; 4504 } 4505 4506 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4507 E = VTList.rend(); I != E; ++I) { 4508 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4509 continue; 4510 4511 bool NoMatch = false; 4512 for (unsigned i = 2; i != NumVTs; ++i) 4513 if (VTs[i] != I->VTs[i]) { 4514 NoMatch = true; 4515 break; 4516 } 4517 if (!NoMatch) 4518 return *I; 4519 } 4520 4521 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4522 std::copy(VTs, VTs+NumVTs, Array); 4523 SDVTList Result = makeVTList(Array, NumVTs); 4524 VTList.push_back(Result); 4525 return Result; 4526} 4527 4528 4529/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4530/// specified operands. If the resultant node already exists in the DAG, 4531/// this does not modify the specified node, instead it returns the node that 4532/// already exists. If the resultant node does not exist in the DAG, the 4533/// input node is returned. As a degenerate case, if you specify the same 4534/// input operands as the node already has, the input node is returned. 4535SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4536 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4537 4538 // Check to see if there is no change. 4539 if (Op == N->getOperand(0)) return N; 4540 4541 // See if the modified node already exists. 4542 void *InsertPos = 0; 4543 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4544 return Existing; 4545 4546 // Nope it doesn't. Remove the node from its current place in the maps. 4547 if (InsertPos) 4548 if (!RemoveNodeFromCSEMaps(N)) 4549 InsertPos = 0; 4550 4551 // Now we update the operands. 4552 N->OperandList[0].set(Op); 4553 4554 // If this gets put into a CSE map, add it. 4555 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4556 return N; 4557} 4558 4559SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4560 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4561 4562 // Check to see if there is no change. 4563 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4564 return N; // No operands changed, just return the input node. 4565 4566 // See if the modified node already exists. 4567 void *InsertPos = 0; 4568 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4569 return Existing; 4570 4571 // Nope it doesn't. Remove the node from its current place in the maps. 4572 if (InsertPos) 4573 if (!RemoveNodeFromCSEMaps(N)) 4574 InsertPos = 0; 4575 4576 // Now we update the operands. 4577 if (N->OperandList[0] != Op1) 4578 N->OperandList[0].set(Op1); 4579 if (N->OperandList[1] != Op2) 4580 N->OperandList[1].set(Op2); 4581 4582 // If this gets put into a CSE map, add it. 4583 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4584 return N; 4585} 4586 4587SDNode *SelectionDAG:: 4588UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4589 SDValue Ops[] = { Op1, Op2, Op3 }; 4590 return UpdateNodeOperands(N, Ops, 3); 4591} 4592 4593SDNode *SelectionDAG:: 4594UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4595 SDValue Op3, SDValue Op4) { 4596 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4597 return UpdateNodeOperands(N, Ops, 4); 4598} 4599 4600SDNode *SelectionDAG:: 4601UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4602 SDValue Op3, SDValue Op4, SDValue Op5) { 4603 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4604 return UpdateNodeOperands(N, Ops, 5); 4605} 4606 4607SDNode *SelectionDAG:: 4608UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4609 assert(N->getNumOperands() == NumOps && 4610 "Update with wrong number of operands"); 4611 4612 // Check to see if there is no change. 4613 bool AnyChange = false; 4614 for (unsigned i = 0; i != NumOps; ++i) { 4615 if (Ops[i] != N->getOperand(i)) { 4616 AnyChange = true; 4617 break; 4618 } 4619 } 4620 4621 // No operands changed, just return the input node. 4622 if (!AnyChange) return N; 4623 4624 // See if the modified node already exists. 4625 void *InsertPos = 0; 4626 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4627 return Existing; 4628 4629 // Nope it doesn't. Remove the node from its current place in the maps. 4630 if (InsertPos) 4631 if (!RemoveNodeFromCSEMaps(N)) 4632 InsertPos = 0; 4633 4634 // Now we update the operands. 4635 for (unsigned i = 0; i != NumOps; ++i) 4636 if (N->OperandList[i] != Ops[i]) 4637 N->OperandList[i].set(Ops[i]); 4638 4639 // If this gets put into a CSE map, add it. 4640 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4641 return N; 4642} 4643 4644/// DropOperands - Release the operands and set this node to have 4645/// zero operands. 4646void SDNode::DropOperands() { 4647 // Unlike the code in MorphNodeTo that does this, we don't need to 4648 // watch for dead nodes here. 4649 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4650 SDUse &Use = *I++; 4651 Use.set(SDValue()); 4652 } 4653} 4654 4655/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4656/// machine opcode. 4657/// 4658SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4659 EVT VT) { 4660 SDVTList VTs = getVTList(VT); 4661 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4662} 4663 4664SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4665 EVT VT, SDValue Op1) { 4666 SDVTList VTs = getVTList(VT); 4667 SDValue Ops[] = { Op1 }; 4668 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4669} 4670 4671SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4672 EVT VT, SDValue Op1, 4673 SDValue Op2) { 4674 SDVTList VTs = getVTList(VT); 4675 SDValue Ops[] = { Op1, Op2 }; 4676 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4677} 4678 4679SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4680 EVT VT, SDValue Op1, 4681 SDValue Op2, SDValue Op3) { 4682 SDVTList VTs = getVTList(VT); 4683 SDValue Ops[] = { Op1, Op2, Op3 }; 4684 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4685} 4686 4687SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4688 EVT VT, const SDValue *Ops, 4689 unsigned NumOps) { 4690 SDVTList VTs = getVTList(VT); 4691 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4692} 4693 4694SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4695 EVT VT1, EVT VT2, const SDValue *Ops, 4696 unsigned NumOps) { 4697 SDVTList VTs = getVTList(VT1, VT2); 4698 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4699} 4700 4701SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4702 EVT VT1, EVT VT2) { 4703 SDVTList VTs = getVTList(VT1, VT2); 4704 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4705} 4706 4707SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4708 EVT VT1, EVT VT2, EVT VT3, 4709 const SDValue *Ops, unsigned NumOps) { 4710 SDVTList VTs = getVTList(VT1, VT2, VT3); 4711 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4712} 4713 4714SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4715 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4716 const SDValue *Ops, unsigned NumOps) { 4717 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4718 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4719} 4720 4721SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4722 EVT VT1, EVT VT2, 4723 SDValue Op1) { 4724 SDVTList VTs = getVTList(VT1, VT2); 4725 SDValue Ops[] = { Op1 }; 4726 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4727} 4728 4729SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4730 EVT VT1, EVT VT2, 4731 SDValue Op1, SDValue Op2) { 4732 SDVTList VTs = getVTList(VT1, VT2); 4733 SDValue Ops[] = { Op1, Op2 }; 4734 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4735} 4736 4737SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4738 EVT VT1, EVT VT2, 4739 SDValue Op1, SDValue Op2, 4740 SDValue Op3) { 4741 SDVTList VTs = getVTList(VT1, VT2); 4742 SDValue Ops[] = { Op1, Op2, Op3 }; 4743 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4744} 4745 4746SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4747 EVT VT1, EVT VT2, EVT VT3, 4748 SDValue Op1, SDValue Op2, 4749 SDValue Op3) { 4750 SDVTList VTs = getVTList(VT1, VT2, VT3); 4751 SDValue Ops[] = { Op1, Op2, Op3 }; 4752 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4753} 4754 4755SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4756 SDVTList VTs, const SDValue *Ops, 4757 unsigned NumOps) { 4758 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4759 // Reset the NodeID to -1. 4760 N->setNodeId(-1); 4761 return N; 4762} 4763 4764/// MorphNodeTo - This *mutates* the specified node to have the specified 4765/// return type, opcode, and operands. 4766/// 4767/// Note that MorphNodeTo returns the resultant node. If there is already a 4768/// node of the specified opcode and operands, it returns that node instead of 4769/// the current one. Note that the DebugLoc need not be the same. 4770/// 4771/// Using MorphNodeTo is faster than creating a new node and swapping it in 4772/// with ReplaceAllUsesWith both because it often avoids allocating a new 4773/// node, and because it doesn't require CSE recalculation for any of 4774/// the node's users. 4775/// 4776SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4777 SDVTList VTs, const SDValue *Ops, 4778 unsigned NumOps) { 4779 // If an identical node already exists, use it. 4780 void *IP = 0; 4781 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4782 FoldingSetNodeID ID; 4783 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4784 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4785 return ON; 4786 } 4787 4788 if (!RemoveNodeFromCSEMaps(N)) 4789 IP = 0; 4790 4791 // Start the morphing. 4792 N->NodeType = Opc; 4793 N->ValueList = VTs.VTs; 4794 N->NumValues = VTs.NumVTs; 4795 4796 // Clear the operands list, updating used nodes to remove this from their 4797 // use list. Keep track of any operands that become dead as a result. 4798 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4799 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4800 SDUse &Use = *I++; 4801 SDNode *Used = Use.getNode(); 4802 Use.set(SDValue()); 4803 if (Used->use_empty()) 4804 DeadNodeSet.insert(Used); 4805 } 4806 4807 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4808 // Initialize the memory references information. 4809 MN->setMemRefs(0, 0); 4810 // If NumOps is larger than the # of operands we can have in a 4811 // MachineSDNode, reallocate the operand list. 4812 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4813 if (MN->OperandsNeedDelete) 4814 delete[] MN->OperandList; 4815 if (NumOps > array_lengthof(MN->LocalOperands)) 4816 // We're creating a final node that will live unmorphed for the 4817 // remainder of the current SelectionDAG iteration, so we can allocate 4818 // the operands directly out of a pool with no recycling metadata. 4819 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4820 Ops, NumOps); 4821 else 4822 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4823 MN->OperandsNeedDelete = false; 4824 } else 4825 MN->InitOperands(MN->OperandList, Ops, NumOps); 4826 } else { 4827 // If NumOps is larger than the # of operands we currently have, reallocate 4828 // the operand list. 4829 if (NumOps > N->NumOperands) { 4830 if (N->OperandsNeedDelete) 4831 delete[] N->OperandList; 4832 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4833 N->OperandsNeedDelete = true; 4834 } else 4835 N->InitOperands(N->OperandList, Ops, NumOps); 4836 } 4837 4838 // Delete any nodes that are still dead after adding the uses for the 4839 // new operands. 4840 if (!DeadNodeSet.empty()) { 4841 SmallVector<SDNode *, 16> DeadNodes; 4842 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4843 E = DeadNodeSet.end(); I != E; ++I) 4844 if ((*I)->use_empty()) 4845 DeadNodes.push_back(*I); 4846 RemoveDeadNodes(DeadNodes); 4847 } 4848 4849 if (IP) 4850 CSEMap.InsertNode(N, IP); // Memoize the new node. 4851 return N; 4852} 4853 4854 4855/// getMachineNode - These are used for target selectors to create a new node 4856/// with specified return type(s), MachineInstr opcode, and operands. 4857/// 4858/// Note that getMachineNode returns the resultant node. If there is already a 4859/// node of the specified opcode and operands, it returns that node instead of 4860/// the current one. 4861MachineSDNode * 4862SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4863 SDVTList VTs = getVTList(VT); 4864 return getMachineNode(Opcode, dl, VTs, 0, 0); 4865} 4866 4867MachineSDNode * 4868SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4869 SDVTList VTs = getVTList(VT); 4870 SDValue Ops[] = { Op1 }; 4871 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4872} 4873 4874MachineSDNode * 4875SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4876 SDValue Op1, SDValue Op2) { 4877 SDVTList VTs = getVTList(VT); 4878 SDValue Ops[] = { Op1, Op2 }; 4879 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4880} 4881 4882MachineSDNode * 4883SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4884 SDValue Op1, SDValue Op2, SDValue Op3) { 4885 SDVTList VTs = getVTList(VT); 4886 SDValue Ops[] = { Op1, Op2, Op3 }; 4887 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4888} 4889 4890MachineSDNode * 4891SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4892 const SDValue *Ops, unsigned NumOps) { 4893 SDVTList VTs = getVTList(VT); 4894 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4895} 4896 4897MachineSDNode * 4898SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4899 SDVTList VTs = getVTList(VT1, VT2); 4900 return getMachineNode(Opcode, dl, VTs, 0, 0); 4901} 4902 4903MachineSDNode * 4904SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4905 EVT VT1, EVT VT2, SDValue Op1) { 4906 SDVTList VTs = getVTList(VT1, VT2); 4907 SDValue Ops[] = { Op1 }; 4908 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4909} 4910 4911MachineSDNode * 4912SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4913 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4914 SDVTList VTs = getVTList(VT1, VT2); 4915 SDValue Ops[] = { Op1, Op2 }; 4916 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4917} 4918 4919MachineSDNode * 4920SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4921 EVT VT1, EVT VT2, SDValue Op1, 4922 SDValue Op2, SDValue Op3) { 4923 SDVTList VTs = getVTList(VT1, VT2); 4924 SDValue Ops[] = { Op1, Op2, Op3 }; 4925 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4926} 4927 4928MachineSDNode * 4929SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4930 EVT VT1, EVT VT2, 4931 const SDValue *Ops, unsigned NumOps) { 4932 SDVTList VTs = getVTList(VT1, VT2); 4933 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4934} 4935 4936MachineSDNode * 4937SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4938 EVT VT1, EVT VT2, EVT VT3, 4939 SDValue Op1, SDValue Op2) { 4940 SDVTList VTs = getVTList(VT1, VT2, VT3); 4941 SDValue Ops[] = { Op1, Op2 }; 4942 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4943} 4944 4945MachineSDNode * 4946SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4947 EVT VT1, EVT VT2, EVT VT3, 4948 SDValue Op1, SDValue Op2, SDValue Op3) { 4949 SDVTList VTs = getVTList(VT1, VT2, VT3); 4950 SDValue Ops[] = { Op1, Op2, Op3 }; 4951 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4952} 4953 4954MachineSDNode * 4955SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4956 EVT VT1, EVT VT2, EVT VT3, 4957 const SDValue *Ops, unsigned NumOps) { 4958 SDVTList VTs = getVTList(VT1, VT2, VT3); 4959 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4960} 4961 4962MachineSDNode * 4963SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4964 EVT VT2, EVT VT3, EVT VT4, 4965 const SDValue *Ops, unsigned NumOps) { 4966 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4967 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4968} 4969 4970MachineSDNode * 4971SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4972 const std::vector<EVT> &ResultTys, 4973 const SDValue *Ops, unsigned NumOps) { 4974 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 4975 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4976} 4977 4978MachineSDNode * 4979SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 4980 const SDValue *Ops, unsigned NumOps) { 4981 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 4982 MachineSDNode *N; 4983 void *IP = 0; 4984 4985 if (DoCSE) { 4986 FoldingSetNodeID ID; 4987 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 4988 IP = 0; 4989 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4990 return cast<MachineSDNode>(E); 4991 } 4992 4993 // Allocate a new MachineSDNode. 4994 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 4995 4996 // Initialize the operands list. 4997 if (NumOps > array_lengthof(N->LocalOperands)) 4998 // We're creating a final node that will live unmorphed for the 4999 // remainder of the current SelectionDAG iteration, so we can allocate 5000 // the operands directly out of a pool with no recycling metadata. 5001 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5002 Ops, NumOps); 5003 else 5004 N->InitOperands(N->LocalOperands, Ops, NumOps); 5005 N->OperandsNeedDelete = false; 5006 5007 if (DoCSE) 5008 CSEMap.InsertNode(N, IP); 5009 5010 AllNodes.push_back(N); 5011#ifndef NDEBUG 5012 VerifyMachineNode(N); 5013#endif 5014 return N; 5015} 5016 5017/// getTargetExtractSubreg - A convenience function for creating 5018/// TargetOpcode::EXTRACT_SUBREG nodes. 5019SDValue 5020SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5021 SDValue Operand) { 5022 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5023 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5024 VT, Operand, SRIdxVal); 5025 return SDValue(Subreg, 0); 5026} 5027 5028/// getTargetInsertSubreg - A convenience function for creating 5029/// TargetOpcode::INSERT_SUBREG nodes. 5030SDValue 5031SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5032 SDValue Operand, SDValue Subreg) { 5033 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5034 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5035 VT, Operand, Subreg, SRIdxVal); 5036 return SDValue(Result, 0); 5037} 5038 5039/// getNodeIfExists - Get the specified node if it's already available, or 5040/// else return NULL. 5041SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5042 const SDValue *Ops, unsigned NumOps) { 5043 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5044 FoldingSetNodeID ID; 5045 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5046 void *IP = 0; 5047 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5048 return E; 5049 } 5050 return NULL; 5051} 5052 5053/// getDbgValue - Creates a SDDbgValue node. 5054/// 5055SDDbgValue * 5056SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5057 DebugLoc DL, unsigned O) { 5058 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5059} 5060 5061SDDbgValue * 5062SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5063 DebugLoc DL, unsigned O) { 5064 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5065} 5066 5067SDDbgValue * 5068SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5069 DebugLoc DL, unsigned O) { 5070 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5071} 5072 5073namespace { 5074 5075/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5076/// pointed to by a use iterator is deleted, increment the use iterator 5077/// so that it doesn't dangle. 5078/// 5079/// This class also manages a "downlink" DAGUpdateListener, to forward 5080/// messages to ReplaceAllUsesWith's callers. 5081/// 5082class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5083 SelectionDAG::DAGUpdateListener *DownLink; 5084 SDNode::use_iterator &UI; 5085 SDNode::use_iterator &UE; 5086 5087 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5088 // Increment the iterator as needed. 5089 while (UI != UE && N == *UI) 5090 ++UI; 5091 5092 // Then forward the message. 5093 if (DownLink) DownLink->NodeDeleted(N, E); 5094 } 5095 5096 virtual void NodeUpdated(SDNode *N) { 5097 // Just forward the message. 5098 if (DownLink) DownLink->NodeUpdated(N); 5099 } 5100 5101public: 5102 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5103 SDNode::use_iterator &ui, 5104 SDNode::use_iterator &ue) 5105 : DownLink(dl), UI(ui), UE(ue) {} 5106}; 5107 5108} 5109 5110/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5111/// This can cause recursive merging of nodes in the DAG. 5112/// 5113/// This version assumes From has a single result value. 5114/// 5115void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5116 DAGUpdateListener *UpdateListener) { 5117 SDNode *From = FromN.getNode(); 5118 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5119 "Cannot replace with this method!"); 5120 assert(From != To.getNode() && "Cannot replace uses of with self"); 5121 5122 // Iterate over all the existing uses of From. New uses will be added 5123 // to the beginning of the use list, which we avoid visiting. 5124 // This specifically avoids visiting uses of From that arise while the 5125 // replacement is happening, because any such uses would be the result 5126 // of CSE: If an existing node looks like From after one of its operands 5127 // is replaced by To, we don't want to replace of all its users with To 5128 // too. See PR3018 for more info. 5129 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5130 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5131 while (UI != UE) { 5132 SDNode *User = *UI; 5133 5134 // This node is about to morph, remove its old self from the CSE maps. 5135 RemoveNodeFromCSEMaps(User); 5136 5137 // A user can appear in a use list multiple times, and when this 5138 // happens the uses are usually next to each other in the list. 5139 // To help reduce the number of CSE recomputations, process all 5140 // the uses of this user that we can find this way. 5141 do { 5142 SDUse &Use = UI.getUse(); 5143 ++UI; 5144 Use.set(To); 5145 } while (UI != UE && *UI == User); 5146 5147 // Now that we have modified User, add it back to the CSE maps. If it 5148 // already exists there, recursively merge the results together. 5149 AddModifiedNodeToCSEMaps(User, &Listener); 5150 } 5151} 5152 5153/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5154/// This can cause recursive merging of nodes in the DAG. 5155/// 5156/// This version assumes that for each value of From, there is a 5157/// corresponding value in To in the same position with the same type. 5158/// 5159void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5160 DAGUpdateListener *UpdateListener) { 5161#ifndef NDEBUG 5162 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5163 assert((!From->hasAnyUseOfValue(i) || 5164 From->getValueType(i) == To->getValueType(i)) && 5165 "Cannot use this version of ReplaceAllUsesWith!"); 5166#endif 5167 5168 // Handle the trivial case. 5169 if (From == To) 5170 return; 5171 5172 // Iterate over just the existing users of From. See the comments in 5173 // the ReplaceAllUsesWith above. 5174 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5175 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5176 while (UI != UE) { 5177 SDNode *User = *UI; 5178 5179 // This node is about to morph, remove its old self from the CSE maps. 5180 RemoveNodeFromCSEMaps(User); 5181 5182 // A user can appear in a use list multiple times, and when this 5183 // happens the uses are usually next to each other in the list. 5184 // To help reduce the number of CSE recomputations, process all 5185 // the uses of this user that we can find this way. 5186 do { 5187 SDUse &Use = UI.getUse(); 5188 ++UI; 5189 Use.setNode(To); 5190 } while (UI != UE && *UI == User); 5191 5192 // Now that we have modified User, add it back to the CSE maps. If it 5193 // already exists there, recursively merge the results together. 5194 AddModifiedNodeToCSEMaps(User, &Listener); 5195 } 5196} 5197 5198/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5199/// This can cause recursive merging of nodes in the DAG. 5200/// 5201/// This version can replace From with any result values. To must match the 5202/// number and types of values returned by From. 5203void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5204 const SDValue *To, 5205 DAGUpdateListener *UpdateListener) { 5206 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5207 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5208 5209 // Iterate over just the existing users of From. See the comments in 5210 // the ReplaceAllUsesWith above. 5211 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5212 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5213 while (UI != UE) { 5214 SDNode *User = *UI; 5215 5216 // This node is about to morph, remove its old self from the CSE maps. 5217 RemoveNodeFromCSEMaps(User); 5218 5219 // A user can appear in a use list multiple times, and when this 5220 // happens the uses are usually next to each other in the list. 5221 // To help reduce the number of CSE recomputations, process all 5222 // the uses of this user that we can find this way. 5223 do { 5224 SDUse &Use = UI.getUse(); 5225 const SDValue &ToOp = To[Use.getResNo()]; 5226 ++UI; 5227 Use.set(ToOp); 5228 } while (UI != UE && *UI == User); 5229 5230 // Now that we have modified User, add it back to the CSE maps. If it 5231 // already exists there, recursively merge the results together. 5232 AddModifiedNodeToCSEMaps(User, &Listener); 5233 } 5234} 5235 5236/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5237/// uses of other values produced by From.getNode() alone. The Deleted 5238/// vector is handled the same way as for ReplaceAllUsesWith. 5239void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5240 DAGUpdateListener *UpdateListener){ 5241 // Handle the really simple, really trivial case efficiently. 5242 if (From == To) return; 5243 5244 // Handle the simple, trivial, case efficiently. 5245 if (From.getNode()->getNumValues() == 1) { 5246 ReplaceAllUsesWith(From, To, UpdateListener); 5247 return; 5248 } 5249 5250 // Iterate over just the existing users of From. See the comments in 5251 // the ReplaceAllUsesWith above. 5252 SDNode::use_iterator UI = From.getNode()->use_begin(), 5253 UE = From.getNode()->use_end(); 5254 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5255 while (UI != UE) { 5256 SDNode *User = *UI; 5257 bool UserRemovedFromCSEMaps = false; 5258 5259 // A user can appear in a use list multiple times, and when this 5260 // happens the uses are usually next to each other in the list. 5261 // To help reduce the number of CSE recomputations, process all 5262 // the uses of this user that we can find this way. 5263 do { 5264 SDUse &Use = UI.getUse(); 5265 5266 // Skip uses of different values from the same node. 5267 if (Use.getResNo() != From.getResNo()) { 5268 ++UI; 5269 continue; 5270 } 5271 5272 // If this node hasn't been modified yet, it's still in the CSE maps, 5273 // so remove its old self from the CSE maps. 5274 if (!UserRemovedFromCSEMaps) { 5275 RemoveNodeFromCSEMaps(User); 5276 UserRemovedFromCSEMaps = true; 5277 } 5278 5279 ++UI; 5280 Use.set(To); 5281 } while (UI != UE && *UI == User); 5282 5283 // We are iterating over all uses of the From node, so if a use 5284 // doesn't use the specific value, no changes are made. 5285 if (!UserRemovedFromCSEMaps) 5286 continue; 5287 5288 // Now that we have modified User, add it back to the CSE maps. If it 5289 // already exists there, recursively merge the results together. 5290 AddModifiedNodeToCSEMaps(User, &Listener); 5291 } 5292} 5293 5294namespace { 5295 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5296 /// to record information about a use. 5297 struct UseMemo { 5298 SDNode *User; 5299 unsigned Index; 5300 SDUse *Use; 5301 }; 5302 5303 /// operator< - Sort Memos by User. 5304 bool operator<(const UseMemo &L, const UseMemo &R) { 5305 return (intptr_t)L.User < (intptr_t)R.User; 5306 } 5307} 5308 5309/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5310/// uses of other values produced by From.getNode() alone. The same value 5311/// may appear in both the From and To list. The Deleted vector is 5312/// handled the same way as for ReplaceAllUsesWith. 5313void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5314 const SDValue *To, 5315 unsigned Num, 5316 DAGUpdateListener *UpdateListener){ 5317 // Handle the simple, trivial case efficiently. 5318 if (Num == 1) 5319 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5320 5321 // Read up all the uses and make records of them. This helps 5322 // processing new uses that are introduced during the 5323 // replacement process. 5324 SmallVector<UseMemo, 4> Uses; 5325 for (unsigned i = 0; i != Num; ++i) { 5326 unsigned FromResNo = From[i].getResNo(); 5327 SDNode *FromNode = From[i].getNode(); 5328 for (SDNode::use_iterator UI = FromNode->use_begin(), 5329 E = FromNode->use_end(); UI != E; ++UI) { 5330 SDUse &Use = UI.getUse(); 5331 if (Use.getResNo() == FromResNo) { 5332 UseMemo Memo = { *UI, i, &Use }; 5333 Uses.push_back(Memo); 5334 } 5335 } 5336 } 5337 5338 // Sort the uses, so that all the uses from a given User are together. 5339 std::sort(Uses.begin(), Uses.end()); 5340 5341 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5342 UseIndex != UseIndexEnd; ) { 5343 // We know that this user uses some value of From. If it is the right 5344 // value, update it. 5345 SDNode *User = Uses[UseIndex].User; 5346 5347 // This node is about to morph, remove its old self from the CSE maps. 5348 RemoveNodeFromCSEMaps(User); 5349 5350 // The Uses array is sorted, so all the uses for a given User 5351 // are next to each other in the list. 5352 // To help reduce the number of CSE recomputations, process all 5353 // the uses of this user that we can find this way. 5354 do { 5355 unsigned i = Uses[UseIndex].Index; 5356 SDUse &Use = *Uses[UseIndex].Use; 5357 ++UseIndex; 5358 5359 Use.set(To[i]); 5360 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5361 5362 // Now that we have modified User, add it back to the CSE maps. If it 5363 // already exists there, recursively merge the results together. 5364 AddModifiedNodeToCSEMaps(User, UpdateListener); 5365 } 5366} 5367 5368/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5369/// based on their topological order. It returns the maximum id and a vector 5370/// of the SDNodes* in assigned order by reference. 5371unsigned SelectionDAG::AssignTopologicalOrder() { 5372 5373 unsigned DAGSize = 0; 5374 5375 // SortedPos tracks the progress of the algorithm. Nodes before it are 5376 // sorted, nodes after it are unsorted. When the algorithm completes 5377 // it is at the end of the list. 5378 allnodes_iterator SortedPos = allnodes_begin(); 5379 5380 // Visit all the nodes. Move nodes with no operands to the front of 5381 // the list immediately. Annotate nodes that do have operands with their 5382 // operand count. Before we do this, the Node Id fields of the nodes 5383 // may contain arbitrary values. After, the Node Id fields for nodes 5384 // before SortedPos will contain the topological sort index, and the 5385 // Node Id fields for nodes At SortedPos and after will contain the 5386 // count of outstanding operands. 5387 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5388 SDNode *N = I++; 5389 checkForCycles(N); 5390 unsigned Degree = N->getNumOperands(); 5391 if (Degree == 0) { 5392 // A node with no uses, add it to the result array immediately. 5393 N->setNodeId(DAGSize++); 5394 allnodes_iterator Q = N; 5395 if (Q != SortedPos) 5396 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5397 assert(SortedPos != AllNodes.end() && "Overran node list"); 5398 ++SortedPos; 5399 } else { 5400 // Temporarily use the Node Id as scratch space for the degree count. 5401 N->setNodeId(Degree); 5402 } 5403 } 5404 5405 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5406 // such that by the time the end is reached all nodes will be sorted. 5407 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5408 SDNode *N = I; 5409 checkForCycles(N); 5410 // N is in sorted position, so all its uses have one less operand 5411 // that needs to be sorted. 5412 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5413 UI != UE; ++UI) { 5414 SDNode *P = *UI; 5415 unsigned Degree = P->getNodeId(); 5416 assert(Degree != 0 && "Invalid node degree"); 5417 --Degree; 5418 if (Degree == 0) { 5419 // All of P's operands are sorted, so P may sorted now. 5420 P->setNodeId(DAGSize++); 5421 if (P != SortedPos) 5422 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5423 assert(SortedPos != AllNodes.end() && "Overran node list"); 5424 ++SortedPos; 5425 } else { 5426 // Update P's outstanding operand count. 5427 P->setNodeId(Degree); 5428 } 5429 } 5430 if (I == SortedPos) { 5431#ifndef NDEBUG 5432 SDNode *S = ++I; 5433 dbgs() << "Overran sorted position:\n"; 5434 S->dumprFull(); 5435#endif 5436 llvm_unreachable(0); 5437 } 5438 } 5439 5440 assert(SortedPos == AllNodes.end() && 5441 "Topological sort incomplete!"); 5442 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5443 "First node in topological sort is not the entry token!"); 5444 assert(AllNodes.front().getNodeId() == 0 && 5445 "First node in topological sort has non-zero id!"); 5446 assert(AllNodes.front().getNumOperands() == 0 && 5447 "First node in topological sort has operands!"); 5448 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5449 "Last node in topologic sort has unexpected id!"); 5450 assert(AllNodes.back().use_empty() && 5451 "Last node in topologic sort has users!"); 5452 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5453 return DAGSize; 5454} 5455 5456/// AssignOrdering - Assign an order to the SDNode. 5457void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5458 assert(SD && "Trying to assign an order to a null node!"); 5459 Ordering->add(SD, Order); 5460} 5461 5462/// GetOrdering - Get the order for the SDNode. 5463unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5464 assert(SD && "Trying to get the order of a null node!"); 5465 return Ordering->getOrder(SD); 5466} 5467 5468/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5469/// value is produced by SD. 5470void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5471 DbgInfo->add(DB, SD, isParameter); 5472 if (SD) 5473 SD->setHasDebugValue(true); 5474} 5475 5476/// TransferDbgValues - Transfer SDDbgValues. 5477void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5478 if (From == To || !From.getNode()->getHasDebugValue()) 5479 return; 5480 SDNode *FromNode = From.getNode(); 5481 SDNode *ToNode = To.getNode(); 5482 SmallVector<SDDbgValue*,2> &DVs = GetDbgValues(FromNode); 5483 DbgInfo->removeSDDbgValues(FromNode); 5484 for (SmallVector<SDDbgValue *, 2>::iterator I = DVs.begin(), E = DVs.end(); 5485 I != E; ++I) { 5486 if ((*I)->getKind() == SDDbgValue::SDNODE) { 5487 AddDbgValue(*I, ToNode, false); 5488 (*I)->setSDNode(ToNode, To.getResNo()); 5489 } 5490 } 5491} 5492 5493//===----------------------------------------------------------------------===// 5494// SDNode Class 5495//===----------------------------------------------------------------------===// 5496 5497HandleSDNode::~HandleSDNode() { 5498 DropOperands(); 5499} 5500 5501GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5502 const GlobalValue *GA, 5503 EVT VT, int64_t o, unsigned char TF) 5504 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5505 TheGlobal = GA; 5506} 5507 5508MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5509 MachineMemOperand *mmo) 5510 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5511 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5512 MMO->isNonTemporal()); 5513 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5514 assert(isNonTemporal() == MMO->isNonTemporal() && 5515 "Non-temporal encoding error!"); 5516 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5517} 5518 5519MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5520 const SDValue *Ops, unsigned NumOps, EVT memvt, 5521 MachineMemOperand *mmo) 5522 : SDNode(Opc, dl, VTs, Ops, NumOps), 5523 MemoryVT(memvt), MMO(mmo) { 5524 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5525 MMO->isNonTemporal()); 5526 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5527 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5528} 5529 5530/// Profile - Gather unique data for the node. 5531/// 5532void SDNode::Profile(FoldingSetNodeID &ID) const { 5533 AddNodeIDNode(ID, this); 5534} 5535 5536namespace { 5537 struct EVTArray { 5538 std::vector<EVT> VTs; 5539 5540 EVTArray() { 5541 VTs.reserve(MVT::LAST_VALUETYPE); 5542 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5543 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5544 } 5545 }; 5546} 5547 5548static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5549static ManagedStatic<EVTArray> SimpleVTArray; 5550static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5551 5552/// getValueTypeList - Return a pointer to the specified value type. 5553/// 5554const EVT *SDNode::getValueTypeList(EVT VT) { 5555 if (VT.isExtended()) { 5556 sys::SmartScopedLock<true> Lock(*VTMutex); 5557 return &(*EVTs->insert(VT).first); 5558 } else { 5559 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5560 "Value type out of range!"); 5561 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5562 } 5563} 5564 5565/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5566/// indicated value. This method ignores uses of other values defined by this 5567/// operation. 5568bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5569 assert(Value < getNumValues() && "Bad value!"); 5570 5571 // TODO: Only iterate over uses of a given value of the node 5572 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5573 if (UI.getUse().getResNo() == Value) { 5574 if (NUses == 0) 5575 return false; 5576 --NUses; 5577 } 5578 } 5579 5580 // Found exactly the right number of uses? 5581 return NUses == 0; 5582} 5583 5584 5585/// hasAnyUseOfValue - Return true if there are any use of the indicated 5586/// value. This method ignores uses of other values defined by this operation. 5587bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5588 assert(Value < getNumValues() && "Bad value!"); 5589 5590 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5591 if (UI.getUse().getResNo() == Value) 5592 return true; 5593 5594 return false; 5595} 5596 5597 5598/// isOnlyUserOf - Return true if this node is the only use of N. 5599/// 5600bool SDNode::isOnlyUserOf(SDNode *N) const { 5601 bool Seen = false; 5602 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5603 SDNode *User = *I; 5604 if (User == this) 5605 Seen = true; 5606 else 5607 return false; 5608 } 5609 5610 return Seen; 5611} 5612 5613/// isOperand - Return true if this node is an operand of N. 5614/// 5615bool SDValue::isOperandOf(SDNode *N) const { 5616 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5617 if (*this == N->getOperand(i)) 5618 return true; 5619 return false; 5620} 5621 5622bool SDNode::isOperandOf(SDNode *N) const { 5623 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5624 if (this == N->OperandList[i].getNode()) 5625 return true; 5626 return false; 5627} 5628 5629/// reachesChainWithoutSideEffects - Return true if this operand (which must 5630/// be a chain) reaches the specified operand without crossing any 5631/// side-effecting instructions on any chain path. In practice, this looks 5632/// through token factors and non-volatile loads. In order to remain efficient, 5633/// this only looks a couple of nodes in, it does not do an exhaustive search. 5634bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5635 unsigned Depth) const { 5636 if (*this == Dest) return true; 5637 5638 // Don't search too deeply, we just want to be able to see through 5639 // TokenFactor's etc. 5640 if (Depth == 0) return false; 5641 5642 // If this is a token factor, all inputs to the TF happen in parallel. If any 5643 // of the operands of the TF does not reach dest, then we cannot do the xform. 5644 if (getOpcode() == ISD::TokenFactor) { 5645 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5646 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5647 return false; 5648 return true; 5649 } 5650 5651 // Loads don't have side effects, look through them. 5652 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5653 if (!Ld->isVolatile()) 5654 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5655 } 5656 return false; 5657} 5658 5659/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5660/// is either an operand of N or it can be reached by traversing up the operands. 5661/// NOTE: this is an expensive method. Use it carefully. 5662bool SDNode::isPredecessorOf(SDNode *N) const { 5663 SmallPtrSet<SDNode *, 32> Visited; 5664 SmallVector<SDNode *, 16> Worklist; 5665 Worklist.push_back(N); 5666 5667 do { 5668 N = Worklist.pop_back_val(); 5669 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5670 SDNode *Op = N->getOperand(i).getNode(); 5671 if (Op == this) 5672 return true; 5673 if (Visited.insert(Op)) 5674 Worklist.push_back(Op); 5675 } 5676 } while (!Worklist.empty()); 5677 5678 return false; 5679} 5680 5681uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5682 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5683 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5684} 5685 5686std::string SDNode::getOperationName(const SelectionDAG *G) const { 5687 switch (getOpcode()) { 5688 default: 5689 if (getOpcode() < ISD::BUILTIN_OP_END) 5690 return "<<Unknown DAG Node>>"; 5691 if (isMachineOpcode()) { 5692 if (G) 5693 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5694 if (getMachineOpcode() < TII->getNumOpcodes()) 5695 return TII->get(getMachineOpcode()).getName(); 5696 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5697 } 5698 if (G) { 5699 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5700 const char *Name = TLI.getTargetNodeName(getOpcode()); 5701 if (Name) return Name; 5702 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5703 } 5704 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5705 5706#ifndef NDEBUG 5707 case ISD::DELETED_NODE: 5708 return "<<Deleted Node!>>"; 5709#endif 5710 case ISD::PREFETCH: return "Prefetch"; 5711 case ISD::MEMBARRIER: return "MemBarrier"; 5712 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5713 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5714 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5715 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5716 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5717 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5718 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5719 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5720 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5721 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5722 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5723 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5724 case ISD::PCMARKER: return "PCMarker"; 5725 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5726 case ISD::SRCVALUE: return "SrcValue"; 5727 case ISD::MDNODE_SDNODE: return "MDNode"; 5728 case ISD::EntryToken: return "EntryToken"; 5729 case ISD::TokenFactor: return "TokenFactor"; 5730 case ISD::AssertSext: return "AssertSext"; 5731 case ISD::AssertZext: return "AssertZext"; 5732 5733 case ISD::BasicBlock: return "BasicBlock"; 5734 case ISD::VALUETYPE: return "ValueType"; 5735 case ISD::Register: return "Register"; 5736 5737 case ISD::Constant: return "Constant"; 5738 case ISD::ConstantFP: return "ConstantFP"; 5739 case ISD::GlobalAddress: return "GlobalAddress"; 5740 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5741 case ISD::FrameIndex: return "FrameIndex"; 5742 case ISD::JumpTable: return "JumpTable"; 5743 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5744 case ISD::RETURNADDR: return "RETURNADDR"; 5745 case ISD::FRAMEADDR: return "FRAMEADDR"; 5746 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5747 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5748 case ISD::LSDAADDR: return "LSDAADDR"; 5749 case ISD::EHSELECTION: return "EHSELECTION"; 5750 case ISD::EH_RETURN: return "EH_RETURN"; 5751 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5752 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5753 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP"; 5754 case ISD::ConstantPool: return "ConstantPool"; 5755 case ISD::ExternalSymbol: return "ExternalSymbol"; 5756 case ISD::BlockAddress: return "BlockAddress"; 5757 case ISD::INTRINSIC_WO_CHAIN: 5758 case ISD::INTRINSIC_VOID: 5759 case ISD::INTRINSIC_W_CHAIN: { 5760 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5761 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5762 if (IID < Intrinsic::num_intrinsics) 5763 return Intrinsic::getName((Intrinsic::ID)IID); 5764 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5765 return TII->getName(IID); 5766 llvm_unreachable("Invalid intrinsic ID"); 5767 } 5768 5769 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5770 case ISD::TargetConstant: return "TargetConstant"; 5771 case ISD::TargetConstantFP:return "TargetConstantFP"; 5772 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5773 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5774 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5775 case ISD::TargetJumpTable: return "TargetJumpTable"; 5776 case ISD::TargetConstantPool: return "TargetConstantPool"; 5777 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5778 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5779 5780 case ISD::CopyToReg: return "CopyToReg"; 5781 case ISD::CopyFromReg: return "CopyFromReg"; 5782 case ISD::UNDEF: return "undef"; 5783 case ISD::MERGE_VALUES: return "merge_values"; 5784 case ISD::INLINEASM: return "inlineasm"; 5785 case ISD::EH_LABEL: return "eh_label"; 5786 case ISD::HANDLENODE: return "handlenode"; 5787 5788 // Unary operators 5789 case ISD::FABS: return "fabs"; 5790 case ISD::FNEG: return "fneg"; 5791 case ISD::FSQRT: return "fsqrt"; 5792 case ISD::FSIN: return "fsin"; 5793 case ISD::FCOS: return "fcos"; 5794 case ISD::FTRUNC: return "ftrunc"; 5795 case ISD::FFLOOR: return "ffloor"; 5796 case ISD::FCEIL: return "fceil"; 5797 case ISD::FRINT: return "frint"; 5798 case ISD::FNEARBYINT: return "fnearbyint"; 5799 case ISD::FEXP: return "fexp"; 5800 case ISD::FEXP2: return "fexp2"; 5801 case ISD::FLOG: return "flog"; 5802 case ISD::FLOG2: return "flog2"; 5803 case ISD::FLOG10: return "flog10"; 5804 5805 // Binary operators 5806 case ISD::ADD: return "add"; 5807 case ISD::SUB: return "sub"; 5808 case ISD::MUL: return "mul"; 5809 case ISD::MULHU: return "mulhu"; 5810 case ISD::MULHS: return "mulhs"; 5811 case ISD::SDIV: return "sdiv"; 5812 case ISD::UDIV: return "udiv"; 5813 case ISD::SREM: return "srem"; 5814 case ISD::UREM: return "urem"; 5815 case ISD::SMUL_LOHI: return "smul_lohi"; 5816 case ISD::UMUL_LOHI: return "umul_lohi"; 5817 case ISD::SDIVREM: return "sdivrem"; 5818 case ISD::UDIVREM: return "udivrem"; 5819 case ISD::AND: return "and"; 5820 case ISD::OR: return "or"; 5821 case ISD::XOR: return "xor"; 5822 case ISD::SHL: return "shl"; 5823 case ISD::SRA: return "sra"; 5824 case ISD::SRL: return "srl"; 5825 case ISD::ROTL: return "rotl"; 5826 case ISD::ROTR: return "rotr"; 5827 case ISD::FADD: return "fadd"; 5828 case ISD::FSUB: return "fsub"; 5829 case ISD::FMUL: return "fmul"; 5830 case ISD::FDIV: return "fdiv"; 5831 case ISD::FREM: return "frem"; 5832 case ISD::FCOPYSIGN: return "fcopysign"; 5833 case ISD::FGETSIGN: return "fgetsign"; 5834 case ISD::FPOW: return "fpow"; 5835 5836 case ISD::FPOWI: return "fpowi"; 5837 case ISD::SETCC: return "setcc"; 5838 case ISD::VSETCC: return "vsetcc"; 5839 case ISD::SELECT: return "select"; 5840 case ISD::SELECT_CC: return "select_cc"; 5841 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5842 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5843 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5844 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 5845 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5846 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5847 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5848 case ISD::CARRY_FALSE: return "carry_false"; 5849 case ISD::ADDC: return "addc"; 5850 case ISD::ADDE: return "adde"; 5851 case ISD::SADDO: return "saddo"; 5852 case ISD::UADDO: return "uaddo"; 5853 case ISD::SSUBO: return "ssubo"; 5854 case ISD::USUBO: return "usubo"; 5855 case ISD::SMULO: return "smulo"; 5856 case ISD::UMULO: return "umulo"; 5857 case ISD::SUBC: return "subc"; 5858 case ISD::SUBE: return "sube"; 5859 case ISD::SHL_PARTS: return "shl_parts"; 5860 case ISD::SRA_PARTS: return "sra_parts"; 5861 case ISD::SRL_PARTS: return "srl_parts"; 5862 5863 // Conversion operators. 5864 case ISD::SIGN_EXTEND: return "sign_extend"; 5865 case ISD::ZERO_EXTEND: return "zero_extend"; 5866 case ISD::ANY_EXTEND: return "any_extend"; 5867 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5868 case ISD::TRUNCATE: return "truncate"; 5869 case ISD::FP_ROUND: return "fp_round"; 5870 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5871 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5872 case ISD::FP_EXTEND: return "fp_extend"; 5873 5874 case ISD::SINT_TO_FP: return "sint_to_fp"; 5875 case ISD::UINT_TO_FP: return "uint_to_fp"; 5876 case ISD::FP_TO_SINT: return "fp_to_sint"; 5877 case ISD::FP_TO_UINT: return "fp_to_uint"; 5878 case ISD::BITCAST: return "bit_convert"; 5879 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5880 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5881 5882 case ISD::CONVERT_RNDSAT: { 5883 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5884 default: llvm_unreachable("Unknown cvt code!"); 5885 case ISD::CVT_FF: return "cvt_ff"; 5886 case ISD::CVT_FS: return "cvt_fs"; 5887 case ISD::CVT_FU: return "cvt_fu"; 5888 case ISD::CVT_SF: return "cvt_sf"; 5889 case ISD::CVT_UF: return "cvt_uf"; 5890 case ISD::CVT_SS: return "cvt_ss"; 5891 case ISD::CVT_SU: return "cvt_su"; 5892 case ISD::CVT_US: return "cvt_us"; 5893 case ISD::CVT_UU: return "cvt_uu"; 5894 } 5895 } 5896 5897 // Control flow instructions 5898 case ISD::BR: return "br"; 5899 case ISD::BRIND: return "brind"; 5900 case ISD::BR_JT: return "br_jt"; 5901 case ISD::BRCOND: return "brcond"; 5902 case ISD::BR_CC: return "br_cc"; 5903 case ISD::CALLSEQ_START: return "callseq_start"; 5904 case ISD::CALLSEQ_END: return "callseq_end"; 5905 5906 // Other operators 5907 case ISD::LOAD: return "load"; 5908 case ISD::STORE: return "store"; 5909 case ISD::VAARG: return "vaarg"; 5910 case ISD::VACOPY: return "vacopy"; 5911 case ISD::VAEND: return "vaend"; 5912 case ISD::VASTART: return "vastart"; 5913 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5914 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5915 case ISD::BUILD_PAIR: return "build_pair"; 5916 case ISD::STACKSAVE: return "stacksave"; 5917 case ISD::STACKRESTORE: return "stackrestore"; 5918 case ISD::TRAP: return "trap"; 5919 5920 // Bit manipulation 5921 case ISD::BSWAP: return "bswap"; 5922 case ISD::CTPOP: return "ctpop"; 5923 case ISD::CTTZ: return "cttz"; 5924 case ISD::CTLZ: return "ctlz"; 5925 5926 // Trampolines 5927 case ISD::TRAMPOLINE: return "trampoline"; 5928 5929 case ISD::CONDCODE: 5930 switch (cast<CondCodeSDNode>(this)->get()) { 5931 default: llvm_unreachable("Unknown setcc condition!"); 5932 case ISD::SETOEQ: return "setoeq"; 5933 case ISD::SETOGT: return "setogt"; 5934 case ISD::SETOGE: return "setoge"; 5935 case ISD::SETOLT: return "setolt"; 5936 case ISD::SETOLE: return "setole"; 5937 case ISD::SETONE: return "setone"; 5938 5939 case ISD::SETO: return "seto"; 5940 case ISD::SETUO: return "setuo"; 5941 case ISD::SETUEQ: return "setue"; 5942 case ISD::SETUGT: return "setugt"; 5943 case ISD::SETUGE: return "setuge"; 5944 case ISD::SETULT: return "setult"; 5945 case ISD::SETULE: return "setule"; 5946 case ISD::SETUNE: return "setune"; 5947 5948 case ISD::SETEQ: return "seteq"; 5949 case ISD::SETGT: return "setgt"; 5950 case ISD::SETGE: return "setge"; 5951 case ISD::SETLT: return "setlt"; 5952 case ISD::SETLE: return "setle"; 5953 case ISD::SETNE: return "setne"; 5954 } 5955 } 5956} 5957 5958const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5959 switch (AM) { 5960 default: 5961 return ""; 5962 case ISD::PRE_INC: 5963 return "<pre-inc>"; 5964 case ISD::PRE_DEC: 5965 return "<pre-dec>"; 5966 case ISD::POST_INC: 5967 return "<post-inc>"; 5968 case ISD::POST_DEC: 5969 return "<post-dec>"; 5970 } 5971} 5972 5973std::string ISD::ArgFlagsTy::getArgFlagsString() { 5974 std::string S = "< "; 5975 5976 if (isZExt()) 5977 S += "zext "; 5978 if (isSExt()) 5979 S += "sext "; 5980 if (isInReg()) 5981 S += "inreg "; 5982 if (isSRet()) 5983 S += "sret "; 5984 if (isByVal()) 5985 S += "byval "; 5986 if (isNest()) 5987 S += "nest "; 5988 if (getByValAlign()) 5989 S += "byval-align:" + utostr(getByValAlign()) + " "; 5990 if (getOrigAlign()) 5991 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5992 if (getByValSize()) 5993 S += "byval-size:" + utostr(getByValSize()) + " "; 5994 return S + ">"; 5995} 5996 5997void SDNode::dump() const { dump(0); } 5998void SDNode::dump(const SelectionDAG *G) const { 5999 print(dbgs(), G); 6000 dbgs() << '\n'; 6001} 6002 6003void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 6004 OS << (void*)this << ": "; 6005 6006 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 6007 if (i) OS << ","; 6008 if (getValueType(i) == MVT::Other) 6009 OS << "ch"; 6010 else 6011 OS << getValueType(i).getEVTString(); 6012 } 6013 OS << " = " << getOperationName(G); 6014} 6015 6016void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 6017 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 6018 if (!MN->memoperands_empty()) { 6019 OS << "<"; 6020 OS << "Mem:"; 6021 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 6022 e = MN->memoperands_end(); i != e; ++i) { 6023 OS << **i; 6024 if (llvm::next(i) != e) 6025 OS << " "; 6026 } 6027 OS << ">"; 6028 } 6029 } else if (const ShuffleVectorSDNode *SVN = 6030 dyn_cast<ShuffleVectorSDNode>(this)) { 6031 OS << "<"; 6032 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 6033 int Idx = SVN->getMaskElt(i); 6034 if (i) OS << ","; 6035 if (Idx < 0) 6036 OS << "u"; 6037 else 6038 OS << Idx; 6039 } 6040 OS << ">"; 6041 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 6042 OS << '<' << CSDN->getAPIntValue() << '>'; 6043 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 6044 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 6045 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 6046 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 6047 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 6048 else { 6049 OS << "<APFloat("; 6050 CSDN->getValueAPF().bitcastToAPInt().dump(); 6051 OS << ")>"; 6052 } 6053 } else if (const GlobalAddressSDNode *GADN = 6054 dyn_cast<GlobalAddressSDNode>(this)) { 6055 int64_t offset = GADN->getOffset(); 6056 OS << '<'; 6057 WriteAsOperand(OS, GADN->getGlobal()); 6058 OS << '>'; 6059 if (offset > 0) 6060 OS << " + " << offset; 6061 else 6062 OS << " " << offset; 6063 if (unsigned int TF = GADN->getTargetFlags()) 6064 OS << " [TF=" << TF << ']'; 6065 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 6066 OS << "<" << FIDN->getIndex() << ">"; 6067 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 6068 OS << "<" << JTDN->getIndex() << ">"; 6069 if (unsigned int TF = JTDN->getTargetFlags()) 6070 OS << " [TF=" << TF << ']'; 6071 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 6072 int offset = CP->getOffset(); 6073 if (CP->isMachineConstantPoolEntry()) 6074 OS << "<" << *CP->getMachineCPVal() << ">"; 6075 else 6076 OS << "<" << *CP->getConstVal() << ">"; 6077 if (offset > 0) 6078 OS << " + " << offset; 6079 else 6080 OS << " " << offset; 6081 if (unsigned int TF = CP->getTargetFlags()) 6082 OS << " [TF=" << TF << ']'; 6083 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 6084 OS << "<"; 6085 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 6086 if (LBB) 6087 OS << LBB->getName() << " "; 6088 OS << (const void*)BBDN->getBasicBlock() << ">"; 6089 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 6090 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0); 6091 } else if (const ExternalSymbolSDNode *ES = 6092 dyn_cast<ExternalSymbolSDNode>(this)) { 6093 OS << "'" << ES->getSymbol() << "'"; 6094 if (unsigned int TF = ES->getTargetFlags()) 6095 OS << " [TF=" << TF << ']'; 6096 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 6097 if (M->getValue()) 6098 OS << "<" << M->getValue() << ">"; 6099 else 6100 OS << "<null>"; 6101 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 6102 if (MD->getMD()) 6103 OS << "<" << MD->getMD() << ">"; 6104 else 6105 OS << "<null>"; 6106 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6107 OS << ":" << N->getVT().getEVTString(); 6108 } 6109 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6110 OS << "<" << *LD->getMemOperand(); 6111 6112 bool doExt = true; 6113 switch (LD->getExtensionType()) { 6114 default: doExt = false; break; 6115 case ISD::EXTLOAD: OS << ", anyext"; break; 6116 case ISD::SEXTLOAD: OS << ", sext"; break; 6117 case ISD::ZEXTLOAD: OS << ", zext"; break; 6118 } 6119 if (doExt) 6120 OS << " from " << LD->getMemoryVT().getEVTString(); 6121 6122 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6123 if (*AM) 6124 OS << ", " << AM; 6125 6126 OS << ">"; 6127 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6128 OS << "<" << *ST->getMemOperand(); 6129 6130 if (ST->isTruncatingStore()) 6131 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6132 6133 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6134 if (*AM) 6135 OS << ", " << AM; 6136 6137 OS << ">"; 6138 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6139 OS << "<" << *M->getMemOperand() << ">"; 6140 } else if (const BlockAddressSDNode *BA = 6141 dyn_cast<BlockAddressSDNode>(this)) { 6142 OS << "<"; 6143 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6144 OS << ", "; 6145 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6146 OS << ">"; 6147 if (unsigned int TF = BA->getTargetFlags()) 6148 OS << " [TF=" << TF << ']'; 6149 } 6150 6151 if (G) 6152 if (unsigned Order = G->GetOrdering(this)) 6153 OS << " [ORD=" << Order << ']'; 6154 6155 if (getNodeId() != -1) 6156 OS << " [ID=" << getNodeId() << ']'; 6157 6158 DebugLoc dl = getDebugLoc(); 6159 if (G && !dl.isUnknown()) { 6160 DIScope 6161 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6162 OS << " dbg:"; 6163 // Omit the directory, since it's usually long and uninteresting. 6164 if (Scope.Verify()) 6165 OS << Scope.getFilename(); 6166 else 6167 OS << "<unknown>"; 6168 OS << ':' << dl.getLine(); 6169 if (dl.getCol() != 0) 6170 OS << ':' << dl.getCol(); 6171 } 6172} 6173 6174void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6175 print_types(OS, G); 6176 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6177 if (i) OS << ", "; else OS << " "; 6178 OS << (void*)getOperand(i).getNode(); 6179 if (unsigned RN = getOperand(i).getResNo()) 6180 OS << ":" << RN; 6181 } 6182 print_details(OS, G); 6183} 6184 6185static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6186 const SelectionDAG *G, unsigned depth, 6187 unsigned indent) 6188{ 6189 if (depth == 0) 6190 return; 6191 6192 OS.indent(indent); 6193 6194 N->print(OS, G); 6195 6196 if (depth < 1) 6197 return; 6198 6199 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6200 OS << '\n'; 6201 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6202 } 6203} 6204 6205void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6206 unsigned depth) const { 6207 printrWithDepthHelper(OS, this, G, depth, 0); 6208} 6209 6210void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6211 // Don't print impossibly deep things. 6212 printrWithDepth(OS, G, 100); 6213} 6214 6215void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6216 printrWithDepth(dbgs(), G, depth); 6217} 6218 6219void SDNode::dumprFull(const SelectionDAG *G) const { 6220 // Don't print impossibly deep things. 6221 dumprWithDepth(G, 100); 6222} 6223 6224static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6225 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6226 if (N->getOperand(i).getNode()->hasOneUse()) 6227 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6228 else 6229 dbgs() << "\n" << std::string(indent+2, ' ') 6230 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6231 6232 6233 dbgs() << "\n"; 6234 dbgs().indent(indent); 6235 N->dump(G); 6236} 6237 6238SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6239 assert(N->getNumValues() == 1 && 6240 "Can't unroll a vector with multiple results!"); 6241 6242 EVT VT = N->getValueType(0); 6243 unsigned NE = VT.getVectorNumElements(); 6244 EVT EltVT = VT.getVectorElementType(); 6245 DebugLoc dl = N->getDebugLoc(); 6246 6247 SmallVector<SDValue, 8> Scalars; 6248 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6249 6250 // If ResNE is 0, fully unroll the vector op. 6251 if (ResNE == 0) 6252 ResNE = NE; 6253 else if (NE > ResNE) 6254 NE = ResNE; 6255 6256 unsigned i; 6257 for (i= 0; i != NE; ++i) { 6258 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6259 SDValue Operand = N->getOperand(j); 6260 EVT OperandVT = Operand.getValueType(); 6261 if (OperandVT.isVector()) { 6262 // A vector operand; extract a single element. 6263 EVT OperandEltVT = OperandVT.getVectorElementType(); 6264 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6265 OperandEltVT, 6266 Operand, 6267 getConstant(i, MVT::i32)); 6268 } else { 6269 // A scalar operand; just use it as is. 6270 Operands[j] = Operand; 6271 } 6272 } 6273 6274 switch (N->getOpcode()) { 6275 default: 6276 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6277 &Operands[0], Operands.size())); 6278 break; 6279 case ISD::SHL: 6280 case ISD::SRA: 6281 case ISD::SRL: 6282 case ISD::ROTL: 6283 case ISD::ROTR: 6284 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6285 getShiftAmountOperand(Operands[1]))); 6286 break; 6287 case ISD::SIGN_EXTEND_INREG: 6288 case ISD::FP_ROUND_INREG: { 6289 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6290 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6291 Operands[0], 6292 getValueType(ExtVT))); 6293 } 6294 } 6295 } 6296 6297 for (; i < ResNE; ++i) 6298 Scalars.push_back(getUNDEF(EltVT)); 6299 6300 return getNode(ISD::BUILD_VECTOR, dl, 6301 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6302 &Scalars[0], Scalars.size()); 6303} 6304 6305 6306/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6307/// location that is 'Dist' units away from the location that the 'Base' load 6308/// is loading from. 6309bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6310 unsigned Bytes, int Dist) const { 6311 if (LD->getChain() != Base->getChain()) 6312 return false; 6313 EVT VT = LD->getValueType(0); 6314 if (VT.getSizeInBits() / 8 != Bytes) 6315 return false; 6316 6317 SDValue Loc = LD->getOperand(1); 6318 SDValue BaseLoc = Base->getOperand(1); 6319 if (Loc.getOpcode() == ISD::FrameIndex) { 6320 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6321 return false; 6322 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6323 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6324 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6325 int FS = MFI->getObjectSize(FI); 6326 int BFS = MFI->getObjectSize(BFI); 6327 if (FS != BFS || FS != (int)Bytes) return false; 6328 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6329 } 6330 if (Loc.getOpcode() == ISD::ADD && Loc.getOperand(0) == BaseLoc) { 6331 ConstantSDNode *V = dyn_cast<ConstantSDNode>(Loc.getOperand(1)); 6332 if (V && (V->getSExtValue() == Dist*Bytes)) 6333 return true; 6334 } 6335 6336 const GlobalValue *GV1 = NULL; 6337 const GlobalValue *GV2 = NULL; 6338 int64_t Offset1 = 0; 6339 int64_t Offset2 = 0; 6340 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6341 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6342 if (isGA1 && isGA2 && GV1 == GV2) 6343 return Offset1 == (Offset2 + Dist*Bytes); 6344 return false; 6345} 6346 6347 6348/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6349/// it cannot be inferred. 6350unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6351 // If this is a GlobalAddress + cst, return the alignment. 6352 const GlobalValue *GV; 6353 int64_t GVOffset = 0; 6354 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6355 // If GV has specified alignment, then use it. Otherwise, use the preferred 6356 // alignment. 6357 unsigned Align = GV->getAlignment(); 6358 if (!Align) { 6359 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6360 if (GVar->hasInitializer()) { 6361 const TargetData *TD = TLI.getTargetData(); 6362 Align = TD->getPreferredAlignment(GVar); 6363 } 6364 } 6365 } 6366 return MinAlign(Align, GVOffset); 6367 } 6368 6369 // If this is a direct reference to a stack slot, use information about the 6370 // stack slot's alignment. 6371 int FrameIdx = 1 << 31; 6372 int64_t FrameOffset = 0; 6373 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6374 FrameIdx = FI->getIndex(); 6375 } else if (Ptr.getOpcode() == ISD::ADD && 6376 isa<ConstantSDNode>(Ptr.getOperand(1)) && 6377 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6378 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6379 FrameOffset = Ptr.getConstantOperandVal(1); 6380 } 6381 6382 if (FrameIdx != (1 << 31)) { 6383 // FIXME: Handle FI+CST. 6384 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6385 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6386 FrameOffset); 6387 return FIInfoAlign; 6388 } 6389 6390 return 0; 6391} 6392 6393void SelectionDAG::dump() const { 6394 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6395 6396 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6397 I != E; ++I) { 6398 const SDNode *N = I; 6399 if (!N->hasOneUse() && N != getRoot().getNode()) 6400 DumpNodes(N, 2, this); 6401 } 6402 6403 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6404 6405 dbgs() << "\n\n"; 6406} 6407 6408void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6409 print_types(OS, G); 6410 print_details(OS, G); 6411} 6412 6413typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6414static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6415 const SelectionDAG *G, VisitedSDNodeSet &once) { 6416 if (!once.insert(N)) // If we've been here before, return now. 6417 return; 6418 6419 // Dump the current SDNode, but don't end the line yet. 6420 OS << std::string(indent, ' '); 6421 N->printr(OS, G); 6422 6423 // Having printed this SDNode, walk the children: 6424 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6425 const SDNode *child = N->getOperand(i).getNode(); 6426 6427 if (i) OS << ","; 6428 OS << " "; 6429 6430 if (child->getNumOperands() == 0) { 6431 // This child has no grandchildren; print it inline right here. 6432 child->printr(OS, G); 6433 once.insert(child); 6434 } else { // Just the address. FIXME: also print the child's opcode. 6435 OS << (void*)child; 6436 if (unsigned RN = N->getOperand(i).getResNo()) 6437 OS << ":" << RN; 6438 } 6439 } 6440 6441 OS << "\n"; 6442 6443 // Dump children that have grandchildren on their own line(s). 6444 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6445 const SDNode *child = N->getOperand(i).getNode(); 6446 DumpNodesr(OS, child, indent+2, G, once); 6447 } 6448} 6449 6450void SDNode::dumpr() const { 6451 VisitedSDNodeSet once; 6452 DumpNodesr(dbgs(), this, 0, 0, once); 6453} 6454 6455void SDNode::dumpr(const SelectionDAG *G) const { 6456 VisitedSDNodeSet once; 6457 DumpNodesr(dbgs(), this, 0, G, once); 6458} 6459 6460 6461// getAddressSpace - Return the address space this GlobalAddress belongs to. 6462unsigned GlobalAddressSDNode::getAddressSpace() const { 6463 return getGlobal()->getType()->getAddressSpace(); 6464} 6465 6466 6467const Type *ConstantPoolSDNode::getType() const { 6468 if (isMachineConstantPoolEntry()) 6469 return Val.MachineCPVal->getType(); 6470 return Val.ConstVal->getType(); 6471} 6472 6473bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6474 APInt &SplatUndef, 6475 unsigned &SplatBitSize, 6476 bool &HasAnyUndefs, 6477 unsigned MinSplatBits, 6478 bool isBigEndian) { 6479 EVT VT = getValueType(0); 6480 assert(VT.isVector() && "Expected a vector type"); 6481 unsigned sz = VT.getSizeInBits(); 6482 if (MinSplatBits > sz) 6483 return false; 6484 6485 SplatValue = APInt(sz, 0); 6486 SplatUndef = APInt(sz, 0); 6487 6488 // Get the bits. Bits with undefined values (when the corresponding element 6489 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6490 // in SplatValue. If any of the values are not constant, give up and return 6491 // false. 6492 unsigned int nOps = getNumOperands(); 6493 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6494 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6495 6496 for (unsigned j = 0; j < nOps; ++j) { 6497 unsigned i = isBigEndian ? nOps-1-j : j; 6498 SDValue OpVal = getOperand(i); 6499 unsigned BitPos = j * EltBitSize; 6500 6501 if (OpVal.getOpcode() == ISD::UNDEF) 6502 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6503 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6504 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6505 zextOrTrunc(sz) << BitPos; 6506 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6507 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6508 else 6509 return false; 6510 } 6511 6512 // The build_vector is all constants or undefs. Find the smallest element 6513 // size that splats the vector. 6514 6515 HasAnyUndefs = (SplatUndef != 0); 6516 while (sz > 8) { 6517 6518 unsigned HalfSize = sz / 2; 6519 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6520 APInt LowValue = SplatValue.trunc(HalfSize); 6521 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6522 APInt LowUndef = SplatUndef.trunc(HalfSize); 6523 6524 // If the two halves do not match (ignoring undef bits), stop here. 6525 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6526 MinSplatBits > HalfSize) 6527 break; 6528 6529 SplatValue = HighValue | LowValue; 6530 SplatUndef = HighUndef & LowUndef; 6531 6532 sz = HalfSize; 6533 } 6534 6535 SplatBitSize = sz; 6536 return true; 6537} 6538 6539bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6540 // Find the first non-undef value in the shuffle mask. 6541 unsigned i, e; 6542 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6543 /* search */; 6544 6545 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6546 6547 // Make sure all remaining elements are either undef or the same as the first 6548 // non-undef value. 6549 for (int Idx = Mask[i]; i != e; ++i) 6550 if (Mask[i] >= 0 && Mask[i] != Idx) 6551 return false; 6552 return true; 6553} 6554 6555#ifdef XDEBUG 6556static void checkForCyclesHelper(const SDNode *N, 6557 SmallPtrSet<const SDNode*, 32> &Visited, 6558 SmallPtrSet<const SDNode*, 32> &Checked) { 6559 // If this node has already been checked, don't check it again. 6560 if (Checked.count(N)) 6561 return; 6562 6563 // If a node has already been visited on this depth-first walk, reject it as 6564 // a cycle. 6565 if (!Visited.insert(N)) { 6566 dbgs() << "Offending node:\n"; 6567 N->dumprFull(); 6568 errs() << "Detected cycle in SelectionDAG\n"; 6569 abort(); 6570 } 6571 6572 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6573 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6574 6575 Checked.insert(N); 6576 Visited.erase(N); 6577} 6578#endif 6579 6580void llvm::checkForCycles(const llvm::SDNode *N) { 6581#ifdef XDEBUG 6582 assert(N && "Checking nonexistant SDNode"); 6583 SmallPtrSet<const SDNode*, 32> visited; 6584 SmallPtrSet<const SDNode*, 32> checked; 6585 checkForCyclesHelper(N, visited, checked); 6586#endif 6587} 6588 6589void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6590 checkForCycles(DAG->getRoot().getNode()); 6591} 6592