SelectionDAG.cpp revision ea7b527aa56ad0fe547d3d99b21e845a49a031cb
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Target/TargetRegisterInfo.h" 28#include "llvm/Target/TargetData.h" 29#include "llvm/Target/TargetLowering.h" 30#include "llvm/Target/TargetInstrInfo.h" 31#include "llvm/Target/TargetMachine.h" 32#include "llvm/Support/CommandLine.h" 33#include "llvm/Support/MathExtras.h" 34#include "llvm/Support/raw_ostream.h" 35#include "llvm/ADT/SetVector.h" 36#include "llvm/ADT/SmallPtrSet.h" 37#include "llvm/ADT/SmallSet.h" 38#include "llvm/ADT/SmallVector.h" 39#include "llvm/ADT/StringExtras.h" 40#include <algorithm> 41#include <cmath> 42using namespace llvm; 43 44/// makeVTList - Return an instance of the SDVTList struct initialized with the 45/// specified members. 46static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 47 SDVTList Res = {VTs, NumVTs}; 48 return Res; 49} 50 51static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 52 switch (VT.getSimpleVT()) { 53 default: assert(0 && "Unknown FP format"); 54 case MVT::f32: return &APFloat::IEEEsingle; 55 case MVT::f64: return &APFloat::IEEEdouble; 56 case MVT::f80: return &APFloat::x87DoubleExtended; 57 case MVT::f128: return &APFloat::IEEEquad; 58 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 59 } 60} 61 62SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 63 64//===----------------------------------------------------------------------===// 65// ConstantFPSDNode Class 66//===----------------------------------------------------------------------===// 67 68/// isExactlyValue - We don't rely on operator== working on double values, as 69/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 70/// As such, this method can be used to do an exact bit-for-bit comparison of 71/// two floating point values. 72bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 73 return getValueAPF().bitwiseIsEqual(V); 74} 75 76bool ConstantFPSDNode::isValueValidForType(MVT VT, 77 const APFloat& Val) { 78 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 79 80 // PPC long double cannot be converted to any other type. 81 if (VT == MVT::ppcf128 || 82 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 83 return false; 84 85 // convert modifies in place, so make a copy. 86 APFloat Val2 = APFloat(Val); 87 bool losesInfo; 88 (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 89 &losesInfo); 90 return !losesInfo; 91} 92 93//===----------------------------------------------------------------------===// 94// ISD Namespace 95//===----------------------------------------------------------------------===// 96 97/// isBuildVectorAllOnes - Return true if the specified node is a 98/// BUILD_VECTOR where all of the elements are ~0 or undef. 99bool ISD::isBuildVectorAllOnes(const SDNode *N) { 100 // Look through a bit convert. 101 if (N->getOpcode() == ISD::BIT_CONVERT) 102 N = N->getOperand(0).getNode(); 103 104 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 105 106 unsigned i = 0, e = N->getNumOperands(); 107 108 // Skip over all of the undef values. 109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 110 ++i; 111 112 // Do not accept an all-undef vector. 113 if (i == e) return false; 114 115 // Do not accept build_vectors that aren't all constants or which have non-~0 116 // elements. 117 SDValue NotZero = N->getOperand(i); 118 if (isa<ConstantSDNode>(NotZero)) { 119 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 120 return false; 121 } else if (isa<ConstantFPSDNode>(NotZero)) { 122 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 123 bitcastToAPInt().isAllOnesValue()) 124 return false; 125 } else 126 return false; 127 128 // Okay, we have at least one ~0 value, check to see if the rest match or are 129 // undefs. 130 for (++i; i != e; ++i) 131 if (N->getOperand(i) != NotZero && 132 N->getOperand(i).getOpcode() != ISD::UNDEF) 133 return false; 134 return true; 135} 136 137 138/// isBuildVectorAllZeros - Return true if the specified node is a 139/// BUILD_VECTOR where all of the elements are 0 or undef. 140bool ISD::isBuildVectorAllZeros(const SDNode *N) { 141 // Look through a bit convert. 142 if (N->getOpcode() == ISD::BIT_CONVERT) 143 N = N->getOperand(0).getNode(); 144 145 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 146 147 unsigned i = 0, e = N->getNumOperands(); 148 149 // Skip over all of the undef values. 150 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 151 ++i; 152 153 // Do not accept an all-undef vector. 154 if (i == e) return false; 155 156 // Do not accept build_vectors that aren't all constants or which have non-~0 157 // elements. 158 SDValue Zero = N->getOperand(i); 159 if (isa<ConstantSDNode>(Zero)) { 160 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 161 return false; 162 } else if (isa<ConstantFPSDNode>(Zero)) { 163 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 164 return false; 165 } else 166 return false; 167 168 // Okay, we have at least one ~0 value, check to see if the rest match or are 169 // undefs. 170 for (++i; i != e; ++i) 171 if (N->getOperand(i) != Zero && 172 N->getOperand(i).getOpcode() != ISD::UNDEF) 173 return false; 174 return true; 175} 176 177/// isScalarToVector - Return true if the specified node is a 178/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 179/// element is not an undef. 180bool ISD::isScalarToVector(const SDNode *N) { 181 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 182 return true; 183 184 if (N->getOpcode() != ISD::BUILD_VECTOR) 185 return false; 186 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 187 return false; 188 unsigned NumElems = N->getNumOperands(); 189 for (unsigned i = 1; i < NumElems; ++i) { 190 SDValue V = N->getOperand(i); 191 if (V.getOpcode() != ISD::UNDEF) 192 return false; 193 } 194 return true; 195} 196 197 198/// isDebugLabel - Return true if the specified node represents a debug 199/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 200bool ISD::isDebugLabel(const SDNode *N) { 201 SDValue Zero; 202 if (N->getOpcode() == ISD::DBG_LABEL) 203 return true; 204 if (N->isMachineOpcode() && 205 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 206 return true; 207 return false; 208} 209 210/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 211/// when given the operation for (X op Y). 212ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 213 // To perform this operation, we just need to swap the L and G bits of the 214 // operation. 215 unsigned OldL = (Operation >> 2) & 1; 216 unsigned OldG = (Operation >> 1) & 1; 217 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 218 (OldL << 1) | // New G bit 219 (OldG << 2)); // New L bit. 220} 221 222/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 223/// 'op' is a valid SetCC operation. 224ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 225 unsigned Operation = Op; 226 if (isInteger) 227 Operation ^= 7; // Flip L, G, E bits, but not U. 228 else 229 Operation ^= 15; // Flip all of the condition bits. 230 231 if (Operation > ISD::SETTRUE2) 232 Operation &= ~8; // Don't let N and U bits get set. 233 234 return ISD::CondCode(Operation); 235} 236 237 238/// isSignedOp - For an integer comparison, return 1 if the comparison is a 239/// signed operation and 2 if the result is an unsigned comparison. Return zero 240/// if the operation does not depend on the sign of the input (setne and seteq). 241static int isSignedOp(ISD::CondCode Opcode) { 242 switch (Opcode) { 243 default: assert(0 && "Illegal integer setcc operation!"); 244 case ISD::SETEQ: 245 case ISD::SETNE: return 0; 246 case ISD::SETLT: 247 case ISD::SETLE: 248 case ISD::SETGT: 249 case ISD::SETGE: return 1; 250 case ISD::SETULT: 251 case ISD::SETULE: 252 case ISD::SETUGT: 253 case ISD::SETUGE: return 2; 254 } 255} 256 257/// getSetCCOrOperation - Return the result of a logical OR between different 258/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 259/// returns SETCC_INVALID if it is not possible to represent the resultant 260/// comparison. 261ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 262 bool isInteger) { 263 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 264 // Cannot fold a signed integer setcc with an unsigned integer setcc. 265 return ISD::SETCC_INVALID; 266 267 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 268 269 // If the N and U bits get set then the resultant comparison DOES suddenly 270 // care about orderedness, and is true when ordered. 271 if (Op > ISD::SETTRUE2) 272 Op &= ~16; // Clear the U bit if the N bit is set. 273 274 // Canonicalize illegal integer setcc's. 275 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 276 Op = ISD::SETNE; 277 278 return ISD::CondCode(Op); 279} 280 281/// getSetCCAndOperation - Return the result of a logical AND between different 282/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 283/// function returns zero if it is not possible to represent the resultant 284/// comparison. 285ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 286 bool isInteger) { 287 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 288 // Cannot fold a signed setcc with an unsigned setcc. 289 return ISD::SETCC_INVALID; 290 291 // Combine all of the condition bits. 292 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 293 294 // Canonicalize illegal integer setcc's. 295 if (isInteger) { 296 switch (Result) { 297 default: break; 298 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 299 case ISD::SETOEQ: // SETEQ & SETU[LG]E 300 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 301 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 302 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 303 } 304 } 305 306 return Result; 307} 308 309const TargetMachine &SelectionDAG::getTarget() const { 310 return MF->getTarget(); 311} 312 313//===----------------------------------------------------------------------===// 314// SDNode Profile Support 315//===----------------------------------------------------------------------===// 316 317/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 318/// 319static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 320 ID.AddInteger(OpC); 321} 322 323/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 324/// solely with their pointer. 325static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 326 ID.AddPointer(VTList.VTs); 327} 328 329/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 330/// 331static void AddNodeIDOperands(FoldingSetNodeID &ID, 332 const SDValue *Ops, unsigned NumOps) { 333 for (; NumOps; --NumOps, ++Ops) { 334 ID.AddPointer(Ops->getNode()); 335 ID.AddInteger(Ops->getResNo()); 336 } 337} 338 339/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 340/// 341static void AddNodeIDOperands(FoldingSetNodeID &ID, 342 const SDUse *Ops, unsigned NumOps) { 343 for (; NumOps; --NumOps, ++Ops) { 344 ID.AddPointer(Ops->getVal()); 345 ID.AddInteger(Ops->getSDValue().getResNo()); 346 } 347} 348 349static void AddNodeIDNode(FoldingSetNodeID &ID, 350 unsigned short OpC, SDVTList VTList, 351 const SDValue *OpList, unsigned N) { 352 AddNodeIDOpcode(ID, OpC); 353 AddNodeIDValueTypes(ID, VTList); 354 AddNodeIDOperands(ID, OpList, N); 355} 356 357/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 358/// the NodeID data. 359static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 360 switch (N->getOpcode()) { 361 default: break; // Normal nodes don't need extra info. 362 case ISD::ARG_FLAGS: 363 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 364 break; 365 case ISD::TargetConstant: 366 case ISD::Constant: 367 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 368 break; 369 case ISD::TargetConstantFP: 370 case ISD::ConstantFP: { 371 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 372 break; 373 } 374 case ISD::TargetGlobalAddress: 375 case ISD::GlobalAddress: 376 case ISD::TargetGlobalTLSAddress: 377 case ISD::GlobalTLSAddress: { 378 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 379 ID.AddPointer(GA->getGlobal()); 380 ID.AddInteger(GA->getOffset()); 381 break; 382 } 383 case ISD::BasicBlock: 384 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 385 break; 386 case ISD::Register: 387 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 388 break; 389 case ISD::DBG_STOPPOINT: { 390 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 391 ID.AddInteger(DSP->getLine()); 392 ID.AddInteger(DSP->getColumn()); 393 ID.AddPointer(DSP->getCompileUnit()); 394 break; 395 } 396 case ISD::SRCVALUE: 397 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 398 break; 399 case ISD::MEMOPERAND: { 400 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 401 MO.Profile(ID); 402 break; 403 } 404 case ISD::FrameIndex: 405 case ISD::TargetFrameIndex: 406 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 407 break; 408 case ISD::JumpTable: 409 case ISD::TargetJumpTable: 410 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 411 break; 412 case ISD::ConstantPool: 413 case ISD::TargetConstantPool: { 414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 415 ID.AddInteger(CP->getAlignment()); 416 ID.AddInteger(CP->getOffset()); 417 if (CP->isMachineConstantPoolEntry()) 418 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 419 else 420 ID.AddPointer(CP->getConstVal()); 421 break; 422 } 423 case ISD::CALL: { 424 const CallSDNode *Call = cast<CallSDNode>(N); 425 ID.AddInteger(Call->getCallingConv()); 426 ID.AddInteger(Call->isVarArg()); 427 break; 428 } 429 case ISD::LOAD: { 430 const LoadSDNode *LD = cast<LoadSDNode>(N); 431 ID.AddInteger(LD->getAddressingMode()); 432 ID.AddInteger(LD->getExtensionType()); 433 ID.AddInteger(LD->getMemoryVT().getRawBits()); 434 ID.AddInteger(LD->getRawFlags()); 435 break; 436 } 437 case ISD::STORE: { 438 const StoreSDNode *ST = cast<StoreSDNode>(N); 439 ID.AddInteger(ST->getAddressingMode()); 440 ID.AddInteger(ST->isTruncatingStore()); 441 ID.AddInteger(ST->getMemoryVT().getRawBits()); 442 ID.AddInteger(ST->getRawFlags()); 443 break; 444 } 445 case ISD::ATOMIC_CMP_SWAP_8: 446 case ISD::ATOMIC_SWAP_8: 447 case ISD::ATOMIC_LOAD_ADD_8: 448 case ISD::ATOMIC_LOAD_SUB_8: 449 case ISD::ATOMIC_LOAD_AND_8: 450 case ISD::ATOMIC_LOAD_OR_8: 451 case ISD::ATOMIC_LOAD_XOR_8: 452 case ISD::ATOMIC_LOAD_NAND_8: 453 case ISD::ATOMIC_LOAD_MIN_8: 454 case ISD::ATOMIC_LOAD_MAX_8: 455 case ISD::ATOMIC_LOAD_UMIN_8: 456 case ISD::ATOMIC_LOAD_UMAX_8: 457 case ISD::ATOMIC_CMP_SWAP_16: 458 case ISD::ATOMIC_SWAP_16: 459 case ISD::ATOMIC_LOAD_ADD_16: 460 case ISD::ATOMIC_LOAD_SUB_16: 461 case ISD::ATOMIC_LOAD_AND_16: 462 case ISD::ATOMIC_LOAD_OR_16: 463 case ISD::ATOMIC_LOAD_XOR_16: 464 case ISD::ATOMIC_LOAD_NAND_16: 465 case ISD::ATOMIC_LOAD_MIN_16: 466 case ISD::ATOMIC_LOAD_MAX_16: 467 case ISD::ATOMIC_LOAD_UMIN_16: 468 case ISD::ATOMIC_LOAD_UMAX_16: 469 case ISD::ATOMIC_CMP_SWAP_32: 470 case ISD::ATOMIC_SWAP_32: 471 case ISD::ATOMIC_LOAD_ADD_32: 472 case ISD::ATOMIC_LOAD_SUB_32: 473 case ISD::ATOMIC_LOAD_AND_32: 474 case ISD::ATOMIC_LOAD_OR_32: 475 case ISD::ATOMIC_LOAD_XOR_32: 476 case ISD::ATOMIC_LOAD_NAND_32: 477 case ISD::ATOMIC_LOAD_MIN_32: 478 case ISD::ATOMIC_LOAD_MAX_32: 479 case ISD::ATOMIC_LOAD_UMIN_32: 480 case ISD::ATOMIC_LOAD_UMAX_32: 481 case ISD::ATOMIC_CMP_SWAP_64: 482 case ISD::ATOMIC_SWAP_64: 483 case ISD::ATOMIC_LOAD_ADD_64: 484 case ISD::ATOMIC_LOAD_SUB_64: 485 case ISD::ATOMIC_LOAD_AND_64: 486 case ISD::ATOMIC_LOAD_OR_64: 487 case ISD::ATOMIC_LOAD_XOR_64: 488 case ISD::ATOMIC_LOAD_NAND_64: 489 case ISD::ATOMIC_LOAD_MIN_64: 490 case ISD::ATOMIC_LOAD_MAX_64: 491 case ISD::ATOMIC_LOAD_UMIN_64: 492 case ISD::ATOMIC_LOAD_UMAX_64: { 493 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 494 ID.AddInteger(AT->getRawFlags()); 495 break; 496 } 497 } // end switch (N->getOpcode()) 498} 499 500/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 501/// data. 502static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 503 AddNodeIDOpcode(ID, N->getOpcode()); 504 // Add the return value info. 505 AddNodeIDValueTypes(ID, N->getVTList()); 506 // Add the operand info. 507 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 508 509 // Handle SDNode leafs with special info. 510 AddNodeIDCustom(ID, N); 511} 512 513/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 514/// the CSE map that carries both alignment and volatility information. 515/// 516static inline unsigned 517encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 518 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 519} 520 521//===----------------------------------------------------------------------===// 522// SelectionDAG Class 523//===----------------------------------------------------------------------===// 524 525/// doNotCSE - Return true if CSE should not be performed for this node. 526static bool doNotCSE(SDNode *N) { 527 if (N->getValueType(0) == MVT::Flag) 528 return true; // Never CSE anything that produces a flag. 529 530 switch (N->getOpcode()) { 531 default: break; 532 case ISD::HANDLENODE: 533 case ISD::DBG_LABEL: 534 case ISD::DBG_STOPPOINT: 535 case ISD::EH_LABEL: 536 case ISD::DECLARE: 537 return true; // Never CSE these nodes. 538 } 539 540 // Check that remaining values produced are not flags. 541 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 542 if (N->getValueType(i) == MVT::Flag) 543 return true; // Never CSE anything that produces a flag. 544 545 return false; 546} 547 548/// RemoveDeadNodes - This method deletes all unreachable nodes in the 549/// SelectionDAG. 550void SelectionDAG::RemoveDeadNodes() { 551 // Create a dummy node (which is not added to allnodes), that adds a reference 552 // to the root node, preventing it from being deleted. 553 HandleSDNode Dummy(getRoot()); 554 555 SmallVector<SDNode*, 128> DeadNodes; 556 557 // Add all obviously-dead nodes to the DeadNodes worklist. 558 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 559 if (I->use_empty()) 560 DeadNodes.push_back(I); 561 562 RemoveDeadNodes(DeadNodes); 563 564 // If the root changed (e.g. it was a dead load, update the root). 565 setRoot(Dummy.getValue()); 566} 567 568/// RemoveDeadNodes - This method deletes the unreachable nodes in the 569/// given list, and any nodes that become unreachable as a result. 570void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 571 DAGUpdateListener *UpdateListener) { 572 573 // Process the worklist, deleting the nodes and adding their uses to the 574 // worklist. 575 while (!DeadNodes.empty()) { 576 SDNode *N = DeadNodes.back(); 577 DeadNodes.pop_back(); 578 579 if (UpdateListener) 580 UpdateListener->NodeDeleted(N, 0); 581 582 // Take the node out of the appropriate CSE map. 583 RemoveNodeFromCSEMaps(N); 584 585 // Next, brutally remove the operand list. This is safe to do, as there are 586 // no cycles in the graph. 587 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 588 SDNode *Operand = I->getVal(); 589 Operand->removeUser(std::distance(N->op_begin(), I), N); 590 591 // Now that we removed this operand, see if there are no uses of it left. 592 if (Operand->use_empty()) 593 DeadNodes.push_back(Operand); 594 } 595 596 if (N->OperandsNeedDelete) 597 delete[] N->OperandList; 598 599 N->OperandList = 0; 600 N->NumOperands = 0; 601 602 // Finally, remove N itself. 603 NodeAllocator.Deallocate(AllNodes.remove(N)); 604 } 605} 606 607void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 608 SmallVector<SDNode*, 16> DeadNodes(1, N); 609 RemoveDeadNodes(DeadNodes, UpdateListener); 610} 611 612void SelectionDAG::DeleteNode(SDNode *N) { 613 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 614 615 // First take this out of the appropriate CSE map. 616 RemoveNodeFromCSEMaps(N); 617 618 // Finally, remove uses due to operands of this node, remove from the 619 // AllNodes list, and delete the node. 620 DeleteNodeNotInCSEMaps(N); 621} 622 623void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 624 // Drop all of the operands and decrement used node's use counts. 625 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 626 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 627 628 if (N->OperandsNeedDelete) { 629 delete[] N->OperandList; 630 N->OperandList = 0; 631 } 632 633 assert(N != AllNodes.begin()); 634 NodeAllocator.Deallocate(AllNodes.remove(N)); 635} 636 637/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 638/// correspond to it. This is useful when we're about to delete or repurpose 639/// the node. We don't want future request for structurally identical nodes 640/// to return N anymore. 641bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 642 bool Erased = false; 643 switch (N->getOpcode()) { 644 case ISD::EntryToken: 645 assert(0 && "EntryToken should not be in CSEMaps!"); 646 return false; 647 case ISD::HANDLENODE: return false; // noop. 648 case ISD::CONDCODE: 649 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 650 "Cond code doesn't exist!"); 651 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 652 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 653 break; 654 case ISD::ExternalSymbol: 655 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 656 break; 657 case ISD::TargetExternalSymbol: 658 Erased = 659 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 660 break; 661 case ISD::VALUETYPE: { 662 MVT VT = cast<VTSDNode>(N)->getVT(); 663 if (VT.isExtended()) { 664 Erased = ExtendedValueTypeNodes.erase(VT); 665 } else { 666 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 667 ValueTypeNodes[VT.getSimpleVT()] = 0; 668 } 669 break; 670 } 671 default: 672 // Remove it from the CSE Map. 673 Erased = CSEMap.RemoveNode(N); 674 break; 675 } 676#ifndef NDEBUG 677 // Verify that the node was actually in one of the CSE maps, unless it has a 678 // flag result (which cannot be CSE'd) or is one of the special cases that are 679 // not subject to CSE. 680 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 681 !N->isMachineOpcode() && !doNotCSE(N)) { 682 N->dump(this); 683 cerr << "\n"; 684 assert(0 && "Node is not in map!"); 685 } 686#endif 687 return Erased; 688} 689 690/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 691/// has been taken out and modified in some way. If the specified node already 692/// exists in the CSE maps, do not modify the maps, but return the existing node 693/// instead. If it doesn't exist, add it and return null. 694/// 695SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 696 assert(N->getNumOperands() && "This is a leaf node!"); 697 698 if (doNotCSE(N)) 699 return 0; 700 701 SDNode *New = CSEMap.GetOrInsertNode(N); 702 if (New != N) return New; // Node already existed. 703 return 0; 704} 705 706/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 707/// were replaced with those specified. If this node is never memoized, 708/// return null, otherwise return a pointer to the slot it would take. If a 709/// node already exists with these operands, the slot will be non-null. 710SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 711 void *&InsertPos) { 712 if (doNotCSE(N)) 713 return 0; 714 715 SDValue Ops[] = { Op }; 716 FoldingSetNodeID ID; 717 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 718 AddNodeIDCustom(ID, N); 719 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 720} 721 722/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 723/// were replaced with those specified. If this node is never memoized, 724/// return null, otherwise return a pointer to the slot it would take. If a 725/// node already exists with these operands, the slot will be non-null. 726SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 727 SDValue Op1, SDValue Op2, 728 void *&InsertPos) { 729 if (doNotCSE(N)) 730 return 0; 731 732 SDValue Ops[] = { Op1, Op2 }; 733 FoldingSetNodeID ID; 734 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 735 AddNodeIDCustom(ID, N); 736 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 737} 738 739 740/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 741/// were replaced with those specified. If this node is never memoized, 742/// return null, otherwise return a pointer to the slot it would take. If a 743/// node already exists with these operands, the slot will be non-null. 744SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 745 const SDValue *Ops,unsigned NumOps, 746 void *&InsertPos) { 747 if (doNotCSE(N)) 748 return 0; 749 750 FoldingSetNodeID ID; 751 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 752 AddNodeIDCustom(ID, N); 753 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 754} 755 756/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 757void SelectionDAG::VerifyNode(SDNode *N) { 758 switch (N->getOpcode()) { 759 default: 760 break; 761 case ISD::BUILD_PAIR: { 762 MVT VT = N->getValueType(0); 763 assert(N->getNumValues() == 1 && "Too many results!"); 764 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 765 "Wrong return type!"); 766 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 767 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 768 "Mismatched operand types!"); 769 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 770 "Wrong operand type!"); 771 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 772 "Wrong return type size"); 773 break; 774 } 775 case ISD::BUILD_VECTOR: { 776 assert(N->getNumValues() == 1 && "Too many results!"); 777 assert(N->getValueType(0).isVector() && "Wrong return type!"); 778 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 779 "Wrong number of operands!"); 780 // FIXME: Change vector_shuffle to a variadic node with mask elements being 781 // operands of the node. Currently the mask is a BUILD_VECTOR passed as an 782 // operand, and it is not always possible to legalize it. Turning off the 783 // following checks at least makes it possible to legalize most of the time. 784// MVT EltVT = N->getValueType(0).getVectorElementType(); 785// for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 786// assert(I->getSDValue().getValueType() == EltVT && 787// "Wrong operand type!"); 788 break; 789 } 790 } 791} 792 793/// getMVTAlignment - Compute the default alignment value for the 794/// given type. 795/// 796unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 797 const Type *Ty = VT == MVT::iPTR ? 798 PointerType::get(Type::Int8Ty, 0) : 799 VT.getTypeForMVT(); 800 801 return TLI.getTargetData()->getABITypeAlignment(Ty); 802} 803 804SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli) 805 : TLI(tli), FLI(fli), 806 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 807 Root(getEntryNode()) { 808 AllNodes.push_back(&EntryNode); 809} 810 811void SelectionDAG::init(MachineFunction &mf, MachineModuleInfo *mmi) { 812 MF = &mf; 813 MMI = mmi; 814} 815 816SelectionDAG::~SelectionDAG() { 817 allnodes_clear(); 818} 819 820void SelectionDAG::allnodes_clear() { 821 assert(&*AllNodes.begin() == &EntryNode); 822 AllNodes.remove(AllNodes.begin()); 823 while (!AllNodes.empty()) { 824 SDNode *N = AllNodes.remove(AllNodes.begin()); 825 N->SetNextInBucket(0); 826 827 if (N->OperandsNeedDelete) { 828 delete [] N->OperandList; 829 N->OperandList = 0; 830 } 831 832 NodeAllocator.Deallocate(N); 833 } 834} 835 836void SelectionDAG::clear() { 837 allnodes_clear(); 838 OperandAllocator.Reset(); 839 CSEMap.clear(); 840 841 ExtendedValueTypeNodes.clear(); 842 ExternalSymbols.clear(); 843 TargetExternalSymbols.clear(); 844 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 845 static_cast<CondCodeSDNode*>(0)); 846 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 847 static_cast<SDNode*>(0)); 848 849 EntryNode.Uses = 0; 850 AllNodes.push_back(&EntryNode); 851 Root = getEntryNode(); 852} 853 854SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 855 if (Op.getValueType() == VT) return Op; 856 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 857 VT.getSizeInBits()); 858 return getNode(ISD::AND, Op.getValueType(), Op, 859 getConstant(Imm, Op.getValueType())); 860} 861 862SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 863 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 864 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 865} 866 867SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 868 return getConstant(*ConstantInt::get(Val), VT, isT); 869} 870 871SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) { 872 assert(VT.isInteger() && "Cannot create FP integer constant!"); 873 874 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 875 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 876 "APInt size does not match type size!"); 877 878 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 879 FoldingSetNodeID ID; 880 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 881 ID.AddPointer(&Val); 882 void *IP = 0; 883 SDNode *N = NULL; 884 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 885 if (!VT.isVector()) 886 return SDValue(N, 0); 887 if (!N) { 888 N = NodeAllocator.Allocate<ConstantSDNode>(); 889 new (N) ConstantSDNode(isT, &Val, EltVT); 890 CSEMap.InsertNode(N, IP); 891 AllNodes.push_back(N); 892 } 893 894 SDValue Result(N, 0); 895 if (VT.isVector()) { 896 SmallVector<SDValue, 8> Ops; 897 Ops.assign(VT.getVectorNumElements(), Result); 898 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 899 } 900 return Result; 901} 902 903SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 904 return getConstant(Val, TLI.getPointerTy(), isTarget); 905} 906 907 908SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 909 return getConstantFP(*ConstantFP::get(V), VT, isTarget); 910} 911 912SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){ 913 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 914 915 MVT EltVT = 916 VT.isVector() ? VT.getVectorElementType() : VT; 917 918 // Do the map lookup using the actual bit pattern for the floating point 919 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 920 // we don't have issues with SNANs. 921 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 922 FoldingSetNodeID ID; 923 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 924 ID.AddPointer(&V); 925 void *IP = 0; 926 SDNode *N = NULL; 927 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 928 if (!VT.isVector()) 929 return SDValue(N, 0); 930 if (!N) { 931 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 932 new (N) ConstantFPSDNode(isTarget, &V, EltVT); 933 CSEMap.InsertNode(N, IP); 934 AllNodes.push_back(N); 935 } 936 937 SDValue Result(N, 0); 938 if (VT.isVector()) { 939 SmallVector<SDValue, 8> Ops; 940 Ops.assign(VT.getVectorNumElements(), Result); 941 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 942 } 943 return Result; 944} 945 946SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 947 MVT EltVT = 948 VT.isVector() ? VT.getVectorElementType() : VT; 949 if (EltVT==MVT::f32) 950 return getConstantFP(APFloat((float)Val), VT, isTarget); 951 else 952 return getConstantFP(APFloat(Val), VT, isTarget); 953} 954 955SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 956 MVT VT, int64_t Offset, 957 bool isTargetGA) { 958 unsigned Opc; 959 960 // Truncate (with sign-extension) the offset value to the pointer size. 961 unsigned BitWidth = TLI.getPointerTy().getSizeInBits(); 962 if (BitWidth < 64) 963 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 964 965 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 966 if (!GVar) { 967 // If GV is an alias then use the aliasee for determining thread-localness. 968 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 969 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 970 } 971 972 if (GVar && GVar->isThreadLocal()) 973 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 974 else 975 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 976 977 FoldingSetNodeID ID; 978 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 979 ID.AddPointer(GV); 980 ID.AddInteger(Offset); 981 void *IP = 0; 982 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 983 return SDValue(E, 0); 984 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 985 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 986 CSEMap.InsertNode(N, IP); 987 AllNodes.push_back(N); 988 return SDValue(N, 0); 989} 990 991SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 992 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 993 FoldingSetNodeID ID; 994 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 995 ID.AddInteger(FI); 996 void *IP = 0; 997 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 998 return SDValue(E, 0); 999 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 1000 new (N) FrameIndexSDNode(FI, VT, isTarget); 1001 CSEMap.InsertNode(N, IP); 1002 AllNodes.push_back(N); 1003 return SDValue(N, 0); 1004} 1005 1006SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 1007 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1008 FoldingSetNodeID ID; 1009 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1010 ID.AddInteger(JTI); 1011 void *IP = 0; 1012 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1013 return SDValue(E, 0); 1014 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 1015 new (N) JumpTableSDNode(JTI, VT, isTarget); 1016 CSEMap.InsertNode(N, IP); 1017 AllNodes.push_back(N); 1018 return SDValue(N, 0); 1019} 1020 1021SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 1022 unsigned Alignment, int Offset, 1023 bool isTarget) { 1024 if (Alignment == 0) 1025 Alignment = 1026 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1027 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1028 FoldingSetNodeID ID; 1029 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1030 ID.AddInteger(Alignment); 1031 ID.AddInteger(Offset); 1032 ID.AddPointer(C); 1033 void *IP = 0; 1034 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1035 return SDValue(E, 0); 1036 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1037 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1038 CSEMap.InsertNode(N, IP); 1039 AllNodes.push_back(N); 1040 return SDValue(N, 0); 1041} 1042 1043 1044SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 1045 unsigned Alignment, int Offset, 1046 bool isTarget) { 1047 if (Alignment == 0) 1048 Alignment = 1049 TLI.getTargetData()->getPreferredTypeAlignmentShift(C->getType()); 1050 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1051 FoldingSetNodeID ID; 1052 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1053 ID.AddInteger(Alignment); 1054 ID.AddInteger(Offset); 1055 C->AddSelectionDAGCSEId(ID); 1056 void *IP = 0; 1057 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1058 return SDValue(E, 0); 1059 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 1060 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 1061 CSEMap.InsertNode(N, IP); 1062 AllNodes.push_back(N); 1063 return SDValue(N, 0); 1064} 1065 1066 1067SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1068 FoldingSetNodeID ID; 1069 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1070 ID.AddPointer(MBB); 1071 void *IP = 0; 1072 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1073 return SDValue(E, 0); 1074 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1075 new (N) BasicBlockSDNode(MBB); 1076 CSEMap.InsertNode(N, IP); 1077 AllNodes.push_back(N); 1078 return SDValue(N, 0); 1079} 1080 1081SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1082 FoldingSetNodeID ID; 1083 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1084 ID.AddInteger(Flags.getRawBits()); 1085 void *IP = 0; 1086 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1087 return SDValue(E, 0); 1088 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1089 new (N) ARG_FLAGSSDNode(Flags); 1090 CSEMap.InsertNode(N, IP); 1091 AllNodes.push_back(N); 1092 return SDValue(N, 0); 1093} 1094 1095SDValue SelectionDAG::getValueType(MVT VT) { 1096 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1097 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1098 1099 SDNode *&N = VT.isExtended() ? 1100 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1101 1102 if (N) return SDValue(N, 0); 1103 N = NodeAllocator.Allocate<VTSDNode>(); 1104 new (N) VTSDNode(VT); 1105 AllNodes.push_back(N); 1106 return SDValue(N, 0); 1107} 1108 1109SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1110 SDNode *&N = ExternalSymbols[Sym]; 1111 if (N) return SDValue(N, 0); 1112 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1113 new (N) ExternalSymbolSDNode(false, Sym, VT); 1114 AllNodes.push_back(N); 1115 return SDValue(N, 0); 1116} 1117 1118SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1119 SDNode *&N = TargetExternalSymbols[Sym]; 1120 if (N) return SDValue(N, 0); 1121 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1122 new (N) ExternalSymbolSDNode(true, Sym, VT); 1123 AllNodes.push_back(N); 1124 return SDValue(N, 0); 1125} 1126 1127SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1128 if ((unsigned)Cond >= CondCodeNodes.size()) 1129 CondCodeNodes.resize(Cond+1); 1130 1131 if (CondCodeNodes[Cond] == 0) { 1132 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1133 new (N) CondCodeSDNode(Cond); 1134 CondCodeNodes[Cond] = N; 1135 AllNodes.push_back(N); 1136 } 1137 return SDValue(CondCodeNodes[Cond], 0); 1138} 1139 1140SDValue SelectionDAG::getConvertRndSat(MVT VT, SDValue Val, SDValue DTy, 1141 SDValue STy, SDValue Rnd, SDValue Sat, 1142 ISD::CvtCode Code) { 1143 FoldingSetNodeID ID; 1144 void* IP = 0; 1145 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1146 return SDValue(E, 0); 1147 CvtRndSatSDNode *N = NodeAllocator.Allocate<CvtRndSatSDNode>(); 1148 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1149 new (N) CvtRndSatSDNode(VT, Ops, 5, Code); 1150 CSEMap.InsertNode(N, IP); 1151 AllNodes.push_back(N); 1152 return SDValue(N, 0); 1153} 1154 1155SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1156 FoldingSetNodeID ID; 1157 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1158 ID.AddInteger(RegNo); 1159 void *IP = 0; 1160 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1161 return SDValue(E, 0); 1162 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1163 new (N) RegisterSDNode(RegNo, VT); 1164 CSEMap.InsertNode(N, IP); 1165 AllNodes.push_back(N); 1166 return SDValue(N, 0); 1167} 1168 1169SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1170 unsigned Line, unsigned Col, 1171 const CompileUnitDesc *CU) { 1172 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1173 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1174 AllNodes.push_back(N); 1175 return SDValue(N, 0); 1176} 1177 1178SDValue SelectionDAG::getLabel(unsigned Opcode, 1179 SDValue Root, 1180 unsigned LabelID) { 1181 FoldingSetNodeID ID; 1182 SDValue Ops[] = { Root }; 1183 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1184 ID.AddInteger(LabelID); 1185 void *IP = 0; 1186 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1187 return SDValue(E, 0); 1188 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1189 new (N) LabelSDNode(Opcode, Root, LabelID); 1190 CSEMap.InsertNode(N, IP); 1191 AllNodes.push_back(N); 1192 return SDValue(N, 0); 1193} 1194 1195SDValue SelectionDAG::getSrcValue(const Value *V) { 1196 assert((!V || isa<PointerType>(V->getType())) && 1197 "SrcValue is not a pointer?"); 1198 1199 FoldingSetNodeID ID; 1200 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1201 ID.AddPointer(V); 1202 1203 void *IP = 0; 1204 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1205 return SDValue(E, 0); 1206 1207 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1208 new (N) SrcValueSDNode(V); 1209 CSEMap.InsertNode(N, IP); 1210 AllNodes.push_back(N); 1211 return SDValue(N, 0); 1212} 1213 1214SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1215 const Value *v = MO.getValue(); 1216 assert((!v || isa<PointerType>(v->getType())) && 1217 "SrcValue is not a pointer?"); 1218 1219 FoldingSetNodeID ID; 1220 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1221 MO.Profile(ID); 1222 1223 void *IP = 0; 1224 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1225 return SDValue(E, 0); 1226 1227 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1228 new (N) MemOperandSDNode(MO); 1229 CSEMap.InsertNode(N, IP); 1230 AllNodes.push_back(N); 1231 return SDValue(N, 0); 1232} 1233 1234/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1235/// specified value type. 1236SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1237 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1238 unsigned ByteSize = VT.getSizeInBits()/8; 1239 const Type *Ty = VT.getTypeForMVT(); 1240 unsigned StackAlign = 1241 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1242 1243 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1244 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1245} 1246 1247SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1248 SDValue N2, ISD::CondCode Cond) { 1249 // These setcc operations always fold. 1250 switch (Cond) { 1251 default: break; 1252 case ISD::SETFALSE: 1253 case ISD::SETFALSE2: return getConstant(0, VT); 1254 case ISD::SETTRUE: 1255 case ISD::SETTRUE2: return getConstant(1, VT); 1256 1257 case ISD::SETOEQ: 1258 case ISD::SETOGT: 1259 case ISD::SETOGE: 1260 case ISD::SETOLT: 1261 case ISD::SETOLE: 1262 case ISD::SETONE: 1263 case ISD::SETO: 1264 case ISD::SETUO: 1265 case ISD::SETUEQ: 1266 case ISD::SETUNE: 1267 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1268 break; 1269 } 1270 1271 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1272 const APInt &C2 = N2C->getAPIntValue(); 1273 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1274 const APInt &C1 = N1C->getAPIntValue(); 1275 1276 switch (Cond) { 1277 default: assert(0 && "Unknown integer setcc!"); 1278 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1279 case ISD::SETNE: return getConstant(C1 != C2, VT); 1280 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1281 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1282 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1283 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1284 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1285 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1286 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1287 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1288 } 1289 } 1290 } 1291 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1292 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1293 // No compile time operations on this type yet. 1294 if (N1C->getValueType(0) == MVT::ppcf128) 1295 return SDValue(); 1296 1297 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1298 switch (Cond) { 1299 default: break; 1300 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1301 return getNode(ISD::UNDEF, VT); 1302 // fall through 1303 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1304 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1305 return getNode(ISD::UNDEF, VT); 1306 // fall through 1307 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1308 R==APFloat::cmpLessThan, VT); 1309 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1310 return getNode(ISD::UNDEF, VT); 1311 // fall through 1312 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1313 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1314 return getNode(ISD::UNDEF, VT); 1315 // fall through 1316 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1317 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1318 return getNode(ISD::UNDEF, VT); 1319 // fall through 1320 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1321 R==APFloat::cmpEqual, VT); 1322 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1323 return getNode(ISD::UNDEF, VT); 1324 // fall through 1325 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1326 R==APFloat::cmpEqual, VT); 1327 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1328 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1329 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1330 R==APFloat::cmpEqual, VT); 1331 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1332 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1333 R==APFloat::cmpLessThan, VT); 1334 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1335 R==APFloat::cmpUnordered, VT); 1336 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1337 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1338 } 1339 } else { 1340 // Ensure that the constant occurs on the RHS. 1341 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1342 } 1343 } 1344 1345 // Could not fold it. 1346 return SDValue(); 1347} 1348 1349/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1350/// use this predicate to simplify operations downstream. 1351bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1352 unsigned BitWidth = Op.getValueSizeInBits(); 1353 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1354} 1355 1356/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1357/// this predicate to simplify operations downstream. Mask is known to be zero 1358/// for bits that V cannot have. 1359bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1360 unsigned Depth) const { 1361 APInt KnownZero, KnownOne; 1362 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1363 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1364 return (KnownZero & Mask) == Mask; 1365} 1366 1367/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1368/// known to be either zero or one and return them in the KnownZero/KnownOne 1369/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1370/// processing. 1371void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1372 APInt &KnownZero, APInt &KnownOne, 1373 unsigned Depth) const { 1374 unsigned BitWidth = Mask.getBitWidth(); 1375 assert(BitWidth == Op.getValueType().getSizeInBits() && 1376 "Mask size mismatches value type size!"); 1377 1378 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1379 if (Depth == 6 || Mask == 0) 1380 return; // Limit search depth. 1381 1382 APInt KnownZero2, KnownOne2; 1383 1384 switch (Op.getOpcode()) { 1385 case ISD::Constant: 1386 // We know all of the bits for a constant! 1387 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1388 KnownZero = ~KnownOne & Mask; 1389 return; 1390 case ISD::AND: 1391 // If either the LHS or the RHS are Zero, the result is zero. 1392 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1393 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1394 KnownZero2, KnownOne2, Depth+1); 1395 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1396 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1397 1398 // Output known-1 bits are only known if set in both the LHS & RHS. 1399 KnownOne &= KnownOne2; 1400 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1401 KnownZero |= KnownZero2; 1402 return; 1403 case ISD::OR: 1404 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1405 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1406 KnownZero2, KnownOne2, Depth+1); 1407 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1408 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1409 1410 // Output known-0 bits are only known if clear in both the LHS & RHS. 1411 KnownZero &= KnownZero2; 1412 // Output known-1 are known to be set if set in either the LHS | RHS. 1413 KnownOne |= KnownOne2; 1414 return; 1415 case ISD::XOR: { 1416 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1417 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1418 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1419 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1420 1421 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1422 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1423 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1424 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1425 KnownZero = KnownZeroOut; 1426 return; 1427 } 1428 case ISD::MUL: { 1429 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1430 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1431 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1432 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1433 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1434 1435 // If low bits are zero in either operand, output low known-0 bits. 1436 // Also compute a conserative estimate for high known-0 bits. 1437 // More trickiness is possible, but this is sufficient for the 1438 // interesting case of alignment computation. 1439 KnownOne.clear(); 1440 unsigned TrailZ = KnownZero.countTrailingOnes() + 1441 KnownZero2.countTrailingOnes(); 1442 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1443 KnownZero2.countLeadingOnes(), 1444 BitWidth) - BitWidth; 1445 1446 TrailZ = std::min(TrailZ, BitWidth); 1447 LeadZ = std::min(LeadZ, BitWidth); 1448 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1449 APInt::getHighBitsSet(BitWidth, LeadZ); 1450 KnownZero &= Mask; 1451 return; 1452 } 1453 case ISD::UDIV: { 1454 // For the purposes of computing leading zeros we can conservatively 1455 // treat a udiv as a logical right shift by the power of 2 known to 1456 // be less than the denominator. 1457 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1458 ComputeMaskedBits(Op.getOperand(0), 1459 AllOnes, KnownZero2, KnownOne2, Depth+1); 1460 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1461 1462 KnownOne2.clear(); 1463 KnownZero2.clear(); 1464 ComputeMaskedBits(Op.getOperand(1), 1465 AllOnes, KnownZero2, KnownOne2, Depth+1); 1466 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1467 if (RHSUnknownLeadingOnes != BitWidth) 1468 LeadZ = std::min(BitWidth, 1469 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1470 1471 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1472 return; 1473 } 1474 case ISD::SELECT: 1475 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1476 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1477 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1478 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1479 1480 // Only known if known in both the LHS and RHS. 1481 KnownOne &= KnownOne2; 1482 KnownZero &= KnownZero2; 1483 return; 1484 case ISD::SELECT_CC: 1485 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1486 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1487 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1488 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1489 1490 // Only known if known in both the LHS and RHS. 1491 KnownOne &= KnownOne2; 1492 KnownZero &= KnownZero2; 1493 return; 1494 case ISD::SETCC: 1495 // If we know the result of a setcc has the top bits zero, use this info. 1496 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult && 1497 BitWidth > 1) 1498 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1499 return; 1500 case ISD::SHL: 1501 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1502 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1503 unsigned ShAmt = SA->getZExtValue(); 1504 1505 // If the shift count is an invalid immediate, don't do anything. 1506 if (ShAmt >= BitWidth) 1507 return; 1508 1509 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1510 KnownZero, KnownOne, Depth+1); 1511 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1512 KnownZero <<= ShAmt; 1513 KnownOne <<= ShAmt; 1514 // low bits known zero. 1515 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1516 } 1517 return; 1518 case ISD::SRL: 1519 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1520 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1521 unsigned ShAmt = SA->getZExtValue(); 1522 1523 // If the shift count is an invalid immediate, don't do anything. 1524 if (ShAmt >= BitWidth) 1525 return; 1526 1527 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1528 KnownZero, KnownOne, Depth+1); 1529 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1530 KnownZero = KnownZero.lshr(ShAmt); 1531 KnownOne = KnownOne.lshr(ShAmt); 1532 1533 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1534 KnownZero |= HighBits; // High bits known zero. 1535 } 1536 return; 1537 case ISD::SRA: 1538 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1539 unsigned ShAmt = SA->getZExtValue(); 1540 1541 // If the shift count is an invalid immediate, don't do anything. 1542 if (ShAmt >= BitWidth) 1543 return; 1544 1545 APInt InDemandedMask = (Mask << ShAmt); 1546 // If any of the demanded bits are produced by the sign extension, we also 1547 // demand the input sign bit. 1548 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1549 if (HighBits.getBoolValue()) 1550 InDemandedMask |= APInt::getSignBit(BitWidth); 1551 1552 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1553 Depth+1); 1554 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1555 KnownZero = KnownZero.lshr(ShAmt); 1556 KnownOne = KnownOne.lshr(ShAmt); 1557 1558 // Handle the sign bits. 1559 APInt SignBit = APInt::getSignBit(BitWidth); 1560 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1561 1562 if (KnownZero.intersects(SignBit)) { 1563 KnownZero |= HighBits; // New bits are known zero. 1564 } else if (KnownOne.intersects(SignBit)) { 1565 KnownOne |= HighBits; // New bits are known one. 1566 } 1567 } 1568 return; 1569 case ISD::SIGN_EXTEND_INREG: { 1570 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1571 unsigned EBits = EVT.getSizeInBits(); 1572 1573 // Sign extension. Compute the demanded bits in the result that are not 1574 // present in the input. 1575 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1576 1577 APInt InSignBit = APInt::getSignBit(EBits); 1578 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1579 1580 // If the sign extended bits are demanded, we know that the sign 1581 // bit is demanded. 1582 InSignBit.zext(BitWidth); 1583 if (NewBits.getBoolValue()) 1584 InputDemandedBits |= InSignBit; 1585 1586 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1587 KnownZero, KnownOne, Depth+1); 1588 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1589 1590 // If the sign bit of the input is known set or clear, then we know the 1591 // top bits of the result. 1592 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1593 KnownZero |= NewBits; 1594 KnownOne &= ~NewBits; 1595 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1596 KnownOne |= NewBits; 1597 KnownZero &= ~NewBits; 1598 } else { // Input sign bit unknown 1599 KnownZero &= ~NewBits; 1600 KnownOne &= ~NewBits; 1601 } 1602 return; 1603 } 1604 case ISD::CTTZ: 1605 case ISD::CTLZ: 1606 case ISD::CTPOP: { 1607 unsigned LowBits = Log2_32(BitWidth)+1; 1608 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1609 KnownOne.clear(); 1610 return; 1611 } 1612 case ISD::LOAD: { 1613 if (ISD::isZEXTLoad(Op.getNode())) { 1614 LoadSDNode *LD = cast<LoadSDNode>(Op); 1615 MVT VT = LD->getMemoryVT(); 1616 unsigned MemBits = VT.getSizeInBits(); 1617 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1618 } 1619 return; 1620 } 1621 case ISD::ZERO_EXTEND: { 1622 MVT InVT = Op.getOperand(0).getValueType(); 1623 unsigned InBits = InVT.getSizeInBits(); 1624 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1625 APInt InMask = Mask; 1626 InMask.trunc(InBits); 1627 KnownZero.trunc(InBits); 1628 KnownOne.trunc(InBits); 1629 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1630 KnownZero.zext(BitWidth); 1631 KnownOne.zext(BitWidth); 1632 KnownZero |= NewBits; 1633 return; 1634 } 1635 case ISD::SIGN_EXTEND: { 1636 MVT InVT = Op.getOperand(0).getValueType(); 1637 unsigned InBits = InVT.getSizeInBits(); 1638 APInt InSignBit = APInt::getSignBit(InBits); 1639 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1640 APInt InMask = Mask; 1641 InMask.trunc(InBits); 1642 1643 // If any of the sign extended bits are demanded, we know that the sign 1644 // bit is demanded. Temporarily set this bit in the mask for our callee. 1645 if (NewBits.getBoolValue()) 1646 InMask |= InSignBit; 1647 1648 KnownZero.trunc(InBits); 1649 KnownOne.trunc(InBits); 1650 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1651 1652 // Note if the sign bit is known to be zero or one. 1653 bool SignBitKnownZero = KnownZero.isNegative(); 1654 bool SignBitKnownOne = KnownOne.isNegative(); 1655 assert(!(SignBitKnownZero && SignBitKnownOne) && 1656 "Sign bit can't be known to be both zero and one!"); 1657 1658 // If the sign bit wasn't actually demanded by our caller, we don't 1659 // want it set in the KnownZero and KnownOne result values. Reset the 1660 // mask and reapply it to the result values. 1661 InMask = Mask; 1662 InMask.trunc(InBits); 1663 KnownZero &= InMask; 1664 KnownOne &= InMask; 1665 1666 KnownZero.zext(BitWidth); 1667 KnownOne.zext(BitWidth); 1668 1669 // If the sign bit is known zero or one, the top bits match. 1670 if (SignBitKnownZero) 1671 KnownZero |= NewBits; 1672 else if (SignBitKnownOne) 1673 KnownOne |= NewBits; 1674 return; 1675 } 1676 case ISD::ANY_EXTEND: { 1677 MVT InVT = Op.getOperand(0).getValueType(); 1678 unsigned InBits = InVT.getSizeInBits(); 1679 APInt InMask = Mask; 1680 InMask.trunc(InBits); 1681 KnownZero.trunc(InBits); 1682 KnownOne.trunc(InBits); 1683 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1684 KnownZero.zext(BitWidth); 1685 KnownOne.zext(BitWidth); 1686 return; 1687 } 1688 case ISD::TRUNCATE: { 1689 MVT InVT = Op.getOperand(0).getValueType(); 1690 unsigned InBits = InVT.getSizeInBits(); 1691 APInt InMask = Mask; 1692 InMask.zext(InBits); 1693 KnownZero.zext(InBits); 1694 KnownOne.zext(InBits); 1695 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1696 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1697 KnownZero.trunc(BitWidth); 1698 KnownOne.trunc(BitWidth); 1699 break; 1700 } 1701 case ISD::AssertZext: { 1702 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1703 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1704 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1705 KnownOne, Depth+1); 1706 KnownZero |= (~InMask) & Mask; 1707 return; 1708 } 1709 case ISD::FGETSIGN: 1710 // All bits are zero except the low bit. 1711 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1712 return; 1713 1714 case ISD::SUB: { 1715 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1716 // We know that the top bits of C-X are clear if X contains less bits 1717 // than C (i.e. no wrap-around can happen). For example, 20-X is 1718 // positive if we can prove that X is >= 0 and < 16. 1719 if (CLHS->getAPIntValue().isNonNegative()) { 1720 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1721 // NLZ can't be BitWidth with no sign bit 1722 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1723 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1724 Depth+1); 1725 1726 // If all of the MaskV bits are known to be zero, then we know the 1727 // output top bits are zero, because we now know that the output is 1728 // from [0-C]. 1729 if ((KnownZero2 & MaskV) == MaskV) { 1730 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1731 // Top bits known zero. 1732 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1733 } 1734 } 1735 } 1736 } 1737 // fall through 1738 case ISD::ADD: { 1739 // Output known-0 bits are known if clear or set in both the low clear bits 1740 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1741 // low 3 bits clear. 1742 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1743 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1744 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1745 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1746 1747 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1748 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1749 KnownZeroOut = std::min(KnownZeroOut, 1750 KnownZero2.countTrailingOnes()); 1751 1752 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1753 return; 1754 } 1755 case ISD::SREM: 1756 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1757 const APInt &RA = Rem->getAPIntValue(); 1758 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1759 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1760 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1761 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1762 1763 // If the sign bit of the first operand is zero, the sign bit of 1764 // the result is zero. If the first operand has no one bits below 1765 // the second operand's single 1 bit, its sign will be zero. 1766 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1767 KnownZero2 |= ~LowBits; 1768 1769 KnownZero |= KnownZero2 & Mask; 1770 1771 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1772 } 1773 } 1774 return; 1775 case ISD::UREM: { 1776 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1777 const APInt &RA = Rem->getAPIntValue(); 1778 if (RA.isPowerOf2()) { 1779 APInt LowBits = (RA - 1); 1780 APInt Mask2 = LowBits & Mask; 1781 KnownZero |= ~LowBits & Mask; 1782 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1783 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1784 break; 1785 } 1786 } 1787 1788 // Since the result is less than or equal to either operand, any leading 1789 // zero bits in either operand must also exist in the result. 1790 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1791 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1792 Depth+1); 1793 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1794 Depth+1); 1795 1796 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1797 KnownZero2.countLeadingOnes()); 1798 KnownOne.clear(); 1799 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1800 return; 1801 } 1802 default: 1803 // Allow the target to implement this method for its nodes. 1804 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1805 case ISD::INTRINSIC_WO_CHAIN: 1806 case ISD::INTRINSIC_W_CHAIN: 1807 case ISD::INTRINSIC_VOID: 1808 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1809 } 1810 return; 1811 } 1812} 1813 1814/// ComputeNumSignBits - Return the number of times the sign bit of the 1815/// register is replicated into the other bits. We know that at least 1 bit 1816/// is always equal to the sign bit (itself), but other cases can give us 1817/// information. For example, immediately after an "SRA X, 2", we know that 1818/// the top 3 bits are all equal to each other, so we return 3. 1819unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1820 MVT VT = Op.getValueType(); 1821 assert(VT.isInteger() && "Invalid VT!"); 1822 unsigned VTBits = VT.getSizeInBits(); 1823 unsigned Tmp, Tmp2; 1824 unsigned FirstAnswer = 1; 1825 1826 if (Depth == 6) 1827 return 1; // Limit search depth. 1828 1829 switch (Op.getOpcode()) { 1830 default: break; 1831 case ISD::AssertSext: 1832 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1833 return VTBits-Tmp+1; 1834 case ISD::AssertZext: 1835 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1836 return VTBits-Tmp; 1837 1838 case ISD::Constant: { 1839 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1840 // If negative, return # leading ones. 1841 if (Val.isNegative()) 1842 return Val.countLeadingOnes(); 1843 1844 // Return # leading zeros. 1845 return Val.countLeadingZeros(); 1846 } 1847 1848 case ISD::SIGN_EXTEND: 1849 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1850 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1851 1852 case ISD::SIGN_EXTEND_INREG: 1853 // Max of the input and what this extends. 1854 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1855 Tmp = VTBits-Tmp+1; 1856 1857 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1858 return std::max(Tmp, Tmp2); 1859 1860 case ISD::SRA: 1861 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1862 // SRA X, C -> adds C sign bits. 1863 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1864 Tmp += C->getZExtValue(); 1865 if (Tmp > VTBits) Tmp = VTBits; 1866 } 1867 return Tmp; 1868 case ISD::SHL: 1869 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1870 // shl destroys sign bits. 1871 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1872 if (C->getZExtValue() >= VTBits || // Bad shift. 1873 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 1874 return Tmp - C->getZExtValue(); 1875 } 1876 break; 1877 case ISD::AND: 1878 case ISD::OR: 1879 case ISD::XOR: // NOT is handled here. 1880 // Logical binary ops preserve the number of sign bits at the worst. 1881 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1882 if (Tmp != 1) { 1883 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1884 FirstAnswer = std::min(Tmp, Tmp2); 1885 // We computed what we know about the sign bits as our first 1886 // answer. Now proceed to the generic code that uses 1887 // ComputeMaskedBits, and pick whichever answer is better. 1888 } 1889 break; 1890 1891 case ISD::SELECT: 1892 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1893 if (Tmp == 1) return 1; // Early out. 1894 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1895 return std::min(Tmp, Tmp2); 1896 1897 case ISD::SETCC: 1898 // If setcc returns 0/-1, all bits are sign bits. 1899 if (TLI.getSetCCResultContents() == 1900 TargetLowering::ZeroOrNegativeOneSetCCResult) 1901 return VTBits; 1902 break; 1903 case ISD::ROTL: 1904 case ISD::ROTR: 1905 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1906 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 1907 1908 // Handle rotate right by N like a rotate left by 32-N. 1909 if (Op.getOpcode() == ISD::ROTR) 1910 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1911 1912 // If we aren't rotating out all of the known-in sign bits, return the 1913 // number that are left. This handles rotl(sext(x), 1) for example. 1914 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1915 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1916 } 1917 break; 1918 case ISD::ADD: 1919 // Add can have at most one carry bit. Thus we know that the output 1920 // is, at worst, one more bit than the inputs. 1921 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1922 if (Tmp == 1) return 1; // Early out. 1923 1924 // Special case decrementing a value (ADD X, -1): 1925 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1926 if (CRHS->isAllOnesValue()) { 1927 APInt KnownZero, KnownOne; 1928 APInt Mask = APInt::getAllOnesValue(VTBits); 1929 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1930 1931 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1932 // sign bits set. 1933 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1934 return VTBits; 1935 1936 // If we are subtracting one from a positive number, there is no carry 1937 // out of the result. 1938 if (KnownZero.isNegative()) 1939 return Tmp; 1940 } 1941 1942 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1943 if (Tmp2 == 1) return 1; 1944 return std::min(Tmp, Tmp2)-1; 1945 break; 1946 1947 case ISD::SUB: 1948 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1949 if (Tmp2 == 1) return 1; 1950 1951 // Handle NEG. 1952 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1953 if (CLHS->isNullValue()) { 1954 APInt KnownZero, KnownOne; 1955 APInt Mask = APInt::getAllOnesValue(VTBits); 1956 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1957 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1958 // sign bits set. 1959 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1960 return VTBits; 1961 1962 // If the input is known to be positive (the sign bit is known clear), 1963 // the output of the NEG has the same number of sign bits as the input. 1964 if (KnownZero.isNegative()) 1965 return Tmp2; 1966 1967 // Otherwise, we treat this like a SUB. 1968 } 1969 1970 // Sub can have at most one carry bit. Thus we know that the output 1971 // is, at worst, one more bit than the inputs. 1972 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1973 if (Tmp == 1) return 1; // Early out. 1974 return std::min(Tmp, Tmp2)-1; 1975 break; 1976 case ISD::TRUNCATE: 1977 // FIXME: it's tricky to do anything useful for this, but it is an important 1978 // case for targets like X86. 1979 break; 1980 } 1981 1982 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1983 if (Op.getOpcode() == ISD::LOAD) { 1984 LoadSDNode *LD = cast<LoadSDNode>(Op); 1985 unsigned ExtType = LD->getExtensionType(); 1986 switch (ExtType) { 1987 default: break; 1988 case ISD::SEXTLOAD: // '17' bits known 1989 Tmp = LD->getMemoryVT().getSizeInBits(); 1990 return VTBits-Tmp+1; 1991 case ISD::ZEXTLOAD: // '16' bits known 1992 Tmp = LD->getMemoryVT().getSizeInBits(); 1993 return VTBits-Tmp; 1994 } 1995 } 1996 1997 // Allow the target to implement this method for its nodes. 1998 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 1999 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2000 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2001 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2002 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2003 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2004 } 2005 2006 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2007 // use this information. 2008 APInt KnownZero, KnownOne; 2009 APInt Mask = APInt::getAllOnesValue(VTBits); 2010 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2011 2012 if (KnownZero.isNegative()) { // sign bit is 0 2013 Mask = KnownZero; 2014 } else if (KnownOne.isNegative()) { // sign bit is 1; 2015 Mask = KnownOne; 2016 } else { 2017 // Nothing known. 2018 return FirstAnswer; 2019 } 2020 2021 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2022 // the number of identical bits in the top of the input value. 2023 Mask = ~Mask; 2024 Mask <<= Mask.getBitWidth()-VTBits; 2025 // Return # leading zeros. We use 'min' here in case Val was zero before 2026 // shifting. We don't want to return '64' as for an i32 "0". 2027 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2028} 2029 2030 2031bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2032 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2033 if (!GA) return false; 2034 if (GA->getOffset() != 0) return false; 2035 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2036 if (!GV) return false; 2037 MachineModuleInfo *MMI = getMachineModuleInfo(); 2038 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV); 2039} 2040 2041 2042/// getShuffleScalarElt - Returns the scalar element that will make up the ith 2043/// element of the result of the vector shuffle. 2044SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 2045 MVT VT = N->getValueType(0); 2046 SDValue PermMask = N->getOperand(2); 2047 SDValue Idx = PermMask.getOperand(i); 2048 if (Idx.getOpcode() == ISD::UNDEF) 2049 return getNode(ISD::UNDEF, VT.getVectorElementType()); 2050 unsigned Index = cast<ConstantSDNode>(Idx)->getZExtValue(); 2051 unsigned NumElems = PermMask.getNumOperands(); 2052 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 2053 Index %= NumElems; 2054 2055 if (V.getOpcode() == ISD::BIT_CONVERT) { 2056 V = V.getOperand(0); 2057 if (V.getValueType().getVectorNumElements() != NumElems) 2058 return SDValue(); 2059 } 2060 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 2061 return (Index == 0) ? V.getOperand(0) 2062 : getNode(ISD::UNDEF, VT.getVectorElementType()); 2063 if (V.getOpcode() == ISD::BUILD_VECTOR) 2064 return V.getOperand(Index); 2065 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 2066 return getShuffleScalarElt(V.getNode(), Index); 2067 return SDValue(); 2068} 2069 2070 2071/// getNode - Gets or creates the specified node. 2072/// 2073SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 2074 FoldingSetNodeID ID; 2075 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2076 void *IP = 0; 2077 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2078 return SDValue(E, 0); 2079 SDNode *N = NodeAllocator.Allocate<SDNode>(); 2080 new (N) SDNode(Opcode, SDNode::getSDVTList(VT)); 2081 CSEMap.InsertNode(N, IP); 2082 2083 AllNodes.push_back(N); 2084#ifndef NDEBUG 2085 VerifyNode(N); 2086#endif 2087 return SDValue(N, 0); 2088} 2089 2090SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2091 // Constant fold unary operations with an integer constant operand. 2092 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2093 const APInt &Val = C->getAPIntValue(); 2094 unsigned BitWidth = VT.getSizeInBits(); 2095 switch (Opcode) { 2096 default: break; 2097 case ISD::SIGN_EXTEND: 2098 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2099 case ISD::ANY_EXTEND: 2100 case ISD::ZERO_EXTEND: 2101 case ISD::TRUNCATE: 2102 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2103 case ISD::UINT_TO_FP: 2104 case ISD::SINT_TO_FP: { 2105 const uint64_t zero[] = {0, 0}; 2106 // No compile time operations on this type. 2107 if (VT==MVT::ppcf128) 2108 break; 2109 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2110 (void)apf.convertFromAPInt(Val, 2111 Opcode==ISD::SINT_TO_FP, 2112 APFloat::rmNearestTiesToEven); 2113 return getConstantFP(apf, VT); 2114 } 2115 case ISD::BIT_CONVERT: 2116 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2117 return getConstantFP(Val.bitsToFloat(), VT); 2118 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2119 return getConstantFP(Val.bitsToDouble(), VT); 2120 break; 2121 case ISD::BSWAP: 2122 return getConstant(Val.byteSwap(), VT); 2123 case ISD::CTPOP: 2124 return getConstant(Val.countPopulation(), VT); 2125 case ISD::CTLZ: 2126 return getConstant(Val.countLeadingZeros(), VT); 2127 case ISD::CTTZ: 2128 return getConstant(Val.countTrailingZeros(), VT); 2129 } 2130 } 2131 2132 // Constant fold unary operations with a floating point constant operand. 2133 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2134 APFloat V = C->getValueAPF(); // make copy 2135 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2136 switch (Opcode) { 2137 case ISD::FNEG: 2138 V.changeSign(); 2139 return getConstantFP(V, VT); 2140 case ISD::FABS: 2141 V.clearSign(); 2142 return getConstantFP(V, VT); 2143 case ISD::FP_ROUND: 2144 case ISD::FP_EXTEND: { 2145 bool ignored; 2146 // This can return overflow, underflow, or inexact; we don't care. 2147 // FIXME need to be more flexible about rounding mode. 2148 (void)V.convert(*MVTToAPFloatSemantics(VT), 2149 APFloat::rmNearestTiesToEven, &ignored); 2150 return getConstantFP(V, VT); 2151 } 2152 case ISD::FP_TO_SINT: 2153 case ISD::FP_TO_UINT: { 2154 integerPart x; 2155 bool ignored; 2156 assert(integerPartWidth >= 64); 2157 // FIXME need to be more flexible about rounding mode. 2158 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2159 Opcode==ISD::FP_TO_SINT, 2160 APFloat::rmTowardZero, &ignored); 2161 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2162 break; 2163 return getConstant(x, VT); 2164 } 2165 case ISD::BIT_CONVERT: 2166 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2167 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2168 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2169 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2170 break; 2171 } 2172 } 2173 } 2174 2175 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2176 switch (Opcode) { 2177 case ISD::TokenFactor: 2178 case ISD::CONCAT_VECTORS: 2179 return Operand; // Factor or concat of one node? No need. 2180 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2181 case ISD::FP_EXTEND: 2182 assert(VT.isFloatingPoint() && 2183 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2184 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2185 if (Operand.getOpcode() == ISD::UNDEF) 2186 return getNode(ISD::UNDEF, VT); 2187 break; 2188 case ISD::SIGN_EXTEND: 2189 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2190 "Invalid SIGN_EXTEND!"); 2191 if (Operand.getValueType() == VT) return Operand; // noop extension 2192 assert(Operand.getValueType().bitsLT(VT) 2193 && "Invalid sext node, dst < src!"); 2194 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2195 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2196 break; 2197 case ISD::ZERO_EXTEND: 2198 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2199 "Invalid ZERO_EXTEND!"); 2200 if (Operand.getValueType() == VT) return Operand; // noop extension 2201 assert(Operand.getValueType().bitsLT(VT) 2202 && "Invalid zext node, dst < src!"); 2203 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2204 return getNode(ISD::ZERO_EXTEND, VT, Operand.getNode()->getOperand(0)); 2205 break; 2206 case ISD::ANY_EXTEND: 2207 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2208 "Invalid ANY_EXTEND!"); 2209 if (Operand.getValueType() == VT) return Operand; // noop extension 2210 assert(Operand.getValueType().bitsLT(VT) 2211 && "Invalid anyext node, dst < src!"); 2212 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2213 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2214 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2215 break; 2216 case ISD::TRUNCATE: 2217 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2218 "Invalid TRUNCATE!"); 2219 if (Operand.getValueType() == VT) return Operand; // noop truncate 2220 assert(Operand.getValueType().bitsGT(VT) 2221 && "Invalid truncate node, src < dst!"); 2222 if (OpOpcode == ISD::TRUNCATE) 2223 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2224 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2225 OpOpcode == ISD::ANY_EXTEND) { 2226 // If the source is smaller than the dest, we still need an extend. 2227 if (Operand.getNode()->getOperand(0).getValueType().bitsLT(VT)) 2228 return getNode(OpOpcode, VT, Operand.getNode()->getOperand(0)); 2229 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2230 return getNode(ISD::TRUNCATE, VT, Operand.getNode()->getOperand(0)); 2231 else 2232 return Operand.getNode()->getOperand(0); 2233 } 2234 break; 2235 case ISD::BIT_CONVERT: 2236 // Basic sanity checking. 2237 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2238 && "Cannot BIT_CONVERT between types of different sizes!"); 2239 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2240 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2241 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2242 if (OpOpcode == ISD::UNDEF) 2243 return getNode(ISD::UNDEF, VT); 2244 break; 2245 case ISD::SCALAR_TO_VECTOR: 2246 assert(VT.isVector() && !Operand.getValueType().isVector() && 2247 VT.getVectorElementType() == Operand.getValueType() && 2248 "Illegal SCALAR_TO_VECTOR node!"); 2249 if (OpOpcode == ISD::UNDEF) 2250 return getNode(ISD::UNDEF, VT); 2251 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2252 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2253 isa<ConstantSDNode>(Operand.getOperand(1)) && 2254 Operand.getConstantOperandVal(1) == 0 && 2255 Operand.getOperand(0).getValueType() == VT) 2256 return Operand.getOperand(0); 2257 break; 2258 case ISD::FNEG: 2259 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2260 return getNode(ISD::FSUB, VT, Operand.getNode()->getOperand(1), 2261 Operand.getNode()->getOperand(0)); 2262 if (OpOpcode == ISD::FNEG) // --X -> X 2263 return Operand.getNode()->getOperand(0); 2264 break; 2265 case ISD::FABS: 2266 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2267 return getNode(ISD::FABS, VT, Operand.getNode()->getOperand(0)); 2268 break; 2269 } 2270 2271 SDNode *N; 2272 SDVTList VTs = getVTList(VT); 2273 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2274 FoldingSetNodeID ID; 2275 SDValue Ops[1] = { Operand }; 2276 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2277 void *IP = 0; 2278 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2279 return SDValue(E, 0); 2280 N = NodeAllocator.Allocate<UnarySDNode>(); 2281 new (N) UnarySDNode(Opcode, VTs, Operand); 2282 CSEMap.InsertNode(N, IP); 2283 } else { 2284 N = NodeAllocator.Allocate<UnarySDNode>(); 2285 new (N) UnarySDNode(Opcode, VTs, Operand); 2286 } 2287 2288 AllNodes.push_back(N); 2289#ifndef NDEBUG 2290 VerifyNode(N); 2291#endif 2292 return SDValue(N, 0); 2293} 2294 2295SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2296 MVT VT, 2297 ConstantSDNode *Cst1, 2298 ConstantSDNode *Cst2) { 2299 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2300 2301 switch (Opcode) { 2302 case ISD::ADD: return getConstant(C1 + C2, VT); 2303 case ISD::SUB: return getConstant(C1 - C2, VT); 2304 case ISD::MUL: return getConstant(C1 * C2, VT); 2305 case ISD::UDIV: 2306 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2307 break; 2308 case ISD::UREM: 2309 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2310 break; 2311 case ISD::SDIV: 2312 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2313 break; 2314 case ISD::SREM: 2315 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2316 break; 2317 case ISD::AND: return getConstant(C1 & C2, VT); 2318 case ISD::OR: return getConstant(C1 | C2, VT); 2319 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2320 case ISD::SHL: return getConstant(C1 << C2, VT); 2321 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2322 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2323 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2324 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2325 default: break; 2326 } 2327 2328 return SDValue(); 2329} 2330 2331SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2332 SDValue N1, SDValue N2) { 2333 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2334 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2335 switch (Opcode) { 2336 default: break; 2337 case ISD::TokenFactor: 2338 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2339 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2340 // Fold trivial token factors. 2341 if (N1.getOpcode() == ISD::EntryToken) return N2; 2342 if (N2.getOpcode() == ISD::EntryToken) return N1; 2343 if (N1 == N2) return N1; 2344 break; 2345 case ISD::CONCAT_VECTORS: 2346 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2347 // one big BUILD_VECTOR. 2348 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2349 N2.getOpcode() == ISD::BUILD_VECTOR) { 2350 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2351 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2352 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2353 } 2354 break; 2355 case ISD::AND: 2356 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2357 N1.getValueType() == VT && "Binary operator types must match!"); 2358 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2359 // worth handling here. 2360 if (N2C && N2C->isNullValue()) 2361 return N2; 2362 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2363 return N1; 2364 break; 2365 case ISD::OR: 2366 case ISD::XOR: 2367 case ISD::ADD: 2368 case ISD::SUB: 2369 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2370 N1.getValueType() == VT && "Binary operator types must match!"); 2371 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2372 // it's worth handling here. 2373 if (N2C && N2C->isNullValue()) 2374 return N1; 2375 break; 2376 case ISD::UDIV: 2377 case ISD::UREM: 2378 case ISD::MULHU: 2379 case ISD::MULHS: 2380 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2381 // fall through 2382 case ISD::MUL: 2383 case ISD::SDIV: 2384 case ISD::SREM: 2385 case ISD::FADD: 2386 case ISD::FSUB: 2387 case ISD::FMUL: 2388 case ISD::FDIV: 2389 case ISD::FREM: 2390 assert(N1.getValueType() == N2.getValueType() && 2391 N1.getValueType() == VT && "Binary operator types must match!"); 2392 break; 2393 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2394 assert(N1.getValueType() == VT && 2395 N1.getValueType().isFloatingPoint() && 2396 N2.getValueType().isFloatingPoint() && 2397 "Invalid FCOPYSIGN!"); 2398 break; 2399 case ISD::SHL: 2400 case ISD::SRA: 2401 case ISD::SRL: 2402 case ISD::ROTL: 2403 case ISD::ROTR: 2404 assert(VT == N1.getValueType() && 2405 "Shift operators return type must be the same as their first arg"); 2406 assert(VT.isInteger() && N2.getValueType().isInteger() && 2407 "Shifts only work on integers"); 2408 assert(N2.getValueType() == TLI.getShiftAmountTy() && 2409 "Wrong type for shift amount"); 2410 2411 // Always fold shifts of i1 values so the code generator doesn't need to 2412 // handle them. Since we know the size of the shift has to be less than the 2413 // size of the value, the shift/rotate count is guaranteed to be zero. 2414 if (VT == MVT::i1) 2415 return N1; 2416 break; 2417 case ISD::FP_ROUND_INREG: { 2418 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2419 assert(VT == N1.getValueType() && "Not an inreg round!"); 2420 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2421 "Cannot FP_ROUND_INREG integer types"); 2422 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2423 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2424 break; 2425 } 2426 case ISD::FP_ROUND: 2427 assert(VT.isFloatingPoint() && 2428 N1.getValueType().isFloatingPoint() && 2429 VT.bitsLE(N1.getValueType()) && 2430 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2431 if (N1.getValueType() == VT) return N1; // noop conversion. 2432 break; 2433 case ISD::AssertSext: 2434 case ISD::AssertZext: { 2435 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2436 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2437 assert(VT.isInteger() && EVT.isInteger() && 2438 "Cannot *_EXTEND_INREG FP types"); 2439 assert(EVT.bitsLE(VT) && "Not extending!"); 2440 if (VT == EVT) return N1; // noop assertion. 2441 break; 2442 } 2443 case ISD::SIGN_EXTEND_INREG: { 2444 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2445 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2446 assert(VT.isInteger() && EVT.isInteger() && 2447 "Cannot *_EXTEND_INREG FP types"); 2448 assert(EVT.bitsLE(VT) && "Not extending!"); 2449 if (EVT == VT) return N1; // Not actually extending 2450 2451 if (N1C) { 2452 APInt Val = N1C->getAPIntValue(); 2453 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2454 Val <<= Val.getBitWidth()-FromBits; 2455 Val = Val.ashr(Val.getBitWidth()-FromBits); 2456 return getConstant(Val, VT); 2457 } 2458 break; 2459 } 2460 case ISD::EXTRACT_VECTOR_ELT: 2461 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2462 if (N1.getOpcode() == ISD::UNDEF) 2463 return getNode(ISD::UNDEF, VT); 2464 2465 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2466 // expanding copies of large vectors from registers. 2467 if (N2C && 2468 N1.getOpcode() == ISD::CONCAT_VECTORS && 2469 N1.getNumOperands() > 0) { 2470 unsigned Factor = 2471 N1.getOperand(0).getValueType().getVectorNumElements(); 2472 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2473 N1.getOperand(N2C->getZExtValue() / Factor), 2474 getConstant(N2C->getZExtValue() % Factor, 2475 N2.getValueType())); 2476 } 2477 2478 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2479 // expanding large vector constants. 2480 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2481 return N1.getOperand(N2C->getZExtValue()); 2482 2483 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2484 // operations are lowered to scalars. 2485 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2486 if (N1.getOperand(2) == N2) 2487 return N1.getOperand(1); 2488 else 2489 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2490 } 2491 break; 2492 case ISD::EXTRACT_ELEMENT: 2493 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2494 assert(!N1.getValueType().isVector() && !VT.isVector() && 2495 (N1.getValueType().isInteger() == VT.isInteger()) && 2496 "Wrong types for EXTRACT_ELEMENT!"); 2497 2498 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2499 // 64-bit integers into 32-bit parts. Instead of building the extract of 2500 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2501 if (N1.getOpcode() == ISD::BUILD_PAIR) 2502 return N1.getOperand(N2C->getZExtValue()); 2503 2504 // EXTRACT_ELEMENT of a constant int is also very common. 2505 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2506 unsigned ElementSize = VT.getSizeInBits(); 2507 unsigned Shift = ElementSize * N2C->getZExtValue(); 2508 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2509 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2510 } 2511 break; 2512 case ISD::EXTRACT_SUBVECTOR: 2513 if (N1.getValueType() == VT) // Trivial extraction. 2514 return N1; 2515 break; 2516 } 2517 2518 if (N1C) { 2519 if (N2C) { 2520 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2521 if (SV.getNode()) return SV; 2522 } else { // Cannonicalize constant to RHS if commutative 2523 if (isCommutativeBinOp(Opcode)) { 2524 std::swap(N1C, N2C); 2525 std::swap(N1, N2); 2526 } 2527 } 2528 } 2529 2530 // Constant fold FP operations. 2531 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2532 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2533 if (N1CFP) { 2534 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2535 // Cannonicalize constant to RHS if commutative 2536 std::swap(N1CFP, N2CFP); 2537 std::swap(N1, N2); 2538 } else if (N2CFP && VT != MVT::ppcf128) { 2539 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2540 APFloat::opStatus s; 2541 switch (Opcode) { 2542 case ISD::FADD: 2543 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2544 if (s != APFloat::opInvalidOp) 2545 return getConstantFP(V1, VT); 2546 break; 2547 case ISD::FSUB: 2548 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2549 if (s!=APFloat::opInvalidOp) 2550 return getConstantFP(V1, VT); 2551 break; 2552 case ISD::FMUL: 2553 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2554 if (s!=APFloat::opInvalidOp) 2555 return getConstantFP(V1, VT); 2556 break; 2557 case ISD::FDIV: 2558 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2559 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2560 return getConstantFP(V1, VT); 2561 break; 2562 case ISD::FREM : 2563 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2564 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2565 return getConstantFP(V1, VT); 2566 break; 2567 case ISD::FCOPYSIGN: 2568 V1.copySign(V2); 2569 return getConstantFP(V1, VT); 2570 default: break; 2571 } 2572 } 2573 } 2574 2575 // Canonicalize an UNDEF to the RHS, even over a constant. 2576 if (N1.getOpcode() == ISD::UNDEF) { 2577 if (isCommutativeBinOp(Opcode)) { 2578 std::swap(N1, N2); 2579 } else { 2580 switch (Opcode) { 2581 case ISD::FP_ROUND_INREG: 2582 case ISD::SIGN_EXTEND_INREG: 2583 case ISD::SUB: 2584 case ISD::FSUB: 2585 case ISD::FDIV: 2586 case ISD::FREM: 2587 case ISD::SRA: 2588 return N1; // fold op(undef, arg2) -> undef 2589 case ISD::UDIV: 2590 case ISD::SDIV: 2591 case ISD::UREM: 2592 case ISD::SREM: 2593 case ISD::SRL: 2594 case ISD::SHL: 2595 if (!VT.isVector()) 2596 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2597 // For vectors, we can't easily build an all zero vector, just return 2598 // the LHS. 2599 return N2; 2600 } 2601 } 2602 } 2603 2604 // Fold a bunch of operators when the RHS is undef. 2605 if (N2.getOpcode() == ISD::UNDEF) { 2606 switch (Opcode) { 2607 case ISD::XOR: 2608 if (N1.getOpcode() == ISD::UNDEF) 2609 // Handle undef ^ undef -> 0 special case. This is a common 2610 // idiom (misuse). 2611 return getConstant(0, VT); 2612 // fallthrough 2613 case ISD::ADD: 2614 case ISD::ADDC: 2615 case ISD::ADDE: 2616 case ISD::SUB: 2617 case ISD::FADD: 2618 case ISD::FSUB: 2619 case ISD::FMUL: 2620 case ISD::FDIV: 2621 case ISD::FREM: 2622 case ISD::UDIV: 2623 case ISD::SDIV: 2624 case ISD::UREM: 2625 case ISD::SREM: 2626 return N2; // fold op(arg1, undef) -> undef 2627 case ISD::MUL: 2628 case ISD::AND: 2629 case ISD::SRL: 2630 case ISD::SHL: 2631 if (!VT.isVector()) 2632 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2633 // For vectors, we can't easily build an all zero vector, just return 2634 // the LHS. 2635 return N1; 2636 case ISD::OR: 2637 if (!VT.isVector()) 2638 return getConstant(VT.getIntegerVTBitMask(), VT); 2639 // For vectors, we can't easily build an all one vector, just return 2640 // the LHS. 2641 return N1; 2642 case ISD::SRA: 2643 return N1; 2644 } 2645 } 2646 2647 // Memoize this node if possible. 2648 SDNode *N; 2649 SDVTList VTs = getVTList(VT); 2650 if (VT != MVT::Flag) { 2651 SDValue Ops[] = { N1, N2 }; 2652 FoldingSetNodeID ID; 2653 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2654 void *IP = 0; 2655 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2656 return SDValue(E, 0); 2657 N = NodeAllocator.Allocate<BinarySDNode>(); 2658 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2659 CSEMap.InsertNode(N, IP); 2660 } else { 2661 N = NodeAllocator.Allocate<BinarySDNode>(); 2662 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2663 } 2664 2665 AllNodes.push_back(N); 2666#ifndef NDEBUG 2667 VerifyNode(N); 2668#endif 2669 return SDValue(N, 0); 2670} 2671 2672SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2673 SDValue N1, SDValue N2, SDValue N3) { 2674 // Perform various simplifications. 2675 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2676 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2677 switch (Opcode) { 2678 case ISD::CONCAT_VECTORS: 2679 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2680 // one big BUILD_VECTOR. 2681 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2682 N2.getOpcode() == ISD::BUILD_VECTOR && 2683 N3.getOpcode() == ISD::BUILD_VECTOR) { 2684 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), N1.getNode()->op_end()); 2685 Elts.insert(Elts.end(), N2.getNode()->op_begin(), N2.getNode()->op_end()); 2686 Elts.insert(Elts.end(), N3.getNode()->op_begin(), N3.getNode()->op_end()); 2687 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2688 } 2689 break; 2690 case ISD::SETCC: { 2691 // Use FoldSetCC to simplify SETCC's. 2692 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2693 if (Simp.getNode()) return Simp; 2694 break; 2695 } 2696 case ISD::SELECT: 2697 if (N1C) { 2698 if (N1C->getZExtValue()) 2699 return N2; // select true, X, Y -> X 2700 else 2701 return N3; // select false, X, Y -> Y 2702 } 2703 2704 if (N2 == N3) return N2; // select C, X, X -> X 2705 break; 2706 case ISD::BRCOND: 2707 if (N2C) { 2708 if (N2C->getZExtValue()) // Unconditional branch 2709 return getNode(ISD::BR, MVT::Other, N1, N3); 2710 else 2711 return N1; // Never-taken branch 2712 } 2713 break; 2714 case ISD::VECTOR_SHUFFLE: 2715 assert(N1.getValueType() == N2.getValueType() && 2716 N1.getValueType().isVector() && 2717 VT.isVector() && N3.getValueType().isVector() && 2718 N3.getOpcode() == ISD::BUILD_VECTOR && 2719 VT.getVectorNumElements() == N3.getNumOperands() && 2720 "Illegal VECTOR_SHUFFLE node!"); 2721 break; 2722 case ISD::BIT_CONVERT: 2723 // Fold bit_convert nodes from a type to themselves. 2724 if (N1.getValueType() == VT) 2725 return N1; 2726 break; 2727 } 2728 2729 // Memoize node if it doesn't produce a flag. 2730 SDNode *N; 2731 SDVTList VTs = getVTList(VT); 2732 if (VT != MVT::Flag) { 2733 SDValue Ops[] = { N1, N2, N3 }; 2734 FoldingSetNodeID ID; 2735 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2736 void *IP = 0; 2737 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2738 return SDValue(E, 0); 2739 N = NodeAllocator.Allocate<TernarySDNode>(); 2740 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2741 CSEMap.InsertNode(N, IP); 2742 } else { 2743 N = NodeAllocator.Allocate<TernarySDNode>(); 2744 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2745 } 2746 AllNodes.push_back(N); 2747#ifndef NDEBUG 2748 VerifyNode(N); 2749#endif 2750 return SDValue(N, 0); 2751} 2752 2753SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2754 SDValue N1, SDValue N2, SDValue N3, 2755 SDValue N4) { 2756 SDValue Ops[] = { N1, N2, N3, N4 }; 2757 return getNode(Opcode, VT, Ops, 4); 2758} 2759 2760SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2761 SDValue N1, SDValue N2, SDValue N3, 2762 SDValue N4, SDValue N5) { 2763 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2764 return getNode(Opcode, VT, Ops, 5); 2765} 2766 2767/// getMemsetValue - Vectorized representation of the memset value 2768/// operand. 2769static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2770 unsigned NumBits = VT.isVector() ? 2771 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2772 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2773 APInt Val = APInt(NumBits, C->getZExtValue() & 255); 2774 unsigned Shift = 8; 2775 for (unsigned i = NumBits; i > 8; i >>= 1) { 2776 Val = (Val << Shift) | Val; 2777 Shift <<= 1; 2778 } 2779 if (VT.isInteger()) 2780 return DAG.getConstant(Val, VT); 2781 return DAG.getConstantFP(APFloat(Val), VT); 2782 } 2783 2784 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2785 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2786 unsigned Shift = 8; 2787 for (unsigned i = NumBits; i > 8; i >>= 1) { 2788 Value = DAG.getNode(ISD::OR, VT, 2789 DAG.getNode(ISD::SHL, VT, Value, 2790 DAG.getConstant(Shift, 2791 TLI.getShiftAmountTy())), 2792 Value); 2793 Shift <<= 1; 2794 } 2795 2796 return Value; 2797} 2798 2799/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2800/// used when a memcpy is turned into a memset when the source is a constant 2801/// string ptr. 2802static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2803 const TargetLowering &TLI, 2804 std::string &Str, unsigned Offset) { 2805 // Handle vector with all elements zero. 2806 if (Str.empty()) { 2807 if (VT.isInteger()) 2808 return DAG.getConstant(0, VT); 2809 unsigned NumElts = VT.getVectorNumElements(); 2810 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2811 return DAG.getNode(ISD::BIT_CONVERT, VT, 2812 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2813 } 2814 2815 assert(!VT.isVector() && "Can't handle vector type here!"); 2816 unsigned NumBits = VT.getSizeInBits(); 2817 unsigned MSB = NumBits / 8; 2818 uint64_t Val = 0; 2819 if (TLI.isLittleEndian()) 2820 Offset = Offset + MSB - 1; 2821 for (unsigned i = 0; i != MSB; ++i) { 2822 Val = (Val << 8) | (unsigned char)Str[Offset]; 2823 Offset += TLI.isLittleEndian() ? -1 : 1; 2824 } 2825 return DAG.getConstant(Val, VT); 2826} 2827 2828/// getMemBasePlusOffset - Returns base and offset node for the 2829/// 2830static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2831 SelectionDAG &DAG) { 2832 MVT VT = Base.getValueType(); 2833 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2834} 2835 2836/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2837/// 2838static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2839 unsigned SrcDelta = 0; 2840 GlobalAddressSDNode *G = NULL; 2841 if (Src.getOpcode() == ISD::GlobalAddress) 2842 G = cast<GlobalAddressSDNode>(Src); 2843 else if (Src.getOpcode() == ISD::ADD && 2844 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2845 Src.getOperand(1).getOpcode() == ISD::Constant) { 2846 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2847 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 2848 } 2849 if (!G) 2850 return false; 2851 2852 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2853 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2854 return true; 2855 2856 return false; 2857} 2858 2859/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2860/// to replace the memset / memcpy is below the threshold. It also returns the 2861/// types of the sequence of memory ops to perform memset / memcpy. 2862static 2863bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2864 SDValue Dst, SDValue Src, 2865 unsigned Limit, uint64_t Size, unsigned &Align, 2866 std::string &Str, bool &isSrcStr, 2867 SelectionDAG &DAG, 2868 const TargetLowering &TLI) { 2869 isSrcStr = isMemSrcFromString(Src, Str); 2870 bool isSrcConst = isa<ConstantSDNode>(Src); 2871 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2872 MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2873 if (VT != MVT::iAny) { 2874 unsigned NewAlign = (unsigned) 2875 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2876 // If source is a string constant, this will require an unaligned load. 2877 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2878 if (Dst.getOpcode() != ISD::FrameIndex) { 2879 // Can't change destination alignment. It requires a unaligned store. 2880 if (AllowUnalign) 2881 VT = MVT::iAny; 2882 } else { 2883 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2884 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2885 if (MFI->isFixedObjectIndex(FI)) { 2886 // Can't change destination alignment. It requires a unaligned store. 2887 if (AllowUnalign) 2888 VT = MVT::iAny; 2889 } else { 2890 // Give the stack frame object a larger alignment if needed. 2891 if (MFI->getObjectAlignment(FI) < NewAlign) 2892 MFI->setObjectAlignment(FI, NewAlign); 2893 Align = NewAlign; 2894 } 2895 } 2896 } 2897 } 2898 2899 if (VT == MVT::iAny) { 2900 if (AllowUnalign) { 2901 VT = MVT::i64; 2902 } else { 2903 switch (Align & 7) { 2904 case 0: VT = MVT::i64; break; 2905 case 4: VT = MVT::i32; break; 2906 case 2: VT = MVT::i16; break; 2907 default: VT = MVT::i8; break; 2908 } 2909 } 2910 2911 MVT LVT = MVT::i64; 2912 while (!TLI.isTypeLegal(LVT)) 2913 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2914 assert(LVT.isInteger()); 2915 2916 if (VT.bitsGT(LVT)) 2917 VT = LVT; 2918 } 2919 2920 unsigned NumMemOps = 0; 2921 while (Size != 0) { 2922 unsigned VTSize = VT.getSizeInBits() / 8; 2923 while (VTSize > Size) { 2924 // For now, only use non-vector load / store's for the left-over pieces. 2925 if (VT.isVector()) { 2926 VT = MVT::i64; 2927 while (!TLI.isTypeLegal(VT)) 2928 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2929 VTSize = VT.getSizeInBits() / 8; 2930 } else { 2931 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2932 VTSize >>= 1; 2933 } 2934 } 2935 2936 if (++NumMemOps > Limit) 2937 return false; 2938 MemOps.push_back(VT); 2939 Size -= VTSize; 2940 } 2941 2942 return true; 2943} 2944 2945static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 2946 SDValue Chain, SDValue Dst, 2947 SDValue Src, uint64_t Size, 2948 unsigned Align, bool AlwaysInline, 2949 const Value *DstSV, uint64_t DstSVOff, 2950 const Value *SrcSV, uint64_t SrcSVOff){ 2951 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2952 2953 // Expand memcpy to a series of load and store ops if the size operand falls 2954 // below a certain threshold. 2955 std::vector<MVT> MemOps; 2956 uint64_t Limit = -1ULL; 2957 if (!AlwaysInline) 2958 Limit = TLI.getMaxStoresPerMemcpy(); 2959 unsigned DstAlign = Align; // Destination alignment can change. 2960 std::string Str; 2961 bool CopyFromStr; 2962 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2963 Str, CopyFromStr, DAG, TLI)) 2964 return SDValue(); 2965 2966 2967 bool isZeroStr = CopyFromStr && Str.empty(); 2968 SmallVector<SDValue, 8> OutChains; 2969 unsigned NumMemOps = MemOps.size(); 2970 uint64_t SrcOff = 0, DstOff = 0; 2971 for (unsigned i = 0; i < NumMemOps; i++) { 2972 MVT VT = MemOps[i]; 2973 unsigned VTSize = VT.getSizeInBits() / 8; 2974 SDValue Value, Store; 2975 2976 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 2977 // It's unlikely a store of a vector immediate can be done in a single 2978 // instruction. It would require a load from a constantpool first. 2979 // We also handle store a vector with all zero's. 2980 // FIXME: Handle other cases where store of vector immediate is done in 2981 // a single instruction. 2982 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 2983 Store = DAG.getStore(Chain, Value, 2984 getMemBasePlusOffset(Dst, DstOff, DAG), 2985 DstSV, DstSVOff + DstOff, false, DstAlign); 2986 } else { 2987 Value = DAG.getLoad(VT, Chain, 2988 getMemBasePlusOffset(Src, SrcOff, DAG), 2989 SrcSV, SrcSVOff + SrcOff, false, Align); 2990 Store = DAG.getStore(Chain, Value, 2991 getMemBasePlusOffset(Dst, DstOff, DAG), 2992 DstSV, DstSVOff + DstOff, false, DstAlign); 2993 } 2994 OutChains.push_back(Store); 2995 SrcOff += VTSize; 2996 DstOff += VTSize; 2997 } 2998 2999 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3000 &OutChains[0], OutChains.size()); 3001} 3002 3003static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 3004 SDValue Chain, SDValue Dst, 3005 SDValue Src, uint64_t Size, 3006 unsigned Align, bool AlwaysInline, 3007 const Value *DstSV, uint64_t DstSVOff, 3008 const Value *SrcSV, uint64_t SrcSVOff){ 3009 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3010 3011 // Expand memmove to a series of load and store ops if the size operand falls 3012 // below a certain threshold. 3013 std::vector<MVT> MemOps; 3014 uint64_t Limit = -1ULL; 3015 if (!AlwaysInline) 3016 Limit = TLI.getMaxStoresPerMemmove(); 3017 unsigned DstAlign = Align; // Destination alignment can change. 3018 std::string Str; 3019 bool CopyFromStr; 3020 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 3021 Str, CopyFromStr, DAG, TLI)) 3022 return SDValue(); 3023 3024 uint64_t SrcOff = 0, DstOff = 0; 3025 3026 SmallVector<SDValue, 8> LoadValues; 3027 SmallVector<SDValue, 8> LoadChains; 3028 SmallVector<SDValue, 8> OutChains; 3029 unsigned NumMemOps = MemOps.size(); 3030 for (unsigned i = 0; i < NumMemOps; i++) { 3031 MVT VT = MemOps[i]; 3032 unsigned VTSize = VT.getSizeInBits() / 8; 3033 SDValue Value, Store; 3034 3035 Value = DAG.getLoad(VT, Chain, 3036 getMemBasePlusOffset(Src, SrcOff, DAG), 3037 SrcSV, SrcSVOff + SrcOff, false, Align); 3038 LoadValues.push_back(Value); 3039 LoadChains.push_back(Value.getValue(1)); 3040 SrcOff += VTSize; 3041 } 3042 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 3043 &LoadChains[0], LoadChains.size()); 3044 OutChains.clear(); 3045 for (unsigned i = 0; i < NumMemOps; i++) { 3046 MVT VT = MemOps[i]; 3047 unsigned VTSize = VT.getSizeInBits() / 8; 3048 SDValue Value, Store; 3049 3050 Store = DAG.getStore(Chain, LoadValues[i], 3051 getMemBasePlusOffset(Dst, DstOff, DAG), 3052 DstSV, DstSVOff + DstOff, false, DstAlign); 3053 OutChains.push_back(Store); 3054 DstOff += VTSize; 3055 } 3056 3057 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3058 &OutChains[0], OutChains.size()); 3059} 3060 3061static SDValue getMemsetStores(SelectionDAG &DAG, 3062 SDValue Chain, SDValue Dst, 3063 SDValue Src, uint64_t Size, 3064 unsigned Align, 3065 const Value *DstSV, uint64_t DstSVOff) { 3066 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3067 3068 // Expand memset to a series of load/store ops if the size operand 3069 // falls below a certain threshold. 3070 std::vector<MVT> MemOps; 3071 std::string Str; 3072 bool CopyFromStr; 3073 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 3074 Size, Align, Str, CopyFromStr, DAG, TLI)) 3075 return SDValue(); 3076 3077 SmallVector<SDValue, 8> OutChains; 3078 uint64_t DstOff = 0; 3079 3080 unsigned NumMemOps = MemOps.size(); 3081 for (unsigned i = 0; i < NumMemOps; i++) { 3082 MVT VT = MemOps[i]; 3083 unsigned VTSize = VT.getSizeInBits() / 8; 3084 SDValue Value = getMemsetValue(Src, VT, DAG); 3085 SDValue Store = DAG.getStore(Chain, Value, 3086 getMemBasePlusOffset(Dst, DstOff, DAG), 3087 DstSV, DstSVOff + DstOff); 3088 OutChains.push_back(Store); 3089 DstOff += VTSize; 3090 } 3091 3092 return DAG.getNode(ISD::TokenFactor, MVT::Other, 3093 &OutChains[0], OutChains.size()); 3094} 3095 3096SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 3097 SDValue Src, SDValue Size, 3098 unsigned Align, bool AlwaysInline, 3099 const Value *DstSV, uint64_t DstSVOff, 3100 const Value *SrcSV, uint64_t SrcSVOff) { 3101 3102 // Check to see if we should lower the memcpy to loads and stores first. 3103 // For cases within the target-specified limits, this is the best choice. 3104 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3105 if (ConstantSize) { 3106 // Memcpy with size zero? Just return the original chain. 3107 if (ConstantSize->isNullValue()) 3108 return Chain; 3109 3110 SDValue Result = 3111 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3112 ConstantSize->getZExtValue(), 3113 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3114 if (Result.getNode()) 3115 return Result; 3116 } 3117 3118 // Then check to see if we should lower the memcpy with target-specific 3119 // code. If the target chooses to do this, this is the next best. 3120 SDValue Result = 3121 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3122 AlwaysInline, 3123 DstSV, DstSVOff, SrcSV, SrcSVOff); 3124 if (Result.getNode()) 3125 return Result; 3126 3127 // If we really need inline code and the target declined to provide it, 3128 // use a (potentially long) sequence of loads and stores. 3129 if (AlwaysInline) { 3130 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3131 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3132 ConstantSize->getZExtValue(), Align, true, 3133 DstSV, DstSVOff, SrcSV, SrcSVOff); 3134 } 3135 3136 // Emit a library call. 3137 TargetLowering::ArgListTy Args; 3138 TargetLowering::ArgListEntry Entry; 3139 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3140 Entry.Node = Dst; Args.push_back(Entry); 3141 Entry.Node = Src; Args.push_back(Entry); 3142 Entry.Node = Size; Args.push_back(Entry); 3143 std::pair<SDValue,SDValue> CallResult = 3144 TLI.LowerCallTo(Chain, Type::VoidTy, 3145 false, false, false, false, CallingConv::C, false, 3146 getExternalSymbol("memcpy", TLI.getPointerTy()), 3147 Args, *this); 3148 return CallResult.second; 3149} 3150 3151SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3152 SDValue Src, SDValue Size, 3153 unsigned Align, 3154 const Value *DstSV, uint64_t DstSVOff, 3155 const Value *SrcSV, uint64_t SrcSVOff) { 3156 3157 // Check to see if we should lower the memmove to loads and stores first. 3158 // For cases within the target-specified limits, this is the best choice. 3159 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3160 if (ConstantSize) { 3161 // Memmove with size zero? Just return the original chain. 3162 if (ConstantSize->isNullValue()) 3163 return Chain; 3164 3165 SDValue Result = 3166 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, 3167 ConstantSize->getZExtValue(), 3168 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3169 if (Result.getNode()) 3170 return Result; 3171 } 3172 3173 // Then check to see if we should lower the memmove with target-specific 3174 // code. If the target chooses to do this, this is the next best. 3175 SDValue Result = 3176 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3177 DstSV, DstSVOff, SrcSV, SrcSVOff); 3178 if (Result.getNode()) 3179 return Result; 3180 3181 // Emit a library call. 3182 TargetLowering::ArgListTy Args; 3183 TargetLowering::ArgListEntry Entry; 3184 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3185 Entry.Node = Dst; Args.push_back(Entry); 3186 Entry.Node = Src; Args.push_back(Entry); 3187 Entry.Node = Size; Args.push_back(Entry); 3188 std::pair<SDValue,SDValue> CallResult = 3189 TLI.LowerCallTo(Chain, Type::VoidTy, 3190 false, false, false, false, CallingConv::C, false, 3191 getExternalSymbol("memmove", TLI.getPointerTy()), 3192 Args, *this); 3193 return CallResult.second; 3194} 3195 3196SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3197 SDValue Src, SDValue Size, 3198 unsigned Align, 3199 const Value *DstSV, uint64_t DstSVOff) { 3200 3201 // Check to see if we should lower the memset to stores first. 3202 // For cases within the target-specified limits, this is the best choice. 3203 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3204 if (ConstantSize) { 3205 // Memset with size zero? Just return the original chain. 3206 if (ConstantSize->isNullValue()) 3207 return Chain; 3208 3209 SDValue Result = 3210 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getZExtValue(), 3211 Align, DstSV, DstSVOff); 3212 if (Result.getNode()) 3213 return Result; 3214 } 3215 3216 // Then check to see if we should lower the memset with target-specific 3217 // code. If the target chooses to do this, this is the next best. 3218 SDValue Result = 3219 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3220 DstSV, DstSVOff); 3221 if (Result.getNode()) 3222 return Result; 3223 3224 // Emit a library call. 3225 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3226 TargetLowering::ArgListTy Args; 3227 TargetLowering::ArgListEntry Entry; 3228 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3229 Args.push_back(Entry); 3230 // Extend or truncate the argument to be an i32 value for the call. 3231 if (Src.getValueType().bitsGT(MVT::i32)) 3232 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3233 else 3234 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3235 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3236 Args.push_back(Entry); 3237 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3238 Args.push_back(Entry); 3239 std::pair<SDValue,SDValue> CallResult = 3240 TLI.LowerCallTo(Chain, Type::VoidTy, 3241 false, false, false, false, CallingConv::C, false, 3242 getExternalSymbol("memset", TLI.getPointerTy()), 3243 Args, *this); 3244 return CallResult.second; 3245} 3246 3247SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain, 3248 SDValue Ptr, SDValue Cmp, 3249 SDValue Swp, const Value* PtrVal, 3250 unsigned Alignment) { 3251 assert((Opcode == ISD::ATOMIC_CMP_SWAP_8 || 3252 Opcode == ISD::ATOMIC_CMP_SWAP_16 || 3253 Opcode == ISD::ATOMIC_CMP_SWAP_32 || 3254 Opcode == ISD::ATOMIC_CMP_SWAP_64) && "Invalid Atomic Op"); 3255 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3256 3257 MVT VT = Cmp.getValueType(); 3258 3259 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3260 Alignment = getMVTAlignment(VT); 3261 3262 SDVTList VTs = getVTList(VT, MVT::Other); 3263 FoldingSetNodeID ID; 3264 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3265 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3266 void* IP = 0; 3267 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3268 return SDValue(E, 0); 3269 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3270 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3271 CSEMap.InsertNode(N, IP); 3272 AllNodes.push_back(N); 3273 return SDValue(N, 0); 3274} 3275 3276SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain, 3277 SDValue Ptr, SDValue Val, 3278 const Value* PtrVal, 3279 unsigned Alignment) { 3280 assert((Opcode == ISD::ATOMIC_LOAD_ADD_8 || 3281 Opcode == ISD::ATOMIC_LOAD_SUB_8 || 3282 Opcode == ISD::ATOMIC_LOAD_AND_8 || 3283 Opcode == ISD::ATOMIC_LOAD_OR_8 || 3284 Opcode == ISD::ATOMIC_LOAD_XOR_8 || 3285 Opcode == ISD::ATOMIC_LOAD_NAND_8 || 3286 Opcode == ISD::ATOMIC_LOAD_MIN_8 || 3287 Opcode == ISD::ATOMIC_LOAD_MAX_8 || 3288 Opcode == ISD::ATOMIC_LOAD_UMIN_8 || 3289 Opcode == ISD::ATOMIC_LOAD_UMAX_8 || 3290 Opcode == ISD::ATOMIC_SWAP_8 || 3291 Opcode == ISD::ATOMIC_LOAD_ADD_16 || 3292 Opcode == ISD::ATOMIC_LOAD_SUB_16 || 3293 Opcode == ISD::ATOMIC_LOAD_AND_16 || 3294 Opcode == ISD::ATOMIC_LOAD_OR_16 || 3295 Opcode == ISD::ATOMIC_LOAD_XOR_16 || 3296 Opcode == ISD::ATOMIC_LOAD_NAND_16 || 3297 Opcode == ISD::ATOMIC_LOAD_MIN_16 || 3298 Opcode == ISD::ATOMIC_LOAD_MAX_16 || 3299 Opcode == ISD::ATOMIC_LOAD_UMIN_16 || 3300 Opcode == ISD::ATOMIC_LOAD_UMAX_16 || 3301 Opcode == ISD::ATOMIC_SWAP_16 || 3302 Opcode == ISD::ATOMIC_LOAD_ADD_32 || 3303 Opcode == ISD::ATOMIC_LOAD_SUB_32 || 3304 Opcode == ISD::ATOMIC_LOAD_AND_32 || 3305 Opcode == ISD::ATOMIC_LOAD_OR_32 || 3306 Opcode == ISD::ATOMIC_LOAD_XOR_32 || 3307 Opcode == ISD::ATOMIC_LOAD_NAND_32 || 3308 Opcode == ISD::ATOMIC_LOAD_MIN_32 || 3309 Opcode == ISD::ATOMIC_LOAD_MAX_32 || 3310 Opcode == ISD::ATOMIC_LOAD_UMIN_32 || 3311 Opcode == ISD::ATOMIC_LOAD_UMAX_32 || 3312 Opcode == ISD::ATOMIC_SWAP_32 || 3313 Opcode == ISD::ATOMIC_LOAD_ADD_64 || 3314 Opcode == ISD::ATOMIC_LOAD_SUB_64 || 3315 Opcode == ISD::ATOMIC_LOAD_AND_64 || 3316 Opcode == ISD::ATOMIC_LOAD_OR_64 || 3317 Opcode == ISD::ATOMIC_LOAD_XOR_64 || 3318 Opcode == ISD::ATOMIC_LOAD_NAND_64 || 3319 Opcode == ISD::ATOMIC_LOAD_MIN_64 || 3320 Opcode == ISD::ATOMIC_LOAD_MAX_64 || 3321 Opcode == ISD::ATOMIC_LOAD_UMIN_64 || 3322 Opcode == ISD::ATOMIC_LOAD_UMAX_64 || 3323 Opcode == ISD::ATOMIC_SWAP_64) && "Invalid Atomic Op"); 3324 3325 MVT VT = Val.getValueType(); 3326 3327 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3328 Alignment = getMVTAlignment(VT); 3329 3330 SDVTList VTs = getVTList(VT, MVT::Other); 3331 FoldingSetNodeID ID; 3332 SDValue Ops[] = {Chain, Ptr, Val}; 3333 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3334 void* IP = 0; 3335 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3336 return SDValue(E, 0); 3337 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3338 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment); 3339 CSEMap.InsertNode(N, IP); 3340 AllNodes.push_back(N); 3341 return SDValue(N, 0); 3342} 3343 3344/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3345/// Allowed to return something different (and simpler) if Simplify is true. 3346SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3347 bool Simplify) { 3348 if (Simplify && NumOps == 1) 3349 return Ops[0]; 3350 3351 SmallVector<MVT, 4> VTs; 3352 VTs.reserve(NumOps); 3353 for (unsigned i = 0; i < NumOps; ++i) 3354 VTs.push_back(Ops[i].getValueType()); 3355 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3356} 3357 3358SDValue 3359SelectionDAG::getMemIntrinsicNode(unsigned Opcode, 3360 const MVT *VTs, unsigned NumVTs, 3361 const SDValue *Ops, unsigned NumOps, 3362 MVT MemVT, const Value *srcValue, int SVOff, 3363 unsigned Align, bool Vol, 3364 bool ReadMem, bool WriteMem) { 3365 return getMemIntrinsicNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps, 3366 MemVT, srcValue, SVOff, Align, Vol, 3367 ReadMem, WriteMem); 3368} 3369 3370SDValue 3371SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDVTList VTList, 3372 const SDValue *Ops, unsigned NumOps, 3373 MVT MemVT, const Value *srcValue, int SVOff, 3374 unsigned Align, bool Vol, 3375 bool ReadMem, bool WriteMem) { 3376 // Memoize the node unless it returns a flag. 3377 MemIntrinsicSDNode *N; 3378 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3379 FoldingSetNodeID ID; 3380 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3381 void *IP = 0; 3382 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3383 return SDValue(E, 0); 3384 3385 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3386 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3387 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3388 CSEMap.InsertNode(N, IP); 3389 } else { 3390 N = NodeAllocator.Allocate<MemIntrinsicSDNode>(); 3391 new (N) MemIntrinsicSDNode(Opcode, VTList, Ops, NumOps, MemVT, 3392 srcValue, SVOff, Align, Vol, ReadMem, WriteMem); 3393 } 3394 AllNodes.push_back(N); 3395 return SDValue(N, 0); 3396} 3397 3398SDValue 3399SelectionDAG::getCall(unsigned CallingConv, bool IsVarArgs, bool IsTailCall, 3400 bool IsInreg, SDVTList VTs, 3401 const SDValue *Operands, unsigned NumOperands) { 3402 // Do not include isTailCall in the folding set profile. 3403 FoldingSetNodeID ID; 3404 AddNodeIDNode(ID, ISD::CALL, VTs, Operands, NumOperands); 3405 ID.AddInteger(CallingConv); 3406 ID.AddInteger(IsVarArgs); 3407 void *IP = 0; 3408 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3409 // Instead of including isTailCall in the folding set, we just 3410 // set the flag of the existing node. 3411 if (!IsTailCall) 3412 cast<CallSDNode>(E)->setNotTailCall(); 3413 return SDValue(E, 0); 3414 } 3415 SDNode *N = NodeAllocator.Allocate<CallSDNode>(); 3416 new (N) CallSDNode(CallingConv, IsVarArgs, IsTailCall, IsInreg, 3417 VTs, Operands, NumOperands); 3418 CSEMap.InsertNode(N, IP); 3419 AllNodes.push_back(N); 3420 return SDValue(N, 0); 3421} 3422 3423SDValue 3424SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3425 MVT VT, SDValue Chain, 3426 SDValue Ptr, SDValue Offset, 3427 const Value *SV, int SVOffset, MVT EVT, 3428 bool isVolatile, unsigned Alignment) { 3429 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3430 Alignment = getMVTAlignment(VT); 3431 3432 if (VT == EVT) { 3433 ExtType = ISD::NON_EXTLOAD; 3434 } else if (ExtType == ISD::NON_EXTLOAD) { 3435 assert(VT == EVT && "Non-extending load from different memory type!"); 3436 } else { 3437 // Extending load. 3438 if (VT.isVector()) 3439 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3440 "Invalid vector extload!"); 3441 else 3442 assert(EVT.bitsLT(VT) && 3443 "Should only be an extending load, not truncating!"); 3444 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3445 "Cannot sign/zero extend a FP/Vector load!"); 3446 assert(VT.isInteger() == EVT.isInteger() && 3447 "Cannot convert from FP to Int or Int -> FP!"); 3448 } 3449 3450 bool Indexed = AM != ISD::UNINDEXED; 3451 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3452 "Unindexed load with an offset!"); 3453 3454 SDVTList VTs = Indexed ? 3455 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3456 SDValue Ops[] = { Chain, Ptr, Offset }; 3457 FoldingSetNodeID ID; 3458 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3459 ID.AddInteger(AM); 3460 ID.AddInteger(ExtType); 3461 ID.AddInteger(EVT.getRawBits()); 3462 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3463 void *IP = 0; 3464 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3465 return SDValue(E, 0); 3466 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3467 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3468 Alignment, isVolatile); 3469 CSEMap.InsertNode(N, IP); 3470 AllNodes.push_back(N); 3471 return SDValue(N, 0); 3472} 3473 3474SDValue SelectionDAG::getLoad(MVT VT, 3475 SDValue Chain, SDValue Ptr, 3476 const Value *SV, int SVOffset, 3477 bool isVolatile, unsigned Alignment) { 3478 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3479 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3480 SV, SVOffset, VT, isVolatile, Alignment); 3481} 3482 3483SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3484 SDValue Chain, SDValue Ptr, 3485 const Value *SV, 3486 int SVOffset, MVT EVT, 3487 bool isVolatile, unsigned Alignment) { 3488 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3489 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3490 SV, SVOffset, EVT, isVolatile, Alignment); 3491} 3492 3493SDValue 3494SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3495 SDValue Offset, ISD::MemIndexedMode AM) { 3496 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3497 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3498 "Load is already a indexed load!"); 3499 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3500 LD->getChain(), Base, Offset, LD->getSrcValue(), 3501 LD->getSrcValueOffset(), LD->getMemoryVT(), 3502 LD->isVolatile(), LD->getAlignment()); 3503} 3504 3505SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3506 SDValue Ptr, const Value *SV, int SVOffset, 3507 bool isVolatile, unsigned Alignment) { 3508 MVT VT = Val.getValueType(); 3509 3510 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3511 Alignment = getMVTAlignment(VT); 3512 3513 SDVTList VTs = getVTList(MVT::Other); 3514 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3515 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3516 FoldingSetNodeID ID; 3517 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3518 ID.AddInteger(ISD::UNINDEXED); 3519 ID.AddInteger(false); 3520 ID.AddInteger(VT.getRawBits()); 3521 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3522 void *IP = 0; 3523 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3524 return SDValue(E, 0); 3525 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3526 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3527 VT, SV, SVOffset, Alignment, isVolatile); 3528 CSEMap.InsertNode(N, IP); 3529 AllNodes.push_back(N); 3530 return SDValue(N, 0); 3531} 3532 3533SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3534 SDValue Ptr, const Value *SV, 3535 int SVOffset, MVT SVT, 3536 bool isVolatile, unsigned Alignment) { 3537 MVT VT = Val.getValueType(); 3538 3539 if (VT == SVT) 3540 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3541 3542 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3543 assert(VT.isInteger() == SVT.isInteger() && 3544 "Can't do FP-INT conversion!"); 3545 3546 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3547 Alignment = getMVTAlignment(VT); 3548 3549 SDVTList VTs = getVTList(MVT::Other); 3550 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3551 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3552 FoldingSetNodeID ID; 3553 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3554 ID.AddInteger(ISD::UNINDEXED); 3555 ID.AddInteger(1); 3556 ID.AddInteger(SVT.getRawBits()); 3557 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3558 void *IP = 0; 3559 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3560 return SDValue(E, 0); 3561 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3562 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3563 SVT, SV, SVOffset, Alignment, isVolatile); 3564 CSEMap.InsertNode(N, IP); 3565 AllNodes.push_back(N); 3566 return SDValue(N, 0); 3567} 3568 3569SDValue 3570SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3571 SDValue Offset, ISD::MemIndexedMode AM) { 3572 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3573 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3574 "Store is already a indexed store!"); 3575 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3576 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3577 FoldingSetNodeID ID; 3578 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3579 ID.AddInteger(AM); 3580 ID.AddInteger(ST->isTruncatingStore()); 3581 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3582 ID.AddInteger(ST->getRawFlags()); 3583 void *IP = 0; 3584 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3585 return SDValue(E, 0); 3586 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3587 new (N) StoreSDNode(Ops, VTs, AM, 3588 ST->isTruncatingStore(), ST->getMemoryVT(), 3589 ST->getSrcValue(), ST->getSrcValueOffset(), 3590 ST->getAlignment(), ST->isVolatile()); 3591 CSEMap.InsertNode(N, IP); 3592 AllNodes.push_back(N); 3593 return SDValue(N, 0); 3594} 3595 3596SDValue SelectionDAG::getVAArg(MVT VT, 3597 SDValue Chain, SDValue Ptr, 3598 SDValue SV) { 3599 SDValue Ops[] = { Chain, Ptr, SV }; 3600 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3601} 3602 3603SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3604 const SDUse *Ops, unsigned NumOps) { 3605 switch (NumOps) { 3606 case 0: return getNode(Opcode, VT); 3607 case 1: return getNode(Opcode, VT, Ops[0]); 3608 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3609 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3610 default: break; 3611 } 3612 3613 // Copy from an SDUse array into an SDValue array for use with 3614 // the regular getNode logic. 3615 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3616 return getNode(Opcode, VT, &NewOps[0], NumOps); 3617} 3618 3619SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3620 const SDValue *Ops, unsigned NumOps) { 3621 switch (NumOps) { 3622 case 0: return getNode(Opcode, VT); 3623 case 1: return getNode(Opcode, VT, Ops[0]); 3624 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3625 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3626 default: break; 3627 } 3628 3629 switch (Opcode) { 3630 default: break; 3631 case ISD::SELECT_CC: { 3632 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3633 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3634 "LHS and RHS of condition must have same type!"); 3635 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3636 "True and False arms of SelectCC must have same type!"); 3637 assert(Ops[2].getValueType() == VT && 3638 "select_cc node must be of same type as true and false value!"); 3639 break; 3640 } 3641 case ISD::BR_CC: { 3642 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3643 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3644 "LHS/RHS of comparison should match types!"); 3645 break; 3646 } 3647 } 3648 3649 // Memoize nodes. 3650 SDNode *N; 3651 SDVTList VTs = getVTList(VT); 3652 if (VT != MVT::Flag) { 3653 FoldingSetNodeID ID; 3654 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3655 void *IP = 0; 3656 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3657 return SDValue(E, 0); 3658 N = NodeAllocator.Allocate<SDNode>(); 3659 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3660 CSEMap.InsertNode(N, IP); 3661 } else { 3662 N = NodeAllocator.Allocate<SDNode>(); 3663 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3664 } 3665 AllNodes.push_back(N); 3666#ifndef NDEBUG 3667 VerifyNode(N); 3668#endif 3669 return SDValue(N, 0); 3670} 3671 3672SDValue SelectionDAG::getNode(unsigned Opcode, 3673 const std::vector<MVT> &ResultTys, 3674 const SDValue *Ops, unsigned NumOps) { 3675 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3676 Ops, NumOps); 3677} 3678 3679SDValue SelectionDAG::getNode(unsigned Opcode, 3680 const MVT *VTs, unsigned NumVTs, 3681 const SDValue *Ops, unsigned NumOps) { 3682 if (NumVTs == 1) 3683 return getNode(Opcode, VTs[0], Ops, NumOps); 3684 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3685} 3686 3687SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3688 const SDValue *Ops, unsigned NumOps) { 3689 if (VTList.NumVTs == 1) 3690 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3691 3692 switch (Opcode) { 3693 // FIXME: figure out how to safely handle things like 3694 // int foo(int x) { return 1 << (x & 255); } 3695 // int bar() { return foo(256); } 3696#if 0 3697 case ISD::SRA_PARTS: 3698 case ISD::SRL_PARTS: 3699 case ISD::SHL_PARTS: 3700 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3701 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3702 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3703 else if (N3.getOpcode() == ISD::AND) 3704 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3705 // If the and is only masking out bits that cannot effect the shift, 3706 // eliminate the and. 3707 unsigned NumBits = VT.getSizeInBits()*2; 3708 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3709 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3710 } 3711 break; 3712#endif 3713 } 3714 3715 // Memoize the node unless it returns a flag. 3716 SDNode *N; 3717 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3718 FoldingSetNodeID ID; 3719 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3720 void *IP = 0; 3721 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3722 return SDValue(E, 0); 3723 if (NumOps == 1) { 3724 N = NodeAllocator.Allocate<UnarySDNode>(); 3725 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3726 } else if (NumOps == 2) { 3727 N = NodeAllocator.Allocate<BinarySDNode>(); 3728 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3729 } else if (NumOps == 3) { 3730 N = NodeAllocator.Allocate<TernarySDNode>(); 3731 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3732 } else { 3733 N = NodeAllocator.Allocate<SDNode>(); 3734 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3735 } 3736 CSEMap.InsertNode(N, IP); 3737 } else { 3738 if (NumOps == 1) { 3739 N = NodeAllocator.Allocate<UnarySDNode>(); 3740 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3741 } else if (NumOps == 2) { 3742 N = NodeAllocator.Allocate<BinarySDNode>(); 3743 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3744 } else if (NumOps == 3) { 3745 N = NodeAllocator.Allocate<TernarySDNode>(); 3746 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3747 } else { 3748 N = NodeAllocator.Allocate<SDNode>(); 3749 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3750 } 3751 } 3752 AllNodes.push_back(N); 3753#ifndef NDEBUG 3754 VerifyNode(N); 3755#endif 3756 return SDValue(N, 0); 3757} 3758 3759SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3760 return getNode(Opcode, VTList, 0, 0); 3761} 3762 3763SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3764 SDValue N1) { 3765 SDValue Ops[] = { N1 }; 3766 return getNode(Opcode, VTList, Ops, 1); 3767} 3768 3769SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3770 SDValue N1, SDValue N2) { 3771 SDValue Ops[] = { N1, N2 }; 3772 return getNode(Opcode, VTList, Ops, 2); 3773} 3774 3775SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3776 SDValue N1, SDValue N2, SDValue N3) { 3777 SDValue Ops[] = { N1, N2, N3 }; 3778 return getNode(Opcode, VTList, Ops, 3); 3779} 3780 3781SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3782 SDValue N1, SDValue N2, SDValue N3, 3783 SDValue N4) { 3784 SDValue Ops[] = { N1, N2, N3, N4 }; 3785 return getNode(Opcode, VTList, Ops, 4); 3786} 3787 3788SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3789 SDValue N1, SDValue N2, SDValue N3, 3790 SDValue N4, SDValue N5) { 3791 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3792 return getNode(Opcode, VTList, Ops, 5); 3793} 3794 3795SDVTList SelectionDAG::getVTList(MVT VT) { 3796 return makeVTList(SDNode::getValueTypeList(VT), 1); 3797} 3798 3799SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3800 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3801 E = VTList.rend(); I != E; ++I) 3802 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 3803 return *I; 3804 3805 MVT *Array = Allocator.Allocate<MVT>(2); 3806 Array[0] = VT1; 3807 Array[1] = VT2; 3808 SDVTList Result = makeVTList(Array, 2); 3809 VTList.push_back(Result); 3810 return Result; 3811} 3812 3813SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 3814 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3815 E = VTList.rend(); I != E; ++I) 3816 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3817 I->VTs[2] == VT3) 3818 return *I; 3819 3820 MVT *Array = Allocator.Allocate<MVT>(3); 3821 Array[0] = VT1; 3822 Array[1] = VT2; 3823 Array[2] = VT3; 3824 SDVTList Result = makeVTList(Array, 3); 3825 VTList.push_back(Result); 3826 return Result; 3827} 3828 3829SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3830 switch (NumVTs) { 3831 case 0: assert(0 && "Cannot have nodes without results!"); 3832 case 1: return getVTList(VTs[0]); 3833 case 2: return getVTList(VTs[0], VTs[1]); 3834 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3835 default: break; 3836 } 3837 3838 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3839 E = VTList.rend(); I != E; ++I) { 3840 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 3841 continue; 3842 3843 bool NoMatch = false; 3844 for (unsigned i = 2; i != NumVTs; ++i) 3845 if (VTs[i] != I->VTs[i]) { 3846 NoMatch = true; 3847 break; 3848 } 3849 if (!NoMatch) 3850 return *I; 3851 } 3852 3853 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 3854 std::copy(VTs, VTs+NumVTs, Array); 3855 SDVTList Result = makeVTList(Array, NumVTs); 3856 VTList.push_back(Result); 3857 return Result; 3858} 3859 3860 3861/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3862/// specified operands. If the resultant node already exists in the DAG, 3863/// this does not modify the specified node, instead it returns the node that 3864/// already exists. If the resultant node does not exist in the DAG, the 3865/// input node is returned. As a degenerate case, if you specify the same 3866/// input operands as the node already has, the input node is returned. 3867SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 3868 SDNode *N = InN.getNode(); 3869 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3870 3871 // Check to see if there is no change. 3872 if (Op == N->getOperand(0)) return InN; 3873 3874 // See if the modified node already exists. 3875 void *InsertPos = 0; 3876 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3877 return SDValue(Existing, InN.getResNo()); 3878 3879 // Nope it doesn't. Remove the node from its current place in the maps. 3880 if (InsertPos) 3881 if (!RemoveNodeFromCSEMaps(N)) 3882 InsertPos = 0; 3883 3884 // Now we update the operands. 3885 N->OperandList[0].getVal()->removeUser(0, N); 3886 N->OperandList[0] = Op; 3887 N->OperandList[0].setUser(N); 3888 Op.getNode()->addUser(0, N); 3889 3890 // If this gets put into a CSE map, add it. 3891 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3892 return InN; 3893} 3894 3895SDValue SelectionDAG:: 3896UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 3897 SDNode *N = InN.getNode(); 3898 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3899 3900 // Check to see if there is no change. 3901 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3902 return InN; // No operands changed, just return the input node. 3903 3904 // See if the modified node already exists. 3905 void *InsertPos = 0; 3906 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3907 return SDValue(Existing, InN.getResNo()); 3908 3909 // Nope it doesn't. Remove the node from its current place in the maps. 3910 if (InsertPos) 3911 if (!RemoveNodeFromCSEMaps(N)) 3912 InsertPos = 0; 3913 3914 // Now we update the operands. 3915 if (N->OperandList[0] != Op1) { 3916 N->OperandList[0].getVal()->removeUser(0, N); 3917 N->OperandList[0] = Op1; 3918 N->OperandList[0].setUser(N); 3919 Op1.getNode()->addUser(0, N); 3920 } 3921 if (N->OperandList[1] != Op2) { 3922 N->OperandList[1].getVal()->removeUser(1, N); 3923 N->OperandList[1] = Op2; 3924 N->OperandList[1].setUser(N); 3925 Op2.getNode()->addUser(1, N); 3926 } 3927 3928 // If this gets put into a CSE map, add it. 3929 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3930 return InN; 3931} 3932 3933SDValue SelectionDAG:: 3934UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 3935 SDValue Ops[] = { Op1, Op2, Op3 }; 3936 return UpdateNodeOperands(N, Ops, 3); 3937} 3938 3939SDValue SelectionDAG:: 3940UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3941 SDValue Op3, SDValue Op4) { 3942 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 3943 return UpdateNodeOperands(N, Ops, 4); 3944} 3945 3946SDValue SelectionDAG:: 3947UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3948 SDValue Op3, SDValue Op4, SDValue Op5) { 3949 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3950 return UpdateNodeOperands(N, Ops, 5); 3951} 3952 3953SDValue SelectionDAG:: 3954UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 3955 SDNode *N = InN.getNode(); 3956 assert(N->getNumOperands() == NumOps && 3957 "Update with wrong number of operands"); 3958 3959 // Check to see if there is no change. 3960 bool AnyChange = false; 3961 for (unsigned i = 0; i != NumOps; ++i) { 3962 if (Ops[i] != N->getOperand(i)) { 3963 AnyChange = true; 3964 break; 3965 } 3966 } 3967 3968 // No operands changed, just return the input node. 3969 if (!AnyChange) return InN; 3970 3971 // See if the modified node already exists. 3972 void *InsertPos = 0; 3973 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3974 return SDValue(Existing, InN.getResNo()); 3975 3976 // Nope it doesn't. Remove the node from its current place in the maps. 3977 if (InsertPos) 3978 if (!RemoveNodeFromCSEMaps(N)) 3979 InsertPos = 0; 3980 3981 // Now we update the operands. 3982 for (unsigned i = 0; i != NumOps; ++i) { 3983 if (N->OperandList[i] != Ops[i]) { 3984 N->OperandList[i].getVal()->removeUser(i, N); 3985 N->OperandList[i] = Ops[i]; 3986 N->OperandList[i].setUser(N); 3987 Ops[i].getNode()->addUser(i, N); 3988 } 3989 } 3990 3991 // If this gets put into a CSE map, add it. 3992 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3993 return InN; 3994} 3995 3996/// DropOperands - Release the operands and set this node to have 3997/// zero operands. 3998void SDNode::DropOperands() { 3999 // Unlike the code in MorphNodeTo that does this, we don't need to 4000 // watch for dead nodes here. 4001 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 4002 I->getVal()->removeUser(std::distance(op_begin(), I), this); 4003 4004 NumOperands = 0; 4005} 4006 4007/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4008/// machine opcode. 4009/// 4010SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4011 MVT VT) { 4012 SDVTList VTs = getVTList(VT); 4013 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4014} 4015 4016SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4017 MVT VT, SDValue Op1) { 4018 SDVTList VTs = getVTList(VT); 4019 SDValue Ops[] = { Op1 }; 4020 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4021} 4022 4023SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4024 MVT VT, SDValue Op1, 4025 SDValue Op2) { 4026 SDVTList VTs = getVTList(VT); 4027 SDValue Ops[] = { Op1, Op2 }; 4028 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4029} 4030 4031SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4032 MVT VT, SDValue Op1, 4033 SDValue Op2, SDValue Op3) { 4034 SDVTList VTs = getVTList(VT); 4035 SDValue Ops[] = { Op1, Op2, Op3 }; 4036 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4037} 4038 4039SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4040 MVT VT, const SDValue *Ops, 4041 unsigned NumOps) { 4042 SDVTList VTs = getVTList(VT); 4043 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4044} 4045 4046SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4047 MVT VT1, MVT VT2, const SDValue *Ops, 4048 unsigned NumOps) { 4049 SDVTList VTs = getVTList(VT1, VT2); 4050 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4051} 4052 4053SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4054 MVT VT1, MVT VT2) { 4055 SDVTList VTs = getVTList(VT1, VT2); 4056 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4057} 4058 4059SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4060 MVT VT1, MVT VT2, MVT VT3, 4061 const SDValue *Ops, unsigned NumOps) { 4062 SDVTList VTs = getVTList(VT1, VT2, VT3); 4063 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4064} 4065 4066SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4067 MVT VT1, MVT VT2, 4068 SDValue Op1) { 4069 SDVTList VTs = getVTList(VT1, VT2); 4070 SDValue Ops[] = { Op1 }; 4071 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4072} 4073 4074SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4075 MVT VT1, MVT VT2, 4076 SDValue Op1, SDValue Op2) { 4077 SDVTList VTs = getVTList(VT1, VT2); 4078 SDValue Ops[] = { Op1, Op2 }; 4079 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4080} 4081 4082SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4083 MVT VT1, MVT VT2, 4084 SDValue Op1, SDValue Op2, 4085 SDValue Op3) { 4086 SDVTList VTs = getVTList(VT1, VT2); 4087 SDValue Ops[] = { Op1, Op2, Op3 }; 4088 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4089} 4090 4091SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4092 SDVTList VTs, const SDValue *Ops, 4093 unsigned NumOps) { 4094 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4095} 4096 4097SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4098 MVT VT) { 4099 SDVTList VTs = getVTList(VT); 4100 return MorphNodeTo(N, Opc, VTs, 0, 0); 4101} 4102 4103SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4104 MVT VT, SDValue Op1) { 4105 SDVTList VTs = getVTList(VT); 4106 SDValue Ops[] = { Op1 }; 4107 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4108} 4109 4110SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4111 MVT VT, SDValue Op1, 4112 SDValue Op2) { 4113 SDVTList VTs = getVTList(VT); 4114 SDValue Ops[] = { Op1, Op2 }; 4115 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4116} 4117 4118SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4119 MVT VT, SDValue Op1, 4120 SDValue Op2, SDValue Op3) { 4121 SDVTList VTs = getVTList(VT); 4122 SDValue Ops[] = { Op1, Op2, Op3 }; 4123 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4124} 4125 4126SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4127 MVT VT, const SDValue *Ops, 4128 unsigned NumOps) { 4129 SDVTList VTs = getVTList(VT); 4130 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4131} 4132 4133SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4134 MVT VT1, MVT VT2, const SDValue *Ops, 4135 unsigned NumOps) { 4136 SDVTList VTs = getVTList(VT1, VT2); 4137 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4138} 4139 4140SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4141 MVT VT1, MVT VT2) { 4142 SDVTList VTs = getVTList(VT1, VT2); 4143 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 4144} 4145 4146SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4147 MVT VT1, MVT VT2, MVT VT3, 4148 const SDValue *Ops, unsigned NumOps) { 4149 SDVTList VTs = getVTList(VT1, VT2, VT3); 4150 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 4151} 4152 4153SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4154 MVT VT1, MVT VT2, 4155 SDValue Op1) { 4156 SDVTList VTs = getVTList(VT1, VT2); 4157 SDValue Ops[] = { Op1 }; 4158 return MorphNodeTo(N, Opc, VTs, Ops, 1); 4159} 4160 4161SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4162 MVT VT1, MVT VT2, 4163 SDValue Op1, SDValue Op2) { 4164 SDVTList VTs = getVTList(VT1, VT2); 4165 SDValue Ops[] = { Op1, Op2 }; 4166 return MorphNodeTo(N, Opc, VTs, Ops, 2); 4167} 4168 4169SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4170 MVT VT1, MVT VT2, 4171 SDValue Op1, SDValue Op2, 4172 SDValue Op3) { 4173 SDVTList VTs = getVTList(VT1, VT2); 4174 SDValue Ops[] = { Op1, Op2, Op3 }; 4175 return MorphNodeTo(N, Opc, VTs, Ops, 3); 4176} 4177 4178/// MorphNodeTo - These *mutate* the specified node to have the specified 4179/// return type, opcode, and operands. 4180/// 4181/// Note that MorphNodeTo returns the resultant node. If there is already a 4182/// node of the specified opcode and operands, it returns that node instead of 4183/// the current one. 4184/// 4185/// Using MorphNodeTo is faster than creating a new node and swapping it in 4186/// with ReplaceAllUsesWith both because it often avoids allocating a new 4187/// node, and because it doesn't require CSE recalculation for any of 4188/// the node's users. 4189/// 4190SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4191 SDVTList VTs, const SDValue *Ops, 4192 unsigned NumOps) { 4193 // If an identical node already exists, use it. 4194 void *IP = 0; 4195 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 4196 FoldingSetNodeID ID; 4197 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4198 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4199 return ON; 4200 } 4201 4202 if (!RemoveNodeFromCSEMaps(N)) 4203 IP = 0; 4204 4205 // Start the morphing. 4206 N->NodeType = Opc; 4207 N->ValueList = VTs.VTs; 4208 N->NumValues = VTs.NumVTs; 4209 4210 // Clear the operands list, updating used nodes to remove this from their 4211 // use list. Keep track of any operands that become dead as a result. 4212 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4213 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end(); 4214 I != E; ++I) { 4215 SDNode *Used = I->getVal(); 4216 Used->removeUser(std::distance(B, I), N); 4217 if (Used->use_empty()) 4218 DeadNodeSet.insert(Used); 4219 } 4220 4221 // If NumOps is larger than the # of operands we currently have, reallocate 4222 // the operand list. 4223 if (NumOps > N->NumOperands) { 4224 if (N->OperandsNeedDelete) 4225 delete[] N->OperandList; 4226 4227 if (N->isMachineOpcode()) { 4228 // We're creating a final node that will live unmorphed for the 4229 // remainder of the current SelectionDAG iteration, so we can allocate 4230 // the operands directly out of a pool with no recycling metadata. 4231 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4232 N->OperandsNeedDelete = false; 4233 } else { 4234 N->OperandList = new SDUse[NumOps]; 4235 N->OperandsNeedDelete = true; 4236 } 4237 } 4238 4239 // Assign the new operands. 4240 N->NumOperands = NumOps; 4241 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4242 N->OperandList[i] = Ops[i]; 4243 N->OperandList[i].setUser(N); 4244 SDNode *ToUse = N->OperandList[i].getVal(); 4245 ToUse->addUser(i, N); 4246 } 4247 4248 // Delete any nodes that are still dead after adding the uses for the 4249 // new operands. 4250 SmallVector<SDNode *, 16> DeadNodes; 4251 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4252 E = DeadNodeSet.end(); I != E; ++I) 4253 if ((*I)->use_empty()) 4254 DeadNodes.push_back(*I); 4255 RemoveDeadNodes(DeadNodes); 4256 4257 if (IP) 4258 CSEMap.InsertNode(N, IP); // Memoize the new node. 4259 return N; 4260} 4261 4262 4263/// getTargetNode - These are used for target selectors to create a new node 4264/// with specified return type(s), target opcode, and operands. 4265/// 4266/// Note that getTargetNode returns the resultant node. If there is already a 4267/// node of the specified opcode and operands, it returns that node instead of 4268/// the current one. 4269SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4270 return getNode(~Opcode, VT).getNode(); 4271} 4272SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4273 return getNode(~Opcode, VT, Op1).getNode(); 4274} 4275SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4276 SDValue Op1, SDValue Op2) { 4277 return getNode(~Opcode, VT, Op1, Op2).getNode(); 4278} 4279SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4280 SDValue Op1, SDValue Op2, 4281 SDValue Op3) { 4282 return getNode(~Opcode, VT, Op1, Op2, Op3).getNode(); 4283} 4284SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4285 const SDValue *Ops, unsigned NumOps) { 4286 return getNode(~Opcode, VT, Ops, NumOps).getNode(); 4287} 4288SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4289 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4290 SDValue Op; 4291 return getNode(~Opcode, VTs, 2, &Op, 0).getNode(); 4292} 4293SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4294 MVT VT2, SDValue Op1) { 4295 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4296 return getNode(~Opcode, VTs, 2, &Op1, 1).getNode(); 4297} 4298SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4299 MVT VT2, SDValue Op1, 4300 SDValue Op2) { 4301 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4302 SDValue Ops[] = { Op1, Op2 }; 4303 return getNode(~Opcode, VTs, 2, Ops, 2).getNode(); 4304} 4305SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4306 MVT VT2, SDValue Op1, 4307 SDValue Op2, SDValue Op3) { 4308 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4309 SDValue Ops[] = { Op1, Op2, Op3 }; 4310 return getNode(~Opcode, VTs, 2, Ops, 3).getNode(); 4311} 4312SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4313 const SDValue *Ops, unsigned NumOps) { 4314 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4315 return getNode(~Opcode, VTs, 2, Ops, NumOps).getNode(); 4316} 4317SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4318 SDValue Op1, SDValue Op2) { 4319 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4320 SDValue Ops[] = { Op1, Op2 }; 4321 return getNode(~Opcode, VTs, 3, Ops, 2).getNode(); 4322} 4323SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4324 SDValue Op1, SDValue Op2, 4325 SDValue Op3) { 4326 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4327 SDValue Ops[] = { Op1, Op2, Op3 }; 4328 return getNode(~Opcode, VTs, 3, Ops, 3).getNode(); 4329} 4330SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4331 const SDValue *Ops, unsigned NumOps) { 4332 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4333 return getNode(~Opcode, VTs, 3, Ops, NumOps).getNode(); 4334} 4335SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4336 MVT VT2, MVT VT3, MVT VT4, 4337 const SDValue *Ops, unsigned NumOps) { 4338 std::vector<MVT> VTList; 4339 VTList.push_back(VT1); 4340 VTList.push_back(VT2); 4341 VTList.push_back(VT3); 4342 VTList.push_back(VT4); 4343 const MVT *VTs = getNodeValueTypes(VTList); 4344 return getNode(~Opcode, VTs, 4, Ops, NumOps).getNode(); 4345} 4346SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4347 const std::vector<MVT> &ResultTys, 4348 const SDValue *Ops, unsigned NumOps) { 4349 const MVT *VTs = getNodeValueTypes(ResultTys); 4350 return getNode(~Opcode, VTs, ResultTys.size(), 4351 Ops, NumOps).getNode(); 4352} 4353 4354/// getNodeIfExists - Get the specified node if it's already available, or 4355/// else return NULL. 4356SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4357 const SDValue *Ops, unsigned NumOps) { 4358 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4359 FoldingSetNodeID ID; 4360 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4361 void *IP = 0; 4362 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4363 return E; 4364 } 4365 return NULL; 4366} 4367 4368 4369/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4370/// This can cause recursive merging of nodes in the DAG. 4371/// 4372/// This version assumes From has a single result value. 4373/// 4374void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4375 DAGUpdateListener *UpdateListener) { 4376 SDNode *From = FromN.getNode(); 4377 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 4378 "Cannot replace with this method!"); 4379 assert(From != To.getNode() && "Cannot replace uses of with self"); 4380 4381 while (!From->use_empty()) { 4382 SDNode::use_iterator UI = From->use_begin(); 4383 SDNode *U = *UI; 4384 4385 // This node is about to morph, remove its old self from the CSE maps. 4386 RemoveNodeFromCSEMaps(U); 4387 int operandNum = 0; 4388 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4389 I != E; ++I, ++operandNum) 4390 if (I->getVal() == From) { 4391 From->removeUser(operandNum, U); 4392 *I = To; 4393 I->setUser(U); 4394 To.getNode()->addUser(operandNum, U); 4395 } 4396 4397 // Now that we have modified U, add it back to the CSE maps. If it already 4398 // exists there, recursively merge the results together. 4399 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4400 ReplaceAllUsesWith(U, Existing, UpdateListener); 4401 // U is now dead. Inform the listener if it exists and delete it. 4402 if (UpdateListener) 4403 UpdateListener->NodeDeleted(U, Existing); 4404 DeleteNodeNotInCSEMaps(U); 4405 } else { 4406 // If the node doesn't already exist, we updated it. Inform a listener if 4407 // it exists. 4408 if (UpdateListener) 4409 UpdateListener->NodeUpdated(U); 4410 } 4411 } 4412} 4413 4414/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4415/// This can cause recursive merging of nodes in the DAG. 4416/// 4417/// This version assumes From/To have matching types and numbers of result 4418/// values. 4419/// 4420void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4421 DAGUpdateListener *UpdateListener) { 4422 assert(From->getVTList().VTs == To->getVTList().VTs && 4423 From->getNumValues() == To->getNumValues() && 4424 "Cannot use this version of ReplaceAllUsesWith!"); 4425 4426 // Handle the trivial case. 4427 if (From == To) 4428 return; 4429 4430 while (!From->use_empty()) { 4431 SDNode::use_iterator UI = From->use_begin(); 4432 SDNode *U = *UI; 4433 4434 // This node is about to morph, remove its old self from the CSE maps. 4435 RemoveNodeFromCSEMaps(U); 4436 int operandNum = 0; 4437 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4438 I != E; ++I, ++operandNum) 4439 if (I->getVal() == From) { 4440 From->removeUser(operandNum, U); 4441 I->getSDValue().setNode(To); 4442 To->addUser(operandNum, U); 4443 } 4444 4445 // Now that we have modified U, add it back to the CSE maps. If it already 4446 // exists there, recursively merge the results together. 4447 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4448 ReplaceAllUsesWith(U, Existing, UpdateListener); 4449 // U is now dead. Inform the listener if it exists and delete it. 4450 if (UpdateListener) 4451 UpdateListener->NodeDeleted(U, Existing); 4452 DeleteNodeNotInCSEMaps(U); 4453 } else { 4454 // If the node doesn't already exist, we updated it. Inform a listener if 4455 // it exists. 4456 if (UpdateListener) 4457 UpdateListener->NodeUpdated(U); 4458 } 4459 } 4460} 4461 4462/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4463/// This can cause recursive merging of nodes in the DAG. 4464/// 4465/// This version can replace From with any result values. To must match the 4466/// number and types of values returned by From. 4467void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4468 const SDValue *To, 4469 DAGUpdateListener *UpdateListener) { 4470 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4471 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4472 4473 while (!From->use_empty()) { 4474 SDNode::use_iterator UI = From->use_begin(); 4475 SDNode *U = *UI; 4476 4477 // This node is about to morph, remove its old self from the CSE maps. 4478 RemoveNodeFromCSEMaps(U); 4479 int operandNum = 0; 4480 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4481 I != E; ++I, ++operandNum) 4482 if (I->getVal() == From) { 4483 const SDValue &ToOp = To[I->getSDValue().getResNo()]; 4484 From->removeUser(operandNum, U); 4485 *I = ToOp; 4486 I->setUser(U); 4487 ToOp.getNode()->addUser(operandNum, U); 4488 } 4489 4490 // Now that we have modified U, add it back to the CSE maps. If it already 4491 // exists there, recursively merge the results together. 4492 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4493 ReplaceAllUsesWith(U, Existing, UpdateListener); 4494 // U is now dead. Inform the listener if it exists and delete it. 4495 if (UpdateListener) 4496 UpdateListener->NodeDeleted(U, Existing); 4497 DeleteNodeNotInCSEMaps(U); 4498 } else { 4499 // If the node doesn't already exist, we updated it. Inform a listener if 4500 // it exists. 4501 if (UpdateListener) 4502 UpdateListener->NodeUpdated(U); 4503 } 4504 } 4505} 4506 4507/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4508/// uses of other values produced by From.getVal() alone. The Deleted vector is 4509/// handled the same way as for ReplaceAllUsesWith. 4510void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4511 DAGUpdateListener *UpdateListener){ 4512 // Handle the really simple, really trivial case efficiently. 4513 if (From == To) return; 4514 4515 // Handle the simple, trivial, case efficiently. 4516 if (From.getNode()->getNumValues() == 1) { 4517 ReplaceAllUsesWith(From, To, UpdateListener); 4518 return; 4519 } 4520 4521 // Get all of the users of From.getNode(). We want these in a nice, 4522 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4523 SmallSetVector<SDNode*, 16> Users(From.getNode()->use_begin(), From.getNode()->use_end()); 4524 4525 while (!Users.empty()) { 4526 // We know that this user uses some value of From. If it is the right 4527 // value, update it. 4528 SDNode *User = Users.back(); 4529 Users.pop_back(); 4530 4531 // Scan for an operand that matches From. 4532 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4533 for (; Op != E; ++Op) 4534 if (*Op == From) break; 4535 4536 // If there are no matches, the user must use some other result of From. 4537 if (Op == E) continue; 4538 4539 // Okay, we know this user needs to be updated. Remove its old self 4540 // from the CSE maps. 4541 RemoveNodeFromCSEMaps(User); 4542 4543 // Update all operands that match "From" in case there are multiple uses. 4544 for (; Op != E; ++Op) { 4545 if (*Op == From) { 4546 From.getNode()->removeUser(Op-User->op_begin(), User); 4547 *Op = To; 4548 Op->setUser(User); 4549 To.getNode()->addUser(Op-User->op_begin(), User); 4550 } 4551 } 4552 4553 // Now that we have modified User, add it back to the CSE maps. If it 4554 // already exists there, recursively merge the results together. 4555 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4556 if (!Existing) { 4557 if (UpdateListener) UpdateListener->NodeUpdated(User); 4558 continue; // Continue on to next user. 4559 } 4560 4561 // If there was already an existing matching node, use ReplaceAllUsesWith 4562 // to replace the dead one with the existing one. This can cause 4563 // recursive merging of other unrelated nodes down the line. 4564 ReplaceAllUsesWith(User, Existing, UpdateListener); 4565 4566 // User is now dead. Notify a listener if present. 4567 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4568 DeleteNodeNotInCSEMaps(User); 4569 } 4570} 4571 4572/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4573/// uses of other values produced by From.getVal() alone. The same value may 4574/// appear in both the From and To list. The Deleted vector is 4575/// handled the same way as for ReplaceAllUsesWith. 4576void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4577 const SDValue *To, 4578 unsigned Num, 4579 DAGUpdateListener *UpdateListener){ 4580 // Handle the simple, trivial case efficiently. 4581 if (Num == 1) 4582 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4583 4584 SmallVector<std::pair<SDNode *, unsigned>, 16> Users; 4585 for (unsigned i = 0; i != Num; ++i) 4586 for (SDNode::use_iterator UI = From[i].getNode()->use_begin(), 4587 E = From[i].getNode()->use_end(); UI != E; ++UI) 4588 Users.push_back(std::make_pair(*UI, i)); 4589 4590 while (!Users.empty()) { 4591 // We know that this user uses some value of From. If it is the right 4592 // value, update it. 4593 SDNode *User = Users.back().first; 4594 unsigned i = Users.back().second; 4595 Users.pop_back(); 4596 4597 // Scan for an operand that matches From. 4598 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4599 for (; Op != E; ++Op) 4600 if (*Op == From[i]) break; 4601 4602 // If there are no matches, the user must use some other result of From. 4603 if (Op == E) continue; 4604 4605 // Okay, we know this user needs to be updated. Remove its old self 4606 // from the CSE maps. 4607 RemoveNodeFromCSEMaps(User); 4608 4609 // Update all operands that match "From" in case there are multiple uses. 4610 for (; Op != E; ++Op) { 4611 if (*Op == From[i]) { 4612 From[i].getNode()->removeUser(Op-User->op_begin(), User); 4613 *Op = To[i]; 4614 Op->setUser(User); 4615 To[i].getNode()->addUser(Op-User->op_begin(), User); 4616 } 4617 } 4618 4619 // Now that we have modified User, add it back to the CSE maps. If it 4620 // already exists there, recursively merge the results together. 4621 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4622 if (!Existing) { 4623 if (UpdateListener) UpdateListener->NodeUpdated(User); 4624 continue; // Continue on to next user. 4625 } 4626 4627 // If there was already an existing matching node, use ReplaceAllUsesWith 4628 // to replace the dead one with the existing one. This can cause 4629 // recursive merging of other unrelated nodes down the line. 4630 ReplaceAllUsesWith(User, Existing, UpdateListener); 4631 4632 // User is now dead. Notify a listener if present. 4633 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4634 DeleteNodeNotInCSEMaps(User); 4635 } 4636} 4637 4638/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4639/// based on their topological order. It returns the maximum id and a vector 4640/// of the SDNodes* in assigned order by reference. 4641unsigned SelectionDAG::AssignTopologicalOrder() { 4642 4643 unsigned DAGSize = 0; 4644 4645 // SortedPos tracks the progress of the algorithm. Nodes before it are 4646 // sorted, nodes after it are unsorted. When the algorithm completes 4647 // it is at the end of the list. 4648 allnodes_iterator SortedPos = allnodes_begin(); 4649 4650 // Visit all the nodes. Add nodes with no operands to the TopOrder result 4651 // array immediately. Annotate nodes that do have operands with their 4652 // operand count. Before we do this, the Node Id fields of the nodes 4653 // may contain arbitrary values. After, the Node Id fields for nodes 4654 // before SortedPos will contain the topological sort index, and the 4655 // Node Id fields for nodes At SortedPos and after will contain the 4656 // count of outstanding operands. 4657 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 4658 SDNode *N = I++; 4659 unsigned Degree = N->getNumOperands(); 4660 if (Degree == 0) { 4661 // A node with no uses, add it to the result array immediately. 4662 N->setNodeId(DAGSize++); 4663 allnodes_iterator Q = N; 4664 if (Q != SortedPos) 4665 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 4666 ++SortedPos; 4667 } else { 4668 // Temporarily use the Node Id as scratch space for the degree count. 4669 N->setNodeId(Degree); 4670 } 4671 } 4672 4673 // Visit all the nodes. As we iterate, moves nodes into sorted order, 4674 // such that by the time the end is reached all nodes will be sorted. 4675 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 4676 SDNode *N = I; 4677 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 4678 UI != UE; ++UI) { 4679 SDNode *P = *UI; 4680 unsigned Degree = P->getNodeId(); 4681 --Degree; 4682 if (Degree == 0) { 4683 // All of P's operands are sorted, so P may sorted now. 4684 P->setNodeId(DAGSize++); 4685 if (P != SortedPos) 4686 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 4687 ++SortedPos; 4688 } else { 4689 // Update P's outstanding operand count. 4690 P->setNodeId(Degree); 4691 } 4692 } 4693 } 4694 4695 assert(SortedPos == AllNodes.end() && 4696 "Topological sort incomplete!"); 4697 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 4698 "First node in topological sort is not the entry token!"); 4699 assert(AllNodes.front().getNodeId() == 0 && 4700 "First node in topological sort has non-zero id!"); 4701 assert(AllNodes.front().getNumOperands() == 0 && 4702 "First node in topological sort has operands!"); 4703 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 4704 "Last node in topologic sort has unexpected id!"); 4705 assert(AllNodes.back().use_empty() && 4706 "Last node in topologic sort has users!"); 4707 assert(DAGSize == allnodes_size() && "TopOrder result count mismatch!"); 4708 return DAGSize; 4709} 4710 4711 4712 4713//===----------------------------------------------------------------------===// 4714// SDNode Class 4715//===----------------------------------------------------------------------===// 4716 4717// Out-of-line virtual method to give class a home. 4718void SDNode::ANCHOR() {} 4719void UnarySDNode::ANCHOR() {} 4720void BinarySDNode::ANCHOR() {} 4721void TernarySDNode::ANCHOR() {} 4722void HandleSDNode::ANCHOR() {} 4723void ConstantSDNode::ANCHOR() {} 4724void ConstantFPSDNode::ANCHOR() {} 4725void GlobalAddressSDNode::ANCHOR() {} 4726void FrameIndexSDNode::ANCHOR() {} 4727void JumpTableSDNode::ANCHOR() {} 4728void ConstantPoolSDNode::ANCHOR() {} 4729void BasicBlockSDNode::ANCHOR() {} 4730void SrcValueSDNode::ANCHOR() {} 4731void MemOperandSDNode::ANCHOR() {} 4732void RegisterSDNode::ANCHOR() {} 4733void DbgStopPointSDNode::ANCHOR() {} 4734void LabelSDNode::ANCHOR() {} 4735void ExternalSymbolSDNode::ANCHOR() {} 4736void CondCodeSDNode::ANCHOR() {} 4737void ARG_FLAGSSDNode::ANCHOR() {} 4738void VTSDNode::ANCHOR() {} 4739void MemSDNode::ANCHOR() {} 4740void LoadSDNode::ANCHOR() {} 4741void StoreSDNode::ANCHOR() {} 4742void AtomicSDNode::ANCHOR() {} 4743void MemIntrinsicSDNode::ANCHOR() {} 4744void CallSDNode::ANCHOR() {} 4745void CvtRndSatSDNode::ANCHOR() {} 4746 4747HandleSDNode::~HandleSDNode() { 4748 DropOperands(); 4749} 4750 4751GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4752 MVT VT, int64_t o) 4753 : SDNode(isa<GlobalVariable>(GA) && 4754 cast<GlobalVariable>(GA)->isThreadLocal() ? 4755 // Thread Local 4756 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4757 // Non Thread Local 4758 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4759 getSDVTList(VT)), Offset(o) { 4760 TheGlobal = const_cast<GlobalValue*>(GA); 4761} 4762 4763MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 4764 const Value *srcValue, int SVO, 4765 unsigned alignment, bool vol) 4766 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4767 Flags(encodeMemSDNodeFlags(vol, alignment)) { 4768 4769 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4770 assert(getAlignment() == alignment && "Alignment representation error!"); 4771 assert(isVolatile() == vol && "Volatile representation error!"); 4772} 4773 4774MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, const SDValue *Ops, 4775 unsigned NumOps, MVT memvt, const Value *srcValue, 4776 int SVO, unsigned alignment, bool vol) 4777 : SDNode(Opc, VTs, Ops, NumOps), 4778 MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4779 Flags(vol | ((Log2_32(alignment) + 1) << 1)) { 4780 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4781 assert(getAlignment() == alignment && "Alignment representation error!"); 4782 assert(isVolatile() == vol && "Volatile representation error!"); 4783} 4784 4785/// getMemOperand - Return a MachineMemOperand object describing the memory 4786/// reference performed by this memory reference. 4787MachineMemOperand MemSDNode::getMemOperand() const { 4788 int Flags = 0; 4789 if (isa<LoadSDNode>(this)) 4790 Flags = MachineMemOperand::MOLoad; 4791 else if (isa<StoreSDNode>(this)) 4792 Flags = MachineMemOperand::MOStore; 4793 else if (isa<AtomicSDNode>(this)) { 4794 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4795 } 4796 else { 4797 const MemIntrinsicSDNode* MemIntrinNode = dyn_cast<MemIntrinsicSDNode>(this); 4798 assert(MemIntrinNode && "Unknown MemSDNode opcode!"); 4799 if (MemIntrinNode->readMem()) Flags |= MachineMemOperand::MOLoad; 4800 if (MemIntrinNode->writeMem()) Flags |= MachineMemOperand::MOStore; 4801 } 4802 4803 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4804 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4805 4806 // Check if the memory reference references a frame index 4807 const FrameIndexSDNode *FI = 4808 dyn_cast<const FrameIndexSDNode>(getBasePtr().getNode()); 4809 if (!getSrcValue() && FI) 4810 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4811 Flags, 0, Size, getAlignment()); 4812 else 4813 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4814 Size, getAlignment()); 4815} 4816 4817/// Profile - Gather unique data for the node. 4818/// 4819void SDNode::Profile(FoldingSetNodeID &ID) const { 4820 AddNodeIDNode(ID, this); 4821} 4822 4823/// getValueTypeList - Return a pointer to the specified value type. 4824/// 4825const MVT *SDNode::getValueTypeList(MVT VT) { 4826 if (VT.isExtended()) { 4827 static std::set<MVT, MVT::compareRawBits> EVTs; 4828 return &(*EVTs.insert(VT).first); 4829 } else { 4830 static MVT VTs[MVT::LAST_VALUETYPE]; 4831 VTs[VT.getSimpleVT()] = VT; 4832 return &VTs[VT.getSimpleVT()]; 4833 } 4834} 4835 4836/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4837/// indicated value. This method ignores uses of other values defined by this 4838/// operation. 4839bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4840 assert(Value < getNumValues() && "Bad value!"); 4841 4842 // TODO: Only iterate over uses of a given value of the node 4843 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4844 if (UI.getUse().getSDValue().getResNo() == Value) { 4845 if (NUses == 0) 4846 return false; 4847 --NUses; 4848 } 4849 } 4850 4851 // Found exactly the right number of uses? 4852 return NUses == 0; 4853} 4854 4855 4856/// hasAnyUseOfValue - Return true if there are any use of the indicated 4857/// value. This method ignores uses of other values defined by this operation. 4858bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4859 assert(Value < getNumValues() && "Bad value!"); 4860 4861 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 4862 if (UI.getUse().getSDValue().getResNo() == Value) 4863 return true; 4864 4865 return false; 4866} 4867 4868 4869/// isOnlyUserOf - Return true if this node is the only use of N. 4870/// 4871bool SDNode::isOnlyUserOf(SDNode *N) const { 4872 bool Seen = false; 4873 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4874 SDNode *User = *I; 4875 if (User == this) 4876 Seen = true; 4877 else 4878 return false; 4879 } 4880 4881 return Seen; 4882} 4883 4884/// isOperand - Return true if this node is an operand of N. 4885/// 4886bool SDValue::isOperandOf(SDNode *N) const { 4887 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4888 if (*this == N->getOperand(i)) 4889 return true; 4890 return false; 4891} 4892 4893bool SDNode::isOperandOf(SDNode *N) const { 4894 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4895 if (this == N->OperandList[i].getVal()) 4896 return true; 4897 return false; 4898} 4899 4900/// reachesChainWithoutSideEffects - Return true if this operand (which must 4901/// be a chain) reaches the specified operand without crossing any 4902/// side-effecting instructions. In practice, this looks through token 4903/// factors and non-volatile loads. In order to remain efficient, this only 4904/// looks a couple of nodes in, it does not do an exhaustive search. 4905bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 4906 unsigned Depth) const { 4907 if (*this == Dest) return true; 4908 4909 // Don't search too deeply, we just want to be able to see through 4910 // TokenFactor's etc. 4911 if (Depth == 0) return false; 4912 4913 // If this is a token factor, all inputs to the TF happen in parallel. If any 4914 // of the operands of the TF reach dest, then we can do the xform. 4915 if (getOpcode() == ISD::TokenFactor) { 4916 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4917 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4918 return true; 4919 return false; 4920 } 4921 4922 // Loads don't have side effects, look through them. 4923 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4924 if (!Ld->isVolatile()) 4925 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4926 } 4927 return false; 4928} 4929 4930 4931static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4932 SmallPtrSet<SDNode *, 32> &Visited) { 4933 if (found || !Visited.insert(N)) 4934 return; 4935 4936 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4937 SDNode *Op = N->getOperand(i).getNode(); 4938 if (Op == P) { 4939 found = true; 4940 return; 4941 } 4942 findPredecessor(Op, P, found, Visited); 4943 } 4944} 4945 4946/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4947/// is either an operand of N or it can be reached by recursively traversing 4948/// up the operands. 4949/// NOTE: this is an expensive method. Use it carefully. 4950bool SDNode::isPredecessorOf(SDNode *N) const { 4951 SmallPtrSet<SDNode *, 32> Visited; 4952 bool found = false; 4953 findPredecessor(N, this, found, Visited); 4954 return found; 4955} 4956 4957uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4958 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4959 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 4960} 4961 4962std::string SDNode::getOperationName(const SelectionDAG *G) const { 4963 switch (getOpcode()) { 4964 default: 4965 if (getOpcode() < ISD::BUILTIN_OP_END) 4966 return "<<Unknown DAG Node>>"; 4967 if (isMachineOpcode()) { 4968 if (G) 4969 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4970 if (getMachineOpcode() < TII->getNumOpcodes()) 4971 return TII->get(getMachineOpcode()).getName(); 4972 return "<<Unknown Machine Node>>"; 4973 } 4974 if (G) { 4975 TargetLowering &TLI = G->getTargetLoweringInfo(); 4976 const char *Name = TLI.getTargetNodeName(getOpcode()); 4977 if (Name) return Name; 4978 return "<<Unknown Target Node>>"; 4979 } 4980 return "<<Unknown Node>>"; 4981 4982#ifndef NDEBUG 4983 case ISD::DELETED_NODE: 4984 return "<<Deleted Node!>>"; 4985#endif 4986 case ISD::PREFETCH: return "Prefetch"; 4987 case ISD::MEMBARRIER: return "MemBarrier"; 4988 case ISD::ATOMIC_CMP_SWAP_8: return "AtomicCmpSwap8"; 4989 case ISD::ATOMIC_SWAP_8: return "AtomicSwap8"; 4990 case ISD::ATOMIC_LOAD_ADD_8: return "AtomicLoadAdd8"; 4991 case ISD::ATOMIC_LOAD_SUB_8: return "AtomicLoadSub8"; 4992 case ISD::ATOMIC_LOAD_AND_8: return "AtomicLoadAnd8"; 4993 case ISD::ATOMIC_LOAD_OR_8: return "AtomicLoadOr8"; 4994 case ISD::ATOMIC_LOAD_XOR_8: return "AtomicLoadXor8"; 4995 case ISD::ATOMIC_LOAD_NAND_8: return "AtomicLoadNand8"; 4996 case ISD::ATOMIC_LOAD_MIN_8: return "AtomicLoadMin8"; 4997 case ISD::ATOMIC_LOAD_MAX_8: return "AtomicLoadMax8"; 4998 case ISD::ATOMIC_LOAD_UMIN_8: return "AtomicLoadUMin8"; 4999 case ISD::ATOMIC_LOAD_UMAX_8: return "AtomicLoadUMax8"; 5000 case ISD::ATOMIC_CMP_SWAP_16: return "AtomicCmpSwap16"; 5001 case ISD::ATOMIC_SWAP_16: return "AtomicSwap16"; 5002 case ISD::ATOMIC_LOAD_ADD_16: return "AtomicLoadAdd16"; 5003 case ISD::ATOMIC_LOAD_SUB_16: return "AtomicLoadSub16"; 5004 case ISD::ATOMIC_LOAD_AND_16: return "AtomicLoadAnd16"; 5005 case ISD::ATOMIC_LOAD_OR_16: return "AtomicLoadOr16"; 5006 case ISD::ATOMIC_LOAD_XOR_16: return "AtomicLoadXor16"; 5007 case ISD::ATOMIC_LOAD_NAND_16: return "AtomicLoadNand16"; 5008 case ISD::ATOMIC_LOAD_MIN_16: return "AtomicLoadMin16"; 5009 case ISD::ATOMIC_LOAD_MAX_16: return "AtomicLoadMax16"; 5010 case ISD::ATOMIC_LOAD_UMIN_16: return "AtomicLoadUMin16"; 5011 case ISD::ATOMIC_LOAD_UMAX_16: return "AtomicLoadUMax16"; 5012 case ISD::ATOMIC_CMP_SWAP_32: return "AtomicCmpSwap32"; 5013 case ISD::ATOMIC_SWAP_32: return "AtomicSwap32"; 5014 case ISD::ATOMIC_LOAD_ADD_32: return "AtomicLoadAdd32"; 5015 case ISD::ATOMIC_LOAD_SUB_32: return "AtomicLoadSub32"; 5016 case ISD::ATOMIC_LOAD_AND_32: return "AtomicLoadAnd32"; 5017 case ISD::ATOMIC_LOAD_OR_32: return "AtomicLoadOr32"; 5018 case ISD::ATOMIC_LOAD_XOR_32: return "AtomicLoadXor32"; 5019 case ISD::ATOMIC_LOAD_NAND_32: return "AtomicLoadNand32"; 5020 case ISD::ATOMIC_LOAD_MIN_32: return "AtomicLoadMin32"; 5021 case ISD::ATOMIC_LOAD_MAX_32: return "AtomicLoadMax32"; 5022 case ISD::ATOMIC_LOAD_UMIN_32: return "AtomicLoadUMin32"; 5023 case ISD::ATOMIC_LOAD_UMAX_32: return "AtomicLoadUMax32"; 5024 case ISD::ATOMIC_CMP_SWAP_64: return "AtomicCmpSwap64"; 5025 case ISD::ATOMIC_SWAP_64: return "AtomicSwap64"; 5026 case ISD::ATOMIC_LOAD_ADD_64: return "AtomicLoadAdd64"; 5027 case ISD::ATOMIC_LOAD_SUB_64: return "AtomicLoadSub64"; 5028 case ISD::ATOMIC_LOAD_AND_64: return "AtomicLoadAnd64"; 5029 case ISD::ATOMIC_LOAD_OR_64: return "AtomicLoadOr64"; 5030 case ISD::ATOMIC_LOAD_XOR_64: return "AtomicLoadXor64"; 5031 case ISD::ATOMIC_LOAD_NAND_64: return "AtomicLoadNand64"; 5032 case ISD::ATOMIC_LOAD_MIN_64: return "AtomicLoadMin64"; 5033 case ISD::ATOMIC_LOAD_MAX_64: return "AtomicLoadMax64"; 5034 case ISD::ATOMIC_LOAD_UMIN_64: return "AtomicLoadUMin64"; 5035 case ISD::ATOMIC_LOAD_UMAX_64: return "AtomicLoadUMax64"; 5036 case ISD::PCMARKER: return "PCMarker"; 5037 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5038 case ISD::SRCVALUE: return "SrcValue"; 5039 case ISD::MEMOPERAND: return "MemOperand"; 5040 case ISD::EntryToken: return "EntryToken"; 5041 case ISD::TokenFactor: return "TokenFactor"; 5042 case ISD::AssertSext: return "AssertSext"; 5043 case ISD::AssertZext: return "AssertZext"; 5044 5045 case ISD::BasicBlock: return "BasicBlock"; 5046 case ISD::ARG_FLAGS: return "ArgFlags"; 5047 case ISD::VALUETYPE: return "ValueType"; 5048 case ISD::Register: return "Register"; 5049 5050 case ISD::Constant: return "Constant"; 5051 case ISD::ConstantFP: return "ConstantFP"; 5052 case ISD::GlobalAddress: return "GlobalAddress"; 5053 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5054 case ISD::FrameIndex: return "FrameIndex"; 5055 case ISD::JumpTable: return "JumpTable"; 5056 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5057 case ISD::RETURNADDR: return "RETURNADDR"; 5058 case ISD::FRAMEADDR: return "FRAMEADDR"; 5059 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5060 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5061 case ISD::EHSELECTION: return "EHSELECTION"; 5062 case ISD::EH_RETURN: return "EH_RETURN"; 5063 case ISD::ConstantPool: return "ConstantPool"; 5064 case ISD::ExternalSymbol: return "ExternalSymbol"; 5065 case ISD::INTRINSIC_WO_CHAIN: { 5066 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getZExtValue(); 5067 return Intrinsic::getName((Intrinsic::ID)IID); 5068 } 5069 case ISD::INTRINSIC_VOID: 5070 case ISD::INTRINSIC_W_CHAIN: { 5071 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getZExtValue(); 5072 return Intrinsic::getName((Intrinsic::ID)IID); 5073 } 5074 5075 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5076 case ISD::TargetConstant: return "TargetConstant"; 5077 case ISD::TargetConstantFP:return "TargetConstantFP"; 5078 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5079 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5080 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5081 case ISD::TargetJumpTable: return "TargetJumpTable"; 5082 case ISD::TargetConstantPool: return "TargetConstantPool"; 5083 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5084 5085 case ISD::CopyToReg: return "CopyToReg"; 5086 case ISD::CopyFromReg: return "CopyFromReg"; 5087 case ISD::UNDEF: return "undef"; 5088 case ISD::MERGE_VALUES: return "merge_values"; 5089 case ISD::INLINEASM: return "inlineasm"; 5090 case ISD::DBG_LABEL: return "dbg_label"; 5091 case ISD::EH_LABEL: return "eh_label"; 5092 case ISD::DECLARE: return "declare"; 5093 case ISD::HANDLENODE: return "handlenode"; 5094 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 5095 case ISD::CALL: return "call"; 5096 5097 // Unary operators 5098 case ISD::FABS: return "fabs"; 5099 case ISD::FNEG: return "fneg"; 5100 case ISD::FSQRT: return "fsqrt"; 5101 case ISD::FSIN: return "fsin"; 5102 case ISD::FCOS: return "fcos"; 5103 case ISD::FPOWI: return "fpowi"; 5104 case ISD::FPOW: return "fpow"; 5105 case ISD::FTRUNC: return "ftrunc"; 5106 case ISD::FFLOOR: return "ffloor"; 5107 case ISD::FCEIL: return "fceil"; 5108 case ISD::FRINT: return "frint"; 5109 case ISD::FNEARBYINT: return "fnearbyint"; 5110 5111 // Binary operators 5112 case ISD::ADD: return "add"; 5113 case ISD::SUB: return "sub"; 5114 case ISD::MUL: return "mul"; 5115 case ISD::MULHU: return "mulhu"; 5116 case ISD::MULHS: return "mulhs"; 5117 case ISD::SDIV: return "sdiv"; 5118 case ISD::UDIV: return "udiv"; 5119 case ISD::SREM: return "srem"; 5120 case ISD::UREM: return "urem"; 5121 case ISD::SMUL_LOHI: return "smul_lohi"; 5122 case ISD::UMUL_LOHI: return "umul_lohi"; 5123 case ISD::SDIVREM: return "sdivrem"; 5124 case ISD::UDIVREM: return "udivrem"; 5125 case ISD::AND: return "and"; 5126 case ISD::OR: return "or"; 5127 case ISD::XOR: return "xor"; 5128 case ISD::SHL: return "shl"; 5129 case ISD::SRA: return "sra"; 5130 case ISD::SRL: return "srl"; 5131 case ISD::ROTL: return "rotl"; 5132 case ISD::ROTR: return "rotr"; 5133 case ISD::FADD: return "fadd"; 5134 case ISD::FSUB: return "fsub"; 5135 case ISD::FMUL: return "fmul"; 5136 case ISD::FDIV: return "fdiv"; 5137 case ISD::FREM: return "frem"; 5138 case ISD::FCOPYSIGN: return "fcopysign"; 5139 case ISD::FGETSIGN: return "fgetsign"; 5140 5141 case ISD::SETCC: return "setcc"; 5142 case ISD::VSETCC: return "vsetcc"; 5143 case ISD::SELECT: return "select"; 5144 case ISD::SELECT_CC: return "select_cc"; 5145 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5146 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5147 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5148 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5149 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5150 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5151 case ISD::CARRY_FALSE: return "carry_false"; 5152 case ISD::ADDC: return "addc"; 5153 case ISD::ADDE: return "adde"; 5154 case ISD::SADDO: return "saddo"; 5155 case ISD::UADDO: return "uaddo"; 5156 case ISD::SUBC: return "subc"; 5157 case ISD::SUBE: return "sube"; 5158 case ISD::SHL_PARTS: return "shl_parts"; 5159 case ISD::SRA_PARTS: return "sra_parts"; 5160 case ISD::SRL_PARTS: return "srl_parts"; 5161 5162 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 5163 case ISD::INSERT_SUBREG: return "insert_subreg"; 5164 5165 // Conversion operators. 5166 case ISD::SIGN_EXTEND: return "sign_extend"; 5167 case ISD::ZERO_EXTEND: return "zero_extend"; 5168 case ISD::ANY_EXTEND: return "any_extend"; 5169 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5170 case ISD::TRUNCATE: return "truncate"; 5171 case ISD::FP_ROUND: return "fp_round"; 5172 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5173 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5174 case ISD::FP_EXTEND: return "fp_extend"; 5175 5176 case ISD::SINT_TO_FP: return "sint_to_fp"; 5177 case ISD::UINT_TO_FP: return "uint_to_fp"; 5178 case ISD::FP_TO_SINT: return "fp_to_sint"; 5179 case ISD::FP_TO_UINT: return "fp_to_uint"; 5180 case ISD::BIT_CONVERT: return "bit_convert"; 5181 5182 case ISD::CONVERT_RNDSAT: { 5183 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5184 default: assert(0 && "Unknown cvt code!"); 5185 case ISD::CVT_FF: return "cvt_ff"; 5186 case ISD::CVT_FS: return "cvt_fs"; 5187 case ISD::CVT_FU: return "cvt_fu"; 5188 case ISD::CVT_SF: return "cvt_sf"; 5189 case ISD::CVT_UF: return "cvt_uf"; 5190 case ISD::CVT_SS: return "cvt_ss"; 5191 case ISD::CVT_SU: return "cvt_su"; 5192 case ISD::CVT_US: return "cvt_us"; 5193 case ISD::CVT_UU: return "cvt_uu"; 5194 } 5195 } 5196 5197 // Control flow instructions 5198 case ISD::BR: return "br"; 5199 case ISD::BRIND: return "brind"; 5200 case ISD::BR_JT: return "br_jt"; 5201 case ISD::BRCOND: return "brcond"; 5202 case ISD::BR_CC: return "br_cc"; 5203 case ISD::RET: return "ret"; 5204 case ISD::CALLSEQ_START: return "callseq_start"; 5205 case ISD::CALLSEQ_END: return "callseq_end"; 5206 5207 // Other operators 5208 case ISD::LOAD: return "load"; 5209 case ISD::STORE: return "store"; 5210 case ISD::VAARG: return "vaarg"; 5211 case ISD::VACOPY: return "vacopy"; 5212 case ISD::VAEND: return "vaend"; 5213 case ISD::VASTART: return "vastart"; 5214 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5215 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5216 case ISD::BUILD_PAIR: return "build_pair"; 5217 case ISD::STACKSAVE: return "stacksave"; 5218 case ISD::STACKRESTORE: return "stackrestore"; 5219 case ISD::TRAP: return "trap"; 5220 5221 // Bit manipulation 5222 case ISD::BSWAP: return "bswap"; 5223 case ISD::CTPOP: return "ctpop"; 5224 case ISD::CTTZ: return "cttz"; 5225 case ISD::CTLZ: return "ctlz"; 5226 5227 // Debug info 5228 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 5229 case ISD::DEBUG_LOC: return "debug_loc"; 5230 5231 // Trampolines 5232 case ISD::TRAMPOLINE: return "trampoline"; 5233 5234 case ISD::CONDCODE: 5235 switch (cast<CondCodeSDNode>(this)->get()) { 5236 default: assert(0 && "Unknown setcc condition!"); 5237 case ISD::SETOEQ: return "setoeq"; 5238 case ISD::SETOGT: return "setogt"; 5239 case ISD::SETOGE: return "setoge"; 5240 case ISD::SETOLT: return "setolt"; 5241 case ISD::SETOLE: return "setole"; 5242 case ISD::SETONE: return "setone"; 5243 5244 case ISD::SETO: return "seto"; 5245 case ISD::SETUO: return "setuo"; 5246 case ISD::SETUEQ: return "setue"; 5247 case ISD::SETUGT: return "setugt"; 5248 case ISD::SETUGE: return "setuge"; 5249 case ISD::SETULT: return "setult"; 5250 case ISD::SETULE: return "setule"; 5251 case ISD::SETUNE: return "setune"; 5252 5253 case ISD::SETEQ: return "seteq"; 5254 case ISD::SETGT: return "setgt"; 5255 case ISD::SETGE: return "setge"; 5256 case ISD::SETLT: return "setlt"; 5257 case ISD::SETLE: return "setle"; 5258 case ISD::SETNE: return "setne"; 5259 } 5260 } 5261} 5262 5263const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5264 switch (AM) { 5265 default: 5266 return ""; 5267 case ISD::PRE_INC: 5268 return "<pre-inc>"; 5269 case ISD::PRE_DEC: 5270 return "<pre-dec>"; 5271 case ISD::POST_INC: 5272 return "<post-inc>"; 5273 case ISD::POST_DEC: 5274 return "<post-dec>"; 5275 } 5276} 5277 5278std::string ISD::ArgFlagsTy::getArgFlagsString() { 5279 std::string S = "< "; 5280 5281 if (isZExt()) 5282 S += "zext "; 5283 if (isSExt()) 5284 S += "sext "; 5285 if (isInReg()) 5286 S += "inreg "; 5287 if (isSRet()) 5288 S += "sret "; 5289 if (isByVal()) 5290 S += "byval "; 5291 if (isNest()) 5292 S += "nest "; 5293 if (getByValAlign()) 5294 S += "byval-align:" + utostr(getByValAlign()) + " "; 5295 if (getOrigAlign()) 5296 S += "orig-align:" + utostr(getOrigAlign()) + " "; 5297 if (getByValSize()) 5298 S += "byval-size:" + utostr(getByValSize()) + " "; 5299 return S + ">"; 5300} 5301 5302void SDNode::dump() const { dump(0); } 5303void SDNode::dump(const SelectionDAG *G) const { 5304 print(errs(), G); 5305 errs().flush(); 5306} 5307 5308void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 5309 OS << (void*)this << ": "; 5310 5311 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 5312 if (i) OS << ","; 5313 if (getValueType(i) == MVT::Other) 5314 OS << "ch"; 5315 else 5316 OS << getValueType(i).getMVTString(); 5317 } 5318 OS << " = " << getOperationName(G); 5319 5320 OS << " "; 5321 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5322 if (i) OS << ", "; 5323 OS << (void*)getOperand(i).getNode(); 5324 if (unsigned RN = getOperand(i).getResNo()) 5325 OS << ":" << RN; 5326 } 5327 5328 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5329 SDNode *Mask = getOperand(2).getNode(); 5330 OS << "<"; 5331 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5332 if (i) OS << ","; 5333 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5334 OS << "u"; 5335 else 5336 OS << cast<ConstantSDNode>(Mask->getOperand(i))->getZExtValue(); 5337 } 5338 OS << ">"; 5339 } 5340 5341 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5342 OS << '<' << CSDN->getAPIntValue() << '>'; 5343 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5344 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5345 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5346 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5347 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5348 else { 5349 OS << "<APFloat("; 5350 CSDN->getValueAPF().bitcastToAPInt().dump(); 5351 OS << ")>"; 5352 } 5353 } else if (const GlobalAddressSDNode *GADN = 5354 dyn_cast<GlobalAddressSDNode>(this)) { 5355 int64_t offset = GADN->getOffset(); 5356 OS << '<'; 5357 WriteAsOperand(OS, GADN->getGlobal()); 5358 OS << '>'; 5359 if (offset > 0) 5360 OS << " + " << offset; 5361 else 5362 OS << " " << offset; 5363 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5364 OS << "<" << FIDN->getIndex() << ">"; 5365 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5366 OS << "<" << JTDN->getIndex() << ">"; 5367 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5368 int offset = CP->getOffset(); 5369 if (CP->isMachineConstantPoolEntry()) 5370 OS << "<" << *CP->getMachineCPVal() << ">"; 5371 else 5372 OS << "<" << *CP->getConstVal() << ">"; 5373 if (offset > 0) 5374 OS << " + " << offset; 5375 else 5376 OS << " " << offset; 5377 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5378 OS << "<"; 5379 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5380 if (LBB) 5381 OS << LBB->getName() << " "; 5382 OS << (const void*)BBDN->getBasicBlock() << ">"; 5383 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5384 if (G && R->getReg() && 5385 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5386 OS << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5387 } else { 5388 OS << " #" << R->getReg(); 5389 } 5390 } else if (const ExternalSymbolSDNode *ES = 5391 dyn_cast<ExternalSymbolSDNode>(this)) { 5392 OS << "'" << ES->getSymbol() << "'"; 5393 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5394 if (M->getValue()) 5395 OS << "<" << M->getValue() << ">"; 5396 else 5397 OS << "<null>"; 5398 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5399 if (M->MO.getValue()) 5400 OS << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5401 else 5402 OS << "<null:" << M->MO.getOffset() << ">"; 5403 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5404 OS << N->getArgFlags().getArgFlagsString(); 5405 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5406 OS << ":" << N->getVT().getMVTString(); 5407 } 5408 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5409 const Value *SrcValue = LD->getSrcValue(); 5410 int SrcOffset = LD->getSrcValueOffset(); 5411 OS << " <"; 5412 if (SrcValue) 5413 OS << SrcValue; 5414 else 5415 OS << "null"; 5416 OS << ":" << SrcOffset << ">"; 5417 5418 bool doExt = true; 5419 switch (LD->getExtensionType()) { 5420 default: doExt = false; break; 5421 case ISD::EXTLOAD: OS << " <anyext "; break; 5422 case ISD::SEXTLOAD: OS << " <sext "; break; 5423 case ISD::ZEXTLOAD: OS << " <zext "; break; 5424 } 5425 if (doExt) 5426 OS << LD->getMemoryVT().getMVTString() << ">"; 5427 5428 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5429 if (*AM) 5430 OS << " " << AM; 5431 if (LD->isVolatile()) 5432 OS << " <volatile>"; 5433 OS << " alignment=" << LD->getAlignment(); 5434 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5435 const Value *SrcValue = ST->getSrcValue(); 5436 int SrcOffset = ST->getSrcValueOffset(); 5437 OS << " <"; 5438 if (SrcValue) 5439 OS << SrcValue; 5440 else 5441 OS << "null"; 5442 OS << ":" << SrcOffset << ">"; 5443 5444 if (ST->isTruncatingStore()) 5445 OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">"; 5446 5447 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5448 if (*AM) 5449 OS << " " << AM; 5450 if (ST->isVolatile()) 5451 OS << " <volatile>"; 5452 OS << " alignment=" << ST->getAlignment(); 5453 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5454 const Value *SrcValue = AT->getSrcValue(); 5455 int SrcOffset = AT->getSrcValueOffset(); 5456 OS << " <"; 5457 if (SrcValue) 5458 OS << SrcValue; 5459 else 5460 OS << "null"; 5461 OS << ":" << SrcOffset << ">"; 5462 if (AT->isVolatile()) 5463 OS << " <volatile>"; 5464 OS << " alignment=" << AT->getAlignment(); 5465 } 5466} 5467 5468static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5469 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5470 if (N->getOperand(i).getNode()->hasOneUse()) 5471 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 5472 else 5473 cerr << "\n" << std::string(indent+2, ' ') 5474 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 5475 5476 5477 cerr << "\n" << std::string(indent, ' '); 5478 N->dump(G); 5479} 5480 5481void SelectionDAG::dump() const { 5482 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5483 5484 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5485 I != E; ++I) { 5486 const SDNode *N = I; 5487 if (!N->hasOneUse() && N != getRoot().getNode()) 5488 DumpNodes(N, 2, this); 5489 } 5490 5491 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 5492 5493 cerr << "\n\n"; 5494} 5495 5496const Type *ConstantPoolSDNode::getType() const { 5497 if (isMachineConstantPoolEntry()) 5498 return Val.MachineCPVal->getType(); 5499 return Val.ConstVal->getType(); 5500} 5501