SelectionDAG.cpp revision f350b277f32d7d47f86c0e54f4aec4d470500618
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13#include "llvm/CodeGen/SelectionDAG.h" 14#include "llvm/Constants.h" 15#include "llvm/Analysis/ValueTracking.h" 16#include "llvm/GlobalAlias.h" 17#include "llvm/GlobalVariable.h" 18#include "llvm/Intrinsics.h" 19#include "llvm/DerivedTypes.h" 20#include "llvm/Assembly/Writer.h" 21#include "llvm/CallingConv.h" 22#include "llvm/CodeGen/MachineBasicBlock.h" 23#include "llvm/CodeGen/MachineConstantPool.h" 24#include "llvm/CodeGen/MachineFrameInfo.h" 25#include "llvm/CodeGen/MachineModuleInfo.h" 26#include "llvm/CodeGen/PseudoSourceValue.h" 27#include "llvm/Support/MathExtras.h" 28#include "llvm/Target/TargetRegisterInfo.h" 29#include "llvm/Target/TargetData.h" 30#include "llvm/Target/TargetLowering.h" 31#include "llvm/Target/TargetInstrInfo.h" 32#include "llvm/Target/TargetMachine.h" 33#include "llvm/ADT/SetVector.h" 34#include "llvm/ADT/SmallPtrSet.h" 35#include "llvm/ADT/SmallSet.h" 36#include "llvm/ADT/SmallVector.h" 37#include "llvm/ADT/StringExtras.h" 38#include <algorithm> 39#include <cmath> 40using namespace llvm; 41 42/// makeVTList - Return an instance of the SDVTList struct initialized with the 43/// specified members. 44static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) { 45 SDVTList Res = {VTs, NumVTs}; 46 return Res; 47} 48 49static const fltSemantics *MVTToAPFloatSemantics(MVT VT) { 50 switch (VT.getSimpleVT()) { 51 default: assert(0 && "Unknown FP format"); 52 case MVT::f32: return &APFloat::IEEEsingle; 53 case MVT::f64: return &APFloat::IEEEdouble; 54 case MVT::f80: return &APFloat::x87DoubleExtended; 55 case MVT::f128: return &APFloat::IEEEquad; 56 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 57 } 58} 59 60SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 61 62//===----------------------------------------------------------------------===// 63// ConstantFPSDNode Class 64//===----------------------------------------------------------------------===// 65 66/// isExactlyValue - We don't rely on operator== working on double values, as 67/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 68/// As such, this method can be used to do an exact bit-for-bit comparison of 69/// two floating point values. 70bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 71 return Value.bitwiseIsEqual(V); 72} 73 74bool ConstantFPSDNode::isValueValidForType(MVT VT, 75 const APFloat& Val) { 76 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 77 78 // PPC long double cannot be converted to any other type. 79 if (VT == MVT::ppcf128 || 80 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 81 return false; 82 83 // convert modifies in place, so make a copy. 84 APFloat Val2 = APFloat(Val); 85 return Val2.convert(*MVTToAPFloatSemantics(VT), 86 APFloat::rmNearestTiesToEven) == APFloat::opOK; 87} 88 89//===----------------------------------------------------------------------===// 90// ISD Namespace 91//===----------------------------------------------------------------------===// 92 93/// isBuildVectorAllOnes - Return true if the specified node is a 94/// BUILD_VECTOR where all of the elements are ~0 or undef. 95bool ISD::isBuildVectorAllOnes(const SDNode *N) { 96 // Look through a bit convert. 97 if (N->getOpcode() == ISD::BIT_CONVERT) 98 N = N->getOperand(0).Val; 99 100 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 101 102 unsigned i = 0, e = N->getNumOperands(); 103 104 // Skip over all of the undef values. 105 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 106 ++i; 107 108 // Do not accept an all-undef vector. 109 if (i == e) return false; 110 111 // Do not accept build_vectors that aren't all constants or which have non-~0 112 // elements. 113 SDValue NotZero = N->getOperand(i); 114 if (isa<ConstantSDNode>(NotZero)) { 115 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 116 return false; 117 } else if (isa<ConstantFPSDNode>(NotZero)) { 118 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 119 convertToAPInt().isAllOnesValue()) 120 return false; 121 } else 122 return false; 123 124 // Okay, we have at least one ~0 value, check to see if the rest match or are 125 // undefs. 126 for (++i; i != e; ++i) 127 if (N->getOperand(i) != NotZero && 128 N->getOperand(i).getOpcode() != ISD::UNDEF) 129 return false; 130 return true; 131} 132 133 134/// isBuildVectorAllZeros - Return true if the specified node is a 135/// BUILD_VECTOR where all of the elements are 0 or undef. 136bool ISD::isBuildVectorAllZeros(const SDNode *N) { 137 // Look through a bit convert. 138 if (N->getOpcode() == ISD::BIT_CONVERT) 139 N = N->getOperand(0).Val; 140 141 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 142 143 unsigned i = 0, e = N->getNumOperands(); 144 145 // Skip over all of the undef values. 146 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 147 ++i; 148 149 // Do not accept an all-undef vector. 150 if (i == e) return false; 151 152 // Do not accept build_vectors that aren't all constants or which have non-~0 153 // elements. 154 SDValue Zero = N->getOperand(i); 155 if (isa<ConstantSDNode>(Zero)) { 156 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 157 return false; 158 } else if (isa<ConstantFPSDNode>(Zero)) { 159 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 160 return false; 161 } else 162 return false; 163 164 // Okay, we have at least one ~0 value, check to see if the rest match or are 165 // undefs. 166 for (++i; i != e; ++i) 167 if (N->getOperand(i) != Zero && 168 N->getOperand(i).getOpcode() != ISD::UNDEF) 169 return false; 170 return true; 171} 172 173/// isScalarToVector - Return true if the specified node is a 174/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 175/// element is not an undef. 176bool ISD::isScalarToVector(const SDNode *N) { 177 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 178 return true; 179 180 if (N->getOpcode() != ISD::BUILD_VECTOR) 181 return false; 182 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 183 return false; 184 unsigned NumElems = N->getNumOperands(); 185 for (unsigned i = 1; i < NumElems; ++i) { 186 SDValue V = N->getOperand(i); 187 if (V.getOpcode() != ISD::UNDEF) 188 return false; 189 } 190 return true; 191} 192 193 194/// isDebugLabel - Return true if the specified node represents a debug 195/// label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node). 196bool ISD::isDebugLabel(const SDNode *N) { 197 SDValue Zero; 198 if (N->getOpcode() == ISD::DBG_LABEL) 199 return true; 200 if (N->isMachineOpcode() && 201 N->getMachineOpcode() == TargetInstrInfo::DBG_LABEL) 202 return true; 203 return false; 204} 205 206/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 207/// when given the operation for (X op Y). 208ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 209 // To perform this operation, we just need to swap the L and G bits of the 210 // operation. 211 unsigned OldL = (Operation >> 2) & 1; 212 unsigned OldG = (Operation >> 1) & 1; 213 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 214 (OldL << 1) | // New G bit 215 (OldG << 2)); // New L bit. 216} 217 218/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 219/// 'op' is a valid SetCC operation. 220ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 221 unsigned Operation = Op; 222 if (isInteger) 223 Operation ^= 7; // Flip L, G, E bits, but not U. 224 else 225 Operation ^= 15; // Flip all of the condition bits. 226 if (Operation > ISD::SETTRUE2) 227 Operation &= ~8; // Don't let N and U bits get set. 228 return ISD::CondCode(Operation); 229} 230 231 232/// isSignedOp - For an integer comparison, return 1 if the comparison is a 233/// signed operation and 2 if the result is an unsigned comparison. Return zero 234/// if the operation does not depend on the sign of the input (setne and seteq). 235static int isSignedOp(ISD::CondCode Opcode) { 236 switch (Opcode) { 237 default: assert(0 && "Illegal integer setcc operation!"); 238 case ISD::SETEQ: 239 case ISD::SETNE: return 0; 240 case ISD::SETLT: 241 case ISD::SETLE: 242 case ISD::SETGT: 243 case ISD::SETGE: return 1; 244 case ISD::SETULT: 245 case ISD::SETULE: 246 case ISD::SETUGT: 247 case ISD::SETUGE: return 2; 248 } 249} 250 251/// getSetCCOrOperation - Return the result of a logical OR between different 252/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 253/// returns SETCC_INVALID if it is not possible to represent the resultant 254/// comparison. 255ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 256 bool isInteger) { 257 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 258 // Cannot fold a signed integer setcc with an unsigned integer setcc. 259 return ISD::SETCC_INVALID; 260 261 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 262 263 // If the N and U bits get set then the resultant comparison DOES suddenly 264 // care about orderedness, and is true when ordered. 265 if (Op > ISD::SETTRUE2) 266 Op &= ~16; // Clear the U bit if the N bit is set. 267 268 // Canonicalize illegal integer setcc's. 269 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 270 Op = ISD::SETNE; 271 272 return ISD::CondCode(Op); 273} 274 275/// getSetCCAndOperation - Return the result of a logical AND between different 276/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 277/// function returns zero if it is not possible to represent the resultant 278/// comparison. 279ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 280 bool isInteger) { 281 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 282 // Cannot fold a signed setcc with an unsigned setcc. 283 return ISD::SETCC_INVALID; 284 285 // Combine all of the condition bits. 286 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 287 288 // Canonicalize illegal integer setcc's. 289 if (isInteger) { 290 switch (Result) { 291 default: break; 292 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 293 case ISD::SETOEQ: // SETEQ & SETU[LG]E 294 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 295 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 296 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 297 } 298 } 299 300 return Result; 301} 302 303const TargetMachine &SelectionDAG::getTarget() const { 304 return TLI.getTargetMachine(); 305} 306 307//===----------------------------------------------------------------------===// 308// SDNode Profile Support 309//===----------------------------------------------------------------------===// 310 311/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 312/// 313static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 314 ID.AddInteger(OpC); 315} 316 317/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 318/// solely with their pointer. 319static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 320 ID.AddPointer(VTList.VTs); 321} 322 323/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 324/// 325static void AddNodeIDOperands(FoldingSetNodeID &ID, 326 const SDValue *Ops, unsigned NumOps) { 327 for (; NumOps; --NumOps, ++Ops) { 328 ID.AddPointer(Ops->Val); 329 ID.AddInteger(Ops->ResNo); 330 } 331} 332 333/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 334/// 335static void AddNodeIDOperands(FoldingSetNodeID &ID, 336 const SDUse *Ops, unsigned NumOps) { 337 for (; NumOps; --NumOps, ++Ops) { 338 ID.AddPointer(Ops->getVal()); 339 ID.AddInteger(Ops->getSDValue().ResNo); 340 } 341} 342 343static void AddNodeIDNode(FoldingSetNodeID &ID, 344 unsigned short OpC, SDVTList VTList, 345 const SDValue *OpList, unsigned N) { 346 AddNodeIDOpcode(ID, OpC); 347 AddNodeIDValueTypes(ID, VTList); 348 AddNodeIDOperands(ID, OpList, N); 349} 350 351 352/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 353/// data. 354static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 355 AddNodeIDOpcode(ID, N->getOpcode()); 356 // Add the return value info. 357 AddNodeIDValueTypes(ID, N->getVTList()); 358 // Add the operand info. 359 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 360 361 // Handle SDNode leafs with special info. 362 switch (N->getOpcode()) { 363 default: break; // Normal nodes don't need extra info. 364 case ISD::ARG_FLAGS: 365 ID.AddInteger(cast<ARG_FLAGSSDNode>(N)->getArgFlags().getRawBits()); 366 break; 367 case ISD::TargetConstant: 368 case ISD::Constant: 369 ID.Add(cast<ConstantSDNode>(N)->getAPIntValue()); 370 break; 371 case ISD::TargetConstantFP: 372 case ISD::ConstantFP: { 373 ID.Add(cast<ConstantFPSDNode>(N)->getValueAPF()); 374 break; 375 } 376 case ISD::TargetGlobalAddress: 377 case ISD::GlobalAddress: 378 case ISD::TargetGlobalTLSAddress: 379 case ISD::GlobalTLSAddress: { 380 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 381 ID.AddPointer(GA->getGlobal()); 382 ID.AddInteger(GA->getOffset()); 383 break; 384 } 385 case ISD::BasicBlock: 386 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 387 break; 388 case ISD::Register: 389 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 390 break; 391 case ISD::DBG_STOPPOINT: { 392 const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N); 393 ID.AddInteger(DSP->getLine()); 394 ID.AddInteger(DSP->getColumn()); 395 ID.AddPointer(DSP->getCompileUnit()); 396 break; 397 } 398 case ISD::SRCVALUE: 399 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 400 break; 401 case ISD::MEMOPERAND: { 402 const MachineMemOperand &MO = cast<MemOperandSDNode>(N)->MO; 403 MO.Profile(ID); 404 break; 405 } 406 case ISD::FrameIndex: 407 case ISD::TargetFrameIndex: 408 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 409 break; 410 case ISD::JumpTable: 411 case ISD::TargetJumpTable: 412 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 413 break; 414 case ISD::ConstantPool: 415 case ISD::TargetConstantPool: { 416 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 417 ID.AddInteger(CP->getAlignment()); 418 ID.AddInteger(CP->getOffset()); 419 if (CP->isMachineConstantPoolEntry()) 420 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 421 else 422 ID.AddPointer(CP->getConstVal()); 423 break; 424 } 425 case ISD::LOAD: { 426 const LoadSDNode *LD = cast<LoadSDNode>(N); 427 ID.AddInteger(LD->getAddressingMode()); 428 ID.AddInteger(LD->getExtensionType()); 429 ID.AddInteger(LD->getMemoryVT().getRawBits()); 430 ID.AddInteger(LD->getRawFlags()); 431 break; 432 } 433 case ISD::STORE: { 434 const StoreSDNode *ST = cast<StoreSDNode>(N); 435 ID.AddInteger(ST->getAddressingMode()); 436 ID.AddInteger(ST->isTruncatingStore()); 437 ID.AddInteger(ST->getMemoryVT().getRawBits()); 438 ID.AddInteger(ST->getRawFlags()); 439 break; 440 } 441 case ISD::ATOMIC_CMP_SWAP: 442 case ISD::ATOMIC_LOAD_ADD: 443 case ISD::ATOMIC_SWAP: 444 case ISD::ATOMIC_LOAD_SUB: 445 case ISD::ATOMIC_LOAD_AND: 446 case ISD::ATOMIC_LOAD_OR: 447 case ISD::ATOMIC_LOAD_XOR: 448 case ISD::ATOMIC_LOAD_NAND: 449 case ISD::ATOMIC_LOAD_MIN: 450 case ISD::ATOMIC_LOAD_MAX: 451 case ISD::ATOMIC_LOAD_UMIN: 452 case ISD::ATOMIC_LOAD_UMAX: { 453 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 454 ID.AddInteger(AT->getRawFlags()); 455 break; 456 } 457 } // end switch (N->getOpcode()) 458} 459 460/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 461/// the CSE map that carries both alignment and volatility information. 462/// 463static unsigned encodeMemSDNodeFlags(bool isVolatile, unsigned Alignment) { 464 return isVolatile | ((Log2_32(Alignment) + 1) << 1); 465} 466 467//===----------------------------------------------------------------------===// 468// SelectionDAG Class 469//===----------------------------------------------------------------------===// 470 471/// RemoveDeadNodes - This method deletes all unreachable nodes in the 472/// SelectionDAG. 473void SelectionDAG::RemoveDeadNodes() { 474 // Create a dummy node (which is not added to allnodes), that adds a reference 475 // to the root node, preventing it from being deleted. 476 HandleSDNode Dummy(getRoot()); 477 478 SmallVector<SDNode*, 128> DeadNodes; 479 480 // Add all obviously-dead nodes to the DeadNodes worklist. 481 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 482 if (I->use_empty()) 483 DeadNodes.push_back(I); 484 485 RemoveDeadNodes(DeadNodes); 486 487 // If the root changed (e.g. it was a dead load, update the root). 488 setRoot(Dummy.getValue()); 489} 490 491/// RemoveDeadNodes - This method deletes the unreachable nodes in the 492/// given list, and any nodes that become unreachable as a result. 493void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 494 DAGUpdateListener *UpdateListener) { 495 496 // Process the worklist, deleting the nodes and adding their uses to the 497 // worklist. 498 while (!DeadNodes.empty()) { 499 SDNode *N = DeadNodes.back(); 500 DeadNodes.pop_back(); 501 502 if (UpdateListener) 503 UpdateListener->NodeDeleted(N, 0); 504 505 // Take the node out of the appropriate CSE map. 506 RemoveNodeFromCSEMaps(N); 507 508 // Next, brutally remove the operand list. This is safe to do, as there are 509 // no cycles in the graph. 510 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 511 SDNode *Operand = I->getVal(); 512 Operand->removeUser(std::distance(N->op_begin(), I), N); 513 514 // Now that we removed this operand, see if there are no uses of it left. 515 if (Operand->use_empty()) 516 DeadNodes.push_back(Operand); 517 } 518 if (N->OperandsNeedDelete) { 519 delete[] N->OperandList; 520 } 521 N->OperandList = 0; 522 N->NumOperands = 0; 523 524 // Finally, remove N itself. 525 AllNodes.remove(N); 526 } 527} 528 529void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 530 SmallVector<SDNode*, 16> DeadNodes(1, N); 531 RemoveDeadNodes(DeadNodes, UpdateListener); 532} 533 534void SelectionDAG::DeleteNode(SDNode *N) { 535 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 536 537 // First take this out of the appropriate CSE map. 538 RemoveNodeFromCSEMaps(N); 539 540 // Finally, remove uses due to operands of this node, remove from the 541 // AllNodes list, and delete the node. 542 DeleteNodeNotInCSEMaps(N); 543} 544 545void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 546 547 // Drop all of the operands and decrement used nodes use counts. 548 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 549 I->getVal()->removeUser(std::distance(N->op_begin(), I), N); 550 if (N->OperandsNeedDelete) 551 delete[] N->OperandList; 552 553 AllNodes.remove(N); 554} 555 556/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 557/// correspond to it. This is useful when we're about to delete or repurpose 558/// the node. We don't want future request for structurally identical nodes 559/// to return N anymore. 560void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 561 bool Erased = false; 562 switch (N->getOpcode()) { 563 case ISD::EntryToken: 564 assert(0 && "EntryToken should not be in CSEMaps!"); 565 return; 566 case ISD::HANDLENODE: return; // noop. 567 case ISD::CONDCODE: 568 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 569 "Cond code doesn't exist!"); 570 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 571 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 572 break; 573 case ISD::ExternalSymbol: 574 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 575 break; 576 case ISD::TargetExternalSymbol: 577 Erased = 578 TargetExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 579 break; 580 case ISD::VALUETYPE: { 581 MVT VT = cast<VTSDNode>(N)->getVT(); 582 if (VT.isExtended()) { 583 Erased = ExtendedValueTypeNodes.erase(VT); 584 } else { 585 Erased = ValueTypeNodes[VT.getSimpleVT()] != 0; 586 ValueTypeNodes[VT.getSimpleVT()] = 0; 587 } 588 break; 589 } 590 default: 591 // Remove it from the CSE Map. 592 Erased = CSEMap.RemoveNode(N); 593 break; 594 } 595#ifndef NDEBUG 596 // Verify that the node was actually in one of the CSE maps, unless it has a 597 // flag result (which cannot be CSE'd) or is one of the special cases that are 598 // not subject to CSE. 599 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag && 600 !N->isTargetOpcode() && 601 N->getOpcode() != ISD::DBG_LABEL && 602 N->getOpcode() != ISD::DBG_STOPPOINT && 603 N->getOpcode() != ISD::EH_LABEL && 604 N->getOpcode() != ISD::DECLARE) { 605 N->dump(this); 606 cerr << "\n"; 607 assert(0 && "Node is not in map!"); 608 } 609#endif 610} 611 612/// AddNonLeafNodeToCSEMaps - Add the specified node back to the CSE maps. It 613/// has been taken out and modified in some way. If the specified node already 614/// exists in the CSE maps, do not modify the maps, but return the existing node 615/// instead. If it doesn't exist, add it and return null. 616/// 617SDNode *SelectionDAG::AddNonLeafNodeToCSEMaps(SDNode *N) { 618 assert(N->getNumOperands() && "This is a leaf node!"); 619 620 if (N->getValueType(0) == MVT::Flag) 621 return 0; // Never CSE anything that produces a flag. 622 623 switch (N->getOpcode()) { 624 default: break; 625 case ISD::HANDLENODE: 626 case ISD::DBG_LABEL: 627 case ISD::DBG_STOPPOINT: 628 case ISD::EH_LABEL: 629 case ISD::DECLARE: 630 return 0; // Never add these nodes. 631 } 632 633 // Check that remaining values produced are not flags. 634 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 635 if (N->getValueType(i) == MVT::Flag) 636 return 0; // Never CSE anything that produces a flag. 637 638 SDNode *New = CSEMap.GetOrInsertNode(N); 639 if (New != N) return New; // Node already existed. 640 return 0; 641} 642 643/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 644/// were replaced with those specified. If this node is never memoized, 645/// return null, otherwise return a pointer to the slot it would take. If a 646/// node already exists with these operands, the slot will be non-null. 647SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 648 void *&InsertPos) { 649 if (N->getValueType(0) == MVT::Flag) 650 return 0; // Never CSE anything that produces a flag. 651 652 switch (N->getOpcode()) { 653 default: break; 654 case ISD::HANDLENODE: 655 case ISD::DBG_LABEL: 656 case ISD::DBG_STOPPOINT: 657 case ISD::EH_LABEL: 658 return 0; // Never add these nodes. 659 } 660 661 // Check that remaining values produced are not flags. 662 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 663 if (N->getValueType(i) == MVT::Flag) 664 return 0; // Never CSE anything that produces a flag. 665 666 SDValue Ops[] = { Op }; 667 FoldingSetNodeID ID; 668 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 669 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 670} 671 672/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 673/// were replaced with those specified. If this node is never memoized, 674/// return null, otherwise return a pointer to the slot it would take. If a 675/// node already exists with these operands, the slot will be non-null. 676SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 677 SDValue Op1, SDValue Op2, 678 void *&InsertPos) { 679 if (N->getOpcode() == ISD::HANDLENODE || N->getValueType(0) == MVT::Flag) 680 681 // Check that remaining values produced are not flags. 682 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 683 if (N->getValueType(i) == MVT::Flag) 684 return 0; // Never CSE anything that produces a flag. 685 686 SDValue Ops[] = { Op1, Op2 }; 687 FoldingSetNodeID ID; 688 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 689 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 690} 691 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 698 const SDValue *Ops,unsigned NumOps, 699 void *&InsertPos) { 700 if (N->getValueType(0) == MVT::Flag) 701 return 0; // Never CSE anything that produces a flag. 702 703 switch (N->getOpcode()) { 704 default: break; 705 case ISD::HANDLENODE: 706 case ISD::DBG_LABEL: 707 case ISD::DBG_STOPPOINT: 708 case ISD::EH_LABEL: 709 case ISD::DECLARE: 710 return 0; // Never add these nodes. 711 } 712 713 // Check that remaining values produced are not flags. 714 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 715 if (N->getValueType(i) == MVT::Flag) 716 return 0; // Never CSE anything that produces a flag. 717 718 FoldingSetNodeID ID; 719 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 720 721 if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 722 ID.AddInteger(LD->getAddressingMode()); 723 ID.AddInteger(LD->getExtensionType()); 724 ID.AddInteger(LD->getMemoryVT().getRawBits()); 725 ID.AddInteger(LD->getRawFlags()); 726 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { 727 ID.AddInteger(ST->getAddressingMode()); 728 ID.AddInteger(ST->isTruncatingStore()); 729 ID.AddInteger(ST->getMemoryVT().getRawBits()); 730 ID.AddInteger(ST->getRawFlags()); 731 } 732 733 return CSEMap.FindNodeOrInsertPos(ID, InsertPos); 734} 735 736/// VerifyNode - Sanity check the given node. Aborts if it is invalid. 737void SelectionDAG::VerifyNode(SDNode *N) { 738 switch (N->getOpcode()) { 739 default: 740 break; 741 case ISD::BUILD_VECTOR: { 742 assert(N->getNumValues() == 1 && "Too many results for BUILD_VECTOR!"); 743 assert(N->getValueType(0).isVector() && "Wrong BUILD_VECTOR return type!"); 744 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 745 "Wrong number of BUILD_VECTOR operands!"); 746 MVT EltVT = N->getValueType(0).getVectorElementType(); 747 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 748 assert(I->getSDValue().getValueType() == EltVT && 749 "Wrong BUILD_VECTOR operand type!"); 750 break; 751 } 752 } 753} 754 755/// getMVTAlignment - Compute the default alignment value for the 756/// given type. 757/// 758unsigned SelectionDAG::getMVTAlignment(MVT VT) const { 759 const Type *Ty = VT == MVT::iPTR ? 760 PointerType::get(Type::Int8Ty, 0) : 761 VT.getTypeForMVT(); 762 763 return TLI.getTargetData()->getABITypeAlignment(Ty); 764} 765 766SelectionDAG::SelectionDAG(TargetLowering &tli, MachineFunction &mf, 767 FunctionLoweringInfo &fli, MachineModuleInfo *mmi) 768 : TLI(tli), MF(mf), FLI(fli), MMI(mmi), 769 EntryNode(ISD::EntryToken, getVTList(MVT::Other)), 770 Root(getEntryNode()) { 771 AllNodes.push_back(&EntryNode); 772} 773 774SelectionDAG::~SelectionDAG() { 775 allnodes_clear(); 776} 777 778void SelectionDAG::allnodes_clear() { 779 while (!AllNodes.empty()) { 780 SDNode *N = AllNodes.remove(AllNodes.begin()); 781 N->SetNextInBucket(0); 782 if (N->OperandsNeedDelete) 783 delete [] N->OperandList; 784 } 785} 786 787void SelectionDAG::reset() { 788 allnodes_clear(); 789 OperandAllocator.Reset(); 790 CSEMap.clear(); 791 792 ExtendedValueTypeNodes.clear(); 793 ExternalSymbols.clear(); 794 TargetExternalSymbols.clear(); 795 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 796 static_cast<CondCodeSDNode*>(0)); 797 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 798 static_cast<SDNode*>(0)); 799 800 EntryNode.Uses = 0; 801 AllNodes.push_back(&EntryNode); 802 Root = getEntryNode(); 803} 804 805SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, MVT VT) { 806 if (Op.getValueType() == VT) return Op; 807 APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(), 808 VT.getSizeInBits()); 809 return getNode(ISD::AND, Op.getValueType(), Op, 810 getConstant(Imm, Op.getValueType())); 811} 812 813SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) { 814 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 815 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 816} 817 818SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) { 819 assert(VT.isInteger() && "Cannot create FP integer constant!"); 820 821 MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT; 822 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 823 "APInt size does not match type size!"); 824 825 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 826 FoldingSetNodeID ID; 827 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 828 ID.Add(Val); 829 void *IP = 0; 830 SDNode *N = NULL; 831 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 832 if (!VT.isVector()) 833 return SDValue(N, 0); 834 if (!N) { 835 N = NodeAllocator.Allocate<ConstantSDNode>(); 836 new (N) ConstantSDNode(isT, Val, EltVT); 837 CSEMap.InsertNode(N, IP); 838 AllNodes.push_back(N); 839 } 840 841 SDValue Result(N, 0); 842 if (VT.isVector()) { 843 SmallVector<SDValue, 8> Ops; 844 Ops.assign(VT.getVectorNumElements(), Result); 845 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 846 } 847 return Result; 848} 849 850SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 851 return getConstant(Val, TLI.getPointerTy(), isTarget); 852} 853 854 855SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) { 856 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 857 858 MVT EltVT = 859 VT.isVector() ? VT.getVectorElementType() : VT; 860 861 // Do the map lookup using the actual bit pattern for the floating point 862 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 863 // we don't have issues with SNANs. 864 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 865 FoldingSetNodeID ID; 866 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 867 ID.Add(V); 868 void *IP = 0; 869 SDNode *N = NULL; 870 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 871 if (!VT.isVector()) 872 return SDValue(N, 0); 873 if (!N) { 874 N = NodeAllocator.Allocate<ConstantFPSDNode>(); 875 new (N) ConstantFPSDNode(isTarget, V, EltVT); 876 CSEMap.InsertNode(N, IP); 877 AllNodes.push_back(N); 878 } 879 880 SDValue Result(N, 0); 881 if (VT.isVector()) { 882 SmallVector<SDValue, 8> Ops; 883 Ops.assign(VT.getVectorNumElements(), Result); 884 Result = getNode(ISD::BUILD_VECTOR, VT, &Ops[0], Ops.size()); 885 } 886 return Result; 887} 888 889SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) { 890 MVT EltVT = 891 VT.isVector() ? VT.getVectorElementType() : VT; 892 if (EltVT==MVT::f32) 893 return getConstantFP(APFloat((float)Val), VT, isTarget); 894 else 895 return getConstantFP(APFloat(Val), VT, isTarget); 896} 897 898SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, 899 MVT VT, int Offset, 900 bool isTargetGA) { 901 unsigned Opc; 902 903 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 904 if (!GVar) { 905 // If GV is an alias then use the aliasee for determining thread-localness. 906 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 907 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal()); 908 } 909 910 if (GVar && GVar->isThreadLocal()) 911 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 912 else 913 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 914 915 FoldingSetNodeID ID; 916 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 917 ID.AddPointer(GV); 918 ID.AddInteger(Offset); 919 void *IP = 0; 920 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 921 return SDValue(E, 0); 922 SDNode *N = NodeAllocator.Allocate<GlobalAddressSDNode>(); 923 new (N) GlobalAddressSDNode(isTargetGA, GV, VT, Offset); 924 CSEMap.InsertNode(N, IP); 925 AllNodes.push_back(N); 926 return SDValue(N, 0); 927} 928 929SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) { 930 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 931 FoldingSetNodeID ID; 932 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 933 ID.AddInteger(FI); 934 void *IP = 0; 935 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 936 return SDValue(E, 0); 937 SDNode *N = NodeAllocator.Allocate<FrameIndexSDNode>(); 938 new (N) FrameIndexSDNode(FI, VT, isTarget); 939 CSEMap.InsertNode(N, IP); 940 AllNodes.push_back(N); 941 return SDValue(N, 0); 942} 943 944SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget){ 945 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 946 FoldingSetNodeID ID; 947 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 948 ID.AddInteger(JTI); 949 void *IP = 0; 950 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 951 return SDValue(E, 0); 952 SDNode *N = NodeAllocator.Allocate<JumpTableSDNode>(); 953 new (N) JumpTableSDNode(JTI, VT, isTarget); 954 CSEMap.InsertNode(N, IP); 955 AllNodes.push_back(N); 956 return SDValue(N, 0); 957} 958 959SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT, 960 unsigned Alignment, int Offset, 961 bool isTarget) { 962 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 963 FoldingSetNodeID ID; 964 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 965 ID.AddInteger(Alignment); 966 ID.AddInteger(Offset); 967 ID.AddPointer(C); 968 void *IP = 0; 969 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 970 return SDValue(E, 0); 971 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 972 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 973 CSEMap.InsertNode(N, IP); 974 AllNodes.push_back(N); 975 return SDValue(N, 0); 976} 977 978 979SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT, 980 unsigned Alignment, int Offset, 981 bool isTarget) { 982 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 983 FoldingSetNodeID ID; 984 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 985 ID.AddInteger(Alignment); 986 ID.AddInteger(Offset); 987 C->AddSelectionDAGCSEId(ID); 988 void *IP = 0; 989 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 990 return SDValue(E, 0); 991 SDNode *N = NodeAllocator.Allocate<ConstantPoolSDNode>(); 992 new (N) ConstantPoolSDNode(isTarget, C, VT, Offset, Alignment); 993 CSEMap.InsertNode(N, IP); 994 AllNodes.push_back(N); 995 return SDValue(N, 0); 996} 997 998 999SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1000 FoldingSetNodeID ID; 1001 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1002 ID.AddPointer(MBB); 1003 void *IP = 0; 1004 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1005 return SDValue(E, 0); 1006 SDNode *N = NodeAllocator.Allocate<BasicBlockSDNode>(); 1007 new (N) BasicBlockSDNode(MBB); 1008 CSEMap.InsertNode(N, IP); 1009 AllNodes.push_back(N); 1010 return SDValue(N, 0); 1011} 1012 1013SDValue SelectionDAG::getArgFlags(ISD::ArgFlagsTy Flags) { 1014 FoldingSetNodeID ID; 1015 AddNodeIDNode(ID, ISD::ARG_FLAGS, getVTList(MVT::Other), 0, 0); 1016 ID.AddInteger(Flags.getRawBits()); 1017 void *IP = 0; 1018 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1019 return SDValue(E, 0); 1020 SDNode *N = NodeAllocator.Allocate<ARG_FLAGSSDNode>(); 1021 new (N) ARG_FLAGSSDNode(Flags); 1022 CSEMap.InsertNode(N, IP); 1023 AllNodes.push_back(N); 1024 return SDValue(N, 0); 1025} 1026 1027SDValue SelectionDAG::getValueType(MVT VT) { 1028 if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size()) 1029 ValueTypeNodes.resize(VT.getSimpleVT()+1); 1030 1031 SDNode *&N = VT.isExtended() ? 1032 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT()]; 1033 1034 if (N) return SDValue(N, 0); 1035 N = NodeAllocator.Allocate<VTSDNode>(); 1036 new (N) VTSDNode(VT); 1037 AllNodes.push_back(N); 1038 return SDValue(N, 0); 1039} 1040 1041SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) { 1042 SDNode *&N = ExternalSymbols[Sym]; 1043 if (N) return SDValue(N, 0); 1044 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1045 new (N) ExternalSymbolSDNode(false, Sym, VT); 1046 AllNodes.push_back(N); 1047 return SDValue(N, 0); 1048} 1049 1050SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT) { 1051 SDNode *&N = TargetExternalSymbols[Sym]; 1052 if (N) return SDValue(N, 0); 1053 N = NodeAllocator.Allocate<ExternalSymbolSDNode>(); 1054 new (N) ExternalSymbolSDNode(true, Sym, VT); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1060 if ((unsigned)Cond >= CondCodeNodes.size()) 1061 CondCodeNodes.resize(Cond+1); 1062 1063 if (CondCodeNodes[Cond] == 0) { 1064 CondCodeSDNode *N = NodeAllocator.Allocate<CondCodeSDNode>(); 1065 new (N) CondCodeSDNode(Cond); 1066 CondCodeNodes[Cond] = N; 1067 AllNodes.push_back(N); 1068 } 1069 return SDValue(CondCodeNodes[Cond], 0); 1070} 1071 1072SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) { 1073 FoldingSetNodeID ID; 1074 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1075 ID.AddInteger(RegNo); 1076 void *IP = 0; 1077 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1078 return SDValue(E, 0); 1079 SDNode *N = NodeAllocator.Allocate<RegisterSDNode>(); 1080 new (N) RegisterSDNode(RegNo, VT); 1081 CSEMap.InsertNode(N, IP); 1082 AllNodes.push_back(N); 1083 return SDValue(N, 0); 1084} 1085 1086SDValue SelectionDAG::getDbgStopPoint(SDValue Root, 1087 unsigned Line, unsigned Col, 1088 const CompileUnitDesc *CU) { 1089 SDNode *N = NodeAllocator.Allocate<DbgStopPointSDNode>(); 1090 new (N) DbgStopPointSDNode(Root, Line, Col, CU); 1091 AllNodes.push_back(N); 1092 return SDValue(N, 0); 1093} 1094 1095SDValue SelectionDAG::getLabel(unsigned Opcode, 1096 SDValue Root, 1097 unsigned LabelID) { 1098 FoldingSetNodeID ID; 1099 SDValue Ops[] = { Root }; 1100 AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1); 1101 ID.AddInteger(LabelID); 1102 void *IP = 0; 1103 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1104 return SDValue(E, 0); 1105 SDNode *N = NodeAllocator.Allocate<LabelSDNode>(); 1106 new (N) LabelSDNode(Opcode, Root, LabelID); 1107 CSEMap.InsertNode(N, IP); 1108 AllNodes.push_back(N); 1109 return SDValue(N, 0); 1110} 1111 1112SDValue SelectionDAG::getSrcValue(const Value *V) { 1113 assert((!V || isa<PointerType>(V->getType())) && 1114 "SrcValue is not a pointer?"); 1115 1116 FoldingSetNodeID ID; 1117 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1118 ID.AddPointer(V); 1119 1120 void *IP = 0; 1121 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1122 return SDValue(E, 0); 1123 1124 SDNode *N = NodeAllocator.Allocate<SrcValueSDNode>(); 1125 new (N) SrcValueSDNode(V); 1126 CSEMap.InsertNode(N, IP); 1127 AllNodes.push_back(N); 1128 return SDValue(N, 0); 1129} 1130 1131SDValue SelectionDAG::getMemOperand(const MachineMemOperand &MO) { 1132 const Value *v = MO.getValue(); 1133 assert((!v || isa<PointerType>(v->getType())) && 1134 "SrcValue is not a pointer?"); 1135 1136 FoldingSetNodeID ID; 1137 AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0); 1138 MO.Profile(ID); 1139 1140 void *IP = 0; 1141 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1142 return SDValue(E, 0); 1143 1144 SDNode *N = NodeAllocator.Allocate<MemOperandSDNode>(); 1145 new (N) MemOperandSDNode(MO); 1146 CSEMap.InsertNode(N, IP); 1147 AllNodes.push_back(N); 1148 return SDValue(N, 0); 1149} 1150 1151/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1152/// specified value type. 1153SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) { 1154 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1155 unsigned ByteSize = VT.getSizeInBits()/8; 1156 const Type *Ty = VT.getTypeForMVT(); 1157 unsigned StackAlign = 1158 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1159 1160 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign); 1161 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1162} 1163 1164SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, 1165 SDValue N2, ISD::CondCode Cond) { 1166 // These setcc operations always fold. 1167 switch (Cond) { 1168 default: break; 1169 case ISD::SETFALSE: 1170 case ISD::SETFALSE2: return getConstant(0, VT); 1171 case ISD::SETTRUE: 1172 case ISD::SETTRUE2: return getConstant(1, VT); 1173 1174 case ISD::SETOEQ: 1175 case ISD::SETOGT: 1176 case ISD::SETOGE: 1177 case ISD::SETOLT: 1178 case ISD::SETOLE: 1179 case ISD::SETONE: 1180 case ISD::SETO: 1181 case ISD::SETUO: 1182 case ISD::SETUEQ: 1183 case ISD::SETUNE: 1184 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1185 break; 1186 } 1187 1188 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val)) { 1189 const APInt &C2 = N2C->getAPIntValue(); 1190 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) { 1191 const APInt &C1 = N1C->getAPIntValue(); 1192 1193 switch (Cond) { 1194 default: assert(0 && "Unknown integer setcc!"); 1195 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1196 case ISD::SETNE: return getConstant(C1 != C2, VT); 1197 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1198 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1199 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1200 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1201 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1202 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1203 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1204 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1205 } 1206 } 1207 } 1208 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) { 1209 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.Val)) { 1210 // No compile time operations on this type yet. 1211 if (N1C->getValueType(0) == MVT::ppcf128) 1212 return SDValue(); 1213 1214 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1215 switch (Cond) { 1216 default: break; 1217 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1218 return getNode(ISD::UNDEF, VT); 1219 // fall through 1220 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1221 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1222 return getNode(ISD::UNDEF, VT); 1223 // fall through 1224 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1225 R==APFloat::cmpLessThan, VT); 1226 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1227 return getNode(ISD::UNDEF, VT); 1228 // fall through 1229 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1230 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1231 return getNode(ISD::UNDEF, VT); 1232 // fall through 1233 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1234 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1235 return getNode(ISD::UNDEF, VT); 1236 // fall through 1237 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1238 R==APFloat::cmpEqual, VT); 1239 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1240 return getNode(ISD::UNDEF, VT); 1241 // fall through 1242 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1243 R==APFloat::cmpEqual, VT); 1244 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1245 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1246 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1247 R==APFloat::cmpEqual, VT); 1248 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1249 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1250 R==APFloat::cmpLessThan, VT); 1251 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1252 R==APFloat::cmpUnordered, VT); 1253 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1254 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1255 } 1256 } else { 1257 // Ensure that the constant occurs on the RHS. 1258 return getSetCC(VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1259 } 1260 } 1261 1262 // Could not fold it. 1263 return SDValue(); 1264} 1265 1266/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1267/// use this predicate to simplify operations downstream. 1268bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1269 unsigned BitWidth = Op.getValueSizeInBits(); 1270 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1271} 1272 1273/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1274/// this predicate to simplify operations downstream. Mask is known to be zero 1275/// for bits that V cannot have. 1276bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1277 unsigned Depth) const { 1278 APInt KnownZero, KnownOne; 1279 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1280 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1281 return (KnownZero & Mask) == Mask; 1282} 1283 1284/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1285/// known to be either zero or one and return them in the KnownZero/KnownOne 1286/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1287/// processing. 1288void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1289 APInt &KnownZero, APInt &KnownOne, 1290 unsigned Depth) const { 1291 unsigned BitWidth = Mask.getBitWidth(); 1292 assert(BitWidth == Op.getValueType().getSizeInBits() && 1293 "Mask size mismatches value type size!"); 1294 1295 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1296 if (Depth == 6 || Mask == 0) 1297 return; // Limit search depth. 1298 1299 APInt KnownZero2, KnownOne2; 1300 1301 switch (Op.getOpcode()) { 1302 case ISD::Constant: 1303 // We know all of the bits for a constant! 1304 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1305 KnownZero = ~KnownOne & Mask; 1306 return; 1307 case ISD::AND: 1308 // If either the LHS or the RHS are Zero, the result is zero. 1309 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1310 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1311 KnownZero2, KnownOne2, Depth+1); 1312 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1313 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1314 1315 // Output known-1 bits are only known if set in both the LHS & RHS. 1316 KnownOne &= KnownOne2; 1317 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1318 KnownZero |= KnownZero2; 1319 return; 1320 case ISD::OR: 1321 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1322 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1323 KnownZero2, KnownOne2, Depth+1); 1324 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1325 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1326 1327 // Output known-0 bits are only known if clear in both the LHS & RHS. 1328 KnownZero &= KnownZero2; 1329 // Output known-1 are known to be set if set in either the LHS | RHS. 1330 KnownOne |= KnownOne2; 1331 return; 1332 case ISD::XOR: { 1333 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1334 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1335 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1336 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1337 1338 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1339 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1340 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1341 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1342 KnownZero = KnownZeroOut; 1343 return; 1344 } 1345 case ISD::MUL: { 1346 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1347 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1348 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1349 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1350 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1351 1352 // If low bits are zero in either operand, output low known-0 bits. 1353 // Also compute a conserative estimate for high known-0 bits. 1354 // More trickiness is possible, but this is sufficient for the 1355 // interesting case of alignment computation. 1356 KnownOne.clear(); 1357 unsigned TrailZ = KnownZero.countTrailingOnes() + 1358 KnownZero2.countTrailingOnes(); 1359 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1360 KnownZero2.countLeadingOnes(), 1361 BitWidth) - BitWidth; 1362 1363 TrailZ = std::min(TrailZ, BitWidth); 1364 LeadZ = std::min(LeadZ, BitWidth); 1365 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1366 APInt::getHighBitsSet(BitWidth, LeadZ); 1367 KnownZero &= Mask; 1368 return; 1369 } 1370 case ISD::UDIV: { 1371 // For the purposes of computing leading zeros we can conservatively 1372 // treat a udiv as a logical right shift by the power of 2 known to 1373 // be less than the denominator. 1374 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1375 ComputeMaskedBits(Op.getOperand(0), 1376 AllOnes, KnownZero2, KnownOne2, Depth+1); 1377 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1378 1379 KnownOne2.clear(); 1380 KnownZero2.clear(); 1381 ComputeMaskedBits(Op.getOperand(1), 1382 AllOnes, KnownZero2, KnownOne2, Depth+1); 1383 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1384 if (RHSUnknownLeadingOnes != BitWidth) 1385 LeadZ = std::min(BitWidth, 1386 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1387 1388 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1389 return; 1390 } 1391 case ISD::SELECT: 1392 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1393 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1394 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1395 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1396 1397 // Only known if known in both the LHS and RHS. 1398 KnownOne &= KnownOne2; 1399 KnownZero &= KnownZero2; 1400 return; 1401 case ISD::SELECT_CC: 1402 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1403 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1404 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1405 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1406 1407 // Only known if known in both the LHS and RHS. 1408 KnownOne &= KnownOne2; 1409 KnownZero &= KnownZero2; 1410 return; 1411 case ISD::SETCC: 1412 // If we know the result of a setcc has the top bits zero, use this info. 1413 if (TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult && 1414 BitWidth > 1) 1415 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1416 return; 1417 case ISD::SHL: 1418 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1419 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1420 unsigned ShAmt = SA->getValue(); 1421 1422 // If the shift count is an invalid immediate, don't do anything. 1423 if (ShAmt >= BitWidth) 1424 return; 1425 1426 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1427 KnownZero, KnownOne, Depth+1); 1428 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1429 KnownZero <<= ShAmt; 1430 KnownOne <<= ShAmt; 1431 // low bits known zero. 1432 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1433 } 1434 return; 1435 case ISD::SRL: 1436 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1437 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1438 unsigned ShAmt = SA->getValue(); 1439 1440 // If the shift count is an invalid immediate, don't do anything. 1441 if (ShAmt >= BitWidth) 1442 return; 1443 1444 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1445 KnownZero, KnownOne, Depth+1); 1446 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1447 KnownZero = KnownZero.lshr(ShAmt); 1448 KnownOne = KnownOne.lshr(ShAmt); 1449 1450 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1451 KnownZero |= HighBits; // High bits known zero. 1452 } 1453 return; 1454 case ISD::SRA: 1455 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1456 unsigned ShAmt = SA->getValue(); 1457 1458 // If the shift count is an invalid immediate, don't do anything. 1459 if (ShAmt >= BitWidth) 1460 return; 1461 1462 APInt InDemandedMask = (Mask << ShAmt); 1463 // If any of the demanded bits are produced by the sign extension, we also 1464 // demand the input sign bit. 1465 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1466 if (HighBits.getBoolValue()) 1467 InDemandedMask |= APInt::getSignBit(BitWidth); 1468 1469 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1470 Depth+1); 1471 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1472 KnownZero = KnownZero.lshr(ShAmt); 1473 KnownOne = KnownOne.lshr(ShAmt); 1474 1475 // Handle the sign bits. 1476 APInt SignBit = APInt::getSignBit(BitWidth); 1477 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1478 1479 if (KnownZero.intersects(SignBit)) { 1480 KnownZero |= HighBits; // New bits are known zero. 1481 } else if (KnownOne.intersects(SignBit)) { 1482 KnownOne |= HighBits; // New bits are known one. 1483 } 1484 } 1485 return; 1486 case ISD::SIGN_EXTEND_INREG: { 1487 MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1488 unsigned EBits = EVT.getSizeInBits(); 1489 1490 // Sign extension. Compute the demanded bits in the result that are not 1491 // present in the input. 1492 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1493 1494 APInt InSignBit = APInt::getSignBit(EBits); 1495 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1496 1497 // If the sign extended bits are demanded, we know that the sign 1498 // bit is demanded. 1499 InSignBit.zext(BitWidth); 1500 if (NewBits.getBoolValue()) 1501 InputDemandedBits |= InSignBit; 1502 1503 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1504 KnownZero, KnownOne, Depth+1); 1505 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1506 1507 // If the sign bit of the input is known set or clear, then we know the 1508 // top bits of the result. 1509 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1510 KnownZero |= NewBits; 1511 KnownOne &= ~NewBits; 1512 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1513 KnownOne |= NewBits; 1514 KnownZero &= ~NewBits; 1515 } else { // Input sign bit unknown 1516 KnownZero &= ~NewBits; 1517 KnownOne &= ~NewBits; 1518 } 1519 return; 1520 } 1521 case ISD::CTTZ: 1522 case ISD::CTLZ: 1523 case ISD::CTPOP: { 1524 unsigned LowBits = Log2_32(BitWidth)+1; 1525 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1526 KnownOne.clear(); 1527 return; 1528 } 1529 case ISD::LOAD: { 1530 if (ISD::isZEXTLoad(Op.Val)) { 1531 LoadSDNode *LD = cast<LoadSDNode>(Op); 1532 MVT VT = LD->getMemoryVT(); 1533 unsigned MemBits = VT.getSizeInBits(); 1534 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1535 } 1536 return; 1537 } 1538 case ISD::ZERO_EXTEND: { 1539 MVT InVT = Op.getOperand(0).getValueType(); 1540 unsigned InBits = InVT.getSizeInBits(); 1541 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1542 APInt InMask = Mask; 1543 InMask.trunc(InBits); 1544 KnownZero.trunc(InBits); 1545 KnownOne.trunc(InBits); 1546 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1547 KnownZero.zext(BitWidth); 1548 KnownOne.zext(BitWidth); 1549 KnownZero |= NewBits; 1550 return; 1551 } 1552 case ISD::SIGN_EXTEND: { 1553 MVT InVT = Op.getOperand(0).getValueType(); 1554 unsigned InBits = InVT.getSizeInBits(); 1555 APInt InSignBit = APInt::getSignBit(InBits); 1556 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1557 APInt InMask = Mask; 1558 InMask.trunc(InBits); 1559 1560 // If any of the sign extended bits are demanded, we know that the sign 1561 // bit is demanded. Temporarily set this bit in the mask for our callee. 1562 if (NewBits.getBoolValue()) 1563 InMask |= InSignBit; 1564 1565 KnownZero.trunc(InBits); 1566 KnownOne.trunc(InBits); 1567 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1568 1569 // Note if the sign bit is known to be zero or one. 1570 bool SignBitKnownZero = KnownZero.isNegative(); 1571 bool SignBitKnownOne = KnownOne.isNegative(); 1572 assert(!(SignBitKnownZero && SignBitKnownOne) && 1573 "Sign bit can't be known to be both zero and one!"); 1574 1575 // If the sign bit wasn't actually demanded by our caller, we don't 1576 // want it set in the KnownZero and KnownOne result values. Reset the 1577 // mask and reapply it to the result values. 1578 InMask = Mask; 1579 InMask.trunc(InBits); 1580 KnownZero &= InMask; 1581 KnownOne &= InMask; 1582 1583 KnownZero.zext(BitWidth); 1584 KnownOne.zext(BitWidth); 1585 1586 // If the sign bit is known zero or one, the top bits match. 1587 if (SignBitKnownZero) 1588 KnownZero |= NewBits; 1589 else if (SignBitKnownOne) 1590 KnownOne |= NewBits; 1591 return; 1592 } 1593 case ISD::ANY_EXTEND: { 1594 MVT InVT = Op.getOperand(0).getValueType(); 1595 unsigned InBits = InVT.getSizeInBits(); 1596 APInt InMask = Mask; 1597 InMask.trunc(InBits); 1598 KnownZero.trunc(InBits); 1599 KnownOne.trunc(InBits); 1600 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1601 KnownZero.zext(BitWidth); 1602 KnownOne.zext(BitWidth); 1603 return; 1604 } 1605 case ISD::TRUNCATE: { 1606 MVT InVT = Op.getOperand(0).getValueType(); 1607 unsigned InBits = InVT.getSizeInBits(); 1608 APInt InMask = Mask; 1609 InMask.zext(InBits); 1610 KnownZero.zext(InBits); 1611 KnownOne.zext(InBits); 1612 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1613 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1614 KnownZero.trunc(BitWidth); 1615 KnownOne.trunc(BitWidth); 1616 break; 1617 } 1618 case ISD::AssertZext: { 1619 MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1620 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1621 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1622 KnownOne, Depth+1); 1623 KnownZero |= (~InMask) & Mask; 1624 return; 1625 } 1626 case ISD::FGETSIGN: 1627 // All bits are zero except the low bit. 1628 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1629 return; 1630 1631 case ISD::SUB: { 1632 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1633 // We know that the top bits of C-X are clear if X contains less bits 1634 // than C (i.e. no wrap-around can happen). For example, 20-X is 1635 // positive if we can prove that X is >= 0 and < 16. 1636 if (CLHS->getAPIntValue().isNonNegative()) { 1637 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1638 // NLZ can't be BitWidth with no sign bit 1639 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1640 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1641 Depth+1); 1642 1643 // If all of the MaskV bits are known to be zero, then we know the 1644 // output top bits are zero, because we now know that the output is 1645 // from [0-C]. 1646 if ((KnownZero2 & MaskV) == MaskV) { 1647 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1648 // Top bits known zero. 1649 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1650 } 1651 } 1652 } 1653 } 1654 // fall through 1655 case ISD::ADD: { 1656 // Output known-0 bits are known if clear or set in both the low clear bits 1657 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1658 // low 3 bits clear. 1659 APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); 1660 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1661 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1662 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1663 1664 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1665 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1666 KnownZeroOut = std::min(KnownZeroOut, 1667 KnownZero2.countTrailingOnes()); 1668 1669 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1670 return; 1671 } 1672 case ISD::SREM: 1673 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1674 const APInt &RA = Rem->getAPIntValue(); 1675 if (RA.isPowerOf2() || (-RA).isPowerOf2()) { 1676 APInt LowBits = RA.isStrictlyPositive() ? (RA - 1) : ~RA; 1677 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1678 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1679 1680 // If the sign bit of the first operand is zero, the sign bit of 1681 // the result is zero. If the first operand has no one bits below 1682 // the second operand's single 1 bit, its sign will be zero. 1683 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 1684 KnownZero2 |= ~LowBits; 1685 1686 KnownZero |= KnownZero2 & Mask; 1687 1688 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1689 } 1690 } 1691 return; 1692 case ISD::UREM: { 1693 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1694 const APInt &RA = Rem->getAPIntValue(); 1695 if (RA.isPowerOf2()) { 1696 APInt LowBits = (RA - 1); 1697 APInt Mask2 = LowBits & Mask; 1698 KnownZero |= ~LowBits & Mask; 1699 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 1700 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 1701 break; 1702 } 1703 } 1704 1705 // Since the result is less than or equal to either operand, any leading 1706 // zero bits in either operand must also exist in the result. 1707 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1708 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 1709 Depth+1); 1710 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 1711 Depth+1); 1712 1713 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 1714 KnownZero2.countLeadingOnes()); 1715 KnownOne.clear(); 1716 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 1717 return; 1718 } 1719 default: 1720 // Allow the target to implement this method for its nodes. 1721 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 1722 case ISD::INTRINSIC_WO_CHAIN: 1723 case ISD::INTRINSIC_W_CHAIN: 1724 case ISD::INTRINSIC_VOID: 1725 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this); 1726 } 1727 return; 1728 } 1729} 1730 1731/// ComputeNumSignBits - Return the number of times the sign bit of the 1732/// register is replicated into the other bits. We know that at least 1 bit 1733/// is always equal to the sign bit (itself), but other cases can give us 1734/// information. For example, immediately after an "SRA X, 2", we know that 1735/// the top 3 bits are all equal to each other, so we return 3. 1736unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 1737 MVT VT = Op.getValueType(); 1738 assert(VT.isInteger() && "Invalid VT!"); 1739 unsigned VTBits = VT.getSizeInBits(); 1740 unsigned Tmp, Tmp2; 1741 unsigned FirstAnswer = 1; 1742 1743 if (Depth == 6) 1744 return 1; // Limit search depth. 1745 1746 switch (Op.getOpcode()) { 1747 default: break; 1748 case ISD::AssertSext: 1749 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1750 return VTBits-Tmp+1; 1751 case ISD::AssertZext: 1752 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1753 return VTBits-Tmp; 1754 1755 case ISD::Constant: { 1756 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 1757 // If negative, return # leading ones. 1758 if (Val.isNegative()) 1759 return Val.countLeadingOnes(); 1760 1761 // Return # leading zeros. 1762 return Val.countLeadingZeros(); 1763 } 1764 1765 case ISD::SIGN_EXTEND: 1766 Tmp = VTBits-Op.getOperand(0).getValueType().getSizeInBits(); 1767 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 1768 1769 case ISD::SIGN_EXTEND_INREG: 1770 // Max of the input and what this extends. 1771 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 1772 Tmp = VTBits-Tmp+1; 1773 1774 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1775 return std::max(Tmp, Tmp2); 1776 1777 case ISD::SRA: 1778 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1779 // SRA X, C -> adds C sign bits. 1780 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1781 Tmp += C->getValue(); 1782 if (Tmp > VTBits) Tmp = VTBits; 1783 } 1784 return Tmp; 1785 case ISD::SHL: 1786 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1787 // shl destroys sign bits. 1788 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1789 if (C->getValue() >= VTBits || // Bad shift. 1790 C->getValue() >= Tmp) break; // Shifted all sign bits out. 1791 return Tmp - C->getValue(); 1792 } 1793 break; 1794 case ISD::AND: 1795 case ISD::OR: 1796 case ISD::XOR: // NOT is handled here. 1797 // Logical binary ops preserve the number of sign bits at the worst. 1798 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1799 if (Tmp != 1) { 1800 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1801 FirstAnswer = std::min(Tmp, Tmp2); 1802 // We computed what we know about the sign bits as our first 1803 // answer. Now proceed to the generic code that uses 1804 // ComputeMaskedBits, and pick whichever answer is better. 1805 } 1806 break; 1807 1808 case ISD::SELECT: 1809 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1810 if (Tmp == 1) return 1; // Early out. 1811 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 1812 return std::min(Tmp, Tmp2); 1813 1814 case ISD::SETCC: 1815 // If setcc returns 0/-1, all bits are sign bits. 1816 if (TLI.getSetCCResultContents() == 1817 TargetLowering::ZeroOrNegativeOneSetCCResult) 1818 return VTBits; 1819 break; 1820 case ISD::ROTL: 1821 case ISD::ROTR: 1822 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1823 unsigned RotAmt = C->getValue() & (VTBits-1); 1824 1825 // Handle rotate right by N like a rotate left by 32-N. 1826 if (Op.getOpcode() == ISD::ROTR) 1827 RotAmt = (VTBits-RotAmt) & (VTBits-1); 1828 1829 // If we aren't rotating out all of the known-in sign bits, return the 1830 // number that are left. This handles rotl(sext(x), 1) for example. 1831 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1832 if (Tmp > RotAmt+1) return Tmp-RotAmt; 1833 } 1834 break; 1835 case ISD::ADD: 1836 // Add can have at most one carry bit. Thus we know that the output 1837 // is, at worst, one more bit than the inputs. 1838 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1839 if (Tmp == 1) return 1; // Early out. 1840 1841 // Special case decrementing a value (ADD X, -1): 1842 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1843 if (CRHS->isAllOnesValue()) { 1844 APInt KnownZero, KnownOne; 1845 APInt Mask = APInt::getAllOnesValue(VTBits); 1846 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 1847 1848 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1849 // sign bits set. 1850 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1851 return VTBits; 1852 1853 // If we are subtracting one from a positive number, there is no carry 1854 // out of the result. 1855 if (KnownZero.isNegative()) 1856 return Tmp; 1857 } 1858 1859 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1860 if (Tmp2 == 1) return 1; 1861 return std::min(Tmp, Tmp2)-1; 1862 break; 1863 1864 case ISD::SUB: 1865 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 1866 if (Tmp2 == 1) return 1; 1867 1868 // Handle NEG. 1869 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 1870 if (CLHS->isNullValue()) { 1871 APInt KnownZero, KnownOne; 1872 APInt Mask = APInt::getAllOnesValue(VTBits); 1873 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1874 // If the input is known to be 0 or 1, the output is 0/-1, which is all 1875 // sign bits set. 1876 if ((KnownZero | APInt(VTBits, 1)) == Mask) 1877 return VTBits; 1878 1879 // If the input is known to be positive (the sign bit is known clear), 1880 // the output of the NEG has the same number of sign bits as the input. 1881 if (KnownZero.isNegative()) 1882 return Tmp2; 1883 1884 // Otherwise, we treat this like a SUB. 1885 } 1886 1887 // Sub can have at most one carry bit. Thus we know that the output 1888 // is, at worst, one more bit than the inputs. 1889 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 1890 if (Tmp == 1) return 1; // Early out. 1891 return std::min(Tmp, Tmp2)-1; 1892 break; 1893 case ISD::TRUNCATE: 1894 // FIXME: it's tricky to do anything useful for this, but it is an important 1895 // case for targets like X86. 1896 break; 1897 } 1898 1899 // Handle LOADX separately here. EXTLOAD case will fallthrough. 1900 if (Op.getOpcode() == ISD::LOAD) { 1901 LoadSDNode *LD = cast<LoadSDNode>(Op); 1902 unsigned ExtType = LD->getExtensionType(); 1903 switch (ExtType) { 1904 default: break; 1905 case ISD::SEXTLOAD: // '17' bits known 1906 Tmp = LD->getMemoryVT().getSizeInBits(); 1907 return VTBits-Tmp+1; 1908 case ISD::ZEXTLOAD: // '16' bits known 1909 Tmp = LD->getMemoryVT().getSizeInBits(); 1910 return VTBits-Tmp; 1911 } 1912 } 1913 1914 // Allow the target to implement this method for its nodes. 1915 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 1916 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 1917 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 1918 Op.getOpcode() == ISD::INTRINSIC_VOID) { 1919 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 1920 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 1921 } 1922 1923 // Finally, if we can prove that the top bits of the result are 0's or 1's, 1924 // use this information. 1925 APInt KnownZero, KnownOne; 1926 APInt Mask = APInt::getAllOnesValue(VTBits); 1927 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1928 1929 if (KnownZero.isNegative()) { // sign bit is 0 1930 Mask = KnownZero; 1931 } else if (KnownOne.isNegative()) { // sign bit is 1; 1932 Mask = KnownOne; 1933 } else { 1934 // Nothing known. 1935 return FirstAnswer; 1936 } 1937 1938 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 1939 // the number of identical bits in the top of the input value. 1940 Mask = ~Mask; 1941 Mask <<= Mask.getBitWidth()-VTBits; 1942 // Return # leading zeros. We use 'min' here in case Val was zero before 1943 // shifting. We don't want to return '64' as for an i32 "0". 1944 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 1945} 1946 1947 1948bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 1949 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 1950 if (!GA) return false; 1951 GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 1952 if (!GV) return false; 1953 MachineModuleInfo *MMI = getMachineModuleInfo(); 1954 return MMI && MMI->hasDebugInfo() && MMI->isVerified(GV); 1955} 1956 1957 1958/// getShuffleScalarElt - Returns the scalar element that will make up the ith 1959/// element of the result of the vector shuffle. 1960SDValue SelectionDAG::getShuffleScalarElt(const SDNode *N, unsigned i) { 1961 MVT VT = N->getValueType(0); 1962 SDValue PermMask = N->getOperand(2); 1963 SDValue Idx = PermMask.getOperand(i); 1964 if (Idx.getOpcode() == ISD::UNDEF) 1965 return getNode(ISD::UNDEF, VT.getVectorElementType()); 1966 unsigned Index = cast<ConstantSDNode>(Idx)->getValue(); 1967 unsigned NumElems = PermMask.getNumOperands(); 1968 SDValue V = (Index < NumElems) ? N->getOperand(0) : N->getOperand(1); 1969 Index %= NumElems; 1970 1971 if (V.getOpcode() == ISD::BIT_CONVERT) { 1972 V = V.getOperand(0); 1973 if (V.getValueType().getVectorNumElements() != NumElems) 1974 return SDValue(); 1975 } 1976 if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) 1977 return (Index == 0) ? V.getOperand(0) 1978 : getNode(ISD::UNDEF, VT.getVectorElementType()); 1979 if (V.getOpcode() == ISD::BUILD_VECTOR) 1980 return V.getOperand(Index); 1981 if (V.getOpcode() == ISD::VECTOR_SHUFFLE) 1982 return getShuffleScalarElt(V.Val, Index); 1983 return SDValue(); 1984} 1985 1986 1987/// getNode - Gets or creates the specified node. 1988/// 1989SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT) { 1990 FoldingSetNodeID ID; 1991 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 1992 void *IP = 0; 1993 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1994 return SDValue(E, 0); 1995 SDNode *N = NodeAllocator.Allocate<SDNode>(); 1996 new (N) SDNode(Opcode, SDNode::getSDVTList(VT)); 1997 CSEMap.InsertNode(N, IP); 1998 1999 AllNodes.push_back(N); 2000#ifndef NDEBUG 2001 VerifyNode(N); 2002#endif 2003 return SDValue(N, 0); 2004} 2005 2006SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, SDValue Operand) { 2007 // Constant fold unary operations with an integer constant operand. 2008 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.Val)) { 2009 const APInt &Val = C->getAPIntValue(); 2010 unsigned BitWidth = VT.getSizeInBits(); 2011 switch (Opcode) { 2012 default: break; 2013 case ISD::SIGN_EXTEND: 2014 return getConstant(APInt(Val).sextOrTrunc(BitWidth), VT); 2015 case ISD::ANY_EXTEND: 2016 case ISD::ZERO_EXTEND: 2017 case ISD::TRUNCATE: 2018 return getConstant(APInt(Val).zextOrTrunc(BitWidth), VT); 2019 case ISD::UINT_TO_FP: 2020 case ISD::SINT_TO_FP: { 2021 const uint64_t zero[] = {0, 0}; 2022 // No compile time operations on this type. 2023 if (VT==MVT::ppcf128) 2024 break; 2025 APFloat apf = APFloat(APInt(BitWidth, 2, zero)); 2026 (void)apf.convertFromAPInt(Val, 2027 Opcode==ISD::SINT_TO_FP, 2028 APFloat::rmNearestTiesToEven); 2029 return getConstantFP(apf, VT); 2030 } 2031 case ISD::BIT_CONVERT: 2032 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2033 return getConstantFP(Val.bitsToFloat(), VT); 2034 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2035 return getConstantFP(Val.bitsToDouble(), VT); 2036 break; 2037 case ISD::BSWAP: 2038 return getConstant(Val.byteSwap(), VT); 2039 case ISD::CTPOP: 2040 return getConstant(Val.countPopulation(), VT); 2041 case ISD::CTLZ: 2042 return getConstant(Val.countLeadingZeros(), VT); 2043 case ISD::CTTZ: 2044 return getConstant(Val.countTrailingZeros(), VT); 2045 } 2046 } 2047 2048 // Constant fold unary operations with a floating point constant operand. 2049 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.Val)) { 2050 APFloat V = C->getValueAPF(); // make copy 2051 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2052 switch (Opcode) { 2053 case ISD::FNEG: 2054 V.changeSign(); 2055 return getConstantFP(V, VT); 2056 case ISD::FABS: 2057 V.clearSign(); 2058 return getConstantFP(V, VT); 2059 case ISD::FP_ROUND: 2060 case ISD::FP_EXTEND: 2061 // This can return overflow, underflow, or inexact; we don't care. 2062 // FIXME need to be more flexible about rounding mode. 2063 (void)V.convert(*MVTToAPFloatSemantics(VT), 2064 APFloat::rmNearestTiesToEven); 2065 return getConstantFP(V, VT); 2066 case ISD::FP_TO_SINT: 2067 case ISD::FP_TO_UINT: { 2068 integerPart x; 2069 assert(integerPartWidth >= 64); 2070 // FIXME need to be more flexible about rounding mode. 2071 APFloat::opStatus s = V.convertToInteger(&x, 64U, 2072 Opcode==ISD::FP_TO_SINT, 2073 APFloat::rmTowardZero); 2074 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2075 break; 2076 return getConstant(x, VT); 2077 } 2078 case ISD::BIT_CONVERT: 2079 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2080 return getConstant((uint32_t)V.convertToAPInt().getZExtValue(), VT); 2081 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2082 return getConstant(V.convertToAPInt().getZExtValue(), VT); 2083 break; 2084 } 2085 } 2086 } 2087 2088 unsigned OpOpcode = Operand.Val->getOpcode(); 2089 switch (Opcode) { 2090 case ISD::TokenFactor: 2091 case ISD::CONCAT_VECTORS: 2092 return Operand; // Factor or concat of one node? No need. 2093 case ISD::FP_ROUND: assert(0 && "Invalid method to make FP_ROUND node"); 2094 case ISD::FP_EXTEND: 2095 assert(VT.isFloatingPoint() && 2096 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2097 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2098 if (Operand.getOpcode() == ISD::UNDEF) 2099 return getNode(ISD::UNDEF, VT); 2100 break; 2101 case ISD::SIGN_EXTEND: 2102 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2103 "Invalid SIGN_EXTEND!"); 2104 if (Operand.getValueType() == VT) return Operand; // noop extension 2105 assert(Operand.getValueType().bitsLT(VT) 2106 && "Invalid sext node, dst < src!"); 2107 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2108 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2109 break; 2110 case ISD::ZERO_EXTEND: 2111 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2112 "Invalid ZERO_EXTEND!"); 2113 if (Operand.getValueType() == VT) return Operand; // noop extension 2114 assert(Operand.getValueType().bitsLT(VT) 2115 && "Invalid zext node, dst < src!"); 2116 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2117 return getNode(ISD::ZERO_EXTEND, VT, Operand.Val->getOperand(0)); 2118 break; 2119 case ISD::ANY_EXTEND: 2120 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2121 "Invalid ANY_EXTEND!"); 2122 if (Operand.getValueType() == VT) return Operand; // noop extension 2123 assert(Operand.getValueType().bitsLT(VT) 2124 && "Invalid anyext node, dst < src!"); 2125 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND) 2126 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2127 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2128 break; 2129 case ISD::TRUNCATE: 2130 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2131 "Invalid TRUNCATE!"); 2132 if (Operand.getValueType() == VT) return Operand; // noop truncate 2133 assert(Operand.getValueType().bitsGT(VT) 2134 && "Invalid truncate node, src < dst!"); 2135 if (OpOpcode == ISD::TRUNCATE) 2136 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2137 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2138 OpOpcode == ISD::ANY_EXTEND) { 2139 // If the source is smaller than the dest, we still need an extend. 2140 if (Operand.Val->getOperand(0).getValueType().bitsLT(VT)) 2141 return getNode(OpOpcode, VT, Operand.Val->getOperand(0)); 2142 else if (Operand.Val->getOperand(0).getValueType().bitsGT(VT)) 2143 return getNode(ISD::TRUNCATE, VT, Operand.Val->getOperand(0)); 2144 else 2145 return Operand.Val->getOperand(0); 2146 } 2147 break; 2148 case ISD::BIT_CONVERT: 2149 // Basic sanity checking. 2150 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2151 && "Cannot BIT_CONVERT between types of different sizes!"); 2152 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2153 if (OpOpcode == ISD::BIT_CONVERT) // bitconv(bitconv(x)) -> bitconv(x) 2154 return getNode(ISD::BIT_CONVERT, VT, Operand.getOperand(0)); 2155 if (OpOpcode == ISD::UNDEF) 2156 return getNode(ISD::UNDEF, VT); 2157 break; 2158 case ISD::SCALAR_TO_VECTOR: 2159 assert(VT.isVector() && !Operand.getValueType().isVector() && 2160 VT.getVectorElementType() == Operand.getValueType() && 2161 "Illegal SCALAR_TO_VECTOR node!"); 2162 if (OpOpcode == ISD::UNDEF) 2163 return getNode(ISD::UNDEF, VT); 2164 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2165 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2166 isa<ConstantSDNode>(Operand.getOperand(1)) && 2167 Operand.getConstantOperandVal(1) == 0 && 2168 Operand.getOperand(0).getValueType() == VT) 2169 return Operand.getOperand(0); 2170 break; 2171 case ISD::FNEG: 2172 if (OpOpcode == ISD::FSUB) // -(X-Y) -> (Y-X) 2173 return getNode(ISD::FSUB, VT, Operand.Val->getOperand(1), 2174 Operand.Val->getOperand(0)); 2175 if (OpOpcode == ISD::FNEG) // --X -> X 2176 return Operand.Val->getOperand(0); 2177 break; 2178 case ISD::FABS: 2179 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2180 return getNode(ISD::FABS, VT, Operand.Val->getOperand(0)); 2181 break; 2182 } 2183 2184 SDNode *N; 2185 SDVTList VTs = getVTList(VT); 2186 if (VT != MVT::Flag) { // Don't CSE flag producing nodes 2187 FoldingSetNodeID ID; 2188 SDValue Ops[1] = { Operand }; 2189 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2190 void *IP = 0; 2191 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2192 return SDValue(E, 0); 2193 N = NodeAllocator.Allocate<UnarySDNode>(); 2194 new (N) UnarySDNode(Opcode, VTs, Operand); 2195 CSEMap.InsertNode(N, IP); 2196 } else { 2197 N = NodeAllocator.Allocate<UnarySDNode>(); 2198 new (N) UnarySDNode(Opcode, VTs, Operand); 2199 } 2200 2201 AllNodes.push_back(N); 2202#ifndef NDEBUG 2203 VerifyNode(N); 2204#endif 2205 return SDValue(N, 0); 2206} 2207 2208SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2209 SDValue N1, SDValue N2) { 2210 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2211 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2212 switch (Opcode) { 2213 default: break; 2214 case ISD::TokenFactor: 2215 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2216 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2217 // Fold trivial token factors. 2218 if (N1.getOpcode() == ISD::EntryToken) return N2; 2219 if (N2.getOpcode() == ISD::EntryToken) return N1; 2220 break; 2221 case ISD::CONCAT_VECTORS: 2222 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2223 // one big BUILD_VECTOR. 2224 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2225 N2.getOpcode() == ISD::BUILD_VECTOR) { 2226 SmallVector<SDValue, 16> Elts(N1.Val->op_begin(), N1.Val->op_end()); 2227 Elts.insert(Elts.end(), N2.Val->op_begin(), N2.Val->op_end()); 2228 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2229 } 2230 break; 2231 case ISD::AND: 2232 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2233 N1.getValueType() == VT && "Binary operator types must match!"); 2234 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2235 // worth handling here. 2236 if (N2C && N2C->isNullValue()) 2237 return N2; 2238 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2239 return N1; 2240 break; 2241 case ISD::OR: 2242 case ISD::XOR: 2243 case ISD::ADD: 2244 case ISD::SUB: 2245 assert(VT.isInteger() && N1.getValueType() == N2.getValueType() && 2246 N1.getValueType() == VT && "Binary operator types must match!"); 2247 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2248 // it's worth handling here. 2249 if (N2C && N2C->isNullValue()) 2250 return N1; 2251 break; 2252 case ISD::UDIV: 2253 case ISD::UREM: 2254 case ISD::MULHU: 2255 case ISD::MULHS: 2256 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2257 // fall through 2258 case ISD::MUL: 2259 case ISD::SDIV: 2260 case ISD::SREM: 2261 case ISD::FADD: 2262 case ISD::FSUB: 2263 case ISD::FMUL: 2264 case ISD::FDIV: 2265 case ISD::FREM: 2266 assert(N1.getValueType() == N2.getValueType() && 2267 N1.getValueType() == VT && "Binary operator types must match!"); 2268 break; 2269 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2270 assert(N1.getValueType() == VT && 2271 N1.getValueType().isFloatingPoint() && 2272 N2.getValueType().isFloatingPoint() && 2273 "Invalid FCOPYSIGN!"); 2274 break; 2275 case ISD::SHL: 2276 case ISD::SRA: 2277 case ISD::SRL: 2278 case ISD::ROTL: 2279 case ISD::ROTR: 2280 assert(VT == N1.getValueType() && 2281 "Shift operators return type must be the same as their first arg"); 2282 assert(VT.isInteger() && N2.getValueType().isInteger() && 2283 "Shifts only work on integers"); 2284 2285 // Always fold shifts of i1 values so the code generator doesn't need to 2286 // handle them. Since we know the size of the shift has to be less than the 2287 // size of the value, the shift/rotate count is guaranteed to be zero. 2288 if (VT == MVT::i1) 2289 return N1; 2290 break; 2291 case ISD::FP_ROUND_INREG: { 2292 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2293 assert(VT == N1.getValueType() && "Not an inreg round!"); 2294 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2295 "Cannot FP_ROUND_INREG integer types"); 2296 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2297 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2298 break; 2299 } 2300 case ISD::FP_ROUND: 2301 assert(VT.isFloatingPoint() && 2302 N1.getValueType().isFloatingPoint() && 2303 VT.bitsLE(N1.getValueType()) && 2304 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2305 if (N1.getValueType() == VT) return N1; // noop conversion. 2306 break; 2307 case ISD::AssertSext: 2308 case ISD::AssertZext: { 2309 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2310 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2311 assert(VT.isInteger() && EVT.isInteger() && 2312 "Cannot *_EXTEND_INREG FP types"); 2313 assert(EVT.bitsLE(VT) && "Not extending!"); 2314 if (VT == EVT) return N1; // noop assertion. 2315 break; 2316 } 2317 case ISD::SIGN_EXTEND_INREG: { 2318 MVT EVT = cast<VTSDNode>(N2)->getVT(); 2319 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2320 assert(VT.isInteger() && EVT.isInteger() && 2321 "Cannot *_EXTEND_INREG FP types"); 2322 assert(EVT.bitsLE(VT) && "Not extending!"); 2323 if (EVT == VT) return N1; // Not actually extending 2324 2325 if (N1C) { 2326 APInt Val = N1C->getAPIntValue(); 2327 unsigned FromBits = cast<VTSDNode>(N2)->getVT().getSizeInBits(); 2328 Val <<= Val.getBitWidth()-FromBits; 2329 Val = Val.ashr(Val.getBitWidth()-FromBits); 2330 return getConstant(Val, VT); 2331 } 2332 break; 2333 } 2334 case ISD::EXTRACT_VECTOR_ELT: 2335 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2336 if (N1.getOpcode() == ISD::UNDEF) 2337 return getNode(ISD::UNDEF, VT); 2338 2339 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2340 // expanding copies of large vectors from registers. 2341 if (N2C && 2342 N1.getOpcode() == ISD::CONCAT_VECTORS && 2343 N1.getNumOperands() > 0) { 2344 unsigned Factor = 2345 N1.getOperand(0).getValueType().getVectorNumElements(); 2346 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, 2347 N1.getOperand(N2C->getValue() / Factor), 2348 getConstant(N2C->getValue() % Factor, N2.getValueType())); 2349 } 2350 2351 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2352 // expanding large vector constants. 2353 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) 2354 return N1.getOperand(N2C->getValue()); 2355 2356 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2357 // operations are lowered to scalars. 2358 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2359 if (N1.getOperand(2) == N2) 2360 return N1.getOperand(1); 2361 else 2362 return getNode(ISD::EXTRACT_VECTOR_ELT, VT, N1.getOperand(0), N2); 2363 } 2364 break; 2365 case ISD::EXTRACT_ELEMENT: 2366 assert(N2C && (unsigned)N2C->getValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2367 assert(!N1.getValueType().isVector() && !VT.isVector() && 2368 (N1.getValueType().isInteger() == VT.isInteger()) && 2369 "Wrong types for EXTRACT_ELEMENT!"); 2370 2371 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2372 // 64-bit integers into 32-bit parts. Instead of building the extract of 2373 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2374 if (N1.getOpcode() == ISD::BUILD_PAIR) 2375 return N1.getOperand(N2C->getValue()); 2376 2377 // EXTRACT_ELEMENT of a constant int is also very common. 2378 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2379 unsigned ElementSize = VT.getSizeInBits(); 2380 unsigned Shift = ElementSize * N2C->getValue(); 2381 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2382 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2383 } 2384 break; 2385 case ISD::EXTRACT_SUBVECTOR: 2386 if (N1.getValueType() == VT) // Trivial extraction. 2387 return N1; 2388 break; 2389 } 2390 2391 if (N1C) { 2392 if (N2C) { 2393 const APInt &C1 = N1C->getAPIntValue(), &C2 = N2C->getAPIntValue(); 2394 switch (Opcode) { 2395 case ISD::ADD: return getConstant(C1 + C2, VT); 2396 case ISD::SUB: return getConstant(C1 - C2, VT); 2397 case ISD::MUL: return getConstant(C1 * C2, VT); 2398 case ISD::UDIV: 2399 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2400 break; 2401 case ISD::UREM : 2402 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2403 break; 2404 case ISD::SDIV : 2405 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2406 break; 2407 case ISD::SREM : 2408 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2409 break; 2410 case ISD::AND : return getConstant(C1 & C2, VT); 2411 case ISD::OR : return getConstant(C1 | C2, VT); 2412 case ISD::XOR : return getConstant(C1 ^ C2, VT); 2413 case ISD::SHL : return getConstant(C1 << C2, VT); 2414 case ISD::SRL : return getConstant(C1.lshr(C2), VT); 2415 case ISD::SRA : return getConstant(C1.ashr(C2), VT); 2416 case ISD::ROTL : return getConstant(C1.rotl(C2), VT); 2417 case ISD::ROTR : return getConstant(C1.rotr(C2), VT); 2418 default: break; 2419 } 2420 } else { // Cannonicalize constant to RHS if commutative 2421 if (isCommutativeBinOp(Opcode)) { 2422 std::swap(N1C, N2C); 2423 std::swap(N1, N2); 2424 } 2425 } 2426 } 2427 2428 // Constant fold FP operations. 2429 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.Val); 2430 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.Val); 2431 if (N1CFP) { 2432 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2433 // Cannonicalize constant to RHS if commutative 2434 std::swap(N1CFP, N2CFP); 2435 std::swap(N1, N2); 2436 } else if (N2CFP && VT != MVT::ppcf128) { 2437 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2438 APFloat::opStatus s; 2439 switch (Opcode) { 2440 case ISD::FADD: 2441 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2442 if (s != APFloat::opInvalidOp) 2443 return getConstantFP(V1, VT); 2444 break; 2445 case ISD::FSUB: 2446 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2447 if (s!=APFloat::opInvalidOp) 2448 return getConstantFP(V1, VT); 2449 break; 2450 case ISD::FMUL: 2451 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2452 if (s!=APFloat::opInvalidOp) 2453 return getConstantFP(V1, VT); 2454 break; 2455 case ISD::FDIV: 2456 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2457 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2458 return getConstantFP(V1, VT); 2459 break; 2460 case ISD::FREM : 2461 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2462 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2463 return getConstantFP(V1, VT); 2464 break; 2465 case ISD::FCOPYSIGN: 2466 V1.copySign(V2); 2467 return getConstantFP(V1, VT); 2468 default: break; 2469 } 2470 } 2471 } 2472 2473 // Canonicalize an UNDEF to the RHS, even over a constant. 2474 if (N1.getOpcode() == ISD::UNDEF) { 2475 if (isCommutativeBinOp(Opcode)) { 2476 std::swap(N1, N2); 2477 } else { 2478 switch (Opcode) { 2479 case ISD::FP_ROUND_INREG: 2480 case ISD::SIGN_EXTEND_INREG: 2481 case ISD::SUB: 2482 case ISD::FSUB: 2483 case ISD::FDIV: 2484 case ISD::FREM: 2485 case ISD::SRA: 2486 return N1; // fold op(undef, arg2) -> undef 2487 case ISD::UDIV: 2488 case ISD::SDIV: 2489 case ISD::UREM: 2490 case ISD::SREM: 2491 case ISD::SRL: 2492 case ISD::SHL: 2493 if (!VT.isVector()) 2494 return getConstant(0, VT); // fold op(undef, arg2) -> 0 2495 // For vectors, we can't easily build an all zero vector, just return 2496 // the LHS. 2497 return N2; 2498 } 2499 } 2500 } 2501 2502 // Fold a bunch of operators when the RHS is undef. 2503 if (N2.getOpcode() == ISD::UNDEF) { 2504 switch (Opcode) { 2505 case ISD::XOR: 2506 if (N1.getOpcode() == ISD::UNDEF) 2507 // Handle undef ^ undef -> 0 special case. This is a common 2508 // idiom (misuse). 2509 return getConstant(0, VT); 2510 // fallthrough 2511 case ISD::ADD: 2512 case ISD::ADDC: 2513 case ISD::ADDE: 2514 case ISD::SUB: 2515 case ISD::FADD: 2516 case ISD::FSUB: 2517 case ISD::FMUL: 2518 case ISD::FDIV: 2519 case ISD::FREM: 2520 case ISD::UDIV: 2521 case ISD::SDIV: 2522 case ISD::UREM: 2523 case ISD::SREM: 2524 return N2; // fold op(arg1, undef) -> undef 2525 case ISD::MUL: 2526 case ISD::AND: 2527 case ISD::SRL: 2528 case ISD::SHL: 2529 if (!VT.isVector()) 2530 return getConstant(0, VT); // fold op(arg1, undef) -> 0 2531 // For vectors, we can't easily build an all zero vector, just return 2532 // the LHS. 2533 return N1; 2534 case ISD::OR: 2535 if (!VT.isVector()) 2536 return getConstant(VT.getIntegerVTBitMask(), VT); 2537 // For vectors, we can't easily build an all one vector, just return 2538 // the LHS. 2539 return N1; 2540 case ISD::SRA: 2541 return N1; 2542 } 2543 } 2544 2545 // Memoize this node if possible. 2546 SDNode *N; 2547 SDVTList VTs = getVTList(VT); 2548 if (VT != MVT::Flag) { 2549 SDValue Ops[] = { N1, N2 }; 2550 FoldingSetNodeID ID; 2551 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 2552 void *IP = 0; 2553 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2554 return SDValue(E, 0); 2555 N = NodeAllocator.Allocate<BinarySDNode>(); 2556 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2557 CSEMap.InsertNode(N, IP); 2558 } else { 2559 N = NodeAllocator.Allocate<BinarySDNode>(); 2560 new (N) BinarySDNode(Opcode, VTs, N1, N2); 2561 } 2562 2563 AllNodes.push_back(N); 2564#ifndef NDEBUG 2565 VerifyNode(N); 2566#endif 2567 return SDValue(N, 0); 2568} 2569 2570SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2571 SDValue N1, SDValue N2, SDValue N3) { 2572 // Perform various simplifications. 2573 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val); 2574 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.Val); 2575 switch (Opcode) { 2576 case ISD::CONCAT_VECTORS: 2577 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2578 // one big BUILD_VECTOR. 2579 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2580 N2.getOpcode() == ISD::BUILD_VECTOR && 2581 N3.getOpcode() == ISD::BUILD_VECTOR) { 2582 SmallVector<SDValue, 16> Elts(N1.Val->op_begin(), N1.Val->op_end()); 2583 Elts.insert(Elts.end(), N2.Val->op_begin(), N2.Val->op_end()); 2584 Elts.insert(Elts.end(), N3.Val->op_begin(), N3.Val->op_end()); 2585 return getNode(ISD::BUILD_VECTOR, VT, &Elts[0], Elts.size()); 2586 } 2587 break; 2588 case ISD::SETCC: { 2589 // Use FoldSetCC to simplify SETCC's. 2590 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get()); 2591 if (Simp.Val) return Simp; 2592 break; 2593 } 2594 case ISD::SELECT: 2595 if (N1C) { 2596 if (N1C->getValue()) 2597 return N2; // select true, X, Y -> X 2598 else 2599 return N3; // select false, X, Y -> Y 2600 } 2601 2602 if (N2 == N3) return N2; // select C, X, X -> X 2603 break; 2604 case ISD::BRCOND: 2605 if (N2C) { 2606 if (N2C->getValue()) // Unconditional branch 2607 return getNode(ISD::BR, MVT::Other, N1, N3); 2608 else 2609 return N1; // Never-taken branch 2610 } 2611 break; 2612 case ISD::VECTOR_SHUFFLE: 2613 assert(VT == N1.getValueType() && VT == N2.getValueType() && 2614 VT.isVector() && N3.getValueType().isVector() && 2615 N3.getOpcode() == ISD::BUILD_VECTOR && 2616 VT.getVectorNumElements() == N3.getNumOperands() && 2617 "Illegal VECTOR_SHUFFLE node!"); 2618 break; 2619 case ISD::BIT_CONVERT: 2620 // Fold bit_convert nodes from a type to themselves. 2621 if (N1.getValueType() == VT) 2622 return N1; 2623 break; 2624 } 2625 2626 // Memoize node if it doesn't produce a flag. 2627 SDNode *N; 2628 SDVTList VTs = getVTList(VT); 2629 if (VT != MVT::Flag) { 2630 SDValue Ops[] = { N1, N2, N3 }; 2631 FoldingSetNodeID ID; 2632 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 2633 void *IP = 0; 2634 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2635 return SDValue(E, 0); 2636 N = NodeAllocator.Allocate<TernarySDNode>(); 2637 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2638 CSEMap.InsertNode(N, IP); 2639 } else { 2640 N = NodeAllocator.Allocate<TernarySDNode>(); 2641 new (N) TernarySDNode(Opcode, VTs, N1, N2, N3); 2642 } 2643 AllNodes.push_back(N); 2644#ifndef NDEBUG 2645 VerifyNode(N); 2646#endif 2647 return SDValue(N, 0); 2648} 2649 2650SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2651 SDValue N1, SDValue N2, SDValue N3, 2652 SDValue N4) { 2653 SDValue Ops[] = { N1, N2, N3, N4 }; 2654 return getNode(Opcode, VT, Ops, 4); 2655} 2656 2657SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 2658 SDValue N1, SDValue N2, SDValue N3, 2659 SDValue N4, SDValue N5) { 2660 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 2661 return getNode(Opcode, VT, Ops, 5); 2662} 2663 2664/// getMemsetValue - Vectorized representation of the memset value 2665/// operand. 2666static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG) { 2667 unsigned NumBits = VT.isVector() ? 2668 VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits(); 2669 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 2670 APInt Val = APInt(NumBits, C->getValue() & 255); 2671 unsigned Shift = 8; 2672 for (unsigned i = NumBits; i > 8; i >>= 1) { 2673 Val = (Val << Shift) | Val; 2674 Shift <<= 1; 2675 } 2676 if (VT.isInteger()) 2677 return DAG.getConstant(Val, VT); 2678 return DAG.getConstantFP(APFloat(Val), VT); 2679 } 2680 2681 Value = DAG.getNode(ISD::ZERO_EXTEND, VT, Value); 2682 unsigned Shift = 8; 2683 for (unsigned i = NumBits; i > 8; i >>= 1) { 2684 Value = DAG.getNode(ISD::OR, VT, 2685 DAG.getNode(ISD::SHL, VT, Value, 2686 DAG.getConstant(Shift, MVT::i8)), Value); 2687 Shift <<= 1; 2688 } 2689 2690 return Value; 2691} 2692 2693/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 2694/// used when a memcpy is turned into a memset when the source is a constant 2695/// string ptr. 2696static SDValue getMemsetStringVal(MVT VT, SelectionDAG &DAG, 2697 const TargetLowering &TLI, 2698 std::string &Str, unsigned Offset) { 2699 // Handle vector with all elements zero. 2700 if (Str.empty()) { 2701 if (VT.isInteger()) 2702 return DAG.getConstant(0, VT); 2703 unsigned NumElts = VT.getVectorNumElements(); 2704 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 2705 return DAG.getNode(ISD::BIT_CONVERT, VT, 2706 DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts))); 2707 } 2708 2709 assert(!VT.isVector() && "Can't handle vector type here!"); 2710 unsigned NumBits = VT.getSizeInBits(); 2711 unsigned MSB = NumBits / 8; 2712 uint64_t Val = 0; 2713 if (TLI.isLittleEndian()) 2714 Offset = Offset + MSB - 1; 2715 for (unsigned i = 0; i != MSB; ++i) { 2716 Val = (Val << 8) | (unsigned char)Str[Offset]; 2717 Offset += TLI.isLittleEndian() ? -1 : 1; 2718 } 2719 return DAG.getConstant(Val, VT); 2720} 2721 2722/// getMemBasePlusOffset - Returns base and offset node for the 2723/// 2724static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 2725 SelectionDAG &DAG) { 2726 MVT VT = Base.getValueType(); 2727 return DAG.getNode(ISD::ADD, VT, Base, DAG.getConstant(Offset, VT)); 2728} 2729 2730/// isMemSrcFromString - Returns true if memcpy source is a string constant. 2731/// 2732static bool isMemSrcFromString(SDValue Src, std::string &Str) { 2733 unsigned SrcDelta = 0; 2734 GlobalAddressSDNode *G = NULL; 2735 if (Src.getOpcode() == ISD::GlobalAddress) 2736 G = cast<GlobalAddressSDNode>(Src); 2737 else if (Src.getOpcode() == ISD::ADD && 2738 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 2739 Src.getOperand(1).getOpcode() == ISD::Constant) { 2740 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 2741 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getValue(); 2742 } 2743 if (!G) 2744 return false; 2745 2746 GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 2747 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 2748 return true; 2749 2750 return false; 2751} 2752 2753/// MeetsMaxMemopRequirement - Determines if the number of memory ops required 2754/// to replace the memset / memcpy is below the threshold. It also returns the 2755/// types of the sequence of memory ops to perform memset / memcpy. 2756static 2757bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, 2758 SDValue Dst, SDValue Src, 2759 unsigned Limit, uint64_t Size, unsigned &Align, 2760 std::string &Str, bool &isSrcStr, 2761 SelectionDAG &DAG, 2762 const TargetLowering &TLI) { 2763 isSrcStr = isMemSrcFromString(Src, Str); 2764 bool isSrcConst = isa<ConstantSDNode>(Src); 2765 bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); 2766 MVT VT= TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); 2767 if (VT != MVT::iAny) { 2768 unsigned NewAlign = (unsigned) 2769 TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); 2770 // If source is a string constant, this will require an unaligned load. 2771 if (NewAlign > Align && (isSrcConst || AllowUnalign)) { 2772 if (Dst.getOpcode() != ISD::FrameIndex) { 2773 // Can't change destination alignment. It requires a unaligned store. 2774 if (AllowUnalign) 2775 VT = MVT::iAny; 2776 } else { 2777 int FI = cast<FrameIndexSDNode>(Dst)->getIndex(); 2778 MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2779 if (MFI->isFixedObjectIndex(FI)) { 2780 // Can't change destination alignment. It requires a unaligned store. 2781 if (AllowUnalign) 2782 VT = MVT::iAny; 2783 } else { 2784 // Give the stack frame object a larger alignment if needed. 2785 if (MFI->getObjectAlignment(FI) < NewAlign) 2786 MFI->setObjectAlignment(FI, NewAlign); 2787 Align = NewAlign; 2788 } 2789 } 2790 } 2791 } 2792 2793 if (VT == MVT::iAny) { 2794 if (AllowUnalign) { 2795 VT = MVT::i64; 2796 } else { 2797 switch (Align & 7) { 2798 case 0: VT = MVT::i64; break; 2799 case 4: VT = MVT::i32; break; 2800 case 2: VT = MVT::i16; break; 2801 default: VT = MVT::i8; break; 2802 } 2803 } 2804 2805 MVT LVT = MVT::i64; 2806 while (!TLI.isTypeLegal(LVT)) 2807 LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1); 2808 assert(LVT.isInteger()); 2809 2810 if (VT.bitsGT(LVT)) 2811 VT = LVT; 2812 } 2813 2814 unsigned NumMemOps = 0; 2815 while (Size != 0) { 2816 unsigned VTSize = VT.getSizeInBits() / 8; 2817 while (VTSize > Size) { 2818 // For now, only use non-vector load / store's for the left-over pieces. 2819 if (VT.isVector()) { 2820 VT = MVT::i64; 2821 while (!TLI.isTypeLegal(VT)) 2822 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2823 VTSize = VT.getSizeInBits() / 8; 2824 } else { 2825 VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1); 2826 VTSize >>= 1; 2827 } 2828 } 2829 2830 if (++NumMemOps > Limit) 2831 return false; 2832 MemOps.push_back(VT); 2833 Size -= VTSize; 2834 } 2835 2836 return true; 2837} 2838 2839static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, 2840 SDValue Chain, SDValue Dst, 2841 SDValue Src, uint64_t Size, 2842 unsigned Align, bool AlwaysInline, 2843 const Value *DstSV, uint64_t DstSVOff, 2844 const Value *SrcSV, uint64_t SrcSVOff){ 2845 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2846 2847 // Expand memcpy to a series of load and store ops if the size operand falls 2848 // below a certain threshold. 2849 std::vector<MVT> MemOps; 2850 uint64_t Limit = -1; 2851 if (!AlwaysInline) 2852 Limit = TLI.getMaxStoresPerMemcpy(); 2853 unsigned DstAlign = Align; // Destination alignment can change. 2854 std::string Str; 2855 bool CopyFromStr; 2856 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2857 Str, CopyFromStr, DAG, TLI)) 2858 return SDValue(); 2859 2860 2861 bool isZeroStr = CopyFromStr && Str.empty(); 2862 SmallVector<SDValue, 8> OutChains; 2863 unsigned NumMemOps = MemOps.size(); 2864 uint64_t SrcOff = 0, DstOff = 0; 2865 for (unsigned i = 0; i < NumMemOps; i++) { 2866 MVT VT = MemOps[i]; 2867 unsigned VTSize = VT.getSizeInBits() / 8; 2868 SDValue Value, Store; 2869 2870 if (CopyFromStr && (isZeroStr || !VT.isVector())) { 2871 // It's unlikely a store of a vector immediate can be done in a single 2872 // instruction. It would require a load from a constantpool first. 2873 // We also handle store a vector with all zero's. 2874 // FIXME: Handle other cases where store of vector immediate is done in 2875 // a single instruction. 2876 Value = getMemsetStringVal(VT, DAG, TLI, Str, SrcOff); 2877 Store = DAG.getStore(Chain, Value, 2878 getMemBasePlusOffset(Dst, DstOff, DAG), 2879 DstSV, DstSVOff + DstOff, false, DstAlign); 2880 } else { 2881 Value = DAG.getLoad(VT, Chain, 2882 getMemBasePlusOffset(Src, SrcOff, DAG), 2883 SrcSV, SrcSVOff + SrcOff, false, Align); 2884 Store = DAG.getStore(Chain, Value, 2885 getMemBasePlusOffset(Dst, DstOff, DAG), 2886 DstSV, DstSVOff + DstOff, false, DstAlign); 2887 } 2888 OutChains.push_back(Store); 2889 SrcOff += VTSize; 2890 DstOff += VTSize; 2891 } 2892 2893 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2894 &OutChains[0], OutChains.size()); 2895} 2896 2897static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, 2898 SDValue Chain, SDValue Dst, 2899 SDValue Src, uint64_t Size, 2900 unsigned Align, bool AlwaysInline, 2901 const Value *DstSV, uint64_t DstSVOff, 2902 const Value *SrcSV, uint64_t SrcSVOff){ 2903 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2904 2905 // Expand memmove to a series of load and store ops if the size operand falls 2906 // below a certain threshold. 2907 std::vector<MVT> MemOps; 2908 uint64_t Limit = -1; 2909 if (!AlwaysInline) 2910 Limit = TLI.getMaxStoresPerMemmove(); 2911 unsigned DstAlign = Align; // Destination alignment can change. 2912 std::string Str; 2913 bool CopyFromStr; 2914 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, Limit, Size, DstAlign, 2915 Str, CopyFromStr, DAG, TLI)) 2916 return SDValue(); 2917 2918 uint64_t SrcOff = 0, DstOff = 0; 2919 2920 SmallVector<SDValue, 8> LoadValues; 2921 SmallVector<SDValue, 8> LoadChains; 2922 SmallVector<SDValue, 8> OutChains; 2923 unsigned NumMemOps = MemOps.size(); 2924 for (unsigned i = 0; i < NumMemOps; i++) { 2925 MVT VT = MemOps[i]; 2926 unsigned VTSize = VT.getSizeInBits() / 8; 2927 SDValue Value, Store; 2928 2929 Value = DAG.getLoad(VT, Chain, 2930 getMemBasePlusOffset(Src, SrcOff, DAG), 2931 SrcSV, SrcSVOff + SrcOff, false, Align); 2932 LoadValues.push_back(Value); 2933 LoadChains.push_back(Value.getValue(1)); 2934 SrcOff += VTSize; 2935 } 2936 Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, 2937 &LoadChains[0], LoadChains.size()); 2938 OutChains.clear(); 2939 for (unsigned i = 0; i < NumMemOps; i++) { 2940 MVT VT = MemOps[i]; 2941 unsigned VTSize = VT.getSizeInBits() / 8; 2942 SDValue Value, Store; 2943 2944 Store = DAG.getStore(Chain, LoadValues[i], 2945 getMemBasePlusOffset(Dst, DstOff, DAG), 2946 DstSV, DstSVOff + DstOff, false, DstAlign); 2947 OutChains.push_back(Store); 2948 DstOff += VTSize; 2949 } 2950 2951 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2952 &OutChains[0], OutChains.size()); 2953} 2954 2955static SDValue getMemsetStores(SelectionDAG &DAG, 2956 SDValue Chain, SDValue Dst, 2957 SDValue Src, uint64_t Size, 2958 unsigned Align, 2959 const Value *DstSV, uint64_t DstSVOff) { 2960 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 2961 2962 // Expand memset to a series of load/store ops if the size operand 2963 // falls below a certain threshold. 2964 std::vector<MVT> MemOps; 2965 std::string Str; 2966 bool CopyFromStr; 2967 if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(), 2968 Size, Align, Str, CopyFromStr, DAG, TLI)) 2969 return SDValue(); 2970 2971 SmallVector<SDValue, 8> OutChains; 2972 uint64_t DstOff = 0; 2973 2974 unsigned NumMemOps = MemOps.size(); 2975 for (unsigned i = 0; i < NumMemOps; i++) { 2976 MVT VT = MemOps[i]; 2977 unsigned VTSize = VT.getSizeInBits() / 8; 2978 SDValue Value = getMemsetValue(Src, VT, DAG); 2979 SDValue Store = DAG.getStore(Chain, Value, 2980 getMemBasePlusOffset(Dst, DstOff, DAG), 2981 DstSV, DstSVOff + DstOff); 2982 OutChains.push_back(Store); 2983 DstOff += VTSize; 2984 } 2985 2986 return DAG.getNode(ISD::TokenFactor, MVT::Other, 2987 &OutChains[0], OutChains.size()); 2988} 2989 2990SDValue SelectionDAG::getMemcpy(SDValue Chain, SDValue Dst, 2991 SDValue Src, SDValue Size, 2992 unsigned Align, bool AlwaysInline, 2993 const Value *DstSV, uint64_t DstSVOff, 2994 const Value *SrcSV, uint64_t SrcSVOff) { 2995 2996 // Check to see if we should lower the memcpy to loads and stores first. 2997 // For cases within the target-specified limits, this is the best choice. 2998 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 2999 if (ConstantSize) { 3000 // Memcpy with size zero? Just return the original chain. 3001 if (ConstantSize->isNullValue()) 3002 return Chain; 3003 3004 SDValue Result = 3005 getMemcpyLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 3006 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3007 if (Result.Val) 3008 return Result; 3009 } 3010 3011 // Then check to see if we should lower the memcpy with target-specific 3012 // code. If the target chooses to do this, this is the next best. 3013 SDValue Result = 3014 TLI.EmitTargetCodeForMemcpy(*this, Chain, Dst, Src, Size, Align, 3015 AlwaysInline, 3016 DstSV, DstSVOff, SrcSV, SrcSVOff); 3017 if (Result.Val) 3018 return Result; 3019 3020 // If we really need inline code and the target declined to provide it, 3021 // use a (potentially long) sequence of loads and stores. 3022 if (AlwaysInline) { 3023 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3024 return getMemcpyLoadsAndStores(*this, Chain, Dst, Src, 3025 ConstantSize->getValue(), Align, true, 3026 DstSV, DstSVOff, SrcSV, SrcSVOff); 3027 } 3028 3029 // Emit a library call. 3030 TargetLowering::ArgListTy Args; 3031 TargetLowering::ArgListEntry Entry; 3032 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3033 Entry.Node = Dst; Args.push_back(Entry); 3034 Entry.Node = Src; Args.push_back(Entry); 3035 Entry.Node = Size; Args.push_back(Entry); 3036 std::pair<SDValue,SDValue> CallResult = 3037 TLI.LowerCallTo(Chain, Type::VoidTy, 3038 false, false, false, CallingConv::C, false, 3039 getExternalSymbol("memcpy", TLI.getPointerTy()), 3040 Args, *this); 3041 return CallResult.second; 3042} 3043 3044SDValue SelectionDAG::getMemmove(SDValue Chain, SDValue Dst, 3045 SDValue Src, SDValue Size, 3046 unsigned Align, 3047 const Value *DstSV, uint64_t DstSVOff, 3048 const Value *SrcSV, uint64_t SrcSVOff) { 3049 3050 // Check to see if we should lower the memmove to loads and stores first. 3051 // For cases within the target-specified limits, this is the best choice. 3052 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3053 if (ConstantSize) { 3054 // Memmove with size zero? Just return the original chain. 3055 if (ConstantSize->isNullValue()) 3056 return Chain; 3057 3058 SDValue Result = 3059 getMemmoveLoadsAndStores(*this, Chain, Dst, Src, ConstantSize->getValue(), 3060 Align, false, DstSV, DstSVOff, SrcSV, SrcSVOff); 3061 if (Result.Val) 3062 return Result; 3063 } 3064 3065 // Then check to see if we should lower the memmove with target-specific 3066 // code. If the target chooses to do this, this is the next best. 3067 SDValue Result = 3068 TLI.EmitTargetCodeForMemmove(*this, Chain, Dst, Src, Size, Align, 3069 DstSV, DstSVOff, SrcSV, SrcSVOff); 3070 if (Result.Val) 3071 return Result; 3072 3073 // Emit a library call. 3074 TargetLowering::ArgListTy Args; 3075 TargetLowering::ArgListEntry Entry; 3076 Entry.Ty = TLI.getTargetData()->getIntPtrType(); 3077 Entry.Node = Dst; Args.push_back(Entry); 3078 Entry.Node = Src; Args.push_back(Entry); 3079 Entry.Node = Size; Args.push_back(Entry); 3080 std::pair<SDValue,SDValue> CallResult = 3081 TLI.LowerCallTo(Chain, Type::VoidTy, 3082 false, false, false, CallingConv::C, false, 3083 getExternalSymbol("memmove", TLI.getPointerTy()), 3084 Args, *this); 3085 return CallResult.second; 3086} 3087 3088SDValue SelectionDAG::getMemset(SDValue Chain, SDValue Dst, 3089 SDValue Src, SDValue Size, 3090 unsigned Align, 3091 const Value *DstSV, uint64_t DstSVOff) { 3092 3093 // Check to see if we should lower the memset to stores first. 3094 // For cases within the target-specified limits, this is the best choice. 3095 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3096 if (ConstantSize) { 3097 // Memset with size zero? Just return the original chain. 3098 if (ConstantSize->isNullValue()) 3099 return Chain; 3100 3101 SDValue Result = 3102 getMemsetStores(*this, Chain, Dst, Src, ConstantSize->getValue(), Align, 3103 DstSV, DstSVOff); 3104 if (Result.Val) 3105 return Result; 3106 } 3107 3108 // Then check to see if we should lower the memset with target-specific 3109 // code. If the target chooses to do this, this is the next best. 3110 SDValue Result = 3111 TLI.EmitTargetCodeForMemset(*this, Chain, Dst, Src, Size, Align, 3112 DstSV, DstSVOff); 3113 if (Result.Val) 3114 return Result; 3115 3116 // Emit a library call. 3117 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); 3118 TargetLowering::ArgListTy Args; 3119 TargetLowering::ArgListEntry Entry; 3120 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3121 Args.push_back(Entry); 3122 // Extend or truncate the argument to be an i32 value for the call. 3123 if (Src.getValueType().bitsGT(MVT::i32)) 3124 Src = getNode(ISD::TRUNCATE, MVT::i32, Src); 3125 else 3126 Src = getNode(ISD::ZERO_EXTEND, MVT::i32, Src); 3127 Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true; 3128 Args.push_back(Entry); 3129 Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false; 3130 Args.push_back(Entry); 3131 std::pair<SDValue,SDValue> CallResult = 3132 TLI.LowerCallTo(Chain, Type::VoidTy, 3133 false, false, false, CallingConv::C, false, 3134 getExternalSymbol("memset", TLI.getPointerTy()), 3135 Args, *this); 3136 return CallResult.second; 3137} 3138 3139SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain, 3140 SDValue Ptr, SDValue Cmp, 3141 SDValue Swp, const Value* PtrVal, 3142 unsigned Alignment) { 3143 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3144 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3145 3146 MVT VT = Cmp.getValueType(); 3147 3148 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3149 Alignment = getMVTAlignment(VT); 3150 3151 SDVTList VTs = getVTList(VT, MVT::Other); 3152 FoldingSetNodeID ID; 3153 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3154 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3155 void* IP = 0; 3156 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3157 return SDValue(E, 0); 3158 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3159 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Cmp, Swp, PtrVal, Alignment); 3160 CSEMap.InsertNode(N, IP); 3161 AllNodes.push_back(N); 3162 return SDValue(N, 0); 3163} 3164 3165SDValue SelectionDAG::getAtomic(unsigned Opcode, SDValue Chain, 3166 SDValue Ptr, SDValue Val, 3167 const Value* PtrVal, 3168 unsigned Alignment) { 3169 assert(( Opcode == ISD::ATOMIC_LOAD_ADD || Opcode == ISD::ATOMIC_LOAD_SUB 3170 || Opcode == ISD::ATOMIC_SWAP || Opcode == ISD::ATOMIC_LOAD_AND 3171 || Opcode == ISD::ATOMIC_LOAD_OR || Opcode == ISD::ATOMIC_LOAD_XOR 3172 || Opcode == ISD::ATOMIC_LOAD_NAND 3173 || Opcode == ISD::ATOMIC_LOAD_MIN || Opcode == ISD::ATOMIC_LOAD_MAX 3174 || Opcode == ISD::ATOMIC_LOAD_UMIN || Opcode == ISD::ATOMIC_LOAD_UMAX) 3175 && "Invalid Atomic Op"); 3176 3177 MVT VT = Val.getValueType(); 3178 3179 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3180 Alignment = getMVTAlignment(VT); 3181 3182 SDVTList VTs = getVTList(VT, MVT::Other); 3183 FoldingSetNodeID ID; 3184 SDValue Ops[] = {Chain, Ptr, Val}; 3185 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3186 void* IP = 0; 3187 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3188 return SDValue(E, 0); 3189 SDNode* N = NodeAllocator.Allocate<AtomicSDNode>(); 3190 new (N) AtomicSDNode(Opcode, VTs, Chain, Ptr, Val, PtrVal, Alignment); 3191 CSEMap.InsertNode(N, IP); 3192 AllNodes.push_back(N); 3193 return SDValue(N, 0); 3194} 3195 3196/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3197/// Allowed to return something different (and simpler) if Simplify is true. 3198SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3199 bool Simplify) { 3200 if (Simplify && NumOps == 1) 3201 return Ops[0]; 3202 3203 SmallVector<MVT, 4> VTs; 3204 VTs.reserve(NumOps); 3205 for (unsigned i = 0; i < NumOps; ++i) 3206 VTs.push_back(Ops[i].getValueType()); 3207 return getNode(ISD::MERGE_VALUES, getVTList(&VTs[0], NumOps), Ops, NumOps); 3208} 3209 3210SDValue 3211SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 3212 MVT VT, SDValue Chain, 3213 SDValue Ptr, SDValue Offset, 3214 const Value *SV, int SVOffset, MVT EVT, 3215 bool isVolatile, unsigned Alignment) { 3216 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3217 Alignment = getMVTAlignment(VT); 3218 3219 if (VT == EVT) { 3220 ExtType = ISD::NON_EXTLOAD; 3221 } else if (ExtType == ISD::NON_EXTLOAD) { 3222 assert(VT == EVT && "Non-extending load from different memory type!"); 3223 } else { 3224 // Extending load. 3225 if (VT.isVector()) 3226 assert(EVT.getVectorNumElements() == VT.getVectorNumElements() && 3227 "Invalid vector extload!"); 3228 else 3229 assert(EVT.bitsLT(VT) && 3230 "Should only be an extending load, not truncating!"); 3231 assert((ExtType == ISD::EXTLOAD || VT.isInteger()) && 3232 "Cannot sign/zero extend a FP/Vector load!"); 3233 assert(VT.isInteger() == EVT.isInteger() && 3234 "Cannot convert from FP to Int or Int -> FP!"); 3235 } 3236 3237 bool Indexed = AM != ISD::UNINDEXED; 3238 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 3239 "Unindexed load with an offset!"); 3240 3241 SDVTList VTs = Indexed ? 3242 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 3243 SDValue Ops[] = { Chain, Ptr, Offset }; 3244 FoldingSetNodeID ID; 3245 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 3246 ID.AddInteger(AM); 3247 ID.AddInteger(ExtType); 3248 ID.AddInteger(EVT.getRawBits()); 3249 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3250 void *IP = 0; 3251 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3252 return SDValue(E, 0); 3253 SDNode *N = NodeAllocator.Allocate<LoadSDNode>(); 3254 new (N) LoadSDNode(Ops, VTs, AM, ExtType, EVT, SV, SVOffset, 3255 Alignment, isVolatile); 3256 CSEMap.InsertNode(N, IP); 3257 AllNodes.push_back(N); 3258 return SDValue(N, 0); 3259} 3260 3261SDValue SelectionDAG::getLoad(MVT VT, 3262 SDValue Chain, SDValue Ptr, 3263 const Value *SV, int SVOffset, 3264 bool isVolatile, unsigned Alignment) { 3265 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3266 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, Chain, Ptr, Undef, 3267 SV, SVOffset, VT, isVolatile, Alignment); 3268} 3269 3270SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT VT, 3271 SDValue Chain, SDValue Ptr, 3272 const Value *SV, 3273 int SVOffset, MVT EVT, 3274 bool isVolatile, unsigned Alignment) { 3275 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3276 return getLoad(ISD::UNINDEXED, ExtType, VT, Chain, Ptr, Undef, 3277 SV, SVOffset, EVT, isVolatile, Alignment); 3278} 3279 3280SDValue 3281SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDValue Base, 3282 SDValue Offset, ISD::MemIndexedMode AM) { 3283 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 3284 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 3285 "Load is already a indexed load!"); 3286 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), 3287 LD->getChain(), Base, Offset, LD->getSrcValue(), 3288 LD->getSrcValueOffset(), LD->getMemoryVT(), 3289 LD->isVolatile(), LD->getAlignment()); 3290} 3291 3292SDValue SelectionDAG::getStore(SDValue Chain, SDValue Val, 3293 SDValue Ptr, const Value *SV, int SVOffset, 3294 bool isVolatile, unsigned Alignment) { 3295 MVT VT = Val.getValueType(); 3296 3297 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3298 Alignment = getMVTAlignment(VT); 3299 3300 SDVTList VTs = getVTList(MVT::Other); 3301 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3302 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3303 FoldingSetNodeID ID; 3304 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3305 ID.AddInteger(ISD::UNINDEXED); 3306 ID.AddInteger(false); 3307 ID.AddInteger(VT.getRawBits()); 3308 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3309 void *IP = 0; 3310 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3311 return SDValue(E, 0); 3312 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3313 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, false, 3314 VT, SV, SVOffset, Alignment, isVolatile); 3315 CSEMap.InsertNode(N, IP); 3316 AllNodes.push_back(N); 3317 return SDValue(N, 0); 3318} 3319 3320SDValue SelectionDAG::getTruncStore(SDValue Chain, SDValue Val, 3321 SDValue Ptr, const Value *SV, 3322 int SVOffset, MVT SVT, 3323 bool isVolatile, unsigned Alignment) { 3324 MVT VT = Val.getValueType(); 3325 3326 if (VT == SVT) 3327 return getStore(Chain, Val, Ptr, SV, SVOffset, isVolatile, Alignment); 3328 3329 assert(VT.bitsGT(SVT) && "Not a truncation?"); 3330 assert(VT.isInteger() == SVT.isInteger() && 3331 "Can't do FP-INT conversion!"); 3332 3333 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3334 Alignment = getMVTAlignment(VT); 3335 3336 SDVTList VTs = getVTList(MVT::Other); 3337 SDValue Undef = getNode(ISD::UNDEF, Ptr.getValueType()); 3338 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 3339 FoldingSetNodeID ID; 3340 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3341 ID.AddInteger(ISD::UNINDEXED); 3342 ID.AddInteger(1); 3343 ID.AddInteger(SVT.getRawBits()); 3344 ID.AddInteger(encodeMemSDNodeFlags(isVolatile, Alignment)); 3345 void *IP = 0; 3346 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3347 return SDValue(E, 0); 3348 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3349 new (N) StoreSDNode(Ops, VTs, ISD::UNINDEXED, true, 3350 SVT, SV, SVOffset, Alignment, isVolatile); 3351 CSEMap.InsertNode(N, IP); 3352 AllNodes.push_back(N); 3353 return SDValue(N, 0); 3354} 3355 3356SDValue 3357SelectionDAG::getIndexedStore(SDValue OrigStore, SDValue Base, 3358 SDValue Offset, ISD::MemIndexedMode AM) { 3359 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 3360 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 3361 "Store is already a indexed store!"); 3362 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 3363 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 3364 FoldingSetNodeID ID; 3365 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 3366 ID.AddInteger(AM); 3367 ID.AddInteger(ST->isTruncatingStore()); 3368 ID.AddInteger(ST->getMemoryVT().getRawBits()); 3369 ID.AddInteger(ST->getRawFlags()); 3370 void *IP = 0; 3371 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3372 return SDValue(E, 0); 3373 SDNode *N = NodeAllocator.Allocate<StoreSDNode>(); 3374 new (N) StoreSDNode(Ops, VTs, AM, 3375 ST->isTruncatingStore(), ST->getMemoryVT(), 3376 ST->getSrcValue(), ST->getSrcValueOffset(), 3377 ST->getAlignment(), ST->isVolatile()); 3378 CSEMap.InsertNode(N, IP); 3379 AllNodes.push_back(N); 3380 return SDValue(N, 0); 3381} 3382 3383SDValue SelectionDAG::getVAArg(MVT VT, 3384 SDValue Chain, SDValue Ptr, 3385 SDValue SV) { 3386 SDValue Ops[] = { Chain, Ptr, SV }; 3387 return getNode(ISD::VAARG, getVTList(VT, MVT::Other), Ops, 3); 3388} 3389 3390SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3391 const SDUse *Ops, unsigned NumOps) { 3392 switch (NumOps) { 3393 case 0: return getNode(Opcode, VT); 3394 case 1: return getNode(Opcode, VT, Ops[0]); 3395 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3396 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3397 default: break; 3398 } 3399 3400 // Copy from an SDUse array into an SDValue array for use with 3401 // the regular getNode logic. 3402 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 3403 return getNode(Opcode, VT, &NewOps[0], NumOps); 3404} 3405 3406SDValue SelectionDAG::getNode(unsigned Opcode, MVT VT, 3407 const SDValue *Ops, unsigned NumOps) { 3408 switch (NumOps) { 3409 case 0: return getNode(Opcode, VT); 3410 case 1: return getNode(Opcode, VT, Ops[0]); 3411 case 2: return getNode(Opcode, VT, Ops[0], Ops[1]); 3412 case 3: return getNode(Opcode, VT, Ops[0], Ops[1], Ops[2]); 3413 default: break; 3414 } 3415 3416 switch (Opcode) { 3417 default: break; 3418 case ISD::SELECT_CC: { 3419 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 3420 assert(Ops[0].getValueType() == Ops[1].getValueType() && 3421 "LHS and RHS of condition must have same type!"); 3422 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3423 "True and False arms of SelectCC must have same type!"); 3424 assert(Ops[2].getValueType() == VT && 3425 "select_cc node must be of same type as true and false value!"); 3426 break; 3427 } 3428 case ISD::BR_CC: { 3429 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 3430 assert(Ops[2].getValueType() == Ops[3].getValueType() && 3431 "LHS/RHS of comparison should match types!"); 3432 break; 3433 } 3434 } 3435 3436 // Memoize nodes. 3437 SDNode *N; 3438 SDVTList VTs = getVTList(VT); 3439 if (VT != MVT::Flag) { 3440 FoldingSetNodeID ID; 3441 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 3442 void *IP = 0; 3443 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3444 return SDValue(E, 0); 3445 N = NodeAllocator.Allocate<SDNode>(); 3446 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3447 CSEMap.InsertNode(N, IP); 3448 } else { 3449 N = NodeAllocator.Allocate<SDNode>(); 3450 new (N) SDNode(Opcode, VTs, Ops, NumOps); 3451 } 3452 AllNodes.push_back(N); 3453#ifndef NDEBUG 3454 VerifyNode(N); 3455#endif 3456 return SDValue(N, 0); 3457} 3458 3459SDValue SelectionDAG::getNode(unsigned Opcode, 3460 const std::vector<MVT> &ResultTys, 3461 const SDValue *Ops, unsigned NumOps) { 3462 return getNode(Opcode, getNodeValueTypes(ResultTys), ResultTys.size(), 3463 Ops, NumOps); 3464} 3465 3466SDValue SelectionDAG::getNode(unsigned Opcode, 3467 const MVT *VTs, unsigned NumVTs, 3468 const SDValue *Ops, unsigned NumOps) { 3469 if (NumVTs == 1) 3470 return getNode(Opcode, VTs[0], Ops, NumOps); 3471 return getNode(Opcode, makeVTList(VTs, NumVTs), Ops, NumOps); 3472} 3473 3474SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3475 const SDValue *Ops, unsigned NumOps) { 3476 if (VTList.NumVTs == 1) 3477 return getNode(Opcode, VTList.VTs[0], Ops, NumOps); 3478 3479 switch (Opcode) { 3480 // FIXME: figure out how to safely handle things like 3481 // int foo(int x) { return 1 << (x & 255); } 3482 // int bar() { return foo(256); } 3483#if 0 3484 case ISD::SRA_PARTS: 3485 case ISD::SRL_PARTS: 3486 case ISD::SHL_PARTS: 3487 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 3488 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 3489 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3490 else if (N3.getOpcode() == ISD::AND) 3491 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 3492 // If the and is only masking out bits that cannot effect the shift, 3493 // eliminate the and. 3494 unsigned NumBits = VT.getSizeInBits()*2; 3495 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 3496 return getNode(Opcode, VT, N1, N2, N3.getOperand(0)); 3497 } 3498 break; 3499#endif 3500 } 3501 3502 // Memoize the node unless it returns a flag. 3503 SDNode *N; 3504 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 3505 FoldingSetNodeID ID; 3506 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3507 void *IP = 0; 3508 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3509 return SDValue(E, 0); 3510 if (NumOps == 1) { 3511 N = NodeAllocator.Allocate<UnarySDNode>(); 3512 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3513 } else if (NumOps == 2) { 3514 N = NodeAllocator.Allocate<BinarySDNode>(); 3515 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3516 } else if (NumOps == 3) { 3517 N = NodeAllocator.Allocate<TernarySDNode>(); 3518 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3519 } else { 3520 N = NodeAllocator.Allocate<SDNode>(); 3521 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3522 } 3523 CSEMap.InsertNode(N, IP); 3524 } else { 3525 if (NumOps == 1) { 3526 N = NodeAllocator.Allocate<UnarySDNode>(); 3527 new (N) UnarySDNode(Opcode, VTList, Ops[0]); 3528 } else if (NumOps == 2) { 3529 N = NodeAllocator.Allocate<BinarySDNode>(); 3530 new (N) BinarySDNode(Opcode, VTList, Ops[0], Ops[1]); 3531 } else if (NumOps == 3) { 3532 N = NodeAllocator.Allocate<TernarySDNode>(); 3533 new (N) TernarySDNode(Opcode, VTList, Ops[0], Ops[1], Ops[2]); 3534 } else { 3535 N = NodeAllocator.Allocate<SDNode>(); 3536 new (N) SDNode(Opcode, VTList, Ops, NumOps); 3537 } 3538 } 3539 AllNodes.push_back(N); 3540#ifndef NDEBUG 3541 VerifyNode(N); 3542#endif 3543 return SDValue(N, 0); 3544} 3545 3546SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList) { 3547 return getNode(Opcode, VTList, 0, 0); 3548} 3549 3550SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3551 SDValue N1) { 3552 SDValue Ops[] = { N1 }; 3553 return getNode(Opcode, VTList, Ops, 1); 3554} 3555 3556SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3557 SDValue N1, SDValue N2) { 3558 SDValue Ops[] = { N1, N2 }; 3559 return getNode(Opcode, VTList, Ops, 2); 3560} 3561 3562SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3563 SDValue N1, SDValue N2, SDValue N3) { 3564 SDValue Ops[] = { N1, N2, N3 }; 3565 return getNode(Opcode, VTList, Ops, 3); 3566} 3567 3568SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3569 SDValue N1, SDValue N2, SDValue N3, 3570 SDValue N4) { 3571 SDValue Ops[] = { N1, N2, N3, N4 }; 3572 return getNode(Opcode, VTList, Ops, 4); 3573} 3574 3575SDValue SelectionDAG::getNode(unsigned Opcode, SDVTList VTList, 3576 SDValue N1, SDValue N2, SDValue N3, 3577 SDValue N4, SDValue N5) { 3578 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3579 return getNode(Opcode, VTList, Ops, 5); 3580} 3581 3582SDVTList SelectionDAG::getVTList(MVT VT) { 3583 return makeVTList(SDNode::getValueTypeList(VT), 1); 3584} 3585 3586SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) { 3587 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3588 E = VTList.rend(); I != E; ++I) 3589 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 3590 return *I; 3591 3592 MVT *Array = Allocator.Allocate<MVT>(2); 3593 Array[0] = VT1; 3594 Array[1] = VT2; 3595 SDVTList Result = makeVTList(Array, 2); 3596 VTList.push_back(Result); 3597 return Result; 3598} 3599 3600SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) { 3601 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3602 E = VTList.rend(); I != E; ++I) 3603 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 3604 I->VTs[2] == VT3) 3605 return *I; 3606 3607 MVT *Array = Allocator.Allocate<MVT>(3); 3608 Array[0] = VT1; 3609 Array[1] = VT2; 3610 Array[2] = VT3; 3611 SDVTList Result = makeVTList(Array, 3); 3612 VTList.push_back(Result); 3613 return Result; 3614} 3615 3616SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) { 3617 switch (NumVTs) { 3618 case 0: assert(0 && "Cannot have nodes without results!"); 3619 case 1: return getVTList(VTs[0]); 3620 case 2: return getVTList(VTs[0], VTs[1]); 3621 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 3622 default: break; 3623 } 3624 3625 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 3626 E = VTList.rend(); I != E; ++I) { 3627 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 3628 continue; 3629 3630 bool NoMatch = false; 3631 for (unsigned i = 2; i != NumVTs; ++i) 3632 if (VTs[i] != I->VTs[i]) { 3633 NoMatch = true; 3634 break; 3635 } 3636 if (!NoMatch) 3637 return *I; 3638 } 3639 3640 MVT *Array = Allocator.Allocate<MVT>(NumVTs); 3641 std::copy(VTs, VTs+NumVTs, Array); 3642 SDVTList Result = makeVTList(Array, NumVTs); 3643 VTList.push_back(Result); 3644 return Result; 3645} 3646 3647 3648/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 3649/// specified operands. If the resultant node already exists in the DAG, 3650/// this does not modify the specified node, instead it returns the node that 3651/// already exists. If the resultant node does not exist in the DAG, the 3652/// input node is returned. As a degenerate case, if you specify the same 3653/// input operands as the node already has, the input node is returned. 3654SDValue SelectionDAG::UpdateNodeOperands(SDValue InN, SDValue Op) { 3655 SDNode *N = InN.Val; 3656 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 3657 3658 // Check to see if there is no change. 3659 if (Op == N->getOperand(0)) return InN; 3660 3661 // See if the modified node already exists. 3662 void *InsertPos = 0; 3663 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 3664 return SDValue(Existing, InN.ResNo); 3665 3666 // Nope it doesn't. Remove the node from its current place in the maps. 3667 if (InsertPos) 3668 RemoveNodeFromCSEMaps(N); 3669 3670 // Now we update the operands. 3671 N->OperandList[0].getVal()->removeUser(0, N); 3672 N->OperandList[0] = Op; 3673 N->OperandList[0].setUser(N); 3674 Op.Val->addUser(0, N); 3675 3676 // If this gets put into a CSE map, add it. 3677 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3678 return InN; 3679} 3680 3681SDValue SelectionDAG:: 3682UpdateNodeOperands(SDValue InN, SDValue Op1, SDValue Op2) { 3683 SDNode *N = InN.Val; 3684 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 3685 3686 // Check to see if there is no change. 3687 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 3688 return InN; // No operands changed, just return the input node. 3689 3690 // See if the modified node already exists. 3691 void *InsertPos = 0; 3692 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 3693 return SDValue(Existing, InN.ResNo); 3694 3695 // Nope it doesn't. Remove the node from its current place in the maps. 3696 if (InsertPos) 3697 RemoveNodeFromCSEMaps(N); 3698 3699 // Now we update the operands. 3700 if (N->OperandList[0] != Op1) { 3701 N->OperandList[0].getVal()->removeUser(0, N); 3702 N->OperandList[0] = Op1; 3703 N->OperandList[0].setUser(N); 3704 Op1.Val->addUser(0, N); 3705 } 3706 if (N->OperandList[1] != Op2) { 3707 N->OperandList[1].getVal()->removeUser(1, N); 3708 N->OperandList[1] = Op2; 3709 N->OperandList[1].setUser(N); 3710 Op2.Val->addUser(1, N); 3711 } 3712 3713 // If this gets put into a CSE map, add it. 3714 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3715 return InN; 3716} 3717 3718SDValue SelectionDAG:: 3719UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, SDValue Op3) { 3720 SDValue Ops[] = { Op1, Op2, Op3 }; 3721 return UpdateNodeOperands(N, Ops, 3); 3722} 3723 3724SDValue SelectionDAG:: 3725UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3726 SDValue Op3, SDValue Op4) { 3727 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 3728 return UpdateNodeOperands(N, Ops, 4); 3729} 3730 3731SDValue SelectionDAG:: 3732UpdateNodeOperands(SDValue N, SDValue Op1, SDValue Op2, 3733 SDValue Op3, SDValue Op4, SDValue Op5) { 3734 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 3735 return UpdateNodeOperands(N, Ops, 5); 3736} 3737 3738SDValue SelectionDAG:: 3739UpdateNodeOperands(SDValue InN, const SDValue *Ops, unsigned NumOps) { 3740 SDNode *N = InN.Val; 3741 assert(N->getNumOperands() == NumOps && 3742 "Update with wrong number of operands"); 3743 3744 // Check to see if there is no change. 3745 bool AnyChange = false; 3746 for (unsigned i = 0; i != NumOps; ++i) { 3747 if (Ops[i] != N->getOperand(i)) { 3748 AnyChange = true; 3749 break; 3750 } 3751 } 3752 3753 // No operands changed, just return the input node. 3754 if (!AnyChange) return InN; 3755 3756 // See if the modified node already exists. 3757 void *InsertPos = 0; 3758 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 3759 return SDValue(Existing, InN.ResNo); 3760 3761 // Nope it doesn't. Remove the node from its current place in the maps. 3762 if (InsertPos) 3763 RemoveNodeFromCSEMaps(N); 3764 3765 // Now we update the operands. 3766 for (unsigned i = 0; i != NumOps; ++i) { 3767 if (N->OperandList[i] != Ops[i]) { 3768 N->OperandList[i].getVal()->removeUser(i, N); 3769 N->OperandList[i] = Ops[i]; 3770 N->OperandList[i].setUser(N); 3771 Ops[i].Val->addUser(i, N); 3772 } 3773 } 3774 3775 // If this gets put into a CSE map, add it. 3776 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 3777 return InN; 3778} 3779 3780/// DropOperands - Release the operands and set this node to have 3781/// zero operands. 3782void SDNode::DropOperands() { 3783 // Unlike the code in MorphNodeTo that does this, we don't need to 3784 // watch for dead nodes here. 3785 for (op_iterator I = op_begin(), E = op_end(); I != E; ++I) 3786 I->getVal()->removeUser(std::distance(op_begin(), I), this); 3787 3788 NumOperands = 0; 3789} 3790 3791/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 3792/// machine opcode. 3793/// 3794SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3795 MVT VT) { 3796 SDVTList VTs = getVTList(VT); 3797 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 3798} 3799 3800SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3801 MVT VT, SDValue Op1) { 3802 SDVTList VTs = getVTList(VT); 3803 SDValue Ops[] = { Op1 }; 3804 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 3805} 3806 3807SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3808 MVT VT, SDValue Op1, 3809 SDValue Op2) { 3810 SDVTList VTs = getVTList(VT); 3811 SDValue Ops[] = { Op1, Op2 }; 3812 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 3813} 3814 3815SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3816 MVT VT, SDValue Op1, 3817 SDValue Op2, SDValue Op3) { 3818 SDVTList VTs = getVTList(VT); 3819 SDValue Ops[] = { Op1, Op2, Op3 }; 3820 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 3821} 3822 3823SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3824 MVT VT, const SDValue *Ops, 3825 unsigned NumOps) { 3826 SDVTList VTs = getVTList(VT); 3827 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3828} 3829 3830SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3831 MVT VT1, MVT VT2, const SDValue *Ops, 3832 unsigned NumOps) { 3833 SDVTList VTs = getVTList(VT1, VT2); 3834 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3835} 3836 3837SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3838 MVT VT1, MVT VT2) { 3839 SDVTList VTs = getVTList(VT1, VT2); 3840 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 3841} 3842 3843SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3844 MVT VT1, MVT VT2, MVT VT3, 3845 const SDValue *Ops, unsigned NumOps) { 3846 SDVTList VTs = getVTList(VT1, VT2, VT3); 3847 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 3848} 3849 3850SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3851 MVT VT1, MVT VT2, 3852 SDValue Op1) { 3853 SDVTList VTs = getVTList(VT1, VT2); 3854 SDValue Ops[] = { Op1 }; 3855 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 3856} 3857 3858SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3859 MVT VT1, MVT VT2, 3860 SDValue Op1, SDValue Op2) { 3861 SDVTList VTs = getVTList(VT1, VT2); 3862 SDValue Ops[] = { Op1, Op2 }; 3863 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 3864} 3865 3866SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3867 MVT VT1, MVT VT2, 3868 SDValue Op1, SDValue Op2, 3869 SDValue Op3) { 3870 SDVTList VTs = getVTList(VT1, VT2); 3871 SDValue Ops[] = { Op1, Op2, Op3 }; 3872 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 3873} 3874 3875SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 3876 SDVTList VTs, const SDValue *Ops, 3877 unsigned NumOps) { 3878 return MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 3879} 3880 3881SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3882 MVT VT) { 3883 SDVTList VTs = getVTList(VT); 3884 return MorphNodeTo(N, Opc, VTs, 0, 0); 3885} 3886 3887SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3888 MVT VT, SDValue Op1) { 3889 SDVTList VTs = getVTList(VT); 3890 SDValue Ops[] = { Op1 }; 3891 return MorphNodeTo(N, Opc, VTs, Ops, 1); 3892} 3893 3894SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3895 MVT VT, SDValue Op1, 3896 SDValue Op2) { 3897 SDVTList VTs = getVTList(VT); 3898 SDValue Ops[] = { Op1, Op2 }; 3899 return MorphNodeTo(N, Opc, VTs, Ops, 2); 3900} 3901 3902SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3903 MVT VT, SDValue Op1, 3904 SDValue Op2, SDValue Op3) { 3905 SDVTList VTs = getVTList(VT); 3906 SDValue Ops[] = { Op1, Op2, Op3 }; 3907 return MorphNodeTo(N, Opc, VTs, Ops, 3); 3908} 3909 3910SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3911 MVT VT, const SDValue *Ops, 3912 unsigned NumOps) { 3913 SDVTList VTs = getVTList(VT); 3914 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 3915} 3916 3917SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3918 MVT VT1, MVT VT2, const SDValue *Ops, 3919 unsigned NumOps) { 3920 SDVTList VTs = getVTList(VT1, VT2); 3921 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 3922} 3923 3924SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3925 MVT VT1, MVT VT2) { 3926 SDVTList VTs = getVTList(VT1, VT2); 3927 return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0); 3928} 3929 3930SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3931 MVT VT1, MVT VT2, MVT VT3, 3932 const SDValue *Ops, unsigned NumOps) { 3933 SDVTList VTs = getVTList(VT1, VT2, VT3); 3934 return MorphNodeTo(N, Opc, VTs, Ops, NumOps); 3935} 3936 3937SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3938 MVT VT1, MVT VT2, 3939 SDValue Op1) { 3940 SDVTList VTs = getVTList(VT1, VT2); 3941 SDValue Ops[] = { Op1 }; 3942 return MorphNodeTo(N, Opc, VTs, Ops, 1); 3943} 3944 3945SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3946 MVT VT1, MVT VT2, 3947 SDValue Op1, SDValue Op2) { 3948 SDVTList VTs = getVTList(VT1, VT2); 3949 SDValue Ops[] = { Op1, Op2 }; 3950 return MorphNodeTo(N, Opc, VTs, Ops, 2); 3951} 3952 3953SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3954 MVT VT1, MVT VT2, 3955 SDValue Op1, SDValue Op2, 3956 SDValue Op3) { 3957 SDVTList VTs = getVTList(VT1, VT2); 3958 SDValue Ops[] = { Op1, Op2, Op3 }; 3959 return MorphNodeTo(N, Opc, VTs, Ops, 3); 3960} 3961 3962/// MorphNodeTo - These *mutate* the specified node to have the specified 3963/// return type, opcode, and operands. 3964/// 3965/// Note that MorphNodeTo returns the resultant node. If there is already a 3966/// node of the specified opcode and operands, it returns that node instead of 3967/// the current one. 3968/// 3969/// Using MorphNodeTo is faster than creating a new node and swapping it in 3970/// with ReplaceAllUsesWith both because it often avoids allocating a new 3971/// node, and because it doesn't require CSE recalulation for any of 3972/// the node's users. 3973/// 3974SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 3975 SDVTList VTs, const SDValue *Ops, 3976 unsigned NumOps) { 3977 // If an identical node already exists, use it. 3978 void *IP = 0; 3979 if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) { 3980 FoldingSetNodeID ID; 3981 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 3982 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 3983 return ON; 3984 } 3985 3986 RemoveNodeFromCSEMaps(N); 3987 3988 // Start the morphing. 3989 N->NodeType = Opc; 3990 N->ValueList = VTs.VTs; 3991 N->NumValues = VTs.NumVTs; 3992 3993 // Clear the operands list, updating used nodes to remove this from their 3994 // use list. Keep track of any operands that become dead as a result. 3995 SmallPtrSet<SDNode*, 16> DeadNodeSet; 3996 for (SDNode::op_iterator B = N->op_begin(), I = B, E = N->op_end(); 3997 I != E; ++I) { 3998 SDNode *Used = I->getVal(); 3999 Used->removeUser(std::distance(B, I), N); 4000 if (Used->use_empty()) 4001 DeadNodeSet.insert(Used); 4002 } 4003 4004 // If NumOps is larger than the # of operands we currently have, reallocate 4005 // the operand list. 4006 if (NumOps > N->NumOperands) { 4007 if (N->OperandsNeedDelete) 4008 delete[] N->OperandList; 4009 if (N->isMachineOpcode()) { 4010 // We're creating a final node that will live unmorphed for the 4011 // remainder of the current SelectionDAG iteration, so we can allocate 4012 // the operands directly out of a pool with no recycling metadata. 4013 N->OperandList = OperandAllocator.Allocate<SDUse>(NumOps); 4014 N->OperandsNeedDelete = false; 4015 } else { 4016 N->OperandList = new SDUse[NumOps]; 4017 N->OperandsNeedDelete = true; 4018 } 4019 } 4020 4021 // Assign the new operands. 4022 N->NumOperands = NumOps; 4023 for (unsigned i = 0, e = NumOps; i != e; ++i) { 4024 N->OperandList[i] = Ops[i]; 4025 N->OperandList[i].setUser(N); 4026 SDNode *ToUse = N->OperandList[i].getVal(); 4027 ToUse->addUser(i, N); 4028 } 4029 4030 // Delete any nodes that are still dead after adding the uses for the 4031 // new operands. 4032 SmallVector<SDNode *, 16> DeadNodes; 4033 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4034 E = DeadNodeSet.end(); I != E; ++I) 4035 if ((*I)->use_empty()) 4036 DeadNodes.push_back(*I); 4037 RemoveDeadNodes(DeadNodes); 4038 4039 if (IP) 4040 CSEMap.InsertNode(N, IP); // Memoize the new node. 4041 return N; 4042} 4043 4044 4045/// getTargetNode - These are used for target selectors to create a new node 4046/// with specified return type(s), target opcode, and operands. 4047/// 4048/// Note that getTargetNode returns the resultant node. If there is already a 4049/// node of the specified opcode and operands, it returns that node instead of 4050/// the current one. 4051SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT) { 4052 return getNode(~Opcode, VT).Val; 4053} 4054SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, SDValue Op1) { 4055 return getNode(~Opcode, VT, Op1).Val; 4056} 4057SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4058 SDValue Op1, SDValue Op2) { 4059 return getNode(~Opcode, VT, Op1, Op2).Val; 4060} 4061SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4062 SDValue Op1, SDValue Op2, 4063 SDValue Op3) { 4064 return getNode(~Opcode, VT, Op1, Op2, Op3).Val; 4065} 4066SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT, 4067 const SDValue *Ops, unsigned NumOps) { 4068 return getNode(~Opcode, VT, Ops, NumOps).Val; 4069} 4070SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2) { 4071 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4072 SDValue Op; 4073 return getNode(~Opcode, VTs, 2, &Op, 0).Val; 4074} 4075SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4076 MVT VT2, SDValue Op1) { 4077 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4078 return getNode(~Opcode, VTs, 2, &Op1, 1).Val; 4079} 4080SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4081 MVT VT2, SDValue Op1, 4082 SDValue Op2) { 4083 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4084 SDValue Ops[] = { Op1, Op2 }; 4085 return getNode(~Opcode, VTs, 2, Ops, 2).Val; 4086} 4087SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4088 MVT VT2, SDValue Op1, 4089 SDValue Op2, SDValue Op3) { 4090 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4091 SDValue Ops[] = { Op1, Op2, Op3 }; 4092 return getNode(~Opcode, VTs, 2, Ops, 3).Val; 4093} 4094SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, 4095 const SDValue *Ops, unsigned NumOps) { 4096 const MVT *VTs = getNodeValueTypes(VT1, VT2); 4097 return getNode(~Opcode, VTs, 2, Ops, NumOps).Val; 4098} 4099SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4100 SDValue Op1, SDValue Op2) { 4101 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4102 SDValue Ops[] = { Op1, Op2 }; 4103 return getNode(~Opcode, VTs, 3, Ops, 2).Val; 4104} 4105SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4106 SDValue Op1, SDValue Op2, 4107 SDValue Op3) { 4108 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4109 SDValue Ops[] = { Op1, Op2, Op3 }; 4110 return getNode(~Opcode, VTs, 3, Ops, 3).Val; 4111} 4112SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, MVT VT2, MVT VT3, 4113 const SDValue *Ops, unsigned NumOps) { 4114 const MVT *VTs = getNodeValueTypes(VT1, VT2, VT3); 4115 return getNode(~Opcode, VTs, 3, Ops, NumOps).Val; 4116} 4117SDNode *SelectionDAG::getTargetNode(unsigned Opcode, MVT VT1, 4118 MVT VT2, MVT VT3, MVT VT4, 4119 const SDValue *Ops, unsigned NumOps) { 4120 std::vector<MVT> VTList; 4121 VTList.push_back(VT1); 4122 VTList.push_back(VT2); 4123 VTList.push_back(VT3); 4124 VTList.push_back(VT4); 4125 const MVT *VTs = getNodeValueTypes(VTList); 4126 return getNode(~Opcode, VTs, 4, Ops, NumOps).Val; 4127} 4128SDNode *SelectionDAG::getTargetNode(unsigned Opcode, 4129 const std::vector<MVT> &ResultTys, 4130 const SDValue *Ops, unsigned NumOps) { 4131 const MVT *VTs = getNodeValueTypes(ResultTys); 4132 return getNode(~Opcode, VTs, ResultTys.size(), 4133 Ops, NumOps).Val; 4134} 4135 4136/// getNodeIfExists - Get the specified node if it's already available, or 4137/// else return NULL. 4138SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 4139 const SDValue *Ops, unsigned NumOps) { 4140 if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) { 4141 FoldingSetNodeID ID; 4142 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4143 void *IP = 0; 4144 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4145 return E; 4146 } 4147 return NULL; 4148} 4149 4150 4151/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4152/// This can cause recursive merging of nodes in the DAG. 4153/// 4154/// This version assumes From has a single result value. 4155/// 4156void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 4157 DAGUpdateListener *UpdateListener) { 4158 SDNode *From = FromN.Val; 4159 assert(From->getNumValues() == 1 && FromN.ResNo == 0 && 4160 "Cannot replace with this method!"); 4161 assert(From != To.Val && "Cannot replace uses of with self"); 4162 4163 while (!From->use_empty()) { 4164 SDNode::use_iterator UI = From->use_begin(); 4165 SDNode *U = *UI; 4166 4167 // This node is about to morph, remove its old self from the CSE maps. 4168 RemoveNodeFromCSEMaps(U); 4169 int operandNum = 0; 4170 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4171 I != E; ++I, ++operandNum) 4172 if (I->getVal() == From) { 4173 From->removeUser(operandNum, U); 4174 *I = To; 4175 I->setUser(U); 4176 To.Val->addUser(operandNum, U); 4177 } 4178 4179 // Now that we have modified U, add it back to the CSE maps. If it already 4180 // exists there, recursively merge the results together. 4181 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4182 ReplaceAllUsesWith(U, Existing, UpdateListener); 4183 // U is now dead. Inform the listener if it exists and delete it. 4184 if (UpdateListener) 4185 UpdateListener->NodeDeleted(U, Existing); 4186 DeleteNodeNotInCSEMaps(U); 4187 } else { 4188 // If the node doesn't already exist, we updated it. Inform a listener if 4189 // it exists. 4190 if (UpdateListener) 4191 UpdateListener->NodeUpdated(U); 4192 } 4193 } 4194} 4195 4196/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4197/// This can cause recursive merging of nodes in the DAG. 4198/// 4199/// This version assumes From/To have matching types and numbers of result 4200/// values. 4201/// 4202void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 4203 DAGUpdateListener *UpdateListener) { 4204 assert(From->getVTList().VTs == To->getVTList().VTs && 4205 From->getNumValues() == To->getNumValues() && 4206 "Cannot use this version of ReplaceAllUsesWith!"); 4207 4208 // Handle the trivial case. 4209 if (From == To) 4210 return; 4211 4212 while (!From->use_empty()) { 4213 SDNode::use_iterator UI = From->use_begin(); 4214 SDNode *U = *UI; 4215 4216 // This node is about to morph, remove its old self from the CSE maps. 4217 RemoveNodeFromCSEMaps(U); 4218 int operandNum = 0; 4219 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4220 I != E; ++I, ++operandNum) 4221 if (I->getVal() == From) { 4222 From->removeUser(operandNum, U); 4223 I->getVal() = To; 4224 To->addUser(operandNum, U); 4225 } 4226 4227 // Now that we have modified U, add it back to the CSE maps. If it already 4228 // exists there, recursively merge the results together. 4229 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4230 ReplaceAllUsesWith(U, Existing, UpdateListener); 4231 // U is now dead. Inform the listener if it exists and delete it. 4232 if (UpdateListener) 4233 UpdateListener->NodeDeleted(U, Existing); 4234 DeleteNodeNotInCSEMaps(U); 4235 } else { 4236 // If the node doesn't already exist, we updated it. Inform a listener if 4237 // it exists. 4238 if (UpdateListener) 4239 UpdateListener->NodeUpdated(U); 4240 } 4241 } 4242} 4243 4244/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 4245/// This can cause recursive merging of nodes in the DAG. 4246/// 4247/// This version can replace From with any result values. To must match the 4248/// number and types of values returned by From. 4249void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 4250 const SDValue *To, 4251 DAGUpdateListener *UpdateListener) { 4252 if (From->getNumValues() == 1) // Handle the simple case efficiently. 4253 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 4254 4255 while (!From->use_empty()) { 4256 SDNode::use_iterator UI = From->use_begin(); 4257 SDNode *U = *UI; 4258 4259 // This node is about to morph, remove its old self from the CSE maps. 4260 RemoveNodeFromCSEMaps(U); 4261 int operandNum = 0; 4262 for (SDNode::op_iterator I = U->op_begin(), E = U->op_end(); 4263 I != E; ++I, ++operandNum) 4264 if (I->getVal() == From) { 4265 const SDValue &ToOp = To[I->getSDValue().ResNo]; 4266 From->removeUser(operandNum, U); 4267 *I = ToOp; 4268 I->setUser(U); 4269 ToOp.Val->addUser(operandNum, U); 4270 } 4271 4272 // Now that we have modified U, add it back to the CSE maps. If it already 4273 // exists there, recursively merge the results together. 4274 if (SDNode *Existing = AddNonLeafNodeToCSEMaps(U)) { 4275 ReplaceAllUsesWith(U, Existing, UpdateListener); 4276 // U is now dead. Inform the listener if it exists and delete it. 4277 if (UpdateListener) 4278 UpdateListener->NodeDeleted(U, Existing); 4279 DeleteNodeNotInCSEMaps(U); 4280 } else { 4281 // If the node doesn't already exist, we updated it. Inform a listener if 4282 // it exists. 4283 if (UpdateListener) 4284 UpdateListener->NodeUpdated(U); 4285 } 4286 } 4287} 4288 4289/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 4290/// uses of other values produced by From.Val alone. The Deleted vector is 4291/// handled the same way as for ReplaceAllUsesWith. 4292void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 4293 DAGUpdateListener *UpdateListener){ 4294 // Handle the really simple, really trivial case efficiently. 4295 if (From == To) return; 4296 4297 // Handle the simple, trivial, case efficiently. 4298 if (From.Val->getNumValues() == 1) { 4299 ReplaceAllUsesWith(From, To, UpdateListener); 4300 return; 4301 } 4302 4303 // Get all of the users of From.Val. We want these in a nice, 4304 // deterministically ordered and uniqued set, so we use a SmallSetVector. 4305 SmallSetVector<SDNode*, 16> Users(From.Val->use_begin(), From.Val->use_end()); 4306 4307 while (!Users.empty()) { 4308 // We know that this user uses some value of From. If it is the right 4309 // value, update it. 4310 SDNode *User = Users.back(); 4311 Users.pop_back(); 4312 4313 // Scan for an operand that matches From. 4314 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4315 for (; Op != E; ++Op) 4316 if (*Op == From) break; 4317 4318 // If there are no matches, the user must use some other result of From. 4319 if (Op == E) continue; 4320 4321 // Okay, we know this user needs to be updated. Remove its old self 4322 // from the CSE maps. 4323 RemoveNodeFromCSEMaps(User); 4324 4325 // Update all operands that match "From" in case there are multiple uses. 4326 for (; Op != E; ++Op) { 4327 if (*Op == From) { 4328 From.Val->removeUser(Op-User->op_begin(), User); 4329 *Op = To; 4330 Op->setUser(User); 4331 To.Val->addUser(Op-User->op_begin(), User); 4332 } 4333 } 4334 4335 // Now that we have modified User, add it back to the CSE maps. If it 4336 // already exists there, recursively merge the results together. 4337 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4338 if (!Existing) { 4339 if (UpdateListener) UpdateListener->NodeUpdated(User); 4340 continue; // Continue on to next user. 4341 } 4342 4343 // If there was already an existing matching node, use ReplaceAllUsesWith 4344 // to replace the dead one with the existing one. This can cause 4345 // recursive merging of other unrelated nodes down the line. 4346 ReplaceAllUsesWith(User, Existing, UpdateListener); 4347 4348 // User is now dead. Notify a listener if present. 4349 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4350 DeleteNodeNotInCSEMaps(User); 4351 } 4352} 4353 4354/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 4355/// uses of other values produced by From.Val alone. The same value may 4356/// appear in both the From and To list. The Deleted vector is 4357/// handled the same way as for ReplaceAllUsesWith. 4358void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 4359 const SDValue *To, 4360 unsigned Num, 4361 DAGUpdateListener *UpdateListener){ 4362 // Handle the simple, trivial case efficiently. 4363 if (Num == 1) 4364 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 4365 4366 SmallVector<std::pair<SDNode *, unsigned>, 16> Users; 4367 for (unsigned i = 0; i != Num; ++i) 4368 for (SDNode::use_iterator UI = From[i].Val->use_begin(), 4369 E = From[i].Val->use_end(); UI != E; ++UI) 4370 Users.push_back(std::make_pair(*UI, i)); 4371 4372 while (!Users.empty()) { 4373 // We know that this user uses some value of From. If it is the right 4374 // value, update it. 4375 SDNode *User = Users.back().first; 4376 unsigned i = Users.back().second; 4377 Users.pop_back(); 4378 4379 // Scan for an operand that matches From. 4380 SDNode::op_iterator Op = User->op_begin(), E = User->op_end(); 4381 for (; Op != E; ++Op) 4382 if (*Op == From[i]) break; 4383 4384 // If there are no matches, the user must use some other result of From. 4385 if (Op == E) continue; 4386 4387 // Okay, we know this user needs to be updated. Remove its old self 4388 // from the CSE maps. 4389 RemoveNodeFromCSEMaps(User); 4390 4391 // Update all operands that match "From" in case there are multiple uses. 4392 for (; Op != E; ++Op) { 4393 if (*Op == From[i]) { 4394 From[i].Val->removeUser(Op-User->op_begin(), User); 4395 *Op = To[i]; 4396 Op->setUser(User); 4397 To[i].Val->addUser(Op-User->op_begin(), User); 4398 } 4399 } 4400 4401 // Now that we have modified User, add it back to the CSE maps. If it 4402 // already exists there, recursively merge the results together. 4403 SDNode *Existing = AddNonLeafNodeToCSEMaps(User); 4404 if (!Existing) { 4405 if (UpdateListener) UpdateListener->NodeUpdated(User); 4406 continue; // Continue on to next user. 4407 } 4408 4409 // If there was already an existing matching node, use ReplaceAllUsesWith 4410 // to replace the dead one with the existing one. This can cause 4411 // recursive merging of other unrelated nodes down the line. 4412 ReplaceAllUsesWith(User, Existing, UpdateListener); 4413 4414 // User is now dead. Notify a listener if present. 4415 if (UpdateListener) UpdateListener->NodeDeleted(User, Existing); 4416 DeleteNodeNotInCSEMaps(User); 4417 } 4418} 4419 4420/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 4421/// based on their topological order. It returns the maximum id and a vector 4422/// of the SDNodes* in assigned order by reference. 4423unsigned SelectionDAG::AssignTopologicalOrder(std::vector<SDNode*> &TopOrder) { 4424 unsigned DAGSize = AllNodes.size(); 4425 std::vector<unsigned> InDegree(DAGSize); 4426 std::vector<SDNode*> Sources; 4427 4428 // Use a two pass approach to avoid using a std::map which is slow. 4429 unsigned Id = 0; 4430 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I){ 4431 SDNode *N = I; 4432 N->setNodeId(Id++); 4433 unsigned Degree = N->use_size(); 4434 InDegree[N->getNodeId()] = Degree; 4435 if (Degree == 0) 4436 Sources.push_back(N); 4437 } 4438 4439 TopOrder.clear(); 4440 TopOrder.reserve(DAGSize); 4441 while (!Sources.empty()) { 4442 SDNode *N = Sources.back(); 4443 Sources.pop_back(); 4444 TopOrder.push_back(N); 4445 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) { 4446 SDNode *P = I->getVal(); 4447 unsigned Degree = --InDegree[P->getNodeId()]; 4448 if (Degree == 0) 4449 Sources.push_back(P); 4450 } 4451 } 4452 4453 // Second pass, assign the actual topological order as node ids. 4454 Id = 0; 4455 for (std::vector<SDNode*>::iterator TI = TopOrder.begin(),TE = TopOrder.end(); 4456 TI != TE; ++TI) 4457 (*TI)->setNodeId(Id++); 4458 4459 return Id; 4460} 4461 4462 4463 4464//===----------------------------------------------------------------------===// 4465// SDNode Class 4466//===----------------------------------------------------------------------===// 4467 4468// Out-of-line virtual method to give class a home. 4469void SDNode::ANCHOR() {} 4470void UnarySDNode::ANCHOR() {} 4471void BinarySDNode::ANCHOR() {} 4472void TernarySDNode::ANCHOR() {} 4473void HandleSDNode::ANCHOR() {} 4474void ConstantSDNode::ANCHOR() {} 4475void ConstantFPSDNode::ANCHOR() {} 4476void GlobalAddressSDNode::ANCHOR() {} 4477void FrameIndexSDNode::ANCHOR() {} 4478void JumpTableSDNode::ANCHOR() {} 4479void ConstantPoolSDNode::ANCHOR() {} 4480void BasicBlockSDNode::ANCHOR() {} 4481void SrcValueSDNode::ANCHOR() {} 4482void MemOperandSDNode::ANCHOR() {} 4483void RegisterSDNode::ANCHOR() {} 4484void DbgStopPointSDNode::ANCHOR() {} 4485void LabelSDNode::ANCHOR() {} 4486void ExternalSymbolSDNode::ANCHOR() {} 4487void CondCodeSDNode::ANCHOR() {} 4488void ARG_FLAGSSDNode::ANCHOR() {} 4489void VTSDNode::ANCHOR() {} 4490void MemSDNode::ANCHOR() {} 4491void LoadSDNode::ANCHOR() {} 4492void StoreSDNode::ANCHOR() {} 4493void AtomicSDNode::ANCHOR() {} 4494 4495HandleSDNode::~HandleSDNode() { 4496 DropOperands(); 4497} 4498 4499GlobalAddressSDNode::GlobalAddressSDNode(bool isTarget, const GlobalValue *GA, 4500 MVT VT, int o) 4501 : SDNode(isa<GlobalVariable>(GA) && 4502 cast<GlobalVariable>(GA)->isThreadLocal() ? 4503 // Thread Local 4504 (isTarget ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress) : 4505 // Non Thread Local 4506 (isTarget ? ISD::TargetGlobalAddress : ISD::GlobalAddress), 4507 getSDVTList(VT)), Offset(o) { 4508 TheGlobal = const_cast<GlobalValue*>(GA); 4509} 4510 4511MemSDNode::MemSDNode(unsigned Opc, SDVTList VTs, MVT memvt, 4512 const Value *srcValue, int SVO, 4513 unsigned alignment, bool vol) 4514 : SDNode(Opc, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO), 4515 Flags(encodeMemSDNodeFlags(vol, alignment)) { 4516 4517 assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!"); 4518 assert(getAlignment() == alignment && "Alignment representation error!"); 4519 assert(isVolatile() == vol && "Volatile representation error!"); 4520} 4521 4522/// getMemOperand - Return a MachineMemOperand object describing the memory 4523/// reference performed by this memory reference. 4524MachineMemOperand MemSDNode::getMemOperand() const { 4525 int Flags; 4526 if (isa<LoadSDNode>(this)) 4527 Flags = MachineMemOperand::MOLoad; 4528 else if (isa<StoreSDNode>(this)) 4529 Flags = MachineMemOperand::MOStore; 4530 else { 4531 assert(isa<AtomicSDNode>(this) && "Unknown MemSDNode opcode!"); 4532 Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 4533 } 4534 4535 int Size = (getMemoryVT().getSizeInBits() + 7) >> 3; 4536 if (isVolatile()) Flags |= MachineMemOperand::MOVolatile; 4537 4538 // Check if the memory reference references a frame index 4539 const FrameIndexSDNode *FI = 4540 dyn_cast<const FrameIndexSDNode>(getBasePtr().Val); 4541 if (!getSrcValue() && FI) 4542 return MachineMemOperand(PseudoSourceValue::getFixedStack(FI->getIndex()), 4543 Flags, 0, Size, getAlignment()); 4544 else 4545 return MachineMemOperand(getSrcValue(), Flags, getSrcValueOffset(), 4546 Size, getAlignment()); 4547} 4548 4549/// Profile - Gather unique data for the node. 4550/// 4551void SDNode::Profile(FoldingSetNodeID &ID) const { 4552 AddNodeIDNode(ID, this); 4553} 4554 4555/// getValueTypeList - Return a pointer to the specified value type. 4556/// 4557const MVT *SDNode::getValueTypeList(MVT VT) { 4558 if (VT.isExtended()) { 4559 static std::set<MVT, MVT::compareRawBits> EVTs; 4560 return &(*EVTs.insert(VT).first); 4561 } else { 4562 static MVT VTs[MVT::LAST_VALUETYPE]; 4563 VTs[VT.getSimpleVT()] = VT; 4564 return &VTs[VT.getSimpleVT()]; 4565 } 4566} 4567 4568/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 4569/// indicated value. This method ignores uses of other values defined by this 4570/// operation. 4571bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 4572 assert(Value < getNumValues() && "Bad value!"); 4573 4574 // TODO: Only iterate over uses of a given value of the node 4575 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 4576 if (UI.getUse().getSDValue().ResNo == Value) { 4577 if (NUses == 0) 4578 return false; 4579 --NUses; 4580 } 4581 } 4582 4583 // Found exactly the right number of uses? 4584 return NUses == 0; 4585} 4586 4587 4588/// hasAnyUseOfValue - Return true if there are any use of the indicated 4589/// value. This method ignores uses of other values defined by this operation. 4590bool SDNode::hasAnyUseOfValue(unsigned Value) const { 4591 assert(Value < getNumValues() && "Bad value!"); 4592 4593 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 4594 if (UI.getUse().getSDValue().ResNo == Value) 4595 return true; 4596 4597 return false; 4598} 4599 4600 4601/// isOnlyUserOf - Return true if this node is the only use of N. 4602/// 4603bool SDNode::isOnlyUserOf(SDNode *N) const { 4604 bool Seen = false; 4605 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 4606 SDNode *User = *I; 4607 if (User == this) 4608 Seen = true; 4609 else 4610 return false; 4611 } 4612 4613 return Seen; 4614} 4615 4616/// isOperand - Return true if this node is an operand of N. 4617/// 4618bool SDValue::isOperandOf(SDNode *N) const { 4619 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 4620 if (*this == N->getOperand(i)) 4621 return true; 4622 return false; 4623} 4624 4625bool SDNode::isOperandOf(SDNode *N) const { 4626 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 4627 if (this == N->OperandList[i].getVal()) 4628 return true; 4629 return false; 4630} 4631 4632/// reachesChainWithoutSideEffects - Return true if this operand (which must 4633/// be a chain) reaches the specified operand without crossing any 4634/// side-effecting instructions. In practice, this looks through token 4635/// factors and non-volatile loads. In order to remain efficient, this only 4636/// looks a couple of nodes in, it does not do an exhaustive search. 4637bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 4638 unsigned Depth) const { 4639 if (*this == Dest) return true; 4640 4641 // Don't search too deeply, we just want to be able to see through 4642 // TokenFactor's etc. 4643 if (Depth == 0) return false; 4644 4645 // If this is a token factor, all inputs to the TF happen in parallel. If any 4646 // of the operands of the TF reach dest, then we can do the xform. 4647 if (getOpcode() == ISD::TokenFactor) { 4648 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 4649 if (getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 4650 return true; 4651 return false; 4652 } 4653 4654 // Loads don't have side effects, look through them. 4655 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 4656 if (!Ld->isVolatile()) 4657 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 4658 } 4659 return false; 4660} 4661 4662 4663static void findPredecessor(SDNode *N, const SDNode *P, bool &found, 4664 SmallPtrSet<SDNode *, 32> &Visited) { 4665 if (found || !Visited.insert(N)) 4666 return; 4667 4668 for (unsigned i = 0, e = N->getNumOperands(); !found && i != e; ++i) { 4669 SDNode *Op = N->getOperand(i).Val; 4670 if (Op == P) { 4671 found = true; 4672 return; 4673 } 4674 findPredecessor(Op, P, found, Visited); 4675 } 4676} 4677 4678/// isPredecessorOf - Return true if this node is a predecessor of N. This node 4679/// is either an operand of N or it can be reached by recursively traversing 4680/// up the operands. 4681/// NOTE: this is an expensive method. Use it carefully. 4682bool SDNode::isPredecessorOf(SDNode *N) const { 4683 SmallPtrSet<SDNode *, 32> Visited; 4684 bool found = false; 4685 findPredecessor(N, this, found, Visited); 4686 return found; 4687} 4688 4689uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 4690 assert(Num < NumOperands && "Invalid child # of SDNode!"); 4691 return cast<ConstantSDNode>(OperandList[Num])->getValue(); 4692} 4693 4694std::string SDNode::getOperationName(const SelectionDAG *G) const { 4695 switch (getOpcode()) { 4696 default: 4697 if (getOpcode() < ISD::BUILTIN_OP_END) 4698 return "<<Unknown DAG Node>>"; 4699 if (isMachineOpcode()) { 4700 if (G) 4701 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 4702 if (getMachineOpcode() < TII->getNumOpcodes()) 4703 return TII->get(getMachineOpcode()).getName(); 4704 return "<<Unknown Machine Node>>"; 4705 } 4706 if (G) { 4707 TargetLowering &TLI = G->getTargetLoweringInfo(); 4708 const char *Name = TLI.getTargetNodeName(getOpcode()); 4709 if (Name) return Name; 4710 return "<<Unknown Target Node>>"; 4711 } 4712 return "<<Unknown Node>>"; 4713 4714#ifndef NDEBUG 4715 case ISD::DELETED_NODE: 4716 return "<<Deleted Node!>>"; 4717#endif 4718 case ISD::PREFETCH: return "Prefetch"; 4719 case ISD::MEMBARRIER: return "MemBarrier"; 4720 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 4721 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 4722 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 4723 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 4724 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 4725 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 4726 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 4727 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 4728 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 4729 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 4730 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 4731 case ISD::ATOMIC_SWAP: return "AtomicSWAP"; 4732 case ISD::PCMARKER: return "PCMarker"; 4733 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 4734 case ISD::SRCVALUE: return "SrcValue"; 4735 case ISD::MEMOPERAND: return "MemOperand"; 4736 case ISD::EntryToken: return "EntryToken"; 4737 case ISD::TokenFactor: return "TokenFactor"; 4738 case ISD::AssertSext: return "AssertSext"; 4739 case ISD::AssertZext: return "AssertZext"; 4740 4741 case ISD::BasicBlock: return "BasicBlock"; 4742 case ISD::ARG_FLAGS: return "ArgFlags"; 4743 case ISD::VALUETYPE: return "ValueType"; 4744 case ISD::Register: return "Register"; 4745 4746 case ISD::Constant: return "Constant"; 4747 case ISD::ConstantFP: return "ConstantFP"; 4748 case ISD::GlobalAddress: return "GlobalAddress"; 4749 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 4750 case ISD::FrameIndex: return "FrameIndex"; 4751 case ISD::JumpTable: return "JumpTable"; 4752 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 4753 case ISD::RETURNADDR: return "RETURNADDR"; 4754 case ISD::FRAMEADDR: return "FRAMEADDR"; 4755 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 4756 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 4757 case ISD::EHSELECTION: return "EHSELECTION"; 4758 case ISD::EH_RETURN: return "EH_RETURN"; 4759 case ISD::ConstantPool: return "ConstantPool"; 4760 case ISD::ExternalSymbol: return "ExternalSymbol"; 4761 case ISD::INTRINSIC_WO_CHAIN: { 4762 unsigned IID = cast<ConstantSDNode>(getOperand(0))->getValue(); 4763 return Intrinsic::getName((Intrinsic::ID)IID); 4764 } 4765 case ISD::INTRINSIC_VOID: 4766 case ISD::INTRINSIC_W_CHAIN: { 4767 unsigned IID = cast<ConstantSDNode>(getOperand(1))->getValue(); 4768 return Intrinsic::getName((Intrinsic::ID)IID); 4769 } 4770 4771 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 4772 case ISD::TargetConstant: return "TargetConstant"; 4773 case ISD::TargetConstantFP:return "TargetConstantFP"; 4774 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 4775 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 4776 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 4777 case ISD::TargetJumpTable: return "TargetJumpTable"; 4778 case ISD::TargetConstantPool: return "TargetConstantPool"; 4779 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 4780 4781 case ISD::CopyToReg: return "CopyToReg"; 4782 case ISD::CopyFromReg: return "CopyFromReg"; 4783 case ISD::UNDEF: return "undef"; 4784 case ISD::MERGE_VALUES: return "merge_values"; 4785 case ISD::INLINEASM: return "inlineasm"; 4786 case ISD::DBG_LABEL: return "dbg_label"; 4787 case ISD::EH_LABEL: return "eh_label"; 4788 case ISD::DECLARE: return "declare"; 4789 case ISD::HANDLENODE: return "handlenode"; 4790 case ISD::FORMAL_ARGUMENTS: return "formal_arguments"; 4791 case ISD::CALL: return "call"; 4792 4793 // Unary operators 4794 case ISD::FABS: return "fabs"; 4795 case ISD::FNEG: return "fneg"; 4796 case ISD::FSQRT: return "fsqrt"; 4797 case ISD::FSIN: return "fsin"; 4798 case ISD::FCOS: return "fcos"; 4799 case ISD::FPOWI: return "fpowi"; 4800 case ISD::FPOW: return "fpow"; 4801 case ISD::FTRUNC: return "ftrunc"; 4802 case ISD::FFLOOR: return "ffloor"; 4803 case ISD::FCEIL: return "fceil"; 4804 case ISD::FRINT: return "frint"; 4805 case ISD::FNEARBYINT: return "fnearbyint"; 4806 4807 // Binary operators 4808 case ISD::ADD: return "add"; 4809 case ISD::SUB: return "sub"; 4810 case ISD::MUL: return "mul"; 4811 case ISD::MULHU: return "mulhu"; 4812 case ISD::MULHS: return "mulhs"; 4813 case ISD::SDIV: return "sdiv"; 4814 case ISD::UDIV: return "udiv"; 4815 case ISD::SREM: return "srem"; 4816 case ISD::UREM: return "urem"; 4817 case ISD::SMUL_LOHI: return "smul_lohi"; 4818 case ISD::UMUL_LOHI: return "umul_lohi"; 4819 case ISD::SDIVREM: return "sdivrem"; 4820 case ISD::UDIVREM: return "divrem"; 4821 case ISD::AND: return "and"; 4822 case ISD::OR: return "or"; 4823 case ISD::XOR: return "xor"; 4824 case ISD::SHL: return "shl"; 4825 case ISD::SRA: return "sra"; 4826 case ISD::SRL: return "srl"; 4827 case ISD::ROTL: return "rotl"; 4828 case ISD::ROTR: return "rotr"; 4829 case ISD::FADD: return "fadd"; 4830 case ISD::FSUB: return "fsub"; 4831 case ISD::FMUL: return "fmul"; 4832 case ISD::FDIV: return "fdiv"; 4833 case ISD::FREM: return "frem"; 4834 case ISD::FCOPYSIGN: return "fcopysign"; 4835 case ISD::FGETSIGN: return "fgetsign"; 4836 4837 case ISD::SETCC: return "setcc"; 4838 case ISD::VSETCC: return "vsetcc"; 4839 case ISD::SELECT: return "select"; 4840 case ISD::SELECT_CC: return "select_cc"; 4841 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 4842 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 4843 case ISD::CONCAT_VECTORS: return "concat_vectors"; 4844 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 4845 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 4846 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 4847 case ISD::CARRY_FALSE: return "carry_false"; 4848 case ISD::ADDC: return "addc"; 4849 case ISD::ADDE: return "adde"; 4850 case ISD::SUBC: return "subc"; 4851 case ISD::SUBE: return "sube"; 4852 case ISD::SHL_PARTS: return "shl_parts"; 4853 case ISD::SRA_PARTS: return "sra_parts"; 4854 case ISD::SRL_PARTS: return "srl_parts"; 4855 4856 case ISD::EXTRACT_SUBREG: return "extract_subreg"; 4857 case ISD::INSERT_SUBREG: return "insert_subreg"; 4858 4859 // Conversion operators. 4860 case ISD::SIGN_EXTEND: return "sign_extend"; 4861 case ISD::ZERO_EXTEND: return "zero_extend"; 4862 case ISD::ANY_EXTEND: return "any_extend"; 4863 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 4864 case ISD::TRUNCATE: return "truncate"; 4865 case ISD::FP_ROUND: return "fp_round"; 4866 case ISD::FLT_ROUNDS_: return "flt_rounds"; 4867 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 4868 case ISD::FP_EXTEND: return "fp_extend"; 4869 4870 case ISD::SINT_TO_FP: return "sint_to_fp"; 4871 case ISD::UINT_TO_FP: return "uint_to_fp"; 4872 case ISD::FP_TO_SINT: return "fp_to_sint"; 4873 case ISD::FP_TO_UINT: return "fp_to_uint"; 4874 case ISD::BIT_CONVERT: return "bit_convert"; 4875 4876 // Control flow instructions 4877 case ISD::BR: return "br"; 4878 case ISD::BRIND: return "brind"; 4879 case ISD::BR_JT: return "br_jt"; 4880 case ISD::BRCOND: return "brcond"; 4881 case ISD::BR_CC: return "br_cc"; 4882 case ISD::RET: return "ret"; 4883 case ISD::CALLSEQ_START: return "callseq_start"; 4884 case ISD::CALLSEQ_END: return "callseq_end"; 4885 4886 // Other operators 4887 case ISD::LOAD: return "load"; 4888 case ISD::STORE: return "store"; 4889 case ISD::VAARG: return "vaarg"; 4890 case ISD::VACOPY: return "vacopy"; 4891 case ISD::VAEND: return "vaend"; 4892 case ISD::VASTART: return "vastart"; 4893 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 4894 case ISD::EXTRACT_ELEMENT: return "extract_element"; 4895 case ISD::BUILD_PAIR: return "build_pair"; 4896 case ISD::STACKSAVE: return "stacksave"; 4897 case ISD::STACKRESTORE: return "stackrestore"; 4898 case ISD::TRAP: return "trap"; 4899 4900 // Bit manipulation 4901 case ISD::BSWAP: return "bswap"; 4902 case ISD::CTPOP: return "ctpop"; 4903 case ISD::CTTZ: return "cttz"; 4904 case ISD::CTLZ: return "ctlz"; 4905 4906 // Debug info 4907 case ISD::DBG_STOPPOINT: return "dbg_stoppoint"; 4908 case ISD::DEBUG_LOC: return "debug_loc"; 4909 4910 // Trampolines 4911 case ISD::TRAMPOLINE: return "trampoline"; 4912 4913 case ISD::CONDCODE: 4914 switch (cast<CondCodeSDNode>(this)->get()) { 4915 default: assert(0 && "Unknown setcc condition!"); 4916 case ISD::SETOEQ: return "setoeq"; 4917 case ISD::SETOGT: return "setogt"; 4918 case ISD::SETOGE: return "setoge"; 4919 case ISD::SETOLT: return "setolt"; 4920 case ISD::SETOLE: return "setole"; 4921 case ISD::SETONE: return "setone"; 4922 4923 case ISD::SETO: return "seto"; 4924 case ISD::SETUO: return "setuo"; 4925 case ISD::SETUEQ: return "setue"; 4926 case ISD::SETUGT: return "setugt"; 4927 case ISD::SETUGE: return "setuge"; 4928 case ISD::SETULT: return "setult"; 4929 case ISD::SETULE: return "setule"; 4930 case ISD::SETUNE: return "setune"; 4931 4932 case ISD::SETEQ: return "seteq"; 4933 case ISD::SETGT: return "setgt"; 4934 case ISD::SETGE: return "setge"; 4935 case ISD::SETLT: return "setlt"; 4936 case ISD::SETLE: return "setle"; 4937 case ISD::SETNE: return "setne"; 4938 } 4939 } 4940} 4941 4942const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 4943 switch (AM) { 4944 default: 4945 return ""; 4946 case ISD::PRE_INC: 4947 return "<pre-inc>"; 4948 case ISD::PRE_DEC: 4949 return "<pre-dec>"; 4950 case ISD::POST_INC: 4951 return "<post-inc>"; 4952 case ISD::POST_DEC: 4953 return "<post-dec>"; 4954 } 4955} 4956 4957std::string ISD::ArgFlagsTy::getArgFlagsString() { 4958 std::string S = "< "; 4959 4960 if (isZExt()) 4961 S += "zext "; 4962 if (isSExt()) 4963 S += "sext "; 4964 if (isInReg()) 4965 S += "inreg "; 4966 if (isSRet()) 4967 S += "sret "; 4968 if (isByVal()) 4969 S += "byval "; 4970 if (isNest()) 4971 S += "nest "; 4972 if (getByValAlign()) 4973 S += "byval-align:" + utostr(getByValAlign()) + " "; 4974 if (getOrigAlign()) 4975 S += "orig-align:" + utostr(getOrigAlign()) + " "; 4976 if (getByValSize()) 4977 S += "byval-size:" + utostr(getByValSize()) + " "; 4978 return S + ">"; 4979} 4980 4981void SDNode::dump() const { dump(0); } 4982void SDNode::dump(const SelectionDAG *G) const { 4983 cerr << (void*)this << ": "; 4984 4985 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 4986 if (i) cerr << ","; 4987 if (getValueType(i) == MVT::Other) 4988 cerr << "ch"; 4989 else 4990 cerr << getValueType(i).getMVTString(); 4991 } 4992 cerr << " = " << getOperationName(G); 4993 4994 cerr << " "; 4995 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 4996 if (i) cerr << ", "; 4997 cerr << (void*)getOperand(i).Val; 4998 if (unsigned RN = getOperand(i).ResNo) 4999 cerr << ":" << RN; 5000 } 5001 5002 if (!isTargetOpcode() && getOpcode() == ISD::VECTOR_SHUFFLE) { 5003 SDNode *Mask = getOperand(2).Val; 5004 cerr << "<"; 5005 for (unsigned i = 0, e = Mask->getNumOperands(); i != e; ++i) { 5006 if (i) cerr << ","; 5007 if (Mask->getOperand(i).getOpcode() == ISD::UNDEF) 5008 cerr << "u"; 5009 else 5010 cerr << cast<ConstantSDNode>(Mask->getOperand(i))->getValue(); 5011 } 5012 cerr << ">"; 5013 } 5014 5015 if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 5016 cerr << '<' << CSDN->getAPIntValue() << '>'; 5017 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 5018 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 5019 cerr << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 5020 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 5021 cerr << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 5022 else { 5023 cerr << "<APFloat("; 5024 CSDN->getValueAPF().convertToAPInt().dump(); 5025 cerr << ")>"; 5026 } 5027 } else if (const GlobalAddressSDNode *GADN = 5028 dyn_cast<GlobalAddressSDNode>(this)) { 5029 int offset = GADN->getOffset(); 5030 cerr << '<'; 5031 WriteAsOperand(*cerr.stream(), GADN->getGlobal()); 5032 cerr << '>'; 5033 if (offset > 0) 5034 cerr << " + " << offset; 5035 else 5036 cerr << " " << offset; 5037 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 5038 cerr << "<" << FIDN->getIndex() << ">"; 5039 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 5040 cerr << "<" << JTDN->getIndex() << ">"; 5041 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 5042 int offset = CP->getOffset(); 5043 if (CP->isMachineConstantPoolEntry()) 5044 cerr << "<" << *CP->getMachineCPVal() << ">"; 5045 else 5046 cerr << "<" << *CP->getConstVal() << ">"; 5047 if (offset > 0) 5048 cerr << " + " << offset; 5049 else 5050 cerr << " " << offset; 5051 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 5052 cerr << "<"; 5053 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 5054 if (LBB) 5055 cerr << LBB->getName() << " "; 5056 cerr << (const void*)BBDN->getBasicBlock() << ">"; 5057 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 5058 if (G && R->getReg() && 5059 TargetRegisterInfo::isPhysicalRegister(R->getReg())) { 5060 cerr << " " << G->getTarget().getRegisterInfo()->getName(R->getReg()); 5061 } else { 5062 cerr << " #" << R->getReg(); 5063 } 5064 } else if (const ExternalSymbolSDNode *ES = 5065 dyn_cast<ExternalSymbolSDNode>(this)) { 5066 cerr << "'" << ES->getSymbol() << "'"; 5067 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 5068 if (M->getValue()) 5069 cerr << "<" << M->getValue() << ">"; 5070 else 5071 cerr << "<null>"; 5072 } else if (const MemOperandSDNode *M = dyn_cast<MemOperandSDNode>(this)) { 5073 if (M->MO.getValue()) 5074 cerr << "<" << M->MO.getValue() << ":" << M->MO.getOffset() << ">"; 5075 else 5076 cerr << "<null:" << M->MO.getOffset() << ">"; 5077 } else if (const ARG_FLAGSSDNode *N = dyn_cast<ARG_FLAGSSDNode>(this)) { 5078 cerr << N->getArgFlags().getArgFlagsString(); 5079 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 5080 cerr << ":" << N->getVT().getMVTString(); 5081 } 5082 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 5083 const Value *SrcValue = LD->getSrcValue(); 5084 int SrcOffset = LD->getSrcValueOffset(); 5085 cerr << " <"; 5086 if (SrcValue) 5087 cerr << SrcValue; 5088 else 5089 cerr << "null"; 5090 cerr << ":" << SrcOffset << ">"; 5091 5092 bool doExt = true; 5093 switch (LD->getExtensionType()) { 5094 default: doExt = false; break; 5095 case ISD::EXTLOAD: 5096 cerr << " <anyext "; 5097 break; 5098 case ISD::SEXTLOAD: 5099 cerr << " <sext "; 5100 break; 5101 case ISD::ZEXTLOAD: 5102 cerr << " <zext "; 5103 break; 5104 } 5105 if (doExt) 5106 cerr << LD->getMemoryVT().getMVTString() << ">"; 5107 5108 const char *AM = getIndexedModeName(LD->getAddressingMode()); 5109 if (*AM) 5110 cerr << " " << AM; 5111 if (LD->isVolatile()) 5112 cerr << " <volatile>"; 5113 cerr << " alignment=" << LD->getAlignment(); 5114 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 5115 const Value *SrcValue = ST->getSrcValue(); 5116 int SrcOffset = ST->getSrcValueOffset(); 5117 cerr << " <"; 5118 if (SrcValue) 5119 cerr << SrcValue; 5120 else 5121 cerr << "null"; 5122 cerr << ":" << SrcOffset << ">"; 5123 5124 if (ST->isTruncatingStore()) 5125 cerr << " <trunc " 5126 << ST->getMemoryVT().getMVTString() << ">"; 5127 5128 const char *AM = getIndexedModeName(ST->getAddressingMode()); 5129 if (*AM) 5130 cerr << " " << AM; 5131 if (ST->isVolatile()) 5132 cerr << " <volatile>"; 5133 cerr << " alignment=" << ST->getAlignment(); 5134 } else if (const AtomicSDNode* AT = dyn_cast<AtomicSDNode>(this)) { 5135 const Value *SrcValue = AT->getSrcValue(); 5136 int SrcOffset = AT->getSrcValueOffset(); 5137 cerr << " <"; 5138 if (SrcValue) 5139 cerr << SrcValue; 5140 else 5141 cerr << "null"; 5142 cerr << ":" << SrcOffset << ">"; 5143 if (AT->isVolatile()) 5144 cerr << " <volatile>"; 5145 cerr << " alignment=" << AT->getAlignment(); 5146 } 5147} 5148 5149static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 5150 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5151 if (N->getOperand(i).Val->hasOneUse()) 5152 DumpNodes(N->getOperand(i).Val, indent+2, G); 5153 else 5154 cerr << "\n" << std::string(indent+2, ' ') 5155 << (void*)N->getOperand(i).Val << ": <multiple use>"; 5156 5157 5158 cerr << "\n" << std::string(indent, ' '); 5159 N->dump(G); 5160} 5161 5162void SelectionDAG::dump() const { 5163 cerr << "SelectionDAG has " << AllNodes.size() << " nodes:"; 5164 5165 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 5166 I != E; ++I) { 5167 const SDNode *N = I; 5168 if (!N->hasOneUse() && N != getRoot().Val) 5169 DumpNodes(N, 2, this); 5170 } 5171 5172 if (getRoot().Val) DumpNodes(getRoot().Val, 2, this); 5173 5174 cerr << "\n\n"; 5175} 5176 5177const Type *ConstantPoolSDNode::getType() const { 5178 if (isMachineConstantPoolEntry()) 5179 return Val.MachineCPVal->getType(); 5180 return Val.ConstVal->getType(); 5181} 5182