SelectionDAG.cpp revision f7710af4ba78aa7a0cc9c226f334d8f2b6ab31bf
1//===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This implements the SelectionDAG class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/SelectionDAG.h" 15#include "SDNodeOrdering.h" 16#include "SDNodeDbgValue.h" 17#include "llvm/Constants.h" 18#include "llvm/Analysis/DebugInfo.h" 19#include "llvm/Analysis/ValueTracking.h" 20#include "llvm/Function.h" 21#include "llvm/GlobalAlias.h" 22#include "llvm/GlobalVariable.h" 23#include "llvm/Intrinsics.h" 24#include "llvm/DerivedTypes.h" 25#include "llvm/Assembly/Writer.h" 26#include "llvm/CallingConv.h" 27#include "llvm/CodeGen/MachineBasicBlock.h" 28#include "llvm/CodeGen/MachineConstantPool.h" 29#include "llvm/CodeGen/MachineFrameInfo.h" 30#include "llvm/CodeGen/MachineModuleInfo.h" 31#include "llvm/CodeGen/PseudoSourceValue.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include "llvm/Target/TargetData.h" 34#include "llvm/Target/TargetLowering.h" 35#include "llvm/Target/TargetSelectionDAGInfo.h" 36#include "llvm/Target/TargetOptions.h" 37#include "llvm/Target/TargetInstrInfo.h" 38#include "llvm/Target/TargetIntrinsicInfo.h" 39#include "llvm/Target/TargetMachine.h" 40#include "llvm/Support/CommandLine.h" 41#include "llvm/Support/Debug.h" 42#include "llvm/Support/ErrorHandling.h" 43#include "llvm/Support/ManagedStatic.h" 44#include "llvm/Support/MathExtras.h" 45#include "llvm/Support/raw_ostream.h" 46#include "llvm/Support/Mutex.h" 47#include "llvm/ADT/SetVector.h" 48#include "llvm/ADT/SmallPtrSet.h" 49#include "llvm/ADT/SmallSet.h" 50#include "llvm/ADT/SmallVector.h" 51#include "llvm/ADT/StringExtras.h" 52#include <algorithm> 53#include <cmath> 54using namespace llvm; 55 56/// makeVTList - Return an instance of the SDVTList struct initialized with the 57/// specified members. 58static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 59 SDVTList Res = {VTs, NumVTs}; 60 return Res; 61} 62 63static const fltSemantics *EVTToAPFloatSemantics(EVT VT) { 64 switch (VT.getSimpleVT().SimpleTy) { 65 default: llvm_unreachable("Unknown FP format"); 66 case MVT::f32: return &APFloat::IEEEsingle; 67 case MVT::f64: return &APFloat::IEEEdouble; 68 case MVT::f80: return &APFloat::x87DoubleExtended; 69 case MVT::f128: return &APFloat::IEEEquad; 70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble; 71 } 72} 73 74SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {} 75 76//===----------------------------------------------------------------------===// 77// ConstantFPSDNode Class 78//===----------------------------------------------------------------------===// 79 80/// isExactlyValue - We don't rely on operator== working on double values, as 81/// it returns true for things that are clearly not equal, like -0.0 and 0.0. 82/// As such, this method can be used to do an exact bit-for-bit comparison of 83/// two floating point values. 84bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const { 85 return getValueAPF().bitwiseIsEqual(V); 86} 87 88bool ConstantFPSDNode::isValueValidForType(EVT VT, 89 const APFloat& Val) { 90 assert(VT.isFloatingPoint() && "Can only convert between FP types"); 91 92 // PPC long double cannot be converted to any other type. 93 if (VT == MVT::ppcf128 || 94 &Val.getSemantics() == &APFloat::PPCDoubleDouble) 95 return false; 96 97 // convert modifies in place, so make a copy. 98 APFloat Val2 = APFloat(Val); 99 bool losesInfo; 100 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven, 101 &losesInfo); 102 return !losesInfo; 103} 104 105//===----------------------------------------------------------------------===// 106// ISD Namespace 107//===----------------------------------------------------------------------===// 108 109/// isBuildVectorAllOnes - Return true if the specified node is a 110/// BUILD_VECTOR where all of the elements are ~0 or undef. 111bool ISD::isBuildVectorAllOnes(const SDNode *N) { 112 // Look through a bit convert. 113 if (N->getOpcode() == ISD::BITCAST) 114 N = N->getOperand(0).getNode(); 115 116 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 117 118 unsigned i = 0, e = N->getNumOperands(); 119 120 // Skip over all of the undef values. 121 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 122 ++i; 123 124 // Do not accept an all-undef vector. 125 if (i == e) return false; 126 127 // Do not accept build_vectors that aren't all constants or which have non-~0 128 // elements. 129 SDValue NotZero = N->getOperand(i); 130 if (isa<ConstantSDNode>(NotZero)) { 131 if (!cast<ConstantSDNode>(NotZero)->isAllOnesValue()) 132 return false; 133 } else if (isa<ConstantFPSDNode>(NotZero)) { 134 if (!cast<ConstantFPSDNode>(NotZero)->getValueAPF(). 135 bitcastToAPInt().isAllOnesValue()) 136 return false; 137 } else 138 return false; 139 140 // Okay, we have at least one ~0 value, check to see if the rest match or are 141 // undefs. 142 for (++i; i != e; ++i) 143 if (N->getOperand(i) != NotZero && 144 N->getOperand(i).getOpcode() != ISD::UNDEF) 145 return false; 146 return true; 147} 148 149 150/// isBuildVectorAllZeros - Return true if the specified node is a 151/// BUILD_VECTOR where all of the elements are 0 or undef. 152bool ISD::isBuildVectorAllZeros(const SDNode *N) { 153 // Look through a bit convert. 154 if (N->getOpcode() == ISD::BITCAST) 155 N = N->getOperand(0).getNode(); 156 157 if (N->getOpcode() != ISD::BUILD_VECTOR) return false; 158 159 unsigned i = 0, e = N->getNumOperands(); 160 161 // Skip over all of the undef values. 162 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF) 163 ++i; 164 165 // Do not accept an all-undef vector. 166 if (i == e) return false; 167 168 // Do not accept build_vectors that aren't all constants or which have non-0 169 // elements. 170 SDValue Zero = N->getOperand(i); 171 if (isa<ConstantSDNode>(Zero)) { 172 if (!cast<ConstantSDNode>(Zero)->isNullValue()) 173 return false; 174 } else if (isa<ConstantFPSDNode>(Zero)) { 175 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero()) 176 return false; 177 } else 178 return false; 179 180 // Okay, we have at least one 0 value, check to see if the rest match or are 181 // undefs. 182 for (++i; i != e; ++i) 183 if (N->getOperand(i) != Zero && 184 N->getOperand(i).getOpcode() != ISD::UNDEF) 185 return false; 186 return true; 187} 188 189/// isScalarToVector - Return true if the specified node is a 190/// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 191/// element is not an undef. 192bool ISD::isScalarToVector(const SDNode *N) { 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) 194 return true; 195 196 if (N->getOpcode() != ISD::BUILD_VECTOR) 197 return false; 198 if (N->getOperand(0).getOpcode() == ISD::UNDEF) 199 return false; 200 unsigned NumElems = N->getNumOperands(); 201 if (NumElems == 1) 202 return false; 203 for (unsigned i = 1; i < NumElems; ++i) { 204 SDValue V = N->getOperand(i); 205 if (V.getOpcode() != ISD::UNDEF) 206 return false; 207 } 208 return true; 209} 210 211/// getSetCCSwappedOperands - Return the operation corresponding to (Y op X) 212/// when given the operation for (X op Y). 213ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) { 214 // To perform this operation, we just need to swap the L and G bits of the 215 // operation. 216 unsigned OldL = (Operation >> 2) & 1; 217 unsigned OldG = (Operation >> 1) & 1; 218 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits 219 (OldL << 1) | // New G bit 220 (OldG << 2)); // New L bit. 221} 222 223/// getSetCCInverse - Return the operation corresponding to !(X op Y), where 224/// 'op' is a valid SetCC operation. 225ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { 226 unsigned Operation = Op; 227 if (isInteger) 228 Operation ^= 7; // Flip L, G, E bits, but not U. 229 else 230 Operation ^= 15; // Flip all of the condition bits. 231 232 if (Operation > ISD::SETTRUE2) 233 Operation &= ~8; // Don't let N and U bits get set. 234 235 return ISD::CondCode(Operation); 236} 237 238 239/// isSignedOp - For an integer comparison, return 1 if the comparison is a 240/// signed operation and 2 if the result is an unsigned comparison. Return zero 241/// if the operation does not depend on the sign of the input (setne and seteq). 242static int isSignedOp(ISD::CondCode Opcode) { 243 switch (Opcode) { 244 default: llvm_unreachable("Illegal integer setcc operation!"); 245 case ISD::SETEQ: 246 case ISD::SETNE: return 0; 247 case ISD::SETLT: 248 case ISD::SETLE: 249 case ISD::SETGT: 250 case ISD::SETGE: return 1; 251 case ISD::SETULT: 252 case ISD::SETULE: 253 case ISD::SETUGT: 254 case ISD::SETUGE: return 2; 255 } 256} 257 258/// getSetCCOrOperation - Return the result of a logical OR between different 259/// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function 260/// returns SETCC_INVALID if it is not possible to represent the resultant 261/// comparison. 262ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, 263 bool isInteger) { 264 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 266 return ISD::SETCC_INVALID; 267 268 unsigned Op = Op1 | Op2; // Combine all of the condition bits. 269 270 // If the N and U bits get set then the resultant comparison DOES suddenly 271 // care about orderedness, and is true when ordered. 272 if (Op > ISD::SETTRUE2) 273 Op &= ~16; // Clear the U bit if the N bit is set. 274 275 // Canonicalize illegal integer setcc's. 276 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT 277 Op = ISD::SETNE; 278 279 return ISD::CondCode(Op); 280} 281 282/// getSetCCAndOperation - Return the result of a logical AND between different 283/// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This 284/// function returns zero if it is not possible to represent the resultant 285/// comparison. 286ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, 287 bool isInteger) { 288 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) 289 // Cannot fold a signed setcc with an unsigned setcc. 290 return ISD::SETCC_INVALID; 291 292 // Combine all of the condition bits. 293 ISD::CondCode Result = ISD::CondCode(Op1 & Op2); 294 295 // Canonicalize illegal integer setcc's. 296 if (isInteger) { 297 switch (Result) { 298 default: break; 299 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT 300 case ISD::SETOEQ: // SETEQ & SETU[LG]E 301 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE 302 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE 303 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE 304 } 305 } 306 307 return Result; 308} 309 310//===----------------------------------------------------------------------===// 311// SDNode Profile Support 312//===----------------------------------------------------------------------===// 313 314/// AddNodeIDOpcode - Add the node opcode to the NodeID data. 315/// 316static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) { 317 ID.AddInteger(OpC); 318} 319 320/// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them 321/// solely with their pointer. 322static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) { 323 ID.AddPointer(VTList.VTs); 324} 325 326/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 327/// 328static void AddNodeIDOperands(FoldingSetNodeID &ID, 329 const SDValue *Ops, unsigned NumOps) { 330 for (; NumOps; --NumOps, ++Ops) { 331 ID.AddPointer(Ops->getNode()); 332 ID.AddInteger(Ops->getResNo()); 333 } 334} 335 336/// AddNodeIDOperands - Various routines for adding operands to the NodeID data. 337/// 338static void AddNodeIDOperands(FoldingSetNodeID &ID, 339 const SDUse *Ops, unsigned NumOps) { 340 for (; NumOps; --NumOps, ++Ops) { 341 ID.AddPointer(Ops->getNode()); 342 ID.AddInteger(Ops->getResNo()); 343 } 344} 345 346static void AddNodeIDNode(FoldingSetNodeID &ID, 347 unsigned short OpC, SDVTList VTList, 348 const SDValue *OpList, unsigned N) { 349 AddNodeIDOpcode(ID, OpC); 350 AddNodeIDValueTypes(ID, VTList); 351 AddNodeIDOperands(ID, OpList, N); 352} 353 354/// AddNodeIDCustom - If this is an SDNode with special info, add this info to 355/// the NodeID data. 356static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) { 357 switch (N->getOpcode()) { 358 case ISD::TargetExternalSymbol: 359 case ISD::ExternalSymbol: 360 llvm_unreachable("Should only be used on nodes with operands"); 361 default: break; // Normal nodes don't need extra info. 362 case ISD::TargetConstant: 363 case ISD::Constant: 364 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue()); 365 break; 366 case ISD::TargetConstantFP: 367 case ISD::ConstantFP: { 368 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue()); 369 break; 370 } 371 case ISD::TargetGlobalAddress: 372 case ISD::GlobalAddress: 373 case ISD::TargetGlobalTLSAddress: 374 case ISD::GlobalTLSAddress: { 375 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N); 376 ID.AddPointer(GA->getGlobal()); 377 ID.AddInteger(GA->getOffset()); 378 ID.AddInteger(GA->getTargetFlags()); 379 break; 380 } 381 case ISD::BasicBlock: 382 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock()); 383 break; 384 case ISD::Register: 385 ID.AddInteger(cast<RegisterSDNode>(N)->getReg()); 386 break; 387 388 case ISD::SRCVALUE: 389 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue()); 390 break; 391 case ISD::FrameIndex: 392 case ISD::TargetFrameIndex: 393 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex()); 394 break; 395 case ISD::JumpTable: 396 case ISD::TargetJumpTable: 397 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex()); 398 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags()); 399 break; 400 case ISD::ConstantPool: 401 case ISD::TargetConstantPool: { 402 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N); 403 ID.AddInteger(CP->getAlignment()); 404 ID.AddInteger(CP->getOffset()); 405 if (CP->isMachineConstantPoolEntry()) 406 CP->getMachineCPVal()->AddSelectionDAGCSEId(ID); 407 else 408 ID.AddPointer(CP->getConstVal()); 409 ID.AddInteger(CP->getTargetFlags()); 410 break; 411 } 412 case ISD::LOAD: { 413 const LoadSDNode *LD = cast<LoadSDNode>(N); 414 ID.AddInteger(LD->getMemoryVT().getRawBits()); 415 ID.AddInteger(LD->getRawSubclassData()); 416 break; 417 } 418 case ISD::STORE: { 419 const StoreSDNode *ST = cast<StoreSDNode>(N); 420 ID.AddInteger(ST->getMemoryVT().getRawBits()); 421 ID.AddInteger(ST->getRawSubclassData()); 422 break; 423 } 424 case ISD::ATOMIC_CMP_SWAP: 425 case ISD::ATOMIC_SWAP: 426 case ISD::ATOMIC_LOAD_ADD: 427 case ISD::ATOMIC_LOAD_SUB: 428 case ISD::ATOMIC_LOAD_AND: 429 case ISD::ATOMIC_LOAD_OR: 430 case ISD::ATOMIC_LOAD_XOR: 431 case ISD::ATOMIC_LOAD_NAND: 432 case ISD::ATOMIC_LOAD_MIN: 433 case ISD::ATOMIC_LOAD_MAX: 434 case ISD::ATOMIC_LOAD_UMIN: 435 case ISD::ATOMIC_LOAD_UMAX: { 436 const AtomicSDNode *AT = cast<AtomicSDNode>(N); 437 ID.AddInteger(AT->getMemoryVT().getRawBits()); 438 ID.AddInteger(AT->getRawSubclassData()); 439 break; 440 } 441 case ISD::VECTOR_SHUFFLE: { 442 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 443 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); 444 i != e; ++i) 445 ID.AddInteger(SVN->getMaskElt(i)); 446 break; 447 } 448 case ISD::TargetBlockAddress: 449 case ISD::BlockAddress: { 450 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress()); 451 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags()); 452 break; 453 } 454 } // end switch (N->getOpcode()) 455} 456 457/// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID 458/// data. 459static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) { 460 AddNodeIDOpcode(ID, N->getOpcode()); 461 // Add the return value info. 462 AddNodeIDValueTypes(ID, N->getVTList()); 463 // Add the operand info. 464 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands()); 465 466 // Handle SDNode leafs with special info. 467 AddNodeIDCustom(ID, N); 468} 469 470/// encodeMemSDNodeFlags - Generic routine for computing a value for use in 471/// the CSE map that carries volatility, temporalness, indexing mode, and 472/// extension/truncation information. 473/// 474static inline unsigned 475encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, 476 bool isNonTemporal) { 477 assert((ConvType & 3) == ConvType && 478 "ConvType may not require more than 2 bits!"); 479 assert((AM & 7) == AM && 480 "AM may not require more than 3 bits!"); 481 return ConvType | 482 (AM << 2) | 483 (isVolatile << 5) | 484 (isNonTemporal << 6); 485} 486 487//===----------------------------------------------------------------------===// 488// SelectionDAG Class 489//===----------------------------------------------------------------------===// 490 491/// doNotCSE - Return true if CSE should not be performed for this node. 492static bool doNotCSE(SDNode *N) { 493 if (N->getValueType(0) == MVT::Glue) 494 return true; // Never CSE anything that produces a flag. 495 496 switch (N->getOpcode()) { 497 default: break; 498 case ISD::HANDLENODE: 499 case ISD::EH_LABEL: 500 return true; // Never CSE these nodes. 501 } 502 503 // Check that remaining values produced are not flags. 504 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i) 505 if (N->getValueType(i) == MVT::Glue) 506 return true; // Never CSE anything that produces a flag. 507 508 return false; 509} 510 511/// RemoveDeadNodes - This method deletes all unreachable nodes in the 512/// SelectionDAG. 513void SelectionDAG::RemoveDeadNodes() { 514 // Create a dummy node (which is not added to allnodes), that adds a reference 515 // to the root node, preventing it from being deleted. 516 HandleSDNode Dummy(getRoot()); 517 518 SmallVector<SDNode*, 128> DeadNodes; 519 520 // Add all obviously-dead nodes to the DeadNodes worklist. 521 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I) 522 if (I->use_empty()) 523 DeadNodes.push_back(I); 524 525 RemoveDeadNodes(DeadNodes); 526 527 // If the root changed (e.g. it was a dead load, update the root). 528 setRoot(Dummy.getValue()); 529} 530 531/// RemoveDeadNodes - This method deletes the unreachable nodes in the 532/// given list, and any nodes that become unreachable as a result. 533void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes, 534 DAGUpdateListener *UpdateListener) { 535 536 // Process the worklist, deleting the nodes and adding their uses to the 537 // worklist. 538 while (!DeadNodes.empty()) { 539 SDNode *N = DeadNodes.pop_back_val(); 540 541 if (UpdateListener) 542 UpdateListener->NodeDeleted(N, 0); 543 544 // Take the node out of the appropriate CSE map. 545 RemoveNodeFromCSEMaps(N); 546 547 // Next, brutally remove the operand list. This is safe to do, as there are 548 // no cycles in the graph. 549 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 550 SDUse &Use = *I++; 551 SDNode *Operand = Use.getNode(); 552 Use.set(SDValue()); 553 554 // Now that we removed this operand, see if there are no uses of it left. 555 if (Operand->use_empty()) 556 DeadNodes.push_back(Operand); 557 } 558 559 DeallocateNode(N); 560 } 561} 562 563void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){ 564 SmallVector<SDNode*, 16> DeadNodes(1, N); 565 RemoveDeadNodes(DeadNodes, UpdateListener); 566} 567 568void SelectionDAG::DeleteNode(SDNode *N) { 569 // First take this out of the appropriate CSE map. 570 RemoveNodeFromCSEMaps(N); 571 572 // Finally, remove uses due to operands of this node, remove from the 573 // AllNodes list, and delete the node. 574 DeleteNodeNotInCSEMaps(N); 575} 576 577void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) { 578 assert(N != AllNodes.begin() && "Cannot delete the entry node!"); 579 assert(N->use_empty() && "Cannot delete a node that is not dead!"); 580 581 // Drop all of the operands and decrement used node's use counts. 582 N->DropOperands(); 583 584 DeallocateNode(N); 585} 586 587void SelectionDAG::DeallocateNode(SDNode *N) { 588 if (N->OperandsNeedDelete) 589 delete[] N->OperandList; 590 591 // Set the opcode to DELETED_NODE to help catch bugs when node 592 // memory is reallocated. 593 N->NodeType = ISD::DELETED_NODE; 594 595 NodeAllocator.Deallocate(AllNodes.remove(N)); 596 597 // Remove the ordering of this node. 598 Ordering->remove(N); 599 600 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them. 601 SmallVector<SDDbgValue*, 2> &DbgVals = DbgInfo->getSDDbgValues(N); 602 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i) 603 DbgVals[i]->setIsInvalidated(); 604} 605 606/// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that 607/// correspond to it. This is useful when we're about to delete or repurpose 608/// the node. We don't want future request for structurally identical nodes 609/// to return N anymore. 610bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) { 611 bool Erased = false; 612 switch (N->getOpcode()) { 613 case ISD::HANDLENODE: return false; // noop. 614 case ISD::CONDCODE: 615 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] && 616 "Cond code doesn't exist!"); 617 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0; 618 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0; 619 break; 620 case ISD::ExternalSymbol: 621 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol()); 622 break; 623 case ISD::TargetExternalSymbol: { 624 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N); 625 Erased = TargetExternalSymbols.erase( 626 std::pair<std::string,unsigned char>(ESN->getSymbol(), 627 ESN->getTargetFlags())); 628 break; 629 } 630 case ISD::VALUETYPE: { 631 EVT VT = cast<VTSDNode>(N)->getVT(); 632 if (VT.isExtended()) { 633 Erased = ExtendedValueTypeNodes.erase(VT); 634 } else { 635 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0; 636 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0; 637 } 638 break; 639 } 640 default: 641 // Remove it from the CSE Map. 642 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!"); 643 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!"); 644 Erased = CSEMap.RemoveNode(N); 645 break; 646 } 647#ifndef NDEBUG 648 // Verify that the node was actually in one of the CSE maps, unless it has a 649 // flag result (which cannot be CSE'd) or is one of the special cases that are 650 // not subject to CSE. 651 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && 652 !N->isMachineOpcode() && !doNotCSE(N)) { 653 N->dump(this); 654 dbgs() << "\n"; 655 llvm_unreachable("Node is not in map!"); 656 } 657#endif 658 return Erased; 659} 660 661/// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE 662/// maps and modified in place. Add it back to the CSE maps, unless an identical 663/// node already exists, in which case transfer all its users to the existing 664/// node. This transfer can potentially trigger recursive merging. 665/// 666void 667SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N, 668 DAGUpdateListener *UpdateListener) { 669 // For node types that aren't CSE'd, just act as if no identical node 670 // already exists. 671 if (!doNotCSE(N)) { 672 SDNode *Existing = CSEMap.GetOrInsertNode(N); 673 if (Existing != N) { 674 // If there was already an existing matching node, use ReplaceAllUsesWith 675 // to replace the dead one with the existing one. This can cause 676 // recursive merging of other unrelated nodes down the line. 677 ReplaceAllUsesWith(N, Existing, UpdateListener); 678 679 // N is now dead. Inform the listener if it exists and delete it. 680 if (UpdateListener) 681 UpdateListener->NodeDeleted(N, Existing); 682 DeleteNodeNotInCSEMaps(N); 683 return; 684 } 685 } 686 687 // If the node doesn't already exist, we updated it. Inform a listener if 688 // it exists. 689 if (UpdateListener) 690 UpdateListener->NodeUpdated(N); 691} 692 693/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 694/// were replaced with those specified. If this node is never memoized, 695/// return null, otherwise return a pointer to the slot it would take. If a 696/// node already exists with these operands, the slot will be non-null. 697SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op, 698 void *&InsertPos) { 699 if (doNotCSE(N)) 700 return 0; 701 702 SDValue Ops[] = { Op }; 703 FoldingSetNodeID ID; 704 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); 705 AddNodeIDCustom(ID, N); 706 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 707 return Node; 708} 709 710/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 711/// were replaced with those specified. If this node is never memoized, 712/// return null, otherwise return a pointer to the slot it would take. If a 713/// node already exists with these operands, the slot will be non-null. 714SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 715 SDValue Op1, SDValue Op2, 716 void *&InsertPos) { 717 if (doNotCSE(N)) 718 return 0; 719 720 SDValue Ops[] = { Op1, Op2 }; 721 FoldingSetNodeID ID; 722 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2); 723 AddNodeIDCustom(ID, N); 724 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 725 return Node; 726} 727 728 729/// FindModifiedNodeSlot - Find a slot for the specified node if its operands 730/// were replaced with those specified. If this node is never memoized, 731/// return null, otherwise return a pointer to the slot it would take. If a 732/// node already exists with these operands, the slot will be non-null. 733SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, 734 const SDValue *Ops,unsigned NumOps, 735 void *&InsertPos) { 736 if (doNotCSE(N)) 737 return 0; 738 739 FoldingSetNodeID ID; 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps); 741 AddNodeIDCustom(ID, N); 742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos); 743 return Node; 744} 745 746#ifndef NDEBUG 747/// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid. 748static void VerifyNodeCommon(SDNode *N) { 749 switch (N->getOpcode()) { 750 default: 751 break; 752 case ISD::BUILD_PAIR: { 753 EVT VT = N->getValueType(0); 754 assert(N->getNumValues() == 1 && "Too many results!"); 755 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) && 756 "Wrong return type!"); 757 assert(N->getNumOperands() == 2 && "Wrong number of operands!"); 758 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && 759 "Mismatched operand types!"); 760 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && 761 "Wrong operand type!"); 762 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() && 763 "Wrong return type size"); 764 break; 765 } 766 case ISD::BUILD_VECTOR: { 767 assert(N->getNumValues() == 1 && "Too many results!"); 768 assert(N->getValueType(0).isVector() && "Wrong return type!"); 769 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && 770 "Wrong number of operands!"); 771 EVT EltVT = N->getValueType(0).getVectorElementType(); 772 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) 773 assert((I->getValueType() == EltVT || 774 (EltVT.isInteger() && I->getValueType().isInteger() && 775 EltVT.bitsLE(I->getValueType()))) && 776 "Wrong operand type!"); 777 break; 778 } 779 } 780} 781 782/// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid. 783static void VerifySDNode(SDNode *N) { 784 // The SDNode allocators cannot be used to allocate nodes with fields that are 785 // not present in an SDNode! 786 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); 787 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!"); 788 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!"); 789 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!"); 790 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!"); 791 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!"); 792 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!"); 793 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!"); 794 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!"); 795 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!"); 796 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!"); 797 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!"); 798 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!"); 799 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!"); 800 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!"); 801 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!"); 802 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!"); 803 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!"); 804 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!"); 805 806 VerifyNodeCommon(N); 807} 808 809/// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is 810/// invalid. 811static void VerifyMachineNode(SDNode *N) { 812 // The MachineNode allocators cannot be used to allocate nodes with fields 813 // that are not present in a MachineNode! 814 // Currently there are no such nodes. 815 816 VerifyNodeCommon(N); 817} 818#endif // NDEBUG 819 820/// getEVTAlignment - Compute the default alignment value for the 821/// given type. 822/// 823unsigned SelectionDAG::getEVTAlignment(EVT VT) const { 824 const Type *Ty = VT == MVT::iPTR ? 825 PointerType::get(Type::getInt8Ty(*getContext()), 0) : 826 VT.getTypeForEVT(*getContext()); 827 828 return TLI.getTargetData()->getABITypeAlignment(Ty); 829} 830 831// EntryNode could meaningfully have debug info if we can find it... 832SelectionDAG::SelectionDAG(const TargetMachine &tm) 833 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()), 834 EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)), 835 Root(getEntryNode()), Ordering(0) { 836 AllNodes.push_back(&EntryNode); 837 Ordering = new SDNodeOrdering(); 838 DbgInfo = new SDDbgInfo(); 839} 840 841void SelectionDAG::init(MachineFunction &mf) { 842 MF = &mf; 843 Context = &mf.getFunction()->getContext(); 844} 845 846SelectionDAG::~SelectionDAG() { 847 allnodes_clear(); 848 delete Ordering; 849 delete DbgInfo; 850} 851 852void SelectionDAG::allnodes_clear() { 853 assert(&*AllNodes.begin() == &EntryNode); 854 AllNodes.remove(AllNodes.begin()); 855 while (!AllNodes.empty()) 856 DeallocateNode(AllNodes.begin()); 857} 858 859void SelectionDAG::clear() { 860 allnodes_clear(); 861 OperandAllocator.Reset(); 862 CSEMap.clear(); 863 864 ExtendedValueTypeNodes.clear(); 865 ExternalSymbols.clear(); 866 TargetExternalSymbols.clear(); 867 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(), 868 static_cast<CondCodeSDNode*>(0)); 869 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(), 870 static_cast<SDNode*>(0)); 871 872 EntryNode.UseList = 0; 873 AllNodes.push_back(&EntryNode); 874 Root = getEntryNode(); 875 Ordering->clear(); 876 DbgInfo->clear(); 877} 878 879SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 880 return VT.bitsGT(Op.getValueType()) ? 881 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : 882 getNode(ISD::TRUNCATE, DL, VT, Op); 883} 884 885SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) { 886 return VT.bitsGT(Op.getValueType()) ? 887 getNode(ISD::ZERO_EXTEND, DL, VT, Op) : 888 getNode(ISD::TRUNCATE, DL, VT, Op); 889} 890 891SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) { 892 assert(!VT.isVector() && 893 "getZeroExtendInReg should use the vector element type instead of " 894 "the vector type!"); 895 if (Op.getValueType() == VT) return Op; 896 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 897 APInt Imm = APInt::getLowBitsSet(BitWidth, 898 VT.getSizeInBits()); 899 return getNode(ISD::AND, DL, Op.getValueType(), Op, 900 getConstant(Imm, Op.getValueType())); 901} 902 903/// getNOT - Create a bitwise NOT operation as (XOR Val, -1). 904/// 905SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) { 906 EVT EltVT = VT.getScalarType(); 907 SDValue NegOne = 908 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT); 909 return getNode(ISD::XOR, DL, VT, Val, NegOne); 910} 911 912SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) { 913 EVT EltVT = VT.getScalarType(); 914 assert((EltVT.getSizeInBits() >= 64 || 915 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) && 916 "getConstant with a uint64_t value that doesn't fit in the type!"); 917 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT); 918} 919 920SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) { 921 return getConstant(*ConstantInt::get(*Context, Val), VT, isT); 922} 923 924SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) { 925 assert(VT.isInteger() && "Cannot create FP integer constant!"); 926 927 EVT EltVT = VT.getScalarType(); 928 assert(Val.getBitWidth() == EltVT.getSizeInBits() && 929 "APInt size does not match type size!"); 930 931 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant; 932 FoldingSetNodeID ID; 933 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 934 ID.AddPointer(&Val); 935 void *IP = 0; 936 SDNode *N = NULL; 937 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 938 if (!VT.isVector()) 939 return SDValue(N, 0); 940 941 if (!N) { 942 N = new (NodeAllocator) ConstantSDNode(isT, &Val, EltVT); 943 CSEMap.InsertNode(N, IP); 944 AllNodes.push_back(N); 945 } 946 947 SDValue Result(N, 0); 948 if (VT.isVector()) { 949 SmallVector<SDValue, 8> Ops; 950 Ops.assign(VT.getVectorNumElements(), Result); 951 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 952 } 953 return Result; 954} 955 956SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) { 957 return getConstant(Val, TLI.getPointerTy(), isTarget); 958} 959 960 961SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) { 962 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget); 963} 964 965SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){ 966 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!"); 967 968 EVT EltVT = VT.getScalarType(); 969 970 // Do the map lookup using the actual bit pattern for the floating point 971 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and 972 // we don't have issues with SNANs. 973 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP; 974 FoldingSetNodeID ID; 975 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0); 976 ID.AddPointer(&V); 977 void *IP = 0; 978 SDNode *N = NULL; 979 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP))) 980 if (!VT.isVector()) 981 return SDValue(N, 0); 982 983 if (!N) { 984 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT); 985 CSEMap.InsertNode(N, IP); 986 AllNodes.push_back(N); 987 } 988 989 SDValue Result(N, 0); 990 if (VT.isVector()) { 991 SmallVector<SDValue, 8> Ops; 992 Ops.assign(VT.getVectorNumElements(), Result); 993 // FIXME DebugLoc info might be appropriate here 994 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size()); 995 } 996 return Result; 997} 998 999SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) { 1000 EVT EltVT = VT.getScalarType(); 1001 if (EltVT==MVT::f32) 1002 return getConstantFP(APFloat((float)Val), VT, isTarget); 1003 else if (EltVT==MVT::f64) 1004 return getConstantFP(APFloat(Val), VT, isTarget); 1005 else if (EltVT==MVT::f80 || EltVT==MVT::f128) { 1006 bool ignored; 1007 APFloat apf = APFloat(Val); 1008 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven, 1009 &ignored); 1010 return getConstantFP(apf, VT, isTarget); 1011 } else { 1012 assert(0 && "Unsupported type in getConstantFP"); 1013 return SDValue(); 1014 } 1015} 1016 1017SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL, 1018 EVT VT, int64_t Offset, 1019 bool isTargetGA, 1020 unsigned char TargetFlags) { 1021 assert((TargetFlags == 0 || isTargetGA) && 1022 "Cannot set target flags on target-independent globals"); 1023 1024 // Truncate (with sign-extension) the offset value to the pointer size. 1025 EVT PTy = TLI.getPointerTy(); 1026 unsigned BitWidth = PTy.getSizeInBits(); 1027 if (BitWidth < 64) 1028 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth)); 1029 1030 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV); 1031 if (!GVar) { 1032 // If GV is an alias then use the aliasee for determining thread-localness. 1033 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV)) 1034 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false)); 1035 } 1036 1037 unsigned Opc; 1038 if (GVar && GVar->isThreadLocal()) 1039 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress; 1040 else 1041 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress; 1042 1043 FoldingSetNodeID ID; 1044 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1045 ID.AddPointer(GV); 1046 ID.AddInteger(Offset); 1047 ID.AddInteger(TargetFlags); 1048 void *IP = 0; 1049 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1050 return SDValue(E, 0); 1051 1052 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT, 1053 Offset, TargetFlags); 1054 CSEMap.InsertNode(N, IP); 1055 AllNodes.push_back(N); 1056 return SDValue(N, 0); 1057} 1058 1059SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) { 1060 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex; 1061 FoldingSetNodeID ID; 1062 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1063 ID.AddInteger(FI); 1064 void *IP = 0; 1065 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1066 return SDValue(E, 0); 1067 1068 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget); 1069 CSEMap.InsertNode(N, IP); 1070 AllNodes.push_back(N); 1071 return SDValue(N, 0); 1072} 1073 1074SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget, 1075 unsigned char TargetFlags) { 1076 assert((TargetFlags == 0 || isTarget) && 1077 "Cannot set target flags on target-independent jump tables"); 1078 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable; 1079 FoldingSetNodeID ID; 1080 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1081 ID.AddInteger(JTI); 1082 ID.AddInteger(TargetFlags); 1083 void *IP = 0; 1084 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1085 return SDValue(E, 0); 1086 1087 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget, 1088 TargetFlags); 1089 CSEMap.InsertNode(N, IP); 1090 AllNodes.push_back(N); 1091 return SDValue(N, 0); 1092} 1093 1094SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT, 1095 unsigned Alignment, int Offset, 1096 bool isTarget, 1097 unsigned char TargetFlags) { 1098 assert((TargetFlags == 0 || isTarget) && 1099 "Cannot set target flags on target-independent globals"); 1100 if (Alignment == 0) 1101 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1102 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1103 FoldingSetNodeID ID; 1104 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1105 ID.AddInteger(Alignment); 1106 ID.AddInteger(Offset); 1107 ID.AddPointer(C); 1108 ID.AddInteger(TargetFlags); 1109 void *IP = 0; 1110 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1111 return SDValue(E, 0); 1112 1113 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1114 Alignment, TargetFlags); 1115 CSEMap.InsertNode(N, IP); 1116 AllNodes.push_back(N); 1117 return SDValue(N, 0); 1118} 1119 1120 1121SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT, 1122 unsigned Alignment, int Offset, 1123 bool isTarget, 1124 unsigned char TargetFlags) { 1125 assert((TargetFlags == 0 || isTarget) && 1126 "Cannot set target flags on target-independent globals"); 1127 if (Alignment == 0) 1128 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType()); 1129 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool; 1130 FoldingSetNodeID ID; 1131 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1132 ID.AddInteger(Alignment); 1133 ID.AddInteger(Offset); 1134 C->AddSelectionDAGCSEId(ID); 1135 ID.AddInteger(TargetFlags); 1136 void *IP = 0; 1137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1138 return SDValue(E, 0); 1139 1140 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset, 1141 Alignment, TargetFlags); 1142 CSEMap.InsertNode(N, IP); 1143 AllNodes.push_back(N); 1144 return SDValue(N, 0); 1145} 1146 1147SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { 1148 FoldingSetNodeID ID; 1149 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0); 1150 ID.AddPointer(MBB); 1151 void *IP = 0; 1152 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1153 return SDValue(E, 0); 1154 1155 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB); 1156 CSEMap.InsertNode(N, IP); 1157 AllNodes.push_back(N); 1158 return SDValue(N, 0); 1159} 1160 1161SDValue SelectionDAG::getValueType(EVT VT) { 1162 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >= 1163 ValueTypeNodes.size()) 1164 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1); 1165 1166 SDNode *&N = VT.isExtended() ? 1167 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy]; 1168 1169 if (N) return SDValue(N, 0); 1170 N = new (NodeAllocator) VTSDNode(VT); 1171 AllNodes.push_back(N); 1172 return SDValue(N, 0); 1173} 1174 1175SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) { 1176 SDNode *&N = ExternalSymbols[Sym]; 1177 if (N) return SDValue(N, 0); 1178 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT); 1179 AllNodes.push_back(N); 1180 return SDValue(N, 0); 1181} 1182 1183SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT, 1184 unsigned char TargetFlags) { 1185 SDNode *&N = 1186 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym, 1187 TargetFlags)]; 1188 if (N) return SDValue(N, 0); 1189 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT); 1190 AllNodes.push_back(N); 1191 return SDValue(N, 0); 1192} 1193 1194SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { 1195 if ((unsigned)Cond >= CondCodeNodes.size()) 1196 CondCodeNodes.resize(Cond+1); 1197 1198 if (CondCodeNodes[Cond] == 0) { 1199 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond); 1200 CondCodeNodes[Cond] = N; 1201 AllNodes.push_back(N); 1202 } 1203 1204 return SDValue(CondCodeNodes[Cond], 0); 1205} 1206 1207// commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1208// the shuffle mask M that point at N1 to point at N2, and indices that point 1209// N2 to point at N1. 1210static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { 1211 std::swap(N1, N2); 1212 int NElts = M.size(); 1213 for (int i = 0; i != NElts; ++i) { 1214 if (M[i] >= NElts) 1215 M[i] -= NElts; 1216 else if (M[i] >= 0) 1217 M[i] += NElts; 1218 } 1219} 1220 1221SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, 1222 SDValue N2, const int *Mask) { 1223 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1224 assert(VT.isVector() && N1.getValueType().isVector() && 1225 "Vector Shuffle VTs must be a vectors"); 1226 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() 1227 && "Vector Shuffle VTs must have same element type"); 1228 1229 // Canonicalize shuffle undef, undef -> undef 1230 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1231 return getUNDEF(VT); 1232 1233 // Validate that all indices in Mask are within the range of the elements 1234 // input to the shuffle. 1235 unsigned NElts = VT.getVectorNumElements(); 1236 SmallVector<int, 8> MaskVec; 1237 for (unsigned i = 0; i != NElts; ++i) { 1238 assert(Mask[i] < (int)(NElts * 2) && "Index out of range"); 1239 MaskVec.push_back(Mask[i]); 1240 } 1241 1242 // Canonicalize shuffle v, v -> v, undef 1243 if (N1 == N2) { 1244 N2 = getUNDEF(VT); 1245 for (unsigned i = 0; i != NElts; ++i) 1246 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts; 1247 } 1248 1249 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask. 1250 if (N1.getOpcode() == ISD::UNDEF) 1251 commuteShuffle(N1, N2, MaskVec); 1252 1253 // Canonicalize all index into lhs, -> shuffle lhs, undef 1254 // Canonicalize all index into rhs, -> shuffle rhs, undef 1255 bool AllLHS = true, AllRHS = true; 1256 bool N2Undef = N2.getOpcode() == ISD::UNDEF; 1257 for (unsigned i = 0; i != NElts; ++i) { 1258 if (MaskVec[i] >= (int)NElts) { 1259 if (N2Undef) 1260 MaskVec[i] = -1; 1261 else 1262 AllLHS = false; 1263 } else if (MaskVec[i] >= 0) { 1264 AllRHS = false; 1265 } 1266 } 1267 if (AllLHS && AllRHS) 1268 return getUNDEF(VT); 1269 if (AllLHS && !N2Undef) 1270 N2 = getUNDEF(VT); 1271 if (AllRHS) { 1272 N1 = getUNDEF(VT); 1273 commuteShuffle(N1, N2, MaskVec); 1274 } 1275 1276 // If Identity shuffle, or all shuffle in to undef, return that node. 1277 bool AllUndef = true; 1278 bool Identity = true; 1279 for (unsigned i = 0; i != NElts; ++i) { 1280 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false; 1281 if (MaskVec[i] >= 0) AllUndef = false; 1282 } 1283 if (Identity && NElts == N1.getValueType().getVectorNumElements()) 1284 return N1; 1285 if (AllUndef) 1286 return getUNDEF(VT); 1287 1288 FoldingSetNodeID ID; 1289 SDValue Ops[2] = { N1, N2 }; 1290 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2); 1291 for (unsigned i = 0; i != NElts; ++i) 1292 ID.AddInteger(MaskVec[i]); 1293 1294 void* IP = 0; 1295 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1296 return SDValue(E, 0); 1297 1298 // Allocate the mask array for the node out of the BumpPtrAllocator, since 1299 // SDNode doesn't have access to it. This memory will be "leaked" when 1300 // the node is deallocated, but recovered when the NodeAllocator is released. 1301 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts); 1302 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int)); 1303 1304 ShuffleVectorSDNode *N = 1305 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc); 1306 CSEMap.InsertNode(N, IP); 1307 AllNodes.push_back(N); 1308 return SDValue(N, 0); 1309} 1310 1311SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl, 1312 SDValue Val, SDValue DTy, 1313 SDValue STy, SDValue Rnd, SDValue Sat, 1314 ISD::CvtCode Code) { 1315 // If the src and dest types are the same and the conversion is between 1316 // integer types of the same sign or two floats, no conversion is necessary. 1317 if (DTy == STy && 1318 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF)) 1319 return Val; 1320 1321 FoldingSetNodeID ID; 1322 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat }; 1323 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5); 1324 void* IP = 0; 1325 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1326 return SDValue(E, 0); 1327 1328 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5, 1329 Code); 1330 CSEMap.InsertNode(N, IP); 1331 AllNodes.push_back(N); 1332 return SDValue(N, 0); 1333} 1334 1335SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) { 1336 FoldingSetNodeID ID; 1337 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0); 1338 ID.AddInteger(RegNo); 1339 void *IP = 0; 1340 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1341 return SDValue(E, 0); 1342 1343 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT); 1344 CSEMap.InsertNode(N, IP); 1345 AllNodes.push_back(N); 1346 return SDValue(N, 0); 1347} 1348 1349SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) { 1350 FoldingSetNodeID ID; 1351 SDValue Ops[] = { Root }; 1352 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1); 1353 ID.AddPointer(Label); 1354 void *IP = 0; 1355 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1356 return SDValue(E, 0); 1357 1358 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label); 1359 CSEMap.InsertNode(N, IP); 1360 AllNodes.push_back(N); 1361 return SDValue(N, 0); 1362} 1363 1364 1365SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT, 1366 bool isTarget, 1367 unsigned char TargetFlags) { 1368 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress; 1369 1370 FoldingSetNodeID ID; 1371 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0); 1372 ID.AddPointer(BA); 1373 ID.AddInteger(TargetFlags); 1374 void *IP = 0; 1375 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1376 return SDValue(E, 0); 1377 1378 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags); 1379 CSEMap.InsertNode(N, IP); 1380 AllNodes.push_back(N); 1381 return SDValue(N, 0); 1382} 1383 1384SDValue SelectionDAG::getSrcValue(const Value *V) { 1385 assert((!V || V->getType()->isPointerTy()) && 1386 "SrcValue is not a pointer?"); 1387 1388 FoldingSetNodeID ID; 1389 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0); 1390 ID.AddPointer(V); 1391 1392 void *IP = 0; 1393 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1394 return SDValue(E, 0); 1395 1396 SDNode *N = new (NodeAllocator) SrcValueSDNode(V); 1397 CSEMap.InsertNode(N, IP); 1398 AllNodes.push_back(N); 1399 return SDValue(N, 0); 1400} 1401 1402/// getMDNode - Return an MDNodeSDNode which holds an MDNode. 1403SDValue SelectionDAG::getMDNode(const MDNode *MD) { 1404 FoldingSetNodeID ID; 1405 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0); 1406 ID.AddPointer(MD); 1407 1408 void *IP = 0; 1409 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 1410 return SDValue(E, 0); 1411 1412 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD); 1413 CSEMap.InsertNode(N, IP); 1414 AllNodes.push_back(N); 1415 return SDValue(N, 0); 1416} 1417 1418 1419/// getShiftAmountOperand - Return the specified value casted to 1420/// the target's desired shift amount type. 1421SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) { 1422 EVT OpTy = Op.getValueType(); 1423 MVT ShTy = TLI.getShiftAmountTy(LHSTy); 1424 if (OpTy == ShTy || OpTy.isVector()) return Op; 1425 1426 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1427 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op); 1428} 1429 1430/// CreateStackTemporary - Create a stack temporary, suitable for holding the 1431/// specified value type. 1432SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) { 1433 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1434 unsigned ByteSize = VT.getStoreSize(); 1435 const Type *Ty = VT.getTypeForEVT(*getContext()); 1436 unsigned StackAlign = 1437 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign); 1438 1439 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false); 1440 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1441} 1442 1443/// CreateStackTemporary - Create a stack temporary suitable for holding 1444/// either of the specified value types. 1445SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { 1446 unsigned Bytes = std::max(VT1.getStoreSizeInBits(), 1447 VT2.getStoreSizeInBits())/8; 1448 const Type *Ty1 = VT1.getTypeForEVT(*getContext()); 1449 const Type *Ty2 = VT2.getTypeForEVT(*getContext()); 1450 const TargetData *TD = TLI.getTargetData(); 1451 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1), 1452 TD->getPrefTypeAlignment(Ty2)); 1453 1454 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo(); 1455 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false); 1456 return getFrameIndex(FrameIdx, TLI.getPointerTy()); 1457} 1458 1459SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, 1460 SDValue N2, ISD::CondCode Cond, DebugLoc dl) { 1461 // These setcc operations always fold. 1462 switch (Cond) { 1463 default: break; 1464 case ISD::SETFALSE: 1465 case ISD::SETFALSE2: return getConstant(0, VT); 1466 case ISD::SETTRUE: 1467 case ISD::SETTRUE2: return getConstant(1, VT); 1468 1469 case ISD::SETOEQ: 1470 case ISD::SETOGT: 1471 case ISD::SETOGE: 1472 case ISD::SETOLT: 1473 case ISD::SETOLE: 1474 case ISD::SETONE: 1475 case ISD::SETO: 1476 case ISD::SETUO: 1477 case ISD::SETUEQ: 1478 case ISD::SETUNE: 1479 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!"); 1480 break; 1481 } 1482 1483 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) { 1484 const APInt &C2 = N2C->getAPIntValue(); 1485 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1486 const APInt &C1 = N1C->getAPIntValue(); 1487 1488 switch (Cond) { 1489 default: llvm_unreachable("Unknown integer setcc!"); 1490 case ISD::SETEQ: return getConstant(C1 == C2, VT); 1491 case ISD::SETNE: return getConstant(C1 != C2, VT); 1492 case ISD::SETULT: return getConstant(C1.ult(C2), VT); 1493 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT); 1494 case ISD::SETULE: return getConstant(C1.ule(C2), VT); 1495 case ISD::SETUGE: return getConstant(C1.uge(C2), VT); 1496 case ISD::SETLT: return getConstant(C1.slt(C2), VT); 1497 case ISD::SETGT: return getConstant(C1.sgt(C2), VT); 1498 case ISD::SETLE: return getConstant(C1.sle(C2), VT); 1499 case ISD::SETGE: return getConstant(C1.sge(C2), VT); 1500 } 1501 } 1502 } 1503 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) { 1504 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) { 1505 // No compile time operations on this type yet. 1506 if (N1C->getValueType(0) == MVT::ppcf128) 1507 return SDValue(); 1508 1509 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF()); 1510 switch (Cond) { 1511 default: break; 1512 case ISD::SETEQ: if (R==APFloat::cmpUnordered) 1513 return getUNDEF(VT); 1514 // fall through 1515 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT); 1516 case ISD::SETNE: if (R==APFloat::cmpUnordered) 1517 return getUNDEF(VT); 1518 // fall through 1519 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan || 1520 R==APFloat::cmpLessThan, VT); 1521 case ISD::SETLT: if (R==APFloat::cmpUnordered) 1522 return getUNDEF(VT); 1523 // fall through 1524 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT); 1525 case ISD::SETGT: if (R==APFloat::cmpUnordered) 1526 return getUNDEF(VT); 1527 // fall through 1528 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT); 1529 case ISD::SETLE: if (R==APFloat::cmpUnordered) 1530 return getUNDEF(VT); 1531 // fall through 1532 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan || 1533 R==APFloat::cmpEqual, VT); 1534 case ISD::SETGE: if (R==APFloat::cmpUnordered) 1535 return getUNDEF(VT); 1536 // fall through 1537 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan || 1538 R==APFloat::cmpEqual, VT); 1539 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT); 1540 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT); 1541 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered || 1542 R==APFloat::cmpEqual, VT); 1543 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT); 1544 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered || 1545 R==APFloat::cmpLessThan, VT); 1546 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan || 1547 R==APFloat::cmpUnordered, VT); 1548 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT); 1549 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT); 1550 } 1551 } else { 1552 // Ensure that the constant occurs on the RHS. 1553 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond)); 1554 } 1555 } 1556 1557 // Could not fold it. 1558 return SDValue(); 1559} 1560 1561/// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We 1562/// use this predicate to simplify operations downstream. 1563bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { 1564 // This predicate is not safe for vector operations. 1565 if (Op.getValueType().isVector()) 1566 return false; 1567 1568 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); 1569 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); 1570} 1571 1572/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use 1573/// this predicate to simplify operations downstream. Mask is known to be zero 1574/// for bits that V cannot have. 1575bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask, 1576 unsigned Depth) const { 1577 APInt KnownZero, KnownOne; 1578 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 1579 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1580 return (KnownZero & Mask) == Mask; 1581} 1582 1583/// ComputeMaskedBits - Determine which of the bits specified in Mask are 1584/// known to be either zero or one and return them in the KnownZero/KnownOne 1585/// bitsets. This code only analyzes bits in Mask, in order to short-circuit 1586/// processing. 1587void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, 1588 APInt &KnownZero, APInt &KnownOne, 1589 unsigned Depth) const { 1590 unsigned BitWidth = Mask.getBitWidth(); 1591 assert(BitWidth == Op.getValueType().getScalarType().getSizeInBits() && 1592 "Mask size mismatches value type size!"); 1593 1594 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1595 if (Depth == 6 || Mask == 0) 1596 return; // Limit search depth. 1597 1598 APInt KnownZero2, KnownOne2; 1599 1600 switch (Op.getOpcode()) { 1601 case ISD::Constant: 1602 // We know all of the bits for a constant! 1603 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue() & Mask; 1604 KnownZero = ~KnownOne & Mask; 1605 return; 1606 case ISD::AND: 1607 // If either the LHS or the RHS are Zero, the result is zero. 1608 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1609 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownZero, 1610 KnownZero2, KnownOne2, Depth+1); 1611 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1612 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1613 1614 // Output known-1 bits are only known if set in both the LHS & RHS. 1615 KnownOne &= KnownOne2; 1616 // Output known-0 are known to be clear if zero in either the LHS | RHS. 1617 KnownZero |= KnownZero2; 1618 return; 1619 case ISD::OR: 1620 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1621 ComputeMaskedBits(Op.getOperand(0), Mask & ~KnownOne, 1622 KnownZero2, KnownOne2, Depth+1); 1623 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1624 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1625 1626 // Output known-0 bits are only known if clear in both the LHS & RHS. 1627 KnownZero &= KnownZero2; 1628 // Output known-1 are known to be set if set in either the LHS | RHS. 1629 KnownOne |= KnownOne2; 1630 return; 1631 case ISD::XOR: { 1632 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 1633 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero2, KnownOne2, Depth+1); 1634 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1635 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1636 1637 // Output known-0 bits are known if clear or set in both the LHS & RHS. 1638 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2); 1639 // Output known-1 are known to be set if set in only one of the LHS, RHS. 1640 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2); 1641 KnownZero = KnownZeroOut; 1642 return; 1643 } 1644 case ISD::MUL: { 1645 APInt Mask2 = APInt::getAllOnesValue(BitWidth); 1646 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero, KnownOne, Depth+1); 1647 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1648 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1649 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1650 1651 // If low bits are zero in either operand, output low known-0 bits. 1652 // Also compute a conserative estimate for high known-0 bits. 1653 // More trickiness is possible, but this is sufficient for the 1654 // interesting case of alignment computation. 1655 KnownOne.clearAllBits(); 1656 unsigned TrailZ = KnownZero.countTrailingOnes() + 1657 KnownZero2.countTrailingOnes(); 1658 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() + 1659 KnownZero2.countLeadingOnes(), 1660 BitWidth) - BitWidth; 1661 1662 TrailZ = std::min(TrailZ, BitWidth); 1663 LeadZ = std::min(LeadZ, BitWidth); 1664 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) | 1665 APInt::getHighBitsSet(BitWidth, LeadZ); 1666 KnownZero &= Mask; 1667 return; 1668 } 1669 case ISD::UDIV: { 1670 // For the purposes of computing leading zeros we can conservatively 1671 // treat a udiv as a logical right shift by the power of 2 known to 1672 // be less than the denominator. 1673 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 1674 ComputeMaskedBits(Op.getOperand(0), 1675 AllOnes, KnownZero2, KnownOne2, Depth+1); 1676 unsigned LeadZ = KnownZero2.countLeadingOnes(); 1677 1678 KnownOne2.clearAllBits(); 1679 KnownZero2.clearAllBits(); 1680 ComputeMaskedBits(Op.getOperand(1), 1681 AllOnes, KnownZero2, KnownOne2, Depth+1); 1682 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros(); 1683 if (RHSUnknownLeadingOnes != BitWidth) 1684 LeadZ = std::min(BitWidth, 1685 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1); 1686 1687 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ) & Mask; 1688 return; 1689 } 1690 case ISD::SELECT: 1691 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero, KnownOne, Depth+1); 1692 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero2, KnownOne2, Depth+1); 1693 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1694 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1695 1696 // Only known if known in both the LHS and RHS. 1697 KnownOne &= KnownOne2; 1698 KnownZero &= KnownZero2; 1699 return; 1700 case ISD::SELECT_CC: 1701 ComputeMaskedBits(Op.getOperand(3), Mask, KnownZero, KnownOne, Depth+1); 1702 ComputeMaskedBits(Op.getOperand(2), Mask, KnownZero2, KnownOne2, Depth+1); 1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1704 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1705 1706 // Only known if known in both the LHS and RHS. 1707 KnownOne &= KnownOne2; 1708 KnownZero &= KnownZero2; 1709 return; 1710 case ISD::SADDO: 1711 case ISD::UADDO: 1712 case ISD::SSUBO: 1713 case ISD::USUBO: 1714 case ISD::SMULO: 1715 case ISD::UMULO: 1716 if (Op.getResNo() != 1) 1717 return; 1718 // The boolean result conforms to getBooleanContents. Fall through. 1719 case ISD::SETCC: 1720 // If we know the result of a setcc has the top bits zero, use this info. 1721 if (TLI.getBooleanContents() == TargetLowering::ZeroOrOneBooleanContent && 1722 BitWidth > 1) 1723 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1724 return; 1725 case ISD::SHL: 1726 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0 1727 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1728 unsigned ShAmt = SA->getZExtValue(); 1729 1730 // If the shift count is an invalid immediate, don't do anything. 1731 if (ShAmt >= BitWidth) 1732 return; 1733 1734 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), 1735 KnownZero, KnownOne, Depth+1); 1736 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1737 KnownZero <<= ShAmt; 1738 KnownOne <<= ShAmt; 1739 // low bits known zero. 1740 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 1741 } 1742 return; 1743 case ISD::SRL: 1744 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0 1745 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1746 unsigned ShAmt = SA->getZExtValue(); 1747 1748 // If the shift count is an invalid immediate, don't do anything. 1749 if (ShAmt >= BitWidth) 1750 return; 1751 1752 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), 1753 KnownZero, KnownOne, Depth+1); 1754 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1755 KnownZero = KnownZero.lshr(ShAmt); 1756 KnownOne = KnownOne.lshr(ShAmt); 1757 1758 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1759 KnownZero |= HighBits; // High bits known zero. 1760 } 1761 return; 1762 case ISD::SRA: 1763 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1764 unsigned ShAmt = SA->getZExtValue(); 1765 1766 // If the shift count is an invalid immediate, don't do anything. 1767 if (ShAmt >= BitWidth) 1768 return; 1769 1770 APInt InDemandedMask = (Mask << ShAmt); 1771 // If any of the demanded bits are produced by the sign extension, we also 1772 // demand the input sign bit. 1773 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt) & Mask; 1774 if (HighBits.getBoolValue()) 1775 InDemandedMask |= APInt::getSignBit(BitWidth); 1776 1777 ComputeMaskedBits(Op.getOperand(0), InDemandedMask, KnownZero, KnownOne, 1778 Depth+1); 1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1780 KnownZero = KnownZero.lshr(ShAmt); 1781 KnownOne = KnownOne.lshr(ShAmt); 1782 1783 // Handle the sign bits. 1784 APInt SignBit = APInt::getSignBit(BitWidth); 1785 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask. 1786 1787 if (KnownZero.intersects(SignBit)) { 1788 KnownZero |= HighBits; // New bits are known zero. 1789 } else if (KnownOne.intersects(SignBit)) { 1790 KnownOne |= HighBits; // New bits are known one. 1791 } 1792 } 1793 return; 1794 case ISD::SIGN_EXTEND_INREG: { 1795 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1796 unsigned EBits = EVT.getScalarType().getSizeInBits(); 1797 1798 // Sign extension. Compute the demanded bits in the result that are not 1799 // present in the input. 1800 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits) & Mask; 1801 1802 APInt InSignBit = APInt::getSignBit(EBits); 1803 APInt InputDemandedBits = Mask & APInt::getLowBitsSet(BitWidth, EBits); 1804 1805 // If the sign extended bits are demanded, we know that the sign 1806 // bit is demanded. 1807 InSignBit = InSignBit.zext(BitWidth); 1808 if (NewBits.getBoolValue()) 1809 InputDemandedBits |= InSignBit; 1810 1811 ComputeMaskedBits(Op.getOperand(0), InputDemandedBits, 1812 KnownZero, KnownOne, Depth+1); 1813 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1814 1815 // If the sign bit of the input is known set or clear, then we know the 1816 // top bits of the result. 1817 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear 1818 KnownZero |= NewBits; 1819 KnownOne &= ~NewBits; 1820 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set 1821 KnownOne |= NewBits; 1822 KnownZero &= ~NewBits; 1823 } else { // Input sign bit unknown 1824 KnownZero &= ~NewBits; 1825 KnownOne &= ~NewBits; 1826 } 1827 return; 1828 } 1829 case ISD::CTTZ: 1830 case ISD::CTLZ: 1831 case ISD::CTPOP: { 1832 unsigned LowBits = Log2_32(BitWidth)+1; 1833 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits); 1834 KnownOne.clearAllBits(); 1835 return; 1836 } 1837 case ISD::LOAD: { 1838 if (ISD::isZEXTLoad(Op.getNode())) { 1839 LoadSDNode *LD = cast<LoadSDNode>(Op); 1840 EVT VT = LD->getMemoryVT(); 1841 unsigned MemBits = VT.getScalarType().getSizeInBits(); 1842 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask; 1843 } 1844 return; 1845 } 1846 case ISD::ZERO_EXTEND: { 1847 EVT InVT = Op.getOperand(0).getValueType(); 1848 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1849 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1850 APInt InMask = Mask.trunc(InBits); 1851 KnownZero = KnownZero.trunc(InBits); 1852 KnownOne = KnownOne.trunc(InBits); 1853 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1854 KnownZero = KnownZero.zext(BitWidth); 1855 KnownOne = KnownOne.zext(BitWidth); 1856 KnownZero |= NewBits; 1857 return; 1858 } 1859 case ISD::SIGN_EXTEND: { 1860 EVT InVT = Op.getOperand(0).getValueType(); 1861 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1862 APInt InSignBit = APInt::getSignBit(InBits); 1863 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask; 1864 APInt InMask = Mask.trunc(InBits); 1865 1866 // If any of the sign extended bits are demanded, we know that the sign 1867 // bit is demanded. Temporarily set this bit in the mask for our callee. 1868 if (NewBits.getBoolValue()) 1869 InMask |= InSignBit; 1870 1871 KnownZero = KnownZero.trunc(InBits); 1872 KnownOne = KnownOne.trunc(InBits); 1873 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1874 1875 // Note if the sign bit is known to be zero or one. 1876 bool SignBitKnownZero = KnownZero.isNegative(); 1877 bool SignBitKnownOne = KnownOne.isNegative(); 1878 assert(!(SignBitKnownZero && SignBitKnownOne) && 1879 "Sign bit can't be known to be both zero and one!"); 1880 1881 // If the sign bit wasn't actually demanded by our caller, we don't 1882 // want it set in the KnownZero and KnownOne result values. Reset the 1883 // mask and reapply it to the result values. 1884 InMask = Mask.trunc(InBits); 1885 KnownZero &= InMask; 1886 KnownOne &= InMask; 1887 1888 KnownZero = KnownZero.zext(BitWidth); 1889 KnownOne = KnownOne.zext(BitWidth); 1890 1891 // If the sign bit is known zero or one, the top bits match. 1892 if (SignBitKnownZero) 1893 KnownZero |= NewBits; 1894 else if (SignBitKnownOne) 1895 KnownOne |= NewBits; 1896 return; 1897 } 1898 case ISD::ANY_EXTEND: { 1899 EVT InVT = Op.getOperand(0).getValueType(); 1900 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1901 APInt InMask = Mask.trunc(InBits); 1902 KnownZero = KnownZero.trunc(InBits); 1903 KnownOne = KnownOne.trunc(InBits); 1904 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1905 KnownZero = KnownZero.zext(BitWidth); 1906 KnownOne = KnownOne.zext(BitWidth); 1907 return; 1908 } 1909 case ISD::TRUNCATE: { 1910 EVT InVT = Op.getOperand(0).getValueType(); 1911 unsigned InBits = InVT.getScalarType().getSizeInBits(); 1912 APInt InMask = Mask.zext(InBits); 1913 KnownZero = KnownZero.zext(InBits); 1914 KnownOne = KnownOne.zext(InBits); 1915 ComputeMaskedBits(Op.getOperand(0), InMask, KnownZero, KnownOne, Depth+1); 1916 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1917 KnownZero = KnownZero.trunc(BitWidth); 1918 KnownOne = KnownOne.trunc(BitWidth); 1919 break; 1920 } 1921 case ISD::AssertZext: { 1922 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); 1923 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits()); 1924 ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero, 1925 KnownOne, Depth+1); 1926 KnownZero |= (~InMask) & Mask; 1927 return; 1928 } 1929 case ISD::FGETSIGN: 1930 // All bits are zero except the low bit. 1931 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1); 1932 return; 1933 1934 case ISD::SUB: { 1935 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) { 1936 // We know that the top bits of C-X are clear if X contains less bits 1937 // than C (i.e. no wrap-around can happen). For example, 20-X is 1938 // positive if we can prove that X is >= 0 and < 16. 1939 if (CLHS->getAPIntValue().isNonNegative()) { 1940 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros(); 1941 // NLZ can't be BitWidth with no sign bit 1942 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1); 1943 ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero2, KnownOne2, 1944 Depth+1); 1945 1946 // If all of the MaskV bits are known to be zero, then we know the 1947 // output top bits are zero, because we now know that the output is 1948 // from [0-C]. 1949 if ((KnownZero2 & MaskV) == MaskV) { 1950 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros(); 1951 // Top bits known zero. 1952 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2) & Mask; 1953 } 1954 } 1955 } 1956 } 1957 // fall through 1958 case ISD::ADD: 1959 case ISD::ADDE: { 1960 // Output known-0 bits are known if clear or set in both the low clear bits 1961 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the 1962 // low 3 bits clear. 1963 APInt Mask2 = APInt::getLowBitsSet(BitWidth, 1964 BitWidth - Mask.countLeadingZeros()); 1965 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); 1966 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1967 unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); 1968 1969 ComputeMaskedBits(Op.getOperand(1), Mask2, KnownZero2, KnownOne2, Depth+1); 1970 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); 1971 KnownZeroOut = std::min(KnownZeroOut, 1972 KnownZero2.countTrailingOnes()); 1973 1974 if (Op.getOpcode() == ISD::ADD) { 1975 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut); 1976 return; 1977 } 1978 1979 // With ADDE, a carry bit may be added in, so we can only use this 1980 // information if we know (at least) that the low two bits are clear. We 1981 // then return to the caller that the low bit is unknown but that other bits 1982 // are known zero. 1983 if (KnownZeroOut >= 2) // ADDE 1984 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut); 1985 return; 1986 } 1987 case ISD::SREM: 1988 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 1989 const APInt &RA = Rem->getAPIntValue().abs(); 1990 if (RA.isPowerOf2()) { 1991 APInt LowBits = RA - 1; 1992 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth); 1993 ComputeMaskedBits(Op.getOperand(0), Mask2,KnownZero2,KnownOne2,Depth+1); 1994 1995 // The low bits of the first operand are unchanged by the srem. 1996 KnownZero = KnownZero2 & LowBits; 1997 KnownOne = KnownOne2 & LowBits; 1998 1999 // If the first operand is non-negative or has all low bits zero, then 2000 // the upper bits are all zero. 2001 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits)) 2002 KnownZero |= ~LowBits; 2003 2004 // If the first operand is negative and not all low bits are zero, then 2005 // the upper bits are all one. 2006 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0)) 2007 KnownOne |= ~LowBits; 2008 2009 KnownZero &= Mask; 2010 KnownOne &= Mask; 2011 2012 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2013 } 2014 } 2015 return; 2016 case ISD::UREM: { 2017 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2018 const APInt &RA = Rem->getAPIntValue(); 2019 if (RA.isPowerOf2()) { 2020 APInt LowBits = (RA - 1); 2021 APInt Mask2 = LowBits & Mask; 2022 KnownZero |= ~LowBits & Mask; 2023 ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero, KnownOne,Depth+1); 2024 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?"); 2025 break; 2026 } 2027 } 2028 2029 // Since the result is less than or equal to either operand, any leading 2030 // zero bits in either operand must also exist in the result. 2031 APInt AllOnes = APInt::getAllOnesValue(BitWidth); 2032 ComputeMaskedBits(Op.getOperand(0), AllOnes, KnownZero, KnownOne, 2033 Depth+1); 2034 ComputeMaskedBits(Op.getOperand(1), AllOnes, KnownZero2, KnownOne2, 2035 Depth+1); 2036 2037 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(), 2038 KnownZero2.countLeadingOnes()); 2039 KnownOne.clearAllBits(); 2040 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders) & Mask; 2041 return; 2042 } 2043 case ISD::FrameIndex: 2044 case ISD::TargetFrameIndex: 2045 if (unsigned Align = InferPtrAlignment(Op)) { 2046 // The low bits are known zero if the pointer is aligned. 2047 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align)); 2048 return; 2049 } 2050 break; 2051 2052 default: 2053 // Allow the target to implement this method for its nodes. 2054 if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { 2055 case ISD::INTRINSIC_WO_CHAIN: 2056 case ISD::INTRINSIC_W_CHAIN: 2057 case ISD::INTRINSIC_VOID: 2058 TLI.computeMaskedBitsForTargetNode(Op, Mask, KnownZero, KnownOne, *this, 2059 Depth); 2060 } 2061 return; 2062 } 2063} 2064 2065/// ComputeNumSignBits - Return the number of times the sign bit of the 2066/// register is replicated into the other bits. We know that at least 1 bit 2067/// is always equal to the sign bit (itself), but other cases can give us 2068/// information. For example, immediately after an "SRA X, 2", we know that 2069/// the top 3 bits are all equal to each other, so we return 3. 2070unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ 2071 EVT VT = Op.getValueType(); 2072 assert(VT.isInteger() && "Invalid VT!"); 2073 unsigned VTBits = VT.getScalarType().getSizeInBits(); 2074 unsigned Tmp, Tmp2; 2075 unsigned FirstAnswer = 1; 2076 2077 if (Depth == 6) 2078 return 1; // Limit search depth. 2079 2080 switch (Op.getOpcode()) { 2081 default: break; 2082 case ISD::AssertSext: 2083 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2084 return VTBits-Tmp+1; 2085 case ISD::AssertZext: 2086 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); 2087 return VTBits-Tmp; 2088 2089 case ISD::Constant: { 2090 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue(); 2091 return Val.getNumSignBits(); 2092 } 2093 2094 case ISD::SIGN_EXTEND: 2095 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); 2096 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp; 2097 2098 case ISD::SIGN_EXTEND_INREG: 2099 // Max of the input and what this extends. 2100 Tmp = 2101 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); 2102 Tmp = VTBits-Tmp+1; 2103 2104 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2105 return std::max(Tmp, Tmp2); 2106 2107 case ISD::SRA: 2108 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2109 // SRA X, C -> adds C sign bits. 2110 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2111 Tmp += C->getZExtValue(); 2112 if (Tmp > VTBits) Tmp = VTBits; 2113 } 2114 return Tmp; 2115 case ISD::SHL: 2116 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2117 // shl destroys sign bits. 2118 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2119 if (C->getZExtValue() >= VTBits || // Bad shift. 2120 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out. 2121 return Tmp - C->getZExtValue(); 2122 } 2123 break; 2124 case ISD::AND: 2125 case ISD::OR: 2126 case ISD::XOR: // NOT is handled here. 2127 // Logical binary ops preserve the number of sign bits at the worst. 2128 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2129 if (Tmp != 1) { 2130 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2131 FirstAnswer = std::min(Tmp, Tmp2); 2132 // We computed what we know about the sign bits as our first 2133 // answer. Now proceed to the generic code that uses 2134 // ComputeMaskedBits, and pick whichever answer is better. 2135 } 2136 break; 2137 2138 case ISD::SELECT: 2139 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2140 if (Tmp == 1) return 1; // Early out. 2141 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1); 2142 return std::min(Tmp, Tmp2); 2143 2144 case ISD::SADDO: 2145 case ISD::UADDO: 2146 case ISD::SSUBO: 2147 case ISD::USUBO: 2148 case ISD::SMULO: 2149 case ISD::UMULO: 2150 if (Op.getResNo() != 1) 2151 break; 2152 // The boolean result conforms to getBooleanContents. Fall through. 2153 case ISD::SETCC: 2154 // If setcc returns 0/-1, all bits are sign bits. 2155 if (TLI.getBooleanContents() == 2156 TargetLowering::ZeroOrNegativeOneBooleanContent) 2157 return VTBits; 2158 break; 2159 case ISD::ROTL: 2160 case ISD::ROTR: 2161 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { 2162 unsigned RotAmt = C->getZExtValue() & (VTBits-1); 2163 2164 // Handle rotate right by N like a rotate left by 32-N. 2165 if (Op.getOpcode() == ISD::ROTR) 2166 RotAmt = (VTBits-RotAmt) & (VTBits-1); 2167 2168 // If we aren't rotating out all of the known-in sign bits, return the 2169 // number that are left. This handles rotl(sext(x), 1) for example. 2170 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2171 if (Tmp > RotAmt+1) return Tmp-RotAmt; 2172 } 2173 break; 2174 case ISD::ADD: 2175 // Add can have at most one carry bit. Thus we know that the output 2176 // is, at worst, one more bit than the inputs. 2177 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2178 if (Tmp == 1) return 1; // Early out. 2179 2180 // Special case decrementing a value (ADD X, -1): 2181 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) 2182 if (CRHS->isAllOnesValue()) { 2183 APInt KnownZero, KnownOne; 2184 APInt Mask = APInt::getAllOnesValue(VTBits); 2185 ComputeMaskedBits(Op.getOperand(0), Mask, KnownZero, KnownOne, Depth+1); 2186 2187 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2188 // sign bits set. 2189 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2190 return VTBits; 2191 2192 // If we are subtracting one from a positive number, there is no carry 2193 // out of the result. 2194 if (KnownZero.isNegative()) 2195 return Tmp; 2196 } 2197 2198 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2199 if (Tmp2 == 1) return 1; 2200 return std::min(Tmp, Tmp2)-1; 2201 break; 2202 2203 case ISD::SUB: 2204 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1); 2205 if (Tmp2 == 1) return 1; 2206 2207 // Handle NEG. 2208 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) 2209 if (CLHS->isNullValue()) { 2210 APInt KnownZero, KnownOne; 2211 APInt Mask = APInt::getAllOnesValue(VTBits); 2212 ComputeMaskedBits(Op.getOperand(1), Mask, KnownZero, KnownOne, Depth+1); 2213 // If the input is known to be 0 or 1, the output is 0/-1, which is all 2214 // sign bits set. 2215 if ((KnownZero | APInt(VTBits, 1)) == Mask) 2216 return VTBits; 2217 2218 // If the input is known to be positive (the sign bit is known clear), 2219 // the output of the NEG has the same number of sign bits as the input. 2220 if (KnownZero.isNegative()) 2221 return Tmp2; 2222 2223 // Otherwise, we treat this like a SUB. 2224 } 2225 2226 // Sub can have at most one carry bit. Thus we know that the output 2227 // is, at worst, one more bit than the inputs. 2228 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1); 2229 if (Tmp == 1) return 1; // Early out. 2230 return std::min(Tmp, Tmp2)-1; 2231 break; 2232 case ISD::TRUNCATE: 2233 // FIXME: it's tricky to do anything useful for this, but it is an important 2234 // case for targets like X86. 2235 break; 2236 } 2237 2238 // Handle LOADX separately here. EXTLOAD case will fallthrough. 2239 if (Op.getOpcode() == ISD::LOAD) { 2240 LoadSDNode *LD = cast<LoadSDNode>(Op); 2241 unsigned ExtType = LD->getExtensionType(); 2242 switch (ExtType) { 2243 default: break; 2244 case ISD::SEXTLOAD: // '17' bits known 2245 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2246 return VTBits-Tmp+1; 2247 case ISD::ZEXTLOAD: // '16' bits known 2248 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits(); 2249 return VTBits-Tmp; 2250 } 2251 } 2252 2253 // Allow the target to implement this method for its nodes. 2254 if (Op.getOpcode() >= ISD::BUILTIN_OP_END || 2255 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || 2256 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN || 2257 Op.getOpcode() == ISD::INTRINSIC_VOID) { 2258 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth); 2259 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits); 2260 } 2261 2262 // Finally, if we can prove that the top bits of the result are 0's or 1's, 2263 // use this information. 2264 APInt KnownZero, KnownOne; 2265 APInt Mask = APInt::getAllOnesValue(VTBits); 2266 ComputeMaskedBits(Op, Mask, KnownZero, KnownOne, Depth); 2267 2268 if (KnownZero.isNegative()) { // sign bit is 0 2269 Mask = KnownZero; 2270 } else if (KnownOne.isNegative()) { // sign bit is 1; 2271 Mask = KnownOne; 2272 } else { 2273 // Nothing known. 2274 return FirstAnswer; 2275 } 2276 2277 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine 2278 // the number of identical bits in the top of the input value. 2279 Mask = ~Mask; 2280 Mask <<= Mask.getBitWidth()-VTBits; 2281 // Return # leading zeros. We use 'min' here in case Val was zero before 2282 // shifting. We don't want to return '64' as for an i32 "0". 2283 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros())); 2284} 2285 2286/// isBaseWithConstantOffset - Return true if the specified operand is an 2287/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an 2288/// ISD::OR with a ConstantSDNode that is guaranteed to have the same 2289/// semantics as an ADD. This handles the equivalence: 2290/// X|Cst == X+Cst iff X&Cst = 0. 2291bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { 2292 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || 2293 !isa<ConstantSDNode>(Op.getOperand(1))) 2294 return false; 2295 2296 if (Op.getOpcode() == ISD::OR && 2297 !MaskedValueIsZero(Op.getOperand(0), 2298 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue())) 2299 return false; 2300 2301 return true; 2302} 2303 2304 2305bool SelectionDAG::isKnownNeverNaN(SDValue Op) const { 2306 // If we're told that NaNs won't happen, assume they won't. 2307 if (NoNaNsFPMath) 2308 return true; 2309 2310 // If the value is a constant, we can obviously see if it is a NaN or not. 2311 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2312 return !C->getValueAPF().isNaN(); 2313 2314 // TODO: Recognize more cases here. 2315 2316 return false; 2317} 2318 2319bool SelectionDAG::isKnownNeverZero(SDValue Op) const { 2320 // If the value is a constant, we can obviously see if it is a zero or not. 2321 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) 2322 return !C->isZero(); 2323 2324 // TODO: Recognize more cases here. 2325 2326 return false; 2327} 2328 2329bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const { 2330 // Check the obvious case. 2331 if (A == B) return true; 2332 2333 // For for negative and positive zero. 2334 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A)) 2335 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B)) 2336 if (CA->isZero() && CB->isZero()) return true; 2337 2338 // Otherwise they may not be equal. 2339 return false; 2340} 2341 2342bool SelectionDAG::isVerifiedDebugInfoDesc(SDValue Op) const { 2343 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); 2344 if (!GA) return false; 2345 if (GA->getOffset() != 0) return false; 2346 const GlobalVariable *GV = dyn_cast<GlobalVariable>(GA->getGlobal()); 2347 if (!GV) return false; 2348 return MF->getMMI().hasDebugInfo(); 2349} 2350 2351 2352/// getNode - Gets or creates the specified node. 2353/// 2354SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { 2355 FoldingSetNodeID ID; 2356 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0); 2357 void *IP = 0; 2358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2359 return SDValue(E, 0); 2360 2361 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT)); 2362 CSEMap.InsertNode(N, IP); 2363 2364 AllNodes.push_back(N); 2365#ifndef NDEBUG 2366 VerifySDNode(N); 2367#endif 2368 return SDValue(N, 0); 2369} 2370 2371SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 2372 EVT VT, SDValue Operand) { 2373 // Constant fold unary operations with an integer constant operand. 2374 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) { 2375 const APInt &Val = C->getAPIntValue(); 2376 switch (Opcode) { 2377 default: break; 2378 case ISD::SIGN_EXTEND: 2379 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT); 2380 case ISD::ANY_EXTEND: 2381 case ISD::ZERO_EXTEND: 2382 case ISD::TRUNCATE: 2383 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT); 2384 case ISD::UINT_TO_FP: 2385 case ISD::SINT_TO_FP: { 2386 // No compile time operations on ppcf128. 2387 if (VT == MVT::ppcf128) break; 2388 APFloat apf(APInt::getNullValue(VT.getSizeInBits())); 2389 (void)apf.convertFromAPInt(Val, 2390 Opcode==ISD::SINT_TO_FP, 2391 APFloat::rmNearestTiesToEven); 2392 return getConstantFP(apf, VT); 2393 } 2394 case ISD::BITCAST: 2395 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32) 2396 return getConstantFP(Val.bitsToFloat(), VT); 2397 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64) 2398 return getConstantFP(Val.bitsToDouble(), VT); 2399 break; 2400 case ISD::BSWAP: 2401 return getConstant(Val.byteSwap(), VT); 2402 case ISD::CTPOP: 2403 return getConstant(Val.countPopulation(), VT); 2404 case ISD::CTLZ: 2405 return getConstant(Val.countLeadingZeros(), VT); 2406 case ISD::CTTZ: 2407 return getConstant(Val.countTrailingZeros(), VT); 2408 } 2409 } 2410 2411 // Constant fold unary operations with a floating point constant operand. 2412 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) { 2413 APFloat V = C->getValueAPF(); // make copy 2414 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) { 2415 switch (Opcode) { 2416 case ISD::FNEG: 2417 V.changeSign(); 2418 return getConstantFP(V, VT); 2419 case ISD::FABS: 2420 V.clearSign(); 2421 return getConstantFP(V, VT); 2422 case ISD::FP_ROUND: 2423 case ISD::FP_EXTEND: { 2424 bool ignored; 2425 // This can return overflow, underflow, or inexact; we don't care. 2426 // FIXME need to be more flexible about rounding mode. 2427 (void)V.convert(*EVTToAPFloatSemantics(VT), 2428 APFloat::rmNearestTiesToEven, &ignored); 2429 return getConstantFP(V, VT); 2430 } 2431 case ISD::FP_TO_SINT: 2432 case ISD::FP_TO_UINT: { 2433 integerPart x[2]; 2434 bool ignored; 2435 assert(integerPartWidth >= 64); 2436 // FIXME need to be more flexible about rounding mode. 2437 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(), 2438 Opcode==ISD::FP_TO_SINT, 2439 APFloat::rmTowardZero, &ignored); 2440 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual 2441 break; 2442 APInt api(VT.getSizeInBits(), 2, x); 2443 return getConstant(api, VT); 2444 } 2445 case ISD::BITCAST: 2446 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32) 2447 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT); 2448 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64) 2449 return getConstant(V.bitcastToAPInt().getZExtValue(), VT); 2450 break; 2451 } 2452 } 2453 } 2454 2455 unsigned OpOpcode = Operand.getNode()->getOpcode(); 2456 switch (Opcode) { 2457 case ISD::TokenFactor: 2458 case ISD::MERGE_VALUES: 2459 case ISD::CONCAT_VECTORS: 2460 return Operand; // Factor, merge or concat of one node? No need. 2461 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node"); 2462 case ISD::FP_EXTEND: 2463 assert(VT.isFloatingPoint() && 2464 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!"); 2465 if (Operand.getValueType() == VT) return Operand; // noop conversion. 2466 assert((!VT.isVector() || 2467 VT.getVectorNumElements() == 2468 Operand.getValueType().getVectorNumElements()) && 2469 "Vector element count mismatch!"); 2470 if (Operand.getOpcode() == ISD::UNDEF) 2471 return getUNDEF(VT); 2472 break; 2473 case ISD::SIGN_EXTEND: 2474 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2475 "Invalid SIGN_EXTEND!"); 2476 if (Operand.getValueType() == VT) return Operand; // noop extension 2477 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2478 "Invalid sext node, dst < src!"); 2479 assert((!VT.isVector() || 2480 VT.getVectorNumElements() == 2481 Operand.getValueType().getVectorNumElements()) && 2482 "Vector element count mismatch!"); 2483 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) 2484 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2485 else if (OpOpcode == ISD::UNDEF) 2486 // sext(undef) = 0, because the top bits will all be the same. 2487 return getConstant(0, VT); 2488 break; 2489 case ISD::ZERO_EXTEND: 2490 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2491 "Invalid ZERO_EXTEND!"); 2492 if (Operand.getValueType() == VT) return Operand; // noop extension 2493 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2494 "Invalid zext node, dst < src!"); 2495 assert((!VT.isVector() || 2496 VT.getVectorNumElements() == 2497 Operand.getValueType().getVectorNumElements()) && 2498 "Vector element count mismatch!"); 2499 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x) 2500 return getNode(ISD::ZERO_EXTEND, DL, VT, 2501 Operand.getNode()->getOperand(0)); 2502 else if (OpOpcode == ISD::UNDEF) 2503 // zext(undef) = 0, because the top bits will be zero. 2504 return getConstant(0, VT); 2505 break; 2506 case ISD::ANY_EXTEND: 2507 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2508 "Invalid ANY_EXTEND!"); 2509 if (Operand.getValueType() == VT) return Operand; // noop extension 2510 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) && 2511 "Invalid anyext node, dst < src!"); 2512 assert((!VT.isVector() || 2513 VT.getVectorNumElements() == 2514 Operand.getValueType().getVectorNumElements()) && 2515 "Vector element count mismatch!"); 2516 2517 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2518 OpOpcode == ISD::ANY_EXTEND) 2519 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x) 2520 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2521 else if (OpOpcode == ISD::UNDEF) 2522 return getUNDEF(VT); 2523 2524 // (ext (trunx x)) -> x 2525 if (OpOpcode == ISD::TRUNCATE) { 2526 SDValue OpOp = Operand.getNode()->getOperand(0); 2527 if (OpOp.getValueType() == VT) 2528 return OpOp; 2529 } 2530 break; 2531 case ISD::TRUNCATE: 2532 assert(VT.isInteger() && Operand.getValueType().isInteger() && 2533 "Invalid TRUNCATE!"); 2534 if (Operand.getValueType() == VT) return Operand; // noop truncate 2535 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) && 2536 "Invalid truncate node, src < dst!"); 2537 assert((!VT.isVector() || 2538 VT.getVectorNumElements() == 2539 Operand.getValueType().getVectorNumElements()) && 2540 "Vector element count mismatch!"); 2541 if (OpOpcode == ISD::TRUNCATE) 2542 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2543 else if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || 2544 OpOpcode == ISD::ANY_EXTEND) { 2545 // If the source is smaller than the dest, we still need an extend. 2546 if (Operand.getNode()->getOperand(0).getValueType().getScalarType() 2547 .bitsLT(VT.getScalarType())) 2548 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0)); 2549 else if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT)) 2550 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0)); 2551 else 2552 return Operand.getNode()->getOperand(0); 2553 } 2554 break; 2555 case ISD::BITCAST: 2556 // Basic sanity checking. 2557 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits() 2558 && "Cannot BITCAST between types of different sizes!"); 2559 if (VT == Operand.getValueType()) return Operand; // noop conversion. 2560 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x) 2561 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0)); 2562 if (OpOpcode == ISD::UNDEF) 2563 return getUNDEF(VT); 2564 break; 2565 case ISD::SCALAR_TO_VECTOR: 2566 assert(VT.isVector() && !Operand.getValueType().isVector() && 2567 (VT.getVectorElementType() == Operand.getValueType() || 2568 (VT.getVectorElementType().isInteger() && 2569 Operand.getValueType().isInteger() && 2570 VT.getVectorElementType().bitsLE(Operand.getValueType()))) && 2571 "Illegal SCALAR_TO_VECTOR node!"); 2572 if (OpOpcode == ISD::UNDEF) 2573 return getUNDEF(VT); 2574 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined. 2575 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT && 2576 isa<ConstantSDNode>(Operand.getOperand(1)) && 2577 Operand.getConstantOperandVal(1) == 0 && 2578 Operand.getOperand(0).getValueType() == VT) 2579 return Operand.getOperand(0); 2580 break; 2581 case ISD::FNEG: 2582 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0 2583 if (UnsafeFPMath && OpOpcode == ISD::FSUB) 2584 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1), 2585 Operand.getNode()->getOperand(0)); 2586 if (OpOpcode == ISD::FNEG) // --X -> X 2587 return Operand.getNode()->getOperand(0); 2588 break; 2589 case ISD::FABS: 2590 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X) 2591 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); 2592 break; 2593 } 2594 2595 SDNode *N; 2596 SDVTList VTs = getVTList(VT); 2597 if (VT != MVT::Glue) { // Don't CSE flag producing nodes 2598 FoldingSetNodeID ID; 2599 SDValue Ops[1] = { Operand }; 2600 AddNodeIDNode(ID, Opcode, VTs, Ops, 1); 2601 void *IP = 0; 2602 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 2603 return SDValue(E, 0); 2604 2605 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2606 CSEMap.InsertNode(N, IP); 2607 } else { 2608 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand); 2609 } 2610 2611 AllNodes.push_back(N); 2612#ifndef NDEBUG 2613 VerifySDNode(N); 2614#endif 2615 return SDValue(N, 0); 2616} 2617 2618SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, 2619 EVT VT, 2620 ConstantSDNode *Cst1, 2621 ConstantSDNode *Cst2) { 2622 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue(); 2623 2624 switch (Opcode) { 2625 case ISD::ADD: return getConstant(C1 + C2, VT); 2626 case ISD::SUB: return getConstant(C1 - C2, VT); 2627 case ISD::MUL: return getConstant(C1 * C2, VT); 2628 case ISD::UDIV: 2629 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT); 2630 break; 2631 case ISD::UREM: 2632 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT); 2633 break; 2634 case ISD::SDIV: 2635 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT); 2636 break; 2637 case ISD::SREM: 2638 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT); 2639 break; 2640 case ISD::AND: return getConstant(C1 & C2, VT); 2641 case ISD::OR: return getConstant(C1 | C2, VT); 2642 case ISD::XOR: return getConstant(C1 ^ C2, VT); 2643 case ISD::SHL: return getConstant(C1 << C2, VT); 2644 case ISD::SRL: return getConstant(C1.lshr(C2), VT); 2645 case ISD::SRA: return getConstant(C1.ashr(C2), VT); 2646 case ISD::ROTL: return getConstant(C1.rotl(C2), VT); 2647 case ISD::ROTR: return getConstant(C1.rotr(C2), VT); 2648 default: break; 2649 } 2650 2651 return SDValue(); 2652} 2653 2654SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 2655 SDValue N1, SDValue N2) { 2656 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 2657 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode()); 2658 switch (Opcode) { 2659 default: break; 2660 case ISD::TokenFactor: 2661 assert(VT == MVT::Other && N1.getValueType() == MVT::Other && 2662 N2.getValueType() == MVT::Other && "Invalid token factor!"); 2663 // Fold trivial token factors. 2664 if (N1.getOpcode() == ISD::EntryToken) return N2; 2665 if (N2.getOpcode() == ISD::EntryToken) return N1; 2666 if (N1 == N2) return N1; 2667 break; 2668 case ISD::CONCAT_VECTORS: 2669 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 2670 // one big BUILD_VECTOR. 2671 if (N1.getOpcode() == ISD::BUILD_VECTOR && 2672 N2.getOpcode() == ISD::BUILD_VECTOR) { 2673 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 2674 N1.getNode()->op_end()); 2675 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 2676 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 2677 } 2678 break; 2679 case ISD::AND: 2680 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2681 assert(N1.getValueType() == N2.getValueType() && 2682 N1.getValueType() == VT && "Binary operator types must match!"); 2683 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's 2684 // worth handling here. 2685 if (N2C && N2C->isNullValue()) 2686 return N2; 2687 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X 2688 return N1; 2689 break; 2690 case ISD::OR: 2691 case ISD::XOR: 2692 case ISD::ADD: 2693 case ISD::SUB: 2694 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2695 assert(N1.getValueType() == N2.getValueType() && 2696 N1.getValueType() == VT && "Binary operator types must match!"); 2697 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so 2698 // it's worth handling here. 2699 if (N2C && N2C->isNullValue()) 2700 return N1; 2701 break; 2702 case ISD::UDIV: 2703 case ISD::UREM: 2704 case ISD::MULHU: 2705 case ISD::MULHS: 2706 case ISD::MUL: 2707 case ISD::SDIV: 2708 case ISD::SREM: 2709 assert(VT.isInteger() && "This operator does not apply to FP types!"); 2710 assert(N1.getValueType() == N2.getValueType() && 2711 N1.getValueType() == VT && "Binary operator types must match!"); 2712 break; 2713 case ISD::FADD: 2714 case ISD::FSUB: 2715 case ISD::FMUL: 2716 case ISD::FDIV: 2717 case ISD::FREM: 2718 if (UnsafeFPMath) { 2719 if (Opcode == ISD::FADD) { 2720 // 0+x --> x 2721 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) 2722 if (CFP->getValueAPF().isZero()) 2723 return N2; 2724 // x+0 --> x 2725 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2726 if (CFP->getValueAPF().isZero()) 2727 return N1; 2728 } else if (Opcode == ISD::FSUB) { 2729 // x-0 --> x 2730 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2)) 2731 if (CFP->getValueAPF().isZero()) 2732 return N1; 2733 } 2734 } 2735 assert(VT.isFloatingPoint() && "This operator only applies to FP types!"); 2736 assert(N1.getValueType() == N2.getValueType() && 2737 N1.getValueType() == VT && "Binary operator types must match!"); 2738 break; 2739 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match. 2740 assert(N1.getValueType() == VT && 2741 N1.getValueType().isFloatingPoint() && 2742 N2.getValueType().isFloatingPoint() && 2743 "Invalid FCOPYSIGN!"); 2744 break; 2745 case ISD::SHL: 2746 case ISD::SRA: 2747 case ISD::SRL: 2748 case ISD::ROTL: 2749 case ISD::ROTR: 2750 assert(VT == N1.getValueType() && 2751 "Shift operators return type must be the same as their first arg"); 2752 assert(VT.isInteger() && N2.getValueType().isInteger() && 2753 "Shifts only work on integers"); 2754 // Verify that the shift amount VT is bit enough to hold valid shift 2755 // amounts. This catches things like trying to shift an i1024 value by an 2756 // i8, which is easy to fall into in generic code that uses 2757 // TLI.getShiftAmount(). 2758 assert(N2.getValueType().getSizeInBits() >= 2759 Log2_32_Ceil(N1.getValueType().getSizeInBits()) && 2760 "Invalid use of small shift amount with oversized value!"); 2761 2762 // Always fold shifts of i1 values so the code generator doesn't need to 2763 // handle them. Since we know the size of the shift has to be less than the 2764 // size of the value, the shift/rotate count is guaranteed to be zero. 2765 if (VT == MVT::i1) 2766 return N1; 2767 if (N2C && N2C->isNullValue()) 2768 return N1; 2769 break; 2770 case ISD::FP_ROUND_INREG: { 2771 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2772 assert(VT == N1.getValueType() && "Not an inreg round!"); 2773 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() && 2774 "Cannot FP_ROUND_INREG integer types"); 2775 assert(EVT.isVector() == VT.isVector() && 2776 "FP_ROUND_INREG type should be vector iff the operand " 2777 "type is vector!"); 2778 assert((!EVT.isVector() || 2779 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2780 "Vector element counts must match in FP_ROUND_INREG"); 2781 assert(EVT.bitsLE(VT) && "Not rounding down!"); 2782 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. 2783 break; 2784 } 2785 case ISD::FP_ROUND: 2786 assert(VT.isFloatingPoint() && 2787 N1.getValueType().isFloatingPoint() && 2788 VT.bitsLE(N1.getValueType()) && 2789 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!"); 2790 if (N1.getValueType() == VT) return N1; // noop conversion. 2791 break; 2792 case ISD::AssertSext: 2793 case ISD::AssertZext: { 2794 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2795 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2796 assert(VT.isInteger() && EVT.isInteger() && 2797 "Cannot *_EXTEND_INREG FP types"); 2798 assert(!EVT.isVector() && 2799 "AssertSExt/AssertZExt type should be the vector element type " 2800 "rather than the vector type!"); 2801 assert(EVT.bitsLE(VT) && "Not extending!"); 2802 if (VT == EVT) return N1; // noop assertion. 2803 break; 2804 } 2805 case ISD::SIGN_EXTEND_INREG: { 2806 EVT EVT = cast<VTSDNode>(N2)->getVT(); 2807 assert(VT == N1.getValueType() && "Not an inreg extend!"); 2808 assert(VT.isInteger() && EVT.isInteger() && 2809 "Cannot *_EXTEND_INREG FP types"); 2810 assert(EVT.isVector() == VT.isVector() && 2811 "SIGN_EXTEND_INREG type should be vector iff the operand " 2812 "type is vector!"); 2813 assert((!EVT.isVector() || 2814 EVT.getVectorNumElements() == VT.getVectorNumElements()) && 2815 "Vector element counts must match in SIGN_EXTEND_INREG"); 2816 assert(EVT.bitsLE(VT) && "Not extending!"); 2817 if (EVT == VT) return N1; // Not actually extending 2818 2819 if (N1C) { 2820 APInt Val = N1C->getAPIntValue(); 2821 unsigned FromBits = EVT.getScalarType().getSizeInBits(); 2822 Val <<= Val.getBitWidth()-FromBits; 2823 Val = Val.ashr(Val.getBitWidth()-FromBits); 2824 return getConstant(Val, VT); 2825 } 2826 break; 2827 } 2828 case ISD::EXTRACT_VECTOR_ELT: 2829 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF. 2830 if (N1.getOpcode() == ISD::UNDEF) 2831 return getUNDEF(VT); 2832 2833 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is 2834 // expanding copies of large vectors from registers. 2835 if (N2C && 2836 N1.getOpcode() == ISD::CONCAT_VECTORS && 2837 N1.getNumOperands() > 0) { 2838 unsigned Factor = 2839 N1.getOperand(0).getValueType().getVectorNumElements(); 2840 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, 2841 N1.getOperand(N2C->getZExtValue() / Factor), 2842 getConstant(N2C->getZExtValue() % Factor, 2843 N2.getValueType())); 2844 } 2845 2846 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is 2847 // expanding large vector constants. 2848 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) { 2849 SDValue Elt = N1.getOperand(N2C->getZExtValue()); 2850 EVT VEltTy = N1.getValueType().getVectorElementType(); 2851 if (Elt.getValueType() != VEltTy) { 2852 // If the vector element type is not legal, the BUILD_VECTOR operands 2853 // are promoted and implicitly truncated. Make that explicit here. 2854 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt); 2855 } 2856 if (VT != VEltTy) { 2857 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT 2858 // result is implicitly extended. 2859 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt); 2860 } 2861 return Elt; 2862 } 2863 2864 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector 2865 // operations are lowered to scalars. 2866 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) { 2867 // If the indices are the same, return the inserted element else 2868 // if the indices are known different, extract the element from 2869 // the original vector. 2870 SDValue N1Op2 = N1.getOperand(2); 2871 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode()); 2872 2873 if (N1Op2C && N2C) { 2874 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) { 2875 if (VT == N1.getOperand(1).getValueType()) 2876 return N1.getOperand(1); 2877 else 2878 return getSExtOrTrunc(N1.getOperand(1), DL, VT); 2879 } 2880 2881 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2); 2882 } 2883 } 2884 break; 2885 case ISD::EXTRACT_ELEMENT: 2886 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!"); 2887 assert(!N1.getValueType().isVector() && !VT.isVector() && 2888 (N1.getValueType().isInteger() == VT.isInteger()) && 2889 "Wrong types for EXTRACT_ELEMENT!"); 2890 2891 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding 2892 // 64-bit integers into 32-bit parts. Instead of building the extract of 2893 // the BUILD_PAIR, only to have legalize rip it apart, just do it now. 2894 if (N1.getOpcode() == ISD::BUILD_PAIR) 2895 return N1.getOperand(N2C->getZExtValue()); 2896 2897 // EXTRACT_ELEMENT of a constant int is also very common. 2898 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) { 2899 unsigned ElementSize = VT.getSizeInBits(); 2900 unsigned Shift = ElementSize * N2C->getZExtValue(); 2901 APInt ShiftedVal = C->getAPIntValue().lshr(Shift); 2902 return getConstant(ShiftedVal.trunc(ElementSize), VT); 2903 } 2904 break; 2905 case ISD::EXTRACT_SUBVECTOR: { 2906 SDValue Index = N2; 2907 if (VT.isSimple() && N1.getValueType().isSimple()) { 2908 assert(VT.isVector() && N1.getValueType().isVector() && 2909 "Extract subvector VTs must be a vectors!"); 2910 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() && 2911 "Extract subvector VTs must have the same element type!"); 2912 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() && 2913 "Extract subvector must be from larger vector to smaller vector!"); 2914 2915 if (isa<ConstantSDNode>(Index.getNode())) { 2916 assert((VT.getVectorNumElements() + 2917 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 2918 <= N1.getValueType().getVectorNumElements()) 2919 && "Extract subvector overflow!"); 2920 } 2921 2922 // Trivial extraction. 2923 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT()) 2924 return N1; 2925 } 2926 break; 2927 } 2928 } 2929 2930 if (N1C) { 2931 if (N2C) { 2932 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C); 2933 if (SV.getNode()) return SV; 2934 } else { // Cannonicalize constant to RHS if commutative 2935 if (isCommutativeBinOp(Opcode)) { 2936 std::swap(N1C, N2C); 2937 std::swap(N1, N2); 2938 } 2939 } 2940 } 2941 2942 // Constant fold FP operations. 2943 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode()); 2944 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode()); 2945 if (N1CFP) { 2946 if (!N2CFP && isCommutativeBinOp(Opcode)) { 2947 // Cannonicalize constant to RHS if commutative 2948 std::swap(N1CFP, N2CFP); 2949 std::swap(N1, N2); 2950 } else if (N2CFP && VT != MVT::ppcf128) { 2951 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF(); 2952 APFloat::opStatus s; 2953 switch (Opcode) { 2954 case ISD::FADD: 2955 s = V1.add(V2, APFloat::rmNearestTiesToEven); 2956 if (s != APFloat::opInvalidOp) 2957 return getConstantFP(V1, VT); 2958 break; 2959 case ISD::FSUB: 2960 s = V1.subtract(V2, APFloat::rmNearestTiesToEven); 2961 if (s!=APFloat::opInvalidOp) 2962 return getConstantFP(V1, VT); 2963 break; 2964 case ISD::FMUL: 2965 s = V1.multiply(V2, APFloat::rmNearestTiesToEven); 2966 if (s!=APFloat::opInvalidOp) 2967 return getConstantFP(V1, VT); 2968 break; 2969 case ISD::FDIV: 2970 s = V1.divide(V2, APFloat::rmNearestTiesToEven); 2971 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2972 return getConstantFP(V1, VT); 2973 break; 2974 case ISD::FREM : 2975 s = V1.mod(V2, APFloat::rmNearestTiesToEven); 2976 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero) 2977 return getConstantFP(V1, VT); 2978 break; 2979 case ISD::FCOPYSIGN: 2980 V1.copySign(V2); 2981 return getConstantFP(V1, VT); 2982 default: break; 2983 } 2984 } 2985 } 2986 2987 // Canonicalize an UNDEF to the RHS, even over a constant. 2988 if (N1.getOpcode() == ISD::UNDEF) { 2989 if (isCommutativeBinOp(Opcode)) { 2990 std::swap(N1, N2); 2991 } else { 2992 switch (Opcode) { 2993 case ISD::FP_ROUND_INREG: 2994 case ISD::SIGN_EXTEND_INREG: 2995 case ISD::SUB: 2996 case ISD::FSUB: 2997 case ISD::FDIV: 2998 case ISD::FREM: 2999 case ISD::SRA: 3000 return N1; // fold op(undef, arg2) -> undef 3001 case ISD::UDIV: 3002 case ISD::SDIV: 3003 case ISD::UREM: 3004 case ISD::SREM: 3005 case ISD::SRL: 3006 case ISD::SHL: 3007 if (!VT.isVector()) 3008 return getConstant(0, VT); // fold op(undef, arg2) -> 0 3009 // For vectors, we can't easily build an all zero vector, just return 3010 // the LHS. 3011 return N2; 3012 } 3013 } 3014 } 3015 3016 // Fold a bunch of operators when the RHS is undef. 3017 if (N2.getOpcode() == ISD::UNDEF) { 3018 switch (Opcode) { 3019 case ISD::XOR: 3020 if (N1.getOpcode() == ISD::UNDEF) 3021 // Handle undef ^ undef -> 0 special case. This is a common 3022 // idiom (misuse). 3023 return getConstant(0, VT); 3024 // fallthrough 3025 case ISD::ADD: 3026 case ISD::ADDC: 3027 case ISD::ADDE: 3028 case ISD::SUB: 3029 case ISD::UDIV: 3030 case ISD::SDIV: 3031 case ISD::UREM: 3032 case ISD::SREM: 3033 return N2; // fold op(arg1, undef) -> undef 3034 case ISD::FADD: 3035 case ISD::FSUB: 3036 case ISD::FMUL: 3037 case ISD::FDIV: 3038 case ISD::FREM: 3039 if (UnsafeFPMath) 3040 return N2; 3041 break; 3042 case ISD::MUL: 3043 case ISD::AND: 3044 case ISD::SRL: 3045 case ISD::SHL: 3046 if (!VT.isVector()) 3047 return getConstant(0, VT); // fold op(arg1, undef) -> 0 3048 // For vectors, we can't easily build an all zero vector, just return 3049 // the LHS. 3050 return N1; 3051 case ISD::OR: 3052 if (!VT.isVector()) 3053 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT); 3054 // For vectors, we can't easily build an all one vector, just return 3055 // the LHS. 3056 return N1; 3057 case ISD::SRA: 3058 return N1; 3059 } 3060 } 3061 3062 // Memoize this node if possible. 3063 SDNode *N; 3064 SDVTList VTs = getVTList(VT); 3065 if (VT != MVT::Glue) { 3066 SDValue Ops[] = { N1, N2 }; 3067 FoldingSetNodeID ID; 3068 AddNodeIDNode(ID, Opcode, VTs, Ops, 2); 3069 void *IP = 0; 3070 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3071 return SDValue(E, 0); 3072 3073 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3074 CSEMap.InsertNode(N, IP); 3075 } else { 3076 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2); 3077 } 3078 3079 AllNodes.push_back(N); 3080#ifndef NDEBUG 3081 VerifySDNode(N); 3082#endif 3083 return SDValue(N, 0); 3084} 3085 3086SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3087 SDValue N1, SDValue N2, SDValue N3) { 3088 // Perform various simplifications. 3089 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode()); 3090 switch (Opcode) { 3091 case ISD::CONCAT_VECTORS: 3092 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to 3093 // one big BUILD_VECTOR. 3094 if (N1.getOpcode() == ISD::BUILD_VECTOR && 3095 N2.getOpcode() == ISD::BUILD_VECTOR && 3096 N3.getOpcode() == ISD::BUILD_VECTOR) { 3097 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(), 3098 N1.getNode()->op_end()); 3099 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end()); 3100 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end()); 3101 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size()); 3102 } 3103 break; 3104 case ISD::SETCC: { 3105 // Use FoldSetCC to simplify SETCC's. 3106 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL); 3107 if (Simp.getNode()) return Simp; 3108 break; 3109 } 3110 case ISD::SELECT: 3111 if (N1C) { 3112 if (N1C->getZExtValue()) 3113 return N2; // select true, X, Y -> X 3114 else 3115 return N3; // select false, X, Y -> Y 3116 } 3117 3118 if (N2 == N3) return N2; // select C, X, X -> X 3119 break; 3120 case ISD::VECTOR_SHUFFLE: 3121 llvm_unreachable("should use getVectorShuffle constructor!"); 3122 break; 3123 case ISD::INSERT_SUBVECTOR: { 3124 SDValue Index = N3; 3125 if (VT.isSimple() && N1.getValueType().isSimple() 3126 && N2.getValueType().isSimple()) { 3127 assert(VT.isVector() && N1.getValueType().isVector() && 3128 N2.getValueType().isVector() && 3129 "Insert subvector VTs must be a vectors"); 3130 assert(VT == N1.getValueType() && 3131 "Dest and insert subvector source types must match!"); 3132 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() && 3133 "Insert subvector must be from smaller vector to larger vector!"); 3134 if (isa<ConstantSDNode>(Index.getNode())) { 3135 assert((N2.getValueType().getVectorNumElements() + 3136 cast<ConstantSDNode>(Index.getNode())->getZExtValue() 3137 <= VT.getVectorNumElements()) 3138 && "Insert subvector overflow!"); 3139 } 3140 3141 // Trivial insertion. 3142 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT()) 3143 return N2; 3144 } 3145 break; 3146 } 3147 case ISD::BITCAST: 3148 // Fold bit_convert nodes from a type to themselves. 3149 if (N1.getValueType() == VT) 3150 return N1; 3151 break; 3152 } 3153 3154 // Memoize node if it doesn't produce a flag. 3155 SDNode *N; 3156 SDVTList VTs = getVTList(VT); 3157 if (VT != MVT::Glue) { 3158 SDValue Ops[] = { N1, N2, N3 }; 3159 FoldingSetNodeID ID; 3160 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3161 void *IP = 0; 3162 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 3163 return SDValue(E, 0); 3164 3165 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3166 CSEMap.InsertNode(N, IP); 3167 } else { 3168 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3); 3169 } 3170 3171 AllNodes.push_back(N); 3172#ifndef NDEBUG 3173 VerifySDNode(N); 3174#endif 3175 return SDValue(N, 0); 3176} 3177 3178SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3179 SDValue N1, SDValue N2, SDValue N3, 3180 SDValue N4) { 3181 SDValue Ops[] = { N1, N2, N3, N4 }; 3182 return getNode(Opcode, DL, VT, Ops, 4); 3183} 3184 3185SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 3186 SDValue N1, SDValue N2, SDValue N3, 3187 SDValue N4, SDValue N5) { 3188 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 3189 return getNode(Opcode, DL, VT, Ops, 5); 3190} 3191 3192/// getStackArgumentTokenFactor - Compute a TokenFactor to force all 3193/// the incoming stack arguments to be loaded from the stack. 3194SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) { 3195 SmallVector<SDValue, 8> ArgChains; 3196 3197 // Include the original chain at the beginning of the list. When this is 3198 // used by target LowerCall hooks, this helps legalize find the 3199 // CALLSEQ_BEGIN node. 3200 ArgChains.push_back(Chain); 3201 3202 // Add a chain value for each stack argument. 3203 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(), 3204 UE = getEntryNode().getNode()->use_end(); U != UE; ++U) 3205 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 3206 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 3207 if (FI->getIndex() < 0) 3208 ArgChains.push_back(SDValue(L, 1)); 3209 3210 // Build a tokenfactor for all the chains. 3211 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other, 3212 &ArgChains[0], ArgChains.size()); 3213} 3214 3215/// SplatByte - Distribute ByteVal over NumBits bits. 3216static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) { 3217 APInt Val = APInt(NumBits, ByteVal); 3218 unsigned Shift = 8; 3219 for (unsigned i = NumBits; i > 8; i >>= 1) { 3220 Val = (Val << Shift) | Val; 3221 Shift <<= 1; 3222 } 3223 return Val; 3224} 3225 3226/// getMemsetValue - Vectorized representation of the memset value 3227/// operand. 3228static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, 3229 DebugLoc dl) { 3230 assert(Value.getOpcode() != ISD::UNDEF); 3231 3232 unsigned NumBits = VT.getScalarType().getSizeInBits(); 3233 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) { 3234 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255); 3235 if (VT.isInteger()) 3236 return DAG.getConstant(Val, VT); 3237 return DAG.getConstantFP(APFloat(Val), VT); 3238 } 3239 3240 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value); 3241 if (NumBits > 8) { 3242 // Use a multiplication with 0x010101... to extend the input to the 3243 // required length. 3244 APInt Magic = SplatByte(NumBits, 0x01); 3245 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT)); 3246 } 3247 3248 return Value; 3249} 3250 3251/// getMemsetStringVal - Similar to getMemsetValue. Except this is only 3252/// used when a memcpy is turned into a memset when the source is a constant 3253/// string ptr. 3254static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG, 3255 const TargetLowering &TLI, 3256 std::string &Str, unsigned Offset) { 3257 // Handle vector with all elements zero. 3258 if (Str.empty()) { 3259 if (VT.isInteger()) 3260 return DAG.getConstant(0, VT); 3261 else if (VT == MVT::f32 || VT == MVT::f64) 3262 return DAG.getConstantFP(0.0, VT); 3263 else if (VT.isVector()) { 3264 unsigned NumElts = VT.getVectorNumElements(); 3265 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 3266 return DAG.getNode(ISD::BITCAST, dl, VT, 3267 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(), 3268 EltVT, NumElts))); 3269 } else 3270 llvm_unreachable("Expected type!"); 3271 } 3272 3273 assert(!VT.isVector() && "Can't handle vector type here!"); 3274 unsigned NumBits = VT.getSizeInBits(); 3275 unsigned MSB = NumBits / 8; 3276 uint64_t Val = 0; 3277 if (TLI.isLittleEndian()) 3278 Offset = Offset + MSB - 1; 3279 for (unsigned i = 0; i != MSB; ++i) { 3280 Val = (Val << 8) | (unsigned char)Str[Offset]; 3281 Offset += TLI.isLittleEndian() ? -1 : 1; 3282 } 3283 return DAG.getConstant(Val, VT); 3284} 3285 3286/// getMemBasePlusOffset - Returns base and offset node for the 3287/// 3288static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, 3289 SelectionDAG &DAG) { 3290 EVT VT = Base.getValueType(); 3291 return DAG.getNode(ISD::ADD, Base.getDebugLoc(), 3292 VT, Base, DAG.getConstant(Offset, VT)); 3293} 3294 3295/// isMemSrcFromString - Returns true if memcpy source is a string constant. 3296/// 3297static bool isMemSrcFromString(SDValue Src, std::string &Str) { 3298 unsigned SrcDelta = 0; 3299 GlobalAddressSDNode *G = NULL; 3300 if (Src.getOpcode() == ISD::GlobalAddress) 3301 G = cast<GlobalAddressSDNode>(Src); 3302 else if (Src.getOpcode() == ISD::ADD && 3303 Src.getOperand(0).getOpcode() == ISD::GlobalAddress && 3304 Src.getOperand(1).getOpcode() == ISD::Constant) { 3305 G = cast<GlobalAddressSDNode>(Src.getOperand(0)); 3306 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue(); 3307 } 3308 if (!G) 3309 return false; 3310 3311 const GlobalVariable *GV = dyn_cast<GlobalVariable>(G->getGlobal()); 3312 if (GV && GetConstantStringInfo(GV, Str, SrcDelta, false)) 3313 return true; 3314 3315 return false; 3316} 3317 3318/// FindOptimalMemOpLowering - Determines the optimial series memory ops 3319/// to replace the memset / memcpy. Return true if the number of memory ops 3320/// is below the threshold. It returns the types of the sequence of 3321/// memory ops to perform memset / memcpy by reference. 3322static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, 3323 unsigned Limit, uint64_t Size, 3324 unsigned DstAlign, unsigned SrcAlign, 3325 bool NonScalarIntSafe, 3326 bool MemcpyStrSrc, 3327 SelectionDAG &DAG, 3328 const TargetLowering &TLI) { 3329 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3330 "Expecting memcpy / memset source to meet alignment requirement!"); 3331 // If 'SrcAlign' is zero, that means the memory operation does not need load 3332 // the value, i.e. memset or memcpy from constant string. Otherwise, it's 3333 // the inferred alignment of the source. 'DstAlign', on the other hand, is the 3334 // specified alignment of the memory operation. If it is zero, that means 3335 // it's possible to change the alignment of the destination. 'MemcpyStrSrc' 3336 // indicates whether the memcpy source is constant so it does not need to be 3337 // loaded. 3338 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 3339 NonScalarIntSafe, MemcpyStrSrc, 3340 DAG.getMachineFunction()); 3341 3342 if (VT == MVT::Other) { 3343 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() || 3344 TLI.allowsUnalignedMemoryAccesses(VT)) { 3345 VT = TLI.getPointerTy(); 3346 } else { 3347 switch (DstAlign & 7) { 3348 case 0: VT = MVT::i64; break; 3349 case 4: VT = MVT::i32; break; 3350 case 2: VT = MVT::i16; break; 3351 default: VT = MVT::i8; break; 3352 } 3353 } 3354 3355 MVT LVT = MVT::i64; 3356 while (!TLI.isTypeLegal(LVT)) 3357 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1); 3358 assert(LVT.isInteger()); 3359 3360 if (VT.bitsGT(LVT)) 3361 VT = LVT; 3362 } 3363 3364 unsigned NumMemOps = 0; 3365 while (Size != 0) { 3366 unsigned VTSize = VT.getSizeInBits() / 8; 3367 while (VTSize > Size) { 3368 // For now, only use non-vector load / store's for the left-over pieces. 3369 if (VT.isVector() || VT.isFloatingPoint()) { 3370 VT = MVT::i64; 3371 while (!TLI.isTypeLegal(VT)) 3372 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3373 VTSize = VT.getSizeInBits() / 8; 3374 } else { 3375 // This can result in a type that is not legal on the target, e.g. 3376 // 1 or 2 bytes on PPC. 3377 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1); 3378 VTSize >>= 1; 3379 } 3380 } 3381 3382 if (++NumMemOps > Limit) 3383 return false; 3384 MemOps.push_back(VT); 3385 Size -= VTSize; 3386 } 3387 3388 return true; 3389} 3390 3391static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3392 SDValue Chain, SDValue Dst, 3393 SDValue Src, uint64_t Size, 3394 unsigned Align, bool isVol, 3395 bool AlwaysInline, 3396 MachinePointerInfo DstPtrInfo, 3397 MachinePointerInfo SrcPtrInfo) { 3398 // Turn a memcpy of undef to nop. 3399 if (Src.getOpcode() == ISD::UNDEF) 3400 return Chain; 3401 3402 // Expand memcpy to a series of load and store ops if the size operand falls 3403 // below a certain threshold. 3404 // TODO: In the AlwaysInline case, if the size is big then generate a loop 3405 // rather than maybe a humongous number of loads and stores. 3406 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3407 std::vector<EVT> MemOps; 3408 bool DstAlignCanChange = false; 3409 MachineFunction &MF = DAG.getMachineFunction(); 3410 MachineFrameInfo *MFI = MF.getFrameInfo(); 3411 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3412 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3413 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3414 DstAlignCanChange = true; 3415 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3416 if (Align > SrcAlign) 3417 SrcAlign = Align; 3418 std::string Str; 3419 bool CopyFromStr = isMemSrcFromString(Src, Str); 3420 bool isZeroStr = CopyFromStr && Str.empty(); 3421 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize); 3422 3423 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3424 (DstAlignCanChange ? 0 : Align), 3425 (isZeroStr ? 0 : SrcAlign), 3426 true, CopyFromStr, DAG, TLI)) 3427 return SDValue(); 3428 3429 if (DstAlignCanChange) { 3430 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3431 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3432 if (NewAlign > Align) { 3433 // Give the stack frame object a larger alignment if needed. 3434 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3435 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3436 Align = NewAlign; 3437 } 3438 } 3439 3440 SmallVector<SDValue, 8> OutChains; 3441 unsigned NumMemOps = MemOps.size(); 3442 uint64_t SrcOff = 0, DstOff = 0; 3443 for (unsigned i = 0; i != NumMemOps; ++i) { 3444 EVT VT = MemOps[i]; 3445 unsigned VTSize = VT.getSizeInBits() / 8; 3446 SDValue Value, Store; 3447 3448 if (CopyFromStr && 3449 (isZeroStr || (VT.isInteger() && !VT.isVector()))) { 3450 // It's unlikely a store of a vector immediate can be done in a single 3451 // instruction. It would require a load from a constantpool first. 3452 // We only handle zero vectors here. 3453 // FIXME: Handle other cases where store of vector immediate is done in 3454 // a single instruction. 3455 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str, SrcOff); 3456 Store = DAG.getStore(Chain, dl, Value, 3457 getMemBasePlusOffset(Dst, DstOff, DAG), 3458 DstPtrInfo.getWithOffset(DstOff), isVol, 3459 false, Align); 3460 } else { 3461 // The type might not be legal for the target. This should only happen 3462 // if the type is smaller than a legal type, as on PPC, so the right 3463 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify 3464 // to Load/Store if NVT==VT. 3465 // FIXME does the case above also need this? 3466 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT); 3467 assert(NVT.bitsGE(VT)); 3468 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain, 3469 getMemBasePlusOffset(Src, SrcOff, DAG), 3470 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false, 3471 MinAlign(SrcAlign, SrcOff)); 3472 Store = DAG.getTruncStore(Chain, dl, Value, 3473 getMemBasePlusOffset(Dst, DstOff, DAG), 3474 DstPtrInfo.getWithOffset(DstOff), VT, isVol, 3475 false, Align); 3476 } 3477 OutChains.push_back(Store); 3478 SrcOff += VTSize; 3479 DstOff += VTSize; 3480 } 3481 3482 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3483 &OutChains[0], OutChains.size()); 3484} 3485 3486static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl, 3487 SDValue Chain, SDValue Dst, 3488 SDValue Src, uint64_t Size, 3489 unsigned Align, bool isVol, 3490 bool AlwaysInline, 3491 MachinePointerInfo DstPtrInfo, 3492 MachinePointerInfo SrcPtrInfo) { 3493 // Turn a memmove of undef to nop. 3494 if (Src.getOpcode() == ISD::UNDEF) 3495 return Chain; 3496 3497 // Expand memmove to a series of load and store ops if the size operand falls 3498 // below a certain threshold. 3499 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3500 std::vector<EVT> MemOps; 3501 bool DstAlignCanChange = false; 3502 MachineFunction &MF = DAG.getMachineFunction(); 3503 MachineFrameInfo *MFI = MF.getFrameInfo(); 3504 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3505 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3506 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3507 DstAlignCanChange = true; 3508 unsigned SrcAlign = DAG.InferPtrAlignment(Src); 3509 if (Align > SrcAlign) 3510 SrcAlign = Align; 3511 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize); 3512 3513 if (!FindOptimalMemOpLowering(MemOps, Limit, Size, 3514 (DstAlignCanChange ? 0 : Align), 3515 SrcAlign, true, false, DAG, TLI)) 3516 return SDValue(); 3517 3518 if (DstAlignCanChange) { 3519 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3520 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3521 if (NewAlign > Align) { 3522 // Give the stack frame object a larger alignment if needed. 3523 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3524 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3525 Align = NewAlign; 3526 } 3527 } 3528 3529 uint64_t SrcOff = 0, DstOff = 0; 3530 SmallVector<SDValue, 8> LoadValues; 3531 SmallVector<SDValue, 8> LoadChains; 3532 SmallVector<SDValue, 8> OutChains; 3533 unsigned NumMemOps = MemOps.size(); 3534 for (unsigned i = 0; i < NumMemOps; i++) { 3535 EVT VT = MemOps[i]; 3536 unsigned VTSize = VT.getSizeInBits() / 8; 3537 SDValue Value, Store; 3538 3539 Value = DAG.getLoad(VT, dl, Chain, 3540 getMemBasePlusOffset(Src, SrcOff, DAG), 3541 SrcPtrInfo.getWithOffset(SrcOff), isVol, 3542 false, SrcAlign); 3543 LoadValues.push_back(Value); 3544 LoadChains.push_back(Value.getValue(1)); 3545 SrcOff += VTSize; 3546 } 3547 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3548 &LoadChains[0], LoadChains.size()); 3549 OutChains.clear(); 3550 for (unsigned i = 0; i < NumMemOps; i++) { 3551 EVT VT = MemOps[i]; 3552 unsigned VTSize = VT.getSizeInBits() / 8; 3553 SDValue Value, Store; 3554 3555 Store = DAG.getStore(Chain, dl, LoadValues[i], 3556 getMemBasePlusOffset(Dst, DstOff, DAG), 3557 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align); 3558 OutChains.push_back(Store); 3559 DstOff += VTSize; 3560 } 3561 3562 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3563 &OutChains[0], OutChains.size()); 3564} 3565 3566static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl, 3567 SDValue Chain, SDValue Dst, 3568 SDValue Src, uint64_t Size, 3569 unsigned Align, bool isVol, 3570 MachinePointerInfo DstPtrInfo) { 3571 // Turn a memset of undef to nop. 3572 if (Src.getOpcode() == ISD::UNDEF) 3573 return Chain; 3574 3575 // Expand memset to a series of load/store ops if the size operand 3576 // falls below a certain threshold. 3577 const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 3578 std::vector<EVT> MemOps; 3579 bool DstAlignCanChange = false; 3580 MachineFunction &MF = DAG.getMachineFunction(); 3581 MachineFrameInfo *MFI = MF.getFrameInfo(); 3582 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize); 3583 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3584 if (FI && !MFI->isFixedObjectIndex(FI->getIndex())) 3585 DstAlignCanChange = true; 3586 bool NonScalarIntSafe = 3587 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue(); 3588 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize), 3589 Size, (DstAlignCanChange ? 0 : Align), 0, 3590 NonScalarIntSafe, false, DAG, TLI)) 3591 return SDValue(); 3592 3593 if (DstAlignCanChange) { 3594 const Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext()); 3595 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty); 3596 if (NewAlign > Align) { 3597 // Give the stack frame object a larger alignment if needed. 3598 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign) 3599 MFI->setObjectAlignment(FI->getIndex(), NewAlign); 3600 Align = NewAlign; 3601 } 3602 } 3603 3604 SmallVector<SDValue, 8> OutChains; 3605 uint64_t DstOff = 0; 3606 unsigned NumMemOps = MemOps.size(); 3607 3608 // Find the largest store and generate the bit pattern for it. 3609 EVT LargestVT = MemOps[0]; 3610 for (unsigned i = 1; i < NumMemOps; i++) 3611 if (MemOps[i].bitsGT(LargestVT)) 3612 LargestVT = MemOps[i]; 3613 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl); 3614 3615 for (unsigned i = 0; i < NumMemOps; i++) { 3616 EVT VT = MemOps[i]; 3617 3618 // If this store is smaller than the largest store see whether we can get 3619 // the smaller value for free with a truncate. 3620 SDValue Value = MemSetValue; 3621 if (VT.bitsLT(LargestVT)) { 3622 if (!LargestVT.isVector() && !VT.isVector() && 3623 TLI.isTruncateFree(LargestVT, VT)) 3624 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue); 3625 else 3626 Value = getMemsetValue(Src, VT, DAG, dl); 3627 } 3628 assert(Value.getValueType() == VT && "Value with wrong type."); 3629 SDValue Store = DAG.getStore(Chain, dl, Value, 3630 getMemBasePlusOffset(Dst, DstOff, DAG), 3631 DstPtrInfo.getWithOffset(DstOff), 3632 isVol, false, Align); 3633 OutChains.push_back(Store); 3634 DstOff += VT.getSizeInBits() / 8; 3635 } 3636 3637 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, 3638 &OutChains[0], OutChains.size()); 3639} 3640 3641SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst, 3642 SDValue Src, SDValue Size, 3643 unsigned Align, bool isVol, bool AlwaysInline, 3644 MachinePointerInfo DstPtrInfo, 3645 MachinePointerInfo SrcPtrInfo) { 3646 3647 // Check to see if we should lower the memcpy to loads and stores first. 3648 // For cases within the target-specified limits, this is the best choice. 3649 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3650 if (ConstantSize) { 3651 // Memcpy with size zero? Just return the original chain. 3652 if (ConstantSize->isNullValue()) 3653 return Chain; 3654 3655 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3656 ConstantSize->getZExtValue(),Align, 3657 isVol, false, DstPtrInfo, SrcPtrInfo); 3658 if (Result.getNode()) 3659 return Result; 3660 } 3661 3662 // Then check to see if we should lower the memcpy with target-specific 3663 // code. If the target chooses to do this, this is the next best. 3664 SDValue Result = 3665 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align, 3666 isVol, AlwaysInline, 3667 DstPtrInfo, SrcPtrInfo); 3668 if (Result.getNode()) 3669 return Result; 3670 3671 // If we really need inline code and the target declined to provide it, 3672 // use a (potentially long) sequence of loads and stores. 3673 if (AlwaysInline) { 3674 assert(ConstantSize && "AlwaysInline requires a constant size!"); 3675 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src, 3676 ConstantSize->getZExtValue(), Align, isVol, 3677 true, DstPtrInfo, SrcPtrInfo); 3678 } 3679 3680 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc 3681 // memcpy is not guaranteed to be safe. libc memcpys aren't required to 3682 // respect volatile, so they may do things like read or write memory 3683 // beyond the given memory regions. But fixing this isn't easy, and most 3684 // people don't care. 3685 3686 // Emit a library call. 3687 TargetLowering::ArgListTy Args; 3688 TargetLowering::ArgListEntry Entry; 3689 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3690 Entry.Node = Dst; Args.push_back(Entry); 3691 Entry.Node = Src; Args.push_back(Entry); 3692 Entry.Node = Size; Args.push_back(Entry); 3693 // FIXME: pass in DebugLoc 3694 std::pair<SDValue,SDValue> CallResult = 3695 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3696 false, false, false, false, 0, 3697 TLI.getLibcallCallingConv(RTLIB::MEMCPY), false, 3698 /*isReturnValueUsed=*/false, 3699 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY), 3700 TLI.getPointerTy()), 3701 Args, *this, dl); 3702 return CallResult.second; 3703} 3704 3705SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst, 3706 SDValue Src, SDValue Size, 3707 unsigned Align, bool isVol, 3708 MachinePointerInfo DstPtrInfo, 3709 MachinePointerInfo SrcPtrInfo) { 3710 3711 // Check to see if we should lower the memmove to loads and stores first. 3712 // For cases within the target-specified limits, this is the best choice. 3713 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3714 if (ConstantSize) { 3715 // Memmove with size zero? Just return the original chain. 3716 if (ConstantSize->isNullValue()) 3717 return Chain; 3718 3719 SDValue Result = 3720 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src, 3721 ConstantSize->getZExtValue(), Align, isVol, 3722 false, DstPtrInfo, SrcPtrInfo); 3723 if (Result.getNode()) 3724 return Result; 3725 } 3726 3727 // Then check to see if we should lower the memmove with target-specific 3728 // code. If the target chooses to do this, this is the next best. 3729 SDValue Result = 3730 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3731 DstPtrInfo, SrcPtrInfo); 3732 if (Result.getNode()) 3733 return Result; 3734 3735 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may 3736 // not be safe. See memcpy above for more details. 3737 3738 // Emit a library call. 3739 TargetLowering::ArgListTy Args; 3740 TargetLowering::ArgListEntry Entry; 3741 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext()); 3742 Entry.Node = Dst; Args.push_back(Entry); 3743 Entry.Node = Src; Args.push_back(Entry); 3744 Entry.Node = Size; Args.push_back(Entry); 3745 // FIXME: pass in DebugLoc 3746 std::pair<SDValue,SDValue> CallResult = 3747 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3748 false, false, false, false, 0, 3749 TLI.getLibcallCallingConv(RTLIB::MEMMOVE), false, 3750 /*isReturnValueUsed=*/false, 3751 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE), 3752 TLI.getPointerTy()), 3753 Args, *this, dl); 3754 return CallResult.second; 3755} 3756 3757SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst, 3758 SDValue Src, SDValue Size, 3759 unsigned Align, bool isVol, 3760 MachinePointerInfo DstPtrInfo) { 3761 3762 // Check to see if we should lower the memset to stores first. 3763 // For cases within the target-specified limits, this is the best choice. 3764 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size); 3765 if (ConstantSize) { 3766 // Memset with size zero? Just return the original chain. 3767 if (ConstantSize->isNullValue()) 3768 return Chain; 3769 3770 SDValue Result = 3771 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(), 3772 Align, isVol, DstPtrInfo); 3773 3774 if (Result.getNode()) 3775 return Result; 3776 } 3777 3778 // Then check to see if we should lower the memset with target-specific 3779 // code. If the target chooses to do this, this is the next best. 3780 SDValue Result = 3781 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol, 3782 DstPtrInfo); 3783 if (Result.getNode()) 3784 return Result; 3785 3786 // Emit a library call. 3787 const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext()); 3788 TargetLowering::ArgListTy Args; 3789 TargetLowering::ArgListEntry Entry; 3790 Entry.Node = Dst; Entry.Ty = IntPtrTy; 3791 Args.push_back(Entry); 3792 // Extend or truncate the argument to be an i32 value for the call. 3793 if (Src.getValueType().bitsGT(MVT::i32)) 3794 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 3795 else 3796 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); 3797 Entry.Node = Src; 3798 Entry.Ty = Type::getInt32Ty(*getContext()); 3799 Entry.isSExt = true; 3800 Args.push_back(Entry); 3801 Entry.Node = Size; 3802 Entry.Ty = IntPtrTy; 3803 Entry.isSExt = false; 3804 Args.push_back(Entry); 3805 // FIXME: pass in DebugLoc 3806 std::pair<SDValue,SDValue> CallResult = 3807 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()), 3808 false, false, false, false, 0, 3809 TLI.getLibcallCallingConv(RTLIB::MEMSET), false, 3810 /*isReturnValueUsed=*/false, 3811 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET), 3812 TLI.getPointerTy()), 3813 Args, *this, dl); 3814 return CallResult.second; 3815} 3816 3817SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3818 SDValue Chain, SDValue Ptr, SDValue Cmp, 3819 SDValue Swp, MachinePointerInfo PtrInfo, 3820 unsigned Alignment) { 3821 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3822 Alignment = getEVTAlignment(MemVT); 3823 3824 MachineFunction &MF = getMachineFunction(); 3825 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3826 3827 // For now, atomics are considered to be volatile always. 3828 Flags |= MachineMemOperand::MOVolatile; 3829 3830 MachineMemOperand *MMO = 3831 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 3832 3833 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO); 3834} 3835 3836SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3837 SDValue Chain, 3838 SDValue Ptr, SDValue Cmp, 3839 SDValue Swp, MachineMemOperand *MMO) { 3840 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op"); 3841 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types"); 3842 3843 EVT VT = Cmp.getValueType(); 3844 3845 SDVTList VTs = getVTList(VT, MVT::Other); 3846 FoldingSetNodeID ID; 3847 ID.AddInteger(MemVT.getRawBits()); 3848 SDValue Ops[] = {Chain, Ptr, Cmp, Swp}; 3849 AddNodeIDNode(ID, Opcode, VTs, Ops, 4); 3850 void* IP = 0; 3851 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3852 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3853 return SDValue(E, 0); 3854 } 3855 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3856 Ptr, Cmp, Swp, MMO); 3857 CSEMap.InsertNode(N, IP); 3858 AllNodes.push_back(N); 3859 return SDValue(N, 0); 3860} 3861 3862SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3863 SDValue Chain, 3864 SDValue Ptr, SDValue Val, 3865 const Value* PtrVal, 3866 unsigned Alignment) { 3867 if (Alignment == 0) // Ensure that codegen never sees alignment 0 3868 Alignment = getEVTAlignment(MemVT); 3869 3870 MachineFunction &MF = getMachineFunction(); 3871 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore; 3872 3873 // For now, atomics are considered to be volatile always. 3874 Flags |= MachineMemOperand::MOVolatile; 3875 3876 MachineMemOperand *MMO = 3877 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags, 3878 MemVT.getStoreSize(), Alignment); 3879 3880 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO); 3881} 3882 3883SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, 3884 SDValue Chain, 3885 SDValue Ptr, SDValue Val, 3886 MachineMemOperand *MMO) { 3887 assert((Opcode == ISD::ATOMIC_LOAD_ADD || 3888 Opcode == ISD::ATOMIC_LOAD_SUB || 3889 Opcode == ISD::ATOMIC_LOAD_AND || 3890 Opcode == ISD::ATOMIC_LOAD_OR || 3891 Opcode == ISD::ATOMIC_LOAD_XOR || 3892 Opcode == ISD::ATOMIC_LOAD_NAND || 3893 Opcode == ISD::ATOMIC_LOAD_MIN || 3894 Opcode == ISD::ATOMIC_LOAD_MAX || 3895 Opcode == ISD::ATOMIC_LOAD_UMIN || 3896 Opcode == ISD::ATOMIC_LOAD_UMAX || 3897 Opcode == ISD::ATOMIC_SWAP) && 3898 "Invalid Atomic Op"); 3899 3900 EVT VT = Val.getValueType(); 3901 3902 SDVTList VTs = getVTList(VT, MVT::Other); 3903 FoldingSetNodeID ID; 3904 ID.AddInteger(MemVT.getRawBits()); 3905 SDValue Ops[] = {Chain, Ptr, Val}; 3906 AddNodeIDNode(ID, Opcode, VTs, Ops, 3); 3907 void* IP = 0; 3908 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3909 cast<AtomicSDNode>(E)->refineAlignment(MMO); 3910 return SDValue(E, 0); 3911 } 3912 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain, 3913 Ptr, Val, MMO); 3914 CSEMap.InsertNode(N, IP); 3915 AllNodes.push_back(N); 3916 return SDValue(N, 0); 3917} 3918 3919/// getMergeValues - Create a MERGE_VALUES node from the given operands. 3920SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps, 3921 DebugLoc dl) { 3922 if (NumOps == 1) 3923 return Ops[0]; 3924 3925 SmallVector<EVT, 4> VTs; 3926 VTs.reserve(NumOps); 3927 for (unsigned i = 0; i < NumOps; ++i) 3928 VTs.push_back(Ops[i].getValueType()); 3929 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps), 3930 Ops, NumOps); 3931} 3932 3933SDValue 3934SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, 3935 const EVT *VTs, unsigned NumVTs, 3936 const SDValue *Ops, unsigned NumOps, 3937 EVT MemVT, MachinePointerInfo PtrInfo, 3938 unsigned Align, bool Vol, 3939 bool ReadMem, bool WriteMem) { 3940 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps, 3941 MemVT, PtrInfo, Align, Vol, 3942 ReadMem, WriteMem); 3943} 3944 3945SDValue 3946SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3947 const SDValue *Ops, unsigned NumOps, 3948 EVT MemVT, MachinePointerInfo PtrInfo, 3949 unsigned Align, bool Vol, 3950 bool ReadMem, bool WriteMem) { 3951 if (Align == 0) // Ensure that codegen never sees alignment 0 3952 Align = getEVTAlignment(MemVT); 3953 3954 MachineFunction &MF = getMachineFunction(); 3955 unsigned Flags = 0; 3956 if (WriteMem) 3957 Flags |= MachineMemOperand::MOStore; 3958 if (ReadMem) 3959 Flags |= MachineMemOperand::MOLoad; 3960 if (Vol) 3961 Flags |= MachineMemOperand::MOVolatile; 3962 MachineMemOperand *MMO = 3963 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align); 3964 3965 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO); 3966} 3967 3968SDValue 3969SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList, 3970 const SDValue *Ops, unsigned NumOps, 3971 EVT MemVT, MachineMemOperand *MMO) { 3972 assert((Opcode == ISD::INTRINSIC_VOID || 3973 Opcode == ISD::INTRINSIC_W_CHAIN || 3974 Opcode == ISD::PREFETCH || 3975 (Opcode <= INT_MAX && 3976 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) && 3977 "Opcode is not a memory-accessing opcode!"); 3978 3979 // Memoize the node unless it returns a flag. 3980 MemIntrinsicSDNode *N; 3981 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 3982 FoldingSetNodeID ID; 3983 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 3984 void *IP = 0; 3985 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 3986 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO); 3987 return SDValue(E, 0); 3988 } 3989 3990 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3991 MemVT, MMO); 3992 CSEMap.InsertNode(N, IP); 3993 } else { 3994 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps, 3995 MemVT, MMO); 3996 } 3997 AllNodes.push_back(N); 3998 return SDValue(N, 0); 3999} 4000 4001/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4002/// MachinePointerInfo record from it. This is particularly useful because the 4003/// code generator has many cases where it doesn't bother passing in a 4004/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4005static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) { 4006 // If this is FI+Offset, we can model it. 4007 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) 4008 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset); 4009 4010 // If this is (FI+Offset1)+Offset2, we can model it. 4011 if (Ptr.getOpcode() != ISD::ADD || 4012 !isa<ConstantSDNode>(Ptr.getOperand(1)) || 4013 !isa<FrameIndexSDNode>(Ptr.getOperand(0))) 4014 return MachinePointerInfo(); 4015 4016 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 4017 return MachinePointerInfo::getFixedStack(FI, Offset+ 4018 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue()); 4019} 4020 4021/// InferPointerInfo - If the specified ptr/offset is a frame index, infer a 4022/// MachinePointerInfo record from it. This is particularly useful because the 4023/// code generator has many cases where it doesn't bother passing in a 4024/// MachinePointerInfo to getLoad or getStore when it has "FI+Cst". 4025static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) { 4026 // If the 'Offset' value isn't a constant, we can't handle this. 4027 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp)) 4028 return InferPointerInfo(Ptr, OffsetNode->getSExtValue()); 4029 if (OffsetOp.getOpcode() == ISD::UNDEF) 4030 return InferPointerInfo(Ptr); 4031 return MachinePointerInfo(); 4032} 4033 4034 4035SDValue 4036SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4037 EVT VT, DebugLoc dl, SDValue Chain, 4038 SDValue Ptr, SDValue Offset, 4039 MachinePointerInfo PtrInfo, EVT MemVT, 4040 bool isVolatile, bool isNonTemporal, 4041 unsigned Alignment, const MDNode *TBAAInfo) { 4042 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4043 Alignment = getEVTAlignment(VT); 4044 4045 unsigned Flags = MachineMemOperand::MOLoad; 4046 if (isVolatile) 4047 Flags |= MachineMemOperand::MOVolatile; 4048 if (isNonTemporal) 4049 Flags |= MachineMemOperand::MONonTemporal; 4050 4051 // If we don't have a PtrInfo, infer the trivial frame index case to simplify 4052 // clients. 4053 if (PtrInfo.V == 0) 4054 PtrInfo = InferPointerInfo(Ptr, Offset); 4055 4056 MachineFunction &MF = getMachineFunction(); 4057 MachineMemOperand *MMO = 4058 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment, 4059 TBAAInfo); 4060 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO); 4061} 4062 4063SDValue 4064SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, 4065 EVT VT, DebugLoc dl, SDValue Chain, 4066 SDValue Ptr, SDValue Offset, EVT MemVT, 4067 MachineMemOperand *MMO) { 4068 if (VT == MemVT) { 4069 ExtType = ISD::NON_EXTLOAD; 4070 } else if (ExtType == ISD::NON_EXTLOAD) { 4071 assert(VT == MemVT && "Non-extending load from different memory type!"); 4072 } else { 4073 // Extending load. 4074 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) && 4075 "Should only be an extending load, not truncating!"); 4076 assert(VT.isInteger() == MemVT.isInteger() && 4077 "Cannot convert from FP to Int or Int -> FP!"); 4078 assert(VT.isVector() == MemVT.isVector() && 4079 "Cannot use trunc store to convert to or from a vector!"); 4080 assert((!VT.isVector() || 4081 VT.getVectorNumElements() == MemVT.getVectorNumElements()) && 4082 "Cannot use trunc store to change the number of vector elements!"); 4083 } 4084 4085 bool Indexed = AM != ISD::UNINDEXED; 4086 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && 4087 "Unindexed load with an offset!"); 4088 4089 SDVTList VTs = Indexed ? 4090 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other); 4091 SDValue Ops[] = { Chain, Ptr, Offset }; 4092 FoldingSetNodeID ID; 4093 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3); 4094 ID.AddInteger(MemVT.getRawBits()); 4095 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(), 4096 MMO->isNonTemporal())); 4097 void *IP = 0; 4098 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4099 cast<LoadSDNode>(E)->refineAlignment(MMO); 4100 return SDValue(E, 0); 4101 } 4102 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType, 4103 MemVT, MMO); 4104 CSEMap.InsertNode(N, IP); 4105 AllNodes.push_back(N); 4106 return SDValue(N, 0); 4107} 4108 4109SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl, 4110 SDValue Chain, SDValue Ptr, 4111 MachinePointerInfo PtrInfo, 4112 bool isVolatile, bool isNonTemporal, 4113 unsigned Alignment, const MDNode *TBAAInfo) { 4114 SDValue Undef = getUNDEF(Ptr.getValueType()); 4115 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, 4116 PtrInfo, VT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 4117} 4118 4119SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT, 4120 SDValue Chain, SDValue Ptr, 4121 MachinePointerInfo PtrInfo, EVT MemVT, 4122 bool isVolatile, bool isNonTemporal, 4123 unsigned Alignment, const MDNode *TBAAInfo) { 4124 SDValue Undef = getUNDEF(Ptr.getValueType()); 4125 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, 4126 PtrInfo, MemVT, isVolatile, isNonTemporal, Alignment, 4127 TBAAInfo); 4128} 4129 4130 4131SDValue 4132SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base, 4133 SDValue Offset, ISD::MemIndexedMode AM) { 4134 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad); 4135 assert(LD->getOffset().getOpcode() == ISD::UNDEF && 4136 "Load is already a indexed load!"); 4137 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl, 4138 LD->getChain(), Base, Offset, LD->getPointerInfo(), 4139 LD->getMemoryVT(), 4140 LD->isVolatile(), LD->isNonTemporal(), LD->getAlignment()); 4141} 4142 4143SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4144 SDValue Ptr, MachinePointerInfo PtrInfo, 4145 bool isVolatile, bool isNonTemporal, 4146 unsigned Alignment, const MDNode *TBAAInfo) { 4147 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4148 Alignment = getEVTAlignment(Val.getValueType()); 4149 4150 unsigned Flags = MachineMemOperand::MOStore; 4151 if (isVolatile) 4152 Flags |= MachineMemOperand::MOVolatile; 4153 if (isNonTemporal) 4154 Flags |= MachineMemOperand::MONonTemporal; 4155 4156 if (PtrInfo.V == 0) 4157 PtrInfo = InferPointerInfo(Ptr); 4158 4159 MachineFunction &MF = getMachineFunction(); 4160 MachineMemOperand *MMO = 4161 MF.getMachineMemOperand(PtrInfo, Flags, 4162 Val.getValueType().getStoreSize(), Alignment, 4163 TBAAInfo); 4164 4165 return getStore(Chain, dl, Val, Ptr, MMO); 4166} 4167 4168SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val, 4169 SDValue Ptr, MachineMemOperand *MMO) { 4170 EVT VT = Val.getValueType(); 4171 SDVTList VTs = getVTList(MVT::Other); 4172 SDValue Undef = getUNDEF(Ptr.getValueType()); 4173 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4174 FoldingSetNodeID ID; 4175 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4176 ID.AddInteger(VT.getRawBits()); 4177 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), 4178 MMO->isNonTemporal())); 4179 void *IP = 0; 4180 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4181 cast<StoreSDNode>(E)->refineAlignment(MMO); 4182 return SDValue(E, 0); 4183 } 4184 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4185 false, VT, MMO); 4186 CSEMap.InsertNode(N, IP); 4187 AllNodes.push_back(N); 4188 return SDValue(N, 0); 4189} 4190 4191SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4192 SDValue Ptr, MachinePointerInfo PtrInfo, 4193 EVT SVT,bool isVolatile, bool isNonTemporal, 4194 unsigned Alignment, 4195 const MDNode *TBAAInfo) { 4196 if (Alignment == 0) // Ensure that codegen never sees alignment 0 4197 Alignment = getEVTAlignment(SVT); 4198 4199 unsigned Flags = MachineMemOperand::MOStore; 4200 if (isVolatile) 4201 Flags |= MachineMemOperand::MOVolatile; 4202 if (isNonTemporal) 4203 Flags |= MachineMemOperand::MONonTemporal; 4204 4205 if (PtrInfo.V == 0) 4206 PtrInfo = InferPointerInfo(Ptr); 4207 4208 MachineFunction &MF = getMachineFunction(); 4209 MachineMemOperand *MMO = 4210 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment, 4211 TBAAInfo); 4212 4213 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO); 4214} 4215 4216SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val, 4217 SDValue Ptr, EVT SVT, 4218 MachineMemOperand *MMO) { 4219 EVT VT = Val.getValueType(); 4220 4221 if (VT == SVT) 4222 return getStore(Chain, dl, Val, Ptr, MMO); 4223 4224 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) && 4225 "Should only be a truncating store, not extending!"); 4226 assert(VT.isInteger() == SVT.isInteger() && 4227 "Can't do FP-INT conversion!"); 4228 assert(VT.isVector() == SVT.isVector() && 4229 "Cannot use trunc store to convert to or from a vector!"); 4230 assert((!VT.isVector() || 4231 VT.getVectorNumElements() == SVT.getVectorNumElements()) && 4232 "Cannot use trunc store to change the number of vector elements!"); 4233 4234 SDVTList VTs = getVTList(MVT::Other); 4235 SDValue Undef = getUNDEF(Ptr.getValueType()); 4236 SDValue Ops[] = { Chain, Val, Ptr, Undef }; 4237 FoldingSetNodeID ID; 4238 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4239 ID.AddInteger(SVT.getRawBits()); 4240 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), 4241 MMO->isNonTemporal())); 4242 void *IP = 0; 4243 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) { 4244 cast<StoreSDNode>(E)->refineAlignment(MMO); 4245 return SDValue(E, 0); 4246 } 4247 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, 4248 true, SVT, MMO); 4249 CSEMap.InsertNode(N, IP); 4250 AllNodes.push_back(N); 4251 return SDValue(N, 0); 4252} 4253 4254SDValue 4255SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base, 4256 SDValue Offset, ISD::MemIndexedMode AM) { 4257 StoreSDNode *ST = cast<StoreSDNode>(OrigStore); 4258 assert(ST->getOffset().getOpcode() == ISD::UNDEF && 4259 "Store is already a indexed store!"); 4260 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other); 4261 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset }; 4262 FoldingSetNodeID ID; 4263 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4); 4264 ID.AddInteger(ST->getMemoryVT().getRawBits()); 4265 ID.AddInteger(ST->getRawSubclassData()); 4266 void *IP = 0; 4267 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4268 return SDValue(E, 0); 4269 4270 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM, 4271 ST->isTruncatingStore(), 4272 ST->getMemoryVT(), 4273 ST->getMemOperand()); 4274 CSEMap.InsertNode(N, IP); 4275 AllNodes.push_back(N); 4276 return SDValue(N, 0); 4277} 4278 4279SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl, 4280 SDValue Chain, SDValue Ptr, 4281 SDValue SV, 4282 unsigned Align) { 4283 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) }; 4284 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4); 4285} 4286 4287SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4288 const SDUse *Ops, unsigned NumOps) { 4289 switch (NumOps) { 4290 case 0: return getNode(Opcode, DL, VT); 4291 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4292 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4293 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4294 default: break; 4295 } 4296 4297 // Copy from an SDUse array into an SDValue array for use with 4298 // the regular getNode logic. 4299 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps); 4300 return getNode(Opcode, DL, VT, &NewOps[0], NumOps); 4301} 4302 4303SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, 4304 const SDValue *Ops, unsigned NumOps) { 4305 switch (NumOps) { 4306 case 0: return getNode(Opcode, DL, VT); 4307 case 1: return getNode(Opcode, DL, VT, Ops[0]); 4308 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]); 4309 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]); 4310 default: break; 4311 } 4312 4313 switch (Opcode) { 4314 default: break; 4315 case ISD::SELECT_CC: { 4316 assert(NumOps == 5 && "SELECT_CC takes 5 operands!"); 4317 assert(Ops[0].getValueType() == Ops[1].getValueType() && 4318 "LHS and RHS of condition must have same type!"); 4319 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4320 "True and False arms of SelectCC must have same type!"); 4321 assert(Ops[2].getValueType() == VT && 4322 "select_cc node must be of same type as true and false value!"); 4323 break; 4324 } 4325 case ISD::BR_CC: { 4326 assert(NumOps == 5 && "BR_CC takes 5 operands!"); 4327 assert(Ops[2].getValueType() == Ops[3].getValueType() && 4328 "LHS/RHS of comparison should match types!"); 4329 break; 4330 } 4331 } 4332 4333 // Memoize nodes. 4334 SDNode *N; 4335 SDVTList VTs = getVTList(VT); 4336 4337 if (VT != MVT::Glue) { 4338 FoldingSetNodeID ID; 4339 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps); 4340 void *IP = 0; 4341 4342 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4343 return SDValue(E, 0); 4344 4345 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4346 CSEMap.InsertNode(N, IP); 4347 } else { 4348 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps); 4349 } 4350 4351 AllNodes.push_back(N); 4352#ifndef NDEBUG 4353 VerifySDNode(N); 4354#endif 4355 return SDValue(N, 0); 4356} 4357 4358SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4359 const std::vector<EVT> &ResultTys, 4360 const SDValue *Ops, unsigned NumOps) { 4361 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()), 4362 Ops, NumOps); 4363} 4364 4365SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, 4366 const EVT *VTs, unsigned NumVTs, 4367 const SDValue *Ops, unsigned NumOps) { 4368 if (NumVTs == 1) 4369 return getNode(Opcode, DL, VTs[0], Ops, NumOps); 4370 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps); 4371} 4372 4373SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4374 const SDValue *Ops, unsigned NumOps) { 4375 if (VTList.NumVTs == 1) 4376 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps); 4377 4378#if 0 4379 switch (Opcode) { 4380 // FIXME: figure out how to safely handle things like 4381 // int foo(int x) { return 1 << (x & 255); } 4382 // int bar() { return foo(256); } 4383 case ISD::SRA_PARTS: 4384 case ISD::SRL_PARTS: 4385 case ISD::SHL_PARTS: 4386 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG && 4387 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1) 4388 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4389 else if (N3.getOpcode() == ISD::AND) 4390 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { 4391 // If the and is only masking out bits that cannot effect the shift, 4392 // eliminate the and. 4393 unsigned NumBits = VT.getScalarType().getSizeInBits()*2; 4394 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) 4395 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0)); 4396 } 4397 break; 4398 } 4399#endif 4400 4401 // Memoize the node unless it returns a flag. 4402 SDNode *N; 4403 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 4404 FoldingSetNodeID ID; 4405 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 4406 void *IP = 0; 4407 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 4408 return SDValue(E, 0); 4409 4410 if (NumOps == 1) { 4411 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4412 } else if (NumOps == 2) { 4413 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4414 } else if (NumOps == 3) { 4415 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4416 Ops[2]); 4417 } else { 4418 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4419 } 4420 CSEMap.InsertNode(N, IP); 4421 } else { 4422 if (NumOps == 1) { 4423 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]); 4424 } else if (NumOps == 2) { 4425 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]); 4426 } else if (NumOps == 3) { 4427 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1], 4428 Ops[2]); 4429 } else { 4430 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps); 4431 } 4432 } 4433 AllNodes.push_back(N); 4434#ifndef NDEBUG 4435 VerifySDNode(N); 4436#endif 4437 return SDValue(N, 0); 4438} 4439 4440SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) { 4441 return getNode(Opcode, DL, VTList, 0, 0); 4442} 4443 4444SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4445 SDValue N1) { 4446 SDValue Ops[] = { N1 }; 4447 return getNode(Opcode, DL, VTList, Ops, 1); 4448} 4449 4450SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4451 SDValue N1, SDValue N2) { 4452 SDValue Ops[] = { N1, N2 }; 4453 return getNode(Opcode, DL, VTList, Ops, 2); 4454} 4455 4456SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4457 SDValue N1, SDValue N2, SDValue N3) { 4458 SDValue Ops[] = { N1, N2, N3 }; 4459 return getNode(Opcode, DL, VTList, Ops, 3); 4460} 4461 4462SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4463 SDValue N1, SDValue N2, SDValue N3, 4464 SDValue N4) { 4465 SDValue Ops[] = { N1, N2, N3, N4 }; 4466 return getNode(Opcode, DL, VTList, Ops, 4); 4467} 4468 4469SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, 4470 SDValue N1, SDValue N2, SDValue N3, 4471 SDValue N4, SDValue N5) { 4472 SDValue Ops[] = { N1, N2, N3, N4, N5 }; 4473 return getNode(Opcode, DL, VTList, Ops, 5); 4474} 4475 4476SDVTList SelectionDAG::getVTList(EVT VT) { 4477 return makeVTList(SDNode::getValueTypeList(VT), 1); 4478} 4479 4480SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { 4481 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4482 E = VTList.rend(); I != E; ++I) 4483 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2) 4484 return *I; 4485 4486 EVT *Array = Allocator.Allocate<EVT>(2); 4487 Array[0] = VT1; 4488 Array[1] = VT2; 4489 SDVTList Result = makeVTList(Array, 2); 4490 VTList.push_back(Result); 4491 return Result; 4492} 4493 4494SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { 4495 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4496 E = VTList.rend(); I != E; ++I) 4497 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4498 I->VTs[2] == VT3) 4499 return *I; 4500 4501 EVT *Array = Allocator.Allocate<EVT>(3); 4502 Array[0] = VT1; 4503 Array[1] = VT2; 4504 Array[2] = VT3; 4505 SDVTList Result = makeVTList(Array, 3); 4506 VTList.push_back(Result); 4507 return Result; 4508} 4509 4510SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { 4511 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4512 E = VTList.rend(); I != E; ++I) 4513 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 && 4514 I->VTs[2] == VT3 && I->VTs[3] == VT4) 4515 return *I; 4516 4517 EVT *Array = Allocator.Allocate<EVT>(4); 4518 Array[0] = VT1; 4519 Array[1] = VT2; 4520 Array[2] = VT3; 4521 Array[3] = VT4; 4522 SDVTList Result = makeVTList(Array, 4); 4523 VTList.push_back(Result); 4524 return Result; 4525} 4526 4527SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) { 4528 switch (NumVTs) { 4529 case 0: llvm_unreachable("Cannot have nodes without results!"); 4530 case 1: return getVTList(VTs[0]); 4531 case 2: return getVTList(VTs[0], VTs[1]); 4532 case 3: return getVTList(VTs[0], VTs[1], VTs[2]); 4533 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]); 4534 default: break; 4535 } 4536 4537 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(), 4538 E = VTList.rend(); I != E; ++I) { 4539 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1]) 4540 continue; 4541 4542 bool NoMatch = false; 4543 for (unsigned i = 2; i != NumVTs; ++i) 4544 if (VTs[i] != I->VTs[i]) { 4545 NoMatch = true; 4546 break; 4547 } 4548 if (!NoMatch) 4549 return *I; 4550 } 4551 4552 EVT *Array = Allocator.Allocate<EVT>(NumVTs); 4553 std::copy(VTs, VTs+NumVTs, Array); 4554 SDVTList Result = makeVTList(Array, NumVTs); 4555 VTList.push_back(Result); 4556 return Result; 4557} 4558 4559 4560/// UpdateNodeOperands - *Mutate* the specified node in-place to have the 4561/// specified operands. If the resultant node already exists in the DAG, 4562/// this does not modify the specified node, instead it returns the node that 4563/// already exists. If the resultant node does not exist in the DAG, the 4564/// input node is returned. As a degenerate case, if you specify the same 4565/// input operands as the node already has, the input node is returned. 4566SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) { 4567 assert(N->getNumOperands() == 1 && "Update with wrong number of operands"); 4568 4569 // Check to see if there is no change. 4570 if (Op == N->getOperand(0)) return N; 4571 4572 // See if the modified node already exists. 4573 void *InsertPos = 0; 4574 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos)) 4575 return Existing; 4576 4577 // Nope it doesn't. Remove the node from its current place in the maps. 4578 if (InsertPos) 4579 if (!RemoveNodeFromCSEMaps(N)) 4580 InsertPos = 0; 4581 4582 // Now we update the operands. 4583 N->OperandList[0].set(Op); 4584 4585 // If this gets put into a CSE map, add it. 4586 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4587 return N; 4588} 4589 4590SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) { 4591 assert(N->getNumOperands() == 2 && "Update with wrong number of operands"); 4592 4593 // Check to see if there is no change. 4594 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1)) 4595 return N; // No operands changed, just return the input node. 4596 4597 // See if the modified node already exists. 4598 void *InsertPos = 0; 4599 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos)) 4600 return Existing; 4601 4602 // Nope it doesn't. Remove the node from its current place in the maps. 4603 if (InsertPos) 4604 if (!RemoveNodeFromCSEMaps(N)) 4605 InsertPos = 0; 4606 4607 // Now we update the operands. 4608 if (N->OperandList[0] != Op1) 4609 N->OperandList[0].set(Op1); 4610 if (N->OperandList[1] != Op2) 4611 N->OperandList[1].set(Op2); 4612 4613 // If this gets put into a CSE map, add it. 4614 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4615 return N; 4616} 4617 4618SDNode *SelectionDAG:: 4619UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) { 4620 SDValue Ops[] = { Op1, Op2, Op3 }; 4621 return UpdateNodeOperands(N, Ops, 3); 4622} 4623 4624SDNode *SelectionDAG:: 4625UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4626 SDValue Op3, SDValue Op4) { 4627 SDValue Ops[] = { Op1, Op2, Op3, Op4 }; 4628 return UpdateNodeOperands(N, Ops, 4); 4629} 4630 4631SDNode *SelectionDAG:: 4632UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, 4633 SDValue Op3, SDValue Op4, SDValue Op5) { 4634 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 }; 4635 return UpdateNodeOperands(N, Ops, 5); 4636} 4637 4638SDNode *SelectionDAG:: 4639UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) { 4640 assert(N->getNumOperands() == NumOps && 4641 "Update with wrong number of operands"); 4642 4643 // Check to see if there is no change. 4644 bool AnyChange = false; 4645 for (unsigned i = 0; i != NumOps; ++i) { 4646 if (Ops[i] != N->getOperand(i)) { 4647 AnyChange = true; 4648 break; 4649 } 4650 } 4651 4652 // No operands changed, just return the input node. 4653 if (!AnyChange) return N; 4654 4655 // See if the modified node already exists. 4656 void *InsertPos = 0; 4657 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos)) 4658 return Existing; 4659 4660 // Nope it doesn't. Remove the node from its current place in the maps. 4661 if (InsertPos) 4662 if (!RemoveNodeFromCSEMaps(N)) 4663 InsertPos = 0; 4664 4665 // Now we update the operands. 4666 for (unsigned i = 0; i != NumOps; ++i) 4667 if (N->OperandList[i] != Ops[i]) 4668 N->OperandList[i].set(Ops[i]); 4669 4670 // If this gets put into a CSE map, add it. 4671 if (InsertPos) CSEMap.InsertNode(N, InsertPos); 4672 return N; 4673} 4674 4675/// DropOperands - Release the operands and set this node to have 4676/// zero operands. 4677void SDNode::DropOperands() { 4678 // Unlike the code in MorphNodeTo that does this, we don't need to 4679 // watch for dead nodes here. 4680 for (op_iterator I = op_begin(), E = op_end(); I != E; ) { 4681 SDUse &Use = *I++; 4682 Use.set(SDValue()); 4683 } 4684} 4685 4686/// SelectNodeTo - These are wrappers around MorphNodeTo that accept a 4687/// machine opcode. 4688/// 4689SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4690 EVT VT) { 4691 SDVTList VTs = getVTList(VT); 4692 return SelectNodeTo(N, MachineOpc, VTs, 0, 0); 4693} 4694 4695SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4696 EVT VT, SDValue Op1) { 4697 SDVTList VTs = getVTList(VT); 4698 SDValue Ops[] = { Op1 }; 4699 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4700} 4701 4702SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4703 EVT VT, SDValue Op1, 4704 SDValue Op2) { 4705 SDVTList VTs = getVTList(VT); 4706 SDValue Ops[] = { Op1, Op2 }; 4707 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4708} 4709 4710SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4711 EVT VT, SDValue Op1, 4712 SDValue Op2, SDValue Op3) { 4713 SDVTList VTs = getVTList(VT); 4714 SDValue Ops[] = { Op1, Op2, Op3 }; 4715 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4716} 4717 4718SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4719 EVT VT, const SDValue *Ops, 4720 unsigned NumOps) { 4721 SDVTList VTs = getVTList(VT); 4722 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4723} 4724 4725SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4726 EVT VT1, EVT VT2, const SDValue *Ops, 4727 unsigned NumOps) { 4728 SDVTList VTs = getVTList(VT1, VT2); 4729 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4730} 4731 4732SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4733 EVT VT1, EVT VT2) { 4734 SDVTList VTs = getVTList(VT1, VT2); 4735 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0); 4736} 4737 4738SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4739 EVT VT1, EVT VT2, EVT VT3, 4740 const SDValue *Ops, unsigned NumOps) { 4741 SDVTList VTs = getVTList(VT1, VT2, VT3); 4742 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4743} 4744 4745SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4746 EVT VT1, EVT VT2, EVT VT3, EVT VT4, 4747 const SDValue *Ops, unsigned NumOps) { 4748 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4749 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps); 4750} 4751 4752SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4753 EVT VT1, EVT VT2, 4754 SDValue Op1) { 4755 SDVTList VTs = getVTList(VT1, VT2); 4756 SDValue Ops[] = { Op1 }; 4757 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1); 4758} 4759 4760SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4761 EVT VT1, EVT VT2, 4762 SDValue Op1, SDValue Op2) { 4763 SDVTList VTs = getVTList(VT1, VT2); 4764 SDValue Ops[] = { Op1, Op2 }; 4765 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2); 4766} 4767 4768SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4769 EVT VT1, EVT VT2, 4770 SDValue Op1, SDValue Op2, 4771 SDValue Op3) { 4772 SDVTList VTs = getVTList(VT1, VT2); 4773 SDValue Ops[] = { Op1, Op2, Op3 }; 4774 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4775} 4776 4777SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4778 EVT VT1, EVT VT2, EVT VT3, 4779 SDValue Op1, SDValue Op2, 4780 SDValue Op3) { 4781 SDVTList VTs = getVTList(VT1, VT2, VT3); 4782 SDValue Ops[] = { Op1, Op2, Op3 }; 4783 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3); 4784} 4785 4786SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc, 4787 SDVTList VTs, const SDValue *Ops, 4788 unsigned NumOps) { 4789 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps); 4790 // Reset the NodeID to -1. 4791 N->setNodeId(-1); 4792 return N; 4793} 4794 4795/// MorphNodeTo - This *mutates* the specified node to have the specified 4796/// return type, opcode, and operands. 4797/// 4798/// Note that MorphNodeTo returns the resultant node. If there is already a 4799/// node of the specified opcode and operands, it returns that node instead of 4800/// the current one. Note that the DebugLoc need not be the same. 4801/// 4802/// Using MorphNodeTo is faster than creating a new node and swapping it in 4803/// with ReplaceAllUsesWith both because it often avoids allocating a new 4804/// node, and because it doesn't require CSE recalculation for any of 4805/// the node's users. 4806/// 4807SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc, 4808 SDVTList VTs, const SDValue *Ops, 4809 unsigned NumOps) { 4810 // If an identical node already exists, use it. 4811 void *IP = 0; 4812 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) { 4813 FoldingSetNodeID ID; 4814 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps); 4815 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP)) 4816 return ON; 4817 } 4818 4819 if (!RemoveNodeFromCSEMaps(N)) 4820 IP = 0; 4821 4822 // Start the morphing. 4823 N->NodeType = Opc; 4824 N->ValueList = VTs.VTs; 4825 N->NumValues = VTs.NumVTs; 4826 4827 // Clear the operands list, updating used nodes to remove this from their 4828 // use list. Keep track of any operands that become dead as a result. 4829 SmallPtrSet<SDNode*, 16> DeadNodeSet; 4830 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) { 4831 SDUse &Use = *I++; 4832 SDNode *Used = Use.getNode(); 4833 Use.set(SDValue()); 4834 if (Used->use_empty()) 4835 DeadNodeSet.insert(Used); 4836 } 4837 4838 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) { 4839 // Initialize the memory references information. 4840 MN->setMemRefs(0, 0); 4841 // If NumOps is larger than the # of operands we can have in a 4842 // MachineSDNode, reallocate the operand list. 4843 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) { 4844 if (MN->OperandsNeedDelete) 4845 delete[] MN->OperandList; 4846 if (NumOps > array_lengthof(MN->LocalOperands)) 4847 // We're creating a final node that will live unmorphed for the 4848 // remainder of the current SelectionDAG iteration, so we can allocate 4849 // the operands directly out of a pool with no recycling metadata. 4850 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 4851 Ops, NumOps); 4852 else 4853 MN->InitOperands(MN->LocalOperands, Ops, NumOps); 4854 MN->OperandsNeedDelete = false; 4855 } else 4856 MN->InitOperands(MN->OperandList, Ops, NumOps); 4857 } else { 4858 // If NumOps is larger than the # of operands we currently have, reallocate 4859 // the operand list. 4860 if (NumOps > N->NumOperands) { 4861 if (N->OperandsNeedDelete) 4862 delete[] N->OperandList; 4863 N->InitOperands(new SDUse[NumOps], Ops, NumOps); 4864 N->OperandsNeedDelete = true; 4865 } else 4866 N->InitOperands(N->OperandList, Ops, NumOps); 4867 } 4868 4869 // Delete any nodes that are still dead after adding the uses for the 4870 // new operands. 4871 if (!DeadNodeSet.empty()) { 4872 SmallVector<SDNode *, 16> DeadNodes; 4873 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(), 4874 E = DeadNodeSet.end(); I != E; ++I) 4875 if ((*I)->use_empty()) 4876 DeadNodes.push_back(*I); 4877 RemoveDeadNodes(DeadNodes); 4878 } 4879 4880 if (IP) 4881 CSEMap.InsertNode(N, IP); // Memoize the new node. 4882 return N; 4883} 4884 4885 4886/// getMachineNode - These are used for target selectors to create a new node 4887/// with specified return type(s), MachineInstr opcode, and operands. 4888/// 4889/// Note that getMachineNode returns the resultant node. If there is already a 4890/// node of the specified opcode and operands, it returns that node instead of 4891/// the current one. 4892MachineSDNode * 4893SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) { 4894 SDVTList VTs = getVTList(VT); 4895 return getMachineNode(Opcode, dl, VTs, 0, 0); 4896} 4897 4898MachineSDNode * 4899SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) { 4900 SDVTList VTs = getVTList(VT); 4901 SDValue Ops[] = { Op1 }; 4902 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4903} 4904 4905MachineSDNode * 4906SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4907 SDValue Op1, SDValue Op2) { 4908 SDVTList VTs = getVTList(VT); 4909 SDValue Ops[] = { Op1, Op2 }; 4910 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4911} 4912 4913MachineSDNode * 4914SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4915 SDValue Op1, SDValue Op2, SDValue Op3) { 4916 SDVTList VTs = getVTList(VT); 4917 SDValue Ops[] = { Op1, Op2, Op3 }; 4918 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4919} 4920 4921MachineSDNode * 4922SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, 4923 const SDValue *Ops, unsigned NumOps) { 4924 SDVTList VTs = getVTList(VT); 4925 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4926} 4927 4928MachineSDNode * 4929SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) { 4930 SDVTList VTs = getVTList(VT1, VT2); 4931 return getMachineNode(Opcode, dl, VTs, 0, 0); 4932} 4933 4934MachineSDNode * 4935SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4936 EVT VT1, EVT VT2, SDValue Op1) { 4937 SDVTList VTs = getVTList(VT1, VT2); 4938 SDValue Ops[] = { Op1 }; 4939 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4940} 4941 4942MachineSDNode * 4943SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4944 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) { 4945 SDVTList VTs = getVTList(VT1, VT2); 4946 SDValue Ops[] = { Op1, Op2 }; 4947 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4948} 4949 4950MachineSDNode * 4951SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4952 EVT VT1, EVT VT2, SDValue Op1, 4953 SDValue Op2, SDValue Op3) { 4954 SDVTList VTs = getVTList(VT1, VT2); 4955 SDValue Ops[] = { Op1, Op2, Op3 }; 4956 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4957} 4958 4959MachineSDNode * 4960SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4961 EVT VT1, EVT VT2, 4962 const SDValue *Ops, unsigned NumOps) { 4963 SDVTList VTs = getVTList(VT1, VT2); 4964 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4965} 4966 4967MachineSDNode * 4968SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4969 EVT VT1, EVT VT2, EVT VT3, 4970 SDValue Op1, SDValue Op2) { 4971 SDVTList VTs = getVTList(VT1, VT2, VT3); 4972 SDValue Ops[] = { Op1, Op2 }; 4973 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4974} 4975 4976MachineSDNode * 4977SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4978 EVT VT1, EVT VT2, EVT VT3, 4979 SDValue Op1, SDValue Op2, SDValue Op3) { 4980 SDVTList VTs = getVTList(VT1, VT2, VT3); 4981 SDValue Ops[] = { Op1, Op2, Op3 }; 4982 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops)); 4983} 4984 4985MachineSDNode * 4986SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 4987 EVT VT1, EVT VT2, EVT VT3, 4988 const SDValue *Ops, unsigned NumOps) { 4989 SDVTList VTs = getVTList(VT1, VT2, VT3); 4990 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4991} 4992 4993MachineSDNode * 4994SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, 4995 EVT VT2, EVT VT3, EVT VT4, 4996 const SDValue *Ops, unsigned NumOps) { 4997 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4); 4998 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 4999} 5000 5001MachineSDNode * 5002SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, 5003 const std::vector<EVT> &ResultTys, 5004 const SDValue *Ops, unsigned NumOps) { 5005 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size()); 5006 return getMachineNode(Opcode, dl, VTs, Ops, NumOps); 5007} 5008 5009MachineSDNode * 5010SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs, 5011 const SDValue *Ops, unsigned NumOps) { 5012 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue; 5013 MachineSDNode *N; 5014 void *IP = 0; 5015 5016 if (DoCSE) { 5017 FoldingSetNodeID ID; 5018 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps); 5019 IP = 0; 5020 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5021 return cast<MachineSDNode>(E); 5022 } 5023 5024 // Allocate a new MachineSDNode. 5025 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs); 5026 5027 // Initialize the operands list. 5028 if (NumOps > array_lengthof(N->LocalOperands)) 5029 // We're creating a final node that will live unmorphed for the 5030 // remainder of the current SelectionDAG iteration, so we can allocate 5031 // the operands directly out of a pool with no recycling metadata. 5032 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps), 5033 Ops, NumOps); 5034 else 5035 N->InitOperands(N->LocalOperands, Ops, NumOps); 5036 N->OperandsNeedDelete = false; 5037 5038 if (DoCSE) 5039 CSEMap.InsertNode(N, IP); 5040 5041 AllNodes.push_back(N); 5042#ifndef NDEBUG 5043 VerifyMachineNode(N); 5044#endif 5045 return N; 5046} 5047 5048/// getTargetExtractSubreg - A convenience function for creating 5049/// TargetOpcode::EXTRACT_SUBREG nodes. 5050SDValue 5051SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT, 5052 SDValue Operand) { 5053 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5054 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, 5055 VT, Operand, SRIdxVal); 5056 return SDValue(Subreg, 0); 5057} 5058 5059/// getTargetInsertSubreg - A convenience function for creating 5060/// TargetOpcode::INSERT_SUBREG nodes. 5061SDValue 5062SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, 5063 SDValue Operand, SDValue Subreg) { 5064 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32); 5065 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL, 5066 VT, Operand, Subreg, SRIdxVal); 5067 return SDValue(Result, 0); 5068} 5069 5070/// getNodeIfExists - Get the specified node if it's already available, or 5071/// else return NULL. 5072SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList, 5073 const SDValue *Ops, unsigned NumOps) { 5074 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) { 5075 FoldingSetNodeID ID; 5076 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps); 5077 void *IP = 0; 5078 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) 5079 return E; 5080 } 5081 return NULL; 5082} 5083 5084/// getDbgValue - Creates a SDDbgValue node. 5085/// 5086SDDbgValue * 5087SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off, 5088 DebugLoc DL, unsigned O) { 5089 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O); 5090} 5091 5092SDDbgValue * 5093SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off, 5094 DebugLoc DL, unsigned O) { 5095 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O); 5096} 5097 5098SDDbgValue * 5099SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off, 5100 DebugLoc DL, unsigned O) { 5101 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O); 5102} 5103 5104namespace { 5105 5106/// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node 5107/// pointed to by a use iterator is deleted, increment the use iterator 5108/// so that it doesn't dangle. 5109/// 5110/// This class also manages a "downlink" DAGUpdateListener, to forward 5111/// messages to ReplaceAllUsesWith's callers. 5112/// 5113class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener { 5114 SelectionDAG::DAGUpdateListener *DownLink; 5115 SDNode::use_iterator &UI; 5116 SDNode::use_iterator &UE; 5117 5118 virtual void NodeDeleted(SDNode *N, SDNode *E) { 5119 // Increment the iterator as needed. 5120 while (UI != UE && N == *UI) 5121 ++UI; 5122 5123 // Then forward the message. 5124 if (DownLink) DownLink->NodeDeleted(N, E); 5125 } 5126 5127 virtual void NodeUpdated(SDNode *N) { 5128 // Just forward the message. 5129 if (DownLink) DownLink->NodeUpdated(N); 5130 } 5131 5132public: 5133 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl, 5134 SDNode::use_iterator &ui, 5135 SDNode::use_iterator &ue) 5136 : DownLink(dl), UI(ui), UE(ue) {} 5137}; 5138 5139} 5140 5141/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5142/// This can cause recursive merging of nodes in the DAG. 5143/// 5144/// This version assumes From has a single result value. 5145/// 5146void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To, 5147 DAGUpdateListener *UpdateListener) { 5148 SDNode *From = FromN.getNode(); 5149 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 && 5150 "Cannot replace with this method!"); 5151 assert(From != To.getNode() && "Cannot replace uses of with self"); 5152 5153 // Iterate over all the existing uses of From. New uses will be added 5154 // to the beginning of the use list, which we avoid visiting. 5155 // This specifically avoids visiting uses of From that arise while the 5156 // replacement is happening, because any such uses would be the result 5157 // of CSE: If an existing node looks like From after one of its operands 5158 // is replaced by To, we don't want to replace of all its users with To 5159 // too. See PR3018 for more info. 5160 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5161 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5162 while (UI != UE) { 5163 SDNode *User = *UI; 5164 5165 // This node is about to morph, remove its old self from the CSE maps. 5166 RemoveNodeFromCSEMaps(User); 5167 5168 // A user can appear in a use list multiple times, and when this 5169 // happens the uses are usually next to each other in the list. 5170 // To help reduce the number of CSE recomputations, process all 5171 // the uses of this user that we can find this way. 5172 do { 5173 SDUse &Use = UI.getUse(); 5174 ++UI; 5175 Use.set(To); 5176 } while (UI != UE && *UI == User); 5177 5178 // Now that we have modified User, add it back to the CSE maps. If it 5179 // already exists there, recursively merge the results together. 5180 AddModifiedNodeToCSEMaps(User, &Listener); 5181 } 5182} 5183 5184/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5185/// This can cause recursive merging of nodes in the DAG. 5186/// 5187/// This version assumes that for each value of From, there is a 5188/// corresponding value in To in the same position with the same type. 5189/// 5190void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To, 5191 DAGUpdateListener *UpdateListener) { 5192#ifndef NDEBUG 5193 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i) 5194 assert((!From->hasAnyUseOfValue(i) || 5195 From->getValueType(i) == To->getValueType(i)) && 5196 "Cannot use this version of ReplaceAllUsesWith!"); 5197#endif 5198 5199 // Handle the trivial case. 5200 if (From == To) 5201 return; 5202 5203 // Iterate over just the existing users of From. See the comments in 5204 // the ReplaceAllUsesWith above. 5205 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5206 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5207 while (UI != UE) { 5208 SDNode *User = *UI; 5209 5210 // This node is about to morph, remove its old self from the CSE maps. 5211 RemoveNodeFromCSEMaps(User); 5212 5213 // A user can appear in a use list multiple times, and when this 5214 // happens the uses are usually next to each other in the list. 5215 // To help reduce the number of CSE recomputations, process all 5216 // the uses of this user that we can find this way. 5217 do { 5218 SDUse &Use = UI.getUse(); 5219 ++UI; 5220 Use.setNode(To); 5221 } while (UI != UE && *UI == User); 5222 5223 // Now that we have modified User, add it back to the CSE maps. If it 5224 // already exists there, recursively merge the results together. 5225 AddModifiedNodeToCSEMaps(User, &Listener); 5226 } 5227} 5228 5229/// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. 5230/// This can cause recursive merging of nodes in the DAG. 5231/// 5232/// This version can replace From with any result values. To must match the 5233/// number and types of values returned by From. 5234void SelectionDAG::ReplaceAllUsesWith(SDNode *From, 5235 const SDValue *To, 5236 DAGUpdateListener *UpdateListener) { 5237 if (From->getNumValues() == 1) // Handle the simple case efficiently. 5238 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener); 5239 5240 // Iterate over just the existing users of From. See the comments in 5241 // the ReplaceAllUsesWith above. 5242 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end(); 5243 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5244 while (UI != UE) { 5245 SDNode *User = *UI; 5246 5247 // This node is about to morph, remove its old self from the CSE maps. 5248 RemoveNodeFromCSEMaps(User); 5249 5250 // A user can appear in a use list multiple times, and when this 5251 // happens the uses are usually next to each other in the list. 5252 // To help reduce the number of CSE recomputations, process all 5253 // the uses of this user that we can find this way. 5254 do { 5255 SDUse &Use = UI.getUse(); 5256 const SDValue &ToOp = To[Use.getResNo()]; 5257 ++UI; 5258 Use.set(ToOp); 5259 } while (UI != UE && *UI == User); 5260 5261 // Now that we have modified User, add it back to the CSE maps. If it 5262 // already exists there, recursively merge the results together. 5263 AddModifiedNodeToCSEMaps(User, &Listener); 5264 } 5265} 5266 5267/// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving 5268/// uses of other values produced by From.getNode() alone. The Deleted 5269/// vector is handled the same way as for ReplaceAllUsesWith. 5270void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To, 5271 DAGUpdateListener *UpdateListener){ 5272 // Handle the really simple, really trivial case efficiently. 5273 if (From == To) return; 5274 5275 // Handle the simple, trivial, case efficiently. 5276 if (From.getNode()->getNumValues() == 1) { 5277 ReplaceAllUsesWith(From, To, UpdateListener); 5278 return; 5279 } 5280 5281 // Iterate over just the existing users of From. See the comments in 5282 // the ReplaceAllUsesWith above. 5283 SDNode::use_iterator UI = From.getNode()->use_begin(), 5284 UE = From.getNode()->use_end(); 5285 RAUWUpdateListener Listener(UpdateListener, UI, UE); 5286 while (UI != UE) { 5287 SDNode *User = *UI; 5288 bool UserRemovedFromCSEMaps = false; 5289 5290 // A user can appear in a use list multiple times, and when this 5291 // happens the uses are usually next to each other in the list. 5292 // To help reduce the number of CSE recomputations, process all 5293 // the uses of this user that we can find this way. 5294 do { 5295 SDUse &Use = UI.getUse(); 5296 5297 // Skip uses of different values from the same node. 5298 if (Use.getResNo() != From.getResNo()) { 5299 ++UI; 5300 continue; 5301 } 5302 5303 // If this node hasn't been modified yet, it's still in the CSE maps, 5304 // so remove its old self from the CSE maps. 5305 if (!UserRemovedFromCSEMaps) { 5306 RemoveNodeFromCSEMaps(User); 5307 UserRemovedFromCSEMaps = true; 5308 } 5309 5310 ++UI; 5311 Use.set(To); 5312 } while (UI != UE && *UI == User); 5313 5314 // We are iterating over all uses of the From node, so if a use 5315 // doesn't use the specific value, no changes are made. 5316 if (!UserRemovedFromCSEMaps) 5317 continue; 5318 5319 // Now that we have modified User, add it back to the CSE maps. If it 5320 // already exists there, recursively merge the results together. 5321 AddModifiedNodeToCSEMaps(User, &Listener); 5322 } 5323} 5324 5325namespace { 5326 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith 5327 /// to record information about a use. 5328 struct UseMemo { 5329 SDNode *User; 5330 unsigned Index; 5331 SDUse *Use; 5332 }; 5333 5334 /// operator< - Sort Memos by User. 5335 bool operator<(const UseMemo &L, const UseMemo &R) { 5336 return (intptr_t)L.User < (intptr_t)R.User; 5337 } 5338} 5339 5340/// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving 5341/// uses of other values produced by From.getNode() alone. The same value 5342/// may appear in both the From and To list. The Deleted vector is 5343/// handled the same way as for ReplaceAllUsesWith. 5344void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From, 5345 const SDValue *To, 5346 unsigned Num, 5347 DAGUpdateListener *UpdateListener){ 5348 // Handle the simple, trivial case efficiently. 5349 if (Num == 1) 5350 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener); 5351 5352 // Read up all the uses and make records of them. This helps 5353 // processing new uses that are introduced during the 5354 // replacement process. 5355 SmallVector<UseMemo, 4> Uses; 5356 for (unsigned i = 0; i != Num; ++i) { 5357 unsigned FromResNo = From[i].getResNo(); 5358 SDNode *FromNode = From[i].getNode(); 5359 for (SDNode::use_iterator UI = FromNode->use_begin(), 5360 E = FromNode->use_end(); UI != E; ++UI) { 5361 SDUse &Use = UI.getUse(); 5362 if (Use.getResNo() == FromResNo) { 5363 UseMemo Memo = { *UI, i, &Use }; 5364 Uses.push_back(Memo); 5365 } 5366 } 5367 } 5368 5369 // Sort the uses, so that all the uses from a given User are together. 5370 std::sort(Uses.begin(), Uses.end()); 5371 5372 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size(); 5373 UseIndex != UseIndexEnd; ) { 5374 // We know that this user uses some value of From. If it is the right 5375 // value, update it. 5376 SDNode *User = Uses[UseIndex].User; 5377 5378 // This node is about to morph, remove its old self from the CSE maps. 5379 RemoveNodeFromCSEMaps(User); 5380 5381 // The Uses array is sorted, so all the uses for a given User 5382 // are next to each other in the list. 5383 // To help reduce the number of CSE recomputations, process all 5384 // the uses of this user that we can find this way. 5385 do { 5386 unsigned i = Uses[UseIndex].Index; 5387 SDUse &Use = *Uses[UseIndex].Use; 5388 ++UseIndex; 5389 5390 Use.set(To[i]); 5391 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User); 5392 5393 // Now that we have modified User, add it back to the CSE maps. If it 5394 // already exists there, recursively merge the results together. 5395 AddModifiedNodeToCSEMaps(User, UpdateListener); 5396 } 5397} 5398 5399/// AssignTopologicalOrder - Assign a unique node id for each node in the DAG 5400/// based on their topological order. It returns the maximum id and a vector 5401/// of the SDNodes* in assigned order by reference. 5402unsigned SelectionDAG::AssignTopologicalOrder() { 5403 5404 unsigned DAGSize = 0; 5405 5406 // SortedPos tracks the progress of the algorithm. Nodes before it are 5407 // sorted, nodes after it are unsorted. When the algorithm completes 5408 // it is at the end of the list. 5409 allnodes_iterator SortedPos = allnodes_begin(); 5410 5411 // Visit all the nodes. Move nodes with no operands to the front of 5412 // the list immediately. Annotate nodes that do have operands with their 5413 // operand count. Before we do this, the Node Id fields of the nodes 5414 // may contain arbitrary values. After, the Node Id fields for nodes 5415 // before SortedPos will contain the topological sort index, and the 5416 // Node Id fields for nodes At SortedPos and after will contain the 5417 // count of outstanding operands. 5418 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) { 5419 SDNode *N = I++; 5420 checkForCycles(N); 5421 unsigned Degree = N->getNumOperands(); 5422 if (Degree == 0) { 5423 // A node with no uses, add it to the result array immediately. 5424 N->setNodeId(DAGSize++); 5425 allnodes_iterator Q = N; 5426 if (Q != SortedPos) 5427 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q)); 5428 assert(SortedPos != AllNodes.end() && "Overran node list"); 5429 ++SortedPos; 5430 } else { 5431 // Temporarily use the Node Id as scratch space for the degree count. 5432 N->setNodeId(Degree); 5433 } 5434 } 5435 5436 // Visit all the nodes. As we iterate, moves nodes into sorted order, 5437 // such that by the time the end is reached all nodes will be sorted. 5438 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) { 5439 SDNode *N = I; 5440 checkForCycles(N); 5441 // N is in sorted position, so all its uses have one less operand 5442 // that needs to be sorted. 5443 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end(); 5444 UI != UE; ++UI) { 5445 SDNode *P = *UI; 5446 unsigned Degree = P->getNodeId(); 5447 assert(Degree != 0 && "Invalid node degree"); 5448 --Degree; 5449 if (Degree == 0) { 5450 // All of P's operands are sorted, so P may sorted now. 5451 P->setNodeId(DAGSize++); 5452 if (P != SortedPos) 5453 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P)); 5454 assert(SortedPos != AllNodes.end() && "Overran node list"); 5455 ++SortedPos; 5456 } else { 5457 // Update P's outstanding operand count. 5458 P->setNodeId(Degree); 5459 } 5460 } 5461 if (I == SortedPos) { 5462#ifndef NDEBUG 5463 SDNode *S = ++I; 5464 dbgs() << "Overran sorted position:\n"; 5465 S->dumprFull(); 5466#endif 5467 llvm_unreachable(0); 5468 } 5469 } 5470 5471 assert(SortedPos == AllNodes.end() && 5472 "Topological sort incomplete!"); 5473 assert(AllNodes.front().getOpcode() == ISD::EntryToken && 5474 "First node in topological sort is not the entry token!"); 5475 assert(AllNodes.front().getNodeId() == 0 && 5476 "First node in topological sort has non-zero id!"); 5477 assert(AllNodes.front().getNumOperands() == 0 && 5478 "First node in topological sort has operands!"); 5479 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 && 5480 "Last node in topologic sort has unexpected id!"); 5481 assert(AllNodes.back().use_empty() && 5482 "Last node in topologic sort has users!"); 5483 assert(DAGSize == allnodes_size() && "Node count mismatch!"); 5484 return DAGSize; 5485} 5486 5487/// AssignOrdering - Assign an order to the SDNode. 5488void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) { 5489 assert(SD && "Trying to assign an order to a null node!"); 5490 Ordering->add(SD, Order); 5491} 5492 5493/// GetOrdering - Get the order for the SDNode. 5494unsigned SelectionDAG::GetOrdering(const SDNode *SD) const { 5495 assert(SD && "Trying to get the order of a null node!"); 5496 return Ordering->getOrder(SD); 5497} 5498 5499/// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the 5500/// value is produced by SD. 5501void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) { 5502 DbgInfo->add(DB, SD, isParameter); 5503 if (SD) 5504 SD->setHasDebugValue(true); 5505} 5506 5507/// TransferDbgValues - Transfer SDDbgValues. 5508void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) { 5509 if (From == To || !From.getNode()->getHasDebugValue()) 5510 return; 5511 SDNode *FromNode = From.getNode(); 5512 SDNode *ToNode = To.getNode(); 5513 SmallVector<SDDbgValue *, 2> &DVs = GetDbgValues(FromNode); 5514 SmallVector<SDDbgValue *, 2> ClonedDVs; 5515 for (SmallVector<SDDbgValue *, 2>::iterator I = DVs.begin(), E = DVs.end(); 5516 I != E; ++I) { 5517 SDDbgValue *Dbg = *I; 5518 if (Dbg->getKind() == SDDbgValue::SDNODE) { 5519 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(), 5520 Dbg->getOffset(), Dbg->getDebugLoc(), 5521 Dbg->getOrder()); 5522 ClonedDVs.push_back(Clone); 5523 } 5524 } 5525 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(), 5526 E = ClonedDVs.end(); I != E; ++I) 5527 AddDbgValue(*I, ToNode, false); 5528} 5529 5530//===----------------------------------------------------------------------===// 5531// SDNode Class 5532//===----------------------------------------------------------------------===// 5533 5534HandleSDNode::~HandleSDNode() { 5535 DropOperands(); 5536} 5537 5538GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL, 5539 const GlobalValue *GA, 5540 EVT VT, int64_t o, unsigned char TF) 5541 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) { 5542 TheGlobal = GA; 5543} 5544 5545MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, 5546 MachineMemOperand *mmo) 5547 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) { 5548 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5549 MMO->isNonTemporal()); 5550 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5551 assert(isNonTemporal() == MMO->isNonTemporal() && 5552 "Non-temporal encoding error!"); 5553 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5554} 5555 5556MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 5557 const SDValue *Ops, unsigned NumOps, EVT memvt, 5558 MachineMemOperand *mmo) 5559 : SDNode(Opc, dl, VTs, Ops, NumOps), 5560 MemoryVT(memvt), MMO(mmo) { 5561 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), 5562 MMO->isNonTemporal()); 5563 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!"); 5564 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!"); 5565} 5566 5567/// Profile - Gather unique data for the node. 5568/// 5569void SDNode::Profile(FoldingSetNodeID &ID) const { 5570 AddNodeIDNode(ID, this); 5571} 5572 5573namespace { 5574 struct EVTArray { 5575 std::vector<EVT> VTs; 5576 5577 EVTArray() { 5578 VTs.reserve(MVT::LAST_VALUETYPE); 5579 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i) 5580 VTs.push_back(MVT((MVT::SimpleValueType)i)); 5581 } 5582 }; 5583} 5584 5585static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs; 5586static ManagedStatic<EVTArray> SimpleVTArray; 5587static ManagedStatic<sys::SmartMutex<true> > VTMutex; 5588 5589/// getValueTypeList - Return a pointer to the specified value type. 5590/// 5591const EVT *SDNode::getValueTypeList(EVT VT) { 5592 if (VT.isExtended()) { 5593 sys::SmartScopedLock<true> Lock(*VTMutex); 5594 return &(*EVTs->insert(VT).first); 5595 } else { 5596 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE && 5597 "Value type out of range!"); 5598 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy]; 5599 } 5600} 5601 5602/// hasNUsesOfValue - Return true if there are exactly NUSES uses of the 5603/// indicated value. This method ignores uses of other values defined by this 5604/// operation. 5605bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const { 5606 assert(Value < getNumValues() && "Bad value!"); 5607 5608 // TODO: Only iterate over uses of a given value of the node 5609 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) { 5610 if (UI.getUse().getResNo() == Value) { 5611 if (NUses == 0) 5612 return false; 5613 --NUses; 5614 } 5615 } 5616 5617 // Found exactly the right number of uses? 5618 return NUses == 0; 5619} 5620 5621 5622/// hasAnyUseOfValue - Return true if there are any use of the indicated 5623/// value. This method ignores uses of other values defined by this operation. 5624bool SDNode::hasAnyUseOfValue(unsigned Value) const { 5625 assert(Value < getNumValues() && "Bad value!"); 5626 5627 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) 5628 if (UI.getUse().getResNo() == Value) 5629 return true; 5630 5631 return false; 5632} 5633 5634 5635/// isOnlyUserOf - Return true if this node is the only use of N. 5636/// 5637bool SDNode::isOnlyUserOf(SDNode *N) const { 5638 bool Seen = false; 5639 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) { 5640 SDNode *User = *I; 5641 if (User == this) 5642 Seen = true; 5643 else 5644 return false; 5645 } 5646 5647 return Seen; 5648} 5649 5650/// isOperand - Return true if this node is an operand of N. 5651/// 5652bool SDValue::isOperandOf(SDNode *N) const { 5653 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 5654 if (*this == N->getOperand(i)) 5655 return true; 5656 return false; 5657} 5658 5659bool SDNode::isOperandOf(SDNode *N) const { 5660 for (unsigned i = 0, e = N->NumOperands; i != e; ++i) 5661 if (this == N->OperandList[i].getNode()) 5662 return true; 5663 return false; 5664} 5665 5666/// reachesChainWithoutSideEffects - Return true if this operand (which must 5667/// be a chain) reaches the specified operand without crossing any 5668/// side-effecting instructions on any chain path. In practice, this looks 5669/// through token factors and non-volatile loads. In order to remain efficient, 5670/// this only looks a couple of nodes in, it does not do an exhaustive search. 5671bool SDValue::reachesChainWithoutSideEffects(SDValue Dest, 5672 unsigned Depth) const { 5673 if (*this == Dest) return true; 5674 5675 // Don't search too deeply, we just want to be able to see through 5676 // TokenFactor's etc. 5677 if (Depth == 0) return false; 5678 5679 // If this is a token factor, all inputs to the TF happen in parallel. If any 5680 // of the operands of the TF does not reach dest, then we cannot do the xform. 5681 if (getOpcode() == ISD::TokenFactor) { 5682 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 5683 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1)) 5684 return false; 5685 return true; 5686 } 5687 5688 // Loads don't have side effects, look through them. 5689 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) { 5690 if (!Ld->isVolatile()) 5691 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1); 5692 } 5693 return false; 5694} 5695 5696/// isPredecessorOf - Return true if this node is a predecessor of N. This node 5697/// is either an operand of N or it can be reached by traversing up the operands. 5698/// NOTE: this is an expensive method. Use it carefully. 5699bool SDNode::isPredecessorOf(SDNode *N) const { 5700 SmallPtrSet<SDNode *, 32> Visited; 5701 SmallVector<SDNode *, 16> Worklist; 5702 Worklist.push_back(N); 5703 5704 do { 5705 N = Worklist.pop_back_val(); 5706 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 5707 SDNode *Op = N->getOperand(i).getNode(); 5708 if (Op == this) 5709 return true; 5710 if (Visited.insert(Op)) 5711 Worklist.push_back(Op); 5712 } 5713 } while (!Worklist.empty()); 5714 5715 return false; 5716} 5717 5718uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 5719 assert(Num < NumOperands && "Invalid child # of SDNode!"); 5720 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue(); 5721} 5722 5723std::string SDNode::getOperationName(const SelectionDAG *G) const { 5724 switch (getOpcode()) { 5725 default: 5726 if (getOpcode() < ISD::BUILTIN_OP_END) 5727 return "<<Unknown DAG Node>>"; 5728 if (isMachineOpcode()) { 5729 if (G) 5730 if (const TargetInstrInfo *TII = G->getTarget().getInstrInfo()) 5731 if (getMachineOpcode() < TII->getNumOpcodes()) 5732 return TII->get(getMachineOpcode()).getName(); 5733 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 5734 } 5735 if (G) { 5736 const TargetLowering &TLI = G->getTargetLoweringInfo(); 5737 const char *Name = TLI.getTargetNodeName(getOpcode()); 5738 if (Name) return Name; 5739 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 5740 } 5741 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 5742 5743#ifndef NDEBUG 5744 case ISD::DELETED_NODE: 5745 return "<<Deleted Node!>>"; 5746#endif 5747 case ISD::PREFETCH: return "Prefetch"; 5748 case ISD::MEMBARRIER: return "MemBarrier"; 5749 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 5750 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 5751 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 5752 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 5753 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 5754 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 5755 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 5756 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 5757 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 5758 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 5759 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 5760 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 5761 case ISD::PCMARKER: return "PCMarker"; 5762 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 5763 case ISD::SRCVALUE: return "SrcValue"; 5764 case ISD::MDNODE_SDNODE: return "MDNode"; 5765 case ISD::EntryToken: return "EntryToken"; 5766 case ISD::TokenFactor: return "TokenFactor"; 5767 case ISD::AssertSext: return "AssertSext"; 5768 case ISD::AssertZext: return "AssertZext"; 5769 5770 case ISD::BasicBlock: return "BasicBlock"; 5771 case ISD::VALUETYPE: return "ValueType"; 5772 case ISD::Register: return "Register"; 5773 5774 case ISD::Constant: return "Constant"; 5775 case ISD::ConstantFP: return "ConstantFP"; 5776 case ISD::GlobalAddress: return "GlobalAddress"; 5777 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 5778 case ISD::FrameIndex: return "FrameIndex"; 5779 case ISD::JumpTable: return "JumpTable"; 5780 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 5781 case ISD::RETURNADDR: return "RETURNADDR"; 5782 case ISD::FRAMEADDR: return "FRAMEADDR"; 5783 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 5784 case ISD::EXCEPTIONADDR: return "EXCEPTIONADDR"; 5785 case ISD::LSDAADDR: return "LSDAADDR"; 5786 case ISD::EHSELECTION: return "EHSELECTION"; 5787 case ISD::EH_RETURN: return "EH_RETURN"; 5788 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 5789 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 5790 case ISD::EH_SJLJ_DISPATCHSETUP: return "EH_SJLJ_DISPATCHSETUP"; 5791 case ISD::ConstantPool: return "ConstantPool"; 5792 case ISD::ExternalSymbol: return "ExternalSymbol"; 5793 case ISD::BlockAddress: return "BlockAddress"; 5794 case ISD::INTRINSIC_WO_CHAIN: 5795 case ISD::INTRINSIC_VOID: 5796 case ISD::INTRINSIC_W_CHAIN: { 5797 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 5798 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 5799 if (IID < Intrinsic::num_intrinsics) 5800 return Intrinsic::getName((Intrinsic::ID)IID); 5801 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 5802 return TII->getName(IID); 5803 llvm_unreachable("Invalid intrinsic ID"); 5804 } 5805 5806 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 5807 case ISD::TargetConstant: return "TargetConstant"; 5808 case ISD::TargetConstantFP:return "TargetConstantFP"; 5809 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 5810 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 5811 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 5812 case ISD::TargetJumpTable: return "TargetJumpTable"; 5813 case ISD::TargetConstantPool: return "TargetConstantPool"; 5814 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 5815 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 5816 5817 case ISD::CopyToReg: return "CopyToReg"; 5818 case ISD::CopyFromReg: return "CopyFromReg"; 5819 case ISD::UNDEF: return "undef"; 5820 case ISD::MERGE_VALUES: return "merge_values"; 5821 case ISD::INLINEASM: return "inlineasm"; 5822 case ISD::EH_LABEL: return "eh_label"; 5823 case ISD::HANDLENODE: return "handlenode"; 5824 5825 // Unary operators 5826 case ISD::FABS: return "fabs"; 5827 case ISD::FNEG: return "fneg"; 5828 case ISD::FSQRT: return "fsqrt"; 5829 case ISD::FSIN: return "fsin"; 5830 case ISD::FCOS: return "fcos"; 5831 case ISD::FTRUNC: return "ftrunc"; 5832 case ISD::FFLOOR: return "ffloor"; 5833 case ISD::FCEIL: return "fceil"; 5834 case ISD::FRINT: return "frint"; 5835 case ISD::FNEARBYINT: return "fnearbyint"; 5836 case ISD::FEXP: return "fexp"; 5837 case ISD::FEXP2: return "fexp2"; 5838 case ISD::FLOG: return "flog"; 5839 case ISD::FLOG2: return "flog2"; 5840 case ISD::FLOG10: return "flog10"; 5841 5842 // Binary operators 5843 case ISD::ADD: return "add"; 5844 case ISD::SUB: return "sub"; 5845 case ISD::MUL: return "mul"; 5846 case ISD::MULHU: return "mulhu"; 5847 case ISD::MULHS: return "mulhs"; 5848 case ISD::SDIV: return "sdiv"; 5849 case ISD::UDIV: return "udiv"; 5850 case ISD::SREM: return "srem"; 5851 case ISD::UREM: return "urem"; 5852 case ISD::SMUL_LOHI: return "smul_lohi"; 5853 case ISD::UMUL_LOHI: return "umul_lohi"; 5854 case ISD::SDIVREM: return "sdivrem"; 5855 case ISD::UDIVREM: return "udivrem"; 5856 case ISD::AND: return "and"; 5857 case ISD::OR: return "or"; 5858 case ISD::XOR: return "xor"; 5859 case ISD::SHL: return "shl"; 5860 case ISD::SRA: return "sra"; 5861 case ISD::SRL: return "srl"; 5862 case ISD::ROTL: return "rotl"; 5863 case ISD::ROTR: return "rotr"; 5864 case ISD::FADD: return "fadd"; 5865 case ISD::FSUB: return "fsub"; 5866 case ISD::FMUL: return "fmul"; 5867 case ISD::FDIV: return "fdiv"; 5868 case ISD::FREM: return "frem"; 5869 case ISD::FCOPYSIGN: return "fcopysign"; 5870 case ISD::FGETSIGN: return "fgetsign"; 5871 case ISD::FPOW: return "fpow"; 5872 5873 case ISD::FPOWI: return "fpowi"; 5874 case ISD::SETCC: return "setcc"; 5875 case ISD::VSETCC: return "vsetcc"; 5876 case ISD::SELECT: return "select"; 5877 case ISD::SELECT_CC: return "select_cc"; 5878 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 5879 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 5880 case ISD::CONCAT_VECTORS: return "concat_vectors"; 5881 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 5882 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 5883 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 5884 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 5885 case ISD::CARRY_FALSE: return "carry_false"; 5886 case ISD::ADDC: return "addc"; 5887 case ISD::ADDE: return "adde"; 5888 case ISD::SADDO: return "saddo"; 5889 case ISD::UADDO: return "uaddo"; 5890 case ISD::SSUBO: return "ssubo"; 5891 case ISD::USUBO: return "usubo"; 5892 case ISD::SMULO: return "smulo"; 5893 case ISD::UMULO: return "umulo"; 5894 case ISD::SUBC: return "subc"; 5895 case ISD::SUBE: return "sube"; 5896 case ISD::SHL_PARTS: return "shl_parts"; 5897 case ISD::SRA_PARTS: return "sra_parts"; 5898 case ISD::SRL_PARTS: return "srl_parts"; 5899 5900 // Conversion operators. 5901 case ISD::SIGN_EXTEND: return "sign_extend"; 5902 case ISD::ZERO_EXTEND: return "zero_extend"; 5903 case ISD::ANY_EXTEND: return "any_extend"; 5904 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 5905 case ISD::TRUNCATE: return "truncate"; 5906 case ISD::FP_ROUND: return "fp_round"; 5907 case ISD::FLT_ROUNDS_: return "flt_rounds"; 5908 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 5909 case ISD::FP_EXTEND: return "fp_extend"; 5910 5911 case ISD::SINT_TO_FP: return "sint_to_fp"; 5912 case ISD::UINT_TO_FP: return "uint_to_fp"; 5913 case ISD::FP_TO_SINT: return "fp_to_sint"; 5914 case ISD::FP_TO_UINT: return "fp_to_uint"; 5915 case ISD::BITCAST: return "bitcast"; 5916 case ISD::FP16_TO_FP32: return "fp16_to_fp32"; 5917 case ISD::FP32_TO_FP16: return "fp32_to_fp16"; 5918 5919 case ISD::CONVERT_RNDSAT: { 5920 switch (cast<CvtRndSatSDNode>(this)->getCvtCode()) { 5921 default: llvm_unreachable("Unknown cvt code!"); 5922 case ISD::CVT_FF: return "cvt_ff"; 5923 case ISD::CVT_FS: return "cvt_fs"; 5924 case ISD::CVT_FU: return "cvt_fu"; 5925 case ISD::CVT_SF: return "cvt_sf"; 5926 case ISD::CVT_UF: return "cvt_uf"; 5927 case ISD::CVT_SS: return "cvt_ss"; 5928 case ISD::CVT_SU: return "cvt_su"; 5929 case ISD::CVT_US: return "cvt_us"; 5930 case ISD::CVT_UU: return "cvt_uu"; 5931 } 5932 } 5933 5934 // Control flow instructions 5935 case ISD::BR: return "br"; 5936 case ISD::BRIND: return "brind"; 5937 case ISD::BR_JT: return "br_jt"; 5938 case ISD::BRCOND: return "brcond"; 5939 case ISD::BR_CC: return "br_cc"; 5940 case ISD::CALLSEQ_START: return "callseq_start"; 5941 case ISD::CALLSEQ_END: return "callseq_end"; 5942 5943 // Other operators 5944 case ISD::LOAD: return "load"; 5945 case ISD::STORE: return "store"; 5946 case ISD::VAARG: return "vaarg"; 5947 case ISD::VACOPY: return "vacopy"; 5948 case ISD::VAEND: return "vaend"; 5949 case ISD::VASTART: return "vastart"; 5950 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 5951 case ISD::EXTRACT_ELEMENT: return "extract_element"; 5952 case ISD::BUILD_PAIR: return "build_pair"; 5953 case ISD::STACKSAVE: return "stacksave"; 5954 case ISD::STACKRESTORE: return "stackrestore"; 5955 case ISD::TRAP: return "trap"; 5956 5957 // Bit manipulation 5958 case ISD::BSWAP: return "bswap"; 5959 case ISD::CTPOP: return "ctpop"; 5960 case ISD::CTTZ: return "cttz"; 5961 case ISD::CTLZ: return "ctlz"; 5962 5963 // Trampolines 5964 case ISD::TRAMPOLINE: return "trampoline"; 5965 5966 case ISD::CONDCODE: 5967 switch (cast<CondCodeSDNode>(this)->get()) { 5968 default: llvm_unreachable("Unknown setcc condition!"); 5969 case ISD::SETOEQ: return "setoeq"; 5970 case ISD::SETOGT: return "setogt"; 5971 case ISD::SETOGE: return "setoge"; 5972 case ISD::SETOLT: return "setolt"; 5973 case ISD::SETOLE: return "setole"; 5974 case ISD::SETONE: return "setone"; 5975 5976 case ISD::SETO: return "seto"; 5977 case ISD::SETUO: return "setuo"; 5978 case ISD::SETUEQ: return "setue"; 5979 case ISD::SETUGT: return "setugt"; 5980 case ISD::SETUGE: return "setuge"; 5981 case ISD::SETULT: return "setult"; 5982 case ISD::SETULE: return "setule"; 5983 case ISD::SETUNE: return "setune"; 5984 5985 case ISD::SETEQ: return "seteq"; 5986 case ISD::SETGT: return "setgt"; 5987 case ISD::SETGE: return "setge"; 5988 case ISD::SETLT: return "setlt"; 5989 case ISD::SETLE: return "setle"; 5990 case ISD::SETNE: return "setne"; 5991 } 5992 } 5993} 5994 5995const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 5996 switch (AM) { 5997 default: 5998 return ""; 5999 case ISD::PRE_INC: 6000 return "<pre-inc>"; 6001 case ISD::PRE_DEC: 6002 return "<pre-dec>"; 6003 case ISD::POST_INC: 6004 return "<post-inc>"; 6005 case ISD::POST_DEC: 6006 return "<post-dec>"; 6007 } 6008} 6009 6010std::string ISD::ArgFlagsTy::getArgFlagsString() { 6011 std::string S = "< "; 6012 6013 if (isZExt()) 6014 S += "zext "; 6015 if (isSExt()) 6016 S += "sext "; 6017 if (isInReg()) 6018 S += "inreg "; 6019 if (isSRet()) 6020 S += "sret "; 6021 if (isByVal()) 6022 S += "byval "; 6023 if (isNest()) 6024 S += "nest "; 6025 if (getByValAlign()) 6026 S += "byval-align:" + utostr(getByValAlign()) + " "; 6027 if (getOrigAlign()) 6028 S += "orig-align:" + utostr(getOrigAlign()) + " "; 6029 if (getByValSize()) 6030 S += "byval-size:" + utostr(getByValSize()) + " "; 6031 return S + ">"; 6032} 6033 6034void SDNode::dump() const { dump(0); } 6035void SDNode::dump(const SelectionDAG *G) const { 6036 print(dbgs(), G); 6037 dbgs() << '\n'; 6038} 6039 6040void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 6041 OS << (void*)this << ": "; 6042 6043 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 6044 if (i) OS << ","; 6045 if (getValueType(i) == MVT::Other) 6046 OS << "ch"; 6047 else 6048 OS << getValueType(i).getEVTString(); 6049 } 6050 OS << " = " << getOperationName(G); 6051} 6052 6053void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 6054 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 6055 if (!MN->memoperands_empty()) { 6056 OS << "<"; 6057 OS << "Mem:"; 6058 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 6059 e = MN->memoperands_end(); i != e; ++i) { 6060 OS << **i; 6061 if (llvm::next(i) != e) 6062 OS << " "; 6063 } 6064 OS << ">"; 6065 } 6066 } else if (const ShuffleVectorSDNode *SVN = 6067 dyn_cast<ShuffleVectorSDNode>(this)) { 6068 OS << "<"; 6069 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 6070 int Idx = SVN->getMaskElt(i); 6071 if (i) OS << ","; 6072 if (Idx < 0) 6073 OS << "u"; 6074 else 6075 OS << Idx; 6076 } 6077 OS << ">"; 6078 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 6079 OS << '<' << CSDN->getAPIntValue() << '>'; 6080 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 6081 if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle) 6082 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 6083 else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble) 6084 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 6085 else { 6086 OS << "<APFloat("; 6087 CSDN->getValueAPF().bitcastToAPInt().dump(); 6088 OS << ")>"; 6089 } 6090 } else if (const GlobalAddressSDNode *GADN = 6091 dyn_cast<GlobalAddressSDNode>(this)) { 6092 int64_t offset = GADN->getOffset(); 6093 OS << '<'; 6094 WriteAsOperand(OS, GADN->getGlobal()); 6095 OS << '>'; 6096 if (offset > 0) 6097 OS << " + " << offset; 6098 else 6099 OS << " " << offset; 6100 if (unsigned int TF = GADN->getTargetFlags()) 6101 OS << " [TF=" << TF << ']'; 6102 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 6103 OS << "<" << FIDN->getIndex() << ">"; 6104 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 6105 OS << "<" << JTDN->getIndex() << ">"; 6106 if (unsigned int TF = JTDN->getTargetFlags()) 6107 OS << " [TF=" << TF << ']'; 6108 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 6109 int offset = CP->getOffset(); 6110 if (CP->isMachineConstantPoolEntry()) 6111 OS << "<" << *CP->getMachineCPVal() << ">"; 6112 else 6113 OS << "<" << *CP->getConstVal() << ">"; 6114 if (offset > 0) 6115 OS << " + " << offset; 6116 else 6117 OS << " " << offset; 6118 if (unsigned int TF = CP->getTargetFlags()) 6119 OS << " [TF=" << TF << ']'; 6120 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 6121 OS << "<"; 6122 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 6123 if (LBB) 6124 OS << LBB->getName() << " "; 6125 OS << (const void*)BBDN->getBasicBlock() << ">"; 6126 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 6127 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :0); 6128 } else if (const ExternalSymbolSDNode *ES = 6129 dyn_cast<ExternalSymbolSDNode>(this)) { 6130 OS << "'" << ES->getSymbol() << "'"; 6131 if (unsigned int TF = ES->getTargetFlags()) 6132 OS << " [TF=" << TF << ']'; 6133 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 6134 if (M->getValue()) 6135 OS << "<" << M->getValue() << ">"; 6136 else 6137 OS << "<null>"; 6138 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 6139 if (MD->getMD()) 6140 OS << "<" << MD->getMD() << ">"; 6141 else 6142 OS << "<null>"; 6143 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 6144 OS << ":" << N->getVT().getEVTString(); 6145 } 6146 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 6147 OS << "<" << *LD->getMemOperand(); 6148 6149 bool doExt = true; 6150 switch (LD->getExtensionType()) { 6151 default: doExt = false; break; 6152 case ISD::EXTLOAD: OS << ", anyext"; break; 6153 case ISD::SEXTLOAD: OS << ", sext"; break; 6154 case ISD::ZEXTLOAD: OS << ", zext"; break; 6155 } 6156 if (doExt) 6157 OS << " from " << LD->getMemoryVT().getEVTString(); 6158 6159 const char *AM = getIndexedModeName(LD->getAddressingMode()); 6160 if (*AM) 6161 OS << ", " << AM; 6162 6163 OS << ">"; 6164 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 6165 OS << "<" << *ST->getMemOperand(); 6166 6167 if (ST->isTruncatingStore()) 6168 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 6169 6170 const char *AM = getIndexedModeName(ST->getAddressingMode()); 6171 if (*AM) 6172 OS << ", " << AM; 6173 6174 OS << ">"; 6175 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 6176 OS << "<" << *M->getMemOperand() << ">"; 6177 } else if (const BlockAddressSDNode *BA = 6178 dyn_cast<BlockAddressSDNode>(this)) { 6179 OS << "<"; 6180 WriteAsOperand(OS, BA->getBlockAddress()->getFunction(), false); 6181 OS << ", "; 6182 WriteAsOperand(OS, BA->getBlockAddress()->getBasicBlock(), false); 6183 OS << ">"; 6184 if (unsigned int TF = BA->getTargetFlags()) 6185 OS << " [TF=" << TF << ']'; 6186 } 6187 6188 if (G) 6189 if (unsigned Order = G->GetOrdering(this)) 6190 OS << " [ORD=" << Order << ']'; 6191 6192 if (getNodeId() != -1) 6193 OS << " [ID=" << getNodeId() << ']'; 6194 6195 DebugLoc dl = getDebugLoc(); 6196 if (G && !dl.isUnknown()) { 6197 DIScope 6198 Scope(dl.getScope(G->getMachineFunction().getFunction()->getContext())); 6199 OS << " dbg:"; 6200 // Omit the directory, since it's usually long and uninteresting. 6201 if (Scope.Verify()) 6202 OS << Scope.getFilename(); 6203 else 6204 OS << "<unknown>"; 6205 OS << ':' << dl.getLine(); 6206 if (dl.getCol() != 0) 6207 OS << ':' << dl.getCol(); 6208 } 6209} 6210 6211void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 6212 print_types(OS, G); 6213 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6214 if (i) OS << ", "; else OS << " "; 6215 OS << (void*)getOperand(i).getNode(); 6216 if (unsigned RN = getOperand(i).getResNo()) 6217 OS << ":" << RN; 6218 } 6219 print_details(OS, G); 6220} 6221 6222static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 6223 const SelectionDAG *G, unsigned depth, 6224 unsigned indent) 6225{ 6226 if (depth == 0) 6227 return; 6228 6229 OS.indent(indent); 6230 6231 N->print(OS, G); 6232 6233 if (depth < 1) 6234 return; 6235 6236 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6237 // Don't follow chain operands. 6238 if (N->getOperand(i).getValueType() == MVT::Other) 6239 continue; 6240 OS << '\n'; 6241 printrWithDepthHelper(OS, N->getOperand(i).getNode(), G, depth-1, indent+2); 6242 } 6243} 6244 6245void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 6246 unsigned depth) const { 6247 printrWithDepthHelper(OS, this, G, depth, 0); 6248} 6249 6250void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 6251 // Don't print impossibly deep things. 6252 printrWithDepth(OS, G, 10); 6253} 6254 6255void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 6256 printrWithDepth(dbgs(), G, depth); 6257} 6258 6259void SDNode::dumprFull(const SelectionDAG *G) const { 6260 // Don't print impossibly deep things. 6261 dumprWithDepth(G, 10); 6262} 6263 6264static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 6265 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6266 if (N->getOperand(i).getNode()->hasOneUse()) 6267 DumpNodes(N->getOperand(i).getNode(), indent+2, G); 6268 else 6269 dbgs() << "\n" << std::string(indent+2, ' ') 6270 << (void*)N->getOperand(i).getNode() << ": <multiple use>"; 6271 6272 6273 dbgs() << "\n"; 6274 dbgs().indent(indent); 6275 N->dump(G); 6276} 6277 6278SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) { 6279 assert(N->getNumValues() == 1 && 6280 "Can't unroll a vector with multiple results!"); 6281 6282 EVT VT = N->getValueType(0); 6283 unsigned NE = VT.getVectorNumElements(); 6284 EVT EltVT = VT.getVectorElementType(); 6285 DebugLoc dl = N->getDebugLoc(); 6286 6287 SmallVector<SDValue, 8> Scalars; 6288 SmallVector<SDValue, 4> Operands(N->getNumOperands()); 6289 6290 // If ResNE is 0, fully unroll the vector op. 6291 if (ResNE == 0) 6292 ResNE = NE; 6293 else if (NE > ResNE) 6294 NE = ResNE; 6295 6296 unsigned i; 6297 for (i= 0; i != NE; ++i) { 6298 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) { 6299 SDValue Operand = N->getOperand(j); 6300 EVT OperandVT = Operand.getValueType(); 6301 if (OperandVT.isVector()) { 6302 // A vector operand; extract a single element. 6303 EVT OperandEltVT = OperandVT.getVectorElementType(); 6304 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, 6305 OperandEltVT, 6306 Operand, 6307 getConstant(i, TLI.getPointerTy())); 6308 } else { 6309 // A scalar operand; just use it as is. 6310 Operands[j] = Operand; 6311 } 6312 } 6313 6314 switch (N->getOpcode()) { 6315 default: 6316 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6317 &Operands[0], Operands.size())); 6318 break; 6319 case ISD::SHL: 6320 case ISD::SRA: 6321 case ISD::SRL: 6322 case ISD::ROTL: 6323 case ISD::ROTR: 6324 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0], 6325 getShiftAmountOperand(Operands[0].getValueType(), 6326 Operands[1]))); 6327 break; 6328 case ISD::SIGN_EXTEND_INREG: 6329 case ISD::FP_ROUND_INREG: { 6330 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); 6331 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, 6332 Operands[0], 6333 getValueType(ExtVT))); 6334 } 6335 } 6336 } 6337 6338 for (; i < ResNE; ++i) 6339 Scalars.push_back(getUNDEF(EltVT)); 6340 6341 return getNode(ISD::BUILD_VECTOR, dl, 6342 EVT::getVectorVT(*getContext(), EltVT, ResNE), 6343 &Scalars[0], Scalars.size()); 6344} 6345 6346 6347/// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a 6348/// location that is 'Dist' units away from the location that the 'Base' load 6349/// is loading from. 6350bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, 6351 unsigned Bytes, int Dist) const { 6352 if (LD->getChain() != Base->getChain()) 6353 return false; 6354 EVT VT = LD->getValueType(0); 6355 if (VT.getSizeInBits() / 8 != Bytes) 6356 return false; 6357 6358 SDValue Loc = LD->getOperand(1); 6359 SDValue BaseLoc = Base->getOperand(1); 6360 if (Loc.getOpcode() == ISD::FrameIndex) { 6361 if (BaseLoc.getOpcode() != ISD::FrameIndex) 6362 return false; 6363 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo(); 6364 int FI = cast<FrameIndexSDNode>(Loc)->getIndex(); 6365 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex(); 6366 int FS = MFI->getObjectSize(FI); 6367 int BFS = MFI->getObjectSize(BFI); 6368 if (FS != BFS || FS != (int)Bytes) return false; 6369 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes); 6370 } 6371 6372 // Handle X+C 6373 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc && 6374 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes) 6375 return true; 6376 6377 const GlobalValue *GV1 = NULL; 6378 const GlobalValue *GV2 = NULL; 6379 int64_t Offset1 = 0; 6380 int64_t Offset2 = 0; 6381 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1); 6382 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2); 6383 if (isGA1 && isGA2 && GV1 == GV2) 6384 return Offset1 == (Offset2 + Dist*Bytes); 6385 return false; 6386} 6387 6388 6389/// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if 6390/// it cannot be inferred. 6391unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const { 6392 // If this is a GlobalAddress + cst, return the alignment. 6393 const GlobalValue *GV; 6394 int64_t GVOffset = 0; 6395 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) { 6396 // If GV has specified alignment, then use it. Otherwise, use the preferred 6397 // alignment. 6398 unsigned Align = GV->getAlignment(); 6399 if (!Align) { 6400 if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV)) { 6401 if (GVar->hasInitializer()) { 6402 const TargetData *TD = TLI.getTargetData(); 6403 Align = TD->getPreferredAlignment(GVar); 6404 } 6405 } 6406 } 6407 return MinAlign(Align, GVOffset); 6408 } 6409 6410 // If this is a direct reference to a stack slot, use information about the 6411 // stack slot's alignment. 6412 int FrameIdx = 1 << 31; 6413 int64_t FrameOffset = 0; 6414 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) { 6415 FrameIdx = FI->getIndex(); 6416 } else if (isBaseWithConstantOffset(Ptr) && 6417 isa<FrameIndexSDNode>(Ptr.getOperand(0))) { 6418 // Handle FI+Cst 6419 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex(); 6420 FrameOffset = Ptr.getConstantOperandVal(1); 6421 } 6422 6423 if (FrameIdx != (1 << 31)) { 6424 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo(); 6425 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx), 6426 FrameOffset); 6427 return FIInfoAlign; 6428 } 6429 6430 return 0; 6431} 6432 6433void SelectionDAG::dump() const { 6434 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:"; 6435 6436 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 6437 I != E; ++I) { 6438 const SDNode *N = I; 6439 if (!N->hasOneUse() && N != getRoot().getNode()) 6440 DumpNodes(N, 2, this); 6441 } 6442 6443 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 6444 6445 dbgs() << "\n\n"; 6446} 6447 6448void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 6449 print_types(OS, G); 6450 print_details(OS, G); 6451} 6452 6453typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet; 6454static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 6455 const SelectionDAG *G, VisitedSDNodeSet &once) { 6456 if (!once.insert(N)) // If we've been here before, return now. 6457 return; 6458 6459 // Dump the current SDNode, but don't end the line yet. 6460 OS << std::string(indent, ' '); 6461 N->printr(OS, G); 6462 6463 // Having printed this SDNode, walk the children: 6464 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6465 const SDNode *child = N->getOperand(i).getNode(); 6466 6467 if (i) OS << ","; 6468 OS << " "; 6469 6470 if (child->getNumOperands() == 0) { 6471 // This child has no grandchildren; print it inline right here. 6472 child->printr(OS, G); 6473 once.insert(child); 6474 } else { // Just the address. FIXME: also print the child's opcode. 6475 OS << (void*)child; 6476 if (unsigned RN = N->getOperand(i).getResNo()) 6477 OS << ":" << RN; 6478 } 6479 } 6480 6481 OS << "\n"; 6482 6483 // Dump children that have grandchildren on their own line(s). 6484 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 6485 const SDNode *child = N->getOperand(i).getNode(); 6486 DumpNodesr(OS, child, indent+2, G, once); 6487 } 6488} 6489 6490void SDNode::dumpr() const { 6491 VisitedSDNodeSet once; 6492 DumpNodesr(dbgs(), this, 0, 0, once); 6493} 6494 6495void SDNode::dumpr(const SelectionDAG *G) const { 6496 VisitedSDNodeSet once; 6497 DumpNodesr(dbgs(), this, 0, G, once); 6498} 6499 6500 6501// getAddressSpace - Return the address space this GlobalAddress belongs to. 6502unsigned GlobalAddressSDNode::getAddressSpace() const { 6503 return getGlobal()->getType()->getAddressSpace(); 6504} 6505 6506 6507const Type *ConstantPoolSDNode::getType() const { 6508 if (isMachineConstantPoolEntry()) 6509 return Val.MachineCPVal->getType(); 6510 return Val.ConstVal->getType(); 6511} 6512 6513bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, 6514 APInt &SplatUndef, 6515 unsigned &SplatBitSize, 6516 bool &HasAnyUndefs, 6517 unsigned MinSplatBits, 6518 bool isBigEndian) { 6519 EVT VT = getValueType(0); 6520 assert(VT.isVector() && "Expected a vector type"); 6521 unsigned sz = VT.getSizeInBits(); 6522 if (MinSplatBits > sz) 6523 return false; 6524 6525 SplatValue = APInt(sz, 0); 6526 SplatUndef = APInt(sz, 0); 6527 6528 // Get the bits. Bits with undefined values (when the corresponding element 6529 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared 6530 // in SplatValue. If any of the values are not constant, give up and return 6531 // false. 6532 unsigned int nOps = getNumOperands(); 6533 assert(nOps > 0 && "isConstantSplat has 0-size build vector"); 6534 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits(); 6535 6536 for (unsigned j = 0; j < nOps; ++j) { 6537 unsigned i = isBigEndian ? nOps-1-j : j; 6538 SDValue OpVal = getOperand(i); 6539 unsigned BitPos = j * EltBitSize; 6540 6541 if (OpVal.getOpcode() == ISD::UNDEF) 6542 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize); 6543 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal)) 6544 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize). 6545 zextOrTrunc(sz) << BitPos; 6546 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal)) 6547 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos; 6548 else 6549 return false; 6550 } 6551 6552 // The build_vector is all constants or undefs. Find the smallest element 6553 // size that splats the vector. 6554 6555 HasAnyUndefs = (SplatUndef != 0); 6556 while (sz > 8) { 6557 6558 unsigned HalfSize = sz / 2; 6559 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize); 6560 APInt LowValue = SplatValue.trunc(HalfSize); 6561 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize); 6562 APInt LowUndef = SplatUndef.trunc(HalfSize); 6563 6564 // If the two halves do not match (ignoring undef bits), stop here. 6565 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) || 6566 MinSplatBits > HalfSize) 6567 break; 6568 6569 SplatValue = HighValue | LowValue; 6570 SplatUndef = HighUndef & LowUndef; 6571 6572 sz = HalfSize; 6573 } 6574 6575 SplatBitSize = sz; 6576 return true; 6577} 6578 6579bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) { 6580 // Find the first non-undef value in the shuffle mask. 6581 unsigned i, e; 6582 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i) 6583 /* search */; 6584 6585 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!"); 6586 6587 // Make sure all remaining elements are either undef or the same as the first 6588 // non-undef value. 6589 for (int Idx = Mask[i]; i != e; ++i) 6590 if (Mask[i] >= 0 && Mask[i] != Idx) 6591 return false; 6592 return true; 6593} 6594 6595#ifdef XDEBUG 6596static void checkForCyclesHelper(const SDNode *N, 6597 SmallPtrSet<const SDNode*, 32> &Visited, 6598 SmallPtrSet<const SDNode*, 32> &Checked) { 6599 // If this node has already been checked, don't check it again. 6600 if (Checked.count(N)) 6601 return; 6602 6603 // If a node has already been visited on this depth-first walk, reject it as 6604 // a cycle. 6605 if (!Visited.insert(N)) { 6606 dbgs() << "Offending node:\n"; 6607 N->dumprFull(); 6608 errs() << "Detected cycle in SelectionDAG\n"; 6609 abort(); 6610 } 6611 6612 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i) 6613 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked); 6614 6615 Checked.insert(N); 6616 Visited.erase(N); 6617} 6618#endif 6619 6620void llvm::checkForCycles(const llvm::SDNode *N) { 6621#ifdef XDEBUG 6622 assert(N && "Checking nonexistant SDNode"); 6623 SmallPtrSet<const SDNode*, 32> visited; 6624 SmallPtrSet<const SDNode*, 32> checked; 6625 checkForCyclesHelper(N, visited, checked); 6626#endif 6627} 6628 6629void llvm::checkForCycles(const llvm::SelectionDAG *DAG) { 6630 checkForCycles(DAG->getRoot().getNode()); 6631} 6632