1dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===-- AArch64ISelLowering.cpp - AArch64 DAG Lowering Implementation ----===// 272062f5744557e270a38192554c3126ea5f97434Tim Northover// 372062f5744557e270a38192554c3126ea5f97434Tim Northover// The LLVM Compiler Infrastructure 472062f5744557e270a38192554c3126ea5f97434Tim Northover// 572062f5744557e270a38192554c3126ea5f97434Tim Northover// This file is distributed under the University of Illinois Open Source 672062f5744557e270a38192554c3126ea5f97434Tim Northover// License. See LICENSE.TXT for details. 772062f5744557e270a38192554c3126ea5f97434Tim Northover// 872062f5744557e270a38192554c3126ea5f97434Tim Northover//===----------------------------------------------------------------------===// 972062f5744557e270a38192554c3126ea5f97434Tim Northover// 10dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// This file implements the AArch64TargetLowering class. 1172062f5744557e270a38192554c3126ea5f97434Tim Northover// 1272062f5744557e270a38192554c3126ea5f97434Tim Northover//===----------------------------------------------------------------------===// 1372062f5744557e270a38192554c3126ea5f97434Tim Northover 1472062f5744557e270a38192554c3126ea5f97434Tim Northover#include "AArch64ISelLowering.h" 15dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "AArch64PerfectShuffle.h" 16dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "AArch64Subtarget.h" 1772062f5744557e270a38192554c3126ea5f97434Tim Northover#include "AArch64MachineFunctionInfo.h" 1872062f5744557e270a38192554c3126ea5f97434Tim Northover#include "AArch64TargetMachine.h" 1972062f5744557e270a38192554c3126ea5f97434Tim Northover#include "AArch64TargetObjectFile.h" 20dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "MCTargetDesc/AArch64AddressingModes.h" 21dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/ADT/Statistic.h" 2272062f5744557e270a38192554c3126ea5f97434Tim Northover#include "llvm/CodeGen/CallingConvLower.h" 2372062f5744557e270a38192554c3126ea5f97434Tim Northover#include "llvm/CodeGen/MachineFrameInfo.h" 2472062f5744557e270a38192554c3126ea5f97434Tim Northover#include "llvm/CodeGen/MachineInstrBuilder.h" 2572062f5744557e270a38192554c3126ea5f97434Tim Northover#include "llvm/CodeGen/MachineRegisterInfo.h" 26dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/IR/Function.h" 27dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/IR/Intrinsics.h" 28dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/IR/Type.h" 29dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/Support/CommandLine.h" 30dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/Support/Debug.h" 31dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/Support/ErrorHandling.h" 32dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/Support/raw_ostream.h" 33dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "llvm/Target/TargetOptions.h" 3472062f5744557e270a38192554c3126ea5f97434Tim Northoverusing namespace llvm; 3572062f5744557e270a38192554c3126ea5f97434Tim Northover 36dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#define DEBUG_TYPE "aarch64-lower" 3772062f5744557e270a38192554c3126ea5f97434Tim Northover 38dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSTATISTIC(NumTailCalls, "Number of tail calls"); 39dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSTATISTIC(NumShiftInserts, "Number of vector shift inserts"); 40dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 41dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesenum AlignMode { 42dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines StrictAlign, 43dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NoStrictAlign 44dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines}; 45dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 46dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic cl::opt<AlignMode> 47dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAlign(cl::desc("Load/store alignment support"), 48dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cl::Hidden, cl::init(NoStrictAlign), 49dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cl::values( 50dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines clEnumValN(StrictAlign, "aarch64-strict-align", 51dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "Disallow all unaligned memory accesses"), 52dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines clEnumValN(NoStrictAlign, "aarch64-no-strict-align", 53dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "Allow unaligned memory accesses"), 54dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines clEnumValEnd)); 55dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 56dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Place holder until extr generation is tested fully. 57dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic cl::opt<bool> 58dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesEnableAArch64ExtrGeneration("aarch64-extr-generation", cl::Hidden, 59dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cl::desc("Allow AArch64 (or (shift)(shift))->extract"), 60dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cl::init(true)); 61dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 62dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic cl::opt<bool> 63dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesEnableAArch64SlrGeneration("aarch64-shift-insert-generation", cl::Hidden, 64dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cl::desc("Allow AArch64 SLI/SRI formation"), 65dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cl::init(false)); 66dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 67dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 68dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// AArch64 Lowering public interface. 69dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 70cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hinesstatic TargetLoweringObjectFile *createTLOF(const Triple &TT) { 71cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (TT.isOSBinFormatMachO()) 72dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return new AArch64_MachoTargetObjectFile(); 7372062f5744557e270a38192554c3126ea5f97434Tim Northover 74dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return new AArch64_ELFTargetObjectFile(); 75dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 77cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen HinesAArch64TargetLowering::AArch64TargetLowering(TargetMachine &TM) 78cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) { 79dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Subtarget = &TM.getSubtarget<AArch64Subtarget>(); 80dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 81dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 doesn't have comparisons which set GPRs or setcc instructions, so 82dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we have to make something up. Arbitrarily, choose ZeroOrOne. 83dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setBooleanContents(ZeroOrOneBooleanContent); 84dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // When comparing vectors the result sets the different elements in the 85dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // vector to all-one or all-zero. 8672062f5744557e270a38192554c3126ea5f97434Tim Northover setBooleanVectorContents(ZeroOrNegativeOneBooleanContent); 8772062f5744557e270a38192554c3126ea5f97434Tim Northover 88dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Set up the register classes. 89dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addRegisterClass(MVT::i32, &AArch64::GPR32allRegClass); 90dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addRegisterClass(MVT::i64, &AArch64::GPR64allRegClass); 91c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson 92c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson if (Subtarget->hasFPARMv8()) { 93c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson addRegisterClass(MVT::f16, &AArch64::FPR16RegClass); 94c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson addRegisterClass(MVT::f32, &AArch64::FPR32RegClass); 95c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson addRegisterClass(MVT::f64, &AArch64::FPR64RegClass); 96c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson addRegisterClass(MVT::f128, &AArch64::FPR128RegClass); 97c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson } 9872062f5744557e270a38192554c3126ea5f97434Tim Northover 9987773c318fcee853fb34a80a10c4347d523bdafbTim Northover if (Subtarget->hasNEON()) { 100dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addRegisterClass(MVT::v16i8, &AArch64::FPR8RegClass); 101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addRegisterClass(MVT::v8i16, &AArch64::FPR16RegClass); 102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Someone set us up the NEON. 103dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addDRTypeForNEON(MVT::v2f32); 104dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addDRTypeForNEON(MVT::v8i8); 105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addDRTypeForNEON(MVT::v4i16); 106dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addDRTypeForNEON(MVT::v2i32); 107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addDRTypeForNEON(MVT::v1i64); 108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addDRTypeForNEON(MVT::v1f64); 109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addQRTypeForNEON(MVT::v4f32); 111dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addQRTypeForNEON(MVT::v2f64); 112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addQRTypeForNEON(MVT::v16i8); 113dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addQRTypeForNEON(MVT::v8i16); 114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addQRTypeForNEON(MVT::v4i32); 115dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addQRTypeForNEON(MVT::v2i64); 11687773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 11787773c318fcee853fb34a80a10c4347d523bdafbTim Northover 118dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Compute derived properties from the register classes 11972062f5744557e270a38192554c3126ea5f97434Tim Northover computeRegisterProperties(); 12072062f5744557e270a38192554c3126ea5f97434Tim Northover 121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Provide all sorts of operation actions 12272062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::GlobalAddress, MVT::i64, Custom); 12372062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom); 124dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SETCC, MVT::i32, Custom); 125dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SETCC, MVT::i64, Custom); 126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SETCC, MVT::f32, Custom); 127dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SETCC, MVT::f64, Custom); 128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::BRCOND, MVT::Other, Expand); 12972062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::BR_CC, MVT::i32, Custom); 13072062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::BR_CC, MVT::i64, Custom); 13172062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::BR_CC, MVT::f32, Custom); 13272062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::BR_CC, MVT::f64, Custom); 13372062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SELECT, MVT::i32, Custom); 13472062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SELECT, MVT::i64, Custom); 13572062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SELECT, MVT::f32, Custom); 13672062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SELECT, MVT::f64, Custom); 13772062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); 13872062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SELECT_CC, MVT::i64, Custom); 13972062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SELECT_CC, MVT::f32, Custom); 14072062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SELECT_CC, MVT::f64, Custom); 14172062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::BR_JT, MVT::Other, Expand); 14272062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::JumpTable, MVT::i64, Custom); 14372062f5744557e270a38192554c3126ea5f97434Tim Northover 144dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SHL_PARTS, MVT::i64, Custom); 145dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SRA_PARTS, MVT::i64, Custom); 146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SRL_PARTS, MVT::i64, Custom); 14772062f5744557e270a38192554c3126ea5f97434Tim Northover 14872062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::FREM, MVT::f32, Expand); 14972062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::FREM, MVT::f64, Expand); 150dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FREM, MVT::f80, Expand); 15172062f5744557e270a38192554c3126ea5f97434Tim Northover 152dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Custom lowering hooks are needed for XOR 153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to fold it into CSINC/CSINV. 154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::XOR, MVT::i32, Custom); 155dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::XOR, MVT::i64, Custom); 15672062f5744557e270a38192554c3126ea5f97434Tim Northover 15772062f5744557e270a38192554c3126ea5f97434Tim Northover // Virtually no operation on f128 is legal, but LLVM can't expand them when 15872062f5744557e270a38192554c3126ea5f97434Tim Northover // there's a valid register class, so we need custom operations in most cases. 159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FABS, MVT::f128, Expand); 160dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FADD, MVT::f128, Custom); 161dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); 162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOS, MVT::f128, Expand); 163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FDIV, MVT::f128, Custom); 164dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FMA, MVT::f128, Expand); 165dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FMUL, MVT::f128, Custom); 166dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FNEG, MVT::f128, Expand); 167dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FPOW, MVT::f128, Expand); 168dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FREM, MVT::f128, Expand); 169dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FRINT, MVT::f128, Expand); 170dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSIN, MVT::f128, Expand); 171dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSINCOS, MVT::f128, Expand); 172dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSQRT, MVT::f128, Expand); 173dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSUB, MVT::f128, Custom); 174dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FTRUNC, MVT::f128, Expand); 175dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SETCC, MVT::f128, Custom); 176dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::BR_CC, MVT::f128, Custom); 177dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SELECT, MVT::f128, Custom); 178dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SELECT_CC, MVT::f128, Custom); 179dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom); 18072062f5744557e270a38192554c3126ea5f97434Tim Northover 18172062f5744557e270a38192554c3126ea5f97434Tim Northover // Lowering for many of the conversions is actually specified by the non-f128 18272062f5744557e270a38192554c3126ea5f97434Tim Northover // type. The LowerXXX function will be trivial when f128 isn't involved. 18372062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); 18472062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); 18572062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::FP_TO_SINT, MVT::i128, Custom); 18672062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::FP_TO_UINT, MVT::i32, Custom); 18772062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::FP_TO_UINT, MVT::i64, Custom); 18872062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::FP_TO_UINT, MVT::i128, Custom); 18972062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom); 19072062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SINT_TO_FP, MVT::i64, Custom); 19172062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::SINT_TO_FP, MVT::i128, Custom); 19272062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); 19372062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 19472062f5744557e270a38192554c3126ea5f97434Tim Northover setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); 195dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_ROUND, MVT::f32, Custom); 196dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_ROUND, MVT::f64, Custom); 19772062f5744557e270a38192554c3126ea5f97434Tim Northover 198dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Variable arguments. 199dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::VASTART, MVT::Other, Custom); 200dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::VAARG, MVT::Other, Custom); 201dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::VACOPY, MVT::Other, Custom); 202dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::VAEND, MVT::Other, Expand); 20372062f5744557e270a38192554c3126ea5f97434Tim Northover 204dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Variable-sized objects. 205dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); 206dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); 207dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); 20872062f5744557e270a38192554c3126ea5f97434Tim Northover 209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Exception handling. 210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: These are guesses. Has this been defined yet? 21172062f5744557e270a38192554c3126ea5f97434Tim Northover setExceptionPointerRegister(AArch64::X0); 21272062f5744557e270a38192554c3126ea5f97434Tim Northover setExceptionSelectorRegister(AArch64::X1); 21387773c318fcee853fb34a80a10c4347d523bdafbTim Northover 214dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Constant pool entries 215dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::ConstantPool, MVT::i64, Custom); 21636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 217dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // BlockAddress 218dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::BlockAddress, MVT::i64, Custom); 21936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 220dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Add/Sub overflow ops with MVT::Glues are lowered to NZCV dependences. 221dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::ADDC, MVT::i32, Custom); 222dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::ADDE, MVT::i32, Custom); 223dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SUBC, MVT::i32, Custom); 224dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SUBE, MVT::i32, Custom); 225dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::ADDC, MVT::i64, Custom); 226dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::ADDE, MVT::i64, Custom); 227dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SUBC, MVT::i64, Custom); 228dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SUBE, MVT::i64, Custom); 229dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 lacks both left-rotate and popcount instructions. 231dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::ROTL, MVT::i32, Expand); 232dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::ROTL, MVT::i64, Expand); 23336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 234dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 doesn't have {U|S}MUL_LOHI. 235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); 236dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); 23736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 23836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 239dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Expand the undefined-at-zero variants to cttz/ctlz to their defined-at-zero 240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // counterparts, which AArch64 supports directly. 241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); 242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand); 243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); 244dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand); 24572062f5744557e270a38192554c3126ea5f97434Tim Northover 246dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::CTPOP, MVT::i32, Custom); 247dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::CTPOP, MVT::i64, Custom); 24872062f5744557e270a38192554c3126ea5f97434Tim Northover 249dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SDIVREM, MVT::i32, Expand); 250dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SDIVREM, MVT::i64, Expand); 251dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SREM, MVT::i32, Expand); 252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SREM, MVT::i64, Expand); 253dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UDIVREM, MVT::i32, Expand); 254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UDIVREM, MVT::i64, Expand); 255dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UREM, MVT::i32, Expand); 256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UREM, MVT::i64, Expand); 257211ffd242df8bacf4cbe034f5ca7545ab75b45dfTim Northover 258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Custom lower Add/Sub/Mul with overflow. 259dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SADDO, MVT::i32, Custom); 260dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SADDO, MVT::i64, Custom); 261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UADDO, MVT::i32, Custom); 262dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UADDO, MVT::i64, Custom); 263dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SSUBO, MVT::i32, Custom); 264dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SSUBO, MVT::i64, Custom); 265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::USUBO, MVT::i32, Custom); 266dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::USUBO, MVT::i64, Custom); 267dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SMULO, MVT::i32, Custom); 268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SMULO, MVT::i64, Custom); 269dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UMULO, MVT::i32, Custom); 270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UMULO, MVT::i64, Custom); 271211ffd242df8bacf4cbe034f5ca7545ab75b45dfTim Northover 272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSIN, MVT::f32, Expand); 273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSIN, MVT::f64, Expand); 274dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOS, MVT::f32, Expand); 275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOS, MVT::f64, Expand); 276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FPOW, MVT::f32, Expand); 277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FPOW, MVT::f64, Expand); 278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); 279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); 280dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 281dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 has implementations of a lot of rounding-like FP operations. 282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static MVT RoundingTypes[] = { MVT::f32, MVT::f64}; 283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned I = 0; I < array_lengthof(RoundingTypes); ++I) { 284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT Ty = RoundingTypes[I]; 285dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FFLOOR, Ty, Legal); 286dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FNEARBYINT, Ty, Legal); 287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCEIL, Ty, Legal); 288dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FRINT, Ty, Legal); 289dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FTRUNC, Ty, Legal); 290dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FROUND, Ty, Legal); 291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 292211ffd242df8bacf4cbe034f5ca7545ab75b45dfTim Northover 293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::PREFETCH, MVT::Other, Custom); 29472062f5744557e270a38192554c3126ea5f97434Tim Northover 295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Subtarget->isTargetMachO()) { 296dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For iOS, we don't want to the normal expansion of a libcall to 297dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // sincos. We want to issue a libcall to __sincos_stret to avoid memory 298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // traffic. 299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSINCOS, MVT::f64, Custom); 300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSINCOS, MVT::f32, Custom); 301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSINCOS, MVT::f64, Expand); 303dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSINCOS, MVT::f32, Expand); 304f04a4d74b86733b853b7445ab6d5a3bde025a30dBill Wendling } 305f04a4d74b86733b853b7445ab6d5a3bde025a30dBill Wendling 306dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 does not have floating-point extending loads, i1 sign-extending 307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // load, floating-point truncating stores, or v2i32->v2i16 truncating store. 308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); 309dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setLoadExtAction(ISD::EXTLOAD, MVT::f64, Expand); 310dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setLoadExtAction(ISD::EXTLOAD, MVT::f80, Expand); 311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Expand); 312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction(MVT::f32, MVT::f16, Expand); 313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction(MVT::f64, MVT::f32, Expand); 314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction(MVT::f64, MVT::f16, Expand); 315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction(MVT::f128, MVT::f80, Expand); 316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction(MVT::f128, MVT::f64, Expand); 317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction(MVT::f128, MVT::f32, Expand); 318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction(MVT::f128, MVT::f16, Expand); 319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Indexed loads and stores are supported. 320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned im = (unsigned)ISD::PRE_INC; 321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines im != (unsigned)ISD::LAST_INDEXED_MODE; ++im) { 322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedLoadAction(im, MVT::i8, Legal); 323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedLoadAction(im, MVT::i16, Legal); 324dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedLoadAction(im, MVT::i32, Legal); 325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedLoadAction(im, MVT::i64, Legal); 326dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedLoadAction(im, MVT::f64, Legal); 327dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedLoadAction(im, MVT::f32, Legal); 328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedStoreAction(im, MVT::i8, Legal); 329dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedStoreAction(im, MVT::i16, Legal); 330dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedStoreAction(im, MVT::i32, Legal); 331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedStoreAction(im, MVT::i64, Legal); 332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedStoreAction(im, MVT::f64, Legal); 333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedStoreAction(im, MVT::f32, Legal); 334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 33572062f5744557e270a38192554c3126ea5f97434Tim Northover 336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Trap. 337dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::TRAP, MVT::Other, Legal); 33872062f5744557e270a38192554c3126ea5f97434Tim Northover 339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We combine OR nodes for bitfield operations. 340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::OR); 34172062f5744557e270a38192554c3126ea5f97434Tim Northover 342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Vector add and sub nodes may conceal a high-half opportunity. 343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Also, try to fold ADD into CSINC/CSINV.. 344dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::ADD); 345dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::SUB); 34672062f5744557e270a38192554c3126ea5f97434Tim Northover 347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::XOR); 348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::SINT_TO_FP); 349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::UINT_TO_FP); 35072062f5744557e270a38192554c3126ea5f97434Tim Northover 351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); 35272062f5744557e270a38192554c3126ea5f97434Tim Northover 353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::ANY_EXTEND); 354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::ZERO_EXTEND); 355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::SIGN_EXTEND); 356dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::BITCAST); 357dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::CONCAT_VECTORS); 358dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::STORE); 35972062f5744557e270a38192554c3126ea5f97434Tim Northover 360dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::MUL); 36172062f5744557e270a38192554c3126ea5f97434Tim Northover 362dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::SELECT); 363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::VSELECT); 36472062f5744557e270a38192554c3126ea5f97434Tim Northover 365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::INTRINSIC_VOID); 366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); 367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); 36872062f5744557e270a38192554c3126ea5f97434Tim Northover 369dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MaxStoresPerMemset = MaxStoresPerMemsetOptSize = 8; 370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MaxStoresPerMemcpy = MaxStoresPerMemcpyOptSize = 4; 371dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MaxStoresPerMemmove = MaxStoresPerMemmoveOptSize = 4; 37272062f5744557e270a38192554c3126ea5f97434Tim Northover 373dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setStackPointerRegisterToSaveRestore(AArch64::SP); 374211ffd242df8bacf4cbe034f5ca7545ab75b45dfTim Northover 375dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setSchedulingPreference(Sched::Hybrid); 37672062f5744557e270a38192554c3126ea5f97434Tim Northover 377dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Enable TBZ/TBNZ 378dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MaskAndBranchFoldingIsLegal = true; 379dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 380dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setMinFunctionAlignment(2); 381dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 382dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RequireStrictAlign = (Align == StrictAlign); 383dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 384dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setHasExtractBitsInsn(true); 385dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 386dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Subtarget->hasNEON()) { 387dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: v1f64 shouldn't be legal if we can avoid it, because it leads to 388dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // silliness like this: 389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FABS, MVT::v1f64, Expand); 390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FADD, MVT::v1f64, Expand); 391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCEIL, MVT::v1f64, Expand); 392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOPYSIGN, MVT::v1f64, Expand); 393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOS, MVT::v1f64, Expand); 394dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FDIV, MVT::v1f64, Expand); 395dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FFLOOR, MVT::v1f64, Expand); 396dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FMA, MVT::v1f64, Expand); 397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FMUL, MVT::v1f64, Expand); 398dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FNEARBYINT, MVT::v1f64, Expand); 399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FNEG, MVT::v1f64, Expand); 400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FPOW, MVT::v1f64, Expand); 401dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FREM, MVT::v1f64, Expand); 402dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FROUND, MVT::v1f64, Expand); 403dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FRINT, MVT::v1f64, Expand); 404dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSIN, MVT::v1f64, Expand); 405dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSINCOS, MVT::v1f64, Expand); 406dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSQRT, MVT::v1f64, Expand); 407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSUB, MVT::v1f64, Expand); 408dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FTRUNC, MVT::v1f64, Expand); 409dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SETCC, MVT::v1f64, Expand); 410dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::BR_CC, MVT::v1f64, Expand); 411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SELECT, MVT::v1f64, Expand); 412dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SELECT_CC, MVT::v1f64, Expand); 413dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_EXTEND, MVT::v1f64, Expand); 414dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 415dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_TO_SINT, MVT::v1i64, Expand); 416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_TO_UINT, MVT::v1i64, Expand); 417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SINT_TO_FP, MVT::v1i64, Expand); 418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand); 419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_ROUND, MVT::v1f64, Expand); 420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::MUL, MVT::v1i64, Expand); 422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 doesn't have a direct vector ->f32 conversion instructions for 424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // elements smaller than i32, so promote the input to i32 first. 425dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Promote); 426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SINT_TO_FP, MVT::v4i8, Promote); 427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Promote); 428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SINT_TO_FP, MVT::v4i16, Promote); 429dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Similarly, there is no direct i32 -> f64 vector conversion instruction. 430dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SINT_TO_FP, MVT::v2i32, Custom); 431dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom); 432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Custom); 433dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Custom); 43472062f5744557e270a38192554c3126ea5f97434Tim Northover 435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 doesn't have MUL.2d: 436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::MUL, MVT::v2i64, Expand); 437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::ANY_EXTEND, MVT::v4i32, Legal); 438dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction(MVT::v2i32, MVT::v2i16, Expand); 439dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Likewise, narrowing and extending vector loads/stores aren't handled 440dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // directly. 441dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; 442dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) { 443dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 444dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SIGN_EXTEND_INREG, (MVT::SimpleValueType)VT, 445dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Expand); 446dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 447dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::MULHS, (MVT::SimpleValueType)VT, Expand); 448dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SMUL_LOHI, (MVT::SimpleValueType)VT, Expand); 449dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::MULHU, (MVT::SimpleValueType)VT, Expand); 450dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UMUL_LOHI, (MVT::SimpleValueType)VT, Expand); 451dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 452dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::BSWAP, (MVT::SimpleValueType)VT, Expand); 453dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 454dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned InnerVT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; 455dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InnerVT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++InnerVT) 456dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setTruncStoreAction((MVT::SimpleValueType)VT, 457dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (MVT::SimpleValueType)InnerVT, Expand); 458dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setLoadExtAction(ISD::SEXTLOAD, (MVT::SimpleValueType)VT, Expand); 459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setLoadExtAction(ISD::ZEXTLOAD, (MVT::SimpleValueType)VT, Expand); 460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setLoadExtAction(ISD::EXTLOAD, (MVT::SimpleValueType)VT, Expand); 461dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 46272062f5744557e270a38192554c3126ea5f97434Tim Northover 463dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 has implementations of a lot of rounding-like FP operations. 464dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static MVT RoundingVecTypes[] = {MVT::v2f32, MVT::v4f32, MVT::v2f64 }; 465dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned I = 0; I < array_lengthof(RoundingVecTypes); ++I) { 466dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT Ty = RoundingVecTypes[I]; 467dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FFLOOR, Ty, Legal); 468dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FNEARBYINT, Ty, Legal); 469dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCEIL, Ty, Legal); 470dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FRINT, Ty, Legal); 471dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FTRUNC, Ty, Legal); 472dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FROUND, Ty, Legal); 473dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 474dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 475dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 47672062f5744557e270a38192554c3126ea5f97434Tim Northover 477dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesvoid AArch64TargetLowering::addTypeForNEON(EVT VT, EVT PromotedBitwiseVT) { 478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::v2f32) { 479dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::LOAD, VT.getSimpleVT(), Promote); 480dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AddPromotedToType(ISD::LOAD, VT.getSimpleVT(), MVT::v2i32); 48172062f5744557e270a38192554c3126ea5f97434Tim Northover 482dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote); 483dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AddPromotedToType(ISD::STORE, VT.getSimpleVT(), MVT::v2i32); 484dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (VT == MVT::v2f64 || VT == MVT::v4f32) { 485dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::LOAD, VT.getSimpleVT(), Promote); 486dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AddPromotedToType(ISD::LOAD, VT.getSimpleVT(), MVT::v2i64); 48772062f5744557e270a38192554c3126ea5f97434Tim Northover 488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote); 489dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AddPromotedToType(ISD::STORE, VT.getSimpleVT(), MVT::v2i64); 490dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 49172062f5744557e270a38192554c3126ea5f97434Tim Northover 492dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Mark vector float intrinsics as expand. 493dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::v2f32 || VT == MVT::v4f32 || VT == MVT::v2f64) { 494dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FSIN, VT.getSimpleVT(), Expand); 495dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FCOS, VT.getSimpleVT(), Expand); 496dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FPOWI, VT.getSimpleVT(), Expand); 497dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FPOW, VT.getSimpleVT(), Expand); 498dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FLOG, VT.getSimpleVT(), Expand); 499dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FLOG2, VT.getSimpleVT(), Expand); 500dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FLOG10, VT.getSimpleVT(), Expand); 501dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FEXP, VT.getSimpleVT(), Expand); 502dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FEXP2, VT.getSimpleVT(), Expand); 503dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 50472062f5744557e270a38192554c3126ea5f97434Tim Northover 505dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT.getSimpleVT(), Custom); 506dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::INSERT_VECTOR_ELT, VT.getSimpleVT(), Custom); 507dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::BUILD_VECTOR, VT.getSimpleVT(), Custom); 508dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::VECTOR_SHUFFLE, VT.getSimpleVT(), Custom); 509dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::EXTRACT_SUBVECTOR, VT.getSimpleVT(), Custom); 510dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SRA, VT.getSimpleVT(), Custom); 511dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SRL, VT.getSimpleVT(), Custom); 512dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SHL, VT.getSimpleVT(), Custom); 513dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::AND, VT.getSimpleVT(), Custom); 514dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::OR, VT.getSimpleVT(), Custom); 515dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SETCC, VT.getSimpleVT(), Custom); 516dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::CONCAT_VECTORS, VT.getSimpleVT(), Legal); 517dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 518dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SELECT, VT.getSimpleVT(), Expand); 519dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SELECT_CC, VT.getSimpleVT(), Expand); 520dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::VSELECT, VT.getSimpleVT(), Expand); 521dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setLoadExtAction(ISD::EXTLOAD, VT.getSimpleVT(), Expand); 522dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 523dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // CNT supports only B element sizes. 524dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT != MVT::v8i8 && VT != MVT::v16i8) 525dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::CTPOP, VT.getSimpleVT(), Expand); 526dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 527dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UDIV, VT.getSimpleVT(), Expand); 528dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SDIV, VT.getSimpleVT(), Expand); 529dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::UREM, VT.getSimpleVT(), Expand); 530dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::SREM, VT.getSimpleVT(), Expand); 531dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FREM, VT.getSimpleVT(), Expand); 532dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 533dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_TO_SINT, VT.getSimpleVT(), Custom); 534dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setOperationAction(ISD::FP_TO_UINT, VT.getSimpleVT(), Custom); 535dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 536dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Subtarget->isLittleEndian()) { 537dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned im = (unsigned)ISD::PRE_INC; 538dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines im != (unsigned)ISD::LAST_INDEXED_MODE; ++im) { 539dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedLoadAction(im, VT.getSimpleVT(), Legal); 540dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines setIndexedStoreAction(im, VT.getSimpleVT(), Legal); 541dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 542dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 543dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 54472062f5744557e270a38192554c3126ea5f97434Tim Northover 545dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesvoid AArch64TargetLowering::addDRTypeForNEON(MVT VT) { 546dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addRegisterClass(VT, &AArch64::FPR64RegClass); 547dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addTypeForNEON(VT, MVT::v2i32); 548dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 54972062f5744557e270a38192554c3126ea5f97434Tim Northover 550dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesvoid AArch64TargetLowering::addQRTypeForNEON(MVT VT) { 551dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addRegisterClass(VT, &AArch64::FPR128RegClass); 552dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines addTypeForNEON(VT, MVT::v4i32); 553dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 55472062f5744557e270a38192554c3126ea5f97434Tim Northover 555dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesEVT AArch64TargetLowering::getSetCCResultType(LLVMContext &, EVT VT) const { 556dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isVector()) 557dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return MVT::i32; 558dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return VT.changeVectorElementTypeToInteger(); 559dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 56072062f5744557e270a38192554c3126ea5f97434Tim Northover 561dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// computeKnownBitsForTargetNode - Determine which of the bits specified in 562dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Mask are known to be either zero or one and return them in the 563dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// KnownZero/KnownOne bitsets. 564dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesvoid AArch64TargetLowering::computeKnownBitsForTargetNode( 565dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SDValue Op, APInt &KnownZero, APInt &KnownOne, 566dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SelectionDAG &DAG, unsigned Depth) const { 567dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Op.getOpcode()) { 568dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 569dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 570dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CSEL: { 571dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt KnownZero2, KnownOne2; 572dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.computeKnownBits(Op->getOperand(0), KnownZero, KnownOne, Depth + 1); 573dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.computeKnownBits(Op->getOperand(1), KnownZero2, KnownOne2, Depth + 1); 574dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines KnownZero &= KnownZero2; 575dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines KnownOne &= KnownOne2; 576dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 577dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 578dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INTRINSIC_W_CHAIN: { 579dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CN = cast<ConstantSDNode>(Op->getOperand(1)); 580dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); 581dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (IntID) { 582dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: return; 583dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_ldaxr: 584dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_ldxr: { 585dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned BitWidth = KnownOne.getBitWidth(); 586dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = cast<MemIntrinsicSDNode>(Op)->getMemoryVT(); 587dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned MemBits = VT.getScalarType().getSizeInBits(); 588dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); 589dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 590dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 591dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 592dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 593dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 594dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INTRINSIC_WO_CHAIN: 595dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INTRINSIC_VOID: { 596dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); 597dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (IntNo) { 598dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 599dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 600dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_umaxv: 601dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_uminv: { 602dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Figure out the datatype of the vector operand. The UMINV instruction 603dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // will zero extend the result, so we can mark as known zero all the 604dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // bits larger than the element datatype. 32-bit or larget doesn't need 605dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // this as those are legal types and will be handled by isel directly. 606dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT VT = Op.getOperand(1).getValueType().getSimpleVT(); 607dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned BitWidth = KnownZero.getBitWidth(); 608dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::v8i8 || VT == MVT::v16i8) { 609dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(BitWidth >= 8 && "Unexpected width!"); 610dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt Mask = APInt::getHighBitsSet(BitWidth, BitWidth - 8); 611dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines KnownZero |= Mask; 612dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (VT == MVT::v4i16 || VT == MVT::v8i16) { 613dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(BitWidth >= 16 && "Unexpected width!"); 614dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt Mask = APInt::getHighBitsSet(BitWidth, BitWidth - 16); 615dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines KnownZero |= Mask; 616dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 617dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 618dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } break; 619dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 620dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 621dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 622dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 62372062f5744557e270a38192554c3126ea5f97434Tim Northover 624dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesMVT AArch64TargetLowering::getScalarShiftAmountTy(EVT LHSTy) const { 625dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return MVT::i64; 626dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 62772062f5744557e270a38192554c3126ea5f97434Tim Northover 628dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesunsigned AArch64TargetLowering::getMaximalGlobalOffset() const { 629dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: On AArch64, this depends on the type. 630cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // Basically, the addressable offsets are up to 4095 * Ty.getSizeInBytes(). 631dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // and the offset has to be a multiple of the related size in bytes. 632dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return 4095; 633dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 63472062f5744557e270a38192554c3126ea5f97434Tim Northover 635dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesFastISel * 636dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo, 637dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetLibraryInfo *libInfo) const { 638dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64::createFastISel(funcInfo, libInfo); 63972062f5744557e270a38192554c3126ea5f97434Tim Northover} 64072062f5744557e270a38192554c3126ea5f97434Tim Northover 641dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesconst char *AArch64TargetLowering::getTargetNodeName(unsigned Opcode) const { 642dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Opcode) { 643dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 644dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return nullptr; 645dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CALL: return "AArch64ISD::CALL"; 646dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ADRP: return "AArch64ISD::ADRP"; 647dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ADDlow: return "AArch64ISD::ADDlow"; 648dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LOADgot: return "AArch64ISD::LOADgot"; 649dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::RET_FLAG: return "AArch64ISD::RET_FLAG"; 650dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::BRCOND: return "AArch64ISD::BRCOND"; 651dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CSEL: return "AArch64ISD::CSEL"; 652dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCSEL: return "AArch64ISD::FCSEL"; 653dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CSINV: return "AArch64ISD::CSINV"; 654dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CSNEG: return "AArch64ISD::CSNEG"; 655dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CSINC: return "AArch64ISD::CSINC"; 656dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::THREAD_POINTER: return "AArch64ISD::THREAD_POINTER"; 657dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::TLSDESC_CALL: return "AArch64ISD::TLSDESC_CALL"; 658dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ADC: return "AArch64ISD::ADC"; 659dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::SBC: return "AArch64ISD::SBC"; 660dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ADDS: return "AArch64ISD::ADDS"; 661dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::SUBS: return "AArch64ISD::SUBS"; 662dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ADCS: return "AArch64ISD::ADCS"; 663dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::SBCS: return "AArch64ISD::SBCS"; 664dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ANDS: return "AArch64ISD::ANDS"; 665dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMP: return "AArch64ISD::FCMP"; 666dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FMIN: return "AArch64ISD::FMIN"; 667dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FMAX: return "AArch64ISD::FMAX"; 668dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUP: return "AArch64ISD::DUP"; 669dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUPLANE8: return "AArch64ISD::DUPLANE8"; 670dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUPLANE16: return "AArch64ISD::DUPLANE16"; 671dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUPLANE32: return "AArch64ISD::DUPLANE32"; 672dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUPLANE64: return "AArch64ISD::DUPLANE64"; 673dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::MOVI: return "AArch64ISD::MOVI"; 674dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::MOVIshift: return "AArch64ISD::MOVIshift"; 675dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::MOVIedit: return "AArch64ISD::MOVIedit"; 676dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::MOVImsl: return "AArch64ISD::MOVImsl"; 677dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FMOV: return "AArch64ISD::FMOV"; 678dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::MVNIshift: return "AArch64ISD::MVNIshift"; 679dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::MVNImsl: return "AArch64ISD::MVNImsl"; 680dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::BICi: return "AArch64ISD::BICi"; 681dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ORRi: return "AArch64ISD::ORRi"; 682dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::BSL: return "AArch64ISD::BSL"; 683dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::NEG: return "AArch64ISD::NEG"; 684dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::EXTR: return "AArch64ISD::EXTR"; 685dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ZIP1: return "AArch64ISD::ZIP1"; 686dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ZIP2: return "AArch64ISD::ZIP2"; 687dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::UZP1: return "AArch64ISD::UZP1"; 688dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::UZP2: return "AArch64ISD::UZP2"; 689dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::TRN1: return "AArch64ISD::TRN1"; 690dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::TRN2: return "AArch64ISD::TRN2"; 691dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::REV16: return "AArch64ISD::REV16"; 692dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::REV32: return "AArch64ISD::REV32"; 693dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::REV64: return "AArch64ISD::REV64"; 694dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::EXT: return "AArch64ISD::EXT"; 695dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::VSHL: return "AArch64ISD::VSHL"; 696dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::VLSHR: return "AArch64ISD::VLSHR"; 697dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::VASHR: return "AArch64ISD::VASHR"; 698dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMEQ: return "AArch64ISD::CMEQ"; 699dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMGE: return "AArch64ISD::CMGE"; 700dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMGT: return "AArch64ISD::CMGT"; 701dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMHI: return "AArch64ISD::CMHI"; 702dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMHS: return "AArch64ISD::CMHS"; 703dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMEQ: return "AArch64ISD::FCMEQ"; 704dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMGE: return "AArch64ISD::FCMGE"; 705dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMGT: return "AArch64ISD::FCMGT"; 706dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMEQz: return "AArch64ISD::CMEQz"; 707dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMGEz: return "AArch64ISD::CMGEz"; 708dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMGTz: return "AArch64ISD::CMGTz"; 709dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMLEz: return "AArch64ISD::CMLEz"; 710dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CMLTz: return "AArch64ISD::CMLTz"; 711dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMEQz: return "AArch64ISD::FCMEQz"; 712dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMGEz: return "AArch64ISD::FCMGEz"; 713dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMGTz: return "AArch64ISD::FCMGTz"; 714dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMLEz: return "AArch64ISD::FCMLEz"; 715dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::FCMLTz: return "AArch64ISD::FCMLTz"; 716dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::NOT: return "AArch64ISD::NOT"; 717dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::BIT: return "AArch64ISD::BIT"; 718dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CBZ: return "AArch64ISD::CBZ"; 719dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::CBNZ: return "AArch64ISD::CBNZ"; 720dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::TBZ: return "AArch64ISD::TBZ"; 721dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::TBNZ: return "AArch64ISD::TBNZ"; 722dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::TC_RETURN: return "AArch64ISD::TC_RETURN"; 723dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::SITOF: return "AArch64ISD::SITOF"; 724dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::UITOF: return "AArch64ISD::UITOF"; 725dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::SQSHL_I: return "AArch64ISD::SQSHL_I"; 726dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::UQSHL_I: return "AArch64ISD::UQSHL_I"; 727dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::SRSHR_I: return "AArch64ISD::SRSHR_I"; 728dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::URSHR_I: return "AArch64ISD::URSHR_I"; 729dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::SQSHLU_I: return "AArch64ISD::SQSHLU_I"; 730dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::WrapperLarge: return "AArch64ISD::WrapperLarge"; 731dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD2post: return "AArch64ISD::LD2post"; 732dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD3post: return "AArch64ISD::LD3post"; 733dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD4post: return "AArch64ISD::LD4post"; 734dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST2post: return "AArch64ISD::ST2post"; 735dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST3post: return "AArch64ISD::ST3post"; 736dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST4post: return "AArch64ISD::ST4post"; 737dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD1x2post: return "AArch64ISD::LD1x2post"; 738dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD1x3post: return "AArch64ISD::LD1x3post"; 739dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD1x4post: return "AArch64ISD::LD1x4post"; 740dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST1x2post: return "AArch64ISD::ST1x2post"; 741dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST1x3post: return "AArch64ISD::ST1x3post"; 742dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST1x4post: return "AArch64ISD::ST1x4post"; 743dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD1DUPpost: return "AArch64ISD::LD1DUPpost"; 744dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD2DUPpost: return "AArch64ISD::LD2DUPpost"; 745dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD3DUPpost: return "AArch64ISD::LD3DUPpost"; 746dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD4DUPpost: return "AArch64ISD::LD4DUPpost"; 747dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD1LANEpost: return "AArch64ISD::LD1LANEpost"; 748dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD2LANEpost: return "AArch64ISD::LD2LANEpost"; 749dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD3LANEpost: return "AArch64ISD::LD3LANEpost"; 750dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::LD4LANEpost: return "AArch64ISD::LD4LANEpost"; 751dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST2LANEpost: return "AArch64ISD::ST2LANEpost"; 752dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST3LANEpost: return "AArch64ISD::ST3LANEpost"; 753dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::ST4LANEpost: return "AArch64ISD::ST4LANEpost"; 754dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 75572062f5744557e270a38192554c3126ea5f97434Tim Northover} 75672062f5744557e270a38192554c3126ea5f97434Tim Northover 75772062f5744557e270a38192554c3126ea5f97434Tim NorthoverMachineBasicBlock * 75872062f5744557e270a38192554c3126ea5f97434Tim NorthoverAArch64TargetLowering::EmitF128CSEL(MachineInstr *MI, 75972062f5744557e270a38192554c3126ea5f97434Tim Northover MachineBasicBlock *MBB) const { 760dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We materialise the F128CSEL pseudo-instruction as some control flow and a 761dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // phi node: 762dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 763dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // OrigBB: 764dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // [... previous instrs leading to comparison ...] 765dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // b.ne TrueBB 766dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // b EndBB 767dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TrueBB: 768dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // ; Fallthrough 769dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // EndBB: 770dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Dest = PHI [IfTrue, TrueBB], [IfFalse, OrigBB] 771dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 77272062f5744557e270a38192554c3126ea5f97434Tim Northover const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); 77372062f5744557e270a38192554c3126ea5f97434Tim Northover MachineFunction *MF = MBB->getParent(); 77472062f5744557e270a38192554c3126ea5f97434Tim Northover const BasicBlock *LLVM_BB = MBB->getBasicBlock(); 77572062f5744557e270a38192554c3126ea5f97434Tim Northover DebugLoc DL = MI->getDebugLoc(); 77672062f5744557e270a38192554c3126ea5f97434Tim Northover MachineFunction::iterator It = MBB; 77772062f5744557e270a38192554c3126ea5f97434Tim Northover ++It; 77872062f5744557e270a38192554c3126ea5f97434Tim Northover 77972062f5744557e270a38192554c3126ea5f97434Tim Northover unsigned DestReg = MI->getOperand(0).getReg(); 78072062f5744557e270a38192554c3126ea5f97434Tim Northover unsigned IfTrueReg = MI->getOperand(1).getReg(); 78172062f5744557e270a38192554c3126ea5f97434Tim Northover unsigned IfFalseReg = MI->getOperand(2).getReg(); 78272062f5744557e270a38192554c3126ea5f97434Tim Northover unsigned CondCode = MI->getOperand(3).getImm(); 78372062f5744557e270a38192554c3126ea5f97434Tim Northover bool NZCVKilled = MI->getOperand(4).isKill(); 78472062f5744557e270a38192554c3126ea5f97434Tim Northover 78572062f5744557e270a38192554c3126ea5f97434Tim Northover MachineBasicBlock *TrueBB = MF->CreateMachineBasicBlock(LLVM_BB); 78672062f5744557e270a38192554c3126ea5f97434Tim Northover MachineBasicBlock *EndBB = MF->CreateMachineBasicBlock(LLVM_BB); 78772062f5744557e270a38192554c3126ea5f97434Tim Northover MF->insert(It, TrueBB); 78872062f5744557e270a38192554c3126ea5f97434Tim Northover MF->insert(It, EndBB); 78972062f5744557e270a38192554c3126ea5f97434Tim Northover 79072062f5744557e270a38192554c3126ea5f97434Tim Northover // Transfer rest of current basic-block to EndBB 79136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines EndBB->splice(EndBB->begin(), MBB, std::next(MachineBasicBlock::iterator(MI)), 79272062f5744557e270a38192554c3126ea5f97434Tim Northover MBB->end()); 79372062f5744557e270a38192554c3126ea5f97434Tim Northover EndBB->transferSuccessorsAndUpdatePHIs(MBB); 79472062f5744557e270a38192554c3126ea5f97434Tim Northover 795dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildMI(MBB, DL, TII->get(AArch64::Bcc)).addImm(CondCode).addMBB(TrueBB); 796dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildMI(MBB, DL, TII->get(AArch64::B)).addMBB(EndBB); 79772062f5744557e270a38192554c3126ea5f97434Tim Northover MBB->addSuccessor(TrueBB); 79872062f5744557e270a38192554c3126ea5f97434Tim Northover MBB->addSuccessor(EndBB); 79972062f5744557e270a38192554c3126ea5f97434Tim Northover 800dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TrueBB falls through to the end. 801dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TrueBB->addSuccessor(EndBB); 802dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 8032f21452ba1ee5bde8fee438b4cf1a1ce95beb6caAmara Emerson if (!NZCVKilled) { 8042f21452ba1ee5bde8fee438b4cf1a1ce95beb6caAmara Emerson TrueBB->addLiveIn(AArch64::NZCV); 8052f21452ba1ee5bde8fee438b4cf1a1ce95beb6caAmara Emerson EndBB->addLiveIn(AArch64::NZCV); 8062f21452ba1ee5bde8fee438b4cf1a1ce95beb6caAmara Emerson } 8072f21452ba1ee5bde8fee438b4cf1a1ce95beb6caAmara Emerson 808dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildMI(*EndBB, EndBB->begin(), DL, TII->get(AArch64::PHI), DestReg) 809dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .addReg(IfTrueReg) 810dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .addMBB(TrueBB) 811dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .addReg(IfFalseReg) 812dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .addMBB(MBB); 81372062f5744557e270a38192554c3126ea5f97434Tim Northover 81472062f5744557e270a38192554c3126ea5f97434Tim Northover MI->eraseFromParent(); 81572062f5744557e270a38192554c3126ea5f97434Tim Northover return EndBB; 81672062f5744557e270a38192554c3126ea5f97434Tim Northover} 81772062f5744557e270a38192554c3126ea5f97434Tim Northover 81872062f5744557e270a38192554c3126ea5f97434Tim NorthoverMachineBasicBlock * 81972062f5744557e270a38192554c3126ea5f97434Tim NorthoverAArch64TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, 820dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineBasicBlock *BB) const { 82172062f5744557e270a38192554c3126ea5f97434Tim Northover switch (MI->getOpcode()) { 822dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 823dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#ifndef NDEBUG 824dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MI->dump(); 825dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#endif 826cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines llvm_unreachable("Unexpected instruction for custom inserter!"); 82772062f5744557e270a38192554c3126ea5f97434Tim Northover 828dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64::F128CSEL: 829dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return EmitF128CSEL(MI, BB); 83072062f5744557e270a38192554c3126ea5f97434Tim Northover 831dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case TargetOpcode::STACKMAP: 832dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case TargetOpcode::PATCHPOINT: 833dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return emitPatchPoint(MI, BB); 83472062f5744557e270a38192554c3126ea5f97434Tim Northover } 83572062f5744557e270a38192554c3126ea5f97434Tim Northover} 83672062f5744557e270a38192554c3126ea5f97434Tim Northover 837dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 838dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// AArch64 Lowering private implementation. 839dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 84072062f5744557e270a38192554c3126ea5f97434Tim Northover 841dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 842dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Lowering Code 843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 84472062f5744557e270a38192554c3126ea5f97434Tim Northover 845dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// changeIntCCToAArch64CC - Convert a DAG integer condition code to an AArch64 846dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// CC 847dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic AArch64CC::CondCode changeIntCCToAArch64CC(ISD::CondCode CC) { 848dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (CC) { 849dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 850dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown condition code!"); 851dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETNE: 852dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::NE; 853dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETEQ: 854dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::EQ; 855dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETGT: 856dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::GT; 857dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETGE: 858dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::GE; 859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETLT: 860dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::LT; 861dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETLE: 862dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::LE; 863dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGT: 864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::HI; 865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGE: 866dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::HS; 867dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULT: 868dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::LO; 869dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULE: 870dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64CC::LS; 871dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 87272062f5744557e270a38192554c3126ea5f97434Tim Northover} 87372062f5744557e270a38192554c3126ea5f97434Tim Northover 874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// changeFPCCToAArch64CC - Convert a DAG fp condition code to an AArch64 CC. 875dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic void changeFPCCToAArch64CC(ISD::CondCode CC, 876dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode &CondCode, 877dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode &CondCode2) { 878dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode2 = AArch64CC::AL; 879dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (CC) { 880dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 881dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown FP condition!"); 882dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETEQ: 883dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOEQ: 884dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::EQ; 885dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 886dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETGT: 887dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOGT: 888dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::GT; 889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 890dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETGE: 891dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOGE: 892dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::GE; 893dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 894dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOLT: 895dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::MI; 896dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOLE: 898dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::LS; 899dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 900dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETONE: 901dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::MI; 902dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode2 = AArch64CC::GT; 903dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETO: 905dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::VC; 906dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 907dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUO: 908dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::VS; 909dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 910dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUEQ: 911dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::EQ; 912dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode2 = AArch64CC::VS; 913dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 914dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGT: 915dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::HI; 916dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 917dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGE: 918dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::PL; 919dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 920dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETLT: 921dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULT: 922dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::LT; 923dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 924dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETLE: 925dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULE: 926dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::LE; 927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 928dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETNE: 929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUNE: 930dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::NE; 931dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 93272062f5744557e270a38192554c3126ea5f97434Tim Northover } 93372062f5744557e270a38192554c3126ea5f97434Tim Northover} 93472062f5744557e270a38192554c3126ea5f97434Tim Northover 935dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// changeVectorFPCCToAArch64CC - Convert a DAG fp condition code to an AArch64 936dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// CC usable with the vector instructions. Fewer operations are available 937dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// without a real NZCV register, so we have to use less efficient combinations 938dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// to get the same effect. 939dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic void changeVectorFPCCToAArch64CC(ISD::CondCode CC, 940dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode &CondCode, 941dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode &CondCode2, 942dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool &Invert) { 943dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Invert = false; 944dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (CC) { 945dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 946dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Mostly the scalar mappings work fine. 947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines changeFPCCToAArch64CC(CC, CondCode, CondCode2); 948dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 949dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUO: 950dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Invert = true; // Fallthrough 951dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETO: 952dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode = AArch64CC::MI; 953dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CondCode2 = AArch64CC::GE; 954dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 955dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUEQ: 956dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULT: 957dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULE: 958dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGT: 959dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGE: 960dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // All of the compare-mask comparisons are ordered, but we can switch 961dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // between the two by a double inversion. E.g. ULE == !OGT. 962dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Invert = true; 963dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines changeFPCCToAArch64CC(getSetCCInverse(CC, false), CondCode, CondCode2); 964dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 965dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 966dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 96772062f5744557e270a38192554c3126ea5f97434Tim Northover 968dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isLegalArithImmed(uint64_t C) { 969dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Matches AArch64DAGToDAGISel::SelectArithImmed(). 970dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return (C >> 12 == 0) || ((C & 0xFFFULL) == 0 && C >> 24 == 0); 971dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 97272062f5744557e270a38192554c3126ea5f97434Tim Northover 973dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue emitComparison(SDValue LHS, SDValue RHS, ISD::CondCode CC, 974dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl, SelectionDAG &DAG) { 975dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = LHS.getValueType(); 976dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 977dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.isFloatingPoint()) 978dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMP, dl, VT, LHS, RHS); 979dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 980dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The CMP instruction is just an alias for SUBS, and representing it as 981dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // SUBS means that it's possible to get CSE with subtract operations. 982dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // A later phase can perform the optimization of setting the destination 983dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // register to WZR/XZR if it ends up being unused. 984dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opcode = AArch64ISD::SUBS; 985dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 986dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (RHS.getOpcode() == ISD::SUB && isa<ConstantSDNode>(RHS.getOperand(0)) && 987dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cast<ConstantSDNode>(RHS.getOperand(0))->getZExtValue() == 0 && 988dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (CC == ISD::SETEQ || CC == ISD::SETNE)) { 989dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We'd like to combine a (CMP op1, (sub 0, op2) into a CMN instruction on 990dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the grounds that "op1 - (-op2) == op1 + op2". However, the C and V flags 991dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // can be set differently by this operation. It comes down to whether 992dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // "SInt(~op2)+1 == SInt(~op2+1)" (and the same for UInt). If they are then 993dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // everything is fine. If not then the optimization is wrong. Thus general 994dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // comparisons are only valid if op2 != 0. 995dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 996dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // So, finally, the only LLVM-native comparisons that don't mention C and V 997dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // are SETEQ and SETNE. They're the only ones we can safely use CMN for in 998dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the absence of information about op2. 999dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::ADDS; 1000dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = RHS.getOperand(1); 1001dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (LHS.getOpcode() == ISD::AND && isa<ConstantSDNode>(RHS) && 1002dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cast<ConstantSDNode>(RHS)->getZExtValue() == 0 && 1003dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines !isUnsignedIntSetCC(CC)) { 1004dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Similarly, (CMP (and X, Y), 0) can be implemented with a TST 1005dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (a.k.a. ANDS) except that the flags are only guaranteed to work for one 1006dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // of the signed comparisons. 1007dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::ANDS; 1008dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = LHS.getOperand(1); 1009dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS = LHS.getOperand(0); 1010dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 101172062f5744557e270a38192554c3126ea5f97434Tim Northover 1012dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opcode, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS) 1013dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .getValue(1); 1014dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 101572062f5744557e270a38192554c3126ea5f97434Tim Northover 1016dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue getAArch64Cmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, 1017dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue &AArch64cc, SelectionDAG &DAG, SDLoc dl) { 1018dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { 1019dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = RHS.getValueType(); 1020dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t C = RHSC->getZExtValue(); 1021dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isLegalArithImmed(C)) { 1022dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Constant does not fit, try adjusting it by one? 1023dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (CC) { 1024dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 1025dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1026dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETLT: 1027dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETGE: 1028dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((VT == MVT::i32 && C != 0x80000000 && 1029dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isLegalArithImmed((uint32_t)(C - 1))) || 1030dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (VT == MVT::i64 && C != 0x80000000ULL && 1031dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isLegalArithImmed(C - 1ULL))) { 1032dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT; 1033dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines C = (VT == MVT::i32) ? (uint32_t)(C - 1) : C - 1; 1034dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = DAG.getConstant(C, VT); 1035dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1036dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1037dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULT: 1038dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGE: 1039dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((VT == MVT::i32 && C != 0 && 1040dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isLegalArithImmed((uint32_t)(C - 1))) || 1041dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (VT == MVT::i64 && C != 0ULL && isLegalArithImmed(C - 1ULL))) { 1042dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT; 1043dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines C = (VT == MVT::i32) ? (uint32_t)(C - 1) : C - 1; 1044dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = DAG.getConstant(C, VT); 1045dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1046dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1047dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETLE: 1048dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETGT: 1049dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((VT == MVT::i32 && C != 0x7fffffff && 1050dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isLegalArithImmed((uint32_t)(C + 1))) || 1051dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (VT == MVT::i64 && C != 0x7ffffffffffffffULL && 1052dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isLegalArithImmed(C + 1ULL))) { 1053dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; 1054dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines C = (VT == MVT::i32) ? (uint32_t)(C + 1) : C + 1; 1055dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = DAG.getConstant(C, VT); 1056dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1057dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1058dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULE: 1059dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGT: 1060dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((VT == MVT::i32 && C != 0xffffffff && 1061dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isLegalArithImmed((uint32_t)(C + 1))) || 1062dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (VT == MVT::i64 && C != 0xfffffffffffffffULL && 1063dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isLegalArithImmed(C + 1ULL))) { 1064dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE; 1065dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines C = (VT == MVT::i32) ? (uint32_t)(C + 1) : C + 1; 1066dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = DAG.getConstant(C, VT); 1067dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1068dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1069dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 107072062f5744557e270a38192554c3126ea5f97434Tim Northover } 107172062f5744557e270a38192554c3126ea5f97434Tim Northover } 107272062f5744557e270a38192554c3126ea5f97434Tim Northover 1073dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = emitComparison(LHS, RHS, CC, dl, DAG); 1074dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode AArch64CC = changeIntCCToAArch64CC(CC); 1075dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64cc = DAG.getConstant(AArch64CC, MVT::i32); 1076dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Cmp; 1077dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 1078c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson 1079dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic std::pair<SDValue, SDValue> 1080dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesgetAArch64XALUOOp(AArch64CC::CondCode &CC, SDValue Op, SelectionDAG &DAG) { 1081dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert((Op.getValueType() == MVT::i32 || Op.getValueType() == MVT::i64) && 1082dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "Unsupported value type"); 1083dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Value, Overflow; 1084dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 1085dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = Op.getOperand(0); 1086dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = Op.getOperand(1); 1087dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = 0; 1088dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Op.getOpcode()) { 1089dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 1090dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown overflow instruction!"); 1091dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SADDO: 1092dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc = AArch64ISD::ADDS; 1093dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = AArch64CC::VS; 1094dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1095dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::UADDO: 1096dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc = AArch64ISD::ADDS; 1097dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = AArch64CC::HS; 1098dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1099dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SSUBO: 1100dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc = AArch64ISD::SUBS; 1101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = AArch64CC::VS; 1102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1103dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::USUBO: 1104dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc = AArch64ISD::SUBS; 1105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = AArch64CC::LO; 1106dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Multiply needs a little bit extra work. 1108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SMULO: 1109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::UMULO: { 1110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = AArch64CC::NE; 1111dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsSigned = (Op.getOpcode() == ISD::SMULO) ? true : false; 1112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getValueType() == MVT::i32) { 1113dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ExtendOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; 1114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For a 32 bit multiply with overflow check we want the instruction 1115dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // selector to generate a widening multiply (SMADDL/UMADDL). For that we 1116dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // need to generate the following pattern: 1117dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (i64 add 0, (i64 mul (i64 sext|zext i32 %a), (i64 sext|zext i32 %b)) 1118dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS = DAG.getNode(ExtendOpc, DL, MVT::i64, LHS); 1119dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = DAG.getNode(ExtendOpc, DL, MVT::i64, RHS); 1120dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mul = DAG.getNode(ISD::MUL, DL, MVT::i64, LHS, RHS); 1121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Add = DAG.getNode(ISD::ADD, DL, MVT::i64, Mul, 1122dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i64)); 1123dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // On AArch64 the upper 32 bits are always zero extended for a 32 bit 1124dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // operation. We need to clear out the upper 32 bits, because we used a 1125dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // widening multiply that wrote all 64 bits. In the end this should be a 1126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // noop. 1127dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, Add); 1128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsSigned) { 1129dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The signed overflow check requires more than just a simple check for 1130dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // any bit set in the upper 32 bits of the result. These bits could be 1131dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // just the sign bits of a negative number. To perform the overflow 1132dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // check we have to arithmetic shift right the 32nd bit of the result by 1133dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 31 bits. Then we compare the result to the upper 32 bits. 1134dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue UpperBits = DAG.getNode(ISD::SRL, DL, MVT::i64, Add, 1135dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(32, MVT::i64)); 1136dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UpperBits = DAG.getNode(ISD::TRUNCATE, DL, MVT::i32, UpperBits); 1137dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i32, Value, 1138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(31, MVT::i64)); 1139dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // It is important that LowerBits is last, otherwise the arithmetic 1140dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // shift will not be folded into the compare (SUBS). 1141dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList VTs = DAG.getVTList(MVT::i32, MVT::i32); 1142dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) 1143dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .getValue(1); 1144dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 1145dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The overflow check for unsigned multiply is easy. We only need to 1146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // check if any of the upper 32 bits are set. This can be done with a 1147dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // CMP (shifted register). For that we need to generate the following 1148dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // pattern: 1149dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (i64 AArch64ISD::SUBS i64 0, (i64 srl i64 %Mul, i64 32) 1150dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue UpperBits = DAG.getNode(ISD::SRL, DL, MVT::i64, Mul, 1151dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(32, MVT::i64)); 1152dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList VTs = DAG.getVTList(MVT::i64, MVT::i32); 1153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Overflow = 1154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::SUBS, DL, VTs, DAG.getConstant(0, MVT::i64), 1155dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UpperBits).getValue(1); 1156c2884320feebc543d2ce51151d5418dfc18da9e4Amara Emerson } 1157dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1158dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op.getValueType() == MVT::i64 && "Expected an i64 value type"); 1160dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For the 64 bit multiply 1161dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value = DAG.getNode(ISD::MUL, DL, MVT::i64, LHS, RHS); 1162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsSigned) { 1163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue UpperBits = DAG.getNode(ISD::MULHS, DL, MVT::i64, LHS, RHS); 1164dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerBits = DAG.getNode(ISD::SRA, DL, MVT::i64, Value, 1165dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(63, MVT::i64)); 1166dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // It is important that LowerBits is last, otherwise the arithmetic 1167dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // shift will not be folded into the compare (SUBS). 1168dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList VTs = DAG.getVTList(MVT::i64, MVT::i32); 1169dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Overflow = DAG.getNode(AArch64ISD::SUBS, DL, VTs, UpperBits, LowerBits) 1170dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .getValue(1); 1171dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 1172dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue UpperBits = DAG.getNode(ISD::MULHU, DL, MVT::i64, LHS, RHS); 1173dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList VTs = DAG.getVTList(MVT::i64, MVT::i32); 1174dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Overflow = 1175dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::SUBS, DL, VTs, DAG.getConstant(0, MVT::i64), 1176dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UpperBits).getValue(1); 117772062f5744557e270a38192554c3126ea5f97434Tim Northover } 1178dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 117972062f5744557e270a38192554c3126ea5f97434Tim Northover } 1180dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } // switch (...) 118172062f5744557e270a38192554c3126ea5f97434Tim Northover 1182dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Opc) { 1183dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::i32); 118472062f5744557e270a38192554c3126ea5f97434Tim Northover 1185dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Emit the AArch64 operation with overflow check. 1186dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value = DAG.getNode(Opc, DL, VTs, LHS, RHS); 1187dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Overflow = Value.getValue(1); 118872062f5744557e270a38192554c3126ea5f97434Tim Northover } 1189dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return std::make_pair(Value, Overflow); 119072062f5744557e270a38192554c3126ea5f97434Tim Northover} 119172062f5744557e270a38192554c3126ea5f97434Tim Northover 1192dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerF128Call(SDValue Op, SelectionDAG &DAG, 1193dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RTLIB::Libcall Call) const { 1194dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 2> Ops; 1195dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0, e = Op->getNumOperands(); i != e; ++i) 1196dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Op.getOperand(i)); 119772062f5744557e270a38192554c3126ea5f97434Tim Northover 1198dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return makeLibCall(DAG, Call, MVT::f128, &Ops[0], Ops.size(), false, 1199dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc(Op)).first; 1200dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 120172062f5744557e270a38192554c3126ea5f97434Tim Northover 1202dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue LowerXOR(SDValue Op, SelectionDAG &DAG) { 1203dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Sel = Op.getOperand(0); 1204dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Other = Op.getOperand(1); 120572062f5744557e270a38192554c3126ea5f97434Tim Northover 1206dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If neither operand is a SELECT_CC, give up. 1207dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Sel.getOpcode() != ISD::SELECT_CC) 1208dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(Sel, Other); 1209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Sel.getOpcode() != ISD::SELECT_CC) 1210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 121172062f5744557e270a38192554c3126ea5f97434Tim Northover 1212dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The folding we want to perform is: 1213dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (xor x, (select_cc a, b, cc, 0, -1) ) 1214dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // --> 1215dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (csel x, (xor x, -1), cc ...) 1216dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 1217dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The latter will get matched to a CSINV instruction. 121872062f5744557e270a38192554c3126ea5f97434Tim Northover 1219dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::CondCode CC = cast<CondCodeSDNode>(Sel.getOperand(4))->get(); 1220dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = Sel.getOperand(0); 1221dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = Sel.getOperand(1); 1222dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TVal = Sel.getOperand(2); 1223dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FVal = Sel.getOperand(3); 1224dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Sel); 122572062f5744557e270a38192554c3126ea5f97434Tim Northover 1226dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: This could be generalized to non-integer comparisons. 1227dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getValueType() != MVT::i32 && LHS.getValueType() != MVT::i64) 1228dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 122972062f5744557e270a38192554c3126ea5f97434Tim Northover 1230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CFVal = dyn_cast<ConstantSDNode>(FVal); 1231dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CTVal = dyn_cast<ConstantSDNode>(TVal); 123272062f5744557e270a38192554c3126ea5f97434Tim Northover 1233dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The the values aren't constants, this isn't the pattern we're looking for. 1234dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!CFVal || !CTVal) 1235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 123672062f5744557e270a38192554c3126ea5f97434Tim Northover 1237dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We can commute the SELECT_CC by inverting the condition. This 1238dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // might be needed to make this fit into a CSINV pattern. 1239dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CTVal->isAllOnesValue() && CFVal->isNullValue()) { 1240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(TVal, FVal); 1241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(CTVal, CFVal); 1242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = ISD::getSetCCInverse(CC, true); 1243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 124472062f5744557e270a38192554c3126ea5f97434Tim Northover 1245dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the constants line up, perform the transform! 1246dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CTVal->isNullValue() && CFVal->isAllOnesValue()) { 1247dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal; 1248dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = getAArch64Cmp(LHS, RHS, CC, CCVal, DAG, dl); 124972062f5744557e270a38192554c3126ea5f97434Tim Northover 1250dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FVal = Other; 1251dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TVal = DAG.getNode(ISD::XOR, dl, Other.getValueType(), Other, 1252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(-1ULL, Other.getValueType())); 125372062f5744557e270a38192554c3126ea5f97434Tim Northover 1254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CSEL, dl, Sel.getValueType(), FVal, TVal, 1255dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCVal, Cmp); 1256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 125772062f5744557e270a38192554c3126ea5f97434Tim Northover 1258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 1259dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 126072062f5744557e270a38192554c3126ea5f97434Tim Northover 1261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue LowerADDC_ADDE_SUBC_SUBE(SDValue Op, SelectionDAG &DAG) { 1262dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 1263dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1264dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Let legalize expand this if it isn't a legal type yet. 1265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!DAG.getTargetLoweringInfo().isTypeLegal(VT)) 1266dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 126772062f5744557e270a38192554c3126ea5f97434Tim Northover 1268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList VTs = DAG.getVTList(VT, MVT::i32); 1269dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc; 1271dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool ExtraOp = false; 1272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Op.getOpcode()) { 1273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 1274cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines llvm_unreachable("Invalid code"); 1275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::ADDC: 1276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc = AArch64ISD::ADDS; 1277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SUBC: 1279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc = AArch64ISD::SUBS; 1280dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1281dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::ADDE: 1282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc = AArch64ISD::ADCS; 1283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ExtraOp = true; 1284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1285dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SUBE: 1286dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc = AArch64ISD::SBCS; 1287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ExtraOp = true; 1288dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 128972062f5744557e270a38192554c3126ea5f97434Tim Northover } 129072062f5744557e270a38192554c3126ea5f97434Tim Northover 1291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!ExtraOp) 1292dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, SDLoc(Op), VTs, Op.getOperand(0), Op.getOperand(1)); 1293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, SDLoc(Op), VTs, Op.getOperand(0), Op.getOperand(1), 1294dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(2)); 1295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 1296dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1297dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue LowerXALUO(SDValue Op, SelectionDAG &DAG) { 1298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Let legalize expand this if it isn't a legal type yet. 1299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!DAG.getTargetLoweringInfo().isTypeLegal(Op.getValueType())) 1300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 130172062f5744557e270a38192554c3126ea5f97434Tim Northover 1302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode CC; 1303dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The actual operation that sets the overflow or carry flag. 1304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Value, Overflow; 1305dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::tie(Value, Overflow) = getAArch64XALUOOp(CC, Op, DAG); 130672062f5744557e270a38192554c3126ea5f97434Tim Northover 1307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We use 0 and 1 as false and true values. 1308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TVal = DAG.getConstant(1, MVT::i32); 1309dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FVal = DAG.getConstant(0, MVT::i32); 131072062f5744557e270a38192554c3126ea5f97434Tim Northover 1311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We use an inverted condition, because the conditional select is inverted 1312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // too. This will allow it to be selected to a single instruction: 1313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // CSINC Wd, WZR, WZR, invert(cond). 1314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal = DAG.getConstant(getInvertedCondCode(CC), MVT::i32); 1315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Overflow = DAG.getNode(AArch64ISD::CSEL, SDLoc(Op), MVT::i32, FVal, TVal, 1316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCVal, Overflow); 131772062f5744557e270a38192554c3126ea5f97434Tim Northover 1318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList VTs = DAG.getVTList(Op.getValueType(), MVT::i32); 1319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::MERGE_VALUES, SDLoc(Op), VTs, Value, Overflow); 132072062f5744557e270a38192554c3126ea5f97434Tim Northover} 132172062f5744557e270a38192554c3126ea5f97434Tim Northover 1322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Prefetch operands are: 1323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 1: Address to prefetch 1324dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 2: bool isWrite 1325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 3: int locality (0 = no locality ... 3 = extreme locality) 1326dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 4: bool isDataCache 1327dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG) { 1328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 1329dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned IsWrite = cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue(); 1330dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Locality = cast<ConstantSDNode>(Op.getOperand(3))->getZExtValue(); 1331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The data thing is not used. 1332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // unsigned isData = cast<ConstantSDNode>(Op.getOperand(4))->getZExtValue(); 1333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsStream = !Locality; 1335dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // When the locality number is set 1336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Locality) { 1337dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The front-end should have filtered out the out-of-range values 1338dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Locality <= 3 && "Prefetch locality out-of-range"); 1339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The locality degree is the opposite of the cache speed. 1340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Put the number the other way around. 1341dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The encoding starts at 0 for level 1 1342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Locality = 3 - Locality; 1343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 134472062f5744557e270a38192554c3126ea5f97434Tim Northover 1345dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // built the mask value encoding the expected behavior. 1346dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned PrfOp = (IsWrite << 4) | // Load/Store bit 1347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (Locality << 1) | // Cache level bits 1348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (unsigned)IsStream; // Stream bit 1349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::PREFETCH, DL, MVT::Other, Op.getOperand(0), 1350dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(PrfOp, MVT::i32), Op.getOperand(1)); 1351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 135272062f5744557e270a38192554c3126ea5f97434Tim Northover 1353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerFP_EXTEND(SDValue Op, 1354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 1355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op.getValueType() == MVT::f128 && "Unexpected lowering"); 135672062f5744557e270a38192554c3126ea5f97434Tim Northover 1357dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RTLIB::Libcall LC; 1358dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LC = RTLIB::getFPEXT(Op.getOperand(0).getValueType(), Op.getValueType()); 135972062f5744557e270a38192554c3126ea5f97434Tim Northover 1360dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerF128Call(Op, DAG, LC); 1361dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 136272062f5744557e270a38192554c3126ea5f97434Tim Northover 1363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerFP_ROUND(SDValue Op, 1364dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 1365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getOperand(0).getValueType() != MVT::f128) { 1366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // It's legal except when f128 is involved 1367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 1368dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 136972062f5744557e270a38192554c3126ea5f97434Tim Northover 1370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RTLIB::Libcall LC; 1371dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LC = RTLIB::getFPROUND(Op.getOperand(0).getValueType(), Op.getValueType()); 137272062f5744557e270a38192554c3126ea5f97434Tim Northover 1373dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FP_ROUND node has a second operand indicating whether it is known to be 1374dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // precise. That doesn't take part in the LibCall so we can't directly use 1375dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // LowerF128Call. 1376dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SrcVal = Op.getOperand(0); 1377dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return makeLibCall(DAG, LC, Op.getValueType(), &SrcVal, 1, 1378dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /*isSigned*/ false, SDLoc(Op)).first; 1379dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 138072062f5744557e270a38192554c3126ea5f97434Tim Northover 1381dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue LowerVectorFP_TO_INT(SDValue Op, SelectionDAG &DAG) { 1382dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Warning: We maintain cost tables in AArch64TargetTransformInfo.cpp. 1383dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Any additional optimization in this function should be recorded 1384dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // in the cost tables. 1385dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT InVT = Op.getOperand(0).getValueType(); 1386dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 138772062f5744557e270a38192554c3126ea5f97434Tim Northover 1388cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VT.getSizeInBits() < InVT.getSizeInBits()) { 1389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 1390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cv = 1391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(Op.getOpcode(), dl, InVT.changeVectorElementTypeToInteger(), 1392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(0)); 1393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::TRUNCATE, dl, VT, Cv); 1394cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 1395cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 1396cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VT.getSizeInBits() > InVT.getSizeInBits()) { 1397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 1398dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, MVT::v2f64, Op.getOperand(0)); 1399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Op.getOpcode(), dl, VT, Ext); 1400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1401baa3c50a7bb0ddb0397b71b732c52b19cb700116Jakob Stoklund Olesen 1402dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Type changing conversions are illegal. 1403cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return Op; 140472062f5744557e270a38192554c3126ea5f97434Tim Northover} 140572062f5744557e270a38192554c3126ea5f97434Tim Northover 1406dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerFP_TO_INT(SDValue Op, 1407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 1408dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getOperand(0).getValueType().isVector()) 1409dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVectorFP_TO_INT(Op, DAG); 141036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 1411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getOperand(0).getValueType() != MVT::f128) { 1412dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // It's legal except when f128 is involved 1413dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 1414dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 141572062f5744557e270a38192554c3126ea5f97434Tim Northover 1416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RTLIB::Libcall LC; 1417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getOpcode() == ISD::FP_TO_SINT) 1418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LC = RTLIB::getFPTOSINT(Op.getOperand(0).getValueType(), Op.getValueType()); 1419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 1420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LC = RTLIB::getFPTOUINT(Op.getOperand(0).getValueType(), Op.getValueType()); 142172062f5744557e270a38192554c3126ea5f97434Tim Northover 1422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 2> Ops; 1423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0, e = Op->getNumOperands(); i != e; ++i) 1424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Op.getOperand(i)); 142572062f5744557e270a38192554c3126ea5f97434Tim Northover 1426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return makeLibCall(DAG, LC, Op.getValueType(), &Ops[0], Ops.size(), false, 1427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc(Op)).first; 1428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 142972062f5744557e270a38192554c3126ea5f97434Tim Northover 1430dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue LowerVectorINT_TO_FP(SDValue Op, SelectionDAG &DAG) { 1431dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Warning: We maintain cost tables in AArch64TargetTransformInfo.cpp. 1432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Any additional optimization in this function should be recorded 1433dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // in the cost tables. 1434dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 1435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 1436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue In = Op.getOperand(0); 1437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT InVT = In.getValueType(); 143872062f5744557e270a38192554c3126ea5f97434Tim Northover 1439cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VT.getSizeInBits() < InVT.getSizeInBits()) { 1440cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MVT CastVT = 1441cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MVT::getVectorVT(MVT::getFloatingPointVT(InVT.getScalarSizeInBits()), 1442cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines InVT.getVectorNumElements()); 1443cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines In = DAG.getNode(Op.getOpcode(), dl, CastVT, In); 1444cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return DAG.getNode(ISD::FP_ROUND, dl, VT, In, DAG.getIntPtrConstant(0)); 144572062f5744557e270a38192554c3126ea5f97434Tim Northover } 144672062f5744557e270a38192554c3126ea5f97434Tim Northover 1447cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VT.getSizeInBits() > InVT.getSizeInBits()) { 1448cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines unsigned CastOpc = 1449cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines Op.getOpcode() == ISD::SINT_TO_FP ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; 1450cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines EVT CastVT = VT.changeVectorElementTypeToInteger(); 1451cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines In = DAG.getNode(CastOpc, dl, CastVT, In); 1452cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return DAG.getNode(Op.getOpcode(), dl, VT, In); 1453dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 145472062f5744557e270a38192554c3126ea5f97434Tim Northover 1455cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return Op; 1456dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 145772062f5744557e270a38192554c3126ea5f97434Tim Northover 1458dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerINT_TO_FP(SDValue Op, 1459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 1460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getValueType().isVector()) 1461dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVectorINT_TO_FP(Op, DAG); 146272062f5744557e270a38192554c3126ea5f97434Tim Northover 1463dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // i128 conversions are libcalls. 1464dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getOperand(0).getValueType() == MVT::i128) 1465dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 1466dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1467dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Other conversions are legal, unless it's to the completely software-based 1468dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // fp128. 1469dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getValueType() != MVT::f128) 1470dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 1471dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1472dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RTLIB::Libcall LC; 1473dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getOpcode() == ISD::SINT_TO_FP) 1474dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LC = RTLIB::getSINTTOFP(Op.getOperand(0).getValueType(), Op.getValueType()); 1475dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 1476dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LC = RTLIB::getUINTTOFP(Op.getOperand(0).getValueType(), Op.getValueType()); 1477dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerF128Call(Op, DAG, LC); 1479dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 1480dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1481dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerFSINCOS(SDValue Op, 1482dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 1483dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For iOS, we want to call an alternative entry point: __sincos_stret, 1484dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // which returns the values in two S / D registers. 1485dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 1486dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Arg = Op.getOperand(0); 1487dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ArgVT = Arg.getValueType(); 1488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *ArgTy = ArgVT.getTypeForEVT(*DAG.getContext()); 1489dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1490dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ArgListTy Args; 1491dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ArgListEntry Entry; 1492dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1493dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Entry.Node = Arg; 1494dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Entry.Ty = ArgTy; 1495dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Entry.isSExt = false; 1496dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Entry.isZExt = false; 1497dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Args.push_back(Entry); 1498dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1499dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const char *LibcallName = 1500dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (ArgVT == MVT::f64) ? "__sincos_stret" : "__sincosf_stret"; 1501dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Callee = DAG.getExternalSymbol(LibcallName, getPointerTy()); 1502dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1503dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines StructType *RetTy = StructType::get(ArgTy, ArgTy, NULL); 1504dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::CallLoweringInfo CLI(DAG); 1505dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CLI.setDebugLoc(dl).setChain(DAG.getEntryNode()) 1506cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines .setCallee(CallingConv::Fast, RetTy, Callee, std::move(Args), 0); 1507dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1508dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI); 1509dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CallResult.first; 1510dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 1511dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1512dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerOperation(SDValue Op, 1513dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 1514dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Op.getOpcode()) { 1515dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 1516dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("unimplemented operand"); 1517dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 1518dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::GlobalAddress: 1519dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerGlobalAddress(Op, DAG); 1520dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::GlobalTLSAddress: 1521dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerGlobalTLSAddress(Op, DAG); 1522dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETCC: 1523dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerSETCC(Op, DAG); 1524dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::BR_CC: 1525dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerBR_CC(Op, DAG); 1526dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SELECT: 1527dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerSELECT(Op, DAG); 1528dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SELECT_CC: 1529dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerSELECT_CC(Op, DAG); 1530dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::JumpTable: 1531dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerJumpTable(Op, DAG); 1532dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::ConstantPool: 1533dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerConstantPool(Op, DAG); 1534dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::BlockAddress: 1535dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerBlockAddress(Op, DAG); 1536dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::VASTART: 1537dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVASTART(Op, DAG); 1538dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::VACOPY: 1539dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVACOPY(Op, DAG); 1540dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::VAARG: 1541dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVAARG(Op, DAG); 1542dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::ADDC: 1543dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::ADDE: 1544dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SUBC: 1545dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SUBE: 1546dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerADDC_ADDE_SUBC_SUBE(Op, DAG); 1547dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SADDO: 1548dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::UADDO: 1549dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SSUBO: 1550dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::USUBO: 1551dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SMULO: 1552dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::UMULO: 1553dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerXALUO(Op, DAG); 1554dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FADD: 1555dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerF128Call(Op, DAG, RTLIB::ADD_F128); 1556dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FSUB: 1557dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerF128Call(Op, DAG, RTLIB::SUB_F128); 1558dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FMUL: 1559dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerF128Call(Op, DAG, RTLIB::MUL_F128); 1560dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FDIV: 1561dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerF128Call(Op, DAG, RTLIB::DIV_F128); 1562dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FP_ROUND: 1563dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerFP_ROUND(Op, DAG); 1564dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FP_EXTEND: 1565dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerFP_EXTEND(Op, DAG); 1566dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FRAMEADDR: 1567dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerFRAMEADDR(Op, DAG); 1568dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::RETURNADDR: 1569dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerRETURNADDR(Op, DAG); 1570dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INSERT_VECTOR_ELT: 1571dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerINSERT_VECTOR_ELT(Op, DAG); 1572dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::EXTRACT_VECTOR_ELT: 1573dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerEXTRACT_VECTOR_ELT(Op, DAG); 1574dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::BUILD_VECTOR: 1575dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerBUILD_VECTOR(Op, DAG); 1576dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::VECTOR_SHUFFLE: 1577dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVECTOR_SHUFFLE(Op, DAG); 1578dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::EXTRACT_SUBVECTOR: 1579dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerEXTRACT_SUBVECTOR(Op, DAG); 1580dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SRA: 1581dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SRL: 1582dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SHL: 1583dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVectorSRA_SRL_SHL(Op, DAG); 1584dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SHL_PARTS: 1585dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerShiftLeftParts(Op, DAG); 1586dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SRL_PARTS: 1587dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SRA_PARTS: 1588dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerShiftRightParts(Op, DAG); 1589dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::CTPOP: 1590dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerCTPOP(Op, DAG); 1591dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FCOPYSIGN: 1592dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerFCOPYSIGN(Op, DAG); 1593dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::AND: 1594dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVectorAND(Op, DAG); 1595dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::OR: 1596dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVectorOR(Op, DAG); 1597dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::XOR: 1598dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerXOR(Op, DAG); 1599dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::PREFETCH: 1600dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerPREFETCH(Op, DAG); 1601dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SINT_TO_FP: 1602dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::UINT_TO_FP: 1603dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerINT_TO_FP(Op, DAG); 1604dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FP_TO_SINT: 1605dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FP_TO_UINT: 1606dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerFP_TO_INT(Op, DAG); 1607dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FSINCOS: 1608dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerFSINCOS(Op, DAG); 160972062f5744557e270a38192554c3126ea5f97434Tim Northover } 1610dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 161172062f5744557e270a38192554c3126ea5f97434Tim Northover 1612dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// getFunctionAlignment - Return the Log2 alignment of this function. 1613dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesunsigned AArch64TargetLowering::getFunctionAlignment(const Function *F) const { 1614dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return 2; 1615dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 161672062f5744557e270a38192554c3126ea5f97434Tim Northover 1617dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 1618dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Calling Convention Implementation 1619dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 162072062f5744557e270a38192554c3126ea5f97434Tim Northover 1621dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines#include "AArch64GenCallingConv.inc" 1622dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1623dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Selects the correct CCAssignFn for a the given CallingConvention 1624dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// value. 1625dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesCCAssignFn *AArch64TargetLowering::CCAssignFnForCall(CallingConv::ID CC, 1626dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsVarArg) const { 1627dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (CC) { 1628dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 1629dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unsupported calling convention."); 1630dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CallingConv::WebKit_JS: 1631dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CC_AArch64_WebKit_JS; 1632dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CallingConv::C: 1633dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CallingConv::Fast: 1634dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Subtarget->isTargetDarwin()) 1635dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CC_AArch64_AAPCS; 1636dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return IsVarArg ? CC_AArch64_DarwinPCS_VarArg : CC_AArch64_DarwinPCS; 1637dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1638dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 163972062f5744557e270a38192554c3126ea5f97434Tim Northover 1640dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerFormalArguments( 1641dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 1642dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, 1643dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<SDValue> &InVals) const { 1644dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFunction &MF = DAG.getMachineFunction(); 1645dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFrameInfo *MFI = MF.getFrameInfo(); 1646dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1647dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Assign locations to all of the incoming arguments. 1648dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<CCValAssign, 16> ArgLocs; 1649dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 1650dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines getTargetMachine(), ArgLocs, *DAG.getContext()); 1651dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1652dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // At this point, Ins[].VT may already be promoted to i32. To correctly 1653dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // handle passing i8 as i8 instead of i32 on stack, we pass in both i32 and 1654dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // i8 to CC_AArch64_AAPCS with i32 being ValVT and i8 being LocVT. 1655dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Since AnalyzeFormalArguments uses Ins[].VT for both ValVT and LocVT, here 1656dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we use a special version of AnalyzeFormalArguments to pass in ValVT and 1657dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // LocVT. 1658dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumArgs = Ins.size(); 1659dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Function::const_arg_iterator CurOrigArg = MF.getFunction()->arg_begin(); 1660dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned CurArgIdx = 0; 1661dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != NumArgs; ++i) { 1662dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT ValVT = Ins[i].VT; 1663dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::advance(CurOrigArg, Ins[i].OrigArgIndex - CurArgIdx); 1664dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CurArgIdx = Ins[i].OrigArgIndex; 1665dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1666dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Get type of the original argument. 1667dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ActualVT = getValueType(CurOrigArg->getType(), /*AllowUnknown*/ true); 1668dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT ActualMVT = ActualVT.isSimple() ? ActualVT.getSimpleVT() : MVT::Other; 1669dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If ActualMVT is i1/i8/i16, we should set LocVT to i8/i8/i16. 1670dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ActualMVT == MVT::i1 || ActualMVT == MVT::i8) 1671dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ValVT = MVT::i8; 1672dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (ActualMVT == MVT::i16) 1673dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ValVT = MVT::i16; 1674dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1675dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCAssignFn *AssignFn = CCAssignFnForCall(CallConv, /*IsVarArg=*/false); 1676dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool Res = 1677dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AssignFn(i, ValVT, ValVT, CCValAssign::Full, Ins[i].Flags, CCInfo); 1678dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(!Res && "Call operand has unhandled type"); 1679dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (void)Res; 1680dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1681dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(ArgLocs.size() == Ins.size()); 1682dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 16> ArgValues; 168372062f5744557e270a38192554c3126ea5f97434Tim Northover for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 168472062f5744557e270a38192554c3126ea5f97434Tim Northover CCValAssign &VA = ArgLocs[i]; 168572062f5744557e270a38192554c3126ea5f97434Tim Northover 1686dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Ins[i].Flags.isByVal()) { 1687dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Byval is used for HFAs in the PCS, but the system should work in a 1688dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // non-compliant manner for larger structs. 1689dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT PtrTy = getPointerTy(); 1690dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int Size = Ins[i].Flags.getByValSize(); 1691dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumRegs = (Size + 7) / 8; 169272062f5744557e270a38192554c3126ea5f97434Tim Northover 1693dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: This works on big-endian for composite byvals, which are the common 1694dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // case. It should also work for fundamental types too. 1695dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned FrameIdx = 1696dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MFI->CreateFixedObject(8 * NumRegs, VA.getLocMemOffset(), false); 1697dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FrameIdxN = DAG.getFrameIndex(FrameIdx, PtrTy); 1698dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InVals.push_back(FrameIdxN); 169972062f5744557e270a38192554c3126ea5f97434Tim Northover 170072062f5744557e270a38192554c3126ea5f97434Tim Northover continue; 1701cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 1702cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 1703cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VA.isRegLoc()) { 1704dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Arguments stored in registers. 1705dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT RegVT = VA.getLocVT(); 1706dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1707dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ArgValue; 1708dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterClass *RC; 1709dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1710dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (RegVT == MVT::i32) 1711dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RC = &AArch64::GPR32RegClass; 1712dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (RegVT == MVT::i64) 1713dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RC = &AArch64::GPR64RegClass; 1714dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (RegVT == MVT::f32) 1715dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RC = &AArch64::FPR32RegClass; 1716dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (RegVT == MVT::f64 || RegVT.is64BitVector()) 1717dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RC = &AArch64::FPR64RegClass; 1718dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (RegVT == MVT::f128 || RegVT.is128BitVector()) 1719dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RC = &AArch64::FPR128RegClass; 1720dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 1721dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("RegVT not supported by FORMAL_ARGUMENTS Lowering"); 172272062f5744557e270a38192554c3126ea5f97434Tim Northover 1723dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Transform the arguments in physical registers into virtual ones. 1724dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); 1725dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); 172672062f5744557e270a38192554c3126ea5f97434Tim Northover 1727dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If this is an 8, 16 or 32-bit value, it is really passed promoted 1728dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to 64 bits. Insert an assert[sz]ext to capture this, then 1729dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // truncate to the right size. 1730dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (VA.getLocInfo()) { 1731dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 1732dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown loc info!"); 1733dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::Full: 1734dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1735dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::BCvt: 1736dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ArgValue = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), ArgValue); 1737dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1738dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::AExt: 1739dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::SExt: 1740dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::ZExt: 1741dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // SelectionDAGBuilder will insert appropriate AssertZExt & AssertSExt 1742dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // nodes after our lowering. 1743dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(RegVT == Ins[i].VT && "incorrect register location selected"); 1744dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1745dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 174672062f5744557e270a38192554c3126ea5f97434Tim Northover 1747dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InVals.push_back(ArgValue); 1748dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1749dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { // VA.isRegLoc() 1750dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(VA.isMemLoc() && "CCValAssign is neither reg nor mem"); 1751dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ArgOffset = VA.getLocMemOffset(); 1752dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8; 175372062f5744557e270a38192554c3126ea5f97434Tim Northover 175436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines uint32_t BEAlign = 0; 1755dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ArgSize < 8 && !Subtarget->isLittleEndian()) 1756dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BEAlign = 8 - ArgSize; 175772062f5744557e270a38192554c3126ea5f97434Tim Northover 1758dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int FI = MFI->CreateFixedObject(ArgSize, ArgOffset + BEAlign, true); 175972062f5744557e270a38192554c3126ea5f97434Tim Northover 1760dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Create load nodes to retrieve arguments from the stack. 1761dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); 1762dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ArgValue; 176372062f5744557e270a38192554c3126ea5f97434Tim Northover 1764cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT) 1765dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; 1766cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MVT MemVT = VA.getValVT(); 1767cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 1768dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (VA.getLocInfo()) { 1769dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 1770dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1771cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines case CCValAssign::BCvt: 1772cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MemVT = VA.getLocVT(); 1773cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines break; 1774dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::SExt: 1775dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ExtType = ISD::SEXTLOAD; 1776dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1777dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::ZExt: 1778dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ExtType = ISD::ZEXTLOAD; 1779dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1780dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::AExt: 1781dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ExtType = ISD::EXTLOAD; 1782dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 1783dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 178472062f5744557e270a38192554c3126ea5f97434Tim Northover 1785cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines ArgValue = DAG.getExtLoad(ExtType, DL, VA.getLocVT(), Chain, FIN, 1786dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo::getFixedStack(FI), 1787cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MemVT, false, false, false, nullptr); 178872062f5744557e270a38192554c3126ea5f97434Tim Northover 1789dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InVals.push_back(ArgValue); 1790dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 179172062f5744557e270a38192554c3126ea5f97434Tim Northover } 179272062f5744557e270a38192554c3126ea5f97434Tim Northover 1793dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // varargs 1794dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isVarArg) { 1795dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Subtarget->isTargetDarwin()) { 1796dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The AAPCS variadic function ABI is identical to the non-variadic 1797dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // one. As a result there may be more arguments in registers and we should 1798dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // save them for future reference. 1799dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines saveVarArgRegisters(CCInfo, DAG, DL, Chain); 1800dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 180172062f5744557e270a38192554c3126ea5f97434Tim Northover 1802dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>(); 1803dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This will point to the next argument passed via stack. 1804dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned StackOffset = CCInfo.getNextStackOffset(); 1805dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We currently pass all varargs at 8-byte alignment. 1806dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines StackOffset = ((StackOffset + 7) & ~7); 1807dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AFI->setVarArgsStackIndex(MFI->CreateFixedObject(4, StackOffset, true)); 180872062f5744557e270a38192554c3126ea5f97434Tim Northover } 180972062f5744557e270a38192554c3126ea5f97434Tim Northover 1810dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>(); 1811dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned StackArgSize = CCInfo.getNextStackOffset(); 1812dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool TailCallOpt = MF.getTarget().Options.GuaranteedTailCallOpt; 1813dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DoesCalleeRestoreStack(CallConv, TailCallOpt)) { 1814dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This is a non-standard ABI so by fiat I say we're allowed to make full 1815dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // use of the stack area to be popped, which must be aligned to 16 bytes in 1816dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // any case: 1817dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines StackArgSize = RoundUpToAlignment(StackArgSize, 16); 181872062f5744557e270a38192554c3126ea5f97434Tim Northover 1819dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we're expected to restore the stack (e.g. fastcc) then we'll be adding 1820dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // a multiple of 16. 1821dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FuncInfo->setArgumentStackToRestore(StackArgSize); 1822dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1823dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This realignment carries over to the available bytes below. Our own 1824dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // callers will guarantee the space is free by giving an aligned value to 1825dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // CALLSEQ_START. 182672062f5744557e270a38192554c3126ea5f97434Tim Northover } 1827dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Even if we're not expected to free up the space, it's useful to know how 1828dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // much is there while considering tail calls (because we can reuse it). 1829dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FuncInfo->setBytesInStackArgArea(StackArgSize); 183072062f5744557e270a38192554c3126ea5f97434Tim Northover 1831dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Chain; 1832dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 183372062f5744557e270a38192554c3126ea5f97434Tim Northover 1834dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesvoid AArch64TargetLowering::saveVarArgRegisters(CCState &CCInfo, 1835dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG, SDLoc DL, 1836dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue &Chain) const { 1837dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFunction &MF = DAG.getMachineFunction(); 1838dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFrameInfo *MFI = MF.getFrameInfo(); 1839dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>(); 184072062f5744557e270a38192554c3126ea5f97434Tim Northover 1841dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 8> MemOps; 184272062f5744557e270a38192554c3126ea5f97434Tim Northover 1843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static const MCPhysReg GPRArgRegs[] = { AArch64::X0, AArch64::X1, AArch64::X2, 1844dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64::X3, AArch64::X4, AArch64::X5, 1845dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64::X6, AArch64::X7 }; 1846dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static const unsigned NumGPRArgRegs = array_lengthof(GPRArgRegs); 1847dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned FirstVariadicGPR = 1848dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCInfo.getFirstUnallocated(GPRArgRegs, NumGPRArgRegs); 184972062f5744557e270a38192554c3126ea5f97434Tim Northover 1850dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned GPRSaveSize = 8 * (NumGPRArgRegs - FirstVariadicGPR); 1851dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int GPRIdx = 0; 1852dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (GPRSaveSize != 0) { 1853dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GPRIdx = MFI->CreateStackObject(GPRSaveSize, 8, false); 185472062f5744557e270a38192554c3126ea5f97434Tim Northover 1855dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FIN = DAG.getFrameIndex(GPRIdx, getPointerTy()); 1856dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1857dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = FirstVariadicGPR; i < NumGPRArgRegs; ++i) { 1858dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned VReg = MF.addLiveIn(GPRArgRegs[i], &AArch64::GPR64RegClass); 1859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64); 1860dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Store = 1861dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getStore(Val.getValue(1), DL, Val, FIN, 1862dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo::getStack(i * 8), false, false, 0); 1863dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MemOps.push_back(Store); 1864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FIN = DAG.getNode(ISD::ADD, DL, getPointerTy(), FIN, 1865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, getPointerTy())); 1866dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 186772062f5744557e270a38192554c3126ea5f97434Tim Northover } 1868dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FuncInfo->setVarArgsGPRIndex(GPRIdx); 1869dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FuncInfo->setVarArgsGPRSize(GPRSaveSize); 187072062f5744557e270a38192554c3126ea5f97434Tim Northover 1871dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Subtarget->hasFPARMv8()) { 1872dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static const MCPhysReg FPRArgRegs[] = { 1873dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, 1874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7}; 1875dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static const unsigned NumFPRArgRegs = array_lengthof(FPRArgRegs); 1876dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned FirstVariadicFPR = 1877dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCInfo.getFirstUnallocated(FPRArgRegs, NumFPRArgRegs); 1878dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1879dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned FPRSaveSize = 16 * (NumFPRArgRegs - FirstVariadicFPR); 1880dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int FPRIdx = 0; 1881dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (FPRSaveSize != 0) { 1882dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FPRIdx = MFI->CreateStackObject(FPRSaveSize, 16, false); 188372062f5744557e270a38192554c3126ea5f97434Tim Northover 1884dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FIN = DAG.getFrameIndex(FPRIdx, getPointerTy()); 188572062f5744557e270a38192554c3126ea5f97434Tim Northover 1886dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = FirstVariadicFPR; i < NumFPRArgRegs; ++i) { 1887dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned VReg = MF.addLiveIn(FPRArgRegs[i], &AArch64::FPR128RegClass); 1888dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f128); 1889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 1890dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Store = 1891dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getStore(Val.getValue(1), DL, Val, FIN, 1892dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo::getStack(i * 16), false, false, 0); 1893dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MemOps.push_back(Store); 1894dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FIN = DAG.getNode(ISD::ADD, DL, getPointerTy(), FIN, 1895dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(16, getPointerTy())); 1896dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 1898dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FuncInfo->setVarArgsFPRIndex(FPRIdx); 1899dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FuncInfo->setVarArgsFPRSize(FPRSaveSize); 190072062f5744557e270a38192554c3126ea5f97434Tim Northover } 190172062f5744557e270a38192554c3126ea5f97434Tim Northover 1902dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!MemOps.empty()) { 1903dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps); 1904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 190572062f5744557e270a38192554c3126ea5f97434Tim Northover} 190672062f5744557e270a38192554c3126ea5f97434Tim Northover 1907dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// LowerCallResult - Lower the result values of a call into the 1908dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// appropriate copies out of appropriate physical registers. 1909dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerCallResult( 1910dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, 1911dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, 1912dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<SDValue> &InVals, bool isThisReturn, 1913dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ThisVal) const { 1914dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCAssignFn *RetCC = CallConv == CallingConv::WebKit_JS 1915dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ? RetCC_AArch64_WebKit_JS 1916dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : RetCC_AArch64_AAPCS; 191772062f5744557e270a38192554c3126ea5f97434Tim Northover // Assign locations to each value returned by this call. 191872062f5744557e270a38192554c3126ea5f97434Tim Northover SmallVector<CCValAssign, 16> RVLocs; 1919dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 192072062f5744557e270a38192554c3126ea5f97434Tim Northover getTargetMachine(), RVLocs, *DAG.getContext()); 1921dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCInfo.AnalyzeCallResult(Ins, RetCC); 192272062f5744557e270a38192554c3126ea5f97434Tim Northover 1923dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Copy all of the result registers out of their specified physreg. 192472062f5744557e270a38192554c3126ea5f97434Tim Northover for (unsigned i = 0; i != RVLocs.size(); ++i) { 192572062f5744557e270a38192554c3126ea5f97434Tim Northover CCValAssign VA = RVLocs[i]; 192672062f5744557e270a38192554c3126ea5f97434Tim Northover 1927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Pass 'this' value directly from the argument to return value, to avoid 1928dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // reg unit interference 1929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (i == 0 && isThisReturn) { 1930dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(!VA.needsCustom() && VA.getLocVT() == MVT::i64 && 1931dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "unexpected return calling convention register assignment"); 1932dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InVals.push_back(ThisVal); 1933dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 1934dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 193572062f5744557e270a38192554c3126ea5f97434Tim Northover 1936dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Val = 1937dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag); 193872062f5744557e270a38192554c3126ea5f97434Tim Northover Chain = Val.getValue(1); 193972062f5744557e270a38192554c3126ea5f97434Tim Northover InFlag = Val.getValue(2); 194072062f5744557e270a38192554c3126ea5f97434Tim Northover 194172062f5744557e270a38192554c3126ea5f97434Tim Northover switch (VA.getLocInfo()) { 1942dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 1943dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown loc info!"); 1944dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::Full: 194572062f5744557e270a38192554c3126ea5f97434Tim Northover break; 1946dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::BCvt: 1947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); 194872062f5744557e270a38192554c3126ea5f97434Tim Northover break; 194972062f5744557e270a38192554c3126ea5f97434Tim Northover } 195072062f5744557e270a38192554c3126ea5f97434Tim Northover 195172062f5744557e270a38192554c3126ea5f97434Tim Northover InVals.push_back(Val); 195272062f5744557e270a38192554c3126ea5f97434Tim Northover } 195372062f5744557e270a38192554c3126ea5f97434Tim Northover 195472062f5744557e270a38192554c3126ea5f97434Tim Northover return Chain; 195572062f5744557e270a38192554c3126ea5f97434Tim Northover} 195672062f5744557e270a38192554c3126ea5f97434Tim Northover 1957dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isEligibleForTailCallOptimization( 1958dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, 1959dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isCalleeStructRet, bool isCallerStructRet, 1960dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::OutputArg> &Outs, 1961dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<SDValue> &OutVals, 1962dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const { 196372062f5744557e270a38192554c3126ea5f97434Tim Northover // For CallingConv::C this function knows whether the ABI needs 196472062f5744557e270a38192554c3126ea5f97434Tim Northover // changing. That's not true for other conventions so they will have to opt in 196572062f5744557e270a38192554c3126ea5f97434Tim Northover // manually. 196672062f5744557e270a38192554c3126ea5f97434Tim Northover if (!IsTailCallConvention(CalleeCC) && CalleeCC != CallingConv::C) 196772062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 196872062f5744557e270a38192554c3126ea5f97434Tim Northover 196972062f5744557e270a38192554c3126ea5f97434Tim Northover const MachineFunction &MF = DAG.getMachineFunction(); 197072062f5744557e270a38192554c3126ea5f97434Tim Northover const Function *CallerF = MF.getFunction(); 197172062f5744557e270a38192554c3126ea5f97434Tim Northover CallingConv::ID CallerCC = CallerF->getCallingConv(); 197272062f5744557e270a38192554c3126ea5f97434Tim Northover bool CCMatch = CallerCC == CalleeCC; 197372062f5744557e270a38192554c3126ea5f97434Tim Northover 197472062f5744557e270a38192554c3126ea5f97434Tim Northover // Byval parameters hand the function a pointer directly into the stack area 197572062f5744557e270a38192554c3126ea5f97434Tim Northover // we want to reuse during a tail call. Working around this *is* possible (see 197672062f5744557e270a38192554c3126ea5f97434Tim Northover // X86) but less efficient and uglier in LowerCall. 197772062f5744557e270a38192554c3126ea5f97434Tim Northover for (Function::const_arg_iterator i = CallerF->arg_begin(), 1978dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines e = CallerF->arg_end(); 1979dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines i != e; ++i) 198072062f5744557e270a38192554c3126ea5f97434Tim Northover if (i->hasByValAttr()) 198172062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 198272062f5744557e270a38192554c3126ea5f97434Tim Northover 198372062f5744557e270a38192554c3126ea5f97434Tim Northover if (getTargetMachine().Options.GuaranteedTailCallOpt) { 198472062f5744557e270a38192554c3126ea5f97434Tim Northover if (IsTailCallConvention(CalleeCC) && CCMatch) 198572062f5744557e270a38192554c3126ea5f97434Tim Northover return true; 198672062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 198772062f5744557e270a38192554c3126ea5f97434Tim Northover } 198872062f5744557e270a38192554c3126ea5f97434Tim Northover 198972062f5744557e270a38192554c3126ea5f97434Tim Northover // Now we search for cases where we can use a tail call without changing the 199072062f5744557e270a38192554c3126ea5f97434Tim Northover // ABI. Sibcall is used in some places (particularly gcc) to refer to this 199172062f5744557e270a38192554c3126ea5f97434Tim Northover // concept. 199272062f5744557e270a38192554c3126ea5f97434Tim Northover 199372062f5744557e270a38192554c3126ea5f97434Tim Northover // I want anyone implementing a new calling convention to think long and hard 199472062f5744557e270a38192554c3126ea5f97434Tim Northover // about this assert. 1995dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert((!isVarArg || CalleeCC == CallingConv::C) && 1996dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "Unexpected variadic calling convention"); 199772062f5744557e270a38192554c3126ea5f97434Tim Northover 1998dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isVarArg && !Outs.empty()) { 199972062f5744557e270a38192554c3126ea5f97434Tim Northover // At least two cases here: if caller is fastcc then we can't have any 200072062f5744557e270a38192554c3126ea5f97434Tim Northover // memory arguments (we'd be expected to clean up the stack afterwards). If 200172062f5744557e270a38192554c3126ea5f97434Tim Northover // caller is C then we could potentially use its argument area. 200272062f5744557e270a38192554c3126ea5f97434Tim Northover 200372062f5744557e270a38192554c3126ea5f97434Tim Northover // FIXME: for now we take the most conservative of these in both cases: 200472062f5744557e270a38192554c3126ea5f97434Tim Northover // disallow all variadic memory operands. 200572062f5744557e270a38192554c3126ea5f97434Tim Northover SmallVector<CCValAssign, 16> ArgLocs; 2006dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), 200772062f5744557e270a38192554c3126ea5f97434Tim Northover getTargetMachine(), ArgLocs, *DAG.getContext()); 200872062f5744557e270a38192554c3126ea5f97434Tim Northover 2009dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForCall(CalleeCC, true)); 201072062f5744557e270a38192554c3126ea5f97434Tim Northover for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) 201172062f5744557e270a38192554c3126ea5f97434Tim Northover if (!ArgLocs[i].isRegLoc()) 201272062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 201372062f5744557e270a38192554c3126ea5f97434Tim Northover } 201472062f5744557e270a38192554c3126ea5f97434Tim Northover 201572062f5744557e270a38192554c3126ea5f97434Tim Northover // If the calling conventions do not match, then we'd better make sure the 201672062f5744557e270a38192554c3126ea5f97434Tim Northover // results are returned in the same way as what the caller expects. 201772062f5744557e270a38192554c3126ea5f97434Tim Northover if (!CCMatch) { 201872062f5744557e270a38192554c3126ea5f97434Tim Northover SmallVector<CCValAssign, 16> RVLocs1; 201972062f5744557e270a38192554c3126ea5f97434Tim Northover CCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(), 202072062f5744557e270a38192554c3126ea5f97434Tim Northover getTargetMachine(), RVLocs1, *DAG.getContext()); 2021dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCInfo1.AnalyzeCallResult(Ins, CCAssignFnForCall(CalleeCC, isVarArg)); 202272062f5744557e270a38192554c3126ea5f97434Tim Northover 202372062f5744557e270a38192554c3126ea5f97434Tim Northover SmallVector<CCValAssign, 16> RVLocs2; 202472062f5744557e270a38192554c3126ea5f97434Tim Northover CCState CCInfo2(CallerCC, false, DAG.getMachineFunction(), 202572062f5744557e270a38192554c3126ea5f97434Tim Northover getTargetMachine(), RVLocs2, *DAG.getContext()); 2026dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCInfo2.AnalyzeCallResult(Ins, CCAssignFnForCall(CallerCC, isVarArg)); 202772062f5744557e270a38192554c3126ea5f97434Tim Northover 202872062f5744557e270a38192554c3126ea5f97434Tim Northover if (RVLocs1.size() != RVLocs2.size()) 202972062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 203072062f5744557e270a38192554c3126ea5f97434Tim Northover for (unsigned i = 0, e = RVLocs1.size(); i != e; ++i) { 203172062f5744557e270a38192554c3126ea5f97434Tim Northover if (RVLocs1[i].isRegLoc() != RVLocs2[i].isRegLoc()) 203272062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 203372062f5744557e270a38192554c3126ea5f97434Tim Northover if (RVLocs1[i].getLocInfo() != RVLocs2[i].getLocInfo()) 203472062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 203572062f5744557e270a38192554c3126ea5f97434Tim Northover if (RVLocs1[i].isRegLoc()) { 203672062f5744557e270a38192554c3126ea5f97434Tim Northover if (RVLocs1[i].getLocReg() != RVLocs2[i].getLocReg()) 203772062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 203872062f5744557e270a38192554c3126ea5f97434Tim Northover } else { 203972062f5744557e270a38192554c3126ea5f97434Tim Northover if (RVLocs1[i].getLocMemOffset() != RVLocs2[i].getLocMemOffset()) 204072062f5744557e270a38192554c3126ea5f97434Tim Northover return false; 204172062f5744557e270a38192554c3126ea5f97434Tim Northover } 204272062f5744557e270a38192554c3126ea5f97434Tim Northover } 204372062f5744557e270a38192554c3126ea5f97434Tim Northover } 204472062f5744557e270a38192554c3126ea5f97434Tim Northover 204572062f5744557e270a38192554c3126ea5f97434Tim Northover // Nothing more to check if the callee is taking no arguments 204672062f5744557e270a38192554c3126ea5f97434Tim Northover if (Outs.empty()) 204772062f5744557e270a38192554c3126ea5f97434Tim Northover return true; 204872062f5744557e270a38192554c3126ea5f97434Tim Northover 204972062f5744557e270a38192554c3126ea5f97434Tim Northover SmallVector<CCValAssign, 16> ArgLocs; 2050dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCState CCInfo(CalleeCC, isVarArg, DAG.getMachineFunction(), 205172062f5744557e270a38192554c3126ea5f97434Tim Northover getTargetMachine(), ArgLocs, *DAG.getContext()); 205272062f5744557e270a38192554c3126ea5f97434Tim Northover 2053dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForCall(CalleeCC, isVarArg)); 205472062f5744557e270a38192554c3126ea5f97434Tim Northover 2055dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>(); 205672062f5744557e270a38192554c3126ea5f97434Tim Northover 205772062f5744557e270a38192554c3126ea5f97434Tim Northover // If the stack arguments for this call would fit into our own save area then 205872062f5744557e270a38192554c3126ea5f97434Tim Northover // the call can be made tail. 205972062f5744557e270a38192554c3126ea5f97434Tim Northover return CCInfo.getNextStackOffset() <= FuncInfo->getBytesInStackArgArea(); 206072062f5744557e270a38192554c3126ea5f97434Tim Northover} 206172062f5744557e270a38192554c3126ea5f97434Tim Northover 206272062f5744557e270a38192554c3126ea5f97434Tim NorthoverSDValue AArch64TargetLowering::addTokenForArgument(SDValue Chain, 206372062f5744557e270a38192554c3126ea5f97434Tim Northover SelectionDAG &DAG, 206472062f5744557e270a38192554c3126ea5f97434Tim Northover MachineFrameInfo *MFI, 206572062f5744557e270a38192554c3126ea5f97434Tim Northover int ClobberedFI) const { 206672062f5744557e270a38192554c3126ea5f97434Tim Northover SmallVector<SDValue, 8> ArgChains; 206772062f5744557e270a38192554c3126ea5f97434Tim Northover int64_t FirstByte = MFI->getObjectOffset(ClobberedFI); 206872062f5744557e270a38192554c3126ea5f97434Tim Northover int64_t LastByte = FirstByte + MFI->getObjectSize(ClobberedFI) - 1; 206972062f5744557e270a38192554c3126ea5f97434Tim Northover 207072062f5744557e270a38192554c3126ea5f97434Tim Northover // Include the original chain at the beginning of the list. When this is 207172062f5744557e270a38192554c3126ea5f97434Tim Northover // used by target LowerCall hooks, this helps legalize find the 207272062f5744557e270a38192554c3126ea5f97434Tim Northover // CALLSEQ_BEGIN node. 207372062f5744557e270a38192554c3126ea5f97434Tim Northover ArgChains.push_back(Chain); 207472062f5744557e270a38192554c3126ea5f97434Tim Northover 207572062f5744557e270a38192554c3126ea5f97434Tim Northover // Add a chain value for each stack argument corresponding 207672062f5744557e270a38192554c3126ea5f97434Tim Northover for (SDNode::use_iterator U = DAG.getEntryNode().getNode()->use_begin(), 2077dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UE = DAG.getEntryNode().getNode()->use_end(); 2078dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines U != UE; ++U) 207972062f5744557e270a38192554c3126ea5f97434Tim Northover if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U)) 208072062f5744557e270a38192554c3126ea5f97434Tim Northover if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) 208172062f5744557e270a38192554c3126ea5f97434Tim Northover if (FI->getIndex() < 0) { 208272062f5744557e270a38192554c3126ea5f97434Tim Northover int64_t InFirstByte = MFI->getObjectOffset(FI->getIndex()); 208372062f5744557e270a38192554c3126ea5f97434Tim Northover int64_t InLastByte = InFirstByte; 208472062f5744557e270a38192554c3126ea5f97434Tim Northover InLastByte += MFI->getObjectSize(FI->getIndex()) - 1; 208572062f5744557e270a38192554c3126ea5f97434Tim Northover 208672062f5744557e270a38192554c3126ea5f97434Tim Northover if ((InFirstByte <= FirstByte && FirstByte <= InLastByte) || 208772062f5744557e270a38192554c3126ea5f97434Tim Northover (FirstByte <= InFirstByte && InFirstByte <= LastByte)) 208872062f5744557e270a38192554c3126ea5f97434Tim Northover ArgChains.push_back(SDValue(L, 1)); 208972062f5744557e270a38192554c3126ea5f97434Tim Northover } 209072062f5744557e270a38192554c3126ea5f97434Tim Northover 2091dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Build a tokenfactor for all the chains. 2092dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains); 209372062f5744557e270a38192554c3126ea5f97434Tim Northover} 209472062f5744557e270a38192554c3126ea5f97434Tim Northover 2095dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::DoesCalleeRestoreStack(CallingConv::ID CallCC, 2096dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool TailCallOpt) const { 2097dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CallCC == CallingConv::Fast && TailCallOpt; 209872062f5744557e270a38192554c3126ea5f97434Tim Northover} 209972062f5744557e270a38192554c3126ea5f97434Tim Northover 2100dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::IsTailCallConvention(CallingConv::ID CallCC) const { 2101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CallCC == CallingConv::Fast; 2102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 210372062f5744557e270a38192554c3126ea5f97434Tim Northover 2104dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// LowerCall - Lower a call to a callseq_start + CALL + callseq_end chain, 2105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// and add input and output parameter nodes. 2106dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue 2107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::LowerCall(CallLoweringInfo &CLI, 2108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<SDValue> &InVals) const { 2109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG = CLI.DAG; 2110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc &DL = CLI.DL; 2111dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<ISD::OutputArg, 32> &Outs = CLI.Outs; 2112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 32> &OutVals = CLI.OutVals; 2113dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; 2114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Chain = CLI.Chain; 2115dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Callee = CLI.Callee; 2116dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool &IsTailCall = CLI.IsTailCall; 2117dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CallingConv::ID CallConv = CLI.CallConv; 2118dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsVarArg = CLI.IsVarArg; 211972062f5744557e270a38192554c3126ea5f97434Tim Northover 2120dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFunction &MF = DAG.getMachineFunction(); 2121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet(); 2122dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsThisReturn = false; 212372062f5744557e270a38192554c3126ea5f97434Tim Northover 2124dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>(); 2125dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool TailCallOpt = MF.getTarget().Options.GuaranteedTailCallOpt; 2126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsSibCall = false; 212772062f5744557e270a38192554c3126ea5f97434Tim Northover 2128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsTailCall) { 2129dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check if it's really possible to do a tail call. 2130dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsTailCall = isEligibleForTailCallOptimization( 2131dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Callee, CallConv, IsVarArg, IsStructRet, 2132dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MF.getFunction()->hasStructRetAttr(), Outs, OutVals, Ins, DAG); 2133dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!IsTailCall && CLI.CS && CLI.CS->isMustTailCall()) 2134dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines report_fatal_error("failed to perform tail call elimination on a call " 2135dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "site marked musttail"); 2136dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2137dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // A sibling call is one where we're under the usual C ABI and not planning 2138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to change that but can still do a tail call: 2139dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!TailCallOpt && IsTailCall) 2140dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsSibCall = true; 2141dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2142dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsTailCall) 2143dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++NumTailCalls; 214472062f5744557e270a38192554c3126ea5f97434Tim Northover } 214572062f5744557e270a38192554c3126ea5f97434Tim Northover 2146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Analyze operands of the call, assigning locations to each operand. 2147dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<CCValAssign, 16> ArgLocs; 2148dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), 2149dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines getTargetMachine(), ArgLocs, *DAG.getContext()); 215072062f5744557e270a38192554c3126ea5f97434Tim Northover 2151dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsVarArg) { 2152dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Handle fixed and variable vector arguments differently. 2153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Variable vector arguments always go into memory. 2154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumArgs = Outs.size(); 2155dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2156dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != NumArgs; ++i) { 2157dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT ArgVT = Outs[i].VT; 2158dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; 2159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCAssignFn *AssignFn = CCAssignFnForCall(CallConv, 2160dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /*IsVarArg=*/ !Outs[i].IsFixed); 2161dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool Res = AssignFn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); 2162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(!Res && "Call operand has unhandled type"); 2163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (void)Res; 2164dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2165dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 2166dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // At this point, Outs[].VT may already be promoted to i32. To correctly 2167dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // handle passing i8 as i8 instead of i32 on stack, we pass in both i32 and 2168dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // i8 to CC_AArch64_AAPCS with i32 being ValVT and i8 being LocVT. 2169dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Since AnalyzeCallOperands uses Ins[].VT for both ValVT and LocVT, here 2170dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we use a special version of AnalyzeCallOperands to pass in ValVT and 2171dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // LocVT. 2172dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumArgs = Outs.size(); 2173dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != NumArgs; ++i) { 2174dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT ValVT = Outs[i].VT; 2175dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Get type of the original argument. 2176dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ActualVT = getValueType(CLI.getArgs()[Outs[i].OrigArgIndex].Ty, 2177dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /*AllowUnknown*/ true); 2178dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT ActualMVT = ActualVT.isSimple() ? ActualVT.getSimpleVT() : ValVT; 2179dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; 2180dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If ActualMVT is i1/i8/i16, we should set LocVT to i8/i8/i16. 2181dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ActualMVT == MVT::i1 || ActualMVT == MVT::i8) 2182dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ValVT = MVT::i8; 2183dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (ActualMVT == MVT::i16) 2184dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ValVT = MVT::i16; 2185dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2186dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCAssignFn *AssignFn = CCAssignFnForCall(CallConv, /*IsVarArg=*/false); 2187dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool Res = AssignFn(i, ValVT, ValVT, CCValAssign::Full, ArgFlags, CCInfo); 2188dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(!Res && "Call operand has unhandled type"); 2189dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (void)Res; 2190dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2191dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 219272062f5744557e270a38192554c3126ea5f97434Tim Northover 2193dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Get a count of how many bytes are to be pushed on the stack. 2194dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBytes = CCInfo.getNextStackOffset(); 2195dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2196dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsSibCall) { 2197dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Since we're not changing the ABI to make this a tail call, the memory 2198dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // operands are already available in the caller's incoming argument space. 2199dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumBytes = 0; 220072062f5744557e270a38192554c3126ea5f97434Tim Northover } 220172062f5744557e270a38192554c3126ea5f97434Tim Northover 2202dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FPDiff is the byte offset of the call's argument area from the callee's. 2203dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Stores to callee stack arguments will be placed in FixedStackSlots offset 2204dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // by this amount for a tail call. In a sibling call it must be 0 because the 2205dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // caller will deallocate the entire stack and the callee still expects its 2206dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // arguments to begin at SP+0. Completely unused for non-tail calls. 2207dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int FPDiff = 0; 220872062f5744557e270a38192554c3126ea5f97434Tim Northover 2209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsTailCall && !IsSibCall) { 2210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumReusableBytes = FuncInfo->getBytesInStackArgArea(); 2211dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2212dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Since callee will pop argument stack as a tail call, we must keep the 2213dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // popped size 16-byte aligned. 2214dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumBytes = RoundUpToAlignment(NumBytes, 16); 2215dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2216dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FPDiff will be negative if this tail call requires more space than we 2217dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // would automatically have in our incoming argument space. Positive if we 2218dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // can actually shrink the stack. 2219dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FPDiff = NumReusableBytes - NumBytes; 2220dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2221dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The stack pointer must be 16-byte aligned at all times it's used for a 2222dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // memory operation, which in practice means at *all* times and in 2223dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // particular across call boundaries. Therefore our own arguments started at 2224dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // a 16-byte aligned SP and the delta applied for the tail call should 2225dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // satisfy the same constraint. 2226dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(FPDiff % 16 == 0 && "unaligned stack on tail call"); 2227b2efdde06c00023287255d9a09861e43fb5efebdTim Northover } 222872062f5744557e270a38192554c3126ea5f97434Tim Northover 2229dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Adjust the stack pointer for the new arguments... 2230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // These operations are automatically eliminated by the prolog/epilog pass 2231dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!IsSibCall) 2232dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = 2233dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getCALLSEQ_START(Chain, DAG.getIntPtrConstant(NumBytes, true), DL); 223472062f5744557e270a38192554c3126ea5f97434Tim Northover 2235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue StackPtr = DAG.getCopyFromReg(Chain, DL, AArch64::SP, getPointerTy()); 223672062f5744557e270a38192554c3126ea5f97434Tim Northover 2237dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; 2238dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 8> MemOpChains; 223972062f5744557e270a38192554c3126ea5f97434Tim Northover 2240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Walk the register/memloc assignments, inserting copies/loads. 2241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0, realArgIdx = 0, e = ArgLocs.size(); i != e; 2242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++i, ++realArgIdx) { 2243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCValAssign &VA = ArgLocs[i]; 2244dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Arg = OutVals[realArgIdx]; 2245dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags; 224672062f5744557e270a38192554c3126ea5f97434Tim Northover 2247dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Promote the value if needed. 2248dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (VA.getLocInfo()) { 2249dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 2250dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown loc info!"); 2251dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::Full: 2252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 2253dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::SExt: 2254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); 2255dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 2256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::ZExt: 2257dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); 2258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 2259dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::AExt: 2260dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Outs[realArgIdx].ArgVT == MVT::i1) { 2261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AAPCS requires i1 to be zero-extended to 8-bits by the caller. 2262dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Arg); 2263dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i8, Arg); 2264dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); 2266dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 2267dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::BCvt: 2268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); 2269dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 2270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::FPExt: 2271dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::FP_EXTEND, DL, VA.getLocVT(), Arg); 2272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 2273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 227472062f5744557e270a38192554c3126ea5f97434Tim Northover 2275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VA.isRegLoc()) { 2276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (realArgIdx == 0 && Flags.isReturned() && Outs[0].VT == MVT::i64) { 2277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(VA.getLocVT() == MVT::i64 && 2278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "unexpected calling convention register assignment"); 2279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(!Ins.empty() && Ins[0].VT == MVT::i64 && 2280dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "unexpected use of 'returned'"); 2281dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsThisReturn = true; 2282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); 2284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 2285dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(VA.isMemLoc()); 228672062f5744557e270a38192554c3126ea5f97434Tim Northover 2287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue DstAddr; 2288dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo DstInfo; 228972062f5744557e270a38192554c3126ea5f97434Tim Northover 2290dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: This works on big-endian for composite byvals, which are the 2291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // common case. It should also work for fundamental types too. 2292dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint32_t BEAlign = 0; 2293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned OpSize = Flags.isByVal() ? Flags.getByValSize() * 8 2294dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : VA.getLocVT().getSizeInBits(); 2295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpSize = (OpSize + 7) / 8; 2296dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Subtarget->isLittleEndian() && !Flags.isByVal()) { 2297dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (OpSize < 8) 2298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BEAlign = 8 - OpSize; 2299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned LocMemOffset = VA.getLocMemOffset(); 2301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int32_t Offset = LocMemOffset + BEAlign; 2302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue PtrOff = DAG.getIntPtrConstant(Offset); 2303dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PtrOff = DAG.getNode(ISD::ADD, DL, getPointerTy(), StackPtr, PtrOff); 2304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2305dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsTailCall) { 2306dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Offset = Offset + FPDiff; 2307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset, true); 2308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2309dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DstAddr = DAG.getFrameIndex(FI, getPointerTy()); 2310dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DstInfo = MachinePointerInfo::getFixedStack(FI); 2311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Make sure any stack arguments overlapping with where we're storing 2313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // are loaded before this eventual operation. Otherwise they'll be 2314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // clobbered. 2315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = addTokenForArgument(Chain, DAG, MF.getFrameInfo(), FI); 2316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 2317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue PtrOff = DAG.getIntPtrConstant(Offset); 2318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DstAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), StackPtr, PtrOff); 2320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DstInfo = MachinePointerInfo::getStack(LocMemOffset); 2321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Outs[i].Flags.isByVal()) { 2324dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SizeNode = 2325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Outs[i].Flags.getByValSize(), MVT::i64); 2326dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cpy = DAG.getMemcpy( 2327dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain, DL, DstAddr, Arg, SizeNode, Outs[i].Flags.getByValAlign(), 2328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /*isVolatile = */ false, 2329dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines /*alwaysInline = */ false, DstInfo, MachinePointerInfo()); 2330dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MemOpChains.push_back(Cpy); 2332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 2333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Since we pass i1/i8/i16 as i1/i8/i16 on stack and Arg is already 2334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // promoted to a legal register type i32, we should truncate Arg back to 2335dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // i1/i8/i16. 2336cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VA.getValVT() == MVT::i1 || VA.getValVT() == MVT::i8 || 2337cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines VA.getValVT() == MVT::i16) 2338cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines Arg = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), Arg); 2339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Store = 2341dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo, false, false, 0); 2342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MemOpChains.push_back(Store); 2343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 234472062f5744557e270a38192554c3126ea5f97434Tim Northover } 234572062f5744557e270a38192554c3126ea5f97434Tim Northover } 234672062f5744557e270a38192554c3126ea5f97434Tim Northover 2347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!MemOpChains.empty()) 2348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains); 234972062f5744557e270a38192554c3126ea5f97434Tim Northover 2350dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Build a sequence of copy-to-reg nodes chained together with token chain 2351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // and flag operands which copy the outgoing args into the appropriate regs. 2352dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue InFlag; 2353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { 2354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, 2355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RegsToPass[i].second, InFlag); 2356dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InFlag = Chain.getValue(1); 2357dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 235872062f5744557e270a38192554c3126ea5f97434Tim Northover 2359dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the callee is a GlobalAddress/ExternalSymbol node (quite common, every 2360dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // direct call is) turn it into a TargetGlobalAddress/TargetExternalSymbol 2361dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // node so that legalize doesn't hack it. 2362dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (getTargetMachine().getCodeModel() == CodeModel::Large && 2363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Subtarget->isTargetMachO()) { 2364dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { 2365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const GlobalValue *GV = G->getGlobal(); 2366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool InternalLinkage = GV->hasInternalLinkage(); 2367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (InternalLinkage) 2368dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Callee = DAG.getTargetGlobalAddress(GV, DL, getPointerTy(), 0, 0); 2369dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else { 2370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Callee = DAG.getTargetGlobalAddress(GV, DL, getPointerTy(), 0, 2371dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_GOT); 2372dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Callee = DAG.getNode(AArch64ISD::LOADgot, DL, getPointerTy(), Callee); 2373dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2374dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (ExternalSymbolSDNode *S = 2375dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines dyn_cast<ExternalSymbolSDNode>(Callee)) { 2376dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const char *Sym = S->getSymbol(); 2377dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Callee = 2378dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetExternalSymbol(Sym, getPointerTy(), AArch64II::MO_GOT); 2379dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Callee = DAG.getNode(AArch64ISD::LOADgot, DL, getPointerTy(), Callee); 2380dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2381dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { 2382dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const GlobalValue *GV = G->getGlobal(); 2383dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Callee = DAG.getTargetGlobalAddress(GV, DL, getPointerTy(), 0, 0); 2384dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) { 2385dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const char *Sym = S->getSymbol(); 2386dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Callee = DAG.getTargetExternalSymbol(Sym, getPointerTy(), 0); 238772062f5744557e270a38192554c3126ea5f97434Tim Northover } 238872062f5744557e270a38192554c3126ea5f97434Tim Northover 2389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We don't usually want to end the call-sequence here because we would tidy 2390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the frame up *after* the call, however in the ABI-changing tail-call case 2391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we've carefully laid out the parameters so that when sp is reset they'll be 2392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // in the correct location. 2393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsTailCall && !IsSibCall) { 2394dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), 2395dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getIntPtrConstant(0, true), InFlag, DL); 2396dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InFlag = Chain.getValue(1); 2397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 239872062f5744557e270a38192554c3126ea5f97434Tim Northover 2399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::vector<SDValue> Ops; 2400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Chain); 2401dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Callee); 240272062f5744557e270a38192554c3126ea5f97434Tim Northover 2403dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsTailCall) { 2404dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Each tail call may have to adjust the stack by a different amount, so 2405dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // this information must travel along with the operation for eventual 2406dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // consumption by emitEpilogue. 2407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(DAG.getTargetConstant(FPDiff, MVT::i32)); 240872062f5744557e270a38192554c3126ea5f97434Tim Northover } 240972062f5744557e270a38192554c3126ea5f97434Tim Northover 2410dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Add argument registers to the end of the list so that they are known live 2411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // into the call. 2412dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) 2413dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(DAG.getRegister(RegsToPass[i].first, 2414dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RegsToPass[i].second.getValueType())); 241572062f5744557e270a38192554c3126ea5f97434Tim Northover 2416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Add a register mask operand representing the call-preserved registers. 2417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const uint32_t *Mask; 2418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); 2419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64RegisterInfo *ARI = 2420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static_cast<const AArch64RegisterInfo *>(TRI); 2421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsThisReturn) { 2422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For 'this' returns, use the X0-preserving mask if applicable 2423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Mask = ARI->getThisReturnPreservedMask(CallConv); 2424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Mask) { 2425dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsThisReturn = false; 2426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Mask = ARI->getCallPreservedMask(CallConv); 2427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else 2429dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Mask = ARI->getCallPreservedMask(CallConv); 243072062f5744557e270a38192554c3126ea5f97434Tim Northover 2431dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Mask && "Missing call preserved mask for calling convention"); 2432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(DAG.getRegisterMask(Mask)); 243372062f5744557e270a38192554c3126ea5f97434Tim Northover 2434dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (InFlag.getNode()) 2435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(InFlag); 243672062f5744557e270a38192554c3126ea5f97434Tim Northover 2437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); 243872062f5744557e270a38192554c3126ea5f97434Tim Northover 2439dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we're doing a tall call, use a TC_RETURN here rather than an 2440dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // actual call instruction. 2441dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsTailCall) 2442dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::TC_RETURN, DL, NodeTys, Ops); 244372062f5744557e270a38192554c3126ea5f97434Tim Northover 2444dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Returns a chain and a flag for retval copy to use. 2445dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getNode(AArch64ISD::CALL, DL, NodeTys, Ops); 2446dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InFlag = Chain.getValue(1); 244772062f5744557e270a38192554c3126ea5f97434Tim Northover 2448dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t CalleePopBytes = DoesCalleeRestoreStack(CallConv, TailCallOpt) 2449dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ? RoundUpToAlignment(NumBytes, 16) 2450dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : 0; 245172062f5744557e270a38192554c3126ea5f97434Tim Northover 2452dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, true), 2453dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getIntPtrConstant(CalleePopBytes, true), 2454dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InFlag, DL); 2455dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Ins.empty()) 2456dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InFlag = Chain.getValue(1); 245772062f5744557e270a38192554c3126ea5f97434Tim Northover 2458dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Handle result values, copying them out of physregs into vregs that we 2459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // return. 2460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerCallResult(Chain, InFlag, CallConv, IsVarArg, Ins, DL, DAG, 2461dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines InVals, IsThisReturn, 2462dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsThisReturn ? OutVals[0] : SDValue()); 2463dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 246472062f5744557e270a38192554c3126ea5f97434Tim Northover 2465dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::CanLowerReturn( 2466dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CallingConv::ID CallConv, MachineFunction &MF, bool isVarArg, 2467dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const { 2468dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCAssignFn *RetCC = CallConv == CallingConv::WebKit_JS 2469dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ? RetCC_AArch64_WebKit_JS 2470dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : RetCC_AArch64_AAPCS; 2471dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<CCValAssign, 16> RVLocs; 2472dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), RVLocs, Context); 2473dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CCInfo.CheckReturn(Outs, RetCC); 247472062f5744557e270a38192554c3126ea5f97434Tim Northover} 247572062f5744557e270a38192554c3126ea5f97434Tim Northover 247672062f5744557e270a38192554c3126ea5f97434Tim NorthoverSDValue 2477dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, 2478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isVarArg, 2479dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::OutputArg> &Outs, 2480dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<SDValue> &OutVals, 2481dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL, SelectionDAG &DAG) const { 2482dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCAssignFn *RetCC = CallConv == CallingConv::WebKit_JS 2483dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ? RetCC_AArch64_WebKit_JS 2484dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : RetCC_AArch64_AAPCS; 2485dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<CCValAssign, 16> RVLocs; 2486dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), 2487dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines getTargetMachine(), RVLocs, *DAG.getContext()); 2488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCInfo.AnalyzeReturn(Outs, RetCC); 248972062f5744557e270a38192554c3126ea5f97434Tim Northover 2490dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Copy the result values into the output registers. 2491dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Flag; 2492dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 4> RetOps(1, Chain); 2493dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0, realRVLocIdx = 0; i != RVLocs.size(); 2494dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++i, ++realRVLocIdx) { 2495dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCValAssign &VA = RVLocs[i]; 2496dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(VA.isRegLoc() && "Can only return in registers!"); 2497dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Arg = OutVals[realRVLocIdx]; 249872062f5744557e270a38192554c3126ea5f97434Tim Northover 2499dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (VA.getLocInfo()) { 2500dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 2501dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown loc info!"); 2502dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::Full: 2503dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Outs[i].ArgVT == MVT::i1) { 2504dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AAPCS requires i1 to be zero-extended to i8 by the producer of the 2505dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // value. This is strictly redundant on Darwin (which uses "zeroext 2506dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // i1"), but will be optimised out before ISel. 2507dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, Arg); 2508dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); 2509dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2510dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 2511dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case CCValAssign::BCvt: 2512dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); 2513dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 2514dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 251572062f5744557e270a38192554c3126ea5f97434Tim Northover 2516dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Arg, Flag); 2517dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Flag = Chain.getValue(1); 2518dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); 251936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 252036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2521dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RetOps[0] = Chain; // Update chain. 252236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2523dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Add the flag if we have it. 2524dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Flag.getNode()) 2525dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RetOps.push_back(Flag); 252636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2527dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::RET_FLAG, DL, MVT::Other, RetOps); 2528dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 252936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2530dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 2531dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Other Lowering Code 2532dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 2533dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2534dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerGlobalAddress(SDValue Op, 2535dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 2536dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT PtrVT = getPointerTy(); 253736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDLoc DL(Op); 2538dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); 2539dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned char OpFlags = 2540dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Subtarget->ClassifyGlobalReference(GV, getTargetMachine()); 2541dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2542dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(cast<GlobalAddressSDNode>(Op)->getOffset() == 0 && 2543dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "unexpected offset in global node"); 2544dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2545dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This also catched the large code model case for Darwin. 2546dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((OpFlags & AArch64II::MO_GOT) != 0) { 2547dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue GotAddr = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, OpFlags); 2548dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: Once remat is capable of dealing with instructions with register 2549dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // operands, expand this into two nodes instead of using a wrapper node. 2550dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, GotAddr); 2551dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2552dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2553dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (getTargetMachine().getCodeModel() == CodeModel::Large) { 2554dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const unsigned char MO_NC = AArch64II::MO_NC; 2555dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode( 2556dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64ISD::WrapperLarge, DL, PtrVT, 2557dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_G3), 2558dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_G2 | MO_NC), 2559dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_G1 | MO_NC), 2560dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_G0 | MO_NC)); 2561dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 2562dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Use ADRP/ADD or ADRP/LDR for everything else: the small model on ELF and 2563dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the only correct model on Darwin. 2564dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Hi = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, 2565dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpFlags | AArch64II::MO_PAGE); 2566dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned char LoFlags = OpFlags | AArch64II::MO_PAGEOFF | AArch64II::MO_NC; 2567dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lo = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, LoFlags); 2568dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2569dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); 2570dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); 2571dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 257236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 257336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2574dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \brief Convert a TLS address reference into the correct sequence of loads 2575dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// and calls to compute the variable's address (for Darwin, currently) and 2576dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// return an SDValue containing the final node. 2577dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2578dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Darwin only has one TLS scheme which must be capable of dealing with the 2579dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// fully general situation, in the worst case. This means: 2580dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// + "extern __thread" declaration. 2581dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// + Defined in a possibly unknown dynamic library. 2582dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 2583dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// The general system is that each __thread variable has a [3 x i64] descriptor 2584dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// which contains information used by the runtime to calculate the address. The 2585dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// only part of this the compiler needs to know about is the first xword, which 2586dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// contains a function pointer that must be called with the address of the 2587dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// entire descriptor in "x0". 2588dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 2589dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Since this descriptor may be in a different unit, in general even the 2590dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// descriptor must be accessed via an indirect load. The "ideal" code sequence 2591dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// is: 2592dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// adrp x0, _var@TLVPPAGE 2593dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// ldr x0, [x0, _var@TLVPPAGEOFF] ; x0 now contains address of descriptor 2594dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// ldr x1, [x0] ; x1 contains 1st entry of descriptor, 2595dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// ; the function pointer 2596dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// blr x1 ; Uses descriptor address in x0 2597dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// ; Address of _var is now in x0. 2598dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 2599dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// If the address of _var's descriptor *is* known to the linker, then it can 2600dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// change the first "ldr" instruction to an appropriate "add x0, x0, #imm" for 2601dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// a slight efficiency gain. 260272062f5744557e270a38192554c3126ea5f97434Tim NorthoverSDValue 2603dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::LowerDarwinGlobalTLSAddress(SDValue Op, 2604dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 2605dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Subtarget->isTargetDarwin() && "TLS only supported on Darwin"); 2606160a14e2b1b3bfd2bd67cb03a7ae213fb35211ccWeiming Zhao 2607dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 2608dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT PtrVT = getPointerTy(); 2609dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); 2610160a14e2b1b3bfd2bd67cb03a7ae213fb35211ccWeiming Zhao 2611dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TLVPAddr = 2612dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_TLS); 2613dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue DescAddr = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, TLVPAddr); 2614160a14e2b1b3bfd2bd67cb03a7ae213fb35211ccWeiming Zhao 2615dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The first entry in the descriptor is a function pointer that we must call 2616dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to obtain the address of the variable. 2617dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Chain = DAG.getEntryNode(); 2618dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FuncTLVGet = 2619dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getLoad(MVT::i64, DL, Chain, DescAddr, MachinePointerInfo::getGOT(), 2620dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines false, true, true, 8); 2621dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = FuncTLVGet.getValue(1); 2622160a14e2b1b3bfd2bd67cb03a7ae213fb35211ccWeiming Zhao 2623160a14e2b1b3bfd2bd67cb03a7ae213fb35211ccWeiming Zhao MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 2624dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MFI->setAdjustsStack(true); 262572062f5744557e270a38192554c3126ea5f97434Tim Northover 2626dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TLS calls preserve all registers except those that absolutely must be 2627dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // trashed: X0 (it takes an argument), LR (it's a call) and NZCV (let's not be 2628dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // silly). 2629dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); 2630dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64RegisterInfo *ARI = 2631dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static_cast<const AArch64RegisterInfo *>(TRI); 2632dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const uint32_t *Mask = ARI->getTLSCallPreservedMask(); 2633dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2634dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Finally, we can make the call. This is just a degenerate version of a 2635dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // normal AArch64 call node: x0 takes the address of the descriptor, and 2636dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // returns the address of the variable in this thread. 2637dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getCopyToReg(Chain, DL, AArch64::X0, DescAddr, SDValue()); 2638dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = 2639dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::CALL, DL, DAG.getVTList(MVT::Other, MVT::Glue), 2640dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain, FuncTLVGet, DAG.getRegister(AArch64::X0, MVT::i64), 2641dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getRegisterMask(Mask), Chain.getValue(1)); 2642dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getCopyFromReg(Chain, DL, AArch64::X0, PtrVT, Chain.getValue(1)); 264336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 264436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2645dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// When accessing thread-local variables under either the general-dynamic or 2646dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// local-dynamic system, we make a "TLS-descriptor" call. The variable will 2647dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// have a descriptor, accessible via a PC-relative ADRP, and whose first entry 2648dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// is a function pointer to carry out the resolution. This function takes the 2649dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// address of the descriptor in X0 and returns the TPIDR_EL0 offset in X0. All 2650dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// other registers (except LR, NZCV) are preserved. 2651dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 2652dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Thus, the ideal call sequence on AArch64 is: 2653dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 2654dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// adrp x0, :tlsdesc:thread_var 2655dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// ldr x8, [x0, :tlsdesc_lo12:thread_var] 2656dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// add x0, x0, :tlsdesc_lo12:thread_var 2657dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// .tlsdesccall thread_var 2658dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// blr x8 2659dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// (TPIDR_EL0 offset now in x0). 2660dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 2661dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// The ".tlsdesccall" directive instructs the assembler to insert a particular 2662dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// relocation to help the linker relax this sequence if it turns out to be too 2663dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// conservative. 2664dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 2665dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// FIXME: we currently produce an extra, duplicated, ADRP instruction, but this 2666dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// is harmless. 2667dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerELFTLSDescCall(SDValue SymAddr, 2668dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue DescAddr, SDLoc DL, 2669dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 267072062f5744557e270a38192554c3126ea5f97434Tim Northover EVT PtrVT = getPointerTy(); 267172062f5744557e270a38192554c3126ea5f97434Tim Northover 267272062f5744557e270a38192554c3126ea5f97434Tim Northover // The function we need to call is simply the first entry in the GOT for this 267372062f5744557e270a38192554c3126ea5f97434Tim Northover // descriptor, load it in preparation. 2674dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Func = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, SymAddr); 2675dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2676dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TLS calls preserve all registers except those that absolutely must be 2677dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // trashed: X0 (it takes an argument), LR (it's a call) and NZCV (let's not be 2678dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // silly). 2679dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo(); 2680dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64RegisterInfo *ARI = 2681dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static_cast<const AArch64RegisterInfo *>(TRI); 2682dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const uint32_t *Mask = ARI->getTLSCallPreservedMask(); 268372062f5744557e270a38192554c3126ea5f97434Tim Northover 268472062f5744557e270a38192554c3126ea5f97434Tim Northover // The function takes only one argument: the address of the descriptor itself 268572062f5744557e270a38192554c3126ea5f97434Tim Northover // in X0. 2686dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Glue, Chain; 268772062f5744557e270a38192554c3126ea5f97434Tim Northover Chain = DAG.getCopyToReg(DAG.getEntryNode(), DL, AArch64::X0, DescAddr, Glue); 268872062f5744557e270a38192554c3126ea5f97434Tim Northover Glue = Chain.getValue(1); 268972062f5744557e270a38192554c3126ea5f97434Tim Northover 269072062f5744557e270a38192554c3126ea5f97434Tim Northover // We're now ready to populate the argument list, as with a normal call: 2691dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 6> Ops; 269272062f5744557e270a38192554c3126ea5f97434Tim Northover Ops.push_back(Chain); 269372062f5744557e270a38192554c3126ea5f97434Tim Northover Ops.push_back(Func); 269472062f5744557e270a38192554c3126ea5f97434Tim Northover Ops.push_back(SymAddr); 269572062f5744557e270a38192554c3126ea5f97434Tim Northover Ops.push_back(DAG.getRegister(AArch64::X0, PtrVT)); 269672062f5744557e270a38192554c3126ea5f97434Tim Northover Ops.push_back(DAG.getRegisterMask(Mask)); 269772062f5744557e270a38192554c3126ea5f97434Tim Northover Ops.push_back(Glue); 269872062f5744557e270a38192554c3126ea5f97434Tim Northover 269972062f5744557e270a38192554c3126ea5f97434Tim Northover SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); 2700dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = DAG.getNode(AArch64ISD::TLSDESC_CALL, DL, NodeTys, Ops); 270172062f5744557e270a38192554c3126ea5f97434Tim Northover Glue = Chain.getValue(1); 270272062f5744557e270a38192554c3126ea5f97434Tim Northover 270372062f5744557e270a38192554c3126ea5f97434Tim Northover return DAG.getCopyFromReg(Chain, DL, AArch64::X0, PtrVT, Glue); 270472062f5744557e270a38192554c3126ea5f97434Tim Northover} 270572062f5744557e270a38192554c3126ea5f97434Tim Northover 270672062f5744557e270a38192554c3126ea5f97434Tim NorthoverSDValue 2707dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::LowerELFGlobalTLSAddress(SDValue Op, 2708dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 2709dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Subtarget->isTargetELF() && "This function expects an ELF target"); 2710dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(getTargetMachine().getCodeModel() == CodeModel::Small && 2711dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "ELF TLS only supported in small memory model"); 271272062f5744557e270a38192554c3126ea5f97434Tim Northover const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op); 271372062f5744557e270a38192554c3126ea5f97434Tim Northover 271472062f5744557e270a38192554c3126ea5f97434Tim Northover TLSModel::Model Model = getTargetMachine().getTLSModel(GA->getGlobal()); 271572062f5744557e270a38192554c3126ea5f97434Tim Northover 271672062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue TPOff; 271772062f5744557e270a38192554c3126ea5f97434Tim Northover EVT PtrVT = getPointerTy(); 2718ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL(Op); 271972062f5744557e270a38192554c3126ea5f97434Tim Northover const GlobalValue *GV = GA->getGlobal(); 272072062f5744557e270a38192554c3126ea5f97434Tim Northover 272172062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue ThreadBase = DAG.getNode(AArch64ISD::THREAD_POINTER, DL, PtrVT); 272272062f5744557e270a38192554c3126ea5f97434Tim Northover 2723dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Model == TLSModel::LocalExec) { 2724dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue HiVar = DAG.getTargetGlobalAddress( 2725dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GV, DL, PtrVT, 0, AArch64II::MO_TLS | AArch64II::MO_G1); 2726dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LoVar = DAG.getTargetGlobalAddress( 2727dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GV, DL, PtrVT, 0, 2728dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_TLS | AArch64II::MO_G0 | AArch64II::MO_NC); 2729dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2730dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TPOff = SDValue(DAG.getMachineNode(AArch64::MOVZXi, DL, PtrVT, HiVar, 2731dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstant(16, MVT::i32)), 2732dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 0); 2733dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TPOff = SDValue(DAG.getMachineNode(AArch64::MOVKXi, DL, PtrVT, TPOff, LoVar, 2734dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstant(0, MVT::i32)), 2735dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 0); 2736dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (Model == TLSModel::InitialExec) { 2737dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TPOff = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_TLS); 2738dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TPOff = DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, TPOff); 273972062f5744557e270a38192554c3126ea5f97434Tim Northover } else if (Model == TLSModel::LocalDynamic) { 274072062f5744557e270a38192554c3126ea5f97434Tim Northover // Local-dynamic accesses proceed in two phases. A general-dynamic TLS 274172062f5744557e270a38192554c3126ea5f97434Tim Northover // descriptor call against the special symbol _TLS_MODULE_BASE_ to calculate 274272062f5744557e270a38192554c3126ea5f97434Tim Northover // the beginning of the module's TLS region, followed by a DTPREL offset 274372062f5744557e270a38192554c3126ea5f97434Tim Northover // calculation. 274472062f5744557e270a38192554c3126ea5f97434Tim Northover 274572062f5744557e270a38192554c3126ea5f97434Tim Northover // These accesses will need deduplicating if there's more than one. 2746dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64FunctionInfo *MFI = 2747dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getMachineFunction().getInfo<AArch64FunctionInfo>(); 274872062f5744557e270a38192554c3126ea5f97434Tim Northover MFI->incNumLocalDynamicTLSAccesses(); 274972062f5744557e270a38192554c3126ea5f97434Tim Northover 2750dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Accesses used in this sequence go via the TLS descriptor which lives in 2751dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the GOT. Prepare an address we can use to handle this. 2752dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue HiDesc = DAG.getTargetExternalSymbol( 2753dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "_TLS_MODULE_BASE_", PtrVT, AArch64II::MO_TLS | AArch64II::MO_PAGE); 2754dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LoDesc = DAG.getTargetExternalSymbol( 2755dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "_TLS_MODULE_BASE_", PtrVT, 2756dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_TLS | AArch64II::MO_PAGEOFF | AArch64II::MO_NC); 2757dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2758dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // First argument to the descriptor call is the address of the descriptor 2759dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // itself. 2760dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue DescAddr = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, HiDesc); 2761dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DescAddr = DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, DescAddr, LoDesc); 2762dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2763dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The call needs a relocation too for linker relaxation. It doesn't make 2764dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // sense to call it MO_PAGE or MO_PAGEOFF though so we need another copy of 2765dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the address. 2766dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SymAddr = DAG.getTargetExternalSymbol("_TLS_MODULE_BASE_", PtrVT, 2767dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_TLS); 2768dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2769dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Now we can calculate the offset from TPIDR_EL0 to this module's 2770dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // thread-local area. 2771dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TPOff = LowerELFTLSDescCall(SymAddr, DescAddr, DL, DAG); 2772dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2773dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Now use :dtprel_whatever: operations to calculate this variable's offset 2774dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // in its thread-storage area. 2775dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue HiVar = DAG.getTargetGlobalAddress( 2776dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GV, DL, MVT::i64, 0, AArch64II::MO_TLS | AArch64II::MO_G1); 2777dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LoVar = DAG.getTargetGlobalAddress( 2778dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GV, DL, MVT::i64, 0, 2779dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_TLS | AArch64II::MO_G0 | AArch64II::MO_NC); 2780dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2781dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue DTPOff = 2782dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue(DAG.getMachineNode(AArch64::MOVZXi, DL, PtrVT, HiVar, 2783dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstant(16, MVT::i32)), 2784dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 0); 2785dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DTPOff = 2786dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue(DAG.getMachineNode(AArch64::MOVKXi, DL, PtrVT, DTPOff, LoVar, 2787dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstant(0, MVT::i32)), 2788dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 0); 2789dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2790dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TPOff = DAG.getNode(ISD::ADD, DL, PtrVT, TPOff, DTPOff); 2791dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (Model == TLSModel::GeneralDynamic) { 2792dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Accesses used in this sequence go via the TLS descriptor which lives in 2793dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the GOT. Prepare an address we can use to handle this. 2794dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue HiDesc = DAG.getTargetGlobalAddress( 2795dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GV, DL, PtrVT, 0, AArch64II::MO_TLS | AArch64II::MO_PAGE); 2796dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LoDesc = DAG.getTargetGlobalAddress( 2797dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GV, DL, PtrVT, 0, 2798dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_TLS | AArch64II::MO_PAGEOFF | AArch64II::MO_NC); 2799dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2800dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // First argument to the descriptor call is the address of the descriptor 2801dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // itself. 2802dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue DescAddr = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, HiDesc); 2803dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DescAddr = DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, DescAddr, LoDesc); 2804dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2805dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The call needs a relocation too for linker relaxation. It doesn't make 2806dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // sense to call it MO_PAGE or MO_PAGEOFF though so we need another copy of 2807dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the address. 2808dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SymAddr = 2809dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, AArch64II::MO_TLS); 2810dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2811dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Finally we can make a call to calculate the offset from tpidr_el0. 2812dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TPOff = LowerELFTLSDescCall(SymAddr, DescAddr, DL, DAG); 281372062f5744557e270a38192554c3126ea5f97434Tim Northover } else 2814dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unsupported ELF TLS access model"); 281572062f5744557e270a38192554c3126ea5f97434Tim Northover 281672062f5744557e270a38192554c3126ea5f97434Tim Northover return DAG.getNode(ISD::ADD, DL, PtrVT, ThreadBase, TPOff); 281772062f5744557e270a38192554c3126ea5f97434Tim Northover} 281872062f5744557e270a38192554c3126ea5f97434Tim Northover 2819dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerGlobalTLSAddress(SDValue Op, 2820dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 2821dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Subtarget->isTargetDarwin()) 2822dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerDarwinGlobalTLSAddress(Op, DAG); 2823dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (Subtarget->isTargetELF()) 2824dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerELFGlobalTLSAddress(Op, DAG); 2825dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2826dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unexpected platform trying to use TLS"); 2827dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 2828dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const { 2829dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Chain = Op.getOperand(0); 2830dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get(); 2831dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = Op.getOperand(2); 2832dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = Op.getOperand(3); 2833dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Dest = Op.getOperand(4); 283436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDLoc dl(Op); 283536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2836dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Handle f128 first, since lowering it will result in comparing the return 2837dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // value of a libcall against zero, which is just what the rest of LowerBR_CC 2838dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // is expecting to deal with. 2839dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getValueType() == MVT::f128) { 2840dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl); 284136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2842dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If softenSetCCOperands returned a scalar, we need to compare the result 2843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // against zero to select between true and false values. 2844dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!RHS.getNode()) { 2845dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = DAG.getConstant(0, LHS.getValueType()); 2846dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = ISD::SETNE; 2847dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 284836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 284936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2850dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Optimize {s|u}{add|sub|mul}.with.overflow feeding into a branch 2851dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // instruction. 2852dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = LHS.getOpcode(); 2853dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getResNo() == 1 && isa<ConstantSDNode>(RHS) && 2854dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cast<ConstantSDNode>(RHS)->isOne() && 2855dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || 2856dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { 2857dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert((CC == ISD::SETEQ || CC == ISD::SETNE) && 2858dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "Unexpected condition code."); 2859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Only lower legal XALUO ops. 2860dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!DAG.getTargetLoweringInfo().isTypeLegal(LHS->getValueType(0))) 2861dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 286236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2863dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The actual operation with overflow check. 2864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode OFCC; 2865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Value, Overflow; 2866dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::tie(Value, Overflow) = getAArch64XALUOOp(OFCC, LHS.getValue(0), DAG); 286772062f5744557e270a38192554c3126ea5f97434Tim Northover 2868dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC == ISD::SETNE) 2869dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OFCC = getInvertedCondCode(OFCC); 2870dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal = DAG.getConstant(OFCC, MVT::i32); 287172062f5744557e270a38192554c3126ea5f97434Tim Northover 2872dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::BRCOND, SDLoc(LHS), MVT::Other, Chain, Dest, 2873dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCVal, Overflow); 2874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 287572062f5744557e270a38192554c3126ea5f97434Tim Northover 2876dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getValueType().isInteger()) { 2877dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert((LHS.getValueType() == RHS.getValueType()) && 2878dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (LHS.getValueType() == MVT::i32 || LHS.getValueType() == MVT::i64)); 2879dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2880dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the RHS of the comparison is zero, we can potentially fold this 2881dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to a specialized branch. 2882dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS); 2883dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (RHSC && RHSC->getZExtValue() == 0) { 2884dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC == ISD::SETEQ) { 2885dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // See if we can use a TBZ to fold in an AND as well. 2886dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TBZ has a smaller branch displacement than CBZ. If the offset is 2887dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // out of bounds, a late MI-layer pass rewrites branches. 2888dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 403.gcc is an example that hits this case. 2889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getOpcode() == ISD::AND && 2890dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isa<ConstantSDNode>(LHS.getOperand(1)) && 2891dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isPowerOf2_64(LHS.getConstantOperandVal(1))) { 2892dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Test = LHS.getOperand(0); 2893dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t Mask = LHS.getConstantOperandVal(1); 2894dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2895dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TBZ only operates on i64's, but the ext should be free. 2896dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Test.getValueType() == MVT::i32) 2897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Test = DAG.getAnyExtOrTrunc(Test, dl, MVT::i64); 2898dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2899dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::TBZ, dl, MVT::Other, Chain, Test, 2900dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Log2_64(Mask), MVT::i64), Dest); 2901dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 290272062f5744557e270a38192554c3126ea5f97434Tim Northover 2903dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CBZ, dl, MVT::Other, Chain, LHS, Dest); 2904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (CC == ISD::SETNE) { 2905dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // See if we can use a TBZ to fold in an AND as well. 2906dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TBZ has a smaller branch displacement than CBZ. If the offset is 2907dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // out of bounds, a late MI-layer pass rewrites branches. 2908dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 403.gcc is an example that hits this case. 2909dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getOpcode() == ISD::AND && 2910dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isa<ConstantSDNode>(LHS.getOperand(1)) && 2911dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isPowerOf2_64(LHS.getConstantOperandVal(1))) { 2912dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Test = LHS.getOperand(0); 2913dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t Mask = LHS.getConstantOperandVal(1); 2914dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2915dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TBNZ only operates on i64's, but the ext should be free. 2916dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Test.getValueType() == MVT::i32) 2917dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Test = DAG.getAnyExtOrTrunc(Test, dl, MVT::i64); 2918dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2919dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::TBNZ, dl, MVT::Other, Chain, Test, 2920dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Log2_64(Mask), MVT::i64), Dest); 2921dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 292272062f5744557e270a38192554c3126ea5f97434Tim Northover 2923dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CBNZ, dl, MVT::Other, Chain, LHS, Dest); 2924dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 2925dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 292672062f5744557e270a38192554c3126ea5f97434Tim Northover 2927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal; 2928dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = getAArch64Cmp(LHS, RHS, CC, CCVal, DAG, dl); 2929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CCVal, 2930dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cmp); 2931dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 293272062f5744557e270a38192554c3126ea5f97434Tim Northover 2933dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::f64); 2934dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2935dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Unfortunately, the mapping of LLVM FP CC's onto AArch64 CC's isn't totally 2936dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // clean. Some of them require two branches to implement. 2937dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = emitComparison(LHS, RHS, CC, dl, DAG); 2938dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode CC1, CC2; 2939dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines changeFPCCToAArch64CC(CC, CC1, CC2); 2940dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CC1Val = DAG.getConstant(CC1, MVT::i32); 2941dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue BR1 = 2942dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, Chain, Dest, CC1Val, Cmp); 2943dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC2 != AArch64CC::AL) { 2944dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CC2Val = DAG.getConstant(CC2, MVT::i32); 2945dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::BRCOND, dl, MVT::Other, BR1, Dest, CC2Val, 2946dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cmp); 2947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 294872062f5744557e270a38192554c3126ea5f97434Tim Northover 2949dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return BR1; 295072062f5744557e270a38192554c3126ea5f97434Tim Northover} 295172062f5744557e270a38192554c3126ea5f97434Tim Northover 2952dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerFCOPYSIGN(SDValue Op, 2953dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 295487773c318fcee853fb34a80a10c4347d523bdafbTim Northover EVT VT = Op.getValueType(); 2955dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 295687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 2957dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue In1 = Op.getOperand(0); 2958dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue In2 = Op.getOperand(1); 2959dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT SrcVT = In2.getValueType(); 2960dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SrcVT != VT) { 2961dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SrcVT == MVT::f32 && VT == MVT::f64) 2962dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines In2 = DAG.getNode(ISD::FP_EXTEND, DL, VT, In2); 2963dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (SrcVT == MVT::f64 && VT == MVT::f32) 2964dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines In2 = DAG.getNode(ISD::FP_ROUND, DL, VT, In2, DAG.getIntPtrConstant(0)); 2965dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 2966dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: Src type is different, bail out for now. Can VT really be a 2967dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // vector type? 2968dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 2969dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 297087773c318fcee853fb34a80a10c4347d523bdafbTim Northover 2971dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VecVT; 2972dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT EltVT; 2973dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue EltMask, VecVal1, VecVal2; 2974dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::f32 || VT == MVT::v2f32 || VT == MVT::v4f32) { 2975dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EltVT = MVT::i32; 2976dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVT = MVT::v4i32; 2977dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EltMask = DAG.getConstant(0x80000000ULL, EltVT); 2978dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2979dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isVector()) { 2980dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal1 = DAG.getTargetInsertSubreg(AArch64::ssub, DL, VecVT, 2981dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getUNDEF(VecVT), In1); 2982dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal2 = DAG.getTargetInsertSubreg(AArch64::ssub, DL, VecVT, 2983dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getUNDEF(VecVT), In2); 2984dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 2985dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal1 = DAG.getNode(ISD::BITCAST, DL, VecVT, In1); 2986dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal2 = DAG.getNode(ISD::BITCAST, DL, VecVT, In2); 298787773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 2988dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (VT == MVT::f64 || VT == MVT::v2f64) { 2989dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EltVT = MVT::i64; 2990dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVT = MVT::v2i64; 2991dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2992dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We want to materialize a mask with the the high bit set, but the AdvSIMD 2993dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // immediate moves cannot materialize that in a single instruction for 2994dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 64-bit elements. Instead, materialize zero and then negate it. 2995dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EltMask = DAG.getConstant(0, EltVT); 2996dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 2997dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isVector()) { 2998dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal1 = DAG.getTargetInsertSubreg(AArch64::dsub, DL, VecVT, 2999dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getUNDEF(VecVT), In1); 3000dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal2 = DAG.getTargetInsertSubreg(AArch64::dsub, DL, VecVT, 3001dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getUNDEF(VecVT), In2); 300287773c318fcee853fb34a80a10c4347d523bdafbTim Northover } else { 3003dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal1 = DAG.getNode(ISD::BITCAST, DL, VecVT, In1); 3004dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal2 = DAG.getNode(ISD::BITCAST, DL, VecVT, In2); 300587773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 3006dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 3007dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Invalid type for copysign!"); 3008dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 300987773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3010dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::vector<SDValue> BuildVectorOps; 3011dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < VecVT.getVectorNumElements(); ++i) 3012dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVectorOps.push_back(EltMask); 301387773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3014dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue BuildVec = DAG.getNode(ISD::BUILD_VECTOR, DL, VecVT, BuildVectorOps); 301587773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3016dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we couldn't materialize the mask above, then the mask vector will be 3017dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the zero vector, and we need to negate it here. 3018dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::f64 || VT == MVT::v2f64) { 3019dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2f64, BuildVec); 3020dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVec = DAG.getNode(ISD::FNEG, DL, MVT::v2f64, BuildVec); 3021dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVec = DAG.getNode(ISD::BITCAST, DL, MVT::v2i64, BuildVec); 302287773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 302387773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3024dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Sel = 3025dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::BIT, DL, VecVT, VecVal1, VecVal2, BuildVec); 302687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3027dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::f32) 3028dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getTargetExtractSubreg(AArch64::ssub, DL, VT, Sel); 3029dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (VT == MVT::f64) 3030dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getTargetExtractSubreg(AArch64::dsub, DL, VT, Sel); 3031dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 3032dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, DL, VT, Sel); 3033dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 303487773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3035dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerCTPOP(SDValue Op, SelectionDAG &DAG) const { 3036dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DAG.getMachineFunction().getFunction()->getAttributes().hasAttribute( 3037dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AttributeSet::FunctionIndex, Attribute::NoImplicitFloat)) 3038dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 303987773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3040dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // While there is no integer popcount instruction, it can 3041dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // be more efficiently lowered to the following sequence that uses 3042dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AdvSIMD registers/instructions as long as the copies to/from 3043dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the AdvSIMD registers are cheap. 3044dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FMOV D0, X0 // copy 64-bit int to vector, high bits zero'd 3045dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // CNT V0.8B, V0.8B // 8xbyte pop-counts 3046dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // ADDV B0, V0.8B // sum 8xbyte pop-counts 3047dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // UMOV X0, V0.B[0] // copy byte result back to integer reg 3048dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Val = Op.getOperand(0); 3049dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 3050dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3051dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ZeroVec = DAG.getUNDEF(MVT::v8i8); 305287773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3053dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue VecVal; 3054dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::i32) { 3055dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal = DAG.getNode(ISD::BITCAST, DL, MVT::f32, Val); 3056dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal = DAG.getTargetInsertSubreg(AArch64::ssub, DL, MVT::v8i8, ZeroVec, 3057dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal); 3058dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 3059dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecVal = DAG.getNode(ISD::BITCAST, DL, MVT::v8i8, Val); 306087773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 306187773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3062dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CtPop = DAG.getNode(ISD::CTPOP, DL, MVT::v8i8, VecVal); 3063dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue UaddLV = DAG.getNode( 3064dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::INTRINSIC_WO_CHAIN, DL, MVT::i32, 3065dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Intrinsic::aarch64_neon_uaddlv, MVT::i32), CtPop); 306687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3067dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::i64) 3068dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UaddLV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, UaddLV); 3069dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return UaddLV; 3070dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 307187773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3072dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const { 307387773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3074dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getValueType().isVector()) 3075dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LowerVSETCC(Op, DAG); 307687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 307772062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue LHS = Op.getOperand(0); 307872062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue RHS = Op.getOperand(1); 307972062f5744557e270a38192554c3126ea5f97434Tim Northover ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); 3080dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 308172062f5744557e270a38192554c3126ea5f97434Tim Northover 3082dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We chose ZeroOrOneBooleanContents, so use zero and one. 3083dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3084dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TVal = DAG.getConstant(1, VT); 3085dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FVal = DAG.getConstant(0, VT); 308687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3087dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Handle f128 first, since one possible outcome is a normal integer 3088dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // comparison which gets picked up by the next if statement. 308972062f5744557e270a38192554c3126ea5f97434Tim Northover if (LHS.getValueType() == MVT::f128) { 309072062f5744557e270a38192554c3126ea5f97434Tim Northover softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl); 309172062f5744557e270a38192554c3126ea5f97434Tim Northover 309272062f5744557e270a38192554c3126ea5f97434Tim Northover // If softenSetCCOperands returned a scalar, use it. 3093dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!RHS.getNode()) { 309472062f5744557e270a38192554c3126ea5f97434Tim Northover assert(LHS.getValueType() == Op.getValueType() && 309572062f5744557e270a38192554c3126ea5f97434Tim Northover "Unexpected setcc expansion!"); 309672062f5744557e270a38192554c3126ea5f97434Tim Northover return LHS; 309772062f5744557e270a38192554c3126ea5f97434Tim Northover } 309872062f5744557e270a38192554c3126ea5f97434Tim Northover } 309972062f5744557e270a38192554c3126ea5f97434Tim Northover 310072062f5744557e270a38192554c3126ea5f97434Tim Northover if (LHS.getValueType().isInteger()) { 3101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal; 3102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = 3103dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines getAArch64Cmp(LHS, RHS, ISD::getSetCCInverse(CC, true), CCVal, DAG, dl); 3104dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Note that we inverted the condition above, so we reverse the order of 3106dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the true and false operands here. This will allow the setcc to be 3107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // matched to a single CSINC instruction. 3108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CCVal, Cmp); 3109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3111dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Now we know we're dealing with FP values. 3112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::f64); 311372062f5744557e270a38192554c3126ea5f97434Tim Northover 3114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If that fails, we'll need to perform an FCMP + CSEL sequence. Go ahead 3115dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // and do the comparison. 3116dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = emitComparison(LHS, RHS, CC, dl, DAG); 311772062f5744557e270a38192554c3126ea5f97434Tim Northover 3118dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode CC1, CC2; 3119dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines changeFPCCToAArch64CC(CC, CC1, CC2); 3120dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC2 == AArch64CC::AL) { 3121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines changeFPCCToAArch64CC(ISD::getSetCCInverse(CC, false), CC1, CC2); 3122dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CC1Val = DAG.getConstant(CC1, MVT::i32); 3123dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3124dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Note that we inverted the condition above, so we reverse the order of 3125dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the true and false operands here. This will allow the setcc to be 3126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // matched to a single CSINC instruction. 3127dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CC1Val, Cmp); 3128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 3129dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Unfortunately, the mapping of LLVM FP CC's onto AArch64 CC's isn't 3130dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // totally clean. Some of them require two CSELs to implement. As is in 3131dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // this case, we emit the first CSEL and then emit a second using the output 3132dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // of the first as the RHS. We're effectively OR'ing the two CC's together. 3133dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3134dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: It would be nice if we could match the two CSELs to two CSINCs. 3135dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CC1Val = DAG.getConstant(CC1, MVT::i32); 3136dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CS1 = 3137dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp); 3138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3139dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CC2Val = DAG.getConstant(CC2, MVT::i32); 3140dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp); 314172062f5744557e270a38192554c3126ea5f97434Tim Northover } 3142dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 314372062f5744557e270a38192554c3126ea5f97434Tim Northover 3144dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// A SELECT_CC operation is really some kind of max or min if both values being 3145dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// compared are, in some sense, equal to the results in either case. However, 3146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// it is permissible to compare f32 values and produce directly extended f64 3147dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// values. 3148dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 3149dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Extending the comparison operands would also be allowed, but is less likely 3150dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// to happen in practice since their use is right here. Note that truncate 3151dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// operations would *not* be semantically equivalent. 3152dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool selectCCOpsAreFMaxCompatible(SDValue Cmp, SDValue Result) { 3153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Cmp == Result) 3154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 315572062f5744557e270a38192554c3126ea5f97434Tim Northover 3156dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantFPSDNode *CCmp = dyn_cast<ConstantFPSDNode>(Cmp); 3157dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantFPSDNode *CResult = dyn_cast<ConstantFPSDNode>(Result); 3158dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CCmp && CResult && Cmp.getValueType() == MVT::f32 && 3159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Result.getValueType() == MVT::f64) { 3160dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool Lossy; 3161dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APFloat CmpVal = CCmp->getValueAPF(); 3162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CmpVal.convert(APFloat::IEEEdouble, APFloat::rmNearestTiesToEven, &Lossy); 3163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CResult->getValueAPF().bitwiseIsEqual(CmpVal); 316472062f5744557e270a38192554c3126ea5f97434Tim Northover } 316572062f5744557e270a38192554c3126ea5f97434Tim Northover 3166dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Result->getOpcode() == ISD::FP_EXTEND && Result->getOperand(0) == Cmp; 316772062f5744557e270a38192554c3126ea5f97434Tim Northover} 316872062f5744557e270a38192554c3126ea5f97434Tim Northover 3169dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerSELECT(SDValue Op, 3170dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3171dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CC = Op->getOperand(0); 3172dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TVal = Op->getOperand(1); 3173dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FVal = Op->getOperand(2); 3174dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 317536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3176dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = CC.getOpcode(); 3177dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Optimize {s|u}{add|sub|mul}.with.overflow feeding into a select 3178dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // instruction. 3179dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC.getResNo() == 1 && 3180dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || 3181dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { 3182dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Only lower legal XALUO ops. 3183dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!DAG.getTargetLoweringInfo().isTypeLegal(CC->getValueType(0))) 3184dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 318536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3186dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode OFCC; 3187dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Value, Overflow; 3188dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::tie(Value, Overflow) = getAArch64XALUOOp(OFCC, CC.getValue(0), DAG); 3189dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal = DAG.getConstant(OFCC, MVT::i32); 3190dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3191dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CSEL, DL, Op.getValueType(), TVal, FVal, 3192dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCVal, Overflow); 3193dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3194dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3195dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC.getOpcode() == ISD::SETCC) 3196dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getSelectCC(DL, CC.getOperand(0), CC.getOperand(1), TVal, FVal, 3197dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cast<CondCodeSDNode>(CC.getOperand(2))->get()); 3198dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 3199dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getSelectCC(DL, CC, DAG.getConstant(0, CC.getValueType()), TVal, 3200dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FVal, ISD::SETNE); 3201dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 3202dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3203dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerSELECT_CC(SDValue Op, 3204dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3205dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get(); 320636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDValue LHS = Op.getOperand(0); 320736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDValue RHS = Op.getOperand(1); 3208dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TVal = Op.getOperand(2); 3209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FVal = Op.getOperand(3); 3210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 321136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3212dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Handle f128 first, because it will result in a comparison of some RTLIB 3213dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // call result against zero. 321436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (LHS.getValueType() == MVT::f128) { 321536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines softenSetCCOperands(DAG, MVT::f128, LHS, RHS, CC, dl); 321636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 321736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines // If softenSetCCOperands returned a scalar, we need to compare the result 321836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines // against zero to select between true and false values. 3219dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!RHS.getNode()) { 322036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines RHS = DAG.getConstant(0, LHS.getValueType()); 322136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines CC = ISD::SETNE; 322236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 322336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 322436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3225dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Handle integers first. 322636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (LHS.getValueType().isInteger()) { 3227dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert((LHS.getValueType() == RHS.getValueType()) && 3228dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (LHS.getValueType() == MVT::i32 || LHS.getValueType() == MVT::i64)); 3229dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opcode = AArch64ISD::CSEL; 3231dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3232dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If both the TVal and the FVal are constants, see if we can swap them in 3233dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // order to for a CSINV or CSINC out of them. 3234dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CFVal = dyn_cast<ConstantSDNode>(FVal); 3235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CTVal = dyn_cast<ConstantSDNode>(TVal); 3236dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3237dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CTVal && CFVal && CTVal->isAllOnesValue() && CFVal->isNullValue()) { 3238dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(TVal, FVal); 3239dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(CTVal, CFVal); 3240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = ISD::getSetCCInverse(CC, true); 3241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (CTVal && CFVal && CTVal->isOne() && CFVal->isNullValue()) { 3242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(TVal, FVal); 3243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(CTVal, CFVal); 3244dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = ISD::getSetCCInverse(CC, true); 3245dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (TVal.getOpcode() == ISD::XOR) { 3246dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If TVal is a NOT we want to swap TVal and FVal so that we can match 3247dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // with a CSINV rather than a CSEL. 3248dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CVal = dyn_cast<ConstantSDNode>(TVal.getOperand(1)); 3249dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3250dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CVal && CVal->isAllOnesValue()) { 3251dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(TVal, FVal); 3252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(CTVal, CFVal); 3253dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = ISD::getSetCCInverse(CC, true); 3254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3255dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (TVal.getOpcode() == ISD::SUB) { 3256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If TVal is a negation (SUB from 0) we want to swap TVal and FVal so 3257dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // that we can match with a CSNEG rather than a CSEL. 3258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CVal = dyn_cast<ConstantSDNode>(TVal.getOperand(0)); 3259dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3260dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CVal && CVal->isNullValue()) { 3261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(TVal, FVal); 3262dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(CTVal, CFVal); 3263dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = ISD::getSetCCInverse(CC, true); 3264dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (CTVal && CFVal) { 3266dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const int64_t TrueVal = CTVal->getSExtValue(); 3267dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const int64_t FalseVal = CFVal->getSExtValue(); 3268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool Swap = false; 3269dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If both TVal and FVal are constants, see if FVal is the 3271dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // inverse/negation/increment of TVal and generate a CSINV/CSNEG/CSINC 3272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // instead of a CSEL in that case. 3273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (TrueVal == ~FalseVal) { 3274dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::CSINV; 3275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (TrueVal == -FalseVal) { 3276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::CSNEG; 3277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (TVal.getValueType() == MVT::i32) { 3278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If our operands are only 32-bit wide, make sure we use 32-bit 3279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // arithmetic for the check whether we can use CSINC. This ensures that 3280dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the addition in the check will wrap around properly in case there is 3281dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // an overflow (which would not be the case if we do the check with 3282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 64-bit arithmetic). 3283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const uint32_t TrueVal32 = CTVal->getZExtValue(); 3284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const uint32_t FalseVal32 = CFVal->getZExtValue(); 3285dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3286dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((TrueVal32 == FalseVal32 + 1) || (TrueVal32 + 1 == FalseVal32)) { 3287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::CSINC; 3288dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3289dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (TrueVal32 > FalseVal32) { 3290dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Swap = true; 3291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3292dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 64-bit check whether we can use CSINC. 3294dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if ((TrueVal == FalseVal + 1) || (TrueVal + 1 == FalseVal)) { 3295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::CSINC; 3296dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3297dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (TrueVal > FalseVal) { 3298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Swap = true; 3299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Swap TVal and FVal if necessary. 3303dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Swap) { 3304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(TVal, FVal); 3305dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(CTVal, CFVal); 3306dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = ISD::getSetCCInverse(CC, true); 3307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3309dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Opcode != AArch64ISD::CSEL) { 3310dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Drop FVal since we can get its value by simply inverting/negating 3311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TVal. 3312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FVal = TVal; 3313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal; 3317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = getAArch64Cmp(LHS, RHS, CC, CCVal, DAG, dl); 3318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opcode, dl, VT, TVal, FVal, CCVal, Cmp); 3321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Now we know we're dealing with FP values. 3324dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHS.getValueType() == MVT::f32 || LHS.getValueType() == MVT::f64); 3325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHS.getValueType() == RHS.getValueType()); 3326dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3327dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Try to match this select into a max/min operation, which have dedicated 3329dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // opcode in the instruction set. 3330dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: This is not correct in the presence of NaNs, so we only enable this 3331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // in no-NaNs mode. 3332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (getTargetMachine().Options.NoNaNsFPMath) { 3333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue MinMaxLHS = TVal, MinMaxRHS = FVal; 3334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (selectCCOpsAreFMaxCompatible(LHS, MinMaxRHS) && 3335dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines selectCCOpsAreFMaxCompatible(RHS, MinMaxLHS)) { 3336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CC = ISD::getSetCCSwappedOperands(CC); 3337dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(MinMaxLHS, MinMaxRHS); 3338dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 333936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (selectCCOpsAreFMaxCompatible(LHS, MinMaxLHS) && 3341dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines selectCCOpsAreFMaxCompatible(RHS, MinMaxRHS)) { 3342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (CC) { 3343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 3344dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3345dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETGT: 3346dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETGE: 3347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGT: 3348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETUGE: 3349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOGT: 3350dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOGE: 3351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FMAX, dl, VT, MinMaxLHS, MinMaxRHS); 3352dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETLT: 3354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETLE: 3355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULT: 3356dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETULE: 3357dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOLT: 3358dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SETOLE: 3359dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FMIN, dl, VT, MinMaxLHS, MinMaxRHS); 3360dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3361dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3362dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 336436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If that fails, we'll need to perform an FCMP + CSEL sequence. Go ahead 3366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // and do the comparison. 3367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = emitComparison(LHS, RHS, CC, dl, DAG); 3368dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3369dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Unfortunately, the mapping of LLVM FP CC's onto AArch64 CC's isn't totally 3370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // clean. Some of them require two CSELs to implement. 3371dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode CC1, CC2; 3372dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines changeFPCCToAArch64CC(CC, CC1, CC2); 3373dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CC1Val = DAG.getConstant(CC1, MVT::i32); 3374dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CS1 = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp); 3375dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3376dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we need a second CSEL, emit it, using the output of the first as the 3377dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // RHS. We're effectively OR'ing the two CC's together. 3378dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC2 != AArch64CC::AL) { 3379dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CC2Val = DAG.getConstant(CC2, MVT::i32); 3380dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp); 338136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 338236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3383dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Otherwise, return the output of the first CSEL. 3384dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CS1; 3385dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 338636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3387dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerJumpTable(SDValue Op, 3388dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Jump table entries as PC relative offsets. No additional tweaking 3390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // is necessary here. Just get the address of the jump table. 3391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); 3392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT PtrVT = getPointerTy(); 3393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 339436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3395dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (getTargetMachine().getCodeModel() == CodeModel::Large && 3396dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines !Subtarget->isTargetMachO()) { 3397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const unsigned char MO_NC = AArch64II::MO_NC; 3398dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode( 3399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64ISD::WrapperLarge, DL, PtrVT, 3400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetJumpTable(JT->getIndex(), PtrVT, AArch64II::MO_G3), 3401dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetJumpTable(JT->getIndex(), PtrVT, AArch64II::MO_G2 | MO_NC), 3402dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetJumpTable(JT->getIndex(), PtrVT, AArch64II::MO_G1 | MO_NC), 3403dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetJumpTable(JT->getIndex(), PtrVT, 3404dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_G0 | MO_NC)); 340536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 340636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Hi = 3408dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetJumpTable(JT->getIndex(), PtrVT, AArch64II::MO_PAGE); 3409dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, 3410dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_PAGEOFF | AArch64II::MO_NC); 3411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); 3412dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); 341336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 341436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3415dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerConstantPool(SDValue Op, 3416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op); 3418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT PtrVT = getPointerTy(); 3419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 3420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (getTargetMachine().getCodeModel() == CodeModel::Large) { 3422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Use the GOT for the large code model on iOS. 3423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Subtarget->isTargetMachO()) { 3424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue GotAddr = DAG.getTargetConstantPool( 3425dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CP->getConstVal(), PtrVT, CP->getAlignment(), CP->getOffset(), 3426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_GOT); 3427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::LOADgot, DL, PtrVT, GotAddr); 3428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 342972062f5744557e270a38192554c3126ea5f97434Tim Northover 3430dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const unsigned char MO_NC = AArch64II::MO_NC; 3431dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode( 3432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64ISD::WrapperLarge, DL, PtrVT, 3433dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlignment(), 3434dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CP->getOffset(), AArch64II::MO_G3), 3435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlignment(), 3436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CP->getOffset(), AArch64II::MO_G2 | MO_NC), 3437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlignment(), 3438dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CP->getOffset(), AArch64II::MO_G1 | MO_NC), 3439dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlignment(), 3440dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CP->getOffset(), AArch64II::MO_G0 | MO_NC)); 3441dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 3442dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Use ADRP/ADD or ADRP/LDR for everything else: the small memory model on 3443dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // ELF, the only valid one on Darwin. 3444dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Hi = 3445dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlignment(), 3446dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CP->getOffset(), AArch64II::MO_PAGE); 3447dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lo = DAG.getTargetConstantPool( 3448dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CP->getConstVal(), PtrVT, CP->getAlignment(), CP->getOffset(), 3449dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_PAGEOFF | AArch64II::MO_NC); 3450dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3451dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); 3452dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); 3453dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 345472062f5744557e270a38192554c3126ea5f97434Tim Northover} 345572062f5744557e270a38192554c3126ea5f97434Tim Northover 3456dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerBlockAddress(SDValue Op, 3457dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3458dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress(); 3459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT PtrVT = getPointerTy(); 3460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 3461dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (getTargetMachine().getCodeModel() == CodeModel::Large && 3462dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines !Subtarget->isTargetMachO()) { 3463dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const unsigned char MO_NC = AArch64II::MO_NC; 3464dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode( 3465dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64ISD::WrapperLarge, DL, PtrVT, 3466dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_G3), 3467dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_G2 | MO_NC), 3468dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_G1 | MO_NC), 3469dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_G0 | MO_NC)); 3470dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 3471dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Hi = DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_PAGE); 3472dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lo = DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_PAGEOFF | 3473dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64II::MO_NC); 3474dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ADRP = DAG.getNode(AArch64ISD::ADRP, DL, PtrVT, Hi); 3475dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::ADDlow, DL, PtrVT, ADRP, Lo); 3476dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3477dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 3478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3479dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerDarwin_VASTART(SDValue Op, 3480dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3481dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64FunctionInfo *FuncInfo = 3482dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getMachineFunction().getInfo<AArch64FunctionInfo>(); 3483dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3484dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 3485dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FR = 3486dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getFrameIndex(FuncInfo->getVarArgsStackIndex(), getPointerTy()); 3487dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); 3488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getStore(Op.getOperand(0), DL, FR, Op.getOperand(1), 3489dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(SV), false, false, 0); 3490dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 3491dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3492dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerAAPCS_VASTART(SDValue Op, 3493dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 349472062f5744557e270a38192554c3126ea5f97434Tim Northover // The layout of the va_list struct is specified in the AArch64 Procedure Call 349572062f5744557e270a38192554c3126ea5f97434Tim Northover // Standard, section B.3. 349672062f5744557e270a38192554c3126ea5f97434Tim Northover MachineFunction &MF = DAG.getMachineFunction(); 3497dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>(); 3498ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL(Op); 349972062f5744557e270a38192554c3126ea5f97434Tim Northover 350072062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue Chain = Op.getOperand(0); 350172062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue VAList = Op.getOperand(1); 350272062f5744557e270a38192554c3126ea5f97434Tim Northover const Value *SV = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); 350372062f5744557e270a38192554c3126ea5f97434Tim Northover SmallVector<SDValue, 4> MemOps; 350472062f5744557e270a38192554c3126ea5f97434Tim Northover 350572062f5744557e270a38192554c3126ea5f97434Tim Northover // void *__stack at offset 0 3506dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Stack = 3507dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getFrameIndex(FuncInfo->getVarArgsStackIndex(), getPointerTy()); 350872062f5744557e270a38192554c3126ea5f97434Tim Northover MemOps.push_back(DAG.getStore(Chain, DL, Stack, VAList, 3509dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(SV), false, false, 8)); 351072062f5744557e270a38192554c3126ea5f97434Tim Northover 351172062f5744557e270a38192554c3126ea5f97434Tim Northover // void *__gr_top at offset 8 3512dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int GPRSize = FuncInfo->getVarArgsGPRSize(); 351372062f5744557e270a38192554c3126ea5f97434Tim Northover if (GPRSize > 0) { 351472062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue GRTop, GRTopAddr; 351572062f5744557e270a38192554c3126ea5f97434Tim Northover 351672062f5744557e270a38192554c3126ea5f97434Tim Northover GRTopAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList, 351772062f5744557e270a38192554c3126ea5f97434Tim Northover DAG.getConstant(8, getPointerTy())); 351872062f5744557e270a38192554c3126ea5f97434Tim Northover 3519dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GRTop = DAG.getFrameIndex(FuncInfo->getVarArgsGPRIndex(), getPointerTy()); 352072062f5744557e270a38192554c3126ea5f97434Tim Northover GRTop = DAG.getNode(ISD::ADD, DL, getPointerTy(), GRTop, 352172062f5744557e270a38192554c3126ea5f97434Tim Northover DAG.getConstant(GPRSize, getPointerTy())); 352272062f5744557e270a38192554c3126ea5f97434Tim Northover 352372062f5744557e270a38192554c3126ea5f97434Tim Northover MemOps.push_back(DAG.getStore(Chain, DL, GRTop, GRTopAddr, 3524dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(SV, 8), false, false, 8)); 352572062f5744557e270a38192554c3126ea5f97434Tim Northover } 352672062f5744557e270a38192554c3126ea5f97434Tim Northover 352772062f5744557e270a38192554c3126ea5f97434Tim Northover // void *__vr_top at offset 16 3528dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int FPRSize = FuncInfo->getVarArgsFPRSize(); 352972062f5744557e270a38192554c3126ea5f97434Tim Northover if (FPRSize > 0) { 353072062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue VRTop, VRTopAddr; 353172062f5744557e270a38192554c3126ea5f97434Tim Northover VRTopAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList, 353272062f5744557e270a38192554c3126ea5f97434Tim Northover DAG.getConstant(16, getPointerTy())); 353372062f5744557e270a38192554c3126ea5f97434Tim Northover 3534dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VRTop = DAG.getFrameIndex(FuncInfo->getVarArgsFPRIndex(), getPointerTy()); 353572062f5744557e270a38192554c3126ea5f97434Tim Northover VRTop = DAG.getNode(ISD::ADD, DL, getPointerTy(), VRTop, 353672062f5744557e270a38192554c3126ea5f97434Tim Northover DAG.getConstant(FPRSize, getPointerTy())); 353772062f5744557e270a38192554c3126ea5f97434Tim Northover 353872062f5744557e270a38192554c3126ea5f97434Tim Northover MemOps.push_back(DAG.getStore(Chain, DL, VRTop, VRTopAddr, 3539dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(SV, 16), false, false, 8)); 354072062f5744557e270a38192554c3126ea5f97434Tim Northover } 354172062f5744557e270a38192554c3126ea5f97434Tim Northover 354272062f5744557e270a38192554c3126ea5f97434Tim Northover // int __gr_offs at offset 24 354372062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue GROffsAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList, 354472062f5744557e270a38192554c3126ea5f97434Tim Northover DAG.getConstant(24, getPointerTy())); 354572062f5744557e270a38192554c3126ea5f97434Tim Northover MemOps.push_back(DAG.getStore(Chain, DL, DAG.getConstant(-GPRSize, MVT::i32), 3546dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GROffsAddr, MachinePointerInfo(SV, 24), false, 3547dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines false, 4)); 354872062f5744557e270a38192554c3126ea5f97434Tim Northover 354972062f5744557e270a38192554c3126ea5f97434Tim Northover // int __vr_offs at offset 28 355072062f5744557e270a38192554c3126ea5f97434Tim Northover SDValue VROffsAddr = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList, 355172062f5744557e270a38192554c3126ea5f97434Tim Northover DAG.getConstant(28, getPointerTy())); 355272062f5744557e270a38192554c3126ea5f97434Tim Northover MemOps.push_back(DAG.getStore(Chain, DL, DAG.getConstant(-FPRSize, MVT::i32), 3553dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VROffsAddr, MachinePointerInfo(SV, 28), false, 3554dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines false, 4)); 355572062f5744557e270a38192554c3126ea5f97434Tim Northover 3556dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps); 355772062f5744557e270a38192554c3126ea5f97434Tim Northover} 355872062f5744557e270a38192554c3126ea5f97434Tim Northover 3559dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerVASTART(SDValue Op, 3560dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3561dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Subtarget->isTargetDarwin() ? LowerDarwin_VASTART(Op, DAG) 3562dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : LowerAAPCS_VASTART(Op, DAG); 356372062f5744557e270a38192554c3126ea5f97434Tim Northover} 356472062f5744557e270a38192554c3126ea5f97434Tim Northover 3565dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerVACOPY(SDValue Op, 3566dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3567dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AAPCS has three pointers and two ints (= 32 bytes), Darwin has single 3568dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // pointer. 3569dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned VaListSize = Subtarget->isTargetDarwin() ? 8 : 32; 3570dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const Value *DestSV = cast<SrcValueSDNode>(Op.getOperand(3))->getValue(); 3571dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const Value *SrcSV = cast<SrcValueSDNode>(Op.getOperand(4))->getValue(); 357287773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3573dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getMemcpy(Op.getOperand(0), SDLoc(Op), Op.getOperand(1), 3574dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(2), DAG.getConstant(VaListSize, MVT::i32), 3575dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 8, false, false, MachinePointerInfo(DestSV), 3576dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(SrcSV)); 3577dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 357887773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3579dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const { 3580dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Subtarget->isTargetDarwin() && 3581dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "automatic va_arg instruction only works on Darwin"); 358287773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3583dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const Value *V = cast<SrcValueSDNode>(Op.getOperand(2))->getValue(); 3584dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3585dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 3586dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Chain = Op.getOperand(0); 3587dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Addr = Op.getOperand(1); 3588dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Align = Op.getConstantOperandVal(3); 3589dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3590dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue VAList = DAG.getLoad(getPointerTy(), DL, Chain, Addr, 3591dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(V), false, false, false, 0); 3592dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = VAList.getValue(1); 3593dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3594dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Align > 8) { 3595dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(((Align & (Align - 1)) == 0) && "Expected Align to be a power of 2"); 3596dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VAList = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList, 3597dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Align - 1, getPointerTy())); 3598dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VAList = DAG.getNode(ISD::AND, DL, getPointerTy(), VAList, 3599dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(-(int64_t)Align, getPointerTy())); 360087773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 360187773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3602dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *ArgTy = VT.getTypeForEVT(*DAG.getContext()); 3603dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t ArgSize = getDataLayout()->getTypeAllocSize(ArgTy); 3604dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3605dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Scalar integer and FP values smaller than 64 bits are implicitly extended 3606dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // up to 64 bits. At the very least, we have to increase the striding of the 3607dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // vaargs list to match this, and for FP values we need to introduce 3608dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FP_ROUND nodes as well. 3609dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.isInteger() && !VT.isVector()) 3610dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ArgSize = 8; 3611dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool NeedFPTrunc = false; 3612dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.isFloatingPoint() && !VT.isVector() && VT != MVT::f64) { 3613dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ArgSize = 8; 3614dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NeedFPTrunc = true; 361587773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 3616dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3617dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Increment the pointer, VAList, to the next vaarg 3618dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue VANext = DAG.getNode(ISD::ADD, DL, getPointerTy(), VAList, 3619dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(ArgSize, getPointerTy())); 3620dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Store the incremented VAList to the legalized pointer 3621dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue APStore = DAG.getStore(Chain, DL, VANext, Addr, MachinePointerInfo(V), 3622dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines false, false, 0); 3623dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3624dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Load the actual argument out of the pointer VAList 3625dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NeedFPTrunc) { 3626dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Load the value as an f64. 3627dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue WideFP = DAG.getLoad(MVT::f64, DL, APStore, VAList, 3628dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(), false, false, false, 0); 3629dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Round the value down to an f32. 3630dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue NarrowFP = DAG.getNode(ISD::FP_ROUND, DL, VT, WideFP.getValue(0), 3631dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getIntPtrConstant(1)); 3632dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Ops[] = { NarrowFP, WideFP.getValue(1) }; 3633dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Merge the rounded value with the chain output of the load. 3634dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getMergeValues(Ops, DL); 363587773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 363687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3637dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getLoad(VT, DL, APStore, VAList, MachinePointerInfo(), false, 3638dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines false, false, 0); 363987773c318fcee853fb34a80a10c4347d523bdafbTim Northover} 364087773c318fcee853fb34a80a10c4347d523bdafbTim Northover 3641dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerFRAMEADDR(SDValue Op, 3642dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3643dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); 3644dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MFI->setFrameAddressIsTaken(true); 364572062f5744557e270a38192554c3126ea5f97434Tim Northover 3646dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3647dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 3648dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); 3649dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FrameAddr = 3650dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getCopyFromReg(DAG.getEntryNode(), DL, AArch64::FP, VT); 3651dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines while (Depth--) 3652dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FrameAddr = DAG.getLoad(VT, DL, DAG.getEntryNode(), FrameAddr, 3653dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(), false, false, false, 0); 3654dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return FrameAddr; 3655dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 365672062f5744557e270a38192554c3126ea5f97434Tim Northover 3657dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// FIXME? Maybe this could be a TableGen attribute on some registers and 3658dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// this table could be generated automatically from RegInfo. 3659dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesunsigned AArch64TargetLowering::getRegisterByName(const char* RegName, 3660dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT) const { 3661dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Reg = StringSwitch<unsigned>(RegName) 3662dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .Case("sp", AArch64::SP) 3663dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines .Default(0); 3664dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Reg) 3665dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Reg; 3666dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines report_fatal_error("Invalid register name global variable"); 3667dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 366872062f5744557e270a38192554c3126ea5f97434Tim Northover 3669dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerRETURNADDR(SDValue Op, 3670dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3671dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFunction &MF = DAG.getMachineFunction(); 3672dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFrameInfo *MFI = MF.getFrameInfo(); 3673dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MFI->setReturnAddressIsTaken(true); 367472062f5744557e270a38192554c3126ea5f97434Tim Northover 3675dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3676dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 3677dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); 3678dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Depth) { 3679dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FrameAddr = LowerFRAMEADDR(Op, DAG); 3680dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Offset = DAG.getConstant(8, getPointerTy()); 3681dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getLoad(VT, DL, DAG.getEntryNode(), 3682dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::ADD, DL, VT, FrameAddr, Offset), 3683dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachinePointerInfo(), false, false, false, 0); 368472062f5744557e270a38192554c3126ea5f97434Tim Northover } 368572062f5744557e270a38192554c3126ea5f97434Tim Northover 3686dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Return LR, which contains the return address. Mark it an implicit live-in. 3687dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Reg = MF.addLiveIn(AArch64::LR, &AArch64::GPR64RegClass); 3688dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getCopyFromReg(DAG.getEntryNode(), DL, Reg, VT); 368972062f5744557e270a38192554c3126ea5f97434Tim Northover} 369072062f5744557e270a38192554c3126ea5f97434Tim Northover 3691dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// LowerShiftRightParts - Lower SRA_PARTS, which returns two 3692dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// i64 values and take a 2 x i64 value to shift plus a shift amount. 3693dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerShiftRightParts(SDValue Op, 3694dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3695dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op.getNumOperands() == 3 && "Not a double-shift!"); 3696dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3697dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned VTBits = VT.getSizeInBits(); 3698dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 3699dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ShOpLo = Op.getOperand(0); 3700dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ShOpHi = Op.getOperand(1); 3701dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ShAmt = Op.getOperand(2); 3702dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ARMcc; 3703dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = (Op.getOpcode() == ISD::SRA_PARTS) ? ISD::SRA : ISD::SRL; 370472062f5744557e270a38192554c3126ea5f97434Tim Northover 3705dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op.getOpcode() == ISD::SRA_PARTS || Op.getOpcode() == ISD::SRL_PARTS); 370672062f5744557e270a38192554c3126ea5f97434Tim Northover 3707dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, 3708dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(VTBits, MVT::i64), ShAmt); 3709dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); 3710dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt, 3711dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(VTBits, MVT::i64)); 3712dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); 371372062f5744557e270a38192554c3126ea5f97434Tim Northover 3714dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = emitComparison(ExtraShAmt, DAG.getConstant(0, MVT::i64), 3715dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::SETGE, dl, DAG); 3716dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal = DAG.getConstant(AArch64CC::GE, MVT::i32); 3717dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3718dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FalseValLo = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); 3719dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TrueValLo = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); 3720dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lo = 3721dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::CSEL, dl, VT, TrueValLo, FalseValLo, CCVal, Cmp); 3722dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3723dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 shifts larger than the register width are wrapped rather than 3724dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // clamped, so we can't just emit "hi >> x". 3725dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FalseValHi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 3726dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TrueValHi = Opc == ISD::SRA 3727dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ? DAG.getNode(Opc, dl, VT, ShOpHi, 3728dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(VTBits - 1, MVT::i64)) 3729dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : DAG.getConstant(0, VT); 3730dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Hi = 3731dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::CSEL, dl, VT, TrueValHi, FalseValHi, CCVal, Cmp); 373272062f5744557e270a38192554c3126ea5f97434Tim Northover 3733dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Ops[2] = { Lo, Hi }; 3734dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getMergeValues(Ops, dl); 3735dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 373672062f5744557e270a38192554c3126ea5f97434Tim Northover 3737dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// LowerShiftLeftParts - Lower SHL_PARTS, which returns two 3738dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// i64 values and take a 2 x i64 value to shift plus a shift amount. 3739dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerShiftLeftParts(SDValue Op, 3740dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3741dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op.getNumOperands() == 3 && "Not a double-shift!"); 3742dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 3743dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned VTBits = VT.getSizeInBits(); 3744dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 3745dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ShOpLo = Op.getOperand(0); 3746dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ShOpHi = Op.getOperand(1); 3747dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ShAmt = Op.getOperand(2); 3748dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ARMcc; 374972062f5744557e270a38192554c3126ea5f97434Tim Northover 3750dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op.getOpcode() == ISD::SHL_PARTS); 3751dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, 3752dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(VTBits, MVT::i64), ShAmt); 3753dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); 3754dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i64, ShAmt, 3755dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(VTBits, MVT::i64)); 3756dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); 3757dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Tmp3 = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); 375872062f5744557e270a38192554c3126ea5f97434Tim Northover 3759dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); 376072062f5744557e270a38192554c3126ea5f97434Tim Northover 3761dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = emitComparison(ExtraShAmt, DAG.getConstant(0, MVT::i64), 3762dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::SETGE, dl, DAG); 3763dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal = DAG.getConstant(AArch64CC::GE, MVT::i32); 3764dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Hi = 3765dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::CSEL, dl, VT, Tmp3, FalseVal, CCVal, Cmp); 376672062f5744557e270a38192554c3126ea5f97434Tim Northover 3767dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 shifts of larger than register sizes are wrapped rather than 3768dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // clamped, so we can't just emit "lo << a" if a is too big. 3769dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TrueValLo = DAG.getConstant(0, VT); 3770dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue FalseValLo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); 3771dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lo = 3772dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::CSEL, dl, VT, TrueValLo, FalseValLo, CCVal, Cmp); 377372062f5744557e270a38192554c3126ea5f97434Tim Northover 3774dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Ops[2] = { Lo, Hi }; 3775dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getMergeValues(Ops, dl); 377672062f5744557e270a38192554c3126ea5f97434Tim Northover} 377772062f5744557e270a38192554c3126ea5f97434Tim Northover 3778dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isOffsetFoldingLegal( 3779dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const GlobalAddressSDNode *GA) const { 3780dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The AArch64 target doesn't support folding offsets into global addresses. 3781dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 3782dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 378372062f5744557e270a38192554c3126ea5f97434Tim Northover 3784dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { 3785dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We can materialize #0.0 as fmov $Rd, XZR for 64-bit and 32-bit cases. 3786dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: We should be able to handle f128 as well with a clever lowering. 3787dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Imm.isPosZero() && (VT == MVT::f64 || VT == MVT::f32)) 3788dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 378972062f5744557e270a38192554c3126ea5f97434Tim Northover 3790dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::f64) 3791dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64_AM::getFP64Imm(Imm) != -1; 3792dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (VT == MVT::f32) 3793dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64_AM::getFP32Imm(Imm) != -1; 3794dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 3795dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 379672062f5744557e270a38192554c3126ea5f97434Tim Northover 3797dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 3798dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// AArch64 Optimization Hooks 3799dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 380072062f5744557e270a38192554c3126ea5f97434Tim Northover 3801dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 3802dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// AArch64 Inline Assembly Support 3803dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 380472062f5744557e270a38192554c3126ea5f97434Tim Northover 3805dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Table of Constraints 3806dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// TODO: This is the current set of constraints supported by ARM for the 3807dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// compiler, not all of them may make sense, e.g. S may be difficult to support. 3808dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 3809dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// r - A general register 3810dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// w - An FP/SIMD register of some size in the range v0-v31 3811dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// x - An FP/SIMD register of some size in the range v0-v15 3812dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// I - Constant that can be used with an ADD instruction 3813dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// J - Constant that can be used with a SUB instruction 3814dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// K - Constant that can be used with a 32-bit logical instruction 3815dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// L - Constant that can be used with a 64-bit logical instruction 3816dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// M - Constant that can be used as a 32-bit MOV immediate 3817dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// N - Constant that can be used as a 64-bit MOV immediate 3818dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Q - A memory reference with base register and no offset 3819dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// S - A symbolic address 3820dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Y - Floating point constant zero 3821dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Z - Integer constant zero 3822dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 3823dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Note that general register operands will be output using their 64-bit x 3824dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// register name, whatever the size of the variable, unless the asm operand 3825dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// is prefixed by the %w modifier. Floating-point and SIMD register operands 3826dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// will be output with the v prefix unless prefixed by the %b, %h, %s, %d or 3827dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// %q modifier. 3828dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3829dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// getConstraintType - Given a constraint letter, return the type of 3830dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// constraint it is for this target. 3831dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::ConstraintType 3832dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::getConstraintType(const std::string &Constraint) const { 3833dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Constraint.size() == 1) { 3834dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Constraint[0]) { 3835dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 3836dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3837dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'z': 3838dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return C_Other; 3839dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'x': 3840dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'w': 3841dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return C_RegisterClass; 3842dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // An address with a single base register. Due to the way we 3843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // currently handle addresses it is the same as 'r'. 3844dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'Q': 3845dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return C_Memory; 3846dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 384772062f5744557e270a38192554c3126ea5f97434Tim Northover } 3848dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return TargetLowering::getConstraintType(Constraint); 3849dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 385072062f5744557e270a38192554c3126ea5f97434Tim Northover 3851dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Examine constraint type and operand type and determine a weight value. 3852dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// This object must already have been set up with the operand type 3853dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// and the current alternative constraint selected. 3854dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesTargetLowering::ConstraintWeight 3855dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::getSingleConstraintMatchWeight( 3856dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AsmOperandInfo &info, const char *constraint) const { 3857dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstraintWeight weight = CW_Invalid; 3858dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *CallOperandVal = info.CallOperandVal; 3859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we don't have a value, we can't do a match, 3860dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // but allow it at the lowest weight. 3861dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!CallOperandVal) 3862dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return CW_Default; 3863dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *type = CallOperandVal->getType(); 3864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Look at the constraint type. 3865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (*constraint) { 3866dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 3867dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint); 3868dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3869dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'x': 3870dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'w': 3871dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (type->isFloatingPointTy() || type->isVectorTy()) 3872dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines weight = CW_Register; 3873dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'z': 3875dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines weight = CW_Constant; 3876dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3877dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3878dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return weight; 387972062f5744557e270a38192554c3126ea5f97434Tim Northover} 388072062f5744557e270a38192554c3126ea5f97434Tim Northover 3881dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstd::pair<unsigned, const TargetRegisterClass *> 3882dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::getRegForInlineAsmConstraint( 3883dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const std::string &Constraint, MVT VT) const { 3884dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Constraint.size() == 1) { 3885dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Constraint[0]) { 3886dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'r': 3887dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() == 64) 3888dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return std::make_pair(0U, &AArch64::GPR64commonRegClass); 3889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return std::make_pair(0U, &AArch64::GPR32commonRegClass); 3890dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'w': 3891dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::f32) 3892dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return std::make_pair(0U, &AArch64::FPR32RegClass); 3893dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() == 64) 3894dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return std::make_pair(0U, &AArch64::FPR64RegClass); 3895dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() == 128) 3896dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return std::make_pair(0U, &AArch64::FPR128RegClass); 3897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3898dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The instructions that this constraint is designed for can 3899dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // only take 128-bit registers so just use that regclass. 3900dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'x': 3901dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() == 128) 3902dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return std::make_pair(0U, &AArch64::FPR128_loRegClass); 3903dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3905dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3906dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (StringRef("{cc}").equals_lower(Constraint)) 3907dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return std::make_pair(unsigned(AArch64::NZCV), &AArch64::CCRRegClass); 390872062f5744557e270a38192554c3126ea5f97434Tim Northover 3909dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Use the default implementation in TargetLowering to convert the register 3910dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // constraint into a member of a register class. 3911dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::pair<unsigned, const TargetRegisterClass *> Res; 3912dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Res = TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); 3913dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 3914dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Not found as a standard register? 3915dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Res.second) { 3916dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Size = Constraint.size(); 3917dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((Size == 4 || Size == 5) && Constraint[0] == '{' && 3918dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines tolower(Constraint[1]) == 'v' && Constraint[Size - 1] == '}') { 3919dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const std::string Reg = 3920dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::string(&Constraint[2], &Constraint[Size - 1]); 3921dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int RegNo = atoi(Reg.c_str()); 3922dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (RegNo >= 0 && RegNo <= 31) { 3923dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // v0 - v31 are aliases of q0 - q31. 3924dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // By default we'll emit v0-v31 for this unless there's a modifier where 3925dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we'll emit the correct register as well. 3926dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Res.first = AArch64::FPR128RegClass.getRegister(RegNo); 3927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Res.second = &AArch64::FPR128RegClass; 3928dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3930dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 393172062f5744557e270a38192554c3126ea5f97434Tim Northover 3932dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Res; 393372062f5744557e270a38192554c3126ea5f97434Tim Northover} 393472062f5744557e270a38192554c3126ea5f97434Tim Northover 3935dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops 3936dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// vector. If it is invalid, don't add anything to Ops. 3937dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesvoid AArch64TargetLowering::LowerAsmOperandForConstraint( 3938dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops, 3939dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 3940dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Result; 394172062f5744557e270a38192554c3126ea5f97434Tim Northover 3942dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Currently only support length 1 constraints. 3943dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Constraint.length() != 1) 3944dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 394572062f5744557e270a38192554c3126ea5f97434Tim Northover 3946dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines char ConstraintLetter = Constraint[0]; 3947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (ConstraintLetter) { 3948dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 3949dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 395072062f5744557e270a38192554c3126ea5f97434Tim Northover 3951dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This set of constraints deal with valid constants for various instructions. 3952dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Validate and return a target constant for them if we can. 3953dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'z': { 3954dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 'z' maps to xzr or wzr so it needs an input of 0. 3955dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op); 3956dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!C || C->getZExtValue() != 0) 3957dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 395872062f5744557e270a38192554c3126ea5f97434Tim Northover 3959dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getValueType() == MVT::i64) 3960dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Result = DAG.getRegister(AArch64::XZR, MVT::i64); 3961dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 3962dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Result = DAG.getRegister(AArch64::WZR, MVT::i32); 3963dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3964dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 396572062f5744557e270a38192554c3126ea5f97434Tim Northover 3966dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'I': 3967dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'J': 3968dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'K': 3969dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'L': 3970dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'M': 3971dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'N': 3972dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op); 3973dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!C) 3974dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 397572062f5744557e270a38192554c3126ea5f97434Tim Northover 3976dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Grab the value and do some validation. 3977dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t CVal = C->getZExtValue(); 3978dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (ConstraintLetter) { 3979dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The I constraint applies only to simple ADD or SUB immediate operands: 3980dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // i.e. 0 to 4095 with optional shift by 12 3981dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The J constraint applies only to ADD or SUB immediates that would be 3982dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // valid when negated, i.e. if [an add pattern] were to be output as a SUB 3983dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // instruction [or vice versa], in other words -1 to -4095 with optional 3984dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // left shift by 12. 3985dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'I': 3986dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isUInt<12>(CVal) || isShiftedUInt<12, 12>(CVal)) 3987dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3988dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 3989dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'J': { 3990dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t NVal = -C->getSExtValue(); 3991dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isUInt<12>(NVal) || isShiftedUInt<12, 12>(NVal)) 3992dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 3993dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 3994dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 3995dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The K and L constraints apply *only* to logical immediates, including 3996dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // what used to be the MOVI alias for ORR (though the MOVI alias has now 3997dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // been removed and MOV should be used). So these constraints have to 3998dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // distinguish between bit patterns that are valid 32-bit or 64-bit 3999dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // "bitmask immediates": for example 0xaaaaaaaa is a valid bimm32 (K), but 4000dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // not a valid bimm64 (L) where 0xaaaaaaaaaaaaaaaa would be valid, and vice 4001dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // versa. 4002dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'K': 4003dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isLogicalImmediate(CVal, 32)) 4004dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4005dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 4006dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'L': 4007dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isLogicalImmediate(CVal, 64)) 4008dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4009dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 4010dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The M and N constraints are a superset of K and L respectively, for use 4011dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // with the MOV (immediate) alias. As well as the logical immediates they 4012dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // also match 32 or 64-bit immediates that can be loaded either using a 4013dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // *single* MOVZ or MOVN , such as 32-bit 0x12340000, 0x00001234, 0xffffedca 4014dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (M) or 64-bit 0x1234000000000000 (N) etc. 4015dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // As a note some of this code is liberally stolen from the asm parser. 4016dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'M': { 4017dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isUInt<32>(CVal)) 4018dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 4019dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isLogicalImmediate(CVal, 32)) 4020dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4021dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((CVal & 0xFFFF) == CVal) 4022dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4023dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((CVal & 0xFFFF0000ULL) == CVal) 4024dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4025dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t NCVal = ~(uint32_t)CVal; 4026dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((NCVal & 0xFFFFULL) == NCVal) 4027dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4028dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((NCVal & 0xFFFF0000ULL) == NCVal) 4029dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4030dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 4031dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4032dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 'N': { 4033dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isLogicalImmediate(CVal, 64)) 4034dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4035dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((CVal & 0xFFFFULL) == CVal) 4036dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4037dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((CVal & 0xFFFF0000ULL) == CVal) 4038dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4039dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((CVal & 0xFFFF00000000ULL) == CVal) 4040dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4041dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((CVal & 0xFFFF000000000000ULL) == CVal) 4042dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4043dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t NCVal = ~CVal; 4044dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((NCVal & 0xFFFFULL) == NCVal) 4045dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4046dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((NCVal & 0xFFFF0000ULL) == NCVal) 4047dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4048dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((NCVal & 0xFFFF00000000ULL) == NCVal) 4049dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4050dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((NCVal & 0xFFFF000000000000ULL) == NCVal) 4051dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 4052dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 4053dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4054dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 4055dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 4056dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 405772062f5744557e270a38192554c3126ea5f97434Tim Northover 4058dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // All assembler immediates are 64-bit integers. 4059dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Result = DAG.getTargetConstant(CVal, MVT::i64); 4060dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 406172062f5744557e270a38192554c3126ea5f97434Tim Northover } 406272062f5744557e270a38192554c3126ea5f97434Tim Northover 4063dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Result.getNode()) { 4064dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Result); 4065dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return; 4066dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 406772062f5744557e270a38192554c3126ea5f97434Tim Northover 4068dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG); 4069dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 407072062f5744557e270a38192554c3126ea5f97434Tim Northover 4071dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 4072dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// AArch64 Advanced SIMD Support 4073dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines//===----------------------------------------------------------------------===// 407472062f5744557e270a38192554c3126ea5f97434Tim Northover 4075dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// WidenVector - Given a value in the V64 register class, produce the 4076dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// equivalent value in the V128 register class. 4077dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) { 4078dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = V64Reg.getValueType(); 4079dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NarrowSize = VT.getVectorNumElements(); 4080dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT EltTy = VT.getVectorElementType().getSimpleVT(); 4081dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT WideTy = MVT::getVectorVT(EltTy, 2 * NarrowSize); 4082dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(V64Reg); 4083dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4084dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideTy, DAG.getUNDEF(WideTy), 4085dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V64Reg, DAG.getConstant(0, MVT::i32)); 4086dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 408772062f5744557e270a38192554c3126ea5f97434Tim Northover 4088dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// getExtFactor - Determine the adjustment factor for the position when 4089dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// generating an "extract from vector registers" instruction. 4090dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic unsigned getExtFactor(SDValue &V) { 4091dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT EltType = V.getValueType().getVectorElementType(); 4092dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return EltType.getSizeInBits() / 8; 4093dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 409472062f5744557e270a38192554c3126ea5f97434Tim Northover 4095dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// NarrowVector - Given a value in the V128 register class, produce the 4096dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// equivalent value in the V64 register class. 4097dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue NarrowVector(SDValue V128Reg, SelectionDAG &DAG) { 4098dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = V128Reg.getValueType(); 4099dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned WideSize = VT.getVectorNumElements(); 4100dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT EltTy = VT.getVectorElementType().getSimpleVT(); 4101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT NarrowTy = MVT::getVectorVT(EltTy, WideSize / 2); 4102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(V128Reg); 410372062f5744557e270a38192554c3126ea5f97434Tim Northover 4104dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getTargetExtractSubreg(AArch64::dsub, DL, NarrowTy, V128Reg); 4105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 410687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 4107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Gather data to see if the operation can be modelled as a 4108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// shuffle in combination with VEXTs. 4109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::ReconstructShuffle(SDValue Op, 4110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 4111cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines assert(Op.getOpcode() == ISD::BUILD_VECTOR && "Unknown opcode!"); 4112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 4113dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 4114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 411587773c318fcee853fb34a80a10c4347d523bdafbTim Northover 4116dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 2> SourceVecs; 4117dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<unsigned, 2> MinElts; 4118dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<unsigned, 2> MaxElts; 411987773c318fcee853fb34a80a10c4347d523bdafbTim Northover 4120dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumElts; ++i) { 4121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V = Op.getOperand(i); 4122dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (V.getOpcode() == ISD::UNDEF) 4123dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 4124dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (V.getOpcode() != ISD::EXTRACT_VECTOR_ELT) { 4125dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // A shuffle can only come from building a vector from various 4126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // elements of other vectors. 4127dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 4128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 412987773c318fcee853fb34a80a10c4347d523bdafbTim Northover 4130dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Record this extraction against the appropriate vector if possible... 4131dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SourceVec = V.getOperand(0); 4132dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned EltNo = cast<ConstantSDNode>(V.getOperand(1))->getZExtValue(); 4133dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool FoundSource = false; 4134dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned j = 0; j < SourceVecs.size(); ++j) { 4135dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SourceVecs[j] == SourceVec) { 4136dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (MinElts[j] > EltNo) 4137dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MinElts[j] = EltNo; 4138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (MaxElts[j] < EltNo) 4139dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MaxElts[j] = EltNo; 4140dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FoundSource = true; 4141dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 414287773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 414387773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 4144dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4145dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Or record a new source if not... 4146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!FoundSource) { 4147dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SourceVecs.push_back(SourceVec); 4148dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MinElts.push_back(EltNo); 4149dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MaxElts.push_back(EltNo); 4150dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 415187773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 415287773c318fcee853fb34a80a10c4347d523bdafbTim Northover 4153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Currently only do something sane when at most two source vectors 4154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // involved. 4155dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SourceVecs.size() > 2) 4156dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 415772062f5744557e270a38192554c3126ea5f97434Tim Northover 4158dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ShuffleSrcs[2] = { DAG.getUNDEF(VT), DAG.getUNDEF(VT) }; 4159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int VEXTOffsets[2] = { 0, 0 }; 4160cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines int OffsetMultipliers[2] = { 1, 1 }; 416172062f5744557e270a38192554c3126ea5f97434Tim Northover 4162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This loop extracts the usage patterns of the source vectors 4163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // and prepares appropriate SDValues for a shuffle if possible. 4164dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < SourceVecs.size(); ++i) { 4165cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines unsigned NumSrcElts = SourceVecs[i].getValueType().getVectorNumElements(); 4166cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue CurSource = SourceVecs[i]; 4167cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (SourceVecs[i].getValueType().getVectorElementType() != 4168cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines VT.getVectorElementType()) { 4169cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // It may hit this case if SourceVecs[i] is AssertSext/AssertZext. 4170cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // Then bitcast it to the vector which holds asserted element type, 4171cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // and record the multiplier of element width between SourceVecs and 4172cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // Build_vector which is needed to extract the correct lanes later. 4173cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines EVT CastVT = 4174cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(), 4175cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SourceVecs[i].getValueSizeInBits() / 4176cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines VT.getVectorElementType().getSizeInBits()); 4177cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 4178cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines CurSource = DAG.getNode(ISD::BITCAST, dl, CastVT, SourceVecs[i]); 4179cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines OffsetMultipliers[i] = CastVT.getVectorNumElements() / NumSrcElts; 4180cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines NumSrcElts *= OffsetMultipliers[i]; 4181cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MaxElts[i] *= OffsetMultipliers[i]; 4182cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MinElts[i] *= OffsetMultipliers[i]; 4183cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 4184cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 4185cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (CurSource.getValueType() == VT) { 4186dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // No VEXT necessary 4187cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines ShuffleSrcs[i] = CurSource; 4188dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VEXTOffsets[i] = 0; 4189dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 4190cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } else if (NumSrcElts < NumElts) { 4191dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We can pad out the smaller vector for free, so if it's part of a 4192dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // shuffle... 4193cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines ShuffleSrcs[i] = DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, CurSource, 4194cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getUNDEF(CurSource.getValueType())); 4195dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 4196dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 419772062f5744557e270a38192554c3126ea5f97434Tim Northover 4198dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Since only 64-bit and 128-bit vectors are legal on ARM and 4199dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we've eliminated the other cases... 4200cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines assert(NumSrcElts == 2 * NumElts && 4201dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "unexpected vector sizes in ReconstructShuffle"); 420272062f5744557e270a38192554c3126ea5f97434Tim Northover 4203dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (MaxElts[i] - MinElts[i] >= NumElts) { 4204dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Span too large for a VEXT to cope 4205dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 4206dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 420772062f5744557e270a38192554c3126ea5f97434Tim Northover 4208dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (MinElts[i] >= NumElts) { 4209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The extraction can just take the second half 4210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VEXTOffsets[i] = NumElts; 4211cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, CurSource, 4212cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getIntPtrConstant(NumElts)); 4213dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (MaxElts[i] < NumElts) { 4214dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The extraction can just take the first half 4215dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VEXTOffsets[i] = 0; 4216cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, CurSource, 4217cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getIntPtrConstant(0)); 4218dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 4219dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // An actual VEXT is needed 4220dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VEXTOffsets[i] = MinElts[i]; 4221cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue VEXTSrc1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, CurSource, 4222cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getIntPtrConstant(0)); 4223cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue VEXTSrc2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, CurSource, 4224cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getIntPtrConstant(NumElts)); 4225dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Imm = VEXTOffsets[i] * getExtFactor(VEXTSrc1); 4226dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ShuffleSrcs[i] = DAG.getNode(AArch64ISD::EXT, dl, VT, VEXTSrc1, VEXTSrc2, 4227dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Imm, MVT::i32)); 4228dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4229dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 423072062f5744557e270a38192554c3126ea5f97434Tim Northover 4231dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<int, 8> Mask; 423272062f5744557e270a38192554c3126ea5f97434Tim Northover 4233dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumElts; ++i) { 4234dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Entry = Op.getOperand(i); 4235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Entry.getOpcode() == ISD::UNDEF) { 4236dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Mask.push_back(-1); 4237dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 4238dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 423972062f5744557e270a38192554c3126ea5f97434Tim Northover 4240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ExtractVec = Entry.getOperand(0); 4241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int ExtractElt = 4242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cast<ConstantSDNode>(Op.getOperand(i).getOperand(1))->getSExtValue(); 4243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ExtractVec == SourceVecs[0]) { 4244cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines Mask.push_back(ExtractElt * OffsetMultipliers[0] - VEXTOffsets[0]); 4245dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 4246cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines Mask.push_back(ExtractElt * OffsetMultipliers[1] + NumElts - 4247cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines VEXTOffsets[1]); 4248dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4249dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 425072062f5744557e270a38192554c3126ea5f97434Tim Northover 4251dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Final check before we try to produce nonsense... 4252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isShuffleMaskLegal(Mask, VT)) 4253dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getVectorShuffle(VT, dl, ShuffleSrcs[0], ShuffleSrcs[1], 4254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines &Mask[0]); 425572062f5744557e270a38192554c3126ea5f97434Tim Northover 4256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 425772062f5744557e270a38192554c3126ea5f97434Tim Northover} 425872062f5744557e270a38192554c3126ea5f97434Tim Northover 4259dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// check if an EXT instruction can handle the shuffle mask when the 4260dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// vector sources of the shuffle are the same. 4261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isSingletonEXTMask(ArrayRef<int> M, EVT VT, unsigned &Imm) { 4262dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4263d9767021f83879429e930b068d1d6aef22285b33Hao Liu 4264dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Assume that the first shuffle index is not UNDEF. Fail if it is. 4265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[0] < 0) 4266d9767021f83879429e930b068d1d6aef22285b33Hao Liu return false; 4267d9767021f83879429e930b068d1d6aef22285b33Hao Liu 4268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Imm = M[0]; 426919fdc268c316b3b0bdcb2b558449819f4f402d6aHao Liu 4270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If this is a VEXT shuffle, the immediate value is the index of the first 4271dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // element. The other shuffle indices must be the successive elements after 4272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the first one. 4273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ExpectedElt = Imm; 4274dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 1; i < NumElts; ++i) { 4275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Increment the expected index. If it wraps around, just follow it 4276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // back to index zero and keep going. 4277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++ExpectedElt; 4278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ExpectedElt == NumElts) 4279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ExpectedElt = 0; 4280d9767021f83879429e930b068d1d6aef22285b33Hao Liu 4281dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[i] < 0) 4282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; // ignore UNDEF indices 4283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ExpectedElt != static_cast<unsigned>(M[i])) 4284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 428536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 428636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4288dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 428919fdc268c316b3b0bdcb2b558449819f4f402d6aHao Liu 4290dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// check if an EXT instruction can handle the shuffle mask when the 4291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// vector sources of the shuffle are different. 4292dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseEXT, 4293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned &Imm) { 4294dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Look for the first non-undef element. 4295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const int *FirstRealElt = std::find_if(M.begin(), M.end(), 4296dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines [](int Elt) {return Elt >= 0;}); 429719fdc268c316b3b0bdcb2b558449819f4f402d6aHao Liu 4298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Benefit form APInt to handle overflow when calculating expected element. 4299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned MaskBits = APInt(32, NumElts * 2).logBase2(); 4301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt ExpectedElt = APInt(MaskBits, *FirstRealElt + 1); 4302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The following shuffle indices must be the successive elements after the 4303dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // first real element. 4304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const int *FirstWrongElt = std::find_if(FirstRealElt + 1, M.end(), 4305dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines [&](int Elt) {return Elt != ExpectedElt++ && Elt != -1;}); 4306dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (FirstWrongElt != M.end()) 4307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 430819fdc268c316b3b0bdcb2b558449819f4f402d6aHao Liu 4309dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The index of an EXT is the first element if it is not UNDEF. 4310dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Watch out for the beginning UNDEFs. The EXT index should be the expected 4311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // value of the first element. E.g. 4312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // <-1, -1, 3, ...> is treated as <1, 2, 3, ...>. 4313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // <-1, -1, 0, 1, ...> is treated as <2*NumElts-2, 2*NumElts-1, 0, 1, ...>. 4314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // ExpectedElt is the last mask index plus 1. 4315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Imm = ExpectedElt.getZExtValue(); 4316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // There are two difference cases requiring to reverse input vectors. 4318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For example, for vector <4 x i32> we have the following cases, 4319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Case 1: shufflevector(<4 x i32>,<4 x i32>,<-1, -1, -1, 0>) 4320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Case 2: shufflevector(<4 x i32>,<4 x i32>,<-1, -1, 7, 0>) 4321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For both cases, we finally use mask <5, 6, 7, 0>, which requires 4322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to reverse two input vectors. 4323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Imm < NumElts) 4324dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ReverseEXT = true; 4325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 4326dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Imm -= NumElts; 432719fdc268c316b3b0bdcb2b558449819f4f402d6aHao Liu 4328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 432919fdc268c316b3b0bdcb2b558449819f4f402d6aHao Liu} 433019fdc268c316b3b0bdcb2b558449819f4f402d6aHao Liu 4331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// isREVMask - Check if a vector shuffle corresponds to a REV 4332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// instruction with the specified blocksize. (The order of the elements 4333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// within each block of the vector is reversed.) 4334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isREVMask(ArrayRef<int> M, EVT VT, unsigned BlockSize) { 4335dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert((BlockSize == 16 || BlockSize == 32 || BlockSize == 64) && 4336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "Only possible block sizes for REV are: 16, 32, 64"); 4337dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4338dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned EltSz = VT.getVectorElementType().getSizeInBits(); 4339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (EltSz == 64) 4340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4341dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned BlockElts = M[0] + 1; 4344dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the first shuffle index is UNDEF, be optimistic. 4345dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[0] < 0) 4346dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BlockElts = BlockSize / EltSz; 4347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (BlockSize <= EltSz || BlockSize != BlockElts * EltSz) 4349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4350dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumElts; ++i) { 4352dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[i] < 0) 4353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; // ignore UNDEF indices 4354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((unsigned)M[i] != (i - i % BlockElts) + (BlockElts - 1 - i % BlockElts)) 4355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4356d9767021f83879429e930b068d1d6aef22285b33Hao Liu } 4357d9767021f83879429e930b068d1d6aef22285b33Hao Liu 4358dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4359d9767021f83879429e930b068d1d6aef22285b33Hao Liu} 436072062f5744557e270a38192554c3126ea5f97434Tim Northover 4361dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isZIPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { 4362dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines WhichResult = (M[0] == 0 ? 0 : 1); 4364dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Idx = WhichResult * NumElts / 2; 4365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != NumElts; i += 2) { 4366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((M[i] >= 0 && (unsigned)M[i] != Idx) || 4367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (M[i + 1] >= 0 && (unsigned)M[i + 1] != Idx + NumElts)) 4368dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4369dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Idx += 1; 4370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4371591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4372dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4373dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 4374591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4375dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isUZPMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { 4376dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4377dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines WhichResult = (M[0] == 0 ? 0 : 1); 4378dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != NumElts; ++i) { 4379dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[i] < 0) 4380dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; // ignore UNDEF indices 4381dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((unsigned)M[i] != 2 * i + WhichResult) 4382dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4383dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4384591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4385dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4386dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 4387591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4388dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isTRNMask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { 4389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines WhichResult = (M[0] == 0 ? 0 : 1); 4391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumElts; i += 2) { 4392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((M[i] >= 0 && (unsigned)M[i] != i + WhichResult) || 4393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (M[i + 1] >= 0 && (unsigned)M[i + 1] != i + NumElts + WhichResult)) 4394dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4395dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4396dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 4398591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// isZIP_v_undef_Mask - Special case of isZIPMask for canonical form of 4400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// "vector_shuffle v, v", i.e., "vector_shuffle v, undef". 4401dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Mask is e.g., <0, 0, 1, 1> instead of <0, 4, 1, 5>. 4402dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isZIP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { 4403dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4404dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines WhichResult = (M[0] == 0 ? 0 : 1); 4405dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Idx = WhichResult * NumElts / 2; 4406dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != NumElts; i += 2) { 4407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((M[i] >= 0 && (unsigned)M[i] != Idx) || 4408dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (M[i + 1] >= 0 && (unsigned)M[i + 1] != Idx)) 4409dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4410dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Idx += 1; 4411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4412591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4413dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4414dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 4415591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// isUZP_v_undef_Mask - Special case of isUZPMask for canonical form of 4417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// "vector_shuffle v, v", i.e., "vector_shuffle v, undef". 4418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Mask is e.g., <0, 2, 0, 2> instead of <0, 2, 4, 6>, 4419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isUZP_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { 4420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Half = VT.getVectorNumElements() / 2; 4421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines WhichResult = (M[0] == 0 ? 0 : 1); 4422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned j = 0; j != 2; ++j) { 4423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Idx = WhichResult; 4424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != Half; ++i) { 4425dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int MIdx = M[i + j * Half]; 4426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (MIdx >= 0 && (unsigned)MIdx != Idx) 4427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Idx += 2; 4429591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu } 4430dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4431591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4433dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 4434591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// isTRN_v_undef_Mask - Special case of isTRNMask for canonical form of 4436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// "vector_shuffle v, v", i.e., "vector_shuffle v, undef". 4437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Mask is e.g., <0, 0, 2, 2> instead of <0, 4, 2, 6>. 4438dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isTRN_v_undef_Mask(ArrayRef<int> M, EVT VT, unsigned &WhichResult) { 4439dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4440dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines WhichResult = (M[0] == 0 ? 0 : 1); 4441dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumElts; i += 2) { 4442dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((M[i] >= 0 && (unsigned)M[i] != i + WhichResult) || 4443dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (M[i + 1] >= 0 && (unsigned)M[i + 1] != i + WhichResult)) 4444dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4445591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu } 4446dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4447591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu} 4448591c2f738a3e12026ff5504a486d54fc21fb3049Hao Liu 4449dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isINSMask(ArrayRef<int> M, int NumInputElements, 4450dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool &DstIsLeft, int &Anomaly) { 4451dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M.size() != static_cast<size_t>(NumInputElements)) 4452dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 445336c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu 4454dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int NumLHSMatch = 0, NumRHSMatch = 0; 4455dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int LastLHSMismatch = -1, LastRHSMismatch = -1; 445636c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu 4457dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (int i = 0; i < NumInputElements; ++i) { 4458dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[i] == -1) { 4459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++NumLHSMatch; 4460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++NumRHSMatch; 446136c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu continue; 4462dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 446336c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu 4464dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[i] == i) 4465dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++NumLHSMatch; 4466dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 4467dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LastLHSMismatch = i; 4468dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4469dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[i] == i + NumInputElements) 4470dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++NumRHSMatch; 4471dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 4472dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LastRHSMismatch = i; 447336c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu } 447436c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu 4475dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NumLHSMatch == NumInputElements - 1) { 4476dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DstIsLeft = true; 4477dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Anomaly = LastLHSMismatch; 4478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4479dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (NumRHSMatch == NumInputElements - 1) { 4480dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DstIsLeft = false; 4481dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Anomaly = LastRHSMismatch; 4482dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4483dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 448436c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu 4485dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 448636c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu} 448736c7806f4eacd676932ba630246f88e0e37b1cd4Hao Liu 4488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isConcatMask(ArrayRef<int> Mask, EVT VT, bool SplitLHS) { 4489dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() != 128) 4490dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 449136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4492dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 449336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4494dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (int I = 0, E = NumElts / 2; I != E; I++) { 4495dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Mask[I] != I) 4496dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4497dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 449836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4499dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int Offset = NumElts / 2; 4500dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (int I = NumElts / 2, E = NumElts; I != E; I++) { 4501dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Mask[I] != I + SplitLHS * Offset) 4502dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4503dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 450436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4505dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 450636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 450736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4508dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryFormConcatFromShuffle(SDValue Op, SelectionDAG &DAG) { 4509dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 4510dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 4511dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V0 = Op.getOperand(0); 4512dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V1 = Op.getOperand(1); 4513dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Op)->getMask(); 451436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4515dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getVectorElementType() != V0.getValueType().getVectorElementType() || 4516dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT.getVectorElementType() != V1.getValueType().getVectorElementType()) 451736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return SDValue(); 451836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4519dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool SplitV0 = V0.getValueType().getSizeInBits() == 128; 452036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4521dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isConcatMask(Mask, VT, SplitV0)) 4522dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 452336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4524dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT CastVT = EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(), 4525dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT.getVectorNumElements() / 2); 4526dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SplitV0) { 4527dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V0, 4528dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i64)); 452972062f5744557e270a38192554c3126ea5f97434Tim Northover } 4530dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (V1.getValueType().getSizeInBits() == 128) { 4531dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, CastVT, V1, 4532dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i64)); 4533dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4534dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, V0, V1); 453572062f5744557e270a38192554c3126ea5f97434Tim Northover} 453672062f5744557e270a38192554c3126ea5f97434Tim Northover 4537dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// GeneratePerfectShuffle - Given an entry in the perfect-shuffle table, emit 4538dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// the specified operations to build the shuffle. 4539dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue GeneratePerfectShuffle(unsigned PFEntry, SDValue LHS, 4540dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS, SelectionDAG &DAG, 4541dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl) { 4542dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned OpNum = (PFEntry >> 26) & 0x0F; 4543dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned LHSID = (PFEntry >> 13) & ((1 << 13) - 1); 4544dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned RHSID = (PFEntry >> 0) & ((1 << 13) - 1); 4545dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4546dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines enum { 4547dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_COPY = 0, // Copy, used for things like <u,u,u,3> to say it is <0,1,2,3> 4548dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VREV, 4549dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VDUP0, 4550dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VDUP1, 4551dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VDUP2, 4552dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VDUP3, 4553dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VEXT1, 4554dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VEXT2, 4555dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VEXT3, 4556dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VUZPL, // VUZP, left result 4557dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VUZPR, // VUZP, right result 4558dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VZIPL, // VZIP, left result 4559dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VZIPR, // VZIP, right result 4560dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VTRNL, // VTRN, left result 4561dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OP_VTRNR // VTRN, right result 4562dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines }; 4563dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4564dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (OpNum == OP_COPY) { 4565dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHSID == (1 * 9 + 2) * 9 + 3) 4566dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LHS; 4567dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHSID == ((4 * 9 + 5) * 9 + 6) * 9 + 7 && "Illegal OP_COPY!"); 4568dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return RHS; 4569dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4570e54885af9b54bfc7436a928a48d3db1ef88a2a70Stephen Lin 4571dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue OpLHS, OpRHS; 4572dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpLHS = GeneratePerfectShuffle(PerfectShuffleTable[LHSID], LHS, RHS, DAG, dl); 4573dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpRHS = GeneratePerfectShuffle(PerfectShuffleTable[RHSID], LHS, RHS, DAG, dl); 4574dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = OpLHS.getValueType(); 4575e54885af9b54bfc7436a928a48d3db1ef88a2a70Stephen Lin 4576dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (OpNum) { 4577e54885af9b54bfc7436a928a48d3db1ef88a2a70Stephen Lin default: 4578dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown shuffle opcode!"); 4579dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VREV: 4580dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // VREV divides the vector in half and swaps within the half. 4581dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getVectorElementType() == MVT::i32 || 4582dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT.getVectorElementType() == MVT::f32) 4583dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::REV64, dl, VT, OpLHS); 4584dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // vrev <4 x i16> -> REV32 4585dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getVectorElementType() == MVT::i16) 4586dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::REV32, dl, VT, OpLHS); 4587dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // vrev <4 x i8> -> REV16 4588dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(VT.getVectorElementType() == MVT::i8); 4589dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::REV16, dl, VT, OpLHS); 4590dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VDUP0: 4591dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VDUP1: 4592dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VDUP2: 4593dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VDUP3: { 4594dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT EltTy = VT.getVectorElementType(); 4595dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opcode; 4596dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (EltTy == MVT::i8) 4597dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::DUPLANE8; 4598dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (EltTy == MVT::i16) 4599dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::DUPLANE16; 4600dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (EltTy == MVT::i32 || EltTy == MVT::f32) 4601dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::DUPLANE32; 4602dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (EltTy == MVT::i64 || EltTy == MVT::f64) 4603dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::DUPLANE64; 4604dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 4605dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Invalid vector element type?"); 4606e54885af9b54bfc7436a928a48d3db1ef88a2a70Stephen Lin 4607dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() == 64) 4608dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpLHS = WidenVector(OpLHS, DAG); 4609dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, MVT::i64); 4610dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opcode, dl, VT, OpLHS, Lane); 4611dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4612dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VEXT1: 4613dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VEXT2: 4614dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VEXT3: { 4615dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Imm = (OpNum - OP_VEXT1 + 1) * getExtFactor(OpLHS); 4616dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::EXT, dl, VT, OpLHS, OpRHS, 4617dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Imm, MVT::i32)); 4618dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4619dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VUZPL: 4620dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::UZP1, dl, DAG.getVTList(VT, VT), OpLHS, 4621dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpRHS); 4622dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VUZPR: 4623dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::UZP2, dl, DAG.getVTList(VT, VT), OpLHS, 4624dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpRHS); 4625dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VZIPL: 4626dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::ZIP1, dl, DAG.getVTList(VT, VT), OpLHS, 4627dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpRHS); 4628dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VZIPR: 4629dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::ZIP2, dl, DAG.getVTList(VT, VT), OpLHS, 4630dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpRHS); 4631dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VTRNL: 4632dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::TRN1, dl, DAG.getVTList(VT, VT), OpLHS, 4633dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpRHS); 4634dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case OP_VTRNR: 4635dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::TRN2, dl, DAG.getVTList(VT, VT), OpLHS, 4636dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines OpRHS); 4637dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4638e54885af9b54bfc7436a928a48d3db1ef88a2a70Stephen Lin} 4639dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4640dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue GenerateTBL(SDValue Op, ArrayRef<int> ShuffleMask, 4641dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 4642dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check to see if we can use the TBL instruction. 4643dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V1 = Op.getOperand(0); 4644dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V2 = Op.getOperand(1); 464536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDLoc DL(Op); 464636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4647dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT EltVT = Op.getValueType().getVectorElementType(); 4648dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned BytesPerElt = EltVT.getSizeInBits() / 8; 464936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4650dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 8> TBLMask; 4651dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (int Val : ShuffleMask) { 4652dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned Byte = 0; Byte < BytesPerElt; ++Byte) { 4653dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Offset = Byte + Val * BytesPerElt; 4654dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TBLMask.push_back(DAG.getConstant(Offset, MVT::i32)); 465536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 465636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 4657e54885af9b54bfc7436a928a48d3db1ef88a2a70Stephen Lin 4658dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT IndexVT = MVT::v8i8; 4659dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned IndexLen = 8; 4660dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getValueType().getSizeInBits() == 128) { 4661dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IndexVT = MVT::v16i8; 4662dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IndexLen = 16; 466336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 466436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4665dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V1Cst = DAG.getNode(ISD::BITCAST, DL, IndexVT, V1); 4666dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V2Cst = DAG.getNode(ISD::BITCAST, DL, IndexVT, V2); 4667dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4668dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Shuffle; 4669dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (V2.getNode()->getOpcode() == ISD::UNDEF) { 4670dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IndexLen == 8) 4671dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V1Cst); 4672dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Shuffle = DAG.getNode( 4673dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, 4674dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Intrinsic::aarch64_neon_tbl1, MVT::i32), V1Cst, 4675dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, 4676dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines makeArrayRef(TBLMask.data(), IndexLen))); 4677dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 4678dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IndexLen == 8) { 4679dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V1Cst = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v16i8, V1Cst, V2Cst); 4680dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Shuffle = DAG.getNode( 4681dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, 4682dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Intrinsic::aarch64_neon_tbl1, MVT::i32), V1Cst, 4683dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, 4684dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines makeArrayRef(TBLMask.data(), IndexLen))); 4685dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 4686dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: We cannot, for the moment, emit a TBL2 instruction because we 4687dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // cannot currently represent the register constraints on the input 4688dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // table registers. 4689dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Shuffle = DAG.getNode(AArch64ISD::TBL2, DL, IndexVT, V1Cst, V2Cst, 4690dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, 4691dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // &TBLMask[0], IndexLen)); 4692dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Shuffle = DAG.getNode( 4693dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::INTRINSIC_WO_CHAIN, DL, IndexVT, 4694dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Intrinsic::aarch64_neon_tbl2, MVT::i32), V1Cst, V2Cst, 4695dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::BUILD_VECTOR, DL, IndexVT, 4696dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines makeArrayRef(TBLMask.data(), IndexLen))); 469736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 469836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 4699dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Shuffle); 470036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 470136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4702dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic unsigned getDUPLANEOp(EVT EltType) { 4703dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (EltType == MVT::i8) 4704dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64ISD::DUPLANE8; 4705dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (EltType == MVT::i16) 4706dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64ISD::DUPLANE16; 4707dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (EltType == MVT::i32 || EltType == MVT::f32) 4708dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64ISD::DUPLANE32; 4709dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (EltType == MVT::i64 || EltType == MVT::f64) 4710dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AArch64ISD::DUPLANE64; 4711dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4712dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Invalid vector element type?"); 471336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 47148a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 4715dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, 4716dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 4717dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 471836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines EVT VT = Op.getValueType(); 471936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4720dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); 4721dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4722dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Convert shuffles that are directly supported on NEON to target-specific 4723dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // DAG nodes, instead of keeping them as shuffles and matching them again 4724dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // during code selection. This is more efficient and avoids the possibility 4725dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // of inconsistencies between legalization and selection. 4726dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ArrayRef<int> ShuffleMask = SVN->getMask(); 472736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4728dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V1 = Op.getOperand(0); 4729dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V2 = Op.getOperand(1); 4730dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4731dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ShuffleVectorSDNode::isSplatMask(&ShuffleMask[0], 4732dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V1.getValueType().getSimpleVT())) { 4733dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int Lane = SVN->getSplatIndex(); 4734dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If this is undef splat, generate it via "just" vdup, if possible. 4735dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Lane == -1) 4736dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Lane = 0; 4737dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4738dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Lane == 0 && V1.getOpcode() == ISD::SCALAR_TO_VECTOR) 4739dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::DUP, dl, V1.getValueType(), 4740dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V1.getOperand(0)); 4741dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Test if V1 is a BUILD_VECTOR and the lane being referenced is a non- 4742dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // constant. If so, we can just reference the lane's definition directly. 4743dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (V1.getOpcode() == ISD::BUILD_VECTOR && 4744dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines !isa<ConstantSDNode>(V1.getOperand(Lane))) 4745dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::DUP, dl, VT, V1.getOperand(Lane)); 4746dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4747dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Otherwise, duplicate from the lane of the input vector. 4748dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opcode = getDUPLANEOp(V1.getValueType().getVectorElementType()); 4749dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4750dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // SelectionDAGBuilder may have "helpfully" already extracted or conatenated 4751dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to make a vector of the same size as this SHUFFLE. We can ignore the 4752dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // extract entirely, and canonicalise the concat using WidenVector. 4753dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (V1.getOpcode() == ISD::EXTRACT_SUBVECTOR) { 4754dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Lane += cast<ConstantSDNode>(V1.getOperand(1))->getZExtValue(); 4755dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V1 = V1.getOperand(0); 4756dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (V1.getOpcode() == ISD::CONCAT_VECTORS) { 4757dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Idx = Lane >= (int)VT.getVectorNumElements() / 2; 4758dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Lane -= Idx * VT.getVectorNumElements() / 2; 4759dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V1 = WidenVector(V1.getOperand(Idx), DAG); 4760dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (VT.getSizeInBits() == 64) 4761dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines V1 = WidenVector(V1, DAG); 4762dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4763dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opcode, dl, VT, V1, DAG.getConstant(Lane, MVT::i64)); 4764dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 476536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4766dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isREVMask(ShuffleMask, VT, 64)) 4767dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::REV64, dl, V1.getValueType(), V1, V2); 4768dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isREVMask(ShuffleMask, VT, 32)) 4769dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::REV32, dl, V1.getValueType(), V1, V2); 4770dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isREVMask(ShuffleMask, VT, 16)) 4771dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::REV16, dl, V1.getValueType(), V1, V2); 4772dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4773dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool ReverseEXT = false; 4774dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Imm; 4775dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isEXTMask(ShuffleMask, VT, ReverseEXT, Imm)) { 4776dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ReverseEXT) 4777dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(V1, V2); 4778dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Imm *= getExtFactor(V1); 4779dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::EXT, dl, V1.getValueType(), V1, V2, 4780dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Imm, MVT::i32)); 4781dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (V2->getOpcode() == ISD::UNDEF && 4782dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isSingletonEXTMask(ShuffleMask, VT, Imm)) { 4783dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Imm *= getExtFactor(V1); 4784dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::EXT, dl, V1.getValueType(), V1, V1, 4785dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Imm, MVT::i32)); 4786dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 478736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4788dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned WhichResult; 4789dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isZIPMask(ShuffleMask, VT, WhichResult)) { 4790dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2; 4791dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, dl, V1.getValueType(), V1, V2); 4792dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4793dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isUZPMask(ShuffleMask, VT, WhichResult)) { 4794dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2; 4795dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, dl, V1.getValueType(), V1, V2); 4796dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4797dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isTRNMask(ShuffleMask, VT, WhichResult)) { 4798dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; 4799dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, dl, V1.getValueType(), V1, V2); 4800dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4801dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4802dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isZIP_v_undef_Mask(ShuffleMask, VT, WhichResult)) { 4803dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = (WhichResult == 0) ? AArch64ISD::ZIP1 : AArch64ISD::ZIP2; 4804dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, dl, V1.getValueType(), V1, V1); 4805dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4806dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isUZP_v_undef_Mask(ShuffleMask, VT, WhichResult)) { 4807dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = (WhichResult == 0) ? AArch64ISD::UZP1 : AArch64ISD::UZP2; 4808dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, dl, V1.getValueType(), V1, V1); 4809dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4810dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isTRN_v_undef_Mask(ShuffleMask, VT, WhichResult)) { 4811dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = (WhichResult == 0) ? AArch64ISD::TRN1 : AArch64ISD::TRN2; 4812dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, dl, V1.getValueType(), V1, V1); 4813dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4814dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4815dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Concat = tryFormConcatFromShuffle(Op, DAG); 4816dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Concat.getNode()) 4817dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Concat; 4818dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4819dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool DstIsLeft; 4820dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int Anomaly; 4821dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int NumInputElements = V1.getValueType().getVectorNumElements(); 4822dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isINSMask(ShuffleMask, NumInputElements, DstIsLeft, Anomaly)) { 4823dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue DstVec = DstIsLeft ? V1 : V2; 4824dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue DstLaneV = DAG.getConstant(Anomaly, MVT::i64); 4825dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4826dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SrcVec = V1; 4827dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int SrcLane = ShuffleMask[Anomaly]; 4828dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SrcLane >= NumInputElements) { 4829dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SrcVec = V2; 4830dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SrcLane -= VT.getVectorNumElements(); 4831dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4832dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SrcLaneV = DAG.getConstant(SrcLane, MVT::i64); 4833dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4834dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ScalarVT = VT.getVectorElementType(); 4835dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ScalarVT.getSizeInBits() < 32) 4836dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ScalarVT = MVT::i32; 4837dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4838dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode( 4839dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::INSERT_VECTOR_ELT, dl, VT, DstVec, 4840dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ScalarVT, SrcVec, SrcLaneV), 4841dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DstLaneV); 4842dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4844dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the shuffle is not directly supported and it has 4 elements, use 4845dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the PerfectShuffle-generated table to synthesize it from other shuffles. 4846dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4847dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NumElts == 4) { 4848dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned PFIndexes[4]; 4849dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != 4; ++i) { 4850dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ShuffleMask[i] < 0) 4851dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PFIndexes[i] = 8; 4852dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 4853dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PFIndexes[i] = ShuffleMask[i]; 4854dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4855dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4856dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Compute the index in the perfect shuffle table. 4857dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned PFTableIndex = PFIndexes[0] * 9 * 9 * 9 + PFIndexes[1] * 9 * 9 + 4858dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PFIndexes[2] * 9 + PFIndexes[3]; 4859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned PFEntry = PerfectShuffleTable[PFTableIndex]; 4860dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Cost = (PFEntry >> 30); 4861dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4862dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Cost <= 4) 4863dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return GeneratePerfectShuffle(PFEntry, V1, V2, DAG, dl); 4864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4866dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return GenerateTBL(Op, ShuffleMask, DAG); 486736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 48688a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 4869dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool resolveBuildVector(BuildVectorSDNode *BVN, APInt &CnstBits, 4870dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt &UndefBits) { 4871dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = BVN->getValueType(0); 4872dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt SplatBits, SplatUndef; 4873dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned SplatBitSize; 4874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool HasAnyUndefs; 4875dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { 4876dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumSplats = VT.getSizeInBits() / SplatBitSize; 4877dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4878dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumSplats; ++i) { 4879dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits <<= SplatBitSize; 4880dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UndefBits <<= SplatBitSize; 4881dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits |= SplatBits.zextOrTrunc(VT.getSizeInBits()); 4882dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UndefBits |= (SplatBits ^ SplatUndef).zextOrTrunc(VT.getSizeInBits()); 4883dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4884dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4885dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 4886dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4887dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4888dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 4890dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4891dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerVectorAND(SDValue Op, 4892dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 4893dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVectorSDNode *BVN = 4894dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode()); 4895dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = Op.getOperand(0); 489636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SDLoc dl(Op); 4897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 489836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4899dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!BVN) 4900dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 490136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4902dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt CnstBits(VT.getSizeInBits(), 0); 4903dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt UndefBits(VT.getSizeInBits(), 0); 4904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (resolveBuildVector(BVN, CnstBits, UndefBits)) { 4905dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We only have BIC vector immediate instruction, which is and-not. 4906dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits = ~CnstBits; 4907dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4908dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We make use of a little bit of goto ickiness in order to avoid having to 4909dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // duplicate the immediate matching logic for the undef toggled case. 4910dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool SecondTry = false; 4911dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AttemptModImm: 4912dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4913dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CnstBits.getHiBits(64) == CnstBits.getLoBits(64)) { 4914dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits = CnstBits.zextOrTrunc(64); 4915dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t CnstVal = CnstBits.getZExtValue(); 4916dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4917dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { 4918dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); 4919dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 4920dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, 4921dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 4922dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i32)); 4923dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4924dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 492536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4926dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { 4927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType2(CnstVal); 4928dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 4929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, 4930dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 4931dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i32)); 4932dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4933dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 493436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 4935dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType3(CnstVal)) { 4936dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType3(CnstVal); 4937dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 4938dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, 4939dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 4940dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(16, MVT::i32)); 4941dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4942dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4943dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4944dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType4(CnstVal)) { 4945dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType4(CnstVal); 4946dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 4947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, 4948dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 4949dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(24, MVT::i32)); 4950dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4951dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4952dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4953dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType5(CnstVal)) { 4954dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType5(CnstVal); 4955dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v8i16 : MVT::v4i16; 4956dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, 4957dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 4958dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i32)); 4959dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4960dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4961dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4962dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType6(CnstVal)) { 4963dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType6(CnstVal); 4964dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v8i16 : MVT::v4i16; 4965dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, 4966dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 4967dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i32)); 4968dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4969dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4970dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4971dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4972dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SecondTry) 4973dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines goto FailedModImm; 4974dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SecondTry = true; 4975dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits = ~UndefBits; 4976dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines goto AttemptModImm; 4977dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 4978dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 4979dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// We can always fall back to a non-immediate AND. 4980dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesFailedModImm: 4981dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 49828a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling} 49838a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 4984dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Specialized code to quickly find if PotentialBVec is a BuildVector that 4985dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// consists of only the same constant int value, returned in reference arg 4986dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// ConstVal 4987dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isAllConstantBuildVector(const SDValue &PotentialBVec, 4988dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t &ConstVal) { 4989dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVectorSDNode *Bvec = dyn_cast<BuildVectorSDNode>(PotentialBVec); 4990dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Bvec) 4991dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4992dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *FirstElt = dyn_cast<ConstantSDNode>(Bvec->getOperand(0)); 4993dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!FirstElt) 4994dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 4995dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Bvec->getValueType(0); 4996dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements(); 4997dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 1; i < NumElts; ++i) 4998dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (dyn_cast<ConstantSDNode>(Bvec->getOperand(i)) != FirstElt) 4999dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 5000dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstVal = FirstElt->getZExtValue(); 5001dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 5002dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 500387773c318fcee853fb34a80a10c4347d523bdafbTim Northover 5004dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic unsigned getIntrinsicID(const SDNode *N) { 5005dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opcode = N->getOpcode(); 5006dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Opcode) { 5007dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 5008dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Intrinsic::not_intrinsic; 5009dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INTRINSIC_WO_CHAIN: { 5010dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue(); 5011dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IID < Intrinsic::num_intrinsics) 5012dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return IID; 5013dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Intrinsic::not_intrinsic; 5014dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5015dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5016dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5017dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5018dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Attempt to form a vector S[LR]I from (or (and X, BvecC1), (lsl Y, C2)), 5019dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// to (SLI X, Y, C2), where X and Y have matching vector types, BvecC1 is a 5020dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// BUILD_VECTORs with constant element C1, C2 is a constant, and C1 == ~C2. 5021dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Also, logical shift right -> sri, with the same structure. 5022dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryLowerToSLI(SDNode *N, SelectionDAG &DAG) { 5023dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 5024dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5025dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isVector()) 5026dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5027dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5028dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(N); 5029dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5030dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Is the first op an AND? 5031dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SDValue And = N->getOperand(0); 5032dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (And.getOpcode() != ISD::AND) 5033dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5034dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5035dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Is the second op an shl or lshr? 5036dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Shift = N->getOperand(1); 5037dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This will have been turned into: AArch64ISD::VSHL vector, #shift 5038dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // or AArch64ISD::VLSHR vector, #shift 5039dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ShiftOpc = Shift.getOpcode(); 5040dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((ShiftOpc != AArch64ISD::VSHL && ShiftOpc != AArch64ISD::VLSHR)) 5041dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5042dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsShiftRight = ShiftOpc == AArch64ISD::VLSHR; 5043dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5044dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Is the shift amount constant? 5045dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *C2node = dyn_cast<ConstantSDNode>(Shift.getOperand(1)); 5046dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!C2node) 5047dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5048dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5049dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Is the and mask vector all constant? 5050dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t C1; 5051dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isAllConstantBuildVector(And.getOperand(1), C1)) 5052dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5053dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5054dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Is C1 == ~C2, taking into account how much one can shift elements of a 5055dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // particular size? 5056dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t C2 = C2node->getZExtValue(); 5057dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ElemSizeInBits = VT.getVectorElementType().getSizeInBits(); 5058dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (C2 > ElemSizeInBits) 5059dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5060dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ElemMask = (1 << ElemSizeInBits) - 1; 5061dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((C1 & ElemMask) != (~C2 & ElemMask)) 5062dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5063dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5064dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue X = And.getOperand(0); 5065dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Y = Shift.getOperand(0); 5066dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5067dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Intrin = 5068dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsShiftRight ? Intrinsic::aarch64_neon_vsri : Intrinsic::aarch64_neon_vsli; 5069dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ResultSLI = 5070dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, 5071dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Intrin, MVT::i32), X, Y, Shift.getOperand(1)); 5072dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5073dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DEBUG(dbgs() << "aarch64-lower: transformed: \n"); 5074dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DEBUG(N->dump(&DAG)); 5075dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DEBUG(dbgs() << "into: \n"); 5076dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DEBUG(ResultSLI->dump(&DAG)); 5077dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5078dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++NumShiftInserts; 5079dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return ResultSLI; 5080dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5081dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5082dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerVectorOR(SDValue Op, 5083dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 5084dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Attempt to form a vector S[LR]I from (or (and X, C1), (lsl Y, C2)) 5085dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (EnableAArch64SlrGeneration) { 5086dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Res = tryLowerToSLI(Op.getNode(), DAG); 5087dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Res.getNode()) 5088dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Res; 5089dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5090dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5091dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVectorSDNode *BVN = 5092dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines dyn_cast<BuildVectorSDNode>(Op.getOperand(0).getNode()); 5093dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = Op.getOperand(1); 5094dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 509587773c318fcee853fb34a80a10c4347d523bdafbTim Northover EVT VT = Op.getValueType(); 509687773c318fcee853fb34a80a10c4347d523bdafbTim Northover 5097dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // OR commutes, so try swapping the operands. 5098dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!BVN) { 5099dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS = Op.getOperand(0); 5100dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BVN = dyn_cast<BuildVectorSDNode>(Op.getOperand(1).getNode()); 5101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!BVN) 5103dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 510487773c318fcee853fb34a80a10c4347d523bdafbTim Northover 5105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt CnstBits(VT.getSizeInBits(), 0); 5106dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt UndefBits(VT.getSizeInBits(), 0); 5107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (resolveBuildVector(BVN, CnstBits, UndefBits)) { 5108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We make use of a little bit of goto ickiness in order to avoid having to 5109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // duplicate the immediate matching logic for the undef toggled case. 5110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool SecondTry = false; 5111dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AttemptModImm: 5112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5113dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CnstBits.getHiBits(64) == CnstBits.getLoBits(64)) { 5114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits = CnstBits.zextOrTrunc(64); 5115dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t CnstVal = CnstBits.getZExtValue(); 5116dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5117dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { 5118dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); 5119dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5120dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, 5121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5122dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i32)); 5123dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 512487773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 512587773c318fcee853fb34a80a10c4347d523bdafbTim Northover 5126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { 5127dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType2(CnstVal); 5128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5129dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, 5130dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5131dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i32)); 5132dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 513387773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 513487773c318fcee853fb34a80a10c4347d523bdafbTim Northover 5135dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType3(CnstVal)) { 5136dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType3(CnstVal); 5137dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, 5139dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5140dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(16, MVT::i32)); 5141dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5142dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5143dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5144dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType4(CnstVal)) { 5145dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType4(CnstVal); 5146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5147dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, 5148dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5149dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(24, MVT::i32)); 5150dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5151dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5152dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType5(CnstVal)) { 5154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType5(CnstVal); 5155dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v8i16 : MVT::v4i16; 5156dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, 5157dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5158dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i32)); 5159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5160dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5161dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType6(CnstVal)) { 5163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType6(CnstVal); 5164dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v8i16 : MVT::v4i16; 5165dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, 5166dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5167dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i32)); 5168dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 516987773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 517087773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 5171dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5172dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SecondTry) 5173dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines goto FailedModImm; 5174dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SecondTry = true; 5175dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits = UndefBits; 5176dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines goto AttemptModImm; 517787773c318fcee853fb34a80a10c4347d523bdafbTim Northover } 5178767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 5179dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// We can always fall back to a non-immediate OR. 5180dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesFailedModImm: 5181dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 5182dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5183dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5184cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines// Normalize the operands of BUILD_VECTOR. The value of constant operands will 5185cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines// be truncated to fit element width. 5186cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hinesstatic SDValue NormalizeBuildVector(SDValue Op, 5187cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SelectionDAG &DAG) { 5188cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines assert(Op.getOpcode() == ISD::BUILD_VECTOR && "Unknown opcode!"); 5189cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDLoc dl(Op); 5190cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines EVT VT = Op.getValueType(); 5191cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines EVT EltTy= VT.getVectorElementType(); 5192cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 5193cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (EltTy.isFloatingPoint() || EltTy.getSizeInBits() > 16) 5194cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return Op; 5195cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 5196cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SmallVector<SDValue, 16> Ops; 5197cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines for (unsigned I = 0, E = VT.getVectorNumElements(); I != E; ++I) { 5198cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue Lane = Op.getOperand(I); 5199cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (Lane.getOpcode() == ISD::Constant) { 5200cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines APInt LowBits(EltTy.getSizeInBits(), 5201cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines cast<ConstantSDNode>(Lane)->getZExtValue()); 5202cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines Lane = DAG.getConstant(LowBits.getZExtValue(), MVT::i32); 5203cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 5204cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines Ops.push_back(Lane); 5205cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 5206cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops); 5207cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines} 5208cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 5209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerBUILD_VECTOR(SDValue Op, 5210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 5211dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 5212dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 5213cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines Op = NormalizeBuildVector(Op, DAG); 5214cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Op.getNode()); 5215dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5216dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt CnstBits(VT.getSizeInBits(), 0); 5217dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt UndefBits(VT.getSizeInBits(), 0); 5218dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (resolveBuildVector(BVN, CnstBits, UndefBits)) { 5219dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We make use of a little bit of goto ickiness in order to avoid having to 5220dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // duplicate the immediate matching logic for the undef toggled case. 5221dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool SecondTry = false; 5222dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AttemptModImm: 5223dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5224dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CnstBits.getHiBits(64) == CnstBits.getLoBits(64)) { 5225dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits = CnstBits.zextOrTrunc(64); 5226dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t CnstVal = CnstBits.getZExtValue(); 5227dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5228dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Certain magic vector constants (used to express things like NOT 5229dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // and NEG) are passed through unmodified. This allows codegen patterns 5230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // for these operations to match. Special-purpose patterns will lower 5231dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // these immediates to MOVIs if it proves necessary. 5232dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.isInteger() && (CnstVal == 0 || CnstVal == ~0ULL)) 5233dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 5234dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The many faces of MOVI... 5236dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType10(CnstVal)) { 5237dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType10(CnstVal); 5238dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() == 128) { 5239dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVIedit, dl, MVT::v2i64, 5240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32)); 5241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5244dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Support the V64 version via subregister insertion. 5245dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVIedit, dl, MVT::f64, 5246dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32)); 5247dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5248dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5249dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5250dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { 5251dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); 5252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5253dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, 5254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5255dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i32)); 5256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5257dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5259dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { 5260dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType2(CnstVal); 5261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5262dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, 5263dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5264dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i32)); 5265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5266dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5267dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType3(CnstVal)) { 5269dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType3(CnstVal); 5270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5271dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, 5272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(16, MVT::i32)); 5274dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType4(CnstVal)) { 5278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType4(CnstVal); 5279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5280dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, 5281dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(24, MVT::i32)); 5283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5285dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5286dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType5(CnstVal)) { 5287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType5(CnstVal); 5288dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v8i16 : MVT::v4i16; 5289dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, 5290dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i32)); 5292dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5294dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType6(CnstVal)) { 5296dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType6(CnstVal); 5297dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v8i16 : MVT::v4i16; 5298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, 5299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i32)); 5301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5303dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType7(CnstVal)) { 5305dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType7(CnstVal); 5306dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVImsl, dl, MovTy, 5308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5309dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(264, MVT::i32)); 5310dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType8(CnstVal)) { 5314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType8(CnstVal); 5315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVImsl, dl, MovTy, 5317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(272, MVT::i32)); 5319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType9(CnstVal)) { 5323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType9(CnstVal); 5324dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v16i8 : MVT::v8i8; 5325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MOVI, dl, MovTy, 5326dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32)); 5327dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5329dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5330dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The few faces of FMOV... 5331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType11(CnstVal)) { 5332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType11(CnstVal); 5333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4f32 : MVT::v2f32; 5334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::FMOV, dl, MovTy, 5335dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32)); 5336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5337dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5338dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType12(CnstVal) && 5340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT.getSizeInBits() == 128) { 5341dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType12(CnstVal); 5342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::FMOV, dl, MVT::v2f64, 5343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32)); 5344dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5345dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5346dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The many faces of MVNI... 5348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = ~CnstVal; 5349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType1(CnstVal)) { 5350dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType1(CnstVal); 5351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5352dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, 5353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i32)); 5355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5356dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5357dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5358dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType2(CnstVal)) { 5359dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType2(CnstVal); 5360dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5361dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, 5362dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i32)); 5364dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType3(CnstVal)) { 5368dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType3(CnstVal); 5369dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, 5371dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5372dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(16, MVT::i32)); 5373dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5374dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5375dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5376dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType4(CnstVal)) { 5377dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType4(CnstVal); 5378dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5379dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, 5380dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5381dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(24, MVT::i32)); 5382dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5383dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5384dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5385dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType5(CnstVal)) { 5386dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType5(CnstVal); 5387dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v8i16 : MVT::v4i16; 5388dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, 5389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i32)); 5391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5394dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType6(CnstVal)) { 5395dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType6(CnstVal); 5396dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v8i16 : MVT::v4i16; 5397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, 5398dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i32)); 5400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5401dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5402dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5403dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType7(CnstVal)) { 5404dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType7(CnstVal); 5405dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5406dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MVNImsl, dl, MovTy, 5407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5408dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(264, MVT::i32)); 5409dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5410dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5412dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AArch64_AM::isAdvSIMDModImmType8(CnstVal)) { 5413dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstVal = AArch64_AM::encodeAdvSIMDModImmType8(CnstVal); 5414dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT MovTy = (VT.getSizeInBits() == 128) ? MVT::v4i32 : MVT::v2i32; 5415dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mov = DAG.getNode(AArch64ISD::MVNImsl, dl, MovTy, 5416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(CnstVal, MVT::i32), 5417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(272, MVT::i32)); 5418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 5419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SecondTry) 5423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines goto FailedModImm; 5424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SecondTry = true; 5425dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CnstBits = UndefBits; 5426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines goto AttemptModImm; 5427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesFailedModImm: 5429dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5430dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Scan through the operands to find some interesting properties we can 5431dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // exploit: 5432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 1) If only one value is used, we can use a DUP, or 5433dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 2) if only the low element is not undef, we can just insert that, or 5434dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 3) if only one constant value is used (w/ some non-constant lanes), 5435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we can splat the constant value into the whole vector then fill 5436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // in the non-constant lanes. 5437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 4) FIXME: If different constant values are used, but we can intelligently 5438dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // select the values we'll be overwriting for the non-constant 5439dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // lanes such that we can directly materialize the vector 5440dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // some other way (MOVI, e.g.), we can be sneaky. 5441767f816b926376bd850a62a28d35343ad0559c91Kevin Qin unsigned NumElts = VT.getVectorNumElements(); 5442767f816b926376bd850a62a28d35343ad0559c91Kevin Qin bool isOnlyLowElement = true; 5443767f816b926376bd850a62a28d35343ad0559c91Kevin Qin bool usesOnlyOneValue = true; 5444dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool usesOnlyOneConstantValue = true; 5445767f816b926376bd850a62a28d35343ad0559c91Kevin Qin bool isConstant = true; 5446dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumConstantLanes = 0; 5447767f816b926376bd850a62a28d35343ad0559c91Kevin Qin SDValue Value; 5448dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ConstantValue; 5449767f816b926376bd850a62a28d35343ad0559c91Kevin Qin for (unsigned i = 0; i < NumElts; ++i) { 5450767f816b926376bd850a62a28d35343ad0559c91Kevin Qin SDValue V = Op.getOperand(i); 5451767f816b926376bd850a62a28d35343ad0559c91Kevin Qin if (V.getOpcode() == ISD::UNDEF) 5452767f816b926376bd850a62a28d35343ad0559c91Kevin Qin continue; 5453767f816b926376bd850a62a28d35343ad0559c91Kevin Qin if (i > 0) 5454767f816b926376bd850a62a28d35343ad0559c91Kevin Qin isOnlyLowElement = false; 5455767f816b926376bd850a62a28d35343ad0559c91Kevin Qin if (!isa<ConstantFPSDNode>(V) && !isa<ConstantSDNode>(V)) 5456767f816b926376bd850a62a28d35343ad0559c91Kevin Qin isConstant = false; 5457767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 5458dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isa<ConstantSDNode>(V) || isa<ConstantFPSDNode>(V)) { 5459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++NumConstantLanes; 5460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!ConstantValue.getNode()) 5461dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantValue = V; 5462dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (ConstantValue != V) 5463dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines usesOnlyOneConstantValue = false; 5464dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5465767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 5466dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Value.getNode()) 5467767f816b926376bd850a62a28d35343ad0559c91Kevin Qin Value = V; 5468dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (V != Value) 5469dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines usesOnlyOneValue = false; 5470767f816b926376bd850a62a28d35343ad0559c91Kevin Qin } 5471767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 5472dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Value.getNode()) 5473767f816b926376bd850a62a28d35343ad0559c91Kevin Qin return DAG.getUNDEF(VT); 5474767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 547536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (isOnlyLowElement) 5476dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); 5477767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 5478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Use DUP for non-constant splats. For f32 constant splats, reduce to 5479dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // i32 and try again. 5480dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (usesOnlyOneValue) { 5481767f816b926376bd850a62a28d35343ad0559c91Kevin Qin if (!isConstant) { 5482dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Value.getOpcode() != ISD::EXTRACT_VECTOR_ELT || 5483dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value.getValueType() != VT) 5484dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::DUP, dl, VT, Value); 548536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 5486dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This is actually a DUPLANExx operation, which keeps everything vectory. 5487dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // DUPLANE works on 128-bit vectors, widen it if necessary. 5489dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lane = Value.getOperand(1); 5490dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value = Value.getOperand(0); 5491dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Value.getValueType().getSizeInBits() == 64) 5492dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value = WidenVector(Value, DAG); 5493dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5494dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opcode = getDUPLANEOp(VT.getVectorElementType()); 5495dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opcode, dl, VT, Value, Lane); 5496dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5497dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5498dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getVectorElementType().isFloatingPoint()) { 5499dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 8> Ops; 5500dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT NewType = 5501dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64; 5502dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumElts; ++i) 5503dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(DAG.getNode(ISD::BITCAST, dl, NewType, Op.getOperand(i))); 5504dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VecVT = EVT::getVectorVT(*DAG.getContext(), NewType, NumElts); 5505dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, Ops); 5506dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Val = LowerBUILD_VECTOR(Val, DAG); 5507dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Val.getNode()) 5508dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::BITCAST, dl, VT, Val); 5509767f816b926376bd850a62a28d35343ad0559c91Kevin Qin } 5510dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5511dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5512dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If there was only one constant value used and for more than one lane, 5513dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // start by splatting that value, then replace the non-constant lanes. This 5514dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // is better than the default, which will perform a separate initialization 5515dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // for each lane. 5516dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NumConstantLanes > 0 && usesOnlyOneConstantValue) { 5517dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Val = DAG.getNode(AArch64ISD::DUP, dl, VT, ConstantValue); 5518dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Now insert the non-constant lanes. 5519dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumElts; ++i) { 5520dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue V = Op.getOperand(i); 5521dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LaneIdx = DAG.getConstant(i, MVT::i64); 5522dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isa<ConstantSDNode>(V) && !isa<ConstantFPSDNode>(V)) { 5523dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Note that type legalization likely mucked about with the VT of the 5524dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // source operand, so we may have to convert it here before inserting. 5525dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Val, V, LaneIdx); 5526dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5527767f816b926376bd850a62a28d35343ad0559c91Kevin Qin } 5528dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Val; 5529767f816b926376bd850a62a28d35343ad0559c91Kevin Qin } 5530dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5531767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // If all elements are constants and the case above didn't get hit, fall back 5532767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // to the default expansion, which will generate a load from the constant 5533767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // pool. 5534767f816b926376bd850a62a28d35343ad0559c91Kevin Qin if (isConstant) 5535767f816b926376bd850a62a28d35343ad0559c91Kevin Qin return SDValue(); 5536767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 5537dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Empirical tests suggest this is rarely worth it for vectors of length <= 2. 5538dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NumElts >= 4) { 5539dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue shuffle = ReconstructShuffle(Op, DAG); 5540dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (shuffle != SDValue()) 5541dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return shuffle; 554236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 55438a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 5544767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // If all else fails, just use a sequence of INSERT_VECTOR_ELT when we 5545767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // know the default expansion would otherwise fall back on something even 5546767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // worse. For a vector with one or two non-undef values, that's 5547767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // scalar_to_vector for the elements followed by a shuffle (provided the 5548767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // shuffle is valid for the target) and materialization element by element 5549767f816b926376bd850a62a28d35343ad0559c91Kevin Qin // on the stack followed by a load for everything else. 5550767f816b926376bd850a62a28d35343ad0559c91Kevin Qin if (!isConstant && !usesOnlyOneValue) { 5551767f816b926376bd850a62a28d35343ad0559c91Kevin Qin SDValue Vec = DAG.getUNDEF(VT); 5552dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Op0 = Op.getOperand(0); 5553dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ElemSize = VT.getVectorElementType().getSizeInBits(); 5554dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned i = 0; 5555dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For 32 and 64 bit types, use INSERT_SUBREG for lane zero to 5556dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // a) Avoid a RMW dependency on the full vector register, and 5557dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // b) Allow the register coalescer to fold away the copy if the 5558dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // value is already in an S or D register. 5559dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op0.getOpcode() != ISD::UNDEF && (ElemSize == 32 || ElemSize == 64)) { 5560dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned SubIdx = ElemSize == 32 ? AArch64::ssub : AArch64::dsub; 5561dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineSDNode *N = 5562dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, dl, VT, Vec, Op0, 5563dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getTargetConstant(SubIdx, MVT::i32)); 5564dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Vec = SDValue(N, 0); 5565dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++i; 5566dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5567dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (; i < NumElts; ++i) { 5568767f816b926376bd850a62a28d35343ad0559c91Kevin Qin SDValue V = Op.getOperand(i); 5569767f816b926376bd850a62a28d35343ad0559c91Kevin Qin if (V.getOpcode() == ISD::UNDEF) 5570767f816b926376bd850a62a28d35343ad0559c91Kevin Qin continue; 55718a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling SDValue LaneIdx = DAG.getConstant(i, MVT::i64); 5572dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); 5573767f816b926376bd850a62a28d35343ad0559c91Kevin Qin } 5574767f816b926376bd850a62a28d35343ad0559c91Kevin Qin return Vec; 5575767f816b926376bd850a62a28d35343ad0559c91Kevin Qin } 5576dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5577dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Just use the default expansion. We failed to find a better alternative. 557887773c318fcee853fb34a80a10c4347d523bdafbTim Northover return SDValue(); 557987773c318fcee853fb34a80a10c4347d523bdafbTim Northover} 558087773c318fcee853fb34a80a10c4347d523bdafbTim Northover 5581dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op, 5582dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 5583dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op.getOpcode() == ISD::INSERT_VECTOR_ELT && "Unknown opcode!"); 5584a08063a000cfc7499f08a472d85f14e7a5e90f8dKevin Qin 5585dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check for non-constant lane. 5586dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isa<ConstantSDNode>(Op.getOperand(2))) 5587dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5588a08063a000cfc7499f08a472d85f14e7a5e90f8dKevin Qin 5589dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getOperand(0).getValueType(); 5590a08063a000cfc7499f08a472d85f14e7a5e90f8dKevin Qin 5591dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Insertion/extraction are legal for V128 types. 5592dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::v16i8 || VT == MVT::v8i16 || VT == MVT::v4i32 || 5593dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT == MVT::v2i64 || VT == MVT::v4f32 || VT == MVT::v2f64) 5594dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 5595a08063a000cfc7499f08a472d85f14e7a5e90f8dKevin Qin 5596dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT != MVT::v8i8 && VT != MVT::v4i16 && VT != MVT::v2i32 && 5597dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT != MVT::v1i64 && VT != MVT::v2f32) 5598dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5599a08063a000cfc7499f08a472d85f14e7a5e90f8dKevin Qin 5600dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For V64 types, we perform insertion by expanding the value 5601dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to a V128 type and perform the insertion on that. 5602dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 5603dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue WideVec = WidenVector(Op.getOperand(0), DAG); 5604dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT WideTy = WideVec.getValueType(); 5605dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5606dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Node = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, WideTy, WideVec, 5607dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(1), Op.getOperand(2)); 5608dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Re-narrow the resultant vector. 5609dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return NarrowVector(Node, DAG); 5610dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5611dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5612dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue 5613dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op, 5614dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 5615dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op.getOpcode() == ISD::EXTRACT_VECTOR_ELT && "Unknown opcode!"); 5616dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5617dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check for non-constant lane. 5618dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isa<ConstantSDNode>(Op.getOperand(1))) 5619dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5620dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5621dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getOperand(0).getValueType(); 5622dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5623dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Insertion/extraction are legal for V128 types. 5624dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT == MVT::v16i8 || VT == MVT::v8i16 || VT == MVT::v4i32 || 5625dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT == MVT::v2i64 || VT == MVT::v4f32 || VT == MVT::v2f64) 5626dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 5627dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5628dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT != MVT::v8i8 && VT != MVT::v4i16 && VT != MVT::v2i32 && 5629dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT != MVT::v1i64 && VT != MVT::v2f32) 5630dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5631dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5632dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For V64 types, we perform extraction by expanding the value 5633dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to a V128 type and perform the extraction on that. 5634dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 5635dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue WideVec = WidenVector(Op.getOperand(0), DAG); 5636dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT WideTy = WideVec.getValueType(); 5637dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5638dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ExtrTy = WideTy.getVectorElementType(); 5639dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ExtrTy == MVT::i16 || ExtrTy == MVT::i8) 5640dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ExtrTy = MVT::i32; 5641dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5642dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For extractions, we just return the result directly. 5643dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ExtrTy, WideVec, 5644dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(1)); 5645dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5646dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5647dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerEXTRACT_SUBVECTOR(SDValue Op, 5648dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 5649dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getOperand(0).getValueType(); 5650dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 5651dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Just in case... 5652dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isVector()) 5653dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5654dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5655dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *Cst = dyn_cast<ConstantSDNode>(Op.getOperand(1)); 5656dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Cst) 5657dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5658dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Val = Cst->getZExtValue(); 5659dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5660dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Size = Op.getValueType().getSizeInBits(); 5661dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Val == 0) { 5662dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Size) { 5663dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 8: 5664dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getTargetExtractSubreg(AArch64::bsub, dl, Op.getValueType(), 5665dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(0)); 5666dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 16: 5667dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getTargetExtractSubreg(AArch64::hsub, dl, Op.getValueType(), 5668dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(0)); 5669dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 32: 5670dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getTargetExtractSubreg(AArch64::ssub, dl, Op.getValueType(), 5671dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(0)); 5672dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case 64: 5673dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getTargetExtractSubreg(AArch64::dsub, dl, Op.getValueType(), 5674dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(0)); 5675dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 5676dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unexpected vector type in extract_subvector!"); 5677dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5678dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5679dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If this is extracting the upper 64-bits of a 128-bit vector, we match 5680dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // that directly. 5681dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Size == 64 && Val * VT.getVectorElementType().getSizeInBits() == 64) 5682dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 5683dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5684dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5685dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5686dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5687dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &M, 5688dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT) const { 5689dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getVectorNumElements() == 4 && 5690dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (VT.is128BitVector() || VT.is64BitVector())) { 5691dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned PFIndexes[4]; 5692dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i != 4; ++i) { 5693dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (M[i] < 0) 5694dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PFIndexes[i] = 8; 5695dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 5696dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PFIndexes[i] = M[i]; 5697dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5698dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5699dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Compute the index in the perfect shuffle table. 5700dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned PFTableIndex = PFIndexes[0] * 9 * 9 * 9 + PFIndexes[1] * 9 * 9 + 5701dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PFIndexes[2] * 9 + PFIndexes[3]; 5702dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned PFEntry = PerfectShuffleTable[PFTableIndex]; 5703dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Cost = (PFEntry >> 30); 5704dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5705dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Cost <= 4) 5706dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 5707dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5708dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5709dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool DummyBool; 5710dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int DummyInt; 5711dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned DummyUnsigned; 5712dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5713dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return (ShuffleVectorSDNode::isSplatMask(&M[0], VT) || isREVMask(M, VT, 64) || 5714dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isREVMask(M, VT, 32) || isREVMask(M, VT, 16) || 5715dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isEXTMask(M, VT, DummyBool, DummyUnsigned) || 5716dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // isTBLMask(M, VT) || // FIXME: Port TBL support from ARM. 5717dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isTRNMask(M, VT, DummyUnsigned) || isUZPMask(M, VT, DummyUnsigned) || 5718dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isZIPMask(M, VT, DummyUnsigned) || 5719dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isTRN_v_undef_Mask(M, VT, DummyUnsigned) || 5720dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isUZP_v_undef_Mask(M, VT, DummyUnsigned) || 5721dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isZIP_v_undef_Mask(M, VT, DummyUnsigned) || 5722dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isINSMask(M, VT.getVectorNumElements(), DummyBool, DummyInt) || 5723dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isConcatMask(M, VT, VT.getSizeInBits() == 128)); 5724dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5725dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5726dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// getVShiftImm - Check if this is a valid build_vector for the immediate 5727dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// operand of a vector shift operation, where all the elements of the 5728dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// build_vector must have the same constant integer value. 5729dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) { 5730dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Ignore bit_converts. 5731dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines while (Op.getOpcode() == ISD::BITCAST) 5732dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op = Op.getOperand(0); 5733dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); 5734dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt SplatBits, SplatUndef; 5735dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned SplatBitSize; 5736dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool HasAnyUndefs; 5737dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!BVN || !BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, 5738dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines HasAnyUndefs, ElementBits) || 5739dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SplatBitSize > ElementBits) 5740dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 5741dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cnt = SplatBits.getSExtValue(); 5742dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 5743dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5744dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5745dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// isVShiftLImm - Check if this is a valid build_vector for the immediate 5746dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// operand of a vector shift left operation. That value must be in the range: 5747dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 0 <= Value < ElementBits for a left shift; or 5748dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 0 <= Value <= ElementBits for a long left shift. 5749dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) { 5750dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(VT.isVector() && "vector shift count is not a vector type"); 5751dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ElementBits = VT.getVectorElementType().getSizeInBits(); 5752dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!getVShiftImm(Op, ElementBits, Cnt)) 5753dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 5754dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return (Cnt >= 0 && (isLong ? Cnt - 1 : Cnt) < ElementBits); 5755dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5756dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5757dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// isVShiftRImm - Check if this is a valid build_vector for the immediate 5758dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// operand of a vector shift right operation. For a shift opcode, the value 5759dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// is positive, but for an intrinsic the value count must be negative. The 5760dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// absolute value must be in the range: 5761dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 1 <= |Value| <= ElementBits for a right shift; or 5762dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// 1 <= |Value| <= ElementBits/2 for a narrow right shift. 5763dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isVShiftRImm(SDValue Op, EVT VT, bool isNarrow, bool isIntrinsic, 5764dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int64_t &Cnt) { 5765dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(VT.isVector() && "vector shift count is not a vector type"); 5766dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ElementBits = VT.getVectorElementType().getSizeInBits(); 5767dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!getVShiftImm(Op, ElementBits, Cnt)) 5768dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 5769dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isIntrinsic) 5770dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cnt = -Cnt; 5771dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return (Cnt >= 1 && Cnt <= (isNarrow ? ElementBits / 2 : ElementBits)); 5772dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5773dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5774dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerVectorSRA_SRL_SHL(SDValue Op, 5775dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 5776dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op.getValueType(); 5777dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(Op); 5778dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int64_t Cnt; 5779dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5780dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Op.getOperand(1).getValueType().isVector()) 5781dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Op; 5782dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned EltSize = VT.getVectorElementType().getSizeInBits(); 5783dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5784dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Op.getOpcode()) { 5785dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 5786dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("unexpected shift opcode"); 5787dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5788dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SHL: 5789dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isVShiftLImm(Op.getOperand(1), VT, false, Cnt) && Cnt < EltSize) 5790dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::VSHL, SDLoc(Op), VT, Op.getOperand(0), 5791dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Cnt, MVT::i32)); 5792dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, 5793dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Intrinsic::aarch64_neon_ushl, MVT::i32), 5794dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op.getOperand(0), Op.getOperand(1)); 5795dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SRA: 5796dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SRL: 5797dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Right shift immediate 5798dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isVShiftRImm(Op.getOperand(1), VT, false, false, Cnt) && 5799dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cnt < EltSize) { 5800dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = 5801dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (Op.getOpcode() == ISD::SRA) ? AArch64ISD::VASHR : AArch64ISD::VLSHR; 5802dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opc, SDLoc(Op), VT, Op.getOperand(0), 5803dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Cnt, MVT::i32)); 5804dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5805dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5806dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Right shift register. Note, there is not a shift right register 5807dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // instruction, but the shift left register instruction takes a signed 5808dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // value, where negative numbers specify a right shift. 5809dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opc = (Op.getOpcode() == ISD::SRA) ? Intrinsic::aarch64_neon_sshl 5810dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : Intrinsic::aarch64_neon_ushl; 5811dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // negate the shift amount 5812dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue NegShift = DAG.getNode(AArch64ISD::NEG, DL, VT, Op.getOperand(1)); 5813dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue NegShiftLeft = 5814dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, 5815dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Opc, MVT::i32), Op.getOperand(0), NegShift); 5816dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return NegShiftLeft; 5817dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5818dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5819dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5820dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5821dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5822dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue EmitVectorComparison(SDValue LHS, SDValue RHS, 5823dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode CC, bool NoNans, EVT VT, 5824dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl, SelectionDAG &DAG) { 5825dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT SrcVT = LHS.getValueType(); 5826dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5827dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(RHS.getNode()); 5828dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt CnstBits(VT.getSizeInBits(), 0); 5829dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt UndefBits(VT.getSizeInBits(), 0); 5830dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsCnst = BVN && resolveBuildVector(BVN, CnstBits, UndefBits); 5831dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsZero = IsCnst && (CnstBits == 0); 5832dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5833dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SrcVT.getVectorElementType().isFloatingPoint()) { 5834dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (CC) { 5835dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 5836dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5837dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::NE: { 5838dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Fcmeq; 5839dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5840dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Fcmeq = DAG.getNode(AArch64ISD::FCMEQz, dl, VT, LHS); 5841dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 5842dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Fcmeq = DAG.getNode(AArch64ISD::FCMEQ, dl, VT, LHS, RHS); 5843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::NOT, dl, VT, Fcmeq); 5844dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5845dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::EQ: 5846dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5847dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMEQz, dl, VT, LHS); 5848dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMEQ, dl, VT, LHS, RHS); 5849dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::GE: 5850dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5851dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMGEz, dl, VT, LHS); 5852dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMGE, dl, VT, LHS, RHS); 5853dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::GT: 5854dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5855dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMGTz, dl, VT, LHS); 5856dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMGT, dl, VT, LHS, RHS); 5857dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::LS: 5858dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMLEz, dl, VT, LHS); 5860dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMGE, dl, VT, RHS, LHS); 5861dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::LT: 5862dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!NoNans) 5863dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we ignore NaNs then we can use to the MI implementation. 5865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Fallthrough. 5866dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::MI: 5867dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5868dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMLTz, dl, VT, LHS); 5869dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FCMGT, dl, VT, RHS, LHS); 5870dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5871dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5872dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5873dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (CC) { 5874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 5875dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5876dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::NE: { 5877dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmeq; 5878dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5879dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cmeq = DAG.getNode(AArch64ISD::CMEQz, dl, VT, LHS); 5880dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 5881dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cmeq = DAG.getNode(AArch64ISD::CMEQ, dl, VT, LHS, RHS); 5882dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::NOT, dl, VT, Cmeq); 5883dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5884dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::EQ: 5885dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5886dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMEQz, dl, VT, LHS); 5887dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMEQ, dl, VT, LHS, RHS); 5888dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::GE: 5889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5890dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMGEz, dl, VT, LHS); 5891dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMGE, dl, VT, LHS, RHS); 5892dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::GT: 5893dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5894dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMGTz, dl, VT, LHS); 5895dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMGT, dl, VT, LHS, RHS); 5896dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::LE: 5897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5898dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMLEz, dl, VT, LHS); 5899dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMGE, dl, VT, RHS, LHS); 5900dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::LS: 5901dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMHS, dl, VT, RHS, LHS); 5902dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::LO: 5903dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMHI, dl, VT, RHS, LHS); 5904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::LT: 5905dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsZero) 5906dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMLTz, dl, VT, LHS); 5907dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMGT, dl, VT, RHS, LHS); 5908dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::HI: 5909dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMHI, dl, VT, LHS, RHS); 5910dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64CC::HS: 5911dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CMHS, dl, VT, LHS, RHS); 5912dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5913dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5914dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5915dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::LowerVSETCC(SDValue Op, 5916dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 5917dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); 5918dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = Op.getOperand(0); 5919dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = Op.getOperand(1); 5920dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 5921dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5922dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getValueType().getVectorElementType().isInteger()) { 5923dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHS.getValueType() == RHS.getValueType()); 5924dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode AArch64CC = changeIntCCToAArch64CC(CC); 5925dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return EmitVectorComparison(LHS, RHS, AArch64CC, false, Op.getValueType(), 5926dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines dl, DAG); 5927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5928dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHS.getValueType().getVectorElementType() == MVT::f32 || 5930dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS.getValueType().getVectorElementType() == MVT::f64); 5931dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5932dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Unfortunately, the mapping of LLVM FP CC's onto AArch64 CC's isn't totally 5933dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // clean. Some of them require two branches to implement. 5934dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode CC1, CC2; 5935dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool ShouldInvert; 5936dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines changeVectorFPCCToAArch64CC(CC, CC1, CC2, ShouldInvert); 5937dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5938dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool NoNaNs = getTargetMachine().Options.NoNaNsFPMath; 5939dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = 5940dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EmitVectorComparison(LHS, RHS, CC1, NoNaNs, Op.getValueType(), dl, DAG); 5941dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Cmp.getNode()) 5942dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5943dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5944dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC2 != AArch64CC::AL) { 5945dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp2 = 5946dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EmitVectorComparison(LHS, RHS, CC2, NoNaNs, Op.getValueType(), dl, DAG); 5947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Cmp2.getNode()) 5948dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 5949dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5950dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cmp = DAG.getNode(ISD::OR, dl, Cmp.getValueType(), Cmp, Cmp2); 5951dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5952dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5953dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ShouldInvert) 5954dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Cmp = DAG.getNOT(dl, Cmp, Cmp.getValueType()); 5955dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5956dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Cmp; 5957dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 5958dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 5959dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// getTgtMemIntrinsic - Represent NEON load and store intrinsics as 5960dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// MemIntrinsicNodes. The associated MachineMemOperands record the alignment 5961dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// specified in the intrinsic calls. 5962dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, 5963dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const CallInst &I, 5964dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Intrinsic) const { 5965dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (Intrinsic) { 5966dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2: 5967dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3: 5968dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4: 5969dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x2: 5970dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x3: 5971dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x4: 5972dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2lane: 5973dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3lane: 5974dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4lane: 5975dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2r: 5976dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3r: 5977dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4r: { 5978dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.opc = ISD::INTRINSIC_W_CHAIN; 5979dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Conservatively set memVT to the entire set of vectors loaded. 5980dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t NumElts = getDataLayout()->getTypeAllocSize(I.getType()) / 8; 5981dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.memVT = EVT::getVectorVT(I.getType()->getContext(), MVT::i64, NumElts); 5982dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.ptrVal = I.getArgOperand(I.getNumArgOperands() - 1); 5983dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.offset = 0; 5984dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.align = 0; 5985dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.vol = false; // volatile loads with NEON intrinsics not supported 5986dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.readMem = true; 5987dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.writeMem = false; 5988dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 5989dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 5990dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st2: 5991dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st3: 5992dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st4: 5993dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x2: 5994dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x3: 5995dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x4: 5996dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st2lane: 5997dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st3lane: 5998dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st4lane: { 5999dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.opc = ISD::INTRINSIC_VOID; 6000dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Conservatively set memVT to the entire set of vectors stored. 6001dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = 0; 6002dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned ArgI = 1, ArgE = I.getNumArgOperands(); ArgI < ArgE; ++ArgI) { 6003dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *ArgTy = I.getArgOperand(ArgI)->getType(); 6004dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!ArgTy->isVectorTy()) 6005dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 6006dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumElts += getDataLayout()->getTypeAllocSize(ArgTy) / 8; 6007dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6008dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.memVT = EVT::getVectorVT(I.getType()->getContext(), MVT::i64, NumElts); 6009dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.ptrVal = I.getArgOperand(I.getNumArgOperands() - 1); 6010dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.offset = 0; 6011dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.align = 0; 6012dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.vol = false; // volatile stores with NEON intrinsics not supported 6013dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.readMem = false; 6014dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.writeMem = true; 6015dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6016dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6017dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_ldaxr: 6018dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_ldxr: { 6019dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PointerType *PtrTy = cast<PointerType>(I.getArgOperand(0)->getType()); 6020dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.opc = ISD::INTRINSIC_W_CHAIN; 6021dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.memVT = MVT::getVT(PtrTy->getElementType()); 6022dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.ptrVal = I.getArgOperand(0); 6023dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.offset = 0; 6024dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.align = getDataLayout()->getABITypeAlignment(PtrTy->getElementType()); 6025dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.vol = true; 6026dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.readMem = true; 6027dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.writeMem = false; 6028dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6029dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6030dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_stlxr: 6031dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_stxr: { 6032dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines PointerType *PtrTy = cast<PointerType>(I.getArgOperand(1)->getType()); 6033dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.opc = ISD::INTRINSIC_W_CHAIN; 6034dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.memVT = MVT::getVT(PtrTy->getElementType()); 6035dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.ptrVal = I.getArgOperand(1); 6036dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.offset = 0; 6037dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.align = getDataLayout()->getABITypeAlignment(PtrTy->getElementType()); 6038dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.vol = true; 6039dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.readMem = false; 6040dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.writeMem = true; 6041dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6042dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6043dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_ldaxp: 6044dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_ldxp: { 6045dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.opc = ISD::INTRINSIC_W_CHAIN; 6046dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.memVT = MVT::i128; 6047dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.ptrVal = I.getArgOperand(0); 6048dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.offset = 0; 6049dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.align = 16; 6050dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.vol = true; 6051dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.readMem = true; 6052dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.writeMem = false; 6053dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6054dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6055dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_stlxp: 6056dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_stxp: { 6057dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.opc = ISD::INTRINSIC_W_CHAIN; 6058dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.memVT = MVT::i128; 6059dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.ptrVal = I.getArgOperand(2); 6060dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.offset = 0; 6061dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.align = 16; 6062dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.vol = true; 6063dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.readMem = false; 6064dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Info.writeMem = true; 6065dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6066dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6067dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 6068dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 6069dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6070dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6071dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6072dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6073dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6074dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Truncations from 64-bit GPR to 32-bit GPR is free. 6075dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const { 6076dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy()) 6077dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6078dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits1 = Ty1->getPrimitiveSizeInBits(); 6079dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits2 = Ty2->getPrimitiveSizeInBits(); 6080cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return NumBits1 > NumBits2; 6081dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6082dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { 6083cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger()) 6084dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6085dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits1 = VT1.getSizeInBits(); 6086dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits2 = VT2.getSizeInBits(); 6087cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return NumBits1 > NumBits2; 6088dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6089dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6090dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// All 32-bit GPR operations implicitly zero the high-half of the corresponding 6091dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 64-bit GPR. 6092dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const { 6093dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Ty1->isIntegerTy() || !Ty2->isIntegerTy()) 6094dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6095dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits1 = Ty1->getPrimitiveSizeInBits(); 6096dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits2 = Ty2->getPrimitiveSizeInBits(); 6097cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return NumBits1 == 32 && NumBits2 == 64; 6098dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6099dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { 6100cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger()) 6101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits1 = VT1.getSizeInBits(); 6103dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits2 = VT2.getSizeInBits(); 6104cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return NumBits1 == 32 && NumBits2 == 64; 6105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6106dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isZExtFree(SDValue Val, EVT VT2) const { 6108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT1 = Val.getValueType(); 6109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isZExtFree(VT1, VT2)) { 6110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6111dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6113dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Val.getOpcode() != ISD::LOAD) 6114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6115dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6116dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 8-, 16-, and 32-bit integer loads all implicitly zero-extend. 6117cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return (VT1.isSimple() && !VT1.isVector() && VT1.isInteger() && 6118cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines VT2.isSimple() && !VT2.isVector() && VT2.isInteger() && 6119cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines VT1.getSizeInBits() <= 32); 6120dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6122dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::hasPairedLoad(Type *LoadedType, 6123dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned &RequiredAligment) const { 6124dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!LoadedType->isIntegerTy() && !LoadedType->isFloatTy()) 6125dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Cyclone supports unaligned accesses. 6127dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RequiredAligment = 0; 6128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits = LoadedType->getPrimitiveSizeInBits(); 6129dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return NumBits == 32 || NumBits == 64; 6130dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6131dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6132dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::hasPairedLoad(EVT LoadedType, 6133dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned &RequiredAligment) const { 6134dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!LoadedType.isSimple() || 6135dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (!LoadedType.isInteger() && !LoadedType.isFloatingPoint())) 6136dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6137dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Cyclone supports unaligned accesses. 6138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RequiredAligment = 0; 6139dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBits = LoadedType.getSizeInBits(); 6140dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return NumBits == 32 || NumBits == 64; 6141dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6142dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6143dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, 6144dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned AlignCheck) { 6145dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return ((SrcAlign == 0 || SrcAlign % AlignCheck == 0) && 6146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (DstAlign == 0 || DstAlign % AlignCheck == 0)); 6147dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6148dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6149dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesEVT AArch64TargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, 6150dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned SrcAlign, bool IsMemset, 6151dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool ZeroMemset, 6152dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool MemcpyStrSrc, 6153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFunction &MF) const { 6154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Don't use AdvSIMD to implement 16-byte memset. It would have taken one 6155dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // instruction to materialize the v2i64 zero and one store (with restrictive 6156dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // addressing mode). Just do two i64 store of zero-registers. 6157dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool Fast; 6158dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const Function *F = MF.getFunction(); 6159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Subtarget->hasFPARMv8() && !IsMemset && Size >= 16 && 6160dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines !F->getAttributes().hasAttribute(AttributeSet::FunctionIndex, 6161dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Attribute::NoImplicitFloat) && 6162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (memOpAlign(SrcAlign, DstAlign, 16) || 6163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (allowsUnalignedMemoryAccesses(MVT::f128, 0, &Fast) && Fast))) 6164dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return MVT::f128; 6165dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6166dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Size >= 8 ? MVT::i64 : MVT::i32; 6167dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6168dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6169dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 12-bit optionally shifted immediates are legal for adds. 6170dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isLegalAddImmediate(int64_t Immed) const { 6171dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((Immed >> 12) == 0 || ((Immed & 0xfff) == 0 && Immed >> 24 == 0)) 6172dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6173dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6174dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6175dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6176dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Integer comparisons are implemented with ADDS/SUBS, so the range of valid 6177dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// immediates is the same as for an add or a sub. 6178dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isLegalICmpImmediate(int64_t Immed) const { 6179dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Immed < 0) 6180dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Immed *= -1; 6181dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return isLegalAddImmediate(Immed); 6182dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6183dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6184dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// isLegalAddressingMode - Return true if the addressing mode represented 6185dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// by AM is legal for this target, for a load/store of the specified type. 6186dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isLegalAddressingMode(const AddrMode &AM, 6187dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *Ty) const { 6188dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // AArch64 has five basic addressing modes: 6189dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // reg 6190dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // reg + 9-bit signed offset 6191dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // reg + SIZE_IN_BYTES * 12-bit unsigned offset 6192dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // reg1 + reg2 6193dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // reg + SIZE_IN_BYTES * reg 6194dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6195dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // No global is ever allowed as a base. 6196dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AM.BaseGV) 6197dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6198dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6199dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // No reg+reg+imm addressing. 6200dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AM.HasBaseReg && AM.BaseOffs && AM.Scale) 6201dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6202dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6203dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // check reg + imm case: 6204dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // i.e., reg + 0, reg + imm9, reg + SIZE_IN_BYTES * uimm12 6205dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t NumBytes = 0; 6206dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Ty->isSized()) { 6207dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t NumBits = getDataLayout()->getTypeSizeInBits(Ty); 6208dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumBytes = NumBits / 8; 6209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isPowerOf2_64(NumBits)) 6210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumBytes = 0; 6211dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6212dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6213dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!AM.Scale) { 6214dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int64_t Offset = AM.BaseOffs; 6215dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6216dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 9-bit signed offset 6217dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Offset >= -(1LL << 9) && Offset <= (1LL << 9) - 1) 6218dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6219dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6220dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 12-bit unsigned offset 6221dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned shift = Log2_64(NumBytes); 6222dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NumBytes && Offset > 0 && (Offset / NumBytes) <= (1LL << 12) - 1 && 6223dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Must be a multiple of NumBytes (NumBytes is a power of 2) 6224dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (Offset >> shift) << shift == Offset) 6225dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6226dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6227dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6228dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6229dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check reg1 + SIZE_IN_BYTES * reg2 and reg1 + reg2 6230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6231dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!AM.Scale || AM.Scale == 1 || 6232dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (AM.Scale > 0 && (uint64_t)AM.Scale == NumBytes)) 6233dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6234dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6236dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6237dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesint AArch64TargetLowering::getScalingFactorCost(const AddrMode &AM, 6238dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *Ty) const { 6239dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Scaling factors are not free at all. 6240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Operands | Rt Latency 6241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // ------------------------------------------- 6242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Rt, [Xn, Xm] | 4 6243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // ------------------------------------------- 6244dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Rt, [Xn, Xm, lsl #imm] | Rn: 4 Rm: 5 6245dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Rt, [Xn, Wm, <extend> #imm] | 6246dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isLegalAddressingMode(AM, Ty)) 6247dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Scale represents reg2 * scale, thus account for 1 if 6248dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // it is not equal to 0 or 1. 6249dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return AM.Scale != 0 && AM.Scale != 1; 6250dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return -1; 6251dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6253dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const { 6254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT = VT.getScalarType(); 6255dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isSimple()) 6257dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6259dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (VT.getSimpleVT().SimpleTy) { 6260dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case MVT::f32: 6261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case MVT::f64: 6262dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6263dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 6264dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 6265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6266dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6267dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6269dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesconst MCPhysReg * 6271dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::getScratchRegisters(CallingConv::ID) const { 6272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // LR is a callee-save register, but we must treat it as clobbered by any call 6273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // site. Hence we include LR in the scratch registers, which are in turn added 6274dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // as implicit-defs for stackmaps and patchpoints. 6275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines static const MCPhysReg ScratchRegs[] = { 6276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64::X16, AArch64::X17, AArch64::LR, 0 6277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines }; 6278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return ScratchRegs; 6279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6280dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6281dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool 6282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesAArch64TargetLowering::isDesirableToCommuteWithShift(const SDNode *N) const { 6283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If N is unsigned bit extraction: ((x >> C) & mask), then do not combine 6285dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // it with shift to let it be lowered to UBFX. 6286dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N->getOpcode() == ISD::AND && (VT == MVT::i32 || VT == MVT::i64) && 6287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isa<ConstantSDNode>(N->getOperand(1))) { 6288dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t TruncMask = N->getConstantOperandVal(1); 6289dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isMask_64(TruncMask) && 6290dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N->getOperand(0).getOpcode() == ISD::SRL && 6291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isa<ConstantSDNode>(N->getOperand(0)->getOperand(1))) 6292dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6294dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6296dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6297dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm, 6298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *Ty) const { 6299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Ty->isIntegerTy()); 6300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned BitSize = Ty->getPrimitiveSizeInBits(); 6302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (BitSize == 0) 6303dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6305dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int64_t Val = Imm.getSExtValue(); 6306dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Val == 0 || AArch64_AM::isLogicalImmediate(Val, BitSize)) 6307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6309dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((int64_t)Val < 0) 6310dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Val = ~Val; 6311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (BitSize == 32) 6312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Val &= (1LL << 32) - 1; 6313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned LZ = countLeadingZeros((uint64_t)Val); 6315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Shift = (63 - LZ) / 16; 6316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // MOVZ is free so return true for one or fewer MOVK. 6317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return (Shift < 3) ? true : false; 6318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Generate SUBS and CSEL for integer abs. 6321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performIntegerAbsCombine(SDNode *N, SelectionDAG &DAG) { 6322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6324dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue N0 = N->getOperand(0); 6325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue N1 = N->getOperand(1); 6326dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(N); 6327dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check pattern of XOR(ADD(X,Y), Y) where Y is SRA(X, size(X)-1) 6329dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // and change it to SUB and CSEL. 6330dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.isInteger() && N->getOpcode() == ISD::XOR && 6331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1 && 6332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N1.getOpcode() == ISD::SRA && N1.getOperand(0) == N0.getOperand(0)) 6333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ConstantSDNode *Y1C = dyn_cast<ConstantSDNode>(N1.getOperand(1))) 6334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Y1C->getAPIntValue() == VT.getSizeInBits() - 1) { 6335dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, VT), 6336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N0.getOperand(0)); 6337dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Generate SUBS & CSEL. 6338dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = 6339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(AArch64ISD::SUBS, DL, DAG.getVTList(VT, MVT::i32), 6340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N0.getOperand(0), DAG.getConstant(0, VT)); 6341dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CSEL, DL, VT, N0.getOperand(0), Neg, 6342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(AArch64CC::PL, MVT::i32), 6343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue(Cmp.getNode(), 1)); 6344dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6345dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6346dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// performXorCombine - Attempts to handle integer ABS. 6349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performXorCombine(SDNode *N, SelectionDAG &DAG, 6350dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 6351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64Subtarget *Subtarget) { 6352dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalizeOps()) 6353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performIntegerAbsCombine(N, DAG); 6356dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6357dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6358dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performMulCombine(SDNode *N, SelectionDAG &DAG, 6359dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 6360dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64Subtarget *Subtarget) { 6361dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalizeOps()) 6362dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6364dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Multiplication of a power of two plus/minus one can be done more 6365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // cheaply as as shift+add/sub. For now, this is true unilaterally. If 6366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // future CPUs have a cheaper MADD instruction, this may need to be 6367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // gated on a subtarget feature. For Cyclone, 32-bit MADD is 4 cycles and 6368dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 64-bit is 5 cycles, so this is always a win. 6369dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1))) { 6370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt Value = C->getAPIntValue(); 6371dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6372cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (Value.isNonNegative()) { 6373cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // (mul x, 2^N + 1) => (add (shl x, N), x) 6374cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines APInt VM1 = Value - 1; 6375cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VM1.isPowerOf2()) { 6376cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue ShiftedVal = 6377cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getNode(ISD::SHL, SDLoc(N), VT, N->getOperand(0), 6378cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getConstant(VM1.logBase2(), MVT::i64)); 6379cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return DAG.getNode(ISD::ADD, SDLoc(N), VT, ShiftedVal, 6380cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines N->getOperand(0)); 6381cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 6382cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // (mul x, 2^N - 1) => (sub (shl x, N), x) 6383cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines APInt VP1 = Value + 1; 6384cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VP1.isPowerOf2()) { 6385cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue ShiftedVal = 6386cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getNode(ISD::SHL, SDLoc(N), VT, N->getOperand(0), 6387cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getConstant(VP1.logBase2(), MVT::i64)); 6388cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return DAG.getNode(ISD::SUB, SDLoc(N), VT, ShiftedVal, 6389cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines N->getOperand(0)); 6390cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 6391cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } else { 6392cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // (mul x, -(2^N + 1)) => - (add (shl x, N), x) 6393cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines APInt VNM1 = -Value - 1; 6394cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VNM1.isPowerOf2()) { 6395cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue ShiftedVal = 6396cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getNode(ISD::SHL, SDLoc(N), VT, N->getOperand(0), 6397cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getConstant(VNM1.logBase2(), MVT::i64)); 6398cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue Add = 6399cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getNode(ISD::ADD, SDLoc(N), VT, ShiftedVal, N->getOperand(0)); 6400cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return DAG.getNode(ISD::SUB, SDLoc(N), VT, DAG.getConstant(0, VT), Add); 6401cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 6402cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // (mul x, -(2^N - 1)) => (sub x, (shl x, N)) 6403cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines APInt VNP1 = -Value + 1; 6404cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (VNP1.isPowerOf2()) { 6405cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines SDValue ShiftedVal = 6406cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getNode(ISD::SHL, SDLoc(N), VT, N->getOperand(0), 6407cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines DAG.getConstant(VNP1.logBase2(), MVT::i64)); 6408cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return DAG.getNode(ISD::SUB, SDLoc(N), VT, N->getOperand(0), 6409cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines ShiftedVal); 6410cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines } 6411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6412dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6413dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6414dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6415dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performIntToFpCombine(SDNode *N, SelectionDAG &DAG) { 6417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT != MVT::f32 && VT != MVT::f64) 6419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Only optimize when the source and destination types have the same width. 6421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() != N->getOperand(0).getValueType().getSizeInBits()) 6422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the result of an integer load is only used by an integer-to-float 6425dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // conversion, use a fp load instead and a AdvSIMD scalar {S|U}CVTF instead. 6426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This eliminates an "integer-to-vector-move UOP and improve throughput. 6427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue N0 = N->getOperand(0); 6428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse() && 6429dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Do not change the width of a volatile load. 6430dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines !cast<LoadSDNode>(N0)->isVolatile()) { 6431dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LoadSDNode *LN0 = cast<LoadSDNode>(N0); 6432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Load = DAG.getLoad(VT, SDLoc(N), LN0->getChain(), LN0->getBasePtr(), 6433dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LN0->getPointerInfo(), LN0->isVolatile(), 6434dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LN0->isNonTemporal(), LN0->isInvariant(), 6435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LN0->getAlignment()); 6436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Make sure successors of the original load stay after it by updating them 6438dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to use the new Chain. 6439dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.ReplaceAllUsesOfValueWith(SDValue(LN0, 1), Load.getValue(1)); 6440dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6441dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opcode = 6442dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines (N->getOpcode() == ISD::SINT_TO_FP) ? AArch64ISD::SITOF : AArch64ISD::UITOF; 6443dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opcode, SDLoc(N), VT, Load); 6444dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6445dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6446dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6447dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6448dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6449dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// An EXTR instruction is made up of two shifts, ORed together. This helper 6450dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// searches for and classifies those shifts. 6451dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool findEXTRHalf(SDValue N, SDValue &Src, uint32_t &ShiftAmount, 6452dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool &FromHi) { 6453dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N.getOpcode() == ISD::SHL) 6454dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FromHi = false; 6455dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (N.getOpcode() == ISD::SRL) 6456dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FromHi = true; 6457dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 6458dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isa<ConstantSDNode>(N.getOperand(1))) 6461dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6462dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6463dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ShiftAmount = N->getConstantOperandVal(1); 6464dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Src = N->getOperand(0); 6465dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6466dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6467dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6468dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// EXTR instruction extracts a contiguous chunk of bits from two existing 6469dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// registers viewed as a high/low pair. This function looks for the pattern: 6470dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// (or (shl VAL1, #N), (srl VAL2, #RegWidth-N)) and replaces it with an 6471dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// EXTR. Can't quite be done in TableGen because the two immediates aren't 6472dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// independent. 6473dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryCombineToEXTR(SDNode *N, 6474dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI) { 6475dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG = DCI.DAG; 6476dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(N); 6477dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6479dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(N->getOpcode() == ISD::OR && "Unexpected root"); 6480dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6481dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT != MVT::i32 && VT != MVT::i64) 6482dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6483dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6484dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS; 6485dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint32_t ShiftLHS = 0; 6486dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool LHSFromHi = 0; 6487dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!findEXTRHalf(N->getOperand(0), LHS, ShiftLHS, LHSFromHi)) 6488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6489dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6490dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS; 6491dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint32_t ShiftRHS = 0; 6492dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool RHSFromHi = 0; 6493dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!findEXTRHalf(N->getOperand(1), RHS, ShiftRHS, RHSFromHi)) 6494dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6495dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6496dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If they're both trying to come from the high part of the register, they're 6497dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // not really an EXTR. 6498dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHSFromHi == RHSFromHi) 6499dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6500dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6501dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ShiftLHS + ShiftRHS != VT.getSizeInBits()) 6502dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6503dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6504dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHSFromHi) { 6505dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(LHS, RHS); 6506dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(ShiftLHS, ShiftRHS); 6507dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6508dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6509dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::EXTR, DL, VT, LHS, RHS, 6510dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(ShiftRHS, MVT::i64)); 6511dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6512dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6513dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryCombineToBSL(SDNode *N, 6514dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI) { 6515dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6516dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG = DCI.DAG; 6517dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(N); 6518dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6519dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isVector()) 6520dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6521dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6522dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue N0 = N->getOperand(0); 6523dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N0.getOpcode() != ISD::AND) 6524dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6525dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6526dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue N1 = N->getOperand(1); 6527dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N1.getOpcode() != ISD::AND) 6528dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6529dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6530dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We only have to look for constant vectors here since the general, variable 6531dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // case can be handled in TableGen. 6532dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Bits = VT.getVectorElementType().getSizeInBits(); 6533dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t BitMask = Bits == 64 ? -1ULL : ((1ULL << Bits) - 1); 6534dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (int i = 1; i >= 0; --i) 6535dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (int j = 1; j >= 0; --j) { 6536dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVectorSDNode *BVN0 = dyn_cast<BuildVectorSDNode>(N0->getOperand(i)); 6537dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BuildVectorSDNode *BVN1 = dyn_cast<BuildVectorSDNode>(N1->getOperand(j)); 6538dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!BVN0 || !BVN1) 6539dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 6540dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6541dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool FoundMatch = true; 6542dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned k = 0; k < VT.getVectorNumElements(); ++k) { 6543dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CN0 = dyn_cast<ConstantSDNode>(BVN0->getOperand(k)); 6544dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CN1 = dyn_cast<ConstantSDNode>(BVN1->getOperand(k)); 6545dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!CN0 || !CN1 || 6546dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CN0->getZExtValue() != (BitMask & ~CN1->getZExtValue())) { 6547dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines FoundMatch = false; 6548dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 6549dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6550dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6551dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6552dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (FoundMatch) 6553dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::BSL, DL, VT, SDValue(BVN0, 0), 6554dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N0->getOperand(1 - i), N1->getOperand(1 - j)); 6555dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6556dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6557dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6558dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6559dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6560dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performORCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, 6561dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64Subtarget *Subtarget) { 6562dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Attempt to form an EXTR from (or (shl VAL1, #N), (srl VAL2, #RegWidth-N)) 6563dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!EnableAArch64ExtrGeneration) 6564dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6565dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG = DCI.DAG; 6566dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6567dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6568dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!DAG.getTargetLoweringInfo().isTypeLegal(VT)) 6569dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6570dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6571dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Res = tryCombineToEXTR(N, DCI); 6572dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Res.getNode()) 6573dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Res; 6574dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6575dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Res = tryCombineToBSL(N, DCI); 6576dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Res.getNode()) 6577dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Res; 6578dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6579dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6580dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6581dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6582dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performBitcastCombine(SDNode *N, 6583dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 6584dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 6585dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Wait 'til after everything is legalized to try this. That way we have 6586dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // legal vector types and such. 6587dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalizeOps()) 6588dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6589dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6590dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Remove extraneous bitcasts around an extract_subvector. 6591dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For example, 6592dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (v4i16 (bitconvert 6593dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (extract_subvector (v2i64 (bitconvert (v8i16 ...)), (i64 1))))) 6594dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // becomes 6595dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (extract_subvector ((v8i16 ...), (i64 4))) 6596dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6597dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Only interested in 64-bit vectors as the ultimate result. 6598dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6599dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isVector()) 6600dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6601dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSimpleVT().getSizeInBits() != 64) 6602dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6603dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Is the operand an extract_subvector starting at the beginning or halfway 6604dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // point of the vector? A low half may also come through as an 6605dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // EXTRACT_SUBREG, so look for that, too. 6606dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Op0 = N->getOperand(0); 6607dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op0->getOpcode() != ISD::EXTRACT_SUBVECTOR && 6608dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines !(Op0->isMachineOpcode() && 6609dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Op0->getMachineOpcode() == AArch64::EXTRACT_SUBREG)) 6610dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6611dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint64_t idx = cast<ConstantSDNode>(Op0->getOperand(1))->getZExtValue(); 6612dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op0->getOpcode() == ISD::EXTRACT_SUBVECTOR) { 6613dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op0->getValueType(0).getVectorNumElements() != idx && idx != 0) 6614dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6615dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (Op0->getMachineOpcode() == AArch64::EXTRACT_SUBREG) { 6616dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (idx != AArch64::dsub) 6617dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6618dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The dsub reference is equivalent to a lane zero subvector reference. 6619dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines idx = 0; 6620dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6621dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Look through the bitcast of the input to the extract. 6622dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op0->getOperand(0)->getOpcode() != ISD::BITCAST) 6623dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6624dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Source = Op0->getOperand(0)->getOperand(0); 6625dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the source type has twice the number of elements as our destination 6626dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // type, we know this is an extract of the high or low half of the vector. 6627dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT SVT = Source->getValueType(0); 6628dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SVT.getVectorNumElements() != VT.getVectorNumElements() * 2) 6629dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6630dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6631dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DEBUG(dbgs() << "aarch64-lower: bitcast extract_subvector simplification\n"); 6632dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6633dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Create the simplified form to just extract the low or high half of the 6634dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // vector directly rather than bothering with the bitcasts. 6635dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(N); 6636dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElements = VT.getVectorNumElements(); 6637dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (idx) { 6638dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue HalfIdx = DAG.getConstant(NumElements, MVT::i64); 6639dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, Source, HalfIdx); 6640dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else { 6641dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SubReg = DAG.getTargetConstant(AArch64::dsub, MVT::i32); 6642dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(DAG.getMachineNode(TargetOpcode::EXTRACT_SUBREG, dl, VT, 6643dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Source, SubReg), 6644dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 0); 6645dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6646dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6647dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6648dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performConcatVectorsCombine(SDNode *N, 6649dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 6650dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 6651dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Wait 'til after everything is legalized to try this. That way we have 6652dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // legal vector types and such. 6653dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalizeOps()) 6654dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6655dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6656dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(N); 6657dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 6658dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6659dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we see a (concat_vectors (v1x64 A), (v1x64 A)) it's really a vector 6660dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // splat. The indexed instructions are going to be expecting a DUPLANE64, so 6661dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // canonicalise to that. 6662dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N->getOperand(0) == N->getOperand(1) && VT.getVectorNumElements() == 2) { 6663dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(VT.getVectorElementType().getSizeInBits() == 64); 6664dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::DUPLANE64, dl, VT, 6665dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines WidenVector(N->getOperand(0), DAG), 6666dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(0, MVT::i64)); 6667dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6668dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6669dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Canonicalise concat_vectors so that the right-hand vector has as few 6670dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // bit-casts as possible before its real operation. The primary matching 6671dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // destination for these operations will be the narrowing "2" instructions, 6672dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // which depend on the operation being performed on this right-hand vector. 6673dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For example, 6674dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (concat_vectors LHS, (v1i64 (bitconvert (v4i16 RHS)))) 6675dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // becomes 6676dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (bitconvert (concat_vectors (v4i16 (bitconvert LHS)), RHS)) 6677dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6678dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Op1 = N->getOperand(1); 6679dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op1->getOpcode() != ISD::BITCAST) 6680dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6681dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = Op1->getOperand(0); 6682dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT RHSTy = RHS.getValueType().getSimpleVT(); 6683dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the RHS is not a vector, this is not the pattern we're looking for. 6684dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!RHSTy.isVector()) 6685dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6686dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6687dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DEBUG(dbgs() << "aarch64-lower: concat_vectors bitcast simplification\n"); 6688dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6689dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT ConcatTy = MVT::getVectorVT(RHSTy.getVectorElementType(), 6690dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHSTy.getVectorNumElements() * 2); 6691dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode( 6692dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::BITCAST, dl, VT, 6693dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::CONCAT_VECTORS, dl, ConcatTy, 6694dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::BITCAST, dl, RHSTy, N->getOperand(0)), RHS)); 6695dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6696dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6697dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryCombineFixedPointConvert(SDNode *N, 6698dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 6699dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 6700dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Wait 'til after everything is legalized to try this. That way we have 6701dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // legal vector types and such. 6702dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalizeOps()) 6703dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6704dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Transform a scalar conversion of a value from a lane extract into a 6705dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // lane extract of a vector conversion. E.g., from foo1 to foo2: 6706dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // double foo1(int64x2_t a) { return vcvtd_n_f64_s64(a[1], 9); } 6707dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // double foo2(int64x2_t a) { return vcvtq_n_f64_s64(a, 9)[1]; } 6708dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 6709dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The second form interacts better with instruction selection and the 6710dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // register allocator to avoid cross-class register copies that aren't 6711dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // coalescable due to a lane reference. 6712dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6713dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check the operand and see if it originates from a lane extract. 6714dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Op1 = N->getOperand(1); 6715dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op1.getOpcode() == ISD::EXTRACT_VECTOR_ELT) { 6716dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Yep, no additional predication needed. Perform the transform. 6717dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue IID = N->getOperand(0); 6718dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Shift = N->getOperand(2); 6719dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Vec = Op1.getOperand(0); 6720dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lane = Op1.getOperand(1); 6721dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ResTy = N->getValueType(0); 6722dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VecResTy; 6723dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(N); 6724dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6725dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // The vector width should be 128 bits by the time we get here, even 6726dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // if it started as 64 bits (the extract_vector handling will have 6727dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // done so). 6728dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Vec.getValueType().getSizeInBits() == 128 && 6729dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "unexpected vector size on extract_vector_elt!"); 6730dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Vec.getValueType() == MVT::v4i32) 6731dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecResTy = MVT::v4f32; 6732dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (Vec.getValueType() == MVT::v2i64) 6733dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecResTy = MVT::v2f64; 6734dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 6735cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines llvm_unreachable("unexpected vector type!"); 6736dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6737dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Convert = 6738dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VecResTy, IID, Vec, Shift); 6739dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ResTy, Convert, Lane); 6740dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6741dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6742a08063a000cfc7499f08a472d85f14e7a5e90f8dKevin Qin} 6743a08063a000cfc7499f08a472d85f14e7a5e90f8dKevin Qin 6744dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// AArch64 high-vector "long" operations are formed by performing the non-high 6745dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// version on an extract_subvector of each operand which gets the high half: 6746dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6747dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (longop2 LHS, RHS) == (longop (extract_high LHS), (extract_high RHS)) 6748dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6749dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// However, there are cases which don't have an extract_high explicitly, but 6750dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// have another operation that can be made compatible with one for free. For 6751dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// example: 6752dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6753dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (dupv64 scalar) --> (extract_high (dup128 scalar)) 6754dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6755dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// This routine does the actual conversion of such DUPs, once outer routines 6756dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// have determined that everything else is in order. 6757dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryExtendDUPToExtractHigh(SDValue N, SelectionDAG &DAG) { 6758dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We can handle most types of duplicate, but the lane ones have an extra 6759dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // operand saying *which* lane, so we need to know. 6760dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsDUPLANE; 6761dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (N.getOpcode()) { 6762dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUP: 6763dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsDUPLANE = false; 6764dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 6765dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUPLANE8: 6766dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUPLANE16: 6767dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUPLANE32: 6768dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUPLANE64: 6769dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsDUPLANE = true; 6770dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 6771dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 6772dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6773dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6774dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6775dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT NarrowTy = N.getSimpleValueType(); 6776dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!NarrowTy.is64BitVector()) 6777dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6778dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6779dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT ElementTy = NarrowTy.getVectorElementType(); 6780dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElems = NarrowTy.getVectorNumElements(); 6781dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT NewDUPVT = MVT::getVectorVT(ElementTy, NumElems * 2); 6782dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6783dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue NewDUP; 6784dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsDUPLANE) 6785dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewDUP = DAG.getNode(N.getOpcode(), SDLoc(N), NewDUPVT, N.getOperand(0), 6786dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N.getOperand(1)); 6787dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 6788dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewDUP = DAG.getNode(AArch64ISD::DUP, SDLoc(N), NewDUPVT, N.getOperand(0)); 6789dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6790dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N.getNode()), NarrowTy, 6791dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewDUP, DAG.getConstant(NumElems, MVT::i64)); 6792dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6793dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6794dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isEssentiallyExtractSubvector(SDValue N) { 6795dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N.getOpcode() == ISD::EXTRACT_SUBVECTOR) 6796dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6797dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6798dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return N.getOpcode() == ISD::BITCAST && 6799dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N.getOperand(0).getOpcode() == ISD::EXTRACT_SUBVECTOR; 6800dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6801dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6802dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \brief Helper structure to keep track of ISD::SET_CC operands. 6803dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstruct GenericSetCCInfo { 6804dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SDValue *Opnd0; 6805dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SDValue *Opnd1; 6806dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::CondCode CC; 6807dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines}; 6808dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6809dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \brief Helper structure to keep track of a SET_CC lowered into AArch64 code. 6810dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstruct AArch64SetCCInfo { 6811dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SDValue *Cmp; 6812dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::CondCode CC; 6813dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines}; 6814dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6815dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \brief Helper structure to keep track of SetCC information. 6816dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesunion SetCCInfo { 6817dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines GenericSetCCInfo Generic; 6818dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64SetCCInfo AArch64; 6819dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines}; 6820dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6821dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \brief Helper structure to be able to read SetCC information. If set to 6822dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// true, IsAArch64 field, Info is a AArch64SetCCInfo, otherwise Info is a 6823dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// GenericSetCCInfo. 6824dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstruct SetCCInfoAndKind { 6825dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo Info; 6826dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsAArch64; 6827dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines}; 6828dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6829dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \brief Check whether or not \p Op is a SET_CC operation, either a generic or 6830dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// an 6831dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// AArch64 lowered one. 6832dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \p SetCCInfo is filled accordingly. 6833dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \post SetCCInfo is meanginfull only when this function returns true. 6834dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// \return True when Op is a kind of SET_CC operation. 6835dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isSetCC(SDValue Op, SetCCInfoAndKind &SetCCInfo) { 6836dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If this is a setcc, this is straight forward. 6837dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getOpcode() == ISD::SETCC) { 6838dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo.Info.Generic.Opnd0 = &Op.getOperand(0); 6839dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo.Info.Generic.Opnd1 = &Op.getOperand(1); 6840dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo.Info.Generic.CC = cast<CondCodeSDNode>(Op.getOperand(2))->get(); 6841dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo.IsAArch64 = false; 6842dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6844dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Otherwise, check if this is a matching csel instruction. 6845dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // In other words: 6846dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // - csel 1, 0, cc 6847dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // - csel 0, 1, !cc 6848dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op.getOpcode() != AArch64ISD::CSEL) 6849dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6850dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Set the information about the operands. 6851dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // TODO: we want the operands of the Cmp not the csel 6852dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo.Info.AArch64.Cmp = &Op.getOperand(3); 6853dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo.IsAArch64 = true; 6854dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo.Info.AArch64.CC = static_cast<AArch64CC::CondCode>( 6855dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cast<ConstantSDNode>(Op.getOperand(2))->getZExtValue()); 6856dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6857dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check that the operands matches the constraints: 6858dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (1) Both operands must be constants. 6859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (2) One must be 1 and the other must be 0. 6860dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *TValue = dyn_cast<ConstantSDNode>(Op.getOperand(0)); 6861dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *FValue = dyn_cast<ConstantSDNode>(Op.getOperand(1)); 6862dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6863dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check (1). 6864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!TValue || !FValue) 6865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 6866dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6867dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check (2). 6868dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!TValue->isOne()) { 6869dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Update the comparison when we are interested in !cc. 6870dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(TValue, FValue); 6871dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfo.Info.AArch64.CC = 6872dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::getInvertedCondCode(SetCCInfo.Info.AArch64.CC); 6873dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return TValue->isOne() && FValue->isNullValue(); 6875dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6876dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6877dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Returns true if Op is setcc or zext of setcc. 6878dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic bool isSetCCOrZExtSetCC(const SDValue& Op, SetCCInfoAndKind &Info) { 6879dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isSetCC(Op, Info)) 6880dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 6881dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return ((Op.getOpcode() == ISD::ZERO_EXTEND) && 6882dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines isSetCC(Op->getOperand(0), Info)); 6883dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6884dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6885dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// The folding we want to perform is: 6886dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (add x, [zext] (setcc cc ...) ) 6887dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// --> 6888dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (csel x, (add x, 1), !cc ...) 6889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6890dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// The latter will get matched to a CSINC instruction. 6891dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performSetccAddFolding(SDNode *Op, SelectionDAG &DAG) { 6892dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(Op && Op->getOpcode() == ISD::ADD && "Unexpected operation!"); 6893dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = Op->getOperand(0); 6894dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = Op->getOperand(1); 6895dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SetCCInfoAndKind InfoAndKind; 6896dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If neither operand is a SET_CC, give up. 6898dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isSetCCOrZExtSetCC(LHS, InfoAndKind)) { 6899dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(LHS, RHS); 6900dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isSetCCOrZExtSetCC(LHS, InfoAndKind)) 6901dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6902dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6903dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // FIXME: This could be generatized to work for FP comparisons. 6905dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT CmpVT = InfoAndKind.IsAArch64 6906dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ? InfoAndKind.Info.AArch64.Cmp->getOperand(0).getValueType() 6907dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines : InfoAndKind.Info.Generic.Opnd0->getValueType(); 6908dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CmpVT != MVT::i32 && CmpVT != MVT::i64) 6909dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6910dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6911dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal; 6912dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp; 6913dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc dl(Op); 6914dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (InfoAndKind.IsAArch64) { 6915dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCVal = DAG.getConstant( 6916dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AArch64CC::getInvertedCondCode(InfoAndKind.Info.AArch64.CC), MVT::i32); 6917dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cmp = *InfoAndKind.Info.AArch64.Cmp; 6918dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else 6919dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Cmp = getAArch64Cmp(*InfoAndKind.Info.Generic.Opnd0, 6920dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines *InfoAndKind.Info.Generic.Opnd1, 6921dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::getSetCCInverse(InfoAndKind.Info.Generic.CC, true), 6922dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCVal, DAG, dl); 6923dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6924dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = Op->getValueType(0); 6925dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS = DAG.getNode(ISD::ADD, dl, VT, RHS, DAG.getConstant(1, VT)); 6926dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::CSEL, dl, VT, RHS, LHS, CCVal, Cmp); 6927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6928dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// The basic add/sub long vector instructions have variants with "2" on the end 6930dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// which act on the high-half of their inputs. They are normally matched by 6931dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// patterns like: 6932dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6933dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (add (zeroext (extract_high LHS)), 6934dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (zeroext (extract_high RHS))) 6935dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// -> uaddl2 vD, vN, vM 6936dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6937dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// However, if one of the extracts is something like a duplicate, this 6938dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// instruction can still be used profitably. This function puts the DAG into a 6939dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// more appropriate form for those patterns to trigger. 6940dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performAddSubLongCombine(SDNode *N, 6941dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 6942dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 6943dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalizeOps()) 6944dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6945dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6946dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT VT = N->getSimpleValueType(0); 6947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.is128BitVector()) { 6948dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N->getOpcode() == ISD::ADD) 6949dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performSetccAddFolding(N, DAG); 6950dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6951dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6952dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6953dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Make sure both branches are extended in the same way. 6954dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = N->getOperand(0); 6955dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = N->getOperand(1); 6956dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if ((LHS.getOpcode() != ISD::ZERO_EXTEND && 6957dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS.getOpcode() != ISD::SIGN_EXTEND) || 6958dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS.getOpcode() != RHS.getOpcode()) 6959dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6960dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6961dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ExtType = LHS.getOpcode(); 6962dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6963dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // It's not worth doing if at least one of the inputs isn't already an 6964dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // extract, but we don't know which it'll be so we have to try both. 6965dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isEssentiallyExtractSubvector(LHS.getOperand(0))) { 6966dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = tryExtendDUPToExtractHigh(RHS.getOperand(0), DAG); 6967dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!RHS.getNode()) 6968dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6969dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6970dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = DAG.getNode(ExtType, SDLoc(N), VT, RHS); 6971dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (isEssentiallyExtractSubvector(RHS.getOperand(0))) { 6972dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS = tryExtendDUPToExtractHigh(LHS.getOperand(0), DAG); 6973dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!LHS.getNode()) 6974dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6975dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6976dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS = DAG.getNode(ExtType, SDLoc(N), VT, LHS); 6977dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 6978dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6979dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(N->getOpcode(), SDLoc(N), VT, LHS, RHS); 6980dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 6981dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6982dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Massage DAGs which we can use the high-half "long" operations on into 6983dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// something isel will recognize better. E.g. 6984dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6985dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (aarch64_neon_umull (extract_high vec) (dupv64 scalar)) --> 6986dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (aarch64_neon_umull (extract_high (v2i64 vec))) 6987dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// (extract_high (v2i64 (dup128 scalar))))) 6988dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// 6989dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryCombineLongOpWithDup(unsigned IID, SDNode *N, 6990dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 6991dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 6992dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalizeOps()) 6993dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 6994dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 6995dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = N->getOperand(1); 6996dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = N->getOperand(2); 6997dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHS.getValueType().is64BitVector() && 6998dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS.getValueType().is64BitVector() && 6999dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "unexpected shape for long operation"); 7000dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7001dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Either node could be a DUP, but it's not worth doing both of them (you'd 7002dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // just as well use the non-high version) so look for a corresponding extract 7003dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // operation on the other "wing". 7004dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isEssentiallyExtractSubvector(LHS)) { 7005dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines RHS = tryExtendDUPToExtractHigh(RHS, DAG); 7006dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!RHS.getNode()) 7007dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7008dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (isEssentiallyExtractSubvector(RHS)) { 7009dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS = tryExtendDUPToExtractHigh(LHS, DAG); 7010dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!LHS.getNode()) 7011dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7012dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7013dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7014dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SDLoc(N), N->getValueType(0), 7015dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N->getOperand(0), LHS, RHS); 7016dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7017dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7018dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryCombineShiftImm(unsigned IID, SDNode *N, SelectionDAG &DAG) { 7019dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT ElemTy = N->getSimpleValueType(0).getScalarType(); 7020dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ElemBits = ElemTy.getSizeInBits(); 7021dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7022dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int64_t ShiftAmount; 7023dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(N->getOperand(2))) { 7024dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines APInt SplatValue, SplatUndef; 7025dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned SplatBitSize; 7026dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool HasAnyUndefs; 7027dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, 7028dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines HasAnyUndefs, ElemBits) || 7029dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SplatBitSize != ElemBits) 7030dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7031dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7032dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ShiftAmount = SplatValue.getSExtValue(); 7033dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (ConstantSDNode *CVN = dyn_cast<ConstantSDNode>(N->getOperand(2))) { 7034dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ShiftAmount = CVN->getSExtValue(); 7035dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else 7036dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7037dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7038dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Opcode; 7039dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsRightShift; 7040dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (IID) { 7041dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 7042dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Unknown shift intrinsic"); 7043dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_sqshl: 7044dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::SQSHL_I; 7045dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsRightShift = false; 7046dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7047dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_uqshl: 7048dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::UQSHL_I; 7049dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsRightShift = false; 7050dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7051dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_srshl: 7052dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::SRSHR_I; 7053dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsRightShift = true; 7054dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7055dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_urshl: 7056dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::URSHR_I; 7057dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsRightShift = true; 7058dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7059dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_sqshlu: 7060dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Opcode = AArch64ISD::SQSHLU_I; 7061dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsRightShift = false; 7062dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7063dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7064dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7065dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsRightShift && ShiftAmount <= -1 && ShiftAmount >= -(int)ElemBits) 7066dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opcode, SDLoc(N), N->getValueType(0), N->getOperand(1), 7067dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(-ShiftAmount, MVT::i32)); 7068cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines else if (!IsRightShift && ShiftAmount >= 0 && ShiftAmount < ElemBits) 7069dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(Opcode, SDLoc(N), N->getValueType(0), N->getOperand(1), 7070dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(ShiftAmount, MVT::i32)); 7071dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7072dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7073dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7074dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7075dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// The CRC32[BH] instructions ignore the high bits of their data operand. Since 7076dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// the intrinsics must be legal and take an i32, this means there's almost 7077dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// certainly going to be a zext in the DAG which we can eliminate. 7078dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue tryCombineCRC32(unsigned Mask, SDNode *N, SelectionDAG &DAG) { 7079dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue AndN = N->getOperand(2); 7080dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (AndN.getOpcode() != ISD::AND) 7081dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7082dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7083dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ConstantSDNode *CMask = dyn_cast<ConstantSDNode>(AndN.getOperand(1)); 7084dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!CMask || CMask->getZExtValue() != Mask) 7085dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7086dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7087dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SDLoc(N), MVT::i32, 7088dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N->getOperand(0), N->getOperand(1), AndN.getOperand(0)); 7089dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7090dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7091dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performIntrinsicCombine(SDNode *N, 7092dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 7093dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64Subtarget *Subtarget) { 7094dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG = DCI.DAG; 7095dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned IID = getIntrinsicID(N); 7096dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (IID) { 7097dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 7098dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7099dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_vcvtfxs2fp: 7100dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_vcvtfxu2fp: 7101dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return tryCombineFixedPointConvert(N, DCI, DAG); 7102dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7103dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_fmax: 7104dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FMAX, SDLoc(N), N->getValueType(0), 7105dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N->getOperand(1), N->getOperand(2)); 7106dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_fmin: 7107dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(AArch64ISD::FMIN, SDLoc(N), N->getValueType(0), 7108dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N->getOperand(1), N->getOperand(2)); 7109dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_smull: 7110dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_umull: 7111dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_pmull: 7112dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_sqdmull: 7113dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return tryCombineLongOpWithDup(IID, N, DCI, DAG); 7114dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_sqshl: 7115dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_uqshl: 7116dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_sqshlu: 7117dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_srshl: 7118dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_urshl: 7119dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return tryCombineShiftImm(IID, N, DAG); 7120dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_crc32b: 7121dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_crc32cb: 7122dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return tryCombineCRC32(0xff, N, DAG); 7123dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_crc32h: 7124dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_crc32ch: 7125dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return tryCombineCRC32(0xffff, N, DAG); 7126dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7127dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7128dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7129dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7130dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performExtendCombine(SDNode *N, 7131dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 7132dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 7133dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we see something like (zext (sabd (extract_high ...), (DUP ...))) then 7134dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we can convert that DUP into another extract_high (of a bigger DUP), which 7135dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // helps the backend to decide that an sabdl2 would be useful, saving a real 7136dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // extract_high operation. 7137dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!DCI.isBeforeLegalizeOps() && N->getOpcode() == ISD::ZERO_EXTEND && 7138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N->getOperand(0).getOpcode() == ISD::INTRINSIC_WO_CHAIN) { 7139dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDNode *ABDNode = N->getOperand(0).getNode(); 7140dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned IID = getIntrinsicID(ABDNode); 7141dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IID == Intrinsic::aarch64_neon_sabd || 7142dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IID == Intrinsic::aarch64_neon_uabd) { 7143dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue NewABD = tryCombineLongOpWithDup(IID, ABDNode, DCI, DAG); 7144dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!NewABD.getNode()) 7145dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7146dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7147dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), N->getValueType(0), 7148dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewABD); 7149dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7150dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7151dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7152dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This is effectively a custom type legalization for AArch64. 7153dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 7154dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Type legalization will split an extend of a small, legal, type to a larger 7155dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // illegal type by first splitting the destination type, often creating 7156dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // illegal source types, which then get legalized in isel-confusing ways, 7157dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // leading to really terrible codegen. E.g., 7158dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // %result = v8i32 sext v8i8 %value 7159dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // becomes 7160dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // %losrc = extract_subreg %value, ... 7161dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // %hisrc = extract_subreg %value, ... 7162dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // %lo = v4i32 sext v4i8 %losrc 7163dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // %hi = v4i32 sext v4i8 %hisrc 7164dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Things go rapidly downhill from there. 7165dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 7166dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For AArch64, the [sz]ext vector instructions can only go up one element 7167dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // size, so we can, e.g., extend from i8 to i16, but to go from i8 to i32 7168dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // take two instructions. 7169dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 7170dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This implies that the most efficient way to do the extend from v8i8 7171dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // to two v4i32 values is to first extend the v8i8 to v8i16, then do 7172dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the normal splitting to happen for the v8i16->v8i32. 7173dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7174dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // This is pre-legalization to catch some cases where the default 7175dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // type legalization will create ill-tempered code. 7176dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!DCI.isBeforeLegalizeOps()) 7177dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7178dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7179dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We're only interested in cleaning things up for non-legal vector types 7180dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // here. If both the source and destination are legal, things will just 7181dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // work naturally without any fiddling. 7182dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const TargetLowering &TLI = DAG.getTargetLoweringInfo(); 7183dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ResVT = N->getValueType(0); 7184dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!ResVT.isVector() || TLI.isTypeLegal(ResVT)) 7185dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7186dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the vector type isn't a simple VT, it's beyond the scope of what 7187dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // we're worried about here. Let legalization do its thing and hope for 7188dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // the best. 7189dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!ResVT.isSimple()) 7190dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7191dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7192dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Src = N->getOperand(0); 7193dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT SrcVT = Src->getValueType(0).getSimpleVT(); 7194dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the source VT is a 64-bit vector, we can play games and get the 7195dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // better results we want. 7196dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (SrcVT.getSizeInBits() != 64) 7197dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7198dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7199dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned SrcEltSize = SrcVT.getVectorElementType().getSizeInBits(); 7200dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned ElementCount = SrcVT.getVectorNumElements(); 7201dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SrcVT = MVT::getVectorVT(MVT::getIntegerVT(SrcEltSize * 2), ElementCount); 7202dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(N); 7203dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Src = DAG.getNode(N->getOpcode(), DL, SrcVT, Src); 7204dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7205dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Now split the rest of the operation into two halves, each with a 64 7206dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // bit source. 7207dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT LoVT, HiVT; 7208dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Lo, Hi; 7209dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElements = ResVT.getVectorNumElements(); 7210dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(!(NumElements & 1) && "Splitting vector, but not in half!"); 7211dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LoVT = HiVT = EVT::getVectorVT(*DAG.getContext(), 7212dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ResVT.getVectorElementType(), NumElements / 2); 7213dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7214dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT InNVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getVectorElementType(), 7215dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LoVT.getVectorNumElements()); 7216dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, Src, 7217dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getIntPtrConstant(0)); 7218dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InNVT, Src, 7219dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getIntPtrConstant(InNVT.getVectorNumElements())); 7220dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Lo = DAG.getNode(N->getOpcode(), DL, LoVT, Lo); 7221dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Hi = DAG.getNode(N->getOpcode(), DL, HiVT, Hi); 7222dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7223dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Now combine the parts back together so we still have a single result 7224dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // like the combiner expects. 7225dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi); 7226dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7227dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7228dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Replace a splat of a scalar to a vector store by scalar stores of the scalar 7229dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// value. The load store optimizer pass will merge them to store pair stores. 7230dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// This has better performance than a splat of the scalar followed by a split 7231dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// vector store. Even if the stores are not merged it is four stores vs a dup, 7232dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// followed by an ext.b and two stores. 7233dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue replaceSplatVectorStore(SelectionDAG &DAG, StoreSDNode *St) { 7234dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue StVal = St->getValue(); 7235dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = StVal.getValueType(); 7236dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7237dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Don't replace floating point stores, they possibly won't be transformed to 7238dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // stp because of the store pair suppress pass. 7239dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.isFloatingPoint()) 7240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7242dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check for insert vector elements. 7243dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (StVal.getOpcode() != ISD::INSERT_VECTOR_ELT) 7244dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7245dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7246dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // We can express a splat as store pair(s) for 2 or 4 elements. 7247dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumVecElts = VT.getVectorNumElements(); 7248dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NumVecElts != 4 && NumVecElts != 2) 7249dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7250dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SplatVal = StVal.getOperand(1); 7251dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned RemainInsertElts = NumVecElts - 1; 7252dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7253dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check that this is a splat. 7254dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines while (--RemainInsertElts) { 7255dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue NextInsertElt = StVal.getOperand(0); 7256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NextInsertElt.getOpcode() != ISD::INSERT_VECTOR_ELT) 7257dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (NextInsertElt.getOperand(1) != SplatVal) 7259dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7260dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines StVal = NextInsertElt; 7261dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7262dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned OrigAlignment = St->getAlignment(); 7263dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned EltOffset = NumVecElts == 4 ? 4 : 8; 7264dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Alignment = std::min(OrigAlignment, EltOffset); 7265dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7266dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Create scalar stores. This is at least as good as the code sequence for a 7267dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // split unaligned store wich is a dup.s, ext.b, and two stores. 7268dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Most of the time the three stores should be replaced by store pair 7269dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // instructions (stp). 7270dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(St); 7271dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue BasePtr = St->getBasePtr(); 7272dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue NewST1 = 7273dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getStore(St->getChain(), DL, SplatVal, BasePtr, St->getPointerInfo(), 7274dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines St->isVolatile(), St->isNonTemporal(), St->getAlignment()); 7275dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned Offset = EltOffset; 7277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines while (--NumVecElts) { 7278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i64, BasePtr, 7279dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(Offset, MVT::i64)); 7280dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewST1 = DAG.getStore(NewST1.getValue(0), DL, SplatVal, OffsetPtr, 7281dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines St->getPointerInfo(), St->isVolatile(), 7282dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines St->isNonTemporal(), Alignment); 7283dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Offset += EltOffset; 7284dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7285dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return NewST1; 7286dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7287dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7288dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performSTORECombine(SDNode *N, 7289dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 7290dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG, 7291dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const AArch64Subtarget *Subtarget) { 7292dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!DCI.isBeforeLegalize()) 7293dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7294dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines StoreSDNode *S = cast<StoreSDNode>(N); 7296dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (S->isVolatile()) 7297dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7298dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7299dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Cyclone has bad performance on unaligned 16B stores when crossing line and 7300dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // page boundries. We want to split such stores. 7301dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Subtarget->isCyclone()) 7302dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7303dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7304dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Don't split at Oz. 7305dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineFunction &MF = DAG.getMachineFunction(); 7306dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsMinSize = MF.getFunction()->getAttributes().hasAttribute( 7307dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AttributeSet::FunctionIndex, Attribute::MinSize); 7308dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsMinSize) 7309dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7310dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7311dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue StVal = S->getValue(); 7312dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = StVal.getValueType(); 7313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7314dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Don't split v2i64 vectors. Memcpy lowering produces those and splitting 7315dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // those up regresses performance on micro-benchmarks and olden/bh. 7316dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!VT.isVector() || VT.getVectorNumElements() < 2 || VT == MVT::v2i64) 7317dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7318dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7319dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Split unaligned 16B stores. They are terrible for performance. 7320dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Don't split stores with alignment of 1 or 2. Code that uses clang vector 7321dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // extensions can use this to mark that it does not want splitting to happen 7322dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // (by underspecifying alignment to be 1 or 2). Furthermore, the chance of 7323dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // eliminating alignment hazards is only 1 in 8 for alignment of 2. 7324dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (VT.getSizeInBits() != 128 || S->getAlignment() >= 16 || 7325dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines S->getAlignment() <= 2) 7326dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7327dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7328dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If we get a splat of a scalar convert this vector store to a store of 7329dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // scalars. They will be merged into store pairs thereby removing two 7330dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // instructions. 7331dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue ReplacedSplat = replaceSplatVectorStore(DAG, S); 7332dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ReplacedSplat != SDValue()) 7333dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return ReplacedSplat; 7334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7335dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(S); 7336dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumElts = VT.getVectorNumElements() / 2; 7337dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Split VT into two. 7338dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT HalfVT = 7339dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT::getVectorVT(*DAG.getContext(), VT.getVectorElementType(), NumElts); 7340dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SubVector0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, 7341dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getIntPtrConstant(0)); 7342dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SubVector1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal, 7343dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getIntPtrConstant(NumElts)); 7344dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue BasePtr = S->getBasePtr(); 7345dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue NewST1 = 7346dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getStore(S->getChain(), DL, SubVector0, BasePtr, S->getPointerInfo(), 7347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines S->isVolatile(), S->isNonTemporal(), S->getAlignment()); 7348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i64, BasePtr, 7349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getConstant(8, MVT::i64)); 7350dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getStore(NewST1.getValue(0), DL, SubVector1, OffsetPtr, 7351dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines S->getPointerInfo(), S->isVolatile(), S->isNonTemporal(), 7352dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines S->getAlignment()); 7353dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7354dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7355dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Target-specific DAG combine function for post-increment LD1 (lane) and 7356dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// post-increment LD1R. 7357dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performPostLD1Combine(SDNode *N, 7358dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 7359dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsLaneOp) { 7360dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalizeOps()) 7361dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7362dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7363dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG = DCI.DAG; 7364dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT = N->getValueType(0); 7365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned LoadIdx = IsLaneOp ? 1 : 0; 7367dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDNode *LD = N->getOperand(LoadIdx).getNode(); 7368dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If it is not LOAD, can not do such combine. 7369dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LD->getOpcode() != ISD::LOAD) 7370dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7371dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7372dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LoadSDNode *LoadSDN = cast<LoadSDNode>(LD); 7373dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT MemVT = LoadSDN->getMemoryVT(); 7374dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check if memory operand is the same type as the vector element. 7375dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (MemVT != VT.getVectorElementType()) 7376dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7377dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7378dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check if there are other uses. If so, do not combine as it will introduce 7379dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // an extra load. 7380dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (SDNode::use_iterator UI = LD->use_begin(), UE = LD->use_end(); UI != UE; 7381dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ++UI) { 7382dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (UI.getUse().getResNo() == 1) // Ignore uses of the chain result. 7383dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 7384dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (*UI != N) 7385dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7386dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7387dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7388dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Addr = LD->getOperand(1); 7389dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Vector = N->getOperand(0); 7390dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Search for a use of the address operand that is an increment. 7391dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), UE = 7392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Addr.getNode()->use_end(); UI != UE; ++UI) { 7393dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDNode *User = *UI; 7394dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (User->getOpcode() != ISD::ADD 7395dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines || UI.getUse().getResNo() != Addr.getResNo()) 7396dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 7397dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7398dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check that the add is independent of the load. Otherwise, folding it 7399dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // would create a cycle. 7400dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (User->isPredecessorOf(LD) || LD->isPredecessorOf(User)) 7401dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 7402dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Also check that add is not used in the vector operand. This would also 7403dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // create a cycle. 7404dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (User->isPredecessorOf(Vector.getNode())) 7405dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 74068a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the increment is a constant, it must match the memory ref size. 7408dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0); 7409dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode())) { 7410dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint32_t IncVal = CInc->getZExtValue(); 7411dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBytes = VT.getScalarSizeInBits() / 8; 7412dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IncVal != NumBytes) 7413dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 7414dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Inc = DAG.getRegister(AArch64::XZR, MVT::i64); 7415dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7416dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7417dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 8> Ops; 7418dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(LD->getOperand(0)); // Chain 7419dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsLaneOp) { 7420dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Vector); // The vector to be inserted 7421dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(N->getOperand(2)); // The lane to be inserted in the vector 7422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Addr); 7424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Inc); 7425dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7426dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT Tys[3] = { VT, MVT::i64, MVT::Other }; 7427dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, 3)); 7428dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NewOp = IsLaneOp ? AArch64ISD::LD1LANEpost : AArch64ISD::LD1DUPpost; 7429dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue UpdN = DAG.getMemIntrinsicNode(NewOp, SDLoc(N), SDTys, Ops, 7430dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MemVT, 7431dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LoadSDN->getMemOperand()); 7432dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7433dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Update the uses. 7434dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::vector<SDValue> NewResults; 7435dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewResults.push_back(SDValue(LD, 0)); // The result of load 7436dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewResults.push_back(SDValue(UpdN.getNode(), 2)); // Chain 7437dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DCI.CombineTo(LD, NewResults); 7438dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DCI.CombineTo(N, SDValue(UpdN.getNode(), 0)); // Dup/Inserted Result 7439dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DCI.CombineTo(User, SDValue(UpdN.getNode(), 1)); // Write back register 7440dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7441dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7442dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7443dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7444dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7445dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7446dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// Target-specific DAG combine function for NEON load/store intrinsics 7447dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// to merge base address updates. 7448dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performNEONPostLDSTCombine(SDNode *N, 7449dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 7450dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 7451dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (DCI.isBeforeLegalize() || DCI.isCalledByLegalizer()) 7452dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7453dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7454dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned AddrOpIdx = N->getNumOperands() - 1; 7455dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Addr = N->getOperand(AddrOpIdx); 7456dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7457dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Search for a use of the address operand that is an increment. 7458dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), 7459dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UE = Addr.getNode()->use_end(); UI != UE; ++UI) { 7460dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDNode *User = *UI; 7461dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (User->getOpcode() != ISD::ADD || 7462dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines UI.getUse().getResNo() != Addr.getResNo()) 7463dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 7464dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7465dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Check that the add is independent of the load/store. Otherwise, folding 7466dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // it would create a cycle. 7467dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (User->isPredecessorOf(N) || N->isPredecessorOf(User)) 7468dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 7469dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7470dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Find the new opcode for the updating load/store. 7471dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsStore = false; 7472dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsLaneOp = false; 7473dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsDupOp = false; 7474dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NewOpc = 0; 7475dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumVecs = 0; 7476dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned IntNo = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); 7477dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (IntNo) { 7478dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: llvm_unreachable("unexpected intrinsic for Neon base update"); 7479dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2: NewOpc = AArch64ISD::LD2post; 7480dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 2; break; 7481dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3: NewOpc = AArch64ISD::LD3post; 7482dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 3; break; 7483dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4: NewOpc = AArch64ISD::LD4post; 7484dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 4; break; 7485dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st2: NewOpc = AArch64ISD::ST2post; 7486dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 2; IsStore = true; break; 7487dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st3: NewOpc = AArch64ISD::ST3post; 7488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 3; IsStore = true; break; 7489dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st4: NewOpc = AArch64ISD::ST4post; 7490dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 4; IsStore = true; break; 7491dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x2: NewOpc = AArch64ISD::LD1x2post; 7492dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 2; break; 7493dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x3: NewOpc = AArch64ISD::LD1x3post; 7494dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 3; break; 7495dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x4: NewOpc = AArch64ISD::LD1x4post; 7496dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 4; break; 7497dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x2: NewOpc = AArch64ISD::ST1x2post; 7498dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 2; IsStore = true; break; 7499dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x3: NewOpc = AArch64ISD::ST1x3post; 7500dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 3; IsStore = true; break; 7501dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x4: NewOpc = AArch64ISD::ST1x4post; 7502dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 4; IsStore = true; break; 7503dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2r: NewOpc = AArch64ISD::LD2DUPpost; 7504dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 2; IsDupOp = true; break; 7505dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3r: NewOpc = AArch64ISD::LD3DUPpost; 7506dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 3; IsDupOp = true; break; 7507dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4r: NewOpc = AArch64ISD::LD4DUPpost; 7508dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 4; IsDupOp = true; break; 7509dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2lane: NewOpc = AArch64ISD::LD2LANEpost; 7510dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 2; IsLaneOp = true; break; 7511dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3lane: NewOpc = AArch64ISD::LD3LANEpost; 7512dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 3; IsLaneOp = true; break; 7513dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4lane: NewOpc = AArch64ISD::LD4LANEpost; 7514dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 4; IsLaneOp = true; break; 7515dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st2lane: NewOpc = AArch64ISD::ST2LANEpost; 7516dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 2; IsStore = true; IsLaneOp = true; break; 7517dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st3lane: NewOpc = AArch64ISD::ST3LANEpost; 7518dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 3; IsStore = true; IsLaneOp = true; break; 7519dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st4lane: NewOpc = AArch64ISD::ST4LANEpost; 7520dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumVecs = 4; IsStore = true; IsLaneOp = true; break; 7521dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7522dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7523dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VecTy; 7524dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsStore) 7525dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecTy = N->getOperand(2).getValueType(); 7526dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else 7527dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VecTy = N->getValueType(0); 7528dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7529dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the increment is a constant, it must match the memory ref size. 7530dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Inc = User->getOperand(User->getOperand(0) == Addr ? 1 : 0); 7531dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode())) { 7532dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines uint32_t IncVal = CInc->getZExtValue(); 7533dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumBytes = NumVecs * VecTy.getSizeInBits() / 8; 7534dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsLaneOp || IsDupOp) 7535dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NumBytes /= VecTy.getVectorNumElements(); 7536dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IncVal != NumBytes) 7537dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines continue; 7538dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Inc = DAG.getRegister(AArch64::XZR, MVT::i64); 7539dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7540dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<SDValue, 8> Ops; 7541dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(N->getOperand(0)); // Incoming chain 7542dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Load lane and store have vector list as input. 7543dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (IsLaneOp || IsStore) 7544dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 2; i < AddrOpIdx; ++i) 7545dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(N->getOperand(i)); 7546dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Addr); // Base register 7547dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ops.push_back(Inc); 7548dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7549dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Return Types. 7550dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT Tys[6]; 7551dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned NumResultVecs = (IsStore ? 0 : NumVecs); 7552dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned n; 7553dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (n = 0; n < NumResultVecs; ++n) 7554dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Tys[n] = VecTy; 7555dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Tys[n++] = MVT::i64; // Type of write back register 7556dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Tys[n] = MVT::Other; // Type of the chain 7557dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDVTList SDTys = DAG.getVTList(ArrayRef<EVT>(Tys, NumResultVecs + 2)); 75588a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7559dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MemIntrinsicSDNode *MemInt = cast<MemIntrinsicSDNode>(N); 7560dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, SDLoc(N), SDTys, Ops, 7561dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MemInt->getMemoryVT(), 7562dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MemInt->getMemOperand()); 75638a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7564dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Update the uses. 7565dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::vector<SDValue> NewResults; 7566dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (unsigned i = 0; i < NumResultVecs; ++i) { 7567dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewResults.push_back(SDValue(UpdN.getNode(), i)); 75688a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling } 7569dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs + 1)); 7570dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DCI.CombineTo(N, NewResults); 7571dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); 75728a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7573dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 75748a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling } 7575dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7576dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 75778a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7578dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Optimize compare with zero and branch. 7579dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performBRCONDCombine(SDNode *N, 7580dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TargetLowering::DAGCombinerInfo &DCI, 7581dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) { 7582dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Chain = N->getOperand(0); 7583dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Dest = N->getOperand(1); 7584dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue CCVal = N->getOperand(2); 7585dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Cmp = N->getOperand(3); 7586dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7587dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(isa<ConstantSDNode>(CCVal) && "Expected a ConstantSDNode here!"); 7588dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned CC = cast<ConstantSDNode>(CCVal)->getZExtValue(); 7589dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC != AArch64CC::EQ && CC != AArch64CC::NE) 7590dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 75918a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7592dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines unsigned CmpOpc = Cmp.getOpcode(); 7593dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CmpOpc != AArch64ISD::ADDS && CmpOpc != AArch64ISD::SUBS) 7594dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 75958a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7596dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Only attempt folding if there is only one use of the flag and no use of the 7597dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // value. 7598dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!Cmp->hasNUsesOfValue(0, 0) || !Cmp->hasNUsesOfValue(1, 1)) 7599dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 76008a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7601dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = Cmp.getOperand(0); 7602dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = Cmp.getOperand(1); 76038a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7604dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(LHS.getValueType() == RHS.getValueType() && 7605dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines "Expected the value type to be the same for both operands!"); 7606dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getValueType() != MVT::i32 && LHS.getValueType() != MVT::i64) 7607dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7608dd518bcc9dd9e4028b2a979ced09edd5b6becd07Jiangning Liu 7609dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (isa<ConstantSDNode>(LHS) && cast<ConstantSDNode>(LHS)->isNullValue()) 7610dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines std::swap(LHS, RHS); 7611dd518bcc9dd9e4028b2a979ced09edd5b6becd07Jiangning Liu 7612dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!isa<ConstantSDNode>(RHS) || !cast<ConstantSDNode>(RHS)->isNullValue()) 7613258115258f8fe15e9d74b5fb524f90b75bb917d1Jiangning Liu return SDValue(); 7614258115258f8fe15e9d74b5fb524f90b75bb917d1Jiangning Liu 7615dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LHS.getOpcode() == ISD::SHL || LHS.getOpcode() == ISD::SRA || 7616dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines LHS.getOpcode() == ISD::SRL) 7617dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7618a08063a000cfc7499f08a472d85f14e7a5e90f8dKevin Qin 7619dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Fold the compare into the branch instruction. 7620dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue BR; 7621dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (CC == AArch64CC::EQ) 7622dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BR = DAG.getNode(AArch64ISD::CBZ, SDLoc(N), MVT::Other, Chain, LHS, Dest); 762336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines else 7624dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines BR = DAG.getNode(AArch64ISD::CBNZ, SDLoc(N), MVT::Other, Chain, LHS, Dest); 762536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 7626dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Do not add new nodes to DAG combiner worklist. 7627dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DCI.CombineTo(N, BR, false); 762836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 7629dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7630dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 76318a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling 7632dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// vselect (v1i1 setcc) -> 7633dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// vselect (v1iXX setcc) (XX is the size of the compared operand type) 7634dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// FIXME: Currently the type legalizer can't handle VSELECT having v1i1 as 7635dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// condition. If it can legalize "VSELECT v1i1" correctly, no need to combine 7636dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// such VSELECT. 7637dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performVSelectCombine(SDNode *N, SelectionDAG &DAG) { 7638dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue N0 = N->getOperand(0); 7639dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT CCVT = N0.getValueType(); 7640258115258f8fe15e9d74b5fb524f90b75bb917d1Jiangning Liu 7641dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N0.getOpcode() != ISD::SETCC || CCVT.getVectorNumElements() != 1 || 7642dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CCVT.getVectorElementType() != MVT::i1) 7643dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7644d85ed0caa1f780cbd13af1891d2a30fdfbad547aBill Wendling 7645dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ResVT = N->getValueType(0); 7646dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT CmpVT = N0.getOperand(0).getValueType(); 7647dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Only combine when the result type is of the same size as the compared 7648dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // operands. 7649dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ResVT.getSizeInBits() != CmpVT.getSizeInBits()) 7650dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7651d85ed0caa1f780cbd13af1891d2a30fdfbad547aBill Wendling 7652dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue IfTrue = N->getOperand(1); 7653dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue IfFalse = N->getOperand(2); 7654dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SetCC = 7655dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getSetCC(SDLoc(N), CmpVT.changeVectorElementTypeToInteger(), 7656dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines N0.getOperand(0), N0.getOperand(1), 7657dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cast<CondCodeSDNode>(N0.getOperand(2))->get()); 7658dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getNode(ISD::VSELECT, SDLoc(N), ResVT, SetCC, 7659dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IfTrue, IfFalse); 7660dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7661258115258f8fe15e9d74b5fb524f90b75bb917d1Jiangning Liu 7662dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// A vector select: "(select vL, vR, (setcc LHS, RHS))" is best performed with 7663dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// the compare-mask instructions rather than going via NZCV, even if LHS and 7664dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// RHS are really scalar. This replaces any scalar setcc in the above pattern 7665dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines/// with a vector one followed by a DUP shuffle on the result. 7666dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesstatic SDValue performSelectCombine(SDNode *N, SelectionDAG &DAG) { 7667dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue N0 = N->getOperand(0); 7668dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT ResVT = N->getValueType(0); 7669258115258f8fe15e9d74b5fb524f90b75bb917d1Jiangning Liu 7670dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!N->getOperand(1).getValueType().isVector()) 7671dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7672767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 7673dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N0.getOpcode() != ISD::SETCC || N0.getValueType() != MVT::i1) 7674dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7675767f816b926376bd850a62a28d35343ad0559c91Kevin Qin 7676dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL(N0); 7677dd518bcc9dd9e4028b2a979ced09edd5b6becd07Jiangning Liu 7678dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT SrcVT = N0.getOperand(0).getValueType(); 7679dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT, 7680dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ResVT.getSizeInBits() / SrcVT.getSizeInBits()); 7681dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT CCVT = SrcVT.changeVectorElementTypeToInteger(); 7682dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7683dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // First perform a vector comparison, where lane 0 is the one we're interested 7684dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // in. 7685dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LHS = 7686dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(0)); 7687dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue RHS = 7688dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, SrcVT, N0.getOperand(1)); 7689dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); 7690dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7691dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Now duplicate the comparison mask we want across all other lanes. 7692dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVector<int, 8> DUPMask(CCVT.getVectorNumElements(), 0); 7693dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask.data()); 7694dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Mask = DAG.getNode(ISD::BITCAST, DL, ResVT.changeVectorElementTypeToInteger(), 7695dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Mask); 7696dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7697dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1), N->getOperand(2)); 7698dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 7699258115258f8fe15e9d74b5fb524f90b75bb917d1Jiangning Liu 7700dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesSDValue AArch64TargetLowering::PerformDAGCombine(SDNode *N, 7701dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines DAGCombinerInfo &DCI) const { 7702dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG = DCI.DAG; 7703dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (N->getOpcode()) { 7704dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 7705dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 7706dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::ADD: 7707dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SUB: 7708dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performAddSubLongCombine(N, DCI, DAG); 7709dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::XOR: 7710dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performXorCombine(N, DAG, DCI, Subtarget); 7711dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::MUL: 7712dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performMulCombine(N, DAG, DCI, Subtarget); 7713dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SINT_TO_FP: 7714dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::UINT_TO_FP: 7715dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performIntToFpCombine(N, DAG); 7716dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::OR: 7717dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performORCombine(N, DCI, Subtarget); 7718dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INTRINSIC_WO_CHAIN: 7719dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performIntrinsicCombine(N, DCI, Subtarget); 7720dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::ANY_EXTEND: 7721dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::ZERO_EXTEND: 7722dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SIGN_EXTEND: 7723dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performExtendCombine(N, DCI, DAG); 7724dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::BITCAST: 7725dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performBitcastCombine(N, DCI, DAG); 7726dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::CONCAT_VECTORS: 7727dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performConcatVectorsCombine(N, DCI, DAG); 7728dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::SELECT: 7729dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performSelectCombine(N, DAG); 7730dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::VSELECT: 7731dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performVSelectCombine(N, DCI.DAG); 7732dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::STORE: 7733dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performSTORECombine(N, DCI, DAG, Subtarget); 7734dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::BRCOND: 7735dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performBRCONDCombine(N, DCI, DAG); 7736dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case AArch64ISD::DUP: 7737dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performPostLD1Combine(N, DCI, false); 7738dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INSERT_VECTOR_ELT: 7739dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performPostLD1Combine(N, DCI, true); 7740dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INTRINSIC_VOID: 7741dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::INTRINSIC_W_CHAIN: 7742dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (cast<ConstantSDNode>(N->getOperand(1))->getZExtValue()) { 7743dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2: 7744dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3: 7745dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4: 7746dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x2: 7747dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x3: 7748dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld1x4: 7749dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2lane: 7750dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3lane: 7751dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4lane: 7752dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld2r: 7753dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld3r: 7754dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_ld4r: 7755dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st2: 7756dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st3: 7757dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st4: 7758dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x2: 7759dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x3: 7760dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st1x4: 7761dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st2lane: 7762dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st3lane: 7763dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case Intrinsic::aarch64_neon_st4lane: 7764dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return performNEONPostLDSTCombine(N, DCI, DAG); 7765dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 7766dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines break; 77678a0ff1f236e77214878c9d493e786b30656ad2a1Bill Wendling } 7768258115258f8fe15e9d74b5fb524f90b75bb917d1Jiangning Liu } 7769dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SDValue(); 7770dd518bcc9dd9e4028b2a979ced09edd5b6becd07Jiangning Liu} 7771dd518bcc9dd9e4028b2a979ced09edd5b6becd07Jiangning Liu 7772dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Check if the return value is used as only a return value, as otherwise 7773dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// we can't perform a tail-call. In particular, we need to check for 7774dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// target ISD nodes that are returns and any other "odd" constructs 7775dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// that the generic analysis code won't necessarily catch. 7776dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::isUsedByReturnOnly(SDNode *N, 7777dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue &Chain) const { 7778dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (N->getNumValues() != 1) 7779dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7780dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!N->hasNUsesOfValue(1, 0)) 7781dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7782dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7783dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue TCChain = Chain; 7784dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDNode *Copy = *N->use_begin(); 7785dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Copy->getOpcode() == ISD::CopyToReg) { 7786dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // If the copy has a glue operand, we conservatively assume it isn't safe to 7787dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // perform a tail call. 7788dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Copy->getOperand(Copy->getNumOperands() - 1).getValueType() == 7789dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MVT::Glue) 7790dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7791dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines TCChain = Copy->getOperand(0); 7792dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (Copy->getOpcode() != ISD::FP_EXTEND) 7793dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7794dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7795dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool HasRet = false; 7796dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines for (SDNode *Node : Copy->uses()) { 7797dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Node->getOpcode() != AArch64ISD::RET_FLAG) 7798dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7799dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines HasRet = true; 780072062f5744557e270a38192554c3126ea5f97434Tim Northover } 780172062f5744557e270a38192554c3126ea5f97434Tim Northover 7802dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!HasRet) 7803dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 780472062f5744557e270a38192554c3126ea5f97434Tim Northover 7805dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Chain = TCChain; 7806dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 780772062f5744557e270a38192554c3126ea5f97434Tim Northover} 780872062f5744557e270a38192554c3126ea5f97434Tim Northover 7809dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// Return whether the an instruction can potentially be optimized to a tail 7810dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// call. This will cause the optimizers to attempt to move, or duplicate, 7811dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// return instructions to help enable tail call optimizations for this 7812dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines// instruction. 7813dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::mayBeEmittedAsTailCall(CallInst *CI) const { 7814dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!CI->isTailCall()) 7815dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 781672062f5744557e270a38192554c3126ea5f97434Tim Northover 7817dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 781872062f5744557e270a38192554c3126ea5f97434Tim Northover} 781972062f5744557e270a38192554c3126ea5f97434Tim Northover 7820dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::getIndexedAddressParts(SDNode *Op, SDValue &Base, 7821dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue &Offset, 7822dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::MemIndexedMode &AM, 7823dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool &IsInc, 7824dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 7825dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Op->getOpcode() != ISD::ADD && Op->getOpcode() != ISD::SUB) 7826dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 782772062f5744557e270a38192554c3126ea5f97434Tim Northover 7828dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Base = Op->getOperand(0); 7829dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // All of the indexed addressing mode instructions take a signed 7830dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // 9 bit immediate offset. 7831dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(Op->getOperand(1))) { 7832dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines int64_t RHSC = (int64_t)RHS->getZExtValue(); 7833dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (RHSC >= 256 || RHSC <= -256) 7834dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7835dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsInc = (Op->getOpcode() == ISD::ADD); 7836dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Offset = Op->getOperand(1); 7837dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 7838dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } 7839dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7840dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 784172062f5744557e270a38192554c3126ea5f97434Tim Northover 7842dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base, 7843dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue &Offset, 7844dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::MemIndexedMode &AM, 7845dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const { 7846dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT; 7847dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Ptr; 7848dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 7849dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT = LD->getMemoryVT(); 7850dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ptr = LD->getBasePtr(); 7851dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { 7852dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT = ST->getMemoryVT(); 7853dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ptr = ST->getBasePtr(); 7854dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else 7855dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 785672062f5744557e270a38192554c3126ea5f97434Tim Northover 7857dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsInc; 7858dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!getIndexedAddressParts(Ptr.getNode(), Base, Offset, AM, IsInc, DAG)) 7859dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7860dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AM = IsInc ? ISD::PRE_INC : ISD::PRE_DEC; 7861dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 7862dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 786372062f5744557e270a38192554c3126ea5f97434Tim Northover 7864dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::getPostIndexedAddressParts( 7865dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset, 7866dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines ISD::MemIndexedMode &AM, SelectionDAG &DAG) const { 7867dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines EVT VT; 7868dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Ptr; 7869dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) { 7870dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT = LD->getMemoryVT(); 7871dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ptr = LD->getBasePtr(); 7872dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) { 7873dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines VT = ST->getMemoryVT(); 7874dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ptr = ST->getBasePtr(); 7875dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines } else 7876dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 787772062f5744557e270a38192554c3126ea5f97434Tim Northover 7878dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsInc; 7879dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (!getIndexedAddressParts(Op, Base, Offset, AM, IsInc, DAG)) 7880dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7881dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Post-indexing updates the base, so it's not a valid transform 7882dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // if that's not the same as the load's pointer. 7883dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Ptr != Base) 7884dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return false; 7885dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AM = IsInc ? ISD::POST_INC : ISD::POST_DEC; 7886dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return true; 7887dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 788872062f5744557e270a38192554c3126ea5f97434Tim Northover 7889dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesvoid AArch64TargetLowering::ReplaceNodeResults( 7890dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const { 7891dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines switch (N->getOpcode()) { 7892dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines default: 7893dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines llvm_unreachable("Don't know how to custom expand this"); 7894dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FP_TO_UINT: 7895dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines case ISD::FP_TO_SINT: 7896dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines assert(N->getValueType(0) == MVT::i128 && "unexpected illegal conversion"); 7897dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Let normal code take care of it by not adding anything to Results. 789872062f5744557e270a38192554c3126ea5f97434Tim Northover return; 789972062f5744557e270a38192554c3126ea5f97434Tim Northover } 7900dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines} 790172062f5744557e270a38192554c3126ea5f97434Tim Northover 7902dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hinesbool AArch64TargetLowering::shouldExpandAtomicInIR(Instruction *Inst) const { 7903dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Loads and stores less than 128-bits are already atomic; ones above that 7904dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // are doomed anyway, so defer to the default libcall and blame the OS when 7905dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // things go wrong: 7906dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) 7907dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return SI->getValueOperand()->getType()->getPrimitiveSizeInBits() == 128; 7908dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines else if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) 7909dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return LI->getType()->getPrimitiveSizeInBits() == 128; 7910dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7911dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // For the real atomic operations, we have ldxr/stxr up to 128 bits. 7912dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Inst->getType()->getPrimitiveSizeInBits() <= 128; 791372062f5744557e270a38192554c3126ea5f97434Tim Northover} 791472062f5744557e270a38192554c3126ea5f97434Tim Northover 7915cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen HinesTargetLoweringBase::LegalizeTypeAction 7916cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen HinesAArch64TargetLowering::getPreferredVectorAction(EVT VT) const { 7917cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines MVT SVT = VT.getSimpleVT(); 7918cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // During type legalization, we prefer to widen v1i8, v1i16, v1i32 to v8i8, 7919cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines // v4i16, v2i32 instead of to promote. 7920cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines if (SVT == MVT::v1i8 || SVT == MVT::v1i16 || SVT == MVT::v1i32 7921cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines || SVT == MVT::v1f32) 7922cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return TypeWidenVector; 7923cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 7924cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines return TargetLoweringBase::getPreferredVectorAction(VT); 7925cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines} 7926cd81d94322a39503e4a3e87b6ee03d4fcb3465fbStephen Hines 7927dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesValue *AArch64TargetLowering::emitLoadLinked(IRBuilder<> &Builder, Value *Addr, 7928dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AtomicOrdering Ord) const { 7929dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Module *M = Builder.GetInsertBlock()->getParent()->getParent(); 7930dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *ValTy = cast<PointerType>(Addr->getType())->getElementType(); 7931dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsAcquire = 7932dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ord == Acquire || Ord == AcquireRelease || Ord == SequentiallyConsistent; 7933dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7934dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Since i128 isn't legal and intrinsics don't get type-lowered, the ldrexd 7935dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // intrinsic must return {i64, i64} and we have to recombine them into a 7936dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // single i128 here. 7937dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (ValTy->getPrimitiveSizeInBits() == 128) { 7938dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Intrinsic::ID Int = 7939dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsAcquire ? Intrinsic::aarch64_ldaxp : Intrinsic::aarch64_ldxp; 7940dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Function *Ldxr = llvm::Intrinsic::getDeclaration(M, Int); 7941dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7942dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Addr = Builder.CreateBitCast(Addr, Type::getInt8PtrTy(M->getContext())); 7943dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *LoHi = Builder.CreateCall(Ldxr, Addr, "lohi"); 7944dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7945dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *Lo = Builder.CreateExtractValue(LoHi, 0, "lo"); 7946dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *Hi = Builder.CreateExtractValue(LoHi, 1, "hi"); 7947dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Lo = Builder.CreateZExt(Lo, ValTy, "lo64"); 7948dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Hi = Builder.CreateZExt(Hi, ValTy, "hi64"); 7949dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Builder.CreateOr( 7950dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Lo, Builder.CreateShl(Hi, ConstantInt::get(ValTy, 64)), "val64"); 795172062f5744557e270a38192554c3126ea5f97434Tim Northover } 795272062f5744557e270a38192554c3126ea5f97434Tim Northover 7953dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *Tys[] = { Addr->getType() }; 7954dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Intrinsic::ID Int = 7955dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsAcquire ? Intrinsic::aarch64_ldaxr : Intrinsic::aarch64_ldxr; 7956dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Function *Ldxr = llvm::Intrinsic::getDeclaration(M, Int, Tys); 7957dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7958dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Builder.CreateTruncOrBitCast( 7959dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Builder.CreateCall(Ldxr, Addr), 7960dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines cast<PointerType>(Addr->getType())->getElementType()); 796172062f5744557e270a38192554c3126ea5f97434Tim Northover} 79626a5a667517160ca1b557002a29d08868ae029451Hao Liu 7963dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen HinesValue *AArch64TargetLowering::emitStoreConditional(IRBuilder<> &Builder, 7964dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *Val, Value *Addr, 7965dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines AtomicOrdering Ord) const { 7966dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Module *M = Builder.GetInsertBlock()->getParent()->getParent(); 7967dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool IsRelease = 7968dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Ord == Release || Ord == AcquireRelease || Ord == SequentiallyConsistent; 7969dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7970dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // Since the intrinsics must have legal type, the i128 intrinsics take two 7971dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // parameters: "i64, i64". We must marshal Val into the appropriate form 7972dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines // before the call. 7973dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines if (Val->getType()->getPrimitiveSizeInBits() == 128) { 7974dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Intrinsic::ID Int = 7975dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsRelease ? Intrinsic::aarch64_stlxp : Intrinsic::aarch64_stxp; 7976dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Function *Stxr = Intrinsic::getDeclaration(M, Int); 7977dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *Int64Ty = Type::getInt64Ty(M->getContext()); 7978dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7979dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *Lo = Builder.CreateTrunc(Val, Int64Ty, "lo"); 7980dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Value *Hi = Builder.CreateTrunc(Builder.CreateLShr(Val, 64), Int64Ty, "hi"); 7981dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Addr = Builder.CreateBitCast(Addr, Type::getInt8PtrTy(M->getContext())); 7982dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Builder.CreateCall3(Stxr, Lo, Hi, Addr); 79836a5a667517160ca1b557002a29d08868ae029451Hao Liu } 79846a5a667517160ca1b557002a29d08868ae029451Hao Liu 7985dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Intrinsic::ID Int = 7986dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines IsRelease ? Intrinsic::aarch64_stlxr : Intrinsic::aarch64_stxr; 7987dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Type *Tys[] = { Addr->getType() }; 7988dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Function *Stxr = Intrinsic::getDeclaration(M, Int, Tys); 7989dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines 7990dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines return Builder.CreateCall2( 7991dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Stxr, Builder.CreateZExtOrBitCast( 7992dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Val, Stxr->getFunctionType()->getParamType(0)), 7993dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines Addr); 79946a5a667517160ca1b557002a29d08868ae029451Hao Liu} 7995