HexagonRegisterInfo.cpp revision 37097623bbde5420f81ab8d1d056700f8f258025
146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)//===-- HexagonRegisterInfo.cpp - Hexagon Register Information ------------===// 246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// 346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// The LLVM Compiler Infrastructure 446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// 546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// This file is distributed under the University of Illinois Open Source 646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// License. See LICENSE.TXT for details. 746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// 846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)//===----------------------------------------------------------------------===// 946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// 1046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// This file contains the Hexagon implementation of the TargetRegisterInfo 1146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// class. 1246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)// 1346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)//===----------------------------------------------------------------------===// 1446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 1546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "HexagonRegisterInfo.h" 1646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "Hexagon.h" 1746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "HexagonSubtarget.h" 1846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "HexagonTargetMachine.h" 1946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "HexagonMachineFunctionInfo.h" 2046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/Function.h" 2146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/Type.h" 2246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/ADT/BitVector.h" 2346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/ADT/STLExtras.h" 2446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/CodeGen/MachineInstrBuilder.h" 2546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/CodeGen/MachineFunction.h" 2646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/CodeGen/MachineFunctionPass.h" 2746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/CodeGen/MachineFrameInfo.h" 2846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/CodeGen/MachineRegisterInfo.h" 2946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/CodeGen/RegisterScavenging.h" 3046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/MC/MachineLocation.h" 3146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/Target/TargetInstrInfo.h" 3246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/Target/TargetMachine.h" 3346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/Target/TargetOptions.h" 3446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/Support/CommandLine.h" 3546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "llvm/Support/ErrorHandling.h" 3646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 3746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)using namespace llvm; 3846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 3946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 4046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)HexagonRegisterInfo::HexagonRegisterInfo(HexagonSubtarget &st, 4146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) const HexagonInstrInfo &tii) 4246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) : HexagonGenRegisterInfo(Hexagon::R31), 4346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Subtarget(st), 4446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII(tii) { 4546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 4646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 4746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)const uint16_t* HexagonRegisterInfo::getCalleeSavedRegs(const MachineFunction 4846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) *MF) 4946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) const { 5046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) static const uint16_t CalleeSavedRegsV2[] = { 5146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0 5246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) }; 5346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) static const uint16_t CalleeSavedRegsV3[] = { 5446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19, 5546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, 5646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Hexagon::R24, Hexagon::R25, Hexagon::R26, Hexagon::R27, 0 5746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) }; 5846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 5946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) switch(Subtarget.getHexagonArchVersion()) { 6046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) case HexagonSubtarget::V1: 6146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) break; 6246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) case HexagonSubtarget::V2: 6346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) return CalleeSavedRegsV2; 6446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) case HexagonSubtarget::V3: 6546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) case HexagonSubtarget::V4: 6646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) return CalleeSavedRegsV3; 6746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 6846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) llvm_unreachable("Callee saved registers requested for unknown architecture " 6946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) "version"); 7046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 7146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 7246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)BitVector HexagonRegisterInfo::getReservedRegs(const MachineFunction &MF) 7346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) const { 7446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BitVector Reserved(getNumRegs()); 7546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(HEXAGON_RESERVED_REG_1); 7646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(HEXAGON_RESERVED_REG_2); 7746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::R29); 7846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::R30); 7946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::R31); 8046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::D14); 8146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::D15); 8246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::LC0); 8346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::LC1); 8446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::SA0); 8546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Reserved.set(Hexagon::SA1); 8646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) return Reserved; 8746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 8846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 8946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 9046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)const TargetRegisterClass* const* 9146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)HexagonRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const { 9246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) static const TargetRegisterClass * const CalleeSavedRegClassesV2[] = { 9346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &Hexagon::IntRegsRegClass, &Hexagon::IntRegsRegClass, 9446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &Hexagon::IntRegsRegClass, &Hexagon::IntRegsRegClass, 9546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) }; 9646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) static const TargetRegisterClass * const CalleeSavedRegClassesV3[] = { 9746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &Hexagon::IntRegsRegClass, &Hexagon::IntRegsRegClass, 9846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &Hexagon::IntRegsRegClass, &Hexagon::IntRegsRegClass, 9946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &Hexagon::IntRegsRegClass, &Hexagon::IntRegsRegClass, 10046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &Hexagon::IntRegsRegClass, &Hexagon::IntRegsRegClass, 10146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &Hexagon::IntRegsRegClass, &Hexagon::IntRegsRegClass, 10246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &Hexagon::IntRegsRegClass, &Hexagon::IntRegsRegClass, 10346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) }; 10446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 10546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) switch(Subtarget.getHexagonArchVersion()) { 10646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) case HexagonSubtarget::V1: 10746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) break; 10846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) case HexagonSubtarget::V2: 10946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) return CalleeSavedRegClassesV2; 11046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) case HexagonSubtarget::V3: 11146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) case HexagonSubtarget::V4: 11246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) return CalleeSavedRegClassesV3; 11346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 11446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) llvm_unreachable("Callee saved register classes requested for unknown " 11546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) "architecture version"); 11646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 11746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 11846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)void HexagonRegisterInfo:: 11946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 12046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MachineBasicBlock::iterator I) const { 12146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MachineInstr &MI = *I; 12246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 12346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) if (MI.getOpcode() == Hexagon::ADJCALLSTACKDOWN) { 12446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // Hexagon_TODO: add code 12546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else if (MI.getOpcode() == Hexagon::ADJCALLSTACKUP) { 12646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // Hexagon_TODO: add code 12746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else { 12846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) llvm_unreachable("Cannot handle this call frame pseudo instruction"); 12946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 13046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MBB.erase(I); 13146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 13246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 13346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)void HexagonRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, 13446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) int SPAdj, RegScavenger *RS) const { 13546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 13646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // 13746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // Hexagon_TODO: Do we need to enforce this for Hexagon? 13846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) assert(SPAdj == 0 && "Unexpected"); 13946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 14046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 14146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) unsigned i = 0; 14246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MachineInstr &MI = *II; 14346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) while (!MI.getOperand(i).isFI()) { 14446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) ++i; 14546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 14646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 14746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 14846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) int FrameIndex = MI.getOperand(i).getIndex(); 14946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 15046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // Addressable stack objects are accessed using neg. offsets from %fp. 15146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MachineFunction &MF = *MI.getParent()->getParent(); 15246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); 15346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MachineFrameInfo &MFI = *MF.getFrameInfo(); 15446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 15546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) unsigned FrameReg = getFrameRegister(MF); 15646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 15746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) if (!TFI->hasFP(MF)) { 15846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // We will not reserve space on the stack for the lr and fp registers. 15946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) Offset -= 2 * Hexagon_WordSize; 16046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 16146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 16246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) const unsigned FrameSize = MFI.getStackSize(); 16346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 16446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) if (!MFI.hasVarSizedObjects() && 16546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.isValidOffset(MI.getOpcode(), (FrameSize+Offset)) && 16646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) !TII.isSpillPredRegOp(&MI)) { 16746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // Replace frame index with a stack pointer reference. 16846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i).ChangeToRegister(getStackRegister(), false, false, true); 16946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i+1).ChangeToImmediate(FrameSize+Offset); 17046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else { 17146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // Replace frame index with a frame pointer reference. 17246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) if (!TII.isValidOffset(MI.getOpcode(), Offset)) { 17346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 17446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // If the offset overflows, then correct it. 17546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // 17646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // For loads, we do not need a reserved register 17746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // r0 = memw(r30 + #10000) to: 17846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // 17946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // r0 = add(r30, #10000) 18046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // r0 = memw(r0) 18146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) if ( (MI.getOpcode() == Hexagon::LDriw) || 18246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) (MI.getOpcode() == Hexagon::LDrid) || 18346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) (MI.getOpcode() == Hexagon::LDrih) || 18446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) (MI.getOpcode() == Hexagon::LDriuh) || 18546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) (MI.getOpcode() == Hexagon::LDrib) || 18646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) (MI.getOpcode() == Hexagon::LDriub) ) { 18746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) unsigned dstReg = (MI.getOpcode() == Hexagon::LDrid) ? 18846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) *getSubRegisters(MI.getOperand(0).getReg()) : 18946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(0).getReg(); 19046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 19146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // Check if offset can fit in addi. 19246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) if (!TII.isValidOffset(Hexagon::ADD_ri, Offset)) { 19346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 19446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::CONST32_Int_Real), dstReg).addImm(Offset); 19546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 19646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::ADD_rr), 19746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) dstReg).addReg(FrameReg).addReg(dstReg); 19846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else { 19946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 20046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::ADD_ri), 20146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) dstReg).addReg(FrameReg).addImm(Offset); 20246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 20346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 20446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i).ChangeToRegister(dstReg, false, false, true); 20546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i+1).ChangeToImmediate(0); 20646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else if ((MI.getOpcode() == Hexagon::STriw) || 20746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) (MI.getOpcode() == Hexagon::STrid) || 20846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) (MI.getOpcode() == Hexagon::STrih) || 20946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) (MI.getOpcode() == Hexagon::STrib)) { 21046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // For stores, we need a reserved register. Change 2112f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) // memw(r30 + #10000) = r0 to: 2122f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) // 2132f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) // rs = add(r30, #10000); 2142f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) // memw(rs) = r0 2152f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) unsigned resReg = HEXAGON_RESERVED_REG_1; 2162f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) 2172f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) // Check if offset can fit in addi. 2182f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) if (!TII.isValidOffset(Hexagon::ADD_ri, Offset)) { 2192f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 2202f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) TII.get(Hexagon::CONST32_Int_Real), resReg).addImm(Offset); 2212f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 2222f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) TII.get(Hexagon::ADD_rr), 2232f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) resReg).addReg(FrameReg).addReg(resReg); 22446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else { 22546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 22646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::ADD_ri), 22746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) resReg).addReg(FrameReg).addImm(Offset); 22846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 22946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i).ChangeToRegister(resReg, false, false, true); 23046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i+1).ChangeToImmediate(0); 23146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else if (TII.isMemOp(&MI)) { 23246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) unsigned resReg = HEXAGON_RESERVED_REG_1; 23346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) if (!MFI.hasVarSizedObjects() && 23446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.isValidOffset(MI.getOpcode(), (FrameSize+Offset))) { 23546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i).ChangeToRegister(getStackRegister(), false, false, 23646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) true); 23746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i+1).ChangeToImmediate(FrameSize+Offset); 23846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else if (!TII.isValidOffset(Hexagon::ADD_ri, Offset)) { 23946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 24046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::CONST32_Int_Real), resReg).addImm(Offset); 24146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 24246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::ADD_rr), 24346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) resReg).addReg(FrameReg).addReg(resReg); 24446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i).ChangeToRegister(resReg, false, false, true); 24546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i+1).ChangeToImmediate(0); 24646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else { 24746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 24846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::ADD_ri), 24946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) resReg).addReg(FrameReg).addImm(Offset); 25046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i).ChangeToRegister(resReg, false, false, true); 25146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i+1).ChangeToImmediate(0); 25246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 25346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else { 25446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) unsigned dstReg = MI.getOperand(0).getReg(); 25546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 25646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::CONST32_Int_Real), dstReg).addImm(Offset); 25746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) BuildMI(*MI.getParent(), II, MI.getDebugLoc(), 25846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) TII.get(Hexagon::ADD_rr), 25946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) dstReg).addReg(FrameReg).addReg(dstReg); 26046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // Can we delete MI??? r2 = add (r2, #0). 26146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i).ChangeToRegister(dstReg, false, false, true); 26246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i+1).ChangeToImmediate(0); 26346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 26446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } else { 26546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // If the offset is small enough to fit in the immediate field, directly 26646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) // encode it. 26746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i).ChangeToRegister(FrameReg, false); 26846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) MI.getOperand(i+1).ChangeToImmediate(Offset); 26946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 27046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) } 27146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 27246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 27346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 27446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)unsigned HexagonRegisterInfo::getRARegister() const { 27546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) return Hexagon::R31; 27646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 27746d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 27846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)unsigned HexagonRegisterInfo::getFrameRegister(const MachineFunction 27946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) &MF) const { 28046d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 2812f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) if (TFI->hasFP(MF)) { 2822f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) return Hexagon::R30; 2832f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) } 2842f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) 2852f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) return Hexagon::R29; 2862f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)} 2872f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) 2882f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)unsigned HexagonRegisterInfo::getFrameRegister() const { 2892f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) return Hexagon::R30; 2902f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)} 2912f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) 2922f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)unsigned HexagonRegisterInfo::getStackRegister() const { 2932f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) return Hexagon::R29; 2942f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)} 2952f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) 2962f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)void HexagonRegisterInfo::getInitialFrameState(std::vector<MachineMove> 2972f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) &Moves) const 2982f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles){ 2992f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) // VirtualFP = (R30 + #0). 3002f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) unsigned FPReg = getFrameRegister(); 3012f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) MachineLocation Dst(MachineLocation::VirtualFP); 3022f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) MachineLocation Src(FPReg, 0); 3032f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) Moves.push_back(MachineMove(0, Dst, Src)); 3042f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)} 3052f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) 3062f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)unsigned HexagonRegisterInfo::getEHExceptionRegister() const { 3072f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles) llvm_unreachable("What is the exception register"); 30846d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 30946d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 3102f22f038970e0d1927c41b04bbf5589bd12c5316Torne (Richard Coles)unsigned HexagonRegisterInfo::getEHHandlerRegister() const { 31146d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) llvm_unreachable("What is the exception handler register"); 31246d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)} 31346d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles) 31446d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#define GET_REGINFO_TARGET_DESC 31546d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)#include "HexagonGenRegisterInfo.inc" 31646d4c2bc3267f3f028f39e7e311b0f89aba2e4fdTorne (Richard Coles)