1//===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the entry points for global functions defined in 11// the LLVM NVPTX back-end. 12// 13//===----------------------------------------------------------------------===// 14 15#ifndef LLVM_TARGET_NVPTX_H 16#define LLVM_TARGET_NVPTX_H 17 18#include "MCTargetDesc/NVPTXBaseInfo.h" 19#include "llvm/ADT/StringMap.h" 20#include "llvm/IR/Module.h" 21#include "llvm/IR/Value.h" 22#include "llvm/Support/ErrorHandling.h" 23#include "llvm/Target/TargetMachine.h" 24#include <cassert> 25#include <iosfwd> 26 27namespace llvm { 28class NVPTXTargetMachine; 29class FunctionPass; 30class MachineFunctionPass; 31class formatted_raw_ostream; 32 33namespace NVPTXCC { 34enum CondCodes { 35 EQ, 36 NE, 37 LT, 38 LE, 39 GT, 40 GE 41}; 42} 43 44inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) { 45 switch (CC) { 46 case NVPTXCC::NE: 47 return "ne"; 48 case NVPTXCC::EQ: 49 return "eq"; 50 case NVPTXCC::LT: 51 return "lt"; 52 case NVPTXCC::LE: 53 return "le"; 54 case NVPTXCC::GT: 55 return "gt"; 56 case NVPTXCC::GE: 57 return "ge"; 58 } 59 llvm_unreachable("Unknown condition code"); 60} 61 62FunctionPass * 63createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel); 64ModulePass *createNVPTXAssignValidGlobalNamesPass(); 65ModulePass *createGenericToNVVMPass(); 66FunctionPass *createNVPTXFavorNonGenericAddrSpacesPass(); 67ModulePass *createNVVMReflectPass(); 68ModulePass *createNVVMReflectPass(const StringMap<int>& Mapping); 69MachineFunctionPass *createNVPTXPrologEpilogPass(); 70MachineFunctionPass *createNVPTXReplaceImageHandlesPass(); 71FunctionPass *createNVPTXImageOptimizerPass(); 72 73bool isImageOrSamplerVal(const Value *, const Module *); 74 75extern Target TheNVPTXTarget32; 76extern Target TheNVPTXTarget64; 77 78namespace NVPTX { 79enum DrvInterface { 80 NVCL, 81 CUDA 82}; 83 84// A field inside TSFlags needs a shift and a mask. The usage is 85// always as follows : 86// ((TSFlags & fieldMask) >> fieldShift) 87// The enum keeps the mask, the shift, and all valid values of the 88// field in one place. 89enum VecInstType { 90 VecInstTypeShift = 0, 91 VecInstTypeMask = 0xF, 92 93 VecNOP = 0, 94 VecLoad = 1, 95 VecStore = 2, 96 VecBuild = 3, 97 VecShuffle = 4, 98 VecExtract = 5, 99 VecInsert = 6, 100 VecDest = 7, 101 VecOther = 15 102}; 103 104enum SimpleMove { 105 SimpleMoveMask = 0x10, 106 SimpleMoveShift = 4 107}; 108enum LoadStore { 109 isLoadMask = 0x20, 110 isLoadShift = 5, 111 isStoreMask = 0x40, 112 isStoreShift = 6 113}; 114 115namespace PTXLdStInstCode { 116enum AddressSpace { 117 GENERIC = 0, 118 GLOBAL = 1, 119 CONSTANT = 2, 120 SHARED = 3, 121 PARAM = 4, 122 LOCAL = 5 123}; 124enum FromType { 125 Unsigned = 0, 126 Signed, 127 Float 128}; 129enum VecType { 130 Scalar = 1, 131 V2 = 2, 132 V4 = 4 133}; 134} 135 136/// PTXCvtMode - Conversion code enumeration 137namespace PTXCvtMode { 138enum CvtMode { 139 NONE = 0, 140 RNI, 141 RZI, 142 RMI, 143 RPI, 144 RN, 145 RZ, 146 RM, 147 RP, 148 149 BASE_MASK = 0x0F, 150 FTZ_FLAG = 0x10, 151 SAT_FLAG = 0x20 152}; 153} 154 155/// PTXCmpMode - Comparison mode enumeration 156namespace PTXCmpMode { 157enum CmpMode { 158 EQ = 0, 159 NE, 160 LT, 161 LE, 162 GT, 163 GE, 164 LO, 165 LS, 166 HI, 167 HS, 168 EQU, 169 NEU, 170 LTU, 171 LEU, 172 GTU, 173 GEU, 174 NUM, 175 // NAN is a MACRO 176 NotANumber, 177 178 BASE_MASK = 0xFF, 179 FTZ_FLAG = 0x100 180}; 181} 182} 183} // end namespace llvm; 184 185// Defines symbolic names for NVPTX registers. This defines a mapping from 186// register name to register number. 187#define GET_REGINFO_ENUM 188#include "NVPTXGenRegisterInfo.inc" 189 190// Defines symbolic names for the NVPTX instructions. 191#define GET_INSTRINFO_ENUM 192#include "NVPTXGenInstrInfo.inc" 193 194#endif 195