PPCTargetMachine.cpp revision 00b16889ab461b7ecef1c91ade101186b7f1fce2
1//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// 11//===----------------------------------------------------------------------===// 12 13#include "PowerPC.h" 14#include "PowerPCTargetMachine.h" 15#include "PowerPCFrameInfo.h" 16#include "PPC32TargetMachine.h" 17#include "PPC64TargetMachine.h" 18#include "PPC32JITInfo.h" 19#include "PPC64JITInfo.h" 20#include "llvm/Module.h" 21#include "llvm/PassManager.h" 22#include "llvm/CodeGen/IntrinsicLowering.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/Passes.h" 25#include "llvm/Target/TargetOptions.h" 26#include "llvm/Target/TargetMachineRegistry.h" 27#include "llvm/Transforms/Scalar.h" 28#include "llvm/Support/CommandLine.h" 29#include <iostream> 30using namespace llvm; 31 32bool llvm::GPOPT = false; 33 34namespace llvm { 35 cl::opt<bool> AIX("aix", 36 cl::desc("Generate AIX/xcoff instead of Darwin/MachO"), 37 cl::Hidden); 38 cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc", 39 cl::desc("Enable LSR for PPC (beta)"), 40 cl::Hidden); 41 cl::opt<bool, true> EnableGPOPT("enable-gpopt", cl::Hidden, 42 cl::location(GPOPT), 43 cl::desc("Enable optimizations for GP cpus")); 44} 45 46namespace { 47 const std::string PPC32ID = "PowerPC/32bit"; 48 const std::string PPC64ID = "PowerPC/64bit"; 49 50 // Register the targets 51 RegisterTarget<PPC32TargetMachine> 52 X("ppc32", " PowerPC 32-bit"); 53 54#if 0 55 RegisterTarget<PPC64TargetMachine> 56 Y("ppc64", " PowerPC 64-bit (unimplemented)"); 57#endif 58} 59 60PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name, 61 IntrinsicLowering *IL, 62 const TargetData &TD, 63 const PowerPCFrameInfo &TFI) 64 : TargetMachine(name, IL, TD), FrameInfo(TFI) 65{} 66 67unsigned PPC32TargetMachine::getJITMatchQuality() { 68#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) 69 return 10; 70#else 71 return 0; 72#endif 73} 74 75/// addPassesToEmitFile - Add passes to the specified pass manager to implement 76/// a static compiler for this target. 77/// 78bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM, 79 std::ostream &Out, 80 CodeGenFileType FileType) { 81 if (FileType != TargetMachine::AssemblyFile) return true; 82 83 bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this)); 84 85 if (EnablePPCLSR) { 86 PM.add(createLoopStrengthReducePass()); 87 PM.add(createCFGSimplificationPass()); 88 } 89 90 // FIXME: Implement efficient support for garbage collection intrinsics. 91 PM.add(createLowerGCPass()); 92 93 // FIXME: Implement the invoke/unwind instructions! 94 PM.add(createLowerInvokePass()); 95 96 // FIXME: Implement the switch instruction in the instruction selector! 97 PM.add(createLowerSwitchPass()); 98 99 PM.add(createLowerConstantExpressionsPass()); 100 101 // Make sure that no unreachable blocks are instruction selected. 102 PM.add(createUnreachableBlockEliminationPass()); 103 104 // Default to pattern ISel 105 if (LP64) 106 PM.add(createPPC64ISelPattern(*this)); 107 else if (PatternISelTriState == 0) 108 PM.add(createPPC32ISelSimple(*this)); 109 else 110 PM.add(createPPC32ISelPattern(*this)); 111 112 if (PrintMachineCode) 113 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 114 115 PM.add(createRegisterAllocator()); 116 117 if (PrintMachineCode) 118 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 119 120 PM.add(createPrologEpilogCodeInserter()); 121 122 // Must run branch selection immediately preceding the asm printer 123 PM.add(createPPCBranchSelectionPass()); 124 125 if (AIX) 126 PM.add(createAIXAsmPrinter(Out, *this)); 127 else 128 PM.add(createDarwinAsmPrinter(Out, *this)); 129 130 PM.add(createMachineCodeDeleter()); 131 return false; 132} 133 134void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 135 // The JIT does not support or need PIC. 136 PICEnabled = false; 137 138 bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(&TM)); 139 140 if (EnablePPCLSR) { 141 PM.add(createLoopStrengthReducePass()); 142 PM.add(createCFGSimplificationPass()); 143 } 144 145 // FIXME: Implement efficient support for garbage collection intrinsics. 146 PM.add(createLowerGCPass()); 147 148 // FIXME: Implement the invoke/unwind instructions! 149 PM.add(createLowerInvokePass()); 150 151 // FIXME: Implement the switch instruction in the instruction selector! 152 PM.add(createLowerSwitchPass()); 153 154 PM.add(createLowerConstantExpressionsPass()); 155 156 // Make sure that no unreachable blocks are instruction selected. 157 PM.add(createUnreachableBlockEliminationPass()); 158 159 // Default to pattern ISel 160 if (LP64) 161 PM.add(createPPC64ISelPattern(TM)); 162 else if (PatternISelTriState == 0) 163 PM.add(createPPC32ISelSimple(TM)); 164 else 165 PM.add(createPPC32ISelPattern(TM)); 166 167 PM.add(createRegisterAllocator()); 168 PM.add(createPrologEpilogCodeInserter()); 169 170 // Must run branch selection immediately preceding the asm printer 171 PM.add(createPPCBranchSelectionPass()); 172 173 if (PrintMachineCode) 174 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 175} 176 177/// PowerPCTargetMachine ctor - Create an ILP32 architecture model 178/// 179PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL) 180 : PowerPCTargetMachine(PPC32ID, IL, 181 TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1), 182 PowerPCFrameInfo(*this, false)), JITInfo(*this) {} 183 184/// PPC64TargetMachine ctor - Create a LP64 architecture model 185/// 186PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL) 187 : PowerPCTargetMachine(PPC64ID, IL, 188 TargetData(PPC64ID,false,8,4,4,4,4,4,2,1,1), 189 PowerPCFrameInfo(*this, true)) {} 190 191unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) { 192 // We strongly match "powerpc-*". 193 std::string TT = M.getTargetTriple(); 194 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-") 195 return 20; 196 197 if (M.getEndianness() == Module::BigEndian && 198 M.getPointerSize() == Module::Pointer32) 199 return 10; // Weak match 200 else if (M.getEndianness() != Module::AnyEndianness || 201 M.getPointerSize() != Module::AnyPointerSize) 202 return 0; // Match for some other target 203 204 return getJITMatchQuality()/2; 205} 206 207unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) { 208 if (M.getEndianness() == Module::BigEndian && 209 M.getPointerSize() == Module::Pointer64) 210 return 10; // Direct match 211 else if (M.getEndianness() != Module::AnyEndianness || 212 M.getPointerSize() != Module::AnyPointerSize) 213 return 0; // Match for some other target 214 215 return getJITMatchQuality()/2; 216} 217