PPCTargetMachine.cpp revision 1d3527edbf473d357ee79fb8638e24d1bf992831 
1//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10//
11//===----------------------------------------------------------------------===//
12
13#include "PowerPC.h"
14#include "PowerPCTargetMachine.h"
15#include "PPC32TargetMachine.h"
16#include "PPC64TargetMachine.h"
17#include "PPC32JITInfo.h"
18#include "PPC64JITInfo.h"
19#include "llvm/Module.h"
20#include "llvm/PassManager.h"
21#include "llvm/CodeGen/IntrinsicLowering.h"
22#include "llvm/CodeGen/MachineFunction.h"
23#include "llvm/CodeGen/Passes.h"
24#include "llvm/Target/TargetOptions.h"
25#include "llvm/Target/TargetMachineRegistry.h"
26#include "llvm/Transforms/Scalar.h"
27#include "Support/CommandLine.h"
28#include <iostream>
29using namespace llvm;
30
31namespace llvm {
32  cl::opt<bool> AIX("aix",
33                    cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
34                    cl::Hidden);
35}
36
37namespace {
38  const std::string PPC32 = "PowerPC/32bit";
39  const std::string PPC64 = "PowerPC/64bit";
40
41  // Register the targets
42  RegisterTarget<PPC32TargetMachine>
43  X("ppc32", "  PowerPC 32-bit (experimental)");
44  RegisterTarget<PPC64TargetMachine>
45  Y("ppc64", "  PowerPC 64-bit (unimplemented)");
46}
47
48PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
49                                           IntrinsicLowering *IL,
50                                           const TargetData &TD,
51                                           const TargetFrameInfo &TFI,
52                                           const PowerPCJITInfo &TJI,
53                                           bool is64b)
54  : TargetMachine(name, IL, TD), InstrInfo(is64b), FrameInfo(TFI), JITInfo(TJI)
55{}
56
57unsigned PowerPCTargetMachine::getJITMatchQuality() {
58#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
59  return 10;
60#else
61  return 0;
62#endif
63}
64
65/// addPassesToEmitAssembly - Add passes to the specified pass manager
66/// to implement a static compiler for this target.
67///
68bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
69                                                   std::ostream &Out) {
70  bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
71
72  // FIXME: Implement efficient support for garbage collection intrinsics.
73  PM.add(createLowerGCPass());
74
75  // FIXME: Implement the invoke/unwind instructions!
76  PM.add(createLowerInvokePass());
77
78  // FIXME: Implement the switch instruction in the instruction selector!
79  PM.add(createLowerSwitchPass());
80
81  PM.add(createLowerConstantExpressionsPass());
82
83  // Make sure that no unreachable blocks are instruction selected.
84  PM.add(createUnreachableBlockEliminationPass());
85
86  if (LP64)
87    PM.add(createPPC64ISelSimple(*this));
88  else
89    PM.add(createPPC32ISelSimple(*this));
90
91  if (PrintMachineCode)
92    PM.add(createMachineFunctionPrinterPass(&std::cerr));
93
94  PM.add(createRegisterAllocator());
95
96  if (PrintMachineCode)
97    PM.add(createMachineFunctionPrinterPass(&std::cerr));
98
99  // PowerPC-specific prolog/epilog code inserter to put the fills/spills in the
100  // right spots.
101  PM.add(createPowerPCPEI());
102
103  // Must run branch selection immediately preceding the printer
104  PM.add(createPPCBranchSelectionPass());
105
106  if (AIX)
107    PM.add(createPPC64AsmPrinter(Out, *this));
108  else
109    PM.add(createPPC32AsmPrinter(Out, *this));
110
111  PM.add(createMachineCodeDeleter());
112  return false;
113}
114
115void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
116  // FIXME: Implement efficient support for garbage collection intrinsics.
117  PM.add(createLowerGCPass());
118
119  // FIXME: Implement the invoke/unwind instructions!
120  PM.add(createLowerInvokePass());
121
122  // FIXME: Implement the switch instruction in the instruction selector!
123  PM.add(createLowerSwitchPass());
124
125  PM.add(createLowerConstantExpressionsPass());
126
127  // Make sure that no unreachable blocks are instruction selected.
128  PM.add(createUnreachableBlockEliminationPass());
129
130  PM.add(createPPC32ISelSimple(TM));
131  PM.add(createRegisterAllocator());
132  PM.add(createPrologEpilogCodeInserter());
133}
134
135void PowerPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
136  assert(0 && "Cannot execute PowerPCJITInfo::replaceMachineCodeForFunction()");
137}
138
139void *PowerPCJITInfo::getJITStubForFunction(Function *F,
140                                            MachineCodeEmitter &MCE) {
141  assert(0 && "Cannot execute PowerPCJITInfo::getJITStubForFunction()");
142  return 0;
143}
144
145/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
146///
147PPC32TargetMachine::PPC32TargetMachine(const Module &M,
148                                               IntrinsicLowering *IL)
149  : PowerPCTargetMachine(PPC32, IL,
150                         TargetData(PPC32,false,4,4,4,4,4,4,2,1,4),
151                         TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,0),
152                         PPC32JITInfo(*this), false) {}
153
154/// PPC64TargetMachine ctor - Create a LP64 architecture model
155///
156PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
157  : PowerPCTargetMachine(PPC64, IL,
158                         TargetData(PPC64,false,8,4,4,4,4,4,2,1,4),
159                         TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,0),
160                         PPC64JITInfo(*this), true) {}
161
162unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
163  if (M.getEndianness()  == Module::BigEndian &&
164      M.getPointerSize() == Module::Pointer32)
165    return 10;                                   // Direct match
166  else if (M.getEndianness() != Module::AnyEndianness ||
167           M.getPointerSize() != Module::AnyPointerSize)
168    return 0;                                    // Match for some other target
169
170  return getJITMatchQuality()/2;
171}
172
173unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
174  if (M.getEndianness()  == Module::BigEndian &&
175      M.getPointerSize() == Module::Pointer64)
176    return 10;                                   // Direct match
177  else if (M.getEndianness() != Module::AnyEndianness ||
178           M.getPointerSize() != Module::AnyPointerSize)
179    return 0;                                    // Match for some other target
180
181  return getJITMatchQuality()/2;
182}
183