PPCTargetMachine.cpp revision b0096bd19d6d519c8cc60c69c2658af6f1a2dbfd
1//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Top-level implementation for the PowerPC target. 11// 12//===----------------------------------------------------------------------===// 13 14#include "PowerPC.h" 15#include "PowerPCTargetMachine.h" 16#include "PowerPCFrameInfo.h" 17#include "PPC32TargetMachine.h" 18#include "PPC32JITInfo.h" 19#include "llvm/Module.h" 20#include "llvm/PassManager.h" 21#include "llvm/Analysis/Verifier.h" 22#include "llvm/CodeGen/IntrinsicLowering.h" 23#include "llvm/CodeGen/MachineFunction.h" 24#include "llvm/CodeGen/Passes.h" 25#include "llvm/Target/TargetOptions.h" 26#include "llvm/Target/TargetMachineRegistry.h" 27#include "llvm/Transforms/Scalar.h" 28#include "llvm/Support/CommandLine.h" 29#include <iostream> 30using namespace llvm; 31 32namespace { 33 const std::string PPC32ID = "PowerPC/32bit"; 34 35 // Register the targets 36 RegisterTarget<PPC32TargetMachine> 37 X("ppc32", " PowerPC 32-bit"); 38} 39 40PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name, 41 IntrinsicLowering *IL, 42 const Module &M, 43 const TargetData &TD, 44 const PowerPCFrameInfo &TFI) 45: TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M) { 46 if (TargetDefault == PPCTarget) { 47 if (Subtarget.isAIX()) PPCTarget = TargetAIX; 48 if (Subtarget.isDarwin()) PPCTarget = TargetDarwin; 49 } 50} 51 52unsigned PPC32TargetMachine::getJITMatchQuality() { 53#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) 54 return 10; 55#else 56 return 0; 57#endif 58} 59 60/// addPassesToEmitFile - Add passes to the specified pass manager to implement 61/// a static compiler for this target. 62/// 63bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM, 64 std::ostream &Out, 65 CodeGenFileType FileType) { 66 if (FileType != TargetMachine::AssemblyFile) return true; 67 68 // Run loop strength reduction before anything else. 69 PM.add(createLoopStrengthReducePass()); 70 PM.add(createCFGSimplificationPass()); 71 72 // FIXME: Implement efficient support for garbage collection intrinsics. 73 PM.add(createLowerGCPass()); 74 75 // FIXME: Implement the invoke/unwind instructions! 76 PM.add(createLowerInvokePass()); 77 78 // FIXME: Implement the switch instruction in the instruction selector! 79 PM.add(createLowerSwitchPass()); 80 81 // Make sure that no unreachable blocks are instruction selected. 82 PM.add(createUnreachableBlockEliminationPass()); 83 84 // Default to pattern ISel 85 if (PatternISelTriState == 0) { 86 PM.add(createLowerConstantExpressionsPass()); 87 PM.add(createPPC32ISelSimple(*this)); 88 } else 89 PM.add(createPPC32ISelPattern(*this)); 90 91 if (PrintMachineCode) 92 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 93 94 PM.add(createRegisterAllocator()); 95 96 if (PrintMachineCode) 97 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 98 99 PM.add(createPrologEpilogCodeInserter()); 100 101 // Must run branch selection immediately preceding the asm printer 102 PM.add(createPPCBranchSelectionPass()); 103 104 // Decide which asm printer to use. If the user has not specified one on 105 // the command line, choose whichever one matches the default (current host). 106 switch (PPCTarget) { 107 case TargetAIX: 108 PM.add(createAIXAsmPrinter(Out, *this)); 109 break; 110 case TargetDefault: 111 case TargetDarwin: 112 PM.add(createDarwinAsmPrinter(Out, *this)); 113 break; 114 } 115 116 PM.add(createMachineCodeDeleter()); 117 return false; 118} 119 120void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { 121 // The JIT does not support or need PIC. 122 PICEnabled = false; 123 124 // Run loop strength reduction before anything else. 125 PM.add(createLoopStrengthReducePass()); 126 PM.add(createCFGSimplificationPass()); 127 128 // FIXME: Implement efficient support for garbage collection intrinsics. 129 PM.add(createLowerGCPass()); 130 131 // FIXME: Implement the invoke/unwind instructions! 132 PM.add(createLowerInvokePass()); 133 134 // FIXME: Implement the switch instruction in the instruction selector! 135 PM.add(createLowerSwitchPass()); 136 137 // Make sure that no unreachable blocks are instruction selected. 138 PM.add(createUnreachableBlockEliminationPass()); 139 140 // Default to pattern ISel 141 if (PatternISelTriState == 0) { 142 PM.add(createLowerConstantExpressionsPass()); 143 PM.add(createPPC32ISelSimple(TM)); 144 } else { 145 PM.add(createPPC32ISelPattern(TM)); 146 } 147 148 PM.add(createRegisterAllocator()); 149 PM.add(createPrologEpilogCodeInserter()); 150 151 // Must run branch selection immediately preceding the asm printer 152 PM.add(createPPCBranchSelectionPass()); 153 154 if (PrintMachineCode) 155 PM.add(createMachineFunctionPrinterPass(&std::cerr)); 156} 157 158/// PowerPCTargetMachine ctor - Create an ILP32 architecture model 159/// 160PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL) 161 : PowerPCTargetMachine(PPC32ID, IL, M, 162 TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1), 163 PowerPCFrameInfo(*this, false)), JITInfo(*this) {} 164 165unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) { 166 // We strongly match "powerpc-*". 167 std::string TT = M.getTargetTriple(); 168 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-") 169 return 20; 170 171 if (M.getEndianness() == Module::BigEndian && 172 M.getPointerSize() == Module::Pointer32) 173 return 10; // Weak match 174 else if (M.getEndianness() != Module::AnyEndianness || 175 M.getPointerSize() != Module::AnyPointerSize) 176 return 0; // Match for some other target 177 178 return getJITMatchQuality()/2; 179} 180