vl_idct.c revision 3e976ef31a27ca9a23372f4364955f0f0a5c4ef4
1/************************************************************************** 2 * 3 * Copyright 2010 Christian König 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28#include <assert.h> 29 30#include <pipe/p_context.h> 31#include <pipe/p_screen.h> 32 33#include <util/u_draw.h> 34#include <util/u_sampler.h> 35 36#include <tgsi/tgsi_ureg.h> 37 38#include "vl_defines.h" 39#include "vl_types.h" 40#include "vl_vertex_buffers.h" 41#include "vl_idct.h" 42 43enum VS_OUTPUT 44{ 45 VS_O_VPOS, 46 VS_O_L_ADDR0, 47 VS_O_L_ADDR1, 48 VS_O_R_ADDR0, 49 VS_O_R_ADDR1 50}; 51 52/** 53 * The DCT matrix stored as hex representation of floats. Equal to the following equation: 54 * for (i = 0; i < 8; ++i) 55 * for (j = 0; j < 8; ++j) 56 * if (i == 0) const_matrix[i][j] = 1.0f / sqrtf(8.0f); 57 * else const_matrix[i][j] = sqrtf(2.0f / 8.0f) * cosf((2 * j + 1) * i * M_PI / (2.0f * 8.0f)); 58 */ 59static const uint32_t const_matrix[8][8] = { 60 { 0x3eb504f3, 0x3eb504f3, 0x3eb504f3, 0x3eb504f3, 0x3eb504f3, 0x3eb504f3, 0x3eb504f3, 0x3eb504f3 }, 61 { 0x3efb14be, 0x3ed4db31, 0x3e8e39da, 0x3dc7c5c4, 0xbdc7c5c2, 0xbe8e39d9, 0xbed4db32, 0xbefb14bf }, 62 { 0x3eec835f, 0x3e43ef15, 0xbe43ef14, 0xbeec835e, 0xbeec835f, 0xbe43ef1a, 0x3e43ef1b, 0x3eec835f }, 63 { 0x3ed4db31, 0xbdc7c5c2, 0xbefb14bf, 0xbe8e39dd, 0x3e8e39d7, 0x3efb14bf, 0x3dc7c5d0, 0xbed4db34 }, 64 { 0x3eb504f3, 0xbeb504f3, 0xbeb504f4, 0x3eb504f1, 0x3eb504f3, 0xbeb504f0, 0xbeb504ef, 0x3eb504f4 }, 65 { 0x3e8e39da, 0xbefb14bf, 0x3dc7c5c8, 0x3ed4db32, 0xbed4db34, 0xbdc7c5bb, 0x3efb14bf, 0xbe8e39d7 }, 66 { 0x3e43ef15, 0xbeec835f, 0x3eec835f, 0xbe43ef07, 0xbe43ef23, 0x3eec8361, 0xbeec835c, 0x3e43ef25 }, 67 { 0x3dc7c5c4, 0xbe8e39dd, 0x3ed4db32, 0xbefb14c0, 0x3efb14be, 0xbed4db31, 0x3e8e39ce, 0xbdc7c596 }, 68}; 69 70static void 71calc_addr(struct ureg_program *shader, struct ureg_dst addr[2], 72 struct ureg_src tc, struct ureg_src start, bool right_side, 73 bool transposed, float size) 74{ 75 unsigned wm_start = (right_side == transposed) ? TGSI_WRITEMASK_X : TGSI_WRITEMASK_Y; 76 unsigned sw_start = right_side ? TGSI_SWIZZLE_Y : TGSI_SWIZZLE_X; 77 78 unsigned wm_tc = (right_side == transposed) ? TGSI_WRITEMASK_Y : TGSI_WRITEMASK_X; 79 unsigned sw_tc = right_side ? TGSI_SWIZZLE_X : TGSI_SWIZZLE_Y; 80 81 /* 82 * addr[0..1].(start) = right_side ? start.x : tc.x 83 * addr[0..1].(tc) = right_side ? tc.y : start.y 84 * addr[0..1].z = tc.z 85 * addr[1].(start) += 1.0f / scale 86 */ 87 ureg_MOV(shader, ureg_writemask(addr[0], wm_start), ureg_scalar(start, sw_start)); 88 ureg_MOV(shader, ureg_writemask(addr[0], wm_tc), ureg_scalar(tc, sw_tc)); 89 ureg_MOV(shader, ureg_writemask(addr[0], TGSI_WRITEMASK_Z), tc); 90 91 ureg_ADD(shader, ureg_writemask(addr[1], wm_start), ureg_scalar(start, sw_start), ureg_imm1f(shader, 1.0f / size)); 92 ureg_MOV(shader, ureg_writemask(addr[1], wm_tc), ureg_scalar(tc, sw_tc)); 93 ureg_MOV(shader, ureg_writemask(addr[1], TGSI_WRITEMASK_Z), tc); 94} 95 96static void 97increment_addr(struct ureg_program *shader, struct ureg_dst daddr[2], 98 struct ureg_src saddr[2], bool right_side, bool transposed, 99 int pos, float size) 100{ 101 unsigned wm_start = (right_side == transposed) ? TGSI_WRITEMASK_X : TGSI_WRITEMASK_Y; 102 unsigned wm_tc = (right_side == transposed) ? TGSI_WRITEMASK_Y : TGSI_WRITEMASK_X; 103 104 /* 105 * daddr[0..1].(start) = saddr[0..1].(start) 106 * daddr[0..1].(tc) = saddr[0..1].(tc) 107 */ 108 109 ureg_MOV(shader, ureg_writemask(daddr[0], wm_start), saddr[0]); 110 ureg_ADD(shader, ureg_writemask(daddr[0], wm_tc), saddr[0], ureg_imm1f(shader, pos / size)); 111 ureg_MOV(shader, ureg_writemask(daddr[1], wm_start), saddr[1]); 112 ureg_ADD(shader, ureg_writemask(daddr[1], wm_tc), saddr[1], ureg_imm1f(shader, pos / size)); 113} 114 115static void 116fetch_four(struct ureg_program *shader, struct ureg_dst m[2], struct ureg_src addr[2], struct ureg_src sampler) 117{ 118 ureg_TEX(shader, m[0], TGSI_TEXTURE_3D, addr[0], sampler); 119 ureg_TEX(shader, m[1], TGSI_TEXTURE_3D, addr[1], sampler); 120} 121 122static void 123matrix_mul(struct ureg_program *shader, struct ureg_dst dst, struct ureg_dst l[2], struct ureg_dst r[2]) 124{ 125 struct ureg_dst tmp; 126 127 tmp = ureg_DECL_temporary(shader); 128 129 /* 130 * tmp.xy = dot4(m[0][0..1], m[1][0..1]) 131 * dst = tmp.x + tmp.y 132 */ 133 ureg_DP4(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_src(l[0]), ureg_src(r[0])); 134 ureg_DP4(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(l[1]), ureg_src(r[1])); 135 ureg_ADD(shader, dst, 136 ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), 137 ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y)); 138 139 ureg_release_temporary(shader, tmp); 140} 141 142static void * 143create_stage1_vert_shader(struct vl_idct *idct) 144{ 145 struct ureg_program *shader; 146 struct ureg_src vrect, vpos; 147 struct ureg_src scale; 148 struct ureg_dst t_tex, t_start; 149 struct ureg_dst o_vpos, o_l_addr[2], o_r_addr[2]; 150 151 shader = ureg_create(TGSI_PROCESSOR_VERTEX); 152 if (!shader) 153 return NULL; 154 155 vrect = ureg_DECL_vs_input(shader, VS_I_RECT); 156 vpos = ureg_DECL_vs_input(shader, VS_I_VPOS); 157 158 t_tex = ureg_DECL_temporary(shader); 159 t_start = ureg_DECL_temporary(shader); 160 161 o_vpos = ureg_DECL_output(shader, TGSI_SEMANTIC_POSITION, VS_O_VPOS); 162 163 o_l_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR0); 164 o_l_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR1); 165 166 o_r_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_R_ADDR0); 167 o_r_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, VS_O_R_ADDR1); 168 169 /* 170 * scale = (BLOCK_WIDTH, BLOCK_HEIGHT) / (dst.width, dst.height) 171 * 172 * t_vpos = vpos + vrect 173 * o_vpos.xy = t_vpos * scale 174 * o_vpos.zw = vpos 175 * 176 * o_l_addr = calc_addr(...) 177 * o_r_addr = calc_addr(...) 178 * 179 */ 180 181 scale = ureg_imm2f(shader, 182 (float)BLOCK_WIDTH / idct->buffer_width, 183 (float)BLOCK_HEIGHT / idct->buffer_height); 184 185 ureg_ADD(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_XY), vpos, vrect); 186 ureg_MUL(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_XY), ureg_src(t_tex), scale); 187 188 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), ureg_src(t_tex)); 189 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f)); 190 191 ureg_MUL(shader, ureg_writemask(t_tex, TGSI_WRITEMASK_Z), 192 ureg_scalar(vrect, TGSI_SWIZZLE_X), 193 ureg_imm1f(shader, BLOCK_WIDTH / idct->nr_of_render_targets)); 194 ureg_MUL(shader, ureg_writemask(t_start, TGSI_WRITEMASK_XY), vpos, scale); 195 196 calc_addr(shader, o_l_addr, ureg_src(t_tex), ureg_src(t_start), false, false, idct->buffer_width / 4); 197 calc_addr(shader, o_r_addr, vrect, ureg_imm1f(shader, 0.0f), true, true, BLOCK_WIDTH / 4); 198 199 ureg_release_temporary(shader, t_tex); 200 ureg_release_temporary(shader, t_start); 201 202 ureg_END(shader); 203 204 return ureg_create_shader_and_destroy(shader, idct->pipe); 205} 206 207static void * 208create_stage1_frag_shader(struct vl_idct *idct) 209{ 210 struct ureg_program *shader; 211 212 struct ureg_src l_addr[2], r_addr[2]; 213 214 struct ureg_dst l[4][2], r[2]; 215 struct ureg_dst fragment[idct->nr_of_render_targets]; 216 217 int i, j; 218 219 shader = ureg_create(TGSI_PROCESSOR_FRAGMENT); 220 if (!shader) 221 return NULL; 222 223 l_addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR0, TGSI_INTERPOLATE_LINEAR); 224 l_addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_L_ADDR1, TGSI_INTERPOLATE_LINEAR); 225 226 r_addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_R_ADDR0, TGSI_INTERPOLATE_LINEAR); 227 r_addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, VS_O_R_ADDR1, TGSI_INTERPOLATE_LINEAR); 228 229 for (i = 0; i < idct->nr_of_render_targets; ++i) 230 fragment[i] = ureg_DECL_output(shader, TGSI_SEMANTIC_COLOR, i); 231 232 for (i = 0; i < 4; ++i) { 233 l[i][0] = ureg_DECL_temporary(shader); 234 l[i][1] = ureg_DECL_temporary(shader); 235 } 236 237 r[0] = ureg_DECL_temporary(shader); 238 r[1] = ureg_DECL_temporary(shader); 239 240 for (i = 0; i < 4; ++i) { 241 increment_addr(shader, l[i], l_addr, false, false, i - 2, idct->buffer_height); 242 } 243 244 for (i = 0; i < 4; ++i) { 245 struct ureg_src s_addr[2] = { ureg_src(l[i][0]), ureg_src(l[i][1]) }; 246 fetch_four(shader, l[i], s_addr, ureg_DECL_sampler(shader, 1)); 247 } 248 249 for (i = 0; i < idct->nr_of_render_targets; ++i) { 250 increment_addr(shader, r, r_addr, true, true, i - (signed)idct->nr_of_render_targets / 2, BLOCK_HEIGHT); 251 252 struct ureg_src s_addr[2] = { ureg_src(r[0]), ureg_src(r[1]) }; 253 fetch_four(shader, r, s_addr, ureg_DECL_sampler(shader, 0)); 254 255 for (j = 0; j < 4; ++j) { 256 matrix_mul(shader, ureg_writemask(fragment[i], TGSI_WRITEMASK_X << j), l[j], r); 257 } 258 } 259 260 for (i = 0; i < 4; ++i) { 261 ureg_release_temporary(shader, l[i][0]); 262 ureg_release_temporary(shader, l[i][1]); 263 } 264 ureg_release_temporary(shader, r[0]); 265 ureg_release_temporary(shader, r[1]); 266 267 ureg_END(shader); 268 269 return ureg_create_shader_and_destroy(shader, idct->pipe); 270} 271 272void 273vl_idct_stage2_vert_shader(struct vl_idct *idct, struct ureg_program *shader, 274 unsigned first_output, struct ureg_dst tex) 275{ 276 struct ureg_src vrect, vpos; 277 struct ureg_src scale; 278 struct ureg_dst t_start; 279 struct ureg_dst o_l_addr[2], o_r_addr[2]; 280 281 vrect = ureg_DECL_vs_input(shader, VS_I_RECT); 282 vpos = ureg_DECL_vs_input(shader, VS_I_VPOS); 283 284 t_start = ureg_DECL_temporary(shader); 285 286 --first_output; 287 288 o_l_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, first_output + VS_O_L_ADDR0); 289 o_l_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, first_output + VS_O_L_ADDR1); 290 291 o_r_addr[0] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, first_output + VS_O_R_ADDR0); 292 o_r_addr[1] = ureg_DECL_output(shader, TGSI_SEMANTIC_GENERIC, first_output + VS_O_R_ADDR1); 293 294 scale = ureg_imm2f(shader, 295 (float)BLOCK_WIDTH / idct->buffer_width, 296 (float)BLOCK_HEIGHT / idct->buffer_height); 297 298 ureg_MUL(shader, ureg_writemask(tex, TGSI_WRITEMASK_Z), 299 ureg_scalar(vrect, TGSI_SWIZZLE_X), 300 ureg_imm1f(shader, BLOCK_WIDTH / idct->nr_of_render_targets)); 301 ureg_MUL(shader, ureg_writemask(t_start, TGSI_WRITEMASK_XY), vpos, scale); 302 303 calc_addr(shader, o_l_addr, vrect, ureg_imm1f(shader, 0.0f), false, false, BLOCK_WIDTH / 4); 304 calc_addr(shader, o_r_addr, ureg_src(tex), ureg_src(t_start), true, false, idct->buffer_height / 4); 305} 306 307void 308vl_idct_stage2_frag_shader(struct vl_idct *idct, struct ureg_program *shader, 309 unsigned first_input, struct ureg_dst fragment) 310{ 311 struct ureg_src l_addr[2], r_addr[2]; 312 313 struct ureg_dst l[2], r[2]; 314 315 --first_input; 316 317 l_addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, first_input + VS_O_L_ADDR0, TGSI_INTERPOLATE_LINEAR); 318 l_addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, first_input + VS_O_L_ADDR1, TGSI_INTERPOLATE_LINEAR); 319 320 r_addr[0] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, first_input + VS_O_R_ADDR0, TGSI_INTERPOLATE_LINEAR); 321 r_addr[1] = ureg_DECL_fs_input(shader, TGSI_SEMANTIC_GENERIC, first_input + VS_O_R_ADDR1, TGSI_INTERPOLATE_LINEAR); 322 323 l[0] = ureg_DECL_temporary(shader); 324 l[1] = ureg_DECL_temporary(shader); 325 r[0] = ureg_DECL_temporary(shader); 326 r[1] = ureg_DECL_temporary(shader); 327 328 fetch_four(shader, l, l_addr, ureg_DECL_sampler(shader, 0)); 329 fetch_four(shader, r, r_addr, ureg_DECL_sampler(shader, 1)); 330 331 matrix_mul(shader, fragment, l, r); 332 333 ureg_release_temporary(shader, l[0]); 334 ureg_release_temporary(shader, l[1]); 335 ureg_release_temporary(shader, r[0]); 336 ureg_release_temporary(shader, r[1]); 337} 338 339static bool 340init_shaders(struct vl_idct *idct) 341{ 342 idct->vs = create_stage1_vert_shader(idct); 343 if (!idct->vs) 344 goto error_vs; 345 346 idct->fs = create_stage1_frag_shader(idct); 347 if (!idct->fs) 348 goto error_fs; 349 350 return true; 351 352error_fs: 353 idct->pipe->delete_vs_state(idct->pipe, idct->vs); 354 355error_vs: 356 return false; 357} 358 359static void 360cleanup_shaders(struct vl_idct *idct) 361{ 362 idct->pipe->delete_vs_state(idct->pipe, idct->vs); 363 idct->pipe->delete_fs_state(idct->pipe, idct->fs); 364} 365 366static bool 367init_state(struct vl_idct *idct) 368{ 369 struct pipe_blend_state blend; 370 struct pipe_rasterizer_state rs_state; 371 struct pipe_sampler_state sampler; 372 unsigned i; 373 374 assert(idct); 375 376 memset(&rs_state, 0, sizeof(rs_state)); 377 rs_state.gl_rasterization_rules = true; 378 idct->rs_state = idct->pipe->create_rasterizer_state(idct->pipe, &rs_state); 379 if (!idct->rs_state) 380 goto error_rs_state; 381 382 memset(&blend, 0, sizeof blend); 383 384 blend.independent_blend_enable = 0; 385 blend.rt[0].blend_enable = 0; 386 blend.rt[0].rgb_func = PIPE_BLEND_ADD; 387 blend.rt[0].rgb_src_factor = PIPE_BLENDFACTOR_ONE; 388 blend.rt[0].rgb_dst_factor = PIPE_BLENDFACTOR_ONE; 389 blend.rt[0].alpha_func = PIPE_BLEND_ADD; 390 blend.rt[0].alpha_src_factor = PIPE_BLENDFACTOR_ONE; 391 blend.rt[0].alpha_dst_factor = PIPE_BLENDFACTOR_ONE; 392 blend.logicop_enable = 0; 393 blend.logicop_func = PIPE_LOGICOP_CLEAR; 394 /* Needed to allow color writes to FB, even if blending disabled */ 395 blend.rt[0].colormask = PIPE_MASK_RGBA; 396 blend.dither = 0; 397 idct->blend = idct->pipe->create_blend_state(idct->pipe, &blend); 398 if (!idct->blend) 399 goto error_blend; 400 401 for (i = 0; i < 2; ++i) { 402 memset(&sampler, 0, sizeof(sampler)); 403 sampler.wrap_s = PIPE_TEX_WRAP_REPEAT; 404 sampler.wrap_t = PIPE_TEX_WRAP_REPEAT; 405 sampler.wrap_r = PIPE_TEX_WRAP_REPEAT; 406 sampler.min_img_filter = PIPE_TEX_FILTER_NEAREST; 407 sampler.min_mip_filter = PIPE_TEX_MIPFILTER_NONE; 408 sampler.mag_img_filter = PIPE_TEX_FILTER_NEAREST; 409 sampler.compare_mode = PIPE_TEX_COMPARE_NONE; 410 sampler.compare_func = PIPE_FUNC_ALWAYS; 411 sampler.normalized_coords = 1; 412 idct->samplers[i] = idct->pipe->create_sampler_state(idct->pipe, &sampler); 413 if (!idct->samplers[i]) 414 goto error_samplers; 415 } 416 417 return true; 418 419error_samplers: 420 for (i = 0; i < 2; ++i) 421 if (idct->samplers[i]) 422 idct->pipe->delete_sampler_state(idct->pipe, idct->samplers[i]); 423 424 idct->pipe->delete_rasterizer_state(idct->pipe, idct->rs_state); 425 426error_blend: 427 idct->pipe->delete_blend_state(idct->pipe, idct->blend); 428 429error_rs_state: 430 return false; 431} 432 433static void 434cleanup_state(struct vl_idct *idct) 435{ 436 unsigned i; 437 438 for (i = 0; i < 2; ++i) 439 idct->pipe->delete_sampler_state(idct->pipe, idct->samplers[i]); 440 441 idct->pipe->delete_rasterizer_state(idct->pipe, idct->rs_state); 442 idct->pipe->delete_blend_state(idct->pipe, idct->blend); 443} 444 445static bool 446init_intermediate(struct vl_idct *idct, struct vl_idct_buffer *buffer) 447{ 448 struct pipe_resource *tex; 449 struct pipe_surface surf_templ; 450 unsigned i; 451 452 assert(idct && buffer); 453 454 tex = buffer->sampler_views.individual.intermediate->texture; 455 456 buffer->fb_state.width = tex->width0; 457 buffer->fb_state.height = tex->height0; 458 buffer->fb_state.nr_cbufs = idct->nr_of_render_targets; 459 for(i = 0; i < idct->nr_of_render_targets; ++i) { 460 memset(&surf_templ, 0, sizeof(surf_templ)); 461 surf_templ.format = tex->format; 462 surf_templ.u.tex.first_layer = i; 463 surf_templ.u.tex.last_layer = i; 464 surf_templ.usage = PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_RENDER_TARGET; 465 buffer->fb_state.cbufs[i] = idct->pipe->create_surface( 466 idct->pipe, tex, &surf_templ); 467 468 if (!buffer->fb_state.cbufs[i]) 469 goto error_surfaces; 470 } 471 472 buffer->viewport.scale[0] = tex->width0; 473 buffer->viewport.scale[1] = tex->height0; 474 475 return true; 476 477error_surfaces: 478 for(i = 0; i < idct->nr_of_render_targets; ++i) 479 pipe_surface_reference(&buffer->fb_state.cbufs[i], NULL); 480 481 return false; 482} 483 484static void 485cleanup_intermediate(struct vl_idct *idct, struct vl_idct_buffer *buffer) 486{ 487 unsigned i; 488 489 assert(idct && buffer); 490 491 for(i = 0; i < idct->nr_of_render_targets; ++i) 492 pipe_surface_reference(&buffer->fb_state.cbufs[i], NULL); 493 494 pipe_sampler_view_reference(&buffer->sampler_views.individual.intermediate, NULL); 495} 496 497struct pipe_sampler_view * 498vl_idct_upload_matrix(struct pipe_context *pipe, float scale) 499{ 500 struct pipe_resource tex_templ, *matrix; 501 struct pipe_sampler_view sv_templ, *sv; 502 struct pipe_transfer *buf_transfer; 503 unsigned i, j, pitch; 504 float *f; 505 506 struct pipe_box rect = 507 { 508 0, 0, 0, 509 BLOCK_WIDTH / 4, 510 BLOCK_HEIGHT, 511 1 512 }; 513 514 assert(pipe); 515 516 memset(&tex_templ, 0, sizeof(tex_templ)); 517 tex_templ.target = PIPE_TEXTURE_2D; 518 tex_templ.format = PIPE_FORMAT_R32G32B32A32_FLOAT; 519 tex_templ.last_level = 0; 520 tex_templ.width0 = 2; 521 tex_templ.height0 = 8; 522 tex_templ.depth0 = 1; 523 tex_templ.array_size = 1; 524 tex_templ.usage = PIPE_USAGE_IMMUTABLE; 525 tex_templ.bind = PIPE_BIND_SAMPLER_VIEW; 526 tex_templ.flags = 0; 527 528 matrix = pipe->screen->resource_create(pipe->screen, &tex_templ); 529 if (!matrix) 530 goto error_matrix; 531 532 buf_transfer = pipe->get_transfer 533 ( 534 pipe, matrix, 535 0, PIPE_TRANSFER_WRITE | PIPE_TRANSFER_DISCARD, 536 &rect 537 ); 538 if (!buf_transfer) 539 goto error_transfer; 540 541 pitch = buf_transfer->stride / sizeof(float); 542 543 f = pipe->transfer_map(pipe, buf_transfer); 544 if (!f) 545 goto error_map; 546 547 for(i = 0; i < BLOCK_HEIGHT; ++i) 548 for(j = 0; j < BLOCK_WIDTH; ++j) 549 // transpose and scale 550 f[i * pitch + j] = ((const float (*)[8])const_matrix)[j][i] * scale; 551 552 pipe->transfer_unmap(pipe, buf_transfer); 553 pipe->transfer_destroy(pipe, buf_transfer); 554 555 memset(&sv_templ, 0, sizeof(sv_templ)); 556 u_sampler_view_default_template(&sv_templ, matrix, matrix->format); 557 sv = pipe->create_sampler_view(pipe, matrix, &sv_templ); 558 pipe_resource_reference(&matrix, NULL); 559 if (!sv) 560 goto error_map; 561 562 return sv; 563 564error_map: 565 pipe->transfer_destroy(pipe, buf_transfer); 566 567error_transfer: 568 pipe_resource_reference(&matrix, NULL); 569 570error_matrix: 571 return NULL; 572} 573 574bool vl_idct_init(struct vl_idct *idct, struct pipe_context *pipe, 575 unsigned buffer_width, unsigned buffer_height, 576 unsigned nr_of_render_targets, 577 struct pipe_sampler_view *matrix, 578 struct pipe_sampler_view *transpose) 579{ 580 assert(idct && pipe && matrix); 581 582 idct->pipe = pipe; 583 idct->buffer_width = buffer_width; 584 idct->buffer_height = buffer_height; 585 idct->nr_of_render_targets = nr_of_render_targets; 586 587 pipe_sampler_view_reference(&idct->matrix, matrix); 588 pipe_sampler_view_reference(&idct->transpose, transpose); 589 590 if(!init_shaders(idct)) 591 return false; 592 593 if(!init_state(idct)) { 594 cleanup_shaders(idct); 595 return false; 596 } 597 598 return true; 599} 600 601void 602vl_idct_cleanup(struct vl_idct *idct) 603{ 604 cleanup_shaders(idct); 605 cleanup_state(idct); 606 607 pipe_sampler_view_reference(&idct->matrix, NULL); 608} 609 610bool 611vl_idct_init_buffer(struct vl_idct *idct, struct vl_idct_buffer *buffer, 612 struct pipe_sampler_view *source, 613 struct pipe_sampler_view *intermediate, 614 struct pipe_surface *destination) 615{ 616 assert(buffer); 617 assert(idct); 618 assert(source); 619 assert(destination); 620 621 memset(buffer, 0, sizeof(struct vl_idct_buffer)); 622 623 pipe_sampler_view_reference(&buffer->sampler_views.individual.matrix, idct->matrix); 624 pipe_sampler_view_reference(&buffer->sampler_views.individual.source, source); 625 pipe_sampler_view_reference(&buffer->sampler_views.individual.transpose, idct->transpose); 626 pipe_sampler_view_reference(&buffer->sampler_views.individual.intermediate, intermediate); 627 628 if (!init_intermediate(idct, buffer)) 629 return false; 630 631 buffer->viewport.scale[2] = 1; 632 buffer->viewport.scale[3] = 1; 633 buffer->viewport.translate[0] = 0; 634 buffer->viewport.translate[1] = 0; 635 buffer->viewport.translate[2] = 0; 636 buffer->viewport.translate[3] = 0; 637 638 return true; 639} 640 641void 642vl_idct_cleanup_buffer(struct vl_idct *idct, struct vl_idct_buffer *buffer) 643{ 644 unsigned i; 645 646 assert(idct && buffer); 647 648 for(i = 0; i < idct->nr_of_render_targets; ++i) 649 pipe_surface_reference(&buffer->fb_state.cbufs[i], NULL); 650 651 cleanup_intermediate(idct, buffer); 652} 653 654void 655vl_idct_flush(struct vl_idct *idct, struct vl_idct_buffer *buffer, unsigned num_instances) 656{ 657 assert(idct); 658 assert(buffer); 659 660 idct->pipe->bind_rasterizer_state(idct->pipe, idct->rs_state); 661 idct->pipe->bind_blend_state(idct->pipe, idct->blend); 662 idct->pipe->bind_fragment_sampler_states(idct->pipe, 2, idct->samplers); 663 664 /* first stage */ 665 idct->pipe->set_framebuffer_state(idct->pipe, &buffer->fb_state); 666 idct->pipe->set_viewport_state(idct->pipe, &buffer->viewport); 667 idct->pipe->set_fragment_sampler_views(idct->pipe, 2, buffer->sampler_views.stage[0]); 668 idct->pipe->bind_vs_state(idct->pipe, idct->vs); 669 idct->pipe->bind_fs_state(idct->pipe, idct->fs); 670 util_draw_arrays_instanced(idct->pipe, PIPE_PRIM_QUADS, 0, 4, 0, num_instances); 671} 672 673void 674vl_idct_prepare_stage2(struct vl_idct *idct, struct vl_idct_buffer *buffer) 675{ 676 assert(idct); 677 assert(buffer); 678 679 /* second stage */ 680 idct->pipe->bind_rasterizer_state(idct->pipe, idct->rs_state); 681 idct->pipe->bind_fragment_sampler_states(idct->pipe, 2, idct->samplers); 682 idct->pipe->set_fragment_sampler_views(idct->pipe, 2, buffer->sampler_views.stage[1]); 683} 684 685