radeon_span.c revision 45496122b7b590479a4ed60c8bbdc1725cad0211 
1/**************************************************************************
2
3Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
4Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5                     VA Linux Systems Inc., Fremont, California.
6
7The Weather Channel (TM) funded Tungsten Graphics to develop the
8initial release of the Radeon 8500 driver under the XFree86 license.
9This notice must be preserved.
10
11All Rights Reserved.
12
13Permission is hereby granted, free of charge, to any person obtaining
14a copy of this software and associated documentation files (the
15"Software"), to deal in the Software without restriction, including
16without limitation the rights to use, copy, modify, merge, publish,
17distribute, sublicense, and/or sell copies of the Software, and to
18permit persons to whom the Software is furnished to do so, subject to
19the following conditions:
20
21The above copyright notice and this permission notice (including the
22next paragraph) shall be included in all copies or substantial
23portions of the Software.
24
25THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
32
33**************************************************************************/
34
35/*
36 * Authors:
37 *   Kevin E. Martin <martin@valinux.com>
38 *   Gareth Hughes <gareth@valinux.com>
39 *   Keith Whitwell <keith@tungstengraphics.com>
40 *
41 */
42
43#include "main/glheader.h"
44#include "swrast/swrast.h"
45
46#include "common_context.h"
47#include "common_misc.h"
48#include "radeon_span.h"
49
50#include "radeon_buffer.h"
51
52#define DBG 0
53
54/*
55 * Note that all information needed to access pixels in a renderbuffer
56 * should be obtained through the gl_renderbuffer parameter, not per-context
57 * information.
58 */
59#define LOCAL_VARS						\
60   struct radeon_renderbuffer *rrb = (void *) rb;		\
61   const __DRIdrawablePrivate *dPriv = rrb->dPriv;		\
62   const GLuint bottom = dPriv->h - 1;				\
63   GLuint p;						\
64   (void)p;
65
66#define LOCAL_DEPTH_VARS				\
67   struct radeon_renderbuffer *rrb = (void *) rb;	\
68   const __DRIdrawablePrivate *dPriv = rrb->dPriv;	\
69   const GLuint bottom = dPriv->h - 1;
70
71#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
72
73#define Y_FLIP(Y) (bottom - (Y))
74
75#define HW_LOCK()
76
77#define HW_UNLOCK()
78
79/* ================================================================
80 * Color buffer
81 */
82
83/* 16 bit, RGB565 color spanline and pixel functions
84 */
85#define SPANTMP_PIXEL_FMT GL_RGB
86#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
87
88#define TAG(x)    radeon##x##_RGB565
89#define TAG2(x,y) radeon##x##_RGB565##y
90#define GET_PTR(X,Y) radeon_ptr16(rrb, (X), (Y))
91#include "spantmp2.h"
92
93/* 32 bit, ARGB8888 color spanline and pixel functions
94 */
95#define SPANTMP_PIXEL_FMT GL_BGRA
96#define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
97
98#define TAG(x)    radeon##x##_ARGB8888
99#define TAG2(x,y) radeon##x##_ARGB8888##y
100#define GET_PTR(X,Y) radeon_ptr32(rrb, (X), (Y))
101#include "spantmp2.h"
102
103/* ================================================================
104 * Depth buffer
105 */
106
107/* The Radeon family has depth tiling on all the time, so we have to convert
108 * the x,y coordinates into the memory bus address (mba) in the same
109 * manner as the engine.  In each case, the linear block address (ba)
110 * is calculated, and then wired with x and y to produce the final
111 * memory address.
112 * The chip will do address translation on its own if the surface registers
113 * are set up correctly. It is not quite enough to get it working with hyperz
114 * too...
115 */
116
117/* 16-bit depth buffer functions
118 */
119#define VALUE_TYPE GLushort
120
121#define WRITE_DEPTH( _x, _y, d )					\
122   *(GLushort *)radeon_ptr(rrb, _x, _y) = d
123
124#define READ_DEPTH( d, _x, _y )						\
125   d = *(GLushort *)radeon_ptr(rrb, _x, _y)
126
127#define TAG(x) radeon##x##_z16
128#include "depthtmp.h"
129
130/* 24 bit depth, 8 bit stencil depthbuffer functions
131 *
132 * Careful: It looks like the R300 uses ZZZS byte order while the R200
133 * uses SZZZ for 24 bit depth, 8 bit stencil mode.
134 */
135#define VALUE_TYPE GLuint
136
137#ifdef COMPILE_R300
138#define WRITE_DEPTH( _x, _y, d )					\
139do {									\
140   GLuint *_ptr = (GLuint*)radeon_ptr32( rrb, _x, _y );		\
141   GLuint tmp = *_ptr;				\
142   tmp &= 0x000000ff;							\
143   tmp |= ((d << 8) & 0xffffff00);					\
144   *_ptr = tmp;					\
145} while (0)
146#else
147#define WRITE_DEPTH( _x, _y, d )					\
148do {									\
149   GLuint *_ptr = (GLuint*)radeon_ptr32( rrb, _x, _y );		\
150   GLuint tmp = *_ptr;				\
151   tmp &= 0xff000000;							\
152   tmp |= ((d) & 0x00ffffff);						\
153   *_ptr = tmp;					\
154} while (0)
155#endif
156
157#ifdef COMPILE_R300
158#define READ_DEPTH( d, _x, _y )						\
159  do { \
160    d = (*(GLuint*)(radeon_ptr32(rrb, _x, _y)) & 0xffffff00) >> 8; \
161  }while(0)
162#else
163#define READ_DEPTH( d, _x, _y )						\
164   d = *(GLuint*)(radeon_ptr32(rrb, _x,	_y )) & 0x00ffffff;
165#endif
166/*
167    fprintf(stderr, "dval(%d, %d, %d, %d)=0x%08X\n", _x, xo, _y, yo, d);\
168   d = *(GLuint*)(radeon_ptr(rrb, _x,	_y )) & 0x00ffffff;
169*/
170#define TAG(x) radeon##x##_z24_s8
171#include "depthtmp.h"
172
173/* ================================================================
174 * Stencil buffer
175 */
176
177/* 24 bit depth, 8 bit stencil depthbuffer functions
178 */
179#ifdef COMPILE_R300
180#define WRITE_STENCIL( _x, _y, d )					\
181do {									\
182   GLuint *_ptr = (GLuint*)radeon_ptr32(rrb, _x, _y);		\
183   GLuint tmp = *_ptr;				\
184   tmp &= 0xffffff00;							\
185   tmp |= (d) & 0xff;							\
186   *_ptr = tmp;					\
187} while (0)
188#else
189#define WRITE_STENCIL( _x, _y, d )					\
190do {									\
191   GLuint *_ptr = (GLuint*)radeon_ptr32(rrb, _x, _y);		\
192   GLuint tmp = *_ptr;				\
193   tmp &= 0x00ffffff;							\
194   tmp |= (((d) & 0xff) << 24);						\
195   *_ptr = tmp;					\
196} while (0)
197#endif
198
199#ifdef COMPILE_R300
200#define READ_STENCIL( d, _x, _y )					\
201do {									\
202   GLuint *_ptr = (GLuint*)radeon_ptr32( rrb, _x, _y );		\
203   GLuint tmp = *_ptr;				\
204   d = tmp & 0x000000ff;						\
205} while (0)
206#else
207#define READ_STENCIL( d, _x, _y )					\
208do {									\
209   GLuint *_ptr = (GLuint*)radeon_ptr32( rrb, _x, _y );		\
210   GLuint tmp = *_ptr;				\
211   d = (tmp & 0xff000000) >> 24;					\
212} while (0)
213#endif
214
215#define TAG(x) radeon##x##_z24_s8
216#include "stenciltmp.h"
217
218void radeonInitSpanFuncs(GLcontext * ctx)
219{
220	struct swrast_device_driver *swdd =
221	    _swrast_GetDeviceDriverReference(ctx);
222	swdd->SpanRenderStart = radeonSpanRenderStart;
223	swdd->SpanRenderFinish = radeonSpanRenderFinish;
224}
225
226/**
227 * Plug in the Get/Put routines for the given driRenderbuffer.
228 */
229void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb)
230{
231	if (rrb->base.InternalFormat == GL_RGB5) {
232		radeonInitPointers_RGB565(&rrb->base);
233	} else if (rrb->base.InternalFormat == GL_RGBA8) {
234		radeonInitPointers_ARGB8888(&rrb->base);
235	} else if (rrb->base.InternalFormat == GL_DEPTH_COMPONENT16) {
236		radeonInitDepthPointers_z16(&rrb->base);
237	} else if (rrb->base.InternalFormat == GL_DEPTH_COMPONENT24) {
238		radeonInitDepthPointers_z24_s8(&rrb->base);
239	} else if (rrb->base.InternalFormat == GL_STENCIL_INDEX8_EXT) {
240		radeonInitStencilPointers_z24_s8(&rrb->base);
241	}
242}
243