15df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/************************************************************************** 25df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 35df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 45df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul VA Linux Systems Inc., Fremont, California. 55df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 65df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulAll Rights Reserved. 75df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 85df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulPermission is hereby granted, free of charge, to any person obtaining 95df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paula copy of this software and associated documentation files (the 105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul"Software"), to deal in the Software without restriction, including 115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulwithout limitation the rights to use, copy, modify, merge, publish, 125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldistribute, sublicense, and/or sell copies of the Software, and to 135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulpermit persons to whom the Software is furnished to do so, subject to 145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulthe following conditions: 155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulThe above copyright notice and this permission notice (including the 175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulnext paragraph) shall be included in all copies or substantial 185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulportions of the Software. 195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul**************************************************************************/ 295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Authors: 325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Kevin E. Martin <martin@valinux.com> 335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Gareth Hughes <gareth@valinux.com> 345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#ifndef __RADEON_SCREEN_H__ 375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define __RADEON_SCREEN_H__ 385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* 405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * IMPORTS: these headers contain all the DRI, X and kernel-related 415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * definitions that we need. 425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 433a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt#include "dri_util.h" 445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_dri.h" 453a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt#include "radeon_chipset.h" 465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_reg.h" 47ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl#include "drm_sarea.h" 48bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl#include "xmlconfig.h" 495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paultypedef struct { 52c06b25594e5effe34a90c067e1a3da0f61cf2b13Ian Romanick drm_handle_t handle; /* Handle to the DRM region */ 535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmSize size; /* Size of the DRM region */ 545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmAddress map; /* Mapping of the DRM region */ 555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} radeonRegionRec, *radeonRegionPtr; 565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 57e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glissetypedef struct radeon_screen { 583a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt int chip_family; 593a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt int chip_flags; 605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int cpp; 616a9f0a27c3853738e4bbfb33e8b20464a7d92923Dave Airlie int card_type; 62c1ccc7d5394c23a371540e1b2c3d35b0da3b30d6Nicolai Hähnle int device_id; /* PCI ID */ 635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int AGPMode; 645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul unsigned int irq; /* IRQ number (0 means none) */ 655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6699ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane unsigned int fbLocation; 675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul unsigned int frontOffset; 685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul unsigned int frontPitch; 695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul unsigned int backOffset; 705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul unsigned int backPitch; 715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul unsigned int depthOffset; 735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul unsigned int depthPitch; 745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* Shared texture data */ 765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int numTexHeaps; 775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int texOffset[RADEON_NR_TEX_HEAPS]; 785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int texSize[RADEON_NR_TEX_HEAPS]; 795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int logTexGranularity[RADEON_NR_TEX_HEAPS]; 805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRegionRec mmio; 825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonRegionRec status; 83bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl radeonRegionRec gartTextures; 845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmBufMapPtr buffers; 865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 875a46e176715b0eae7b8a715e8aec42f5a27214fcKeith Whitwell __volatile__ uint32_t *scratch; 885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 89d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsberg __DRIscreen *driScreen; 905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul unsigned int sarea_priv_offset; 91bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl unsigned int gart_buffer_offset; /* offset in card memory space */ 92bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl unsigned int gart_texture_offset; /* offset in card memory space */ 933a5626cb846ad767fe1c38fe35ebe4df3e3a0454Eric Anholt unsigned int gart_base; 94bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl 95a205137423e42010a025c70b05af98a6c0564f28Roland Scheidegger GLboolean depthHasSurface; 96a205137423e42010a025c70b05af98a6c0564f28Roland Scheidegger 97bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl /* Configuration cache with default values for all contexts */ 98bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl driOptionCache optionCache; 99efaf90b03e8b69e04909bce071f8ef6b65cc0e9dKristian Høgsberg 100234286c0f8b7d30ed49223c648d4c73c1a517ab3Jesse Barnes const __DRIextension *extensions[17]; 101867f5aac5361eda657491a98feca33c91eae3218Alex Deucher 102867f5aac5361eda657491a98feca33c91eae3218Alex Deucher int num_gb_pipes; 1033023328ea721d2b87112e37e119345a9662d7e5eAlex Deucher int num_z_pipes; 10472cd2c8c0c863873d280a0e49dfa381e5c3236c8Dave Airlie drm_radeon_sarea_t *sarea; /* Private SAREA data */ 105e5d5dab8c03f72097ec3e5b465fe93b6e369bb2dJerome Glisse struct radeon_bo_manager *bom; 106063c70d7f72a043037fb4c9b534c53208f86611dAlex Deucher 1075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} radeonScreenRec, *radeonScreenPtr; 1085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 109b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloffstruct __DRIimageRec { 110b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff struct radeon_bo *bo; 111b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff GLenum internal_format; 1128de5c355fa2bf0f30df2c7cf39aee01e793284bfJesse Barnes uint32_t dri_format; 113b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff GLuint format; 114b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff GLenum data_type; 115b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff int width, height; /* in pixels */ 116b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff int pitch; /* in pixels */ 117b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff int cpp; 118b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff void *data; 119b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff}; 120b42e562a11a1dded1c4c734de065cb1480da1772Johann Rudloff 121d61f07318c8678901b948fdaa8ccdf37aa3203e9Kristian Høgsbergextern void radeonDestroyBuffer(__DRIdrawable *driDrawPriv); 1225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#endif /* __RADEON_SCREEN_H__ */ 123