1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __MSMB_ISP__
20#define __MSMB_ISP__
21#include <linux/videodev2.h>
22#define MAX_PLANES_PER_STREAM 3
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define MAX_NUM_STREAM 7
25#define ISP_VERSION_40 40
26#define ISP_VERSION_32 32
27#define ISP_NATIVE_BUF_BIT (0x10000 << 0)
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29#define ISP0_BIT (0x10000 << 1)
30#define ISP1_BIT (0x10000 << 2)
31#define ISP_META_CHANNEL_BIT (0x10000 << 3)
32#define ISP_SCRATCH_BUF_BIT (0x10000 << 4)
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define ISP_STATS_STREAM_BIT 0x80000000
35enum ISP_START_PIXEL_PATTERN {
36 ISP_BAYER_RGRGRG,
37 ISP_BAYER_GRGRGR,
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39 ISP_BAYER_BGBGBG,
40 ISP_BAYER_GBGBGB,
41 ISP_YUV_YCbYCr,
42 ISP_YUV_YCrYCb,
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44 ISP_YUV_CbYCrY,
45 ISP_YUV_CrYCbY,
46 ISP_PIX_PATTERN_MAX
47};
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49enum msm_vfe_plane_fmt {
50 Y_PLANE,
51 CB_PLANE,
52 CR_PLANE,
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54 CRCB_PLANE,
55 CBCR_PLANE,
56 VFE_PLANE_FMT_MAX
57};
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59enum msm_vfe_input_src {
60 VFE_PIX_0,
61 VFE_RAW_0,
62 VFE_RAW_1,
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64 VFE_RAW_2,
65 VFE_SRC_MAX,
66};
67enum msm_vfe_axi_stream_src {
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69 PIX_ENCODER,
70 PIX_VIEWFINDER,
71 CAMIF_RAW,
72 IDEAL_RAW,
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74 RDI_INTF_0,
75 RDI_INTF_1,
76 RDI_INTF_2,
77 VFE_AXI_SRC_MAX
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79};
80enum msm_vfe_frame_skip_pattern {
81 NO_SKIP,
82 EVERY_2FRAME,
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84 EVERY_3FRAME,
85 EVERY_4FRAME,
86 EVERY_5FRAME,
87 EVERY_6FRAME,
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89 EVERY_7FRAME,
90 EVERY_8FRAME,
91 EVERY_16FRAME,
92 EVERY_32FRAME,
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94 SKIP_ALL,
95 MAX_SKIP,
96};
97enum msm_vfe_camif_input {
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99 CAMIF_DISABLED,
100 CAMIF_PAD_REG_INPUT,
101 CAMIF_MIDDI_INPUT,
102 CAMIF_MIPI_INPUT,
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104};
105struct msm_vfe_camif_cfg {
106 uint32_t lines_per_frame;
107 uint32_t pixels_per_line;
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109 uint32_t first_pixel;
110 uint32_t last_pixel;
111 uint32_t first_line;
112 uint32_t last_line;
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114 uint32_t epoch_line0;
115 uint32_t epoch_line1;
116 enum msm_vfe_camif_input camif_input;
117};
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119enum msm_vfe_inputmux {
120 CAMIF,
121 TESTGEN,
122 EXTERNAL_READ,
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124};
125struct msm_vfe_pix_cfg {
126 struct msm_vfe_camif_cfg camif_cfg;
127 enum msm_vfe_inputmux input_mux;
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129 enum ISP_START_PIXEL_PATTERN pixel_pattern;
130};
131struct msm_vfe_rdi_cfg {
132 uint8_t cid;
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134 uint8_t frame_based;
135};
136struct msm_vfe_input_cfg {
137 union {
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139 struct msm_vfe_pix_cfg pix_cfg;
140 struct msm_vfe_rdi_cfg rdi_cfg;
141 } d;
142 enum msm_vfe_input_src input_src;
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144 uint32_t input_pix_clk;
145};
146struct msm_vfe_axi_plane_cfg {
147 uint32_t output_width;
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149 uint32_t output_height;
150 uint32_t output_stride;
151 uint32_t output_scan_lines;
152 uint32_t output_plane_format;
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154 uint32_t plane_addr_offset;
155 uint8_t csid_src;
156 uint8_t rdi_cid;
157};
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159struct msm_vfe_axi_stream_request_cmd {
160 uint32_t session_id;
161 uint32_t stream_id;
162 uint32_t output_format;
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164 enum msm_vfe_axi_stream_src stream_src;
165 struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
166 uint32_t burst_count;
167 uint32_t hfr_mode;
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169 uint8_t frame_base;
170 uint32_t init_frame_drop;
171 enum msm_vfe_frame_skip_pattern frame_skip_pattern;
172 uint8_t buf_divert;
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174 uint32_t axi_stream_handle;
175};
176struct msm_vfe_axi_stream_release_cmd {
177 uint32_t stream_handle;
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179};
180enum msm_vfe_axi_stream_cmd {
181 STOP_STREAM,
182 START_STREAM,
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184};
185struct msm_vfe_axi_stream_cfg_cmd {
186 uint8_t num_streams;
187 uint32_t stream_handle[MAX_NUM_STREAM];
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189 enum msm_vfe_axi_stream_cmd cmd;
190};
191enum msm_vfe_axi_stream_update_type {
192 ENABLE_STREAM_BUF_DIVERT,
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194 DISABLE_STREAM_BUF_DIVERT,
195 UPDATE_STREAM_FRAMEDROP_PATTERN,
196 UPDATE_STREAM_REQUEST_FRAMES,
197};
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199struct msm_vfe_axi_stream_update_cmd {
200 uint32_t stream_handle;
201 enum msm_vfe_axi_stream_update_type update_type;
202 enum msm_vfe_frame_skip_pattern skip_pattern;
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204 uint32_t request_frm_num;
205};
206enum msm_isp_stats_type {
207 MSM_ISP_STATS_AEC,
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209 MSM_ISP_STATS_AF,
210 MSM_ISP_STATS_AWB,
211 MSM_ISP_STATS_RS,
212 MSM_ISP_STATS_CS,
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214 MSM_ISP_STATS_IHIST,
215 MSM_ISP_STATS_SKIN,
216 MSM_ISP_STATS_BG,
217 MSM_ISP_STATS_BF,
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219 MSM_ISP_STATS_BE,
220 MSM_ISP_STATS_BHIST,
221 MSM_ISP_STATS_MAX
222};
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224struct msm_vfe_stats_stream_request_cmd {
225 uint32_t session_id;
226 uint32_t stream_id;
227 enum msm_isp_stats_type stats_type;
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229 uint32_t composite_flag;
230 uint32_t framedrop_pattern;
231 uint32_t irq_subsample_pattern;
232 uint32_t buffer_offset;
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234 uint32_t stream_handle;
235};
236struct msm_vfe_stats_stream_release_cmd {
237 uint32_t stream_handle;
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239};
240struct msm_vfe_stats_stream_cfg_cmd {
241 uint8_t num_streams;
242 uint32_t stream_handle[MSM_ISP_STATS_MAX];
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244 uint8_t enable;
245};
246enum msm_vfe_reg_cfg_type {
247 VFE_WRITE,
248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249 VFE_WRITE_MB,
250 VFE_READ,
251 VFE_CFG_MASK,
252 VFE_WRITE_DMI_16BIT,
253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254 VFE_WRITE_DMI_32BIT,
255 VFE_WRITE_DMI_64BIT,
256 VFE_READ_DMI_16BIT,
257 VFE_READ_DMI_32BIT,
258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259 VFE_READ_DMI_64BIT,
260};
261struct msm_vfe_cfg_cmd2 {
262 uint16_t num_cfg;
263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264 uint16_t cmd_len;
265 void __user *cfg_data;
266 void __user *cfg_cmd;
267};
268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269struct msm_vfe_reg_rw_info {
270 uint32_t reg_offset;
271 uint32_t cmd_data_offset;
272 uint32_t len;
273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274};
275struct msm_vfe_reg_mask_info {
276 uint32_t reg_offset;
277 uint32_t mask;
278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279 uint32_t val;
280};
281struct msm_vfe_reg_dmi_info {
282 uint32_t hi_tbl_offset;
283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284 uint32_t lo_tbl_offset;
285 uint32_t len;
286};
287struct msm_vfe_reg_cfg_cmd {
288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289 union {
290 struct msm_vfe_reg_rw_info rw_info;
291 struct msm_vfe_reg_mask_info mask_info;
292 struct msm_vfe_reg_dmi_info dmi_info;
293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294 } u;
295 enum msm_vfe_reg_cfg_type cmd_type;
296};
297enum msm_isp_buf_type {
298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299 ISP_PRIVATE_BUF,
300 ISP_SHARE_BUF,
301 MAX_ISP_BUF_TYPE,
302};
303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304struct msm_isp_buf_request {
305 uint32_t session_id;
306 uint32_t stream_id;
307 uint8_t num_buf;
308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309 uint32_t handle;
310 enum msm_isp_buf_type buf_type;
311};
312struct msm_isp_qbuf_info {
313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314 uint32_t handle;
315 int buf_idx;
316 struct v4l2_buffer buffer;
317 uint32_t dirty_buf;
318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319};
320struct msm_vfe_axi_src_state {
321 enum msm_vfe_input_src input_src;
322 uint32_t src_active;
323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324};
325enum msm_isp_event_idx {
326 ISP_REG_UPDATE = 0,
327 ISP_START_ACK = 1,
328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329 ISP_STOP_ACK = 2,
330 ISP_IRQ_VIOLATION = 3,
331 ISP_WM_BUS_OVERFLOW = 4,
332 ISP_STATS_OVERFLOW = 5,
333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334 ISP_CAMIF_ERROR = 6,
335 ISP_SOF = 7,
336 ISP_EOF = 8,
337 ISP_EVENT_MAX = 9
338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339};
340#define ISP_EVENT_OFFSET 8
341#define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START)
342#define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET))
343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344#define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET))
345#define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE)
346#define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK)
347#define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK)
348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349#define ISP_EVENT_IRQ_VIOLATION (ISP_EVENT_BASE + ISP_IRQ_VIOLATION)
350#define ISP_EVENT_WM_BUS_OVERFLOW (ISP_EVENT_BASE + ISP_WM_BUS_OVERFLOW)
351#define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW)
352#define ISP_EVENT_CAMIF_ERROR (ISP_EVENT_BASE + ISP_CAMIF_ERROR)
353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354#define ISP_EVENT_SOF (ISP_EVENT_BASE + ISP_SOF)
355#define ISP_EVENT_EOF (ISP_EVENT_BASE + ISP_EOF)
356#define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE)
357#define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE)
358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359#define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX)
360struct msm_isp_buf_event {
361 uint32_t session_id;
362 uint32_t stream_id;
363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364 uint32_t handle;
365 int8_t buf_idx;
366};
367struct msm_isp_stats_event {
368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369 uint32_t stats_mask;
370 uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX];
371};
372struct msm_isp_stream_ack {
373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374 uint32_t session_id;
375 uint32_t stream_id;
376 uint32_t handle;
377};
378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
379struct msm_isp_event_data {
380 struct timeval timestamp;
381 struct timeval mono_timestamp;
382 uint32_t frame_id;
383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
384 union {
385 struct msm_isp_stream_ack stream_ack;
386 enum msm_vfe_input_src input_src;
387 struct msm_isp_stats_event stats;
388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
389 uint32_t irq_status_mask;
390 struct msm_isp_buf_event buf_done;
391 } u;
392};
393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
394#define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8')
395#define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8')
396#define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8')
397#define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8')
398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
399#define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0')
400#define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0')
401#define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0')
402#define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0')
403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
404#define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2')
405#define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2')
406#define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2')
407#define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2')
408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
409#define VIDIOC_MSM_VFE_REG_CFG   _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2)
410#define VIDIOC_MSM_ISP_REQUEST_BUF   _IOWR('V', BASE_VIDIOC_PRIVATE+1, struct msm_isp_buf_request)
411#define VIDIOC_MSM_ISP_ENQUEUE_BUF   _IOWR('V', BASE_VIDIOC_PRIVATE+2, struct msm_isp_qbuf_info)
412#define VIDIOC_MSM_ISP_RELEASE_BUF   _IOWR('V', BASE_VIDIOC_PRIVATE+3, struct msm_isp_buf_request)
413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
414#define VIDIOC_MSM_ISP_REQUEST_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+4, struct msm_vfe_axi_stream_request_cmd)
415#define VIDIOC_MSM_ISP_CFG_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+5, struct msm_vfe_axi_stream_cfg_cmd)
416#define VIDIOC_MSM_ISP_RELEASE_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+6, struct msm_vfe_axi_stream_release_cmd)
417#define VIDIOC_MSM_ISP_INPUT_CFG   _IOWR('V', BASE_VIDIOC_PRIVATE+7, struct msm_vfe_input_cfg)
418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
419#define VIDIOC_MSM_ISP_SET_SRC_STATE   _IOWR('V', BASE_VIDIOC_PRIVATE+8, struct msm_vfe_axi_src_state)
420#define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+9,   struct msm_vfe_stats_stream_request_cmd)
421#define VIDIOC_MSM_ISP_CFG_STATS_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+10, struct msm_vfe_stats_stream_cfg_cmd)
422#define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+11,   struct msm_vfe_stats_stream_release_cmd)
423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
424#define VIDIOC_MSM_ISP_UPDATE_STREAM   _IOWR('V', BASE_VIDIOC_PRIVATE+13, struct msm_vfe_axi_stream_update_cmd)
425#endif
426