| 00b60d29a1da01c554a3af8f96112199231145d2 |
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09-Oct-2014 |
Pyry Haulos <phaulos@google.com> |
Workaround for GCC aarch64 compiler bug
Current prebuilt GCC toolchain has a bug in shift right when
targeting ARMv8 / aarch64.
If compiler wants to perform logical shift by variable/register
in fp/vector registers it uses USHL that selects shift direction
based on shift operand value. Thus for right shifts the shift
operand needs to be negated.
The bug is in right shift pattern; it doesn't mark shift operand
as clobbered and thus later code using that same register may
see the negated value.
Workaround is to disable optimization for this function.
See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61633
Change-Id: I02477b0fb383ead1d35136261fb8969a02d1031e
/external/deqp/modules/gles3/functional/es3fShaderPrecisionTests.cpp
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| 8852c82a1ffa4760985c17cc6875d5d521daf343 |
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11-Sep-2014 |
Jarkko Poyry <jpoyry@google.com> |
Update dEQP.
Migrate drawElements Quality Program changes from an internal repository.
Bug: 17388917
Change-Id: I21e3f7bc75813f0510025d697d91a2554dc995d4
/external/deqp/modules/gles3/functional/es3fShaderPrecisionTests.cpp
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| 3c827367444ee418f129b2c238299f49d3264554 |
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02-Sep-2014 |
Jarkko Poyry <jpoyry@google.com> |
Import dEQP.
Import drawElements Quality Program from an internal repository.
Bug: 17388917
Change-Id: Ic109fe4a57e31b2a816113d90fbdf51a43e7abeb
/external/deqp/modules/gles3/functional/es3fShaderPrecisionTests.cpp
|