History log of /external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
36b56886974eae4f9c5ebc96befd3e7bfe5de338 24-Apr-2014 Stephen Hines <srhines@google.com> Update to LLVM 3.5a.

Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
354362524a72b3fa43a6c09380b7ae3b2380cbba 19-Nov-2013 Juergen Ributzka <juergen@apple.com> [weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195064 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
b21ab43cfc3fa0dacf5c95f04e58b6d804b59a16 18-Nov-2013 Alexey Samsonov <samsonov@google.com> Revert r194865 and r194874.

This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
Base *foo = new Child();
delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
5a364c5561ec04e33a6f5d52c14f1bac6f247ea0 15-Nov-2013 Juergen Ributzka <juergen@apple.com> [weak vtables] Remove a bunch of weak vtables

This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194865 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
238bf5ada19ee411c1decff68e140966f7baf479 23-Aug-2013 Andrew Trick <atrick@apple.com> Add a convenient PSetIterator for visiting pressure sets affected by a register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
03fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8 15-Aug-2013 Mark Lacey <mark.lacey@apple.com> Notify LiveRangeEdit of new virtual registers.

Add a delegate class to MachineRegisterInfo with a single virtual
function, MRI_NoteNewVirtualRegister(). Update LiveRangeEdit to inherit
from this delegate class and override the definition of the callback
with an implementation that tracks the newly created virtual registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188435 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
03dca5e4b6c41e1e7fa4edad3d7ff8d5f6de7008 21-Jun-2013 Andrew Trick <atrick@apple.com> Handle more cases in LiveRangeEdit::eliminateDeadDefs.

Live intervals for dead physregs may be created during coalescing. We
need to update these in the event that their instruction goes away.

crash.ll is the unit test that catches it when MI sched is enabled on
X86.

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/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
d10fa8b1caf010fe4943ae5526c2c3b921339f72 17-Jun-2013 Bill Wendling <isanbard@gmail.com> Directly access objects which may change during compilation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
a58d67af29d38fa37c94f59af37db9df75f349be 19-Apr-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Add an MRI::verifyUseLists() function.

This checks the sanity of the register use lists in the MI intermediate
representation.

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/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
6acbcd423b2ace94bb13c0de9d98ea66c5dbe00c 12-Mar-2013 Eli Bendersky <eliben@google.com> Residual cleanup: live-out set is gone


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/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
601158a18e325879b224bd1979d824407ed98bc7 21-Feb-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Make RAFast::UsedInInstr indexed by register units.

This fixes some problems with too conservative checking where we were
marking all aliases of a register as used, and then also checking all
aliases when allocating a register.

<rdar://problem/13249625>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
e6dc59891fc53d65b3f6d19772d26e23e0cc1cac 05-Feb-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove liveout lists from MachineRegisterInfo.

All targets are now adding return value registers as implicit uses on
return instructions, and there is no longer a need for the live out
lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
bced5cd924e47818d67e33b3ae1550ab96fc239a 05-Jan-2013 Jakob Stoklund Olesen <stoklund@2pi.dk> Add MachineRegisterInfo::moveOperands().

This function works like memmove() for MachineOperands, except it also
updates any use-def chains containing the moved operands.

The use-def chains are updated without affecting the order of operands
in the list. That isn't possible when using the
removeRegOperandFromUseList() and addRegOperandToUseList() functions.

Callers to follow soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
255f89faee13dc491cb64fbeae3c763e7e2ea4e6 03-Dec-2012 Chandler Carruth <chandlerc@gmail.com> Sort the #include lines for the include/... tree with the script.

AKA: Recompile *ALL* the source code!

This one went much better. No manual edits here. I spot-checked for
silliness and grep-checked for really broken edits and everything seemed
good. It all still compiles. Yell if you see something that looks goofy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169133 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
4b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16 17-Oct-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Switch MRI::UsedPhysRegs to a register unit bit vector.

This is a more compact, less redundant representation, and it avoids
scanning long lists of aliases for ARM D-registers, for example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
9aa6e0a134358c681cc5918ec65b1ec9726b778e 17-Oct-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().

All callers of these functions really want the isPhysRegOrOverlapUsed()
functionality which also checks aliases. For historical reasons, targets
without register aliases were calling isPhysRegUsed() instead.

Change isPhysRegUsed() to also check aliases, and switch all
isPhysRegOrOverlapUsed() callers to isPhysRegUsed().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166117 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
d7ea7d5cd7518788dea698d38023959480c8263a 17-Oct-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Use a SparseSet instead of a BitVector for UsedInInstr in RAFast.

This is just as fast, and it makes it possible to avoid leaking the
UsedPhysRegs BitVector implementation through
MachineRegisterInfo::addPhysRegsUsed().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166083 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
e4f273908bd37df5f0f6b2c575dcb2af99f6b85b 15-Oct-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Freeze the reserved registers as soon as isel is complete.

Also provide an MRI::getReservedRegs() function to access the frozen
register set, and isReserved() and isAllocatable() methods to test
individual registers.

The various implementations of TRI::getReservedRegs() are quite
complicated, and many passes need to look at the reserved register set.
This patch makes it possible for these passes to use the cached copy in
MRI, avoiding a lot of malloc traffic and repeated calculations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
001d3dc976d7cda8a3dd8c7fd4020b0b96033f4e 17-Sep-2012 Craig Topper <craig.topper@gmail.com> Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164016 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
c7908037d87c8f6866b872e9f6b5a7fffae5b63e 10-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Reapply r161633-161634 "Partition use lists so defs always come before uses.""

No changes to these patches, MRI needed to be notified when changing
uses into defs and vice versa.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
1134aae4e743290da2ad29a7ac76d3a1f9dcfce8 10-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Revert r161633-161634 "Partition use lists so defs always come before uses."

These commits broke a number of buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
81a6995243380668e6f991fa4e11dd0a6e37e030 10-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Partition use lists so defs always come before uses.

This makes it possible to speed up def_iterator by stopping at the first
use. This makes def_empty() and getUniqueVRegDef() much faster when
there are many uses.

In a +Asserts build, LiveVariables is 100x faster in one case because
getVRegDef() has an assertion that would scan to the end of a
def_iterator chain.

Spill weight calculation is significantly faster (300x in one case)
because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP)
which calls def_empty(%RIP).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
46f4c35372062eaf097922b5683bc6639ccf342b 10-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Don't use pointer-pointers for the register use lists.

Use a more conventional doubly linked list where the Prev pointers form
a cycle. This means it is no longer necessary to adjust the Prev
pointers when reallocating the VRegInfo array.

The test changes are required because the register allocation hint is
using the use-list order to break ties.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161633 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
ff2b99afc8cbc6cfa73181072888e0f9f07deb7e 10-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Move use list management into MachineRegisterInfo.

Register MachineOperands are kept in linked lists accessible via MRI's
reg_iterator interfaces. The linked list management was handled partly
by MachineOperand methods, partly by MRI methods.

Move all of the list management into MRI, delete
MO::AddRegOperandToRegInfo() and MO::RemoveRegOperandFromRegInfo().

Be more explicit about handling the cases where an MRI pointer isn't
available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
fdd6484b41ef0fa7eb8c995fb34b728b193c6258 09-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Move getNextOperandForReg() into MachineRegisterInfo.

MRI provides iterators for traversing the use-def chains. They should
not be accessible from anywhere else.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161543 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
0492a8c530df6c7b2ebcfa91fed930c1a1bf664d 31-Jul-2012 Andrew Trick <atrick@apple.com> Added MachineRegisterInfo::hasOneDef()

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161009 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
269120cd9b45b24665433ea28eb7d092c138ca76 31-Jul-2012 Andrew Trick <atrick@apple.com> Inline MachineRegisterInfo::hasOneUse

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161007 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
54d69668b22b8c37aa6e45f14445f3988cc430d4 29-Jun-2012 Manman Ren <mren@apple.com> Add getUniqueVRegDef to MachineRegisterInfo.
This comes in handy during peephole optimization.


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/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
396618b43a85e12d290a90b181c6af5d7c0c5f11 02-Jun-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Switch all register list clients to the new MC*Iterator interface.

No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
aba6559370c3d453588103fb667ffa3b11b76652 27-Mar-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Add an MRI::tracksLiveness() flag.

Late optimization passes like branch folding and tail duplication can
transform the machine code in a way that makes it expensive to keep the
register liveness information up to date. There is a fuzzy line between
register allocation and late scheduling where the liveness information
degrades.

The MRI::tracksLiveness() flag makes the line clear: While true,
liveness information is accurate, and can be used for register
scavenging. Once the flag is false, liveness information is not
accurate, and can only be used as a hint.

Late passes generally don't need the liveness information, but they will
sometimes use the register scavenger to help update it. The scavenger
enforces strict correctness, and we have to spend a lot of code to
update register liveness that may never be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
e4fd907e72a599eddfa7a81eac4366b5b82523e3 04-Mar-2012 Craig Topper <craig.topper@gmail.com> Use uint16_t to store register overlaps to reduce static data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
66c994c2dbd1a76418fdd0acb138aa029538ffe5 01-Mar-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Make InlineSpiller bundle-aware.

Simply treat bundles as instructions. Spill code is inserted between
bundles, never inside a bundle. Rewrite all operands in a bundle at
once.

Don't attempt and memory operand folding inside bundles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151787 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
19273aec441411b4d571fdb87c6daa0fbe7a33a0 21-Feb-2012 Andrew Trick <atrick@apple.com> Clear virtual registers after they are no longer referenced.

Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA().
To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs().

PEI resets virtual regs when it's done scavenging.

PTX will either have to provide its own PEI pass or assign physregs.

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/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
90019479f9a3868d8be90564695097a61a725438 21-Feb-2012 Andrew Trick <atrick@apple.com> whitespace

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/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5 17-Feb-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Transfer regmasks to MRI.

MRI keeps track of which physregs have been used. Make sure it gets
updated with all the regmask-clobbered registers.

Delete the closePhysRegsUsed() function which isn't necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150830 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
c035c940a656f34a58ebe22fcc5f9b2a7d8e97fb 16-Jan-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Extract method for detecting constant unallocatable physregs.

It is safe to move uses of such registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148259 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
d9e5c764bfea339fc5082bf17e558db959fd6d28 05-Jan-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Freeze reserved registers before starting register allocation.

The register allocators don't currently support adding reserved
registers while they are running. Extend the MRI API to keep track of
the set of reserved registers when register allocation started.

Target hooks like hasFP() and needsStackRealignment() can look at this
set to avoid reserving more registers during register allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147577 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
a2a98fd0ddd2ae277be7cdd62aae92f6c5155e07 21-Dec-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Move common code into an MRI function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147071 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
4007529d4b014f43a1c7089f9b285a67c1c9b853 17-Oct-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Admonish that MI is not IR and virtual registers have constraints.

In machine code, you can't just replaceRegWith() the same way you can
replaceAllUsesWith() in IR. Virtual registers may have different
register classes that need to be merged first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142201 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
e27e1ca3c90b69e78242c98a669337f84ccded7f 01-Oct-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Move getCommonSubClass() into TRI.

It will soon need the context.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140896 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
91fb536a345dc268e5b73dbddb9bee4cba87b28f 22-Sep-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Add a MinNumRegs argument to MRI::constrainRegClass().

The function will refuse to use a register class with fewer registers
than MinNumRegs. This can be used by clients to avoid accidentally
increase register pressure too much.

The default value of MinNumRegs=0 doesn't affect how constrainRegClass()
works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140339 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
6d1fd0b979cb88809ebb77a24f4da69e1d67606b 09-Aug-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Move CalculateRegClass to MRI::recomputeRegClass.

This function doesn't have anything to do with spill weights, and MRI
already has functions for manipulating the register class of a virtual
register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
73e7dced3892f2abb4344526147d4df0f62aee61 30-Jul-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Add an isSSA() flag to MachineRegisterInfo.

This flag is true from isel to register allocation when the machine
function is required to be in SSA form. The TwoAddressInstructionPass
and PHIElimination passes clear the flag.

The SSA flag wil be used by the machine code verifier to check for SSA
form, and eventually an assertion can enforce it in +Asserts builds.
This will catch the common target error of creating machine code with
multiple defs of a virtual register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136532 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
51458ed09e6db0e424cd528e10b879f59915abe4 08-Jul-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Be more aggressive about following hints.

RAGreedy::tryAssign will now evict interference from the preferred
register even when another register is free.

To support this, add the EvictionCost struct that counts how many hints
are broken by an eviction. We don't want to break one hint just to
satisfy another.

Rename canEvict to shouldEvict, and add the first bit of eviction policy
that doesn't depend on spill weights: Always make room in the preferred
register as long as the evictees can be split and aren't already
assigned to their preferred register.

Also make the CSR avoidance more accurate. When looking for a cheaper
register it is OK to use a new volatile register. Only CSR aliases that
have never been used before should be avoided.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134735 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
f46e7e3d7ff56d91572350c45ade83f4deea0139 28-Jun-2011 Evan Cheng <evan.cheng@apple.com> Remove RegClass2VRegMap from MachineRegisterInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
68e6beeccc0b9ac2e8d3687a8a5b7d4b172edca1 22-Feb-2011 Devang Patel <dpatel@apple.com> Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body.
This requires some coordination with debugger to get this working.
- The debugger needs to be aware of prolog_end attribute attached with line table entries.
- The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
e9a7ea68653689966417443b8ac2528c1d9d3ccf 31-Jan-2011 Devang Patel <dpatel@apple.com> Keep track of incoming argument's location while emitting LiveIns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124611 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
c9df025e33ac435adb3b3318d237c36ca7cec659 10-Jan-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.

These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
42e9c963921776cb498c33b6c6c03f29971316f3 09-Jan-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong results
when no virtual registers have been allocated.

It was only used to resize IndexedMaps, so provide an IndexedMap::resize()
method such that

Map.grow(MRI.getLastVirtReg());

can be replaced with the simpler

Map.resize(MRI.getNumVirtRegs());

This works correctly when no virtuals are allocated, and it bypasses the to/from
index conversions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
994c727b5790e5c976e32c75364d78eb9b22a568 09-Jan-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Use IndexedMap for MachineRegisterInfo as well. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
b421c566f512ed0ec87851866d335e9086c3f8be 09-Jan-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Use an IndexedMap for LiveVariables::VirtRegInfo.

Provide MRI::getNumVirtRegs() and TRI::index2VirtReg() functions to allow
iteration over virtual registers without depending on the representation of
virtual register numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
bf4699c56100a0184bbe4fb53937c7204ca1ceb0 07-Oct-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.

This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
914f2ff9e6969214d84a75745ec2851f045000f7 30-Jun-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Begin implementation of an inline spiller.

InlineSpiller inserts loads and spills immediately instead of deferring to
VirtRegMap. This is possible now because SlotIndexes allows instructions to be
inserted and renumbered.

This is work in progress, and is mostly a copy of TrivialSpiller so far. It
works very well for functions that don't require spilling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107227 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
a606d955de3b0f777131d74162eb6f11b5f95d75 18-Jun-2010 Dan Gohman <gohman@apple.com> Start TargetRegisterClass indices at 0 instead of 1, so that
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
3946043a80a043b3cf43b34bf068feaadc46485b 24-May-2010 Evan Cheng <evan.cheng@apple.com> Avoid adding duplicate function live-in's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
65569b8ddff9d4b8647377291f8f0f2cb647bfb9 21-May-2010 Chris Lattner <sabre@nondot.org> constify accessor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104325 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
c66c78c6846631a9f6a44fee69d218f900e63140 15-May-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Add reg_nodbg_iterator

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103856 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
49b4589978ca181537c8ae694ac4c8d58d27a09a 13-May-2010 Dan Gohman <gohman@apple.com> Add a utility function for conservatively clearing kill flags, and make
use of it in MachineCSE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103726 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
82b07dc4995d48065bd95affff4d8513a5cad4f2 11-May-2010 Jakob Stoklund Olesen <stoklund@2pi.dk> Simplify the tracking of used physregs to a bulk bitor followed by a transitive
closure after allocating all blocks.

Add a few more test cases for -regalloc=fast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103500 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
2ad0fcf794924f618a7240741cc14a39be99d0f2 29-Apr-2010 Evan Cheng <evan.cheng@apple.com> Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
98708260f55cab997a5db77e930a2bd35f4172aa 14-Apr-2010 Dan Gohman <gohman@apple.com> Move the code for emitting livein copies out of SelectionDAGISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
13e73f483ef2ba630962dad3125393292533b756 13-Apr-2010 Dan Gohman <gohman@apple.com> Move MachineRegisterInfo's isLiveIn and isLiveOut out of line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101145 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
1423c70b8f1b1a757c640fac9a17cb015012e8e9 03-Mar-2010 Evan Cheng <evan.cheng@apple.com> Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
a65aa0f0bba1ef2322d63d05c074a92168684c63 06-Feb-2010 Dale Johannesen <dalej@apple.com> Add a Debug bit to MachineOperand, for uses that
are from debug info. Add an iterator to MachineRegisterInfo
to skip Debug operands when walking the use list. No
functional change yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95473 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
80f6c5898113806130975fd56d24929b06bf54f8 09-Nov-2009 Dan Gohman <gohman@apple.com> Print "..." instead of all the uninteresting register clobbers on call
instructions. This makes CodeGen dumps significantly less noisy.

Example before:
BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>, %R3<imp-def,dead>, %R12<imp-def,dead>, %LR<imp-def,dead>, %D0<imp-def,dead>, %D1<imp-def,dead>, %D2<imp-def,dead>, %D3<imp-def,dead>, %D4<imp-def,dead>, %D5<imp-def,dead>, %D6<imp-def,dead>, %D7<imp-def,dead>, %D16<imp-def,dead>, %D17<imp-def,dead>, %D18<imp-def,dead>, %D19<imp-def,dead>, %D20<imp-def,dead>, %D21<imp-def,dead>, %D22<imp-def,dead>, %D23<imp-def,dead>, %D24<imp-def,dead>, %D25<imp-def,dead>, %D26<imp-def,dead>, %D27<imp-def,dead>, %D28<imp-def,dead>, %D29<imp-def,dead>, %D30<imp-def,dead>, %D31<imp-def,dead>, %CPSR<imp-def,dead>, %FPSCR<imp-def,dead>

Same example after:
BL <ga:@bar>, %R0<imp-def>, %R1<imp-def,dead>, %LR<imp-def,dead>, %CPSR<imp-def,dead>, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
7362ce08cb2c1f0b544b18dbc21630fb4baebcfc 28-Aug-2009 Gabor Greif <ggreif@gmail.com> eliminate all 80-col violations that I have introduced in my recent checkins (and some others more)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
f0891be8bdbeeadb39da5575273b6645755fa383 27-Aug-2009 Gabor Greif <ggreif@gmail.com> Clean up the minor mess I caused with removing iterator.h. I shall take care of 80-col violations and the FIXME later. (Thanks goodness that I live in another continent, so the monkeypox did not strike me :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80224 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
358dec51804ee52e47ea3a47c9248086e458ad7c 15-Jun-2009 Evan Cheng <evan.cheng@apple.com> Part 1.
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
90f95f88c6ce09c6744777dc9d140c3c77203b92 14-Jun-2009 Evan Cheng <evan.cheng@apple.com> Move register allocation preference (or hint) from LiveInterval to MachineRegisterInfo. This allows more passes to set them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73346 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
33f1c68cba4e905fdd2bf7d2848c52052d46fbff 15-Apr-2009 Dan Gohman <gohman@apple.com> Move MachineRegisterInfo::setRegClass out of line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69126 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
00ffd505d327782eb51fa55e47967fd8e62ba40a 07-Jan-2009 Dan Gohman <gohman@apple.com> Add empty() methods for register def lists.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61890 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
2e3e5bf42742a7421b513829101501f2de6d2b02 08-Dec-2008 Dan Gohman <gohman@apple.com> Move createVirtualRegister out-of-line.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60684 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
11a26f3697ea6520022ea6d3fa6a07b3c1b988cd 20-Oct-2008 Evan Cheng <evan.cheng@apple.com> Add a register class -> virtual registers map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57844 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
6d69ba8a6901c69d78488cbc41f8dbf080618fde 25-Jul-2008 Dan Gohman <gohman@apple.com> Enable rematerialization of constants using AliasAnalysis::pointsToConstantMemory,
and knowledge of PseudoSourceValues. This unfortunately isn't sufficient to allow
constants to be rematerialized in PIC mode -- the extra indirection is a
complication.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54000 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
bdf34bc12bfc39de02c19fa250e83edb5924a6cf 19-Jun-2008 Evan Cheng <evan.cheng@apple.com> Minor spiller tweak to unfavor reload into load/store instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52477 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
ce049437d6986cfb4c0dba6bf99cadd8c301351a 18-Jun-2008 Evan Cheng <evan.cheng@apple.com> Add MachineRegisterInfo::use_empty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52451 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
43d1fd449f1a0ac9d9dafa0b9569bb6b2e976198 29-May-2008 Anton Korobeynikov <asl@math.spbu.ru> For PR1338: rename include/llvm/ADT/ilist and friends to end with ".h"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
34cd4a484e532cc463fd5a4bf59b88d13c5467c1 05-May-2008 Evan Cheng <evan.cheng@apple.com> Fix more -Wshorten-64-to-32 warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
1213d672653d7fee471d91d05b559e137d70ba56 01-Apr-2008 Chris Lattner <sabre@nondot.org> update comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
ae9f3a3b7c915f725aef5a7250e88eaeddda03c6 20-Feb-2008 Anton Korobeynikov <asl@math.spbu.ru> Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
1eb5cf9c7d0b0b04402eddc007b0de414488baf4 13-Feb-2008 Evan Cheng <evan.cheng@apple.com> Added debugging routine dumpUses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47042 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
6f0d024a534af18d9e60b3ea757376cd8a3a980e 10-Feb-2008 Dan Gohman <gohman@apple.com> Rename MRegisterInfo to TargetRegisterInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
1327f69d98a2cb527b275ffc93080cf31ddf6dc5 29-Jan-2008 Dan Gohman <gohman@apple.com> Add explicit keywords.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46506 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
c637d6f4525e417260cf2ce08643dc62283e523f 10-Jan-2008 Chris Lattner <sabre@nondot.org> provide def_* and use_* iterators in addition to reg_* iterators.
The first only returns definitions of a register, the second only
returns uses, the third returns both.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45803 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
9848ced5d0eec8cbc44f9fbe5ce273189b0b9b2b 03-Jan-2008 Chris Lattner <sabre@nondot.org> don't access element zero of an array of size zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
e138b3dd1ff02d826233482831318708a166ed93 01-Jan-2008 Chris Lattner <sabre@nondot.org> switch the register iterator to act more like hte LLVM value iterator: dereferencing
it now returns the machineinstr of the use. To get the operand, use I.getOperand().

Add a new MachineRegisterInfo::replaceRegWith, which is basically like
Value::replaceAllUsesWith.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
a91a7d594ff1e1503731ca92f72e627bdfd18f3f 01-Jan-2008 Chris Lattner <sabre@nondot.org> Add a trivial but handy function to efficiently return the machine
instruction that defines the specified vreg. Crazy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45480 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
6c5757e4e85bb190097be13c1630bb107a1fbcfe 01-Jan-2008 Chris Lattner <sabre@nondot.org> add efficient iteration support for register use/def's
within a machine function.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45479 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
62ed6b9ade63bf01717ce5274fa11e93e873d245 01-Jan-2008 Chris Lattner <sabre@nondot.org> Implement automatically updated def/use lists for all MachineInstr register
operands. The lists are currently kept in MachineRegisterInfo, but it does
not yet provide an iterator interface to them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45477 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
84bc5427d6883f73cfeae3da640acd011d35c006 31-Dec-2007 Chris Lattner <sabre@nondot.org> Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/include/llvm/CodeGen/MachineRegisterInfo.h