History log of /external/llvm/include/llvm/MC/MCInstrDesc.h
Revision Date Author Comments (<<< Hide modified files) (Show modified files >>>)
22c310d78ce9630af15b0de94c18a409705b7496 10-Dec-2014 Tim Murray <timmurray@google.com> Revert "Revert "Bring in fixes for Cortex-A53 errata + build updates.""

This reverts commit c8db087b3b6d8767db4fa54057ac8fa448d812ca.
c8db087b3b6d8767db4fa54057ac8fa448d812ca 23-Oct-2014 Tim Murray <timmurray@google.com> Revert "Bring in fixes for Cortex-A53 errata + build updates."

This reverts commit 8a1773694c6d9b1277647440583811ad3d85c6a4.

bug 18094492
8a1773694c6d9b1277647440583811ad3d85c6a4 17-Oct-2014 Stephen Hines <srhines@google.com> Bring in fixes for Cortex-A53 errata + build updates.

Bug: 18034609

(cherry picked from commit bfc2d688b591c574c0cc788348c74545ce894efa)

Change-Id: I010fb735bb84fe97ccb8e3878f9601cb533962f4
dce4a407a24b04eebc6a376f8e62b41aaa7b071f 29-May-2014 Stephen Hines <srhines@google.com> Update LLVM for 3.5 rebase (r209712).

Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
25d25832d550c1844d27d2034cec1c8d507fa689 12-Sep-2013 Joey Gouly <joey.gouly@arm.com> Somehow this important part of the patch, where I actually check the Mask,
got lost during my iterations of review.

Thanks to Hal for spotting it!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190604 91177308-0d34-0410-b5e6-96231b3b80d8
715d98d657491b3fb8ea0e14643e9801b2f9628c 12-Sep-2013 Joey Gouly <joey.gouly@arm.com> Add an instruction deprecation feature to TableGen.

The 'Deprecated' class allows you to specify a SubtargetFeature that the
instruction is deprecated on.

The 'ComplexDeprecationPredicate' class allows you to define a custom
predicate that is called to check for deprecation.
For example:

would mean you would have to define the following function:
bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
std::string &Info)

Which returns 'false' for not deprecated, and 'true' for deprecated
and store the warning message in 'Info'.

The MCTargetAsmParser constructor was chaned to take an extra argument of
the MCInstrInfo class, so out-of-tree targets will need to be changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190598 91177308-0d34-0410-b5e6-96231b3b80d8
741e37ed0de4a65eab69e0967a5da3eb1adc01ef 22-Jul-2013 Jim Grosbach <grosbach@apple.com> MC: mayAffectControlFlow() handling for variadic instructions.

Variadic MC instructions don't note whether the variable operands
are uses or defs, so mayAffectControlFlow() must conservatively
assume they are defs and return true if the PC is in the operand


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186846 91177308-0d34-0410-b5e6-96231b3b80d8
58a2cbef4aac9ee7d530dfb690c78d6fc11a2371 02-Jan-2013 Chandler Carruth <chandlerc@gmail.com> Resort the #include lines in include/... and lib/... with the
utils/sort_includes.py script.

Most of these are updating the new R600 target and fixing up a few
regressions that have creeped in since the last time I sorted the

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171362 91177308-0d34-0410-b5e6-96231b3b80d8
0eaf5a503e291cfd6d3ad27b6cc3956be2d4b914 20-Dec-2012 Jim Grosbach <grosbach@apple.com> Fix inadvertant delete of 'has'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170713 91177308-0d34-0410-b5e6-96231b3b80d8
46367768f75c860d64874067800711120fdbfc22 20-Dec-2012 Jim Grosbach <grosbach@apple.com> Clean up some DOxygen comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170629 91177308-0d34-0410-b5e6-96231b3b80d8
fbf3b4a07690751f72302757058ab0298dfb832e 20-Dec-2012 Jim Grosbach <grosbach@apple.com> MC: Add MCInstrDesc::mayAffectControlFlow() method.

MC disassembler clients (LLDB) are interested in querying if an
instruction may affect control flow other than by virtue of being
an explicit branch instruction. For example, instructions which
write directly to the PC on some architectures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170610 91177308-0d34-0410-b5e6-96231b3b80d8
dd2fa5195ea2d98b2b4ee18f9894ad674f132a40 20-Dec-2012 Jim Grosbach <grosbach@apple.com> Fix doc comment. '///' not '//'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170607 91177308-0d34-0410-b5e6-96231b3b80d8
7f8f3f7f6400291d30531c88a98511f9fc626b4c 25-Sep-2012 Chad Rosier <mcrosier@apple.com> Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164570 91177308-0d34-0410-b5e6-96231b3b80d8
f2c64ef519b38a4328809b27b4a3a8e0c26e9709 17-Aug-2012 Jakob Stoklund Olesen <stoklund@2pi.dk> Add an MCID::Select flag and TII hooks for optimizing selects.

Select instructions pick one of two virtual registers based on a
condition, like x86 cmov. On targets like ARM that support predication,
selects can sometimes be eliminated by predicating the instruction
defining one of the operands.

Teach PeepholeOptimizer to recognize select instructions, and ask the
target to optimize them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162059 91177308-0d34-0410-b5e6-96231b3b80d8
39bdc5526f9bb4985c5ea7711e603bb44707ed42 11-Mar-2012 Craig Topper <craig.topper@gmail.com> Shrink and reorder some fields in MCOperandInfo to fit it in 8 bytes to reduce size of static tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152524 91177308-0d34-0410-b5e6-96231b3b80d8
fac259814923d091942b230e7bd002a8d1130bc3 08-Mar-2012 Craig Topper <craig.topper@gmail.com> Use uint16_t to store instruction implicit uses and defs. Reduces static data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152301 91177308-0d34-0410-b5e6-96231b3b80d8
c667ba69ac342563c0886e20509e68705d78a0a5 10-Feb-2012 Benjamin Kramer <benny.kra@googlemail.com> Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc.

Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't
have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150245 91177308-0d34-0410-b5e6-96231b3b80d8
133f9d989485376ce8ad0d6c61ba12e913fa6366 09-Feb-2012 Benjamin Kramer <benny.kra@googlemail.com> Move the Name field in MCInstrDesc to the end, saving 8 bytes of padding per entry on x86_64.

No change on i386.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150170 91177308-0d34-0410-b5e6-96231b3b80d8
5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd 07-Dec-2011 Evan Cheng <evan.cheng@apple.com> Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
7c2a4a30e0e16762c75adacebd05ec9fcbccf16b 06-Dec-2011 Evan Cheng <evan.cheng@apple.com> First chunk of MachineInstr bundle support.
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975 91177308-0d34-0410-b5e6-96231b3b80d8
c291e2f5780c3a8470113a2a58c1fa680cd54b20 25-Sep-2011 Jakob Stoklund Olesen <stoklund@2pi.dk> Add target hook for pseudo instruction expansion.

Many targets use pseudo instructions to help register allocation. Like
the COPY instruction, these pseudos can be expanded after register
allocation. The early expansion can make life easier for PEI and the
post-ra scheduler.

This patch adds a hook that is called for all remaining pseudo
instructions from the ExpandPostRAPseudos pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140472 91177308-0d34-0410-b5e6-96231b3b80d8
83a8031336a1155e6b0c3e9a84164324e08d1c8b 20-Sep-2011 Andrew Trick <atrick@apple.com> Restore hasPostISelHook tblgen flag.

No functionality change. The hook makes it explicit which patterns
require "special" handling. i.e. it self-documents tblgen
deficiencies. I plan to add verification in ExpandISelPseudos and
Thumb2SizeReduce to catch any missing hasPostISelHooks. Otherwise it's
too fragile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140160 91177308-0d34-0410-b5e6-96231b3b80d8
4815d56bb2c356a610f46753c5f1cefafa113b21 20-Sep-2011 Andrew Trick <atrick@apple.com> ARM isel bug fix for adds/subs operands.

Modified ARMISelLowering::AdjustInstrPostInstrSelection to handle the
full gamut of CPSR defs/uses including instructins whose "optional"
cc_out operand is not really optional. This allowed removal of the
hasPostISelHook to simplify the .td files and make the implementation
more robust.
Fixes rdar://10137436: sqlite3 miscompile

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140134 91177308-0d34-0410-b5e6-96231b3b80d8
37fefc20d3a1e3934a377567d54a141f67752227 30-Aug-2011 Evan Cheng <evan.cheng@apple.com> Follow up to r138791.

Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138810 91177308-0d34-0410-b5e6-96231b3b80d8
f8e1e3e729473b8b2b7ee6134b6417976af84d05 30-Aug-2011 Jim Grosbach <grosbach@apple.com> Thumb2 parsing and encoding for IT blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
7e0d22cbf7b41e93279f574c9b3c557cdf517dcb 29-Aug-2011 Jim Grosbach <grosbach@apple.com> Tidy up. 80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138750 91177308-0d34-0410-b5e6-96231b3b80d8
0ba45d4fb3e11d8085b01008e31477bece20d01d 16-Aug-2011 Jim Grosbach <grosbach@apple.com> Tidy up. Trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137721 91177308-0d34-0410-b5e6-96231b3b80d8
5196c12e9fdec9ef3c63d96cb529c1c1cb732773 14-Jul-2011 Benjamin Kramer <benny.kra@googlemail.com> Add a new field to MCOperandInfo that contains information about the type of the Operand.

- The actual values are from the MCOI::OperandType enum.
- Teach tblgen to read it from the instruction definition.
- This is a better implementation of the hacks in edis.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135197 91177308-0d34-0410-b5e6-96231b3b80d8
16884415db751c75f2133bd04921393c792b1158 14-Jul-2011 Owen Anderson <resistor@mac.com> Add a target-indepedent entry to MCInstrDesc to describe the encoded size of an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135106 91177308-0d34-0410-b5e6-96231b3b80d8
22fee2dff4c43b551aefa44a96ca74fcade6bfac 28-Jun-2011 Evan Cheng <evan.cheng@apple.com> Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
e837dead3c8dc3445ef6a0e2322179c57e264a13 28-Jun-2011 Evan Cheng <evan.cheng@apple.com> - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8